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authorNicolas Pitre <nico@cam.org>2005-02-08 12:11:19 -0500
committerThomas Gleixner <tglx@mtd.linutronix.de>2005-05-23 06:25:23 -0400
commitf77814dd5728edaf1239d19755d2aa0d8c33d861 (patch)
tree5cf7f73aa367bf152e5fbd16b5173e18bb787dd5 /drivers/mtd/chips/Kconfig
parent67d9e95c393d23c229836e28b262dc73d71da784 (diff)
[MTD] Support for protection register support on Intel FLASH chips
This enables support for reading, writing and locking so called "Protection Registers" present on some flash chips. A subset of them are pre-programmed at the factory with a unique set of values. The rest is user-programmable. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'drivers/mtd/chips/Kconfig')
-rw-r--r--drivers/mtd/chips/Kconfig27
1 files changed, 26 insertions, 1 deletions
diff --git a/drivers/mtd/chips/Kconfig b/drivers/mtd/chips/Kconfig
index d682dbc8157..f4eda1e40d5 100644
--- a/drivers/mtd/chips/Kconfig
+++ b/drivers/mtd/chips/Kconfig
@@ -1,5 +1,5 @@
1# drivers/mtd/chips/Kconfig 1# drivers/mtd/chips/Kconfig
2# $Id: Kconfig,v 1.13 2004/12/01 15:49:10 nico Exp $ 2# $Id: Kconfig,v 1.14 2005/02/08 17:11:15 nico Exp $
3 3
4menu "RAM/ROM/Flash chip drivers" 4menu "RAM/ROM/Flash chip drivers"
5 depends on MTD!=n 5 depends on MTD!=n
@@ -155,6 +155,31 @@ config MTD_CFI_I8
155 If your flash chips are interleaved in eights - i.e. you have eight 155 If your flash chips are interleaved in eights - i.e. you have eight
156 flash chips addressed by each bus cycle, then say 'Y'. 156 flash chips addressed by each bus cycle, then say 'Y'.
157 157
158config MTD_OTP
159 bool "Protection Registers aka one-time programmable (OTP) bits"
160 depends on MTD_CFI_ADV_OPTIONS
161 default n
162 help
163 This enables support for reading, writing and locking so called
164 "Protection Registers" present on some flash chips.
165 A subset of them are pre-programmed at the factory with a
166 unique set of values. The rest is user-programmable.
167
168 The user-programmable Protection Registers contain one-time
169 programmable (OTP) bits; when programmed, register bits cannot be
170 erased. Each Protection Register can be accessed multiple times to
171 program individual bits, as long as the register remains unlocked.
172
173 Each Protection Register has an associated Lock Register bit. When a
174 Lock Register bit is programmed, the associated Protection Register
175 can only be read; it can no longer be programmed. Additionally,
176 because the Lock Register bits themselves are OTP, when programmed,
177 Lock Register bits cannot be erased. Therefore, when a Protection
178 Register is locked, it cannot be unlocked.
179
180 This feature should therefore be used with extreme care. Any mistake
181 in the programming of OTP bits will waste them.
182
158config MTD_CFI_INTELEXT 183config MTD_CFI_INTELEXT
159 tristate "Support for Intel/Sharp flash chips" 184 tristate "Support for Intel/Sharp flash chips"
160 depends on MTD_GEN_PROBE 185 depends on MTD_GEN_PROBE