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authorXu lei <B33228@freescale.com>2011-09-09 08:05:46 -0400
committerChris Ball <cjb@laptop.org>2011-10-26 16:31:56 -0400
commite51cbc9eab260ed50548925f6879c04e81123928 (patch)
treed426165488c39345aeeb5244c6fc9f366ce431dc /drivers/mmc
parentc3805467aad7ce4e31c2b935046843de08cfc026 (diff)
mmc: sdhci-of-esdhc: Access Freescale eSDHC registers as 32-bit
Freescale eSDHC registers only support 32-bit accesses, this patch ensures that all Freescale eSDHC register accesses are 32-bit. Signed-off-by: Xu lei <B33228@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Anton Vorontsov <cbouatmailru@gmail.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/host/sdhci-of-esdhc.c18
1 files changed, 14 insertions, 4 deletions
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
index fe604df6501..40036f6e859 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Freescale eSDHC controller driver. 2 * Freescale eSDHC controller driver.
3 * 3 *
4 * Copyright (c) 2007 Freescale Semiconductor, Inc. 4 * Copyright (c) 2007, 2010 Freescale Semiconductor, Inc.
5 * Copyright (c) 2009 MontaVista Software, Inc. 5 * Copyright (c) 2009 MontaVista Software, Inc.
6 * 6 *
7 * Authors: Xiaobo Xie <X.Xie@freescale.com> 7 * Authors: Xiaobo Xie <X.Xie@freescale.com>
@@ -22,11 +22,21 @@
22static u16 esdhc_readw(struct sdhci_host *host, int reg) 22static u16 esdhc_readw(struct sdhci_host *host, int reg)
23{ 23{
24 u16 ret; 24 u16 ret;
25 int base = reg & ~0x3;
26 int shift = (reg & 0x2) * 8;
25 27
26 if (unlikely(reg == SDHCI_HOST_VERSION)) 28 if (unlikely(reg == SDHCI_HOST_VERSION))
27 ret = in_be16(host->ioaddr + reg); 29 ret = in_be32(host->ioaddr + base) & 0xffff;
28 else 30 else
29 ret = sdhci_be32bs_readw(host, reg); 31 ret = (in_be32(host->ioaddr + base) >> shift) & 0xffff;
32 return ret;
33}
34
35static u8 esdhc_readb(struct sdhci_host *host, int reg)
36{
37 int base = reg & ~0x3;
38 int shift = (reg & 0x3) * 8;
39 u8 ret = (in_be32(host->ioaddr + base) >> shift) & 0xff;
30 return ret; 40 return ret;
31} 41}
32 42
@@ -74,7 +84,7 @@ static unsigned int esdhc_of_get_min_clock(struct sdhci_host *host)
74static struct sdhci_ops sdhci_esdhc_ops = { 84static struct sdhci_ops sdhci_esdhc_ops = {
75 .read_l = sdhci_be32bs_readl, 85 .read_l = sdhci_be32bs_readl,
76 .read_w = esdhc_readw, 86 .read_w = esdhc_readw,
77 .read_b = sdhci_be32bs_readb, 87 .read_b = esdhc_readb,
78 .write_l = sdhci_be32bs_writel, 88 .write_l = sdhci_be32bs_writel,
79 .write_w = esdhc_writew, 89 .write_w = esdhc_writew,
80 .write_b = esdhc_writeb, 90 .write_b = esdhc_writeb,