Merge branch 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6

* 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6: (94 commits)
  V4L/DVB: tvp7002: fix write to H-PLL Feedback Divider LSB register
  V4L/DVB: dvb: siano: free spinlock before schedule()
  V4L/DVB: media: video: pvrusb2: remove custom hex_to_bin()
  V4L/DVB: drivers: usbvideo: remove custom implementation of hex_to_bin()
  V4L/DVB: Report supported QAM modes on bt8xx
  V4L/DVB: media: ir-keytable: null dereference in debug code
  V4L/DVB: ivtv: convert to the new control framework
  V4L/DVB: ivtv: convert gpio subdev to new control framework
  V4L/DVB: wm8739: convert to the new control framework
  V4L/DVB: cs53l32a: convert to new control framework
  V4L/DVB: wm8775: convert to the new control framework
  V4L/DVB: cx2341x: convert to the control framework
  V4L/DVB: cx25840: convert to the new control framework
  V4L/DVB: cx25840/ivtv: replace ugly priv control with s_config
  V4L/DVB: saa717x: convert to the new control framework
  V4L/DVB: msp3400: convert to the new control framework
  V4L/DVB: saa7115: convert to the new control framework
  V4L/DVB: v4l2: hook up the new control framework into the core framework
  V4L/DVB: Documentation: add v4l2-controls.txt documenting the new controls API
  V4L/DVB: v4l2-ctrls: Whitespace cleanups
  ...

1 files changed, 5 insertions, 5 deletions

diff --git a/drivers/media/video/tvp7002.c b/drivers/media/video/tvp7002.c
index 8085ac39244..48f5c76ab52 100644
--- a/drivers/media/video/tvp7002.c
+++ b/drivers/media/video/tvp7002.c
@@ -179,7 +179,7 @@ static const struct i2c_reg_value tvp7002_init_default[] = {
 /* Register parameters for 480P */
 static const struct i2c_reg_value tvp7002_parms_480P[] = {
         { TVP7002_HPLL_FDBK_DIV_MSBS, 0x35, TVP7002_WRITE },
-        { TVP7002_HPLL_FDBK_DIV_LSBS, 0x0a, TVP7002_WRITE },
+        { TVP7002_HPLL_FDBK_DIV_LSBS, 0xa0, TVP7002_WRITE },
         { TVP7002_HPLL_CRTL, 0x02, TVP7002_WRITE },
         { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
         { TVP7002_AVID_START_PIXEL_LSBS, 0x91, TVP7002_WRITE },
@@ -223,7 +223,7 @@ static const struct i2c_reg_value tvp7002_parms_576P[] = {
 /* Register parameters for 1080I60 */
 static const struct i2c_reg_value tvp7002_parms_1080I60[] = {
         { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
-        { TVP7002_HPLL_FDBK_DIV_LSBS, 0x08, TVP7002_WRITE },
+        { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE },
         { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
         { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
         { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
@@ -245,7 +245,7 @@ static const struct i2c_reg_value tvp7002_parms_1080I60[] = {
 /* Register parameters for 1080P60 */
 static const struct i2c_reg_value tvp7002_parms_1080P60[] = {
         { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
-        { TVP7002_HPLL_FDBK_DIV_LSBS, 0x08, TVP7002_WRITE },
+        { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE },
         { TVP7002_HPLL_CRTL, 0xE0, TVP7002_WRITE },
         { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
         { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
@@ -289,7 +289,7 @@ static const struct i2c_reg_value tvp7002_parms_1080I50[] = {
 /* Register parameters for 720P60 */
 static const struct i2c_reg_value tvp7002_parms_720P60[] = {
         { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
-        { TVP7002_HPLL_FDBK_DIV_LSBS, 0x02, TVP7002_WRITE },
+        { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
         { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
         { TVP7002_HPLL_PHASE_SEL, 0x16, TVP7002_WRITE },
         { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
@@ -311,7 +311,7 @@ static const struct i2c_reg_value tvp7002_parms_720P60[] = {
 /* Register parameters for 720P50 */
 static const struct i2c_reg_value tvp7002_parms_720P50[] = {
         { TVP7002_HPLL_FDBK_DIV_MSBS, 0x7b, TVP7002_WRITE },
-        { TVP7002_HPLL_FDBK_DIV_LSBS, 0x0c, TVP7002_WRITE },
+        { TVP7002_HPLL_FDBK_DIV_LSBS, 0xc0, TVP7002_WRITE },
         { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
         { TVP7002_HPLL_PHASE_SEL, 0x16, TVP7002_WRITE },
         { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },