diff options
author | Jonathan Herman <hermanjl@cs.unc.edu> | 2013-01-22 10:38:37 -0500 |
---|---|---|
committer | Jonathan Herman <hermanjl@cs.unc.edu> | 2013-01-22 10:38:37 -0500 |
commit | fcc9d2e5a6c89d22b8b773a64fb4ad21ac318446 (patch) | |
tree | a57612d1888735a2ec7972891b68c1ac5ec8faea /drivers/media/video/mt9m111.c | |
parent | 8dea78da5cee153b8af9c07a2745f6c55057fe12 (diff) |
Diffstat (limited to 'drivers/media/video/mt9m111.c')
-rw-r--r-- | drivers/media/video/mt9m111.c | 1125 |
1 files changed, 1125 insertions, 0 deletions
diff --git a/drivers/media/video/mt9m111.c b/drivers/media/video/mt9m111.c new file mode 100644 index 00000000000..a357aa889fc --- /dev/null +++ b/drivers/media/video/mt9m111.c | |||
@@ -0,0 +1,1125 @@ | |||
1 | /* | ||
2 | * Driver for MT9M111/MT9M112/MT9M131 CMOS Image Sensor from Micron/Aptina | ||
3 | * | ||
4 | * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/videodev2.h> | ||
11 | #include <linux/slab.h> | ||
12 | #include <linux/i2c.h> | ||
13 | #include <linux/log2.h> | ||
14 | #include <linux/gpio.h> | ||
15 | #include <linux/delay.h> | ||
16 | |||
17 | #include <media/v4l2-common.h> | ||
18 | #include <media/v4l2-chip-ident.h> | ||
19 | #include <media/soc_camera.h> | ||
20 | |||
21 | /* | ||
22 | * MT9M111, MT9M112 and MT9M131: | ||
23 | * i2c address is 0x48 or 0x5d (depending on SADDR pin) | ||
24 | * The platform has to define i2c_board_info and call i2c_register_board_info() | ||
25 | */ | ||
26 | |||
27 | /* | ||
28 | * Sensor core register addresses (0x000..0x0ff) | ||
29 | */ | ||
30 | #define MT9M111_CHIP_VERSION 0x000 | ||
31 | #define MT9M111_ROW_START 0x001 | ||
32 | #define MT9M111_COLUMN_START 0x002 | ||
33 | #define MT9M111_WINDOW_HEIGHT 0x003 | ||
34 | #define MT9M111_WINDOW_WIDTH 0x004 | ||
35 | #define MT9M111_HORIZONTAL_BLANKING_B 0x005 | ||
36 | #define MT9M111_VERTICAL_BLANKING_B 0x006 | ||
37 | #define MT9M111_HORIZONTAL_BLANKING_A 0x007 | ||
38 | #define MT9M111_VERTICAL_BLANKING_A 0x008 | ||
39 | #define MT9M111_SHUTTER_WIDTH 0x009 | ||
40 | #define MT9M111_ROW_SPEED 0x00a | ||
41 | #define MT9M111_EXTRA_DELAY 0x00b | ||
42 | #define MT9M111_SHUTTER_DELAY 0x00c | ||
43 | #define MT9M111_RESET 0x00d | ||
44 | #define MT9M111_READ_MODE_B 0x020 | ||
45 | #define MT9M111_READ_MODE_A 0x021 | ||
46 | #define MT9M111_FLASH_CONTROL 0x023 | ||
47 | #define MT9M111_GREEN1_GAIN 0x02b | ||
48 | #define MT9M111_BLUE_GAIN 0x02c | ||
49 | #define MT9M111_RED_GAIN 0x02d | ||
50 | #define MT9M111_GREEN2_GAIN 0x02e | ||
51 | #define MT9M111_GLOBAL_GAIN 0x02f | ||
52 | #define MT9M111_CONTEXT_CONTROL 0x0c8 | ||
53 | #define MT9M111_PAGE_MAP 0x0f0 | ||
54 | #define MT9M111_BYTE_WISE_ADDR 0x0f1 | ||
55 | |||
56 | #define MT9M111_RESET_SYNC_CHANGES (1 << 15) | ||
57 | #define MT9M111_RESET_RESTART_BAD_FRAME (1 << 9) | ||
58 | #define MT9M111_RESET_SHOW_BAD_FRAMES (1 << 8) | ||
59 | #define MT9M111_RESET_RESET_SOC (1 << 5) | ||
60 | #define MT9M111_RESET_OUTPUT_DISABLE (1 << 4) | ||
61 | #define MT9M111_RESET_CHIP_ENABLE (1 << 3) | ||
62 | #define MT9M111_RESET_ANALOG_STANDBY (1 << 2) | ||
63 | #define MT9M111_RESET_RESTART_FRAME (1 << 1) | ||
64 | #define MT9M111_RESET_RESET_MODE (1 << 0) | ||
65 | |||
66 | #define MT9M111_RM_FULL_POWER_RD (0 << 10) | ||
67 | #define MT9M111_RM_LOW_POWER_RD (1 << 10) | ||
68 | #define MT9M111_RM_COL_SKIP_4X (1 << 5) | ||
69 | #define MT9M111_RM_ROW_SKIP_4X (1 << 4) | ||
70 | #define MT9M111_RM_COL_SKIP_2X (1 << 3) | ||
71 | #define MT9M111_RM_ROW_SKIP_2X (1 << 2) | ||
72 | #define MT9M111_RMB_MIRROR_COLS (1 << 1) | ||
73 | #define MT9M111_RMB_MIRROR_ROWS (1 << 0) | ||
74 | #define MT9M111_CTXT_CTRL_RESTART (1 << 15) | ||
75 | #define MT9M111_CTXT_CTRL_DEFECTCOR_B (1 << 12) | ||
76 | #define MT9M111_CTXT_CTRL_RESIZE_B (1 << 10) | ||
77 | #define MT9M111_CTXT_CTRL_CTRL2_B (1 << 9) | ||
78 | #define MT9M111_CTXT_CTRL_GAMMA_B (1 << 8) | ||
79 | #define MT9M111_CTXT_CTRL_XENON_EN (1 << 7) | ||
80 | #define MT9M111_CTXT_CTRL_READ_MODE_B (1 << 3) | ||
81 | #define MT9M111_CTXT_CTRL_LED_FLASH_EN (1 << 2) | ||
82 | #define MT9M111_CTXT_CTRL_VBLANK_SEL_B (1 << 1) | ||
83 | #define MT9M111_CTXT_CTRL_HBLANK_SEL_B (1 << 0) | ||
84 | |||
85 | /* | ||
86 | * Colorpipe register addresses (0x100..0x1ff) | ||
87 | */ | ||
88 | #define MT9M111_OPER_MODE_CTRL 0x106 | ||
89 | #define MT9M111_OUTPUT_FORMAT_CTRL 0x108 | ||
90 | #define MT9M111_REDUCER_XZOOM_B 0x1a0 | ||
91 | #define MT9M111_REDUCER_XSIZE_B 0x1a1 | ||
92 | #define MT9M111_REDUCER_YZOOM_B 0x1a3 | ||
93 | #define MT9M111_REDUCER_YSIZE_B 0x1a4 | ||
94 | #define MT9M111_REDUCER_XZOOM_A 0x1a6 | ||
95 | #define MT9M111_REDUCER_XSIZE_A 0x1a7 | ||
96 | #define MT9M111_REDUCER_YZOOM_A 0x1a9 | ||
97 | #define MT9M111_REDUCER_YSIZE_A 0x1aa | ||
98 | |||
99 | #define MT9M111_OUTPUT_FORMAT_CTRL2_A 0x13a | ||
100 | #define MT9M111_OUTPUT_FORMAT_CTRL2_B 0x19b | ||
101 | |||
102 | #define MT9M111_OPMODE_AUTOEXPO_EN (1 << 14) | ||
103 | #define MT9M111_OPMODE_AUTOWHITEBAL_EN (1 << 1) | ||
104 | #define MT9M111_OUTFMT_FLIP_BAYER_COL (1 << 9) | ||
105 | #define MT9M111_OUTFMT_FLIP_BAYER_ROW (1 << 8) | ||
106 | #define MT9M111_OUTFMT_PROCESSED_BAYER (1 << 14) | ||
107 | #define MT9M111_OUTFMT_BYPASS_IFP (1 << 10) | ||
108 | #define MT9M111_OUTFMT_INV_PIX_CLOCK (1 << 9) | ||
109 | #define MT9M111_OUTFMT_RGB (1 << 8) | ||
110 | #define MT9M111_OUTFMT_RGB565 (0 << 6) | ||
111 | #define MT9M111_OUTFMT_RGB555 (1 << 6) | ||
112 | #define MT9M111_OUTFMT_RGB444x (2 << 6) | ||
113 | #define MT9M111_OUTFMT_RGBx444 (3 << 6) | ||
114 | #define MT9M111_OUTFMT_TST_RAMP_OFF (0 << 4) | ||
115 | #define MT9M111_OUTFMT_TST_RAMP_COL (1 << 4) | ||
116 | #define MT9M111_OUTFMT_TST_RAMP_ROW (2 << 4) | ||
117 | #define MT9M111_OUTFMT_TST_RAMP_FRAME (3 << 4) | ||
118 | #define MT9M111_OUTFMT_SHIFT_3_UP (1 << 3) | ||
119 | #define MT9M111_OUTFMT_AVG_CHROMA (1 << 2) | ||
120 | #define MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN (1 << 1) | ||
121 | #define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B (1 << 0) | ||
122 | |||
123 | /* | ||
124 | * Camera control register addresses (0x200..0x2ff not implemented) | ||
125 | */ | ||
126 | |||
127 | #define reg_read(reg) mt9m111_reg_read(client, MT9M111_##reg) | ||
128 | #define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val)) | ||
129 | #define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val)) | ||
130 | #define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val)) | ||
131 | #define reg_mask(reg, val, mask) mt9m111_reg_mask(client, MT9M111_##reg, \ | ||
132 | (val), (mask)) | ||
133 | |||
134 | #define MT9M111_MIN_DARK_ROWS 8 | ||
135 | #define MT9M111_MIN_DARK_COLS 26 | ||
136 | #define MT9M111_MAX_HEIGHT 1024 | ||
137 | #define MT9M111_MAX_WIDTH 1280 | ||
138 | |||
139 | /* MT9M111 has only one fixed colorspace per pixelcode */ | ||
140 | struct mt9m111_datafmt { | ||
141 | enum v4l2_mbus_pixelcode code; | ||
142 | enum v4l2_colorspace colorspace; | ||
143 | }; | ||
144 | |||
145 | /* Find a data format by a pixel code in an array */ | ||
146 | static const struct mt9m111_datafmt *mt9m111_find_datafmt( | ||
147 | enum v4l2_mbus_pixelcode code, const struct mt9m111_datafmt *fmt, | ||
148 | int n) | ||
149 | { | ||
150 | int i; | ||
151 | for (i = 0; i < n; i++) | ||
152 | if (fmt[i].code == code) | ||
153 | return fmt + i; | ||
154 | |||
155 | return NULL; | ||
156 | } | ||
157 | |||
158 | static const struct mt9m111_datafmt mt9m111_colour_fmts[] = { | ||
159 | {V4L2_MBUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG}, | ||
160 | {V4L2_MBUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG}, | ||
161 | {V4L2_MBUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_JPEG}, | ||
162 | {V4L2_MBUS_FMT_VYUY8_2X8, V4L2_COLORSPACE_JPEG}, | ||
163 | {V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB}, | ||
164 | {V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB}, | ||
165 | {V4L2_MBUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB}, | ||
166 | {V4L2_MBUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB}, | ||
167 | {V4L2_MBUS_FMT_BGR565_2X8_LE, V4L2_COLORSPACE_SRGB}, | ||
168 | {V4L2_MBUS_FMT_BGR565_2X8_BE, V4L2_COLORSPACE_SRGB}, | ||
169 | {V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB}, | ||
170 | {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB}, | ||
171 | }; | ||
172 | |||
173 | enum mt9m111_context { | ||
174 | HIGHPOWER = 0, | ||
175 | LOWPOWER, | ||
176 | }; | ||
177 | |||
178 | struct mt9m111 { | ||
179 | struct v4l2_subdev subdev; | ||
180 | int model; /* V4L2_IDENT_MT9M111 or V4L2_IDENT_MT9M112 code | ||
181 | * from v4l2-chip-ident.h */ | ||
182 | enum mt9m111_context context; | ||
183 | struct v4l2_rect rect; | ||
184 | struct mutex power_lock; /* lock to protect power_count */ | ||
185 | int power_count; | ||
186 | const struct mt9m111_datafmt *fmt; | ||
187 | unsigned int gain; | ||
188 | unsigned char autoexposure; | ||
189 | unsigned char datawidth; | ||
190 | unsigned int powered:1; | ||
191 | unsigned int hflip:1; | ||
192 | unsigned int vflip:1; | ||
193 | unsigned int autowhitebalance:1; | ||
194 | }; | ||
195 | |||
196 | static struct mt9m111 *to_mt9m111(const struct i2c_client *client) | ||
197 | { | ||
198 | return container_of(i2c_get_clientdata(client), struct mt9m111, subdev); | ||
199 | } | ||
200 | |||
201 | static int reg_page_map_set(struct i2c_client *client, const u16 reg) | ||
202 | { | ||
203 | int ret; | ||
204 | u16 page; | ||
205 | static int lastpage = -1; /* PageMap cache value */ | ||
206 | |||
207 | page = (reg >> 8); | ||
208 | if (page == lastpage) | ||
209 | return 0; | ||
210 | if (page > 2) | ||
211 | return -EINVAL; | ||
212 | |||
213 | ret = i2c_smbus_write_word_data(client, MT9M111_PAGE_MAP, swab16(page)); | ||
214 | if (!ret) | ||
215 | lastpage = page; | ||
216 | return ret; | ||
217 | } | ||
218 | |||
219 | static int mt9m111_reg_read(struct i2c_client *client, const u16 reg) | ||
220 | { | ||
221 | int ret; | ||
222 | |||
223 | ret = reg_page_map_set(client, reg); | ||
224 | if (!ret) | ||
225 | ret = swab16(i2c_smbus_read_word_data(client, reg & 0xff)); | ||
226 | |||
227 | dev_dbg(&client->dev, "read reg.%03x -> %04x\n", reg, ret); | ||
228 | return ret; | ||
229 | } | ||
230 | |||
231 | static int mt9m111_reg_write(struct i2c_client *client, const u16 reg, | ||
232 | const u16 data) | ||
233 | { | ||
234 | int ret; | ||
235 | |||
236 | ret = reg_page_map_set(client, reg); | ||
237 | if (!ret) | ||
238 | ret = i2c_smbus_write_word_data(client, reg & 0xff, | ||
239 | swab16(data)); | ||
240 | dev_dbg(&client->dev, "write reg.%03x = %04x -> %d\n", reg, data, ret); | ||
241 | return ret; | ||
242 | } | ||
243 | |||
244 | static int mt9m111_reg_set(struct i2c_client *client, const u16 reg, | ||
245 | const u16 data) | ||
246 | { | ||
247 | int ret; | ||
248 | |||
249 | ret = mt9m111_reg_read(client, reg); | ||
250 | if (ret >= 0) | ||
251 | ret = mt9m111_reg_write(client, reg, ret | data); | ||
252 | return ret; | ||
253 | } | ||
254 | |||
255 | static int mt9m111_reg_clear(struct i2c_client *client, const u16 reg, | ||
256 | const u16 data) | ||
257 | { | ||
258 | int ret; | ||
259 | |||
260 | ret = mt9m111_reg_read(client, reg); | ||
261 | if (ret >= 0) | ||
262 | ret = mt9m111_reg_write(client, reg, ret & ~data); | ||
263 | return ret; | ||
264 | } | ||
265 | |||
266 | static int mt9m111_reg_mask(struct i2c_client *client, const u16 reg, | ||
267 | const u16 data, const u16 mask) | ||
268 | { | ||
269 | int ret; | ||
270 | |||
271 | ret = mt9m111_reg_read(client, reg); | ||
272 | if (ret >= 0) | ||
273 | ret = mt9m111_reg_write(client, reg, (ret & ~mask) | data); | ||
274 | return ret; | ||
275 | } | ||
276 | |||
277 | static int mt9m111_set_context(struct mt9m111 *mt9m111, | ||
278 | enum mt9m111_context ctxt) | ||
279 | { | ||
280 | struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); | ||
281 | int valB = MT9M111_CTXT_CTRL_RESTART | MT9M111_CTXT_CTRL_DEFECTCOR_B | ||
282 | | MT9M111_CTXT_CTRL_RESIZE_B | MT9M111_CTXT_CTRL_CTRL2_B | ||
283 | | MT9M111_CTXT_CTRL_GAMMA_B | MT9M111_CTXT_CTRL_READ_MODE_B | ||
284 | | MT9M111_CTXT_CTRL_VBLANK_SEL_B | ||
285 | | MT9M111_CTXT_CTRL_HBLANK_SEL_B; | ||
286 | int valA = MT9M111_CTXT_CTRL_RESTART; | ||
287 | |||
288 | if (ctxt == HIGHPOWER) | ||
289 | return reg_write(CONTEXT_CONTROL, valB); | ||
290 | else | ||
291 | return reg_write(CONTEXT_CONTROL, valA); | ||
292 | } | ||
293 | |||
294 | static int mt9m111_setup_rect(struct mt9m111 *mt9m111, | ||
295 | struct v4l2_rect *rect) | ||
296 | { | ||
297 | struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); | ||
298 | int ret, is_raw_format; | ||
299 | int width = rect->width; | ||
300 | int height = rect->height; | ||
301 | |||
302 | if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 || | ||
303 | mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) | ||
304 | is_raw_format = 1; | ||
305 | else | ||
306 | is_raw_format = 0; | ||
307 | |||
308 | ret = reg_write(COLUMN_START, rect->left); | ||
309 | if (!ret) | ||
310 | ret = reg_write(ROW_START, rect->top); | ||
311 | |||
312 | if (is_raw_format) { | ||
313 | if (!ret) | ||
314 | ret = reg_write(WINDOW_WIDTH, width); | ||
315 | if (!ret) | ||
316 | ret = reg_write(WINDOW_HEIGHT, height); | ||
317 | } else { | ||
318 | if (!ret) | ||
319 | ret = reg_write(REDUCER_XZOOM_B, MT9M111_MAX_WIDTH); | ||
320 | if (!ret) | ||
321 | ret = reg_write(REDUCER_YZOOM_B, MT9M111_MAX_HEIGHT); | ||
322 | if (!ret) | ||
323 | ret = reg_write(REDUCER_XSIZE_B, width); | ||
324 | if (!ret) | ||
325 | ret = reg_write(REDUCER_YSIZE_B, height); | ||
326 | if (!ret) | ||
327 | ret = reg_write(REDUCER_XZOOM_A, MT9M111_MAX_WIDTH); | ||
328 | if (!ret) | ||
329 | ret = reg_write(REDUCER_YZOOM_A, MT9M111_MAX_HEIGHT); | ||
330 | if (!ret) | ||
331 | ret = reg_write(REDUCER_XSIZE_A, width); | ||
332 | if (!ret) | ||
333 | ret = reg_write(REDUCER_YSIZE_A, height); | ||
334 | } | ||
335 | |||
336 | return ret; | ||
337 | } | ||
338 | |||
339 | static int mt9m111_enable(struct mt9m111 *mt9m111) | ||
340 | { | ||
341 | struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); | ||
342 | int ret; | ||
343 | |||
344 | ret = reg_set(RESET, MT9M111_RESET_CHIP_ENABLE); | ||
345 | if (!ret) | ||
346 | mt9m111->powered = 1; | ||
347 | return ret; | ||
348 | } | ||
349 | |||
350 | static int mt9m111_reset(struct mt9m111 *mt9m111) | ||
351 | { | ||
352 | struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); | ||
353 | int ret; | ||
354 | |||
355 | ret = reg_set(RESET, MT9M111_RESET_RESET_MODE); | ||
356 | if (!ret) | ||
357 | ret = reg_set(RESET, MT9M111_RESET_RESET_SOC); | ||
358 | if (!ret) | ||
359 | ret = reg_clear(RESET, MT9M111_RESET_RESET_MODE | ||
360 | | MT9M111_RESET_RESET_SOC); | ||
361 | |||
362 | return ret; | ||
363 | } | ||
364 | |||
365 | static unsigned long mt9m111_query_bus_param(struct soc_camera_device *icd) | ||
366 | { | ||
367 | struct soc_camera_link *icl = to_soc_camera_link(icd); | ||
368 | unsigned long flags = SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING | | ||
369 | SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH | | ||
370 | SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8; | ||
371 | |||
372 | return soc_camera_apply_sensor_flags(icl, flags); | ||
373 | } | ||
374 | |||
375 | static int mt9m111_set_bus_param(struct soc_camera_device *icd, unsigned long f) | ||
376 | { | ||
377 | return 0; | ||
378 | } | ||
379 | |||
380 | static int mt9m111_make_rect(struct mt9m111 *mt9m111, | ||
381 | struct v4l2_rect *rect) | ||
382 | { | ||
383 | if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 || | ||
384 | mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) { | ||
385 | /* Bayer format - even size lengths */ | ||
386 | rect->width = ALIGN(rect->width, 2); | ||
387 | rect->height = ALIGN(rect->height, 2); | ||
388 | /* Let the user play with the starting pixel */ | ||
389 | } | ||
390 | |||
391 | /* FIXME: the datasheet doesn't specify minimum sizes */ | ||
392 | soc_camera_limit_side(&rect->left, &rect->width, | ||
393 | MT9M111_MIN_DARK_COLS, 2, MT9M111_MAX_WIDTH); | ||
394 | |||
395 | soc_camera_limit_side(&rect->top, &rect->height, | ||
396 | MT9M111_MIN_DARK_ROWS, 2, MT9M111_MAX_HEIGHT); | ||
397 | |||
398 | return mt9m111_setup_rect(mt9m111, rect); | ||
399 | } | ||
400 | |||
401 | static int mt9m111_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) | ||
402 | { | ||
403 | struct v4l2_rect rect = a->c; | ||
404 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
405 | struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); | ||
406 | int ret; | ||
407 | |||
408 | dev_dbg(&client->dev, "%s left=%d, top=%d, width=%d, height=%d\n", | ||
409 | __func__, rect.left, rect.top, rect.width, rect.height); | ||
410 | |||
411 | if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | ||
412 | return -EINVAL; | ||
413 | |||
414 | ret = mt9m111_make_rect(mt9m111, &rect); | ||
415 | if (!ret) | ||
416 | mt9m111->rect = rect; | ||
417 | return ret; | ||
418 | } | ||
419 | |||
420 | static int mt9m111_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) | ||
421 | { | ||
422 | struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); | ||
423 | |||
424 | a->c = mt9m111->rect; | ||
425 | a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | ||
426 | |||
427 | return 0; | ||
428 | } | ||
429 | |||
430 | static int mt9m111_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a) | ||
431 | { | ||
432 | if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | ||
433 | return -EINVAL; | ||
434 | |||
435 | a->bounds.left = MT9M111_MIN_DARK_COLS; | ||
436 | a->bounds.top = MT9M111_MIN_DARK_ROWS; | ||
437 | a->bounds.width = MT9M111_MAX_WIDTH; | ||
438 | a->bounds.height = MT9M111_MAX_HEIGHT; | ||
439 | a->defrect = a->bounds; | ||
440 | a->pixelaspect.numerator = 1; | ||
441 | a->pixelaspect.denominator = 1; | ||
442 | |||
443 | return 0; | ||
444 | } | ||
445 | |||
446 | static int mt9m111_g_fmt(struct v4l2_subdev *sd, | ||
447 | struct v4l2_mbus_framefmt *mf) | ||
448 | { | ||
449 | struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); | ||
450 | |||
451 | mf->width = mt9m111->rect.width; | ||
452 | mf->height = mt9m111->rect.height; | ||
453 | mf->code = mt9m111->fmt->code; | ||
454 | mf->colorspace = mt9m111->fmt->colorspace; | ||
455 | mf->field = V4L2_FIELD_NONE; | ||
456 | |||
457 | return 0; | ||
458 | } | ||
459 | |||
460 | static int mt9m111_set_pixfmt(struct mt9m111 *mt9m111, | ||
461 | enum v4l2_mbus_pixelcode code) | ||
462 | { | ||
463 | struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); | ||
464 | u16 data_outfmt2, mask_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER | | ||
465 | MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB | | ||
466 | MT9M111_OUTFMT_RGB565 | MT9M111_OUTFMT_RGB555 | | ||
467 | MT9M111_OUTFMT_RGB444x | MT9M111_OUTFMT_RGBx444 | | ||
468 | MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN | | ||
469 | MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; | ||
470 | int ret; | ||
471 | |||
472 | switch (code) { | ||
473 | case V4L2_MBUS_FMT_SBGGR8_1X8: | ||
474 | data_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER | | ||
475 | MT9M111_OUTFMT_RGB; | ||
476 | break; | ||
477 | case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE: | ||
478 | data_outfmt2 = MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB; | ||
479 | break; | ||
480 | case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE: | ||
481 | data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555 | | ||
482 | MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN; | ||
483 | break; | ||
484 | case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE: | ||
485 | data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555; | ||
486 | break; | ||
487 | case V4L2_MBUS_FMT_RGB565_2X8_LE: | ||
488 | data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 | | ||
489 | MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN; | ||
490 | break; | ||
491 | case V4L2_MBUS_FMT_RGB565_2X8_BE: | ||
492 | data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565; | ||
493 | break; | ||
494 | case V4L2_MBUS_FMT_BGR565_2X8_BE: | ||
495 | data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 | | ||
496 | MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; | ||
497 | break; | ||
498 | case V4L2_MBUS_FMT_BGR565_2X8_LE: | ||
499 | data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 | | ||
500 | MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN | | ||
501 | MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; | ||
502 | break; | ||
503 | case V4L2_MBUS_FMT_UYVY8_2X8: | ||
504 | data_outfmt2 = 0; | ||
505 | break; | ||
506 | case V4L2_MBUS_FMT_VYUY8_2X8: | ||
507 | data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; | ||
508 | break; | ||
509 | case V4L2_MBUS_FMT_YUYV8_2X8: | ||
510 | data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN; | ||
511 | break; | ||
512 | case V4L2_MBUS_FMT_YVYU8_2X8: | ||
513 | data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN | | ||
514 | MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; | ||
515 | break; | ||
516 | default: | ||
517 | dev_err(&client->dev, "Pixel format not handled: %x\n", code); | ||
518 | return -EINVAL; | ||
519 | } | ||
520 | |||
521 | ret = reg_mask(OUTPUT_FORMAT_CTRL2_A, data_outfmt2, | ||
522 | mask_outfmt2); | ||
523 | if (!ret) | ||
524 | ret = reg_mask(OUTPUT_FORMAT_CTRL2_B, data_outfmt2, | ||
525 | mask_outfmt2); | ||
526 | |||
527 | return ret; | ||
528 | } | ||
529 | |||
530 | static int mt9m111_s_fmt(struct v4l2_subdev *sd, | ||
531 | struct v4l2_mbus_framefmt *mf) | ||
532 | { | ||
533 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
534 | const struct mt9m111_datafmt *fmt; | ||
535 | struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); | ||
536 | struct v4l2_rect rect = { | ||
537 | .left = mt9m111->rect.left, | ||
538 | .top = mt9m111->rect.top, | ||
539 | .width = mf->width, | ||
540 | .height = mf->height, | ||
541 | }; | ||
542 | int ret; | ||
543 | |||
544 | fmt = mt9m111_find_datafmt(mf->code, mt9m111_colour_fmts, | ||
545 | ARRAY_SIZE(mt9m111_colour_fmts)); | ||
546 | if (!fmt) | ||
547 | return -EINVAL; | ||
548 | |||
549 | dev_dbg(&client->dev, | ||
550 | "%s code=%x left=%d, top=%d, width=%d, height=%d\n", __func__, | ||
551 | mf->code, rect.left, rect.top, rect.width, rect.height); | ||
552 | |||
553 | ret = mt9m111_make_rect(mt9m111, &rect); | ||
554 | if (!ret) | ||
555 | ret = mt9m111_set_pixfmt(mt9m111, mf->code); | ||
556 | if (!ret) { | ||
557 | mt9m111->rect = rect; | ||
558 | mt9m111->fmt = fmt; | ||
559 | mf->colorspace = fmt->colorspace; | ||
560 | } | ||
561 | |||
562 | return ret; | ||
563 | } | ||
564 | |||
565 | static int mt9m111_try_fmt(struct v4l2_subdev *sd, | ||
566 | struct v4l2_mbus_framefmt *mf) | ||
567 | { | ||
568 | struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); | ||
569 | const struct mt9m111_datafmt *fmt; | ||
570 | bool bayer = mf->code == V4L2_MBUS_FMT_SBGGR8_1X8 || | ||
571 | mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE; | ||
572 | |||
573 | fmt = mt9m111_find_datafmt(mf->code, mt9m111_colour_fmts, | ||
574 | ARRAY_SIZE(mt9m111_colour_fmts)); | ||
575 | if (!fmt) { | ||
576 | fmt = mt9m111->fmt; | ||
577 | mf->code = fmt->code; | ||
578 | } | ||
579 | |||
580 | /* | ||
581 | * With Bayer format enforce even side lengths, but let the user play | ||
582 | * with the starting pixel | ||
583 | */ | ||
584 | |||
585 | if (mf->height > MT9M111_MAX_HEIGHT) | ||
586 | mf->height = MT9M111_MAX_HEIGHT; | ||
587 | else if (mf->height < 2) | ||
588 | mf->height = 2; | ||
589 | else if (bayer) | ||
590 | mf->height = ALIGN(mf->height, 2); | ||
591 | |||
592 | if (mf->width > MT9M111_MAX_WIDTH) | ||
593 | mf->width = MT9M111_MAX_WIDTH; | ||
594 | else if (mf->width < 2) | ||
595 | mf->width = 2; | ||
596 | else if (bayer) | ||
597 | mf->width = ALIGN(mf->width, 2); | ||
598 | |||
599 | mf->colorspace = fmt->colorspace; | ||
600 | |||
601 | return 0; | ||
602 | } | ||
603 | |||
604 | static int mt9m111_g_chip_ident(struct v4l2_subdev *sd, | ||
605 | struct v4l2_dbg_chip_ident *id) | ||
606 | { | ||
607 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
608 | struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); | ||
609 | |||
610 | if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR) | ||
611 | return -EINVAL; | ||
612 | |||
613 | if (id->match.addr != client->addr) | ||
614 | return -ENODEV; | ||
615 | |||
616 | id->ident = mt9m111->model; | ||
617 | id->revision = 0; | ||
618 | |||
619 | return 0; | ||
620 | } | ||
621 | |||
622 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
623 | static int mt9m111_g_register(struct v4l2_subdev *sd, | ||
624 | struct v4l2_dbg_register *reg) | ||
625 | { | ||
626 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
627 | int val; | ||
628 | |||
629 | if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0x2ff) | ||
630 | return -EINVAL; | ||
631 | if (reg->match.addr != client->addr) | ||
632 | return -ENODEV; | ||
633 | |||
634 | val = mt9m111_reg_read(client, reg->reg); | ||
635 | reg->size = 2; | ||
636 | reg->val = (u64)val; | ||
637 | |||
638 | if (reg->val > 0xffff) | ||
639 | return -EIO; | ||
640 | |||
641 | return 0; | ||
642 | } | ||
643 | |||
644 | static int mt9m111_s_register(struct v4l2_subdev *sd, | ||
645 | struct v4l2_dbg_register *reg) | ||
646 | { | ||
647 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
648 | |||
649 | if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0x2ff) | ||
650 | return -EINVAL; | ||
651 | |||
652 | if (reg->match.addr != client->addr) | ||
653 | return -ENODEV; | ||
654 | |||
655 | if (mt9m111_reg_write(client, reg->reg, reg->val) < 0) | ||
656 | return -EIO; | ||
657 | |||
658 | return 0; | ||
659 | } | ||
660 | #endif | ||
661 | |||
662 | static const struct v4l2_queryctrl mt9m111_controls[] = { | ||
663 | { | ||
664 | .id = V4L2_CID_VFLIP, | ||
665 | .type = V4L2_CTRL_TYPE_BOOLEAN, | ||
666 | .name = "Flip Verticaly", | ||
667 | .minimum = 0, | ||
668 | .maximum = 1, | ||
669 | .step = 1, | ||
670 | .default_value = 0, | ||
671 | }, { | ||
672 | .id = V4L2_CID_HFLIP, | ||
673 | .type = V4L2_CTRL_TYPE_BOOLEAN, | ||
674 | .name = "Flip Horizontaly", | ||
675 | .minimum = 0, | ||
676 | .maximum = 1, | ||
677 | .step = 1, | ||
678 | .default_value = 0, | ||
679 | }, { /* gain = 1/32*val (=>gain=1 if val==32) */ | ||
680 | .id = V4L2_CID_GAIN, | ||
681 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
682 | .name = "Gain", | ||
683 | .minimum = 0, | ||
684 | .maximum = 63 * 2 * 2, | ||
685 | .step = 1, | ||
686 | .default_value = 32, | ||
687 | .flags = V4L2_CTRL_FLAG_SLIDER, | ||
688 | }, { | ||
689 | .id = V4L2_CID_EXPOSURE_AUTO, | ||
690 | .type = V4L2_CTRL_TYPE_BOOLEAN, | ||
691 | .name = "Auto Exposure", | ||
692 | .minimum = 0, | ||
693 | .maximum = 1, | ||
694 | .step = 1, | ||
695 | .default_value = 1, | ||
696 | } | ||
697 | }; | ||
698 | |||
699 | static struct soc_camera_ops mt9m111_ops = { | ||
700 | .query_bus_param = mt9m111_query_bus_param, | ||
701 | .set_bus_param = mt9m111_set_bus_param, | ||
702 | .controls = mt9m111_controls, | ||
703 | .num_controls = ARRAY_SIZE(mt9m111_controls), | ||
704 | }; | ||
705 | |||
706 | static int mt9m111_set_flip(struct mt9m111 *mt9m111, int flip, int mask) | ||
707 | { | ||
708 | struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); | ||
709 | int ret; | ||
710 | |||
711 | if (mt9m111->context == HIGHPOWER) { | ||
712 | if (flip) | ||
713 | ret = reg_set(READ_MODE_B, mask); | ||
714 | else | ||
715 | ret = reg_clear(READ_MODE_B, mask); | ||
716 | } else { | ||
717 | if (flip) | ||
718 | ret = reg_set(READ_MODE_A, mask); | ||
719 | else | ||
720 | ret = reg_clear(READ_MODE_A, mask); | ||
721 | } | ||
722 | |||
723 | return ret; | ||
724 | } | ||
725 | |||
726 | static int mt9m111_get_global_gain(struct mt9m111 *mt9m111) | ||
727 | { | ||
728 | struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); | ||
729 | int data; | ||
730 | |||
731 | data = reg_read(GLOBAL_GAIN); | ||
732 | if (data >= 0) | ||
733 | return (data & 0x2f) * (1 << ((data >> 10) & 1)) * | ||
734 | (1 << ((data >> 9) & 1)); | ||
735 | return data; | ||
736 | } | ||
737 | |||
738 | static int mt9m111_set_global_gain(struct mt9m111 *mt9m111, int gain) | ||
739 | { | ||
740 | struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); | ||
741 | u16 val; | ||
742 | |||
743 | if (gain > 63 * 2 * 2) | ||
744 | return -EINVAL; | ||
745 | |||
746 | mt9m111->gain = gain; | ||
747 | if ((gain >= 64 * 2) && (gain < 63 * 2 * 2)) | ||
748 | val = (1 << 10) | (1 << 9) | (gain / 4); | ||
749 | else if ((gain >= 64) && (gain < 64 * 2)) | ||
750 | val = (1 << 9) | (gain / 2); | ||
751 | else | ||
752 | val = gain; | ||
753 | |||
754 | return reg_write(GLOBAL_GAIN, val); | ||
755 | } | ||
756 | |||
757 | static int mt9m111_set_autoexposure(struct mt9m111 *mt9m111, int on) | ||
758 | { | ||
759 | struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); | ||
760 | int ret; | ||
761 | |||
762 | if (on) | ||
763 | ret = reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN); | ||
764 | else | ||
765 | ret = reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN); | ||
766 | |||
767 | if (!ret) | ||
768 | mt9m111->autoexposure = on; | ||
769 | |||
770 | return ret; | ||
771 | } | ||
772 | |||
773 | static int mt9m111_set_autowhitebalance(struct mt9m111 *mt9m111, int on) | ||
774 | { | ||
775 | struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); | ||
776 | int ret; | ||
777 | |||
778 | if (on) | ||
779 | ret = reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN); | ||
780 | else | ||
781 | ret = reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN); | ||
782 | |||
783 | if (!ret) | ||
784 | mt9m111->autowhitebalance = on; | ||
785 | |||
786 | return ret; | ||
787 | } | ||
788 | |||
789 | static int mt9m111_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) | ||
790 | { | ||
791 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
792 | struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); | ||
793 | int data; | ||
794 | |||
795 | switch (ctrl->id) { | ||
796 | case V4L2_CID_VFLIP: | ||
797 | if (mt9m111->context == HIGHPOWER) | ||
798 | data = reg_read(READ_MODE_B); | ||
799 | else | ||
800 | data = reg_read(READ_MODE_A); | ||
801 | |||
802 | if (data < 0) | ||
803 | return -EIO; | ||
804 | ctrl->value = !!(data & MT9M111_RMB_MIRROR_ROWS); | ||
805 | break; | ||
806 | case V4L2_CID_HFLIP: | ||
807 | if (mt9m111->context == HIGHPOWER) | ||
808 | data = reg_read(READ_MODE_B); | ||
809 | else | ||
810 | data = reg_read(READ_MODE_A); | ||
811 | |||
812 | if (data < 0) | ||
813 | return -EIO; | ||
814 | ctrl->value = !!(data & MT9M111_RMB_MIRROR_COLS); | ||
815 | break; | ||
816 | case V4L2_CID_GAIN: | ||
817 | data = mt9m111_get_global_gain(mt9m111); | ||
818 | if (data < 0) | ||
819 | return data; | ||
820 | ctrl->value = data; | ||
821 | break; | ||
822 | case V4L2_CID_EXPOSURE_AUTO: | ||
823 | ctrl->value = mt9m111->autoexposure; | ||
824 | break; | ||
825 | case V4L2_CID_AUTO_WHITE_BALANCE: | ||
826 | ctrl->value = mt9m111->autowhitebalance; | ||
827 | break; | ||
828 | } | ||
829 | return 0; | ||
830 | } | ||
831 | |||
832 | static int mt9m111_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) | ||
833 | { | ||
834 | struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); | ||
835 | const struct v4l2_queryctrl *qctrl; | ||
836 | int ret; | ||
837 | |||
838 | qctrl = soc_camera_find_qctrl(&mt9m111_ops, ctrl->id); | ||
839 | if (!qctrl) | ||
840 | return -EINVAL; | ||
841 | |||
842 | switch (ctrl->id) { | ||
843 | case V4L2_CID_VFLIP: | ||
844 | mt9m111->vflip = ctrl->value; | ||
845 | ret = mt9m111_set_flip(mt9m111, ctrl->value, | ||
846 | MT9M111_RMB_MIRROR_ROWS); | ||
847 | break; | ||
848 | case V4L2_CID_HFLIP: | ||
849 | mt9m111->hflip = ctrl->value; | ||
850 | ret = mt9m111_set_flip(mt9m111, ctrl->value, | ||
851 | MT9M111_RMB_MIRROR_COLS); | ||
852 | break; | ||
853 | case V4L2_CID_GAIN: | ||
854 | ret = mt9m111_set_global_gain(mt9m111, ctrl->value); | ||
855 | break; | ||
856 | case V4L2_CID_EXPOSURE_AUTO: | ||
857 | ret = mt9m111_set_autoexposure(mt9m111, ctrl->value); | ||
858 | break; | ||
859 | case V4L2_CID_AUTO_WHITE_BALANCE: | ||
860 | ret = mt9m111_set_autowhitebalance(mt9m111, ctrl->value); | ||
861 | break; | ||
862 | default: | ||
863 | ret = -EINVAL; | ||
864 | } | ||
865 | |||
866 | return ret; | ||
867 | } | ||
868 | |||
869 | static int mt9m111_suspend(struct mt9m111 *mt9m111) | ||
870 | { | ||
871 | mt9m111->gain = mt9m111_get_global_gain(mt9m111); | ||
872 | |||
873 | return 0; | ||
874 | } | ||
875 | |||
876 | static void mt9m111_restore_state(struct mt9m111 *mt9m111) | ||
877 | { | ||
878 | mt9m111_set_context(mt9m111, mt9m111->context); | ||
879 | mt9m111_set_pixfmt(mt9m111, mt9m111->fmt->code); | ||
880 | mt9m111_setup_rect(mt9m111, &mt9m111->rect); | ||
881 | mt9m111_set_flip(mt9m111, mt9m111->hflip, MT9M111_RMB_MIRROR_COLS); | ||
882 | mt9m111_set_flip(mt9m111, mt9m111->vflip, MT9M111_RMB_MIRROR_ROWS); | ||
883 | mt9m111_set_global_gain(mt9m111, mt9m111->gain); | ||
884 | mt9m111_set_autoexposure(mt9m111, mt9m111->autoexposure); | ||
885 | mt9m111_set_autowhitebalance(mt9m111, mt9m111->autowhitebalance); | ||
886 | } | ||
887 | |||
888 | static int mt9m111_resume(struct mt9m111 *mt9m111) | ||
889 | { | ||
890 | int ret = 0; | ||
891 | |||
892 | if (mt9m111->powered) { | ||
893 | ret = mt9m111_enable(mt9m111); | ||
894 | if (!ret) | ||
895 | ret = mt9m111_reset(mt9m111); | ||
896 | if (!ret) | ||
897 | mt9m111_restore_state(mt9m111); | ||
898 | } | ||
899 | return ret; | ||
900 | } | ||
901 | |||
902 | static int mt9m111_init(struct mt9m111 *mt9m111) | ||
903 | { | ||
904 | struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); | ||
905 | int ret; | ||
906 | |||
907 | mt9m111->context = HIGHPOWER; | ||
908 | ret = mt9m111_enable(mt9m111); | ||
909 | if (!ret) | ||
910 | ret = mt9m111_reset(mt9m111); | ||
911 | if (!ret) | ||
912 | ret = mt9m111_set_context(mt9m111, mt9m111->context); | ||
913 | if (!ret) | ||
914 | ret = mt9m111_set_autoexposure(mt9m111, mt9m111->autoexposure); | ||
915 | if (ret) | ||
916 | dev_err(&client->dev, "mt9m111 init failed: %d\n", ret); | ||
917 | return ret; | ||
918 | } | ||
919 | |||
920 | /* | ||
921 | * Interface active, can use i2c. If it fails, it can indeed mean, that | ||
922 | * this wasn't our capture interface, so, we wait for the right one | ||
923 | */ | ||
924 | static int mt9m111_video_probe(struct soc_camera_device *icd, | ||
925 | struct i2c_client *client) | ||
926 | { | ||
927 | struct mt9m111 *mt9m111 = to_mt9m111(client); | ||
928 | s32 data; | ||
929 | int ret; | ||
930 | |||
931 | /* We must have a parent by now. And it cannot be a wrong one. */ | ||
932 | BUG_ON(!icd->parent || | ||
933 | to_soc_camera_host(icd->parent)->nr != icd->iface); | ||
934 | |||
935 | mt9m111->autoexposure = 1; | ||
936 | mt9m111->autowhitebalance = 1; | ||
937 | |||
938 | data = reg_read(CHIP_VERSION); | ||
939 | |||
940 | switch (data) { | ||
941 | case 0x143a: /* MT9M111 or MT9M131 */ | ||
942 | mt9m111->model = V4L2_IDENT_MT9M111; | ||
943 | dev_info(&client->dev, | ||
944 | "Detected a MT9M111/MT9M131 chip ID %x\n", data); | ||
945 | break; | ||
946 | case 0x148c: /* MT9M112 */ | ||
947 | mt9m111->model = V4L2_IDENT_MT9M112; | ||
948 | dev_info(&client->dev, "Detected a MT9M112 chip ID %x\n", data); | ||
949 | break; | ||
950 | default: | ||
951 | ret = -ENODEV; | ||
952 | dev_err(&client->dev, | ||
953 | "No MT9M111/MT9M112/MT9M131 chip detected register read %x\n", | ||
954 | data); | ||
955 | goto ei2c; | ||
956 | } | ||
957 | |||
958 | ret = mt9m111_init(mt9m111); | ||
959 | |||
960 | ei2c: | ||
961 | return ret; | ||
962 | } | ||
963 | |||
964 | static int mt9m111_s_power(struct v4l2_subdev *sd, int on) | ||
965 | { | ||
966 | struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); | ||
967 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
968 | int ret = 0; | ||
969 | |||
970 | mutex_lock(&mt9m111->power_lock); | ||
971 | |||
972 | /* | ||
973 | * If the power count is modified from 0 to != 0 or from != 0 to 0, | ||
974 | * update the power state. | ||
975 | */ | ||
976 | if (mt9m111->power_count == !on) { | ||
977 | if (on) { | ||
978 | ret = mt9m111_resume(mt9m111); | ||
979 | if (ret) { | ||
980 | dev_err(&client->dev, | ||
981 | "Failed to resume the sensor: %d\n", ret); | ||
982 | goto out; | ||
983 | } | ||
984 | } else { | ||
985 | mt9m111_suspend(mt9m111); | ||
986 | } | ||
987 | } | ||
988 | |||
989 | /* Update the power count. */ | ||
990 | mt9m111->power_count += on ? 1 : -1; | ||
991 | WARN_ON(mt9m111->power_count < 0); | ||
992 | |||
993 | out: | ||
994 | mutex_unlock(&mt9m111->power_lock); | ||
995 | return ret; | ||
996 | } | ||
997 | |||
998 | static struct v4l2_subdev_core_ops mt9m111_subdev_core_ops = { | ||
999 | .g_ctrl = mt9m111_g_ctrl, | ||
1000 | .s_ctrl = mt9m111_s_ctrl, | ||
1001 | .g_chip_ident = mt9m111_g_chip_ident, | ||
1002 | .s_power = mt9m111_s_power, | ||
1003 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
1004 | .g_register = mt9m111_g_register, | ||
1005 | .s_register = mt9m111_s_register, | ||
1006 | #endif | ||
1007 | }; | ||
1008 | |||
1009 | static int mt9m111_enum_fmt(struct v4l2_subdev *sd, unsigned int index, | ||
1010 | enum v4l2_mbus_pixelcode *code) | ||
1011 | { | ||
1012 | if (index >= ARRAY_SIZE(mt9m111_colour_fmts)) | ||
1013 | return -EINVAL; | ||
1014 | |||
1015 | *code = mt9m111_colour_fmts[index].code; | ||
1016 | return 0; | ||
1017 | } | ||
1018 | |||
1019 | static struct v4l2_subdev_video_ops mt9m111_subdev_video_ops = { | ||
1020 | .s_mbus_fmt = mt9m111_s_fmt, | ||
1021 | .g_mbus_fmt = mt9m111_g_fmt, | ||
1022 | .try_mbus_fmt = mt9m111_try_fmt, | ||
1023 | .s_crop = mt9m111_s_crop, | ||
1024 | .g_crop = mt9m111_g_crop, | ||
1025 | .cropcap = mt9m111_cropcap, | ||
1026 | .enum_mbus_fmt = mt9m111_enum_fmt, | ||
1027 | }; | ||
1028 | |||
1029 | static struct v4l2_subdev_ops mt9m111_subdev_ops = { | ||
1030 | .core = &mt9m111_subdev_core_ops, | ||
1031 | .video = &mt9m111_subdev_video_ops, | ||
1032 | }; | ||
1033 | |||
1034 | static int mt9m111_probe(struct i2c_client *client, | ||
1035 | const struct i2c_device_id *did) | ||
1036 | { | ||
1037 | struct mt9m111 *mt9m111; | ||
1038 | struct soc_camera_device *icd = client->dev.platform_data; | ||
1039 | struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); | ||
1040 | struct soc_camera_link *icl; | ||
1041 | int ret; | ||
1042 | |||
1043 | if (!icd) { | ||
1044 | dev_err(&client->dev, "mt9m111: soc-camera data missing!\n"); | ||
1045 | return -EINVAL; | ||
1046 | } | ||
1047 | |||
1048 | icl = to_soc_camera_link(icd); | ||
1049 | if (!icl) { | ||
1050 | dev_err(&client->dev, "mt9m111: driver needs platform data\n"); | ||
1051 | return -EINVAL; | ||
1052 | } | ||
1053 | |||
1054 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) { | ||
1055 | dev_warn(&adapter->dev, | ||
1056 | "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n"); | ||
1057 | return -EIO; | ||
1058 | } | ||
1059 | |||
1060 | mt9m111 = kzalloc(sizeof(struct mt9m111), GFP_KERNEL); | ||
1061 | if (!mt9m111) | ||
1062 | return -ENOMEM; | ||
1063 | |||
1064 | v4l2_i2c_subdev_init(&mt9m111->subdev, client, &mt9m111_subdev_ops); | ||
1065 | |||
1066 | /* Second stage probe - when a capture adapter is there */ | ||
1067 | icd->ops = &mt9m111_ops; | ||
1068 | |||
1069 | mt9m111->rect.left = MT9M111_MIN_DARK_COLS; | ||
1070 | mt9m111->rect.top = MT9M111_MIN_DARK_ROWS; | ||
1071 | mt9m111->rect.width = MT9M111_MAX_WIDTH; | ||
1072 | mt9m111->rect.height = MT9M111_MAX_HEIGHT; | ||
1073 | mt9m111->fmt = &mt9m111_colour_fmts[0]; | ||
1074 | |||
1075 | ret = mt9m111_video_probe(icd, client); | ||
1076 | if (ret) { | ||
1077 | icd->ops = NULL; | ||
1078 | kfree(mt9m111); | ||
1079 | } | ||
1080 | |||
1081 | return ret; | ||
1082 | } | ||
1083 | |||
1084 | static int mt9m111_remove(struct i2c_client *client) | ||
1085 | { | ||
1086 | struct mt9m111 *mt9m111 = to_mt9m111(client); | ||
1087 | struct soc_camera_device *icd = client->dev.platform_data; | ||
1088 | |||
1089 | icd->ops = NULL; | ||
1090 | kfree(mt9m111); | ||
1091 | |||
1092 | return 0; | ||
1093 | } | ||
1094 | |||
1095 | static const struct i2c_device_id mt9m111_id[] = { | ||
1096 | { "mt9m111", 0 }, | ||
1097 | { } | ||
1098 | }; | ||
1099 | MODULE_DEVICE_TABLE(i2c, mt9m111_id); | ||
1100 | |||
1101 | static struct i2c_driver mt9m111_i2c_driver = { | ||
1102 | .driver = { | ||
1103 | .name = "mt9m111", | ||
1104 | }, | ||
1105 | .probe = mt9m111_probe, | ||
1106 | .remove = mt9m111_remove, | ||
1107 | .id_table = mt9m111_id, | ||
1108 | }; | ||
1109 | |||
1110 | static int __init mt9m111_mod_init(void) | ||
1111 | { | ||
1112 | return i2c_add_driver(&mt9m111_i2c_driver); | ||
1113 | } | ||
1114 | |||
1115 | static void __exit mt9m111_mod_exit(void) | ||
1116 | { | ||
1117 | i2c_del_driver(&mt9m111_i2c_driver); | ||
1118 | } | ||
1119 | |||
1120 | module_init(mt9m111_mod_init); | ||
1121 | module_exit(mt9m111_mod_exit); | ||
1122 | |||
1123 | MODULE_DESCRIPTION("Micron/Aptina MT9M111/MT9M112/MT9M131 Camera driver"); | ||
1124 | MODULE_AUTHOR("Robert Jarzmik"); | ||
1125 | MODULE_LICENSE("GPL"); | ||