diff options
author | Michael Krufky <mkrufky@linuxtv.org> | 2008-04-22 13:46:23 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@infradead.org> | 2008-04-24 13:07:55 -0400 |
commit | 4efb0ca5d00f2c7a8bf9632556a4b4330cf409c5 (patch) | |
tree | 4ce1c38c66a64c590ef06403e6a38e2be7175772 /drivers/media/dvb/frontends/tda18271-fe.c | |
parent | 40194b2b1bdd01358c1e9b5a9b8dd78390cc05f7 (diff) |
V4L/DVB (7435): tda18271: add function tda18271_charge_pump_source
Force the main pll charge pump or cal pll charge pump to source current
to the main pll loop filter or cal pll loop filter, respectively.
Signed-off-by: Michael Krufky <mkrufky@linuxtv.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Diffstat (limited to 'drivers/media/dvb/frontends/tda18271-fe.c')
-rw-r--r-- | drivers/media/dvb/frontends/tda18271-fe.c | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/drivers/media/dvb/frontends/tda18271-fe.c b/drivers/media/dvb/frontends/tda18271-fe.c index b3b0425dbbe..46905a773e4 100644 --- a/drivers/media/dvb/frontends/tda18271-fe.c +++ b/drivers/media/dvb/frontends/tda18271-fe.c | |||
@@ -119,14 +119,12 @@ static int tda18271_channel_configuration(struct dvb_frontend *fe, | |||
119 | tda18271_write_regs(fe, R_TM, 7); | 119 | tda18271_write_regs(fe, R_TM, 7); |
120 | 120 | ||
121 | /* main pll charge pump source */ | 121 | /* main pll charge pump source */ |
122 | regs[R_EB4] |= 0x20; | 122 | tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 1); |
123 | tda18271_write_regs(fe, R_EB4, 1); | ||
124 | 123 | ||
125 | msleep(1); | 124 | msleep(1); |
126 | 125 | ||
127 | /* normal operation for the main pll */ | 126 | /* normal operation for the main pll */ |
128 | regs[R_EB4] &= ~0x20; | 127 | tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 0); |
129 | tda18271_write_regs(fe, R_EB4, 1); | ||
130 | 128 | ||
131 | msleep(20); | 129 | msleep(20); |
132 | 130 | ||
@@ -285,12 +283,10 @@ static int tda18271_calibrate_rf(struct dvb_frontend *fe, u32 freq) | |||
285 | tda18271_write_regs(fe, R_EB13, 1); | 283 | tda18271_write_regs(fe, R_EB13, 1); |
286 | 284 | ||
287 | /* main pll charge pump source */ | 285 | /* main pll charge pump source */ |
288 | regs[R_EB4] |= 0x20; | 286 | tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 1); |
289 | tda18271_write_regs(fe, R_EB4, 1); | ||
290 | 287 | ||
291 | /* cal pll charge pump source */ | 288 | /* cal pll charge pump source */ |
292 | regs[R_EB7] |= 0x20; | 289 | tda18271_charge_pump_source(fe, TDA18271_CAL_PLL, 1); |
293 | tda18271_write_regs(fe, R_EB7, 1); | ||
294 | 290 | ||
295 | /* force dcdc converter to 0 V */ | 291 | /* force dcdc converter to 0 V */ |
296 | regs[R_EB14] = 0x00; | 292 | regs[R_EB14] = 0x00; |
@@ -328,12 +324,10 @@ static int tda18271_calibrate_rf(struct dvb_frontend *fe, u32 freq) | |||
328 | /* --------------------------------------------------------------- */ | 324 | /* --------------------------------------------------------------- */ |
329 | 325 | ||
330 | /* normal operation for the main pll */ | 326 | /* normal operation for the main pll */ |
331 | regs[R_EB4] &= ~0x20; | 327 | tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 0); |
332 | tda18271_write_regs(fe, R_EB4, 1); | ||
333 | 328 | ||
334 | /* normal operation for the cal pll */ | 329 | /* normal operation for the cal pll */ |
335 | regs[R_EB7] &= ~0x20; | 330 | tda18271_charge_pump_source(fe, TDA18271_CAL_PLL, 0); |
336 | tda18271_write_regs(fe, R_EB7, 1); | ||
337 | 331 | ||
338 | msleep(10); /* plls locking */ | 332 | msleep(10); /* plls locking */ |
339 | 333 | ||