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authorMichael Krufky <mkrufky@linuxtv.org>2008-01-01 20:52:09 -0500
committerMauro Carvalho Chehab <mchehab@infradead.org>2008-01-25 16:04:35 -0500
commit255b5113b4ed683898a24e381155c081f03411f7 (patch)
tree7deff2cb03c7d7c4209f4a826d8bda96e0a8447a /drivers/media/dvb/frontends/tda18271-fe.c
parentdec9ccceef9bfd5f3cccc79e90b09f6c31ed3279 (diff)
V4L/DVB (6960): tda18271: add support for NXP TDA18271HD/C2
Tested successfully with QAM256 digital cable. Analog television is limping, needs more work. Signed-off-by: Michael Krufky <mkrufky@linuxtv.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Diffstat (limited to 'drivers/media/dvb/frontends/tda18271-fe.c')
-rw-r--r--drivers/media/dvb/frontends/tda18271-fe.c885
1 files changed, 793 insertions, 92 deletions
diff --git a/drivers/media/dvb/frontends/tda18271-fe.c b/drivers/media/dvb/frontends/tda18271-fe.c
index 2c873ae6e8c..4b53baf12ef 100644
--- a/drivers/media/dvb/frontends/tda18271-fe.c
+++ b/drivers/media/dvb/frontends/tda18271-fe.c
@@ -71,7 +71,7 @@ static int tda18271_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
71 71
72/*---------------------------------------------------------------------*/ 72/*---------------------------------------------------------------------*/
73 73
74static void tda18271_dump_regs(struct dvb_frontend *fe) 74static void tda18271_dump_regs(struct dvb_frontend *fe, int extended)
75{ 75{
76 struct tda18271_priv *priv = fe->tuner_priv; 76 struct tda18271_priv *priv = fe->tuner_priv;
77 unsigned char *regs = priv->tda18271_regs; 77 unsigned char *regs = priv->tda18271_regs;
@@ -93,6 +93,37 @@ static void tda18271_dump_regs(struct dvb_frontend *fe)
93 tda_reg("MAIN_DIV_BYTE_1 = 0x%02x\n", 0xff & regs[R_MD1]); 93 tda_reg("MAIN_DIV_BYTE_1 = 0x%02x\n", 0xff & regs[R_MD1]);
94 tda_reg("MAIN_DIV_BYTE_2 = 0x%02x\n", 0xff & regs[R_MD2]); 94 tda_reg("MAIN_DIV_BYTE_2 = 0x%02x\n", 0xff & regs[R_MD2]);
95 tda_reg("MAIN_DIV_BYTE_3 = 0x%02x\n", 0xff & regs[R_MD3]); 95 tda_reg("MAIN_DIV_BYTE_3 = 0x%02x\n", 0xff & regs[R_MD3]);
96
97 /* only dump extended regs if DBG_ADV is set */
98 if (!(tda18271_debug & DBG_ADV))
99 return;
100
101 /* W indicates write-only registers.
102 * Register dump for write-only registers shows last value written. */
103
104 tda_reg("EXTENDED_BYTE_1 = 0x%02x\n", 0xff & regs[R_EB1]);
105 tda_reg("EXTENDED_BYTE_2 = 0x%02x\n", 0xff & regs[R_EB2]);
106 tda_reg("EXTENDED_BYTE_3 = 0x%02x\n", 0xff & regs[R_EB3]);
107 tda_reg("EXTENDED_BYTE_4 = 0x%02x\n", 0xff & regs[R_EB4]);
108 tda_reg("EXTENDED_BYTE_5 = 0x%02x\n", 0xff & regs[R_EB5]);
109 tda_reg("EXTENDED_BYTE_6 = 0x%02x\n", 0xff & regs[R_EB6]);
110 tda_reg("EXTENDED_BYTE_7 = 0x%02x\n", 0xff & regs[R_EB7]);
111 tda_reg("EXTENDED_BYTE_8 = 0x%02x\n", 0xff & regs[R_EB8]);
112 tda_reg("EXTENDED_BYTE_9 W = 0x%02x\n", 0xff & regs[R_EB9]);
113 tda_reg("EXTENDED_BYTE_10 = 0x%02x\n", 0xff & regs[R_EB10]);
114 tda_reg("EXTENDED_BYTE_11 = 0x%02x\n", 0xff & regs[R_EB11]);
115 tda_reg("EXTENDED_BYTE_12 = 0x%02x\n", 0xff & regs[R_EB12]);
116 tda_reg("EXTENDED_BYTE_13 = 0x%02x\n", 0xff & regs[R_EB13]);
117 tda_reg("EXTENDED_BYTE_14 = 0x%02x\n", 0xff & regs[R_EB14]);
118 tda_reg("EXTENDED_BYTE_15 = 0x%02x\n", 0xff & regs[R_EB15]);
119 tda_reg("EXTENDED_BYTE_16 W = 0x%02x\n", 0xff & regs[R_EB16]);
120 tda_reg("EXTENDED_BYTE_17 W = 0x%02x\n", 0xff & regs[R_EB17]);
121 tda_reg("EXTENDED_BYTE_18 = 0x%02x\n", 0xff & regs[R_EB18]);
122 tda_reg("EXTENDED_BYTE_19 W = 0x%02x\n", 0xff & regs[R_EB19]);
123 tda_reg("EXTENDED_BYTE_20 W = 0x%02x\n", 0xff & regs[R_EB20]);
124 tda_reg("EXTENDED_BYTE_21 = 0x%02x\n", 0xff & regs[R_EB21]);
125 tda_reg("EXTENDED_BYTE_22 = 0x%02x\n", 0xff & regs[R_EB22]);
126 tda_reg("EXTENDED_BYTE_23 = 0x%02x\n", 0xff & regs[R_EB23]);
96} 127}
97 128
98static void tda18271_read_regs(struct dvb_frontend *fe) 129static void tda18271_read_regs(struct dvb_frontend *fe)
@@ -119,7 +150,45 @@ static void tda18271_read_regs(struct dvb_frontend *fe)
119 tda_err("ERROR: i2c_transfer returned: %d\n", ret); 150 tda_err("ERROR: i2c_transfer returned: %d\n", ret);
120 151
121 if (tda18271_debug & DBG_REG) 152 if (tda18271_debug & DBG_REG)
122 tda18271_dump_regs(fe); 153 tda18271_dump_regs(fe, 0);
154}
155
156static void tda18271_read_extended(struct dvb_frontend *fe)
157{
158 struct tda18271_priv *priv = fe->tuner_priv;
159 unsigned char *regs = priv->tda18271_regs;
160 unsigned char regdump[TDA18271_NUM_REGS];
161 unsigned char buf = 0x00;
162 int ret, i;
163 struct i2c_msg msg[] = {
164 { .addr = priv->i2c_addr, .flags = 0,
165 .buf = &buf, .len = 1 },
166 { .addr = priv->i2c_addr, .flags = I2C_M_RD,
167 .buf = regdump, .len = TDA18271_NUM_REGS }
168 };
169
170 tda18271_i2c_gate_ctrl(fe, 1);
171
172 /* read all registers */
173 ret = i2c_transfer(priv->i2c_adap, msg, 2);
174
175 tda18271_i2c_gate_ctrl(fe, 0);
176
177 if (ret != 2)
178 tda_err("ERROR: i2c_transfer returned: %d\n", ret);
179
180 for (i = 0; i <= TDA18271_NUM_REGS; i++) {
181 /* don't update write-only registers */
182 if ((i != R_EB9) &&
183 (i != R_EB16) &&
184 (i != R_EB17) &&
185 (i != R_EB19) &&
186 (i != R_EB20))
187 regs[i] = regdump[i];
188 }
189
190 if (tda18271_debug & DBG_REG)
191 tda18271_dump_regs(fe, 1);
123} 192}
124 193
125static void tda18271_write_regs(struct dvb_frontend *fe, int idx, int len) 194static void tda18271_write_regs(struct dvb_frontend *fe, int idx, int len)
@@ -160,7 +229,15 @@ static int tda18271_init_regs(struct dvb_frontend *fe)
160 i2c_adapter_id(priv->i2c_adap), priv->i2c_addr); 229 i2c_adapter_id(priv->i2c_adap), priv->i2c_addr);
161 230
162 /* initialize registers */ 231 /* initialize registers */
163 regs[R_ID] = 0x83; 232 switch (priv->id) {
233 case TDA18271HDC1:
234 regs[R_ID] = 0x83;
235 break;
236 case TDA18271HDC2:
237 regs[R_ID] = 0x84;
238 break;
239 };
240
164 regs[R_TM] = 0x08; 241 regs[R_TM] = 0x08;
165 regs[R_PL] = 0x80; 242 regs[R_PL] = 0x80;
166 regs[R_EP1] = 0xc6; 243 regs[R_EP1] = 0xc6;
@@ -176,7 +253,16 @@ static int tda18271_init_regs(struct dvb_frontend *fe)
176 regs[R_MD1] = 0x00; 253 regs[R_MD1] = 0x00;
177 regs[R_MD2] = 0x00; 254 regs[R_MD2] = 0x00;
178 regs[R_MD3] = 0x00; 255 regs[R_MD3] = 0x00;
179 regs[R_EB1] = 0xff; 256
257 switch (priv->id) {
258 case TDA18271HDC1:
259 regs[R_EB1] = 0xff;
260 break;
261 case TDA18271HDC2:
262 regs[R_EB1] = 0xfc;
263 break;
264 };
265
180 regs[R_EB2] = 0x01; 266 regs[R_EB2] = 0x01;
181 regs[R_EB3] = 0x84; 267 regs[R_EB3] = 0x84;
182 regs[R_EB4] = 0x41; 268 regs[R_EB4] = 0x41;
@@ -187,21 +273,49 @@ static int tda18271_init_regs(struct dvb_frontend *fe)
187 regs[R_EB9] = 0x00; 273 regs[R_EB9] = 0x00;
188 regs[R_EB10] = 0x00; 274 regs[R_EB10] = 0x00;
189 regs[R_EB11] = 0x96; 275 regs[R_EB11] = 0x96;
190 regs[R_EB12] = 0x0f; 276
277 switch (priv->id) {
278 case TDA18271HDC1:
279 regs[R_EB12] = 0x0f;
280 break;
281 case TDA18271HDC2:
282 regs[R_EB12] = 0x33;
283 break;
284 };
285
191 regs[R_EB13] = 0xc1; 286 regs[R_EB13] = 0xc1;
192 regs[R_EB14] = 0x00; 287 regs[R_EB14] = 0x00;
193 regs[R_EB15] = 0x8f; 288 regs[R_EB15] = 0x8f;
194 regs[R_EB16] = 0x00; 289 regs[R_EB16] = 0x00;
195 regs[R_EB17] = 0x00; 290 regs[R_EB17] = 0x00;
196 regs[R_EB18] = 0x00; 291
292 switch (priv->id) {
293 case TDA18271HDC1:
294 regs[R_EB18] = 0x00;
295 break;
296 case TDA18271HDC2:
297 regs[R_EB18] = 0x8c;
298 break;
299 };
300
197 regs[R_EB19] = 0x00; 301 regs[R_EB19] = 0x00;
198 regs[R_EB20] = 0x20; 302 regs[R_EB20] = 0x20;
199 regs[R_EB21] = 0x33; 303
304 switch (priv->id) {
305 case TDA18271HDC1:
306 regs[R_EB21] = 0x33;
307 break;
308 case TDA18271HDC2:
309 regs[R_EB21] = 0xb3;
310 break;
311 };
312
200 regs[R_EB22] = 0x48; 313 regs[R_EB22] = 0x48;
201 regs[R_EB23] = 0xb0; 314 regs[R_EB23] = 0xb0;
202 315
203 tda18271_write_regs(fe, 0x00, TDA18271_NUM_REGS); 316 tda18271_write_regs(fe, 0x00, TDA18271_NUM_REGS);
204 /* setup AGC1 & AGC2 */ 317
318 /* setup agc1 gain */
205 regs[R_EB17] = 0x00; 319 regs[R_EB17] = 0x00;
206 tda18271_write_regs(fe, R_EB17, 1); 320 tda18271_write_regs(fe, R_EB17, 1);
207 regs[R_EB17] = 0x03; 321 regs[R_EB17] = 0x03;
@@ -211,14 +325,17 @@ static int tda18271_init_regs(struct dvb_frontend *fe)
211 regs[R_EB17] = 0x4c; 325 regs[R_EB17] = 0x4c;
212 tda18271_write_regs(fe, R_EB17, 1); 326 tda18271_write_regs(fe, R_EB17, 1);
213 327
214 regs[R_EB20] = 0xa0; 328 /* setup agc2 gain */
215 tda18271_write_regs(fe, R_EB20, 1); 329 if ((priv->id) == TDA18271HDC1) {
216 regs[R_EB20] = 0xa7; 330 regs[R_EB20] = 0xa0;
217 tda18271_write_regs(fe, R_EB20, 1); 331 tda18271_write_regs(fe, R_EB20, 1);
218 regs[R_EB20] = 0xe7; 332 regs[R_EB20] = 0xa7;
219 tda18271_write_regs(fe, R_EB20, 1); 333 tda18271_write_regs(fe, R_EB20, 1);
220 regs[R_EB20] = 0xec; 334 regs[R_EB20] = 0xe7;
221 tda18271_write_regs(fe, R_EB20, 1); 335 tda18271_write_regs(fe, R_EB20, 1);
336 regs[R_EB20] = 0xec;
337 tda18271_write_regs(fe, R_EB20, 1);
338 }
222 339
223 /* image rejection calibration */ 340 /* image rejection calibration */
224 341
@@ -235,103 +352,102 @@ static int tda18271_init_regs(struct dvb_frontend *fe)
235 regs[R_MD2] = 0x08; 352 regs[R_MD2] = 0x08;
236 regs[R_MD3] = 0x00; 353 regs[R_MD3] = 0x00;
237 354
238 tda18271_write_regs(fe, R_EP3, 11); 355 switch (priv->id) {
356 case TDA18271HDC1:
357 tda18271_write_regs(fe, R_EP3, 11);
358 break;
359 case TDA18271HDC2:
360 tda18271_write_regs(fe, R_EP3, 12);
361 break;
362 };
363
364 if ((priv->id) == TDA18271HDC2) {
365 /* main pll cp source on */
366 regs[R_EB4] = 0x61;
367 tda18271_write_regs(fe, R_EB4, 1);
368 msleep(1);
369
370 /* main pll cp source off */
371 regs[R_EB4] = 0x41;
372 tda18271_write_regs(fe, R_EB4, 1);
373 }
374
239 msleep(5); /* pll locking */ 375 msleep(5); /* pll locking */
240 376
241 regs[R_EP1] = 0xc6; 377 /* launch detector */
242 tda18271_write_regs(fe, R_EP1, 1); 378 tda18271_write_regs(fe, R_EP1, 1);
243 msleep(5); /* wanted low measurement */ 379 msleep(5); /* wanted low measurement */
244 380
245 regs[R_EP3] = 0x1f;
246 regs[R_EP4] = 0x66;
247 regs[R_EP5] = 0x85; 381 regs[R_EP5] = 0x85;
248 regs[R_CPD] = 0xcb; 382 regs[R_CPD] = 0xcb;
249 regs[R_CD1] = 0x66; 383 regs[R_CD1] = 0x66;
250 regs[R_CD2] = 0x70; 384 regs[R_CD2] = 0x70;
251 regs[R_CD3] = 0x00;
252 385
253 tda18271_write_regs(fe, R_EP3, 7); 386 tda18271_write_regs(fe, R_EP3, 7);
254 msleep(5); /* pll locking */ 387 msleep(5); /* pll locking */
255 388
256 regs[R_EP2] = 0xdf; 389 /* launch optimization algorithm */
257 tda18271_write_regs(fe, R_EP2, 1); 390 tda18271_write_regs(fe, R_EP2, 1);
258 msleep(30); /* image low optimization completion */ 391 msleep(30); /* image low optimization completion */
259 392
260 /* mid-band */ 393 /* mid-band */
261 regs[R_EP3] = 0x1f;
262 regs[R_EP4] = 0x66;
263 regs[R_EP5] = 0x82; 394 regs[R_EP5] = 0x82;
264 regs[R_CPD] = 0xa8; 395 regs[R_CPD] = 0xa8;
265 regs[R_CD1] = 0x66;
266 regs[R_CD2] = 0x00; 396 regs[R_CD2] = 0x00;
267 regs[R_CD3] = 0x00;
268 regs[R_MPD] = 0xa9; 397 regs[R_MPD] = 0xa9;
269 regs[R_MD1] = 0x73; 398 regs[R_MD1] = 0x73;
270 regs[R_MD2] = 0x1a; 399 regs[R_MD2] = 0x1a;
271 regs[R_MD3] = 0x00;
272 400
273 tda18271_write_regs(fe, R_EP3, 11); 401 tda18271_write_regs(fe, R_EP3, 11);
274 msleep(5); /* pll locking */ 402 msleep(5); /* pll locking */
275 403
276 regs[R_EP1] = 0xc6;
277 tda18271_write_regs(fe, R_EP1, 1); 404 tda18271_write_regs(fe, R_EP1, 1);
278 msleep(5); /* wanted mid measurement */ 405 msleep(5); /* wanted mid measurement */
279 406
280 regs[R_EP3] = 0x1f;
281 regs[R_EP4] = 0x66;
282 regs[R_EP5] = 0x86; 407 regs[R_EP5] = 0x86;
283 regs[R_CPD] = 0xa8; 408 regs[R_CPD] = 0xa8;
284 regs[R_CD1] = 0x66; 409 regs[R_CD1] = 0x66;
285 regs[R_CD2] = 0xa0; 410 regs[R_CD2] = 0xa0;
286 regs[R_CD3] = 0x00;
287 411
288 tda18271_write_regs(fe, R_EP3, 7); 412 tda18271_write_regs(fe, R_EP3, 7);
289 msleep(5); /* pll locking */ 413 msleep(5); /* pll locking */
290 414
291 regs[R_EP2] = 0xdf; 415 /* launch optimization algorithm */
292 tda18271_write_regs(fe, R_EP2, 1); 416 tda18271_write_regs(fe, R_EP2, 1);
293 msleep(30); /* image mid optimization completion */ 417 msleep(30); /* image mid optimization completion */
294 418
295 /* high-band */ 419 /* high-band */
296 regs[R_EP3] = 0x1f;
297 regs[R_EP4] = 0x66;
298 regs[R_EP5] = 0x83; 420 regs[R_EP5] = 0x83;
299 regs[R_CPD] = 0x98; 421 regs[R_CPD] = 0x98;
300 regs[R_CD1] = 0x65; 422 regs[R_CD1] = 0x65;
301 regs[R_CD2] = 0x00; 423 regs[R_CD2] = 0x00;
302 regs[R_CD3] = 0x00;
303 regs[R_MPD] = 0x99; 424 regs[R_MPD] = 0x99;
304 regs[R_MD1] = 0x71; 425 regs[R_MD1] = 0x71;
305 regs[R_MD2] = 0xcd; 426 regs[R_MD2] = 0xcd;
306 regs[R_MD3] = 0x00;
307 427
308 tda18271_write_regs(fe, R_EP3, 11); 428 tda18271_write_regs(fe, R_EP3, 11);
309 msleep(5); /* pll locking */ 429 msleep(5); /* pll locking */
310 430
311 regs[R_EP1] = 0xc6; 431 /* launch detector */
312 tda18271_write_regs(fe, R_EP1, 1); 432 tda18271_write_regs(fe, R_EP1, 1);
313 msleep(5); /* wanted high measurement */ 433 msleep(5); /* wanted high measurement */
314 434
315 regs[R_EP3] = 0x1f;
316 regs[R_EP4] = 0x66;
317 regs[R_EP5] = 0x87; 435 regs[R_EP5] = 0x87;
318 regs[R_CPD] = 0x98;
319 regs[R_CD1] = 0x65; 436 regs[R_CD1] = 0x65;
320 regs[R_CD2] = 0x50; 437 regs[R_CD2] = 0x50;
321 regs[R_CD3] = 0x00;
322 438
323 tda18271_write_regs(fe, R_EP3, 7); 439 tda18271_write_regs(fe, R_EP3, 7);
324 msleep(5); /* pll locking */ 440 msleep(5); /* pll locking */
325 441
326 regs[R_EP2] = 0xdf; 442 /* launch optimization algorithm */
327
328 tda18271_write_regs(fe, R_EP2, 1); 443 tda18271_write_regs(fe, R_EP2, 1);
329 msleep(30); /* image high optimization completion */ 444 msleep(30); /* image high optimization completion */
330 445
446 /* return to normal mode */
331 regs[R_EP4] = 0x64; 447 regs[R_EP4] = 0x64;
332 tda18271_write_regs(fe, R_EP4, 1); 448 tda18271_write_regs(fe, R_EP4, 1);
333 449
334 regs[R_EP1] = 0xc6; 450 /* synchronize */
335 tda18271_write_regs(fe, R_EP1, 1); 451 tda18271_write_regs(fe, R_EP1, 1);
336 452
337 return 0; 453 return 0;
@@ -359,7 +475,7 @@ static int tda18271_calc_main_pll(struct dvb_frontend *fe, u32 freq)
359 u8 d, pd; 475 u8 d, pd;
360 u32 div; 476 u32 div;
361 477
362 int ret = tda18271_lookup_pll_map(MAIN_PLL, &freq, &pd, &d); 478 int ret = tda18271_lookup_pll_map(fe, MAIN_PLL, &freq, &pd, &d);
363 if (ret < 0) 479 if (ret < 0)
364 goto fail; 480 goto fail;
365 481
@@ -391,7 +507,7 @@ static int tda18271_calc_cal_pll(struct dvb_frontend *fe, u32 freq)
391 u8 d, pd; 507 u8 d, pd;
392 u32 div; 508 u32 div;
393 509
394 int ret = tda18271_lookup_pll_map(CAL_PLL, &freq, &pd, &d); 510 int ret = tda18271_lookup_pll_map(fe, CAL_PLL, &freq, &pd, &d);
395 if (ret < 0) 511 if (ret < 0)
396 goto fail; 512 goto fail;
397 513
@@ -413,7 +529,7 @@ static int tda18271_calc_bp_filter(struct dvb_frontend *fe, u32 *freq)
413 unsigned char *regs = priv->tda18271_regs; 529 unsigned char *regs = priv->tda18271_regs;
414 u8 val; 530 u8 val;
415 531
416 int ret = tda18271_lookup_map(BP_FILTER, freq, &val); 532 int ret = tda18271_lookup_map(fe, BP_FILTER, freq, &val);
417 if (ret < 0) 533 if (ret < 0)
418 goto fail; 534 goto fail;
419 535
@@ -430,7 +546,7 @@ static int tda18271_calc_km(struct dvb_frontend *fe, u32 *freq)
430 unsigned char *regs = priv->tda18271_regs; 546 unsigned char *regs = priv->tda18271_regs;
431 u8 val; 547 u8 val;
432 548
433 int ret = tda18271_lookup_map(RF_CAL_KMCO, freq, &val); 549 int ret = tda18271_lookup_map(fe, RF_CAL_KMCO, freq, &val);
434 if (ret < 0) 550 if (ret < 0)
435 goto fail; 551 goto fail;
436 552
@@ -447,7 +563,7 @@ static int tda18271_calc_rf_band(struct dvb_frontend *fe, u32 *freq)
447 unsigned char *regs = priv->tda18271_regs; 563 unsigned char *regs = priv->tda18271_regs;
448 u8 val; 564 u8 val;
449 565
450 int ret = tda18271_lookup_map(RF_BAND, freq, &val); 566 int ret = tda18271_lookup_map(fe, RF_BAND, freq, &val);
451 if (ret < 0) 567 if (ret < 0)
452 goto fail; 568 goto fail;
453 569
@@ -464,7 +580,7 @@ static int tda18271_calc_gain_taper(struct dvb_frontend *fe, u32 *freq)
464 unsigned char *regs = priv->tda18271_regs; 580 unsigned char *regs = priv->tda18271_regs;
465 u8 val; 581 u8 val;
466 582
467 int ret = tda18271_lookup_map(GAIN_TAPER, freq, &val); 583 int ret = tda18271_lookup_map(fe, GAIN_TAPER, freq, &val);
468 if (ret < 0) 584 if (ret < 0)
469 goto fail; 585 goto fail;
470 586
@@ -481,7 +597,7 @@ static int tda18271_calc_ir_measure(struct dvb_frontend *fe, u32 *freq)
481 unsigned char *regs = priv->tda18271_regs; 597 unsigned char *regs = priv->tda18271_regs;
482 u8 val; 598 u8 val;
483 599
484 int ret = tda18271_lookup_map(IR_MEASURE, freq, &val); 600 int ret = tda18271_lookup_map(fe, IR_MEASURE, freq, &val);
485 if (ret < 0) 601 if (ret < 0)
486 goto fail; 602 goto fail;
487 603
@@ -498,7 +614,7 @@ static int tda18271_calc_rf_cal(struct dvb_frontend *fe, u32 *freq)
498 unsigned char *regs = priv->tda18271_regs; 614 unsigned char *regs = priv->tda18271_regs;
499 u8 val; 615 u8 val;
500 616
501 int ret = tda18271_lookup_map(RF_CAL, freq, &val); 617 int ret = tda18271_lookup_map(fe, RF_CAL, freq, &val);
502 if (ret < 0) 618 if (ret < 0)
503 goto fail; 619 goto fail;
504 620
@@ -507,8 +623,581 @@ fail:
507 return ret; 623 return ret;
508} 624}
509 625
510static int tda18271_tune(struct dvb_frontend *fe, 626/* ------------------------------------------------------------------ */
511 u32 ifc, u32 freq, u32 bw, u8 std) 627
628static int tda18271_channel_configuration(struct dvb_frontend *fe,
629 u32 ifc, u32 freq, u32 bw, u8 std)
630{
631 struct tda18271_priv *priv = fe->tuner_priv;
632 unsigned char *regs = priv->tda18271_regs;
633 u32 N;
634
635 /* update TV broadcast parameters */
636
637 /* set standard */
638 regs[R_EP3] &= ~0x1f; /* clear std bits */
639 regs[R_EP3] |= std;
640
641 /* set cal mode to normal */
642 regs[R_EP4] &= ~0x03;
643
644 /* update IF output level & IF notch frequency */
645 regs[R_EP4] &= ~0x1c; /* clear if level bits */
646
647 switch (priv->mode) {
648 case TDA18271_ANALOG:
649 regs[R_MPD] &= ~0x80; /* IF notch = 0 */
650 break;
651 case TDA18271_DIGITAL:
652 regs[R_EP4] |= 0x04; /* IF level = 1 */
653 regs[R_MPD] |= 0x80; /* IF notch = 1 */
654 break;
655 }
656 regs[R_EP4] &= ~0x80; /* FM_RFn: turn this bit on only for fm radio */
657
658 /* update RF_TOP / IF_TOP */
659 switch (priv->mode) {
660 case TDA18271_ANALOG:
661 regs[R_EB22] = 0x2c;
662 break;
663 case TDA18271_DIGITAL:
664 regs[R_EB22] = 0x37;
665 break;
666 }
667 tda18271_write_regs(fe, R_EB22, 1);
668
669 /* --------------------------------------------------------------- */
670
671 /* disable Power Level Indicator */
672 regs[R_EP1] |= 0x40;
673
674 /* frequency dependent parameters */
675
676 tda18271_calc_ir_measure(fe, &freq);
677
678 tda18271_calc_bp_filter(fe, &freq);
679
680 tda18271_calc_rf_band(fe, &freq);
681
682 tda18271_calc_gain_taper(fe, &freq);
683
684 /* --------------------------------------------------------------- */
685
686 /* dual tuner and agc1 extra configuration */
687
688 /* main vco when Master, cal vco when slave */
689 regs[R_EB1] |= 0x04; /* FIXME: assumes master */
690
691 /* agc1 always active */
692 regs[R_EB1] &= ~0x02;
693
694 /* agc1 has priority on agc2 */
695 regs[R_EB1] &= ~0x01;
696
697 tda18271_write_regs(fe, R_EB1, 1);
698
699 /* --------------------------------------------------------------- */
700
701 N = freq + ifc;
702
703 /* FIXME: assumes master */
704 tda18271_calc_main_pll(fe, N);
705 tda18271_write_regs(fe, R_MPD, 4);
706
707 tda18271_write_regs(fe, R_TM, 7);
708
709 /* main pll charge pump source */
710 regs[R_EB4] |= 0x20;
711 tda18271_write_regs(fe, R_EB4, 1);
712
713 msleep(1);
714
715 /* normal operation for the main pll */
716 regs[R_EB4] &= ~0x20;
717 tda18271_write_regs(fe, R_EB4, 1);
718
719 msleep(5);
720
721 return 0;
722}
723
724static int tda18271_read_thermometer(struct dvb_frontend *fe)
725{
726 struct tda18271_priv *priv = fe->tuner_priv;
727 unsigned char *regs = priv->tda18271_regs;
728 int tm;
729
730 /* switch thermometer on */
731 regs[R_TM] |= 0x10;
732 tda18271_write_regs(fe, R_TM, 1);
733
734 /* read thermometer info */
735 tda18271_read_regs(fe);
736
737 if ((((regs[R_TM] & 0x0f) == 0x00) && ((regs[R_TM] & 0x20) == 0x20)) ||
738 (((regs[R_TM] & 0x0f) == 0x08) && ((regs[R_TM] & 0x20) == 0x00))) {
739
740 if ((regs[R_TM] & 0x20) == 0x20)
741 regs[R_TM] &= ~0x20;
742 else
743 regs[R_TM] |= 0x20;
744
745 tda18271_write_regs(fe, R_TM, 1);
746
747 msleep(10); /* temperature sensing */
748
749 /* read thermometer info */
750 tda18271_read_regs(fe);
751 }
752
753 tm = tda18271_lookup_thermometer(fe);
754
755 /* switch thermometer off */
756 regs[R_TM] &= ~0x10;
757 tda18271_write_regs(fe, R_TM, 1);
758
759 /* set CAL mode to normal */
760 regs[R_EP4] &= ~0x03;
761 tda18271_write_regs(fe, R_EP4, 1);
762
763 return tm;
764}
765
766static int tda18271_rf_tracking_filters_correction(struct dvb_frontend *fe,
767 u32 freq, int tm_rfcal)
768{
769 struct tda18271_priv *priv = fe->tuner_priv;
770 struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
771 unsigned char *regs = priv->tda18271_regs;
772 int tm_current, rfcal_comp, approx, i;
773 u8 dc_over_dt, rf_tab;
774
775 /* power up */
776 regs[R_EP3] &= ~0xe0; /* sm = 0, sm_lt = 0, sm_xt = 0 */
777 tda18271_write_regs(fe, R_EP3, 1);
778
779 /* read die current temperature */
780 tm_current = tda18271_read_thermometer(fe);
781
782 /* frequency dependent parameters */
783
784 tda18271_calc_rf_cal(fe, &freq);
785 rf_tab = regs[R_EB14];
786
787 i = tda18271_lookup_rf_band(fe, &freq, NULL);
788 if (i < 0)
789 return -EINVAL;
790
791 if ((0 == map[i].rf3) || (freq / 1000 < map[i].rf2)) {
792 approx = map[i].rf_a1 *
793 (freq / 1000 - map[i].rf1) + map[i].rf_b1 + rf_tab;
794 } else {
795 approx = map[i].rf_a2 *
796 (freq / 1000 - map[i].rf2) + map[i].rf_b2 + rf_tab;
797 }
798
799 if (approx < 0)
800 approx = 0;
801 if (approx > 255)
802 approx = 255;
803
804 tda18271_lookup_map(fe, RF_CAL_DC_OVER_DT, &freq, &dc_over_dt);
805
806 /* calculate temperature compensation */
807 rfcal_comp = dc_over_dt * (tm_current - tm_rfcal);
808
809 regs[R_EB14] = approx + rfcal_comp;
810 tda18271_write_regs(fe, R_EB14, 1);
811
812 return 0;
813}
814
815static int tda18271_por(struct dvb_frontend *fe)
816{
817 struct tda18271_priv *priv = fe->tuner_priv;
818 unsigned char *regs = priv->tda18271_regs;
819
820 /* power up detector 1 */
821 regs[R_EB12] &= ~0x20;
822 tda18271_write_regs(fe, R_EB12, 1);
823
824 regs[R_EB18] &= ~0x80; /* turn agc1 loop on */
825 regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
826 tda18271_write_regs(fe, R_EB18, 1);
827
828 regs[R_EB21] |= 0x03; /* set agc2_gain to -6 dB */
829
830 /* POR mode */
831 regs[R_EP3] &= ~0xe0; /* clear sm, sm_lt, sm_xt */
832 regs[R_EP3] |= 0x80; /* sm = 1, sm_lt = 0, sm_xt = 0 */
833 tda18271_write_regs(fe, R_EP3, 1);
834
835 /* disable 1.5 MHz low pass filter */
836 regs[R_EB23] &= ~0x04; /* forcelp_fc2_en = 0 */
837 regs[R_EB23] &= ~0x02; /* XXX: lp_fc[2] = 0 */
838 tda18271_write_regs(fe, R_EB21, 3);
839
840 return 0;
841}
842
843static int tda18271_calibrate_rf(struct dvb_frontend *fe, u32 freq)
844{
845 struct tda18271_priv *priv = fe->tuner_priv;
846 unsigned char *regs = priv->tda18271_regs;
847 u32 N;
848
849 /* set CAL mode to normal */
850 regs[R_EP4] &= ~0x03;
851 tda18271_write_regs(fe, R_EP4, 1);
852
853 /* switch off agc1 */
854 regs[R_EP3] |= 0x40; /* sm_lt = 1 */
855
856 regs[R_EB18] |= 0x03; /* set agc1_gain to 15 dB */
857 tda18271_write_regs(fe, R_EB18, 1);
858
859 /* frequency dependent parameters */
860
861 tda18271_calc_bp_filter(fe, &freq);
862 tda18271_calc_gain_taper(fe, &freq);
863 tda18271_calc_rf_band(fe, &freq);
864 tda18271_calc_km(fe, &freq);
865
866 tda18271_write_regs(fe, R_EP1, 3);
867 tda18271_write_regs(fe, R_EB13, 1);
868
869 /* main pll charge pump source */
870 regs[R_EB4] |= 0x20;
871 tda18271_write_regs(fe, R_EB4, 1);
872
873 /* cal pll charge pump source */
874 regs[R_EB7] |= 0x20;
875 tda18271_write_regs(fe, R_EB7, 1);
876
877 /* force dcdc converter to 0 V */
878 regs[R_EB14] = 0x00;
879 tda18271_write_regs(fe, R_EB14, 1);
880
881 /* disable plls lock */
882 regs[R_EB20] &= ~0x20;
883 tda18271_write_regs(fe, R_EB20, 1);
884
885 /* set CAL mode to RF tracking filter calibration */
886 regs[R_EP4] |= 0x03;
887 tda18271_write_regs(fe, R_EP4, 2);
888
889 /* --------------------------------------------------------------- */
890
891 /* set the internal calibration signal */
892 N = freq;
893
894 tda18271_calc_main_pll(fe, N);
895 tda18271_write_regs(fe, R_MPD, 4);
896
897 /* downconvert internal calibration */
898 N += 1000000;
899
900 tda18271_calc_main_pll(fe, N);
901 tda18271_write_regs(fe, R_MPD, 4);
902
903 msleep(5);
904
905 tda18271_write_regs(fe, R_EP2, 1);
906 tda18271_write_regs(fe, R_EP1, 1);
907 tda18271_write_regs(fe, R_EP2, 1);
908 tda18271_write_regs(fe, R_EP1, 1);
909
910 /* --------------------------------------------------------------- */
911
912 /* normal operation for the main pll */
913 regs[R_EB4] &= ~0x20;
914 tda18271_write_regs(fe, R_EB4, 1);
915
916 /* normal operation for the cal pll */
917 regs[R_EB7] &= ~0x20;
918 tda18271_write_regs(fe, R_EB7, 1);
919
920 msleep(5); /* plls locking */
921
922 /* launch the rf tracking filters calibration */
923 regs[R_EB20] |= 0x20;
924 tda18271_write_regs(fe, R_EB20, 1);
925
926 msleep(60); /* calibration */
927
928 /* --------------------------------------------------------------- */
929
930 /* set CAL mode to normal */
931 regs[R_EP4] &= ~0x03;
932
933 /* switch on agc1 */
934 regs[R_EP3] &= ~0x40; /* sm_lt = 0 */
935
936 regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
937 tda18271_write_regs(fe, R_EB18, 1);
938
939 tda18271_write_regs(fe, R_EP3, 2);
940
941 /* synchronization */
942 tda18271_write_regs(fe, R_EP1, 1);
943
944 /* get calibration result */
945 tda18271_read_extended(fe);
946
947 return regs[R_EB14];
948}
949
950static int tda18271_powerscan(struct dvb_frontend *fe,
951 u32 *freq_in, u32 *freq_out)
952{
953 struct tda18271_priv *priv = fe->tuner_priv;
954 unsigned char *regs = priv->tda18271_regs;
955 int sgn, bcal, count, wait;
956 u8 cid_target;
957 u16 count_limit;
958 u32 freq;
959
960 freq = *freq_in;
961
962 tda18271_calc_rf_band(fe, &freq);
963 tda18271_calc_rf_cal(fe, &freq);
964 tda18271_calc_gain_taper(fe, &freq);
965 tda18271_lookup_cid_target(fe, &freq, &cid_target, &count_limit);
966
967 tda18271_write_regs(fe, R_EP2, 1);
968 tda18271_write_regs(fe, R_EB14, 1);
969
970 /* downconvert frequency */
971 freq += 1000000;
972
973 tda18271_calc_main_pll(fe, freq);
974 tda18271_write_regs(fe, R_MPD, 4);
975
976 msleep(5); /* pll locking */
977
978 /* detection mode */
979 regs[R_EP4] &= ~0x03;
980 regs[R_EP4] |= 0x01;
981 tda18271_write_regs(fe, R_EP4, 1);
982
983 /* launch power detection measurement */
984 tda18271_write_regs(fe, R_EP2, 1);
985
986 /* read power detection info, stored in EB10 */
987 tda18271_read_extended(fe);
988
989 /* algorithm initialization */
990 sgn = 1;
991 *freq_out = *freq_in;
992 bcal = 0;
993 count = 0;
994 wait = false;
995
996 while ((regs[R_EB10] & 0x3f) < cid_target) {
997 /* downconvert updated freq to 1 MHz */
998 freq = *freq_in + (sgn * count) + 1000000;
999
1000 tda18271_calc_main_pll(fe, freq);
1001 tda18271_write_regs(fe, R_MPD, 4);
1002
1003 if (wait) {
1004 msleep(5); /* pll locking */
1005 wait = false;
1006 } else
1007 udelay(100); /* pll locking */
1008
1009 /* launch power detection measurement */
1010 tda18271_write_regs(fe, R_EP2, 1);
1011
1012 /* read power detection info, stored in EB10 */
1013 tda18271_read_extended(fe);
1014
1015 count += 200;
1016
1017 if (count < count_limit)
1018 continue;
1019
1020 if (sgn <= 0)
1021 break;
1022
1023 sgn = -1 * sgn;
1024 count = 200;
1025 wait = true;
1026 }
1027
1028 if ((regs[R_EB10] & 0x3f) >= cid_target) {
1029 bcal = 1;
1030 *freq_out = freq - 1000000;
1031 } else
1032 bcal = 0;
1033
1034 tda_dbg("bcal = %d, freq_in = %d, freq_out = %d (freq = %d)\n",
1035 bcal, *freq_in, *freq_out, freq);
1036
1037 return bcal;
1038}
1039
1040static int tda18271_powerscan_init(struct dvb_frontend *fe)
1041{
1042 struct tda18271_priv *priv = fe->tuner_priv;
1043 unsigned char *regs = priv->tda18271_regs;
1044
1045 /* set standard to digital */
1046 regs[R_EP3] &= ~0x1f; /* clear std bits */
1047 regs[R_EP3] |= 0x12;
1048
1049 /* set cal mode to normal */
1050 regs[R_EP4] &= ~0x03;
1051
1052 /* update IF output level & IF notch frequency */
1053 regs[R_EP4] &= ~0x1c; /* clear if level bits */
1054
1055 tda18271_write_regs(fe, R_EP3, 2);
1056
1057 regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
1058 tda18271_write_regs(fe, R_EB18, 1);
1059
1060 regs[R_EB21] &= ~0x03; /* set agc2_gain to -15 dB */
1061
1062 /* 1.5 MHz low pass filter */
1063 regs[R_EB23] |= 0x04; /* forcelp_fc2_en = 1 */
1064 regs[R_EB23] |= 0x02; /* lp_fc[2] = 1 */
1065
1066 tda18271_write_regs(fe, R_EB21, 3);
1067
1068 return 0;
1069}
1070
1071static int tda18271_rf_tracking_filters_init(struct dvb_frontend *fe, u32 freq)
1072{
1073 struct tda18271_priv *priv = fe->tuner_priv;
1074 struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
1075 unsigned char *regs = priv->tda18271_regs;
1076 int bcal, rf, i;
1077#define RF1 0
1078#define RF2 1
1079#define RF3 2
1080 u32 rf_default[3];
1081 u32 rf_freq[3];
1082 u8 prog_cal[3];
1083 u8 prog_tab[3];
1084
1085 i = tda18271_lookup_rf_band(fe, &freq, NULL);
1086
1087 if (i < 0)
1088 return i;
1089
1090 rf_default[RF1] = 1000 * map[i].rf1_def;
1091 rf_default[RF2] = 1000 * map[i].rf2_def;
1092 rf_default[RF3] = 1000 * map[i].rf3_def;
1093
1094 for (rf = RF1; rf <= RF3; rf++) {
1095 if (0 == rf_default[rf])
1096 return 0;
1097 tda_dbg("freq = %d, rf = %d\n", freq, rf);
1098
1099 /* look for optimized calibration frequency */
1100 bcal = tda18271_powerscan(fe, &rf_default[rf], &rf_freq[rf]);
1101
1102 tda18271_calc_rf_cal(fe, &rf_freq[rf]);
1103 prog_tab[rf] = regs[R_EB14];
1104
1105 if (1 == bcal)
1106 prog_cal[rf] = tda18271_calibrate_rf(fe, rf_freq[rf]);
1107 else
1108 prog_cal[rf] = prog_tab[rf];
1109
1110 switch (rf) {
1111 case RF1:
1112 map[i].rf_a1 = 0;
1113 map[i].rf_b1 = prog_cal[RF1] - prog_tab[RF1];
1114 map[i].rf1 = rf_freq[RF1] / 1000;
1115 break;
1116 case RF2:
1117 map[i].rf_a1 = (prog_cal[RF2] - prog_tab[RF2] -
1118 prog_cal[RF1] + prog_tab[RF1]) /
1119 ((rf_freq[RF2] - rf_freq[RF1]) / 1000);
1120 map[i].rf2 = rf_freq[RF2] / 1000;
1121 break;
1122 case RF3:
1123 map[i].rf_a2 = (prog_cal[RF3] - prog_tab[RF3] -
1124 prog_cal[RF2] + prog_tab[RF2]) /
1125 ((rf_freq[RF3] - rf_freq[RF2]) / 1000);
1126 map[i].rf_b2 = prog_cal[RF2] - prog_tab[RF2];
1127 map[i].rf3 = rf_freq[RF3] / 1000;
1128 break;
1129 default:
1130 BUG();
1131 }
1132 }
1133
1134 return 0;
1135}
1136
1137static int tda18271_calc_rf_filter_curve(struct dvb_frontend *fe,
1138 int *tm_rfcal)
1139{
1140 struct tda18271_priv *priv = fe->tuner_priv;
1141 unsigned int i;
1142
1143 tda_info("tda18271: performing RF tracking filter calibration\n");
1144
1145 /* wait for die temperature stabilization */
1146 msleep(200);
1147
1148 tda18271_powerscan_init(fe);
1149
1150 /* rf band calibration */
1151 for (i = 0; priv->rf_cal_state[i].rfmax != 0; i++)
1152 tda18271_rf_tracking_filters_init(fe, 1000 *
1153 priv->rf_cal_state[i].rfmax);
1154
1155 *tm_rfcal = tda18271_read_thermometer(fe);
1156
1157 return 0;
1158}
1159
1160/* ------------------------------------------------------------------ */
1161
1162static int tda18271_init_cal(struct dvb_frontend *fe, int *tm)
1163{
1164 struct tda18271_priv *priv = fe->tuner_priv;
1165
1166 if (priv->cal_initialized)
1167 return 0;
1168
1169 /* initialization */
1170 tda18271_init(fe);
1171
1172 tda18271_calc_rf_filter_curve(fe, tm);
1173
1174 tda18271_por(fe);
1175
1176 priv->cal_initialized = true;
1177
1178 return 0;
1179}
1180
1181static int tda18271c2_tune(struct dvb_frontend *fe,
1182 u32 ifc, u32 freq, u32 bw, u8 std)
1183{
1184 int tm = 0;
1185
1186 tda_dbg("freq = %d, ifc = %d\n", freq, ifc);
1187
1188 tda18271_init_cal(fe, &tm);
1189
1190 tda18271_rf_tracking_filters_correction(fe, freq, tm);
1191
1192 tda18271_channel_configuration(fe, ifc, freq, bw, std);
1193
1194 return 0;
1195}
1196
1197/* ------------------------------------------------------------------ */
1198
1199static int tda18271c1_tune(struct dvb_frontend *fe,
1200 u32 ifc, u32 freq, u32 bw, u8 std)
512{ 1201{
513 struct tda18271_priv *priv = fe->tuner_priv; 1202 struct tda18271_priv *priv = fe->tuner_priv;
514 unsigned char *regs = priv->tda18271_regs; 1203 unsigned char *regs = priv->tda18271_regs;
@@ -520,7 +1209,7 @@ static int tda18271_tune(struct dvb_frontend *fe,
520 1209
521 /* RF tracking filter calibration */ 1210 /* RF tracking filter calibration */
522 1211
523 /* calculate BP_Filter */ 1212 /* calculate bp filter */
524 tda18271_calc_bp_filter(fe, &freq); 1213 tda18271_calc_bp_filter(fe, &freq);
525 tda18271_write_regs(fe, R_EP1, 1); 1214 tda18271_write_regs(fe, R_EP1, 1);
526 1215
@@ -537,10 +1226,10 @@ static int tda18271_tune(struct dvb_frontend *fe,
537 regs[R_EB20] = 0xcc; 1226 regs[R_EB20] = 0xcc;
538 tda18271_write_regs(fe, R_EB20, 1); 1227 tda18271_write_regs(fe, R_EB20, 1);
539 1228
540 /* set CAL mode to RF tracking filter calibration */ 1229 /* set cal mode to RF tracking filter calibration */
541 regs[R_EP4] |= 0x03; 1230 regs[R_EP4] |= 0x03;
542 1231
543 /* calculate CAL PLL */ 1232 /* calculate cal pll */
544 1233
545 switch (priv->mode) { 1234 switch (priv->mode) {
546 case TDA18271_ANALOG: 1235 case TDA18271_ANALOG:
@@ -553,7 +1242,7 @@ static int tda18271_tune(struct dvb_frontend *fe,
553 1242
554 tda18271_calc_cal_pll(fe, N); 1243 tda18271_calc_cal_pll(fe, N);
555 1244
556 /* calculate MAIN PLL */ 1245 /* calculate main pll */
557 1246
558 switch (priv->mode) { 1247 switch (priv->mode) {
559 case TDA18271_ANALOG: 1248 case TDA18271_ANALOG:
@@ -569,14 +1258,14 @@ static int tda18271_tune(struct dvb_frontend *fe,
569 tda18271_write_regs(fe, R_EP3, 11); 1258 tda18271_write_regs(fe, R_EP3, 11);
570 msleep(5); /* RF tracking filter calibration initialization */ 1259 msleep(5); /* RF tracking filter calibration initialization */
571 1260
572 /* search for K,M,CO for RF Calibration */ 1261 /* search for K,M,CO for RF calibration */
573 tda18271_calc_km(fe, &freq); 1262 tda18271_calc_km(fe, &freq);
574 tda18271_write_regs(fe, R_EB13, 1); 1263 tda18271_write_regs(fe, R_EB13, 1);
575 1264
576 /* search for RF_BAND */ 1265 /* search for rf band */
577 tda18271_calc_rf_band(fe, &freq); 1266 tda18271_calc_rf_band(fe, &freq);
578 1267
579 /* search for Gain_Taper */ 1268 /* search for gain taper */
580 tda18271_calc_gain_taper(fe, &freq); 1269 tda18271_calc_gain_taper(fe, &freq);
581 1270
582 tda18271_write_regs(fe, R_EP2, 1); 1271 tda18271_write_regs(fe, R_EP2, 1);
@@ -660,10 +1349,13 @@ static int tda18271_set_params(struct dvb_frontend *fe,
660 struct dvb_frontend_parameters *params) 1349 struct dvb_frontend_parameters *params)
661{ 1350{
662 struct tda18271_priv *priv = fe->tuner_priv; 1351 struct tda18271_priv *priv = fe->tuner_priv;
1352 struct tda18271_std_map *std_map = priv->std;
663 u8 std; 1353 u8 std;
664 u32 bw, sgIF = 0; 1354 u32 bw, sgIF = 0;
665 u32 freq = params->frequency; 1355 u32 freq = params->frequency;
666 1356
1357 BUG_ON(!priv->tune || !priv->std);
1358
667 priv->mode = TDA18271_DIGITAL; 1359 priv->mode = TDA18271_DIGITAL;
668 1360
669 /* see table 22 */ 1361 /* see table 22 */
@@ -671,13 +1363,13 @@ static int tda18271_set_params(struct dvb_frontend *fe,
671 switch (params->u.vsb.modulation) { 1363 switch (params->u.vsb.modulation) {
672 case VSB_8: 1364 case VSB_8:
673 case VSB_16: 1365 case VSB_16:
674 std = 0x1b; /* device-specific (spec says 0x1c) */ 1366 std = std_map->atsc_6.std_bits;
675 sgIF = 5380000; 1367 sgIF = std_map->atsc_6.if_freq;
676 break; 1368 break;
677 case QAM_64: 1369 case QAM_64:
678 case QAM_256: 1370 case QAM_256:
679 std = 0x18; /* device-specific (spec says 0x1d) */ 1371 std = std_map->qam_6.std_bits;
680 sgIF = 4000000; 1372 sgIF = std_map->qam_6.if_freq;
681 break; 1373 break;
682 default: 1374 default:
683 tda_warn("modulation not set!\n"); 1375 tda_warn("modulation not set!\n");
@@ -691,19 +1383,19 @@ static int tda18271_set_params(struct dvb_frontend *fe,
691 } else if (fe->ops.info.type == FE_OFDM) { 1383 } else if (fe->ops.info.type == FE_OFDM) {
692 switch (params->u.ofdm.bandwidth) { 1384 switch (params->u.ofdm.bandwidth) {
693 case BANDWIDTH_6_MHZ: 1385 case BANDWIDTH_6_MHZ:
694 std = 0x1b; /* device-specific (spec says 0x1c) */
695 bw = 6000000; 1386 bw = 6000000;
696 sgIF = 3300000; 1387 std = std_map->dvbt_6.std_bits;
1388 sgIF = std_map->dvbt_6.if_freq;
697 break; 1389 break;
698 case BANDWIDTH_7_MHZ: 1390 case BANDWIDTH_7_MHZ:
699 std = 0x19; /* device-specific (spec says 0x1d) */
700 bw = 7000000; 1391 bw = 7000000;
701 sgIF = 3800000; 1392 std = std_map->dvbt_7.std_bits;
1393 sgIF = std_map->dvbt_7.if_freq;
702 break; 1394 break;
703 case BANDWIDTH_8_MHZ: 1395 case BANDWIDTH_8_MHZ:
704 std = 0x1a; /* device-specific (spec says 0x1e) */
705 bw = 8000000; 1396 bw = 8000000;
706 sgIF = 4300000; 1397 std = std_map->dvbt_8.std_bits;
1398 sgIF = std_map->dvbt_8.if_freq;
707 break; 1399 break;
708 default: 1400 default:
709 tda_warn("bandwidth not set!\n"); 1401 tda_warn("bandwidth not set!\n");
@@ -714,57 +1406,59 @@ static int tda18271_set_params(struct dvb_frontend *fe,
714 return -EINVAL; 1406 return -EINVAL;
715 } 1407 }
716 1408
717 return tda18271_tune(fe, sgIF, freq, bw, std); 1409 return priv->tune(fe, sgIF, freq, bw, std);
718} 1410}
719 1411
720static int tda18271_set_analog_params(struct dvb_frontend *fe, 1412static int tda18271_set_analog_params(struct dvb_frontend *fe,
721 struct analog_parameters *params) 1413 struct analog_parameters *params)
722{ 1414{
723 struct tda18271_priv *priv = fe->tuner_priv; 1415 struct tda18271_priv *priv = fe->tuner_priv;
1416 struct tda18271_std_map *std_map = priv->std;
724 char *mode; 1417 char *mode;
725 u8 std; 1418 u8 std;
726 u32 sgIF, freq = params->frequency * 62500; 1419 u32 sgIF, freq = params->frequency * 62500;
727 1420
1421 BUG_ON(!priv->tune || !priv->std);
1422
728 priv->mode = TDA18271_ANALOG; 1423 priv->mode = TDA18271_ANALOG;
729 1424
730 /* see table 22 */
731 if (params->std & V4L2_STD_MN) { 1425 if (params->std & V4L2_STD_MN) {
732 std = 0x0d; 1426 std = std_map->atv_mn.std_bits;
733 sgIF = 5750000; 1427 sgIF = std_map->atv_mn.if_freq;
734 mode = "MN"; 1428 mode = "MN";
735 } else if (params->std & V4L2_STD_B) { 1429 } else if (params->std & V4L2_STD_B) {
736 std = 0x0e; 1430 std = std_map->atv_b.std_bits;
737 sgIF = 6750000; 1431 sgIF = std_map->atv_b.if_freq;
738 mode = "B"; 1432 mode = "B";
739 } else if (params->std & V4L2_STD_GH) { 1433 } else if (params->std & V4L2_STD_GH) {
740 std = 0x0f; 1434 std = std_map->atv_gh.std_bits;
741 sgIF = 7750000; 1435 sgIF = std_map->atv_gh.if_freq;
742 mode = "GH"; 1436 mode = "GH";
743 } else if (params->std & V4L2_STD_PAL_I) { 1437 } else if (params->std & V4L2_STD_PAL_I) {
744 std = 0x0f; 1438 std = std_map->atv_i.std_bits;
745 sgIF = 7750000; 1439 sgIF = std_map->atv_i.if_freq;
746 mode = "I"; 1440 mode = "I";
747 } else if (params->std & V4L2_STD_DK) { 1441 } else if (params->std & V4L2_STD_DK) {
748 std = 0x0f; 1442 std = std_map->atv_dk.std_bits;
749 sgIF = 7750000; 1443 sgIF = std_map->atv_dk.if_freq;
750 mode = "DK"; 1444 mode = "DK";
751 } else if (params->std & V4L2_STD_SECAM_L) { 1445 } else if (params->std & V4L2_STD_SECAM_L) {
752 std = 0x0f; 1446 std = std_map->atv_l.std_bits;
753 sgIF = 7750000; 1447 sgIF = std_map->atv_l.if_freq;
754 mode = "L"; 1448 mode = "L";
755 } else if (params->std & V4L2_STD_SECAM_LC) { 1449 } else if (params->std & V4L2_STD_SECAM_LC) {
756 std = 0x0f; 1450 std = std_map->atv_lc.std_bits;
757 sgIF = 1250000; 1451 sgIF = std_map->atv_lc.if_freq;
758 mode = "L'"; 1452 mode = "L'";
759 } else { 1453 } else {
760 std = 0x0f; 1454 std = std_map->atv_i.std_bits;
761 sgIF = 7750000; 1455 sgIF = std_map->atv_i.if_freq;
762 mode = "xx"; 1456 mode = "xx";
763 } 1457 }
764 1458
765 tda_dbg("setting tda18271 to system %s\n", mode); 1459 tda_dbg("setting tda18271 to system %s\n", mode);
766 1460
767 return tda18271_tune(fe, sgIF, freq, 0, std); 1461 return priv->tune(fe, sgIF, freq, 0, std);
768} 1462}
769 1463
770static int tda18271_release(struct dvb_frontend *fe) 1464static int tda18271_release(struct dvb_frontend *fe)
@@ -800,10 +1494,13 @@ static int tda18271_get_id(struct dvb_frontend *fe)
800 switch (regs[R_ID] & 0x7f) { 1494 switch (regs[R_ID] & 0x7f) {
801 case 3: 1495 case 3:
802 name = "TDA18271HD/C1"; 1496 name = "TDA18271HD/C1";
1497 priv->id = TDA18271HDC1;
1498 priv->tune = tda18271c1_tune;
803 break; 1499 break;
804 case 4: 1500 case 4:
805 name = "TDA18271HD/C2"; 1501 name = "TDA18271HD/C2";
806 ret = -EPROTONOSUPPORT; 1502 priv->id = TDA18271HDC2;
1503 priv->tune = tda18271c2_tune;
807 break; 1504 break;
808 default: 1505 default:
809 name = "Unknown device"; 1506 name = "Unknown device";
@@ -846,12 +1543,16 @@ struct dvb_frontend *tda18271_attach(struct dvb_frontend *fe, u8 addr,
846 priv->i2c_addr = addr; 1543 priv->i2c_addr = addr;
847 priv->i2c_adap = i2c; 1544 priv->i2c_adap = i2c;
848 priv->gate = gate; 1545 priv->gate = gate;
1546 priv->cal_initialized = false;
849 1547
850 fe->tuner_priv = priv; 1548 fe->tuner_priv = priv;
851 1549
852 if (tda18271_get_id(fe) < 0) 1550 if (tda18271_get_id(fe) < 0)
853 goto fail; 1551 goto fail;
854 1552
1553 if (tda18271_assign_map_layout(fe) < 0)
1554 goto fail;
1555
855 memcpy(&fe->ops.tuner_ops, &tda18271_tuner_ops, 1556 memcpy(&fe->ops.tuner_ops, &tda18271_tuner_ops,
856 sizeof(struct dvb_tuner_ops)); 1557 sizeof(struct dvb_tuner_ops));
857 1558
@@ -866,7 +1567,7 @@ EXPORT_SYMBOL_GPL(tda18271_attach);
866MODULE_DESCRIPTION("NXP TDA18271HD analog / digital tuner driver"); 1567MODULE_DESCRIPTION("NXP TDA18271HD analog / digital tuner driver");
867MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>"); 1568MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
868MODULE_LICENSE("GPL"); 1569MODULE_LICENSE("GPL");
869MODULE_VERSION("0.1"); 1570MODULE_VERSION("0.2");
870 1571
871/* 1572/*
872 * Overrides for Emacs so that we follow Linus's tabbing style. 1573 * Overrides for Emacs so that we follow Linus's tabbing style.
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 04:55:32 -0500