diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-10-31 18:42:54 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-10-31 18:42:54 -0400 |
commit | 1eb63378354ac37b7e27d256bbf84684751bac32 (patch) | |
tree | 0775591a2dced778d1ba0bd8a946831e424d02d7 /drivers/media/dvb/dvb-usb/mxl111sf-i2c.c | |
parent | 1a4ceab195e66bce9c1638fdded6d92988100ba4 (diff) | |
parent | bac2dacd5fb9ddad093d7a2dc5ab44e764874821 (diff) |
Merge branch 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
* 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (348 commits)
[media] pctv452e: Remove bogus code
[media] adv7175: Make use of media bus pixel codes
[media] media: vb2: fix incorrect return value
[media] em28xx: implement VIDIOC_ENUM_FRAMESIZES
[media] cx23885: Stop the risc video fifo before reconfiguring it
[media] cx23885: Avoid incorrect error handling and reporting
[media] cx23885: Avoid stopping the risc engine during buffer timeout
[media] cx23885: Removed a spurious function cx23885_set_scale()
[media] cx23885: v4l2 api compliance, set the audioset field correctly
[media] cx23885: hook the audio selection functions into the main driver
[media] cx23885: add generic functions for dealing with audio input selection
[media] cx23885: fixes related to maximum number of inputs and range checking
[media] cx23885: Initial support for the MPX-885 mini-card
[media] cx25840: Ensure AUDIO6 and AUDIO7 trigger line-in baseband use
[media] cx23885: Enable audio line in support from the back panel
[media] cx23885: Allow the audio mux config to be specified on a per input basis
[media] cx25840: Enable support for non-tuner LR1/LR2 audio inputs
[media] cx23885: Name an internal i2c part and declare a bitfield by name
[media] cx23885: Ensure VBI buffers timeout quickly - bugfix for vbi hangs during streaming
[media] cx23885: remove channel dump diagnostics when a vbi buffer times out
...
Fix up trivial conflicts in drivers/misc/altera-stapl/altera.c (header
file rename vs add)
Diffstat (limited to 'drivers/media/dvb/dvb-usb/mxl111sf-i2c.c')
-rw-r--r-- | drivers/media/dvb/dvb-usb/mxl111sf-i2c.c | 851 |
1 files changed, 851 insertions, 0 deletions
diff --git a/drivers/media/dvb/dvb-usb/mxl111sf-i2c.c b/drivers/media/dvb/dvb-usb/mxl111sf-i2c.c new file mode 100644 index 00000000000..2e8c288258a --- /dev/null +++ b/drivers/media/dvb/dvb-usb/mxl111sf-i2c.c | |||
@@ -0,0 +1,851 @@ | |||
1 | /* | ||
2 | * mxl111sf-i2c.c - driver for the MaxLinear MXL111SF | ||
3 | * | ||
4 | * Copyright (C) 2010 Michael Krufky <mkrufky@kernellabs.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
19 | */ | ||
20 | |||
21 | #include "mxl111sf-i2c.h" | ||
22 | #include "mxl111sf.h" | ||
23 | |||
24 | /* SW-I2C ----------------------------------------------------------------- */ | ||
25 | |||
26 | #define SW_I2C_ADDR 0x1a | ||
27 | #define SW_I2C_EN 0x02 | ||
28 | #define SW_SCL_OUT 0x04 | ||
29 | #define SW_SDA_OUT 0x08 | ||
30 | #define SW_SDA_IN 0x04 | ||
31 | |||
32 | #define SW_I2C_BUSY_ADDR 0x2f | ||
33 | #define SW_I2C_BUSY 0x02 | ||
34 | |||
35 | static int mxl111sf_i2c_bitbang_sendbyte(struct mxl111sf_state *state, | ||
36 | u8 byte) | ||
37 | { | ||
38 | int i, ret; | ||
39 | u8 data = 0; | ||
40 | |||
41 | mxl_i2c("(0x%02x)", byte); | ||
42 | |||
43 | ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data); | ||
44 | if (mxl_fail(ret)) | ||
45 | goto fail; | ||
46 | |||
47 | for (i = 0; i < 8; i++) { | ||
48 | |||
49 | data = (byte & (0x80 >> i)) ? SW_SDA_OUT : 0; | ||
50 | |||
51 | ret = mxl111sf_write_reg(state, SW_I2C_ADDR, | ||
52 | 0x10 | SW_I2C_EN | data); | ||
53 | if (mxl_fail(ret)) | ||
54 | goto fail; | ||
55 | |||
56 | ret = mxl111sf_write_reg(state, SW_I2C_ADDR, | ||
57 | 0x10 | SW_I2C_EN | data | SW_SCL_OUT); | ||
58 | if (mxl_fail(ret)) | ||
59 | goto fail; | ||
60 | |||
61 | ret = mxl111sf_write_reg(state, SW_I2C_ADDR, | ||
62 | 0x10 | SW_I2C_EN | data); | ||
63 | if (mxl_fail(ret)) | ||
64 | goto fail; | ||
65 | } | ||
66 | |||
67 | /* last bit was 0 so we need to release SDA */ | ||
68 | if (!(byte & 1)) { | ||
69 | ret = mxl111sf_write_reg(state, SW_I2C_ADDR, | ||
70 | 0x10 | SW_I2C_EN | SW_SDA_OUT); | ||
71 | if (mxl_fail(ret)) | ||
72 | goto fail; | ||
73 | } | ||
74 | |||
75 | /* CLK high for ACK readback */ | ||
76 | ret = mxl111sf_write_reg(state, SW_I2C_ADDR, | ||
77 | 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT); | ||
78 | if (mxl_fail(ret)) | ||
79 | goto fail; | ||
80 | |||
81 | ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data); | ||
82 | if (mxl_fail(ret)) | ||
83 | goto fail; | ||
84 | |||
85 | /* drop the CLK after getting ACK, SDA will go high right away */ | ||
86 | ret = mxl111sf_write_reg(state, SW_I2C_ADDR, | ||
87 | 0x10 | SW_I2C_EN | SW_SDA_OUT); | ||
88 | if (mxl_fail(ret)) | ||
89 | goto fail; | ||
90 | |||
91 | if (data & SW_SDA_IN) | ||
92 | ret = -EIO; | ||
93 | fail: | ||
94 | return ret; | ||
95 | } | ||
96 | |||
97 | static int mxl111sf_i2c_bitbang_recvbyte(struct mxl111sf_state *state, | ||
98 | u8 *pbyte) | ||
99 | { | ||
100 | int i, ret; | ||
101 | u8 byte = 0; | ||
102 | u8 data = 0; | ||
103 | |||
104 | mxl_i2c("()"); | ||
105 | |||
106 | *pbyte = 0; | ||
107 | |||
108 | ret = mxl111sf_write_reg(state, SW_I2C_ADDR, | ||
109 | 0x10 | SW_I2C_EN | SW_SDA_OUT); | ||
110 | if (mxl_fail(ret)) | ||
111 | goto fail; | ||
112 | |||
113 | for (i = 0; i < 8; i++) { | ||
114 | ret = mxl111sf_write_reg(state, SW_I2C_ADDR, | ||
115 | 0x10 | SW_I2C_EN | | ||
116 | SW_SCL_OUT | SW_SDA_OUT); | ||
117 | if (mxl_fail(ret)) | ||
118 | goto fail; | ||
119 | |||
120 | ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data); | ||
121 | if (mxl_fail(ret)) | ||
122 | goto fail; | ||
123 | |||
124 | if (data & SW_SDA_IN) | ||
125 | byte |= (0x80 >> i); | ||
126 | |||
127 | ret = mxl111sf_write_reg(state, SW_I2C_ADDR, | ||
128 | 0x10 | SW_I2C_EN | SW_SDA_OUT); | ||
129 | if (mxl_fail(ret)) | ||
130 | goto fail; | ||
131 | } | ||
132 | *pbyte = byte; | ||
133 | fail: | ||
134 | return ret; | ||
135 | } | ||
136 | |||
137 | static int mxl111sf_i2c_start(struct mxl111sf_state *state) | ||
138 | { | ||
139 | int ret; | ||
140 | |||
141 | mxl_i2c("()"); | ||
142 | |||
143 | ret = mxl111sf_write_reg(state, SW_I2C_ADDR, | ||
144 | 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT); | ||
145 | if (mxl_fail(ret)) | ||
146 | goto fail; | ||
147 | |||
148 | ret = mxl111sf_write_reg(state, SW_I2C_ADDR, | ||
149 | 0x10 | SW_I2C_EN | SW_SCL_OUT); | ||
150 | if (mxl_fail(ret)) | ||
151 | goto fail; | ||
152 | |||
153 | ret = mxl111sf_write_reg(state, SW_I2C_ADDR, | ||
154 | 0x10 | SW_I2C_EN); /* start */ | ||
155 | mxl_fail(ret); | ||
156 | fail: | ||
157 | return ret; | ||
158 | } | ||
159 | |||
160 | static int mxl111sf_i2c_stop(struct mxl111sf_state *state) | ||
161 | { | ||
162 | int ret; | ||
163 | |||
164 | mxl_i2c("()"); | ||
165 | |||
166 | ret = mxl111sf_write_reg(state, SW_I2C_ADDR, | ||
167 | 0x10 | SW_I2C_EN); /* stop */ | ||
168 | if (mxl_fail(ret)) | ||
169 | goto fail; | ||
170 | |||
171 | ret = mxl111sf_write_reg(state, SW_I2C_ADDR, | ||
172 | 0x10 | SW_I2C_EN | SW_SCL_OUT); | ||
173 | if (mxl_fail(ret)) | ||
174 | goto fail; | ||
175 | |||
176 | ret = mxl111sf_write_reg(state, SW_I2C_ADDR, | ||
177 | 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT); | ||
178 | if (mxl_fail(ret)) | ||
179 | goto fail; | ||
180 | |||
181 | ret = mxl111sf_write_reg(state, SW_I2C_ADDR, | ||
182 | 0x10 | SW_SCL_OUT | SW_SDA_OUT); | ||
183 | mxl_fail(ret); | ||
184 | fail: | ||
185 | return ret; | ||
186 | } | ||
187 | |||
188 | static int mxl111sf_i2c_ack(struct mxl111sf_state *state) | ||
189 | { | ||
190 | int ret; | ||
191 | u8 b = 0; | ||
192 | |||
193 | mxl_i2c("()"); | ||
194 | |||
195 | ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &b); | ||
196 | if (mxl_fail(ret)) | ||
197 | goto fail; | ||
198 | |||
199 | ret = mxl111sf_write_reg(state, SW_I2C_ADDR, | ||
200 | 0x10 | SW_I2C_EN); | ||
201 | if (mxl_fail(ret)) | ||
202 | goto fail; | ||
203 | |||
204 | /* pull SDA low */ | ||
205 | ret = mxl111sf_write_reg(state, SW_I2C_ADDR, | ||
206 | 0x10 | SW_I2C_EN | SW_SCL_OUT); | ||
207 | if (mxl_fail(ret)) | ||
208 | goto fail; | ||
209 | |||
210 | ret = mxl111sf_write_reg(state, SW_I2C_ADDR, | ||
211 | 0x10 | SW_I2C_EN | SW_SDA_OUT); | ||
212 | mxl_fail(ret); | ||
213 | fail: | ||
214 | return ret; | ||
215 | } | ||
216 | |||
217 | static int mxl111sf_i2c_nack(struct mxl111sf_state *state) | ||
218 | { | ||
219 | int ret; | ||
220 | |||
221 | mxl_i2c("()"); | ||
222 | |||
223 | /* SDA high to signal last byte read from slave */ | ||
224 | ret = mxl111sf_write_reg(state, SW_I2C_ADDR, | ||
225 | 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT); | ||
226 | if (mxl_fail(ret)) | ||
227 | goto fail; | ||
228 | |||
229 | ret = mxl111sf_write_reg(state, SW_I2C_ADDR, | ||
230 | 0x10 | SW_I2C_EN | SW_SDA_OUT); | ||
231 | mxl_fail(ret); | ||
232 | fail: | ||
233 | return ret; | ||
234 | } | ||
235 | |||
236 | /* ------------------------------------------------------------------------ */ | ||
237 | |||
238 | static int mxl111sf_i2c_sw_xfer_msg(struct mxl111sf_state *state, | ||
239 | struct i2c_msg *msg) | ||
240 | { | ||
241 | int i, ret; | ||
242 | |||
243 | mxl_i2c("()"); | ||
244 | |||
245 | if (msg->flags & I2C_M_RD) { | ||
246 | |||
247 | ret = mxl111sf_i2c_start(state); | ||
248 | if (mxl_fail(ret)) | ||
249 | goto fail; | ||
250 | |||
251 | ret = mxl111sf_i2c_bitbang_sendbyte(state, | ||
252 | (msg->addr << 1) | 0x01); | ||
253 | if (mxl_fail(ret)) { | ||
254 | mxl111sf_i2c_stop(state); | ||
255 | goto fail; | ||
256 | } | ||
257 | |||
258 | for (i = 0; i < msg->len; i++) { | ||
259 | ret = mxl111sf_i2c_bitbang_recvbyte(state, | ||
260 | &msg->buf[i]); | ||
261 | if (mxl_fail(ret)) { | ||
262 | mxl111sf_i2c_stop(state); | ||
263 | goto fail; | ||
264 | } | ||
265 | |||
266 | if (i < msg->len - 1) | ||
267 | mxl111sf_i2c_ack(state); | ||
268 | } | ||
269 | |||
270 | mxl111sf_i2c_nack(state); | ||
271 | |||
272 | ret = mxl111sf_i2c_stop(state); | ||
273 | if (mxl_fail(ret)) | ||
274 | goto fail; | ||
275 | |||
276 | } else { | ||
277 | |||
278 | ret = mxl111sf_i2c_start(state); | ||
279 | if (mxl_fail(ret)) | ||
280 | goto fail; | ||
281 | |||
282 | ret = mxl111sf_i2c_bitbang_sendbyte(state, | ||
283 | (msg->addr << 1) & 0xfe); | ||
284 | if (mxl_fail(ret)) { | ||
285 | mxl111sf_i2c_stop(state); | ||
286 | goto fail; | ||
287 | } | ||
288 | |||
289 | for (i = 0; i < msg->len; i++) { | ||
290 | ret = mxl111sf_i2c_bitbang_sendbyte(state, | ||
291 | msg->buf[i]); | ||
292 | if (mxl_fail(ret)) { | ||
293 | mxl111sf_i2c_stop(state); | ||
294 | goto fail; | ||
295 | } | ||
296 | } | ||
297 | |||
298 | /* FIXME: we only want to do this on the last transaction */ | ||
299 | mxl111sf_i2c_stop(state); | ||
300 | } | ||
301 | fail: | ||
302 | return ret; | ||
303 | } | ||
304 | |||
305 | /* HW-I2C ----------------------------------------------------------------- */ | ||
306 | |||
307 | #define USB_WRITE_I2C_CMD 0x99 | ||
308 | #define USB_READ_I2C_CMD 0xdd | ||
309 | #define USB_END_I2C_CMD 0xfe | ||
310 | |||
311 | #define USB_WRITE_I2C_CMD_LEN 26 | ||
312 | #define USB_READ_I2C_CMD_LEN 24 | ||
313 | |||
314 | #define I2C_MUX_REG 0x30 | ||
315 | #define I2C_CONTROL_REG 0x00 | ||
316 | #define I2C_SLAVE_ADDR_REG 0x08 | ||
317 | #define I2C_DATA_REG 0x0c | ||
318 | #define I2C_INT_STATUS_REG 0x10 | ||
319 | |||
320 | static int mxl111sf_i2c_send_data(struct mxl111sf_state *state, | ||
321 | u8 index, u8 *wdata) | ||
322 | { | ||
323 | int ret = mxl111sf_ctrl_msg(state->d, wdata[0], | ||
324 | &wdata[1], 25, NULL, 0); | ||
325 | mxl_fail(ret); | ||
326 | |||
327 | return ret; | ||
328 | } | ||
329 | |||
330 | static int mxl111sf_i2c_get_data(struct mxl111sf_state *state, | ||
331 | u8 index, u8 *wdata, u8 *rdata) | ||
332 | { | ||
333 | int ret = mxl111sf_ctrl_msg(state->d, wdata[0], | ||
334 | &wdata[1], 25, rdata, 24); | ||
335 | mxl_fail(ret); | ||
336 | |||
337 | return ret; | ||
338 | } | ||
339 | |||
340 | static u8 mxl111sf_i2c_check_status(struct mxl111sf_state *state) | ||
341 | { | ||
342 | u8 status = 0; | ||
343 | u8 buf[26]; | ||
344 | |||
345 | mxl_i2c_adv("()"); | ||
346 | |||
347 | buf[0] = USB_READ_I2C_CMD; | ||
348 | buf[1] = 0x00; | ||
349 | |||
350 | buf[2] = I2C_INT_STATUS_REG; | ||
351 | buf[3] = 0x00; | ||
352 | buf[4] = 0x00; | ||
353 | |||
354 | buf[5] = USB_END_I2C_CMD; | ||
355 | |||
356 | mxl111sf_i2c_get_data(state, 0, buf, buf); | ||
357 | |||
358 | if (buf[1] & 0x04) | ||
359 | status = 1; | ||
360 | |||
361 | return status; | ||
362 | } | ||
363 | |||
364 | static u8 mxl111sf_i2c_check_fifo(struct mxl111sf_state *state) | ||
365 | { | ||
366 | u8 status = 0; | ||
367 | u8 buf[26]; | ||
368 | |||
369 | mxl_i2c("()"); | ||
370 | |||
371 | buf[0] = USB_READ_I2C_CMD; | ||
372 | buf[1] = 0x00; | ||
373 | |||
374 | buf[2] = I2C_MUX_REG; | ||
375 | buf[3] = 0x00; | ||
376 | buf[4] = 0x00; | ||
377 | |||
378 | buf[5] = I2C_INT_STATUS_REG; | ||
379 | buf[6] = 0x00; | ||
380 | buf[7] = 0x00; | ||
381 | buf[8] = USB_END_I2C_CMD; | ||
382 | |||
383 | mxl111sf_i2c_get_data(state, 0, buf, buf); | ||
384 | |||
385 | if (0x08 == (buf[1] & 0x08)) | ||
386 | status = 1; | ||
387 | |||
388 | if ((buf[5] & 0x02) == 0x02) | ||
389 | mxl_i2c("(buf[5] & 0x02) == 0x02"); /* FIXME */ | ||
390 | |||
391 | return status; | ||
392 | } | ||
393 | |||
394 | static int mxl111sf_i2c_readagain(struct mxl111sf_state *state, | ||
395 | u8 count, u8 *rbuf) | ||
396 | { | ||
397 | u8 i2c_w_data[26]; | ||
398 | u8 i2c_r_data[24]; | ||
399 | u8 i = 0; | ||
400 | u8 fifo_status = 0; | ||
401 | int ret; | ||
402 | int status = 0; | ||
403 | |||
404 | mxl_i2c("read %d bytes", count); | ||
405 | |||
406 | while ((fifo_status == 0) && (i++ < 5)) | ||
407 | fifo_status = mxl111sf_i2c_check_fifo(state); | ||
408 | |||
409 | i2c_w_data[0] = 0xDD; | ||
410 | i2c_w_data[1] = 0x00; | ||
411 | |||
412 | for (i = 2; i < 26; i++) | ||
413 | i2c_w_data[i] = 0xFE; | ||
414 | |||
415 | for (i = 0; i < count; i++) { | ||
416 | i2c_w_data[2+(i*3)] = 0x0C; | ||
417 | i2c_w_data[3+(i*3)] = 0x00; | ||
418 | i2c_w_data[4+(i*3)] = 0x00; | ||
419 | } | ||
420 | |||
421 | ret = mxl111sf_i2c_get_data(state, 0, i2c_w_data, i2c_r_data); | ||
422 | |||
423 | /* Check for I2C NACK status */ | ||
424 | if (mxl111sf_i2c_check_status(state) == 1) { | ||
425 | mxl_i2c("error!"); | ||
426 | } else { | ||
427 | for (i = 0; i < count; i++) { | ||
428 | rbuf[i] = i2c_r_data[(i*3)+1]; | ||
429 | mxl_i2c("%02x\t %02x", | ||
430 | i2c_r_data[(i*3)+1], | ||
431 | i2c_r_data[(i*3)+2]); | ||
432 | } | ||
433 | |||
434 | status = 1; | ||
435 | } | ||
436 | |||
437 | return status; | ||
438 | } | ||
439 | |||
440 | #define HWI2C400 1 | ||
441 | static int mxl111sf_i2c_hw_xfer_msg(struct mxl111sf_state *state, | ||
442 | struct i2c_msg *msg) | ||
443 | { | ||
444 | int i, k, ret = 0; | ||
445 | u16 index = 0; | ||
446 | u8 buf[26]; | ||
447 | u8 i2c_r_data[24]; | ||
448 | u16 block_len; | ||
449 | u16 left_over_len; | ||
450 | u8 rd_status[8]; | ||
451 | u8 ret_status; | ||
452 | u8 readbuff[26]; | ||
453 | |||
454 | mxl_i2c("addr: 0x%02x, read buff len: %d, write buff len: %d", | ||
455 | msg->addr, (msg->flags & I2C_M_RD) ? msg->len : 0, | ||
456 | (!(msg->flags & I2C_M_RD)) ? msg->len : 0); | ||
457 | |||
458 | for (index = 0; index < 26; index++) | ||
459 | buf[index] = USB_END_I2C_CMD; | ||
460 | |||
461 | /* command to indicate data payload is destined for I2C interface */ | ||
462 | buf[0] = USB_WRITE_I2C_CMD; | ||
463 | buf[1] = 0x00; | ||
464 | |||
465 | /* enable I2C interface */ | ||
466 | buf[2] = I2C_MUX_REG; | ||
467 | buf[3] = 0x80; | ||
468 | buf[4] = 0x00; | ||
469 | |||
470 | /* enable I2C interface */ | ||
471 | buf[5] = I2C_MUX_REG; | ||
472 | buf[6] = 0x81; | ||
473 | buf[7] = 0x00; | ||
474 | |||
475 | /* set Timeout register on I2C interface */ | ||
476 | buf[8] = 0x14; | ||
477 | buf[9] = 0xff; | ||
478 | buf[10] = 0x00; | ||
479 | #if 0 | ||
480 | /* enable Interrupts on I2C interface */ | ||
481 | buf[8] = 0x24; | ||
482 | buf[9] = 0xF7; | ||
483 | buf[10] = 0x00; | ||
484 | #endif | ||
485 | buf[11] = 0x24; | ||
486 | buf[12] = 0xF7; | ||
487 | buf[13] = 0x00; | ||
488 | |||
489 | ret = mxl111sf_i2c_send_data(state, 0, buf); | ||
490 | |||
491 | /* write data on I2C bus */ | ||
492 | if (!(msg->flags & I2C_M_RD) && (msg->len > 0)) { | ||
493 | mxl_i2c("%d\t%02x", msg->len, msg->buf[0]); | ||
494 | |||
495 | /* control register on I2C interface to initialize I2C bus */ | ||
496 | buf[2] = I2C_CONTROL_REG; | ||
497 | buf[3] = 0x5E; | ||
498 | buf[4] = (HWI2C400) ? 0x03 : 0x0D; | ||
499 | |||
500 | /* I2C Slave device Address */ | ||
501 | buf[5] = I2C_SLAVE_ADDR_REG; | ||
502 | buf[6] = (msg->addr); | ||
503 | buf[7] = 0x00; | ||
504 | buf[8] = USB_END_I2C_CMD; | ||
505 | ret = mxl111sf_i2c_send_data(state, 0, buf); | ||
506 | |||
507 | /* check for slave device status */ | ||
508 | if (mxl111sf_i2c_check_status(state) == 1) { | ||
509 | mxl_i2c("NACK writing slave address %02x", | ||
510 | msg->addr); | ||
511 | /* if NACK, stop I2C bus and exit */ | ||
512 | buf[2] = I2C_CONTROL_REG; | ||
513 | buf[3] = 0x4E; | ||
514 | buf[4] = (HWI2C400) ? 0x03 : 0x0D; | ||
515 | ret = -EIO; | ||
516 | goto exit; | ||
517 | } | ||
518 | |||
519 | /* I2C interface can do I2C operations in block of 8 bytes of | ||
520 | I2C data. calculation to figure out number of blocks of i2c | ||
521 | data required to program */ | ||
522 | block_len = (msg->len / 8); | ||
523 | left_over_len = (msg->len % 8); | ||
524 | index = 0; | ||
525 | |||
526 | mxl_i2c("block_len %d, left_over_len %d", | ||
527 | block_len, left_over_len); | ||
528 | |||
529 | for (index = 0; index < block_len; index++) { | ||
530 | for (i = 0; i < 8; i++) { | ||
531 | /* write data on I2C interface */ | ||
532 | buf[2+(i*3)] = I2C_DATA_REG; | ||
533 | buf[3+(i*3)] = msg->buf[(index*8)+i]; | ||
534 | buf[4+(i*3)] = 0x00; | ||
535 | } | ||
536 | |||
537 | ret = mxl111sf_i2c_send_data(state, 0, buf); | ||
538 | |||
539 | /* check for I2C NACK status */ | ||
540 | if (mxl111sf_i2c_check_status(state) == 1) { | ||
541 | mxl_i2c("NACK writing slave address %02x", | ||
542 | msg->addr); | ||
543 | |||
544 | /* if NACK, stop I2C bus and exit */ | ||
545 | buf[2] = I2C_CONTROL_REG; | ||
546 | buf[3] = 0x4E; | ||
547 | buf[4] = (HWI2C400) ? 0x03 : 0x0D; | ||
548 | ret = -EIO; | ||
549 | goto exit; | ||
550 | } | ||
551 | |||
552 | } | ||
553 | |||
554 | if (left_over_len) { | ||
555 | for (k = 0; k < 26; k++) | ||
556 | buf[k] = USB_END_I2C_CMD; | ||
557 | |||
558 | buf[0] = 0x99; | ||
559 | buf[1] = 0x00; | ||
560 | |||
561 | for (i = 0; i < left_over_len; i++) { | ||
562 | buf[2+(i*3)] = I2C_DATA_REG; | ||
563 | buf[3+(i*3)] = msg->buf[(index*8)+i]; | ||
564 | mxl_i2c("index = %d %d data %d", | ||
565 | index, i, msg->buf[(index*8)+i]); | ||
566 | buf[4+(i*3)] = 0x00; | ||
567 | } | ||
568 | ret = mxl111sf_i2c_send_data(state, 0, buf); | ||
569 | |||
570 | /* check for I2C NACK status */ | ||
571 | if (mxl111sf_i2c_check_status(state) == 1) { | ||
572 | mxl_i2c("NACK writing slave address %02x", | ||
573 | msg->addr); | ||
574 | |||
575 | /* if NACK, stop I2C bus and exit */ | ||
576 | buf[2] = I2C_CONTROL_REG; | ||
577 | buf[3] = 0x4E; | ||
578 | buf[4] = (HWI2C400) ? 0x03 : 0x0D; | ||
579 | ret = -EIO; | ||
580 | goto exit; | ||
581 | } | ||
582 | |||
583 | } | ||
584 | |||
585 | /* issue I2C STOP after write */ | ||
586 | buf[2] = I2C_CONTROL_REG; | ||
587 | buf[3] = 0x4E; | ||
588 | buf[4] = (HWI2C400) ? 0x03 : 0x0D; | ||
589 | |||
590 | } | ||
591 | |||
592 | /* read data from I2C bus */ | ||
593 | if ((msg->flags & I2C_M_RD) && (msg->len > 0)) { | ||
594 | mxl_i2c("read buf len %d", msg->len); | ||
595 | |||
596 | /* command to indicate data payload is | ||
597 | destined for I2C interface */ | ||
598 | buf[2] = I2C_CONTROL_REG; | ||
599 | buf[3] = 0xDF; | ||
600 | buf[4] = (HWI2C400) ? 0x03 : 0x0D; | ||
601 | |||
602 | /* I2C xfer length */ | ||
603 | buf[5] = 0x14; | ||
604 | buf[6] = (msg->len & 0xFF); | ||
605 | buf[7] = 0; | ||
606 | |||
607 | /* I2C slave device Address */ | ||
608 | buf[8] = I2C_SLAVE_ADDR_REG; | ||
609 | buf[9] = msg->addr; | ||
610 | buf[10] = 0x00; | ||
611 | buf[11] = USB_END_I2C_CMD; | ||
612 | ret = mxl111sf_i2c_send_data(state, 0, buf); | ||
613 | |||
614 | /* check for I2C NACK status */ | ||
615 | if (mxl111sf_i2c_check_status(state) == 1) { | ||
616 | mxl_i2c("NACK reading slave address %02x", | ||
617 | msg->addr); | ||
618 | |||
619 | /* if NACK, stop I2C bus and exit */ | ||
620 | buf[2] = I2C_CONTROL_REG; | ||
621 | buf[3] = 0xC7; | ||
622 | buf[4] = (HWI2C400) ? 0x03 : 0x0D; | ||
623 | ret = -EIO; | ||
624 | goto exit; | ||
625 | } | ||
626 | |||
627 | /* I2C interface can do I2C operations in block of 8 bytes of | ||
628 | I2C data. calculation to figure out number of blocks of | ||
629 | i2c data required to program */ | ||
630 | block_len = ((msg->len) / 8); | ||
631 | left_over_len = ((msg->len) % 8); | ||
632 | index = 0; | ||
633 | |||
634 | mxl_i2c("block_len %d, left_over_len %d", | ||
635 | block_len, left_over_len); | ||
636 | |||
637 | /* command to read data from I2C interface */ | ||
638 | buf[0] = USB_READ_I2C_CMD; | ||
639 | buf[1] = 0x00; | ||
640 | |||
641 | for (index = 0; index < block_len; index++) { | ||
642 | /* setup I2C read request packet on I2C interface */ | ||
643 | for (i = 0; i < 8; i++) { | ||
644 | buf[2+(i*3)] = I2C_DATA_REG; | ||
645 | buf[3+(i*3)] = 0x00; | ||
646 | buf[4+(i*3)] = 0x00; | ||
647 | } | ||
648 | |||
649 | ret = mxl111sf_i2c_get_data(state, 0, buf, i2c_r_data); | ||
650 | |||
651 | /* check for I2C NACK status */ | ||
652 | if (mxl111sf_i2c_check_status(state) == 1) { | ||
653 | mxl_i2c("NACK reading slave address %02x", | ||
654 | msg->addr); | ||
655 | |||
656 | /* if NACK, stop I2C bus and exit */ | ||
657 | buf[2] = I2C_CONTROL_REG; | ||
658 | buf[3] = 0xC7; | ||
659 | buf[4] = (HWI2C400) ? 0x03 : 0x0D; | ||
660 | ret = -EIO; | ||
661 | goto exit; | ||
662 | } | ||
663 | |||
664 | /* copy data from i2c data payload to read buffer */ | ||
665 | for (i = 0; i < 8; i++) { | ||
666 | rd_status[i] = i2c_r_data[(i*3)+2]; | ||
667 | |||
668 | if (rd_status[i] == 0x04) { | ||
669 | if (i < 7) { | ||
670 | mxl_i2c("i2c fifo empty!" | ||
671 | " @ %d", i); | ||
672 | msg->buf[(index*8)+i] = | ||
673 | i2c_r_data[(i*3)+1]; | ||
674 | /* read again */ | ||
675 | ret_status = | ||
676 | mxl111sf_i2c_readagain( | ||
677 | state, 8-(i+1), | ||
678 | readbuff); | ||
679 | if (ret_status == 1) { | ||
680 | for (k = 0; | ||
681 | k < 8-(i+1); | ||
682 | k++) { | ||
683 | |||
684 | msg->buf[(index*8)+(k+i+1)] = | ||
685 | readbuff[k]; | ||
686 | mxl_i2c("read data: %02x\t %02x", | ||
687 | msg->buf[(index*8)+(k+i)], | ||
688 | (index*8)+(k+i)); | ||
689 | mxl_i2c("read data: %02x\t %02x", | ||
690 | msg->buf[(index*8)+(k+i+1)], | ||
691 | readbuff[k]); | ||
692 | |||
693 | } | ||
694 | goto stop_copy; | ||
695 | } else { | ||
696 | mxl_i2c("readagain " | ||
697 | "ERROR!"); | ||
698 | } | ||
699 | } else { | ||
700 | msg->buf[(index*8)+i] = | ||
701 | i2c_r_data[(i*3)+1]; | ||
702 | } | ||
703 | } else { | ||
704 | msg->buf[(index*8)+i] = | ||
705 | i2c_r_data[(i*3)+1]; | ||
706 | } | ||
707 | } | ||
708 | stop_copy: | ||
709 | ; | ||
710 | |||
711 | } | ||
712 | |||
713 | if (left_over_len) { | ||
714 | for (k = 0; k < 26; k++) | ||
715 | buf[k] = USB_END_I2C_CMD; | ||
716 | |||
717 | buf[0] = 0xDD; | ||
718 | buf[1] = 0x00; | ||
719 | |||
720 | for (i = 0; i < left_over_len; i++) { | ||
721 | buf[2+(i*3)] = I2C_DATA_REG; | ||
722 | buf[3+(i*3)] = 0x00; | ||
723 | buf[4+(i*3)] = 0x00; | ||
724 | } | ||
725 | ret = mxl111sf_i2c_get_data(state, 0, buf, | ||
726 | i2c_r_data); | ||
727 | |||
728 | /* check for I2C NACK status */ | ||
729 | if (mxl111sf_i2c_check_status(state) == 1) { | ||
730 | mxl_i2c("NACK reading slave address %02x", | ||
731 | msg->addr); | ||
732 | |||
733 | /* if NACK, stop I2C bus and exit */ | ||
734 | buf[2] = I2C_CONTROL_REG; | ||
735 | buf[3] = 0xC7; | ||
736 | buf[4] = (HWI2C400) ? 0x03 : 0x0D; | ||
737 | ret = -EIO; | ||
738 | goto exit; | ||
739 | } | ||
740 | |||
741 | for (i = 0; i < left_over_len; i++) { | ||
742 | msg->buf[(block_len*8)+i] = | ||
743 | i2c_r_data[(i*3)+1]; | ||
744 | mxl_i2c("read data: %02x\t %02x", | ||
745 | i2c_r_data[(i*3)+1], | ||
746 | i2c_r_data[(i*3)+2]); | ||
747 | } | ||
748 | } | ||
749 | |||
750 | /* indicate I2C interface to issue NACK | ||
751 | after next I2C read op */ | ||
752 | buf[0] = USB_WRITE_I2C_CMD; | ||
753 | buf[1] = 0x00; | ||
754 | |||
755 | /* control register */ | ||
756 | buf[2] = I2C_CONTROL_REG; | ||
757 | buf[3] = 0x17; | ||
758 | buf[4] = (HWI2C400) ? 0x03 : 0x0D; | ||
759 | |||
760 | buf[5] = USB_END_I2C_CMD; | ||
761 | ret = mxl111sf_i2c_send_data(state, 0, buf); | ||
762 | |||
763 | /* control register */ | ||
764 | buf[2] = I2C_CONTROL_REG; | ||
765 | buf[3] = 0xC7; | ||
766 | buf[4] = (HWI2C400) ? 0x03 : 0x0D; | ||
767 | |||
768 | } | ||
769 | exit: | ||
770 | /* STOP and disable I2C MUX */ | ||
771 | buf[0] = USB_WRITE_I2C_CMD; | ||
772 | buf[1] = 0x00; | ||
773 | |||
774 | /* de-initilize I2C BUS */ | ||
775 | buf[5] = USB_END_I2C_CMD; | ||
776 | mxl111sf_i2c_send_data(state, 0, buf); | ||
777 | |||
778 | /* Control Register */ | ||
779 | buf[2] = I2C_CONTROL_REG; | ||
780 | buf[3] = 0xDF; | ||
781 | buf[4] = 0x03; | ||
782 | |||
783 | /* disable I2C interface */ | ||
784 | buf[5] = I2C_MUX_REG; | ||
785 | buf[6] = 0x00; | ||
786 | buf[7] = 0x00; | ||
787 | |||
788 | /* de-initilize I2C BUS */ | ||
789 | buf[8] = USB_END_I2C_CMD; | ||
790 | mxl111sf_i2c_send_data(state, 0, buf); | ||
791 | |||
792 | /* disable I2C interface */ | ||
793 | buf[2] = I2C_MUX_REG; | ||
794 | buf[3] = 0x81; | ||
795 | buf[4] = 0x00; | ||
796 | |||
797 | /* disable I2C interface */ | ||
798 | buf[5] = I2C_MUX_REG; | ||
799 | buf[6] = 0x00; | ||
800 | buf[7] = 0x00; | ||
801 | |||
802 | /* disable I2C interface */ | ||
803 | buf[8] = I2C_MUX_REG; | ||
804 | buf[9] = 0x00; | ||
805 | buf[10] = 0x00; | ||
806 | |||
807 | buf[11] = USB_END_I2C_CMD; | ||
808 | mxl111sf_i2c_send_data(state, 0, buf); | ||
809 | |||
810 | return ret; | ||
811 | } | ||
812 | |||
813 | /* ------------------------------------------------------------------------ */ | ||
814 | |||
815 | int mxl111sf_i2c_xfer(struct i2c_adapter *adap, | ||
816 | struct i2c_msg msg[], int num) | ||
817 | { | ||
818 | struct dvb_usb_device *d = i2c_get_adapdata(adap); | ||
819 | struct mxl111sf_state *state = d->priv; | ||
820 | int hwi2c = (state->chip_rev > MXL111SF_V6); | ||
821 | int i, ret; | ||
822 | |||
823 | if (mutex_lock_interruptible(&d->i2c_mutex) < 0) | ||
824 | return -EAGAIN; | ||
825 | |||
826 | for (i = 0; i < num; i++) { | ||
827 | ret = (hwi2c) ? | ||
828 | mxl111sf_i2c_hw_xfer_msg(state, &msg[i]) : | ||
829 | mxl111sf_i2c_sw_xfer_msg(state, &msg[i]); | ||
830 | if (mxl_fail(ret)) { | ||
831 | mxl_debug_adv("failed with error %d on i2c " | ||
832 | "transaction %d of %d, %sing %d bytes " | ||
833 | "to/from 0x%02x", ret, i+1, num, | ||
834 | (msg[i].flags & I2C_M_RD) ? | ||
835 | "read" : "writ", | ||
836 | msg[i].len, msg[i].addr); | ||
837 | |||
838 | break; | ||
839 | } | ||
840 | } | ||
841 | |||
842 | mutex_unlock(&d->i2c_mutex); | ||
843 | |||
844 | return i == num ? num : -EREMOTEIO; | ||
845 | } | ||
846 | |||
847 | /* | ||
848 | * Local variables: | ||
849 | * c-basic-offset: 8 | ||
850 | * End: | ||
851 | */ | ||