aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/infiniband/hw
diff options
context:
space:
mode:
authorSteve Wise <swise@opengridcomputing.com>2010-06-23 11:46:49 -0400
committerRoland Dreier <rolandd@cisco.com>2010-07-21 13:53:52 -0400
commitba6d39256bed87a0e8ee1770b5f7638bb3e0cfe4 (patch)
tree5cf7c80ff6a363a08763c1e03526355535a2efe0 /drivers/infiniband/hw
parent85963e4cbcf11c00b1d27ea0e0fcab8cb3d7a69b (diff)
RDMA/cxgb4: Add module option to tweak delayed ack
Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/infiniband/hw')
-rw-r--r--drivers/infiniband/hw/cxgb4/cm.c10
-rw-r--r--drivers/infiniband/hw/cxgb4/t4fw_ri_api.h10
2 files changed, 19 insertions, 1 deletions
diff --git a/drivers/infiniband/hw/cxgb4/cm.c b/drivers/infiniband/hw/cxgb4/cm.c
index 4185c3b0635..e7b08dca740 100644
--- a/drivers/infiniband/hw/cxgb4/cm.c
+++ b/drivers/infiniband/hw/cxgb4/cm.c
@@ -61,6 +61,10 @@ static char *states[] = {
61 NULL, 61 NULL,
62}; 62};
63 63
64static int dack_mode;
65module_param(dack_mode, int, 0644);
66MODULE_PARM_DESC(dack_mode, "Delayed ack mode (default=0)");
67
64int c4iw_max_read_depth = 8; 68int c4iw_max_read_depth = 8;
65module_param(c4iw_max_read_depth, int, 0644); 69module_param(c4iw_max_read_depth, int, 0644);
66MODULE_PARM_DESC(c4iw_max_read_depth, "Per-connection max ORD/IRD (default=8)"); 70MODULE_PARM_DESC(c4iw_max_read_depth, "Per-connection max ORD/IRD (default=8)");
@@ -474,6 +478,7 @@ static int send_connect(struct c4iw_ep *ep)
474 cxgb4_best_mtu(ep->com.dev->rdev.lldi.mtus, ep->mtu, &mtu_idx); 478 cxgb4_best_mtu(ep->com.dev->rdev.lldi.mtus, ep->mtu, &mtu_idx);
475 wscale = compute_wscale(rcv_win); 479 wscale = compute_wscale(rcv_win);
476 opt0 = KEEP_ALIVE(1) | 480 opt0 = KEEP_ALIVE(1) |
481 DELACK(1) |
477 WND_SCALE(wscale) | 482 WND_SCALE(wscale) |
478 MSS_IDX(mtu_idx) | 483 MSS_IDX(mtu_idx) |
479 L2T_IDX(ep->l2t->idx) | 484 L2T_IDX(ep->l2t->idx) |
@@ -845,7 +850,9 @@ static int update_rx_credits(struct c4iw_ep *ep, u32 credits)
845 INIT_TP_WR(req, ep->hwtid); 850 INIT_TP_WR(req, ep->hwtid);
846 OPCODE_TID(req) = cpu_to_be32(MK_OPCODE_TID(CPL_RX_DATA_ACK, 851 OPCODE_TID(req) = cpu_to_be32(MK_OPCODE_TID(CPL_RX_DATA_ACK,
847 ep->hwtid)); 852 ep->hwtid));
848 req->credit_dack = cpu_to_be32(credits); 853 req->credit_dack = cpu_to_be32(credits | RX_FORCE_ACK(1) |
854 F_RX_DACK_CHANGE |
855 V_RX_DACK_MODE(dack_mode));
849 set_wr_txq(skb, CPL_PRIORITY_ACK, ep->txq_idx); 856 set_wr_txq(skb, CPL_PRIORITY_ACK, ep->txq_idx);
850 c4iw_ofld_send(&ep->com.dev->rdev, skb); 857 c4iw_ofld_send(&ep->com.dev->rdev, skb);
851 return credits; 858 return credits;
@@ -1264,6 +1271,7 @@ static void accept_cr(struct c4iw_ep *ep, __be32 peer_ip, struct sk_buff *skb,
1264 cxgb4_best_mtu(ep->com.dev->rdev.lldi.mtus, ep->mtu, &mtu_idx); 1271 cxgb4_best_mtu(ep->com.dev->rdev.lldi.mtus, ep->mtu, &mtu_idx);
1265 wscale = compute_wscale(rcv_win); 1272 wscale = compute_wscale(rcv_win);
1266 opt0 = KEEP_ALIVE(1) | 1273 opt0 = KEEP_ALIVE(1) |
1274 DELACK(1) |
1267 WND_SCALE(wscale) | 1275 WND_SCALE(wscale) |
1268 MSS_IDX(mtu_idx) | 1276 MSS_IDX(mtu_idx) |
1269 L2T_IDX(ep->l2t->idx) | 1277 L2T_IDX(ep->l2t->idx) |
diff --git a/drivers/infiniband/hw/cxgb4/t4fw_ri_api.h b/drivers/infiniband/hw/cxgb4/t4fw_ri_api.h
index fc706bd07fa..dc193c29267 100644
--- a/drivers/infiniband/hw/cxgb4/t4fw_ri_api.h
+++ b/drivers/infiniband/hw/cxgb4/t4fw_ri_api.h
@@ -826,4 +826,14 @@ struct ulptx_idata {
826#define S_ULPTX_NSGE 0 826#define S_ULPTX_NSGE 0
827#define M_ULPTX_NSGE 0xFFFF 827#define M_ULPTX_NSGE 0xFFFF
828#define V_ULPTX_NSGE(x) ((x) << S_ULPTX_NSGE) 828#define V_ULPTX_NSGE(x) ((x) << S_ULPTX_NSGE)
829
830#define S_RX_DACK_MODE 29
831#define M_RX_DACK_MODE 0x3
832#define V_RX_DACK_MODE(x) ((x) << S_RX_DACK_MODE)
833#define G_RX_DACK_MODE(x) (((x) >> S_RX_DACK_MODE) & M_RX_DACK_MODE)
834
835#define S_RX_DACK_CHANGE 31
836#define V_RX_DACK_CHANGE(x) ((x) << S_RX_DACK_CHANGE)
837#define F_RX_DACK_CHANGE V_RX_DACK_CHANGE(1U)
838
829#endif /* _T4FW_RI_API_H_ */ 839#endif /* _T4FW_RI_API_H_ */