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authorTejun Heo <htejun@gmail.com>2007-10-11 17:53:59 -0400
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-10-11 17:53:59 -0400
commitbda7970c27b1033de0afa737cd8e5abf9c55c3d2 (patch)
treea44292e591faf2f1fe0054a8b36621886bcb7056 /drivers/ide/pci/jmicron.c
parent07047935795917f21dc532c0c17811213cbc2e97 (diff)
ide: make jmicron match vendor and device class
PATA part of all current JMB controllers behave the same way and JMicron confirms that all future ones will stay compatible. Matching vendor and device class is enough. For backward compatibility, jmicron still needs to match 361,3,5,6,8 DIDs regardless of device class if libata is not configured but won't need further DID update from this point. Bart: cosmetic fixes to jmicron_chipset Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Ethan Hsiao <ethanhsiao@jmicron.com> Cc: Justin Tsai <justin@jmicron.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/pci/jmicron.c')
-rw-r--r--drivers/ide/pci/jmicron.c65
1 files changed, 25 insertions, 40 deletions
diff --git a/drivers/ide/pci/jmicron.c b/drivers/ide/pci/jmicron.c
index 65a0ff352b9..17490d25575 100644
--- a/drivers/ide/pci/jmicron.c
+++ b/drivers/ide/pci/jmicron.c
@@ -160,22 +160,13 @@ fallback:
160 return; 160 return;
161} 161}
162 162
163#define DECLARE_JMB_DEV(name_str) \ 163static ide_pci_device_t jmicron_chipset __devinitdata = {
164 { \ 164 .name = "JMB",
165 .name = name_str, \ 165 .init_hwif = init_hwif_jmicron,
166 .init_hwif = init_hwif_jmicron, \ 166 .autodma = AUTODMA,
167 .autodma = AUTODMA, \ 167 .bootable = ON_BOARD,
168 .bootable = ON_BOARD, \ 168 .enablebits = { { 0x40, 0x01, 0x01 }, { 0x40, 0x10, 0x10 } },
169 .enablebits = { {0x40, 1, 1}, {0x40, 0x10, 0x10} }, \ 169 .pio_mask = ATA_PIO5,
170 .pio_mask = ATA_PIO5, \
171 }
172
173static ide_pci_device_t jmicron_chipsets[] __devinitdata = {
174 /* 0 */ DECLARE_JMB_DEV("JMB361"),
175 /* 1 */ DECLARE_JMB_DEV("JMB363"),
176 /* 2 */ DECLARE_JMB_DEV("JMB365"),
177 /* 3 */ DECLARE_JMB_DEV("JMB366"),
178 /* 4 */ DECLARE_JMB_DEV("JMB368"),
179}; 170};
180 171
181/** 172/**
@@ -189,35 +180,29 @@ static ide_pci_device_t jmicron_chipsets[] __devinitdata = {
189 180
190static int __devinit jmicron_init_one(struct pci_dev *dev, const struct pci_device_id *id) 181static int __devinit jmicron_init_one(struct pci_dev *dev, const struct pci_device_id *id)
191{ 182{
192 ide_setup_pci_device(dev, &jmicron_chipsets[id->driver_data]); 183 ide_setup_pci_device(dev, &jmicron_chipset);
193 return 0; 184 return 0;
194} 185}
195 186
196/* If libata is configured, jmicron PCI quirk will configure it such 187/* All JMB PATA controllers have and will continue to have the same
197 * that the SATA ports are in AHCI function while the PATA ports are 188 * interface. Matching vendor and device class is enough for all
198 * in a separate IDE function. In such cases, match device class and 189 * current and future controllers if the controller is programmed
199 * attach only to IDE. If libata isn't configured, keep the old 190 * properly.
200 * behavior for backward compatibility. 191 *
192 * If libata is configured, jmicron PCI quirk programs the controller
193 * into the correct mode. If libata isn't configured, match known
194 * device IDs too to maintain backward compatibility.
201 */ 195 */
202#if defined(CONFIG_ATA) || defined(CONFIG_ATA_MODULE)
203#define JMB_CLASS PCI_CLASS_STORAGE_IDE << 8
204#define JMB_CLASS_MASK 0xffff00
205#else
206#define JMB_CLASS 0
207#define JMB_CLASS_MASK 0
208#endif
209
210static struct pci_device_id jmicron_pci_tbl[] = { 196static struct pci_device_id jmicron_pci_tbl[] = {
211 { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361, 197#if !defined(CONFIG_ATA) && !defined(CONFIG_ATA_MODULE)
212 PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 0}, 198 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB361) },
213 { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB363, 199 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB363) },
214 PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 1}, 200 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB365) },
215 { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB365, 201 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB366) },
216 PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 2}, 202 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB368) },
217 { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366, 203#endif
218 PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 3}, 204 { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
219 { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB368, 205 PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 0 },
220 PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 4},
221 { 0, }, 206 { 0, },
222}; 207};
223 208