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authorKeith Packard <keithp@keithp.com>2012-01-25 11:16:25 -0500
committerKeith Packard <keithp@keithp.com>2012-02-06 17:34:29 -0500
commitc898261c0dad617f0f1080bedc02d507a2fcfb92 (patch)
treebbbeee7291706ebc857b0eee03d89c8928eba542 /drivers/gpu
parenta4ea430853b71753103ec693acfc8624bd3e748e (diff)
drm/i915: Force explicit bpp selection for intel_dp_link_required
It is never correct to use intel_crtc->bpp in intel_dp_link_required, so instead pass an explicit bpp in to this function. This patch only supports 18bpp and 24bpp modes, which means that 10bpc modes will be computed incorrectly. Fixing that will require more extensive changes, and so must be addressed separately from this bugfix. intel_dp_link_required is called from intel_dp_mode_valid and intel_dp_mode_fixup. * intel_dp_mode_valid is called to list supported modes; in this case, the current crtc values cannot be relevant as the modes in question may never be selected. Thus, using intel_crtc->bpp is never right. * intel_dp_mode_fixup is called during mode setting, but it is run well before ironlake_crtc_mode_set is called to set intel_crtc->bpp, so using intel_crtc-bpp in this path can only ever get a stale value. Cc: Lubos Kolouch <lubos.kolouch@gmail.com> Cc: Adam Jackson <ajax@redhat.com> Cc: stable@vger.kernel.org Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42263 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44881 Tested-by: Dave Airlie <airlied@redhat.com> Tested-by: camalot@picnicpark.org (Dell Latitude 6510) Tested-by: Roland Dreier <roland@digitalvampire.org> Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c20
1 files changed, 5 insertions, 15 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index db3b461ad41..94f860cce3f 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -208,17 +208,8 @@ intel_dp_link_clock(uint8_t link_bw)
208 */ 208 */
209 209
210static int 210static int
211intel_dp_link_required(struct intel_dp *intel_dp, int pixel_clock, int check_bpp) 211intel_dp_link_required(int pixel_clock, int bpp)
212{ 212{
213 struct drm_crtc *crtc = intel_dp->base.base.crtc;
214 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
215 int bpp = 24;
216
217 if (check_bpp)
218 bpp = check_bpp;
219 else if (intel_crtc)
220 bpp = intel_crtc->bpp;
221
222 return (pixel_clock * bpp + 9) / 10; 213 return (pixel_clock * bpp + 9) / 10;
223} 214}
224 215
@@ -245,12 +236,11 @@ intel_dp_mode_valid(struct drm_connector *connector,
245 return MODE_PANEL; 236 return MODE_PANEL;
246 } 237 }
247 238
248 mode_rate = intel_dp_link_required(intel_dp, mode->clock, 0); 239 mode_rate = intel_dp_link_required(mode->clock, 24);
249 max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes); 240 max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
250 241
251 if (mode_rate > max_rate) { 242 if (mode_rate > max_rate) {
252 mode_rate = intel_dp_link_required(intel_dp, 243 mode_rate = intel_dp_link_required(mode->clock, 18);
253 mode->clock, 18);
254 if (mode_rate > max_rate) 244 if (mode_rate > max_rate)
255 return MODE_CLOCK_HIGH; 245 return MODE_CLOCK_HIGH;
256 else 246 else
@@ -683,7 +673,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
683 int lane_count, clock; 673 int lane_count, clock;
684 int max_lane_count = intel_dp_max_lane_count(intel_dp); 674 int max_lane_count = intel_dp_max_lane_count(intel_dp);
685 int max_clock = intel_dp_max_link_bw(intel_dp) == DP_LINK_BW_2_7 ? 1 : 0; 675 int max_clock = intel_dp_max_link_bw(intel_dp) == DP_LINK_BW_2_7 ? 1 : 0;
686 int bpp = mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 0; 676 int bpp = mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 24;
687 static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 }; 677 static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 };
688 678
689 if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) { 679 if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) {
@@ -701,7 +691,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
701 for (clock = 0; clock <= max_clock; clock++) { 691 for (clock = 0; clock <= max_clock; clock++) {
702 int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count); 692 int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count);
703 693
704 if (intel_dp_link_required(intel_dp, mode->clock, bpp) 694 if (intel_dp_link_required(mode->clock, bpp)
705 <= link_avail) { 695 <= link_avail) {
706 intel_dp->link_bw = bws[clock]; 696 intel_dp->link_bw = bws[clock];
707 intel_dp->lane_count = lane_count; 697 intel_dp->lane_count = lane_count;