drm/radeon/kms: MC setup changes for fusion APUs

- CONFIG_MEMSIZE is in bytes on fusion.
- FB_BASE and FB_TOP are finer grained.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

3 files changed, 19 insertions, 4 deletions

diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index e9b262fdaa2..090f7470008 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -1940,9 +1940,15 @@ int evergreen_mc_init(struct radeon_device *rdev)
         rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);
         rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);
         /* Setup GPU memory space */
-        /* size in MB on evergreen */
-        rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;
-        rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;
+        if (rdev->flags & RADEON_IS_IGP) {
+                /* size in bytes on fusion */
+                rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE);
+                rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);
+        } else {
+                /* size in MB on evergreen */
+                rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;
+                rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;
+        }
         rdev->mc.visible_vram_size = rdev->mc.aper_size;
         rdev->mc.active_vram_size = rdev->mc.visible_vram_size;
         r700_vram_gtt_location(rdev, &rdev->mc);
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index c23349a46fd..2b66af9066b 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -237,6 +237,12 @@ static void rv770_mc_program(struct radeon_device *rdev)
                         rdev->mc.vram_end >> 12);
         }
         WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, 0);
+        if (rdev->flags & RADEON_IS_IGP) {
+                tmp = RREG32(MC_FUS_VM_FB_OFFSET) & 0x000FFFFF;
+                tmp |= ((rdev->mc.vram_end >> 20) & 0xF) << 24;
+                tmp |= ((rdev->mc.vram_start >> 20) & 0xF) << 20;
+                WREG32(MC_FUS_VM_FB_OFFSET, tmp);
+        }
         tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16;
         tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF);
         WREG32(MC_VM_FB_LOCATION, tmp);
@@ -1035,8 +1041,10 @@ void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc)
                                 mc->vram_end, mc->real_vram_size >> 20);
         } else {
                 u64 base = 0;
-                if (rdev->flags & RADEON_IS_IGP)
+                if (rdev->flags & RADEON_IS_IGP) {
                         base = (RREG32(MC_VM_FB_LOCATION) & 0xFFFF) << 24;
+                        base |= RREG32(MC_FUS_VM_FB_OFFSET) & 0x00F00000;
+                }
                 radeon_vram_location(rdev, &rdev->mc, base);
                 rdev->mc.gtt_base_align = 0;
                 radeon_gtt_location(rdev, mc);
diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h
index 7b1c8f8f407..e09a403f1c6 100644
--- a/drivers/gpu/drm/radeon/rv770d.h
+++ b/drivers/gpu/drm/radeon/rv770d.h
@@ -158,6 +158,7 @@
 #define MC_VM_AGP_BOT                                   0x202C
 #define MC_VM_AGP_BASE                                  0x2030
 #define MC_VM_FB_LOCATION                               0x2024
+#define MC_FUS_VM_FB_OFFSET                             0x2898
 #define MC_VM_MB_L1_TLB0_CNTL                           0x2234
 #define MC_VM_MB_L1_TLB1_CNTL                           0x2238
 #define MC_VM_MB_L1_TLB2_CNTL                           0x223C