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authorMarek Olšák <maraeo@gmail.com>2012-01-27 12:17:59 -0500
committerDave Airlie <airlied@redhat.com>2012-02-13 07:09:11 -0500
commitdd220a00e8bd5ad7f98ecdc3eed699a7cfabdc27 (patch)
tree8cdedce29665aae1f92ebcccefacda0598d08a1c /drivers/gpu/drm/radeon/reg_srcs/evergreen
parent51a59ac8739b333eaa43a3102b6acaab5037bfa2 (diff)
drm/radeon/kms: add support for streamout v7
v2: agd5f: add strmout CS checking, copy_dw register checking v3: agd5f: don't use cs_check_reg() for copy_dw checking as it will incorrectly patch the command stream for certain regs. v4: agd5f: add warning if safe reg check fails for copy_dw v5: agd5f: add stricter checking for 6xx/7xx v6: agd5f: add range checking for copy_dw on eg+, add sx_surface_sync to safe reg list for 7xx. v7: agd5f: add stricter checking for eg+ Signed-off-by: Marek Olšák <maraeo@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/reg_srcs/evergreen')
-rw-r--r--drivers/gpu/drm/radeon/reg_srcs/evergreen10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/reg_srcs/evergreen b/drivers/gpu/drm/radeon/reg_srcs/evergreen
index 161737a28c2..4e3f208eef7 100644
--- a/drivers/gpu/drm/radeon/reg_srcs/evergreen
+++ b/drivers/gpu/drm/radeon/reg_srcs/evergreen
@@ -4,6 +4,9 @@ evergreen 0x9400
40x00008044 WAIT_UNTIL_POLL_CNTL 40x00008044 WAIT_UNTIL_POLL_CNTL
50x00008048 WAIT_UNTIL_POLL_MASK 50x00008048 WAIT_UNTIL_POLL_MASK
60x0000804c WAIT_UNTIL_POLL_REFDATA 60x0000804c WAIT_UNTIL_POLL_REFDATA
70x000084FC CP_STRMOUT_CNTL
80x000085F0 CP_COHER_CNTL
90x000085F4 CP_COHER_SIZE
70x000088B0 VGT_VTX_VECT_EJECT_REG 100x000088B0 VGT_VTX_VECT_EJECT_REG
80x000088C4 VGT_CACHE_INVALIDATION 110x000088C4 VGT_CACHE_INVALIDATION
90x000088D4 VGT_GS_VERTEX_REUSE 120x000088D4 VGT_GS_VERTEX_REUSE
@@ -522,6 +525,13 @@ evergreen 0x9400
5220x00028AC0 DB_SRESULTS_COMPARE_STATE0 5250x00028AC0 DB_SRESULTS_COMPARE_STATE0
5230x00028AC4 DB_SRESULTS_COMPARE_STATE1 5260x00028AC4 DB_SRESULTS_COMPARE_STATE1
5240x00028AC8 DB_PRELOAD_CONTROL 5270x00028AC8 DB_PRELOAD_CONTROL
5280x00028AD4 VGT_STRMOUT_VTX_STRIDE_0
5290x00028AE4 VGT_STRMOUT_VTX_STRIDE_1
5300x00028AF4 VGT_STRMOUT_VTX_STRIDE_2
5310x00028B04 VGT_STRMOUT_VTX_STRIDE_3
5320x00028B28 VGT_STRMOUT_DRAW_OPAQUE_OFFSET
5330x00028B2C VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE
5340x00028B30 VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE
5250x00028B38 VGT_GS_MAX_VERT_OUT 5350x00028B38 VGT_GS_MAX_VERT_OUT
5260x00028B54 VGT_SHADER_STAGES_EN 5360x00028B54 VGT_SHADER_STAGES_EN
5270x00028B58 VGT_LS_HS_CONFIG 5370x00028B58 VGT_LS_HS_CONFIG