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authorAlex Deucher <alexdeucher@gmail.com>2009-11-30 01:54:16 -0500
committerDave Airlie <airlied@redhat.com>2009-12-01 20:37:13 -0500
commit32f48ffea91008a27b99aab7a68a3443559d83fb (patch)
tree3642d3bf7544b9c9458fd9eec00fa802bda7b311 /drivers/gpu/drm/radeon/radeon_legacy_encoders.c
parent23956dfa82eab95931aab5fa9886c1e96c41e4dc (diff)
drm/radeon/kms: fix LVDS setup on r4xx
R4xx mobility chips use atombios, which does not store the LVDS_GEN_CNTL parameter setup like combios. Rather, it's configured in LVDSEncoderControl. As such, LVDS_GEN_CNTL is set wrong when on resume. Call LVDSEncoderControl to set it properly. Should fix fdo bug 25336 Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_legacy_encoders.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_encoders.c12
1 files changed, 9 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
index 36ac47672a3..df00515e81f 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
@@ -136,7 +136,14 @@ static void radeon_legacy_lvds_mode_set(struct drm_encoder *encoder,
136 lvds_pll_cntl &= ~RADEON_LVDS_PLL_EN; 136 lvds_pll_cntl &= ~RADEON_LVDS_PLL_EN;
137 137
138 lvds_ss_gen_cntl = RREG32(RADEON_LVDS_SS_GEN_CNTL); 138 lvds_ss_gen_cntl = RREG32(RADEON_LVDS_SS_GEN_CNTL);
139 if ((!rdev->is_atom_bios)) { 139 if (rdev->is_atom_bios) {
140 /* LVDS_GEN_CNTL parameters are computed in LVDSEncoderControl
141 * need to call that on resume to set up the reg properly.
142 */
143 radeon_encoder->pixel_clock = adjusted_mode->clock;
144 atombios_digital_setup(encoder, PANEL_ENCODER_ACTION_ENABLE);
145 lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL);
146 } else {
140 struct radeon_encoder_lvds *lvds = (struct radeon_encoder_lvds *)radeon_encoder->enc_priv; 147 struct radeon_encoder_lvds *lvds = (struct radeon_encoder_lvds *)radeon_encoder->enc_priv;
141 if (lvds) { 148 if (lvds) {
142 DRM_DEBUG("bios LVDS_GEN_CNTL: 0x%x\n", lvds->lvds_gen_cntl); 149 DRM_DEBUG("bios LVDS_GEN_CNTL: 0x%x\n", lvds->lvds_gen_cntl);
@@ -147,8 +154,7 @@ static void radeon_legacy_lvds_mode_set(struct drm_encoder *encoder,
147 (lvds->panel_blon_delay << RADEON_LVDS_PWRSEQ_DELAY2_SHIFT)); 154 (lvds->panel_blon_delay << RADEON_LVDS_PWRSEQ_DELAY2_SHIFT));
148 } else 155 } else
149 lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL); 156 lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL);
150 } else 157 }
151 lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL);
152 lvds_gen_cntl |= RADEON_LVDS_DISPLAY_DIS; 158 lvds_gen_cntl |= RADEON_LVDS_DISPLAY_DIS;
153 lvds_gen_cntl &= ~(RADEON_LVDS_ON | 159 lvds_gen_cntl &= ~(RADEON_LVDS_ON |
154 RADEON_LVDS_BLON | 160 RADEON_LVDS_BLON |