diff options
author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2012-04-18 18:57:31 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2012-04-18 18:57:31 -0400 |
commit | 665ab0f3c8b8f86bb77b25285ac93870c7054d63 (patch) | |
tree | c7d12c3559982eb3fb1847438d4b45ce034851e5 /drivers/gpu/drm/radeon/radeon_combios.c | |
parent | bf03f65b7967df5807ddef7b99f8a41d4c94fc70 (diff) | |
parent | e816b57a337ea3b755de72bec38c10c864f23015 (diff) |
Merge 3.4-rc3 into tty-next
This allows us to pick up some changes needed for other serial patches.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_combios.c')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_combios.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c index 81fc100be7e..2cad9fde92f 100644 --- a/drivers/gpu/drm/radeon/radeon_combios.c +++ b/drivers/gpu/drm/radeon/radeon_combios.c | |||
@@ -2845,7 +2845,7 @@ bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder) | |||
2845 | case 4: | 2845 | case 4: |
2846 | val = RBIOS16(index); | 2846 | val = RBIOS16(index); |
2847 | index += 2; | 2847 | index += 2; |
2848 | udelay(val * 1000); | 2848 | mdelay(val); |
2849 | break; | 2849 | break; |
2850 | case 6: | 2850 | case 6: |
2851 | slave_addr = id & 0xff; | 2851 | slave_addr = id & 0xff; |
@@ -3044,7 +3044,7 @@ static void combios_parse_pll_table(struct drm_device *dev, uint16_t offset) | |||
3044 | udelay(150); | 3044 | udelay(150); |
3045 | break; | 3045 | break; |
3046 | case 2: | 3046 | case 2: |
3047 | udelay(1000); | 3047 | mdelay(1); |
3048 | break; | 3048 | break; |
3049 | case 3: | 3049 | case 3: |
3050 | while (tmp--) { | 3050 | while (tmp--) { |
@@ -3075,13 +3075,13 @@ static void combios_parse_pll_table(struct drm_device *dev, uint16_t offset) | |||
3075 | /*mclk_cntl |= 0x00001111;*//* ??? */ | 3075 | /*mclk_cntl |= 0x00001111;*//* ??? */ |
3076 | WREG32_PLL(RADEON_MCLK_CNTL, | 3076 | WREG32_PLL(RADEON_MCLK_CNTL, |
3077 | mclk_cntl); | 3077 | mclk_cntl); |
3078 | udelay(10000); | 3078 | mdelay(10); |
3079 | #endif | 3079 | #endif |
3080 | WREG32_PLL | 3080 | WREG32_PLL |
3081 | (RADEON_CLK_PWRMGT_CNTL, | 3081 | (RADEON_CLK_PWRMGT_CNTL, |
3082 | tmp & | 3082 | tmp & |
3083 | ~RADEON_CG_NO1_DEBUG_0); | 3083 | ~RADEON_CG_NO1_DEBUG_0); |
3084 | udelay(10000); | 3084 | mdelay(10); |
3085 | } | 3085 | } |
3086 | break; | 3086 | break; |
3087 | default: | 3087 | default: |