aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/radeon/r300.c
diff options
context:
space:
mode:
authorEric Anholt <eric@anholt.net>2010-05-07 17:30:03 -0400
committerEric Anholt <eric@anholt.net>2010-05-10 16:36:52 -0400
commit34dc4d4423dc342848d72be764832cbc0852854a (patch)
tree056402a4afc2b7ef2f4dee30a712ce847279c13a /drivers/gpu/drm/radeon/r300.c
parent3d8620cc5f8538364ee152811e2bd8713abb1d58 (diff)
parent722154e4cacf015161efe60009ae9be23d492296 (diff)
Merge remote branch 'origin/master' into drm-intel-next
Conflicts: drivers/gpu/drm/i915/i915_dma.c drivers/gpu/drm/i915/i915_drv.h drivers/gpu/drm/radeon/r300.c The BSD ringbuffer support that is landing in this branch significantly conflicts with the Ironlake PIPE_CONTROL fix on master, and requires it to be tested successfully anyway.
Diffstat (limited to 'drivers/gpu/drm/radeon/r300.c')
-rw-r--r--drivers/gpu/drm/radeon/r300.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 5d622cb39b3..6d9569e002f 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -328,13 +328,12 @@ void r300_gpu_init(struct radeon_device *rdev)
328{ 328{
329 uint32_t gb_tile_config, tmp; 329 uint32_t gb_tile_config, tmp;
330 330
331 /* FIXME: rv380 one pipes ? */
332 if ((rdev->family == CHIP_R300 && rdev->pdev->device != 0x4144) || 331 if ((rdev->family == CHIP_R300 && rdev->pdev->device != 0x4144) ||
333 (rdev->family == CHIP_R350)) { 332 (rdev->family == CHIP_R350 && rdev->pdev->device != 0x4148)) {
334 /* r300,r350 */ 333 /* r300,r350 */
335 rdev->num_gb_pipes = 2; 334 rdev->num_gb_pipes = 2;
336 } else { 335 } else {
337 /* rv350,rv370,rv380,r300 AD */ 336 /* rv350,rv370,rv380,r300 AD, r350 AH */
338 rdev->num_gb_pipes = 1; 337 rdev->num_gb_pipes = 1;
339 } 338 }
340 rdev->num_z_pipes = 1; 339 rdev->num_z_pipes = 1;
@@ -1045,7 +1044,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
1045 break; 1044 break;
1046 case 0x4d1c: 1045 case 0x4d1c:
1047 /* ZB_BW_CNTL */ 1046 /* ZB_BW_CNTL */
1048 track->fastfill = !!(idx_value & (1 << 2)); 1047 track->zb_cb_clear = !!(idx_value & (1 << 5));
1049 break; 1048 break;
1050 case 0x4e04: 1049 case 0x4e04:
1051 /* RB3D_BLENDCNTL */ 1050 /* RB3D_BLENDCNTL */