drm/radeon/kms: add support for multiple fence queues v2

For supporting multiple CP ring buffers, async DMA
engines and UVD.  We still need a way to synchronize
between engines.

v2 initialize unused fence driver ring to avoid issue in
   suspend/unload

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

1 files changed, 3 insertions, 3 deletions

diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 5e00d1670aa..1c7af565433 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -3018,11 +3018,11 @@ restart_ih:
                 case 177: /* CP_INT in IB1 */
                 case 178: /* CP_INT in IB2 */
                         DRM_DEBUG("IH: CP int: 0x%08x\n", src_data);
-                        radeon_fence_process(rdev);
+                        radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX);
                         break;
                 case 181: /* CP EOP event */
                         DRM_DEBUG("IH: CP EOP\n");
-                        radeon_fence_process(rdev);
+                        radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX);
                         break;
                 case 233: /* GUI IDLE */
                         DRM_DEBUG("IH: GUI idle\n");
@@ -3221,7 +3221,7 @@ int evergreen_init(struct radeon_device *rdev)
         /* Initialize clocks */
         radeon_get_clock_info(rdev->ddev);
         /* Fence driver */
-        r = radeon_fence_driver_init(rdev);
+        r = radeon_fence_driver_init(rdev, 1);
         if (r)
                 return r;
         /* initialize AGP */