drm/kms/radeon: Reorder vblank and pageflip interrupt handling.

In the vblank irq handler, calls to actual vblank handling,
or at least drm_handle_vblank(), need to happen before
calls to radeon_crtc_handle_flip().

Reason: The high precision pageflip timestamping
and some other pageflip optimizations will need the updated
vblank count and timestamps for the current vblank interval.

These are calculated in drm_handle_vblank(), therefore it
must go first.

Signed-off-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

1 files changed, 4 insertions, 4 deletions

diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index df3f3724322..25e84379e7c 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -2398,13 +2398,13 @@ restart_ih:
                         switch (src_data) {
                         case 0: /* D1 vblank */
                                 if (rdev->irq.stat_regs.evergreen.disp_int & LB_D1_VBLANK_INTERRUPT) {
-                                        if (rdev->irq.pflip[0])
-                                                radeon_crtc_handle_flip(rdev, 0);
                                         if (rdev->irq.crtc_vblank_int[0]) {
                                                 drm_handle_vblank(rdev->ddev, 0);
                                                 rdev->pm.vblank_sync = true;
                                                 wake_up(&rdev->irq.vblank_queue);
                                         }
+                                        if (rdev->irq.pflip[0])
+                                                radeon_crtc_handle_flip(rdev, 0);
                                         rdev->irq.stat_regs.evergreen.disp_int &= ~LB_D1_VBLANK_INTERRUPT;
                                         DRM_DEBUG("IH: D1 vblank\n");
                                 }
@@ -2424,13 +2424,13 @@ restart_ih:
                         switch (src_data) {
                         case 0: /* D2 vblank */
                                 if (rdev->irq.stat_regs.evergreen.disp_int_cont & LB_D2_VBLANK_INTERRUPT) {
-                                        if (rdev->irq.pflip[1])
-                                                radeon_crtc_handle_flip(rdev, 1);
                                         if (rdev->irq.crtc_vblank_int[1]) {
                                                 drm_handle_vblank(rdev->ddev, 1);
                                                 rdev->pm.vblank_sync = true;
                                                 wake_up(&rdev->irq.vblank_queue);
                                         }
+                                        if (rdev->irq.pflip[1])
+                                                radeon_crtc_handle_flip(rdev, 1);
                                         rdev->irq.stat_regs.evergreen.disp_int_cont &= ~LB_D2_VBLANK_INTERRUPT;
                                         DRM_DEBUG("IH: D2 vblank\n");
                                 }