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authorBen Skeggs <bskeggs@redhat.com>2011-03-31 01:40:43 -0400
committerBen Skeggs <bskeggs@redhat.com>2011-05-15 20:48:01 -0400
commit6dfdd7a61e8fc25552d9de1cb25272324dfc4c13 (patch)
treed158037ace54303d33323a14bafc8a2ef27a85b5 /drivers/gpu/drm/nouveau/nouveau_drv.c
parent2d7b919c9b0ca3df1da2498bb0cede25ddd97e00 (diff)
drm/nouveau: working towards a common way to represent engines
There's lots of more-or-less independant engines present on NVIDIA GPUs these days, and we generally want to perform the same operations on them. Implementing new ones requires hooking into lots of different places, the aim of this work is to make this simpler and cleaner. NV84:NV98 PCRYPT moved over as a test. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_drv.c')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drv.c11
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.c b/drivers/gpu/drm/nouveau/nouveau_drv.c
index 155ebdcbf06..30b9e89a3a2 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.c
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.c
@@ -208,6 +208,12 @@ nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
208 208
209 pgraph->fifo_access(dev, false); 209 pgraph->fifo_access(dev, false);
210 nouveau_wait_for_idle(dev); 210 nouveau_wait_for_idle(dev);
211
212 for (i = NVOBJ_ENGINE_NR - 1; i >= 0; i--) {
213 if (dev_priv->eng[i])
214 dev_priv->eng[i]->fini(dev, i);
215 }
216
211 pfifo->reassign(dev, false); 217 pfifo->reassign(dev, false);
212 pfifo->disable(dev); 218 pfifo->disable(dev);
213 pfifo->unload_context(dev); 219 pfifo->unload_context(dev);
@@ -299,8 +305,11 @@ nouveau_pci_resume(struct pci_dev *pdev)
299 engine->mc.init(dev); 305 engine->mc.init(dev);
300 engine->timer.init(dev); 306 engine->timer.init(dev);
301 engine->fb.init(dev); 307 engine->fb.init(dev);
308 for (i = 0; i < NVOBJ_ENGINE_NR; i++) {
309 if (dev_priv->eng[i])
310 dev_priv->eng[i]->init(dev, i);
311 }
302 engine->graph.init(dev); 312 engine->graph.init(dev);
303 engine->crypt.init(dev);
304 engine->fifo.init(dev); 313 engine->fifo.init(dev);
305 314
306 nouveau_irq_postinstall(dev); 315 nouveau_irq_postinstall(dev);