diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2010-11-15 19:13:05 -0500 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2010-12-07 22:48:17 -0500 |
commit | b571fe21f5c24760368b3fb927af5a7384d7721b (patch) | |
tree | a49f85fdf8ef3a3c9b969c0fbbe36c7fd2b6e40d /drivers/gpu/drm/nouveau/nouveau_bo.c | |
parent | 5f6fdca570b13a8a2c9cab9ab6edfc17487049cf (diff) |
drm/nv50: tidy up PCIEGART implementation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_bo.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_bo.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index bc28aeada8c..42d1ad62b38 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c | |||
@@ -425,7 +425,6 @@ nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, | |||
425 | man->available_caching = TTM_PL_FLAG_UNCACHED | | 425 | man->available_caching = TTM_PL_FLAG_UNCACHED | |
426 | TTM_PL_FLAG_WC; | 426 | TTM_PL_FLAG_WC; |
427 | man->default_caching = TTM_PL_FLAG_WC; | 427 | man->default_caching = TTM_PL_FLAG_WC; |
428 | man->gpu_offset = 0; | ||
429 | break; | 428 | break; |
430 | case TTM_PL_TT: | 429 | case TTM_PL_TT: |
431 | man->func = &ttm_bo_manager_func; | 430 | man->func = &ttm_bo_manager_func; |
@@ -441,13 +440,13 @@ nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, | |||
441 | TTM_MEMTYPE_FLAG_CMA; | 440 | TTM_MEMTYPE_FLAG_CMA; |
442 | man->available_caching = TTM_PL_MASK_CACHING; | 441 | man->available_caching = TTM_PL_MASK_CACHING; |
443 | man->default_caching = TTM_PL_FLAG_CACHED; | 442 | man->default_caching = TTM_PL_FLAG_CACHED; |
443 | man->gpu_offset = dev_priv->gart_info.aper_base; | ||
444 | break; | 444 | break; |
445 | default: | 445 | default: |
446 | NV_ERROR(dev, "Unknown GART type: %d\n", | 446 | NV_ERROR(dev, "Unknown GART type: %d\n", |
447 | dev_priv->gart_info.type); | 447 | dev_priv->gart_info.type); |
448 | return -EINVAL; | 448 | return -EINVAL; |
449 | } | 449 | } |
450 | man->gpu_offset = dev_priv->vm_gart_base; | ||
451 | break; | 450 | break; |
452 | default: | 451 | default: |
453 | NV_ERROR(dev, "Unsupported memory type %u\n", (unsigned)type); | 452 | NV_ERROR(dev, "Unsupported memory type %u\n", (unsigned)type); |
@@ -531,12 +530,12 @@ nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, | |||
531 | if (old_mem->mem_type == TTM_PL_VRAM) | 530 | if (old_mem->mem_type == TTM_PL_VRAM) |
532 | src_offset = nvbo->vma.offset; | 531 | src_offset = nvbo->vma.offset; |
533 | else | 532 | else |
534 | src_offset += dev_priv->vm_gart_base; | 533 | src_offset += dev_priv->gart_info.aper_base; |
535 | 534 | ||
536 | if (new_mem->mem_type == TTM_PL_VRAM) | 535 | if (new_mem->mem_type == TTM_PL_VRAM) |
537 | dst_offset = nvbo->vma.offset; | 536 | dst_offset = nvbo->vma.offset; |
538 | else | 537 | else |
539 | dst_offset += dev_priv->vm_gart_base; | 538 | dst_offset += dev_priv->gart_info.aper_base; |
540 | } | 539 | } |
541 | 540 | ||
542 | ret = RING_SPACE(chan, 3); | 541 | ret = RING_SPACE(chan, 3); |