diff options
author | Eugeni Dodonov <eugeni.dodonov@intel.com> | 2012-02-08 15:53:49 -0500 |
---|---|---|
committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2012-02-10 17:18:46 -0500 |
commit | eae66b50c760233fad526edf4a0d327be17a055d (patch) | |
tree | 2963e7c7d086d98d70bbdd5f772c7e557b09ab22 /drivers/gpu/drm/i915 | |
parent | 8597559a78e1cde158b999212bc9543682638eb1 (diff) |
drm/i915: gen7: implement rczunit workaround
This is yet another workaround related to clock gating which we need on
Ivy Bridge.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41353
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44610
Tested-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/gpu/drm/i915')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 5 |
2 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index c3afb783cb9..80fd6b5d428 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -3618,6 +3618,7 @@ | |||
3618 | #define GT_FIFO_NUM_RESERVED_ENTRIES 20 | 3618 | #define GT_FIFO_NUM_RESERVED_ENTRIES 20 |
3619 | 3619 | ||
3620 | #define GEN6_UCGCTL2 0x9404 | 3620 | #define GEN6_UCGCTL2 0x9404 |
3621 | # define GEN6_RCZUNIT_CLOCK_GATE_DISABLE (1 << 13) | ||
3621 | # define GEN6_RCPBUNIT_CLOCK_GATE_DISABLE (1 << 12) | 3622 | # define GEN6_RCPBUNIT_CLOCK_GATE_DISABLE (1 << 12) |
3622 | # define GEN6_RCCUNIT_CLOCK_GATE_DISABLE (1 << 11) | 3623 | # define GEN6_RCCUNIT_CLOCK_GATE_DISABLE (1 << 11) |
3623 | 3624 | ||
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index b3b51c43dad..643c525b288 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -8461,6 +8461,11 @@ static void ivybridge_init_clock_gating(struct drm_device *dev) | |||
8461 | I915_WRITE(WM2_LP_ILK, 0); | 8461 | I915_WRITE(WM2_LP_ILK, 0); |
8462 | I915_WRITE(WM1_LP_ILK, 0); | 8462 | I915_WRITE(WM1_LP_ILK, 0); |
8463 | 8463 | ||
8464 | /* According to the spec, bit 13 (RCZUNIT) must be set on IVB. | ||
8465 | * This implements the WaDisableRCZUnitClockGating workaround. | ||
8466 | */ | ||
8467 | I915_WRITE(GEN6_UCGCTL2, GEN6_RCZUNIT_CLOCK_GATE_DISABLE); | ||
8468 | |||
8464 | I915_WRITE(ILK_DSPCLK_GATE, IVB_VRHUNIT_CLK_GATE); | 8469 | I915_WRITE(ILK_DSPCLK_GATE, IVB_VRHUNIT_CLK_GATE); |
8465 | 8470 | ||
8466 | I915_WRITE(IVB_CHICKEN3, | 8471 | I915_WRITE(IVB_CHICKEN3, |