diff options
author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2010-09-07 17:48:05 -0400 |
---|---|---|
committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-09-08 07:38:17 -0400 |
commit | 4f0d1aff791db8935ee146fe7928b63bba0f1b59 (patch) | |
tree | 91338ce138d24060961ccf8b59596d0b1e1d5ef0 /drivers/gpu/drm/i915/i915_reg.h | |
parent | dd2575ffbd71d0922eb31b94adc0923f9808c915 (diff) |
drm/i915: fix pipeconf dither bit definitions
Make them match the others and add BPP definitions.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 5ede5a5c338..d0b4b2375d5 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -2078,11 +2078,6 @@ | |||
2078 | 2078 | ||
2079 | /* Display & cursor control */ | 2079 | /* Display & cursor control */ |
2080 | 2080 | ||
2081 | /* dithering flag on Ironlake */ | ||
2082 | #define PIPE_ENABLE_DITHER (1 << 4) | ||
2083 | #define PIPE_DITHER_TYPE_MASK (3 << 2) | ||
2084 | #define PIPE_DITHER_TYPE_SPATIAL (0 << 2) | ||
2085 | #define PIPE_DITHER_TYPE_ST01 (1 << 2) | ||
2086 | /* Pipe A */ | 2081 | /* Pipe A */ |
2087 | #define PIPEADSL 0x70000 | 2082 | #define PIPEADSL 0x70000 |
2088 | #define DSL_LINEMASK 0x00000fff | 2083 | #define DSL_LINEMASK 0x00000fff |
@@ -2101,6 +2096,17 @@ | |||
2101 | #define PIPECONF_INTERLACE_W_FIELD_INDICATION (6 << 21) | 2096 | #define PIPECONF_INTERLACE_W_FIELD_INDICATION (6 << 21) |
2102 | #define PIPECONF_INTERLACE_FIELD_0_ONLY (7 << 21) | 2097 | #define PIPECONF_INTERLACE_FIELD_0_ONLY (7 << 21) |
2103 | #define PIPECONF_CXSR_DOWNCLOCK (1<<16) | 2098 | #define PIPECONF_CXSR_DOWNCLOCK (1<<16) |
2099 | #define PIPECONF_BPP_MASK (0x000000e0) | ||
2100 | #define PIPECONF_BPP_8 (0<<5) | ||
2101 | #define PIPECONF_BPP_10 (1<<5) | ||
2102 | #define PIPECONF_BPP_6 (2<<5) | ||
2103 | #define PIPECONF_BPP_12 (3<<5) | ||
2104 | #define PIPECONF_DITHER_EN (1<<4) | ||
2105 | #define PIPECONF_DITHER_TYPE_MASK (0x0000000c) | ||
2106 | #define PIPECONF_DITHER_TYPE_SP (0<<2) | ||
2107 | #define PIPECONF_DITHER_TYPE_ST1 (1<<2) | ||
2108 | #define PIPECONF_DITHER_TYPE_ST2 (2<<2) | ||
2109 | #define PIPECONF_DITHER_TYPE_TEMP (3<<2) | ||
2104 | #define PIPEASTAT 0x70024 | 2110 | #define PIPEASTAT 0x70024 |
2105 | #define PIPE_FIFO_UNDERRUN_STATUS (1UL<<31) | 2111 | #define PIPE_FIFO_UNDERRUN_STATUS (1UL<<31) |
2106 | #define PIPE_CRC_ERROR_ENABLE (1UL<<29) | 2112 | #define PIPE_CRC_ERROR_ENABLE (1UL<<29) |