drm/i915: get the bridge device once.

The driver gets the bridge device in a number of places, upcoming
vga arb code paths need the bridge device, however they need it in
under a lock, and the pci lookup can allocate memory. So clean
this code up before then and get the bridge once for the driver lifetime.

Signed-off-by: Dave Airlie <airlied@redhat.com>

1 files changed, 20 insertions, 45 deletions

diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index e774a4a1a50..200e398453c 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -94,23 +94,15 @@
 static int
 intel_alloc_mchbar_resource(struct drm_device *dev)
 {
-        struct pci_dev *bridge_dev;
         drm_i915_private_t *dev_priv = dev->dev_private;
         int reg = IS_I965G(dev) ? MCHBAR_I965 : MCHBAR_I915;
         u32 temp_lo, temp_hi = 0;
         u64 mchbar_addr;
         int ret = 0;
 
-        bridge_dev = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
-        if (!bridge_dev) {
-                DRM_DEBUG("no bridge dev?!\n");
-                ret = -ENODEV;
-                goto out;
-        }
-
         if (IS_I965G(dev))
-                pci_read_config_dword(bridge_dev, reg + 4, &temp_hi);
-        pci_read_config_dword(bridge_dev, reg, &temp_lo);
+                pci_read_config_dword(dev_priv->bridge_dev, reg + 4, &temp_hi);
+        pci_read_config_dword(dev_priv->bridge_dev, reg, &temp_lo);
         mchbar_addr = ((u64)temp_hi << 32) | temp_lo;
 
         /* If ACPI doesn't have it, assume we need to allocate it ourselves */
@@ -118,30 +110,28 @@ intel_alloc_mchbar_resource(struct drm_device *dev)
         if (mchbar_addr &&
             pnp_range_reserved(mchbar_addr, mchbar_addr + MCHBAR_SIZE)) {
                 ret = 0;
-                goto out_put;
+                goto out;
         }
 #endif
 
         /* Get some space for it */
-        ret = pci_bus_alloc_resource(bridge_dev->bus, &dev_priv->mch_res,
+        ret = pci_bus_alloc_resource(dev_priv->bridge_dev->bus, &dev_priv->mch_res,
                                      MCHBAR_SIZE, MCHBAR_SIZE,
                                      PCIBIOS_MIN_MEM,
                                      0,   pcibios_align_resource,
-                                     bridge_dev);
+                                     dev_priv->bridge_dev);
         if (ret) {
                 DRM_DEBUG("failed bus alloc: %d\n", ret);
                 dev_priv->mch_res.start = 0;
-                goto out_put;
+                goto out;
         }
 
         if (IS_I965G(dev))
-                pci_write_config_dword(bridge_dev, reg + 4,
+                pci_write_config_dword(dev_priv->bridge_dev, reg + 4,
                                        upper_32_bits(dev_priv->mch_res.start));
 
-        pci_write_config_dword(bridge_dev, reg,
+        pci_write_config_dword(dev_priv->bridge_dev, reg,
                                lower_32_bits(dev_priv->mch_res.start));
-out_put:
-        pci_dev_put(bridge_dev);
 out:
         return ret;
 }
@@ -150,44 +140,36 @@ out:
 static bool
 intel_setup_mchbar(struct drm_device *dev)
 {
-        struct pci_dev *bridge_dev;
+        drm_i915_private_t *dev_priv = dev->dev_private;
         int mchbar_reg = IS_I965G(dev) ? MCHBAR_I965 : MCHBAR_I915;
         u32 temp;
         bool need_disable = false, enabled;
 
-        bridge_dev = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
-        if (!bridge_dev) {
-                DRM_DEBUG("no bridge dev?!\n");
-                goto out;
-        }
-
         if (IS_I915G(dev) || IS_I915GM(dev)) {
-                pci_read_config_dword(bridge_dev, DEVEN_REG, &temp);
+                pci_read_config_dword(dev_priv->bridge_dev, DEVEN_REG, &temp);
                 enabled = !!(temp & DEVEN_MCHBAR_EN);
         } else {
-                pci_read_config_dword(bridge_dev, mchbar_reg, &temp);
+                pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, &temp);
                 enabled = temp & 1;
         }
 
         /* If it's already enabled, don't have to do anything */
         if (enabled)
-                goto out_put;
+                goto out;
 
         if (intel_alloc_mchbar_resource(dev))
-                goto out_put;
+                goto out;
 
         need_disable = true;
 
         /* Space is allocated or reserved, so enable it. */
         if (IS_I915G(dev) || IS_I915GM(dev)) {
-                pci_write_config_dword(bridge_dev, DEVEN_REG,
+                pci_write_config_dword(dev_priv->bridge_dev, DEVEN_REG,
                                        temp | DEVEN_MCHBAR_EN);
         } else {
-                pci_read_config_dword(bridge_dev, mchbar_reg, &temp);
-                pci_write_config_dword(bridge_dev, mchbar_reg, temp | 1);
+                pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, &temp);
+                pci_write_config_dword(dev_priv->bridge_dev, mchbar_reg, temp | 1);
         }
-out_put:
-        pci_dev_put(bridge_dev);
 out:
         return need_disable;
 }
@@ -196,25 +178,18 @@ static void
 intel_teardown_mchbar(struct drm_device *dev, bool disable)
 {
         drm_i915_private_t *dev_priv = dev->dev_private;
-        struct pci_dev *bridge_dev;
         int mchbar_reg = IS_I965G(dev) ? MCHBAR_I965 : MCHBAR_I915;
         u32 temp;
 
-        bridge_dev = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
-        if (!bridge_dev) {
-                DRM_DEBUG("no bridge dev?!\n");
-                return;
-        }
-
         if (disable) {
                 if (IS_I915G(dev) || IS_I915GM(dev)) {
-                        pci_read_config_dword(bridge_dev, DEVEN_REG, &temp);
+                        pci_read_config_dword(dev_priv->bridge_dev, DEVEN_REG, &temp);
                         temp &= ~DEVEN_MCHBAR_EN;
-                        pci_write_config_dword(bridge_dev, DEVEN_REG, temp);
+                        pci_write_config_dword(dev_priv->bridge_dev, DEVEN_REG, temp);
                 } else {
-                        pci_read_config_dword(bridge_dev, mchbar_reg, &temp);
+                        pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, &temp);
                         temp &= ~1;
-                        pci_write_config_dword(bridge_dev, mchbar_reg, temp);
+                        pci_write_config_dword(dev_priv->bridge_dev, mchbar_reg, temp);
                 }
         }