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authorEric Anholt <eric@anholt.net>2012-07-31 18:35:01 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-08-05 15:45:01 -0400
commite844b990b1df9242bb91b7d490552f3198946838 (patch)
treea34b1ea58871de528d9bde144aa0a7f66be91820 /drivers/gpu/drm/i915/i915_gem_execbuffer.c
parent6af2d180f82151cf3d58952e35a4f96e45bc453a (diff)
drm/i915: Don't forget to apply SNB PIPE_CONTROL GTT workaround.
If a buffer that was the target of a PIPE_CONTROL from userland was a reused one that hadn't been evicted which had not previously had this workaround applied, then the early return for a correct presumed_offset in this function meant we would not bind it into the GTT and the write would land somewhere else. Fixes reproducible failures with GL_EXT_timer_query usage in apitrace, and I also expect it to fix the intermittent OQ issues on snb that danvet's been working on. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48019 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=52932 Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Carl Worth <cworth@cworth.org> Tested-by: Carl Worth <cworth@cworth.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_execbuffer.c')
-rw-r--r--drivers/gpu/drm/i915/i915_gem_execbuffer.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 5af631e788c..ff2819ea081 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -291,6 +291,16 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
291 target_i915_obj = to_intel_bo(target_obj); 291 target_i915_obj = to_intel_bo(target_obj);
292 target_offset = target_i915_obj->gtt_offset; 292 target_offset = target_i915_obj->gtt_offset;
293 293
294 /* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
295 * pipe_control writes because the gpu doesn't properly redirect them
296 * through the ppgtt for non_secure batchbuffers. */
297 if (unlikely(IS_GEN6(dev) &&
298 reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
299 !target_i915_obj->has_global_gtt_mapping)) {
300 i915_gem_gtt_bind_object(target_i915_obj,
301 target_i915_obj->cache_level);
302 }
303
294 /* The target buffer should have appeared before us in the 304 /* The target buffer should have appeared before us in the
295 * exec_object list, so it should have a GTT space bound by now. 305 * exec_object list, so it should have a GTT space bound by now.
296 */ 306 */
@@ -399,16 +409,6 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
399 io_mapping_unmap_atomic(reloc_page); 409 io_mapping_unmap_atomic(reloc_page);
400 } 410 }
401 411
402 /* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
403 * pipe_control writes because the gpu doesn't properly redirect them
404 * through the ppgtt for non_secure batchbuffers. */
405 if (unlikely(IS_GEN6(dev) &&
406 reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
407 !target_i915_obj->has_global_gtt_mapping)) {
408 i915_gem_gtt_bind_object(target_i915_obj,
409 target_i915_obj->cache_level);
410 }
411
412 /* and update the user's relocation entry */ 412 /* and update the user's relocation entry */
413 reloc->presumed_offset = target_offset; 413 reloc->presumed_offset = target_offset;
414 414