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authorLee Jones <lee.jones@linaro.org>2012-04-19 16:36:31 -0400
committerLinus Walleij <linus.walleij@linaro.org>2012-04-24 03:36:07 -0400
commita60b57eddaa8af6c02cf7bbeb58ebf82881f08ac (patch)
tree896840b87a4b6e225d0e62bdeb22173cba822731 /drivers/gpio/gpio-nomadik.c
parent513c27f84e283341889ee17737e1e7e9f99ebeb5 (diff)
drivers/gpio: gpio-nomadik: Add support for irqdomains
Add irq domain support to the gpio-nomadik GPIO driver. This enables its users to support dynamic IRQ assignment, which is requried by Device Tree. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio/gpio-nomadik.c')
-rw-r--r--drivers/gpio/gpio-nomadik.c106
1 files changed, 58 insertions, 48 deletions
diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c
index 06addfd797a..9b126b6d79c 100644
--- a/drivers/gpio/gpio-nomadik.c
+++ b/drivers/gpio/gpio-nomadik.c
@@ -22,6 +22,7 @@
22#include <linux/spinlock.h> 22#include <linux/spinlock.h>
23#include <linux/interrupt.h> 23#include <linux/interrupt.h>
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/irqdomain.h>
25#include <linux/slab.h> 26#include <linux/slab.h>
26 27
27#include <asm/mach/irq.h> 28#include <asm/mach/irq.h>
@@ -41,6 +42,7 @@
41 42
42struct nmk_gpio_chip { 43struct nmk_gpio_chip {
43 struct gpio_chip chip; 44 struct gpio_chip chip;
45 struct irq_domain *domain;
44 void __iomem *addr; 46 void __iomem *addr;
45 struct clk *clk; 47 struct clk *clk;
46 unsigned int bank; 48 unsigned int bank;
@@ -393,7 +395,7 @@ static int __nmk_config_pins(pin_cfg_t *cfgs, int num, bool sleep)
393 struct nmk_gpio_chip *nmk_chip; 395 struct nmk_gpio_chip *nmk_chip;
394 int pin = PIN_NUM(cfgs[i]); 396 int pin = PIN_NUM(cfgs[i]);
395 397
396 nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(pin)); 398 nmk_chip = nmk_gpio_chips[pin / NMK_GPIO_PER_CHIP];
397 if (!nmk_chip) { 399 if (!nmk_chip) {
398 ret = -EINVAL; 400 ret = -EINVAL;
399 break; 401 break;
@@ -401,7 +403,7 @@ static int __nmk_config_pins(pin_cfg_t *cfgs, int num, bool sleep)
401 403
402 clk_enable(nmk_chip->clk); 404 clk_enable(nmk_chip->clk);
403 spin_lock(&nmk_chip->lock); 405 spin_lock(&nmk_chip->lock);
404 __nmk_config_pin(nmk_chip, pin - nmk_chip->chip.base, 406 __nmk_config_pin(nmk_chip, pin % NMK_GPIO_PER_CHIP,
405 cfgs[i], sleep, glitch ? slpm : NULL); 407 cfgs[i], sleep, glitch ? slpm : NULL);
406 spin_unlock(&nmk_chip->lock); 408 spin_unlock(&nmk_chip->lock);
407 clk_disable(nmk_chip->clk); 409 clk_disable(nmk_chip->clk);
@@ -485,7 +487,7 @@ int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode)
485 struct nmk_gpio_chip *nmk_chip; 487 struct nmk_gpio_chip *nmk_chip;
486 unsigned long flags; 488 unsigned long flags;
487 489
488 nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio)); 490 nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];
489 if (!nmk_chip) 491 if (!nmk_chip)
490 return -EINVAL; 492 return -EINVAL;
491 493
@@ -493,7 +495,7 @@ int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode)
493 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); 495 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
494 spin_lock(&nmk_chip->lock); 496 spin_lock(&nmk_chip->lock);
495 497
496 __nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip->chip.base, mode); 498 __nmk_gpio_set_slpm(nmk_chip, gpio % NMK_GPIO_PER_CHIP, mode);
497 499
498 spin_unlock(&nmk_chip->lock); 500 spin_unlock(&nmk_chip->lock);
499 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags); 501 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
@@ -520,13 +522,13 @@ int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull)
520 struct nmk_gpio_chip *nmk_chip; 522 struct nmk_gpio_chip *nmk_chip;
521 unsigned long flags; 523 unsigned long flags;
522 524
523 nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio)); 525 nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];
524 if (!nmk_chip) 526 if (!nmk_chip)
525 return -EINVAL; 527 return -EINVAL;
526 528
527 clk_enable(nmk_chip->clk); 529 clk_enable(nmk_chip->clk);
528 spin_lock_irqsave(&nmk_chip->lock, flags); 530 spin_lock_irqsave(&nmk_chip->lock, flags);
529 __nmk_gpio_set_pull(nmk_chip, gpio - nmk_chip->chip.base, pull); 531 __nmk_gpio_set_pull(nmk_chip, gpio % NMK_GPIO_PER_CHIP, pull);
530 spin_unlock_irqrestore(&nmk_chip->lock, flags); 532 spin_unlock_irqrestore(&nmk_chip->lock, flags);
531 clk_disable(nmk_chip->clk); 533 clk_disable(nmk_chip->clk);
532 534
@@ -548,13 +550,13 @@ int nmk_gpio_set_mode(int gpio, int gpio_mode)
548 struct nmk_gpio_chip *nmk_chip; 550 struct nmk_gpio_chip *nmk_chip;
549 unsigned long flags; 551 unsigned long flags;
550 552
551 nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio)); 553 nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];
552 if (!nmk_chip) 554 if (!nmk_chip)
553 return -EINVAL; 555 return -EINVAL;
554 556
555 clk_enable(nmk_chip->clk); 557 clk_enable(nmk_chip->clk);
556 spin_lock_irqsave(&nmk_chip->lock, flags); 558 spin_lock_irqsave(&nmk_chip->lock, flags);
557 __nmk_gpio_set_mode(nmk_chip, gpio - nmk_chip->chip.base, gpio_mode); 559 __nmk_gpio_set_mode(nmk_chip, gpio % NMK_GPIO_PER_CHIP, gpio_mode);
558 spin_unlock_irqrestore(&nmk_chip->lock, flags); 560 spin_unlock_irqrestore(&nmk_chip->lock, flags);
559 clk_disable(nmk_chip->clk); 561 clk_disable(nmk_chip->clk);
560 562
@@ -567,11 +569,11 @@ int nmk_gpio_get_mode(int gpio)
567 struct nmk_gpio_chip *nmk_chip; 569 struct nmk_gpio_chip *nmk_chip;
568 u32 afunc, bfunc, bit; 570 u32 afunc, bfunc, bit;
569 571
570 nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio)); 572 nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];
571 if (!nmk_chip) 573 if (!nmk_chip)
572 return -EINVAL; 574 return -EINVAL;
573 575
574 bit = 1 << (gpio - nmk_chip->chip.base); 576 bit = 1 << (gpio % NMK_GPIO_PER_CHIP);
575 577
576 clk_enable(nmk_chip->clk); 578 clk_enable(nmk_chip->clk);
577 579
@@ -588,21 +590,19 @@ EXPORT_SYMBOL(nmk_gpio_get_mode);
588/* IRQ functions */ 590/* IRQ functions */
589static inline int nmk_gpio_get_bitmask(int gpio) 591static inline int nmk_gpio_get_bitmask(int gpio)
590{ 592{
591 return 1 << (gpio % 32); 593 return 1 << (gpio % NMK_GPIO_PER_CHIP);
592} 594}
593 595
594static void nmk_gpio_irq_ack(struct irq_data *d) 596static void nmk_gpio_irq_ack(struct irq_data *d)
595{ 597{
596 int gpio;
597 struct nmk_gpio_chip *nmk_chip; 598 struct nmk_gpio_chip *nmk_chip;
598 599
599 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
600 nmk_chip = irq_data_get_irq_chip_data(d); 600 nmk_chip = irq_data_get_irq_chip_data(d);
601 if (!nmk_chip) 601 if (!nmk_chip)
602 return; 602 return;
603 603
604 clk_enable(nmk_chip->clk); 604 clk_enable(nmk_chip->clk);
605 writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC); 605 writel(nmk_gpio_get_bitmask(d->hwirq), nmk_chip->addr + NMK_GPIO_IC);
606 clk_disable(nmk_chip->clk); 606 clk_disable(nmk_chip->clk);
607} 607}
608 608
@@ -659,7 +659,7 @@ static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip,
659 * wakeup is anyhow controlled by the RIMSC and FIMSC registers. 659 * wakeup is anyhow controlled by the RIMSC and FIMSC registers.
660 */ 660 */
661 if (nmk_chip->sleepmode && on) { 661 if (nmk_chip->sleepmode && on) {
662 __nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip->chip.base, 662 __nmk_gpio_set_slpm(nmk_chip, gpio % nmk_chip->chip.base,
663 NMK_GPIO_SLPM_WAKEUP_ENABLE); 663 NMK_GPIO_SLPM_WAKEUP_ENABLE);
664 } 664 }
665 665
@@ -668,14 +668,12 @@ static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip,
668 668
669static int nmk_gpio_irq_maskunmask(struct irq_data *d, bool enable) 669static int nmk_gpio_irq_maskunmask(struct irq_data *d, bool enable)
670{ 670{
671 int gpio;
672 struct nmk_gpio_chip *nmk_chip; 671 struct nmk_gpio_chip *nmk_chip;
673 unsigned long flags; 672 unsigned long flags;
674 u32 bitmask; 673 u32 bitmask;
675 674
676 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
677 nmk_chip = irq_data_get_irq_chip_data(d); 675 nmk_chip = irq_data_get_irq_chip_data(d);
678 bitmask = nmk_gpio_get_bitmask(gpio); 676 bitmask = nmk_gpio_get_bitmask(d->hwirq);
679 if (!nmk_chip) 677 if (!nmk_chip)
680 return -EINVAL; 678 return -EINVAL;
681 679
@@ -683,10 +681,10 @@ static int nmk_gpio_irq_maskunmask(struct irq_data *d, bool enable)
683 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); 681 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
684 spin_lock(&nmk_chip->lock); 682 spin_lock(&nmk_chip->lock);
685 683
686 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, enable); 684 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, enable);
687 685
688 if (!(nmk_chip->real_wake & bitmask)) 686 if (!(nmk_chip->real_wake & bitmask))
689 __nmk_gpio_set_wake(nmk_chip, gpio, enable); 687 __nmk_gpio_set_wake(nmk_chip, d->hwirq, enable);
690 688
691 spin_unlock(&nmk_chip->lock); 689 spin_unlock(&nmk_chip->lock);
692 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags); 690 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
@@ -710,20 +708,18 @@ static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
710 struct nmk_gpio_chip *nmk_chip; 708 struct nmk_gpio_chip *nmk_chip;
711 unsigned long flags; 709 unsigned long flags;
712 u32 bitmask; 710 u32 bitmask;
713 int gpio;
714 711
715 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
716 nmk_chip = irq_data_get_irq_chip_data(d); 712 nmk_chip = irq_data_get_irq_chip_data(d);
717 if (!nmk_chip) 713 if (!nmk_chip)
718 return -EINVAL; 714 return -EINVAL;
719 bitmask = nmk_gpio_get_bitmask(gpio); 715 bitmask = nmk_gpio_get_bitmask(d->hwirq);
720 716
721 clk_enable(nmk_chip->clk); 717 clk_enable(nmk_chip->clk);
722 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); 718 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
723 spin_lock(&nmk_chip->lock); 719 spin_lock(&nmk_chip->lock);
724 720
725 if (irqd_irq_disabled(d)) 721 if (irqd_irq_disabled(d))
726 __nmk_gpio_set_wake(nmk_chip, gpio, on); 722 __nmk_gpio_set_wake(nmk_chip, d->hwirq, on);
727 723
728 if (on) 724 if (on)
729 nmk_chip->real_wake |= bitmask; 725 nmk_chip->real_wake |= bitmask;
@@ -741,17 +737,14 @@ static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)
741{ 737{
742 bool enabled = !irqd_irq_disabled(d); 738 bool enabled = !irqd_irq_disabled(d);
743 bool wake = irqd_is_wakeup_set(d); 739 bool wake = irqd_is_wakeup_set(d);
744 int gpio;
745 struct nmk_gpio_chip *nmk_chip; 740 struct nmk_gpio_chip *nmk_chip;
746 unsigned long flags; 741 unsigned long flags;
747 u32 bitmask; 742 u32 bitmask;
748 743
749 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
750 nmk_chip = irq_data_get_irq_chip_data(d); 744 nmk_chip = irq_data_get_irq_chip_data(d);
751 bitmask = nmk_gpio_get_bitmask(gpio); 745 bitmask = nmk_gpio_get_bitmask(d->hwirq);
752 if (!nmk_chip) 746 if (!nmk_chip)
753 return -EINVAL; 747 return -EINVAL;
754
755 if (type & IRQ_TYPE_LEVEL_HIGH) 748 if (type & IRQ_TYPE_LEVEL_HIGH)
756 return -EINVAL; 749 return -EINVAL;
757 if (type & IRQ_TYPE_LEVEL_LOW) 750 if (type & IRQ_TYPE_LEVEL_LOW)
@@ -761,10 +754,10 @@ static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)
761 spin_lock_irqsave(&nmk_chip->lock, flags); 754 spin_lock_irqsave(&nmk_chip->lock, flags);
762 755
763 if (enabled) 756 if (enabled)
764 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, false); 757 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, false);
765 758
766 if (enabled || wake) 759 if (enabled || wake)
767 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, false); 760 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, false);
768 761
769 nmk_chip->edge_rising &= ~bitmask; 762 nmk_chip->edge_rising &= ~bitmask;
770 if (type & IRQ_TYPE_EDGE_RISING) 763 if (type & IRQ_TYPE_EDGE_RISING)
@@ -775,10 +768,10 @@ static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)
775 nmk_chip->edge_falling |= bitmask; 768 nmk_chip->edge_falling |= bitmask;
776 769
777 if (enabled) 770 if (enabled)
778 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, true); 771 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, true);
779 772
780 if (enabled || wake) 773 if (enabled || wake)
781 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, true); 774 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, true);
782 775
783 spin_unlock_irqrestore(&nmk_chip->lock, flags); 776 spin_unlock_irqrestore(&nmk_chip->lock, flags);
784 clk_disable(nmk_chip->clk); 777 clk_disable(nmk_chip->clk);
@@ -824,7 +817,7 @@ static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc,
824 chained_irq_enter(host_chip, desc); 817 chained_irq_enter(host_chip, desc);
825 818
826 nmk_chip = irq_get_handler_data(irq); 819 nmk_chip = irq_get_handler_data(irq);
827 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base); 820 first_irq = nmk_chip->domain->revmap_data.legacy.first_irq;
828 while (status) { 821 while (status) {
829 int bit = __ffs(status); 822 int bit = __ffs(status);
830 823
@@ -858,18 +851,6 @@ static void nmk_gpio_secondary_irq_handler(unsigned int irq,
858 851
859static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip) 852static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
860{ 853{
861 unsigned int first_irq;
862 int i;
863
864 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
865 for (i = first_irq; i < first_irq + nmk_chip->chip.ngpio; i++) {
866 irq_set_chip_and_handler(i, &nmk_gpio_irq_chip,
867 handle_edge_irq);
868 set_irq_flags(i, IRQF_VALID);
869 irq_set_chip_data(i, nmk_chip);
870 irq_set_irq_type(i, IRQ_TYPE_EDGE_FALLING);
871 }
872
873 irq_set_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler); 854 irq_set_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
874 irq_set_handler_data(nmk_chip->parent_irq, nmk_chip); 855 irq_set_handler_data(nmk_chip->parent_irq, nmk_chip);
875 856
@@ -946,7 +927,7 @@ static int nmk_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
946 struct nmk_gpio_chip *nmk_chip = 927 struct nmk_gpio_chip *nmk_chip =
947 container_of(chip, struct nmk_gpio_chip, chip); 928 container_of(chip, struct nmk_gpio_chip, chip);
948 929
949 return NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base) + offset; 930 return irq_find_mapping(nmk_chip->domain, offset);
950} 931}
951 932
952#ifdef CONFIG_DEBUG_FS 933#ifdef CONFIG_DEBUG_FS
@@ -1129,6 +1110,27 @@ void nmk_gpio_read_pull(int gpio_bank, u32 *pull_up)
1129 } 1110 }
1130} 1111}
1131 1112
1113int nmk_gpio_irq_map(struct irq_domain *d, unsigned int irq,
1114 irq_hw_number_t hwirq)
1115{
1116 struct nmk_gpio_chip *nmk_chip = d->host_data;
1117
1118 if (!nmk_chip)
1119 return -EINVAL;
1120
1121 irq_set_chip_and_handler(irq, &nmk_gpio_irq_chip, handle_edge_irq);
1122 set_irq_flags(irq, IRQF_VALID);
1123 irq_set_chip_data(irq, nmk_chip);
1124 irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
1125
1126 return 0;
1127}
1128
1129const struct irq_domain_ops nmk_gpio_irq_simple_ops = {
1130 .map = nmk_gpio_irq_map,
1131 .xlate = irq_domain_xlate_twocell,
1132};
1133
1132static int __devinit nmk_gpio_probe(struct platform_device *dev) 1134static int __devinit nmk_gpio_probe(struct platform_device *dev)
1133{ 1135{
1134 struct nmk_gpio_platform_data *pdata = dev->dev.platform_data; 1136 struct nmk_gpio_platform_data *pdata = dev->dev.platform_data;
@@ -1158,7 +1160,7 @@ static int __devinit nmk_gpio_probe(struct platform_device *dev)
1158 if (of_property_read_u32(np, "gpio-bank", &dev->id)) { 1160 if (of_property_read_u32(np, "gpio-bank", &dev->id)) {
1159 dev_err(&dev->dev, "gpio-bank property not found\n"); 1161 dev_err(&dev->dev, "gpio-bank property not found\n");
1160 ret = -EINVAL; 1162 ret = -EINVAL;
1161 goto out_dt; 1163 goto out;
1162 } 1164 }
1163 1165
1164 pdata->first_gpio = dev->id * NMK_GPIO_PER_CHIP; 1166 pdata->first_gpio = dev->id * NMK_GPIO_PER_CHIP;
@@ -1245,6 +1247,15 @@ static int __devinit nmk_gpio_probe(struct platform_device *dev)
1245 1247
1246 platform_set_drvdata(dev, nmk_chip); 1248 platform_set_drvdata(dev, nmk_chip);
1247 1249
1250 nmk_chip->domain = irq_domain_add_legacy(np, NMK_GPIO_PER_CHIP,
1251 NOMADIK_GPIO_TO_IRQ(pdata->first_gpio),
1252 0, &nmk_gpio_irq_simple_ops, nmk_chip);
1253 if (!nmk_chip->domain) {
1254 pr_err("%s: Failed to create irqdomain\n", np->full_name);
1255 ret = -ENOSYS;
1256 goto out_free;
1257 }
1258
1248 nmk_gpio_init_irq(nmk_chip); 1259 nmk_gpio_init_irq(nmk_chip);
1249 1260
1250 dev_info(&dev->dev, "at address %p\n", nmk_chip->addr); 1261 dev_info(&dev->dev, "at address %p\n", nmk_chip->addr);
@@ -1263,7 +1274,6 @@ out_release:
1263out: 1274out:
1264 dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret, 1275 dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret,
1265 pdata->first_gpio, pdata->first_gpio+31); 1276 pdata->first_gpio, pdata->first_gpio+31);
1266out_dt:
1267 if (np) 1277 if (np)
1268 kfree(pdata); 1278 kfree(pdata);
1269 1279