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authorRussell King - ARM Linux <linux@arm.linux.org.uk>2011-07-21 12:13:28 -0400
committerVinod Koul <vinod.koul@intel.com>2011-07-26 06:03:28 -0400
commitaa88cdaa149e1c1cfc935ff73e50f3f9f3b2e3a1 (patch)
tree41db69e250a533817ad53e8f88dc40ae5a67ca09 /drivers/dma
parentfa020e7d046436cb6642b23dc95012a3064d77e2 (diff)
DMA: PL08x: cleanup selection of buswidth
Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma')
-rw-r--r--drivers/dma/amba-pl08x.c34
1 files changed, 19 insertions, 15 deletions
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c
index ba617e3f23f..2dd37ff753c 100644
--- a/drivers/dma/amba-pl08x.c
+++ b/drivers/dma/amba-pl08x.c
@@ -1105,13 +1105,26 @@ static u32 pl08x_cctl(u32 cctl)
1105 return cctl | PL080_CONTROL_PROT_SYS; 1105 return cctl | PL080_CONTROL_PROT_SYS;
1106} 1106}
1107 1107
1108static u32 pl08x_width(enum dma_slave_buswidth width)
1109{
1110 switch (width) {
1111 case DMA_SLAVE_BUSWIDTH_1_BYTE:
1112 return PL080_WIDTH_8BIT;
1113 case DMA_SLAVE_BUSWIDTH_2_BYTES:
1114 return PL080_WIDTH_16BIT;
1115 case DMA_SLAVE_BUSWIDTH_4_BYTES:
1116 return PL080_WIDTH_32BIT;
1117 }
1118 return ~0;
1119}
1120
1108static int dma_set_runtime_config(struct dma_chan *chan, 1121static int dma_set_runtime_config(struct dma_chan *chan,
1109 struct dma_slave_config *config) 1122 struct dma_slave_config *config)
1110{ 1123{
1111 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); 1124 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
1112 struct pl08x_driver_data *pl08x = plchan->host; 1125 struct pl08x_driver_data *pl08x = plchan->host;
1113 enum dma_slave_buswidth addr_width; 1126 enum dma_slave_buswidth addr_width;
1114 u32 maxburst; 1127 u32 width, maxburst;
1115 u32 cctl = 0; 1128 u32 cctl = 0;
1116 int i; 1129 int i;
1117 1130
@@ -1132,25 +1145,16 @@ static int dma_set_runtime_config(struct dma_chan *chan,
1132 return -EINVAL; 1145 return -EINVAL;
1133 } 1146 }
1134 1147
1135 switch (addr_width) { 1148 width = pl08x_width(addr_width);
1136 case DMA_SLAVE_BUSWIDTH_1_BYTE: 1149 if (width == ~0) {
1137 cctl |= (PL080_WIDTH_8BIT << PL080_CONTROL_SWIDTH_SHIFT) |
1138 (PL080_WIDTH_8BIT << PL080_CONTROL_DWIDTH_SHIFT);
1139 break;
1140 case DMA_SLAVE_BUSWIDTH_2_BYTES:
1141 cctl |= (PL080_WIDTH_16BIT << PL080_CONTROL_SWIDTH_SHIFT) |
1142 (PL080_WIDTH_16BIT << PL080_CONTROL_DWIDTH_SHIFT);
1143 break;
1144 case DMA_SLAVE_BUSWIDTH_4_BYTES:
1145 cctl |= (PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT) |
1146 (PL080_WIDTH_32BIT << PL080_CONTROL_DWIDTH_SHIFT);
1147 break;
1148 default:
1149 dev_err(&pl08x->adev->dev, 1150 dev_err(&pl08x->adev->dev,
1150 "bad runtime_config: alien address width\n"); 1151 "bad runtime_config: alien address width\n");
1151 return -EINVAL; 1152 return -EINVAL;
1152 } 1153 }
1153 1154
1155 cctl |= width << PL080_CONTROL_SWIDTH_SHIFT;
1156 cctl |= width << PL080_CONTROL_DWIDTH_SHIFT;
1157
1154 /* 1158 /*
1155 * Now decide on a maxburst: 1159 * Now decide on a maxburst:
1156 * If this channel will only request single transfers, set this 1160 * If this channel will only request single transfers, set this