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authorHerbert Xu <herbert@gondor.apana.org.au>2009-07-14 08:21:46 -0400
committerHerbert Xu <herbert@gondor.apana.org.au>2009-07-14 08:21:46 -0400
commit4dc10c0142ce0af8c20ec44dc6928ae63ad4f73a (patch)
tree0554a3c5210e86f0cf4ada5b370f500f687d3514 /drivers/crypto/amcc/crypto4xx_core.c
parent0b535adfb102bac1edb046444172b6b77d99bc92 (diff)
crypto: crypto4xx - Switch to new style ahash
This patch changes crypto4xx to use the new style ahash type. In particular, we now use ahash_alg to define ahash algorithms instead of crypto_alg. This is achieved by introducing a union that encapsulates the new type and the existing crypto_alg structure. They're told apart through a u32 field containing the type value. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/amcc/crypto4xx_core.c')
-rw-r--r--drivers/crypto/amcc/crypto4xx_core.c85
1 files changed, 49 insertions, 36 deletions
diff --git a/drivers/crypto/amcc/crypto4xx_core.c b/drivers/crypto/amcc/crypto4xx_core.c
index cb7be4283aa..857e35efeda 100644
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
@@ -31,8 +31,6 @@
31#include <asm/dcr.h> 31#include <asm/dcr.h>
32#include <asm/dcr-regs.h> 32#include <asm/dcr-regs.h>
33#include <asm/cacheflush.h> 33#include <asm/cacheflush.h>
34#include <crypto/internal/hash.h>
35#include <crypto/algapi.h>
36#include <crypto/aes.h> 34#include <crypto/aes.h>
37#include <crypto/sha.h> 35#include <crypto/sha.h>
38#include "crypto4xx_reg_def.h" 36#include "crypto4xx_reg_def.h"
@@ -998,11 +996,15 @@ static int crypto4xx_alg_init(struct crypto_tfm *tfm)
998 ctx->sa_out_dma_addr = 0; 996 ctx->sa_out_dma_addr = 0;
999 ctx->sa_len = 0; 997 ctx->sa_len = 0;
1000 998
1001 if (alg->cra_type == &crypto_ablkcipher_type) 999 switch (alg->cra_flags & CRYPTO_ALG_TYPE_MASK) {
1000 default:
1002 tfm->crt_ablkcipher.reqsize = sizeof(struct crypto4xx_ctx); 1001 tfm->crt_ablkcipher.reqsize = sizeof(struct crypto4xx_ctx);
1003 else if (alg->cra_type == &crypto_ahash_type) 1002 break;
1003 case CRYPTO_ALG_TYPE_AHASH:
1004 crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm), 1004 crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
1005 sizeof(struct crypto4xx_ctx)); 1005 sizeof(struct crypto4xx_ctx));
1006 break;
1007 }
1006 1008
1007 return 0; 1009 return 0;
1008} 1010}
@@ -1016,7 +1018,8 @@ static void crypto4xx_alg_exit(struct crypto_tfm *tfm)
1016} 1018}
1017 1019
1018int crypto4xx_register_alg(struct crypto4xx_device *sec_dev, 1020int crypto4xx_register_alg(struct crypto4xx_device *sec_dev,
1019 struct crypto_alg *crypto_alg, int array_size) 1021 struct crypto4xx_alg_common *crypto_alg,
1022 int array_size)
1020{ 1023{
1021 struct crypto4xx_alg *alg; 1024 struct crypto4xx_alg *alg;
1022 int i; 1025 int i;
@@ -1028,13 +1031,18 @@ int crypto4xx_register_alg(struct crypto4xx_device *sec_dev,
1028 return -ENOMEM; 1031 return -ENOMEM;
1029 1032
1030 alg->alg = crypto_alg[i]; 1033 alg->alg = crypto_alg[i];
1031 INIT_LIST_HEAD(&alg->alg.cra_list);
1032 if (alg->alg.cra_init == NULL)
1033 alg->alg.cra_init = crypto4xx_alg_init;
1034 if (alg->alg.cra_exit == NULL)
1035 alg->alg.cra_exit = crypto4xx_alg_exit;
1036 alg->dev = sec_dev; 1034 alg->dev = sec_dev;
1037 rc = crypto_register_alg(&alg->alg); 1035
1036 switch (alg->alg.type) {
1037 case CRYPTO_ALG_TYPE_AHASH:
1038 rc = crypto_register_ahash(&alg->alg.u.hash);
1039 break;
1040
1041 default:
1042 rc = crypto_register_alg(&alg->alg.u.cipher);
1043 break;
1044 }
1045
1038 if (rc) { 1046 if (rc) {
1039 list_del(&alg->entry); 1047 list_del(&alg->entry);
1040 kfree(alg); 1048 kfree(alg);
@@ -1052,7 +1060,14 @@ static void crypto4xx_unregister_alg(struct crypto4xx_device *sec_dev)
1052 1060
1053 list_for_each_entry_safe(alg, tmp, &sec_dev->alg_list, entry) { 1061 list_for_each_entry_safe(alg, tmp, &sec_dev->alg_list, entry) {
1054 list_del(&alg->entry); 1062 list_del(&alg->entry);
1055 crypto_unregister_alg(&alg->alg); 1063 switch (alg->alg.type) {
1064 case CRYPTO_ALG_TYPE_AHASH:
1065 crypto_unregister_ahash(&alg->alg.u.hash);
1066 break;
1067
1068 default:
1069 crypto_unregister_alg(&alg->alg.u.cipher);
1070 }
1056 kfree(alg); 1071 kfree(alg);
1057 } 1072 }
1058} 1073}
@@ -1105,17 +1120,18 @@ static irqreturn_t crypto4xx_ce_interrupt_handler(int irq, void *data)
1105/** 1120/**
1106 * Supported Crypto Algorithms 1121 * Supported Crypto Algorithms
1107 */ 1122 */
1108struct crypto_alg crypto4xx_alg[] = { 1123struct crypto4xx_alg_common crypto4xx_alg[] = {
1109 /* Crypto AES modes */ 1124 /* Crypto AES modes */
1110 { 1125 { .type = CRYPTO_ALG_TYPE_ABLKCIPHER, .u.cipher = {
1111 .cra_name = "cbc(aes)", 1126 .cra_name = "cbc(aes)",
1112 .cra_driver_name = "cbc-aes-ppc4xx", 1127 .cra_driver_name = "cbc-aes-ppc4xx",
1113 .cra_priority = CRYPTO4XX_CRYPTO_PRIORITY, 1128 .cra_priority = CRYPTO4XX_CRYPTO_PRIORITY,
1114 .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC, 1129 .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
1115 .cra_blocksize = AES_BLOCK_SIZE, 1130 .cra_blocksize = AES_BLOCK_SIZE,
1116 .cra_ctxsize = sizeof(struct crypto4xx_ctx), 1131 .cra_ctxsize = sizeof(struct crypto4xx_ctx),
1117 .cra_alignmask = 0,
1118 .cra_type = &crypto_ablkcipher_type, 1132 .cra_type = &crypto_ablkcipher_type,
1133 .cra_init = crypto4xx_alg_init,
1134 .cra_exit = crypto4xx_alg_exit,
1119 .cra_module = THIS_MODULE, 1135 .cra_module = THIS_MODULE,
1120 .cra_u = { 1136 .cra_u = {
1121 .ablkcipher = { 1137 .ablkcipher = {
@@ -1127,29 +1143,26 @@ struct crypto_alg crypto4xx_alg[] = {
1127 .decrypt = crypto4xx_decrypt, 1143 .decrypt = crypto4xx_decrypt,
1128 } 1144 }
1129 } 1145 }
1130 }, 1146 }},
1131 /* Hash SHA1 */ 1147 /* Hash SHA1 */
1132 { 1148 { .type = CRYPTO_ALG_TYPE_AHASH, .u.hash = {
1133 .cra_name = "sha1", 1149 .init = crypto4xx_hash_init,
1134 .cra_driver_name = "sha1-ppc4xx", 1150 .update = crypto4xx_hash_update,
1135 .cra_priority = CRYPTO4XX_CRYPTO_PRIORITY, 1151 .final = crypto4xx_hash_final,
1136 .cra_flags = CRYPTO_ALG_TYPE_AHASH | CRYPTO_ALG_ASYNC, 1152 .digest = crypto4xx_hash_digest,
1137 .cra_blocksize = SHA1_BLOCK_SIZE, 1153 .halg.digestsize = SHA1_DIGEST_SIZE,
1138 .cra_ctxsize = sizeof(struct crypto4xx_ctx), 1154 .halg.base = {
1139 .cra_alignmask = 0, 1155 .cra_name = "sha1",
1140 .cra_type = &crypto_ahash_type, 1156 .cra_driver_name = "sha1-ppc4xx",
1141 .cra_init = crypto4xx_sha1_alg_init, 1157 .cra_priority = CRYPTO4XX_CRYPTO_PRIORITY,
1142 .cra_module = THIS_MODULE, 1158 .cra_flags = CRYPTO_ALG_ASYNC,
1143 .cra_u = { 1159 .cra_blocksize = SHA1_BLOCK_SIZE,
1144 .ahash = { 1160 .cra_ctxsize = sizeof(struct crypto4xx_ctx),
1145 .digestsize = SHA1_DIGEST_SIZE, 1161 .cra_init = crypto4xx_sha1_alg_init,
1146 .init = crypto4xx_hash_init, 1162 .cra_exit = crypto4xx_alg_exit,
1147 .update = crypto4xx_hash_update, 1163 .cra_module = THIS_MODULE,
1148 .final = crypto4xx_hash_final,
1149 .digest = crypto4xx_hash_digest,
1150 }
1151 } 1164 }
1152 }, 1165 }},
1153}; 1166};
1154 1167
1155/** 1168/**