diff options
author | Ingo Molnar <mingo@elte.hu> | 2009-01-28 13:34:09 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2009-01-29 08:16:51 -0500 |
commit | 1164dd0099c0d79146a55319670f57ab7ad1d352 (patch) | |
tree | b6605a9f5cc12518f65551ccf31a5b6ea3377585 /drivers/clocksource | |
parent | 7b38725318f4517af6168ccbff99060d67aba1c8 (diff) |
x86: move mach-default/*.h files to asm/
We are getting rid of subarchitecture support - move the hook files
to asm/. (These are now stale and should be replaced with more explicit
runtime mechanisms - but the transition is simpler this way.)
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'drivers/clocksource')
-rw-r--r-- | drivers/clocksource/acpi_pm.c | 2 | ||||
-rw-r--r-- | drivers/clocksource/cyclone.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clocksource/acpi_pm.c b/drivers/clocksource/acpi_pm.c index e1129fad96d..ee19b6e8fcb 100644 --- a/drivers/clocksource/acpi_pm.c +++ b/drivers/clocksource/acpi_pm.c | |||
@@ -143,7 +143,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_LE, | |||
143 | #endif | 143 | #endif |
144 | 144 | ||
145 | #ifndef CONFIG_X86_64 | 145 | #ifndef CONFIG_X86_64 |
146 | #include "mach_timer.h" | 146 | #include <asm/mach_timer.h> |
147 | #define PMTMR_EXPECTED_RATE \ | 147 | #define PMTMR_EXPECTED_RATE \ |
148 | ((CALIBRATE_LATCH * (PMTMR_TICKS_PER_SEC >> 10)) / (CLOCK_TICK_RATE>>10)) | 148 | ((CALIBRATE_LATCH * (PMTMR_TICKS_PER_SEC >> 10)) / (CLOCK_TICK_RATE>>10)) |
149 | /* | 149 | /* |
diff --git a/drivers/clocksource/cyclone.c b/drivers/clocksource/cyclone.c index 1bde303b970..8615059a872 100644 --- a/drivers/clocksource/cyclone.c +++ b/drivers/clocksource/cyclone.c | |||
@@ -7,7 +7,7 @@ | |||
7 | #include <asm/pgtable.h> | 7 | #include <asm/pgtable.h> |
8 | #include <asm/io.h> | 8 | #include <asm/io.h> |
9 | 9 | ||
10 | #include "mach_timer.h" | 10 | #include <asm/mach_timer.h> |
11 | 11 | ||
12 | #define CYCLONE_CBAR_ADDR 0xFEB00CD0 /* base address ptr */ | 12 | #define CYCLONE_CBAR_ADDR 0xFEB00CD0 /* base address ptr */ |
13 | #define CYCLONE_PMCC_OFFSET 0x51A0 /* offset to control register */ | 13 | #define CYCLONE_PMCC_OFFSET 0x51A0 /* offset to control register */ |