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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-03-29 23:04:53 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-03-29 23:04:53 -0400
commit9ff9a26b786c35ee8d2a66222924a807ec851a9f (patch)
treedb432a17bccca1ca2c16907f0ee83ac449ed4012 /drivers/ata
parent0a3108beea9143225119d5e7c72a8e2c64f3eb7d (diff)
parent0d34fb8e93ceba7b6dad0062dbb4a0813bacd75b (diff)
Merge commit 'origin/master' into next
Manual merge of: arch/powerpc/include/asm/elf.h drivers/i2c/busses/i2c-mpc.c
Diffstat (limited to 'drivers/ata')
-rw-r--r--drivers/ata/ahci.c31
-rw-r--r--drivers/ata/ata_generic.c4
-rw-r--r--drivers/ata/ata_piix.c60
-rw-r--r--drivers/ata/libata-core.c14
-rw-r--r--drivers/ata/libata-eh.c19
-rw-r--r--drivers/ata/libata-sff.c91
-rw-r--r--drivers/ata/libata.h2
-rw-r--r--drivers/ata/pata_acpi.c6
-rw-r--r--drivers/ata/pata_ali.c28
-rw-r--r--drivers/ata/pata_amd.c70
-rw-r--r--drivers/ata/pata_artop.c49
-rw-r--r--drivers/ata/pata_at32.c4
-rw-r--r--drivers/ata/pata_atiixp.c6
-rw-r--r--drivers/ata/pata_bf54x.c2
-rw-r--r--drivers/ata/pata_cmd640.c2
-rw-r--r--drivers/ata/pata_cmd64x.c24
-rw-r--r--drivers/ata/pata_cs5520.c2
-rw-r--r--drivers/ata/pata_cs5530.c8
-rw-r--r--drivers/ata/pata_cs5535.c4
-rw-r--r--drivers/ata/pata_cs5536.c4
-rw-r--r--drivers/ata/pata_cypress.c4
-rw-r--r--drivers/ata/pata_efar.c6
-rw-r--r--drivers/ata/pata_hpt366.c4
-rw-r--r--drivers/ata/pata_hpt37x.c28
-rw-r--r--drivers/ata/pata_hpt3x2n.c4
-rw-r--r--drivers/ata/pata_hpt3x3.c6
-rw-r--r--drivers/ata/pata_icside.c23
-rw-r--r--drivers/ata/pata_isapnp.c14
-rw-r--r--drivers/ata/pata_it8213.c4
-rw-r--r--drivers/ata/pata_it821x.c16
-rw-r--r--drivers/ata/pata_ixp4xx_cf.c2
-rw-r--r--drivers/ata/pata_jmicron.c4
-rw-r--r--drivers/ata/pata_legacy.c2
-rw-r--r--drivers/ata/pata_marvell.c8
-rw-r--r--drivers/ata/pata_mpc52xx.c4
-rw-r--r--drivers/ata/pata_mpiix.c2
-rw-r--r--drivers/ata/pata_netcell.c4
-rw-r--r--drivers/ata/pata_ninja32.c2
-rw-r--r--drivers/ata/pata_ns87410.c2
-rw-r--r--drivers/ata/pata_ns87415.c8
-rw-r--r--drivers/ata/pata_octeon_cf.c4
-rw-r--r--drivers/ata/pata_oldpiix.c4
-rw-r--r--drivers/ata/pata_opti.c2
-rw-r--r--drivers/ata/pata_optidma.c10
-rw-r--r--drivers/ata/pata_pcmcia.c36
-rw-r--r--drivers/ata/pata_pdc2027x.c12
-rw-r--r--drivers/ata/pata_pdc202xx_old.c12
-rw-r--r--drivers/ata/pata_qdi.c4
-rw-r--r--drivers/ata/pata_radisys.c6
-rw-r--r--drivers/ata/pata_rb532_cf.c64
-rw-r--r--drivers/ata/pata_rz1000.c2
-rw-r--r--drivers/ata/pata_sc1200.c35
-rw-r--r--drivers/ata/pata_scc.c4
-rw-r--r--drivers/ata/pata_sch.c6
-rw-r--r--drivers/ata/pata_serverworks.c20
-rw-r--r--drivers/ata/pata_sil680.c8
-rw-r--r--drivers/ata/pata_sis.c32
-rw-r--r--drivers/ata/pata_sl82c105.c6
-rw-r--r--drivers/ata/pata_triflex.c4
-rw-r--r--drivers/ata/pata_via.c24
-rw-r--r--drivers/ata/pata_winbond.c2
-rw-r--r--drivers/ata/pdc_adma.c4
-rw-r--r--drivers/ata/sata_fsl.c4
-rw-r--r--drivers/ata/sata_inic162x.c4
-rw-r--r--drivers/ata/sata_mv.c868
-rw-r--r--drivers/ata/sata_nv.c7
-rw-r--r--drivers/ata/sata_promise.c30
-rw-r--r--drivers/ata/sata_qstor.c3
-rw-r--r--drivers/ata/sata_sil.c16
-rw-r--r--drivers/ata/sata_sil24.c18
-rw-r--r--drivers/ata/sata_sis.c4
-rw-r--r--drivers/ata/sata_svw.c16
-rw-r--r--drivers/ata/sata_sx4.c4
-rw-r--r--drivers/ata/sata_uli.c2
-rw-r--r--drivers/ata/sata_via.c16
-rw-r--r--drivers/ata/sata_vsc.c7
76 files changed, 1319 insertions, 558 deletions
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 66e012cd327..788bba2b1e1 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -404,7 +404,7 @@ static const struct ata_port_info ahci_port_info[] = {
404 /* board_ahci */ 404 /* board_ahci */
405 { 405 {
406 .flags = AHCI_FLAG_COMMON, 406 .flags = AHCI_FLAG_COMMON,
407 .pio_mask = 0x1f, /* pio0-4 */ 407 .pio_mask = ATA_PIO4,
408 .udma_mask = ATA_UDMA6, 408 .udma_mask = ATA_UDMA6,
409 .port_ops = &ahci_ops, 409 .port_ops = &ahci_ops,
410 }, 410 },
@@ -412,7 +412,7 @@ static const struct ata_port_info ahci_port_info[] = {
412 { 412 {
413 AHCI_HFLAGS (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_PMP), 413 AHCI_HFLAGS (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_PMP),
414 .flags = AHCI_FLAG_COMMON, 414 .flags = AHCI_FLAG_COMMON,
415 .pio_mask = 0x1f, /* pio0-4 */ 415 .pio_mask = ATA_PIO4,
416 .udma_mask = ATA_UDMA6, 416 .udma_mask = ATA_UDMA6,
417 .port_ops = &ahci_vt8251_ops, 417 .port_ops = &ahci_vt8251_ops,
418 }, 418 },
@@ -420,7 +420,7 @@ static const struct ata_port_info ahci_port_info[] = {
420 { 420 {
421 AHCI_HFLAGS (AHCI_HFLAG_IGN_IRQ_IF_ERR), 421 AHCI_HFLAGS (AHCI_HFLAG_IGN_IRQ_IF_ERR),
422 .flags = AHCI_FLAG_COMMON, 422 .flags = AHCI_FLAG_COMMON,
423 .pio_mask = 0x1f, /* pio0-4 */ 423 .pio_mask = ATA_PIO4,
424 .udma_mask = ATA_UDMA6, 424 .udma_mask = ATA_UDMA6,
425 .port_ops = &ahci_ops, 425 .port_ops = &ahci_ops,
426 }, 426 },
@@ -430,7 +430,7 @@ static const struct ata_port_info ahci_port_info[] = {
430 AHCI_HFLAG_32BIT_ONLY | AHCI_HFLAG_NO_MSI | 430 AHCI_HFLAG_32BIT_ONLY | AHCI_HFLAG_NO_MSI |
431 AHCI_HFLAG_SECT255), 431 AHCI_HFLAG_SECT255),
432 .flags = AHCI_FLAG_COMMON, 432 .flags = AHCI_FLAG_COMMON,
433 .pio_mask = 0x1f, /* pio0-4 */ 433 .pio_mask = ATA_PIO4,
434 .udma_mask = ATA_UDMA6, 434 .udma_mask = ATA_UDMA6,
435 .port_ops = &ahci_sb600_ops, 435 .port_ops = &ahci_sb600_ops,
436 }, 436 },
@@ -440,7 +440,7 @@ static const struct ata_port_info ahci_port_info[] = {
440 AHCI_HFLAG_MV_PATA | AHCI_HFLAG_NO_PMP), 440 AHCI_HFLAG_MV_PATA | AHCI_HFLAG_NO_PMP),
441 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 441 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
442 ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA, 442 ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA,
443 .pio_mask = 0x1f, /* pio0-4 */ 443 .pio_mask = ATA_PIO4,
444 .udma_mask = ATA_UDMA6, 444 .udma_mask = ATA_UDMA6,
445 .port_ops = &ahci_ops, 445 .port_ops = &ahci_ops,
446 }, 446 },
@@ -448,7 +448,7 @@ static const struct ata_port_info ahci_port_info[] = {
448 { 448 {
449 AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL), 449 AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL),
450 .flags = AHCI_FLAG_COMMON, 450 .flags = AHCI_FLAG_COMMON,
451 .pio_mask = 0x1f, /* pio0-4 */ 451 .pio_mask = ATA_PIO4,
452 .udma_mask = ATA_UDMA6, 452 .udma_mask = ATA_UDMA6,
453 .port_ops = &ahci_sb600_ops, 453 .port_ops = &ahci_sb600_ops,
454 }, 454 },
@@ -456,7 +456,7 @@ static const struct ata_port_info ahci_port_info[] = {
456 { 456 {
457 AHCI_HFLAGS (AHCI_HFLAG_YES_NCQ), 457 AHCI_HFLAGS (AHCI_HFLAG_YES_NCQ),
458 .flags = AHCI_FLAG_COMMON, 458 .flags = AHCI_FLAG_COMMON,
459 .pio_mask = 0x1f, /* pio0-4 */ 459 .pio_mask = ATA_PIO4,
460 .udma_mask = ATA_UDMA6, 460 .udma_mask = ATA_UDMA6,
461 .port_ops = &ahci_ops, 461 .port_ops = &ahci_ops,
462 }, 462 },
@@ -464,7 +464,7 @@ static const struct ata_port_info ahci_port_info[] = {
464 { 464 {
465 AHCI_HFLAGS (AHCI_HFLAG_NO_PMP), 465 AHCI_HFLAGS (AHCI_HFLAG_NO_PMP),
466 .flags = AHCI_FLAG_COMMON, 466 .flags = AHCI_FLAG_COMMON,
467 .pio_mask = 0x1f, /* pio0-4 */ 467 .pio_mask = ATA_PIO4,
468 .udma_mask = ATA_UDMA6, 468 .udma_mask = ATA_UDMA6,
469 .port_ops = &ahci_ops, 469 .port_ops = &ahci_ops,
470 }, 470 },
@@ -1348,7 +1348,7 @@ static ssize_t ahci_transmit_led_message(struct ata_port *ap, u32 state,
1348 writel(message[1], mmio + hpriv->em_loc+4); 1348 writel(message[1], mmio + hpriv->em_loc+4);
1349 1349
1350 /* save off new led state for port/slot */ 1350 /* save off new led state for port/slot */
1351 emp->led_state = message[1]; 1351 emp->led_state = state;
1352 1352
1353 /* 1353 /*
1354 * tell hardware to transmit the message 1354 * tell hardware to transmit the message
@@ -2565,6 +2565,15 @@ static bool ahci_broken_system_poweroff(struct pci_dev *pdev)
2565 /* PCI slot number of the controller */ 2565 /* PCI slot number of the controller */
2566 .driver_data = (void *)0x1FUL, 2566 .driver_data = (void *)0x1FUL,
2567 }, 2567 },
2568 {
2569 .ident = "HP Compaq 6720s",
2570 .matches = {
2571 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
2572 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq 6720s"),
2573 },
2574 /* PCI slot number of the controller */
2575 .driver_data = (void *)0x1FUL,
2576 },
2568 2577
2569 { } /* terminate list */ 2578 { } /* terminate list */
2570 }; 2579 };
@@ -2647,8 +2656,8 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2647 if (board_id == board_ahci_sb700 && pdev->revision >= 0x40) 2656 if (board_id == board_ahci_sb700 && pdev->revision >= 0x40)
2648 hpriv->flags &= ~AHCI_HFLAG_IGN_SERR_INTERNAL; 2657 hpriv->flags &= ~AHCI_HFLAG_IGN_SERR_INTERNAL;
2649 2658
2650 if ((hpriv->flags & AHCI_HFLAG_NO_MSI) || pci_enable_msi(pdev)) 2659 if (!(hpriv->flags & AHCI_HFLAG_NO_MSI))
2651 pci_intx(pdev, 1); 2660 pci_enable_msi(pdev);
2652 2661
2653 /* save initial config */ 2662 /* save initial config */
2654 ahci_save_initial_config(pdev, hpriv); 2663 ahci_save_initial_config(pdev, hpriv);
diff --git a/drivers/ata/ata_generic.c b/drivers/ata/ata_generic.c
index dc48a6398ab..ecfd22b4f1c 100644
--- a/drivers/ata/ata_generic.c
+++ b/drivers/ata/ata_generic.c
@@ -118,8 +118,8 @@ static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id
118 u16 command; 118 u16 command;
119 static const struct ata_port_info info = { 119 static const struct ata_port_info info = {
120 .flags = ATA_FLAG_SLAVE_POSS, 120 .flags = ATA_FLAG_SLAVE_POSS,
121 .pio_mask = 0x1f, 121 .pio_mask = ATA_PIO4,
122 .mwdma_mask = 0x07, 122 .mwdma_mask = ATA_MWDMA2,
123 .udma_mask = ATA_UDMA5, 123 .udma_mask = ATA_UDMA5,
124 .port_ops = &generic_port_ops 124 .port_ops = &generic_port_ops
125 }; 125 };
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index ef8b30d577b..e5cbe80ce17 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -446,34 +446,34 @@ static struct ata_port_info piix_port_info[] = {
446 [piix_pata_mwdma] = /* PIIX3 MWDMA only */ 446 [piix_pata_mwdma] = /* PIIX3 MWDMA only */
447 { 447 {
448 .flags = PIIX_PATA_FLAGS, 448 .flags = PIIX_PATA_FLAGS,
449 .pio_mask = 0x1f, /* pio0-4 */ 449 .pio_mask = ATA_PIO4,
450 .mwdma_mask = 0x06, /* mwdma1-2 ?? CHECK 0 should be ok but slow */ 450 .mwdma_mask = ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
451 .port_ops = &piix_pata_ops, 451 .port_ops = &piix_pata_ops,
452 }, 452 },
453 453
454 [piix_pata_33] = /* PIIX4 at 33MHz */ 454 [piix_pata_33] = /* PIIX4 at 33MHz */
455 { 455 {
456 .flags = PIIX_PATA_FLAGS, 456 .flags = PIIX_PATA_FLAGS,
457 .pio_mask = 0x1f, /* pio0-4 */ 457 .pio_mask = ATA_PIO4,
458 .mwdma_mask = 0x06, /* mwdma1-2 ?? CHECK 0 should be ok but slow */ 458 .mwdma_mask = ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
459 .udma_mask = ATA_UDMA_MASK_40C, 459 .udma_mask = ATA_UDMA2,
460 .port_ops = &piix_pata_ops, 460 .port_ops = &piix_pata_ops,
461 }, 461 },
462 462
463 [ich_pata_33] = /* ICH0 - ICH at 33Mhz*/ 463 [ich_pata_33] = /* ICH0 - ICH at 33Mhz*/
464 { 464 {
465 .flags = PIIX_PATA_FLAGS, 465 .flags = PIIX_PATA_FLAGS,
466 .pio_mask = 0x1f, /* pio 0-4 */ 466 .pio_mask = ATA_PIO4,
467 .mwdma_mask = 0x06, /* Check: maybe 0x07 */ 467 .mwdma_mask = ATA_MWDMA12_ONLY, /* Check: maybe MWDMA0 is ok */
468 .udma_mask = ATA_UDMA2, /* UDMA33 */ 468 .udma_mask = ATA_UDMA2,
469 .port_ops = &ich_pata_ops, 469 .port_ops = &ich_pata_ops,
470 }, 470 },
471 471
472 [ich_pata_66] = /* ICH controllers up to 66MHz */ 472 [ich_pata_66] = /* ICH controllers up to 66MHz */
473 { 473 {
474 .flags = PIIX_PATA_FLAGS, 474 .flags = PIIX_PATA_FLAGS,
475 .pio_mask = 0x1f, /* pio 0-4 */ 475 .pio_mask = ATA_PIO4,
476 .mwdma_mask = 0x06, /* MWDMA0 is broken on chip */ 476 .mwdma_mask = ATA_MWDMA12_ONLY, /* MWDMA0 is broken on chip */
477 .udma_mask = ATA_UDMA4, 477 .udma_mask = ATA_UDMA4,
478 .port_ops = &ich_pata_ops, 478 .port_ops = &ich_pata_ops,
479 }, 479 },
@@ -481,17 +481,17 @@ static struct ata_port_info piix_port_info[] = {
481 [ich_pata_100] = 481 [ich_pata_100] =
482 { 482 {
483 .flags = PIIX_PATA_FLAGS | PIIX_FLAG_CHECKINTR, 483 .flags = PIIX_PATA_FLAGS | PIIX_FLAG_CHECKINTR,
484 .pio_mask = 0x1f, /* pio0-4 */ 484 .pio_mask = ATA_PIO4,
485 .mwdma_mask = 0x06, /* mwdma1-2 */ 485 .mwdma_mask = ATA_MWDMA12_ONLY,
486 .udma_mask = ATA_UDMA5, /* udma0-5 */ 486 .udma_mask = ATA_UDMA5,
487 .port_ops = &ich_pata_ops, 487 .port_ops = &ich_pata_ops,
488 }, 488 },
489 489
490 [ich5_sata] = 490 [ich5_sata] =
491 { 491 {
492 .flags = PIIX_SATA_FLAGS, 492 .flags = PIIX_SATA_FLAGS,
493 .pio_mask = 0x1f, /* pio0-4 */ 493 .pio_mask = ATA_PIO4,
494 .mwdma_mask = 0x07, /* mwdma0-2 */ 494 .mwdma_mask = ATA_MWDMA2,
495 .udma_mask = ATA_UDMA6, 495 .udma_mask = ATA_UDMA6,
496 .port_ops = &piix_sata_ops, 496 .port_ops = &piix_sata_ops,
497 }, 497 },
@@ -499,8 +499,8 @@ static struct ata_port_info piix_port_info[] = {
499 [ich6_sata] = 499 [ich6_sata] =
500 { 500 {
501 .flags = PIIX_SATA_FLAGS, 501 .flags = PIIX_SATA_FLAGS,
502 .pio_mask = 0x1f, /* pio0-4 */ 502 .pio_mask = ATA_PIO4,
503 .mwdma_mask = 0x07, /* mwdma0-2 */ 503 .mwdma_mask = ATA_MWDMA2,
504 .udma_mask = ATA_UDMA6, 504 .udma_mask = ATA_UDMA6,
505 .port_ops = &piix_sata_ops, 505 .port_ops = &piix_sata_ops,
506 }, 506 },
@@ -508,8 +508,8 @@ static struct ata_port_info piix_port_info[] = {
508 [ich6m_sata] = 508 [ich6m_sata] =
509 { 509 {
510 .flags = PIIX_SATA_FLAGS, 510 .flags = PIIX_SATA_FLAGS,
511 .pio_mask = 0x1f, /* pio0-4 */ 511 .pio_mask = ATA_PIO4,
512 .mwdma_mask = 0x07, /* mwdma0-2 */ 512 .mwdma_mask = ATA_MWDMA2,
513 .udma_mask = ATA_UDMA6, 513 .udma_mask = ATA_UDMA6,
514 .port_ops = &piix_sata_ops, 514 .port_ops = &piix_sata_ops,
515 }, 515 },
@@ -517,8 +517,8 @@ static struct ata_port_info piix_port_info[] = {
517 [ich8_sata] = 517 [ich8_sata] =
518 { 518 {
519 .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR, 519 .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR,
520 .pio_mask = 0x1f, /* pio0-4 */ 520 .pio_mask = ATA_PIO4,
521 .mwdma_mask = 0x07, /* mwdma0-2 */ 521 .mwdma_mask = ATA_MWDMA2,
522 .udma_mask = ATA_UDMA6, 522 .udma_mask = ATA_UDMA6,
523 .port_ops = &piix_sata_ops, 523 .port_ops = &piix_sata_ops,
524 }, 524 },
@@ -526,8 +526,8 @@ static struct ata_port_info piix_port_info[] = {
526 [ich8_2port_sata] = 526 [ich8_2port_sata] =
527 { 527 {
528 .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR, 528 .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR,
529 .pio_mask = 0x1f, /* pio0-4 */ 529 .pio_mask = ATA_PIO4,
530 .mwdma_mask = 0x07, /* mwdma0-2 */ 530 .mwdma_mask = ATA_MWDMA2,
531 .udma_mask = ATA_UDMA6, 531 .udma_mask = ATA_UDMA6,
532 .port_ops = &piix_sata_ops, 532 .port_ops = &piix_sata_ops,
533 }, 533 },
@@ -535,8 +535,8 @@ static struct ata_port_info piix_port_info[] = {
535 [tolapai_sata] = 535 [tolapai_sata] =
536 { 536 {
537 .flags = PIIX_SATA_FLAGS, 537 .flags = PIIX_SATA_FLAGS,
538 .pio_mask = 0x1f, /* pio0-4 */ 538 .pio_mask = ATA_PIO4,
539 .mwdma_mask = 0x07, /* mwdma0-2 */ 539 .mwdma_mask = ATA_MWDMA2,
540 .udma_mask = ATA_UDMA6, 540 .udma_mask = ATA_UDMA6,
541 .port_ops = &piix_sata_ops, 541 .port_ops = &piix_sata_ops,
542 }, 542 },
@@ -544,8 +544,8 @@ static struct ata_port_info piix_port_info[] = {
544 [ich8m_apple_sata] = 544 [ich8m_apple_sata] =
545 { 545 {
546 .flags = PIIX_SATA_FLAGS, 546 .flags = PIIX_SATA_FLAGS,
547 .pio_mask = 0x1f, /* pio0-4 */ 547 .pio_mask = ATA_PIO4,
548 .mwdma_mask = 0x07, /* mwdma0-2 */ 548 .mwdma_mask = ATA_MWDMA2,
549 .udma_mask = ATA_UDMA6, 549 .udma_mask = ATA_UDMA6,
550 .port_ops = &piix_sata_ops, 550 .port_ops = &piix_sata_ops,
551 }, 551 },
@@ -553,9 +553,9 @@ static struct ata_port_info piix_port_info[] = {
553 [piix_pata_vmw] = 553 [piix_pata_vmw] =
554 { 554 {
555 .flags = PIIX_PATA_FLAGS, 555 .flags = PIIX_PATA_FLAGS,
556 .pio_mask = 0x1f, /* pio0-4 */ 556 .pio_mask = ATA_PIO4,
557 .mwdma_mask = 0x06, /* mwdma1-2 ?? CHECK 0 should be ok but slow */ 557 .mwdma_mask = ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
558 .udma_mask = ATA_UDMA_MASK_40C, 558 .udma_mask = ATA_UDMA2,
559 .port_ops = &piix_vmw_ops, 559 .port_ops = &piix_vmw_ops,
560 }, 560 },
561 561
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index 060bcd601f5..e7ea77cf606 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -57,6 +57,7 @@
57#include <linux/scatterlist.h> 57#include <linux/scatterlist.h>
58#include <linux/io.h> 58#include <linux/io.h>
59#include <linux/async.h> 59#include <linux/async.h>
60#include <linux/log2.h>
60#include <scsi/scsi.h> 61#include <scsi/scsi.h>
61#include <scsi/scsi_cmnd.h> 62#include <scsi/scsi_cmnd.h>
62#include <scsi/scsi_host.h> 63#include <scsi/scsi_host.h>
@@ -2389,6 +2390,7 @@ int ata_dev_configure(struct ata_device *dev)
2389 dev->cylinders = 0; 2390 dev->cylinders = 0;
2390 dev->heads = 0; 2391 dev->heads = 0;
2391 dev->sectors = 0; 2392 dev->sectors = 0;
2393 dev->multi_count = 0;
2392 2394
2393 /* 2395 /*
2394 * common ATA, ATAPI feature tests 2396 * common ATA, ATAPI feature tests
@@ -2426,8 +2428,15 @@ int ata_dev_configure(struct ata_device *dev)
2426 2428
2427 dev->n_sectors = ata_id_n_sectors(id); 2429 dev->n_sectors = ata_id_n_sectors(id);
2428 2430
2429 if (dev->id[59] & 0x100) 2431 /* get current R/W Multiple count setting */
2430 dev->multi_count = dev->id[59] & 0xff; 2432 if ((dev->id[47] >> 8) == 0x80 && (dev->id[59] & 0x100)) {
2433 unsigned int max = dev->id[47] & 0xff;
2434 unsigned int cnt = dev->id[59] & 0xff;
2435 /* only recognize/allow powers of two here */
2436 if (is_power_of_2(max) && is_power_of_2(cnt))
2437 if (cnt <= max)
2438 dev->multi_count = cnt;
2439 }
2431 2440
2432 if (ata_id_has_lba(id)) { 2441 if (ata_id_has_lba(id)) {
2433 const char *lba_desc; 2442 const char *lba_desc;
@@ -6709,6 +6718,7 @@ EXPORT_SYMBOL_GPL(ata_id_c_string);
6709EXPORT_SYMBOL_GPL(ata_do_dev_read_id); 6718EXPORT_SYMBOL_GPL(ata_do_dev_read_id);
6710EXPORT_SYMBOL_GPL(ata_scsi_simulate); 6719EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6711 6720
6721EXPORT_SYMBOL_GPL(ata_pio_queue_task);
6712EXPORT_SYMBOL_GPL(ata_pio_need_iordy); 6722EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6713EXPORT_SYMBOL_GPL(ata_timing_find_mode); 6723EXPORT_SYMBOL_GPL(ata_timing_find_mode);
6714EXPORT_SYMBOL_GPL(ata_timing_compute); 6724EXPORT_SYMBOL_GPL(ata_timing_compute);
diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c
index ea890911d4f..01831312c36 100644
--- a/drivers/ata/libata-eh.c
+++ b/drivers/ata/libata-eh.c
@@ -547,7 +547,7 @@ void ata_scsi_error(struct Scsi_Host *host)
547 547
548 /* For new EH, all qcs are finished in one of three ways - 548 /* For new EH, all qcs are finished in one of three ways -
549 * normal completion, error completion, and SCSI timeout. 549 * normal completion, error completion, and SCSI timeout.
550 * Both cmpletions can race against SCSI timeout. When normal 550 * Both completions can race against SCSI timeout. When normal
551 * completion wins, the qc never reaches EH. When error 551 * completion wins, the qc never reaches EH. When error
552 * completion wins, the qc has ATA_QCFLAG_FAILED set. 552 * completion wins, the qc has ATA_QCFLAG_FAILED set.
553 * 553 *
@@ -562,7 +562,19 @@ void ata_scsi_error(struct Scsi_Host *host)
562 int nr_timedout = 0; 562 int nr_timedout = 0;
563 563
564 spin_lock_irqsave(ap->lock, flags); 564 spin_lock_irqsave(ap->lock, flags);
565 565
566 /* This must occur under the ap->lock as we don't want
567 a polled recovery to race the real interrupt handler
568
569 The lost_interrupt handler checks for any completed but
570 non-notified command and completes much like an IRQ handler.
571
572 We then fall into the error recovery code which will treat
573 this as if normal completion won the race */
574
575 if (ap->ops->lost_interrupt)
576 ap->ops->lost_interrupt(ap);
577
566 list_for_each_entry_safe(scmd, tmp, &host->eh_cmd_q, eh_entry) { 578 list_for_each_entry_safe(scmd, tmp, &host->eh_cmd_q, eh_entry) {
567 struct ata_queued_cmd *qc; 579 struct ata_queued_cmd *qc;
568 580
@@ -606,6 +618,9 @@ void ata_scsi_error(struct Scsi_Host *host)
606 ap->eh_tries = ATA_EH_MAX_TRIES; 618 ap->eh_tries = ATA_EH_MAX_TRIES;
607 } else 619 } else
608 spin_unlock_wait(ap->lock); 620 spin_unlock_wait(ap->lock);
621
622 /* If we timed raced normal completion and there is nothing to
623 recover nr_timedout == 0 why exactly are we doing error recovery ? */
609 624
610 repeat: 625 repeat:
611 /* invoke error handler */ 626 /* invoke error handler */
diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c
index f93dc029dfd..8332e97a9de 100644
--- a/drivers/ata/libata-sff.c
+++ b/drivers/ata/libata-sff.c
@@ -52,6 +52,7 @@ const struct ata_port_operations ata_sff_port_ops = {
52 .softreset = ata_sff_softreset, 52 .softreset = ata_sff_softreset,
53 .hardreset = sata_sff_hardreset, 53 .hardreset = sata_sff_hardreset,
54 .postreset = ata_sff_postreset, 54 .postreset = ata_sff_postreset,
55 .drain_fifo = ata_sff_drain_fifo,
55 .error_handler = ata_sff_error_handler, 56 .error_handler = ata_sff_error_handler,
56 .post_internal_cmd = ata_sff_post_internal_cmd, 57 .post_internal_cmd = ata_sff_post_internal_cmd,
57 58
@@ -64,6 +65,8 @@ const struct ata_port_operations ata_sff_port_ops = {
64 .sff_irq_on = ata_sff_irq_on, 65 .sff_irq_on = ata_sff_irq_on,
65 .sff_irq_clear = ata_sff_irq_clear, 66 .sff_irq_clear = ata_sff_irq_clear,
66 67
68 .lost_interrupt = ata_sff_lost_interrupt,
69
67 .port_start = ata_sff_port_start, 70 .port_start = ata_sff_port_start,
68}; 71};
69EXPORT_SYMBOL_GPL(ata_sff_port_ops); 72EXPORT_SYMBOL_GPL(ata_sff_port_ops);
@@ -1646,7 +1649,7 @@ EXPORT_SYMBOL_GPL(ata_sff_qc_fill_rtf);
1646 * RETURNS: 1649 * RETURNS:
1647 * One if interrupt was handled, zero if not (shared irq). 1650 * One if interrupt was handled, zero if not (shared irq).
1648 */ 1651 */
1649inline unsigned int ata_sff_host_intr(struct ata_port *ap, 1652unsigned int ata_sff_host_intr(struct ata_port *ap,
1650 struct ata_queued_cmd *qc) 1653 struct ata_queued_cmd *qc)
1651{ 1654{
1652 struct ata_eh_info *ehi = &ap->link.eh_info; 1655 struct ata_eh_info *ehi = &ap->link.eh_info;
@@ -1775,6 +1778,48 @@ irqreturn_t ata_sff_interrupt(int irq, void *dev_instance)
1775EXPORT_SYMBOL_GPL(ata_sff_interrupt); 1778EXPORT_SYMBOL_GPL(ata_sff_interrupt);
1776 1779
1777/** 1780/**
1781 * ata_sff_lost_interrupt - Check for an apparent lost interrupt
1782 * @ap: port that appears to have timed out
1783 *
1784 * Called from the libata error handlers when the core code suspects
1785 * an interrupt has been lost. If it has complete anything we can and
1786 * then return. Interface must support altstatus for this faster
1787 * recovery to occur.
1788 *
1789 * Locking:
1790 * Caller holds host lock
1791 */
1792
1793void ata_sff_lost_interrupt(struct ata_port *ap)
1794{
1795 u8 status;
1796 struct ata_queued_cmd *qc;
1797
1798 /* Only one outstanding command per SFF channel */
1799 qc = ata_qc_from_tag(ap, ap->link.active_tag);
1800 /* Check we have a live one.. */
1801 if (qc == NULL || !(qc->flags & ATA_QCFLAG_ACTIVE))
1802 return;
1803 /* We cannot lose an interrupt on a polled command */
1804 if (qc->tf.flags & ATA_TFLAG_POLLING)
1805 return;
1806 /* See if the controller thinks it is still busy - if so the command
1807 isn't a lost IRQ but is still in progress */
1808 status = ata_sff_altstatus(ap);
1809 if (status & ATA_BUSY)
1810 return;
1811
1812 /* There was a command running, we are no longer busy and we have
1813 no interrupt. */
1814 ata_port_printk(ap, KERN_WARNING, "lost interrupt (Status 0x%x)\n",
1815 status);
1816 /* Run the host interrupt logic as if the interrupt had not been
1817 lost */
1818 ata_sff_host_intr(ap, qc);
1819}
1820EXPORT_SYMBOL_GPL(ata_sff_lost_interrupt);
1821
1822/**
1778 * ata_sff_freeze - Freeze SFF controller port 1823 * ata_sff_freeze - Freeze SFF controller port
1779 * @ap: port to freeze 1824 * @ap: port to freeze
1780 * 1825 *
@@ -2199,6 +2244,39 @@ void ata_sff_postreset(struct ata_link *link, unsigned int *classes)
2199EXPORT_SYMBOL_GPL(ata_sff_postreset); 2244EXPORT_SYMBOL_GPL(ata_sff_postreset);
2200 2245
2201/** 2246/**
2247 * ata_sff_drain_fifo - Stock FIFO drain logic for SFF controllers
2248 * @qc: command
2249 *
2250 * Drain the FIFO and device of any stuck data following a command
2251 * failing to complete. In some cases this is neccessary before a
2252 * reset will recover the device.
2253 *
2254 */
2255
2256void ata_sff_drain_fifo(struct ata_queued_cmd *qc)
2257{
2258 int count;
2259 struct ata_port *ap;
2260
2261 /* We only need to flush incoming data when a command was running */
2262 if (qc == NULL || qc->dma_dir == DMA_TO_DEVICE)
2263 return;
2264
2265 ap = qc->ap;
2266 /* Drain up to 64K of data before we give up this recovery method */
2267 for (count = 0; (ap->ops->sff_check_status(ap) & ATA_DRQ)
2268 && count < 32768; count++)
2269 ioread16(ap->ioaddr.data_addr);
2270
2271 /* Can become DEBUG later */
2272 if (count)
2273 ata_port_printk(ap, KERN_DEBUG,
2274 "drained %d bytes to clear DRQ.\n", count);
2275
2276}
2277EXPORT_SYMBOL_GPL(ata_sff_drain_fifo);
2278
2279/**
2202 * ata_sff_error_handler - Stock error handler for BMDMA controller 2280 * ata_sff_error_handler - Stock error handler for BMDMA controller
2203 * @ap: port to handle error for 2281 * @ap: port to handle error for
2204 * 2282 *
@@ -2239,7 +2317,8 @@ void ata_sff_error_handler(struct ata_port *ap)
2239 * really a timeout event, adjust error mask and 2317 * really a timeout event, adjust error mask and
2240 * cancel frozen state. 2318 * cancel frozen state.
2241 */ 2319 */
2242 if (qc->err_mask == AC_ERR_TIMEOUT && (host_stat & ATA_DMA_ERR)) { 2320 if (qc->err_mask == AC_ERR_TIMEOUT
2321 && (host_stat & ATA_DMA_ERR)) {
2243 qc->err_mask = AC_ERR_HOST_BUS; 2322 qc->err_mask = AC_ERR_HOST_BUS;
2244 thaw = 1; 2323 thaw = 1;
2245 } 2324 }
@@ -2250,6 +2329,13 @@ void ata_sff_error_handler(struct ata_port *ap)
2250 ata_sff_sync(ap); /* FIXME: We don't need this */ 2329 ata_sff_sync(ap); /* FIXME: We don't need this */
2251 ap->ops->sff_check_status(ap); 2330 ap->ops->sff_check_status(ap);
2252 ap->ops->sff_irq_clear(ap); 2331 ap->ops->sff_irq_clear(ap);
2332 /* We *MUST* do FIFO draining before we issue a reset as several
2333 * devices helpfully clear their internal state and will lock solid
2334 * if we touch the data port post reset. Pass qc in case anyone wants
2335 * to do different PIO/DMA recovery or has per command fixups
2336 */
2337 if (ap->ops->drain_fifo)
2338 ap->ops->drain_fifo(qc);
2253 2339
2254 spin_unlock_irqrestore(ap->lock, flags); 2340 spin_unlock_irqrestore(ap->lock, flags);
2255 2341
@@ -2959,4 +3045,3 @@ out:
2959EXPORT_SYMBOL_GPL(ata_pci_sff_init_one); 3045EXPORT_SYMBOL_GPL(ata_pci_sff_init_one);
2960 3046
2961#endif /* CONFIG_PCI */ 3047#endif /* CONFIG_PCI */
2962
diff --git a/drivers/ata/libata.h b/drivers/ata/libata.h
index cea8014cd87..89a1e0018e7 100644
--- a/drivers/ata/libata.h
+++ b/drivers/ata/libata.h
@@ -79,8 +79,6 @@ extern int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
79 u64 block, u32 n_block, unsigned int tf_flags, 79 u64 block, u32 n_block, unsigned int tf_flags,
80 unsigned int tag); 80 unsigned int tag);
81extern u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev); 81extern u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev);
82extern void ata_pio_queue_task(struct ata_port *ap, void *data,
83 unsigned long delay);
84extern void ata_port_flush_task(struct ata_port *ap); 82extern void ata_port_flush_task(struct ata_port *ap);
85extern unsigned ata_exec_internal(struct ata_device *dev, 83extern unsigned ata_exec_internal(struct ata_device *dev,
86 struct ata_taskfile *tf, const u8 *cdb, 84 struct ata_taskfile *tf, const u8 *cdb,
diff --git a/drivers/ata/pata_acpi.c b/drivers/ata/pata_acpi.c
index 8b77a9802df..d8f35fe4442 100644
--- a/drivers/ata/pata_acpi.c
+++ b/drivers/ata/pata_acpi.c
@@ -246,9 +246,9 @@ static int pacpi_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
246 static const struct ata_port_info info = { 246 static const struct ata_port_info info = {
247 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 247 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
248 248
249 .pio_mask = 0x1f, 249 .pio_mask = ATA_PIO4,
250 .mwdma_mask = 0x07, 250 .mwdma_mask = ATA_MWDMA2,
251 .udma_mask = 0x7f, 251 .udma_mask = ATA_UDMA6,
252 252
253 .port_ops = &pacpi_ops, 253 .port_ops = &pacpi_ops,
254 }; 254 };
diff --git a/drivers/ata/pata_ali.c b/drivers/ata/pata_ali.c
index eb99dbe7808..751b7ea4816 100644
--- a/drivers/ata/pata_ali.c
+++ b/drivers/ata/pata_ali.c
@@ -492,53 +492,53 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
492{ 492{
493 static const struct ata_port_info info_early = { 493 static const struct ata_port_info info_early = {
494 .flags = ATA_FLAG_SLAVE_POSS, 494 .flags = ATA_FLAG_SLAVE_POSS,
495 .pio_mask = 0x1f, 495 .pio_mask = ATA_PIO4,
496 .port_ops = &ali_early_port_ops 496 .port_ops = &ali_early_port_ops
497 }; 497 };
498 /* Revision 0x20 added DMA */ 498 /* Revision 0x20 added DMA */
499 static const struct ata_port_info info_20 = { 499 static const struct ata_port_info info_20 = {
500 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 500 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
501 .pio_mask = 0x1f, 501 .pio_mask = ATA_PIO4,
502 .mwdma_mask = 0x07, 502 .mwdma_mask = ATA_MWDMA2,
503 .port_ops = &ali_20_port_ops 503 .port_ops = &ali_20_port_ops
504 }; 504 };
505 /* Revision 0x20 with support logic added UDMA */ 505 /* Revision 0x20 with support logic added UDMA */
506 static const struct ata_port_info info_20_udma = { 506 static const struct ata_port_info info_20_udma = {
507 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 507 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
508 .pio_mask = 0x1f, 508 .pio_mask = ATA_PIO4,
509 .mwdma_mask = 0x07, 509 .mwdma_mask = ATA_MWDMA2,
510 .udma_mask = 0x07, /* UDMA33 */ 510 .udma_mask = ATA_UDMA2,
511 .port_ops = &ali_20_port_ops 511 .port_ops = &ali_20_port_ops
512 }; 512 };
513 /* Revision 0xC2 adds UDMA66 */ 513 /* Revision 0xC2 adds UDMA66 */
514 static const struct ata_port_info info_c2 = { 514 static const struct ata_port_info info_c2 = {
515 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 515 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
516 .pio_mask = 0x1f, 516 .pio_mask = ATA_PIO4,
517 .mwdma_mask = 0x07, 517 .mwdma_mask = ATA_MWDMA2,
518 .udma_mask = ATA_UDMA4, 518 .udma_mask = ATA_UDMA4,
519 .port_ops = &ali_c2_port_ops 519 .port_ops = &ali_c2_port_ops
520 }; 520 };
521 /* Revision 0xC3 is UDMA66 for now */ 521 /* Revision 0xC3 is UDMA66 for now */
522 static const struct ata_port_info info_c3 = { 522 static const struct ata_port_info info_c3 = {
523 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 523 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
524 .pio_mask = 0x1f, 524 .pio_mask = ATA_PIO4,
525 .mwdma_mask = 0x07, 525 .mwdma_mask = ATA_MWDMA2,
526 .udma_mask = ATA_UDMA4, 526 .udma_mask = ATA_UDMA4,
527 .port_ops = &ali_c2_port_ops 527 .port_ops = &ali_c2_port_ops
528 }; 528 };
529 /* Revision 0xC4 is UDMA100 */ 529 /* Revision 0xC4 is UDMA100 */
530 static const struct ata_port_info info_c4 = { 530 static const struct ata_port_info info_c4 = {
531 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 531 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
532 .pio_mask = 0x1f, 532 .pio_mask = ATA_PIO4,
533 .mwdma_mask = 0x07, 533 .mwdma_mask = ATA_MWDMA2,
534 .udma_mask = ATA_UDMA5, 534 .udma_mask = ATA_UDMA5,
535 .port_ops = &ali_c4_port_ops 535 .port_ops = &ali_c4_port_ops
536 }; 536 };
537 /* Revision 0xC5 is UDMA133 with LBA48 DMA */ 537 /* Revision 0xC5 is UDMA133 with LBA48 DMA */
538 static const struct ata_port_info info_c5 = { 538 static const struct ata_port_info info_c5 = {
539 .flags = ATA_FLAG_SLAVE_POSS, 539 .flags = ATA_FLAG_SLAVE_POSS,
540 .pio_mask = 0x1f, 540 .pio_mask = ATA_PIO4,
541 .mwdma_mask = 0x07, 541 .mwdma_mask = ATA_MWDMA2,
542 .udma_mask = ATA_UDMA6, 542 .udma_mask = ATA_UDMA6,
543 .port_ops = &ali_c5_port_ops 543 .port_ops = &ali_c5_port_ops
544 }; 544 };
diff --git a/drivers/ata/pata_amd.c b/drivers/ata/pata_amd.c
index 115b1cd6dcf..33a74f11171 100644
--- a/drivers/ata/pata_amd.c
+++ b/drivers/ata/pata_amd.c
@@ -455,74 +455,74 @@ static void amd_clear_fifo(struct pci_dev *pdev)
455static int amd_init_one(struct pci_dev *pdev, const struct pci_device_id *id) 455static int amd_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
456{ 456{
457 static const struct ata_port_info info[10] = { 457 static const struct ata_port_info info[10] = {
458 { /* 0: AMD 7401 */ 458 { /* 0: AMD 7401 - no swdma */
459 .flags = ATA_FLAG_SLAVE_POSS, 459 .flags = ATA_FLAG_SLAVE_POSS,
460 .pio_mask = 0x1f, 460 .pio_mask = ATA_PIO4,
461 .mwdma_mask = 0x07, /* No SWDMA */ 461 .mwdma_mask = ATA_MWDMA2,
462 .udma_mask = 0x07, /* UDMA 33 */ 462 .udma_mask = ATA_UDMA2,
463 .port_ops = &amd33_port_ops 463 .port_ops = &amd33_port_ops
464 }, 464 },
465 { /* 1: Early AMD7409 - no swdma */ 465 { /* 1: Early AMD7409 - no swdma */
466 .flags = ATA_FLAG_SLAVE_POSS, 466 .flags = ATA_FLAG_SLAVE_POSS,
467 .pio_mask = 0x1f, 467 .pio_mask = ATA_PIO4,
468 .mwdma_mask = 0x07, 468 .mwdma_mask = ATA_MWDMA2,
469 .udma_mask = ATA_UDMA4, /* UDMA 66 */ 469 .udma_mask = ATA_UDMA4,
470 .port_ops = &amd66_port_ops 470 .port_ops = &amd66_port_ops
471 }, 471 },
472 { /* 2: AMD 7409, no swdma errata */ 472 { /* 2: AMD 7409 */
473 .flags = ATA_FLAG_SLAVE_POSS, 473 .flags = ATA_FLAG_SLAVE_POSS,
474 .pio_mask = 0x1f, 474 .pio_mask = ATA_PIO4,
475 .mwdma_mask = 0x07, 475 .mwdma_mask = ATA_MWDMA2,
476 .udma_mask = ATA_UDMA4, /* UDMA 66 */ 476 .udma_mask = ATA_UDMA4,
477 .port_ops = &amd66_port_ops 477 .port_ops = &amd66_port_ops
478 }, 478 },
479 { /* 3: AMD 7411 */ 479 { /* 3: AMD 7411 */
480 .flags = ATA_FLAG_SLAVE_POSS, 480 .flags = ATA_FLAG_SLAVE_POSS,
481 .pio_mask = 0x1f, 481 .pio_mask = ATA_PIO4,
482 .mwdma_mask = 0x07, 482 .mwdma_mask = ATA_MWDMA2,
483 .udma_mask = ATA_UDMA5, /* UDMA 100 */ 483 .udma_mask = ATA_UDMA5,
484 .port_ops = &amd100_port_ops 484 .port_ops = &amd100_port_ops
485 }, 485 },
486 { /* 4: AMD 7441 */ 486 { /* 4: AMD 7441 */
487 .flags = ATA_FLAG_SLAVE_POSS, 487 .flags = ATA_FLAG_SLAVE_POSS,
488 .pio_mask = 0x1f, 488 .pio_mask = ATA_PIO4,
489 .mwdma_mask = 0x07, 489 .mwdma_mask = ATA_MWDMA2,
490 .udma_mask = ATA_UDMA5, /* UDMA 100 */ 490 .udma_mask = ATA_UDMA5,
491 .port_ops = &amd100_port_ops 491 .port_ops = &amd100_port_ops
492 }, 492 },
493 { /* 5: AMD 8111*/ 493 { /* 5: AMD 8111 - no swdma */
494 .flags = ATA_FLAG_SLAVE_POSS, 494 .flags = ATA_FLAG_SLAVE_POSS,
495 .pio_mask = 0x1f, 495 .pio_mask = ATA_PIO4,
496 .mwdma_mask = 0x07, 496 .mwdma_mask = ATA_MWDMA2,
497 .udma_mask = ATA_UDMA6, /* UDMA 133, no swdma */ 497 .udma_mask = ATA_UDMA6,
498 .port_ops = &amd133_port_ops 498 .port_ops = &amd133_port_ops
499 }, 499 },
500 { /* 6: AMD 8111 UDMA 100 (Serenade) */ 500 { /* 6: AMD 8111 UDMA 100 (Serenade) - no swdma */
501 .flags = ATA_FLAG_SLAVE_POSS, 501 .flags = ATA_FLAG_SLAVE_POSS,
502 .pio_mask = 0x1f, 502 .pio_mask = ATA_PIO4,
503 .mwdma_mask = 0x07, 503 .mwdma_mask = ATA_MWDMA2,
504 .udma_mask = ATA_UDMA5, /* UDMA 100, no swdma */ 504 .udma_mask = ATA_UDMA5,
505 .port_ops = &amd133_port_ops 505 .port_ops = &amd133_port_ops
506 }, 506 },
507 { /* 7: Nvidia Nforce */ 507 { /* 7: Nvidia Nforce */
508 .flags = ATA_FLAG_SLAVE_POSS, 508 .flags = ATA_FLAG_SLAVE_POSS,
509 .pio_mask = 0x1f, 509 .pio_mask = ATA_PIO4,
510 .mwdma_mask = 0x07, 510 .mwdma_mask = ATA_MWDMA2,
511 .udma_mask = ATA_UDMA5, /* UDMA 100 */ 511 .udma_mask = ATA_UDMA5,
512 .port_ops = &nv100_port_ops 512 .port_ops = &nv100_port_ops
513 }, 513 },
514 { /* 8: Nvidia Nforce2 and later */ 514 { /* 8: Nvidia Nforce2 and later - no swdma */
515 .flags = ATA_FLAG_SLAVE_POSS, 515 .flags = ATA_FLAG_SLAVE_POSS,
516 .pio_mask = 0x1f, 516 .pio_mask = ATA_PIO4,
517 .mwdma_mask = 0x07, 517 .mwdma_mask = ATA_MWDMA2,
518 .udma_mask = ATA_UDMA6, /* UDMA 133, no swdma */ 518 .udma_mask = ATA_UDMA6,
519 .port_ops = &nv133_port_ops 519 .port_ops = &nv133_port_ops
520 }, 520 },
521 { /* 9: AMD CS5536 (Geode companion) */ 521 { /* 9: AMD CS5536 (Geode companion) */
522 .flags = ATA_FLAG_SLAVE_POSS, 522 .flags = ATA_FLAG_SLAVE_POSS,
523 .pio_mask = 0x1f, 523 .pio_mask = ATA_PIO4,
524 .mwdma_mask = 0x07, 524 .mwdma_mask = ATA_MWDMA2,
525 .udma_mask = ATA_UDMA5, /* UDMA 100 */ 525 .udma_mask = ATA_UDMA5,
526 .port_ops = &amd100_port_ops 526 .port_ops = &amd100_port_ops
527 } 527 }
528 }; 528 };
diff --git a/drivers/ata/pata_artop.c b/drivers/ata/pata_artop.c
index 6b3092c75ff..d332cfdb0f3 100644
--- a/drivers/ata/pata_artop.c
+++ b/drivers/ata/pata_artop.c
@@ -12,7 +12,6 @@
12 * performance Alessandro Zummo <alessandro.zummo@towertech.it> 12 * performance Alessandro Zummo <alessandro.zummo@towertech.it>
13 * 13 *
14 * TODO 14 * TODO
15 * 850 serialization once the core supports it
16 * Investigate no_dsc on 850R 15 * Investigate no_dsc on 850R
17 * Clock detect 16 * Clock detect
18 */ 17 */
@@ -29,7 +28,7 @@
29#include <linux/ata.h> 28#include <linux/ata.h>
30 29
31#define DRV_NAME "pata_artop" 30#define DRV_NAME "pata_artop"
32#define DRV_VERSION "0.4.4" 31#define DRV_VERSION "0.4.5"
33 32
34/* 33/*
35 * The ARTOP has 33 Mhz and "over clocked" timing tables. Until we 34 * The ARTOP has 33 Mhz and "over clocked" timing tables. Until we
@@ -283,6 +282,31 @@ static void artop6260_set_dmamode (struct ata_port *ap, struct ata_device *adev)
283 pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra); 282 pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra);
284} 283}
285 284
285/**
286 * artop_6210_qc_defer - implement serialization
287 * @qc: command
288 *
289 * Issue commands per host on this chip.
290 */
291
292static int artop6210_qc_defer(struct ata_queued_cmd *qc)
293{
294 struct ata_host *host = qc->ap->host;
295 struct ata_port *alt = host->ports[1 ^ qc->ap->port_no];
296 int rc;
297
298 /* First apply the usual rules */
299 rc = ata_std_qc_defer(qc);
300 if (rc != 0)
301 return rc;
302
303 /* Now apply serialization rules. Only allow a command if the
304 other channel state machine is idle */
305 if (alt && alt->qc_active)
306 return ATA_DEFER_PORT;
307 return 0;
308}
309
286static struct scsi_host_template artop_sht = { 310static struct scsi_host_template artop_sht = {
287 ATA_BMDMA_SHT(DRV_NAME), 311 ATA_BMDMA_SHT(DRV_NAME),
288}; 312};
@@ -293,6 +317,7 @@ static struct ata_port_operations artop6210_ops = {
293 .set_piomode = artop6210_set_piomode, 317 .set_piomode = artop6210_set_piomode,
294 .set_dmamode = artop6210_set_dmamode, 318 .set_dmamode = artop6210_set_dmamode,
295 .prereset = artop6210_pre_reset, 319 .prereset = artop6210_pre_reset,
320 .qc_defer = artop6210_qc_defer,
296}; 321};
297 322
298static struct ata_port_operations artop6260_ops = { 323static struct ata_port_operations artop6260_ops = {
@@ -323,29 +348,29 @@ static int artop_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
323 static int printed_version; 348 static int printed_version;
324 static const struct ata_port_info info_6210 = { 349 static const struct ata_port_info info_6210 = {
325 .flags = ATA_FLAG_SLAVE_POSS, 350 .flags = ATA_FLAG_SLAVE_POSS,
326 .pio_mask = 0x1f, /* pio0-4 */ 351 .pio_mask = ATA_PIO4,
327 .mwdma_mask = 0x07, /* mwdma0-2 */ 352 .mwdma_mask = ATA_MWDMA2,
328 .udma_mask = ATA_UDMA2, 353 .udma_mask = ATA_UDMA2,
329 .port_ops = &artop6210_ops, 354 .port_ops = &artop6210_ops,
330 }; 355 };
331 static const struct ata_port_info info_626x = { 356 static const struct ata_port_info info_626x = {
332 .flags = ATA_FLAG_SLAVE_POSS, 357 .flags = ATA_FLAG_SLAVE_POSS,
333 .pio_mask = 0x1f, /* pio0-4 */ 358 .pio_mask = ATA_PIO4,
334 .mwdma_mask = 0x07, /* mwdma0-2 */ 359 .mwdma_mask = ATA_MWDMA2,
335 .udma_mask = ATA_UDMA4, 360 .udma_mask = ATA_UDMA4,
336 .port_ops = &artop6260_ops, 361 .port_ops = &artop6260_ops,
337 }; 362 };
338 static const struct ata_port_info info_628x = { 363 static const struct ata_port_info info_628x = {
339 .flags = ATA_FLAG_SLAVE_POSS, 364 .flags = ATA_FLAG_SLAVE_POSS,
340 .pio_mask = 0x1f, /* pio0-4 */ 365 .pio_mask = ATA_PIO4,
341 .mwdma_mask = 0x07, /* mwdma0-2 */ 366 .mwdma_mask = ATA_MWDMA2,
342 .udma_mask = ATA_UDMA5, 367 .udma_mask = ATA_UDMA5,
343 .port_ops = &artop6260_ops, 368 .port_ops = &artop6260_ops,
344 }; 369 };
345 static const struct ata_port_info info_628x_fast = { 370 static const struct ata_port_info info_628x_fast = {
346 .flags = ATA_FLAG_SLAVE_POSS, 371 .flags = ATA_FLAG_SLAVE_POSS,
347 .pio_mask = 0x1f, /* pio0-4 */ 372 .pio_mask = ATA_PIO4,
348 .mwdma_mask = 0x07, /* mwdma0-2 */ 373 .mwdma_mask = ATA_MWDMA2,
349 .udma_mask = ATA_UDMA6, 374 .udma_mask = ATA_UDMA6,
350 .port_ops = &artop6260_ops, 375 .port_ops = &artop6260_ops,
351 }; 376 };
@@ -362,12 +387,8 @@ static int artop_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
362 387
363 if (id->driver_data == 0) { /* 6210 variant */ 388 if (id->driver_data == 0) { /* 6210 variant */
364 ppi[0] = &info_6210; 389 ppi[0] = &info_6210;
365 ppi[1] = &ata_dummy_port_info;
366 /* BIOS may have left us in UDMA, clear it before libata probe */ 390 /* BIOS may have left us in UDMA, clear it before libata probe */
367 pci_write_config_byte(pdev, 0x54, 0); 391 pci_write_config_byte(pdev, 0x54, 0);
368 /* For the moment (also lacks dsc) */
369 printk(KERN_WARNING "ARTOP 6210 requires serialize functionality not yet supported by libata.\n");
370 printk(KERN_WARNING "Secondary ATA ports will not be activated.\n");
371 } 392 }
372 else if (id->driver_data == 1) /* 6260 */ 393 else if (id->driver_data == 1) /* 6260 */
373 ppi[0] = &info_626x; 394 ppi[0] = &info_626x;
diff --git a/drivers/ata/pata_at32.c b/drivers/ata/pata_at32.c
index ab61095093b..5c129f99a7e 100644
--- a/drivers/ata/pata_at32.c
+++ b/drivers/ata/pata_at32.c
@@ -67,7 +67,9 @@
67 * 67 *
68 * Alter PIO_MASK below according to table to set maximal PIO mode. 68 * Alter PIO_MASK below according to table to set maximal PIO mode.
69 */ 69 */
70#define PIO_MASK (0x1f) 70enum {
71 PIO_MASK = ATA_PIO4,
72};
71 73
72/* 74/*
73 * Struct containing private information about device. 75 * Struct containing private information about device.
diff --git a/drivers/ata/pata_atiixp.c b/drivers/ata/pata_atiixp.c
index 506adde8ebb..bec0b8ade66 100644
--- a/drivers/ata/pata_atiixp.c
+++ b/drivers/ata/pata_atiixp.c
@@ -220,9 +220,9 @@ static int atiixp_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
220{ 220{
221 static const struct ata_port_info info = { 221 static const struct ata_port_info info = {
222 .flags = ATA_FLAG_SLAVE_POSS, 222 .flags = ATA_FLAG_SLAVE_POSS,
223 .pio_mask = 0x1f, 223 .pio_mask = ATA_PIO4,
224 .mwdma_mask = 0x06, /* No MWDMA0 support */ 224 .mwdma_mask = ATA_MWDMA12_ONLY,
225 .udma_mask = 0x3F, 225 .udma_mask = ATA_UDMA5,
226 .port_ops = &atiixp_port_ops 226 .port_ops = &atiixp_port_ops
227 }; 227 };
228 static const struct pci_bits atiixp_enable_bits[] = { 228 static const struct pci_bits atiixp_enable_bits[] = {
diff --git a/drivers/ata/pata_bf54x.c b/drivers/ata/pata_bf54x.c
index 1050fed96b2..c4b47a3e544 100644
--- a/drivers/ata/pata_bf54x.c
+++ b/drivers/ata/pata_bf54x.c
@@ -1502,7 +1502,7 @@ static struct ata_port_info bfin_port_info[] = {
1502 .flags = ATA_FLAG_SLAVE_POSS 1502 .flags = ATA_FLAG_SLAVE_POSS
1503 | ATA_FLAG_MMIO 1503 | ATA_FLAG_MMIO
1504 | ATA_FLAG_NO_LEGACY, 1504 | ATA_FLAG_NO_LEGACY,
1505 .pio_mask = 0x1f, /* pio0-4 */ 1505 .pio_mask = ATA_PIO4,
1506 .mwdma_mask = 0, 1506 .mwdma_mask = 0,
1507 .udma_mask = 0, 1507 .udma_mask = 0,
1508 .port_ops = &bfin_pata_ops, 1508 .port_ops = &bfin_pata_ops,
diff --git a/drivers/ata/pata_cmd640.c b/drivers/ata/pata_cmd640.c
index 34a394264c3..5acf9fa9b39 100644
--- a/drivers/ata/pata_cmd640.c
+++ b/drivers/ata/pata_cmd640.c
@@ -211,7 +211,7 @@ static int cmd640_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
211{ 211{
212 static const struct ata_port_info info = { 212 static const struct ata_port_info info = {
213 .flags = ATA_FLAG_SLAVE_POSS, 213 .flags = ATA_FLAG_SLAVE_POSS,
214 .pio_mask = 0x1f, 214 .pio_mask = ATA_PIO4,
215 .port_ops = &cmd640_port_ops 215 .port_ops = &cmd640_port_ops
216 }; 216 };
217 const struct ata_port_info *ppi[] = { &info, NULL }; 217 const struct ata_port_info *ppi[] = { &info, NULL };
diff --git a/drivers/ata/pata_cmd64x.c b/drivers/ata/pata_cmd64x.c
index 3167d8fed2f..f98dffedf4b 100644
--- a/drivers/ata/pata_cmd64x.c
+++ b/drivers/ata/pata_cmd64x.c
@@ -299,40 +299,40 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
299 static const struct ata_port_info cmd_info[6] = { 299 static const struct ata_port_info cmd_info[6] = {
300 { /* CMD 643 - no UDMA */ 300 { /* CMD 643 - no UDMA */
301 .flags = ATA_FLAG_SLAVE_POSS, 301 .flags = ATA_FLAG_SLAVE_POSS,
302 .pio_mask = 0x1f, 302 .pio_mask = ATA_PIO4,
303 .mwdma_mask = 0x07, 303 .mwdma_mask = ATA_MWDMA2,
304 .port_ops = &cmd64x_port_ops 304 .port_ops = &cmd64x_port_ops
305 }, 305 },
306 { /* CMD 646 with broken UDMA */ 306 { /* CMD 646 with broken UDMA */
307 .flags = ATA_FLAG_SLAVE_POSS, 307 .flags = ATA_FLAG_SLAVE_POSS,
308 .pio_mask = 0x1f, 308 .pio_mask = ATA_PIO4,
309 .mwdma_mask = 0x07, 309 .mwdma_mask = ATA_MWDMA2,
310 .port_ops = &cmd64x_port_ops 310 .port_ops = &cmd64x_port_ops
311 }, 311 },
312 { /* CMD 646 with working UDMA */ 312 { /* CMD 646 with working UDMA */
313 .flags = ATA_FLAG_SLAVE_POSS, 313 .flags = ATA_FLAG_SLAVE_POSS,
314 .pio_mask = 0x1f, 314 .pio_mask = ATA_PIO4,
315 .mwdma_mask = 0x07, 315 .mwdma_mask = ATA_MWDMA2,
316 .udma_mask = ATA_UDMA2, 316 .udma_mask = ATA_UDMA2,
317 .port_ops = &cmd64x_port_ops 317 .port_ops = &cmd64x_port_ops
318 }, 318 },
319 { /* CMD 646 rev 1 */ 319 { /* CMD 646 rev 1 */
320 .flags = ATA_FLAG_SLAVE_POSS, 320 .flags = ATA_FLAG_SLAVE_POSS,
321 .pio_mask = 0x1f, 321 .pio_mask = ATA_PIO4,
322 .mwdma_mask = 0x07, 322 .mwdma_mask = ATA_MWDMA2,
323 .port_ops = &cmd646r1_port_ops 323 .port_ops = &cmd646r1_port_ops
324 }, 324 },
325 { /* CMD 648 */ 325 { /* CMD 648 */
326 .flags = ATA_FLAG_SLAVE_POSS, 326 .flags = ATA_FLAG_SLAVE_POSS,
327 .pio_mask = 0x1f, 327 .pio_mask = ATA_PIO4,
328 .mwdma_mask = 0x07, 328 .mwdma_mask = ATA_MWDMA2,
329 .udma_mask = ATA_UDMA4, 329 .udma_mask = ATA_UDMA4,
330 .port_ops = &cmd648_port_ops 330 .port_ops = &cmd648_port_ops
331 }, 331 },
332 { /* CMD 649 */ 332 { /* CMD 649 */
333 .flags = ATA_FLAG_SLAVE_POSS, 333 .flags = ATA_FLAG_SLAVE_POSS,
334 .pio_mask = 0x1f, 334 .pio_mask = ATA_PIO4,
335 .mwdma_mask = 0x07, 335 .mwdma_mask = ATA_MWDMA2,
336 .udma_mask = ATA_UDMA5, 336 .udma_mask = ATA_UDMA5,
337 .port_ops = &cmd648_port_ops 337 .port_ops = &cmd648_port_ops
338 } 338 }
diff --git a/drivers/ata/pata_cs5520.c b/drivers/ata/pata_cs5520.c
index 1186bcd2781..db6a96984f3 100644
--- a/drivers/ata/pata_cs5520.c
+++ b/drivers/ata/pata_cs5520.c
@@ -158,7 +158,7 @@ static int __devinit cs5520_init_one(struct pci_dev *pdev, const struct pci_devi
158 static const unsigned int ctl_port[] = { 0x3F6, 0x376 }; 158 static const unsigned int ctl_port[] = { 0x3F6, 0x376 };
159 struct ata_port_info pi = { 159 struct ata_port_info pi = {
160 .flags = ATA_FLAG_SLAVE_POSS, 160 .flags = ATA_FLAG_SLAVE_POSS,
161 .pio_mask = 0x1f, 161 .pio_mask = ATA_PIO4,
162 .port_ops = &cs5520_port_ops, 162 .port_ops = &cs5520_port_ops,
163 }; 163 };
164 const struct ata_port_info *ppi[2]; 164 const struct ata_port_info *ppi[2];
diff --git a/drivers/ata/pata_cs5530.c b/drivers/ata/pata_cs5530.c
index bba453381f4..c974b05e412 100644
--- a/drivers/ata/pata_cs5530.c
+++ b/drivers/ata/pata_cs5530.c
@@ -298,15 +298,15 @@ static int cs5530_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
298{ 298{
299 static const struct ata_port_info info = { 299 static const struct ata_port_info info = {
300 .flags = ATA_FLAG_SLAVE_POSS, 300 .flags = ATA_FLAG_SLAVE_POSS,
301 .pio_mask = 0x1f, 301 .pio_mask = ATA_PIO4,
302 .mwdma_mask = 0x07, 302 .mwdma_mask = ATA_MWDMA2,
303 .udma_mask = 0x07, 303 .udma_mask = ATA_UDMA2,
304 .port_ops = &cs5530_port_ops 304 .port_ops = &cs5530_port_ops
305 }; 305 };
306 /* The docking connector doesn't do UDMA, and it seems not MWDMA */ 306 /* The docking connector doesn't do UDMA, and it seems not MWDMA */
307 static const struct ata_port_info info_palmax_secondary = { 307 static const struct ata_port_info info_palmax_secondary = {
308 .flags = ATA_FLAG_SLAVE_POSS, 308 .flags = ATA_FLAG_SLAVE_POSS,
309 .pio_mask = 0x1f, 309 .pio_mask = ATA_PIO4,
310 .port_ops = &cs5530_port_ops 310 .port_ops = &cs5530_port_ops
311 }; 311 };
312 const struct ata_port_info *ppi[] = { &info, NULL }; 312 const struct ata_port_info *ppi[] = { &info, NULL };
diff --git a/drivers/ata/pata_cs5535.c b/drivers/ata/pata_cs5535.c
index 8b236af84c2..d33aa28239a 100644
--- a/drivers/ata/pata_cs5535.c
+++ b/drivers/ata/pata_cs5535.c
@@ -181,8 +181,8 @@ static int cs5535_init_one(struct pci_dev *dev, const struct pci_device_id *id)
181{ 181{
182 static const struct ata_port_info info = { 182 static const struct ata_port_info info = {
183 .flags = ATA_FLAG_SLAVE_POSS, 183 .flags = ATA_FLAG_SLAVE_POSS,
184 .pio_mask = 0x1f, 184 .pio_mask = ATA_PIO4,
185 .mwdma_mask = 0x07, 185 .mwdma_mask = ATA_MWDMA2,
186 .udma_mask = ATA_UDMA4, 186 .udma_mask = ATA_UDMA4,
187 .port_ops = &cs5535_port_ops 187 .port_ops = &cs5535_port_ops
188 }; 188 };
diff --git a/drivers/ata/pata_cs5536.c b/drivers/ata/pata_cs5536.c
index afed9297619..6da4cb486c8 100644
--- a/drivers/ata/pata_cs5536.c
+++ b/drivers/ata/pata_cs5536.c
@@ -241,8 +241,8 @@ static int cs5536_init_one(struct pci_dev *dev, const struct pci_device_id *id)
241{ 241{
242 static const struct ata_port_info info = { 242 static const struct ata_port_info info = {
243 .flags = ATA_FLAG_SLAVE_POSS, 243 .flags = ATA_FLAG_SLAVE_POSS,
244 .pio_mask = 0x1f, 244 .pio_mask = ATA_PIO4,
245 .mwdma_mask = 0x07, 245 .mwdma_mask = ATA_MWDMA2,
246 .udma_mask = ATA_UDMA5, 246 .udma_mask = ATA_UDMA5,
247 .port_ops = &cs5536_port_ops, 247 .port_ops = &cs5536_port_ops,
248 }; 248 };
diff --git a/drivers/ata/pata_cypress.c b/drivers/ata/pata_cypress.c
index d546425cd38..8fb040bf736 100644
--- a/drivers/ata/pata_cypress.c
+++ b/drivers/ata/pata_cypress.c
@@ -124,8 +124,8 @@ static int cy82c693_init_one(struct pci_dev *pdev, const struct pci_device_id *i
124{ 124{
125 static const struct ata_port_info info = { 125 static const struct ata_port_info info = {
126 .flags = ATA_FLAG_SLAVE_POSS, 126 .flags = ATA_FLAG_SLAVE_POSS,
127 .pio_mask = 0x1f, 127 .pio_mask = ATA_PIO4,
128 .mwdma_mask = 0x07, 128 .mwdma_mask = ATA_MWDMA2,
129 .port_ops = &cy82c693_port_ops 129 .port_ops = &cy82c693_port_ops
130 }; 130 };
131 const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info }; 131 const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
diff --git a/drivers/ata/pata_efar.c b/drivers/ata/pata_efar.c
index ac6392ea35b..2085e0a3a05 100644
--- a/drivers/ata/pata_efar.c
+++ b/drivers/ata/pata_efar.c
@@ -251,9 +251,9 @@ static int efar_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
251 static int printed_version; 251 static int printed_version;
252 static const struct ata_port_info info = { 252 static const struct ata_port_info info = {
253 .flags = ATA_FLAG_SLAVE_POSS, 253 .flags = ATA_FLAG_SLAVE_POSS,
254 .pio_mask = 0x1f, /* pio0-4 */ 254 .pio_mask = ATA_PIO4,
255 .mwdma_mask = 0x07, /* mwdma1-2 */ 255 .mwdma_mask = ATA_MWDMA2,
256 .udma_mask = 0x0f, /* UDMA 66 */ 256 .udma_mask = ATA_UDMA4,
257 .port_ops = &efar_ops, 257 .port_ops = &efar_ops,
258 }; 258 };
259 const struct ata_port_info *ppi[] = { &info, NULL }; 259 const struct ata_port_info *ppi[] = { &info, NULL };
diff --git a/drivers/ata/pata_hpt366.c b/drivers/ata/pata_hpt366.c
index 65c28e5a6cd..d7f2da127d1 100644
--- a/drivers/ata/pata_hpt366.c
+++ b/drivers/ata/pata_hpt366.c
@@ -336,8 +336,8 @@ static int hpt36x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
336{ 336{
337 static const struct ata_port_info info_hpt366 = { 337 static const struct ata_port_info info_hpt366 = {
338 .flags = ATA_FLAG_SLAVE_POSS, 338 .flags = ATA_FLAG_SLAVE_POSS,
339 .pio_mask = 0x1f, 339 .pio_mask = ATA_PIO4,
340 .mwdma_mask = 0x07, 340 .mwdma_mask = ATA_MWDMA2,
341 .udma_mask = ATA_UDMA4, 341 .udma_mask = ATA_UDMA4,
342 .port_ops = &hpt366_port_ops 342 .port_ops = &hpt366_port_ops
343 }; 343 };
diff --git a/drivers/ata/pata_hpt37x.c b/drivers/ata/pata_hpt37x.c
index 42163998de9..81ab57003ab 100644
--- a/drivers/ata/pata_hpt37x.c
+++ b/drivers/ata/pata_hpt37x.c
@@ -753,55 +753,55 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
753 /* HPT370 - UDMA100 */ 753 /* HPT370 - UDMA100 */
754 static const struct ata_port_info info_hpt370 = { 754 static const struct ata_port_info info_hpt370 = {
755 .flags = ATA_FLAG_SLAVE_POSS, 755 .flags = ATA_FLAG_SLAVE_POSS,
756 .pio_mask = 0x1f, 756 .pio_mask = ATA_PIO4,
757 .mwdma_mask = 0x07, 757 .mwdma_mask = ATA_MWDMA2,
758 .udma_mask = ATA_UDMA5, 758 .udma_mask = ATA_UDMA5,
759 .port_ops = &hpt370_port_ops 759 .port_ops = &hpt370_port_ops
760 }; 760 };
761 /* HPT370A - UDMA100 */ 761 /* HPT370A - UDMA100 */
762 static const struct ata_port_info info_hpt370a = { 762 static const struct ata_port_info info_hpt370a = {
763 .flags = ATA_FLAG_SLAVE_POSS, 763 .flags = ATA_FLAG_SLAVE_POSS,
764 .pio_mask = 0x1f, 764 .pio_mask = ATA_PIO4,
765 .mwdma_mask = 0x07, 765 .mwdma_mask = ATA_MWDMA2,
766 .udma_mask = ATA_UDMA5, 766 .udma_mask = ATA_UDMA5,
767 .port_ops = &hpt370a_port_ops 767 .port_ops = &hpt370a_port_ops
768 }; 768 };
769 /* HPT370 - UDMA100 */ 769 /* HPT370 - UDMA100 */
770 static const struct ata_port_info info_hpt370_33 = { 770 static const struct ata_port_info info_hpt370_33 = {
771 .flags = ATA_FLAG_SLAVE_POSS, 771 .flags = ATA_FLAG_SLAVE_POSS,
772 .pio_mask = 0x1f, 772 .pio_mask = ATA_PIO4,
773 .mwdma_mask = 0x07, 773 .mwdma_mask = ATA_MWDMA2,
774 .udma_mask = ATA_UDMA5, 774 .udma_mask = ATA_UDMA5,
775 .port_ops = &hpt370_port_ops 775 .port_ops = &hpt370_port_ops
776 }; 776 };
777 /* HPT370A - UDMA100 */ 777 /* HPT370A - UDMA100 */
778 static const struct ata_port_info info_hpt370a_33 = { 778 static const struct ata_port_info info_hpt370a_33 = {
779 .flags = ATA_FLAG_SLAVE_POSS, 779 .flags = ATA_FLAG_SLAVE_POSS,
780 .pio_mask = 0x1f, 780 .pio_mask = ATA_PIO4,
781 .mwdma_mask = 0x07, 781 .mwdma_mask = ATA_MWDMA2,
782 .udma_mask = ATA_UDMA5, 782 .udma_mask = ATA_UDMA5,
783 .port_ops = &hpt370a_port_ops 783 .port_ops = &hpt370a_port_ops
784 }; 784 };
785 /* HPT371, 372 and friends - UDMA133 */ 785 /* HPT371, 372 and friends - UDMA133 */
786 static const struct ata_port_info info_hpt372 = { 786 static const struct ata_port_info info_hpt372 = {
787 .flags = ATA_FLAG_SLAVE_POSS, 787 .flags = ATA_FLAG_SLAVE_POSS,
788 .pio_mask = 0x1f, 788 .pio_mask = ATA_PIO4,
789 .mwdma_mask = 0x07, 789 .mwdma_mask = ATA_MWDMA2,
790 .udma_mask = ATA_UDMA6, 790 .udma_mask = ATA_UDMA6,
791 .port_ops = &hpt372_port_ops 791 .port_ops = &hpt372_port_ops
792 }; 792 };
793 /* HPT374 - UDMA100, function 1 uses different prereset method */ 793 /* HPT374 - UDMA100, function 1 uses different prereset method */
794 static const struct ata_port_info info_hpt374_fn0 = { 794 static const struct ata_port_info info_hpt374_fn0 = {
795 .flags = ATA_FLAG_SLAVE_POSS, 795 .flags = ATA_FLAG_SLAVE_POSS,
796 .pio_mask = 0x1f, 796 .pio_mask = ATA_PIO4,
797 .mwdma_mask = 0x07, 797 .mwdma_mask = ATA_MWDMA2,
798 .udma_mask = ATA_UDMA5, 798 .udma_mask = ATA_UDMA5,
799 .port_ops = &hpt372_port_ops 799 .port_ops = &hpt372_port_ops
800 }; 800 };
801 static const struct ata_port_info info_hpt374_fn1 = { 801 static const struct ata_port_info info_hpt374_fn1 = {
802 .flags = ATA_FLAG_SLAVE_POSS, 802 .flags = ATA_FLAG_SLAVE_POSS,
803 .pio_mask = 0x1f, 803 .pio_mask = ATA_PIO4,
804 .mwdma_mask = 0x07, 804 .mwdma_mask = ATA_MWDMA2,
805 .udma_mask = ATA_UDMA5, 805 .udma_mask = ATA_UDMA5,
806 .port_ops = &hpt374_fn1_port_ops 806 .port_ops = &hpt374_fn1_port_ops
807 }; 807 };
diff --git a/drivers/ata/pata_hpt3x2n.c b/drivers/ata/pata_hpt3x2n.c
index d5c9fd7b82b..3d59fe0a408 100644
--- a/drivers/ata/pata_hpt3x2n.c
+++ b/drivers/ata/pata_hpt3x2n.c
@@ -441,8 +441,8 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id)
441 /* HPT372N and friends - UDMA133 */ 441 /* HPT372N and friends - UDMA133 */
442 static const struct ata_port_info info = { 442 static const struct ata_port_info info = {
443 .flags = ATA_FLAG_SLAVE_POSS, 443 .flags = ATA_FLAG_SLAVE_POSS,
444 .pio_mask = 0x1f, 444 .pio_mask = ATA_PIO4,
445 .mwdma_mask = 0x07, 445 .mwdma_mask = ATA_MWDMA2,
446 .udma_mask = ATA_UDMA6, 446 .udma_mask = ATA_UDMA6,
447 .port_ops = &hpt3x2n_port_ops 447 .port_ops = &hpt3x2n_port_ops
448 }; 448 };
diff --git a/drivers/ata/pata_hpt3x3.c b/drivers/ata/pata_hpt3x3.c
index f19cc645881..7e310253b36 100644
--- a/drivers/ata/pata_hpt3x3.c
+++ b/drivers/ata/pata_hpt3x3.c
@@ -188,11 +188,11 @@ static int hpt3x3_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
188 static int printed_version; 188 static int printed_version;
189 static const struct ata_port_info info = { 189 static const struct ata_port_info info = {
190 .flags = ATA_FLAG_SLAVE_POSS, 190 .flags = ATA_FLAG_SLAVE_POSS,
191 .pio_mask = 0x1f, 191 .pio_mask = ATA_PIO4,
192#if defined(CONFIG_PATA_HPT3X3_DMA) 192#if defined(CONFIG_PATA_HPT3X3_DMA)
193 /* Further debug needed */ 193 /* Further debug needed */
194 .mwdma_mask = 0x07, 194 .mwdma_mask = ATA_MWDMA2,
195 .udma_mask = 0x07, 195 .udma_mask = ATA_UDMA2,
196#endif 196#endif
197 .port_ops = &hpt3x3_port_ops 197 .port_ops = &hpt3x3_port_ops
198 }; 198 };
diff --git a/drivers/ata/pata_icside.c b/drivers/ata/pata_icside.c
index cf9e9848f8b..b663b7ffae4 100644
--- a/drivers/ata/pata_icside.c
+++ b/drivers/ata/pata_icside.c
@@ -45,8 +45,6 @@ static const struct portinfo pata_icside_portinfo_v6_2 = {
45 .stepping = 6, 45 .stepping = 6,
46}; 46};
47 47
48#define PATA_ICSIDE_MAX_SG 128
49
50struct pata_icside_state { 48struct pata_icside_state {
51 void __iomem *irq_port; 49 void __iomem *irq_port;
52 void __iomem *ioc_base; 50 void __iomem *ioc_base;
@@ -57,7 +55,6 @@ struct pata_icside_state {
57 u8 disabled; 55 u8 disabled;
58 unsigned int speed[ATA_MAX_DEVICES]; 56 unsigned int speed[ATA_MAX_DEVICES];
59 } port[2]; 57 } port[2];
60 struct scatterlist sg[PATA_ICSIDE_MAX_SG];
61}; 58};
62 59
63struct pata_icside_info { 60struct pata_icside_info {
@@ -222,9 +219,7 @@ static void pata_icside_bmdma_setup(struct ata_queued_cmd *qc)
222{ 219{
223 struct ata_port *ap = qc->ap; 220 struct ata_port *ap = qc->ap;
224 struct pata_icside_state *state = ap->host->private_data; 221 struct pata_icside_state *state = ap->host->private_data;
225 struct scatterlist *sg, *rsg = state->sg;
226 unsigned int write = qc->tf.flags & ATA_TFLAG_WRITE; 222 unsigned int write = qc->tf.flags & ATA_TFLAG_WRITE;
227 unsigned int si;
228 223
229 /* 224 /*
230 * We are simplex; BUG if we try to fiddle with DMA 225 * We are simplex; BUG if we try to fiddle with DMA
@@ -233,20 +228,12 @@ static void pata_icside_bmdma_setup(struct ata_queued_cmd *qc)
233 BUG_ON(dma_channel_active(state->dma)); 228 BUG_ON(dma_channel_active(state->dma));
234 229
235 /* 230 /*
236 * Copy ATAs scattered sg list into a contiguous array of sg
237 */
238 for_each_sg(qc->sg, sg, qc->n_elem, si) {
239 memcpy(rsg, sg, sizeof(*sg));
240 rsg++;
241 }
242
243 /*
244 * Route the DMA signals to the correct interface 231 * Route the DMA signals to the correct interface
245 */ 232 */
246 writeb(state->port[ap->port_no].port_sel, state->ioc_base); 233 writeb(state->port[ap->port_no].port_sel, state->ioc_base);
247 234
248 set_dma_speed(state->dma, state->port[ap->port_no].speed[qc->dev->devno]); 235 set_dma_speed(state->dma, state->port[ap->port_no].speed[qc->dev->devno]);
249 set_dma_sg(state->dma, state->sg, rsg - state->sg); 236 set_dma_sg(state->dma, qc->sg, qc->n_elem);
250 set_dma_mode(state->dma, write ? DMA_MODE_WRITE : DMA_MODE_READ); 237 set_dma_mode(state->dma, write ? DMA_MODE_WRITE : DMA_MODE_READ);
251 238
252 /* issue r/w command */ 239 /* issue r/w command */
@@ -297,7 +284,7 @@ static int icside_dma_init(struct pata_icside_info *info)
297 284
298 if (ec->dma != NO_DMA && !request_dma(ec->dma, DRV_NAME)) { 285 if (ec->dma != NO_DMA && !request_dma(ec->dma, DRV_NAME)) {
299 state->dma = ec->dma; 286 state->dma = ec->dma;
300 info->mwdma_mask = 0x07; /* MW0..2 */ 287 info->mwdma_mask = ATA_MWDMA2;
301 } 288 }
302 289
303 return 0; 290 return 0;
@@ -306,8 +293,8 @@ static int icside_dma_init(struct pata_icside_info *info)
306 293
307static struct scsi_host_template pata_icside_sht = { 294static struct scsi_host_template pata_icside_sht = {
308 ATA_BASE_SHT(DRV_NAME), 295 ATA_BASE_SHT(DRV_NAME),
309 .sg_tablesize = PATA_ICSIDE_MAX_SG, 296 .sg_tablesize = SCSI_MAX_SG_CHAIN_SEGMENTS,
310 .dma_boundary = ~0, /* no dma boundaries */ 297 .dma_boundary = IOMD_DMA_BOUNDARY,
311}; 298};
312 299
313static void pata_icside_postreset(struct ata_link *link, unsigned int *classes) 300static void pata_icside_postreset(struct ata_link *link, unsigned int *classes)
@@ -473,7 +460,7 @@ static int __devinit pata_icside_add_ports(struct pata_icside_info *info)
473 for (i = 0; i < info->nr_ports; i++) { 460 for (i = 0; i < info->nr_ports; i++) {
474 struct ata_port *ap = host->ports[i]; 461 struct ata_port *ap = host->ports[i];
475 462
476 ap->pio_mask = 0x1f; 463 ap->pio_mask = ATA_PIO4;
477 ap->mwdma_mask = info->mwdma_mask; 464 ap->mwdma_mask = info->mwdma_mask;
478 ap->flags |= ATA_FLAG_SLAVE_POSS; 465 ap->flags |= ATA_FLAG_SLAVE_POSS;
479 ap->ops = &pata_icside_port_ops; 466 ap->ops = &pata_icside_port_ops;
diff --git a/drivers/ata/pata_isapnp.c b/drivers/ata/pata_isapnp.c
index 15cdb9148aa..4bceb8803a1 100644
--- a/drivers/ata/pata_isapnp.c
+++ b/drivers/ata/pata_isapnp.c
@@ -17,7 +17,7 @@
17#include <linux/libata.h> 17#include <linux/libata.h>
18 18
19#define DRV_NAME "pata_isapnp" 19#define DRV_NAME "pata_isapnp"
20#define DRV_VERSION "0.2.2" 20#define DRV_VERSION "0.2.5"
21 21
22static struct scsi_host_template isapnp_sht = { 22static struct scsi_host_template isapnp_sht = {
23 ATA_PIO_SHT(DRV_NAME), 23 ATA_PIO_SHT(DRV_NAME),
@@ -28,6 +28,13 @@ static struct ata_port_operations isapnp_port_ops = {
28 .cable_detect = ata_cable_40wire, 28 .cable_detect = ata_cable_40wire,
29}; 29};
30 30
31static struct ata_port_operations isapnp_noalt_port_ops = {
32 .inherits = &ata_sff_port_ops,
33 .cable_detect = ata_cable_40wire,
34 /* No altstatus so we don't want to use the lost interrupt poll */
35 .lost_interrupt = ATA_OP_NULL,
36};
37
31/** 38/**
32 * isapnp_init_one - attach an isapnp interface 39 * isapnp_init_one - attach an isapnp interface
33 * @idev: PnP device 40 * @idev: PnP device
@@ -65,8 +72,8 @@ static int isapnp_init_one(struct pnp_dev *idev, const struct pnp_device_id *dev
65 72
66 ap = host->ports[0]; 73 ap = host->ports[0];
67 74
68 ap->ops = &isapnp_port_ops; 75 ap->ops = &isapnp_noalt_port_ops;
69 ap->pio_mask = 1; 76 ap->pio_mask = ATA_PIO0;
70 ap->flags |= ATA_FLAG_SLAVE_POSS; 77 ap->flags |= ATA_FLAG_SLAVE_POSS;
71 78
72 ap->ioaddr.cmd_addr = cmd_addr; 79 ap->ioaddr.cmd_addr = cmd_addr;
@@ -76,6 +83,7 @@ static int isapnp_init_one(struct pnp_dev *idev, const struct pnp_device_id *dev
76 pnp_port_start(idev, 1), 1); 83 pnp_port_start(idev, 1), 1);
77 ap->ioaddr.altstatus_addr = ctl_addr; 84 ap->ioaddr.altstatus_addr = ctl_addr;
78 ap->ioaddr.ctl_addr = ctl_addr; 85 ap->ioaddr.ctl_addr = ctl_addr;
86 ap->ops = &isapnp_port_ops;
79 } 87 }
80 88
81 ata_sff_std_ports(&ap->ioaddr); 89 ata_sff_std_ports(&ap->ioaddr);
diff --git a/drivers/ata/pata_it8213.c b/drivers/ata/pata_it8213.c
index c113d7c079c..f156da8076f 100644
--- a/drivers/ata/pata_it8213.c
+++ b/drivers/ata/pata_it8213.c
@@ -262,8 +262,8 @@ static int it8213_init_one (struct pci_dev *pdev, const struct pci_device_id *en
262 static int printed_version; 262 static int printed_version;
263 static const struct ata_port_info info = { 263 static const struct ata_port_info info = {
264 .flags = ATA_FLAG_SLAVE_POSS, 264 .flags = ATA_FLAG_SLAVE_POSS,
265 .pio_mask = 0x1f, /* pio0-4 */ 265 .pio_mask = ATA_PIO4,
266 .mwdma_mask = 0x07, /* mwdma0-2 */ 266 .mwdma_mask = ATA_MWDMA2,
267 .udma_mask = ATA_UDMA4, /* FIXME: want UDMA 100? */ 267 .udma_mask = ATA_UDMA4, /* FIXME: want UDMA 100? */
268 .port_ops = &it8213_ops, 268 .port_ops = &it8213_ops,
269 }; 269 };
diff --git a/drivers/ata/pata_it821x.c b/drivers/ata/pata_it821x.c
index b05b86a912c..188bc2fcd22 100644
--- a/drivers/ata/pata_it821x.c
+++ b/drivers/ata/pata_it821x.c
@@ -875,29 +875,29 @@ static int it821x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
875 875
876 static const struct ata_port_info info_smart = { 876 static const struct ata_port_info info_smart = {
877 .flags = ATA_FLAG_SLAVE_POSS, 877 .flags = ATA_FLAG_SLAVE_POSS,
878 .pio_mask = 0x1f, 878 .pio_mask = ATA_PIO4,
879 .mwdma_mask = 0x07, 879 .mwdma_mask = ATA_MWDMA2,
880 .udma_mask = ATA_UDMA6, 880 .udma_mask = ATA_UDMA6,
881 .port_ops = &it821x_smart_port_ops 881 .port_ops = &it821x_smart_port_ops
882 }; 882 };
883 static const struct ata_port_info info_passthru = { 883 static const struct ata_port_info info_passthru = {
884 .flags = ATA_FLAG_SLAVE_POSS, 884 .flags = ATA_FLAG_SLAVE_POSS,
885 .pio_mask = 0x1f, 885 .pio_mask = ATA_PIO4,
886 .mwdma_mask = 0x07, 886 .mwdma_mask = ATA_MWDMA2,
887 .udma_mask = ATA_UDMA6, 887 .udma_mask = ATA_UDMA6,
888 .port_ops = &it821x_passthru_port_ops 888 .port_ops = &it821x_passthru_port_ops
889 }; 889 };
890 static const struct ata_port_info info_rdc = { 890 static const struct ata_port_info info_rdc = {
891 .flags = ATA_FLAG_SLAVE_POSS, 891 .flags = ATA_FLAG_SLAVE_POSS,
892 .pio_mask = 0x1f, 892 .pio_mask = ATA_PIO4,
893 .mwdma_mask = 0x07, 893 .mwdma_mask = ATA_MWDMA2,
894 .udma_mask = ATA_UDMA6, 894 .udma_mask = ATA_UDMA6,
895 .port_ops = &it821x_rdc_port_ops 895 .port_ops = &it821x_rdc_port_ops
896 }; 896 };
897 static const struct ata_port_info info_rdc_11 = { 897 static const struct ata_port_info info_rdc_11 = {
898 .flags = ATA_FLAG_SLAVE_POSS, 898 .flags = ATA_FLAG_SLAVE_POSS,
899 .pio_mask = 0x1f, 899 .pio_mask = ATA_PIO4,
900 .mwdma_mask = 0x07, 900 .mwdma_mask = ATA_MWDMA2,
901 /* No UDMA */ 901 /* No UDMA */
902 .port_ops = &it821x_rdc_port_ops 902 .port_ops = &it821x_rdc_port_ops
903 }; 903 };
diff --git a/drivers/ata/pata_ixp4xx_cf.c b/drivers/ata/pata_ixp4xx_cf.c
index b173c157ab0..19fdecf319a 100644
--- a/drivers/ata/pata_ixp4xx_cf.c
+++ b/drivers/ata/pata_ixp4xx_cf.c
@@ -176,7 +176,7 @@ static __devinit int ixp4xx_pata_probe(struct platform_device *pdev)
176 ap = host->ports[0]; 176 ap = host->ports[0];
177 177
178 ap->ops = &ixp4xx_port_ops; 178 ap->ops = &ixp4xx_port_ops;
179 ap->pio_mask = 0x1f; /* PIO4 */ 179 ap->pio_mask = ATA_PIO4;
180 ap->flags |= ATA_FLAG_MMIO | ATA_FLAG_NO_LEGACY | ATA_FLAG_NO_ATAPI; 180 ap->flags |= ATA_FLAG_MMIO | ATA_FLAG_NO_LEGACY | ATA_FLAG_NO_ATAPI;
181 181
182 ixp4xx_setup_port(ap, data, cs0->start, cs1->start); 182 ixp4xx_setup_port(ap, data, cs0->start, cs1->start);
diff --git a/drivers/ata/pata_jmicron.c b/drivers/ata/pata_jmicron.c
index 38cf1ab2d28..3a1474ac883 100644
--- a/drivers/ata/pata_jmicron.c
+++ b/drivers/ata/pata_jmicron.c
@@ -136,8 +136,8 @@ static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *i
136 static const struct ata_port_info info = { 136 static const struct ata_port_info info = {
137 .flags = ATA_FLAG_SLAVE_POSS, 137 .flags = ATA_FLAG_SLAVE_POSS,
138 138
139 .pio_mask = 0x1f, 139 .pio_mask = ATA_PIO4,
140 .mwdma_mask = 0x07, 140 .mwdma_mask = ATA_MWDMA2,
141 .udma_mask = ATA_UDMA5, 141 .udma_mask = ATA_UDMA5,
142 142
143 .port_ops = &jmicron_ops, 143 .port_ops = &jmicron_ops,
diff --git a/drivers/ata/pata_legacy.c b/drivers/ata/pata_legacy.c
index e3bc1b43628..3f830f0fe2c 100644
--- a/drivers/ata/pata_legacy.c
+++ b/drivers/ata/pata_legacy.c
@@ -129,7 +129,7 @@ static int qdi; /* Set to probe QDI controllers */
129static int winbond; /* Set to probe Winbond controllers, 129static int winbond; /* Set to probe Winbond controllers,
130 give I/O port if non standard */ 130 give I/O port if non standard */
131static int autospeed; /* Chip present which snoops speed changes */ 131static int autospeed; /* Chip present which snoops speed changes */
132static int pio_mask = 0x1F; /* PIO range for autospeed devices */ 132static int pio_mask = ATA_PIO4; /* PIO range for autospeed devices */
133static int iordy_mask = 0xFFFFFFFF; /* Use iordy if available */ 133static int iordy_mask = 0xFFFFFFFF; /* Use iordy if available */
134 134
135/** 135/**
diff --git a/drivers/ata/pata_marvell.c b/drivers/ata/pata_marvell.c
index 76e399bf8c1..2096fb737f8 100644
--- a/drivers/ata/pata_marvell.c
+++ b/drivers/ata/pata_marvell.c
@@ -126,8 +126,8 @@ static int marvell_init_one (struct pci_dev *pdev, const struct pci_device_id *i
126 static const struct ata_port_info info = { 126 static const struct ata_port_info info = {
127 .flags = ATA_FLAG_SLAVE_POSS, 127 .flags = ATA_FLAG_SLAVE_POSS,
128 128
129 .pio_mask = 0x1f, 129 .pio_mask = ATA_PIO4,
130 .mwdma_mask = 0x07, 130 .mwdma_mask = ATA_MWDMA2,
131 .udma_mask = ATA_UDMA5, 131 .udma_mask = ATA_UDMA5,
132 132
133 .port_ops = &marvell_ops, 133 .port_ops = &marvell_ops,
@@ -136,8 +136,8 @@ static int marvell_init_one (struct pci_dev *pdev, const struct pci_device_id *i
136 /* Slave possible as its magically mapped not real */ 136 /* Slave possible as its magically mapped not real */
137 .flags = ATA_FLAG_SLAVE_POSS, 137 .flags = ATA_FLAG_SLAVE_POSS,
138 138
139 .pio_mask = 0x1f, 139 .pio_mask = ATA_PIO4,
140 .mwdma_mask = 0x07, 140 .mwdma_mask = ATA_MWDMA2,
141 .udma_mask = ATA_UDMA6, 141 .udma_mask = ATA_UDMA6,
142 142
143 .port_ops = &marvell_ops, 143 .port_ops = &marvell_ops,
diff --git a/drivers/ata/pata_mpc52xx.c b/drivers/ata/pata_mpc52xx.c
index 50ae6d13078..68d27bc70d0 100644
--- a/drivers/ata/pata_mpc52xx.c
+++ b/drivers/ata/pata_mpc52xx.c
@@ -737,10 +737,10 @@ mpc52xx_ata_probe(struct of_device *op, const struct of_device_id *match)
737 */ 737 */
738 prop = of_get_property(op->node, "mwdma-mode", &proplen); 738 prop = of_get_property(op->node, "mwdma-mode", &proplen);
739 if ((prop) && (proplen >= 4)) 739 if ((prop) && (proplen >= 4))
740 mwdma_mask = 0x7 & ((1 << (*prop + 1)) - 1); 740 mwdma_mask = ATA_MWDMA2 & ((1 << (*prop + 1)) - 1);
741 prop = of_get_property(op->node, "udma-mode", &proplen); 741 prop = of_get_property(op->node, "udma-mode", &proplen);
742 if ((prop) && (proplen >= 4)) 742 if ((prop) && (proplen >= 4))
743 udma_mask = 0x7 & ((1 << (*prop + 1)) - 1); 743 udma_mask = ATA_UDMA2 & ((1 << (*prop + 1)) - 1);
744 744
745 ata_irq = irq_of_parse_and_map(op->node, 0); 745 ata_irq = irq_of_parse_and_map(op->node, 0);
746 if (ata_irq == NO_IRQ) { 746 if (ata_irq == NO_IRQ) {
diff --git a/drivers/ata/pata_mpiix.c b/drivers/ata/pata_mpiix.c
index aa576cac4d1..b21f0021f54 100644
--- a/drivers/ata/pata_mpiix.c
+++ b/drivers/ata/pata_mpiix.c
@@ -200,7 +200,7 @@ static int mpiix_init_one(struct pci_dev *dev, const struct pci_device_id *id)
200 the MPIIX your box goes castors up */ 200 the MPIIX your box goes castors up */
201 201
202 ap->ops = &mpiix_port_ops; 202 ap->ops = &mpiix_port_ops;
203 ap->pio_mask = 0x1F; 203 ap->pio_mask = ATA_PIO4;
204 ap->flags |= ATA_FLAG_SLAVE_POSS; 204 ap->flags |= ATA_FLAG_SLAVE_POSS;
205 205
206 ap->ioaddr.cmd_addr = cmd_addr; 206 ap->ioaddr.cmd_addr = cmd_addr;
diff --git a/drivers/ata/pata_netcell.c b/drivers/ata/pata_netcell.c
index 9dc05e1656a..bdb236957cb 100644
--- a/drivers/ata/pata_netcell.c
+++ b/drivers/ata/pata_netcell.c
@@ -51,8 +51,8 @@ static int netcell_init_one (struct pci_dev *pdev, const struct pci_device_id *e
51 .flags = ATA_FLAG_SLAVE_POSS, 51 .flags = ATA_FLAG_SLAVE_POSS,
52 /* Actually we don't really care about these as the 52 /* Actually we don't really care about these as the
53 firmware deals with it */ 53 firmware deals with it */
54 .pio_mask = 0x1f, /* pio0-4 */ 54 .pio_mask = ATA_PIO4,
55 .mwdma_mask = 0x07, /* mwdma0-2 */ 55 .mwdma_mask = ATA_MWDMA2,
56 .udma_mask = ATA_UDMA5, /* UDMA 133 */ 56 .udma_mask = ATA_UDMA5, /* UDMA 133 */
57 .port_ops = &netcell_ops, 57 .port_ops = &netcell_ops,
58 }; 58 };
diff --git a/drivers/ata/pata_ninja32.c b/drivers/ata/pata_ninja32.c
index 4dd9a3b031e..0fb6b1b1e63 100644
--- a/drivers/ata/pata_ninja32.c
+++ b/drivers/ata/pata_ninja32.c
@@ -136,7 +136,7 @@ static int ninja32_init_one(struct pci_dev *dev, const struct pci_device_id *id)
136 if (!base) 136 if (!base)
137 return -ENOMEM; 137 return -ENOMEM;
138 ap->ops = &ninja32_port_ops; 138 ap->ops = &ninja32_port_ops;
139 ap->pio_mask = 0x1F; 139 ap->pio_mask = ATA_PIO4;
140 ap->flags |= ATA_FLAG_SLAVE_POSS; 140 ap->flags |= ATA_FLAG_SLAVE_POSS;
141 141
142 ap->ioaddr.cmd_addr = base + 0x10; 142 ap->ioaddr.cmd_addr = base + 0x10;
diff --git a/drivers/ata/pata_ns87410.c b/drivers/ata/pata_ns87410.c
index 40d411c460d..ca53fac0671 100644
--- a/drivers/ata/pata_ns87410.c
+++ b/drivers/ata/pata_ns87410.c
@@ -144,7 +144,7 @@ static int ns87410_init_one(struct pci_dev *dev, const struct pci_device_id *id)
144{ 144{
145 static const struct ata_port_info info = { 145 static const struct ata_port_info info = {
146 .flags = ATA_FLAG_SLAVE_POSS, 146 .flags = ATA_FLAG_SLAVE_POSS,
147 .pio_mask = 0x0F, 147 .pio_mask = ATA_PIO3,
148 .port_ops = &ns87410_port_ops 148 .port_ops = &ns87410_port_ops
149 }; 149 };
150 const struct ata_port_info *ppi[] = { &info, NULL }; 150 const struct ata_port_info *ppi[] = { &info, NULL };
diff --git a/drivers/ata/pata_ns87415.c b/drivers/ata/pata_ns87415.c
index 89bf5f865d6..773b1590b49 100644
--- a/drivers/ata/pata_ns87415.c
+++ b/drivers/ata/pata_ns87415.c
@@ -346,8 +346,8 @@ static int ns87415_init_one (struct pci_dev *pdev, const struct pci_device_id *e
346 static int printed_version; 346 static int printed_version;
347 static const struct ata_port_info info = { 347 static const struct ata_port_info info = {
348 .flags = ATA_FLAG_SLAVE_POSS, 348 .flags = ATA_FLAG_SLAVE_POSS,
349 .pio_mask = 0x1f, /* pio0-4 */ 349 .pio_mask = ATA_PIO4,
350 .mwdma_mask = 0x07, /* mwdma0-2 */ 350 .mwdma_mask = ATA_MWDMA2,
351 .port_ops = &ns87415_pata_ops, 351 .port_ops = &ns87415_pata_ops,
352 }; 352 };
353 const struct ata_port_info *ppi[] = { &info, NULL }; 353 const struct ata_port_info *ppi[] = { &info, NULL };
@@ -355,8 +355,8 @@ static int ns87415_init_one (struct pci_dev *pdev, const struct pci_device_id *e
355#if defined(CONFIG_SUPERIO) 355#if defined(CONFIG_SUPERIO)
356 static const struct ata_port_info info87560 = { 356 static const struct ata_port_info info87560 = {
357 .flags = ATA_FLAG_SLAVE_POSS, 357 .flags = ATA_FLAG_SLAVE_POSS,
358 .pio_mask = 0x1f, /* pio0-4 */ 358 .pio_mask = ATA_PIO4,
359 .mwdma_mask = 0x07, /* mwdma0-2 */ 359 .mwdma_mask = ATA_MWDMA2,
360 .port_ops = &ns87560_pata_ops, 360 .port_ops = &ns87560_pata_ops,
361 }; 361 };
362 362
diff --git a/drivers/ata/pata_octeon_cf.c b/drivers/ata/pata_octeon_cf.c
index 0fe4ef309c6..efe2c1985af 100644
--- a/drivers/ata/pata_octeon_cf.c
+++ b/drivers/ata/pata_octeon_cf.c
@@ -871,7 +871,7 @@ static int __devinit octeon_cf_probe(struct platform_device *pdev)
871 ap->private_data = cf_port; 871 ap->private_data = cf_port;
872 cf_port->ap = ap; 872 cf_port->ap = ap;
873 ap->ops = &octeon_cf_ops; 873 ap->ops = &octeon_cf_ops;
874 ap->pio_mask = 0x7f; /* Support PIO 0-6 */ 874 ap->pio_mask = ATA_PIO6;
875 ap->flags |= ATA_FLAG_MMIO | ATA_FLAG_NO_LEGACY 875 ap->flags |= ATA_FLAG_MMIO | ATA_FLAG_NO_LEGACY
876 | ATA_FLAG_NO_ATAPI | ATA_FLAG_PIO_POLLING; 876 | ATA_FLAG_NO_ATAPI | ATA_FLAG_PIO_POLLING;
877 877
@@ -900,7 +900,7 @@ static int __devinit octeon_cf_probe(struct platform_device *pdev)
900 ap->ioaddr.ctl_addr = cs1 + (6 << 1) + 1; 900 ap->ioaddr.ctl_addr = cs1 + (6 << 1) + 1;
901 octeon_cf_ops.sff_data_xfer = octeon_cf_data_xfer16; 901 octeon_cf_ops.sff_data_xfer = octeon_cf_data_xfer16;
902 902
903 ap->mwdma_mask = 0x1f; /* Support MWDMA 0-4 */ 903 ap->mwdma_mask = ATA_MWDMA4;
904 irq = platform_get_irq(pdev, 0); 904 irq = platform_get_irq(pdev, 0);
905 irq_handler = octeon_cf_interrupt; 905 irq_handler = octeon_cf_interrupt;
906 906
diff --git a/drivers/ata/pata_oldpiix.c b/drivers/ata/pata_oldpiix.c
index 2c1a91c40c1..84ac5033ac8 100644
--- a/drivers/ata/pata_oldpiix.c
+++ b/drivers/ata/pata_oldpiix.c
@@ -238,8 +238,8 @@ static int oldpiix_init_one (struct pci_dev *pdev, const struct pci_device_id *e
238 static int printed_version; 238 static int printed_version;
239 static const struct ata_port_info info = { 239 static const struct ata_port_info info = {
240 .flags = ATA_FLAG_SLAVE_POSS, 240 .flags = ATA_FLAG_SLAVE_POSS,
241 .pio_mask = 0x1f, /* pio0-4 */ 241 .pio_mask = ATA_PIO4,
242 .mwdma_mask = 0x07, /* mwdma1-2 */ 242 .mwdma_mask = ATA_MWDMA2,
243 .port_ops = &oldpiix_pata_ops, 243 .port_ops = &oldpiix_pata_ops,
244 }; 244 };
245 const struct ata_port_info *ppi[] = { &info, NULL }; 245 const struct ata_port_info *ppi[] = { &info, NULL };
diff --git a/drivers/ata/pata_opti.c b/drivers/ata/pata_opti.c
index e4fa4d565e9..99eddda2d2e 100644
--- a/drivers/ata/pata_opti.c
+++ b/drivers/ata/pata_opti.c
@@ -163,7 +163,7 @@ static int opti_init_one(struct pci_dev *dev, const struct pci_device_id *id)
163{ 163{
164 static const struct ata_port_info info = { 164 static const struct ata_port_info info = {
165 .flags = ATA_FLAG_SLAVE_POSS, 165 .flags = ATA_FLAG_SLAVE_POSS,
166 .pio_mask = 0x1f, 166 .pio_mask = ATA_PIO4,
167 .port_ops = &opti_port_ops 167 .port_ops = &opti_port_ops
168 }; 168 };
169 const struct ata_port_info *ppi[] = { &info, NULL }; 169 const struct ata_port_info *ppi[] = { &info, NULL };
diff --git a/drivers/ata/pata_optidma.c b/drivers/ata/pata_optidma.c
index 93bb6e91973..86885a445f9 100644
--- a/drivers/ata/pata_optidma.c
+++ b/drivers/ata/pata_optidma.c
@@ -399,15 +399,15 @@ static int optidma_init_one(struct pci_dev *dev, const struct pci_device_id *id)
399{ 399{
400 static const struct ata_port_info info_82c700 = { 400 static const struct ata_port_info info_82c700 = {
401 .flags = ATA_FLAG_SLAVE_POSS, 401 .flags = ATA_FLAG_SLAVE_POSS,
402 .pio_mask = 0x1f, 402 .pio_mask = ATA_PIO4,
403 .mwdma_mask = 0x07, 403 .mwdma_mask = ATA_MWDMA2,
404 .port_ops = &optidma_port_ops 404 .port_ops = &optidma_port_ops
405 }; 405 };
406 static const struct ata_port_info info_82c700_udma = { 406 static const struct ata_port_info info_82c700_udma = {
407 .flags = ATA_FLAG_SLAVE_POSS, 407 .flags = ATA_FLAG_SLAVE_POSS,
408 .pio_mask = 0x1f, 408 .pio_mask = ATA_PIO4,
409 .mwdma_mask = 0x07, 409 .mwdma_mask = ATA_MWDMA2,
410 .udma_mask = 0x07, 410 .udma_mask = ATA_UDMA2,
411 .port_ops = &optiplus_port_ops 411 .port_ops = &optiplus_port_ops
412 }; 412 };
413 const struct ata_port_info *ppi[] = { &info_82c700, NULL }; 413 const struct ata_port_info *ppi[] = { &info_82c700, NULL };
diff --git a/drivers/ata/pata_pcmcia.c b/drivers/ata/pata_pcmcia.c
index 64b2e2281ee..f4d009ed50a 100644
--- a/drivers/ata/pata_pcmcia.c
+++ b/drivers/ata/pata_pcmcia.c
@@ -42,7 +42,7 @@
42 42
43 43
44#define DRV_NAME "pata_pcmcia" 44#define DRV_NAME "pata_pcmcia"
45#define DRV_VERSION "0.3.3" 45#define DRV_VERSION "0.3.5"
46 46
47/* 47/*
48 * Private data structure to glue stuff together 48 * Private data structure to glue stuff together
@@ -126,6 +126,37 @@ static unsigned int ata_data_xfer_8bit(struct ata_device *dev,
126 return buflen; 126 return buflen;
127} 127}
128 128
129/**
130 * pcmcia_8bit_drain_fifo - Stock FIFO drain logic for SFF controllers
131 * @qc: command
132 *
133 * Drain the FIFO and device of any stuck data following a command
134 * failing to complete. In some cases this is neccessary before a
135 * reset will recover the device.
136 *
137 */
138
139void pcmcia_8bit_drain_fifo(struct ata_queued_cmd *qc)
140{
141 int count;
142 struct ata_port *ap;
143
144 /* We only need to flush incoming data when a command was running */
145 if (qc == NULL || qc->dma_dir == DMA_TO_DEVICE)
146 return;
147
148 ap = qc->ap;
149
150 /* Drain up to 64K of data before we give up this recovery method */
151 for (count = 0; (ap->ops->sff_check_status(ap) & ATA_DRQ)
152 && count++ < 65536;)
153 ioread8(ap->ioaddr.data_addr);
154
155 if (count)
156 ata_port_printk(ap, KERN_WARNING, "drained %d bytes to clear DRQ.\n",
157 count);
158
159}
129 160
130static struct scsi_host_template pcmcia_sht = { 161static struct scsi_host_template pcmcia_sht = {
131 ATA_PIO_SHT(DRV_NAME), 162 ATA_PIO_SHT(DRV_NAME),
@@ -143,6 +174,7 @@ static struct ata_port_operations pcmcia_8bit_port_ops = {
143 .sff_data_xfer = ata_data_xfer_8bit, 174 .sff_data_xfer = ata_data_xfer_8bit,
144 .cable_detect = ata_cable_40wire, 175 .cable_detect = ata_cable_40wire,
145 .set_mode = pcmcia_set_mode_8bit, 176 .set_mode = pcmcia_set_mode_8bit,
177 .drain_fifo = pcmcia_8bit_drain_fifo,
146}; 178};
147 179
148#define CS_CHECK(fn, ret) \ 180#define CS_CHECK(fn, ret) \
@@ -299,7 +331,7 @@ static int pcmcia_init_one(struct pcmcia_device *pdev)
299 ap = host->ports[p]; 331 ap = host->ports[p];
300 332
301 ap->ops = ops; 333 ap->ops = ops;
302 ap->pio_mask = 1; /* ISA so PIO 0 cycles */ 334 ap->pio_mask = ATA_PIO0; /* ISA so PIO 0 cycles */
303 ap->flags |= ATA_FLAG_SLAVE_POSS; 335 ap->flags |= ATA_FLAG_SLAVE_POSS;
304 ap->ioaddr.cmd_addr = io_addr + 0x10 * p; 336 ap->ioaddr.cmd_addr = io_addr + 0x10 * p;
305 ap->ioaddr.altstatus_addr = ctl_addr + 0x10 * p; 337 ap->ioaddr.altstatus_addr = ctl_addr + 0x10 * p;
diff --git a/drivers/ata/pata_pdc2027x.c b/drivers/ata/pata_pdc2027x.c
index e94efccaa48..ca5cad0fd80 100644
--- a/drivers/ata/pata_pdc2027x.c
+++ b/drivers/ata/pata_pdc2027x.c
@@ -152,18 +152,18 @@ static struct ata_port_info pdc2027x_port_info[] = {
152 { 152 {
153 .flags = ATA_FLAG_NO_LEGACY | ATA_FLAG_SLAVE_POSS | 153 .flags = ATA_FLAG_NO_LEGACY | ATA_FLAG_SLAVE_POSS |
154 ATA_FLAG_MMIO, 154 ATA_FLAG_MMIO,
155 .pio_mask = 0x1f, /* pio0-4 */ 155 .pio_mask = ATA_PIO4,
156 .mwdma_mask = 0x07, /* mwdma0-2 */ 156 .mwdma_mask = ATA_MWDMA2,
157 .udma_mask = ATA_UDMA5, /* udma0-5 */ 157 .udma_mask = ATA_UDMA5,
158 .port_ops = &pdc2027x_pata100_ops, 158 .port_ops = &pdc2027x_pata100_ops,
159 }, 159 },
160 /* PDC_UDMA_133 */ 160 /* PDC_UDMA_133 */
161 { 161 {
162 .flags = ATA_FLAG_NO_LEGACY | ATA_FLAG_SLAVE_POSS | 162 .flags = ATA_FLAG_NO_LEGACY | ATA_FLAG_SLAVE_POSS |
163 ATA_FLAG_MMIO, 163 ATA_FLAG_MMIO,
164 .pio_mask = 0x1f, /* pio0-4 */ 164 .pio_mask = ATA_PIO4,
165 .mwdma_mask = 0x07, /* mwdma0-2 */ 165 .mwdma_mask = ATA_MWDMA2,
166 .udma_mask = ATA_UDMA6, /* udma0-6 */ 166 .udma_mask = ATA_UDMA6,
167 .port_ops = &pdc2027x_pata133_ops, 167 .port_ops = &pdc2027x_pata133_ops,
168 }, 168 },
169}; 169};
diff --git a/drivers/ata/pata_pdc202xx_old.c b/drivers/ata/pata_pdc202xx_old.c
index 799a6a09871..5fedb3d4032 100644
--- a/drivers/ata/pata_pdc202xx_old.c
+++ b/drivers/ata/pata_pdc202xx_old.c
@@ -291,22 +291,22 @@ static int pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id
291 static const struct ata_port_info info[3] = { 291 static const struct ata_port_info info[3] = {
292 { 292 {
293 .flags = ATA_FLAG_SLAVE_POSS, 293 .flags = ATA_FLAG_SLAVE_POSS,
294 .pio_mask = 0x1f, 294 .pio_mask = ATA_PIO4,
295 .mwdma_mask = 0x07, 295 .mwdma_mask = ATA_MWDMA2,
296 .udma_mask = ATA_UDMA2, 296 .udma_mask = ATA_UDMA2,
297 .port_ops = &pdc2024x_port_ops 297 .port_ops = &pdc2024x_port_ops
298 }, 298 },
299 { 299 {
300 .flags = ATA_FLAG_SLAVE_POSS, 300 .flags = ATA_FLAG_SLAVE_POSS,
301 .pio_mask = 0x1f, 301 .pio_mask = ATA_PIO4,
302 .mwdma_mask = 0x07, 302 .mwdma_mask = ATA_MWDMA2,
303 .udma_mask = ATA_UDMA4, 303 .udma_mask = ATA_UDMA4,
304 .port_ops = &pdc2026x_port_ops 304 .port_ops = &pdc2026x_port_ops
305 }, 305 },
306 { 306 {
307 .flags = ATA_FLAG_SLAVE_POSS, 307 .flags = ATA_FLAG_SLAVE_POSS,
308 .pio_mask = 0x1f, 308 .pio_mask = ATA_PIO4,
309 .mwdma_mask = 0x07, 309 .mwdma_mask = ATA_MWDMA2,
310 .udma_mask = ATA_UDMA5, 310 .udma_mask = ATA_UDMA5,
311 .port_ops = &pdc2026x_port_ops 311 .port_ops = &pdc2026x_port_ops
312 } 312 }
diff --git a/drivers/ata/pata_qdi.c b/drivers/ata/pata_qdi.c
index f1b26f7c8e4..45879dc6fa4 100644
--- a/drivers/ata/pata_qdi.c
+++ b/drivers/ata/pata_qdi.c
@@ -212,11 +212,11 @@ static __init int qdi_init_one(unsigned long port, int type, unsigned long io, i
212 212
213 if (type == 6580) { 213 if (type == 6580) {
214 ap->ops = &qdi6580_port_ops; 214 ap->ops = &qdi6580_port_ops;
215 ap->pio_mask = 0x1F; 215 ap->pio_mask = ATA_PIO4;
216 ap->flags |= ATA_FLAG_SLAVE_POSS; 216 ap->flags |= ATA_FLAG_SLAVE_POSS;
217 } else { 217 } else {
218 ap->ops = &qdi6500_port_ops; 218 ap->ops = &qdi6500_port_ops;
219 ap->pio_mask = 0x07; /* Actually PIO3 !IORDY is possible */ 219 ap->pio_mask = ATA_PIO2; /* Actually PIO3 !IORDY is possible */
220 ap->flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_NO_IORDY; 220 ap->flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_NO_IORDY;
221 } 221 }
222 222
diff --git a/drivers/ata/pata_radisys.c b/drivers/ata/pata_radisys.c
index 695d44ae52c..4401b332eaa 100644
--- a/drivers/ata/pata_radisys.c
+++ b/drivers/ata/pata_radisys.c
@@ -216,9 +216,9 @@ static int radisys_init_one (struct pci_dev *pdev, const struct pci_device_id *e
216 static int printed_version; 216 static int printed_version;
217 static const struct ata_port_info info = { 217 static const struct ata_port_info info = {
218 .flags = ATA_FLAG_SLAVE_POSS, 218 .flags = ATA_FLAG_SLAVE_POSS,
219 .pio_mask = 0x1f, /* pio0-4 */ 219 .pio_mask = ATA_PIO4,
220 .mwdma_mask = 0x07, /* mwdma1-2 */ 220 .mwdma_mask = ATA_MWDMA12_ONLY,
221 .udma_mask = 0x14, /* UDMA33/66 only */ 221 .udma_mask = ATA_UDMA24_ONLY,
222 .port_ops = &radisys_pata_ops, 222 .port_ops = &radisys_pata_ops,
223 }; 223 };
224 const struct ata_port_info *ppi[] = { &info, NULL }; 224 const struct ata_port_info *ppi[] = { &info, NULL };
diff --git a/drivers/ata/pata_rb532_cf.c b/drivers/ata/pata_rb532_cf.c
index ebfcda26d63..8e3cdef8a25 100644
--- a/drivers/ata/pata_rb532_cf.c
+++ b/drivers/ata/pata_rb532_cf.c
@@ -48,63 +48,11 @@
48struct rb532_cf_info { 48struct rb532_cf_info {
49 void __iomem *iobase; 49 void __iomem *iobase;
50 unsigned int gpio_line; 50 unsigned int gpio_line;
51 int frozen;
52 unsigned int irq; 51 unsigned int irq;
53}; 52};
54 53
55/* ------------------------------------------------------------------------ */ 54/* ------------------------------------------------------------------------ */
56 55
57static inline void rb532_pata_finish_io(struct ata_port *ap)
58{
59 struct ata_host *ah = ap->host;
60 struct rb532_cf_info *info = ah->private_data;
61
62 /* FIXME: Keep previous delay. If this is merely a fence then
63 ata_sff_sync might be sufficient. */
64 ata_sff_dma_pause(ap);
65 ndelay(RB500_CF_IO_DELAY);
66}
67
68static void rb532_pata_exec_command(struct ata_port *ap,
69 const struct ata_taskfile *tf)
70{
71 writeb(tf->command, ap->ioaddr.command_addr);
72 rb532_pata_finish_io(ap);
73}
74
75static unsigned int rb532_pata_data_xfer(struct ata_device *adev, unsigned char *buf,
76 unsigned int buflen, int write_data)
77{
78 struct ata_port *ap = adev->link->ap;
79 void __iomem *ioaddr = ap->ioaddr.data_addr;
80 int retlen = buflen;
81
82 if (write_data) {
83 for (; buflen > 0; buflen--, buf++)
84 writeb(*buf, ioaddr);
85 } else {
86 for (; buflen > 0; buflen--, buf++)
87 *buf = readb(ioaddr);
88 }
89
90 rb532_pata_finish_io(adev->link->ap);
91 return retlen;
92}
93
94static void rb532_pata_freeze(struct ata_port *ap)
95{
96 struct rb532_cf_info *info = ap->host->private_data;
97
98 info->frozen = 1;
99}
100
101static void rb532_pata_thaw(struct ata_port *ap)
102{
103 struct rb532_cf_info *info = ap->host->private_data;
104
105 info->frozen = 0;
106}
107
108static irqreturn_t rb532_pata_irq_handler(int irq, void *dev_instance) 56static irqreturn_t rb532_pata_irq_handler(int irq, void *dev_instance)
109{ 57{
110 struct ata_host *ah = dev_instance; 58 struct ata_host *ah = dev_instance;
@@ -112,8 +60,7 @@ static irqreturn_t rb532_pata_irq_handler(int irq, void *dev_instance)
112 60
113 if (gpio_get_value(info->gpio_line)) { 61 if (gpio_get_value(info->gpio_line)) {
114 set_irq_type(info->irq, IRQ_TYPE_LEVEL_LOW); 62 set_irq_type(info->irq, IRQ_TYPE_LEVEL_LOW);
115 if (!info->frozen) 63 ata_sff_interrupt(info->irq, dev_instance);
116 ata_sff_interrupt(info->irq, dev_instance);
117 } else { 64 } else {
118 set_irq_type(info->irq, IRQ_TYPE_LEVEL_HIGH); 65 set_irq_type(info->irq, IRQ_TYPE_LEVEL_HIGH);
119 } 66 }
@@ -123,10 +70,7 @@ static irqreturn_t rb532_pata_irq_handler(int irq, void *dev_instance)
123 70
124static struct ata_port_operations rb532_pata_port_ops = { 71static struct ata_port_operations rb532_pata_port_ops = {
125 .inherits = &ata_sff_port_ops, 72 .inherits = &ata_sff_port_ops,
126 .sff_exec_command = rb532_pata_exec_command, 73 .sff_data_xfer = ata_sff_data_xfer32,
127 .sff_data_xfer = rb532_pata_data_xfer,
128 .freeze = rb532_pata_freeze,
129 .thaw = rb532_pata_thaw,
130}; 74};
131 75
132/* ------------------------------------------------------------------------ */ 76/* ------------------------------------------------------------------------ */
@@ -145,7 +89,7 @@ static void rb532_pata_setup_ports(struct ata_host *ah)
145 ap = ah->ports[0]; 89 ap = ah->ports[0];
146 90
147 ap->ops = &rb532_pata_port_ops; 91 ap->ops = &rb532_pata_port_ops;
148 ap->pio_mask = 0x1f; /* PIO4 */ 92 ap->pio_mask = ATA_PIO4;
149 ap->flags = ATA_FLAG_NO_LEGACY | ATA_FLAG_MMIO; 93 ap->flags = ATA_FLAG_NO_LEGACY | ATA_FLAG_MMIO;
150 94
151 ap->ioaddr.cmd_addr = info->iobase + RB500_CF_REG_BASE; 95 ap->ioaddr.cmd_addr = info->iobase + RB500_CF_REG_BASE;
@@ -160,7 +104,7 @@ static void rb532_pata_setup_ports(struct ata_host *ah)
160 104
161static __devinit int rb532_pata_driver_probe(struct platform_device *pdev) 105static __devinit int rb532_pata_driver_probe(struct platform_device *pdev)
162{ 106{
163 unsigned int irq; 107 int irq;
164 int gpio; 108 int gpio;
165 struct resource *res; 109 struct resource *res;
166 struct ata_host *ah; 110 struct ata_host *ah;
diff --git a/drivers/ata/pata_rz1000.c b/drivers/ata/pata_rz1000.c
index 46d6bc1bf1e..0c574c065c6 100644
--- a/drivers/ata/pata_rz1000.c
+++ b/drivers/ata/pata_rz1000.c
@@ -88,7 +88,7 @@ static int rz1000_init_one (struct pci_dev *pdev, const struct pci_device_id *en
88 static int printed_version; 88 static int printed_version;
89 static const struct ata_port_info info = { 89 static const struct ata_port_info info = {
90 .flags = ATA_FLAG_SLAVE_POSS, 90 .flags = ATA_FLAG_SLAVE_POSS,
91 .pio_mask = 0x1f, 91 .pio_mask = ATA_PIO4,
92 .port_ops = &rz1000_port_ops 92 .port_ops = &rz1000_port_ops
93 }; 93 };
94 const struct ata_port_info *ppi[] = { &info, NULL }; 94 const struct ata_port_info *ppi[] = { &info, NULL };
diff --git a/drivers/ata/pata_sc1200.c b/drivers/ata/pata_sc1200.c
index 9a4bdca5461..f49814d6fd2 100644
--- a/drivers/ata/pata_sc1200.c
+++ b/drivers/ata/pata_sc1200.c
@@ -2,7 +2,6 @@
2 * New ATA layer SC1200 driver Alan Cox <alan@lxorguk.ukuu.org.uk> 2 * New ATA layer SC1200 driver Alan Cox <alan@lxorguk.ukuu.org.uk>
3 * 3 *
4 * TODO: Mode selection filtering 4 * TODO: Mode selection filtering
5 * TODO: Can't enable second channel until ATA core has serialize
6 * TODO: Needs custom DMA cleanup code 5 * TODO: Needs custom DMA cleanup code
7 * 6 *
8 * Based very heavily on 7 * Based very heavily on
@@ -178,6 +177,31 @@ static unsigned int sc1200_qc_issue(struct ata_queued_cmd *qc)
178 return ata_sff_qc_issue(qc); 177 return ata_sff_qc_issue(qc);
179} 178}
180 179
180/**
181 * sc1200_qc_defer - implement serialization
182 * @qc: command
183 *
184 * Serialize command issue on this controller.
185 */
186
187static int sc1200_qc_defer(struct ata_queued_cmd *qc)
188{
189 struct ata_host *host = qc->ap->host;
190 struct ata_port *alt = host->ports[1 ^ qc->ap->port_no];
191 int rc;
192
193 /* First apply the usual rules */
194 rc = ata_std_qc_defer(qc);
195 if (rc != 0)
196 return rc;
197
198 /* Now apply serialization rules. Only allow a command if the
199 other channel state machine is idle */
200 if (alt && alt->qc_active)
201 return ATA_DEFER_PORT;
202 return 0;
203}
204
181static struct scsi_host_template sc1200_sht = { 205static struct scsi_host_template sc1200_sht = {
182 ATA_BMDMA_SHT(DRV_NAME), 206 ATA_BMDMA_SHT(DRV_NAME),
183 .sg_tablesize = LIBATA_DUMB_MAX_PRD, 207 .sg_tablesize = LIBATA_DUMB_MAX_PRD,
@@ -187,6 +211,7 @@ static struct ata_port_operations sc1200_port_ops = {
187 .inherits = &ata_bmdma_port_ops, 211 .inherits = &ata_bmdma_port_ops,
188 .qc_prep = ata_sff_dumb_qc_prep, 212 .qc_prep = ata_sff_dumb_qc_prep,
189 .qc_issue = sc1200_qc_issue, 213 .qc_issue = sc1200_qc_issue,
214 .qc_defer = sc1200_qc_defer,
190 .cable_detect = ata_cable_40wire, 215 .cable_detect = ata_cable_40wire,
191 .set_piomode = sc1200_set_piomode, 216 .set_piomode = sc1200_set_piomode,
192 .set_dmamode = sc1200_set_dmamode, 217 .set_dmamode = sc1200_set_dmamode,
@@ -205,13 +230,13 @@ static int sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id)
205{ 230{
206 static const struct ata_port_info info = { 231 static const struct ata_port_info info = {
207 .flags = ATA_FLAG_SLAVE_POSS, 232 .flags = ATA_FLAG_SLAVE_POSS,
208 .pio_mask = 0x1f, 233 .pio_mask = ATA_PIO4,
209 .mwdma_mask = 0x07, 234 .mwdma_mask = ATA_MWDMA2,
210 .udma_mask = 0x07, 235 .udma_mask = ATA_UDMA2,
211 .port_ops = &sc1200_port_ops 236 .port_ops = &sc1200_port_ops
212 }; 237 };
213 /* Can't enable port 2 yet, see top comments */ 238 /* Can't enable port 2 yet, see top comments */
214 const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info }; 239 const struct ata_port_info *ppi[] = { &info, };
215 240
216 return ata_pci_sff_init_one(dev, ppi, &sc1200_sht, NULL); 241 return ata_pci_sff_init_one(dev, ppi, &sc1200_sht, NULL);
217} 242}
diff --git a/drivers/ata/pata_scc.c b/drivers/ata/pata_scc.c
index d447f1cb46e..4257d6b40af 100644
--- a/drivers/ata/pata_scc.c
+++ b/drivers/ata/pata_scc.c
@@ -1001,8 +1001,8 @@ static struct ata_port_operations scc_pata_ops = {
1001static struct ata_port_info scc_port_info[] = { 1001static struct ata_port_info scc_port_info[] = {
1002 { 1002 {
1003 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_MMIO | ATA_FLAG_NO_LEGACY, 1003 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_MMIO | ATA_FLAG_NO_LEGACY,
1004 .pio_mask = 0x1f, /* pio0-4 */ 1004 .pio_mask = ATA_PIO4,
1005 .mwdma_mask = 0x00, 1005 /* No MWDMA */
1006 .udma_mask = ATA_UDMA6, 1006 .udma_mask = ATA_UDMA6,
1007 .port_ops = &scc_pata_ops, 1007 .port_ops = &scc_pata_ops,
1008 }, 1008 },
diff --git a/drivers/ata/pata_sch.c b/drivers/ata/pata_sch.c
index 6aeeeeb3412..99cceb458e2 100644
--- a/drivers/ata/pata_sch.c
+++ b/drivers/ata/pata_sch.c
@@ -84,9 +84,9 @@ static struct ata_port_operations sch_pata_ops = {
84 84
85static struct ata_port_info sch_port_info = { 85static struct ata_port_info sch_port_info = {
86 .flags = ATA_FLAG_SLAVE_POSS, 86 .flags = ATA_FLAG_SLAVE_POSS,
87 .pio_mask = ATA_PIO4, /* pio0-4 */ 87 .pio_mask = ATA_PIO4,
88 .mwdma_mask = ATA_MWDMA2, /* mwdma0-2 */ 88 .mwdma_mask = ATA_MWDMA2,
89 .udma_mask = ATA_UDMA5, /* udma0-5 */ 89 .udma_mask = ATA_UDMA5,
90 .port_ops = &sch_pata_ops, 90 .port_ops = &sch_pata_ops,
91}; 91};
92 92
diff --git a/drivers/ata/pata_serverworks.c b/drivers/ata/pata_serverworks.c
index 8d2fd9dd40c..beaed12d50e 100644
--- a/drivers/ata/pata_serverworks.c
+++ b/drivers/ata/pata_serverworks.c
@@ -398,26 +398,26 @@ static int serverworks_init_one(struct pci_dev *pdev, const struct pci_device_id
398 static const struct ata_port_info info[4] = { 398 static const struct ata_port_info info[4] = {
399 { /* OSB4 */ 399 { /* OSB4 */
400 .flags = ATA_FLAG_SLAVE_POSS, 400 .flags = ATA_FLAG_SLAVE_POSS,
401 .pio_mask = 0x1f, 401 .pio_mask = ATA_PIO4,
402 .mwdma_mask = 0x07, 402 .mwdma_mask = ATA_MWDMA2,
403 .udma_mask = 0x07, 403 .udma_mask = ATA_UDMA2,
404 .port_ops = &serverworks_osb4_port_ops 404 .port_ops = &serverworks_osb4_port_ops
405 }, { /* OSB4 no UDMA */ 405 }, { /* OSB4 no UDMA */
406 .flags = ATA_FLAG_SLAVE_POSS, 406 .flags = ATA_FLAG_SLAVE_POSS,
407 .pio_mask = 0x1f, 407 .pio_mask = ATA_PIO4,
408 .mwdma_mask = 0x07, 408 .mwdma_mask = ATA_MWDMA2,
409 .udma_mask = 0x00, 409 /* No UDMA */
410 .port_ops = &serverworks_osb4_port_ops 410 .port_ops = &serverworks_osb4_port_ops
411 }, { /* CSB5 */ 411 }, { /* CSB5 */
412 .flags = ATA_FLAG_SLAVE_POSS, 412 .flags = ATA_FLAG_SLAVE_POSS,
413 .pio_mask = 0x1f, 413 .pio_mask = ATA_PIO4,
414 .mwdma_mask = 0x07, 414 .mwdma_mask = ATA_MWDMA2,
415 .udma_mask = ATA_UDMA4, 415 .udma_mask = ATA_UDMA4,
416 .port_ops = &serverworks_csb_port_ops 416 .port_ops = &serverworks_csb_port_ops
417 }, { /* CSB5 - later revisions*/ 417 }, { /* CSB5 - later revisions*/
418 .flags = ATA_FLAG_SLAVE_POSS, 418 .flags = ATA_FLAG_SLAVE_POSS,
419 .pio_mask = 0x1f, 419 .pio_mask = ATA_PIO4,
420 .mwdma_mask = 0x07, 420 .mwdma_mask = ATA_MWDMA2,
421 .udma_mask = ATA_UDMA5, 421 .udma_mask = ATA_UDMA5,
422 .port_ops = &serverworks_csb_port_ops 422 .port_ops = &serverworks_csb_port_ops
423 } 423 }
diff --git a/drivers/ata/pata_sil680.c b/drivers/ata/pata_sil680.c
index 9e764e5747e..4cb649d8d38 100644
--- a/drivers/ata/pata_sil680.c
+++ b/drivers/ata/pata_sil680.c
@@ -282,15 +282,15 @@ static int __devinit sil680_init_one(struct pci_dev *pdev,
282{ 282{
283 static const struct ata_port_info info = { 283 static const struct ata_port_info info = {
284 .flags = ATA_FLAG_SLAVE_POSS, 284 .flags = ATA_FLAG_SLAVE_POSS,
285 .pio_mask = 0x1f, 285 .pio_mask = ATA_PIO4,
286 .mwdma_mask = 0x07, 286 .mwdma_mask = ATA_MWDMA2,
287 .udma_mask = ATA_UDMA6, 287 .udma_mask = ATA_UDMA6,
288 .port_ops = &sil680_port_ops 288 .port_ops = &sil680_port_ops
289 }; 289 };
290 static const struct ata_port_info info_slow = { 290 static const struct ata_port_info info_slow = {
291 .flags = ATA_FLAG_SLAVE_POSS, 291 .flags = ATA_FLAG_SLAVE_POSS,
292 .pio_mask = 0x1f, 292 .pio_mask = ATA_PIO4,
293 .mwdma_mask = 0x07, 293 .mwdma_mask = ATA_MWDMA2,
294 .udma_mask = ATA_UDMA5, 294 .udma_mask = ATA_UDMA5,
295 .port_ops = &sil680_port_ops 295 .port_ops = &sil680_port_ops
296 }; 296 };
diff --git a/drivers/ata/pata_sis.c b/drivers/ata/pata_sis.c
index 27ceb42a774..488e77bcd22 100644
--- a/drivers/ata/pata_sis.c
+++ b/drivers/ata/pata_sis.c
@@ -552,51 +552,57 @@ static struct ata_port_operations sis_old_ops = {
552 552
553static const struct ata_port_info sis_info = { 553static const struct ata_port_info sis_info = {
554 .flags = ATA_FLAG_SLAVE_POSS, 554 .flags = ATA_FLAG_SLAVE_POSS,
555 .pio_mask = 0x1f, /* pio0-4 */ 555 .pio_mask = ATA_PIO4,
556 .mwdma_mask = 0x07, 556 .mwdma_mask = ATA_MWDMA2,
557 .udma_mask = 0, 557 /* No UDMA */
558 .port_ops = &sis_old_ops, 558 .port_ops = &sis_old_ops,
559}; 559};
560static const struct ata_port_info sis_info33 = { 560static const struct ata_port_info sis_info33 = {
561 .flags = ATA_FLAG_SLAVE_POSS, 561 .flags = ATA_FLAG_SLAVE_POSS,
562 .pio_mask = 0x1f, /* pio0-4 */ 562 .pio_mask = ATA_PIO4,
563 .mwdma_mask = 0x07, 563 .mwdma_mask = ATA_MWDMA2,
564 .udma_mask = ATA_UDMA2, /* UDMA 33 */ 564 .udma_mask = ATA_UDMA2,
565 .port_ops = &sis_old_ops, 565 .port_ops = &sis_old_ops,
566}; 566};
567static const struct ata_port_info sis_info66 = { 567static const struct ata_port_info sis_info66 = {
568 .flags = ATA_FLAG_SLAVE_POSS, 568 .flags = ATA_FLAG_SLAVE_POSS,
569 .pio_mask = 0x1f, /* pio0-4 */ 569 .pio_mask = ATA_PIO4,
570 .udma_mask = ATA_UDMA4, /* UDMA 66 */ 570 /* No MWDMA */
571 .udma_mask = ATA_UDMA4,
571 .port_ops = &sis_66_ops, 572 .port_ops = &sis_66_ops,
572}; 573};
573static const struct ata_port_info sis_info100 = { 574static const struct ata_port_info sis_info100 = {
574 .flags = ATA_FLAG_SLAVE_POSS, 575 .flags = ATA_FLAG_SLAVE_POSS,
575 .pio_mask = 0x1f, /* pio0-4 */ 576 .pio_mask = ATA_PIO4,
577 /* No MWDMA */
576 .udma_mask = ATA_UDMA5, 578 .udma_mask = ATA_UDMA5,
577 .port_ops = &sis_100_ops, 579 .port_ops = &sis_100_ops,
578}; 580};
579static const struct ata_port_info sis_info100_early = { 581static const struct ata_port_info sis_info100_early = {
580 .flags = ATA_FLAG_SLAVE_POSS, 582 .flags = ATA_FLAG_SLAVE_POSS,
583 .pio_mask = ATA_PIO4,
584 /* No MWDMA */
581 .udma_mask = ATA_UDMA5, 585 .udma_mask = ATA_UDMA5,
582 .pio_mask = 0x1f, /* pio0-4 */
583 .port_ops = &sis_66_ops, 586 .port_ops = &sis_66_ops,
584}; 587};
585static const struct ata_port_info sis_info133 = { 588static const struct ata_port_info sis_info133 = {
586 .flags = ATA_FLAG_SLAVE_POSS, 589 .flags = ATA_FLAG_SLAVE_POSS,
587 .pio_mask = 0x1f, /* pio0-4 */ 590 .pio_mask = ATA_PIO4,
591 /* No MWDMA */
588 .udma_mask = ATA_UDMA6, 592 .udma_mask = ATA_UDMA6,
589 .port_ops = &sis_133_ops, 593 .port_ops = &sis_133_ops,
590}; 594};
591const struct ata_port_info sis_info133_for_sata = { 595const struct ata_port_info sis_info133_for_sata = {
592 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 596 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
593 .pio_mask = 0x1f, /* pio0-4 */ 597 .pio_mask = ATA_PIO4,
598 /* No MWDMA */
594 .udma_mask = ATA_UDMA6, 599 .udma_mask = ATA_UDMA6,
595 .port_ops = &sis_133_for_sata_ops, 600 .port_ops = &sis_133_for_sata_ops,
596}; 601};
597static const struct ata_port_info sis_info133_early = { 602static const struct ata_port_info sis_info133_early = {
598 .flags = ATA_FLAG_SLAVE_POSS, 603 .flags = ATA_FLAG_SLAVE_POSS,
599 .pio_mask = 0x1f, /* pio0-4 */ 604 .pio_mask = ATA_PIO4,
605 /* No MWDMA */
600 .udma_mask = ATA_UDMA6, 606 .udma_mask = ATA_UDMA6,
601 .port_ops = &sis_133_early_ops, 607 .port_ops = &sis_133_early_ops,
602}; 608};
diff --git a/drivers/ata/pata_sl82c105.c b/drivers/ata/pata_sl82c105.c
index 1b0e7b6d8ef..29f733c3206 100644
--- a/drivers/ata/pata_sl82c105.c
+++ b/drivers/ata/pata_sl82c105.c
@@ -283,13 +283,13 @@ static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id
283{ 283{
284 static const struct ata_port_info info_dma = { 284 static const struct ata_port_info info_dma = {
285 .flags = ATA_FLAG_SLAVE_POSS, 285 .flags = ATA_FLAG_SLAVE_POSS,
286 .pio_mask = 0x1f, 286 .pio_mask = ATA_PIO4,
287 .mwdma_mask = 0x07, 287 .mwdma_mask = ATA_MWDMA2,
288 .port_ops = &sl82c105_port_ops 288 .port_ops = &sl82c105_port_ops
289 }; 289 };
290 static const struct ata_port_info info_early = { 290 static const struct ata_port_info info_early = {
291 .flags = ATA_FLAG_SLAVE_POSS, 291 .flags = ATA_FLAG_SLAVE_POSS,
292 .pio_mask = 0x1f, 292 .pio_mask = ATA_PIO4,
293 .port_ops = &sl82c105_port_ops 293 .port_ops = &sl82c105_port_ops
294 }; 294 };
295 /* for now use only the first port */ 295 /* for now use only the first port */
diff --git a/drivers/ata/pata_triflex.c b/drivers/ata/pata_triflex.c
index ef9597517cd..f1f13ff222f 100644
--- a/drivers/ata/pata_triflex.c
+++ b/drivers/ata/pata_triflex.c
@@ -191,8 +191,8 @@ static int triflex_init_one(struct pci_dev *dev, const struct pci_device_id *id)
191{ 191{
192 static const struct ata_port_info info = { 192 static const struct ata_port_info info = {
193 .flags = ATA_FLAG_SLAVE_POSS, 193 .flags = ATA_FLAG_SLAVE_POSS,
194 .pio_mask = 0x1f, 194 .pio_mask = ATA_PIO4,
195 .mwdma_mask = 0x07, 195 .mwdma_mask = ATA_MWDMA2,
196 .port_ops = &triflex_port_ops 196 .port_ops = &triflex_port_ops
197 }; 197 };
198 const struct ata_port_info *ppi[] = { &info, NULL }; 198 const struct ata_port_info *ppi[] = { &info, NULL };
diff --git a/drivers/ata/pata_via.c b/drivers/ata/pata_via.c
index ba556d3e696..b08e6e0f82b 100644
--- a/drivers/ata/pata_via.c
+++ b/drivers/ata/pata_via.c
@@ -422,46 +422,46 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
422 /* Early VIA without UDMA support */ 422 /* Early VIA without UDMA support */
423 static const struct ata_port_info via_mwdma_info = { 423 static const struct ata_port_info via_mwdma_info = {
424 .flags = ATA_FLAG_SLAVE_POSS, 424 .flags = ATA_FLAG_SLAVE_POSS,
425 .pio_mask = 0x1f, 425 .pio_mask = ATA_PIO4,
426 .mwdma_mask = 0x07, 426 .mwdma_mask = ATA_MWDMA2,
427 .port_ops = &via_port_ops 427 .port_ops = &via_port_ops
428 }; 428 };
429 /* Ditto with IRQ masking required */ 429 /* Ditto with IRQ masking required */
430 static const struct ata_port_info via_mwdma_info_borked = { 430 static const struct ata_port_info via_mwdma_info_borked = {
431 .flags = ATA_FLAG_SLAVE_POSS, 431 .flags = ATA_FLAG_SLAVE_POSS,
432 .pio_mask = 0x1f, 432 .pio_mask = ATA_PIO4,
433 .mwdma_mask = 0x07, 433 .mwdma_mask = ATA_MWDMA2,
434 .port_ops = &via_port_ops_noirq, 434 .port_ops = &via_port_ops_noirq,
435 }; 435 };
436 /* VIA UDMA 33 devices (and borked 66) */ 436 /* VIA UDMA 33 devices (and borked 66) */
437 static const struct ata_port_info via_udma33_info = { 437 static const struct ata_port_info via_udma33_info = {
438 .flags = ATA_FLAG_SLAVE_POSS, 438 .flags = ATA_FLAG_SLAVE_POSS,
439 .pio_mask = 0x1f, 439 .pio_mask = ATA_PIO4,
440 .mwdma_mask = 0x07, 440 .mwdma_mask = ATA_MWDMA2,
441 .udma_mask = ATA_UDMA2, 441 .udma_mask = ATA_UDMA2,
442 .port_ops = &via_port_ops 442 .port_ops = &via_port_ops
443 }; 443 };
444 /* VIA UDMA 66 devices */ 444 /* VIA UDMA 66 devices */
445 static const struct ata_port_info via_udma66_info = { 445 static const struct ata_port_info via_udma66_info = {
446 .flags = ATA_FLAG_SLAVE_POSS, 446 .flags = ATA_FLAG_SLAVE_POSS,
447 .pio_mask = 0x1f, 447 .pio_mask = ATA_PIO4,
448 .mwdma_mask = 0x07, 448 .mwdma_mask = ATA_MWDMA2,
449 .udma_mask = ATA_UDMA4, 449 .udma_mask = ATA_UDMA4,
450 .port_ops = &via_port_ops 450 .port_ops = &via_port_ops
451 }; 451 };
452 /* VIA UDMA 100 devices */ 452 /* VIA UDMA 100 devices */
453 static const struct ata_port_info via_udma100_info = { 453 static const struct ata_port_info via_udma100_info = {
454 .flags = ATA_FLAG_SLAVE_POSS, 454 .flags = ATA_FLAG_SLAVE_POSS,
455 .pio_mask = 0x1f, 455 .pio_mask = ATA_PIO4,
456 .mwdma_mask = 0x07, 456 .mwdma_mask = ATA_MWDMA2,
457 .udma_mask = ATA_UDMA5, 457 .udma_mask = ATA_UDMA5,
458 .port_ops = &via_port_ops 458 .port_ops = &via_port_ops
459 }; 459 };
460 /* UDMA133 with bad AST (All current 133) */ 460 /* UDMA133 with bad AST (All current 133) */
461 static const struct ata_port_info via_udma133_info = { 461 static const struct ata_port_info via_udma133_info = {
462 .flags = ATA_FLAG_SLAVE_POSS, 462 .flags = ATA_FLAG_SLAVE_POSS,
463 .pio_mask = 0x1f, 463 .pio_mask = ATA_PIO4,
464 .mwdma_mask = 0x07, 464 .mwdma_mask = ATA_MWDMA2,
465 .udma_mask = ATA_UDMA6, /* FIXME: should check north bridge */ 465 .udma_mask = ATA_UDMA6, /* FIXME: should check north bridge */
466 .port_ops = &via_port_ops 466 .port_ops = &via_port_ops
467 }; 467 };
diff --git a/drivers/ata/pata_winbond.c b/drivers/ata/pata_winbond.c
index 319e164a3d7..6d8619b6f67 100644
--- a/drivers/ata/pata_winbond.c
+++ b/drivers/ata/pata_winbond.c
@@ -193,7 +193,7 @@ static __init int winbond_init_one(unsigned long port)
193 ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx", cmd_port, ctl_port); 193 ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx", cmd_port, ctl_port);
194 194
195 ap->ops = &winbond_port_ops; 195 ap->ops = &winbond_port_ops;
196 ap->pio_mask = 0x1F; 196 ap->pio_mask = ATA_PIO4;
197 ap->flags |= ATA_FLAG_SLAVE_POSS; 197 ap->flags |= ATA_FLAG_SLAVE_POSS;
198 ap->ioaddr.cmd_addr = cmd_addr; 198 ap->ioaddr.cmd_addr = cmd_addr;
199 ap->ioaddr.altstatus_addr = ctl_addr; 199 ap->ioaddr.altstatus_addr = ctl_addr;
diff --git a/drivers/ata/pdc_adma.c b/drivers/ata/pdc_adma.c
index be53545c9f6..39588178d02 100644
--- a/drivers/ata/pdc_adma.c
+++ b/drivers/ata/pdc_adma.c
@@ -148,6 +148,8 @@ static struct scsi_host_template adma_ata_sht = {
148static struct ata_port_operations adma_ata_ops = { 148static struct ata_port_operations adma_ata_ops = {
149 .inherits = &ata_sff_port_ops, 149 .inherits = &ata_sff_port_ops,
150 150
151 .lost_interrupt = ATA_OP_NULL,
152
151 .check_atapi_dma = adma_check_atapi_dma, 153 .check_atapi_dma = adma_check_atapi_dma,
152 .qc_prep = adma_qc_prep, 154 .qc_prep = adma_qc_prep,
153 .qc_issue = adma_qc_issue, 155 .qc_issue = adma_qc_issue,
@@ -166,7 +168,7 @@ static struct ata_port_info adma_port_info[] = {
166 .flags = ATA_FLAG_SLAVE_POSS | 168 .flags = ATA_FLAG_SLAVE_POSS |
167 ATA_FLAG_NO_LEGACY | ATA_FLAG_MMIO | 169 ATA_FLAG_NO_LEGACY | ATA_FLAG_MMIO |
168 ATA_FLAG_PIO_POLLING, 170 ATA_FLAG_PIO_POLLING,
169 .pio_mask = 0x10, /* pio4 */ 171 .pio_mask = ATA_PIO4_ONLY,
170 .udma_mask = ATA_UDMA4, 172 .udma_mask = ATA_UDMA4,
171 .port_ops = &adma_ata_ops, 173 .port_ops = &adma_ata_ops,
172 }, 174 },
diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c
index 55bc88c1707..c2e90e1fece 100644
--- a/drivers/ata/sata_fsl.c
+++ b/drivers/ata/sata_fsl.c
@@ -1279,8 +1279,8 @@ static struct ata_port_operations sata_fsl_ops = {
1279static const struct ata_port_info sata_fsl_port_info[] = { 1279static const struct ata_port_info sata_fsl_port_info[] = {
1280 { 1280 {
1281 .flags = SATA_FSL_HOST_FLAGS, 1281 .flags = SATA_FSL_HOST_FLAGS,
1282 .pio_mask = 0x1f, /* pio 0-4 */ 1282 .pio_mask = ATA_PIO4,
1283 .udma_mask = 0x7f, /* udma 0-6 */ 1283 .udma_mask = ATA_UDMA6,
1284 .port_ops = &sata_fsl_ops, 1284 .port_ops = &sata_fsl_ops,
1285 }, 1285 },
1286}; 1286};
diff --git a/drivers/ata/sata_inic162x.c b/drivers/ata/sata_inic162x.c
index fbbd87c96f1..305a4f825f5 100644
--- a/drivers/ata/sata_inic162x.c
+++ b/drivers/ata/sata_inic162x.c
@@ -744,8 +744,8 @@ static struct ata_port_operations inic_port_ops = {
744 744
745static struct ata_port_info inic_port_info = { 745static struct ata_port_info inic_port_info = {
746 .flags = ATA_FLAG_SATA | ATA_FLAG_PIO_DMA, 746 .flags = ATA_FLAG_SATA | ATA_FLAG_PIO_DMA,
747 .pio_mask = 0x1f, /* pio0-4 */ 747 .pio_mask = ATA_PIO4,
748 .mwdma_mask = 0x07, /* mwdma0-2 */ 748 .mwdma_mask = ATA_MWDMA2,
749 .udma_mask = ATA_UDMA6, 749 .udma_mask = ATA_UDMA6,
750 .port_ops = &inic_port_ops 750 .port_ops = &inic_port_ops
751}; 751};
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 74b1080d116..a377226b81c 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -1,10 +1,13 @@
1/* 1/*
2 * sata_mv.c - Marvell SATA support 2 * sata_mv.c - Marvell SATA support
3 * 3 *
4 * Copyright 2008: Marvell Corporation, all rights reserved. 4 * Copyright 2008-2009: Marvell Corporation, all rights reserved.
5 * Copyright 2005: EMC Corporation, all rights reserved. 5 * Copyright 2005: EMC Corporation, all rights reserved.
6 * Copyright 2005 Red Hat, Inc. All rights reserved. 6 * Copyright 2005 Red Hat, Inc. All rights reserved.
7 * 7 *
8 * Originally written by Brett Russ.
9 * Extensive overhaul and enhancement by Mark Lord <mlord@pobox.com>.
10 *
8 * Please ALWAYS copy linux-ide@vger.kernel.org on emails. 11 * Please ALWAYS copy linux-ide@vger.kernel.org on emails.
9 * 12 *
10 * This program is free software; you can redistribute it and/or modify 13 * This program is free software; you can redistribute it and/or modify
@@ -25,20 +28,13 @@
25/* 28/*
26 * sata_mv TODO list: 29 * sata_mv TODO list:
27 * 30 *
28 * --> Errata workaround for NCQ device errors.
29 *
30 * --> More errata workarounds for PCI-X. 31 * --> More errata workarounds for PCI-X.
31 * 32 *
32 * --> Complete a full errata audit for all chipsets to identify others. 33 * --> Complete a full errata audit for all chipsets to identify others.
33 * 34 *
34 * --> ATAPI support (Marvell claims the 60xx/70xx chips can do it).
35 *
36 * --> Develop a low-power-consumption strategy, and implement it. 35 * --> Develop a low-power-consumption strategy, and implement it.
37 * 36 *
38 * --> [Experiment, low priority] Investigate interrupt coalescing. 37 * --> Add sysfs attributes for per-chip / per-HC IRQ coalescing thresholds.
39 * Quite often, especially with PCI Message Signalled Interrupts (MSI),
40 * the overhead reduced by interrupt mitigation is quite often not
41 * worth the latency cost.
42 * 38 *
43 * --> [Experiment, Marvell value added] Is it possible to use target 39 * --> [Experiment, Marvell value added] Is it possible to use target
44 * mode to cross-connect two Linux boxes with Marvell cards? If so, 40 * mode to cross-connect two Linux boxes with Marvell cards? If so,
@@ -68,7 +64,27 @@
68#include <linux/libata.h> 64#include <linux/libata.h>
69 65
70#define DRV_NAME "sata_mv" 66#define DRV_NAME "sata_mv"
71#define DRV_VERSION "1.25" 67#define DRV_VERSION "1.27"
68
69/*
70 * module options
71 */
72
73static int msi;
74#ifdef CONFIG_PCI
75module_param(msi, int, S_IRUGO);
76MODULE_PARM_DESC(msi, "Enable use of PCI MSI (0=off, 1=on)");
77#endif
78
79static int irq_coalescing_io_count;
80module_param(irq_coalescing_io_count, int, S_IRUGO);
81MODULE_PARM_DESC(irq_coalescing_io_count,
82 "IRQ coalescing I/O count threshold (0..255)");
83
84static int irq_coalescing_usecs;
85module_param(irq_coalescing_usecs, int, S_IRUGO);
86MODULE_PARM_DESC(irq_coalescing_usecs,
87 "IRQ coalescing time threshold in usecs");
72 88
73enum { 89enum {
74 /* BAR's are enumerated in terms of pci_resource_start() terms */ 90 /* BAR's are enumerated in terms of pci_resource_start() terms */
@@ -79,13 +95,32 @@ enum {
79 MV_MAJOR_REG_AREA_SZ = 0x10000, /* 64KB */ 95 MV_MAJOR_REG_AREA_SZ = 0x10000, /* 64KB */
80 MV_MINOR_REG_AREA_SZ = 0x2000, /* 8KB */ 96 MV_MINOR_REG_AREA_SZ = 0x2000, /* 8KB */
81 97
98 /* For use with both IRQ coalescing methods ("all ports" or "per-HC" */
99 COAL_CLOCKS_PER_USEC = 150, /* for calculating COAL_TIMEs */
100 MAX_COAL_TIME_THRESHOLD = ((1 << 24) - 1), /* internal clocks count */
101 MAX_COAL_IO_COUNT = 255, /* completed I/O count */
102
82 MV_PCI_REG_BASE = 0, 103 MV_PCI_REG_BASE = 0,
83 MV_IRQ_COAL_REG_BASE = 0x18000, /* 6xxx part only */ 104
84 MV_IRQ_COAL_CAUSE = (MV_IRQ_COAL_REG_BASE + 0x08), 105 /*
85 MV_IRQ_COAL_CAUSE_LO = (MV_IRQ_COAL_REG_BASE + 0x88), 106 * Per-chip ("all ports") interrupt coalescing feature.
86 MV_IRQ_COAL_CAUSE_HI = (MV_IRQ_COAL_REG_BASE + 0x8c), 107 * This is only for GEN_II / GEN_IIE hardware.
87 MV_IRQ_COAL_THRESHOLD = (MV_IRQ_COAL_REG_BASE + 0xcc), 108 *
88 MV_IRQ_COAL_TIME_THRESHOLD = (MV_IRQ_COAL_REG_BASE + 0xd0), 109 * Coalescing defers the interrupt until either the IO_THRESHOLD
110 * (count of completed I/Os) is met, or the TIME_THRESHOLD is met.
111 */
112 MV_COAL_REG_BASE = 0x18000,
113 MV_IRQ_COAL_CAUSE = (MV_COAL_REG_BASE + 0x08),
114 ALL_PORTS_COAL_IRQ = (1 << 4), /* all ports irq event */
115
116 MV_IRQ_COAL_IO_THRESHOLD = (MV_COAL_REG_BASE + 0xcc),
117 MV_IRQ_COAL_TIME_THRESHOLD = (MV_COAL_REG_BASE + 0xd0),
118
119 /*
120 * Registers for the (unused here) transaction coalescing feature:
121 */
122 MV_TRAN_COAL_CAUSE_LO = (MV_COAL_REG_BASE + 0x88),
123 MV_TRAN_COAL_CAUSE_HI = (MV_COAL_REG_BASE + 0x8c),
89 124
90 MV_SATAHC0_REG_BASE = 0x20000, 125 MV_SATAHC0_REG_BASE = 0x20000,
91 MV_FLASH_CTL_OFS = 0x1046c, 126 MV_FLASH_CTL_OFS = 0x1046c,
@@ -117,17 +152,16 @@ enum {
117 152
118 /* Host Flags */ 153 /* Host Flags */
119 MV_FLAG_DUAL_HC = (1 << 30), /* two SATA Host Controllers */ 154 MV_FLAG_DUAL_HC = (1 << 30), /* two SATA Host Controllers */
120 MV_FLAG_IRQ_COALESCE = (1 << 29), /* IRQ coalescing capability */
121 155
122 MV_COMMON_FLAGS = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 156 MV_COMMON_FLAGS = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
123 ATA_FLAG_MMIO | ATA_FLAG_NO_ATAPI | 157 ATA_FLAG_MMIO | ATA_FLAG_PIO_POLLING,
124 ATA_FLAG_PIO_POLLING, 158
159 MV_GEN_I_FLAGS = MV_COMMON_FLAGS | ATA_FLAG_NO_ATAPI,
125 160
126 MV_6XXX_FLAGS = MV_FLAG_IRQ_COALESCE, 161 MV_GEN_II_FLAGS = MV_COMMON_FLAGS | ATA_FLAG_NCQ |
162 ATA_FLAG_PMP | ATA_FLAG_ACPI_SATA,
127 163
128 MV_GENIIE_FLAGS = MV_COMMON_FLAGS | MV_6XXX_FLAGS | 164 MV_GEN_IIE_FLAGS = MV_GEN_II_FLAGS | ATA_FLAG_AN,
129 ATA_FLAG_PMP | ATA_FLAG_ACPI_SATA |
130 ATA_FLAG_NCQ | ATA_FLAG_AN,
131 165
132 CRQB_FLAG_READ = (1 << 0), 166 CRQB_FLAG_READ = (1 << 0),
133 CRQB_TAG_SHIFT = 1, 167 CRQB_TAG_SHIFT = 1,
@@ -180,16 +214,18 @@ enum {
180 PCI_HC_MAIN_IRQ_MASK_OFS = 0x1d64, 214 PCI_HC_MAIN_IRQ_MASK_OFS = 0x1d64,
181 SOC_HC_MAIN_IRQ_CAUSE_OFS = 0x20020, 215 SOC_HC_MAIN_IRQ_CAUSE_OFS = 0x20020,
182 SOC_HC_MAIN_IRQ_MASK_OFS = 0x20024, 216 SOC_HC_MAIN_IRQ_MASK_OFS = 0x20024,
183 ERR_IRQ = (1 << 0), /* shift by port # */ 217 ERR_IRQ = (1 << 0), /* shift by (2 * port #) */
184 DONE_IRQ = (1 << 1), /* shift by port # */ 218 DONE_IRQ = (1 << 1), /* shift by (2 * port #) */
185 HC0_IRQ_PEND = 0x1ff, /* bits 0-8 = HC0's ports */ 219 HC0_IRQ_PEND = 0x1ff, /* bits 0-8 = HC0's ports */
186 HC_SHIFT = 9, /* bits 9-17 = HC1's ports */ 220 HC_SHIFT = 9, /* bits 9-17 = HC1's ports */
221 DONE_IRQ_0_3 = 0x000000aa, /* DONE_IRQ ports 0,1,2,3 */
222 DONE_IRQ_4_7 = (DONE_IRQ_0_3 << HC_SHIFT), /* 4,5,6,7 */
187 PCI_ERR = (1 << 18), 223 PCI_ERR = (1 << 18),
188 TRAN_LO_DONE = (1 << 19), /* 6xxx: IRQ coalescing */ 224 TRAN_COAL_LO_DONE = (1 << 19), /* transaction coalescing */
189 TRAN_HI_DONE = (1 << 20), /* 6xxx: IRQ coalescing */ 225 TRAN_COAL_HI_DONE = (1 << 20), /* transaction coalescing */
190 PORTS_0_3_COAL_DONE = (1 << 8), 226 PORTS_0_3_COAL_DONE = (1 << 8), /* HC0 IRQ coalescing */
191 PORTS_4_7_COAL_DONE = (1 << 17), 227 PORTS_4_7_COAL_DONE = (1 << 17), /* HC1 IRQ coalescing */
192 PORTS_0_7_COAL_DONE = (1 << 21), /* 6xxx: IRQ coalescing */ 228 ALL_PORTS_COAL_DONE = (1 << 21), /* GEN_II(E) IRQ coalescing */
193 GPIO_INT = (1 << 22), 229 GPIO_INT = (1 << 22),
194 SELF_INT = (1 << 23), 230 SELF_INT = (1 << 23),
195 TWSI_INT = (1 << 24), 231 TWSI_INT = (1 << 24),
@@ -205,6 +241,21 @@ enum {
205 HC_COAL_IRQ = (1 << 4), /* IRQ coalescing */ 241 HC_COAL_IRQ = (1 << 4), /* IRQ coalescing */
206 DEV_IRQ = (1 << 8), /* shift by port # */ 242 DEV_IRQ = (1 << 8), /* shift by port # */
207 243
244 /*
245 * Per-HC (Host-Controller) interrupt coalescing feature.
246 * This is present on all chip generations.
247 *
248 * Coalescing defers the interrupt until either the IO_THRESHOLD
249 * (count of completed I/Os) is met, or the TIME_THRESHOLD is met.
250 */
251 HC_IRQ_COAL_IO_THRESHOLD_OFS = 0x000c,
252 HC_IRQ_COAL_TIME_THRESHOLD_OFS = 0x0010,
253
254 SOC_LED_CTRL_OFS = 0x2c,
255 SOC_LED_CTRL_BLINK = (1 << 0), /* Active LED blink */
256 SOC_LED_CTRL_ACT_PRESENCE = (1 << 2), /* Multiplex dev presence */
257 /* with dev activity LED */
258
208 /* Shadow block registers */ 259 /* Shadow block registers */
209 SHD_BLK_OFS = 0x100, 260 SHD_BLK_OFS = 0x100,
210 SHD_CTL_AST_OFS = 0x20, /* ofs from SHD_BLK_OFS */ 261 SHD_CTL_AST_OFS = 0x20, /* ofs from SHD_BLK_OFS */
@@ -346,6 +397,12 @@ enum {
346 EDMA_ARB_CFG_OFS = 0x38, 397 EDMA_ARB_CFG_OFS = 0x38,
347 398
348 EDMA_HALTCOND_OFS = 0x60, /* GenIIe halt conditions */ 399 EDMA_HALTCOND_OFS = 0x60, /* GenIIe halt conditions */
400 EDMA_UNKNOWN_RSVD_OFS = 0x6C, /* GenIIe unknown/reserved */
401
402 BMDMA_CMD_OFS = 0x224, /* bmdma command register */
403 BMDMA_STATUS_OFS = 0x228, /* bmdma status register */
404 BMDMA_PRD_LOW_OFS = 0x22c, /* bmdma PRD addr 31:0 */
405 BMDMA_PRD_HIGH_OFS = 0x230, /* bmdma PRD addr 63:32 */
349 406
350 /* Host private flags (hp_flags) */ 407 /* Host private flags (hp_flags) */
351 MV_HP_FLAG_MSI = (1 << 0), 408 MV_HP_FLAG_MSI = (1 << 0),
@@ -359,12 +416,14 @@ enum {
359 MV_HP_PCIE = (1 << 9), /* PCIe bus/regs: 7042 */ 416 MV_HP_PCIE = (1 << 9), /* PCIe bus/regs: 7042 */
360 MV_HP_CUT_THROUGH = (1 << 10), /* can use EDMA cut-through */ 417 MV_HP_CUT_THROUGH = (1 << 10), /* can use EDMA cut-through */
361 MV_HP_FLAG_SOC = (1 << 11), /* SystemOnChip, no PCI */ 418 MV_HP_FLAG_SOC = (1 << 11), /* SystemOnChip, no PCI */
419 MV_HP_QUIRK_LED_BLINK_EN = (1 << 12), /* is led blinking enabled? */
362 420
363 /* Port private flags (pp_flags) */ 421 /* Port private flags (pp_flags) */
364 MV_PP_FLAG_EDMA_EN = (1 << 0), /* is EDMA engine enabled? */ 422 MV_PP_FLAG_EDMA_EN = (1 << 0), /* is EDMA engine enabled? */
365 MV_PP_FLAG_NCQ_EN = (1 << 1), /* is EDMA set up for NCQ? */ 423 MV_PP_FLAG_NCQ_EN = (1 << 1), /* is EDMA set up for NCQ? */
366 MV_PP_FLAG_FBS_EN = (1 << 2), /* is EDMA set up for FBS? */ 424 MV_PP_FLAG_FBS_EN = (1 << 2), /* is EDMA set up for FBS? */
367 MV_PP_FLAG_DELAYED_EH = (1 << 3), /* delayed dev err handling */ 425 MV_PP_FLAG_DELAYED_EH = (1 << 3), /* delayed dev err handling */
426 MV_PP_FLAG_FAKE_ATA_BUSY = (1 << 4), /* ignore initial ATA_DRDY */
368}; 427};
369 428
370#define IS_GEN_I(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_I) 429#define IS_GEN_I(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_I)
@@ -433,6 +492,18 @@ struct mv_sg {
433 __le32 reserved; 492 __le32 reserved;
434}; 493};
435 494
495/*
496 * We keep a local cache of a few frequently accessed port
497 * registers here, to avoid having to read them (very slow)
498 * when switching between EDMA and non-EDMA modes.
499 */
500struct mv_cached_regs {
501 u32 fiscfg;
502 u32 ltmode;
503 u32 haltcond;
504 u32 unknown_rsvd;
505};
506
436struct mv_port_priv { 507struct mv_port_priv {
437 struct mv_crqb *crqb; 508 struct mv_crqb *crqb;
438 dma_addr_t crqb_dma; 509 dma_addr_t crqb_dma;
@@ -445,6 +516,7 @@ struct mv_port_priv {
445 unsigned int resp_idx; 516 unsigned int resp_idx;
446 517
447 u32 pp_flags; 518 u32 pp_flags;
519 struct mv_cached_regs cached;
448 unsigned int delayed_eh_pmp_map; 520 unsigned int delayed_eh_pmp_map;
449}; 521};
450 522
@@ -535,7 +607,7 @@ static void mv_reset_channel(struct mv_host_priv *hpriv, void __iomem *mmio,
535 unsigned int port_no); 607 unsigned int port_no);
536static int mv_stop_edma(struct ata_port *ap); 608static int mv_stop_edma(struct ata_port *ap);
537static int mv_stop_edma_engine(void __iomem *port_mmio); 609static int mv_stop_edma_engine(void __iomem *port_mmio);
538static void mv_edma_cfg(struct ata_port *ap, int want_ncq); 610static void mv_edma_cfg(struct ata_port *ap, int want_ncq, int want_edma);
539 611
540static void mv_pmp_select(struct ata_port *ap, int pmp); 612static void mv_pmp_select(struct ata_port *ap, int pmp);
541static int mv_pmp_hardreset(struct ata_link *link, unsigned int *class, 613static int mv_pmp_hardreset(struct ata_link *link, unsigned int *class,
@@ -546,6 +618,14 @@ static void mv_pmp_error_handler(struct ata_port *ap);
546static void mv_process_crpb_entries(struct ata_port *ap, 618static void mv_process_crpb_entries(struct ata_port *ap,
547 struct mv_port_priv *pp); 619 struct mv_port_priv *pp);
548 620
621static void mv_sff_irq_clear(struct ata_port *ap);
622static int mv_check_atapi_dma(struct ata_queued_cmd *qc);
623static void mv_bmdma_setup(struct ata_queued_cmd *qc);
624static void mv_bmdma_start(struct ata_queued_cmd *qc);
625static void mv_bmdma_stop(struct ata_queued_cmd *qc);
626static u8 mv_bmdma_status(struct ata_port *ap);
627static u8 mv_sff_check_status(struct ata_port *ap);
628
549/* .sg_tablesize is (MV_MAX_SG_CT / 2) in the structures below 629/* .sg_tablesize is (MV_MAX_SG_CT / 2) in the structures below
550 * because we have to allow room for worst case splitting of 630 * because we have to allow room for worst case splitting of
551 * PRDs for 64K boundaries in mv_fill_sg(). 631 * PRDs for 64K boundaries in mv_fill_sg().
@@ -566,6 +646,8 @@ static struct scsi_host_template mv6_sht = {
566static struct ata_port_operations mv5_ops = { 646static struct ata_port_operations mv5_ops = {
567 .inherits = &ata_sff_port_ops, 647 .inherits = &ata_sff_port_ops,
568 648
649 .lost_interrupt = ATA_OP_NULL,
650
569 .qc_defer = mv_qc_defer, 651 .qc_defer = mv_qc_defer,
570 .qc_prep = mv_qc_prep, 652 .qc_prep = mv_qc_prep,
571 .qc_issue = mv_qc_issue, 653 .qc_issue = mv_qc_issue,
@@ -593,6 +675,14 @@ static struct ata_port_operations mv6_ops = {
593 .pmp_softreset = mv_softreset, 675 .pmp_softreset = mv_softreset,
594 .softreset = mv_softreset, 676 .softreset = mv_softreset,
595 .error_handler = mv_pmp_error_handler, 677 .error_handler = mv_pmp_error_handler,
678
679 .sff_check_status = mv_sff_check_status,
680 .sff_irq_clear = mv_sff_irq_clear,
681 .check_atapi_dma = mv_check_atapi_dma,
682 .bmdma_setup = mv_bmdma_setup,
683 .bmdma_start = mv_bmdma_start,
684 .bmdma_stop = mv_bmdma_stop,
685 .bmdma_status = mv_bmdma_status,
596}; 686};
597 687
598static struct ata_port_operations mv_iie_ops = { 688static struct ata_port_operations mv_iie_ops = {
@@ -603,53 +693,49 @@ static struct ata_port_operations mv_iie_ops = {
603 693
604static const struct ata_port_info mv_port_info[] = { 694static const struct ata_port_info mv_port_info[] = {
605 { /* chip_504x */ 695 { /* chip_504x */
606 .flags = MV_COMMON_FLAGS, 696 .flags = MV_GEN_I_FLAGS,
607 .pio_mask = 0x1f, /* pio0-4 */ 697 .pio_mask = 0x1f, /* pio0-4 */
608 .udma_mask = ATA_UDMA6, 698 .udma_mask = ATA_UDMA6,
609 .port_ops = &mv5_ops, 699 .port_ops = &mv5_ops,
610 }, 700 },
611 { /* chip_508x */ 701 { /* chip_508x */
612 .flags = MV_COMMON_FLAGS | MV_FLAG_DUAL_HC, 702 .flags = MV_GEN_I_FLAGS | MV_FLAG_DUAL_HC,
613 .pio_mask = 0x1f, /* pio0-4 */ 703 .pio_mask = 0x1f, /* pio0-4 */
614 .udma_mask = ATA_UDMA6, 704 .udma_mask = ATA_UDMA6,
615 .port_ops = &mv5_ops, 705 .port_ops = &mv5_ops,
616 }, 706 },
617 { /* chip_5080 */ 707 { /* chip_5080 */
618 .flags = MV_COMMON_FLAGS | MV_FLAG_DUAL_HC, 708 .flags = MV_GEN_I_FLAGS | MV_FLAG_DUAL_HC,
619 .pio_mask = 0x1f, /* pio0-4 */ 709 .pio_mask = 0x1f, /* pio0-4 */
620 .udma_mask = ATA_UDMA6, 710 .udma_mask = ATA_UDMA6,
621 .port_ops = &mv5_ops, 711 .port_ops = &mv5_ops,
622 }, 712 },
623 { /* chip_604x */ 713 { /* chip_604x */
624 .flags = MV_COMMON_FLAGS | MV_6XXX_FLAGS | 714 .flags = MV_GEN_II_FLAGS,
625 ATA_FLAG_PMP | ATA_FLAG_ACPI_SATA |
626 ATA_FLAG_NCQ,
627 .pio_mask = 0x1f, /* pio0-4 */ 715 .pio_mask = 0x1f, /* pio0-4 */
628 .udma_mask = ATA_UDMA6, 716 .udma_mask = ATA_UDMA6,
629 .port_ops = &mv6_ops, 717 .port_ops = &mv6_ops,
630 }, 718 },
631 { /* chip_608x */ 719 { /* chip_608x */
632 .flags = MV_COMMON_FLAGS | MV_6XXX_FLAGS | 720 .flags = MV_GEN_II_FLAGS | MV_FLAG_DUAL_HC,
633 ATA_FLAG_PMP | ATA_FLAG_ACPI_SATA |
634 ATA_FLAG_NCQ | MV_FLAG_DUAL_HC,
635 .pio_mask = 0x1f, /* pio0-4 */ 721 .pio_mask = 0x1f, /* pio0-4 */
636 .udma_mask = ATA_UDMA6, 722 .udma_mask = ATA_UDMA6,
637 .port_ops = &mv6_ops, 723 .port_ops = &mv6_ops,
638 }, 724 },
639 { /* chip_6042 */ 725 { /* chip_6042 */
640 .flags = MV_GENIIE_FLAGS, 726 .flags = MV_GEN_IIE_FLAGS,
641 .pio_mask = 0x1f, /* pio0-4 */ 727 .pio_mask = 0x1f, /* pio0-4 */
642 .udma_mask = ATA_UDMA6, 728 .udma_mask = ATA_UDMA6,
643 .port_ops = &mv_iie_ops, 729 .port_ops = &mv_iie_ops,
644 }, 730 },
645 { /* chip_7042 */ 731 { /* chip_7042 */
646 .flags = MV_GENIIE_FLAGS, 732 .flags = MV_GEN_IIE_FLAGS,
647 .pio_mask = 0x1f, /* pio0-4 */ 733 .pio_mask = 0x1f, /* pio0-4 */
648 .udma_mask = ATA_UDMA6, 734 .udma_mask = ATA_UDMA6,
649 .port_ops = &mv_iie_ops, 735 .port_ops = &mv_iie_ops,
650 }, 736 },
651 { /* chip_soc */ 737 { /* chip_soc */
652 .flags = MV_GENIIE_FLAGS, 738 .flags = MV_GEN_IIE_FLAGS,
653 .pio_mask = 0x1f, /* pio0-4 */ 739 .pio_mask = 0x1f, /* pio0-4 */
654 .udma_mask = ATA_UDMA6, 740 .udma_mask = ATA_UDMA6,
655 .port_ops = &mv_iie_ops, 741 .port_ops = &mv_iie_ops,
@@ -794,6 +880,44 @@ static inline int mv_get_hc_count(unsigned long port_flags)
794 return ((port_flags & MV_FLAG_DUAL_HC) ? 2 : 1); 880 return ((port_flags & MV_FLAG_DUAL_HC) ? 2 : 1);
795} 881}
796 882
883/**
884 * mv_save_cached_regs - (re-)initialize cached port registers
885 * @ap: the port whose registers we are caching
886 *
887 * Initialize the local cache of port registers,
888 * so that reading them over and over again can
889 * be avoided on the hotter paths of this driver.
890 * This saves a few microseconds each time we switch
891 * to/from EDMA mode to perform (eg.) a drive cache flush.
892 */
893static void mv_save_cached_regs(struct ata_port *ap)
894{
895 void __iomem *port_mmio = mv_ap_base(ap);
896 struct mv_port_priv *pp = ap->private_data;
897
898 pp->cached.fiscfg = readl(port_mmio + FISCFG_OFS);
899 pp->cached.ltmode = readl(port_mmio + LTMODE_OFS);
900 pp->cached.haltcond = readl(port_mmio + EDMA_HALTCOND_OFS);
901 pp->cached.unknown_rsvd = readl(port_mmio + EDMA_UNKNOWN_RSVD_OFS);
902}
903
904/**
905 * mv_write_cached_reg - write to a cached port register
906 * @addr: hardware address of the register
907 * @old: pointer to cached value of the register
908 * @new: new value for the register
909 *
910 * Write a new value to a cached register,
911 * but only if the value is different from before.
912 */
913static inline void mv_write_cached_reg(void __iomem *addr, u32 *old, u32 new)
914{
915 if (new != *old) {
916 *old = new;
917 writel(new, addr);
918 }
919}
920
797static void mv_set_edma_ptrs(void __iomem *port_mmio, 921static void mv_set_edma_ptrs(void __iomem *port_mmio,
798 struct mv_host_priv *hpriv, 922 struct mv_host_priv *hpriv,
799 struct mv_port_priv *pp) 923 struct mv_port_priv *pp)
@@ -825,6 +949,23 @@ static void mv_set_edma_ptrs(void __iomem *port_mmio,
825 port_mmio + EDMA_RSP_Q_OUT_PTR_OFS); 949 port_mmio + EDMA_RSP_Q_OUT_PTR_OFS);
826} 950}
827 951
952static void mv_write_main_irq_mask(u32 mask, struct mv_host_priv *hpriv)
953{
954 /*
955 * When writing to the main_irq_mask in hardware,
956 * we must ensure exclusivity between the interrupt coalescing bits
957 * and the corresponding individual port DONE_IRQ bits.
958 *
959 * Note that this register is really an "IRQ enable" register,
960 * not an "IRQ mask" register as Marvell's naming might suggest.
961 */
962 if (mask & (ALL_PORTS_COAL_DONE | PORTS_0_3_COAL_DONE))
963 mask &= ~DONE_IRQ_0_3;
964 if (mask & (ALL_PORTS_COAL_DONE | PORTS_4_7_COAL_DONE))
965 mask &= ~DONE_IRQ_4_7;
966 writelfl(mask, hpriv->main_irq_mask_addr);
967}
968
828static void mv_set_main_irq_mask(struct ata_host *host, 969static void mv_set_main_irq_mask(struct ata_host *host,
829 u32 disable_bits, u32 enable_bits) 970 u32 disable_bits, u32 enable_bits)
830{ 971{
@@ -835,7 +976,7 @@ static void mv_set_main_irq_mask(struct ata_host *host,
835 new_mask = (old_mask & ~disable_bits) | enable_bits; 976 new_mask = (old_mask & ~disable_bits) | enable_bits;
836 if (new_mask != old_mask) { 977 if (new_mask != old_mask) {
837 hpriv->main_irq_mask = new_mask; 978 hpriv->main_irq_mask = new_mask;
838 writelfl(new_mask, hpriv->main_irq_mask_addr); 979 mv_write_main_irq_mask(new_mask, hpriv);
839 } 980 }
840} 981}
841 982
@@ -852,8 +993,94 @@ static void mv_enable_port_irqs(struct ata_port *ap,
852 mv_set_main_irq_mask(ap->host, disable_bits, enable_bits); 993 mv_set_main_irq_mask(ap->host, disable_bits, enable_bits);
853} 994}
854 995
996static void mv_clear_and_enable_port_irqs(struct ata_port *ap,
997 void __iomem *port_mmio,
998 unsigned int port_irqs)
999{
1000 struct mv_host_priv *hpriv = ap->host->private_data;
1001 int hardport = mv_hardport_from_port(ap->port_no);
1002 void __iomem *hc_mmio = mv_hc_base_from_port(
1003 mv_host_base(ap->host), ap->port_no);
1004 u32 hc_irq_cause;
1005
1006 /* clear EDMA event indicators, if any */
1007 writelfl(0, port_mmio + EDMA_ERR_IRQ_CAUSE_OFS);
1008
1009 /* clear pending irq events */
1010 hc_irq_cause = ~((DEV_IRQ | DMA_IRQ) << hardport);
1011 writelfl(hc_irq_cause, hc_mmio + HC_IRQ_CAUSE_OFS);
1012
1013 /* clear FIS IRQ Cause */
1014 if (IS_GEN_IIE(hpriv))
1015 writelfl(0, port_mmio + SATA_FIS_IRQ_CAUSE_OFS);
1016
1017 mv_enable_port_irqs(ap, port_irqs);
1018}
1019
1020static void mv_set_irq_coalescing(struct ata_host *host,
1021 unsigned int count, unsigned int usecs)
1022{
1023 struct mv_host_priv *hpriv = host->private_data;
1024 void __iomem *mmio = hpriv->base, *hc_mmio;
1025 u32 coal_enable = 0;
1026 unsigned long flags;
1027 unsigned int clks, is_dual_hc = hpriv->n_ports > MV_PORTS_PER_HC;
1028 const u32 coal_disable = PORTS_0_3_COAL_DONE | PORTS_4_7_COAL_DONE |
1029 ALL_PORTS_COAL_DONE;
1030
1031 /* Disable IRQ coalescing if either threshold is zero */
1032 if (!usecs || !count) {
1033 clks = count = 0;
1034 } else {
1035 /* Respect maximum limits of the hardware */
1036 clks = usecs * COAL_CLOCKS_PER_USEC;
1037 if (clks > MAX_COAL_TIME_THRESHOLD)
1038 clks = MAX_COAL_TIME_THRESHOLD;
1039 if (count > MAX_COAL_IO_COUNT)
1040 count = MAX_COAL_IO_COUNT;
1041 }
1042
1043 spin_lock_irqsave(&host->lock, flags);
1044 mv_set_main_irq_mask(host, coal_disable, 0);
1045
1046 if (is_dual_hc && !IS_GEN_I(hpriv)) {
1047 /*
1048 * GEN_II/GEN_IIE with dual host controllers:
1049 * one set of global thresholds for the entire chip.
1050 */
1051 writel(clks, mmio + MV_IRQ_COAL_TIME_THRESHOLD);
1052 writel(count, mmio + MV_IRQ_COAL_IO_THRESHOLD);
1053 /* clear leftover coal IRQ bit */
1054 writel(~ALL_PORTS_COAL_IRQ, mmio + MV_IRQ_COAL_CAUSE);
1055 if (count)
1056 coal_enable = ALL_PORTS_COAL_DONE;
1057 clks = count = 0; /* force clearing of regular regs below */
1058 }
1059
1060 /*
1061 * All chips: independent thresholds for each HC on the chip.
1062 */
1063 hc_mmio = mv_hc_base_from_port(mmio, 0);
1064 writel(clks, hc_mmio + HC_IRQ_COAL_TIME_THRESHOLD_OFS);
1065 writel(count, hc_mmio + HC_IRQ_COAL_IO_THRESHOLD_OFS);
1066 writel(~HC_COAL_IRQ, hc_mmio + HC_IRQ_CAUSE_OFS);
1067 if (count)
1068 coal_enable |= PORTS_0_3_COAL_DONE;
1069 if (is_dual_hc) {
1070 hc_mmio = mv_hc_base_from_port(mmio, MV_PORTS_PER_HC);
1071 writel(clks, hc_mmio + HC_IRQ_COAL_TIME_THRESHOLD_OFS);
1072 writel(count, hc_mmio + HC_IRQ_COAL_IO_THRESHOLD_OFS);
1073 writel(~HC_COAL_IRQ, hc_mmio + HC_IRQ_CAUSE_OFS);
1074 if (count)
1075 coal_enable |= PORTS_4_7_COAL_DONE;
1076 }
1077
1078 mv_set_main_irq_mask(host, 0, coal_enable);
1079 spin_unlock_irqrestore(&host->lock, flags);
1080}
1081
855/** 1082/**
856 * mv_start_dma - Enable eDMA engine 1083 * mv_start_edma - Enable eDMA engine
857 * @base: port base address 1084 * @base: port base address
858 * @pp: port private data 1085 * @pp: port private data
859 * 1086 *
@@ -863,7 +1090,7 @@ static void mv_enable_port_irqs(struct ata_port *ap,
863 * LOCKING: 1090 * LOCKING:
864 * Inherited from caller. 1091 * Inherited from caller.
865 */ 1092 */
866static void mv_start_dma(struct ata_port *ap, void __iomem *port_mmio, 1093static void mv_start_edma(struct ata_port *ap, void __iomem *port_mmio,
867 struct mv_port_priv *pp, u8 protocol) 1094 struct mv_port_priv *pp, u8 protocol)
868{ 1095{
869 int want_ncq = (protocol == ATA_PROT_NCQ); 1096 int want_ncq = (protocol == ATA_PROT_NCQ);
@@ -875,26 +1102,11 @@ static void mv_start_dma(struct ata_port *ap, void __iomem *port_mmio,
875 } 1102 }
876 if (!(pp->pp_flags & MV_PP_FLAG_EDMA_EN)) { 1103 if (!(pp->pp_flags & MV_PP_FLAG_EDMA_EN)) {
877 struct mv_host_priv *hpriv = ap->host->private_data; 1104 struct mv_host_priv *hpriv = ap->host->private_data;
878 int hardport = mv_hardport_from_port(ap->port_no);
879 void __iomem *hc_mmio = mv_hc_base_from_port(
880 mv_host_base(ap->host), ap->port_no);
881 u32 hc_irq_cause;
882
883 /* clear EDMA event indicators, if any */
884 writelfl(0, port_mmio + EDMA_ERR_IRQ_CAUSE_OFS);
885 1105
886 /* clear pending irq events */ 1106 mv_edma_cfg(ap, want_ncq, 1);
887 hc_irq_cause = ~((DEV_IRQ | DMA_IRQ) << hardport);
888 writelfl(hc_irq_cause, hc_mmio + HC_IRQ_CAUSE_OFS);
889
890 mv_edma_cfg(ap, want_ncq);
891
892 /* clear FIS IRQ Cause */
893 if (IS_GEN_IIE(hpriv))
894 writelfl(0, port_mmio + SATA_FIS_IRQ_CAUSE_OFS);
895 1107
896 mv_set_edma_ptrs(port_mmio, hpriv, pp); 1108 mv_set_edma_ptrs(port_mmio, hpriv, pp);
897 mv_enable_port_irqs(ap, DONE_IRQ|ERR_IRQ); 1109 mv_clear_and_enable_port_irqs(ap, port_mmio, DONE_IRQ|ERR_IRQ);
898 1110
899 writelfl(EDMA_EN, port_mmio + EDMA_CMD_OFS); 1111 writelfl(EDMA_EN, port_mmio + EDMA_CMD_OFS);
900 pp->pp_flags |= MV_PP_FLAG_EDMA_EN; 1112 pp->pp_flags |= MV_PP_FLAG_EDMA_EN;
@@ -952,6 +1164,7 @@ static int mv_stop_edma(struct ata_port *ap)
952{ 1164{
953 void __iomem *port_mmio = mv_ap_base(ap); 1165 void __iomem *port_mmio = mv_ap_base(ap);
954 struct mv_port_priv *pp = ap->private_data; 1166 struct mv_port_priv *pp = ap->private_data;
1167 int err = 0;
955 1168
956 if (!(pp->pp_flags & MV_PP_FLAG_EDMA_EN)) 1169 if (!(pp->pp_flags & MV_PP_FLAG_EDMA_EN))
957 return 0; 1170 return 0;
@@ -959,9 +1172,10 @@ static int mv_stop_edma(struct ata_port *ap)
959 mv_wait_for_edma_empty_idle(ap); 1172 mv_wait_for_edma_empty_idle(ap);
960 if (mv_stop_edma_engine(port_mmio)) { 1173 if (mv_stop_edma_engine(port_mmio)) {
961 ata_port_printk(ap, KERN_ERR, "Unable to stop eDMA\n"); 1174 ata_port_printk(ap, KERN_ERR, "Unable to stop eDMA\n");
962 return -EIO; 1175 err = -EIO;
963 } 1176 }
964 return 0; 1177 mv_edma_cfg(ap, 0, 0);
1178 return err;
965} 1179}
966 1180
967#ifdef ATA_DEBUG 1181#ifdef ATA_DEBUG
@@ -1130,35 +1344,33 @@ static int mv_qc_defer(struct ata_queued_cmd *qc)
1130 return ATA_DEFER_PORT; 1344 return ATA_DEFER_PORT;
1131} 1345}
1132 1346
1133static void mv_config_fbs(void __iomem *port_mmio, int want_ncq, int want_fbs) 1347static void mv_config_fbs(struct ata_port *ap, int want_ncq, int want_fbs)
1134{ 1348{
1135 u32 new_fiscfg, old_fiscfg; 1349 struct mv_port_priv *pp = ap->private_data;
1136 u32 new_ltmode, old_ltmode; 1350 void __iomem *port_mmio;
1137 u32 new_haltcond, old_haltcond;
1138 1351
1139 old_fiscfg = readl(port_mmio + FISCFG_OFS); 1352 u32 fiscfg, *old_fiscfg = &pp->cached.fiscfg;
1140 old_ltmode = readl(port_mmio + LTMODE_OFS); 1353 u32 ltmode, *old_ltmode = &pp->cached.ltmode;
1141 old_haltcond = readl(port_mmio + EDMA_HALTCOND_OFS); 1354 u32 haltcond, *old_haltcond = &pp->cached.haltcond;
1142 1355
1143 new_fiscfg = old_fiscfg & ~(FISCFG_SINGLE_SYNC | FISCFG_WAIT_DEV_ERR); 1356 ltmode = *old_ltmode & ~LTMODE_BIT8;
1144 new_ltmode = old_ltmode & ~LTMODE_BIT8; 1357 haltcond = *old_haltcond | EDMA_ERR_DEV;
1145 new_haltcond = old_haltcond | EDMA_ERR_DEV;
1146 1358
1147 if (want_fbs) { 1359 if (want_fbs) {
1148 new_fiscfg = old_fiscfg | FISCFG_SINGLE_SYNC; 1360 fiscfg = *old_fiscfg | FISCFG_SINGLE_SYNC;
1149 new_ltmode = old_ltmode | LTMODE_BIT8; 1361 ltmode = *old_ltmode | LTMODE_BIT8;
1150 if (want_ncq) 1362 if (want_ncq)
1151 new_haltcond &= ~EDMA_ERR_DEV; 1363 haltcond &= ~EDMA_ERR_DEV;
1152 else 1364 else
1153 new_fiscfg |= FISCFG_WAIT_DEV_ERR; 1365 fiscfg |= FISCFG_WAIT_DEV_ERR;
1366 } else {
1367 fiscfg = *old_fiscfg & ~(FISCFG_SINGLE_SYNC | FISCFG_WAIT_DEV_ERR);
1154 } 1368 }
1155 1369
1156 if (new_fiscfg != old_fiscfg) 1370 port_mmio = mv_ap_base(ap);
1157 writelfl(new_fiscfg, port_mmio + FISCFG_OFS); 1371 mv_write_cached_reg(port_mmio + FISCFG_OFS, old_fiscfg, fiscfg);
1158 if (new_ltmode != old_ltmode) 1372 mv_write_cached_reg(port_mmio + LTMODE_OFS, old_ltmode, ltmode);
1159 writelfl(new_ltmode, port_mmio + LTMODE_OFS); 1373 mv_write_cached_reg(port_mmio + EDMA_HALTCOND_OFS, old_haltcond, haltcond);
1160 if (new_haltcond != old_haltcond)
1161 writelfl(new_haltcond, port_mmio + EDMA_HALTCOND_OFS);
1162} 1374}
1163 1375
1164static void mv_60x1_errata_sata25(struct ata_port *ap, int want_ncq) 1376static void mv_60x1_errata_sata25(struct ata_port *ap, int want_ncq)
@@ -1176,7 +1388,86 @@ static void mv_60x1_errata_sata25(struct ata_port *ap, int want_ncq)
1176 writel(new, hpriv->base + MV_GPIO_PORT_CTL_OFS); 1388 writel(new, hpriv->base + MV_GPIO_PORT_CTL_OFS);
1177} 1389}
1178 1390
1179static void mv_edma_cfg(struct ata_port *ap, int want_ncq) 1391/**
1392 * mv_bmdma_enable - set a magic bit on GEN_IIE to allow bmdma
1393 * @ap: Port being initialized
1394 *
1395 * There are two DMA modes on these chips: basic DMA, and EDMA.
1396 *
1397 * Bit-0 of the "EDMA RESERVED" register enables/disables use
1398 * of basic DMA on the GEN_IIE versions of the chips.
1399 *
1400 * This bit survives EDMA resets, and must be set for basic DMA
1401 * to function, and should be cleared when EDMA is active.
1402 */
1403static void mv_bmdma_enable_iie(struct ata_port *ap, int enable_bmdma)
1404{
1405 struct mv_port_priv *pp = ap->private_data;
1406 u32 new, *old = &pp->cached.unknown_rsvd;
1407
1408 if (enable_bmdma)
1409 new = *old | 1;
1410 else
1411 new = *old & ~1;
1412 mv_write_cached_reg(mv_ap_base(ap) + EDMA_UNKNOWN_RSVD_OFS, old, new);
1413}
1414
1415/*
1416 * SOC chips have an issue whereby the HDD LEDs don't always blink
1417 * during I/O when NCQ is enabled. Enabling a special "LED blink" mode
1418 * of the SOC takes care of it, generating a steady blink rate when
1419 * any drive on the chip is active.
1420 *
1421 * Unfortunately, the blink mode is a global hardware setting for the SOC,
1422 * so we must use it whenever at least one port on the SOC has NCQ enabled.
1423 *
1424 * We turn "LED blink" off when NCQ is not in use anywhere, because the normal
1425 * LED operation works then, and provides better (more accurate) feedback.
1426 *
1427 * Note that this code assumes that an SOC never has more than one HC onboard.
1428 */
1429static void mv_soc_led_blink_enable(struct ata_port *ap)
1430{
1431 struct ata_host *host = ap->host;
1432 struct mv_host_priv *hpriv = host->private_data;
1433 void __iomem *hc_mmio;
1434 u32 led_ctrl;
1435
1436 if (hpriv->hp_flags & MV_HP_QUIRK_LED_BLINK_EN)
1437 return;
1438 hpriv->hp_flags |= MV_HP_QUIRK_LED_BLINK_EN;
1439 hc_mmio = mv_hc_base_from_port(mv_host_base(host), ap->port_no);
1440 led_ctrl = readl(hc_mmio + SOC_LED_CTRL_OFS);
1441 writel(led_ctrl | SOC_LED_CTRL_BLINK, hc_mmio + SOC_LED_CTRL_OFS);
1442}
1443
1444static void mv_soc_led_blink_disable(struct ata_port *ap)
1445{
1446 struct ata_host *host = ap->host;
1447 struct mv_host_priv *hpriv = host->private_data;
1448 void __iomem *hc_mmio;
1449 u32 led_ctrl;
1450 unsigned int port;
1451
1452 if (!(hpriv->hp_flags & MV_HP_QUIRK_LED_BLINK_EN))
1453 return;
1454
1455 /* disable led-blink only if no ports are using NCQ */
1456 for (port = 0; port < hpriv->n_ports; port++) {
1457 struct ata_port *this_ap = host->ports[port];
1458 struct mv_port_priv *pp = this_ap->private_data;
1459
1460 if (pp->pp_flags & MV_PP_FLAG_NCQ_EN)
1461 return;
1462 }
1463
1464 hpriv->hp_flags &= ~MV_HP_QUIRK_LED_BLINK_EN;
1465 hc_mmio = mv_hc_base_from_port(mv_host_base(host), ap->port_no);
1466 led_ctrl = readl(hc_mmio + SOC_LED_CTRL_OFS);
1467 writel(led_ctrl & ~SOC_LED_CTRL_BLINK, hc_mmio + SOC_LED_CTRL_OFS);
1468}
1469
1470static void mv_edma_cfg(struct ata_port *ap, int want_ncq, int want_edma)
1180{ 1471{
1181 u32 cfg; 1472 u32 cfg;
1182 struct mv_port_priv *pp = ap->private_data; 1473 struct mv_port_priv *pp = ap->private_data;
@@ -1185,7 +1476,8 @@ static void mv_edma_cfg(struct ata_port *ap, int want_ncq)
1185 1476
1186 /* set up non-NCQ EDMA configuration */ 1477 /* set up non-NCQ EDMA configuration */
1187 cfg = EDMA_CFG_Q_DEPTH; /* always 0x1f for *all* chips */ 1478 cfg = EDMA_CFG_Q_DEPTH; /* always 0x1f for *all* chips */
1188 pp->pp_flags &= ~MV_PP_FLAG_FBS_EN; 1479 pp->pp_flags &=
1480 ~(MV_PP_FLAG_FBS_EN | MV_PP_FLAG_NCQ_EN | MV_PP_FLAG_FAKE_ATA_BUSY);
1189 1481
1190 if (IS_GEN_I(hpriv)) 1482 if (IS_GEN_I(hpriv))
1191 cfg |= (1 << 8); /* enab config burst size mask */ 1483 cfg |= (1 << 8); /* enab config burst size mask */
@@ -1206,7 +1498,7 @@ static void mv_edma_cfg(struct ata_port *ap, int want_ncq)
1206 */ 1498 */
1207 want_fbs &= want_ncq; 1499 want_fbs &= want_ncq;
1208 1500
1209 mv_config_fbs(port_mmio, want_ncq, want_fbs); 1501 mv_config_fbs(ap, want_ncq, want_fbs);
1210 1502
1211 if (want_fbs) { 1503 if (want_fbs) {
1212 pp->pp_flags |= MV_PP_FLAG_FBS_EN; 1504 pp->pp_flags |= MV_PP_FLAG_FBS_EN;
@@ -1214,18 +1506,27 @@ static void mv_edma_cfg(struct ata_port *ap, int want_ncq)
1214 } 1506 }
1215 1507
1216 cfg |= (1 << 23); /* do not mask PM field in rx'd FIS */ 1508 cfg |= (1 << 23); /* do not mask PM field in rx'd FIS */
1217 cfg |= (1 << 22); /* enab 4-entry host queue cache */ 1509 if (want_edma) {
1218 if (!IS_SOC(hpriv)) 1510 cfg |= (1 << 22); /* enab 4-entry host queue cache */
1219 cfg |= (1 << 18); /* enab early completion */ 1511 if (!IS_SOC(hpriv))
1512 cfg |= (1 << 18); /* enab early completion */
1513 }
1220 if (hpriv->hp_flags & MV_HP_CUT_THROUGH) 1514 if (hpriv->hp_flags & MV_HP_CUT_THROUGH)
1221 cfg |= (1 << 17); /* enab cut-thru (dis stor&forwrd) */ 1515 cfg |= (1 << 17); /* enab cut-thru (dis stor&forwrd) */
1516 mv_bmdma_enable_iie(ap, !want_edma);
1517
1518 if (IS_SOC(hpriv)) {
1519 if (want_ncq)
1520 mv_soc_led_blink_enable(ap);
1521 else
1522 mv_soc_led_blink_disable(ap);
1523 }
1222 } 1524 }
1223 1525
1224 if (want_ncq) { 1526 if (want_ncq) {
1225 cfg |= EDMA_CFG_NCQ; 1527 cfg |= EDMA_CFG_NCQ;
1226 pp->pp_flags |= MV_PP_FLAG_NCQ_EN; 1528 pp->pp_flags |= MV_PP_FLAG_NCQ_EN;
1227 } else 1529 }
1228 pp->pp_flags &= ~MV_PP_FLAG_NCQ_EN;
1229 1530
1230 writelfl(cfg, port_mmio + EDMA_CFG_OFS); 1531 writelfl(cfg, port_mmio + EDMA_CFG_OFS);
1231} 1532}
@@ -1309,6 +1610,8 @@ static int mv_port_start(struct ata_port *ap)
1309 pp->sg_tbl_dma[tag] = pp->sg_tbl_dma[0]; 1610 pp->sg_tbl_dma[tag] = pp->sg_tbl_dma[0];
1310 } 1611 }
1311 } 1612 }
1613 mv_save_cached_regs(ap);
1614 mv_edma_cfg(ap, 0, 0);
1312 return 0; 1615 return 0;
1313 1616
1314out_port_free_dma_mem: 1617out_port_free_dma_mem:
@@ -1357,12 +1660,13 @@ static void mv_fill_sg(struct ata_queued_cmd *qc)
1357 u32 offset = addr & 0xffff; 1660 u32 offset = addr & 0xffff;
1358 u32 len = sg_len; 1661 u32 len = sg_len;
1359 1662
1360 if ((offset + sg_len > 0x10000)) 1663 if (offset + len > 0x10000)
1361 len = 0x10000 - offset; 1664 len = 0x10000 - offset;
1362 1665
1363 mv_sg->addr = cpu_to_le32(addr & 0xffffffff); 1666 mv_sg->addr = cpu_to_le32(addr & 0xffffffff);
1364 mv_sg->addr_hi = cpu_to_le32((addr >> 16) >> 16); 1667 mv_sg->addr_hi = cpu_to_le32((addr >> 16) >> 16);
1365 mv_sg->flags_size = cpu_to_le32(len & 0xffff); 1668 mv_sg->flags_size = cpu_to_le32(len & 0xffff);
1669 mv_sg->reserved = 0;
1366 1670
1367 sg_len -= len; 1671 sg_len -= len;
1368 addr += len; 1672 addr += len;
@@ -1374,6 +1678,7 @@ static void mv_fill_sg(struct ata_queued_cmd *qc)
1374 1678
1375 if (likely(last_sg)) 1679 if (likely(last_sg))
1376 last_sg->flags_size |= cpu_to_le32(EPRD_FLAG_END_OF_TBL); 1680 last_sg->flags_size |= cpu_to_le32(EPRD_FLAG_END_OF_TBL);
1681 mb(); /* ensure data structure is visible to the chipset */
1377} 1682}
1378 1683
1379static void mv_crqb_pack_cmd(__le16 *cmdw, u8 data, u8 addr, unsigned last) 1684static void mv_crqb_pack_cmd(__le16 *cmdw, u8 data, u8 addr, unsigned last)
@@ -1384,6 +1689,147 @@ static void mv_crqb_pack_cmd(__le16 *cmdw, u8 data, u8 addr, unsigned last)
1384} 1689}
1385 1690
1386/** 1691/**
1692 * mv_sff_irq_clear - Clear hardware interrupt after DMA.
1693 * @ap: Port associated with this ATA transaction.
1694 *
1695 * We need this only for ATAPI bmdma transactions,
1696 * as otherwise we experience spurious interrupts
1697 * after libata-sff handles the bmdma interrupts.
1698 */
1699static void mv_sff_irq_clear(struct ata_port *ap)
1700{
1701 mv_clear_and_enable_port_irqs(ap, mv_ap_base(ap), ERR_IRQ);
1702}
1703
1704/**
1705 * mv_check_atapi_dma - Filter ATAPI cmds which are unsuitable for DMA.
1706 * @qc: queued command to check for chipset/DMA compatibility.
1707 *
1708 * The bmdma engines cannot handle speculative data sizes
1709 * (bytecount under/over flow). So only allow DMA for
1710 * data transfer commands with known data sizes.
1711 *
1712 * LOCKING:
1713 * Inherited from caller.
1714 */
1715static int mv_check_atapi_dma(struct ata_queued_cmd *qc)
1716{
1717 struct scsi_cmnd *scmd = qc->scsicmd;
1718
1719 if (scmd) {
1720 switch (scmd->cmnd[0]) {
1721 case READ_6:
1722 case READ_10:
1723 case READ_12:
1724 case WRITE_6:
1725 case WRITE_10:
1726 case WRITE_12:
1727 case GPCMD_READ_CD:
1728 case GPCMD_SEND_DVD_STRUCTURE:
1729 case GPCMD_SEND_CUE_SHEET:
1730 return 0; /* DMA is safe */
1731 }
1732 }
1733 return -EOPNOTSUPP; /* use PIO instead */
1734}
1735
1736/**
1737 * mv_bmdma_setup - Set up BMDMA transaction
1738 * @qc: queued command to prepare DMA for.
1739 *
1740 * LOCKING:
1741 * Inherited from caller.
1742 */
1743static void mv_bmdma_setup(struct ata_queued_cmd *qc)
1744{
1745 struct ata_port *ap = qc->ap;
1746 void __iomem *port_mmio = mv_ap_base(ap);
1747 struct mv_port_priv *pp = ap->private_data;
1748
1749 mv_fill_sg(qc);
1750
1751 /* clear all DMA cmd bits */
1752 writel(0, port_mmio + BMDMA_CMD_OFS);
1753
1754 /* load PRD table addr. */
1755 writel((pp->sg_tbl_dma[qc->tag] >> 16) >> 16,
1756 port_mmio + BMDMA_PRD_HIGH_OFS);
1757 writelfl(pp->sg_tbl_dma[qc->tag],
1758 port_mmio + BMDMA_PRD_LOW_OFS);
1759
1760 /* issue r/w command */
1761 ap->ops->sff_exec_command(ap, &qc->tf);
1762}
1763
1764/**
1765 * mv_bmdma_start - Start a BMDMA transaction
1766 * @qc: queued command to start DMA on.
1767 *
1768 * LOCKING:
1769 * Inherited from caller.
1770 */
1771static void mv_bmdma_start(struct ata_queued_cmd *qc)
1772{
1773 struct ata_port *ap = qc->ap;
1774 void __iomem *port_mmio = mv_ap_base(ap);
1775 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
1776 u32 cmd = (rw ? 0 : ATA_DMA_WR) | ATA_DMA_START;
1777
1778 /* start host DMA transaction */
1779 writelfl(cmd, port_mmio + BMDMA_CMD_OFS);
1780}
1781
1782/**
1783 * mv_bmdma_stop - Stop BMDMA transfer
1784 * @qc: queued command to stop DMA on.
1785 *
1786 * Clears the ATA_DMA_START flag in the bmdma control register
1787 *
1788 * LOCKING:
1789 * Inherited from caller.
1790 */
1791static void mv_bmdma_stop(struct ata_queued_cmd *qc)
1792{
1793 struct ata_port *ap = qc->ap;
1794 void __iomem *port_mmio = mv_ap_base(ap);
1795 u32 cmd;
1796
1797 /* clear start/stop bit */
1798 cmd = readl(port_mmio + BMDMA_CMD_OFS);
1799 cmd &= ~ATA_DMA_START;
1800 writelfl(cmd, port_mmio + BMDMA_CMD_OFS);
1801
1802 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
1803 ata_sff_dma_pause(ap);
1804}
1805
1806/**
1807 * mv_bmdma_status - Read BMDMA status
1808 * @ap: port for which to retrieve DMA status.
1809 *
1810 * Read and return equivalent of the sff BMDMA status register.
1811 *
1812 * LOCKING:
1813 * Inherited from caller.
1814 */
1815static u8 mv_bmdma_status(struct ata_port *ap)
1816{
1817 void __iomem *port_mmio = mv_ap_base(ap);
1818 u32 reg, status;
1819
1820 /*
1821 * Other bits are valid only if ATA_DMA_ACTIVE==0,
1822 * and the ATA_DMA_INTR bit doesn't exist.
1823 */
1824 reg = readl(port_mmio + BMDMA_STATUS_OFS);
1825 if (reg & ATA_DMA_ACTIVE)
1826 status = ATA_DMA_ACTIVE;
1827 else
1828 status = (reg & ATA_DMA_ERR) | ATA_DMA_INTR;
1829 return status;
1830}
1831
1832/**
1387 * mv_qc_prep - Host specific command preparation. 1833 * mv_qc_prep - Host specific command preparation.
1388 * @qc: queued command to prepare 1834 * @qc: queued command to prepare
1389 * 1835 *
@@ -1545,6 +1991,132 @@ static void mv_qc_prep_iie(struct ata_queued_cmd *qc)
1545} 1991}
1546 1992
1547/** 1993/**
1994 * mv_sff_check_status - fetch device status, if valid
1995 * @ap: ATA port to fetch status from
1996 *
1997 * When using command issue via mv_qc_issue_fis(),
1998 * the initial ATA_BUSY state does not show up in the
1999 * ATA status (shadow) register. This can confuse libata!
2000 *
2001 * So we have a hook here to fake ATA_BUSY for that situation,
2002 * until the first time a BUSY, DRQ, or ERR bit is seen.
2003 *
2004 * The rest of the time, it simply returns the ATA status register.
2005 */
2006static u8 mv_sff_check_status(struct ata_port *ap)
2007{
2008 u8 stat = ioread8(ap->ioaddr.status_addr);
2009 struct mv_port_priv *pp = ap->private_data;
2010
2011 if (pp->pp_flags & MV_PP_FLAG_FAKE_ATA_BUSY) {
2012 if (stat & (ATA_BUSY | ATA_DRQ | ATA_ERR))
2013 pp->pp_flags &= ~MV_PP_FLAG_FAKE_ATA_BUSY;
2014 else
2015 stat = ATA_BUSY;
2016 }
2017 return stat;
2018}
2019
2020/**
2021 * mv_send_fis - Send a FIS, using the "Vendor-Unique FIS" register
2022 * @fis: fis to be sent
2023 * @nwords: number of 32-bit words in the fis
2024 */
2025static unsigned int mv_send_fis(struct ata_port *ap, u32 *fis, int nwords)
2026{
2027 void __iomem *port_mmio = mv_ap_base(ap);
2028 u32 ifctl, old_ifctl, ifstat;
2029 int i, timeout = 200, final_word = nwords - 1;
2030
2031 /* Initiate FIS transmission mode */
2032 old_ifctl = readl(port_mmio + SATA_IFCTL_OFS);
2033 ifctl = 0x100 | (old_ifctl & 0xf);
2034 writelfl(ifctl, port_mmio + SATA_IFCTL_OFS);
2035
2036 /* Send all words of the FIS except for the final word */
2037 for (i = 0; i < final_word; ++i)
2038 writel(fis[i], port_mmio + VENDOR_UNIQUE_FIS_OFS);
2039
2040 /* Flag end-of-transmission, and then send the final word */
2041 writelfl(ifctl | 0x200, port_mmio + SATA_IFCTL_OFS);
2042 writelfl(fis[final_word], port_mmio + VENDOR_UNIQUE_FIS_OFS);
2043
2044 /*
2045 * Wait for FIS transmission to complete.
2046 * This typically takes just a single iteration.
2047 */
2048 do {
2049 ifstat = readl(port_mmio + SATA_IFSTAT_OFS);
2050 } while (!(ifstat & 0x1000) && --timeout);
2051
2052 /* Restore original port configuration */
2053 writelfl(old_ifctl, port_mmio + SATA_IFCTL_OFS);
2054
2055 /* See if it worked */
2056 if ((ifstat & 0x3000) != 0x1000) {
2057 ata_port_printk(ap, KERN_WARNING,
2058 "%s transmission error, ifstat=%08x\n",
2059 __func__, ifstat);
2060 return AC_ERR_OTHER;
2061 }
2062 return 0;
2063}
2064
2065/**
2066 * mv_qc_issue_fis - Issue a command directly as a FIS
2067 * @qc: queued command to start
2068 *
2069 * Note that the ATA shadow registers are not updated
2070 * after command issue, so the device will appear "READY"
2071 * if polled, even while it is BUSY processing the command.
2072 *
2073 * So we use a status hook to fake ATA_BUSY until the drive changes state.
2074 *
2075 * Note: we don't get updated shadow regs on *completion*
2076 * of non-data commands. So avoid sending them via this function,
2077 * as they will appear to have completed immediately.
2078 *
2079 * GEN_IIE has special registers that we could get the result tf from,
2080 * but earlier chipsets do not. For now, we ignore those registers.
2081 */
2082static unsigned int mv_qc_issue_fis(struct ata_queued_cmd *qc)
2083{
2084 struct ata_port *ap = qc->ap;
2085 struct mv_port_priv *pp = ap->private_data;
2086 struct ata_link *link = qc->dev->link;
2087 u32 fis[5];
2088 int err = 0;
2089
2090 ata_tf_to_fis(&qc->tf, link->pmp, 1, (void *)fis);
2091 err = mv_send_fis(ap, fis, sizeof(fis) / sizeof(fis[0]));
2092 if (err)
2093 return err;
2094
2095 switch (qc->tf.protocol) {
2096 case ATAPI_PROT_PIO:
2097 pp->pp_flags |= MV_PP_FLAG_FAKE_ATA_BUSY;
2098 /* fall through */
2099 case ATAPI_PROT_NODATA:
2100 ap->hsm_task_state = HSM_ST_FIRST;
2101 break;
2102 case ATA_PROT_PIO:
2103 pp->pp_flags |= MV_PP_FLAG_FAKE_ATA_BUSY;
2104 if (qc->tf.flags & ATA_TFLAG_WRITE)
2105 ap->hsm_task_state = HSM_ST_FIRST;
2106 else
2107 ap->hsm_task_state = HSM_ST;
2108 break;
2109 default:
2110 ap->hsm_task_state = HSM_ST_LAST;
2111 break;
2112 }
2113
2114 if (qc->tf.flags & ATA_TFLAG_POLLING)
2115 ata_pio_queue_task(ap, qc, 0);
2116 return 0;
2117}
2118
2119/**
1548 * mv_qc_issue - Initiate a command to the host 2120 * mv_qc_issue - Initiate a command to the host
1549 * @qc: queued command to start 2121 * @qc: queued command to start
1550 * 2122 *
@@ -1558,14 +2130,28 @@ static void mv_qc_prep_iie(struct ata_queued_cmd *qc)
1558 */ 2130 */
1559static unsigned int mv_qc_issue(struct ata_queued_cmd *qc) 2131static unsigned int mv_qc_issue(struct ata_queued_cmd *qc)
1560{ 2132{
2133 static int limit_warnings = 10;
1561 struct ata_port *ap = qc->ap; 2134 struct ata_port *ap = qc->ap;
1562 void __iomem *port_mmio = mv_ap_base(ap); 2135 void __iomem *port_mmio = mv_ap_base(ap);
1563 struct mv_port_priv *pp = ap->private_data; 2136 struct mv_port_priv *pp = ap->private_data;
1564 u32 in_index; 2137 u32 in_index;
2138 unsigned int port_irqs;
1565 2139
1566 if ((qc->tf.protocol != ATA_PROT_DMA) && 2140 pp->pp_flags &= ~MV_PP_FLAG_FAKE_ATA_BUSY; /* paranoia */
1567 (qc->tf.protocol != ATA_PROT_NCQ)) { 2141
1568 static int limit_warnings = 10; 2142 switch (qc->tf.protocol) {
2143 case ATA_PROT_DMA:
2144 case ATA_PROT_NCQ:
2145 mv_start_edma(ap, port_mmio, pp, qc->tf.protocol);
2146 pp->req_idx = (pp->req_idx + 1) & MV_MAX_Q_DEPTH_MASK;
2147 in_index = pp->req_idx << EDMA_REQ_Q_PTR_SHIFT;
2148
2149 /* Write the request in pointer to kick the EDMA to life */
2150 writelfl((pp->crqb_dma & EDMA_REQ_Q_BASE_LO_MASK) | in_index,
2151 port_mmio + EDMA_REQ_Q_IN_PTR_OFS);
2152 return 0;
2153
2154 case ATA_PROT_PIO:
1569 /* 2155 /*
1570 * Errata SATA#16, SATA#24: warn if multiple DRQs expected. 2156 * Errata SATA#16, SATA#24: warn if multiple DRQs expected.
1571 * 2157 *
@@ -1583,27 +2169,46 @@ static unsigned int mv_qc_issue(struct ata_queued_cmd *qc)
1583 ": attempting PIO w/multiple DRQ: " 2169 ": attempting PIO w/multiple DRQ: "
1584 "this may fail due to h/w errata\n"); 2170 "this may fail due to h/w errata\n");
1585 } 2171 }
1586 /* 2172 /* drop through */
1587 * We're about to send a non-EDMA capable command to the 2173 case ATA_PROT_NODATA:
1588 * port. Turn off EDMA so there won't be problems accessing 2174 case ATAPI_PROT_PIO:
1589 * shadow block, etc registers. 2175 case ATAPI_PROT_NODATA:
1590 */ 2176 if (ap->flags & ATA_FLAG_PIO_POLLING)
1591 mv_stop_edma(ap); 2177 qc->tf.flags |= ATA_TFLAG_POLLING;
1592 mv_enable_port_irqs(ap, ERR_IRQ); 2178 break;
1593 mv_pmp_select(ap, qc->dev->link->pmp);
1594 return ata_sff_qc_issue(qc);
1595 } 2179 }
1596 2180
1597 mv_start_dma(ap, port_mmio, pp, qc->tf.protocol); 2181 if (qc->tf.flags & ATA_TFLAG_POLLING)
1598 2182 port_irqs = ERR_IRQ; /* mask device interrupt when polling */
1599 pp->req_idx = (pp->req_idx + 1) & MV_MAX_Q_DEPTH_MASK; 2183 else
1600 in_index = pp->req_idx << EDMA_REQ_Q_PTR_SHIFT; 2184 port_irqs = ERR_IRQ | DONE_IRQ; /* unmask all interrupts */
1601 2185
1602 /* and write the request in pointer to kick the EDMA to life */ 2186 /*
1603 writelfl((pp->crqb_dma & EDMA_REQ_Q_BASE_LO_MASK) | in_index, 2187 * We're about to send a non-EDMA capable command to the
1604 port_mmio + EDMA_REQ_Q_IN_PTR_OFS); 2188 * port. Turn off EDMA so there won't be problems accessing
2189 * shadow block, etc registers.
2190 */
2191 mv_stop_edma(ap);
2192 mv_clear_and_enable_port_irqs(ap, mv_ap_base(ap), port_irqs);
2193 mv_pmp_select(ap, qc->dev->link->pmp);
1605 2194
1606 return 0; 2195 if (qc->tf.command == ATA_CMD_READ_LOG_EXT) {
2196 struct mv_host_priv *hpriv = ap->host->private_data;
2197 /*
2198 * Workaround for 88SX60x1 FEr SATA#25 (part 2).
2199 *
2200 * After any NCQ error, the READ_LOG_EXT command
2201 * from libata-eh *must* use mv_qc_issue_fis().
2202 * Otherwise it might fail, due to chip errata.
2203 *
2204 * Rather than special-case it, we'll just *always*
2205 * use this method here for READ_LOG_EXT, making for
2206 * easier testing.
2207 */
2208 if (IS_GEN_II(hpriv))
2209 return mv_qc_issue_fis(qc);
2210 }
2211 return ata_sff_qc_issue(qc);
1607} 2212}
1608 2213
1609static struct ata_queued_cmd *mv_get_active_qc(struct ata_port *ap) 2214static struct ata_queued_cmd *mv_get_active_qc(struct ata_port *ap)
@@ -1614,8 +2219,12 @@ static struct ata_queued_cmd *mv_get_active_qc(struct ata_port *ap)
1614 if (pp->pp_flags & MV_PP_FLAG_NCQ_EN) 2219 if (pp->pp_flags & MV_PP_FLAG_NCQ_EN)
1615 return NULL; 2220 return NULL;
1616 qc = ata_qc_from_tag(ap, ap->link.active_tag); 2221 qc = ata_qc_from_tag(ap, ap->link.active_tag);
1617 if (qc && (qc->tf.flags & ATA_TFLAG_POLLING)) 2222 if (qc) {
1618 qc = NULL; 2223 if (qc->tf.flags & ATA_TFLAG_POLLING)
2224 qc = NULL;
2225 else if (!(qc->flags & ATA_QCFLAG_ACTIVE))
2226 qc = NULL;
2227 }
1619 return qc; 2228 return qc;
1620} 2229}
1621 2230
@@ -2084,6 +2693,10 @@ static int mv_host_intr(struct ata_host *host, u32 main_irq_cause)
2084 void __iomem *mmio = hpriv->base, *hc_mmio; 2693 void __iomem *mmio = hpriv->base, *hc_mmio;
2085 unsigned int handled = 0, port; 2694 unsigned int handled = 0, port;
2086 2695
2696 /* If asserted, clear the "all ports" IRQ coalescing bit */
2697 if (main_irq_cause & ALL_PORTS_COAL_DONE)
2698 writel(~ALL_PORTS_COAL_IRQ, mmio + MV_IRQ_COAL_CAUSE);
2699
2087 for (port = 0; port < hpriv->n_ports; port++) { 2700 for (port = 0; port < hpriv->n_ports; port++) {
2088 struct ata_port *ap = host->ports[port]; 2701 struct ata_port *ap = host->ports[port];
2089 unsigned int p, shift, hardport, port_cause; 2702 unsigned int p, shift, hardport, port_cause;
@@ -2116,6 +2729,8 @@ static int mv_host_intr(struct ata_host *host, u32 main_irq_cause)
2116 * to ack (only) those ports via hc_irq_cause. 2729 * to ack (only) those ports via hc_irq_cause.
2117 */ 2730 */
2118 ack_irqs = 0; 2731 ack_irqs = 0;
2732 if (hc_cause & PORTS_0_3_COAL_DONE)
2733 ack_irqs = HC_COAL_IRQ;
2119 for (p = 0; p < MV_PORTS_PER_HC; ++p) { 2734 for (p = 0; p < MV_PORTS_PER_HC; ++p) {
2120 if ((port + p) >= hpriv->n_ports) 2735 if ((port + p) >= hpriv->n_ports)
2121 break; 2736 break;
@@ -2204,7 +2819,7 @@ static irqreturn_t mv_interrupt(int irq, void *dev_instance)
2204 2819
2205 /* for MSI: block new interrupts while in here */ 2820 /* for MSI: block new interrupts while in here */
2206 if (using_msi) 2821 if (using_msi)
2207 writel(0, hpriv->main_irq_mask_addr); 2822 mv_write_main_irq_mask(0, hpriv);
2208 2823
2209 main_irq_cause = readl(hpriv->main_irq_cause_addr); 2824 main_irq_cause = readl(hpriv->main_irq_cause_addr);
2210 pending_irqs = main_irq_cause & hpriv->main_irq_mask; 2825 pending_irqs = main_irq_cause & hpriv->main_irq_mask;
@@ -2221,7 +2836,7 @@ static irqreturn_t mv_interrupt(int irq, void *dev_instance)
2221 2836
2222 /* for MSI: unmask; interrupt cause bits will retrigger now */ 2837 /* for MSI: unmask; interrupt cause bits will retrigger now */
2223 if (using_msi) 2838 if (using_msi)
2224 writel(hpriv->main_irq_mask, hpriv->main_irq_mask_addr); 2839 mv_write_main_irq_mask(hpriv->main_irq_mask, hpriv);
2225 2840
2226 spin_unlock(&host->lock); 2841 spin_unlock(&host->lock);
2227 2842
@@ -2774,6 +3389,8 @@ static int mv_hardreset(struct ata_link *link, unsigned int *class,
2774 3389
2775 mv_reset_channel(hpriv, mmio, ap->port_no); 3390 mv_reset_channel(hpriv, mmio, ap->port_no);
2776 pp->pp_flags &= ~MV_PP_FLAG_EDMA_EN; 3391 pp->pp_flags &= ~MV_PP_FLAG_EDMA_EN;
3392 pp->pp_flags &=
3393 ~(MV_PP_FLAG_FBS_EN | MV_PP_FLAG_NCQ_EN | MV_PP_FLAG_FAKE_ATA_BUSY);
2777 3394
2778 /* Workaround for errata FEr SATA#10 (part 2) */ 3395 /* Workaround for errata FEr SATA#10 (part 2) */
2779 do { 3396 do {
@@ -2793,6 +3410,8 @@ static int mv_hardreset(struct ata_link *link, unsigned int *class,
2793 extra = HZ; /* only extend it once, max */ 3410 extra = HZ; /* only extend it once, max */
2794 } 3411 }
2795 } while (sstatus != 0x0 && sstatus != 0x113 && sstatus != 0x123); 3412 } while (sstatus != 0x0 && sstatus != 0x113 && sstatus != 0x123);
3413 mv_save_cached_regs(ap);
3414 mv_edma_cfg(ap, 0, 0);
2796 3415
2797 return rc; 3416 return rc;
2798} 3417}
@@ -3126,6 +3745,8 @@ static int mv_init_host(struct ata_host *host, unsigned int board_idx)
3126 * The per-port interrupts get done later as ports are set up. 3745 * The per-port interrupts get done later as ports are set up.
3127 */ 3746 */
3128 mv_set_main_irq_mask(host, 0, PCI_ERR); 3747 mv_set_main_irq_mask(host, 0, PCI_ERR);
3748 mv_set_irq_coalescing(host, irq_coalescing_io_count,
3749 irq_coalescing_usecs);
3129done: 3750done:
3130 return rc; 3751 return rc;
3131} 3752}
@@ -3287,12 +3908,6 @@ static struct pci_driver mv_pci_driver = {
3287 .remove = ata_pci_remove_one, 3908 .remove = ata_pci_remove_one,
3288}; 3909};
3289 3910
3290/*
3291 * module options
3292 */
3293static int msi; /* Use PCI msi; either zero (off, default) or non-zero */
3294
3295
3296/* move to PCI layer or libata core? */ 3911/* move to PCI layer or libata core? */
3297static int pci_go_64(struct pci_dev *pdev) 3912static int pci_go_64(struct pci_dev *pdev)
3298{ 3913{
@@ -3474,10 +4089,5 @@ MODULE_DEVICE_TABLE(pci, mv_pci_tbl);
3474MODULE_VERSION(DRV_VERSION); 4089MODULE_VERSION(DRV_VERSION);
3475MODULE_ALIAS("platform:" DRV_NAME); 4090MODULE_ALIAS("platform:" DRV_NAME);
3476 4091
3477#ifdef CONFIG_PCI
3478module_param(msi, int, 0444);
3479MODULE_PARM_DESC(msi, "Enable use of PCI MSI (0=off, 1=on)");
3480#endif
3481
3482module_init(mv_init); 4092module_init(mv_init);
3483module_exit(mv_exit); 4093module_exit(mv_exit);
diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c
index f65b53785a8..6cda12ba812 100644
--- a/drivers/ata/sata_nv.c
+++ b/drivers/ata/sata_nv.c
@@ -57,9 +57,9 @@ enum {
57 NV_MMIO_BAR = 5, 57 NV_MMIO_BAR = 5,
58 58
59 NV_PORTS = 2, 59 NV_PORTS = 2,
60 NV_PIO_MASK = 0x1f, 60 NV_PIO_MASK = ATA_PIO4,
61 NV_MWDMA_MASK = 0x07, 61 NV_MWDMA_MASK = ATA_MWDMA2,
62 NV_UDMA_MASK = 0x7f, 62 NV_UDMA_MASK = ATA_UDMA6,
63 NV_PORT0_SCR_REG_OFFSET = 0x00, 63 NV_PORT0_SCR_REG_OFFSET = 0x00,
64 NV_PORT1_SCR_REG_OFFSET = 0x40, 64 NV_PORT1_SCR_REG_OFFSET = 0x40,
65 65
@@ -408,6 +408,7 @@ static struct scsi_host_template nv_swncq_sht = {
408 408
409static struct ata_port_operations nv_common_ops = { 409static struct ata_port_operations nv_common_ops = {
410 .inherits = &ata_bmdma_port_ops, 410 .inherits = &ata_bmdma_port_ops,
411 .lost_interrupt = ATA_OP_NULL,
411 .scr_read = nv_scr_read, 412 .scr_read = nv_scr_read,
412 .scr_write = nv_scr_write, 413 .scr_write = nv_scr_write,
413}; 414};
diff --git a/drivers/ata/sata_promise.c b/drivers/ata/sata_promise.c
index ba9a2570a74..b1fd7d62071 100644
--- a/drivers/ata/sata_promise.c
+++ b/drivers/ata/sata_promise.c
@@ -176,7 +176,9 @@ static const struct ata_port_operations pdc_common_ops = {
176 .check_atapi_dma = pdc_check_atapi_dma, 176 .check_atapi_dma = pdc_check_atapi_dma,
177 .qc_prep = pdc_qc_prep, 177 .qc_prep = pdc_qc_prep,
178 .qc_issue = pdc_qc_issue, 178 .qc_issue = pdc_qc_issue,
179
179 .sff_irq_clear = pdc_irq_clear, 180 .sff_irq_clear = pdc_irq_clear,
181 .lost_interrupt = ATA_OP_NULL,
180 182
181 .post_internal_cmd = pdc_post_internal_cmd, 183 .post_internal_cmd = pdc_post_internal_cmd,
182 .error_handler = pdc_error_handler, 184 .error_handler = pdc_error_handler,
@@ -213,8 +215,8 @@ static const struct ata_port_info pdc_port_info[] = {
213 { 215 {
214 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA | 216 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA |
215 PDC_FLAG_SATA_PATA, 217 PDC_FLAG_SATA_PATA,
216 .pio_mask = 0x1f, /* pio0-4 */ 218 .pio_mask = ATA_PIO4,
217 .mwdma_mask = 0x07, /* mwdma0-2 */ 219 .mwdma_mask = ATA_MWDMA2,
218 .udma_mask = ATA_UDMA6, 220 .udma_mask = ATA_UDMA6,
219 .port_ops = &pdc_old_sata_ops, 221 .port_ops = &pdc_old_sata_ops,
220 }, 222 },
@@ -222,8 +224,8 @@ static const struct ata_port_info pdc_port_info[] = {
222 [board_2037x_pata] = 224 [board_2037x_pata] =
223 { 225 {
224 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS, 226 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS,
225 .pio_mask = 0x1f, /* pio0-4 */ 227 .pio_mask = ATA_PIO4,
226 .mwdma_mask = 0x07, /* mwdma0-2 */ 228 .mwdma_mask = ATA_MWDMA2,
227 .udma_mask = ATA_UDMA6, 229 .udma_mask = ATA_UDMA6,
228 .port_ops = &pdc_pata_ops, 230 .port_ops = &pdc_pata_ops,
229 }, 231 },
@@ -232,8 +234,8 @@ static const struct ata_port_info pdc_port_info[] = {
232 { 234 {
233 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA | 235 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA |
234 PDC_FLAG_4_PORTS, 236 PDC_FLAG_4_PORTS,
235 .pio_mask = 0x1f, /* pio0-4 */ 237 .pio_mask = ATA_PIO4,
236 .mwdma_mask = 0x07, /* mwdma0-2 */ 238 .mwdma_mask = ATA_MWDMA2,
237 .udma_mask = ATA_UDMA6, 239 .udma_mask = ATA_UDMA6,
238 .port_ops = &pdc_old_sata_ops, 240 .port_ops = &pdc_old_sata_ops,
239 }, 241 },
@@ -242,8 +244,8 @@ static const struct ata_port_info pdc_port_info[] = {
242 { 244 {
243 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS | 245 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS |
244 PDC_FLAG_4_PORTS, 246 PDC_FLAG_4_PORTS,
245 .pio_mask = 0x1f, /* pio0-4 */ 247 .pio_mask = ATA_PIO4,
246 .mwdma_mask = 0x07, /* mwdma0-2 */ 248 .mwdma_mask = ATA_MWDMA2,
247 .udma_mask = ATA_UDMA6, 249 .udma_mask = ATA_UDMA6,
248 .port_ops = &pdc_pata_ops, 250 .port_ops = &pdc_pata_ops,
249 }, 251 },
@@ -252,8 +254,8 @@ static const struct ata_port_info pdc_port_info[] = {
252 { 254 {
253 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA | 255 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA |
254 PDC_FLAG_GEN_II | PDC_FLAG_SATA_PATA, 256 PDC_FLAG_GEN_II | PDC_FLAG_SATA_PATA,
255 .pio_mask = 0x1f, /* pio0-4 */ 257 .pio_mask = ATA_PIO4,
256 .mwdma_mask = 0x07, /* mwdma0-2 */ 258 .mwdma_mask = ATA_MWDMA2,
257 .udma_mask = ATA_UDMA6, 259 .udma_mask = ATA_UDMA6,
258 .port_ops = &pdc_sata_ops, 260 .port_ops = &pdc_sata_ops,
259 }, 261 },
@@ -262,8 +264,8 @@ static const struct ata_port_info pdc_port_info[] = {
262 { 264 {
263 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS | 265 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS |
264 PDC_FLAG_GEN_II, 266 PDC_FLAG_GEN_II,
265 .pio_mask = 0x1f, /* pio0-4 */ 267 .pio_mask = ATA_PIO4,
266 .mwdma_mask = 0x07, /* mwdma0-2 */ 268 .mwdma_mask = ATA_MWDMA2,
267 .udma_mask = ATA_UDMA6, 269 .udma_mask = ATA_UDMA6,
268 .port_ops = &pdc_pata_ops, 270 .port_ops = &pdc_pata_ops,
269 }, 271 },
@@ -272,8 +274,8 @@ static const struct ata_port_info pdc_port_info[] = {
272 { 274 {
273 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA | 275 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA |
274 PDC_FLAG_GEN_II | PDC_FLAG_4_PORTS, 276 PDC_FLAG_GEN_II | PDC_FLAG_4_PORTS,
275 .pio_mask = 0x1f, /* pio0-4 */ 277 .pio_mask = ATA_PIO4,
276 .mwdma_mask = 0x07, /* mwdma0-2 */ 278 .mwdma_mask = ATA_MWDMA2,
277 .udma_mask = ATA_UDMA6, 279 .udma_mask = ATA_UDMA6,
278 .port_ops = &pdc_sata_ops, 280 .port_ops = &pdc_sata_ops,
279 }, 281 },
diff --git a/drivers/ata/sata_qstor.c b/drivers/ata/sata_qstor.c
index a000c86ac85..c3936d35cda 100644
--- a/drivers/ata/sata_qstor.c
+++ b/drivers/ata/sata_qstor.c
@@ -147,6 +147,7 @@ static struct ata_port_operations qs_ata_ops = {
147 .softreset = ATA_OP_NULL, 147 .softreset = ATA_OP_NULL,
148 .error_handler = qs_error_handler, 148 .error_handler = qs_error_handler,
149 .post_internal_cmd = ATA_OP_NULL, 149 .post_internal_cmd = ATA_OP_NULL,
150 .lost_interrupt = ATA_OP_NULL,
150 151
151 .scr_read = qs_scr_read, 152 .scr_read = qs_scr_read,
152 .scr_write = qs_scr_write, 153 .scr_write = qs_scr_write,
@@ -160,7 +161,7 @@ static const struct ata_port_info qs_port_info[] = {
160 { 161 {
161 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 162 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
162 ATA_FLAG_MMIO | ATA_FLAG_PIO_POLLING, 163 ATA_FLAG_MMIO | ATA_FLAG_PIO_POLLING,
163 .pio_mask = 0x10, /* pio4 */ 164 .pio_mask = ATA_PIO4_ONLY,
164 .udma_mask = ATA_UDMA6, 165 .udma_mask = ATA_UDMA6,
165 .port_ops = &qs_ata_ops, 166 .port_ops = &qs_ata_ops,
166 }, 167 },
diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c
index d0091609e21..e67ce8e5caa 100644
--- a/drivers/ata/sata_sil.c
+++ b/drivers/ata/sata_sil.c
@@ -200,8 +200,8 @@ static const struct ata_port_info sil_port_info[] = {
200 /* sil_3112 */ 200 /* sil_3112 */
201 { 201 {
202 .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_MOD15WRITE, 202 .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_MOD15WRITE,
203 .pio_mask = 0x1f, /* pio0-4 */ 203 .pio_mask = ATA_PIO4,
204 .mwdma_mask = 0x07, /* mwdma0-2 */ 204 .mwdma_mask = ATA_MWDMA2,
205 .udma_mask = ATA_UDMA5, 205 .udma_mask = ATA_UDMA5,
206 .port_ops = &sil_ops, 206 .port_ops = &sil_ops,
207 }, 207 },
@@ -209,24 +209,24 @@ static const struct ata_port_info sil_port_info[] = {
209 { 209 {
210 .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_MOD15WRITE | 210 .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_MOD15WRITE |
211 SIL_FLAG_NO_SATA_IRQ, 211 SIL_FLAG_NO_SATA_IRQ,
212 .pio_mask = 0x1f, /* pio0-4 */ 212 .pio_mask = ATA_PIO4,
213 .mwdma_mask = 0x07, /* mwdma0-2 */ 213 .mwdma_mask = ATA_MWDMA2,
214 .udma_mask = ATA_UDMA5, 214 .udma_mask = ATA_UDMA5,
215 .port_ops = &sil_ops, 215 .port_ops = &sil_ops,
216 }, 216 },
217 /* sil_3512 */ 217 /* sil_3512 */
218 { 218 {
219 .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_RERR_ON_DMA_ACT, 219 .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_RERR_ON_DMA_ACT,
220 .pio_mask = 0x1f, /* pio0-4 */ 220 .pio_mask = ATA_PIO4,
221 .mwdma_mask = 0x07, /* mwdma0-2 */ 221 .mwdma_mask = ATA_MWDMA2,
222 .udma_mask = ATA_UDMA5, 222 .udma_mask = ATA_UDMA5,
223 .port_ops = &sil_ops, 223 .port_ops = &sil_ops,
224 }, 224 },
225 /* sil_3114 */ 225 /* sil_3114 */
226 { 226 {
227 .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_RERR_ON_DMA_ACT, 227 .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_RERR_ON_DMA_ACT,
228 .pio_mask = 0x1f, /* pio0-4 */ 228 .pio_mask = ATA_PIO4,
229 .mwdma_mask = 0x07, /* mwdma0-2 */ 229 .mwdma_mask = ATA_MWDMA2,
230 .udma_mask = ATA_UDMA5, 230 .udma_mask = ATA_UDMA5,
231 .port_ops = &sil_ops, 231 .port_ops = &sil_ops,
232 }, 232 },
diff --git a/drivers/ata/sata_sil24.c b/drivers/ata/sata_sil24.c
index 2590c2279fa..0d8990dcdfc 100644
--- a/drivers/ata/sata_sil24.c
+++ b/drivers/ata/sata_sil24.c
@@ -429,25 +429,25 @@ static const struct ata_port_info sil24_port_info[] = {
429 { 429 {
430 .flags = SIL24_COMMON_FLAGS | SIL24_NPORTS2FLAG(4) | 430 .flags = SIL24_COMMON_FLAGS | SIL24_NPORTS2FLAG(4) |
431 SIL24_FLAG_PCIX_IRQ_WOC, 431 SIL24_FLAG_PCIX_IRQ_WOC,
432 .pio_mask = 0x1f, /* pio0-4 */ 432 .pio_mask = ATA_PIO4,
433 .mwdma_mask = 0x07, /* mwdma0-2 */ 433 .mwdma_mask = ATA_MWDMA2,
434 .udma_mask = ATA_UDMA5, /* udma0-5 */ 434 .udma_mask = ATA_UDMA5,
435 .port_ops = &sil24_ops, 435 .port_ops = &sil24_ops,
436 }, 436 },
437 /* sil_3132 */ 437 /* sil_3132 */
438 { 438 {
439 .flags = SIL24_COMMON_FLAGS | SIL24_NPORTS2FLAG(2), 439 .flags = SIL24_COMMON_FLAGS | SIL24_NPORTS2FLAG(2),
440 .pio_mask = 0x1f, /* pio0-4 */ 440 .pio_mask = ATA_PIO4,
441 .mwdma_mask = 0x07, /* mwdma0-2 */ 441 .mwdma_mask = ATA_MWDMA2,
442 .udma_mask = ATA_UDMA5, /* udma0-5 */ 442 .udma_mask = ATA_UDMA5,
443 .port_ops = &sil24_ops, 443 .port_ops = &sil24_ops,
444 }, 444 },
445 /* sil_3131/sil_3531 */ 445 /* sil_3131/sil_3531 */
446 { 446 {
447 .flags = SIL24_COMMON_FLAGS | SIL24_NPORTS2FLAG(1), 447 .flags = SIL24_COMMON_FLAGS | SIL24_NPORTS2FLAG(1),
448 .pio_mask = 0x1f, /* pio0-4 */ 448 .pio_mask = ATA_PIO4,
449 .mwdma_mask = 0x07, /* mwdma0-2 */ 449 .mwdma_mask = ATA_MWDMA2,
450 .udma_mask = ATA_UDMA5, /* udma0-5 */ 450 .udma_mask = ATA_UDMA5,
451 .port_ops = &sil24_ops, 451 .port_ops = &sil24_ops,
452 }, 452 },
453}; 453};
diff --git a/drivers/ata/sata_sis.c b/drivers/ata/sata_sis.c
index 9c43b4e7c4a..8f983322861 100644
--- a/drivers/ata/sata_sis.c
+++ b/drivers/ata/sata_sis.c
@@ -97,8 +97,8 @@ static struct ata_port_operations sis_ops = {
97 97
98static const struct ata_port_info sis_port_info = { 98static const struct ata_port_info sis_port_info = {
99 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY, 99 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY,
100 .pio_mask = 0x1f, 100 .pio_mask = ATA_PIO4,
101 .mwdma_mask = 0x7, 101 .mwdma_mask = ATA_MWDMA2,
102 .udma_mask = ATA_UDMA6, 102 .udma_mask = ATA_UDMA6,
103 .port_ops = &sis_ops, 103 .port_ops = &sis_ops,
104}; 104};
diff --git a/drivers/ata/sata_svw.c b/drivers/ata/sata_svw.c
index 609d147813a..7257f2d5c52 100644
--- a/drivers/ata/sata_svw.c
+++ b/drivers/ata/sata_svw.c
@@ -361,8 +361,8 @@ static const struct ata_port_info k2_port_info[] = {
361 { 361 {
362 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 362 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
363 ATA_FLAG_MMIO | K2_FLAG_NO_ATAPI_DMA, 363 ATA_FLAG_MMIO | K2_FLAG_NO_ATAPI_DMA,
364 .pio_mask = 0x1f, 364 .pio_mask = ATA_PIO4,
365 .mwdma_mask = 0x07, 365 .mwdma_mask = ATA_MWDMA2,
366 .udma_mask = ATA_UDMA6, 366 .udma_mask = ATA_UDMA6,
367 .port_ops = &k2_sata_ops, 367 .port_ops = &k2_sata_ops,
368 }, 368 },
@@ -371,8 +371,8 @@ static const struct ata_port_info k2_port_info[] = {
371 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 371 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
372 ATA_FLAG_MMIO | K2_FLAG_NO_ATAPI_DMA | 372 ATA_FLAG_MMIO | K2_FLAG_NO_ATAPI_DMA |
373 K2_FLAG_SATA_8_PORTS, 373 K2_FLAG_SATA_8_PORTS,
374 .pio_mask = 0x1f, 374 .pio_mask = ATA_PIO4,
375 .mwdma_mask = 0x07, 375 .mwdma_mask = ATA_MWDMA2,
376 .udma_mask = ATA_UDMA6, 376 .udma_mask = ATA_UDMA6,
377 .port_ops = &k2_sata_ops, 377 .port_ops = &k2_sata_ops,
378 }, 378 },
@@ -380,8 +380,8 @@ static const struct ata_port_info k2_port_info[] = {
380 { 380 {
381 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 381 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
382 ATA_FLAG_MMIO | K2_FLAG_BAR_POS_3, 382 ATA_FLAG_MMIO | K2_FLAG_BAR_POS_3,
383 .pio_mask = 0x1f, 383 .pio_mask = ATA_PIO4,
384 .mwdma_mask = 0x07, 384 .mwdma_mask = ATA_MWDMA2,
385 .udma_mask = ATA_UDMA6, 385 .udma_mask = ATA_UDMA6,
386 .port_ops = &k2_sata_ops, 386 .port_ops = &k2_sata_ops,
387 }, 387 },
@@ -389,8 +389,8 @@ static const struct ata_port_info k2_port_info[] = {
389 { 389 {
390 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 390 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
391 ATA_FLAG_MMIO, 391 ATA_FLAG_MMIO,
392 .pio_mask = 0x1f, 392 .pio_mask = ATA_PIO4,
393 .mwdma_mask = 0x07, 393 .mwdma_mask = ATA_MWDMA2,
394 .udma_mask = ATA_UDMA6, 394 .udma_mask = ATA_UDMA6,
395 .port_ops = &k2_sata_ops, 395 .port_ops = &k2_sata_ops,
396 }, 396 },
diff --git a/drivers/ata/sata_sx4.c b/drivers/ata/sata_sx4.c
index ec04b8d3c79..dce3dccced3 100644
--- a/drivers/ata/sata_sx4.c
+++ b/drivers/ata/sata_sx4.c
@@ -265,8 +265,8 @@ static const struct ata_port_info pdc_port_info[] = {
265 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 265 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
266 ATA_FLAG_SRST | ATA_FLAG_MMIO | 266 ATA_FLAG_SRST | ATA_FLAG_MMIO |
267 ATA_FLAG_NO_ATAPI | ATA_FLAG_PIO_POLLING, 267 ATA_FLAG_NO_ATAPI | ATA_FLAG_PIO_POLLING,
268 .pio_mask = 0x1f, /* pio0-4 */ 268 .pio_mask = ATA_PIO4,
269 .mwdma_mask = 0x07, /* mwdma0-2 */ 269 .mwdma_mask = ATA_MWDMA2,
270 .udma_mask = ATA_UDMA6, 270 .udma_mask = ATA_UDMA6,
271 .port_ops = &pdc_20621_ops, 271 .port_ops = &pdc_20621_ops,
272 }, 272 },
diff --git a/drivers/ata/sata_uli.c b/drivers/ata/sata_uli.c
index 019575bb3e0..e5bff47e8aa 100644
--- a/drivers/ata/sata_uli.c
+++ b/drivers/ata/sata_uli.c
@@ -89,7 +89,7 @@ static struct ata_port_operations uli_ops = {
89static const struct ata_port_info uli_port_info = { 89static const struct ata_port_info uli_port_info = {
90 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 90 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
91 ATA_FLAG_IGN_SIMPLEX, 91 ATA_FLAG_IGN_SIMPLEX,
92 .pio_mask = 0x1f, /* pio0-4 */ 92 .pio_mask = ATA_PIO4,
93 .udma_mask = ATA_UDMA6, 93 .udma_mask = ATA_UDMA6,
94 .port_ops = &uli_ops, 94 .port_ops = &uli_ops,
95}; 95};
diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c
index 5c62da9cd49..98e8c50703b 100644
--- a/drivers/ata/sata_via.c
+++ b/drivers/ata/sata_via.c
@@ -146,24 +146,24 @@ static struct ata_port_operations vt8251_ops = {
146 146
147static const struct ata_port_info vt6420_port_info = { 147static const struct ata_port_info vt6420_port_info = {
148 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY, 148 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY,
149 .pio_mask = 0x1f, 149 .pio_mask = ATA_PIO4,
150 .mwdma_mask = 0x07, 150 .mwdma_mask = ATA_MWDMA2,
151 .udma_mask = ATA_UDMA6, 151 .udma_mask = ATA_UDMA6,
152 .port_ops = &vt6420_sata_ops, 152 .port_ops = &vt6420_sata_ops,
153}; 153};
154 154
155static struct ata_port_info vt6421_sport_info = { 155static struct ata_port_info vt6421_sport_info = {
156 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY, 156 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY,
157 .pio_mask = 0x1f, 157 .pio_mask = ATA_PIO4,
158 .mwdma_mask = 0x07, 158 .mwdma_mask = ATA_MWDMA2,
159 .udma_mask = ATA_UDMA6, 159 .udma_mask = ATA_UDMA6,
160 .port_ops = &vt6421_sata_ops, 160 .port_ops = &vt6421_sata_ops,
161}; 161};
162 162
163static struct ata_port_info vt6421_pport_info = { 163static struct ata_port_info vt6421_pport_info = {
164 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_NO_LEGACY, 164 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_NO_LEGACY,
165 .pio_mask = 0x1f, 165 .pio_mask = ATA_PIO4,
166 .mwdma_mask = 0, 166 /* No MWDMA */
167 .udma_mask = ATA_UDMA6, 167 .udma_mask = ATA_UDMA6,
168 .port_ops = &vt6421_pata_ops, 168 .port_ops = &vt6421_pata_ops,
169}; 169};
@@ -171,8 +171,8 @@ static struct ata_port_info vt6421_pport_info = {
171static struct ata_port_info vt8251_port_info = { 171static struct ata_port_info vt8251_port_info = {
172 .flags = ATA_FLAG_SATA | ATA_FLAG_SLAVE_POSS | 172 .flags = ATA_FLAG_SATA | ATA_FLAG_SLAVE_POSS |
173 ATA_FLAG_NO_LEGACY, 173 ATA_FLAG_NO_LEGACY,
174 .pio_mask = 0x1f, 174 .pio_mask = ATA_PIO4,
175 .mwdma_mask = 0x07, 175 .mwdma_mask = ATA_MWDMA2,
176 .udma_mask = ATA_UDMA6, 176 .udma_mask = ATA_UDMA6,
177 .port_ops = &vt8251_ops, 177 .port_ops = &vt8251_ops,
178}; 178};
diff --git a/drivers/ata/sata_vsc.c b/drivers/ata/sata_vsc.c
index c57cdff9e6b..ed70bd28fa2 100644
--- a/drivers/ata/sata_vsc.c
+++ b/drivers/ata/sata_vsc.c
@@ -308,6 +308,9 @@ static struct scsi_host_template vsc_sata_sht = {
308 308
309static struct ata_port_operations vsc_sata_ops = { 309static struct ata_port_operations vsc_sata_ops = {
310 .inherits = &ata_bmdma_port_ops, 310 .inherits = &ata_bmdma_port_ops,
311 /* The IRQ handling is not quite standard SFF behaviour so we
312 cannot use the default lost interrupt handler */
313 .lost_interrupt = ATA_OP_NULL,
311 .sff_tf_load = vsc_sata_tf_load, 314 .sff_tf_load = vsc_sata_tf_load,
312 .sff_tf_read = vsc_sata_tf_read, 315 .sff_tf_read = vsc_sata_tf_read,
313 .freeze = vsc_freeze, 316 .freeze = vsc_freeze,
@@ -345,8 +348,8 @@ static int __devinit vsc_sata_init_one(struct pci_dev *pdev,
345 static const struct ata_port_info pi = { 348 static const struct ata_port_info pi = {
346 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 349 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
347 ATA_FLAG_MMIO, 350 ATA_FLAG_MMIO,
348 .pio_mask = 0x1f, 351 .pio_mask = ATA_PIO4,
349 .mwdma_mask = 0x07, 352 .mwdma_mask = ATA_MWDMA2,
350 .udma_mask = ATA_UDMA6, 353 .udma_mask = ATA_UDMA6,
351 .port_ops = &vsc_sata_ops, 354 .port_ops = &vsc_sata_ops,
352 }; 355 };