diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2009-05-23 18:18:40 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-05-23 18:18:40 -0400 |
commit | fc05505b77f7900a1bb74fb3f3a4343dee4265a4 (patch) | |
tree | 6517919cb60bd9465078512cacbefd8c77f94b76 /drivers/ata/sata_sx4.c | |
parent | a2ab67fae1ab9226679495a8d260f4e6555efc5f (diff) | |
parent | 11c79740d3c03cb81f84e98cf2e2dbd8d9bb53cd (diff) |
Merge branch 'ixp4xx' of git://git.kernel.org/pub/scm/linux/kernel/git/chris/linux-2.6 into devel
Diffstat (limited to 'drivers/ata/sata_sx4.c')
-rw-r--r-- | drivers/ata/sata_sx4.c | 180 |
1 files changed, 126 insertions, 54 deletions
diff --git a/drivers/ata/sata_sx4.c b/drivers/ata/sata_sx4.c index dce3dccced3..eb05a3c82a9 100644 --- a/drivers/ata/sata_sx4.c +++ b/drivers/ata/sata_sx4.c | |||
@@ -213,8 +213,9 @@ struct pdc_host_priv { | |||
213 | 213 | ||
214 | 214 | ||
215 | static int pdc_sata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); | 215 | static int pdc_sata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
216 | static void pdc_eng_timeout(struct ata_port *ap); | 216 | static void pdc_error_handler(struct ata_port *ap); |
217 | static void pdc_20621_phy_reset(struct ata_port *ap); | 217 | static void pdc_freeze(struct ata_port *ap); |
218 | static void pdc_thaw(struct ata_port *ap); | ||
218 | static int pdc_port_start(struct ata_port *ap); | 219 | static int pdc_port_start(struct ata_port *ap); |
219 | static void pdc20621_qc_prep(struct ata_queued_cmd *qc); | 220 | static void pdc20621_qc_prep(struct ata_queued_cmd *qc); |
220 | static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf); | 221 | static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf); |
@@ -233,6 +234,10 @@ static void pdc20621_put_to_dimm(struct ata_host *host, | |||
233 | void *psource, u32 offset, u32 size); | 234 | void *psource, u32 offset, u32 size); |
234 | static void pdc20621_irq_clear(struct ata_port *ap); | 235 | static void pdc20621_irq_clear(struct ata_port *ap); |
235 | static unsigned int pdc20621_qc_issue(struct ata_queued_cmd *qc); | 236 | static unsigned int pdc20621_qc_issue(struct ata_queued_cmd *qc); |
237 | static int pdc_softreset(struct ata_link *link, unsigned int *class, | ||
238 | unsigned long deadline); | ||
239 | static void pdc_post_internal_cmd(struct ata_queued_cmd *qc); | ||
240 | static int pdc_check_atapi_dma(struct ata_queued_cmd *qc); | ||
236 | 241 | ||
237 | 242 | ||
238 | static struct scsi_host_template pdc_sata_sht = { | 243 | static struct scsi_host_template pdc_sata_sht = { |
@@ -243,20 +248,24 @@ static struct scsi_host_template pdc_sata_sht = { | |||
243 | 248 | ||
244 | /* TODO: inherit from base port_ops after converting to new EH */ | 249 | /* TODO: inherit from base port_ops after converting to new EH */ |
245 | static struct ata_port_operations pdc_20621_ops = { | 250 | static struct ata_port_operations pdc_20621_ops = { |
246 | .sff_tf_load = pdc_tf_load_mmio, | 251 | .inherits = &ata_sff_port_ops, |
247 | .sff_tf_read = ata_sff_tf_read, | 252 | |
248 | .sff_check_status = ata_sff_check_status, | 253 | .check_atapi_dma = pdc_check_atapi_dma, |
249 | .sff_exec_command = pdc_exec_command_mmio, | ||
250 | .sff_dev_select = ata_sff_dev_select, | ||
251 | .phy_reset = pdc_20621_phy_reset, | ||
252 | .qc_prep = pdc20621_qc_prep, | 254 | .qc_prep = pdc20621_qc_prep, |
253 | .qc_issue = pdc20621_qc_issue, | 255 | .qc_issue = pdc20621_qc_issue, |
254 | .qc_fill_rtf = ata_sff_qc_fill_rtf, | 256 | |
255 | .sff_data_xfer = ata_sff_data_xfer, | 257 | .freeze = pdc_freeze, |
256 | .eng_timeout = pdc_eng_timeout, | 258 | .thaw = pdc_thaw, |
257 | .sff_irq_clear = pdc20621_irq_clear, | 259 | .softreset = pdc_softreset, |
258 | .sff_irq_on = ata_sff_irq_on, | 260 | .error_handler = pdc_error_handler, |
261 | .lost_interrupt = ATA_OP_NULL, | ||
262 | .post_internal_cmd = pdc_post_internal_cmd, | ||
263 | |||
259 | .port_start = pdc_port_start, | 264 | .port_start = pdc_port_start, |
265 | |||
266 | .sff_tf_load = pdc_tf_load_mmio, | ||
267 | .sff_exec_command = pdc_exec_command_mmio, | ||
268 | .sff_irq_clear = pdc20621_irq_clear, | ||
260 | }; | 269 | }; |
261 | 270 | ||
262 | static const struct ata_port_info pdc_port_info[] = { | 271 | static const struct ata_port_info pdc_port_info[] = { |
@@ -310,14 +319,6 @@ static int pdc_port_start(struct ata_port *ap) | |||
310 | return 0; | 319 | return 0; |
311 | } | 320 | } |
312 | 321 | ||
313 | static void pdc_20621_phy_reset(struct ata_port *ap) | ||
314 | { | ||
315 | VPRINTK("ENTER\n"); | ||
316 | ap->cbl = ATA_CBL_SATA; | ||
317 | ata_port_probe(ap); | ||
318 | ata_bus_reset(ap); | ||
319 | } | ||
320 | |||
321 | static inline void pdc20621_ata_sg(struct ata_taskfile *tf, u8 *buf, | 322 | static inline void pdc20621_ata_sg(struct ata_taskfile *tf, u8 *buf, |
322 | unsigned int portno, | 323 | unsigned int portno, |
323 | unsigned int total_len) | 324 | unsigned int total_len) |
@@ -686,8 +687,11 @@ static void pdc20621_packet_start(struct ata_queued_cmd *qc) | |||
686 | static unsigned int pdc20621_qc_issue(struct ata_queued_cmd *qc) | 687 | static unsigned int pdc20621_qc_issue(struct ata_queued_cmd *qc) |
687 | { | 688 | { |
688 | switch (qc->tf.protocol) { | 689 | switch (qc->tf.protocol) { |
689 | case ATA_PROT_DMA: | ||
690 | case ATA_PROT_NODATA: | 690 | case ATA_PROT_NODATA: |
691 | if (qc->tf.flags & ATA_TFLAG_POLLING) | ||
692 | break; | ||
693 | /*FALLTHROUGH*/ | ||
694 | case ATA_PROT_DMA: | ||
691 | pdc20621_packet_start(qc); | 695 | pdc20621_packet_start(qc); |
692 | return 0; | 696 | return 0; |
693 | 697 | ||
@@ -786,12 +790,7 @@ static inline unsigned int pdc20621_host_intr(struct ata_port *ap, | |||
786 | 790 | ||
787 | static void pdc20621_irq_clear(struct ata_port *ap) | 791 | static void pdc20621_irq_clear(struct ata_port *ap) |
788 | { | 792 | { |
789 | struct ata_host *host = ap->host; | 793 | ioread8(ap->ioaddr.status_addr); |
790 | void __iomem *mmio = host->iomap[PDC_MMIO_BAR]; | ||
791 | |||
792 | mmio += PDC_CHIP0_OFS; | ||
793 | |||
794 | readl(mmio + PDC_20621_SEQMASK); | ||
795 | } | 794 | } |
796 | 795 | ||
797 | static irqreturn_t pdc20621_interrupt(int irq, void *dev_instance) | 796 | static irqreturn_t pdc20621_interrupt(int irq, void *dev_instance) |
@@ -859,46 +858,119 @@ static irqreturn_t pdc20621_interrupt(int irq, void *dev_instance) | |||
859 | return IRQ_RETVAL(handled); | 858 | return IRQ_RETVAL(handled); |
860 | } | 859 | } |
861 | 860 | ||
862 | static void pdc_eng_timeout(struct ata_port *ap) | 861 | static void pdc_freeze(struct ata_port *ap) |
863 | { | 862 | { |
864 | u8 drv_stat; | 863 | void __iomem *mmio = ap->ioaddr.cmd_addr; |
865 | struct ata_host *host = ap->host; | 864 | u32 tmp; |
866 | struct ata_queued_cmd *qc; | ||
867 | unsigned long flags; | ||
868 | 865 | ||
869 | DPRINTK("ENTER\n"); | 866 | /* FIXME: if all 4 ATA engines are stopped, also stop HDMA engine */ |
870 | 867 | ||
871 | spin_lock_irqsave(&host->lock, flags); | 868 | tmp = readl(mmio + PDC_CTLSTAT); |
869 | tmp |= PDC_MASK_INT; | ||
870 | tmp &= ~PDC_DMA_ENABLE; | ||
871 | writel(tmp, mmio + PDC_CTLSTAT); | ||
872 | readl(mmio + PDC_CTLSTAT); /* flush */ | ||
873 | } | ||
872 | 874 | ||
873 | qc = ata_qc_from_tag(ap, ap->link.active_tag); | 875 | static void pdc_thaw(struct ata_port *ap) |
876 | { | ||
877 | void __iomem *mmio = ap->ioaddr.cmd_addr; | ||
878 | u32 tmp; | ||
874 | 879 | ||
875 | switch (qc->tf.protocol) { | 880 | /* FIXME: start HDMA engine, if zero ATA engines running */ |
876 | case ATA_PROT_DMA: | ||
877 | case ATA_PROT_NODATA: | ||
878 | ata_port_printk(ap, KERN_ERR, "command timeout\n"); | ||
879 | qc->err_mask |= __ac_err_mask(ata_wait_idle(ap)); | ||
880 | break; | ||
881 | 881 | ||
882 | default: | 882 | /* clear IRQ */ |
883 | drv_stat = ata_sff_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000); | 883 | ioread8(ap->ioaddr.status_addr); |
884 | 884 | ||
885 | ata_port_printk(ap, KERN_ERR, | 885 | /* turn IRQ back on */ |
886 | "unknown timeout, cmd 0x%x stat 0x%x\n", | 886 | tmp = readl(mmio + PDC_CTLSTAT); |
887 | qc->tf.command, drv_stat); | 887 | tmp &= ~PDC_MASK_INT; |
888 | writel(tmp, mmio + PDC_CTLSTAT); | ||
889 | readl(mmio + PDC_CTLSTAT); /* flush */ | ||
890 | } | ||
888 | 891 | ||
889 | qc->err_mask |= ac_err_mask(drv_stat); | 892 | static void pdc_reset_port(struct ata_port *ap) |
890 | break; | 893 | { |
894 | void __iomem *mmio = ap->ioaddr.cmd_addr + PDC_CTLSTAT; | ||
895 | unsigned int i; | ||
896 | u32 tmp; | ||
897 | |||
898 | /* FIXME: handle HDMA copy engine */ | ||
899 | |||
900 | for (i = 11; i > 0; i--) { | ||
901 | tmp = readl(mmio); | ||
902 | if (tmp & PDC_RESET) | ||
903 | break; | ||
904 | |||
905 | udelay(100); | ||
906 | |||
907 | tmp |= PDC_RESET; | ||
908 | writel(tmp, mmio); | ||
891 | } | 909 | } |
892 | 910 | ||
893 | spin_unlock_irqrestore(&host->lock, flags); | 911 | tmp &= ~PDC_RESET; |
894 | ata_eh_qc_complete(qc); | 912 | writel(tmp, mmio); |
895 | DPRINTK("EXIT\n"); | 913 | readl(mmio); /* flush */ |
914 | } | ||
915 | |||
916 | static int pdc_softreset(struct ata_link *link, unsigned int *class, | ||
917 | unsigned long deadline) | ||
918 | { | ||
919 | pdc_reset_port(link->ap); | ||
920 | return ata_sff_softreset(link, class, deadline); | ||
921 | } | ||
922 | |||
923 | static void pdc_error_handler(struct ata_port *ap) | ||
924 | { | ||
925 | if (!(ap->pflags & ATA_PFLAG_FROZEN)) | ||
926 | pdc_reset_port(ap); | ||
927 | |||
928 | ata_std_error_handler(ap); | ||
929 | } | ||
930 | |||
931 | static void pdc_post_internal_cmd(struct ata_queued_cmd *qc) | ||
932 | { | ||
933 | struct ata_port *ap = qc->ap; | ||
934 | |||
935 | /* make DMA engine forget about the failed command */ | ||
936 | if (qc->flags & ATA_QCFLAG_FAILED) | ||
937 | pdc_reset_port(ap); | ||
938 | } | ||
939 | |||
940 | static int pdc_check_atapi_dma(struct ata_queued_cmd *qc) | ||
941 | { | ||
942 | u8 *scsicmd = qc->scsicmd->cmnd; | ||
943 | int pio = 1; /* atapi dma off by default */ | ||
944 | |||
945 | /* Whitelist commands that may use DMA. */ | ||
946 | switch (scsicmd[0]) { | ||
947 | case WRITE_12: | ||
948 | case WRITE_10: | ||
949 | case WRITE_6: | ||
950 | case READ_12: | ||
951 | case READ_10: | ||
952 | case READ_6: | ||
953 | case 0xad: /* READ_DVD_STRUCTURE */ | ||
954 | case 0xbe: /* READ_CD */ | ||
955 | pio = 0; | ||
956 | } | ||
957 | /* -45150 (FFFF4FA2) to -1 (FFFFFFFF) shall use PIO mode */ | ||
958 | if (scsicmd[0] == WRITE_10) { | ||
959 | unsigned int lba = | ||
960 | (scsicmd[2] << 24) | | ||
961 | (scsicmd[3] << 16) | | ||
962 | (scsicmd[4] << 8) | | ||
963 | scsicmd[5]; | ||
964 | if (lba >= 0xFFFF4FA2) | ||
965 | pio = 1; | ||
966 | } | ||
967 | return pio; | ||
896 | } | 968 | } |
897 | 969 | ||
898 | static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf) | 970 | static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf) |
899 | { | 971 | { |
900 | WARN_ON(tf->protocol == ATA_PROT_DMA || | 972 | WARN_ON(tf->protocol == ATA_PROT_DMA || |
901 | tf->protocol == ATA_PROT_NODATA); | 973 | tf->protocol == ATAPI_PROT_DMA); |
902 | ata_sff_tf_load(ap, tf); | 974 | ata_sff_tf_load(ap, tf); |
903 | } | 975 | } |
904 | 976 | ||
@@ -906,7 +978,7 @@ static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf) | |||
906 | static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf) | 978 | static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf) |
907 | { | 979 | { |
908 | WARN_ON(tf->protocol == ATA_PROT_DMA || | 980 | WARN_ON(tf->protocol == ATA_PROT_DMA || |
909 | tf->protocol == ATA_PROT_NODATA); | 981 | tf->protocol == ATAPI_PROT_DMA); |
910 | ata_sff_exec_command(ap, tf); | 982 | ata_sff_exec_command(ap, tf); |
911 | } | 983 | } |
912 | 984 | ||