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authorCyrill Gorcunov <gorcunov@openvz.org>2010-03-15 00:58:22 -0400
committerIngo Molnar <mingo@elte.hu>2010-03-15 03:14:34 -0400
commite4495262826d1eabca3529fa6ac22394eb348132 (patch)
tree61ed42e15b785c20e0a1b3a9518d4699ce240199 /arch
parent8576e1971663ffdb6139041de97cdd2e1d4791cc (diff)
perf, x86: Enable not tagged retired instruction counting on P4s
This should turn on instruction counting on P4s, which was missing in the first version of the new PMU driver. It's inaccurate for now, we still need dependant event to tag mops before we can count them precisely. The result is that the number of instruction may be lifted up. Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Cc: Peter Zijlstra <peterz@infradead.org> LKML-Reference: <1268629102.3355.11.camel@minggr.sh.intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/include/asm/perf_event_p4.h8
-rw-r--r--arch/x86/kernel/cpu/perf_event_p4.c8
2 files changed, 7 insertions, 9 deletions
diff --git a/arch/x86/include/asm/perf_event_p4.h b/arch/x86/include/asm/perf_event_p4.h
index 829f4711645..b47b9e9ac13 100644
--- a/arch/x86/include/asm/perf_event_p4.h
+++ b/arch/x86/include/asm/perf_event_p4.h
@@ -324,8 +324,8 @@ static inline u32 p4_default_escr_conf(int cpu, int exclude_os, int exclude_usr)
324 324
325#define P4_SSE_INPUT_ASSIST P4_EVENT_PACK(0x34, 0x01) 325#define P4_SSE_INPUT_ASSIST P4_EVENT_PACK(0x34, 0x01)
326 /* 326 /*
327 * MSR_P4_FIRM_ESCR: 8, 9 327 * MSR_P4_FIRM_ESCR0: 8, 9
328 * MSR_P4_FIRM_ESCR: 10, 11 328 * MSR_P4_FIRM_ESCR1: 10, 11
329 */ 329 */
330 330
331#define P4_PACKED_SP_UOP P4_EVENT_PACK(0x08, 0x01) 331#define P4_PACKED_SP_UOP P4_EVENT_PACK(0x08, 0x01)
@@ -462,8 +462,8 @@ static inline u32 p4_default_escr_conf(int cpu, int exclude_os, int exclude_usr)
462 462
463#define P4_INSTR_RETIRED P4_EVENT_PACK(0x02, 0x04) 463#define P4_INSTR_RETIRED P4_EVENT_PACK(0x02, 0x04)
464 /* 464 /*
465 * MSR_P4_CRU_ESCR2: 12, 13, 16 465 * MSR_P4_CRU_ESCR0: 12, 13, 16
466 * MSR_P4_CRU_ESCR3: 14, 15, 17 466 * MSR_P4_CRU_ESCR1: 14, 15, 17
467 */ 467 */
468 468
469#define P4_UOPS_RETIRED P4_EVENT_PACK(0x01, 0x04) 469#define P4_UOPS_RETIRED P4_EVENT_PACK(0x01, 0x04)
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index ef861da1c8a..a11ce73a93c 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -60,13 +60,11 @@ struct p4_event_template p4_templates[] = {
60 [2] = { 60 [2] = {
61 .opcode = P4_INSTR_RETIRED, 61 .opcode = P4_INSTR_RETIRED,
62 .config = 0, 62 .config = 0,
63 .dep = 0, /* needs front-end tagging */ 63 .dep = -1, /* needs front-end tagging */
64 .emask = 64 .emask =
65 P4_EVENT_ATTR(P4_INSTR_RETIRED, NBOGUSNTAG) | 65 P4_EVENT_ATTR(P4_INSTR_RETIRED, NBOGUSNTAG) |
66 P4_EVENT_ATTR(P4_INSTR_RETIRED, NBOGUSTAG) | 66 P4_EVENT_ATTR(P4_INSTR_RETIRED, BOGUSNTAG),
67 P4_EVENT_ATTR(P4_INSTR_RETIRED, BOGUSNTAG) | 67 .escr_msr = { MSR_P4_CRU_ESCR0, MSR_P4_CRU_ESCR1 },
68 P4_EVENT_ATTR(P4_INSTR_RETIRED, BOGUSTAG),
69 .escr_msr = { MSR_P4_CRU_ESCR2, MSR_P4_CRU_ESCR3 },
70 .cntr = { 12, 14 }, 68 .cntr = { 12, 14 },
71 }, 69 },
72 [3] = { 70 [3] = {