Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6

1963 files changed, 78013 insertions, 22120 deletions

diff --git a/arch/Kconfig b/arch/Kconfig
index 215e46073c4..e5eb1337a53 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -41,6 +41,17 @@ config KPROBES
           for kernel debugging, non-intrusive instrumentation and testing.
           If in doubt, say "N".
 
+config OPTPROBES
+        bool "Kprobes jump optimization support (EXPERIMENTAL)"
+        default y
+        depends on KPROBES
+        depends on !PREEMPT
+        depends on HAVE_OPTPROBES
+        select KALLSYMS_ALL
+        help
+          This option will allow kprobes to optimize breakpoint to
+          a jump for reducing its overhead.
+
 config HAVE_EFFICIENT_UNALIGNED_ACCESS
         bool
         help
@@ -83,6 +94,8 @@ config HAVE_KPROBES
 config HAVE_KRETPROBES
         bool
 
+config HAVE_OPTPROBES
+        bool
 #
 # An arch should select this if it provides all these things:
 #
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index bd7261ea8f9..75291fdd379 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -10,6 +10,7 @@ config ALPHA
         select HAVE_OPROFILE
         select HAVE_SYSCALL_WRAPPERS
         select HAVE_PERF_EVENTS
+        select HAVE_DMA_ATTRS
         help
           The Alpha is a 64-bit general-purpose processor designed and
           marketed by the Digital Equipment Corporation of blessed memory,
@@ -58,6 +59,9 @@ config ZONE_DMA
         bool
         default y
 
+config NEED_DMA_MAP_STATE
+       def_bool y
+
 config GENERIC_ISA_DMA
         bool
         default y
diff --git a/arch/alpha/boot/bootp.c b/arch/alpha/boot/bootp.c
index 3c8d1b25c66..be61670d409 100644
--- a/arch/alpha/boot/bootp.c
+++ b/arch/alpha/boot/bootp.c
@@ -8,6 +8,7 @@
  * based significantly on the arch/alpha/boot/main.c of Linus Torvalds
  */
 #include <linux/kernel.h>
+#include <linux/slab.h>
 #include <linux/string.h>
 #include <generated/utsrelease.h>
 #include <linux/mm.h>
diff --git a/arch/alpha/boot/bootpz.c b/arch/alpha/boot/bootpz.c
index ade3f129dc2..c98865f2142 100644
--- a/arch/alpha/boot/bootpz.c
+++ b/arch/alpha/boot/bootpz.c
@@ -10,6 +10,7 @@
  * and the decompression code from MILO.
  */
 #include <linux/kernel.h>
+#include <linux/slab.h>
 #include <linux/string.h>
 #include <generated/utsrelease.h>
 #include <linux/mm.h>
diff --git a/arch/alpha/boot/main.c b/arch/alpha/boot/main.c
index 644b7db5543..ded57d9a80e 100644
--- a/arch/alpha/boot/main.c
+++ b/arch/alpha/boot/main.c
@@ -6,6 +6,7 @@
  * This file is the bootloader for the Linux/AXP kernel
  */
 #include <linux/kernel.h>
+#include <linux/slab.h>
 #include <linux/string.h>
 #include <generated/utsrelease.h>
 #include <linux/mm.h>
diff --git a/arch/alpha/boot/misc.c b/arch/alpha/boot/misc.c
index 3047a1b3a51..3ff9a957a25 100644
--- a/arch/alpha/boot/misc.c
+++ b/arch/alpha/boot/misc.c
@@ -19,6 +19,7 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/slab.h>
 
 #include <asm/uaccess.h>
 
diff --git a/arch/alpha/include/asm/core_marvel.h b/arch/alpha/include/asm/core_marvel.h
index 30d55fe7aaf..dad300fa14c 100644
--- a/arch/alpha/include/asm/core_marvel.h
+++ b/arch/alpha/include/asm/core_marvel.h
@@ -12,7 +12,6 @@
 #define __ALPHA_MARVEL__H__
 
 #include <linux/types.h>
-#include <linux/pci.h>
 #include <linux/spinlock.h>
 
 #include <asm/compiler.h>
diff --git a/arch/alpha/include/asm/core_mcpcia.h b/arch/alpha/include/asm/core_mcpcia.h
index acf55b48347..21ac53383b3 100644
--- a/arch/alpha/include/asm/core_mcpcia.h
+++ b/arch/alpha/include/asm/core_mcpcia.h
@@ -6,7 +6,6 @@
 #define MCPCIA_ONE_HAE_WINDOW 1
 
 #include <linux/types.h>
-#include <linux/pci.h>
 #include <asm/compiler.h>
 
 /*
diff --git a/arch/alpha/include/asm/core_titan.h b/arch/alpha/include/asm/core_titan.h
index a17f6f33b68..8cf79d1219e 100644
--- a/arch/alpha/include/asm/core_titan.h
+++ b/arch/alpha/include/asm/core_titan.h
@@ -2,7 +2,6 @@
 #define __ALPHA_TITAN__H__
 
 #include <linux/types.h>
-#include <linux/pci.h>
 #include <asm/compiler.h>
 
 /*
diff --git a/arch/alpha/include/asm/core_tsunami.h b/arch/alpha/include/asm/core_tsunami.h
index 58d4fe48742..8e39ecf0941 100644
--- a/arch/alpha/include/asm/core_tsunami.h
+++ b/arch/alpha/include/asm/core_tsunami.h
@@ -2,7 +2,6 @@
 #define __ALPHA_TSUNAMI__H__
 
 #include <linux/types.h>
-#include <linux/pci.h>
 #include <asm/compiler.h>
 
 /*
diff --git a/arch/alpha/include/asm/dma-mapping.h b/arch/alpha/include/asm/dma-mapping.h
index 04eb5681448..1bce8169733 100644
--- a/arch/alpha/include/asm/dma-mapping.h
+++ b/arch/alpha/include/asm/dma-mapping.h
@@ -1,71 +1,49 @@
 #ifndef _ALPHA_DMA_MAPPING_H
 #define _ALPHA_DMA_MAPPING_H
 
+#include <linux/dma-attrs.h>
 
-#ifdef CONFIG_PCI
+extern struct dma_map_ops *dma_ops;
 
-#include <linux/pci.h>
+static inline struct dma_map_ops *get_dma_ops(struct device *dev)
+{
+        return dma_ops;
+}
 
-#define dma_map_single(dev, va, size, dir)              \
-                pci_map_single(alpha_gendev_to_pci(dev), va, size, dir)
-#define dma_unmap_single(dev, addr, size, dir)          \
-                pci_unmap_single(alpha_gendev_to_pci(dev), addr, size, dir)
-#define dma_alloc_coherent(dev, size, addr, gfp)        \
-              __pci_alloc_consistent(alpha_gendev_to_pci(dev), size, addr, gfp)
-#define dma_free_coherent(dev, size, va, addr)          \
-                pci_free_consistent(alpha_gendev_to_pci(dev), size, va, addr)
-#define dma_map_page(dev, page, off, size, dir)         \
-                pci_map_page(alpha_gendev_to_pci(dev), page, off, size, dir)
-#define dma_unmap_page(dev, addr, size, dir)            \
-                pci_unmap_page(alpha_gendev_to_pci(dev), addr, size, dir)
-#define dma_map_sg(dev, sg, nents, dir)                 \
-                pci_map_sg(alpha_gendev_to_pci(dev), sg, nents, dir)
-#define dma_unmap_sg(dev, sg, nents, dir)               \
-                pci_unmap_sg(alpha_gendev_to_pci(dev), sg, nents, dir)
-#define dma_supported(dev, mask)                        \
-                pci_dma_supported(alpha_gendev_to_pci(dev), mask)
-#define dma_mapping_error(dev, addr)                            \
-                pci_dma_mapping_error(alpha_gendev_to_pci(dev), addr)
+#include <asm-generic/dma-mapping-common.h>
 
-#else   /* no PCI - no IOMMU. */
+static inline void *dma_alloc_coherent(struct device *dev, size_t size,
+                                       dma_addr_t *dma_handle, gfp_t gfp)
+{
+        return get_dma_ops(dev)->alloc_coherent(dev, size, dma_handle, gfp);
+}
 
-#include <asm/io.h>     /* for virt_to_phys() */
+static inline void dma_free_coherent(struct device *dev, size_t size,
+                                     void *vaddr, dma_addr_t dma_handle)
+{
+        get_dma_ops(dev)->free_coherent(dev, size, vaddr, dma_handle);
+}
 
-struct scatterlist;
-void *dma_alloc_coherent(struct device *dev, size_t size,
-                         dma_addr_t *dma_handle, gfp_t gfp);
-int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
-               enum dma_data_direction direction);
+static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
+{
+        return get_dma_ops(dev)->mapping_error(dev, dma_addr);
+}
 
-#define dma_free_coherent(dev, size, va, addr)          \
-                free_pages((unsigned long)va, get_order(size))
-#define dma_supported(dev, mask)                (mask < 0x00ffffffUL ? 0 : 1)
-#define dma_map_single(dev, va, size, dir)      virt_to_phys(va)
-#define dma_map_page(dev, page, off, size, dir) (page_to_pa(page) + off)
+static inline int dma_supported(struct device *dev, u64 mask)
+{
+        return get_dma_ops(dev)->dma_supported(dev, mask);
+}
 
-#define dma_unmap_single(dev, addr, size, dir)  ((void)0)
-#define dma_unmap_page(dev, addr, size, dir)    ((void)0)
-#define dma_unmap_sg(dev, sg, nents, dir)       ((void)0)
-
-#define dma_mapping_error(dev, addr)  (0)
-
-#endif  /* !CONFIG_PCI */
+static inline int dma_set_mask(struct device *dev, u64 mask)
+{
+        return get_dma_ops(dev)->set_dma_mask(dev, mask);
+}
 
 #define dma_alloc_noncoherent(d, s, h, f)       dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h)        dma_free_coherent(d, s, v, h)
 #define dma_is_consistent(d, h)                 (1)
 
-int dma_set_mask(struct device *dev, u64 mask);
-
-#define dma_sync_single_for_cpu(dev, addr, size, dir)     ((void)0)
-#define dma_sync_single_for_device(dev, addr, size, dir)  ((void)0)
-#define dma_sync_single_range(dev, addr, off, size, dir)  ((void)0)
-#define dma_sync_sg_for_cpu(dev, sg, nents, dir)          ((void)0)
-#define dma_sync_sg_for_device(dev, sg, nents, dir)       ((void)0)
 #define dma_cache_sync(dev, va, size, dir)                ((void)0)
-#define dma_sync_single_range_for_cpu(dev, addr, offset, size, dir)     ((void)0)
-#define dma_sync_single_range_for_device(dev, addr, offset, size, dir)  ((void)0)
-
 #define dma_get_cache_alignment()                         L1_CACHE_BYTES
 
 #endif  /* _ALPHA_DMA_MAPPING_H */
diff --git a/arch/alpha/include/asm/pci.h b/arch/alpha/include/asm/pci.h
index dd8dcabf160..28d0497fd3c 100644
--- a/arch/alpha/include/asm/pci.h
+++ b/arch/alpha/include/asm/pci.h
@@ -70,142 +70,11 @@ extern inline void pcibios_penalize_isa_irq(int irq, int active)
    decisions.  */
 #define PCI_DMA_BUS_IS_PHYS  0
 
-/* Allocate and map kernel buffer using consistent mode DMA for PCI
-   device.  Returns non-NULL cpu-view pointer to the buffer if
-   successful and sets *DMA_ADDRP to the pci side dma address as well,
-   else DMA_ADDRP is undefined.  */
-
-extern void *__pci_alloc_consistent(struct pci_dev *, size_t,
-                                    dma_addr_t *, gfp_t);
-static inline void *
-pci_alloc_consistent(struct pci_dev *dev, size_t size, dma_addr_t *dma)
-{
-        return __pci_alloc_consistent(dev, size, dma, GFP_ATOMIC);
-}
-
-/* Free and unmap a consistent DMA buffer.  CPU_ADDR and DMA_ADDR must
-   be values that were returned from pci_alloc_consistent.  SIZE must
-   be the same as what as passed into pci_alloc_consistent.
-   References to the memory and mappings associated with CPU_ADDR or
-   DMA_ADDR past this call are illegal.  */
-
-extern void pci_free_consistent(struct pci_dev *, size_t, void *, dma_addr_t);
-
-/* Map a single buffer of the indicate size for PCI DMA in streaming mode.
-   The 32-bit PCI bus mastering address to use is returned.  Once the device
-   is given the dma address, the device owns this memory until either
-   pci_unmap_single or pci_dma_sync_single_for_cpu is performed.  */
-
-extern dma_addr_t pci_map_single(struct pci_dev *, void *, size_t, int);
-
-/* Likewise, but for a page instead of an address.  */
-extern dma_addr_t pci_map_page(struct pci_dev *, struct page *,
-                               unsigned long, size_t, int);
-
-/* Test for pci_map_single or pci_map_page having generated an error.  */
-
-static inline int
-pci_dma_mapping_error(struct pci_dev *pdev, dma_addr_t dma_addr)
-{
-        return dma_addr == 0;
-}
-
-/* Unmap a single streaming mode DMA translation.  The DMA_ADDR and
-   SIZE must match what was provided for in a previous pci_map_single
-   call.  All other usages are undefined.  After this call, reads by
-   the cpu to the buffer are guaranteed to see whatever the device
-   wrote there.  */
-
-extern void pci_unmap_single(struct pci_dev *, dma_addr_t, size_t, int);
-extern void pci_unmap_page(struct pci_dev *, dma_addr_t, size_t, int);
-
-/* pci_unmap_{single,page} is not a nop, thus... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       \
-        dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         \
-        __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME)                  \
-        ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)         \
-        (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME)                    \
-        ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)           \
-        (((PTR)->LEN_NAME) = (VAL))
-
-/* Map a set of buffers described by scatterlist in streaming mode for
-   PCI DMA.  This is the scatter-gather version of the above
-   pci_map_single interface.  Here the scatter gather list elements
-   are each tagged with the appropriate PCI dma address and length.
-   They are obtained via sg_dma_{address,length}(SG).
-
-   NOTE: An implementation may be able to use a smaller number of DMA
-   address/length pairs than there are SG table elements.  (for
-   example via virtual mapping capabilities) The routine returns the
-   number of addr/length pairs actually used, at most nents.
-
-   Device ownership issues as mentioned above for pci_map_single are
-   the same here.  */
-
-extern int pci_map_sg(struct pci_dev *, struct scatterlist *, int, int);
-
-/* Unmap a set of streaming mode DMA translations.  Again, cpu read
-   rules concerning calls here are the same as for pci_unmap_single()
-   above.  */
-
-extern void pci_unmap_sg(struct pci_dev *, struct scatterlist *, int, int);
-
-/* Make physical memory consistent for a single streaming mode DMA
-   translation after a transfer and device currently has ownership
-   of the buffer.
-
-   If you perform a pci_map_single() but wish to interrogate the
-   buffer using the cpu, yet do not wish to teardown the PCI dma
-   mapping, you must call this function before doing so.  At the next
-   point you give the PCI dma address back to the card, you must first
-   perform a pci_dma_sync_for_device, and then the device again owns
-   the buffer.  */
-
-static inline void
-pci_dma_sync_single_for_cpu(struct pci_dev *dev, dma_addr_t dma_addr,
-                            long size, int direction)
-{
-        /* Nothing to do.  */
-}
-
-static inline void
-pci_dma_sync_single_for_device(struct pci_dev *dev, dma_addr_t dma_addr,
-                               size_t size, int direction)
-{
-        /* Nothing to do.  */
-}
-
-/* Make physical memory consistent for a set of streaming mode DMA
-   translations after a transfer.  The same as pci_dma_sync_single_*
-   but for a scatter-gather list, same rules and usage.  */
-
-static inline void
-pci_dma_sync_sg_for_cpu(struct pci_dev *dev, struct scatterlist *sg,
-                        int nents, int direction)
-{
-        /* Nothing to do.  */
-}
-
-static inline void
-pci_dma_sync_sg_for_device(struct pci_dev *dev, struct scatterlist *sg,
-                           int nents, int direction)
-{
-        /* Nothing to do.  */
-}
-
-/* Return whether the given PCI device DMA address mask can
-   be supported properly.  For example, if your device can
-   only drive the low 24-bits during PCI bus mastering, then
-   you would pass 0x00ffffff as the mask to this function.  */
+#ifdef CONFIG_PCI
 
-extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask);
+/* implement the pci_ DMA API in terms of the generic device dma_ one */
+#include <asm-generic/pci-dma-compat.h>
 
-#ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                         enum pci_dma_burst_strategy *strat,
                                         unsigned long *strategy_parameter)
@@ -244,8 +113,6 @@ static inline int pci_proc_domain(struct pci_bus *bus)
         return hose->need_domain_info;
 }
 
-struct pci_dev *alpha_gendev_to_pci(struct device *dev);
-
 #endif /* __KERNEL__ */
 
 /* Values for the `which' argument to sys_pciconfig_iobase.  */
diff --git a/arch/alpha/include/asm/ptrace.h b/arch/alpha/include/asm/ptrace.h
index 32c7a5cddd5..65cf3e28e2f 100644
--- a/arch/alpha/include/asm/ptrace.h
+++ b/arch/alpha/include/asm/ptrace.h
@@ -68,6 +68,7 @@ struct switch_stack {
 
 #ifdef __KERNEL__
 
+#define arch_has_single_step()          (1)
 #define user_mode(regs) (((regs)->ps & 8) != 0)
 #define instruction_pointer(regs) ((regs)->pc)
 #define profile_pc(regs) instruction_pointer(regs)
diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c
index 5f2cf23c464..7f912ba3d9a 100644
--- a/arch/alpha/kernel/irq.c
+++ b/arch/alpha/kernel/irq.c
@@ -18,7 +18,6 @@
 #include <linux/sched.h>
 #include <linux/ptrace.h>
 #include <linux/interrupt.h>
-#include <linux/slab.h>
 #include <linux/random.h>
 #include <linux/init.h>
 #include <linux/irq.h>
diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c
index 62619f25132..de9d3971780 100644
--- a/arch/alpha/kernel/osf_sys.c
+++ b/arch/alpha/kernel/osf_sys.c
@@ -20,7 +20,6 @@
 #include <linux/syscalls.h>
 #include <linux/unistd.h>
 #include <linux/ptrace.h>
-#include <linux/slab.h>
 #include <linux/user.h>
 #include <linux/utsname.h>
 #include <linux/time.h>
@@ -37,6 +36,7 @@
 #include <linux/uio.h>
 #include <linux/vfs.h>
 #include <linux/rcupdate.h>
+#include <linux/slab.h>
 
 #include <asm/fpu.h>
 #include <asm/io.h>
@@ -361,7 +361,7 @@ osf_procfs_mount(char *dirname, struct procfs_args __user *args, int flags)
 SYSCALL_DEFINE4(osf_mount, unsigned long, typenr, char __user *, path,
                 int, flag, void __user *, data)
 {
-        int retval = -EINVAL;
+        int retval;
         char *name;
 
         name = getname(path);
@@ -379,6 +379,7 @@ SYSCALL_DEFINE4(osf_mount, unsigned long, typenr, char __user *, path,
                 retval = osf_procfs_mount(name, data, flag);
                 break;
         default:
+                retval = -EINVAL;
                 printk("osf_mount(%ld, %x)\n", typenr, flag);
         }
         putname(name);
diff --git a/arch/alpha/kernel/pci-noop.c b/arch/alpha/kernel/pci-noop.c
index c19a376520f..246100ef07c 100644
--- a/arch/alpha/kernel/pci-noop.c
+++ b/arch/alpha/kernel/pci-noop.c
@@ -7,6 +7,7 @@
 #include <linux/pci.h>
 #include <linux/init.h>
 #include <linux/bootmem.h>
+#include <linux/gfp.h>
 #include <linux/capability.h>
 #include <linux/mm.h>
 #include <linux/errno.h>
@@ -106,58 +107,8 @@ sys_pciconfig_write(unsigned long bus, unsigned long dfn,
                 return -ENODEV;
 }
 
-/* Stubs for the routines in pci_iommu.c: */
-
-void *
-__pci_alloc_consistent(struct pci_dev *pdev, size_t size,
-                       dma_addr_t *dma_addrp, gfp_t gfp)
-{
-        return NULL;
-}
-
-void
-pci_free_consistent(struct pci_dev *pdev, size_t size, void *cpu_addr,
-                    dma_addr_t dma_addr)
-{
-}
-
-dma_addr_t
-pci_map_single(struct pci_dev *pdev, void *cpu_addr, size_t size,
-               int direction)
-{
-        return (dma_addr_t) 0;
-}
-
-void
-pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr, size_t size,
-                 int direction)
-{
-}
-
-int
-pci_map_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents,
-           int direction)
-{
-        return 0;
-}
-
-void
-pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents,
-             int direction)
-{
-}
-
-int
-pci_dma_supported(struct pci_dev *hwdev, dma_addr_t mask)
-{
-        return 0;
-}
-
-/* Generic DMA mapping functions: */
-
-void *
-dma_alloc_coherent(struct device *dev, size_t size,
-                   dma_addr_t *dma_handle, gfp_t gfp)
+static void *alpha_noop_alloc_coherent(struct device *dev, size_t size,
+                                       dma_addr_t *dma_handle, gfp_t gfp)
 {
         void *ret;
 
@@ -171,11 +122,22 @@ dma_alloc_coherent(struct device *dev, size_t size,
         return ret;
 }
 
-EXPORT_SYMBOL(dma_alloc_coherent);
+static void alpha_noop_free_coherent(struct device *dev, size_t size,
+                                     void *cpu_addr, dma_addr_t dma_addr)
+{
+        free_pages((unsigned long)cpu_addr, get_order(size));
+}
+
+static dma_addr_t alpha_noop_map_page(struct device *dev, struct page *page,
+                                      unsigned long offset, size_t size,
+                                      enum dma_data_direction dir,
+                                      struct dma_attrs *attrs)
+{
+        return page_to_pa(page) + offset;
+}
 
-int
-dma_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
-           enum dma_data_direction direction)
+static int alpha_noop_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
+                             enum dma_data_direction dir, struct dma_attrs *attrs)
 {
         int i;
         struct scatterlist *sg;
@@ -192,19 +154,37 @@ dma_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
         return nents;
 }
 
-EXPORT_SYMBOL(dma_map_sg);
+static int alpha_noop_mapping_error(struct device *dev, dma_addr_t dma_addr)
+{
+        return 0;
+}
+
+static int alpha_noop_supported(struct device *dev, u64 mask)
+{
+        return mask < 0x00ffffffUL ? 0 : 1;
+}
 
-int
-dma_set_mask(struct device *dev, u64 mask)
+static int alpha_noop_set_mask(struct device *dev, u64 mask)
 {
         if (!dev->dma_mask || !dma_supported(dev, mask))
                 return -EIO;
 
         *dev->dma_mask = mask;
-
         return 0;
 }
-EXPORT_SYMBOL(dma_set_mask);
+
+struct dma_map_ops alpha_noop_ops = {
+        .alloc_coherent         = alpha_noop_alloc_coherent,
+        .free_coherent          = alpha_noop_free_coherent,
+        .map_page               = alpha_noop_map_page,
+        .map_sg                 = alpha_noop_map_sg,
+        .mapping_error          = alpha_noop_mapping_error,
+        .dma_supported          = alpha_noop_supported,
+        .set_dma_mask           = alpha_noop_set_mask,
+};
+
+struct dma_map_ops *dma_ops = &alpha_noop_ops;
+EXPORT_SYMBOL(dma_ops);
 
 void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
 {
diff --git a/arch/alpha/kernel/pci-sysfs.c b/arch/alpha/kernel/pci-sysfs.c
index 6ea822e7f72..d979e7c7bc4 100644
--- a/arch/alpha/kernel/pci-sysfs.c
+++ b/arch/alpha/kernel/pci-sysfs.c
@@ -10,6 +10,7 @@
  */
 
 #include <linux/sched.h>
+#include <linux/slab.h>
 #include <linux/pci.h>
 
 static int hose_mmap_page_range(struct pci_controller *hose,
diff --git a/arch/alpha/kernel/pci_iommu.c b/arch/alpha/kernel/pci_iommu.c
index 8449504f5e0..d1dbd9acd1d 100644
--- a/arch/alpha/kernel/pci_iommu.c
+++ b/arch/alpha/kernel/pci_iommu.c
@@ -5,7 +5,7 @@
 #include <linux/kernel.h>
 #include <linux/mm.h>
 #include <linux/pci.h>
-#include <linux/slab.h>
+#include <linux/gfp.h>
 #include <linux/bootmem.h>
 #include <linux/scatterlist.h>
 #include <linux/log2.h>
@@ -216,10 +216,30 @@ iommu_arena_free(struct pci_iommu_arena *arena, long ofs, long n)
         for (i = 0; i < n; ++i)
                 p[i] = 0;
 }
-
-/* True if the machine supports DAC addressing, and DEV can
-   make use of it given MASK.  */
-static int pci_dac_dma_supported(struct pci_dev *hwdev, u64 mask);
+
+/*
+ * True if the machine supports DAC addressing, and DEV can
+ * make use of it given MASK.
+ */
+static int pci_dac_dma_supported(struct pci_dev *dev, u64 mask)
+{
+        dma64_addr_t dac_offset = alpha_mv.pci_dac_offset;
+        int ok = 1;
+
+        /* If this is not set, the machine doesn't support DAC at all.  */
+        if (dac_offset == 0)
+                ok = 0;
+
+        /* The device has to be able to address our DAC bit.  */
+        if ((dac_offset & dev->dma_mask) != dac_offset)
+                ok = 0;
+
+        /* If both conditions above are met, we are fine. */
+        DBGA("pci_dac_dma_supported %s from %p\n",
+             ok ? "yes" : "no", __builtin_return_address(0));
+
+        return ok;
+}
 
 /* Map a single buffer of the indicated size for PCI DMA in streaming
    mode.  The 32-bit PCI bus mastering address to use is returned.
@@ -301,23 +321,36 @@ pci_map_single_1(struct pci_dev *pdev, void *cpu_addr, size_t size,
         return ret;
 }
 
-dma_addr_t
-pci_map_single(struct pci_dev *pdev, void *cpu_addr, size_t size, int dir)
+/* Helper for generic DMA-mapping functions. */
+static struct pci_dev *alpha_gendev_to_pci(struct device *dev)
 {
-        int dac_allowed; 
+        if (dev && dev->bus == &pci_bus_type)
+                return to_pci_dev(dev);
 
-        if (dir == PCI_DMA_NONE)
-                BUG();
+        /* Assume that non-PCI devices asking for DMA are either ISA or EISA,
+           BUG() otherwise. */
+        BUG_ON(!isa_bridge);
 
-        dac_allowed = pdev ? pci_dac_dma_supported(pdev, pdev->dma_mask) : 0; 
-        return pci_map_single_1(pdev, cpu_addr, size, dac_allowed);
+        /* Assume non-busmaster ISA DMA when dma_mask is not set (the ISA
+           bridge is bus master then). */
+        if (!dev || !dev->dma_mask || !*dev->dma_mask)
+                return isa_bridge;
+
+        /* For EISA bus masters, return isa_bridge (it might have smaller
+           dma_mask due to wiring limitations). */
+        if (*dev->dma_mask >= isa_bridge->dma_mask)
+                return isa_bridge;
+
+        /* This assumes ISA bus master with dma_mask 0xffffff. */
+        return NULL;
 }
-EXPORT_SYMBOL(pci_map_single);
 
-dma_addr_t
-pci_map_page(struct pci_dev *pdev, struct page *page, unsigned long offset,
-             size_t size, int dir)
+static dma_addr_t alpha_pci_map_page(struct device *dev, struct page *page,
+                                     unsigned long offset, size_t size,
+                                     enum dma_data_direction dir,
+                                     struct dma_attrs *attrs)
 {
+        struct pci_dev *pdev = alpha_gendev_to_pci(dev);
         int dac_allowed;
 
         if (dir == PCI_DMA_NONE)
@@ -327,7 +360,6 @@ pci_map_page(struct pci_dev *pdev, struct page *page, unsigned long offset,
         return pci_map_single_1(pdev, (char *)page_address(page) + offset, 
                                 size, dac_allowed);
 }
-EXPORT_SYMBOL(pci_map_page);
 
 /* Unmap a single streaming mode DMA translation.  The DMA_ADDR and
    SIZE must match what was provided for in a previous pci_map_single
@@ -335,16 +367,17 @@ EXPORT_SYMBOL(pci_map_page);
    the cpu to the buffer are guaranteed to see whatever the device
    wrote there.  */
 
-void
-pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr, size_t size,
-                 int direction)
+static void alpha_pci_unmap_page(struct device *dev, dma_addr_t dma_addr,
+                                 size_t size, enum dma_data_direction dir,
+                                 struct dma_attrs *attrs)
 {
         unsigned long flags;
+        struct pci_dev *pdev = alpha_gendev_to_pci(dev);
         struct pci_controller *hose = pdev ? pdev->sysdata : pci_isa_hose;
         struct pci_iommu_arena *arena;
         long dma_ofs, npages;
 
-        if (direction == PCI_DMA_NONE)
+        if (dir == PCI_DMA_NONE)
                 BUG();
 
         if (dma_addr >= __direct_map_base
@@ -393,25 +426,16 @@ pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr, size_t size,
         DBGA2("pci_unmap_single: sg [%llx,%zx] np %ld from %p\n",
               dma_addr, size, npages, __builtin_return_address(0));
 }
-EXPORT_SYMBOL(pci_unmap_single);
-
-void
-pci_unmap_page(struct pci_dev *pdev, dma_addr_t dma_addr,
-               size_t size, int direction)
-{
-        pci_unmap_single(pdev, dma_addr, size, direction);
-}
-EXPORT_SYMBOL(pci_unmap_page);
 
 /* Allocate and map kernel buffer using consistent mode DMA for PCI
    device.  Returns non-NULL cpu-view pointer to the buffer if
    successful and sets *DMA_ADDRP to the pci side dma address as well,
    else DMA_ADDRP is undefined.  */
 
-void *
-__pci_alloc_consistent(struct pci_dev *pdev, size_t size,
-                       dma_addr_t *dma_addrp, gfp_t gfp)
+static void *alpha_pci_alloc_coherent(struct device *dev, size_t size,
+                                      dma_addr_t *dma_addrp, gfp_t gfp)
 {
+        struct pci_dev *pdev = alpha_gendev_to_pci(dev);
         void *cpu_addr;
         long order = get_order(size);
 
@@ -439,13 +463,12 @@ try_again:
                 gfp |= GFP_DMA;
                 goto try_again;
         }
-                
+
         DBGA2("pci_alloc_consistent: %zx -> [%p,%llx] from %p\n",
               size, cpu_addr, *dma_addrp, __builtin_return_address(0));
 
         return cpu_addr;
 }
-EXPORT_SYMBOL(__pci_alloc_consistent);
 
 /* Free and unmap a consistent DMA buffer.  CPU_ADDR and DMA_ADDR must
    be values that were returned from pci_alloc_consistent.  SIZE must
@@ -453,17 +476,16 @@ EXPORT_SYMBOL(__pci_alloc_consistent);
    References to the memory and mappings associated with CPU_ADDR or
    DMA_ADDR past this call are illegal.  */
 
-void
-pci_free_consistent(struct pci_dev *pdev, size_t size, void *cpu_addr,
-                    dma_addr_t dma_addr)
+static void alpha_pci_free_coherent(struct device *dev, size_t size,
+                                    void *cpu_addr, dma_addr_t dma_addr)
 {
+        struct pci_dev *pdev = alpha_gendev_to_pci(dev);
         pci_unmap_single(pdev, dma_addr, size, PCI_DMA_BIDIRECTIONAL);
         free_pages((unsigned long)cpu_addr, get_order(size));
 
         DBGA2("pci_free_consistent: [%llx,%zx] from %p\n",
               dma_addr, size, __builtin_return_address(0));
 }
-EXPORT_SYMBOL(pci_free_consistent);
 
 /* Classify the elements of the scatterlist.  Write dma_address
    of each element with:
@@ -626,23 +648,21 @@ sg_fill(struct device *dev, struct scatterlist *leader, struct scatterlist *end,
         return 1;
 }
 
-int
-pci_map_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents,
-           int direction)
+static int alpha_pci_map_sg(struct device *dev, struct scatterlist *sg,
+                            int nents, enum dma_data_direction dir,
+                            struct dma_attrs *attrs)
 {
+        struct pci_dev *pdev = alpha_gendev_to_pci(dev);
         struct scatterlist *start, *end, *out;
         struct pci_controller *hose;
         struct pci_iommu_arena *arena;
         dma_addr_t max_dma;
         int dac_allowed;
-        struct device *dev;
 
-        if (direction == PCI_DMA_NONE)
+        if (dir == PCI_DMA_NONE)
                 BUG();
 
-        dac_allowed = pdev ? pci_dac_dma_supported(pdev, pdev->dma_mask) : 0;
-
-        dev = pdev ? &pdev->dev : NULL;
+        dac_allowed = dev ? pci_dac_dma_supported(pdev, pdev->dma_mask) : 0;
 
         /* Fast path single entry scatterlists.  */
         if (nents == 1) {
@@ -699,19 +719,19 @@ pci_map_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents,
         /* Some allocation failed while mapping the scatterlist
            entries.  Unmap them now.  */
         if (out > start)
-                pci_unmap_sg(pdev, start, out - start, direction);
+                pci_unmap_sg(pdev, start, out - start, dir);
         return 0;
 }
-EXPORT_SYMBOL(pci_map_sg);
 
 /* Unmap a set of streaming mode DMA translations.  Again, cpu read
    rules concerning calls here are the same as for pci_unmap_single()
    above.  */
 
-void
-pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents,
-             int direction)
+static void alpha_pci_unmap_sg(struct device *dev, struct scatterlist *sg,
+                               int nents, enum dma_data_direction dir,
+                               struct dma_attrs *attrs)
 {
+        struct pci_dev *pdev = alpha_gendev_to_pci(dev);
         unsigned long flags;
         struct pci_controller *hose;
         struct pci_iommu_arena *arena;
@@ -719,7 +739,7 @@ pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents,
         dma_addr_t max_dma;
         dma_addr_t fbeg, fend;
 
-        if (direction == PCI_DMA_NONE)
+        if (dir == PCI_DMA_NONE)
                 BUG();
 
         if (! alpha_mv.mv_pci_tbi)
@@ -783,15 +803,13 @@ pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents,
 
         DBGA("pci_unmap_sg: %ld entries\n", nents - (end - sg));
 }
-EXPORT_SYMBOL(pci_unmap_sg);
-
 
 /* Return whether the given PCI device DMA address mask can be
    supported properly.  */
 
-int
-pci_dma_supported(struct pci_dev *pdev, u64 mask)
+static int alpha_pci_supported(struct device *dev, u64 mask)
 {
+        struct pci_dev *pdev = alpha_gendev_to_pci(dev);
         struct pci_controller *hose;
         struct pci_iommu_arena *arena;
 
@@ -818,7 +836,6 @@ pci_dma_supported(struct pci_dev *pdev, u64 mask)
 
         return 0;
 }
-EXPORT_SYMBOL(pci_dma_supported);
 
 
 /*
@@ -918,66 +935,32 @@ iommu_unbind(struct pci_iommu_arena *arena, long pg_start, long pg_count)
         return 0;
 }
 
-/* True if the machine supports DAC addressing, and DEV can
-   make use of it given MASK.  */
-
-static int
-pci_dac_dma_supported(struct pci_dev *dev, u64 mask)
-{
-        dma64_addr_t dac_offset = alpha_mv.pci_dac_offset;
-        int ok = 1;
-
-        /* If this is not set, the machine doesn't support DAC at all.  */
-        if (dac_offset == 0)
-                ok = 0;
-
-        /* The device has to be able to address our DAC bit.  */
-        if ((dac_offset & dev->dma_mask) != dac_offset)
-                ok = 0;
-
-        /* If both conditions above are met, we are fine. */
-        DBGA("pci_dac_dma_supported %s from %p\n",
-             ok ? "yes" : "no", __builtin_return_address(0));
-
-        return ok;
-}
-
-/* Helper for generic DMA-mapping functions. */
-
-struct pci_dev *
-alpha_gendev_to_pci(struct device *dev)
+static int alpha_pci_mapping_error(struct device *dev, dma_addr_t dma_addr)
 {
-        if (dev && dev->bus == &pci_bus_type)
-                return to_pci_dev(dev);
-
-        /* Assume that non-PCI devices asking for DMA are either ISA or EISA,
-           BUG() otherwise. */
-        BUG_ON(!isa_bridge);
-
-        /* Assume non-busmaster ISA DMA when dma_mask is not set (the ISA
-           bridge is bus master then). */
-        if (!dev || !dev->dma_mask || !*dev->dma_mask)
-                return isa_bridge;
-
-        /* For EISA bus masters, return isa_bridge (it might have smaller
-           dma_mask due to wiring limitations). */
-        if (*dev->dma_mask >= isa_bridge->dma_mask)
-                return isa_bridge;
-
-        /* This assumes ISA bus master with dma_mask 0xffffff. */
-        return NULL;
+        return dma_addr == 0;
 }
-EXPORT_SYMBOL(alpha_gendev_to_pci);
 
-int
-dma_set_mask(struct device *dev, u64 mask)
+static int alpha_pci_set_mask(struct device *dev, u64 mask)
 {
         if (!dev->dma_mask ||
             !pci_dma_supported(alpha_gendev_to_pci(dev), mask))
                 return -EIO;
 
         *dev->dma_mask = mask;
-
         return 0;
 }
-EXPORT_SYMBOL(dma_set_mask);
+
+struct dma_map_ops alpha_pci_ops = {
+        .alloc_coherent         = alpha_pci_alloc_coherent,
+        .free_coherent          = alpha_pci_free_coherent,
+        .map_page               = alpha_pci_map_page,
+        .unmap_page             = alpha_pci_unmap_page,
+        .map_sg                 = alpha_pci_map_sg,
+        .unmap_sg               = alpha_pci_unmap_sg,
+        .mapping_error          = alpha_pci_mapping_error,
+        .dma_supported          = alpha_pci_supported,
+        .set_dma_mask           = alpha_pci_set_mask,
+};
+
+struct dma_map_ops *dma_ops = &alpha_pci_ops;
+EXPORT_SYMBOL(dma_ops);
diff --git a/arch/alpha/kernel/process.c b/arch/alpha/kernel/process.c
index 289039bb6bb..395a464353b 100644
--- a/arch/alpha/kernel/process.c
+++ b/arch/alpha/kernel/process.c
@@ -17,7 +17,6 @@
 #include <linux/stddef.h>
 #include <linux/unistd.h>
 #include <linux/ptrace.h>
-#include <linux/slab.h>
 #include <linux/user.h>
 #include <linux/time.h>
 #include <linux/major.h>
@@ -28,6 +27,7 @@
 #include <linux/reboot.h>
 #include <linux/tty.h>
 #include <linux/console.h>
+#include <linux/slab.h>
 
 #include <asm/reg.h>
 #include <asm/uaccess.h>
diff --git a/arch/alpha/kernel/ptrace.c b/arch/alpha/kernel/ptrace.c
index e072041d19f..baa903602f6 100644
--- a/arch/alpha/kernel/ptrace.c
+++ b/arch/alpha/kernel/ptrace.c
@@ -11,7 +11,6 @@
 #include <linux/errno.h>
 #include <linux/ptrace.h>
 #include <linux/user.h>
-#include <linux/slab.h>
 #include <linux/security.h>
 #include <linux/signal.h>
 
@@ -249,6 +248,17 @@ ptrace_cancel_bpt(struct task_struct * child)
         return (nsaved != 0);
 }
 
+void user_enable_single_step(struct task_struct *child)
+{
+        /* Mark single stepping.  */
+        task_thread_info(child)->bpt_nsaved = -1;
+}
+
+void user_disable_single_step(struct task_struct *child)
+{
+        ptrace_cancel_bpt(child);
+}
+
 /*
  * Called by kernel/ptrace.c when detaching..
  *
@@ -256,7 +266,7 @@ ptrace_cancel_bpt(struct task_struct * child)
  */
 void ptrace_disable(struct task_struct *child)
 { 
-        ptrace_cancel_bpt(child);
+        user_disable_single_step(child);
 }
 
 long arch_ptrace(struct task_struct *child, long request, long addr, long data)
@@ -295,52 +305,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 DBG(DBG_MEM, ("poke $%ld<-%#lx\n", addr, data));
                 ret = put_reg(child, addr, data);
                 break;
-
-        case PTRACE_SYSCALL:
-                /* continue and stop at next (return from) syscall */
-        case PTRACE_CONT:    /* restart after signal. */
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                if (request == PTRACE_SYSCALL)
-                        set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                else
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                child->exit_code = data;
-                /* make sure single-step breakpoint is gone. */
-                ptrace_cancel_bpt(child);
-                wake_up_process(child);
-                ret = 0;
-                break;
-
-        /*
-         * Make the child exit.  Best I can do is send it a sigkill.
-         * perhaps it should be put in the status that it wants to
-         * exit.
-         */
-        case PTRACE_KILL:
-                ret = 0;
-                if (child->exit_state == EXIT_ZOMBIE)
-                        break;
-                child->exit_code = SIGKILL;
-                /* make sure single-step breakpoint is gone. */
-                ptrace_cancel_bpt(child);
-                wake_up_process(child);
-                break;
-
-        case PTRACE_SINGLESTEP:  /* execute single instruction. */
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                /* Mark single stepping.  */
-                task_thread_info(child)->bpt_nsaved = -1;
-                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                child->exit_code = data;
-                wake_up_process(child);
-                /* give it a chance to run. */
-                ret = 0;
-                break;
-
         default:
                 ret = ptrace_request(child, request, addr, data);
                 break;
diff --git a/arch/alpha/kernel/smc37c669.c b/arch/alpha/kernel/smc37c669.c
index bca5bda90cd..0435921d41c 100644
--- a/arch/alpha/kernel/smc37c669.c
+++ b/arch/alpha/kernel/smc37c669.c
@@ -3,7 +3,6 @@
  */
 #include <linux/kernel.h>
 
-#include <linux/slab.h>
 #include <linux/mm.h>
 #include <linux/init.h>
 #include <linux/delay.h>
diff --git a/arch/alpha/kernel/smc37c93x.c b/arch/alpha/kernel/smc37c93x.c
index 2636cc028d0..3e6a2893af9 100644
--- a/arch/alpha/kernel/smc37c93x.c
+++ b/arch/alpha/kernel/smc37c93x.c
@@ -4,7 +4,6 @@
 
 #include <linux/kernel.h>
 
-#include <linux/slab.h>
 #include <linux/mm.h>
 #include <linux/init.h>
 #include <linux/delay.h>
diff --git a/arch/alpha/kernel/srm_env.c b/arch/alpha/kernel/srm_env.c
index dbbf04f9230..4afc1a1e2e5 100644
--- a/arch/alpha/kernel/srm_env.c
+++ b/arch/alpha/kernel/srm_env.c
@@ -30,6 +30,7 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/gfp.h>
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/proc_fs.h>
diff --git a/arch/alpha/kernel/sys_dp264.c b/arch/alpha/kernel/sys_dp264.c
index d64e1e497e7..4026502ab70 100644
--- a/arch/alpha/kernel/sys_dp264.c
+++ b/arch/alpha/kernel/sys_dp264.c
@@ -224,7 +224,7 @@ static void
 dp264_device_interrupt(unsigned long vector)
 {
 #if 1
-        printk("dp264_device_interrupt: NOT IMPLEMENTED YET!! \n");
+        printk("dp264_device_interrupt: NOT IMPLEMENTED YET!!\n");
 #else
         unsigned long pld;
         unsigned int i;
diff --git a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c
index 288053342c8..9008d0f20c5 100644
--- a/arch/alpha/kernel/sys_titan.c
+++ b/arch/alpha/kernel/sys_titan.c
@@ -171,7 +171,7 @@ titan_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
 static void
 titan_device_interrupt(unsigned long vector)
 {
-        printk("titan_device_interrupt: NOT IMPLEMENTED YET!! \n");
+        printk("titan_device_interrupt: NOT IMPLEMENTED YET!!\n");
 }
 
 static void 
diff --git a/arch/alpha/kernel/traps.c b/arch/alpha/kernel/traps.c
index 6ee7655b756..b14f015008a 100644
--- a/arch/alpha/kernel/traps.c
+++ b/arch/alpha/kernel/traps.c
@@ -17,6 +17,7 @@
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/kallsyms.h>
+#include <linux/ratelimit.h>
 
 #include <asm/gentrap.h>
 #include <asm/uaccess.h>
@@ -771,8 +772,7 @@ asmlinkage void
 do_entUnaUser(void __user * va, unsigned long opcode,
               unsigned long reg, struct pt_regs *regs)
 {
-        static int cnt = 0;
-        static unsigned long last_time;
+        static DEFINE_RATELIMIT_STATE(ratelimit, 5 * HZ, 5);
 
         unsigned long tmp1, tmp2, tmp3, tmp4;
         unsigned long fake_reg, *reg_addr = &fake_reg;
@@ -783,15 +783,11 @@ do_entUnaUser(void __user * va, unsigned long opcode,
            with the unaliged access.  */
 
         if (!test_thread_flag (TIF_UAC_NOPRINT)) {
-                if (cnt >= 5 && time_after(jiffies, last_time + 5 * HZ)) {
-                        cnt = 0;
-                }
-                if (++cnt < 5) {
+                if (__ratelimit(&ratelimit)) {
                         printk("%s(%d): unaligned trap at %016lx: %p %lx %ld\n",
                                current->comm, task_pid_nr(current),
                                regs->pc - 4, va, opcode, reg);
                 }
-                last_time = jiffies;
         }
         if (test_thread_flag (TIF_UAC_SIGBUS))
                 goto give_sigbus;
diff --git a/arch/alpha/mm/init.c b/arch/alpha/mm/init.c
index a0902c20d67..86425ab53bf 100644
--- a/arch/alpha/mm/init.c
+++ b/arch/alpha/mm/init.c
@@ -20,6 +20,7 @@
 #include <linux/init.h>
 #include <linux/bootmem.h> /* max_low_pfn */
 #include <linux/vmalloc.h>
+#include <linux/gfp.h>
 
 #include <asm/system.h>
 #include <asm/uaccess.h>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3b181284970..92622eb5cc0 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -155,6 +155,9 @@ config ARCH_MAY_HAVE_PC_FDC
 config ZONE_DMA
         bool
 
+config NEED_DMA_MAP_STATE
+       def_bool y
+
 config GENERIC_ISA_DMA
         bool
 
@@ -215,6 +218,10 @@ config MMU
           Select if you want MMU-based virtualised addressing space
           support by paged memory management. If unsure, say 'Y'.
 
+#
+# The "ARM system type" choice list is ordered alphabetically by option
+# text.  Please add new entries in the option alphabetic order.
+#
 choice
         prompt "ARM system type"
         default ARCH_VERSATILE
@@ -246,6 +253,7 @@ config ARCH_REALVIEW
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
         select ARCH_WANT_OPTIONAL_GPIOLIB
+        select GPIO_PL061 if GPIOLIB
         help
           This enables support for ARM Ltd RealView boards.
 
@@ -271,6 +279,18 @@ config ARCH_AT91
           This enables support for systems based on the Atmel AT91RM9200,
           AT91SAM9 and AT91CAP9 processors.
 
+config ARCH_BCMRING
+        bool "Broadcom BCMRING"
+        depends on MMU
+        select CPU_V6
+        select ARM_AMBA
+        select COMMON_CLKDEV
+        select GENERIC_TIME
+        select GENERIC_CLOCKEVENTS
+        select ARCH_WANT_OPTIONAL_GPIOLIB
+        help
+          Support for Broadcom's BCMRing platform.
+
 config ARCH_CLPS711X
         bool "Cirrus Logic CLPS711x/EP721x-based"
         select CPU_ARM720T
@@ -321,10 +341,9 @@ config ARCH_MXC
         bool "Freescale MXC/iMX-based"
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
-        select ARCH_MTD_XIP
-        select GENERIC_GPIO
         select ARCH_REQUIRE_GPIOLIB
         select HAVE_CLK
+        select COMMON_CLKDEV
         help
           Support for Freescale MXC/iMX-based family of processors
 
@@ -357,20 +376,6 @@ config ARCH_H720X
         help
           This enables support for systems based on the Hynix HMS720x
 
-config ARCH_NOMADIK
-        bool "STMicroelectronics Nomadik"
-        select ARM_AMBA
-        select ARM_VIC
-        select CPU_ARM926T
-        select HAVE_CLK
-        select COMMON_CLKDEV
-        select GENERIC_TIME
-        select GENERIC_CLOCKEVENTS
-        select GENERIC_GPIO
-        select ARCH_REQUIRE_GPIOLIB
-        help
-          Support for the Nomadik platform by ST-Ericsson
-
 config ARCH_IOP13XX
         bool "IOP13xx-based"
         depends on MMU
@@ -508,7 +513,7 @@ config ARCH_ORION5X
           Orion-2 (5281), Orion-1-90 (6183).
 
 config ARCH_MMP
-        bool "Marvell PXA168/910"
+        bool "Marvell PXA168/910/MMP2"
         depends on MMU
         select GENERIC_GPIO
         select ARCH_REQUIRE_GPIOLIB
@@ -519,7 +524,7 @@ config ARCH_MMP
         select TICK_ONESHOT
         select PLAT_PXA
         help
-          Support for Marvell's PXA168/910 processor line.
+          Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 
 config ARCH_KS8695
         bool "Micrel/Kendin KS8695"
@@ -605,6 +610,11 @@ config ARCH_MSM
           interface to the ARM9 modem processor which runs the baseband stack
           and controls some vital subsystems (clock and power control, etc).
 
+config ARCH_SHMOBILE
+        bool "Renesas SH-Mobile"
+        help
+          Support for Renesas's SH-Mobile ARM platforms
+
 config ARCH_RPC
         bool "RiscPC"
         select ARCH_ACORN
@@ -648,12 +658,43 @@ config ARCH_S3C2410
 
 config ARCH_S3C64XX
         bool "Samsung S3C64XX"
+        select PLAT_SAMSUNG
+        select CPU_V6
         select GENERIC_GPIO
+        select ARM_VIC
         select HAVE_CLK
+        select NO_IOPORT
         select ARCH_HAS_CPUFREQ
+        select ARCH_REQUIRE_GPIOLIB
+        select SAMSUNG_CLKSRC
+        select SAMSUNG_IRQ_VIC_TIMER
+        select SAMSUNG_IRQ_UART
+        select S3C_GPIO_TRACK
+        select S3C_GPIO_PULL_UPDOWN
+        select S3C_GPIO_CFG_S3C24XX
+        select S3C_GPIO_CFG_S3C64XX
+        select S3C_DEV_NAND
+        select USB_ARCH_HAS_OHCI
+        select SAMSUNG_GPIOLIB_4BIT
         help
           Samsung S3C64XX series based systems
 
+config ARCH_S5P6440
+        bool "Samsung S5P6440"
+        select CPU_V6
+        select GENERIC_GPIO
+        select HAVE_CLK
+        help
+          Samsung S5P6440 CPU based systems
+
+config ARCH_S5P6442
+        bool "Samsung S5P6442"
+        select CPU_V6
+        select GENERIC_GPIO
+        select HAVE_CLK
+        help
+          Samsung S5P6442 CPU based systems
+
 config ARCH_S5PC1XX
         bool "Samsung S5PC1XX"
         select GENERIC_GPIO
@@ -663,6 +704,15 @@ config ARCH_S5PC1XX
         help
           Samsung S5PC1XX series based systems
 
+config ARCH_S5PV210
+        bool "Samsung S5PV210/S5PC110"
+        select CPU_V7
+        select GENERIC_GPIO
+        select HAVE_CLK
+        select ARM_L1_CACHE_SHIFT_6
+        help
+          Samsung S5PV210/S5PC110 series based systems
+
 config ARCH_SHARK
         bool "Shark"
         select CPU_SA110
@@ -700,6 +750,30 @@ config ARCH_U300
         help
           Support for ST-Ericsson U300 series mobile platforms.
 
+config ARCH_U8500
+        bool "ST-Ericsson U8500 Series"
+        select CPU_V7
+        select ARM_AMBA
+        select GENERIC_TIME
+        select GENERIC_CLOCKEVENTS
+        select COMMON_CLKDEV
+        help
+          Support for ST-Ericsson's Ux500 architecture
+
+config ARCH_NOMADIK
+        bool "STMicroelectronics Nomadik"
+        select ARM_AMBA
+        select ARM_VIC
+        select CPU_ARM926T
+        select HAVE_CLK
+        select COMMON_CLKDEV
+        select GENERIC_TIME
+        select GENERIC_CLOCKEVENTS
+        select GENERIC_GPIO
+        select ARCH_REQUIRE_GPIOLIB
+        help
+          Support for the Nomadik platform by ST-Ericsson
+
 config ARCH_DAVINCI
         bool "TI DaVinci"
         select CPU_ARM926T
@@ -728,30 +802,13 @@ config ARCH_OMAP
         help
           Support for TI's OMAP platform (OMAP1 and OMAP2).
 
-config ARCH_BCMRING
-        bool "Broadcom BCMRING"
-        depends on MMU
-        select CPU_V6
-        select ARM_AMBA
-        select COMMON_CLKDEV
-        select GENERIC_TIME
-        select GENERIC_CLOCKEVENTS
-        select ARCH_WANT_OPTIONAL_GPIOLIB
-        help
-          Support for Broadcom's BCMRing platform.
-
-config ARCH_U8500
-        bool "ST-Ericsson U8500 Series"
-        select CPU_V7
-        select ARM_AMBA
-        select GENERIC_TIME
-        select GENERIC_CLOCKEVENTS
-        select COMMON_CLKDEV
-        help
-          Support for ST-Ericsson's Ux500 architecture
-
 endchoice
 
+#
+# This is sorted alphabetically by mach-* pathname.  However, plat-*
+# Kconfigs may be included either alphabetically (according to the
+# plat- suffix) or along side the corresponding mach-* source.
+#
 source "arch/arm/mach-aaec2000/Kconfig"
 
 source "arch/arm/mach-at91/Kconfig"
@@ -828,8 +885,7 @@ source "arch/arm/mach-sa1100/Kconfig"
 
 source "arch/arm/plat-samsung/Kconfig"
 source "arch/arm/plat-s3c24xx/Kconfig"
-source "arch/arm/plat-s3c64xx/Kconfig"
-source "arch/arm/plat-s3c/Kconfig"
+source "arch/arm/plat-s5p/Kconfig"
 source "arch/arm/plat-s5pc1xx/Kconfig"
 
 if ARCH_S3C2410
@@ -837,21 +893,27 @@ source "arch/arm/mach-s3c2400/Kconfig"
 source "arch/arm/mach-s3c2410/Kconfig"
 source "arch/arm/mach-s3c2412/Kconfig"
 source "arch/arm/mach-s3c2440/Kconfig"
-source "arch/arm/mach-s3c2442/Kconfig"
 source "arch/arm/mach-s3c2443/Kconfig"
 endif
 
 if ARCH_S3C64XX
-source "arch/arm/mach-s3c6400/Kconfig"
-source "arch/arm/mach-s3c6410/Kconfig"
+source "arch/arm/mach-s3c64xx/Kconfig"
 endif
 
-source "arch/arm/plat-stmp3xxx/Kconfig"
+source "arch/arm/mach-s5p6440/Kconfig"
+
+source "arch/arm/mach-s5p6442/Kconfig"
 
 if ARCH_S5PC1XX
 source "arch/arm/mach-s5pc100/Kconfig"
 endif
 
+source "arch/arm/mach-s5pv210/Kconfig"
+
+source "arch/arm/mach-shmobile/Kconfig"
+
+source "arch/arm/plat-stmp3xxx/Kconfig"
+
 source "arch/arm/mach-u300/Kconfig"
 
 source "arch/arm/mach-ux500/Kconfig"
@@ -1117,7 +1179,7 @@ source kernel/Kconfig.preempt
 config HZ
         int
         default 128 if ARCH_L7200
-        default 200 if ARCH_EBSA110 || ARCH_S3C2410
+        default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210
         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
         default AT91_TIMER_HZ if ARCH_AT91
         default 100
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 5cb9326df7a..91344af75f3 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -117,7 +117,7 @@ config DEBUG_CLPS711X_UART2
           cause the debug messages to appear on the first serial port.
 
 config DEBUG_S3C_UART
-        depends on PLAT_S3C
+        depends on PLAT_SAMSUNG
         int "S3C UART to use for low-level debug"
         default "0"
         help
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 81f54ca3078..ed820e737a8 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -146,6 +146,7 @@ machine-$(CONFIG_ARCH_MX1)		:= mx1
 machine-$(CONFIG_ARCH_MX2)              := mx2
 machine-$(CONFIG_ARCH_MX25)             := mx25
 machine-$(CONFIG_ARCH_MX3)              := mx3
+machine-$(CONFIG_ARCH_MX5)              := mx5
 machine-$(CONFIG_ARCH_MXC91231)         := mxc91231
 machine-$(CONFIG_ARCH_NETX)             := netx
 machine-$(CONFIG_ARCH_NOMADIK)          := nomadik
@@ -159,12 +160,16 @@ machine-$(CONFIG_ARCH_PNX4008)		:= pnx4008
 machine-$(CONFIG_ARCH_PXA)              := pxa
 machine-$(CONFIG_ARCH_REALVIEW)         := realview
 machine-$(CONFIG_ARCH_RPC)              := rpc
-machine-$(CONFIG_ARCH_S3C2410)          := s3c2410 s3c2400 s3c2412 s3c2440 s3c2442 s3c2443
+machine-$(CONFIG_ARCH_S3C2410)          := s3c2410 s3c2400 s3c2412 s3c2440 s3c2443
 machine-$(CONFIG_ARCH_S3C24A0)          := s3c24a0
-machine-$(CONFIG_ARCH_S3C64XX)          := s3c6400 s3c6410
+machine-$(CONFIG_ARCH_S3C64XX)          := s3c64xx
+machine-$(CONFIG_ARCH_S5P6440)          := s5p6440
+machine-$(CONFIG_ARCH_S5P6442)          := s5p6442
 machine-$(CONFIG_ARCH_S5PC1XX)          := s5pc100
+machine-$(CONFIG_ARCH_S5PV210)          := s5pv210
 machine-$(CONFIG_ARCH_SA1100)           := sa1100
 machine-$(CONFIG_ARCH_SHARK)            := shark
+machine-$(CONFIG_ARCH_SHMOBILE)         := shmobile
 machine-$(CONFIG_ARCH_STMP378X)         := stmp378x
 machine-$(CONFIG_ARCH_STMP37XX)         := stmp37xx
 machine-$(CONFIG_ARCH_U300)             := u300
@@ -178,14 +183,15 @@ machine-$(CONFIG_FOOTBRIDGE)		:= footbridge
 # by CONFIG_* macro name.
 plat-$(CONFIG_ARCH_MXC)         := mxc
 plat-$(CONFIG_ARCH_OMAP)        := omap
+plat-$(CONFIG_ARCH_S3C64XX)     := samsung
 plat-$(CONFIG_ARCH_STMP3XXX)    := stmp3xxx
 plat-$(CONFIG_PLAT_IOP)         := iop
 plat-$(CONFIG_PLAT_NOMADIK)     := nomadik
 plat-$(CONFIG_PLAT_ORION)       := orion
 plat-$(CONFIG_PLAT_PXA)         := pxa
-plat-$(CONFIG_PLAT_S3C24XX)     := s3c24xx s3c samsung
-plat-$(CONFIG_PLAT_S3C64XX)     := s3c64xx s3c samsung
-plat-$(CONFIG_PLAT_S5PC1XX)     := s5pc1xx s3c samsung
+plat-$(CONFIG_PLAT_S3C24XX)     := s3c24xx samsung
+plat-$(CONFIG_PLAT_S5PC1XX)     := s5pc1xx samsung
+plat-$(CONFIG_PLAT_S5P)         := s5p samsung
 
 ifeq ($(CONFIG_ARCH_EBSA110),y)
 # This is what happens if you forget the IOCS16 line.
diff --git a/arch/arm/boot/bootp/init.S b/arch/arm/boot/bootp/init.S
index df7bc7068d0..8b0de41c3dc 100644
--- a/arch/arm/boot/bootp/init.S
+++ b/arch/arm/boot/bootp/init.S
@@ -49,7 +49,7 @@ _start:		add	lr, pc, #-0x8		@ lr = current load addr
 /*
  * find the end of the tag list, and then add an INITRD tag on the end.
  * If there is already an INITRD tag, then we ignore it; the last INITRD
- * tag takes precidence.
+ * tag takes precedence.
  */
 taglist:        ldr     r10, [r9, #0]           @ tag length
                 teq     r10, #0                 @ last tag (zero length)?
diff --git a/arch/arm/boot/compressed/decompress.c b/arch/arm/boot/compressed/decompress.c
index 0da382f3315..9c097073ce4 100644
--- a/arch/arm/boot/compressed/decompress.c
+++ b/arch/arm/boot/compressed/decompress.c
@@ -11,6 +11,7 @@ extern unsigned long free_mem_end_ptr;
 extern void error(char *);
 
 #define STATIC static
+#define STATIC_RW_DATA  /* non-static please */
 
 #define ARCH_HAS_DECOMP_WDOG
 
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 99b75aa1c2e..6ab6b337a91 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -170,9 +170,9 @@ not_angel:
 
                 .text
                 adr     r0, LC0
- ARM(           ldmia   r0, {r1, r2, r3, r4, r5, r6, ip, sp}    )
- THUMB(         ldmia   r0, {r1, r2, r3, r4, r5, r6, ip}        )
- THUMB(         ldr     sp, [r0, #28]                           )
+ ARM(           ldmia   r0, {r1, r2, r3, r4, r5, r6, r11, ip, sp})
+ THUMB(         ldmia   r0, {r1, r2, r3, r4, r5, r6, r11, ip}   )
+ THUMB(         ldr     sp, [r0, #32]                           )
                 subs    r0, r0, r1              @ calculate the delta offset
 
                                                 @ if delta is zero, we are
@@ -182,12 +182,13 @@ not_angel:
                 /*
                  * We're running at a different address.  We need to fix
                  * up various pointers:
-                 *   r5 - zImage base address
-                 *   r6 - GOT start
+                 *   r5 - zImage base address (_start)
+                 *   r6 - size of decompressed image
+                 *   r11 - GOT start
                  *   ip - GOT end
                  */
                 add     r5, r5, r0
-                add     r6, r6, r0
+                add     r11, r11, r0
                 add     ip, ip, r0
 
 #ifndef CONFIG_ZBOOT_ROM
@@ -205,10 +206,10 @@ not_angel:
                 /*
                  * Relocate all entries in the GOT table.
                  */
-1:              ldr     r1, [r6, #0]            @ relocate entries in the GOT
+1:              ldr     r1, [r11, #0]           @ relocate entries in the GOT
                 add     r1, r1, r0              @ table.  This fixes up the
-                str     r1, [r6], #4            @ C references.
-                cmp     r6, ip
+                str     r1, [r11], #4           @ C references.
+                cmp     r11, ip
                 blo     1b
 #else
 
@@ -216,12 +217,12 @@ not_angel:
                  * Relocate entries in the GOT table.  We only relocate
                  * the entries that are outside the (relocated) BSS region.
                  */
-1:              ldr     r1, [r6, #0]            @ relocate entries in the GOT
+1:              ldr     r1, [r11, #0]           @ relocate entries in the GOT
                 cmp     r1, r2                  @ entry < bss_start ||
                 cmphs   r3, r1                  @ _end < entry
                 addlo   r1, r1, r0              @ table.  This fixes up the
-                str     r1, [r6], #4            @ C references.
-                cmp     r6, ip
+                str     r1, [r11], #4           @ C references.
+                cmp     r11, ip
                 blo     1b
 #endif
 
@@ -247,6 +248,7 @@ not_relocated:	mov	r0, #0
  * Check to see if we will overwrite ourselves.
  *   r4 = final kernel address
  *   r5 = start of this image
+ *   r6 = size of decompressed image
  *   r2 = end of malloc space (and therefore this image)
  * We basically want:
  *   r4 >= r2 -> OK
@@ -254,8 +256,7 @@ not_relocated:	mov	r0, #0
  */
                 cmp     r4, r2
                 bhs     wont_overwrite
-                sub     r3, sp, r5              @ > compressed kernel size
-                add     r0, r4, r3, lsl #2      @ allow for 4x expansion
+                add     r0, r4, r6
                 cmp     r0, r5
                 bls     wont_overwrite
 
@@ -271,7 +272,6 @@ not_relocated:	mov	r0, #0
  * r1-r3  = unused
  * r4     = kernel execution address
  * r5     = decompressed kernel start
- * r6     = processor ID
  * r7     = architecture ID
  * r8     = atags pointer
  * r9-r12,r14 = corrupted
@@ -312,7 +312,8 @@ LC0:		.word	LC0			@ r1
                 .word   _end                    @ r3
                 .word   zreladdr                @ r4
                 .word   _start                  @ r5
-                .word   _got_start              @ r6
+                .word   _image_size             @ r6
+                .word   _got_start              @ r11
                 .word   _got_end                @ ip
                 .word   user_stack+4096         @ sp
 LC1:            .word   reloc_end - reloc_start
@@ -336,7 +337,6 @@ params:		ldr	r0, =params_phys
  *
  * On entry,
  *  r4 = kernel execution address
- *  r6 = processor ID
  *  r7 = architecture number
  *  r8 = atags pointer
  *  r9 = run-time address of "start"  (???)
@@ -542,7 +542,6 @@ __common_mmu_cache_on:
  * r1-r3  = unused
  * r4     = kernel execution address
  * r5     = decompressed kernel start
- * r6     = processor ID
  * r7     = architecture ID
  * r8     = atags pointer
  * r9-r12,r14 = corrupted
@@ -581,19 +580,19 @@ call_kernel:	bl	cache_clean_flush
  *  r1  = corrupted
  *  r2  = corrupted
  *  r3  = block offset
- *  r6  = corrupted
+ *  r9  = corrupted
  *  r12 = corrupted
  */
 
 call_cache_fn:  adr     r12, proc_types
 #ifdef CONFIG_CPU_CP15
-                mrc     p15, 0, r6, c0, c0      @ get processor ID
+                mrc     p15, 0, r9, c0, c0      @ get processor ID
 #else
-                ldr     r6, =CONFIG_PROCESSOR_ID
+                ldr     r9, =CONFIG_PROCESSOR_ID
 #endif
 1:              ldr     r1, [r12, #0]           @ get value
                 ldr     r2, [r12, #4]           @ get mask
-                eor     r1, r1, r6              @ (real ^ match)
+                eor     r1, r1, r9              @ (real ^ match)
                 tst     r1, r2                  @       & mask
  ARM(           addeq   pc, r12, r3             ) @ call cache function
  THUMB(         addeq   r12, r3                 )
@@ -743,7 +742,7 @@ proc_types:
                 .word   0x000f0000
                 W(b)    __armv4_mmu_cache_on
                 W(b)    __armv4_mmu_cache_off
-                W(b)    __armv4_mmu_cache_flush
+                W(b)    __armv5tej_mmu_cache_flush
 
                 .word   0x0007b000              @ ARMv6
                 .word   0x000ff000
@@ -778,8 +777,7 @@ proc_types:
  * Turn off the Cache and MMU.  ARMv3 does not support
  * reading the control register, but ARMv4 does.
  *
- * On entry,  r6 = processor ID
- * On exit,   r0, r1, r2, r3, r12 corrupted
+ * On exit, r0, r1, r2, r3, r9, r12 corrupted
  * This routine must preserve: r4, r6, r7
  */
                 .align  5
@@ -852,10 +850,8 @@ __armv3_mmu_cache_off:
 /*
  * Clean and flush the cache to maintain consistency.
  *
- * On entry,
- *  r6 = processor ID
  * On exit,
- *  r1, r2, r3, r11, r12 corrupted
+ *  r1, r2, r3, r9, r11, r12 corrupted
  * This routine must preserve:
  *  r0, r4, r5, r6, r7
  */
@@ -967,7 +963,7 @@ __armv4_mmu_cache_flush:
                 mov     r2, #64*1024            @ default: 32K dcache size (*2)
                 mov     r11, #32                @ default: 32 byte line size
                 mrc     p15, 0, r3, c0, c0, 1   @ read cache type
-                teq     r3, r6                  @ cache ID register present?
+                teq     r3, r9                  @ cache ID register present?
                 beq     no_cache_id
                 mov     r1, r3, lsr #18
                 and     r1, r1, #7
diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c
index d32bc71c1f7..d2b2ef41cd4 100644
--- a/arch/arm/boot/compressed/misc.c
+++ b/arch/arm/boot/compressed/misc.c
@@ -33,6 +33,7 @@ unsigned int __machine_arch_type;
 #else
 
 static void putstr(const char *ptr);
+extern void error(char *x);
 
 #include <mach/uncompress.h>
 
diff --git a/arch/arm/boot/compressed/vmlinux.lds.in b/arch/arm/boot/compressed/vmlinux.lds.in
index 7ca9ecff652..d08168941bd 100644
--- a/arch/arm/boot/compressed/vmlinux.lds.in
+++ b/arch/arm/boot/compressed/vmlinux.lds.in
@@ -43,6 +43,9 @@ SECTIONS
 
   _etext = .;
 
+  /* Assume size of decompressed image is 4x the compressed image */
+  _image_size = (_etext - _text) * 4;
+
   _got_start = .;
   .got                  : { *(.got) }
   _got_end = .;
diff --git a/arch/arm/common/clkdev.c b/arch/arm/common/clkdev.c
index 446b696196e..dba4c1da63e 100644
--- a/arch/arm/common/clkdev.c
+++ b/arch/arm/common/clkdev.c
@@ -18,6 +18,7 @@
 #include <linux/string.h>
 #include <linux/mutex.h>
 #include <linux/clk.h>
+#include <linux/slab.h>
 
 #include <asm/clkdev.h>
 #include <mach/clkdev.h>
@@ -32,7 +33,7 @@ static DEFINE_MUTEX(clocks_mutex);
  *  If an entry has a device ID, it must match
  *  If an entry has a connection ID, it must match
  * Then we take the most specific entry - with the following
- * order of precidence: dev+con > dev only > con only.
+ * order of precedence: dev+con > dev only > con only.
  */
 static struct clk *clk_find(const char *dev_id, const char *con_id)
 {
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index 2793447621c..7974baacafc 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -21,7 +21,6 @@
 #include <linux/ptrace.h>
 #include <linux/interrupt.h>
 #include <linux/mm.h>
-#include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/ioport.h>
 #include <linux/irq.h>
@@ -272,33 +271,6 @@ int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size)
                 ((dma_addr + size - PHYS_OFFSET) >= SZ_64M);
 }
 
-/*
- * We override these so we properly do dmabounce otherwise drivers
- * are able to set the dma_mask to 0xffffffff and we can no longer
- * trap bounces. :(
- *
- * We just return true on everyhing except for < 64MB in which case
- * we will fail miseralby and die since we can't handle that case.
- */
-int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
-{
-        dev_dbg(&dev->dev, "%s: %llx\n", __func__, mask);
-        if (mask >= PHYS_OFFSET + SZ_64M - 1)
-                return 0;
-
-        return -EIO;
-}
-
-int
-pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
-{
-        dev_dbg(&dev->dev, "%s: %llx\n", __func__, mask);
-        if (mask >= PHYS_OFFSET + SZ_64M - 1)
-                return 0;
-
-        return -EIO;
-}
-
 int __init it8152_pci_setup(int nr, struct pci_sys_data *sys)
 {
         it8152_io.start = IT8152_IO_BASE + 0x12000;
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
index bd36c778c81..9dff07c80dd 100644
--- a/arch/arm/common/locomo.c
+++ b/arch/arm/common/locomo.c
@@ -32,6 +32,12 @@
 
 #include <asm/hardware/locomo.h>
 
+/* LoCoMo Interrupts */
+#define IRQ_LOCOMO_KEY          (0)
+#define IRQ_LOCOMO_GPIO         (1)
+#define IRQ_LOCOMO_LT           (2)
+#define IRQ_LOCOMO_SPI          (3)
+
 /* M62332 output channel selection */
 #define M62332_EVR_CH   1       /* M62332 volume channel number  */
                                 /*   0 : CH.1 , 1 : CH. 2        */
@@ -58,6 +64,7 @@ struct locomo {
         struct device *dev;
         unsigned long phys;
         unsigned int irq;
+        int irq_base;
         spinlock_t lock;
         void __iomem *base;
 #ifdef CONFIG_PM
@@ -81,9 +88,7 @@ struct locomo_dev_info {
 static struct locomo_dev_info locomo_devices[] = {
         {
                 .devid          = LOCOMO_DEVID_KEYBOARD,
-                .irq = {
-                        IRQ_LOCOMO_KEY,
-                },
+                .irq            = { IRQ_LOCOMO_KEY },
                 .name           = "locomo-keyboard",
                 .offset         = LOCOMO_KEYBOARD,
                 .length         = 16,
@@ -133,53 +138,20 @@ static struct locomo_dev_info locomo_devices[] = {
         },
 };
 
-
-/** LoCoMo interrupt handling stuff.
- * NOTE: LoCoMo has a 1 to many mapping on all of its IRQs.
- * that is, there is only one real hardware interrupt
- * we determine which interrupt it is by reading some IO memory.
- * We have two levels of expansion, first in the handler for the
- * hardware interrupt we generate an interrupt
- * IRQ_LOCOMO_*_BASE and those handlers generate more interrupts
- *
- * hardware irq reads LOCOMO_ICR & 0x0f00
- *   IRQ_LOCOMO_KEY_BASE
- *   IRQ_LOCOMO_GPIO_BASE
- *   IRQ_LOCOMO_LT_BASE
- *   IRQ_LOCOMO_SPI_BASE
- * IRQ_LOCOMO_KEY_BASE reads LOCOMO_KIC & 0x0001
- *   IRQ_LOCOMO_KEY
- * IRQ_LOCOMO_GPIO_BASE reads LOCOMO_GIR & LOCOMO_GPD & 0xffff
- *   IRQ_LOCOMO_GPIO[0-15]
- * IRQ_LOCOMO_LT_BASE reads LOCOMO_LTINT & 0x0001
- *   IRQ_LOCOMO_LT
- * IRQ_LOCOMO_SPI_BASE reads LOCOMO_SPIIR & 0x000F
- *   IRQ_LOCOMO_SPI_RFR
- *   IRQ_LOCOMO_SPI_RFW
- *   IRQ_LOCOMO_SPI_OVRN
- *   IRQ_LOCOMO_SPI_TEND
- */
-
-#define LOCOMO_IRQ_START        (IRQ_LOCOMO_KEY_BASE)
-#define LOCOMO_IRQ_KEY_START    (IRQ_LOCOMO_KEY)
-#define LOCOMO_IRQ_GPIO_START   (IRQ_LOCOMO_GPIO0)
-#define LOCOMO_IRQ_LT_START     (IRQ_LOCOMO_LT)
-#define LOCOMO_IRQ_SPI_START    (IRQ_LOCOMO_SPI_RFR)
-
 static void locomo_handler(unsigned int irq, struct irq_desc *desc)
 {
+        struct locomo *lchip = get_irq_chip_data(irq);
         int req, i;
-        void __iomem *mapbase = get_irq_chip_data(irq);
 
         /* Acknowledge the parent IRQ */
         desc->chip->ack(irq);
 
         /* check why this interrupt was generated */
-        req = locomo_readl(mapbase + LOCOMO_ICR) & 0x0f00;
+        req = locomo_readl(lchip->base + LOCOMO_ICR) & 0x0f00;
 
         if (req) {
                 /* generate the next interrupt(s) */
-                irq = LOCOMO_IRQ_START;
+                irq = lchip->irq_base;
                 for (i = 0; i <= 3; i++, irq++) {
                         if (req & (0x0100 << i)) {
                                 generic_handle_irq(irq);
@@ -195,20 +167,20 @@ static void locomo_ack_irq(unsigned int irq)
 
 static void locomo_mask_irq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chip_data(irq);
+        struct locomo *lchip = get_irq_chip_data(irq);
         unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_ICR);
-        r &= ~(0x0010 << (irq - LOCOMO_IRQ_START));
-        locomo_writel(r, mapbase + LOCOMO_ICR);
+        r = locomo_readl(lchip->base + LOCOMO_ICR);
+        r &= ~(0x0010 << (irq - lchip->irq_base));
+        locomo_writel(r, lchip->base + LOCOMO_ICR);
 }
 
 static void locomo_unmask_irq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chip_data(irq);
+        struct locomo *lchip = get_irq_chip_data(irq);
         unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_ICR);
-        r |= (0x0010 << (irq - LOCOMO_IRQ_START));
-        locomo_writel(r, mapbase + LOCOMO_ICR);
+        r = locomo_readl(lchip->base + LOCOMO_ICR);
+        r |= (0x0010 << (irq - lchip->irq_base));
+        locomo_writel(r, lchip->base + LOCOMO_ICR);
 }
 
 static struct irq_chip locomo_chip = {
@@ -218,297 +190,22 @@ static struct irq_chip locomo_chip = {
         .unmask = locomo_unmask_irq,
 };
 
-static void locomo_key_handler(unsigned int irq, struct irq_desc *desc)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-
-        if (locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC) & 0x0001) {
-                generic_handle_irq(LOCOMO_IRQ_KEY_START);
-        }
-}
-
-static void locomo_key_ack_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
-        r &= ~(0x0100 << (irq - LOCOMO_IRQ_KEY_START));
-        locomo_writel(r, mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
-}
-
-static void locomo_key_mask_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
-        r &= ~(0x0010 << (irq - LOCOMO_IRQ_KEY_START));
-        locomo_writel(r, mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
-}
-
-static void locomo_key_unmask_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
-        r |= (0x0010 << (irq - LOCOMO_IRQ_KEY_START));
-        locomo_writel(r, mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC);
-}
-
-static struct irq_chip locomo_key_chip = {
-        .name   = "LOCOMO-key",
-        .ack    = locomo_key_ack_irq,
-        .mask   = locomo_key_mask_irq,
-        .unmask = locomo_key_unmask_irq,
-};
-
-static void locomo_gpio_handler(unsigned int irq, struct irq_desc *desc)
-{
-        int req, i;
-        void __iomem *mapbase = get_irq_chip_data(irq);
-
-        req =   locomo_readl(mapbase + LOCOMO_GIR) &
-                locomo_readl(mapbase + LOCOMO_GPD) &
-                0xffff;
-
-        if (req) {
-                irq = LOCOMO_IRQ_GPIO_START;
-                for (i = 0; i <= 15; i++, irq++) {
-                        if (req & (0x0001 << i)) {
-                                generic_handle_irq(irq);
-                        }
-                }
-        }
-}
-
-static void locomo_gpio_ack_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_GWE);
-        r |= (0x0001 << (irq - LOCOMO_IRQ_GPIO_START));
-        locomo_writel(r, mapbase + LOCOMO_GWE);
-
-        r = locomo_readl(mapbase + LOCOMO_GIS);
-        r &= ~(0x0001 << (irq - LOCOMO_IRQ_GPIO_START));
-        locomo_writel(r, mapbase + LOCOMO_GIS);
-
-        r = locomo_readl(mapbase + LOCOMO_GWE);
-        r &= ~(0x0001 << (irq - LOCOMO_IRQ_GPIO_START));
-        locomo_writel(r, mapbase + LOCOMO_GWE);
-}
-
-static void locomo_gpio_mask_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_GIE);
-        r &= ~(0x0001 << (irq - LOCOMO_IRQ_GPIO_START));
-        locomo_writel(r, mapbase + LOCOMO_GIE);
-}
-
-static void locomo_gpio_unmask_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_GIE);
-        r |= (0x0001 << (irq - LOCOMO_IRQ_GPIO_START));
-        locomo_writel(r, mapbase + LOCOMO_GIE);
-}
-
-static int GPIO_IRQ_rising_edge;
-static int GPIO_IRQ_falling_edge;
-
-static int locomo_gpio_type(unsigned int irq, unsigned int type)
-{
-        unsigned int mask;
-        void __iomem *mapbase = get_irq_chip_data(irq);
-
-        mask = 1 << (irq - LOCOMO_IRQ_GPIO_START);
-
-        if (type == IRQ_TYPE_PROBE) {
-                if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask)
-                        return 0;
-                type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
-        }
-
-        if (type & IRQ_TYPE_EDGE_RISING)
-                GPIO_IRQ_rising_edge |= mask;
-        else
-                GPIO_IRQ_rising_edge &= ~mask;
-        if (type & IRQ_TYPE_EDGE_FALLING)
-                GPIO_IRQ_falling_edge |= mask;
-        else
-                GPIO_IRQ_falling_edge &= ~mask;
-        locomo_writel(GPIO_IRQ_rising_edge, mapbase + LOCOMO_GRIE);
-        locomo_writel(GPIO_IRQ_falling_edge, mapbase + LOCOMO_GFIE);
-
-        return 0;
-}
-
-static struct irq_chip locomo_gpio_chip = {
-        .name     = "LOCOMO-gpio",
-        .ack      = locomo_gpio_ack_irq,
-        .mask     = locomo_gpio_mask_irq,
-        .unmask   = locomo_gpio_unmask_irq,
-        .set_type = locomo_gpio_type,
-};
-
-static void locomo_lt_handler(unsigned int irq, struct irq_desc *desc)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-
-        if (locomo_readl(mapbase + LOCOMO_LTINT) & 0x0001) {
-                generic_handle_irq(LOCOMO_IRQ_LT_START);
-        }
-}
-
-static void locomo_lt_ack_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_LTINT);
-        r &= ~(0x0100 << (irq - LOCOMO_IRQ_LT_START));
-        locomo_writel(r, mapbase + LOCOMO_LTINT);
-}
-
-static void locomo_lt_mask_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_LTINT);
-        r &= ~(0x0010 << (irq - LOCOMO_IRQ_LT_START));
-        locomo_writel(r, mapbase + LOCOMO_LTINT);
-}
-
-static void locomo_lt_unmask_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_LTINT);
-        r |= (0x0010 << (irq - LOCOMO_IRQ_LT_START));
-        locomo_writel(r, mapbase + LOCOMO_LTINT);
-}
-
-static struct irq_chip locomo_lt_chip = {
-        .name   = "LOCOMO-lt",
-        .ack    = locomo_lt_ack_irq,
-        .mask   = locomo_lt_mask_irq,
-        .unmask = locomo_lt_unmask_irq,
-};
-
-static void locomo_spi_handler(unsigned int irq, struct irq_desc *desc)
-{
-        int req, i;
-        void __iomem *mapbase = get_irq_chip_data(irq);
-
-        req = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIR) & 0x000F;
-        if (req) {
-                irq = LOCOMO_IRQ_SPI_START;
-
-                for (i = 0; i <= 3; i++, irq++) {
-                        if (req & (0x0001 << i)) {
-                                generic_handle_irq(irq);
-                        }
-                }
-        }
-}
-
-static void locomo_spi_ack_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIWE);
-        r |= (0x0001 << (irq - LOCOMO_IRQ_SPI_START));
-        locomo_writel(r, mapbase + LOCOMO_SPI + LOCOMO_SPIWE);
-
-        r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIS);
-        r &= ~(0x0001 << (irq - LOCOMO_IRQ_SPI_START));
-        locomo_writel(r, mapbase + LOCOMO_SPI + LOCOMO_SPIIS);
-
-        r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIWE);
-        r &= ~(0x0001 << (irq - LOCOMO_IRQ_SPI_START));
-        locomo_writel(r, mapbase + LOCOMO_SPI + LOCOMO_SPIWE);
-}
-
-static void locomo_spi_mask_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIE);
-        r &= ~(0x0001 << (irq - LOCOMO_IRQ_SPI_START));
-        locomo_writel(r, mapbase + LOCOMO_SPI + LOCOMO_SPIIE);
-}
-
-static void locomo_spi_unmask_irq(unsigned int irq)
-{
-        void __iomem *mapbase = get_irq_chip_data(irq);
-        unsigned int r;
-        r = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIE);
-        r |= (0x0001 << (irq - LOCOMO_IRQ_SPI_START));
-        locomo_writel(r, mapbase + LOCOMO_SPI + LOCOMO_SPIIE);
-}
-
-static struct irq_chip locomo_spi_chip = {
-        .name   = "LOCOMO-spi",
-        .ack    = locomo_spi_ack_irq,
-        .mask   = locomo_spi_mask_irq,
-        .unmask = locomo_spi_unmask_irq,
-};
-
 static void locomo_setup_irq(struct locomo *lchip)
 {
-        int irq;
-        void __iomem *irqbase = lchip->base;
+        int irq = lchip->irq_base;
 
         /*
          * Install handler for IRQ_LOCOMO_HW.
          */
         set_irq_type(lchip->irq, IRQ_TYPE_EDGE_FALLING);
-        set_irq_chip_data(lchip->irq, irqbase);
+        set_irq_chip_data(lchip->irq, lchip);
         set_irq_chained_handler(lchip->irq, locomo_handler);
 
-        /* Install handlers for IRQ_LOCOMO_*_BASE */
-        set_irq_chip(IRQ_LOCOMO_KEY_BASE, &locomo_chip);
-        set_irq_chip_data(IRQ_LOCOMO_KEY_BASE, irqbase);
-        set_irq_chained_handler(IRQ_LOCOMO_KEY_BASE, locomo_key_handler);
-
-        set_irq_chip(IRQ_LOCOMO_GPIO_BASE, &locomo_chip);
-        set_irq_chip_data(IRQ_LOCOMO_GPIO_BASE, irqbase);
-        set_irq_chained_handler(IRQ_LOCOMO_GPIO_BASE, locomo_gpio_handler);
-
-        set_irq_chip(IRQ_LOCOMO_LT_BASE, &locomo_chip);
-        set_irq_chip_data(IRQ_LOCOMO_LT_BASE, irqbase);
-        set_irq_chained_handler(IRQ_LOCOMO_LT_BASE, locomo_lt_handler);
-
-        set_irq_chip(IRQ_LOCOMO_SPI_BASE, &locomo_chip);
-        set_irq_chip_data(IRQ_LOCOMO_SPI_BASE, irqbase);
-        set_irq_chained_handler(IRQ_LOCOMO_SPI_BASE, locomo_spi_handler);
-
-        /* install handlers for IRQ_LOCOMO_KEY_BASE generated interrupts */
-        set_irq_chip(LOCOMO_IRQ_KEY_START, &locomo_key_chip);
-        set_irq_chip_data(LOCOMO_IRQ_KEY_START, irqbase);
-        set_irq_handler(LOCOMO_IRQ_KEY_START, handle_edge_irq);
-        set_irq_flags(LOCOMO_IRQ_KEY_START, IRQF_VALID | IRQF_PROBE);
-
-        /* install handlers for IRQ_LOCOMO_GPIO_BASE generated interrupts */
-        for (irq = LOCOMO_IRQ_GPIO_START; irq < LOCOMO_IRQ_GPIO_START + 16; irq++) {
-                set_irq_chip(irq, &locomo_gpio_chip);
-                set_irq_chip_data(irq, irqbase);
-                set_irq_handler(irq, handle_edge_irq);
-                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
-        }
-
-        /* install handlers for IRQ_LOCOMO_LT_BASE generated interrupts */
-        set_irq_chip(LOCOMO_IRQ_LT_START, &locomo_lt_chip);
-        set_irq_chip_data(LOCOMO_IRQ_LT_START, irqbase);
-        set_irq_handler(LOCOMO_IRQ_LT_START, handle_edge_irq);
-        set_irq_flags(LOCOMO_IRQ_LT_START, IRQF_VALID | IRQF_PROBE);
-
-        /* install handlers for IRQ_LOCOMO_SPI_BASE generated interrupts */
-        for (irq = LOCOMO_IRQ_SPI_START; irq < LOCOMO_IRQ_SPI_START + 4; irq++) {
-                set_irq_chip(irq, &locomo_spi_chip);
-                set_irq_chip_data(irq, irqbase);
-                set_irq_handler(irq, handle_edge_irq);
+        /* Install handlers for IRQ_LOCOMO_* */
+        for ( ; irq <= lchip->irq_base + 3; irq++) {
+                set_irq_chip(irq, &locomo_chip);
+                set_irq_chip_data(irq, lchip);
+                set_irq_handler(irq, handle_level_irq);
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
 }
@@ -555,7 +252,8 @@ locomo_init_one_child(struct locomo *lchip, struct locomo_dev_info *info)
                 dev->mapbase = 0;
         dev->length = info->length;
 
-        memmove(dev->irq, info->irq, sizeof(dev->irq));
+        dev->irq[0] = (lchip->irq_base == NO_IRQ) ?
+                        NO_IRQ : lchip->irq_base + info->irq[0];
 
         ret = device_register(&dev->dev);
         if (ret) {
@@ -592,7 +290,7 @@ static int locomo_suspend(struct platform_device *dev, pm_message_t state)
         save->LCM_GPO     = locomo_readl(lchip->base + LOCOMO_GPO);     /* GPIO */
         locomo_writel(0x00, lchip->base + LOCOMO_GPO);
         save->LCM_SPICT   = locomo_readl(lchip->base + LOCOMO_SPI + LOCOMO_SPICT);      /* SPI */
-        locomo_writel(0x40, lchip->base + LOCOMO_SPICT);
+        locomo_writel(0x40, lchip->base + LOCOMO_SPI + LOCOMO_SPICT);
         save->LCM_GPE     = locomo_readl(lchip->base + LOCOMO_GPE);     /* GPIO */
         locomo_writel(0x00, lchip->base + LOCOMO_GPE);
         save->LCM_ASD     = locomo_readl(lchip->base + LOCOMO_ASD);     /* ADSTART */
@@ -672,6 +370,7 @@ static int locomo_resume(struct platform_device *dev)
 static int
 __locomo_probe(struct device *me, struct resource *mem, int irq)
 {
+        struct locomo_platform_data *pdata = me->platform_data;
         struct locomo *lchip;
         unsigned long r;
         int i, ret = -ENODEV;
@@ -687,6 +386,7 @@ __locomo_probe(struct device *me, struct resource *mem, int irq)
 
         lchip->phys = mem->start;
         lchip->irq = irq;
+        lchip->irq_base = (pdata) ? pdata->irq_base : NO_IRQ;
 
         /*
          * Map the whole region.  This also maps the
@@ -718,7 +418,7 @@ __locomo_probe(struct device *me, struct resource *mem, int irq)
         /* Longtime timer */
         locomo_writel(0, lchip->base + LOCOMO_LTINT);
         /* SPI */
-        locomo_writel(0, lchip->base + LOCOMO_SPIIE);
+        locomo_writel(0, lchip->base + LOCOMO_SPI + LOCOMO_SPIIE);
 
         locomo_writel(6 + 8 + 320 + 30 - 10, lchip->base + LOCOMO_ASD);
         r = locomo_readl(lchip->base + LOCOMO_ASD);
@@ -753,7 +453,7 @@ __locomo_probe(struct device *me, struct resource *mem, int irq)
          * The interrupt controller must be initialised before any
          * other device to ensure that the interrupts are available.
          */
-        if (lchip->irq != NO_IRQ)
+        if (lchip->irq != NO_IRQ && lchip->irq_base != NO_IRQ)
                 locomo_setup_irq(lchip);
 
         for (i = 0; i < ARRAY_SIZE(locomo_devices); i++)
@@ -1007,7 +707,7 @@ void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int
         udelay(DAC_SCL_HIGH_HOLD_TIME); /* 4.7 usec */
         if (locomo_readl(mapbase + LOCOMO_DAC) & LOCOMO_DAC_SDAOEB) {   /* High is error */
                 printk(KERN_WARNING "locomo: m62332_senddata Error 1\n");
-                return;
+                goto out;
         }
 
         /* Send Sub address (LSB is channel select) */
@@ -1035,7 +735,7 @@ void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int
         udelay(DAC_SCL_HIGH_HOLD_TIME); /* 4.7 usec */
         if (locomo_readl(mapbase + LOCOMO_DAC) & LOCOMO_DAC_SDAOEB) {   /* High is error */
                 printk(KERN_WARNING "locomo: m62332_senddata Error 2\n");
-                return;
+                goto out;
         }
 
         /* Send DAC data */
@@ -1060,9 +760,9 @@ void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int
         udelay(DAC_SCL_HIGH_HOLD_TIME); /* 4.7 usec */
         if (locomo_readl(mapbase + LOCOMO_DAC) & LOCOMO_DAC_SDAOEB) {   /* High is error */
                 printk(KERN_WARNING "locomo: m62332_senddata Error 3\n");
-                return;
         }
 
+out:
         /* stop */
         r = locomo_readl(mapbase + LOCOMO_DAC);
         r &=  ~(LOCOMO_DAC_SCLOEB);
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index 8ba7044c554..a52a27c1d9b 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -35,6 +35,58 @@
 
 #include <asm/hardware/sa1111.h>
 
+/* SA1111 IRQs */
+#define IRQ_GPAIN0              (0)
+#define IRQ_GPAIN1              (1)
+#define IRQ_GPAIN2              (2)
+#define IRQ_GPAIN3              (3)
+#define IRQ_GPBIN0              (4)
+#define IRQ_GPBIN1              (5)
+#define IRQ_GPBIN2              (6)
+#define IRQ_GPBIN3              (7)
+#define IRQ_GPBIN4              (8)
+#define IRQ_GPBIN5              (9)
+#define IRQ_GPCIN0              (10)
+#define IRQ_GPCIN1              (11)
+#define IRQ_GPCIN2              (12)
+#define IRQ_GPCIN3              (13)
+#define IRQ_GPCIN4              (14)
+#define IRQ_GPCIN5              (15)
+#define IRQ_GPCIN6              (16)
+#define IRQ_GPCIN7              (17)
+#define IRQ_MSTXINT             (18)
+#define IRQ_MSRXINT             (19)
+#define IRQ_MSSTOPERRINT        (20)
+#define IRQ_TPTXINT             (21)
+#define IRQ_TPRXINT             (22)
+#define IRQ_TPSTOPERRINT        (23)
+#define SSPXMTINT               (24)
+#define SSPRCVINT               (25)
+#define SSPROR                  (26)
+#define AUDXMTDMADONEA          (32)
+#define AUDRCVDMADONEA          (33)
+#define AUDXMTDMADONEB          (34)
+#define AUDRCVDMADONEB          (35)
+#define AUDTFSR                 (36)
+#define AUDRFSR                 (37)
+#define AUDTUR                  (38)
+#define AUDROR                  (39)
+#define AUDDTS                  (40)
+#define AUDRDD                  (41)
+#define AUDSTO                  (42)
+#define IRQ_USBPWR              (43)
+#define IRQ_HCIM                (44)
+#define IRQ_HCIBUFFACC          (45)
+#define IRQ_HCIRMTWKP           (46)
+#define IRQ_NHCIMFCIR           (47)
+#define IRQ_USB_PORT_RESUME     (48)
+#define IRQ_S0_READY_NINT       (49)
+#define IRQ_S1_READY_NINT       (50)
+#define IRQ_S0_CD_VALID         (51)
+#define IRQ_S1_CD_VALID         (52)
+#define IRQ_S0_BVD1_STSCHG      (53)
+#define IRQ_S1_BVD1_STSCHG      (54)
+
 extern void __init sa1110_mb_enable(void);
 
 /*
@@ -49,6 +101,7 @@ struct sa1111 {
         struct clk      *clk;
         unsigned long   phys;
         int             irq;
+        int             irq_base;       /* base for cascaded on-chip IRQs */
         spinlock_t      lock;
         void __iomem    *base;
 #ifdef CONFIG_PM
@@ -152,36 +205,37 @@ static void
 sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
         unsigned int stat0, stat1, i;
-        void __iomem *base = get_irq_data(irq);
+        struct sa1111 *sachip = get_irq_data(irq);
+        void __iomem *mapbase = sachip->base + SA1111_INTC;
 
-        stat0 = sa1111_readl(base + SA1111_INTSTATCLR0);
-        stat1 = sa1111_readl(base + SA1111_INTSTATCLR1);
+        stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0);
+        stat1 = sa1111_readl(mapbase + SA1111_INTSTATCLR1);
 
-        sa1111_writel(stat0, base + SA1111_INTSTATCLR0);
+        sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0);
 
         desc->chip->ack(irq);
 
-        sa1111_writel(stat1, base + SA1111_INTSTATCLR1);
+        sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1);
 
         if (stat0 == 0 && stat1 == 0) {
                 do_bad_IRQ(irq, desc);
                 return;
         }
 
-        for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1)
+        for (i = 0; stat0; i++, stat0 >>= 1)
                 if (stat0 & 1)
-                        handle_edge_irq(i, irq_desc + i);
+                        generic_handle_irq(i + sachip->irq_base);
 
-        for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1)
+        for (i = 32; stat1; i++, stat1 >>= 1)
                 if (stat1 & 1)
-                        handle_edge_irq(i, irq_desc + i);
+                        generic_handle_irq(i + sachip->irq_base);
 
         /* For level-based interrupts */
         desc->chip->unmask(irq);
 }
 
-#define SA1111_IRQMASK_LO(x)    (1 << (x - IRQ_SA1111_START))
-#define SA1111_IRQMASK_HI(x)    (1 << (x - IRQ_SA1111_START - 32))
+#define SA1111_IRQMASK_LO(x)    (1 << (x - sachip->irq_base))
+#define SA1111_IRQMASK_HI(x)    (1 << (x - sachip->irq_base - 32))
 
 static void sa1111_ack_irq(unsigned int irq)
 {
@@ -189,7 +243,8 @@ static void sa1111_ack_irq(unsigned int irq)
 
 static void sa1111_mask_lowirq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chip_data(irq);
+        struct sa1111 *sachip = get_irq_chip_data(irq);
+        void __iomem *mapbase = sachip->base + SA1111_INTC;
         unsigned long ie0;
 
         ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
@@ -199,7 +254,8 @@ static void sa1111_mask_lowirq(unsigned int irq)
 
 static void sa1111_unmask_lowirq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chip_data(irq);
+        struct sa1111 *sachip = get_irq_chip_data(irq);
+        void __iomem *mapbase = sachip->base + SA1111_INTC;
         unsigned long ie0;
 
         ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
@@ -216,8 +272,9 @@ static void sa1111_unmask_lowirq(unsigned int irq)
  */
 static int sa1111_retrigger_lowirq(unsigned int irq)
 {
+        struct sa1111 *sachip = get_irq_chip_data(irq);
+        void __iomem *mapbase = sachip->base + SA1111_INTC;
         unsigned int mask = SA1111_IRQMASK_LO(irq);
-        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned long ip0;
         int i;
 
@@ -237,8 +294,9 @@ static int sa1111_retrigger_lowirq(unsigned int irq)
 
 static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
 {
+        struct sa1111 *sachip = get_irq_chip_data(irq);
+        void __iomem *mapbase = sachip->base + SA1111_INTC;
         unsigned int mask = SA1111_IRQMASK_LO(irq);
-        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned long ip0;
 
         if (flags == IRQ_TYPE_PROBE)
@@ -260,8 +318,9 @@ static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
 
 static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)
 {
+        struct sa1111 *sachip = get_irq_chip_data(irq);
+        void __iomem *mapbase = sachip->base + SA1111_INTC;
         unsigned int mask = SA1111_IRQMASK_LO(irq);
-        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned long we0;
 
         we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
@@ -286,7 +345,8 @@ static struct irq_chip sa1111_low_chip = {
 
 static void sa1111_mask_highirq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chip_data(irq);
+        struct sa1111 *sachip = get_irq_chip_data(irq);
+        void __iomem *mapbase = sachip->base + SA1111_INTC;
         unsigned long ie1;
 
         ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
@@ -296,7 +356,8 @@ static void sa1111_mask_highirq(unsigned int irq)
 
 static void sa1111_unmask_highirq(unsigned int irq)
 {
-        void __iomem *mapbase = get_irq_chip_data(irq);
+        struct sa1111 *sachip = get_irq_chip_data(irq);
+        void __iomem *mapbase = sachip->base + SA1111_INTC;
         unsigned long ie1;
 
         ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
@@ -313,8 +374,9 @@ static void sa1111_unmask_highirq(unsigned int irq)
  */
 static int sa1111_retrigger_highirq(unsigned int irq)
 {
+        struct sa1111 *sachip = get_irq_chip_data(irq);
+        void __iomem *mapbase = sachip->base + SA1111_INTC;
         unsigned int mask = SA1111_IRQMASK_HI(irq);
-        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned long ip1;
         int i;
 
@@ -334,8 +396,9 @@ static int sa1111_retrigger_highirq(unsigned int irq)
 
 static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
 {
+        struct sa1111 *sachip = get_irq_chip_data(irq);
+        void __iomem *mapbase = sachip->base + SA1111_INTC;
         unsigned int mask = SA1111_IRQMASK_HI(irq);
-        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned long ip1;
 
         if (flags == IRQ_TYPE_PROBE)
@@ -357,8 +420,9 @@ static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
 
 static int sa1111_wake_highirq(unsigned int irq, unsigned int on)
 {
+        struct sa1111 *sachip = get_irq_chip_data(irq);
+        void __iomem *mapbase = sachip->base + SA1111_INTC;
         unsigned int mask = SA1111_IRQMASK_HI(irq);
-        void __iomem *mapbase = get_irq_chip_data(irq);
         unsigned long we1;
 
         we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
@@ -412,14 +476,14 @@ static void sa1111_setup_irq(struct sa1111 *sachip)
 
         for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) {
                 set_irq_chip(irq, &sa1111_low_chip);
-                set_irq_chip_data(irq, irqbase);
+                set_irq_chip_data(irq, sachip);
                 set_irq_handler(irq, handle_edge_irq);
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
 
         for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) {
                 set_irq_chip(irq, &sa1111_high_chip);
-                set_irq_chip_data(irq, irqbase);
+                set_irq_chip_data(irq, sachip);
                 set_irq_handler(irq, handle_edge_irq);
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
@@ -428,7 +492,7 @@ static void sa1111_setup_irq(struct sa1111 *sachip)
          * Register SA1111 interrupt
          */
         set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
-        set_irq_data(sachip->irq, irqbase);
+        set_irq_data(sachip->irq, sachip);
         set_irq_chained_handler(sachip->irq, sa1111_irq_handler);
 }
 
diff --git a/arch/arm/common/scoop.c b/arch/arm/common/scoop.c
index 37bda5f3dde..9012004321d 100644
--- a/arch/arm/common/scoop.c
+++ b/arch/arm/common/scoop.c
@@ -140,6 +140,7 @@ EXPORT_SYMBOL(reset_scoop);
 EXPORT_SYMBOL(read_scoop_reg);
 EXPORT_SYMBOL(write_scoop_reg);
 
+#ifdef CONFIG_PM
 static void check_scoop_reg(struct scoop_dev *sdev)
 {
         unsigned short mcr;
@@ -149,7 +150,6 @@ static void check_scoop_reg(struct scoop_dev *sdev)
                 iowrite16(0x0101, sdev->base + SCOOP_MCR);
 }
 
-#ifdef CONFIG_PM
 static int scoop_suspend(struct platform_device *dev, pm_message_t state)
 {
         struct scoop_dev *sdev = platform_get_drvdata(dev);
diff --git a/arch/arm/configs/ap4evb_defconfig b/arch/arm/configs/ap4evb_defconfig
new file mode 100644
index 00000000000..e14229be767
--- /dev/null
+++ b/arch/arm/configs/ap4evb_defconfig
@@ -0,0 +1,779 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.33-rc7
+# Mon Feb  8 12:25:36 2010
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_LZO=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+# CONFIG_MODULES is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+CONFIG_DEFAULT_NOOP=y
+CONFIG_DEFAULT_IOSCHED="noop"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+CONFIG_INLINE_SPIN_UNLOCK=y
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+CONFIG_INLINE_READ_UNLOCK=y
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+CONFIG_INLINE_WRITE_UNLOCK=y
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+CONFIG_ARCH_SHMOBILE=y
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
+
+#
+# SH-Mobile System Type
+#
+# CONFIG_ARCH_SH7367 is not set
+# CONFIG_ARCH_SH7377 is not set
+CONFIG_ARCH_SH7372=y
+
+#
+# SH-Mobile Board Type
+#
+CONFIG_MACH_AP4EVB=y
+
+#
+# SH-Mobile System Configuration
+#
+
+#
+# Memory configuration
+#
+CONFIG_MEMORY_START=0x40000000
+CONFIG_MEMORY_SIZE=0x10000000
+
+#
+# Timer and clock configuration
+#
+CONFIG_SH_TIMER_CMT=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_V7=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_ARM_THUMBEE is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_HAS_TLS_REG=y
+CONFIG_ARM_L1_CACHE_SHIFT=5
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_ARM_ERRATA_458693 is not set
+# CONFIG_ARM_ERRATA_460075 is not set
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+# CONFIG_THUMB2_KERNEL is not set
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="console=ttySC0,115200 earlyprintk=sh-sci.0,115200"
+# CONFIG_XIP_KERNEL is not set
+CONFIG_KEXEC=y
+CONFIG_ATAGS_PROC=y
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+# CONFIG_SUSPEND is not set
+# CONFIG_APM_EMULATION is not set
+# CONFIG_PM_RUNTIME is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_NET is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_FIRMWARE_IN_KERNEL is not set
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+# CONFIG_BLK_DEV is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=8
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_FSNOTIFY is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+# CONFIG_MISC_FILESYSTEMS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_DETECT_SOFTLOCKUP is not set
+# CONFIG_DETECT_HUNG_TASK is not set
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+# CONFIG_DEBUG_USER is not set
+# CONFIG_DEBUG_ERRORS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+# CONFIG_OC_ETM is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+# CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+# CONFIG_CRC32 is not set
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_LZO=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/bcmring_defconfig b/arch/arm/configs/bcmring_defconfig
index 1e12167c89b..6ac6693299b 100644
--- a/arch/arm/configs/bcmring_defconfig
+++ b/arch/arm/configs/bcmring_defconfig
@@ -1,13 +1,13 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.31-rc3
-# Fri Jul 17 12:07:28 2009
+# Linux kernel version: 2.6.34-rc2
+# Mon Mar 29 12:01:41 2010
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_MMU=y
+CONFIG_HAVE_PROC_CPU=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_STACKTRACE_SUPPORT=y
 CONFIG_HAVE_LATENCYTOP_SUPPORT=y
@@ -18,6 +18,7 @@ CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_VECTORS_BASE=0xffff0000
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
@@ -32,6 +33,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 # CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -43,21 +50,22 @@ CONFIG_SYSVIPC_SYSCTL=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=17
-# CONFIG_GROUP_SCHED is not set
-# CONFIG_CGROUPS is not set
 # CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 # CONFIG_BLK_DEV_INITRD is not set
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 CONFIG_EMBEDDED=y
 CONFIG_UID16=y
 CONFIG_SYSCTL_SYSCALL=y
@@ -75,19 +83,21 @@ CONFIG_FUTEX=y
 # CONFIG_EVENTFD is not set
 CONFIG_SHMEM=y
 # CONFIG_AIO is not set
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+CONFIG_PERF_EVENTS=y
+CONFIG_PERF_COUNTERS=y
 # CONFIG_VM_EVENT_COUNTERS is not set
 # CONFIG_SLUB_DEBUG is not set
-# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_COMPAT_BRK is not set
 # CONFIG_SLAB is not set
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_KPROBES=y
@@ -115,24 +125,53 @@ CONFIG_LBDAF=y
 # IO Schedulers
 #
 CONFIG_IOSCHED_NOOP=y
-# CONFIG_IOSCHED_AS is not set
 # CONFIG_IOSCHED_DEADLINE is not set
 # CONFIG_IOSCHED_CFQ is not set
-# CONFIG_DEFAULT_AS is not set
 # CONFIG_DEFAULT_DEADLINE is not set
 # CONFIG_DEFAULT_CFQ is not set
 CONFIG_DEFAULT_NOOP=y
 CONFIG_DEFAULT_IOSCHED="noop"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
 # CONFIG_FREEZER is not set
 
 #
 # System Type
 #
+CONFIG_MMU=y
 # CONFIG_ARCH_AAEC2000 is not set
 # CONFIG_ARCH_INTEGRATOR is not set
 # CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_VERSATILE is not set
 # CONFIG_ARCH_AT91 is not set
+CONFIG_ARCH_BCMRING=y
 # CONFIG_ARCH_CLPS711X is not set
 # CONFIG_ARCH_GEMINI is not set
 # CONFIG_ARCH_EBSA110 is not set
@@ -149,6 +188,7 @@ CONFIG_DEFAULT_IOSCHED="noop"
 # CONFIG_ARCH_IXP2000 is not set
 # CONFIG_ARCH_IXP4XX is not set
 # CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
 # CONFIG_ARCH_KIRKWOOD is not set
 # CONFIG_ARCH_LOKI is not set
 # CONFIG_ARCH_MV78XX0 is not set
@@ -157,19 +197,26 @@ CONFIG_DEFAULT_IOSCHED="noop"
 # CONFIG_ARCH_KS8695 is not set
 # CONFIG_ARCH_NS9XXX is not set
 # CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_NUC93X is not set
 # CONFIG_ARCH_PNX4008 is not set
 # CONFIG_ARCH_PXA is not set
 # CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_SHMOBILE is not set
 # CONFIG_ARCH_RPC is not set
 # CONFIG_ARCH_SA1100 is not set
 # CONFIG_ARCH_S3C2410 is not set
 # CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5P6440 is not set
+# CONFIG_ARCH_S5P6442 is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_S5PV210 is not set
 # CONFIG_ARCH_SHARK is not set
 # CONFIG_ARCH_LH7A40X is not set
 # CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_U8500 is not set
+# CONFIG_ARCH_NOMADIK is not set
 # CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
-CONFIG_ARCH_BCMRING=y
 # CONFIG_ARCH_FPGA11107 is not set
 CONFIG_ARCH_BCM11107=y
 
@@ -185,7 +232,7 @@ CONFIG_CPU_V6=y
 CONFIG_CPU_32v6K=y
 CONFIG_CPU_32v6=y
 CONFIG_CPU_ABRT_EV6=y
-CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_PABRT_V6=y
 CONFIG_CPU_CACHE_V6=y
 CONFIG_CPU_CACHE_VIPT=y
 CONFIG_CPU_COPY_V6=y
@@ -201,6 +248,8 @@ CONFIG_ARM_THUMB=y
 # CONFIG_CPU_ICACHE_DISABLE is not set
 # CONFIG_CPU_DCACHE_DISABLE is not set
 # CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
+CONFIG_CPU_HAS_PMU=y
 # CONFIG_ARM_ERRATA_411920 is not set
 CONFIG_COMMON_CLKDEV=y
 
@@ -222,6 +271,8 @@ CONFIG_VMSPLIT_3G=y
 # CONFIG_VMSPLIT_2G is not set
 # CONFIG_VMSPLIT_1G is not set
 CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
 CONFIG_PREEMPT=y
 CONFIG_HZ=100
 CONFIG_AEABI=y
@@ -229,6 +280,7 @@ CONFIG_AEABI=y
 # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
 # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
 # CONFIG_HIGHMEM is not set
+CONFIG_HW_PERF_EVENTS=y
 CONFIG_SELECT_MEMORY_MODEL=y
 CONFIG_FLATMEM_MANUAL=y
 # CONFIG_DISCONTIGMEM_MANUAL is not set
@@ -240,8 +292,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=0
 CONFIG_VIRT_TO_BUS=y
-CONFIG_HAVE_MLOCK=y
-CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 CONFIG_ALIGNMENT_TRAP=y
 CONFIG_UACCESS_WITH_MEMCPY=y
@@ -335,9 +386,9 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 CONFIG_MTD_CONCAT=y
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_AFS_PARTS is not set
@@ -433,6 +484,10 @@ CONFIG_MTD_NAND_BCM_UMI_HWCS=y
 CONFIG_BLK_DEV=y
 # CONFIG_BLK_DEV_COW_COMMON is not set
 # CONFIG_BLK_DEV_LOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
 # CONFIG_BLK_DEV_NBD is not set
 # CONFIG_BLK_DEV_RAM is not set
 # CONFIG_CDROM_PKTCDVD is not set
@@ -444,6 +499,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -452,6 +508,7 @@ CONFIG_HAVE_IDE=y
 # CONFIG_MD is not set
 # CONFIG_NETDEVICES is not set
 # CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
 
 #
 # Input device support
@@ -459,6 +516,7 @@ CONFIG_HAVE_IDE=y
 CONFIG_INPUT=y
 # CONFIG_INPUT_FF_MEMLESS is not set
 # CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
 
 #
 # Userland interfaces
@@ -508,6 +566,7 @@ CONFIG_SERIAL_AMBA_PL011=y
 CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 CONFIG_LEGACY_PTYS=y
@@ -519,13 +578,17 @@ CONFIG_LEGACY_PTY_COUNT=64
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
 # CONFIG_GPIOLIB is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -541,6 +604,7 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
+# CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
 #
@@ -566,14 +630,17 @@ CONFIG_DUMMY_CONSOLE=y
 # CONFIG_USB_SUPPORT is not set
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
-# CONFIG_ACCESSIBILITY is not set
 # CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
 CONFIG_RTC_LIB=y
 # CONFIG_RTC_CLASS is not set
 # CONFIG_DMADEVICES is not set
 # CONFIG_AUXDISPLAY is not set
-# CONFIG_REGULATOR is not set
 # CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
 # CONFIG_STAGING is not set
 
 #
@@ -589,9 +656,12 @@ CONFIG_FS_POSIX_ACL=y
 # CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 # CONFIG_FILE_LOCKING is not set
 # CONFIG_FSNOTIFY is not set
+# CONFIG_DNOTIFY is not set
 # CONFIG_INOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
 # CONFIG_QUOTA is not set
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
@@ -647,6 +717,7 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -657,7 +728,6 @@ CONFIG_JFFS2_RTIME=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 # CONFIG_NETWORK_FILESYSTEMS is not set
 
 #
@@ -675,11 +745,12 @@ CONFIG_MSDOS_PARTITION=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 CONFIG_HEADERS_CHECK=y
 # CONFIG_DEBUG_KERNEL is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_MEMORY_INIT is not set
 CONFIG_FRAME_POINTER=y
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
@@ -693,6 +764,7 @@ CONFIG_TRACING_SUPPORT=y
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_ARM_UNWIND is not set
 # CONFIG_DEBUG_USER is not set
+# CONFIG_OC_ETM is not set
 
 #
 # Security options
@@ -700,7 +772,11 @@ CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KEYS is not set
 # CONFIG_SECURITY is not set
 # CONFIG_SECURITYFS is not set
-# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
 # CONFIG_CRYPTO is not set
 # CONFIG_BINARY_PRINTF is not set
 
diff --git a/arch/arm/configs/cm_t35_defconfig b/arch/arm/configs/cm_t35_defconfig
index 893cd267e07..032b49bad91 100644
--- a/arch/arm/configs/cm_t35_defconfig
+++ b/arch/arm/configs/cm_t35_defconfig
@@ -358,7 +358,7 @@ CONFIG_PM_SLEEP=y
 CONFIG_SUSPEND=y
 CONFIG_SUSPEND_FREEZER=y
 # CONFIG_APM_EMULATION is not set
-# CONFIG_PM_RUNTIME is not set
+CONFIG_PM_RUNTIME=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_NET=y
 
diff --git a/arch/arm/configs/g3evm_defconfig b/arch/arm/configs/g3evm_defconfig
new file mode 100644
index 00000000000..3c19031961d
--- /dev/null
+++ b/arch/arm/configs/g3evm_defconfig
@@ -0,0 +1,774 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.33-rc7
+# Mon Feb  8 12:20:01 2010
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_LZO=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+# CONFIG_MODULES is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+CONFIG_DEFAULT_NOOP=y
+CONFIG_DEFAULT_IOSCHED="noop"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+CONFIG_INLINE_SPIN_UNLOCK=y
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+CONFIG_INLINE_READ_UNLOCK=y
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+CONFIG_INLINE_WRITE_UNLOCK=y
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+CONFIG_ARCH_SHMOBILE=y
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
+
+#
+# SH-Mobile System Type
+#
+CONFIG_ARCH_SH7367=y
+# CONFIG_ARCH_SH7377 is not set
+# CONFIG_ARCH_SH7372 is not set
+
+#
+# SH-Mobile Board Type
+#
+CONFIG_MACH_G3EVM=y
+
+#
+# SH-Mobile System Configuration
+#
+
+#
+# Memory configuration
+#
+CONFIG_MEMORY_START=0x50000000
+CONFIG_MEMORY_SIZE=0x08000000
+
+#
+# Timer and clock configuration
+#
+CONFIG_SH_TIMER_CMT=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_V6=y
+# CONFIG_CPU_32v6K is not set
+CONFIG_CPU_32v6=y
+CONFIG_CPU_ABRT_EV6=y
+CONFIG_CPU_PABRT_V6=y
+CONFIG_CPU_CACHE_V6=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V6=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
+# CONFIG_ARM_ERRATA_411920 is not set
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="console=ttySC1,115200 earlyprintk=sh-sci.1,115200"
+# CONFIG_XIP_KERNEL is not set
+CONFIG_KEXEC=y
+CONFIG_ATAGS_PROC=y
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+# CONFIG_SUSPEND is not set
+# CONFIG_APM_EMULATION is not set
+# CONFIG_PM_RUNTIME is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_NET is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_FIRMWARE_IN_KERNEL is not set
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+# CONFIG_BLK_DEV is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=8
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_FSNOTIFY is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+# CONFIG_MISC_FILESYSTEMS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_DETECT_SOFTLOCKUP is not set
+# CONFIG_DETECT_HUNG_TASK is not set
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+# CONFIG_DEBUG_USER is not set
+# CONFIG_DEBUG_ERRORS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+# CONFIG_OC_ETM is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+# CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+# CONFIG_CRC32 is not set
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_LZO=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/g4evm_defconfig b/arch/arm/configs/g4evm_defconfig
new file mode 100644
index 00000000000..8ee79a53713
--- /dev/null
+++ b/arch/arm/configs/g4evm_defconfig
@@ -0,0 +1,779 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.33-rc7
+# Mon Feb  8 12:21:35 2010
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_LZO=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+# CONFIG_MODULES is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+CONFIG_DEFAULT_NOOP=y
+CONFIG_DEFAULT_IOSCHED="noop"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+CONFIG_INLINE_SPIN_UNLOCK=y
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+CONFIG_INLINE_READ_UNLOCK=y
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+CONFIG_INLINE_WRITE_UNLOCK=y
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+CONFIG_ARCH_SHMOBILE=y
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
+
+#
+# SH-Mobile System Type
+#
+# CONFIG_ARCH_SH7367 is not set
+CONFIG_ARCH_SH7377=y
+# CONFIG_ARCH_SH7372 is not set
+
+#
+# SH-Mobile Board Type
+#
+CONFIG_MACH_G4EVM=y
+
+#
+# SH-Mobile System Configuration
+#
+
+#
+# Memory configuration
+#
+CONFIG_MEMORY_START=0x40000000
+CONFIG_MEMORY_SIZE=0x08000000
+
+#
+# Timer and clock configuration
+#
+CONFIG_SH_TIMER_CMT=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_V7=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_ARM_THUMBEE is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_HAS_TLS_REG=y
+CONFIG_ARM_L1_CACHE_SHIFT=5
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_ARM_ERRATA_458693 is not set
+# CONFIG_ARM_ERRATA_460075 is not set
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+# CONFIG_THUMB2_KERNEL is not set
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="console=ttySC4,115200 earlyprintk=sh-sci.4,115200"
+# CONFIG_XIP_KERNEL is not set
+CONFIG_KEXEC=y
+CONFIG_ATAGS_PROC=y
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+# CONFIG_SUSPEND is not set
+# CONFIG_APM_EMULATION is not set
+# CONFIG_PM_RUNTIME is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_NET is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_FIRMWARE_IN_KERNEL is not set
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+# CONFIG_BLK_DEV is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=8
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_FSNOTIFY is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+# CONFIG_MISC_FILESYSTEMS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_DETECT_SOFTLOCKUP is not set
+# CONFIG_DETECT_HUNG_TASK is not set
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+# CONFIG_DEBUG_USER is not set
+# CONFIG_DEBUG_ERRORS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+# CONFIG_OC_ETM is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+# CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+# CONFIG_CRC32 is not set
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_LZO=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/imote2_defconfig b/arch/arm/configs/imote2_defconfig
new file mode 100644
index 00000000000..95d2becfc66
--- /dev/null
+++ b/arch/arm/configs/imote2_defconfig
@@ -0,0 +1,2077 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.33-rc8
+# Sat Feb 13 21:48:53 2010
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_ARCH_HAS_CPUFREQ=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+# CONFIG_RD_LZO is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+CONFIG_SLOW_WORK=y
+# CONFIG_SLOW_WORK_DEBUG is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_DEFAULT_DEADLINE=y
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="deadline"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+CONFIG_FREEZER=y
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+CONFIG_ARCH_PXA=y
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
+
+#
+# Intel PXA2xx/PXA3xx Implementations
+#
+
+#
+# Intel/Marvell Dev Platforms (sorted by hardware release time)
+#
+# CONFIG_ARCH_LUBBOCK is not set
+# CONFIG_MACH_MAINSTONE is not set
+# CONFIG_MACH_ZYLONITE300 is not set
+# CONFIG_MACH_ZYLONITE320 is not set
+# CONFIG_MACH_LITTLETON is not set
+# CONFIG_MACH_TAVOREVB is not set
+# CONFIG_MACH_SAAR is not set
+
+#
+# Third Party Dev Platforms (sorted by vendor name)
+#
+# CONFIG_ARCH_PXA_IDP is not set
+# CONFIG_ARCH_VIPER is not set
+# CONFIG_MACH_ARCOM_ZEUS is not set
+# CONFIG_MACH_BALLOON3 is not set
+# CONFIG_MACH_CSB726 is not set
+# CONFIG_MACH_ARMCORE is not set
+# CONFIG_MACH_EM_X270 is not set
+# CONFIG_MACH_EXEDA is not set
+# CONFIG_MACH_CM_X300 is not set
+# CONFIG_ARCH_GUMSTIX is not set
+CONFIG_MACH_INTELMOTE2=y
+# CONFIG_MACH_STARGATE2 is not set
+# CONFIG_MACH_XCEP is not set
+# CONFIG_TRIZEPS_PXA is not set
+# CONFIG_MACH_LOGICPD_PXA270 is not set
+# CONFIG_MACH_PCM027 is not set
+# CONFIG_MACH_COLIBRI is not set
+# CONFIG_MACH_COLIBRI300 is not set
+# CONFIG_MACH_COLIBRI320 is not set
+
+#
+# End-user Products (sorted by vendor name)
+#
+# CONFIG_MACH_H4700 is not set
+# CONFIG_MACH_H5000 is not set
+# CONFIG_MACH_HIMALAYA is not set
+# CONFIG_MACH_MAGICIAN is not set
+# CONFIG_MACH_MIOA701 is not set
+# CONFIG_PXA_EZX is not set
+# CONFIG_MACH_MP900C is not set
+# CONFIG_ARCH_PXA_PALM is not set
+# CONFIG_PXA_SHARPSL is not set
+# CONFIG_ARCH_PXA_ESERIES is not set
+CONFIG_PXA27x=y
+CONFIG_PXA_SSP=y
+CONFIG_PXA_HAVE_BOARD_IRQS=y
+CONFIG_PLAT_PXA=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_XSCALE=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_PABRT_LEGACY=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_DCACHE_DISABLE is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
+CONFIG_IWMMXT=y
+CONFIG_XSCALE_PMU=y
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=999999
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="console=tty1 root=/dev/mmcblk0p2 rootfstype=ext2 rootdelay=3 ip=192.168.0.202:192.168.0.200:192.168.0.200:255.255.255.0 debug"
+# CONFIG_XIP_KERNEL is not set
+CONFIG_KEXEC=y
+CONFIG_ATAGS_PROC=y
+
+#
+# CPU Power Management
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+CONFIG_CPU_FREQ_DEBUG=y
+CONFIG_CPU_FREQ_STAT=y
+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=m
+CONFIG_CPU_FREQ_GOV_USERSPACE=m
+CONFIG_CPU_FREQ_GOV_ONDEMAND=m
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+CONFIG_BINFMT_AOUT=m
+CONFIG_BINFMT_MISC=m
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_APM_EMULATION=y
+CONFIG_PM_RUNTIME=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+CONFIG_XFRM_IPCOMP=m
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=m
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=m
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+CONFIG_IPV6_MIP6=m
+CONFIG_INET6_XFRM_TUNNEL=m
+CONFIG_INET6_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=m
+# CONFIG_IPV6_SIT_6RD is not set
+CONFIG_IPV6_NDISC_NODETYPE=y
+CONFIG_IPV6_TUNNEL=m
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_IPV6_SUBTREES=y
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_ADVANCED=y
+CONFIG_BRIDGE_NETFILTER=y
+
+#
+# Core Netfilter Configuration
+#
+CONFIG_NETFILTER_NETLINK=m
+CONFIG_NETFILTER_NETLINK_QUEUE=m
+CONFIG_NETFILTER_NETLINK_LOG=m
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_CT_ACCT=y
+CONFIG_NF_CONNTRACK_MARK=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+# CONFIG_NF_CT_PROTO_DCCP is not set
+CONFIG_NF_CT_PROTO_GRE=m
+CONFIG_NF_CT_PROTO_SCTP=m
+CONFIG_NF_CT_PROTO_UDPLITE=m
+CONFIG_NF_CONNTRACK_AMANDA=m
+CONFIG_NF_CONNTRACK_FTP=m
+CONFIG_NF_CONNTRACK_H323=m
+CONFIG_NF_CONNTRACK_IRC=m
+CONFIG_NF_CONNTRACK_NETBIOS_NS=m
+CONFIG_NF_CONNTRACK_PPTP=m
+CONFIG_NF_CONNTRACK_SANE=m
+CONFIG_NF_CONNTRACK_SIP=m
+CONFIG_NF_CONNTRACK_TFTP=m
+CONFIG_NF_CT_NETLINK=m
+# CONFIG_NETFILTER_TPROXY is not set
+CONFIG_NETFILTER_XTABLES=m
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
+# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
+CONFIG_NETFILTER_XT_TARGET_HL=m
+CONFIG_NETFILTER_XT_TARGET_LED=m
+CONFIG_NETFILTER_XT_TARGET_MARK=m
+CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
+# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
+# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
+# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_NETFILTER_XT_MATCH_DCCP=m
+CONFIG_NETFILTER_XT_MATCH_DSCP=m
+CONFIG_NETFILTER_XT_MATCH_ESP=m
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+CONFIG_NETFILTER_XT_MATCH_HL=m
+# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
+CONFIG_NETFILTER_XT_MATCH_LENGTH=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
+CONFIG_NETFILTER_XT_MATCH_POLICY=m
+# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
+CONFIG_NETFILTER_XT_MATCH_REALM=m
+# CONFIG_NETFILTER_XT_MATCH_RECENT is not set
+CONFIG_NETFILTER_XT_MATCH_SCTP=m
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+CONFIG_NETFILTER_XT_MATCH_STRING=m
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
+CONFIG_NETFILTER_XT_MATCH_TIME=m
+CONFIG_NETFILTER_XT_MATCH_U32=m
+# CONFIG_NETFILTER_XT_MATCH_OSF is not set
+# CONFIG_IP_VS is not set
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_NF_DEFRAG_IPV4=m
+CONFIG_NF_CONNTRACK_IPV4=m
+CONFIG_NF_CONNTRACK_PROC_COMPAT=y
+CONFIG_IP_NF_QUEUE=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+CONFIG_IP_NF_MATCH_AH=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_NF_NAT=m
+CONFIG_NF_NAT_NEEDED=y
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_NF_NAT_SNMP_BASIC=m
+CONFIG_NF_NAT_PROTO_GRE=m
+CONFIG_NF_NAT_PROTO_UDPLITE=m
+CONFIG_NF_NAT_PROTO_SCTP=m
+CONFIG_NF_NAT_FTP=m
+CONFIG_NF_NAT_IRC=m
+CONFIG_NF_NAT_TFTP=m
+CONFIG_NF_NAT_AMANDA=m
+CONFIG_NF_NAT_PPTP=m
+CONFIG_NF_NAT_H323=m
+CONFIG_NF_NAT_SIP=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_CLUSTERIP=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_TTL=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+
+#
+# IPv6: Netfilter Configuration
+#
+CONFIG_NF_CONNTRACK_IPV6=m
+CONFIG_IP6_NF_QUEUE=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MATCH_AH=m
+CONFIG_IP6_NF_MATCH_EUI64=m
+CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_OPTS=m
+CONFIG_IP6_NF_MATCH_HL=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_MATCH_MH=m
+CONFIG_IP6_NF_MATCH_RT=m
+CONFIG_IP6_NF_TARGET_HL=m
+CONFIG_IP6_NF_TARGET_LOG=m
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_REJECT=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_RAW=m
+# CONFIG_BRIDGE_NF_EBTABLES is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+CONFIG_STP=m
+CONFIG_BRIDGE=m
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+CONFIG_LLC=m
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+CONFIG_IEEE802154=y
+# CONFIG_NET_SCHED is not set
+CONFIG_NET_CLS_ROUTE=y
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+CONFIG_BT=y
+CONFIG_BT_L2CAP=y
+CONFIG_BT_SCO=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=y
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=y
+
+#
+# Bluetooth device drivers
+#
+CONFIG_BT_HCIBTUSB=m
+CONFIG_BT_HCIBTSDIO=m
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+# CONFIG_BT_HCIUART_BCSP is not set
+# CONFIG_BT_HCIUART_LL is not set
+CONFIG_BT_HCIBCM203X=m
+CONFIG_BT_HCIBPA10X=m
+CONFIG_BT_HCIBFUSB=m
+CONFIG_BT_HCIVHCI=m
+CONFIG_BT_MRVL=m
+CONFIG_BT_MRVL_SDIO=m
+# CONFIG_BT_ATH3K is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_FIB_RULES=y
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=m
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_CONNECTOR=m
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_HAVE_MTD_OTP=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+# CONFIG_MTD_CFI_I2 is not set
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_OTP=y
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_XIP is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PXA2XX=y
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+# CONFIG_BLK_DEV_DRBD is not set
+CONFIG_BLK_DEV_NBD=m
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+CONFIG_DUMMY=y
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_NET_ETHERNET is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+CONFIG_IEEE802154_DRIVERS=y
+# CONFIG_IEEE802154_FAKEHARD is not set
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+# CONFIG_PPP_MPPE is not set
+# CONFIG_PPPOE is not set
+# CONFIG_PPPOL2TP is not set
+# CONFIG_SLIP is not set
+CONFIG_SLHC=m
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+# CONFIG_INPUT_APMPOWER is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_LM8323 is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+CONFIG_KEYBOARD_PXA27x=y
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
+# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+CONFIG_TOUCHSCREEN_DA9034=y
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_EETI is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_ATI_REMOTE is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+# CONFIG_INPUT_CM109 is not set
+CONFIG_INPUT_UINPUT=y
+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=8
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_PXA=y
+# CONFIG_I2C_PXA_SLAVE is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
+CONFIG_SPI_PXA2XX=y
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_DESIGNWARE is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+
+#
+# AC97 GPIO expanders:
+#
+# CONFIG_W1 is not set
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+# CONFIG_PDA_POWER is not set
+# CONFIG_APM_POWER is not set
+# CONFIG_BATTERY_DS2760 is not set
+# CONFIG_BATTERY_DS2782 is not set
+# CONFIG_BATTERY_BQ27x00 is not set
+# CONFIG_BATTERY_DA9030 is not set
+# CONFIG_BATTERY_MAX17040 is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+CONFIG_PMIC_DA903X=y
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_MFD_88PM8607 is not set
+# CONFIG_AB4500_CORE is not set
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_DEBUG=y
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+CONFIG_REGULATOR_VIRTUAL_CONSUMER=y
+CONFIG_REGULATOR_USERSPACE_CONSUMER=y
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_REGULATOR_MAX1586 is not set
+# CONFIG_REGULATOR_MAX8660 is not set
+CONFIG_REGULATOR_DA903X=y
+# CONFIG_REGULATOR_LP3971 is not set
+# CONFIG_REGULATOR_TPS65023 is not set
+# CONFIG_REGULATOR_TPS6507X is not set
+CONFIG_MEDIA_SUPPORT=y
+
+#
+# Multimedia core support
+#
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_COMMON=y
+CONFIG_VIDEO_ALLOW_V4L1=y
+CONFIG_VIDEO_V4L1_COMPAT=y
+# CONFIG_DVB_CORE is not set
+CONFIG_VIDEO_MEDIA=y
+
+#
+# Multimedia drivers
+#
+CONFIG_IR_CORE=y
+CONFIG_VIDEO_IR=y
+# CONFIG_MEDIA_ATTACH is not set
+CONFIG_MEDIA_TUNER=y
+CONFIG_MEDIA_TUNER_CUSTOMISE=y
+# CONFIG_MEDIA_TUNER_SIMPLE is not set
+# CONFIG_MEDIA_TUNER_TDA8290 is not set
+# CONFIG_MEDIA_TUNER_TDA827X is not set
+# CONFIG_MEDIA_TUNER_TDA18271 is not set
+# CONFIG_MEDIA_TUNER_TDA9887 is not set
+# CONFIG_MEDIA_TUNER_TEA5761 is not set
+# CONFIG_MEDIA_TUNER_TEA5767 is not set
+# CONFIG_MEDIA_TUNER_MT20XX is not set
+# CONFIG_MEDIA_TUNER_MT2060 is not set
+# CONFIG_MEDIA_TUNER_MT2266 is not set
+# CONFIG_MEDIA_TUNER_MT2131 is not set
+# CONFIG_MEDIA_TUNER_QT1010 is not set
+# CONFIG_MEDIA_TUNER_XC2028 is not set
+# CONFIG_MEDIA_TUNER_XC5000 is not set
+# CONFIG_MEDIA_TUNER_MXL5005S is not set
+# CONFIG_MEDIA_TUNER_MXL5007T is not set
+# CONFIG_MEDIA_TUNER_MC44S803 is not set
+CONFIG_MEDIA_TUNER_MAX2165=m
+CONFIG_VIDEO_V4L2=y
+CONFIG_VIDEO_V4L1=y
+CONFIG_VIDEOBUF_GEN=y
+CONFIG_VIDEOBUF_DMA_SG=y
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set
+CONFIG_VIDEO_IR_I2C=y
+
+#
+# Encoders/decoders and other helper chips
+#
+
+#
+# Audio decoders
+#
+# CONFIG_VIDEO_TVAUDIO is not set
+# CONFIG_VIDEO_TDA7432 is not set
+# CONFIG_VIDEO_TDA9840 is not set
+# CONFIG_VIDEO_TDA9875 is not set
+# CONFIG_VIDEO_TEA6415C is not set
+# CONFIG_VIDEO_TEA6420 is not set
+# CONFIG_VIDEO_MSP3400 is not set
+# CONFIG_VIDEO_CS5345 is not set
+# CONFIG_VIDEO_CS53L32A is not set
+# CONFIG_VIDEO_M52790 is not set
+# CONFIG_VIDEO_TLV320AIC23B is not set
+# CONFIG_VIDEO_WM8775 is not set
+# CONFIG_VIDEO_WM8739 is not set
+# CONFIG_VIDEO_VP27SMPX is not set
+
+#
+# RDS decoders
+#
+# CONFIG_VIDEO_SAA6588 is not set
+
+#
+# Video decoders
+#
+# CONFIG_VIDEO_ADV7180 is not set
+# CONFIG_VIDEO_BT819 is not set
+# CONFIG_VIDEO_BT856 is not set
+# CONFIG_VIDEO_BT866 is not set
+# CONFIG_VIDEO_KS0127 is not set
+# CONFIG_VIDEO_OV7670 is not set
+# CONFIG_VIDEO_MT9V011 is not set
+# CONFIG_VIDEO_TCM825X is not set
+# CONFIG_VIDEO_SAA7110 is not set
+# CONFIG_VIDEO_SAA711X is not set
+# CONFIG_VIDEO_SAA717X is not set
+# CONFIG_VIDEO_SAA7191 is not set
+# CONFIG_VIDEO_TVP514X is not set
+# CONFIG_VIDEO_TVP5150 is not set
+# CONFIG_VIDEO_VPX3220 is not set
+
+#
+# Video and audio decoders
+#
+# CONFIG_VIDEO_CX25840 is not set
+
+#
+# MPEG video encoders
+#
+# CONFIG_VIDEO_CX2341X is not set
+
+#
+# Video encoders
+#
+# CONFIG_VIDEO_SAA7127 is not set
+# CONFIG_VIDEO_SAA7185 is not set
+# CONFIG_VIDEO_ADV7170 is not set
+# CONFIG_VIDEO_ADV7175 is not set
+# CONFIG_VIDEO_THS7303 is not set
+# CONFIG_VIDEO_ADV7343 is not set
+
+#
+# Video improvement chips
+#
+# CONFIG_VIDEO_UPD64031A is not set
+# CONFIG_VIDEO_UPD64083 is not set
+# CONFIG_VIDEO_VIVI is not set
+# CONFIG_VIDEO_CPIA is not set
+# CONFIG_VIDEO_CPIA2 is not set
+# CONFIG_VIDEO_SAA5246A is not set
+# CONFIG_VIDEO_SAA5249 is not set
+CONFIG_SOC_CAMERA=y
+# CONFIG_SOC_CAMERA_MT9M001 is not set
+CONFIG_SOC_CAMERA_MT9M111=y
+# CONFIG_SOC_CAMERA_MT9T031 is not set
+# CONFIG_SOC_CAMERA_MT9T112 is not set
+# CONFIG_SOC_CAMERA_MT9V022 is not set
+# CONFIG_SOC_CAMERA_RJ54N1 is not set
+# CONFIG_SOC_CAMERA_TW9910 is not set
+# CONFIG_SOC_CAMERA_PLATFORM is not set
+# CONFIG_SOC_CAMERA_OV772X is not set
+# CONFIG_SOC_CAMERA_OV9640 is not set
+CONFIG_VIDEO_PXA27x=y
+# CONFIG_VIDEO_SH_MOBILE_CEU is not set
+# CONFIG_V4L_USB_DRIVERS is not set
+CONFIG_RADIO_ADAPTERS=y
+# CONFIG_I2C_SI4713 is not set
+# CONFIG_RADIO_SI4713 is not set
+# CONFIG_USB_DSBR is not set
+# CONFIG_RADIO_SI470X is not set
+# CONFIG_USB_MR800 is not set
+CONFIG_RADIO_TEA5764=y
+CONFIG_RADIO_TEA5764_XTAL=y
+# CONFIG_RADIO_TEF6862 is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_UVESA is not set
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_PXA=y
+CONFIG_FB_PXA_OVERLAY=y
+# CONFIG_FB_PXA_SMARTPANEL is not set
+CONFIG_FB_PXA_PARAMETERS=y
+# CONFIG_FB_MBX is not set
+# CONFIG_FB_W100 is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_GENERIC=y
+# CONFIG_BACKLIGHT_DA903X is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+CONFIG_FONTS=y
+# CONFIG_FONT_8x8 is not set
+# CONFIG_FONT_8x16 is not set
+# CONFIG_FONT_6x11 is not set
+# CONFIG_FONT_7x14 is not set
+# CONFIG_FONT_PEARL_8x8 is not set
+# CONFIG_FONT_ACORN_8x8 is not set
+CONFIG_FONT_MINI_4x6=y
+# CONFIG_FONT_SUN8x16 is not set
+# CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_10x18 is not set
+# CONFIG_LOGO is not set
+CONFIG_SOUND=y
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_JACK=y
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_HRTIMER is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_ARM is not set
+CONFIG_SND_PXA2XX_LIB=y
+# CONFIG_SND_SPI is not set
+# CONFIG_SND_USB is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_PXA2XX_SOC=y
+# CONFIG_SND_PXA2XX_SOC_IMOTE2 is not set
+CONFIG_SND_SOC_I2C_AND_SPI=y
+# CONFIG_SND_SOC_ALL_CODECS is not set
+# CONFIG_SOUND_PRIME is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+# CONFIG_USB_HID is not set
+# CONFIG_HID_PID is not set
+
+#
+# USB HID Boot Protocol drivers
+#
+# CONFIG_USB_KBD is not set
+# CONFIG_USB_MOUSE is not set
+
+#
+# Special HID drivers
+#
+CONFIG_HID_APPLE=m
+# CONFIG_HID_WACOM is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+# CONFIG_USB_DEVICE_CLASS is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_SUSPEND is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+# CONFIG_USB_MUSB_HDRC is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_R8A66597 is not set
+CONFIG_USB_GADGET_PXA27X=y
+CONFIG_USB_PXA27X=y
+# CONFIG_USB_GADGET_S3C_HSOTG is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LANGWELL is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+# CONFIG_USB_GADGET_DUALSPEED is not set
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_AUDIO is not set
+CONFIG_USB_ETH=y
+# CONFIG_USB_ETH_RNDIS is not set
+# CONFIG_USB_ETH_EEM is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_MASS_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_USB_G_MULTI is not set
+
+#
+# OTG and related infrastructure
+#
+CONFIG_USB_OTG_UTILS=y
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_USB_ULPI is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+CONFIG_MMC_UNSAFE_RESUME=y
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+CONFIG_SDIO_UART=m
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+CONFIG_MMC_PXA=y
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
+CONFIG_MMC_SPI=y
+# CONFIG_MEMSTICK is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_PCA9532 is not set
+# CONFIG_LEDS_GPIO is not set
+CONFIG_LEDS_LP3944=y
+# CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_DA903X is not set
+# CONFIG_LEDS_DAC124S085 is not set
+# CONFIG_LEDS_REGULATOR is not set
+# CONFIG_LEDS_BD2802 is not set
+# CONFIG_LEDS_LT3593 is not set
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+
+#
+# iptables trigger is under Netfilter config (LED target)
+#
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_SA1100 is not set
+# CONFIG_RTC_DRV_PXA is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=m
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=m
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=m
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+CONFIG_REISERFS_FS_XATTR=y
+CONFIG_REISERFS_FS_POSIX_ACL=y
+CONFIG_REISERFS_FS_SECURITY=y
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_XFS_FS=m
+# CONFIG_XFS_QUOTA is not set
+# CONFIG_XFS_POSIX_ACL is not set
+# CONFIG_XFS_RT is not set
+# CONFIG_XFS_DEBUG is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=m
+CONFIG_CUSE=m
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=m
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_LZO=y
+CONFIG_JFFS2_RTIME=y
+CONFIG_JFFS2_RUBIN=y
+# CONFIG_JFFS2_CMODE_NONE is not set
+CONFIG_JFFS2_CMODE_PRIORITY=y
+# CONFIG_JFFS2_CMODE_SIZE is not set
+# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
+CONFIG_CRAMFS=m
+CONFIG_SQUASHFS=m
+# CONFIG_SQUASHFS_EMBEDDED is not set
+CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+CONFIG_ROMFS_FS=m
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_ROOT_NFS is not set
+CONFIG_NFSD=m
+CONFIG_NFSD_V2_ACL=y
+CONFIG_NFSD_V3=y
+CONFIG_NFSD_V3_ACL=y
+# CONFIG_NFSD_V4 is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+CONFIG_CIFS=m
+CONFIG_CIFS_STATS=y
+# CONFIG_CIFS_STATS2 is not set
+CONFIG_CIFS_WEAK_PW_HASH=y
+CONFIG_CIFS_XATTR=y
+CONFIG_CIFS_POSIX=y
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=m
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+CONFIG_NLS_ASCII=m
+CONFIG_NLS_ISO8859_1=m
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=m
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_PRINTK_TIME=y
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+CONFIG_DEBUG_PREEMPT=y
+CONFIG_DEBUG_RT_MUTEXES=y
+CONFIG_DEBUG_PI_LIST=y
+# CONFIG_RT_MUTEX_TESTER is not set
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_DEBUG_MUTEXES=y
+CONFIG_DEBUG_LOCK_ALLOC=y
+CONFIG_PROVE_LOCKING=y
+CONFIG_LOCKDEP=y
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_LOCKDEP is not set
+CONFIG_TRACE_IRQFLAGS=y
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+CONFIG_STACKTRACE=y
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+# CONFIG_OC_ETM is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=m
+CONFIG_CRYPTO_ALGAPI2=m
+CONFIG_CRYPTO_AEAD=m
+CONFIG_CRYPTO_AEAD2=m
+CONFIG_CRYPTO_BLKCIPHER=m
+CONFIG_CRYPTO_BLKCIPHER2=m
+CONFIG_CRYPTO_HASH=m
+CONFIG_CRYPTO_HASH2=m
+CONFIG_CRYPTO_RNG2=m
+CONFIG_CRYPTO_PCOMP=m
+CONFIG_CRYPTO_MANAGER=m
+CONFIG_CRYPTO_MANAGER2=m
+CONFIG_CRYPTO_GF128MUL=m
+CONFIG_CRYPTO_NULL=m
+CONFIG_CRYPTO_WORKQUEUE=m
+CONFIG_CRYPTO_CRYPTD=m
+CONFIG_CRYPTO_AUTHENC=m
+CONFIG_CRYPTO_TEST=m
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=m
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=m
+CONFIG_CRYPTO_LRW=m
+CONFIG_CRYPTO_PCBC=m
+CONFIG_CRYPTO_XTS=m
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=m
+CONFIG_CRYPTO_XCBC=m
+CONFIG_CRYPTO_VMAC=m
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=m
+CONFIG_CRYPTO_GHASH=m
+CONFIG_CRYPTO_MD4=m
+CONFIG_CRYPTO_MD5=m
+CONFIG_CRYPTO_MICHAEL_MIC=m
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=m
+CONFIG_CRYPTO_SHA256=m
+CONFIG_CRYPTO_SHA512=m
+CONFIG_CRYPTO_TGR192=m
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=m
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_BLOWFISH=m
+# CONFIG_CRYPTO_CAMELLIA is not set
+CONFIG_CRYPTO_CAST5=m
+CONFIG_CRYPTO_CAST6=m
+CONFIG_CRYPTO_DES=m
+CONFIG_CRYPTO_FCRYPT=m
+CONFIG_CRYPTO_KHAZAD=m
+# CONFIG_CRYPTO_SALSA20 is not set
+CONFIG_CRYPTO_SEED=m
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_TEA=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_TWOFISH_COMMON=m
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=m
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=m
+CONFIG_CRC16=y
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC32=y
+CONFIG_CRC7=y
+CONFIG_LIBCRC32C=m
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=m
+CONFIG_LZO_COMPRESS=m
+CONFIG_LZO_DECOMPRESS=m
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_TEXTSEARCH=y
+CONFIG_TEXTSEARCH_KMP=m
+CONFIG_TEXTSEARCH_BM=m
+CONFIG_TEXTSEARCH_FSM=m
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/arm/configs/kirkwood_defconfig b/arch/arm/configs/kirkwood_defconfig
index 5fc44c94b0a..4611d3ce451 100644
--- a/arch/arm/configs/kirkwood_defconfig
+++ b/arch/arm/configs/kirkwood_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.32-rc6
-# Sat Nov  7 20:31:18 2009
+# Linux kernel version: 2.6.33-rc6
+# Thu Feb  4 23:08:54 2010
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -32,6 +32,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -45,6 +51,7 @@ CONFIG_SYSVIPC_SYSCTL=y
 #
 CONFIG_TREE_RCU=y
 # CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
 # CONFIG_RCU_TRACE is not set
 CONFIG_RCU_FANOUT=32
 # CONFIG_RCU_FANOUT_EXACT is not set
@@ -127,14 +134,41 @@ CONFIG_LBDAF=y
 # IO Schedulers
 #
 CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
 CONFIG_IOSCHED_DEADLINE=y
 CONFIG_IOSCHED_CFQ=y
-# CONFIG_DEFAULT_AS is not set
 # CONFIG_DEFAULT_DEADLINE is not set
 CONFIG_DEFAULT_CFQ=y
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
 # CONFIG_FREEZER is not set
 
 #
@@ -163,6 +197,7 @@ CONFIG_MMU=y
 # CONFIG_ARCH_IXP2000 is not set
 # CONFIG_ARCH_IXP4XX is not set
 # CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
 CONFIG_ARCH_KIRKWOOD=y
 # CONFIG_ARCH_LOKI is not set
 # CONFIG_ARCH_MV78XX0 is not set
@@ -185,6 +220,7 @@ CONFIG_ARCH_KIRKWOOD=y
 # CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
 # CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
 
 #
 # Marvell Kirkwood Implementations
@@ -195,7 +231,11 @@ CONFIG_MACH_RD88F6281=y
 CONFIG_MACH_MV88F6281GTW_GE=y
 CONFIG_MACH_SHEEVAPLUG=y
 CONFIG_MACH_TS219=y
+CONFIG_MACH_TS41X=y
+CONFIG_MACH_OPENRD=y
 CONFIG_MACH_OPENRD_BASE=y
+CONFIG_MACH_OPENRD_CLIENT=y
+CONFIG_MACH_NETSPACE_V2=y
 CONFIG_PLAT_ORION=y
 
 #
@@ -262,12 +302,10 @@ CONFIG_FLATMEM_MANUAL=y
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
-CONFIG_SPLIT_PTLOCK_CPUS=4096
+CONFIG_SPLIT_PTLOCK_CPUS=999999
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=0
 CONFIG_VIRT_TO_BUS=y
-CONFIG_HAVE_MLOCK=y
-CONFIG_HAVE_MLOCKED_PAGE_BIT=y
 # CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 CONFIG_ALIGNMENT_TRAP=y
@@ -398,15 +436,18 @@ CONFIG_NET_PKTGEN=m
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WEXT_CORE=y
+CONFIG_WEXT_PROC=y
+CONFIG_WEXT_SPY=y
 CONFIG_CFG80211=y
 # CONFIG_NL80211_TESTMODE is not set
 # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
 # CONFIG_CFG80211_REG_DEBUG is not set
 CONFIG_CFG80211_DEFAULT_PS=y
-CONFIG_CFG80211_DEFAULT_PS_VALUE=1
 # CONFIG_CFG80211_DEBUGFS is not set
 CONFIG_WIRELESS_OLD_REGULATORY=y
-CONFIG_WIRELESS_EXT=y
+CONFIG_CFG80211_WEXT=y
 CONFIG_WIRELESS_EXT_SYSFS=y
 CONFIG_LIB80211=y
 # CONFIG_LIB80211_DEBUG is not set
@@ -556,6 +597,10 @@ CONFIG_BLK_DEV=y
 # CONFIG_BLK_DEV_COW_COMMON is not set
 CONFIG_BLK_DEV_LOOP=y
 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
 # CONFIG_BLK_DEV_NBD is not set
 # CONFIG_BLK_DEV_SX8 is not set
 # CONFIG_BLK_DEV_UB is not set
@@ -606,7 +651,9 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_BNX2_ISCSI is not set
 # CONFIG_BE2ISCSI is not set
 # CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_HPSA is not set
 # CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_3W_SAS is not set
 # CONFIG_SCSI_ACARD is not set
 # CONFIG_SCSI_AACRAID is not set
 # CONFIG_SCSI_AIC7XXX is not set
@@ -642,6 +689,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_NSP32 is not set
 # CONFIG_SCSI_DEBUG is not set
 # CONFIG_SCSI_PMCRAID is not set
+# CONFIG_SCSI_PM8001 is not set
 # CONFIG_SCSI_SRP is not set
 # CONFIG_SCSI_BFA_FC is not set
 # CONFIG_SCSI_DH is not set
@@ -696,15 +744,16 @@ CONFIG_SATA_MV=y
 # CONFIG_PATA_NS87415 is not set
 # CONFIG_PATA_OPTI is not set
 # CONFIG_PATA_OPTIDMA is not set
+# CONFIG_PATA_PDC2027X is not set
 # CONFIG_PATA_PDC_OLD is not set
 # CONFIG_PATA_RADISYS is not set
 # CONFIG_PATA_RDC is not set
 # CONFIG_PATA_RZ1000 is not set
 # CONFIG_PATA_SC1200 is not set
 # CONFIG_PATA_SERVERWORKS is not set
-# CONFIG_PATA_PDC2027X is not set
 # CONFIG_PATA_SIL680 is not set
 # CONFIG_PATA_SIS is not set
+# CONFIG_PATA_TOSHIBA is not set
 # CONFIG_PATA_VIA is not set
 # CONFIG_PATA_WINBOND is not set
 # CONFIG_PATA_SCH is not set
@@ -720,7 +769,7 @@ CONFIG_SATA_MV=y
 #
 
 #
-# See the help texts for more information.
+# The newer stack is recommended.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
@@ -828,13 +877,6 @@ CONFIG_MV643XX_ETH=y
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_TR is not set
 CONFIG_WLAN=y
-# CONFIG_WLAN_PRE80211 is not set
-CONFIG_WLAN_80211=y
-CONFIG_LIBERTAS=y
-# CONFIG_LIBERTAS_USB is not set
-CONFIG_LIBERTAS_SDIO=y
-# CONFIG_LIBERTAS_SPI is not set
-# CONFIG_LIBERTAS_DEBUG is not set
 # CONFIG_LIBERTAS_THINFIRM is not set
 # CONFIG_ATMEL is not set
 # CONFIG_AT76C50X_USB is not set
@@ -846,19 +888,24 @@ CONFIG_LIBERTAS_SDIO=y
 # CONFIG_ADM8211 is not set
 # CONFIG_MAC80211_HWSIM is not set
 # CONFIG_MWL8K is not set
-# CONFIG_P54_COMMON is not set
 # CONFIG_ATH_COMMON is not set
+# CONFIG_B43 is not set
+# CONFIG_B43LEGACY is not set
+# CONFIG_HOSTAP is not set
 # CONFIG_IPW2100 is not set
 # CONFIG_IPW2200 is not set
 # CONFIG_IWLWIFI is not set
-# CONFIG_HOSTAP is not set
-# CONFIG_B43 is not set
-# CONFIG_B43LEGACY is not set
-# CONFIG_ZD1211RW is not set
-# CONFIG_RT2X00 is not set
+# CONFIG_IWM is not set
+CONFIG_LIBERTAS=y
+# CONFIG_LIBERTAS_USB is not set
+CONFIG_LIBERTAS_SDIO=y
+# CONFIG_LIBERTAS_SPI is not set
+# CONFIG_LIBERTAS_DEBUG is not set
 # CONFIG_HERMES is not set
+# CONFIG_P54_COMMON is not set
+# CONFIG_RT2X00 is not set
 # CONFIG_WL12XX is not set
-# CONFIG_IWM is not set
+# CONFIG_ZD1211RW is not set
 
 #
 # Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -881,6 +928,7 @@ CONFIG_LIBERTAS_SDIO=y
 # CONFIG_NETCONSOLE is not set
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_VMXNET3 is not set
 # CONFIG_ISDN is not set
 # CONFIG_PHONE is not set
 
@@ -890,6 +938,7 @@ CONFIG_LIBERTAS_SDIO=y
 CONFIG_INPUT=y
 # CONFIG_INPUT_FF_MEMLESS is not set
 # CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
 
 #
 # Userland interfaces
@@ -933,6 +982,7 @@ CONFIG_SERIO_SERPORT=y
 # CONFIG_SERIO_PCIPS2 is not set
 CONFIG_SERIO_LIBPS2=y
 # CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
 # CONFIG_GAMEPORT is not set
 
 #
@@ -1019,11 +1069,6 @@ CONFIG_I2C_MV64XXX=y
 # CONFIG_I2C_TINY_USB is not set
 
 #
-# Graphics adapter I2C/DDC channel drivers
-#
-# CONFIG_I2C_VOODOO3 is not set
-
-#
 # Other I2C/SMBus bus drivers
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
@@ -1032,7 +1077,6 @@ CONFIG_I2C_MV64XXX=y
 #
 # Miscellaneous I2C Chip support
 #
-# CONFIG_DS1682 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
@@ -1048,6 +1092,8 @@ CONFIG_SPI_MASTER=y
 # CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_GPIO is not set
 CONFIG_SPI_ORION=y
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_DESIGNWARE is not set
 
 #
 # SPI Protocol Masters
@@ -1074,10 +1120,12 @@ CONFIG_GPIO_SYSFS=y
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
 #
+# CONFIG_GPIO_CS5535 is not set
 # CONFIG_GPIO_BT8XX is not set
 # CONFIG_GPIO_LANGWELL is not set
 
@@ -1116,6 +1164,7 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_TMIO is not set
 # CONFIG_MFD_TC6393XB is not set
 # CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
@@ -1123,6 +1172,8 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_MC13783 is not set
 # CONFIG_AB3100_CORE is not set
 # CONFIG_EZX_PCAP is not set
+# CONFIG_MFD_88PM8607 is not set
+# CONFIG_AB4500_CORE is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1305,6 +1356,7 @@ CONFIG_USB_STORAGE_JUMPSHOT=y
 # OTG and related infrastructure
 #
 # CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_USB_ULPI is not set
 # CONFIG_NOP_USB_XCEIV is not set
 # CONFIG_UWB is not set
 CONFIG_MMC=y
@@ -1344,6 +1396,7 @@ CONFIG_LEDS_GPIO_PLATFORM=y
 # CONFIG_LEDS_PCA955X is not set
 # CONFIG_LEDS_DAC124S085 is not set
 # CONFIG_LEDS_BD2802 is not set
+# CONFIG_LEDS_LT3593 is not set
 
 #
 # LED Triggers
@@ -1388,6 +1441,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_PCF8563 is not set
 # CONFIG_RTC_DRV_PCF8583 is not set
 # CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
 CONFIG_RTC_DRV_S35390A=y
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
@@ -1417,7 +1471,9 @@ CONFIG_RTC_DRV_S35390A=y
 # CONFIG_RTC_DRV_M48T86 is not set
 # CONFIG_RTC_DRV_M48T35 is not set
 # CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
 # CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
 # CONFIG_RTC_DRV_V3020 is not set
 
 #
@@ -1684,7 +1740,9 @@ CONFIG_DEBUG_USER=y
 CONFIG_DEBUG_ERRORS=y
 # CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_DEBUG_LL=y
+# CONFIG_EARLY_PRINTK is not set
 # CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_OC_ETM is not set
 
 #
 # Security options
@@ -1692,7 +1750,11 @@ CONFIG_DEBUG_LL=y
 # CONFIG_KEYS is not set
 # CONFIG_SECURITY is not set
 # CONFIG_SECURITYFS is not set
-# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
 CONFIG_CRYPTO=y
 
 #
diff --git a/arch/arm/configs/mini2440_defconfig b/arch/arm/configs/mini2440_defconfig
index d2a90eb844a..ff44bd1615c 100644
--- a/arch/arm/configs/mini2440_defconfig
+++ b/arch/arm/configs/mini2440_defconfig
@@ -184,7 +184,7 @@ CONFIG_S3C24XX_PWM=y
 CONFIG_S3C24XX_GPIO_EXTRA=0
 CONFIG_S3C2410_DMA=y
 # CONFIG_S3C2410_DMA_DEBUG is not set
-CONFIG_S3C24XX_ADC=y
+CONFIG_S3C_ADC=y
 CONFIG_PLAT_S3C=y
 CONFIG_CPU_LLSERIAL_S3C2440_ONLY=y
 CONFIG_CPU_LLSERIAL_S3C2440=y
@@ -199,8 +199,8 @@ CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
 #
 # Power management
 #
-# CONFIG_S3C2410_PM_DEBUG is not set
-# CONFIG_S3C2410_PM_CHECK is not set
+# CONFIG_SAMSUNG_PM_DEBUG is not set
+# CONFIG_SAMSUNG_PM_CHECK is not set
 CONFIG_S3C_LOWLEVEL_UART_PORT=0
 CONFIG_S3C_GPIO_SPACE=0
 
diff --git a/arch/arm/configs/mmp2_defconfig b/arch/arm/configs/mmp2_defconfig
new file mode 100644
index 00000000000..03f76cfc941
--- /dev/null
+++ b/arch/arm/configs/mmp2_defconfig
@@ -0,0 +1,1194 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.33-rc2
+# Tue Jan  5 13:55:22 2010
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+CONFIG_ARCH_MMP=y
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
+# CONFIG_MACH_TAVOREVB is not set
+
+#
+# Marvell PXA168/910/MMP2 Implmentations
+#
+# CONFIG_MACH_ASPENITE is not set
+# CONFIG_MACH_ZYLONITE2 is not set
+# CONFIG_MACH_TTC_DKB is not set
+CONFIG_MACH_FLINT=y
+CONFIG_CPU_MMP2=y
+CONFIG_PLAT_PXA=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_V6=y
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_32v6=y
+CONFIG_CPU_ABRT_EV6=y
+CONFIG_CPU_PABRT_V6=y
+CONFIG_CPU_CACHE_V6=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V6=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
+# CONFIG_ARM_ERRATA_411920 is not set
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on console=ttyS0,115200 mem=128M user_debug=255"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_FPE_NWFPE is not set
+# CONFIG_FPE_FASTFPE is not set
+CONFIG_VFP=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+# CONFIG_LIB80211 is not set
+
+#
+# CFG80211 needs to be enabled for MAC80211
+#
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH=""
+# CONFIG_DEVTMPFS is not set
+# CONFIG_STANDALONE is not set
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+# CONFIG_MTD_CHAR is not set
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_GPIO is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_PXA3xx is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+CONFIG_MTD_ONENAND=y
+# CONFIG_MTD_ONENAND_VERIFY_WRITE is not set
+CONFIG_MTD_ONENAND_GENERIC=y
+# CONFIG_MTD_ONENAND_OTP is not set
+# CONFIG_MTD_ONENAND_2X_PROGRAM is not set
+# CONFIG_MTD_ONENAND_SIM is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+# CONFIG_BLK_DEV is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_PHYLIB is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+CONFIG_SMC91X=y
+# CONFIG_DM9000 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851_MLL is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_WLAN=y
+# CONFIG_HOSTAP is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+# CONFIG_I2C_CHARDEV is not set
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_PXA=y
+# CONFIG_I2C_PXA_SLAVE is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+
+#
+# AC97 GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+CONFIG_MFD_CORE=y
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
+CONFIG_MFD_88PM8607=y
+CONFIG_REGULATOR=y
+# CONFIG_REGULATOR_DEBUG is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_REGULATOR_MAX1586 is not set
+CONFIG_REGULATOR_MAX8660=y
+# CONFIG_REGULATOR_LP3971 is not set
+# CONFIG_REGULATOR_TPS65023 is not set
+# CONFIG_REGULATOR_TPS6507X is not set
+CONFIG_REGULATOR_88PM8607=y
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+# CONFIG_LCD_ILI9320 is not set
+# CONFIG_LCD_PLATFORM is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_GENERIC=y
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_EXT4_USE_FOR_EXT23=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+# CONFIG_NFS_V4_1 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_PRINTK_TIME=y
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_PREEMPT is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_BOOT_TRACER is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_LL=y
+# CONFIG_EARLY_PRINTK is not set
+# CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_OC_ETM is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/arm/configs/mv78xx0_defconfig b/arch/arm/configs/mv78xx0_defconfig
index 6afa2c108ea..da4710dd1da 100644
--- a/arch/arm/configs/mv78xx0_defconfig
+++ b/arch/arm/configs/mv78xx0_defconfig
@@ -176,6 +176,7 @@ CONFIG_ARCH_MV78XX0=y
 #
 CONFIG_MACH_DB78X00_BP=y
 CONFIG_MACH_RD78X00_MASA=y
+CONFIG_MACH_TERASTATION_WXL=y
 CONFIG_PLAT_ORION=y
 
 #
diff --git a/arch/arm/configs/mx1ads_defconfig b/arch/arm/configs/mx1ads_defconfig
deleted file mode 100644
index 3cabbb6d927..00000000000
--- a/arch/arm/configs/mx1ads_defconfig
+++ /dev/null
@@ -1,742 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.12-rc1-bk2
-# Sun Mar 27 02:15:46 2005
-#
-CONFIG_ARM=y
-CONFIG_MMU=y
-CONFIG_UID16=y
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_GENERIC_IOMAP=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_LOCK_KERNEL=y
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-# CONFIG_SYSCTL is not set
-# CONFIG_AUDIT is not set
-# CONFIG_HOTPLUG is not set
-CONFIG_KOBJECT_UEVENT=y
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-# CONFIG_KALLSYMS is not set
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_SHMEM=y
-CONFIG_CC_ALIGN_FUNCTIONS=0
-CONFIG_CC_ALIGN_LABELS=0
-CONFIG_CC_ALIGN_LOOPS=0
-CONFIG_CC_ALIGN_JUMPS=0
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
-
-#
-# System Type
-#
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_IOP3XX is not set
-# CONFIG_ARCH_IXP4XX is not set
-# CONFIG_ARCH_IXP2000 is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_PXA is not set
-# CONFIG_ARCH_RPC is not set
-# CONFIG_ARCH_SA1100 is not set
-# CONFIG_ARCH_S3C2410 is not set
-# CONFIG_ARCH_SHARK is not set
-# CONFIG_ARCH_LH7A40X is not set
-# CONFIG_ARCH_OMAP is not set
-# CONFIG_ARCH_VERSATILE is not set
-CONFIG_ARCH_IMX=y
-# CONFIG_ARCH_H720X is not set
-
-#
-# IMX Implementations
-#
-CONFIG_ARCH_MX1ADS=y
-
-#
-# Processor Type
-#
-CONFIG_CPU_ARM920T=y
-CONFIG_CPU_32v4=y
-CONFIG_CPU_ABRT_EV4T=y
-CONFIG_CPU_CACHE_V4WT=y
-CONFIG_CPU_CACHE_VIVT=y
-CONFIG_CPU_COPY_V4WB=y
-CONFIG_CPU_TLB_V4WBI=y
-
-#
-# Processor Features
-#
-# CONFIG_ARM_THUMB is not set
-# CONFIG_CPU_ICACHE_DISABLE is not set
-# CONFIG_CPU_DCACHE_DISABLE is not set
-# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
-
-#
-# Bus support
-#
-CONFIG_ISA=y
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-# CONFIG_PCCARD is not set
-
-#
-# Kernel Features
-#
-CONFIG_PREEMPT=y
-# CONFIG_LEDS is not set
-CONFIG_ALIGNMENT_TRAP=y
-
-#
-# Boot options
-#
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttySMX0,57600n8 ip=bootp root=/dev/nfs"
-# CONFIG_XIP_KERNEL is not set
-
-#
-# Floating point emulation
-#
-
-#
-# At least one emulation must be selected
-#
-CONFIG_FPE_NWFPE=y
-CONFIG_FPE_NWFPE_XP=y
-CONFIG_FPE_FASTFPE=y
-
-#
-# Userspace binary formats
-#
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_AOUT is not set
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_ARTHUR is not set
-
-#
-# Power management options
-#
-# CONFIG_PM is not set
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-# CONFIG_DEBUG_DRIVER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_CONCAT is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
-# CONFIG_MTD_AFS_PARTS is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-# CONFIG_INFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-# CONFIG_MTD_CFI is not set
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-# CONFIG_MTD_RAM is not set
-CONFIG_MTD_ROM=y
-# CONFIG_MTD_ABSENT is not set
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_PHRAM is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-# CONFIG_MTD_BLOCK2MTD is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_BLK_DEV_COW_COMMON is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_INITRAMFS_SOURCE=""
-# CONFIG_CDROM_PKTCDVD is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-# CONFIG_IOSCHED_AS is not set
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_ATA_OVER_ETH is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=m
-CONFIG_PACKET_MMAP=y
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_TUNNEL is not set
-CONFIG_IP_TCPDIAG=y
-# CONFIG_IP_TCPDIAG_IPV6 is not set
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_LANCE is not set
-# CONFIG_NET_VENDOR_SMC is not set
-# CONFIG_SMC91X is not set
-# CONFIG_NET_VENDOR_RACAL is not set
-# CONFIG_AT1700 is not set
-# CONFIG_DEPCA is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_ISA is not set
-# CONFIG_NET_PCI is not set
-# CONFIG_NET_POCKET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-CONFIG_PPP=y
-# CONFIG_PPP_MULTILINK is not set
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_ASYNC=y
-# CONFIG_PPP_SYNC_TTY is not set
-CONFIG_PPP_DEFLATE=y
-CONFIG_PPP_BSDCOMP=y
-# CONFIG_PPPOE is not set
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Hardware I/O ports
-#
-# CONFIG_SERIO is not set
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_IMX=y
-CONFIG_SERIAL_IMX_CONSOLE=y
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-# CONFIG_LEGACY_PTYS is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_RTC=m
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
-# CONFIG_TCG_TPM is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-CONFIG_USB_ARCH_HAS_HCD=y
-# CONFIG_USB_ARCH_HAS_OHCI is not set
-# CONFIG_USB is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# MMC/SD Card support
-#
-# CONFIG_MMC is not set
-
-#
-# File systems
-#
-# CONFIG_EXT2_FS is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-
-#
-# XFS support
-#
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-CONFIG_FAT_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_FAT_DEFAULT_CODEPAGE=437
-CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_SYSFS=y
-CONFIG_DEVFS_FS=y
-CONFIG_DEVFS_MOUNT=y
-# CONFIG_DEVFS_DEBUG is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-# CONFIG_TMPFS_XATTR is not set
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=0
-# CONFIG_JFFS2_FS_NAND is not set
-# CONFIG_JFFS2_FS_NOR_ECC is not set
-# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
-CONFIG_JFFS2_ZLIB=y
-CONFIG_JFFS2_RTIME=y
-# CONFIG_JFFS2_RUBIN is not set
-CONFIG_CRAMFS=y
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS=y
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ASCII is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_PRINTK_TIME is not set
-CONFIG_DEBUG_KERNEL=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_SCHEDSTATS is not set
-# CONFIG_DEBUG_SLAB is not set
-CONFIG_DEBUG_PREEMPT=y
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-# CONFIG_DEBUG_KOBJECT is not set
-CONFIG_DEBUG_BUGVERBOSE=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_DEBUG_FS is not set
-CONFIG_FRAME_POINTER=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-# CONFIG_DEBUG_LL is not set
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-# CONFIG_CRYPTO_HMAC is not set
-# CONFIG_CRYPTO_NULL is not set
-# CONFIG_CRYPTO_MD4 is not set
-# CONFIG_CRYPTO_MD5 is not set
-# CONFIG_CRYPTO_SHA1 is not set
-# CONFIG_CRYPTO_SHA256 is not set
-# CONFIG_CRYPTO_SHA512 is not set
-# CONFIG_CRYPTO_WP512 is not set
-# CONFIG_CRYPTO_TGR192 is not set
-# CONFIG_CRYPTO_DES is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-# CONFIG_CRYPTO_TWOFISH is not set
-# CONFIG_CRYPTO_SERPENT is not set
-# CONFIG_CRYPTO_AES is not set
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_TEA is not set
-# CONFIG_CRYPTO_ARC4 is not set
-# CONFIG_CRYPTO_KHAZAD is not set
-# CONFIG_CRYPTO_ANUBIS is not set
-# CONFIG_CRYPTO_DEFLATE is not set
-# CONFIG_CRYPTO_MICHAEL_MIC is not set
-# CONFIG_CRYPTO_CRC32C is not set
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Hardware crypto devices
-#
-
-#
-# Library routines
-#
-CONFIG_CRC_CCITT=y
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
diff --git a/arch/arm/configs/mx27_defconfig b/arch/arm/configs/mx27_defconfig
index edfdd6faf80..b4c1366e9e0 100644
--- a/arch/arm/configs/mx27_defconfig
+++ b/arch/arm/configs/mx27_defconfig
@@ -200,7 +200,7 @@ CONFIG_MACH_MX27ADS=y
 CONFIG_MACH_PCM038=y
 CONFIG_MACH_PCM970_BASEBOARD=y
 CONFIG_MACH_MX27_3DS=y
-CONFIG_MACH_MX27LITE=y
+CONFIG_MACH_IMX27LITE=y
 CONFIG_MXC_IRQ_PRIOR=y
 CONFIG_MXC_PWM=y
 
diff --git a/arch/arm/configs/mx51_defconfig b/arch/arm/configs/mx51_defconfig
new file mode 100644
index 00000000000..c88e9527a8e
--- /dev/null
+++ b/arch/arm/configs/mx51_defconfig
@@ -0,0 +1,1286 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.33-rc6
+# Tue Feb  2 15:20:48 2010
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=18
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+CONFIG_RELAY=y
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+CONFIG_INLINE_SPIN_UNLOCK=y
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+CONFIG_INLINE_READ_UNLOCK=y
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+CONFIG_INLINE_WRITE_UNLOCK=y
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+CONFIG_FREEZER=y
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+CONFIG_ARCH_MXC=y
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
+
+#
+# Freescale MXC Implementations
+#
+# CONFIG_ARCH_MX1 is not set
+# CONFIG_ARCH_MX2 is not set
+# CONFIG_ARCH_MX25 is not set
+# CONFIG_ARCH_MX3 is not set
+# CONFIG_ARCH_MXC91231 is not set
+CONFIG_ARCH_MX5=y
+CONFIG_ARCH_MX51=y
+
+#
+# MX5 platforms:
+#
+CONFIG_MACH_MX51_BABBAGE=y
+# CONFIG_MXC_IRQ_PRIOR is not set
+CONFIG_MXC_TZIC=y
+# CONFIG_MXC_PWM is not set
+CONFIG_ARCH_MXC_IOMUX_V3=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_V7=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_ARM_THUMBEE is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_HAS_TLS_REG=y
+CONFIG_ARM_L1_CACHE_SHIFT=5
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_ARM_ERRATA_458693 is not set
+# CONFIG_ARM_ERRATA_460075 is not set
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+# CONFIG_THUMB2_KERNEL is not set
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/nfs nfsroot=192.168.0.101:/shared/nfs ip=dhcp"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_VFP=y
+CONFIG_VFPv3=y
+CONFIG_NEON=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+CONFIG_BINFMT_MISC=m
+
+#
+# Power management options
+#
+CONFIG_PM=y
+CONFIG_PM_DEBUG=y
+# CONFIG_PM_VERBOSE is not set
+CONFIG_CAN_PM_TRACE=y
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_PM_TEST_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_APM_EMULATION is not set
+# CONFIG_PM_RUNTIME is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH=""
+# CONFIG_STANDALONE is not set
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_CONNECTOR=y
+CONFIG_PROC_EVENTS=y
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_DRBD is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=65536
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_SCSI_PROC_FS is not set
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_SCAN_ASYNC=y
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+CONFIG_ATA=m
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
+CONFIG_SATA_PMP=y
+CONFIG_ATA_SFF=y
+# CONFIG_SATA_MV is not set
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+CONFIG_MARVELL_PHY=y
+CONFIG_DAVICOM_PHY=y
+CONFIG_QSEMI_PHY=y
+CONFIG_LXT_PHY=y
+CONFIG_CICADA_PHY=y
+CONFIG_VITESSE_PHY=y
+CONFIG_SMSC_PHY=y
+CONFIG_BROADCOM_PHY=y
+CONFIG_ICPLUS_PHY=y
+CONFIG_REALTEK_PHY=y
+CONFIG_NATIONAL_PHY=y
+CONFIG_STE10XP=y
+CONFIG_LSI_ET1011C_PHY=y
+CONFIG_FIXED_PHY=y
+CONFIG_MDIO_BITBANG=y
+CONFIG_MDIO_GPIO=y
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=m
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851_MLL is not set
+CONFIG_FEC=y
+# CONFIG_FEC2 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+CONFIG_INPUT_FF_MEMLESS=m
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_EVBUG=m
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_LM8323 is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=m
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+CONFIG_MOUSE_PS2_ELANTECH=y
+# CONFIG_MOUSE_PS2_SENTELIC is not set
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_MOUSE_GPIO is not set
+# CONFIG_MOUSE_SYNAPTICS_I2C is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=m
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+# CONFIG_DEVKMEM is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_IMX=y
+CONFIG_SERIAL_IMX_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_COMPAT is not set
+CONFIG_I2C_CHARDEV=m
+# CONFIG_I2C_HELPER_AUTO is not set
+
+#
+# I2C Algorithms
+#
+CONFIG_I2C_ALGOBIT=m
+CONFIG_I2C_ALGOPCF=m
+CONFIG_I2C_ALGOPCA=m
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_IMX is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+
+#
+# AC97 GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_MFD_88PM8607 is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=m
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+CONFIG_MMC_SDHCI=m
+# CONFIG_MMC_SDHCI_PLTFM is not set
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
+# CONFIG_MMC_MXC is not set
+# CONFIG_MEMSTICK is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=m
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_PCA9532 is not set
+# CONFIG_LEDS_GPIO is not set
+# CONFIG_LEDS_LP3944 is not set
+# CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_BD2802 is not set
+# CONFIG_LEDS_LT3593 is not set
+
+#
+# LED Triggers
+#
+# CONFIG_LEDS_TRIGGERS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+CONFIG_RTC_INTF_DEV_UIE_EMUL=y
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_MXC is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_DEFAULTS_TO_ORDERED=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_XATTR=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
+# CONFIG_EXT4_DEBUG is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_JBD2=y
+# CONFIG_JBD2_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+CONFIG_QUOTA=y
+CONFIG_QUOTA_NETLINK_INTERFACE=y
+# CONFIG_PRINT_QUOTA_WARNING is not set
+# CONFIG_QFMT_V1 is not set
+# CONFIG_QFMT_V2 is not set
+CONFIG_QUOTACTL=y
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=y
+# CONFIG_CUSE is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_CONFIGFS_FS=m
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_ECRYPT_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+# CONFIG_NFS_V4_1 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="cp437"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=m
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+CONFIG_NLS_ISO8859_15=m
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_DETECT_SOFTLOCKUP is not set
+# CONFIG_DETECT_HUNG_TASK is not set
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_ARM_UNWIND is not set
+# CONFIG_DEBUG_USER is not set
+# CONFIG_DEBUG_ERRORS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_LL=y
+CONFIG_EARLY_PRINTK=y
+# CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_OC_ETM is not set
+
+#
+# Security options
+#
+CONFIG_KEYS=y
+# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
+# CONFIG_SECURITY is not set
+CONFIG_SECURITYFS=y
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=m
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_ZLIB is not set
+CONFIG_CRYPTO_LZO=y
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_RATIONAL=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=m
+CONFIG_CRC16=y
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC_ITU_T=m
+CONFIG_CRC32=y
+CONFIG_CRC7=m
+CONFIG_LIBCRC32C=m
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/arm/configs/n770_defconfig b/arch/arm/configs/n770_defconfig
index 75cae18fbcb..de0c28aa43e 100644
--- a/arch/arm/configs/n770_defconfig
+++ b/arch/arm/configs/n770_defconfig
@@ -308,6 +308,7 @@ CONFIG_PM_SLEEP=y
 CONFIG_SUSPEND_UP_POSSIBLE=y
 CONFIG_SUSPEND=y
 # CONFIG_APM_EMULATION is not set
+CONFIG_PM_RUNTIME=y
 
 #
 # Networking
diff --git a/arch/arm/configs/n8x0_defconfig b/arch/arm/configs/n8x0_defconfig
index e6f667c5e58..9405e32783d 100644
--- a/arch/arm/configs/n8x0_defconfig
+++ b/arch/arm/configs/n8x0_defconfig
@@ -191,6 +191,7 @@ CONFIG_ARCH_OMAP=y
 #
 CONFIG_ARCH_OMAP_OTG=y
 # CONFIG_ARCH_OMAP1 is not set
+CONFIG_ARCH_OMAP2PLUS=y
 CONFIG_ARCH_OMAP2=y
 # CONFIG_ARCH_OMAP3 is not set
 # CONFIG_ARCH_OMAP4 is not set
@@ -198,8 +199,6 @@ CONFIG_ARCH_OMAP2=y
 #
 # OMAP Feature Selections
 #
-# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set
-# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set
 CONFIG_OMAP_RESET_CLOCKS=y
 # CONFIG_OMAP_MUX is not set
 # CONFIG_OMAP_MCBSP is not set
@@ -208,15 +207,13 @@ CONFIG_OMAP_MBOX_FWK=y
 CONFIG_OMAP_32K_TIMER=y
 CONFIG_OMAP_32K_TIMER_HZ=128
 CONFIG_OMAP_DM_TIMER=y
-# CONFIG_OMAP_LL_DEBUG_UART1 is not set
-# CONFIG_OMAP_LL_DEBUG_UART2 is not set
-CONFIG_OMAP_LL_DEBUG_UART3=y
+# CONFIG_OMAP_PM_NONE is not set
+CONFIG_OMAP_PM_NOOP=y
 # CONFIG_MACH_OMAP_GENERIC is not set
 
 #
 # OMAP Core Type
 #
-CONFIG_ARCH_OMAP24XX=y
 CONFIG_ARCH_OMAP2420=y
 # CONFIG_ARCH_OMAP2430 is not set
 
@@ -227,6 +224,9 @@ CONFIG_MACH_OMAP2_TUSB6010=y
 # CONFIG_MACH_OMAP_H4 is not set
 # CONFIG_MACH_OMAP_APOLLON is not set
 # CONFIG_MACH_OMAP_2430SDP is not set
+CONFIG_MACH_NOKIA_N800=y
+CONFIG_MACH_NOKIA_N810=y
+CONFIG_MACH_NOKIA_N810_WIMAX=y
 CONFIG_MACH_NOKIA_N8X0=y
 
 #
@@ -303,7 +303,7 @@ CONFIG_ALIGNMENT_TRAP=y
 CONFIG_ZBOOT_ROM_TEXT=0x10C08000
 CONFIG_ZBOOT_ROM_BSS=0x10200000
 # CONFIG_ZBOOT_ROM is not set
-CONFIG_CMDLINE="root=1f03 rootfstype=jffs2 console=ttyS2,115200n8"
+CONFIG_CMDLINE="root=/dev/mmcblk0p2 console=ttyS2,115200n8 debug earlyprintk rootwait"
 # CONFIG_XIP_KERNEL is not set
 # CONFIG_KEXEC is not set
 
@@ -337,7 +337,14 @@ CONFIG_HAVE_AOUT=y
 #
 # Power management options
 #
-# CONFIG_PM is not set
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_APM_EMULATION is not set
+CONFIG_PM_RUNTIME=y
+CONFIG_PM_OPS=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_NET=y
 
@@ -617,7 +624,55 @@ CONFIG_UNIX98_PTYS=y
 # CONFIG_R3964 is not set
 # CONFIG_RAW_DRIVER is not set
 # CONFIG_TCG_TPM is not set
-# CONFIG_I2C is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_COMPAT is not set
+# CONFIG_I2C_CHARDEV is not set
+# CONFIG_I2C_HELPER_AUTO is not set
+# CONFIG_I2C_SMBUS is not set
+
+#
+# I2C Algorithms
+#
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_OMAP=y
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
 CONFIG_SPI=y
 # CONFIG_SPI_DEBUG is not set
 CONFIG_SPI_MASTER=y
@@ -673,15 +728,44 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_MFD_ASIC3 is not set
 # CONFIG_HTC_EGPIO is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
+# CONFIG_TPS65010 is not set
+CONFIG_MENELAUS=y
+# CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_MFD_T7L66XB is not set
 # CONFIG_MFD_TC6387XB is not set
 # CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_AB3100_CORE is not set
 # CONFIG_EZX_PCAP is not set
+# CONFIG_AB4500_CORE is not set
+CONFIG_REGULATOR=y
+# CONFIG_REGULATOR_DEBUG is not set
+# CONFIG_REGULATOR_DUMMY is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_REGULATOR_MAX1586 is not set
+# CONFIG_REGULATOR_MAX8649 is not set
+# CONFIG_REGULATOR_MAX8660 is not set
+# CONFIG_REGULATOR_LP3971 is not set
+# CONFIG_REGULATOR_TPS65023 is not set
+# CONFIG_REGULATOR_TPS6507X is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
 #
@@ -718,7 +802,10 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
 CONFIG_USB_DEVICEFS=y
 CONFIG_USB_DEVICE_CLASS=y
 # CONFIG_USB_DYNAMIC_MINORS is not set
-# CONFIG_USB_OTG is not set
+CONFIG_USB_SUSPEND=y
+CONFIG_USB_OTG=y
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
 # CONFIG_USB_MON is not set
 # CONFIG_USB_WUSB is not set
 # CONFIG_USB_WUSB_CBAF is not set
@@ -737,9 +824,10 @@ CONFIG_USB_DEVICE_CLASS=y
 CONFIG_USB_MUSB_HDRC=y
 CONFIG_USB_TUSB6010=y
 # CONFIG_USB_MUSB_HOST is not set
-CONFIG_USB_MUSB_PERIPHERAL=y
-# CONFIG_USB_MUSB_OTG is not set
+# CONFIG_USB_MUSB_PERIPHERAL is not set
+CONFIG_USB_MUSB_OTG=y
 CONFIG_USB_GADGET_MUSB_HDRC=y
+CONFIG_USB_MUSB_HDRC_HCD=y
 # CONFIG_MUSB_PIO_ONLY is not set
 # CONFIG_USB_INVENTRA_DMA is not set
 # CONFIG_USB_TI_CPPI_DMA is not set
@@ -824,44 +912,77 @@ CONFIG_USB_GADGET_DUALSPEED=y
 # CONFIG_USB_ZERO is not set
 # CONFIG_USB_AUDIO is not set
 CONFIG_USB_ETH=y
-# CONFIG_USB_ETH_RNDIS is not set
+CONFIG_USB_ETH_RNDIS=y
+CONFIG_USB_ETH_EEM=y
 # CONFIG_USB_GADGETFS is not set
 # CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_MASS_STORAGE is not set
 # CONFIG_USB_G_SERIAL is not set
 # CONFIG_USB_MIDI_GADGET is not set
 # CONFIG_USB_G_PRINTER is not set
 # CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_USB_G_NOKIA is not set
+# CONFIG_USB_G_MULTI is not set
 
 #
 # OTG and related infrastructure
 #
 CONFIG_USB_OTG_UTILS=y
 # CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_ISP1301_OMAP is not set
+# CONFIG_USB_ULPI is not set
 CONFIG_NOP_USB_XCEIV=y
-# CONFIG_MMC is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_SDHCI is not set
+CONFIG_MMC_OMAP=y
+# CONFIG_MMC_SPI is not set
 # CONFIG_MEMSTICK is not set
-# CONFIG_ACCESSIBILITY is not set
 # CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
 CONFIG_RTC_LIB=y
 # CONFIG_RTC_CLASS is not set
 # CONFIG_DMADEVICES is not set
 # CONFIG_AUXDISPLAY is not set
-# CONFIG_REGULATOR is not set
 # CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
 # CONFIG_STAGING is not set
 
 #
 # File systems
 #
 # CONFIG_EXT2_FS is not set
-# CONFIG_EXT3_FS is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
 # CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -886,8 +1007,11 @@ CONFIG_INOTIFY_USER=y
 #
 # DOS/FAT/NT Filesystems
 #
+CONFIG_FAT_FS=y
 # CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 # CONFIG_NTFS_FS is not set
 
 #
@@ -934,7 +1058,6 @@ CONFIG_JFFS2_CMODE_PRIORITY=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 # CONFIG_NFS_FS is not set
 # CONFIG_NFSD is not set
diff --git a/arch/arm/configs/nuc950_defconfig b/arch/arm/configs/nuc950_defconfig
index 97300ec478d..51cc2a260cb 100644
--- a/arch/arm/configs/nuc950_defconfig
+++ b/arch/arm/configs/nuc950_defconfig
@@ -590,8 +590,40 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
-# CONFIG_FB is not set
 # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_NUC900=y
+CONFIG_GPM1040A0_320X240=y
+CONFIG_FB_NUC900_DEBUG=y
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+
 
 #
 # Display device support
@@ -603,6 +635,25 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_VGA_CONSOLE is not set
 CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+CONFIG_FONTS=y
+# CONFIG_FONT_8x8 is not set
+CONFIG_FONT_8x16=y
+# CONFIG_FONT_6x11 is not set
+# CONFIG_FONT_7x14 is not set
+# CONFIG_FONT_PEARL_8x8 is not set
+# CONFIG_FONT_ACORN_8x8 is not set
+# CONFIG_FONT_MINI_4x6 is not set
+# CONFIG_FONT_SUN8x16 is not set
+# CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_10x18 is not set
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+
 # CONFIG_SOUND is not set
 # CONFIG_HID_SUPPORT is not set
 CONFIG_USB_SUPPORT=y
diff --git a/arch/arm/configs/omap3_beagle_defconfig b/arch/arm/configs/omap3_beagle_defconfig
index c7999f5b1c9..5a9e95fa728 100644
--- a/arch/arm/configs/omap3_beagle_defconfig
+++ b/arch/arm/configs/omap3_beagle_defconfig
@@ -324,6 +324,7 @@ CONFIG_PM_SLEEP=y
 CONFIG_SUSPEND=y
 CONFIG_SUSPEND_FREEZER=y
 # CONFIG_APM_EMULATION is not set
+CONFIG_PM_RUNTIME=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_NET=y
 
diff --git a/arch/arm/configs/omap3_defconfig b/arch/arm/configs/omap3_defconfig
index 714835e5ebe..d6ad9217732 100644
--- a/arch/arm/configs/omap3_defconfig
+++ b/arch/arm/configs/omap3_defconfig
@@ -450,7 +450,7 @@ CONFIG_SUSPEND=y
 # CONFIG_PM_TEST_SUSPEND is not set
 CONFIG_SUSPEND_FREEZER=y
 # CONFIG_APM_EMULATION is not set
-# CONFIG_PM_RUNTIME is not set
+CONFIG_PM_RUNTIME=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_NET=y
 
diff --git a/arch/arm/configs/omap3_evm_defconfig b/arch/arm/configs/omap3_evm_defconfig
index e2ad859fbec..a6dd6d1af80 100644
--- a/arch/arm/configs/omap3_evm_defconfig
+++ b/arch/arm/configs/omap3_evm_defconfig
@@ -340,6 +340,7 @@ CONFIG_PM_SLEEP=y
 CONFIG_SUSPEND=y
 CONFIG_SUSPEND_FREEZER=y
 # CONFIG_APM_EMULATION is not set
+CONFIG_PM_RUNTIME=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_NET=y
 
diff --git a/arch/arm/configs/omap3_touchbook_defconfig b/arch/arm/configs/omap3_touchbook_defconfig
index 74fe6be9c5e..968fbaa8f04 100644
--- a/arch/arm/configs/omap3_touchbook_defconfig
+++ b/arch/arm/configs/omap3_touchbook_defconfig
@@ -368,7 +368,7 @@ CONFIG_SUSPEND=y
 # CONFIG_PM_TEST_SUSPEND is not set
 CONFIG_SUSPEND_FREEZER=y
 # CONFIG_APM_EMULATION is not set
-# CONFIG_PM_RUNTIME is not set
+CONFIG_PM_RUNTIME=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_NET=y
 
diff --git a/arch/arm/configs/omap_3430sdp_defconfig b/arch/arm/configs/omap_3430sdp_defconfig
index bb2917e5cb4..ddde429a7d9 100644
--- a/arch/arm/configs/omap_3430sdp_defconfig
+++ b/arch/arm/configs/omap_3430sdp_defconfig
@@ -363,6 +363,7 @@ CONFIG_PM_SLEEP=y
 CONFIG_SUSPEND=y
 CONFIG_SUSPEND_FREEZER=y
 # CONFIG_APM_EMULATION is not set
+CONFIG_PM_RUNTIME=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_NET=y
 
diff --git a/arch/arm/configs/omap_3630sdp_defconfig b/arch/arm/configs/omap_3630sdp_defconfig
index d25c3d4424c..609f348b105 100644
--- a/arch/arm/configs/omap_3630sdp_defconfig
+++ b/arch/arm/configs/omap_3630sdp_defconfig
@@ -361,7 +361,7 @@ CONFIG_SUSPEND=y
 # CONFIG_PM_TEST_SUSPEND is not set
 CONFIG_SUSPEND_FREEZER=y
 # CONFIG_APM_EMULATION is not set
-# CONFIG_PM_RUNTIME is not set
+CONFIG_PM_RUNTIME=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_NET=y
 
diff --git a/arch/arm/configs/omap_h2_1610_defconfig b/arch/arm/configs/omap_h2_1610_defconfig
index 523189586a4..91ef2ed0f80 100644
--- a/arch/arm/configs/omap_h2_1610_defconfig
+++ b/arch/arm/configs/omap_h2_1610_defconfig
@@ -331,6 +331,7 @@ CONFIG_PM_SLEEP=y
 CONFIG_SUSPEND=y
 CONFIG_SUSPEND_FREEZER=y
 # CONFIG_APM_EMULATION is not set
+CONFIG_PM_RUNTIME=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 
 #
diff --git a/arch/arm/configs/omap_zoom2_defconfig b/arch/arm/configs/omap_zoom2_defconfig
index a82e81332a0..881faea03d7 100644
--- a/arch/arm/configs/omap_zoom2_defconfig
+++ b/arch/arm/configs/omap_zoom2_defconfig
@@ -343,6 +343,7 @@ CONFIG_SUSPEND=y
 # CONFIG_PM_TEST_SUSPEND is not set
 CONFIG_SUSPEND_FREEZER=y
 # CONFIG_APM_EMULATION is not set
+CONFIG_PM_RUNTIME=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_NET=y
 
@@ -660,7 +661,7 @@ CONFIG_DEVKMEM=y
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=32
-CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=1
 CONFIG_SERIAL_8250_EXTENDED=y
 CONFIG_SERIAL_8250_MANY_PORTS=y
 CONFIG_SERIAL_8250_SHARE_IRQ=y
diff --git a/arch/arm/configs/omap_zoom3_defconfig b/arch/arm/configs/omap_zoom3_defconfig
index ff8ac3dcc31..5e55b550a40 100644
--- a/arch/arm/configs/omap_zoom3_defconfig
+++ b/arch/arm/configs/omap_zoom3_defconfig
@@ -361,7 +361,7 @@ CONFIG_SUSPEND=y
 # CONFIG_PM_TEST_SUSPEND is not set
 CONFIG_SUSPEND_FREEZER=y
 # CONFIG_APM_EMULATION is not set
-# CONFIG_PM_RUNTIME is not set
+CONFIG_PM_RUNTIME=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_NET=y
 
@@ -680,7 +680,7 @@ CONFIG_DEVKMEM=y
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=32
-CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=1
 CONFIG_SERIAL_8250_EXTENDED=y
 CONFIG_SERIAL_8250_MANY_PORTS=y
 CONFIG_SERIAL_8250_SHARE_IRQ=y
diff --git a/arch/arm/configs/orion5x_defconfig b/arch/arm/configs/orion5x_defconfig
index 85b05d3e279..ee1ebd8dfa8 100644
--- a/arch/arm/configs/orion5x_defconfig
+++ b/arch/arm/configs/orion5x_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.32-rc6
-# Sat Nov  7 20:52:21 2009
+# Linux kernel version: 2.6.33-rc6
+# Thu Feb  4 23:30:00 2010
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -32,6 +32,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -45,6 +51,7 @@ CONFIG_SYSVIPC_SYSCTL=y
 #
 CONFIG_TREE_RCU=y
 # CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
 # CONFIG_RCU_TRACE is not set
 CONFIG_RCU_FANOUT=32
 # CONFIG_RCU_FANOUT_EXACT is not set
@@ -122,14 +129,41 @@ CONFIG_LBDAF=y
 # IO Schedulers
 #
 CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
 CONFIG_IOSCHED_DEADLINE=y
 CONFIG_IOSCHED_CFQ=y
-# CONFIG_DEFAULT_AS is not set
 # CONFIG_DEFAULT_DEADLINE is not set
 CONFIG_DEFAULT_CFQ=y
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
 # CONFIG_FREEZER is not set
 
 #
@@ -158,6 +192,7 @@ CONFIG_MMU=y
 # CONFIG_ARCH_IXP2000 is not set
 # CONFIG_ARCH_IXP4XX is not set
 # CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
 # CONFIG_ARCH_KIRKWOOD is not set
 # CONFIG_ARCH_LOKI is not set
 # CONFIG_ARCH_MV78XX0 is not set
@@ -180,6 +215,7 @@ CONFIG_ARCH_ORION5X=y
 # CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
 # CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
 
 #
 # Orion Implementations
@@ -192,6 +228,7 @@ CONFIG_MACH_TS209=y
 CONFIG_MACH_TERASTATION_PRO2=y
 CONFIG_MACH_LINKSTATION_PRO=y
 CONFIG_MACH_LINKSTATION_MINI=y
+CONFIG_MACH_LINKSTATION_LS_HGL=y
 CONFIG_MACH_TS409=y
 CONFIG_MACH_WRT350N_V2=y
 CONFIG_MACH_TS78XX=y
@@ -268,12 +305,10 @@ CONFIG_FLATMEM_MANUAL=y
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
-CONFIG_SPLIT_PTLOCK_CPUS=4096
+CONFIG_SPLIT_PTLOCK_CPUS=999999
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=0
 CONFIG_VIRT_TO_BUS=y
-CONFIG_HAVE_MLOCK=y
-CONFIG_HAVE_MLOCKED_PAGE_BIT=y
 # CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 CONFIG_LEDS=y
@@ -412,10 +447,6 @@ CONFIG_NET_PKTGEN=m
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
-CONFIG_CFG80211_DEFAULT_PS_VALUE=0
-# CONFIG_WIRELESS_OLD_REGULATORY is not set
-CONFIG_WIRELESS_EXT=y
-CONFIG_WIRELESS_EXT_SYSFS=y
 # CONFIG_LIB80211 is not set
 
 #
@@ -554,6 +585,10 @@ CONFIG_BLK_DEV=y
 # CONFIG_BLK_DEV_COW_COMMON is not set
 CONFIG_BLK_DEV_LOOP=y
 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
 # CONFIG_BLK_DEV_NBD is not set
 # CONFIG_BLK_DEV_SX8 is not set
 # CONFIG_BLK_DEV_UB is not set
@@ -562,6 +597,7 @@ CONFIG_BLK_DEV_LOOP=y
 # CONFIG_ATA_OVER_ETH is not set
 # CONFIG_MG_DISK is not set
 CONFIG_MISC_DEVICES=y
+# CONFIG_AD525X_DPOT is not set
 # CONFIG_PHANTOM is not set
 # CONFIG_SGI_IOC4 is not set
 # CONFIG_TIFM_CORE is not set
@@ -569,6 +605,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
 #
@@ -621,7 +658,9 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_BNX2_ISCSI is not set
 # CONFIG_BE2ISCSI is not set
 # CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_HPSA is not set
 # CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_3W_SAS is not set
 # CONFIG_SCSI_ACARD is not set
 # CONFIG_SCSI_AACRAID is not set
 # CONFIG_SCSI_AIC7XXX is not set
@@ -657,6 +696,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_NSP32 is not set
 # CONFIG_SCSI_DEBUG is not set
 # CONFIG_SCSI_PMCRAID is not set
+# CONFIG_SCSI_PM8001 is not set
 # CONFIG_SCSI_SRP is not set
 # CONFIG_SCSI_BFA_FC is not set
 # CONFIG_SCSI_DH is not set
@@ -711,15 +751,16 @@ CONFIG_SATA_MV=y
 # CONFIG_PATA_NS87415 is not set
 # CONFIG_PATA_OPTI is not set
 # CONFIG_PATA_OPTIDMA is not set
+# CONFIG_PATA_PDC2027X is not set
 # CONFIG_PATA_PDC_OLD is not set
 # CONFIG_PATA_RADISYS is not set
 # CONFIG_PATA_RDC is not set
 # CONFIG_PATA_RZ1000 is not set
 # CONFIG_PATA_SC1200 is not set
 # CONFIG_PATA_SERVERWORKS is not set
-# CONFIG_PATA_PDC2027X is not set
 # CONFIG_PATA_SIL680 is not set
 # CONFIG_PATA_SIS is not set
+# CONFIG_PATA_TOSHIBA is not set
 # CONFIG_PATA_VIA is not set
 # CONFIG_PATA_WINBOND is not set
 # CONFIG_PATA_PLATFORM is not set
@@ -736,7 +777,7 @@ CONFIG_SATA_MV=y
 #
 
 #
-# See the help texts for more information.
+# The newer stack is recommended.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
@@ -842,8 +883,10 @@ CONFIG_MV643XX_ETH=y
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_TR is not set
 CONFIG_WLAN=y
-# CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
+# CONFIG_ATMEL is not set
+# CONFIG_PRISM54 is not set
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_HOSTAP is not set
 
 #
 # Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -866,6 +909,7 @@ CONFIG_WLAN=y
 # CONFIG_NETCONSOLE is not set
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_VMXNET3 is not set
 # CONFIG_ISDN is not set
 # CONFIG_PHONE is not set
 
@@ -875,6 +919,7 @@ CONFIG_WLAN=y
 CONFIG_INPUT=y
 # CONFIG_INPUT_FF_MEMLESS is not set
 # CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
 
 #
 # Userland interfaces
@@ -993,11 +1038,6 @@ CONFIG_I2C_MV64XXX=y
 # CONFIG_I2C_TINY_USB is not set
 
 #
-# Graphics adapter I2C/DDC channel drivers
-#
-# CONFIG_I2C_VOODOO3 is not set
-
-#
 # Other I2C/SMBus bus drivers
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
@@ -1006,7 +1046,6 @@ CONFIG_I2C_MV64XXX=y
 #
 # Miscellaneous I2C Chip support
 #
-# CONFIG_DS1682 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
@@ -1033,10 +1072,12 @@ CONFIG_GPIO_SYSFS=y
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
 #
+# CONFIG_GPIO_CS5535 is not set
 # CONFIG_GPIO_BT8XX is not set
 # CONFIG_GPIO_LANGWELL is not set
 
@@ -1079,6 +1120,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_GL520SM is not set
 # CONFIG_SENSORS_IT87 is not set
 # CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM73 is not set
 CONFIG_SENSORS_LM75=y
 # CONFIG_SENSORS_LM77 is not set
 # CONFIG_SENSORS_LM78 is not set
@@ -1104,6 +1146,7 @@ CONFIG_SENSORS_LM75=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1118,6 +1161,7 @@ CONFIG_SENSORS_LM75=y
 # CONFIG_SENSORS_W83L786NG is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_SENSORS_LIS3_I2C is not set
 # CONFIG_THERMAL is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
@@ -1140,11 +1184,13 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_TMIO is not set
 # CONFIG_MFD_TC6393XB is not set
 # CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
+# CONFIG_MFD_88PM8607 is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1316,6 +1362,7 @@ CONFIG_USB_STORAGE_JUMPSHOT=y
 # OTG and related infrastructure
 #
 # CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_USB_ULPI is not set
 # CONFIG_NOP_USB_XCEIV is not set
 # CONFIG_UWB is not set
 # CONFIG_MMC is not set
@@ -1332,6 +1379,7 @@ CONFIG_LEDS_GPIO_PLATFORM=y
 # CONFIG_LEDS_LP3944 is not set
 # CONFIG_LEDS_PCA955X is not set
 # CONFIG_LEDS_BD2802 is not set
+# CONFIG_LEDS_LT3593 is not set
 
 #
 # LED Triggers
@@ -1377,6 +1425,7 @@ CONFIG_RTC_DRV_PCF8563=y
 # CONFIG_RTC_DRV_PCF8583 is not set
 CONFIG_RTC_DRV_M41T80=y
 # CONFIG_RTC_DRV_M41T80_WDT is not set
+# CONFIG_RTC_DRV_BQ32K is not set
 CONFIG_RTC_DRV_S35390A=y
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
@@ -1398,7 +1447,9 @@ CONFIG_RTC_DRV_S35390A=y
 CONFIG_RTC_DRV_M48T86=y
 # CONFIG_RTC_DRV_M48T35 is not set
 # CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
 # CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
 # CONFIG_RTC_DRV_V3020 is not set
 
 #
@@ -1686,7 +1737,9 @@ CONFIG_DEBUG_USER=y
 CONFIG_DEBUG_ERRORS=y
 # CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_DEBUG_LL=y
+# CONFIG_EARLY_PRINTK is not set
 # CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_OC_ETM is not set
 
 #
 # Security options
@@ -1694,7 +1747,11 @@ CONFIG_DEBUG_LL=y
 # CONFIG_KEYS is not set
 # CONFIG_SECURITY is not set
 # CONFIG_SECURITYFS is not set
-# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
 CONFIG_CRYPTO=y
 
 #
diff --git a/arch/arm/configs/pxa168_defconfig b/arch/arm/configs/pxa168_defconfig
index 791b8c39aef..113511f91eb 100644
--- a/arch/arm/configs/pxa168_defconfig
+++ b/arch/arm/configs/pxa168_defconfig
@@ -1,15 +1,13 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29-rc3
-# Fri Mar 20 13:43:13 2009
+# Linux kernel version: 2.6.33-rc3
+# Tue Jan 12 08:57:10 2010
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_MMU=y
-# CONFIG_NO_IOPORT is not set
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_STACKTRACE_SUPPORT=y
 CONFIG_HAVE_LATENCYTOP_SUPPORT=y
@@ -18,13 +16,12 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_HARDIRQS_SW_RESEND=y
 CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_VECTORS_BASE=0xffff0000
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -35,6 +32,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -46,11 +49,13 @@ CONFIG_SYSVIPC_SYSCTL=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_GROUP_SCHED is not set
@@ -64,10 +69,10 @@ CONFIG_NAMESPACES=y
 # CONFIG_USER_NS is not set
 # CONFIG_PID_NS is not set
 # CONFIG_NET_NS is not set
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_BLK_DEV_INITRD is not set
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 # CONFIG_EMBEDDED is not set
 CONFIG_UID16=y
 CONFIG_SYSCTL_SYSCALL=y
@@ -78,17 +83,20 @@ CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 CONFIG_ELF_CORE=y
-CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
 CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
@@ -98,6 +106,11 @@ CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -109,8 +122,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -118,31 +130,62 @@ CONFIG_BLOCK=y
 # IO Schedulers
 #
 CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
 CONFIG_IOSCHED_DEADLINE=y
 CONFIG_IOSCHED_CFQ=y
-# CONFIG_DEFAULT_AS is not set
 # CONFIG_DEFAULT_DEADLINE is not set
 CONFIG_DEFAULT_CFQ=y
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
 # CONFIG_FREEZER is not set
 
 #
 # System Type
 #
+CONFIG_MMU=y
 # CONFIG_ARCH_AAEC2000 is not set
 # CONFIG_ARCH_INTEGRATOR is not set
 # CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_VERSATILE is not set
 # CONFIG_ARCH_AT91 is not set
 # CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
 # CONFIG_ARCH_EBSA110 is not set
 # CONFIG_ARCH_EP93XX is not set
 # CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
 # CONFIG_ARCH_NETX is not set
 # CONFIG_ARCH_H720X is not set
-# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_NOMADIK is not set
 # CONFIG_ARCH_IOP13XX is not set
 # CONFIG_ARCH_IOP32X is not set
 # CONFIG_ARCH_IOP33X is not set
@@ -150,26 +193,30 @@ CONFIG_DEFAULT_IOSCHED="cfq"
 # CONFIG_ARCH_IXP2000 is not set
 # CONFIG_ARCH_IXP4XX is not set
 # CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
 # CONFIG_ARCH_KIRKWOOD is not set
-# CONFIG_ARCH_KS8695 is not set
-# CONFIG_ARCH_NS9XXX is not set
 # CONFIG_ARCH_LOKI is not set
 # CONFIG_ARCH_MV78XX0 is not set
-# CONFIG_ARCH_MXC is not set
 # CONFIG_ARCH_ORION5X is not set
+CONFIG_ARCH_MMP=y
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
 # CONFIG_ARCH_PNX4008 is not set
 # CONFIG_ARCH_PXA is not set
-CONFIG_ARCH_MMP=y
+# CONFIG_ARCH_MSM is not set
 # CONFIG_ARCH_RPC is not set
 # CONFIG_ARCH_SA1100 is not set
 # CONFIG_ARCH_S3C2410 is not set
 # CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
 # CONFIG_ARCH_SHARK is not set
 # CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
 # CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
-# CONFIG_ARCH_MSM is not set
-# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
 # CONFIG_MACH_TAVOREVB is not set
 
 #
@@ -177,6 +224,7 @@ CONFIG_ARCH_MMP=y
 #
 CONFIG_MACH_ASPENITE=y
 CONFIG_MACH_ZYLONITE2=y
+CONFIG_MACH_AVENGERS_LITE=y
 # CONFIG_MACH_TTC_DKB is not set
 CONFIG_CPU_PXA168=y
 CONFIG_PLAT_PXA=y
@@ -187,7 +235,7 @@ CONFIG_PLAT_PXA=y
 CONFIG_CPU_MOHAWK=y
 CONFIG_CPU_32v5=y
 CONFIG_CPU_ABRT_EV5T=y
-CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_PABRT_LEGACY=y
 CONFIG_CPU_CACHE_VIVT=y
 CONFIG_CPU_COPY_V4WB=y
 CONFIG_CPU_TLB_V4WBI=y
@@ -201,7 +249,7 @@ CONFIG_ARM_THUMB=y
 # CONFIG_CPU_ICACHE_DISABLE is not set
 # CONFIG_CPU_DCACHE_DISABLE is not set
 # CONFIG_CPU_BPREDICT_DISABLE is not set
-# CONFIG_OUTER_CACHE is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
 CONFIG_IWMMXT=y
 CONFIG_COMMON_CLKDEV=y
 
@@ -223,13 +271,15 @@ CONFIG_VMSPLIT_3G=y
 # CONFIG_VMSPLIT_2G is not set
 # CONFIG_VMSPLIT_1G is not set
 CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
 CONFIG_PREEMPT=y
 CONFIG_HZ=100
 CONFIG_AEABI=y
 CONFIG_OABI_COMPAT=y
-CONFIG_ARCH_FLATMEM_HAS_HOLES=y
 # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
 # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
 CONFIG_SELECT_MEMORY_MODEL=y
 CONFIG_FLATMEM_MANUAL=y
 # CONFIG_DISCONTIGMEM_MANUAL is not set
@@ -237,12 +287,14 @@ CONFIG_FLATMEM_MANUAL=y
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
-CONFIG_SPLIT_PTLOCK_CPUS=4096
+CONFIG_SPLIT_PTLOCK_CPUS=999999
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=0
 CONFIG_VIRT_TO_BUS=y
-CONFIG_UNEVICTABLE_LRU=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
 
 #
 # Boot options
@@ -288,7 +340,6 @@ CONFIG_NET=y
 #
 # Networking options
 #
-CONFIG_COMPAT_NET_DEV_OPS=y
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
@@ -330,6 +381,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -343,6 +395,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
 # CONFIG_NET_SCHED is not set
 # CONFIG_DCB is not set
 
@@ -355,13 +409,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-# CONFIG_PHONET is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
-CONFIG_WIRELESS_OLD_REGULATORY=y
-# CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
-# CONFIG_MAC80211 is not set
+
+#
+# CFG80211 needs to be enabled for MAC80211
+#
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -374,6 +428,7 @@ CONFIG_WIRELESS_OLD_REGULATORY=y
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 # CONFIG_STANDALONE is not set
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
 CONFIG_FW_LOADER=y
@@ -412,8 +467,10 @@ CONFIG_MII=y
 # CONFIG_AX88796 is not set
 CONFIG_SMC91X=y
 # CONFIG_DM9000 is not set
+# CONFIG_ETHOC is not set
 # CONFIG_SMC911X is not set
 # CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -422,15 +479,12 @@ CONFIG_SMC91X=y
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851_MLL is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
-
-#
-# Wireless LAN
-#
-# CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
-# CONFIG_IWLWIFI_LEDS is not set
+CONFIG_WLAN=y
+# CONFIG_HOSTAP is not set
 
 #
 # Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -442,6 +496,7 @@ CONFIG_SMC91X=y
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
 # CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
 
 #
 # Input device support
@@ -449,6 +504,7 @@ CONFIG_SMC91X=y
 CONFIG_INPUT=y
 # CONFIG_INPUT_FF_MEMLESS is not set
 # CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
 
 #
 # Userland interfaces
@@ -510,6 +566,11 @@ CONFIG_UNIX98_PTYS=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 CONFIG_ARCH_REQUIRE_GPIOLIB=y
 CONFIG_GPIOLIB=y
 # CONFIG_DEBUG_GPIO is not set
@@ -530,11 +591,14 @@ CONFIG_GPIOLIB=y
 #
 # SPI GPIO expanders:
 #
+
+#
+# AC97 GPIO expanders:
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -555,22 +619,8 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_T7L66XB is not set
 # CONFIG_MFD_TC6387XB is not set
 # CONFIG_MFD_TC6393XB is not set
-
-#
-# Multimedia devices
-#
-
-#
-# Multimedia core support
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_DVB_CORE is not set
-# CONFIG_VIDEO_MEDIA is not set
-
-#
-# Multimedia drivers
-#
-# CONFIG_DAB is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
 
 #
 # Graphics support
@@ -595,13 +645,17 @@ CONFIG_DUMMY_CONSOLE=y
 # CONFIG_USB_SUPPORT is not set
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
-# CONFIG_ACCESSIBILITY is not set
 # CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
 CONFIG_RTC_LIB=y
 # CONFIG_RTC_CLASS is not set
 # CONFIG_DMADEVICES is not set
-# CONFIG_REGULATOR is not set
+# CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
 # CONFIG_STAGING is not set
 
 #
@@ -613,10 +667,13 @@ CONFIG_RTC_LIB=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
-CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -627,6 +684,11 @@ CONFIG_INOTIFY_USER=y
 CONFIG_GENERIC_ACL=y
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -673,6 +735,7 @@ CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 CONFIG_NFS_V3_ACL=y
 CONFIG_NFS_V4=y
+# CONFIG_NFS_V4_1 is not set
 CONFIG_ROOT_NFS=y
 # CONFIG_NFSD is not set
 CONFIG_LOCKD=y
@@ -681,7 +744,6 @@ CONFIG_NFS_ACL_SUPPORT=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
 CONFIG_SUNRPC_GSS=y
-# CONFIG_SUNRPC_REGISTER_V4 is not set
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
@@ -706,6 +768,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -714,11 +777,15 @@ CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
 # CONFIG_DEBUG_OBJECTS is not set
 # CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
 # CONFIG_DEBUG_PREEMPT is not set
 # CONFIG_DEBUG_RT_MUTEXES is not set
 # CONFIG_RT_MUTEX_TESTER is not set
@@ -738,28 +805,33 @@ CONFIG_DEBUG_MEMORY_INIT=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 # CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
-
-#
-# Tracers
-#
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
 # CONFIG_FUNCTION_TRACER is not set
 # CONFIG_IRQSOFF_TRACER is not set
 # CONFIG_PREEMPT_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
-# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
 # CONFIG_BOOT_TRACER is not set
-# CONFIG_TRACE_BRANCH_PROFILING is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
 # CONFIG_STACK_TRACER is not set
-# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -768,7 +840,9 @@ CONFIG_DEBUG_USER=y
 CONFIG_DEBUG_ERRORS=y
 # CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_DEBUG_LL=y
+# CONFIG_EARLY_PRINTK is not set
 # CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_OC_ETM is not set
 
 #
 # Security options
@@ -776,13 +850,16 @@ CONFIG_DEBUG_LL=y
 # CONFIG_KEYS is not set
 # CONFIG_SECURITY is not set
 # CONFIG_SECURITYFS is not set
-# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
 CONFIG_CRYPTO=y
 
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
 CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD2=y
@@ -791,10 +868,12 @@ CONFIG_CRYPTO_BLKCIPHER2=y
 CONFIG_CRYPTO_HASH=y
 CONFIG_CRYPTO_HASH2=y
 CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
 CONFIG_CRYPTO_MANAGER=y
 CONFIG_CRYPTO_MANAGER2=y
 # CONFIG_CRYPTO_GF128MUL is not set
 # CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
 # CONFIG_CRYPTO_CRYPTD is not set
 # CONFIG_CRYPTO_AUTHENC is not set
 # CONFIG_CRYPTO_TEST is not set
@@ -822,11 +901,13 @@ CONFIG_CRYPTO_CBC=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 CONFIG_CRYPTO_MD5=y
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -863,6 +944,7 @@ CONFIG_CRYPTO_DES=y
 # Compression
 #
 # CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
 # CONFIG_CRYPTO_LZO is not set
 
 #
@@ -870,6 +952,7 @@ CONFIG_CRYPTO_DES=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
@@ -884,7 +967,7 @@ CONFIG_CRC32=y
 # CONFIG_CRC7 is not set
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
-CONFIG_PLIST=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/arm/configs/raumfeld_defconfig b/arch/arm/configs/raumfeld_defconfig
new file mode 100644
index 00000000000..acb1a8f30e3
--- /dev/null
+++ b/arch/arm/configs/raumfeld_defconfig
@@ -0,0 +1,1898 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.32-rc5
+# Sun Nov  1 21:57:32 2009
+#
+CONFIG_ARM=y
+CONFIG_HAVE_PWM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_ARCH_HAS_CPUFREQ=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+# CONFIG_SYSVIPC is not set
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+CONFIG_COMPAT_BRK=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+CONFIG_SLOW_WORK=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_FREEZER=y
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+CONFIG_ARCH_PXA=y
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+
+#
+# Intel PXA2xx/PXA3xx Implementations
+#
+
+#
+# Supported PXA3xx Processor Variants
+#
+CONFIG_CPU_PXA300=y
+# CONFIG_CPU_PXA310 is not set
+CONFIG_CPU_PXA320=y
+# CONFIG_CPU_PXA930 is not set
+# CONFIG_CPU_PXA935 is not set
+# CONFIG_CPU_PXA950 is not set
+
+#
+# Intel/Marvell Dev Platforms (sorted by hardware release time)
+#
+# CONFIG_ARCH_LUBBOCK is not set
+# CONFIG_MACH_MAINSTONE is not set
+# CONFIG_MACH_ZYLONITE is not set
+# CONFIG_MACH_LITTLETON is not set
+# CONFIG_MACH_TAVOREVB is not set
+# CONFIG_MACH_SAAR is not set
+
+#
+# Third Party Dev Platforms (sorted by vendor name)
+#
+# CONFIG_ARCH_PXA_IDP is not set
+# CONFIG_ARCH_VIPER is not set
+# CONFIG_MACH_BALLOON3 is not set
+# CONFIG_MACH_CSB726 is not set
+# CONFIG_MACH_ARMCORE is not set
+# CONFIG_MACH_EM_X270 is not set
+# CONFIG_MACH_EXEDA is not set
+# CONFIG_MACH_CM_X300 is not set
+# CONFIG_ARCH_GUMSTIX is not set
+# CONFIG_MACH_INTELMOTE2 is not set
+# CONFIG_MACH_STARGATE2 is not set
+# CONFIG_MACH_XCEP is not set
+# CONFIG_TRIZEPS_PXA is not set
+# CONFIG_MACH_LOGICPD_PXA270 is not set
+# CONFIG_MACH_PCM027 is not set
+# CONFIG_MACH_COLIBRI is not set
+# CONFIG_MACH_COLIBRI300 is not set
+# CONFIG_MACH_COLIBRI320 is not set
+
+#
+# End-user Products (sorted by vendor name)
+#
+# CONFIG_MACH_H4700 is not set
+# CONFIG_MACH_H5000 is not set
+# CONFIG_MACH_HIMALAYA is not set
+# CONFIG_MACH_MAGICIAN is not set
+# CONFIG_MACH_MIOA701 is not set
+# CONFIG_PXA_EZX is not set
+# CONFIG_MACH_MP900C is not set
+# CONFIG_ARCH_PXA_PALM is not set
+CONFIG_MACH_RAUMFELD_RC=y
+CONFIG_MACH_RAUMFELD_CONNECTOR=y
+CONFIG_MACH_RAUMFELD_PROTO=y
+CONFIG_MACH_RAUMFELD_SPEAKER=y
+# CONFIG_PXA_SHARPSL is not set
+# CONFIG_ARCH_PXA_ESERIES is not set
+CONFIG_PXA3xx=y
+CONFIG_PXA_SSP=y
+CONFIG_PLAT_PXA=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_XSC3=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_PABRT_LEGACY=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+CONFIG_IO_36=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_OUTER_CACHE=y
+CONFIG_CACHE_XSC3L2=y
+CONFIG_ARM_L1_CACHE_SHIFT=5
+CONFIG_IWMMXT=y
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_CMDLINE="console=ttyS0,115200 rw"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+CONFIG_CPU_FREQ_STAT=y
+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_APM_EMULATION=y
+# CONFIG_PM_RUNTIME is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=y
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=y
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_WIRELESS=y
+CONFIG_CFG80211=y
+# CONFIG_NL80211_TESTMODE is not set
+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
+CONFIG_CFG80211_REG_DEBUG=y
+CONFIG_CFG80211_DEFAULT_PS=y
+CONFIG_CFG80211_DEFAULT_PS_VALUE=1
+CONFIG_WIRELESS_OLD_REGULATORY=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+CONFIG_LIB80211=y
+# CONFIG_LIB80211_DEBUG is not set
+CONFIG_MAC80211=y
+CONFIG_MAC80211_RC_MINSTREL=y
+# CONFIG_MAC80211_RC_DEFAULT_PID is not set
+CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
+CONFIG_MAC80211_RC_DEFAULT="minstrel"
+# CONFIG_MAC80211_MESH is not set
+# CONFIG_MAC80211_LEDS is not set
+# CONFIG_MAC80211_DEBUG_MENU is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+CONFIG_NFTL=y
+CONFIG_NFTL_RW=y
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+CONFIG_MTD_BLOCK2MTD=y
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_H1900 is not set
+# CONFIG_MTD_NAND_GPIO is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_SHARPSL is not set
+CONFIG_MTD_NAND_PXA3xx=y
+# CONFIG_MTD_NAND_PXA3xx_BUILTIN is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_RESERVE=1
+# CONFIG_MTD_UBI_GLUEBI is not set
+
+#
+# UBI debugging options
+#
+# CONFIG_MTD_UBI_DEBUG is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_ISL29003=y
+CONFIG_TI_DAC7512=y
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMC911X is not set
+CONFIG_SMSC911X=y
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_WLAN=y
+# CONFIG_WLAN_PRE80211 is not set
+CONFIG_WLAN_80211=y
+CONFIG_LIBERTAS=y
+# CONFIG_LIBERTAS_USB is not set
+CONFIG_LIBERTAS_SDIO=m
+# CONFIG_LIBERTAS_SPI is not set
+# CONFIG_LIBERTAS_DEBUG is not set
+# CONFIG_LIBERTAS_THINFIRM is not set
+# CONFIG_AT76C50X_USB is not set
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_USB_NET_RNDIS_WLAN is not set
+# CONFIG_RTL8187 is not set
+# CONFIG_MAC80211_HWSIM is not set
+# CONFIG_P54_COMMON is not set
+# CONFIG_ATH_COMMON is not set
+# CONFIG_HOSTAP is not set
+# CONFIG_B43 is not set
+# CONFIG_B43LEGACY is not set
+# CONFIG_ZD1211RW is not set
+# CONFIG_RT2X00 is not set
+# CONFIG_WL12XX is not set
+# CONFIG_IWM is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+CONFIG_USB_USBNET=y
+# CONFIG_USB_NET_AX8817X is not set
+CONFIG_USB_NET_CDCETHER=y
+# CONFIG_USB_NET_CDC_EEM is not set
+# CONFIG_USB_NET_DM9601 is not set
+# CONFIG_USB_NET_SMSC95XX is not set
+# CONFIG_USB_NET_GL620A is not set
+# CONFIG_USB_NET_NET1080 is not set
+# CONFIG_USB_NET_PLUSB is not set
+CONFIG_USB_NET_MCS7830=y
+# CONFIG_USB_NET_RNDIS_HOST is not set
+# CONFIG_USB_NET_CDC_SUBSET is not set
+# CONFIG_USB_NET_ZAURUS is not set
+# CONFIG_USB_NET_INT51X1 is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+CONFIG_INPUT_POLLDEV=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_LM8323 is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_PXA27x is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
+# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+CONFIG_TOUCHSCREEN_EETI=m
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_ATI_REMOTE is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+# CONFIG_INPUT_CM109 is not set
+# CONFIG_INPUT_UINPUT is not set
+CONFIG_INPUT_GPIO_ROTARY_ENCODER=y
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_PXA=y
+# CONFIG_I2C_PXA_SLAVE is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+CONFIG_SPI_DEBUG=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_BITBANG=y
+CONFIG_SPI_GPIO=y
+# CONFIG_SPI_PXA2XX is not set
+
+#
+# SPI Protocol Masters
+#
+CONFIG_SPI_SPIDEV=y
+# CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+CONFIG_DEBUG_GPIO=y
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+
+#
+# AC97 GPIO expanders:
+#
+CONFIG_W1=m
+
+#
+# 1-wire Bus Masters
+#
+# CONFIG_W1_MASTER_DS2490 is not set
+# CONFIG_W1_MASTER_DS2482 is not set
+# CONFIG_W1_MASTER_DS1WM is not set
+CONFIG_W1_MASTER_GPIO=m
+
+#
+# 1-wire Slaves
+#
+# CONFIG_W1_SLAVE_THERM is not set
+# CONFIG_W1_SLAVE_SMEM is not set
+# CONFIG_W1_SLAVE_DS2431 is not set
+# CONFIG_W1_SLAVE_DS2433 is not set
+CONFIG_W1_SLAVE_DS2760=m
+# CONFIG_W1_SLAVE_BQ27000 is not set
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+CONFIG_PDA_POWER=y
+# CONFIG_APM_POWER is not set
+CONFIG_BATTERY_DS2760=m
+# CONFIG_BATTERY_DS2782 is not set
+# CONFIG_BATTERY_BQ27x00 is not set
+# CONFIG_BATTERY_MAX17040 is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADCXX is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7462 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_G760A is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM70 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4215 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LM95241 is not set
+# CONFIG_SENSORS_MAX1111 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_SHT15 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_TMP401 is not set
+# CONFIG_SENSORS_TMP421 is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+CONFIG_SENSORS_LIS3_SPI=y
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_EZX_PCAP is not set
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_DEBUG=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_REGULATOR_MAX1586 is not set
+CONFIG_REGULATOR_MAX8660=y
+# CONFIG_REGULATOR_LP3971 is not set
+# CONFIG_REGULATOR_TPS65023 is not set
+# CONFIG_REGULATOR_TPS6507X is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_PXA=y
+# CONFIG_FB_PXA_OVERLAY is not set
+# CONFIG_FB_PXA_SMARTPANEL is not set
+# CONFIG_FB_PXA_PARAMETERS is not set
+CONFIG_PXA3XX_GCU=y
+# CONFIG_FB_MBX is not set
+# CONFIG_FB_W100 is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_BACKLIGHT_PWM=y
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+# CONFIG_LOGO_LINUX_CLUT224 is not set
+CONFIG_LOGO_RAUMFELD_CLUT224=y
+CONFIG_SOUND=y
+# CONFIG_SOUND_OSS_CORE is not set
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_JACK=y
+# CONFIG_SND_SEQUENCER is not set
+# CONFIG_SND_MIXER_OSS is not set
+# CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+# CONFIG_SND_DRIVERS is not set
+CONFIG_SND_ARM=y
+CONFIG_SND_PXA2XX_LIB=y
+# CONFIG_SND_PXA2XX_AC97 is not set
+CONFIG_SND_SPI=y
+# CONFIG_SND_USB is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_PXA2XX_SOC=y
+CONFIG_SND_PXA_SOC_SSP=y
+CONFIG_SND_SOC_RAUMFELD=y
+CONFIG_SND_SOC_I2C_AND_SPI=y
+# CONFIG_SND_SOC_ALL_CODECS is not set
+CONFIG_SND_SOC_AK4104=y
+CONFIG_SND_SOC_CS4270=y
+# CONFIG_SOUND_PRIME is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+CONFIG_HID_A4TECH=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_BELKIN=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+CONFIG_HID_CYPRESS=y
+CONFIG_HID_DRAGONRISE=y
+# CONFIG_DRAGONRISE_FF is not set
+CONFIG_HID_EZKEY=y
+CONFIG_HID_KYE=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_TWINHAN=y
+CONFIG_HID_KENSINGTON=y
+CONFIG_HID_LOGITECH=y
+# CONFIG_LOGITECH_FF is not set
+# CONFIG_LOGIRUMBLEPAD2_FF is not set
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+CONFIG_HID_NTRIG=y
+CONFIG_HID_PANTHERLORD=y
+# CONFIG_PANTHERLORD_FF is not set
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SUNPLUS=y
+CONFIG_HID_GREENASIA=y
+# CONFIG_GREENASIA_FF is not set
+CONFIG_HID_SMARTJOYPLUS=y
+# CONFIG_SMARTJOYPLUS_FF is not set
+CONFIG_HID_TOPSEED=y
+CONFIG_HID_THRUSTMASTER=y
+# CONFIG_THRUSTMASTER_FF is not set
+CONFIG_HID_ZEROPLUS=y
+# CONFIG_ZEROPLUS_FF is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+CONFIG_USB_DEBUG=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_SUSPEND is not set
+# CONFIG_USB_OTG is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+# CONFIG_USB_MUSB_HDRC is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+CONFIG_USB_STORAGE_FREECOM=y
+CONFIG_USB_STORAGE_ISD200=y
+CONFIG_USB_STORAGE_USBAT=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+CONFIG_MMC_PXA=m
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
+# CONFIG_MMC_SPI is not set
+# CONFIG_MEMSTICK is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_PCA9532 is not set
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_GPIO_PLATFORM=y
+# CONFIG_LEDS_LP3944 is not set
+# CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_DAC124S085 is not set
+# CONFIG_LEDS_PWM is not set
+# CONFIG_LEDS_BD2802 is not set
+CONFIG_LEDS_LT3593=y
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+# CONFIG_LEDS_TRIGGER_TIMER is not set
+# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+# CONFIG_LEDS_TRIGGER_GPIO is not set
+# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
+
+#
+# iptables trigger is under Netfilter config (LED target)
+#
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_SA1100 is not set
+CONFIG_RTC_DRV_PXA=y
+CONFIG_DMADEVICES=y
+
+#
+# DMA Devices
+#
+# CONFIG_AUXDISPLAY is not set
+CONFIG_UIO=y
+# CONFIG_UIO_PDRV is not set
+# CONFIG_UIO_PDRV_GENIRQ is not set
+# CONFIG_UIO_SMX is not set
+# CONFIG_UIO_SERCOS3 is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+CONFIG_EXT2_FS_XIP=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_FS_XIP=y
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+CONFIG_FSCACHE=y
+CONFIG_FSCACHE_STATS=y
+# CONFIG_FSCACHE_HISTOGRAM is not set
+# CONFIG_FSCACHE_DEBUG is not set
+CONFIG_CACHEFILES=y
+# CONFIG_CACHEFILES_DEBUG is not set
+# CONFIG_CACHEFILES_HISTOGRAM is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_UBIFS_FS=y
+# CONFIG_UBIFS_FS_XATTR is not set
+# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
+CONFIG_UBIFS_FS_LZO=y
+CONFIG_UBIFS_FS_ZLIB=y
+# CONFIG_UBIFS_FS_DEBUG is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+CONFIG_NFS_FSCACHE=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_737=y
+CONFIG_NLS_CODEPAGE_775=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_CODEPAGE_852=y
+CONFIG_NLS_CODEPAGE_855=y
+CONFIG_NLS_CODEPAGE_857=y
+CONFIG_NLS_CODEPAGE_860=y
+CONFIG_NLS_CODEPAGE_861=y
+CONFIG_NLS_CODEPAGE_862=y
+CONFIG_NLS_CODEPAGE_863=y
+CONFIG_NLS_CODEPAGE_864=y
+CONFIG_NLS_CODEPAGE_865=y
+CONFIG_NLS_CODEPAGE_866=y
+CONFIG_NLS_CODEPAGE_869=y
+CONFIG_NLS_CODEPAGE_936=y
+CONFIG_NLS_CODEPAGE_950=y
+CONFIG_NLS_CODEPAGE_932=y
+CONFIG_NLS_CODEPAGE_949=y
+CONFIG_NLS_CODEPAGE_874=y
+CONFIG_NLS_ISO8859_8=y
+CONFIG_NLS_CODEPAGE_1250=y
+CONFIG_NLS_CODEPAGE_1251=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_2=y
+CONFIG_NLS_ISO8859_3=y
+CONFIG_NLS_ISO8859_4=y
+CONFIG_NLS_ISO8859_5=y
+CONFIG_NLS_ISO8859_6=y
+CONFIG_NLS_ISO8859_7=y
+CONFIG_NLS_ISO8859_9=y
+CONFIG_NLS_ISO8859_13=y
+CONFIG_NLS_ISO8859_14=y
+CONFIG_NLS_ISO8859_15=y
+CONFIG_NLS_KOI8_R=y
+CONFIG_NLS_KOI8_U=y
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_PRINTK_TIME=y
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_BOOT_TRACER is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_LL=y
+# CONFIG_DEBUG_ICEDCC is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_ZLIB is not set
+CONFIG_CRYPTO_LZO=y
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+CONFIG_CRC16=y
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/arm/configs/rx51_defconfig b/arch/arm/configs/rx51_defconfig
index 193bd334fbb..473f9e13f08 100644
--- a/arch/arm/configs/rx51_defconfig
+++ b/arch/arm/configs/rx51_defconfig
@@ -59,8 +59,6 @@ CONFIG_FAIR_GROUP_SCHED=y
 CONFIG_USER_SCHED=y
 # CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -322,6 +320,7 @@ CONFIG_PM_SLEEP=y
 CONFIG_SUSPEND=y
 CONFIG_SUSPEND_FREEZER=y
 # CONFIG_APM_EMULATION is not set
+CONFIG_PM_RUNTIME=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_NET=y
 
@@ -479,7 +478,6 @@ CONFIG_BT_HIDP=m
 # CONFIG_BT_HCIBFUSB is not set
 # CONFIG_BT_HCIVHCI is not set
 # CONFIG_AF_RXRPC is not set
-# CONFIG_PHONET is not set
 CONFIG_WIRELESS=y
 CONFIG_CFG80211=y
 # CONFIG_CFG80211_REG_DEBUG is not set
diff --git a/arch/arm/configs/s3c2410_defconfig b/arch/arm/configs/s3c2410_defconfig
index 2f10dae0279..8e94c3caeb8 100644
--- a/arch/arm/configs/s3c2410_defconfig
+++ b/arch/arm/configs/s3c2410_defconfig
@@ -187,7 +187,7 @@ CONFIG_S3C24XX_GPIO_EXTRA128=y
 CONFIG_PM_SIMTEC=y
 CONFIG_S3C2410_DMA=y
 # CONFIG_S3C2410_DMA_DEBUG is not set
-CONFIG_S3C24XX_ADC=y
+CONFIG_S3C_ADC=y
 CONFIG_MACH_SMDK=y
 CONFIG_PLAT_S3C=y
 CONFIG_CPU_LLSERIAL_S3C2410=y
@@ -203,8 +203,8 @@ CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
 #
 # Power management
 #
-# CONFIG_S3C2410_PM_DEBUG is not set
-# CONFIG_S3C2410_PM_CHECK is not set
+# CONFIG_SAMSUNG_PM_DEBUG is not set
+# CONFIG_SAMSUNG_PM_CHECK is not set
 CONFIG_S3C_LOWLEVEL_UART_PORT=0
 CONFIG_S3C_GPIO_SPACE=0
 CONFIG_S3C_DEV_HSMMC=y
diff --git a/arch/arm/configs/s3c6400_defconfig b/arch/arm/configs/s3c6400_defconfig
index f56e50fab79..5e7d4c1b8fc 100644
--- a/arch/arm/configs/s3c6400_defconfig
+++ b/arch/arm/configs/s3c6400_defconfig
@@ -1,14 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28-rc3
-# Mon Nov  3 10:10:30 2008
+# Linux kernel version: 2.6.33-rc4
+# Tue Jan 19 13:12:40 2010
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
 CONFIG_GENERIC_GPIO=y
-# CONFIG_GENERIC_TIME is not set
-# CONFIG_GENERIC_CLOCKEVENTS is not set
-CONFIG_MMU=y
 CONFIG_NO_IOPORT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_STACKTRACE_SUPPORT=y
@@ -18,13 +15,13 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_HARDIRQS_SW_RESEND=y
 CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_HAS_CPUFREQ=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_VECTORS_BASE=0xffff0000
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -34,13 +31,30 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
 CONFIG_SWAP=y
 # CONFIG_SYSVIPC is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=17
-# CONFIG_CGROUPS is not set
 # CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_RELAY is not set
@@ -50,8 +64,13 @@ CONFIG_NAMESPACES=y
 # CONFIG_PID_NS is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_LZO=y
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 # CONFIG_EMBEDDED is not set
 CONFIG_UID16=y
 CONFIG_SYSCTL_SYSCALL=y
@@ -62,32 +81,38 @@ CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 CONFIG_ELF_CORE=y
-CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_SLUB_DEBUG=y
+CONFIG_COMPAT_BRK=y
 # CONFIG_SLAB is not set
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -95,11 +120,8 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
 CONFIG_BLOCK=y
-CONFIG_LBD=y
-# CONFIG_BLK_DEV_IO_TRACE is not set
-CONFIG_LSF=y
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -107,33 +129,62 @@ CONFIG_LSF=y
 # IO Schedulers
 #
 CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
 CONFIG_IOSCHED_DEADLINE=y
 CONFIG_IOSCHED_CFQ=y
-# CONFIG_DEFAULT_AS is not set
 # CONFIG_DEFAULT_DEADLINE is not set
 CONFIG_DEFAULT_CFQ=y
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="cfq"
-CONFIG_CLASSIC_RCU=y
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
 # CONFIG_FREEZER is not set
 
 #
 # System Type
 #
+CONFIG_MMU=y
 # CONFIG_ARCH_AAEC2000 is not set
 # CONFIG_ARCH_INTEGRATOR is not set
 # CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_VERSATILE is not set
 # CONFIG_ARCH_AT91 is not set
-# CONFIG_ARCH_CLPS7500 is not set
 # CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
 # CONFIG_ARCH_EBSA110 is not set
 # CONFIG_ARCH_EP93XX is not set
 # CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
 # CONFIG_ARCH_NETX is not set
 # CONFIG_ARCH_H720X is not set
-# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_NOMADIK is not set
 # CONFIG_ARCH_IOP13XX is not set
 # CONFIG_ARCH_IOP32X is not set
 # CONFIG_ARCH_IOP33X is not set
@@ -141,35 +192,62 @@ CONFIG_CLASSIC_RCU=y
 # CONFIG_ARCH_IXP2000 is not set
 # CONFIG_ARCH_IXP4XX is not set
 # CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
 # CONFIG_ARCH_KIRKWOOD is not set
-# CONFIG_ARCH_KS8695 is not set
-# CONFIG_ARCH_NS9XXX is not set
 # CONFIG_ARCH_LOKI is not set
 # CONFIG_ARCH_MV78XX0 is not set
-# CONFIG_ARCH_MXC is not set
 # CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
 # CONFIG_ARCH_PNX4008 is not set
 # CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
 # CONFIG_ARCH_RPC is not set
 # CONFIG_ARCH_SA1100 is not set
 # CONFIG_ARCH_S3C2410 is not set
 CONFIG_ARCH_S3C64XX=y
+# CONFIG_ARCH_S5P6440 is not set
+# CONFIG_ARCH_S5PC1XX is not set
 # CONFIG_ARCH_SHARK is not set
 # CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
 # CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
-# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
+CONFIG_PLAT_SAMSUNG=y
+CONFIG_SAMSUNG_CLKSRC=y
+CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
+CONFIG_SAMSUNG_IRQ_UART=y
+CONFIG_S3C_GPIO_CFG_S3C24XX=y
+CONFIG_S3C_GPIO_CFG_S3C64XX=y
+CONFIG_S3C_GPIO_PULL_UPDOWN=y
+CONFIG_SAMSUNG_GPIO_EXTRA=0
+# CONFIG_S3C_ADC is not set
+CONFIG_S3C_DEV_HSMMC=y
+CONFIG_S3C_DEV_HSMMC1=y
+CONFIG_S3C_DEV_I2C1=y
+CONFIG_S3C_DEV_FB=y
+CONFIG_S3C_DEV_USB_HOST=y
+CONFIG_S3C_DEV_USB_HSOTG=y
+CONFIG_S3C_DEV_NAND=y
 CONFIG_PLAT_S3C64XX=y
 CONFIG_CPU_S3C6400_INIT=y
 CONFIG_CPU_S3C6400_CLOCK=y
+# CONFIG_S3C64XX_DMA is not set
 CONFIG_S3C64XX_SETUP_I2C0=y
 CONFIG_S3C64XX_SETUP_I2C1=y
+CONFIG_S3C64XX_SETUP_FB_24BPP=y
+CONFIG_S3C64XX_SETUP_SDHCI_GPIO=y
 CONFIG_PLAT_S3C=y
 
 #
 # Boot options
 #
 CONFIG_S3C_BOOT_ERROR_RESET=y
+CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
 
 #
 # Power management
@@ -177,17 +255,16 @@ CONFIG_S3C_BOOT_ERROR_RESET=y
 CONFIG_S3C_LOWLEVEL_UART_PORT=0
 CONFIG_S3C_GPIO_SPACE=0
 CONFIG_S3C_GPIO_TRACK=y
-CONFIG_S3C_GPIO_PULL_UPDOWN=y
-CONFIG_S3C_GPIO_CFG_S3C24XX=y
-CONFIG_S3C_GPIO_CFG_S3C64XX=y
-CONFIG_S3C_DEV_HSMMC=y
-CONFIG_S3C_DEV_HSMMC1=y
-CONFIG_S3C_DEV_I2C1=y
+# CONFIG_MACH_SMDK6400 is not set
 CONFIG_CPU_S3C6410=y
 CONFIG_S3C6410_SETUP_SDHCI=y
+# CONFIG_MACH_ANW6410 is not set
 CONFIG_MACH_SMDK6410=y
 CONFIG_SMDK6410_SD_CH0=y
 # CONFIG_SMDK6410_SD_CH1 is not set
+# CONFIG_SMDK6410_WM1190_EV1 is not set
+# CONFIG_MACH_NCP is not set
+# CONFIG_MACH_HMT is not set
 
 #
 # Processor Type
@@ -196,7 +273,7 @@ CONFIG_CPU_V6=y
 CONFIG_CPU_32v6K=y
 CONFIG_CPU_32v6=y
 CONFIG_CPU_ABRT_EV6=y
-CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_PABRT_V6=y
 CONFIG_CPU_CACHE_V6=y
 CONFIG_CPU_CACHE_VIPT=y
 CONFIG_CPU_COPY_V6=y
@@ -212,8 +289,10 @@ CONFIG_ARM_THUMB=y
 # CONFIG_CPU_ICACHE_DISABLE is not set
 # CONFIG_CPU_DCACHE_DISABLE is not set
 # CONFIG_CPU_BPREDICT_DISABLE is not set
-# CONFIG_OUTER_CACHE is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
+# CONFIG_ARM_ERRATA_411920 is not set
 CONFIG_ARM_VIC=y
+CONFIG_ARM_VIC_NR=2
 
 #
 # Bus support
@@ -229,13 +308,15 @@ CONFIG_VMSPLIT_3G=y
 # CONFIG_VMSPLIT_2G is not set
 # CONFIG_VMSPLIT_1G is not set
 CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
 CONFIG_HZ=100
 CONFIG_AEABI=y
 CONFIG_OABI_COMPAT=y
-CONFIG_ARCH_FLATMEM_HAS_HOLES=y
 # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
 # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
 CONFIG_SELECT_MEMORY_MODEL=y
 CONFIG_FLATMEM_MANUAL=y
 # CONFIG_DISCONTIGMEM_MANUAL is not set
@@ -243,26 +324,28 @@ CONFIG_FLATMEM_MANUAL=y
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
-CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
+CONFIG_SPLIT_PTLOCK_CPUS=999999
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=0
 CONFIG_VIRT_TO_BUS=y
-CONFIG_UNEVICTABLE_LRU=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
 
 #
 # Boot options
 #
 CONFIG_ZBOOT_ROM_TEXT=0
 CONFIG_ZBOOT_ROM_BSS=0
-CONFIG_CMDLINE="console=ttySAC0,115200 root=/dev/ram init=/bin/bash initrd=0x51000000,4M"
+CONFIG_CMDLINE="console=ttySAC0,115200 root=/dev/ram init=/linuxrc initrd=0x51000000,6M ramdisk_size=6144"
 # CONFIG_XIP_KERNEL is not set
 # CONFIG_KEXEC is not set
 
 #
 # CPU Power Management
 #
+# CONFIG_CPU_FREQ is not set
 # CONFIG_CPU_IDLE is not set
 
 #
@@ -300,6 +383,7 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=y
@@ -314,14 +398,32 @@ CONFIG_BLK_DEV=y
 # CONFIG_BLK_DEV_COW_COMMON is not set
 CONFIG_BLK_DEV_LOOP=y
 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=4096
 # CONFIG_BLK_DEV_XIP is not set
 # CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_MG_DISK is not set
 CONFIG_MISC_DEVICES=y
-# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_AD525X_DPOT is not set
+# CONFIG_ICS932S401 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+CONFIG_EEPROM_AT24=y
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_IWMC3200TOP is not set
 CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
 
@@ -334,6 +436,7 @@ CONFIG_HAVE_IDE=y
 # CONFIG_SCSI_NETLINK is not set
 # CONFIG_ATA is not set
 # CONFIG_MD is not set
+# CONFIG_PHONE is not set
 
 #
 # Input device support
@@ -341,6 +444,7 @@ CONFIG_HAVE_IDE=y
 CONFIG_INPUT=y
 # CONFIG_INPUT_FF_MEMLESS is not set
 # CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
 
 #
 # Userland interfaces
@@ -357,27 +461,33 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 # Input Device Drivers
 #
 CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
 CONFIG_KEYBOARD_ATKBD=y
-# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_QT2160 is not set
 # CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
 # CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
 # CONFIG_KEYBOARD_STOWAWAY is not set
-# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
 CONFIG_INPUT_MOUSE=y
 CONFIG_MOUSE_PS2=y
 CONFIG_MOUSE_PS2_ALPS=y
 CONFIG_MOUSE_PS2_LOGIPS2PP=y
 CONFIG_MOUSE_PS2_SYNAPTICS=y
-CONFIG_MOUSE_PS2_LIFEBOOK=y
 CONFIG_MOUSE_PS2_TRACKPOINT=y
 # CONFIG_MOUSE_PS2_ELANTECH is not set
+# CONFIG_MOUSE_PS2_SENTELIC is not set
 # CONFIG_MOUSE_PS2_TOUCHKIT is not set
 # CONFIG_MOUSE_SERIAL is not set
 # CONFIG_MOUSE_APPLETOUCH is not set
 # CONFIG_MOUSE_BCM5974 is not set
 # CONFIG_MOUSE_VSXXXAA is not set
 # CONFIG_MOUSE_GPIO is not set
+# CONFIG_MOUSE_SYNAPTICS_I2C is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
 # CONFIG_INPUT_TOUCHSCREEN is not set
@@ -390,6 +500,7 @@ CONFIG_SERIO=y
 CONFIG_SERIO_SERPORT=y
 CONFIG_SERIO_LIBPS2=y
 # CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
 # CONFIG_GAMEPORT is not set
 
 #
@@ -423,16 +534,18 @@ CONFIG_SERIAL_S3C6400=y
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=256
 # CONFIG_IPMI_HANDLER is not set
 CONFIG_HW_RANDOM=y
-# CONFIG_NVRAM is not set
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
 # CONFIG_R3964 is not set
 # CONFIG_RAW_DRIVER is not set
 # CONFIG_TCG_TPM is not set
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_HELPER_AUTO=y
 
@@ -443,6 +556,7 @@ CONFIG_I2C_HELPER_AUTO=y
 #
 # I2C system bus drivers (mostly embedded / system-on-chip)
 #
+# CONFIG_I2C_DESIGNWARE is not set
 # CONFIG_I2C_GPIO is not set
 # CONFIG_I2C_OCORES is not set
 CONFIG_I2C_S3C2410=y
@@ -463,32 +577,33 @@ CONFIG_I2C_S3C2410=y
 #
 # Miscellaneous I2C Chip support
 #
-# CONFIG_DS1682 is not set
-CONFIG_EEPROM_AT24=y
-# CONFIG_EEPROM_LEGACY is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_TPS65010 is not set
-# CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
 # CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 CONFIG_ARCH_REQUIRE_GPIOLIB=y
 CONFIG_GPIOLIB=y
 # CONFIG_DEBUG_GPIO is not set
 # CONFIG_GPIO_SYSFS is not set
 
 #
+# Memory mapped GPIO expanders:
+#
+
+#
 # I2C GPIO expanders:
 #
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -497,10 +612,19 @@ CONFIG_GPIOLIB=y
 #
 # SPI GPIO expanders:
 #
+
+#
+# AC97 GPIO expanders:
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
 # CONFIG_SENSORS_AD7414 is not set
 # CONFIG_SENSORS_AD7418 is not set
 # CONFIG_SENSORS_ADM1021 is not set
@@ -509,17 +633,21 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
 # CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ADT7475 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_F71805F is not set
 # CONFIG_SENSORS_F71882FG is not set
 # CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_G760A is not set
 # CONFIG_SENSORS_GL518SM is not set
 # CONFIG_SENSORS_GL520SM is not set
 # CONFIG_SENSORS_IT87 is not set
 # CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM73 is not set
 # CONFIG_SENSORS_LM75 is not set
 # CONFIG_SENSORS_LM77 is not set
 # CONFIG_SENSORS_LM78 is not set
@@ -530,16 +658,24 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_LM90 is not set
 # CONFIG_SENSORS_LM92 is not set
 # CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4215 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LM95241 is not set
 # CONFIG_SENSORS_MAX1619 is not set
 # CONFIG_SENSORS_MAX6650 is not set
 # CONFIG_SENSORS_PC87360 is not set
 # CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_SHT15 is not set
 # CONFIG_SENSORS_DME1737 is not set
 # CONFIG_SENSORS_SMSC47M1 is not set
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_TMP401 is not set
+# CONFIG_SENSORS_TMP421 is not set
 # CONFIG_SENSORS_VT1211 is not set
 # CONFIG_SENSORS_W83781D is not set
 # CONFIG_SENSORS_W83791D is not set
@@ -549,15 +685,14 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_W83L786NG is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_SENSORS_LIS3_I2C is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
 
 #
 # Sonics Silicon Backplane
 #
-CONFIG_SSB_POSSIBLE=y
 # CONFIG_SSB is not set
 
 #
@@ -568,28 +703,22 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_ASIC3 is not set
 # CONFIG_HTC_EGPIO is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_MFD_T7L66XB is not set
 # CONFIG_MFD_TC6387XB is not set
 # CONFIG_MFD_TC6393XB is not set
 # CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
-
-#
-# Multimedia devices
-#
-
-#
-# Multimedia core support
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_VIDEO_MEDIA is not set
-
-#
-# Multimedia drivers
-#
-# CONFIG_DAB is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_MFD_88PM8607 is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
 
 #
 # Graphics support
@@ -612,17 +741,15 @@ CONFIG_DUMMY_CONSOLE=y
 # CONFIG_SOUND is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-CONFIG_HID_DEBUG=y
 # CONFIG_HIDRAW is not set
 # CONFIG_HID_PID is not set
 
 #
 # Special HID drivers
 #
-# CONFIG_HID_COMPAT is not set
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
-# CONFIG_USB_ARCH_HAS_OHCI is not set
+CONFIG_USB_ARCH_HAS_OHCI=y
 # CONFIG_USB_ARCH_HAS_EHCI is not set
 # CONFIG_USB is not set
 
@@ -631,9 +758,13 @@ CONFIG_USB_ARCH_HAS_HCD=y
 #
 
 #
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
 #
 # CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
 CONFIG_MMC=y
 CONFIG_MMC_DEBUG=y
 CONFIG_MMC_UNSAFE_RESUME=y
@@ -650,22 +781,24 @@ CONFIG_SDIO_UART=y
 # MMC/SD/SDIO Host Controller Drivers
 #
 CONFIG_MMC_SDHCI=y
+# CONFIG_MMC_SDHCI_PLTFM is not set
 CONFIG_MMC_SDHCI_S3C=y
+# CONFIG_MMC_SDHCI_S3C_DMA is not set
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
 # CONFIG_MEMSTICK is not set
-# CONFIG_ACCESSIBILITY is not set
 # CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
 CONFIG_RTC_LIB=y
 # CONFIG_RTC_CLASS is not set
 # CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
 
 #
-# Voltage and Current regulators
+# TI VLYNQ
 #
-# CONFIG_REGULATOR is not set
-# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
-# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
-# CONFIG_REGULATOR_BQ24022 is not set
-# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
 
 #
 # File systems
@@ -674,6 +807,7 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 CONFIG_EXT3_FS_POSIX_ACL=y
 CONFIG_EXT3_FS_SECURITY=y
@@ -683,9 +817,12 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
-CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
 # CONFIG_GFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -696,6 +833,11 @@ CONFIG_INOTIFY_USER=y
 CONFIG_GENERIC_ACL=y
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -719,10 +861,7 @@ CONFIG_TMPFS=y
 CONFIG_TMPFS_POSIX_ACL=y
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -731,12 +870,17 @@ CONFIG_TMPFS_POSIX_ACL=y
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
 CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
 
@@ -755,6 +899,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -763,12 +908,16 @@ CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
 # CONFIG_DEBUG_OBJECTS is not set
 # CONFIG_SLUB_DEBUG_ON is not set
 # CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
 CONFIG_DEBUG_RT_MUTEXES=y
 CONFIG_DEBUG_PI_LIST=y
 # CONFIG_RT_MUTEX_TESTER is not set
@@ -787,34 +936,43 @@ CONFIG_DEBUG_INFO=y
 CONFIG_DEBUG_MEMORY_INIT=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
-CONFIG_FRAME_POINTER=y
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
+# CONFIG_PAGE_POISONING is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
-
-#
-# Tracers
-#
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
 # CONFIG_FUNCTION_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
-# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
 # CONFIG_BOOT_TRACER is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
 # CONFIG_STACK_TRACER is not set
-# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
 CONFIG_DEBUG_USER=y
 CONFIG_DEBUG_ERRORS=y
 # CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_DEBUG_LL=y
+# CONFIG_EARLY_PRINTK is not set
 # CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_OC_ETM is not set
 CONFIG_DEBUG_S3C_UART=0
 
 #
@@ -823,13 +981,19 @@ CONFIG_DEBUG_S3C_UART=0
 # CONFIG_KEYS is not set
 # CONFIG_SECURITY is not set
 # CONFIG_SECURITYFS is not set
-# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
 # CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
 # CONFIG_CRC_CCITT is not set
 # CONFIG_CRC16 is not set
 # CONFIG_CRC_T10DIF is not set
@@ -838,6 +1002,10 @@ CONFIG_CRC32=y
 # CONFIG_CRC7 is not set
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
-CONFIG_PLIST=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_LZO=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/s5p6440_defconfig b/arch/arm/configs/s5p6440_defconfig
new file mode 100644
index 00000000000..279a15e5311
--- /dev/null
+++ b/arch/arm/configs/s5p6440_defconfig
@@ -0,0 +1,969 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.33-rc2
+# Sat Jan  9 16:33:55 2010
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_NO_IOPORT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+# CONFIG_SYSVIPC is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+CONFIG_COMPAT_BRK=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+CONFIG_ARCH_S5P6440=y
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
+CONFIG_PLAT_SAMSUNG=y
+CONFIG_SAMSUNG_CLKSRC=y
+CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
+CONFIG_SAMSUNG_IRQ_UART=y
+CONFIG_SAMSUNG_GPIO_EXTRA=0
+CONFIG_PLAT_S3C=y
+
+#
+# Boot options
+#
+CONFIG_S3C_BOOT_ERROR_RESET=y
+CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
+
+#
+# Power management
+#
+CONFIG_S3C_LOWLEVEL_UART_PORT=1
+CONFIG_S3C_GPIO_SPACE=0
+CONFIG_S3C_GPIO_TRACK=y
+CONFIG_PLAT_S5P=y
+CONFIG_CPU_S5P6440_INIT=y
+CONFIG_CPU_S5P6440_CLOCK=y
+CONFIG_CPU_S5P6440=y
+CONFIG_MACH_SMDK6440=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_V6=y
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_32v6=y
+CONFIG_CPU_ABRT_EV6=y
+CONFIG_CPU_PABRT_V6=y
+CONFIG_CPU_CACHE_V6=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V6=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
+# CONFIG_ARM_ERRATA_411920 is not set
+CONFIG_ARM_VIC=y
+CONFIG_ARM_VIC_NR=2
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=200
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=999999
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_NET is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=8192
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_ELANTECH is not set
+# CONFIG_MOUSE_PS2_SENTELIC is not set
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_MOUSE_GPIO is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+# CONFIG_SERIAL_8250_CONSOLE is not set
+CONFIG_SERIAL_8250_NR_UARTS=3
+CONFIG_SERIAL_8250_RUNTIME_UARTS=3
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SAMSUNG=y
+CONFIG_SERIAL_SAMSUNG_UARTS=4
+# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
+CONFIG_SERIAL_SAMSUNG_CONSOLE=y
+CONFIG_SERIAL_S5P6440=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+
+#
+# AC97 GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+CONFIG_DISPLAY_SUPPORT=y
+
+#
+# Display hardware drivers
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+CONFIG_DEBUG_RT_MUTEXES=y
+CONFIG_DEBUG_PI_LIST=y
+# CONFIG_RT_MUTEX_TESTER is not set
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+CONFIG_DEBUG_SPINLOCK_SLEEP=y
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_BOOT_TRACER is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_LL=y
+# CONFIG_EARLY_PRINTK is not set
+# CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_OC_ETM is not set
+CONFIG_DEBUG_S3C_UART=1
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_MANAGER2 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/s5p6442_defconfig b/arch/arm/configs/s5p6442_defconfig
new file mode 100644
index 00000000000..74e20bfc048
--- /dev/null
+++ b/arch/arm/configs/s5p6442_defconfig
@@ -0,0 +1,883 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.33-rc4
+# Mon Jan 25 08:50:28 2010
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_NO_IOPORT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_SWAP=y
+# CONFIG_SYSVIPC is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_LZO=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+CONFIG_COMPAT_BRK=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5P6440 is not set
+CONFIG_ARCH_S5P6442=y
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
+CONFIG_PLAT_SAMSUNG=y
+CONFIG_SAMSUNG_CLKSRC=y
+CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
+CONFIG_SAMSUNG_IRQ_UART=y
+CONFIG_SAMSUNG_GPIOLIB_4BIT=y
+CONFIG_S3C_GPIO_CFG_S3C24XX=y
+CONFIG_S3C_GPIO_CFG_S3C64XX=y
+CONFIG_S3C_GPIO_PULL_UPDOWN=y
+CONFIG_SAMSUNG_GPIO_EXTRA=0
+# CONFIG_S3C_ADC is not set
+
+#
+# Power management
+#
+CONFIG_PLAT_S3C=y
+
+#
+# Boot options
+#
+# CONFIG_S3C_BOOT_ERROR_RESET is not set
+CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
+CONFIG_S3C_LOWLEVEL_UART_PORT=1
+CONFIG_S3C_GPIO_SPACE=0
+CONFIG_S3C_GPIO_TRACK=y
+CONFIG_PLAT_S5P=y
+CONFIG_CPU_S5P6442=y
+CONFIG_MACH_SMDK6442=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_V6=y
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_32v6=y
+CONFIG_CPU_ABRT_EV6=y
+CONFIG_CPU_PABRT_V6=y
+CONFIG_CPU_CACHE_V6=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V6=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
+# CONFIG_ARM_ERRATA_411920 is not set
+CONFIG_ARM_VIC=y
+CONFIG_ARM_VIC_NR=2
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=200
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=999999
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_NET is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=8192
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+# CONFIG_SERIAL_8250_CONSOLE is not set
+CONFIG_SERIAL_8250_NR_UARTS=3
+CONFIG_SERIAL_8250_RUNTIME_UARTS=3
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SAMSUNG=y
+CONFIG_SERIAL_SAMSUNG_UARTS=3
+# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
+CONFIG_SERIAL_SAMSUNG_CONSOLE=y
+CONFIG_SERIAL_S5PV210=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+
+#
+# AC97 GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_BSD_DISKLABEL=y
+# CONFIG_MINIX_SUBPARTITION is not set
+CONFIG_SOLARIS_X86_PARTITION=y
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+CONFIG_DEBUG_RT_MUTEXES=y
+CONFIG_DEBUG_PI_LIST=y
+# CONFIG_RT_MUTEX_TESTER is not set
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+CONFIG_DEBUG_SPINLOCK_SLEEP=y
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_BOOT_TRACER is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_ARM_UNWIND is not set
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_LL=y
+# CONFIG_EARLY_PRINTK is not set
+# CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_OC_ETM is not set
+CONFIG_DEBUG_S3C_UART=1
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+# CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_LZO=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/s5pc110_defconfig b/arch/arm/configs/s5pc110_defconfig
new file mode 100644
index 00000000000..6ea636131ac
--- /dev/null
+++ b/arch/arm/configs/s5pc110_defconfig
@@ -0,0 +1,894 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.33-rc4
+# Wed Feb 24 15:36:54 2010
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_NO_IOPORT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_ARM_L1_CACHE_SHIFT_6=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_SWAP=y
+# CONFIG_SYSVIPC is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_LZO=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+CONFIG_COMPAT_BRK=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5P6440 is not set
+# CONFIG_ARCH_S5P6442 is not set
+# CONFIG_ARCH_S5PC1XX is not set
+CONFIG_ARCH_S5PV210=y
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
+CONFIG_PLAT_SAMSUNG=y
+
+#
+# Boot options
+#
+# CONFIG_S3C_BOOT_ERROR_RESET is not set
+CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
+CONFIG_S3C_LOWLEVEL_UART_PORT=1
+CONFIG_SAMSUNG_CLKSRC=y
+CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
+CONFIG_SAMSUNG_IRQ_UART=y
+CONFIG_SAMSUNG_GPIOLIB_4BIT=y
+CONFIG_S3C_GPIO_CFG_S3C24XX=y
+CONFIG_S3C_GPIO_CFG_S3C64XX=y
+CONFIG_S3C_GPIO_PULL_UPDOWN=y
+CONFIG_SAMSUNG_GPIO_EXTRA=0
+CONFIG_S3C_GPIO_SPACE=0
+CONFIG_S3C_GPIO_TRACK=y
+# CONFIG_S3C_ADC is not set
+
+#
+# Power management
+#
+CONFIG_PLAT_S5P=y
+CONFIG_CPU_S5PV210=y
+# CONFIG_MACH_SMDKV210 is not set
+CONFIG_MACH_SMDKC110=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_V7=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_ARM_THUMBEE is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_HAS_TLS_REG=y
+CONFIG_ARM_L1_CACHE_SHIFT=6
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_ARM_ERRATA_458693 is not set
+# CONFIG_ARM_ERRATA_460075 is not set
+CONFIG_ARM_VIC=y
+CONFIG_ARM_VIC_NR=2
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_VMSPLIT_3G is not set
+CONFIG_VMSPLIT_2G=y
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0x80000000
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_HZ=200
+# CONFIG_THUMB2_KERNEL is not set
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+# CONFIG_FLATMEM_MANUAL is not set
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+CONFIG_SPARSEMEM_MANUAL=y
+CONFIG_SPARSEMEM=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_SPARSEMEM_EXTREME=y
+CONFIG_SPLIT_PTLOCK_CPUS=999999
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_FPE_NWFPE is not set
+# CONFIG_FPE_FASTFPE is not set
+CONFIG_VFP=y
+CONFIG_VFPv3=y
+CONFIG_NEON=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_NET is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=8192
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+# CONFIG_SERIAL_8250_CONSOLE is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SAMSUNG=y
+CONFIG_SERIAL_SAMSUNG_UARTS_4=y
+CONFIG_SERIAL_SAMSUNG_UARTS=4
+# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
+CONFIG_SERIAL_SAMSUNG_CONSOLE=y
+CONFIG_SERIAL_S5PV210=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+
+#
+# AC97 GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_BSD_DISKLABEL=y
+# CONFIG_MINIX_SUBPARTITION is not set
+CONFIG_SOLARIS_X86_PARTITION=y
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_PREEMPT is not set
+CONFIG_DEBUG_RT_MUTEXES=y
+CONFIG_DEBUG_PI_LIST=y
+# CONFIG_RT_MUTEX_TESTER is not set
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+CONFIG_DEBUG_SPINLOCK_SLEEP=y
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_BOOT_TRACER is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_LL=y
+CONFIG_EARLY_PRINTK=y
+# CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_OC_ETM is not set
+CONFIG_DEBUG_S3C_UART=1
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+# CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_LZO=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/s5pv210_defconfig b/arch/arm/configs/s5pv210_defconfig
new file mode 100644
index 00000000000..3f7d47491b5
--- /dev/null
+++ b/arch/arm/configs/s5pv210_defconfig
@@ -0,0 +1,894 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.33-rc4
+# Wed Feb 24 15:36:16 2010
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_NO_IOPORT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_ARM_L1_CACHE_SHIFT_6=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_SWAP=y
+# CONFIG_SYSVIPC is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_LZO=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+CONFIG_COMPAT_BRK=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5P6440 is not set
+# CONFIG_ARCH_S5P6442 is not set
+# CONFIG_ARCH_S5PC1XX is not set
+CONFIG_ARCH_S5PV210=y
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
+CONFIG_PLAT_SAMSUNG=y
+
+#
+# Boot options
+#
+# CONFIG_S3C_BOOT_ERROR_RESET is not set
+CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
+CONFIG_S3C_LOWLEVEL_UART_PORT=1
+CONFIG_SAMSUNG_CLKSRC=y
+CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
+CONFIG_SAMSUNG_IRQ_UART=y
+CONFIG_SAMSUNG_GPIOLIB_4BIT=y
+CONFIG_S3C_GPIO_CFG_S3C24XX=y
+CONFIG_S3C_GPIO_CFG_S3C64XX=y
+CONFIG_S3C_GPIO_PULL_UPDOWN=y
+CONFIG_SAMSUNG_GPIO_EXTRA=0
+CONFIG_S3C_GPIO_SPACE=0
+CONFIG_S3C_GPIO_TRACK=y
+# CONFIG_S3C_ADC is not set
+
+#
+# Power management
+#
+CONFIG_PLAT_S5P=y
+CONFIG_CPU_S5PV210=y
+CONFIG_MACH_SMDKV210=y
+# CONFIG_MACH_SMDKC110 is not set
+
+#
+# Processor Type
+#
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_V7=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_ARM_THUMBEE is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_HAS_TLS_REG=y
+CONFIG_ARM_L1_CACHE_SHIFT=6
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_ARM_ERRATA_458693 is not set
+# CONFIG_ARM_ERRATA_460075 is not set
+CONFIG_ARM_VIC=y
+CONFIG_ARM_VIC_NR=2
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_VMSPLIT_3G is not set
+CONFIG_VMSPLIT_2G=y
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0x80000000
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_HZ=200
+# CONFIG_THUMB2_KERNEL is not set
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+# CONFIG_FLATMEM_MANUAL is not set
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+CONFIG_SPARSEMEM_MANUAL=y
+CONFIG_SPARSEMEM=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_SPARSEMEM_EXTREME=y
+CONFIG_SPLIT_PTLOCK_CPUS=999999
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_FPE_NWFPE is not set
+# CONFIG_FPE_FASTFPE is not set
+CONFIG_VFP=y
+CONFIG_VFPv3=y
+CONFIG_NEON=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_NET is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=8192
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+# CONFIG_SERIAL_8250_CONSOLE is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SAMSUNG=y
+CONFIG_SERIAL_SAMSUNG_UARTS_4=y
+CONFIG_SERIAL_SAMSUNG_UARTS=4
+# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
+CONFIG_SERIAL_SAMSUNG_CONSOLE=y
+CONFIG_SERIAL_S5PV210=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+
+#
+# AC97 GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_BSD_DISKLABEL=y
+# CONFIG_MINIX_SUBPARTITION is not set
+CONFIG_SOLARIS_X86_PARTITION=y
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_PREEMPT is not set
+CONFIG_DEBUG_RT_MUTEXES=y
+CONFIG_DEBUG_PI_LIST=y
+# CONFIG_RT_MUTEX_TESTER is not set
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+CONFIG_DEBUG_SPINLOCK_SLEEP=y
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_BOOT_TRACER is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_LL=y
+CONFIG_EARLY_PRINTK=y
+# CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_OC_ETM is not set
+CONFIG_DEBUG_S3C_UART=1
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+# CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_LZO=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 00f46d9ce29..6e8f05c8a1c 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -149,10 +149,10 @@
 
 #define USER(x...)                              \
 9999:   x;                                      \
-        .section __ex_table,"a";                \
+        .pushsection __ex_table,"a";            \
         .align  3;                              \
         .long   9999b,9001f;                    \
-        .previous
+        .popsection
 
 /*
  * SMP data memory barrier
@@ -193,10 +193,10 @@
         .error  "Unsupported inc macro argument"
         .endif
 
-        .section __ex_table,"a"
+        .pushsection __ex_table,"a"
         .align  3
         .long   9999b, \abort
-        .previous
+        .popsection
         .endm
 
         .macro  usracc, instr, reg, ptr, inc, cond, rept, abort
@@ -234,10 +234,10 @@
         .error  "Unsupported inc macro argument"
         .endif
 
-        .section __ex_table,"a"
+        .pushsection __ex_table,"a"
         .align  3
         .long   9999b, \abort
-        .previous
+        .popsection
         .endr
         .endm
 
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index 72da7e045c6..0d08d4170b6 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -15,6 +15,7 @@
 #include <asm/glue.h>
 #include <asm/shmparam.h>
 #include <asm/cachetype.h>
+#include <asm/outercache.h>
 
 #define CACHE_COLOUR(vaddr)     ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT)
 
@@ -219,12 +220,6 @@ struct cpu_cache_fns {
         void (*dma_flush_range)(const void *, const void *);
 };
 
-struct outer_cache_fns {
-        void (*inv_range)(unsigned long, unsigned long);
-        void (*clean_range)(unsigned long, unsigned long);
-        void (*flush_range)(unsigned long, unsigned long);
-};
-
 /*
  * Select the calling method
  */
@@ -281,37 +276,6 @@ extern void dmac_flush_range(const void *, const void *);
 
 #endif
 
-#ifdef CONFIG_OUTER_CACHE
-
-extern struct outer_cache_fns outer_cache;
-
-static inline void outer_inv_range(unsigned long start, unsigned long end)
-{
-        if (outer_cache.inv_range)
-                outer_cache.inv_range(start, end);
-}
-static inline void outer_clean_range(unsigned long start, unsigned long end)
-{
-        if (outer_cache.clean_range)
-                outer_cache.clean_range(start, end);
-}
-static inline void outer_flush_range(unsigned long start, unsigned long end)
-{
-        if (outer_cache.flush_range)
-                outer_cache.flush_range(start, end);
-}
-
-#else
-
-static inline void outer_inv_range(unsigned long start, unsigned long end)
-{ }
-static inline void outer_clean_range(unsigned long start, unsigned long end)
-{ }
-static inline void outer_flush_range(unsigned long start, unsigned long end)
-{ }
-
-#endif
-
 /*
  * Copy user data from/to a page which is mapped into a different
  * processes address space.  Really, we want to allow our "user
diff --git a/arch/arm/include/asm/clkdev.h b/arch/arm/include/asm/clkdev.h
index 7a0690da5e6..b56c1389b6f 100644
--- a/arch/arm/include/asm/clkdev.h
+++ b/arch/arm/include/asm/clkdev.h
@@ -13,6 +13,7 @@
 #define __ASM_CLKDEV_H
 
 struct clk;
+struct device;
 
 struct clk_lookup {
         struct list_head        node;
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 256ee1c9f51..69ce0727edb 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -128,6 +128,14 @@ static inline int dma_supported(struct device *dev, u64 mask)
 
 static inline int dma_set_mask(struct device *dev, u64 dma_mask)
 {
+#ifdef CONFIG_DMABOUNCE
+        if (dev->archdata.dmabounce) {
+                if (dma_mask >= ISA_DMA_THRESHOLD)
+                        return 0;
+                else
+                        return -EIO;
+        }
+#endif
         if (!dev->dma_mask || !dma_supported(dev, dma_mask))
                 return -EIO;
 
diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h
index a399bb5730f..bff056489cc 100644
--- a/arch/arm/include/asm/elf.h
+++ b/arch/arm/include/asm/elf.h
@@ -98,6 +98,7 @@ extern int elf_check_arch(const struct elf32_hdr *);
 extern int arm_elf_read_implies_exec(const struct elf32_hdr *, int);
 #define elf_read_implies_exec(ex,stk) arm_elf_read_implies_exec(&(ex), stk)
 
+struct task_struct;
 int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs);
 #define ELF_CORE_COPY_TASK_REGS dump_task_regs
 
diff --git a/arch/arm/mach-s3c6400/include/mach/entry-macro.S b/arch/arm/include/asm/entry-macro-vic2.S
index fbd90d2cf35..3ceb85e4385 100644
--- a/arch/arm/mach-s3c6400/include/mach/entry-macro.S
+++ b/arch/arm/include/asm/entry-macro-vic2.S
@@ -1,26 +1,39 @@
-/* arch/arm/mach-s3c6400/include/mach/entry-macro.S
+/* arch/arm/include/asm/entry-macro-vic2.S
+ *
+ * Originally arch/arm/mach-s3c6400/include/mach/entry-macro.S
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
  *      http://armlinux.simtec.co.uk/
  *      Ben Dooks <ben@simtec.co.uk>
  *
- * Low-level IRQ helper macros for the Samsung S3C64XX series
+ * Low-level IRQ helper macros for a device with two VICs
  *
  * This file is licensed under  the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
 */
 
+/* This should be included from <mach/entry-macro.S> with the necessary
+ * defines for virtual addresses and IRQ bases for the two vics.
+ *
+ * The code needs the following defined:
+ *      IRQ_VIC0_BASE   IRQ number of VIC0's first IRQ
+ *      IRQ_VIC1_BASE   IRQ number of VIC1's first IRQ
+ *      VA_VIC0         Virtual address of VIC0
+ *      VA_VIC1         Virtual address of VIC1
+ *
+ * Note, code assumes VIC0's virtual address is an ARM immediate constant
+ * away from VIC1.
+*/
+
 #include <asm/hardware/vic.h>
-#include <mach/map.h>
-#include <plat/irqs.h>
 
         .macro  disable_fiq
         .endm
 
         .macro  get_irqnr_preamble, base, tmp
-        ldr     \base, =S3C_VA_VIC0
+        ldr     \base, =VA_VIC0
         .endm
 
         .macro  arch_ret_to_user, tmp1, tmp2
@@ -29,13 +42,13 @@
         .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
 
         @ check the vic0
-        mov     \irqnr, # S3C_IRQ_OFFSET + 31
+        mov     \irqnr, #IRQ_VIC0_BASE + 31
         ldr     \irqstat, [ \base, # VIC_IRQ_STATUS ]
         teq     \irqstat, #0
 
         @ otherwise try vic1
-        addeq   \tmp, \base, #(S3C_VA_VIC1 - S3C_VA_VIC0)
-        addeq   \irqnr, \irqnr, #32
+        addeq   \tmp, \base, #(VA_VIC1 - VA_VIC0)
+        addeq   \irqnr, \irqnr, #(IRQ_VIC1_BASE - IRQ_VIC0_BASE)
         ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
         teqeq   \irqstat, #0
 
diff --git a/arch/arm/include/asm/futex.h b/arch/arm/include/asm/futex.h
index bfcc15929a7..540a044153a 100644
--- a/arch/arm/include/asm/futex.h
+++ b/arch/arm/include/asm/futex.h
@@ -21,14 +21,14 @@
         "2:     strt    %0, [%2]\n"                             \
         "       mov     %0, #0\n"                               \
         "3:\n"                                                  \
-        "       .section __ex_table,\"a\"\n"                    \
+        "       .pushsection __ex_table,\"a\"\n"                \
         "       .align  3\n"                                    \
         "       .long   1b, 4f, 2b, 4f\n"                       \
-        "       .previous\n"                                    \
-        "       .section .fixup,\"ax\"\n"                       \
+        "       .popsection\n"                                  \
+        "       .pushsection .fixup,\"ax\"\n"                   \
         "4:     mov     %0, %4\n"                               \
         "       b       3b\n"                                   \
-        "       .previous"                                      \
+        "       .popsection"                                    \
         : "=&r" (ret), "=&r" (oldval)                           \
         : "r" (uaddr), "r" (oparg), "Ir" (-EFAULT)              \
         : "cc", "memory")
@@ -102,14 +102,14 @@ futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
         "       it      eq      @ explicit IT needed for the 2b label\n"
         "2:     streqt  %2, [%3]\n"
         "3:\n"
-        "       .section __ex_table,\"a\"\n"
+        "       .pushsection __ex_table,\"a\"\n"
         "       .align  3\n"
         "       .long   1b, 4f, 2b, 4f\n"
-        "       .previous\n"
-        "       .section .fixup,\"ax\"\n"
+        "       .popsection\n"
+        "       .pushsection .fixup,\"ax\"\n"
         "4:     mov     %0, %4\n"
         "       b       3b\n"
-        "       .previous"
+        "       .popsection"
         : "=&r" (val)
         : "r" (oldval), "r" (newval), "r" (uaddr), "Ir" (-EFAULT)
         : "cc", "memory");
diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h
index 74b5fff7f57..6700c7fc7eb 100644
--- a/arch/arm/include/asm/hardware/it8152.h
+++ b/arch/arm/include/asm/hardware/it8152.h
@@ -75,6 +75,18 @@ extern unsigned long it8152_base_address;
   IT8152_PD_IRQ(1)  USB (USBR)
   IT8152_PD_IRQ(0)  Audio controller (ACR)
  */
+#define IT8152_IRQ(x)   (IRQ_BOARD_END + (x))
+
+/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */
+#define IT8152_LD_IRQ_COUNT     9
+#define IT8152_LP_IRQ_COUNT     16
+#define IT8152_PD_IRQ_COUNT     15
+
+/* Priorities: */
+#define IT8152_PD_IRQ(i)        IT8152_IRQ(i)
+#define IT8152_LP_IRQ(i)        (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT)
+#define IT8152_LD_IRQ(i)        (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT + IT8152_LP_IRQ_COUNT)
+
 /* frequently used interrupts */
 #define IT8152_PCISERR          IT8152_PD_IRQ(14)
 #define IT8152_H2PTADR          IT8152_PD_IRQ(13)
diff --git a/arch/arm/include/asm/hardware/locomo.h b/arch/arm/include/asm/hardware/locomo.h
index 954b1be991b..74e51d6bd93 100644
--- a/arch/arm/include/asm/hardware/locomo.h
+++ b/arch/arm/include/asm/hardware/locomo.h
@@ -214,4 +214,8 @@ void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int
 /* Frontlight control */
 void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf);
 
+struct locomo_platform_data {
+        int     irq_base;       /* IRQ base for cascaded on-chip IRQs */
+};
+
 #endif
diff --git a/arch/arm/include/asm/hardware/sa1111.h b/arch/arm/include/asm/hardware/sa1111.h
index 5da2595759e..92ed254c175 100644
--- a/arch/arm/include/asm/hardware/sa1111.h
+++ b/arch/arm/include/asm/hardware/sa1111.h
@@ -578,4 +578,8 @@ void sa1111_set_io_dir(struct sa1111_dev *sadev, unsigned int bits, unsigned int
 void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v);
 void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v);
 
+struct sa1111_platform_data {
+        int     irq_base;       /* base for cascaded on-chip IRQs */
+};
+
 #endif  /* _ASM_ARCH_SA1111 */
diff --git a/arch/arm/include/asm/highmem.h b/arch/arm/include/asm/highmem.h
index 7f36d00600b..feb988a7ec3 100644
--- a/arch/arm/include/asm/highmem.h
+++ b/arch/arm/include/asm/highmem.h
@@ -11,7 +11,11 @@
 
 #define kmap_prot               PAGE_KERNEL
 
-#define flush_cache_kmaps()     flush_cache_all()
+#define flush_cache_kmaps() \
+        do { \
+                if (cache_is_vivt()) \
+                        flush_cache_all(); \
+        } while (0)
 
 extern pte_t *pkmap_page_table;
 
@@ -21,11 +25,20 @@ extern void *kmap_high(struct page *page);
 extern void *kmap_high_get(struct page *page);
 extern void kunmap_high(struct page *page);
 
+extern void *kmap_high_l1_vipt(struct page *page, pte_t *saved_pte);
+extern void kunmap_high_l1_vipt(struct page *page, pte_t saved_pte);
+
+/*
+ * The following functions are already defined by <linux/highmem.h>
+ * when CONFIG_HIGHMEM is not set.
+ */
+#ifdef CONFIG_HIGHMEM
 extern void *kmap(struct page *page);
 extern void kunmap(struct page *page);
 extern void *kmap_atomic(struct page *page, enum km_type type);
 extern void kunmap_atomic(void *kvaddr, enum km_type type);
 extern void *kmap_atomic_pfn(unsigned long pfn, enum km_type type);
 extern struct page *kmap_atomic_to_page(const void *ptr);
+#endif
 
 #endif
diff --git a/arch/arm/include/asm/irq.h b/arch/arm/include/asm/irq.h
index 328f14a8b79..237282f7c76 100644
--- a/arch/arm/include/asm/irq.h
+++ b/arch/arm/include/asm/irq.h
@@ -17,6 +17,7 @@
 
 #ifndef __ASSEMBLY__
 struct irqaction;
+struct pt_regs;
 extern void migrate_irqs(void);
 
 extern void asm_do_IRQ(unsigned int, struct pt_regs *);
diff --git a/arch/arm/include/asm/kmap_types.h b/arch/arm/include/asm/kmap_types.h
index c019949a518..c4b2ea3fbe4 100644
--- a/arch/arm/include/asm/kmap_types.h
+++ b/arch/arm/include/asm/kmap_types.h
@@ -18,6 +18,7 @@ enum km_type {
         KM_IRQ1,
         KM_SOFTIRQ0,
         KM_SOFTIRQ1,
+        KM_L1_CACHE,
         KM_L2_CACHE,
         KM_TYPE_NR
 };
diff --git a/arch/arm/include/asm/outercache.h b/arch/arm/include/asm/outercache.h
new file mode 100644
index 00000000000..25f76bae57a
--- /dev/null
+++ b/arch/arm/include/asm/outercache.h
@@ -0,0 +1,75 @@
+/*
+ * arch/arm/include/asm/outercache.h
+ *
+ * Copyright (C) 2010 ARM Ltd.
+ * Written by Catalin Marinas <catalin.marinas@arm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef __ASM_OUTERCACHE_H
+#define __ASM_OUTERCACHE_H
+
+struct outer_cache_fns {
+        void (*inv_range)(unsigned long, unsigned long);
+        void (*clean_range)(unsigned long, unsigned long);
+        void (*flush_range)(unsigned long, unsigned long);
+#ifdef CONFIG_OUTER_CACHE_SYNC
+        void (*sync)(void);
+#endif
+};
+
+#ifdef CONFIG_OUTER_CACHE
+
+extern struct outer_cache_fns outer_cache;
+
+static inline void outer_inv_range(unsigned long start, unsigned long end)
+{
+        if (outer_cache.inv_range)
+                outer_cache.inv_range(start, end);
+}
+static inline void outer_clean_range(unsigned long start, unsigned long end)
+{
+        if (outer_cache.clean_range)
+                outer_cache.clean_range(start, end);
+}
+static inline void outer_flush_range(unsigned long start, unsigned long end)
+{
+        if (outer_cache.flush_range)
+                outer_cache.flush_range(start, end);
+}
+
+#else
+
+static inline void outer_inv_range(unsigned long start, unsigned long end)
+{ }
+static inline void outer_clean_range(unsigned long start, unsigned long end)
+{ }
+static inline void outer_flush_range(unsigned long start, unsigned long end)
+{ }
+
+#endif
+
+#ifdef CONFIG_OUTER_CACHE_SYNC
+static inline void outer_sync(void)
+{
+        if (outer_cache.sync)
+                outer_cache.sync();
+}
+#else
+static inline void outer_sync(void)
+{ }
+#endif
+
+#endif  /* __ASM_OUTERCACHE_H */
diff --git a/arch/arm/include/asm/pci.h b/arch/arm/include/asm/pci.h
index 226cddd2fb6..47980118d0a 100644
--- a/arch/arm/include/asm/pci.h
+++ b/arch/arm/include/asm/pci.h
@@ -30,17 +30,6 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
  */
 #define PCI_DMA_BUS_IS_PHYS     (1)
 
-/*
- * Whether pci_unmap_{single,page} is a nop depends upon the
- * configuration.
- */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME)          ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME)            ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)   (((PTR)->LEN_NAME) = (VAL))
-
 #ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                         enum pci_dma_burst_strategy *strat,
diff --git a/arch/arm/include/asm/pgtable-nommu.h b/arch/arm/include/asm/pgtable-nommu.h
index 013cfcdc483..ffc0e85775b 100644
--- a/arch/arm/include/asm/pgtable-nommu.h
+++ b/arch/arm/include/asm/pgtable-nommu.h
@@ -67,6 +67,7 @@ static inline int pte_file(pte_t pte) { return 0; }
  */
 #define pgprot_noncached(prot)  __pgprot(0)
 #define pgprot_writecombine(prot) __pgprot(0)
+#define pgprot_dmacoherent(prot) __pgprot(0)
 
 
 /*
diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h
index eec6e897ceb..9dcb11e5902 100644
--- a/arch/arm/include/asm/ptrace.h
+++ b/arch/arm/include/asm/ptrace.h
@@ -128,6 +128,8 @@ struct pt_regs {
 
 #ifdef __KERNEL__
 
+#define arch_has_single_step()  (1)
+
 #define user_mode(regs) \
         (((regs)->ARM_cpsr & 0xf) == 0)
 
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index ca88e6a8470..4ace45ec3ef 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -60,6 +60,8 @@
 #include <linux/linkage.h>
 #include <linux/irqflags.h>
 
+#include <asm/outercache.h>
+
 #define __exception     __attribute__((section(".exception.text")))
 
 struct thread_info;
@@ -137,10 +139,12 @@ extern unsigned int user_debug;
 #define dmb() __asm__ __volatile__ ("" : : : "memory")
 #endif
 
-#if __LINUX_ARM_ARCH__ >= 7 || defined(CONFIG_SMP)
-#define mb()            dmb()
+#ifdef CONFIG_ARCH_HAS_BARRIERS
+#include <mach/barriers.h>
+#elif __LINUX_ARM_ARCH__ >= 7 || defined(CONFIG_SMP)
+#define mb()            do { dsb(); outer_sync(); } while (0)
 #define rmb()           dmb()
-#define wmb()           dmb()
+#define wmb()           mb()
 #else
 #define mb()    do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
 #define rmb()   do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
@@ -152,9 +156,9 @@ extern unsigned int user_debug;
 #define smp_rmb()       barrier()
 #define smp_wmb()       barrier()
 #else
-#define smp_mb()        mb()
-#define smp_rmb()       rmb()
-#define smp_wmb()       wmb()
+#define smp_mb()        dmb()
+#define smp_rmb()       dmb()
+#define smp_wmb()       dmb()
 #endif
 
 #define read_barrier_depends()          do { } while(0)
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index 1d6bd40a432..33e4a48fe10 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -229,16 +229,16 @@ do {									\
         __asm__ __volatile__(                                   \
         "1:     ldrbt   %1,[%2]\n"                              \
         "2:\n"                                                  \
-        "       .section .fixup,\"ax\"\n"                       \
+        "       .pushsection .fixup,\"ax\"\n"                   \
         "       .align  2\n"                                    \
         "3:     mov     %0, %3\n"                               \
         "       mov     %1, #0\n"                               \
         "       b       2b\n"                                   \
-        "       .previous\n"                                    \
-        "       .section __ex_table,\"a\"\n"                    \
+        "       .popsection\n"                                  \
+        "       .pushsection __ex_table,\"a\"\n"                \
         "       .align  3\n"                                    \
         "       .long   1b, 3b\n"                               \
-        "       .previous"                                      \
+        "       .popsection"                                    \
         : "+r" (err), "=&r" (x)                                 \
         : "r" (addr), "i" (-EFAULT)                             \
         : "cc")
@@ -265,16 +265,16 @@ do {									\
         __asm__ __volatile__(                                   \
         "1:     ldrt    %1,[%2]\n"                              \
         "2:\n"                                                  \
-        "       .section .fixup,\"ax\"\n"                       \
+        "       .pushsection .fixup,\"ax\"\n"                   \
         "       .align  2\n"                                    \
         "3:     mov     %0, %3\n"                               \
         "       mov     %1, #0\n"                               \
         "       b       2b\n"                                   \
-        "       .previous\n"                                    \
-        "       .section __ex_table,\"a\"\n"                    \
+        "       .popsection\n"                                  \
+        "       .pushsection __ex_table,\"a\"\n"                \
         "       .align  3\n"                                    \
         "       .long   1b, 3b\n"                               \
-        "       .previous"                                      \
+        "       .popsection"                                    \
         : "+r" (err), "=&r" (x)                                 \
         : "r" (addr), "i" (-EFAULT)                             \
         : "cc")
@@ -310,15 +310,15 @@ do {									\
         __asm__ __volatile__(                                   \
         "1:     strbt   %1,[%2]\n"                              \
         "2:\n"                                                  \
-        "       .section .fixup,\"ax\"\n"                       \
+        "       .pushsection .fixup,\"ax\"\n"                   \
         "       .align  2\n"                                    \
         "3:     mov     %0, %3\n"                               \
         "       b       2b\n"                                   \
-        "       .previous\n"                                    \
-        "       .section __ex_table,\"a\"\n"                    \
+        "       .popsection\n"                                  \
+        "       .pushsection __ex_table,\"a\"\n"                \
         "       .align  3\n"                                    \
         "       .long   1b, 3b\n"                               \
-        "       .previous"                                      \
+        "       .popsection"                                    \
         : "+r" (err)                                            \
         : "r" (x), "r" (__pu_addr), "i" (-EFAULT)               \
         : "cc")
@@ -343,15 +343,15 @@ do {									\
         __asm__ __volatile__(                                   \
         "1:     strt    %1,[%2]\n"                              \
         "2:\n"                                                  \
-        "       .section .fixup,\"ax\"\n"                       \
+        "       .pushsection .fixup,\"ax\"\n"                   \
         "       .align  2\n"                                    \
         "3:     mov     %0, %3\n"                               \
         "       b       2b\n"                                   \
-        "       .previous\n"                                    \
-        "       .section __ex_table,\"a\"\n"                    \
+        "       .popsection\n"                                  \
+        "       .pushsection __ex_table,\"a\"\n"                \
         "       .align  3\n"                                    \
         "       .long   1b, 3b\n"                               \
-        "       .previous"                                      \
+        "       .popsection"                                    \
         : "+r" (err)                                            \
         : "r" (x), "r" (__pu_addr), "i" (-EFAULT)               \
         : "cc")
@@ -371,16 +371,16 @@ do {									\
  THUMB( "1:     strt    " __reg_oper1 ", [%1]\n"        )       \
  THUMB( "2:     strt    " __reg_oper0 ", [%1, #4]\n"    )       \
         "3:\n"                                                  \
-        "       .section .fixup,\"ax\"\n"                       \
+        "       .pushsection .fixup,\"ax\"\n"                   \
         "       .align  2\n"                                    \
         "4:     mov     %0, %3\n"                               \
         "       b       3b\n"                                   \
-        "       .previous\n"                                    \
-        "       .section __ex_table,\"a\"\n"                    \
+        "       .popsection\n"                                  \
+        "       .pushsection __ex_table,\"a\"\n"                \
         "       .align  3\n"                                    \
         "       .long   1b, 4b\n"                               \
         "       .long   2b, 4b\n"                               \
-        "       .previous"                                      \
+        "       .popsection"                                    \
         : "+r" (err), "+r" (__pu_addr)                          \
         : "r" (x), "i" (-EFAULT)                                \
         : "cc")
diff --git a/arch/arm/include/asm/ucontext.h b/arch/arm/include/asm/ucontext.h
index bf65e9f4525..47f023aa849 100644
--- a/arch/arm/include/asm/ucontext.h
+++ b/arch/arm/include/asm/ucontext.h
@@ -59,23 +59,22 @@ struct iwmmxt_sigframe {
 #endif /* CONFIG_IWMMXT */
 
 #ifdef CONFIG_VFP
-#if __LINUX_ARM_ARCH__ < 6
-/* For ARM pre-v6, we use fstmiax and fldmiax.  This adds one extra
- * word after the registers, and a word of padding at the end for
- * alignment.  */
 #define VFP_MAGIC               0x56465001
-#define VFP_STORAGE_SIZE        152
-#else
-#define VFP_MAGIC               0x56465002
-#define VFP_STORAGE_SIZE        144
-#endif
 
 struct vfp_sigframe
 {
         unsigned long           magic;
         unsigned long           size;
-        union vfp_state         storage;
-};
+        struct user_vfp         ufp;
+        struct user_vfp_exc     ufp_exc;
+} __attribute__((__aligned__(8)));
+
+/*
+ *  8 byte for magic and size, 264 byte for ufp, 12 bytes for ufp_exc,
+ *  4 bytes padding.
+ */
+#define VFP_STORAGE_SIZE        sizeof(struct vfp_sigframe)
+
 #endif /* CONFIG_VFP */
 
 /*
@@ -91,7 +90,7 @@ struct aux_sigframe {
 #ifdef CONFIG_IWMMXT
         struct iwmmxt_sigframe  iwmmxt;
 #endif
-#if 0 && defined CONFIG_VFP /* Not yet saved.  */
+#ifdef CONFIG_VFP
         struct vfp_sigframe     vfp;
 #endif
         /* Something that isn't a valid magic number for any coprocessor.  */
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index cf9cdaa2d4d..dd2bf53000f 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -443,9 +443,12 @@
 #define __ARCH_WANT_SYS_SIGPROCMASK
 #define __ARCH_WANT_SYS_RT_SIGACTION
 #define __ARCH_WANT_SYS_RT_SIGSUSPEND
+#define __ARCH_WANT_SYS_OLD_MMAP
+#define __ARCH_WANT_SYS_OLD_SELECT
 
 #if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT)
 #define __ARCH_WANT_SYS_TIME
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_ALARM
 #define __ARCH_WANT_SYS_UTIME
diff --git a/arch/arm/include/asm/user.h b/arch/arm/include/asm/user.h
index df95e050f9d..05ac4b06876 100644
--- a/arch/arm/include/asm/user.h
+++ b/arch/arm/include/asm/user.h
@@ -83,11 +83,21 @@ struct user{
 
 /*
  * User specific VFP registers. If only VFPv2 is present, registers 16 to 31
- * are ignored by the ptrace system call.
+ * are ignored by the ptrace system call and the signal handler.
  */
 struct user_vfp {
         unsigned long long fpregs[32];
         unsigned long fpscr;
 };
 
+/*
+ * VFP exception registers exposed to user space during signal delivery.
+ * Fields not relavant to the current VFP architecture are ignored.
+ */
+struct user_vfp_exc {
+        unsigned long   fpexc;
+        unsigned long   fpinst;
+        unsigned long   fpinst2;
+};
+
 #endif /* _ARM_USER_H */
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 9314a2d681f..37ae301cc47 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -91,7 +91,7 @@
                 CALL(sys_settimeofday)
 /* 80 */        CALL(sys_getgroups16)
                 CALL(sys_setgroups16)
-                CALL(OBSOLETE(old_select))      /* used by libc4 */
+                CALL(OBSOLETE(sys_old_select))  /* used by libc4 */
                 CALL(sys_symlink)
                 CALL(sys_ni_syscall)            /* was sys_lstat */
 /* 85 */        CALL(sys_readlink)
@@ -99,7 +99,7 @@
                 CALL(sys_swapon)
                 CALL(sys_reboot)
                 CALL(OBSOLETE(sys_old_readdir)) /* used by libc4 */
-/* 90 */        CALL(OBSOLETE(old_mmap))        /* used by libc4 */
+/* 90 */        CALL(OBSOLETE(sys_old_mmap))    /* used by libc4 */
                 CALL(sys_munmap)
                 CALL(sys_truncate)
                 CALL(sys_ftruncate)
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 6c5cf369183..e6a0fb0f392 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -523,16 +523,16 @@ ENDPROC(__und_usr)
 /*
  * The out of line fixup for the ldrt above.
  */
-        .section .fixup, "ax"
+        .pushsection .fixup, "ax"
 4:      mov     pc, r9
-        .previous
-        .section __ex_table,"a"
+        .popsection
+        .pushsection __ex_table,"a"
         .long   1b, 4b
 #if __LINUX_ARM_ARCH__ >= 7
         .long   2b, 4b
         .long   3b, 4b
 #endif
-        .previous
+        .popsection
 
 /*
  * Check whether the instruction is a co-processor instruction.
@@ -679,7 +679,7 @@ do_fpe:
         .data
 ENTRY(fp_enter)
         .word   no_fp
-        .previous
+        .text
 
 ENTRY(no_fp)
         mov     pc, lr
diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S
index 7e9ed1eea40..d93f976fb38 100644
--- a/arch/arm/kernel/entry-header.S
+++ b/arch/arm/kernel/entry-header.S
@@ -102,6 +102,8 @@
         .else
         ldmdb   sp, {r0 - lr}^                  @ get calling r0 - lr
         .endif
+        mov     r0, r0                          @ ARMv5T and earlier require a nop
+                                                @ after ldm {}^
         add     sp, sp, #S_FRAME_SIZE - S_PC
         movs    pc, lr                          @ return & move spsr_svc into cpsr
         .endm
diff --git a/arch/arm/kernel/ftrace.c b/arch/arm/kernel/ftrace.c
index c6384276622..0298286ad4a 100644
--- a/arch/arm/kernel/ftrace.c
+++ b/arch/arm/kernel/ftrace.c
@@ -62,15 +62,15 @@ int ftrace_modify_code(unsigned long pc, unsigned char *old_code,
                 "    movne  %0, #2    \n"
                 "3:\n"
 
-                ".section .fixup, \"ax\"\n"
+                ".pushsection .fixup, \"ax\"\n"
                 "4:  mov  %0, #1  \n"
                 "    b    3b      \n"
-                ".previous\n"
+                ".popsection\n"
 
-                ".section __ex_table, \"a\"\n"
+                ".pushsection __ex_table, \"a\"\n"
                 "    .long 1b, 4b \n"
                 "    .long 2b, 4b \n"
-                ".previous\n"
+                ".popsection\n"
 
                 : "=r"(err), "=r"(replaced)
                 : "r"(pc), "r"(new), "r"(old), "0"(err), "1"(replaced)
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index b7cb45bb91e..3b3d2c80509 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -27,7 +27,6 @@
 #include <linux/ioport.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
-#include <linux/slab.h>
 #include <linux/random.h>
 #include <linux/smp.h>
 #include <linux/init.h>
diff --git a/arch/arm/kernel/kgdb.c b/arch/arm/kernel/kgdb.c
index ba8ccfede96..a5b846b9895 100644
--- a/arch/arm/kernel/kgdb.c
+++ b/arch/arm/kernel/kgdb.c
@@ -9,6 +9,7 @@
  * Authors:  George Davis <davis_g@mvista.com>
  *           Deepak Saxena <dsaxena@plexity.net>
  */
+#include <linux/irq.h>
 #include <linux/kgdb.h>
 #include <asm/traps.h>
 
@@ -158,6 +159,18 @@ static struct undef_hook kgdb_compiled_brkpt_hook = {
         .fn                     = kgdb_compiled_brk_fn
 };
 
+static void kgdb_call_nmi_hook(void *ignored)
+{
+       kgdb_nmicallback(raw_smp_processor_id(), get_irq_regs());
+}
+
+void kgdb_roundup_cpus(unsigned long flags)
+{
+       local_irq_enable();
+       smp_call_function(kgdb_call_nmi_hook, NULL, 0);
+       local_irq_disable();
+}
+
 /**
  *      kgdb_arch_init - Perform any architecture specific initalization.
  *
diff --git a/arch/arm/kernel/kprobes.c b/arch/arm/kernel/kprobes.c
index 60c62c377fa..2ba7deb3072 100644
--- a/arch/arm/kernel/kprobes.c
+++ b/arch/arm/kernel/kprobes.c
@@ -22,6 +22,7 @@
 #include <linux/kernel.h>
 #include <linux/kprobes.h>
 #include <linux/module.h>
+#include <linux/slab.h>
 #include <linux/stop_machine.h>
 #include <linux/stringify.h>
 #include <asm/traps.h>
@@ -393,6 +394,14 @@ void __kprobes jprobe_return(void)
                 /*
                  * Setup an empty pt_regs. Fill SP and PC fields as
                  * they're needed by longjmp_break_handler.
+                 *
+                 * We allocate some slack between the original SP and start of
+                 * our fabricated regs. To be precise we want to have worst case
+                 * covered which is STMFD with all 16 regs so we allocate 2 *
+                 * sizeof(struct_pt_regs)).
+                 *
+                 * This is to prevent any simulated instruction from writing
+                 * over the regs when they are accessing the stack.
                  */
                 "sub    sp, %0, %1              \n\t"
                 "ldr    r0, ="__stringify(JPROBE_MAGIC_ADDR)"\n\t"
@@ -410,7 +419,7 @@ void __kprobes jprobe_return(void)
                 "ldmia  sp, {r0 - pc}           \n\t"
                 :
                 : "r" (kcb->jprobe_saved_regs.ARM_sp),
-                  "I" (sizeof(struct pt_regs)),
+                  "I" (sizeof(struct pt_regs) * 2),
                   "J" (offsetof(struct pt_regs, ARM_sp)),
                   "J" (offsetof(struct pt_regs, ARM_pc)),
                   "J" (offsetof(struct pt_regs, ARM_cpsr))
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c
index f28c5e9c51e..c628bdf6c43 100644
--- a/arch/arm/kernel/module.c
+++ b/arch/arm/kernel/module.c
@@ -16,9 +16,9 @@
 #include <linux/mm.h>
 #include <linux/elf.h>
 #include <linux/vmalloc.h>
-#include <linux/slab.h>
 #include <linux/fs.h>
 #include <linux/string.h>
+#include <linux/gfp.h>
 
 #include <asm/pgtable.h>
 #include <asm/sections.h>
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index c54ceb3d1f9..9e70f2053f9 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -332,7 +332,8 @@ armpmu_reserve_hardware(void)
 
         for (i = 0; i < pmu_irqs->num_irqs; ++i) {
                 err = request_irq(pmu_irqs->irqs[i], armpmu->handle_irq,
-                                  IRQF_DISABLED, "armpmu", NULL);
+                                  IRQF_DISABLED | IRQF_NOBALANCING,
+                                  "armpmu", NULL);
                 if (err) {
                         pr_warning("unable to request IRQ%d for ARM "
                                    "perf counters\n", pmu_irqs->irqs[i]);
@@ -965,7 +966,7 @@ armv6pmu_handle_irq(int irq_num,
          */
         armv6_pmcr_write(pmcr);
 
-        data.addr = 0;
+        perf_sample_data_init(&data, 0);
 
         cpuc = &__get_cpu_var(cpu_hw_events);
         for (idx = 0; idx <= armpmu->num_events; ++idx) {
@@ -1624,7 +1625,7 @@ enum armv7_counters {
 /*
  * EVTSEL: Event selection reg
  */
-#define ARMV7_EVTSEL_MASK       0x7f            /* Mask for writable bits */
+#define ARMV7_EVTSEL_MASK       0xff            /* Mask for writable bits */
 
 /*
  * SELECT: Counter selection reg
@@ -1945,7 +1946,7 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
          */
         regs = get_irq_regs();
 
-        data.addr = 0;
+        perf_sample_data_init(&data, 0);
 
         cpuc = &__get_cpu_var(cpu_hw_events);
         for (idx = 0; idx <= armpmu->num_events; ++idx) {
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index ba2adefa53f..acf5e6fdb6d 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -16,7 +16,6 @@
 #include <linux/mm.h>
 #include <linux/stddef.h>
 #include <linux/unistd.h>
-#include <linux/slab.h>
 #include <linux/user.h>
 #include <linux/delay.h>
 #include <linux/reboot.h>
@@ -356,7 +355,7 @@ EXPORT_SYMBOL(dump_fpu);
  * the thread function, and r3 points to the exit function.
  */
 extern void kernel_thread_helper(void);
-asm(    ".section .text\n"
+asm(    ".pushsection .text\n"
 "       .align\n"
 "       .type   kernel_thread_helper, #function\n"
 "kernel_thread_helper:\n"
@@ -364,11 +363,11 @@ asm(	".section .text\n"
 "       mov     lr, r3\n"
 "       mov     pc, r2\n"
 "       .size   kernel_thread_helper, . - kernel_thread_helper\n"
-"       .previous");
+"       .popsection");
 
 #ifdef CONFIG_ARM_UNWIND
 extern void kernel_thread_exit(long code);
-asm(    ".section .text\n"
+asm(    ".pushsection .text\n"
 "       .align\n"
 "       .type   kernel_thread_exit, #function\n"
 "kernel_thread_exit:\n"
@@ -378,7 +377,7 @@ asm(	".section .text\n"
 "       nop\n"
 "       .fnend\n"
 "       .size   kernel_thread_exit, . - kernel_thread_exit\n"
-"       .previous");
+"       .popsection");
 #else
 #define kernel_thread_exit      do_exit
 #endif
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 08f899fb76a..3f562a7c0a9 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -452,12 +452,23 @@ void ptrace_cancel_bpt(struct task_struct *child)
                 clear_breakpoint(child, &child->thread.debug.bp[i]);
 }
 
+void user_disable_single_step(struct task_struct *task)
+{
+        task->ptrace &= ~PT_SINGLESTEP;
+        ptrace_cancel_bpt(task);
+}
+
+void user_enable_single_step(struct task_struct *task)
+{
+        task->ptrace |= PT_SINGLESTEP;
+}
+
 /*
  * Called by kernel/ptrace.c when detaching..
  */
 void ptrace_disable(struct task_struct *child)
 {
-        single_step_disable(child);
+        user_disable_single_step(child);
 }
 
 /*
@@ -753,53 +764,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                         ret = ptrace_write_user(child, addr, data);
                         break;
 
-                /*
-                 * continue/restart and stop at next (return from) syscall
-                 */
-                case PTRACE_SYSCALL:
-                case PTRACE_CONT:
-                        ret = -EIO;
-                        if (!valid_signal(data))
-                                break;
-                        if (request == PTRACE_SYSCALL)
-                                set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        else
-                                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        child->exit_code = data;
-                        single_step_disable(child);
-                        wake_up_process(child);
-                        ret = 0;
-                        break;
-
-                /*
-                 * make the child exit.  Best I can do is send it a sigkill.
-                 * perhaps it should be put in the status that it wants to
-                 * exit.
-                 */
-                case PTRACE_KILL:
-                        single_step_disable(child);
-                        if (child->exit_state != EXIT_ZOMBIE) {
-                                child->exit_code = SIGKILL;
-                                wake_up_process(child);
-                        }
-                        ret = 0;
-                        break;
-
-                /*
-                 * execute single instruction.
-                 */
-                case PTRACE_SINGLESTEP:
-                        ret = -EIO;
-                        if (!valid_signal(data))
-                                break;
-                        single_step_enable(child);
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        child->exit_code = data;
-                        /* give it a chance to run. */
-                        wake_up_process(child);
-                        ret = 0;
-                        break;
-
                 case PTRACE_GETREGS:
                         ret = ptrace_getregs(child, (void __user *)data);
                         break;
diff --git a/arch/arm/kernel/ptrace.h b/arch/arm/kernel/ptrace.h
index def3b6184a7..3926605b82e 100644
--- a/arch/arm/kernel/ptrace.h
+++ b/arch/arm/kernel/ptrace.h
@@ -14,20 +14,6 @@ extern void ptrace_set_bpt(struct task_struct *);
 extern void ptrace_break(struct task_struct *, struct pt_regs *);
 
 /*
- * make sure single-step breakpoint is gone.
- */
-static inline void single_step_disable(struct task_struct *task)
-{
-        task->ptrace &= ~PT_SINGLESTEP;
-        ptrace_cancel_bpt(task);
-}
-
-static inline void single_step_enable(struct task_struct *task)
-{
-        task->ptrace |= PT_SINGLESTEP;
-}
-
-/*
  * Send SIGTRAP if we're single-stepping
  */
 static inline void single_step_trap(struct task_struct *task)
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index e7714f367eb..907d5a620bc 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -18,6 +18,7 @@
 #include <asm/cacheflush.h>
 #include <asm/ucontext.h>
 #include <asm/unistd.h>
+#include <asm/vfp.h>
 
 #include "ptrace.h"
 #include "signal.h"
@@ -175,6 +176,90 @@ static int restore_iwmmxt_context(struct iwmmxt_sigframe *frame)
 
 #endif
 
+#ifdef CONFIG_VFP
+
+static int preserve_vfp_context(struct vfp_sigframe __user *frame)
+{
+        struct thread_info *thread = current_thread_info();
+        struct vfp_hard_struct *h = &thread->vfpstate.hard;
+        const unsigned long magic = VFP_MAGIC;
+        const unsigned long size = VFP_STORAGE_SIZE;
+        int err = 0;
+
+        vfp_sync_hwstate(thread);
+        __put_user_error(magic, &frame->magic, err);
+        __put_user_error(size, &frame->size, err);
+
+        /*
+         * Copy the floating point registers. There can be unused
+         * registers see asm/hwcap.h for details.
+         */
+        err |= __copy_to_user(&frame->ufp.fpregs, &h->fpregs,
+                              sizeof(h->fpregs));
+        /*
+         * Copy the status and control register.
+         */
+        __put_user_error(h->fpscr, &frame->ufp.fpscr, err);
+
+        /*
+         * Copy the exception registers.
+         */
+        __put_user_error(h->fpexc, &frame->ufp_exc.fpexc, err);
+        __put_user_error(h->fpinst, &frame->ufp_exc.fpinst, err);
+        __put_user_error(h->fpinst2, &frame->ufp_exc.fpinst2, err);
+
+        return err ? -EFAULT : 0;
+}
+
+static int restore_vfp_context(struct vfp_sigframe __user *frame)
+{
+        struct thread_info *thread = current_thread_info();
+        struct vfp_hard_struct *h = &thread->vfpstate.hard;
+        unsigned long magic;
+        unsigned long size;
+        unsigned long fpexc;
+        int err = 0;
+
+        __get_user_error(magic, &frame->magic, err);
+        __get_user_error(size, &frame->size, err);
+
+        if (err)
+                return -EFAULT;
+        if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE)
+                return -EINVAL;
+
+        /*
+         * Copy the floating point registers. There can be unused
+         * registers see asm/hwcap.h for details.
+         */
+        err |= __copy_from_user(&h->fpregs, &frame->ufp.fpregs,
+                                sizeof(h->fpregs));
+        /*
+         * Copy the status and control register.
+         */
+        __get_user_error(h->fpscr, &frame->ufp.fpscr, err);
+
+        /*
+         * Sanitise and restore the exception registers.
+         */
+        __get_user_error(fpexc, &frame->ufp_exc.fpexc, err);
+        /* Ensure the VFP is enabled. */
+        fpexc |= FPEXC_EN;
+        /* Ensure FPINST2 is invalid and the exception flag is cleared. */
+        fpexc &= ~(FPEXC_EX | FPEXC_FP2V);
+        h->fpexc = fpexc;
+
+        __get_user_error(h->fpinst, &frame->ufp_exc.fpinst, err);
+        __get_user_error(h->fpinst2, &frame->ufp_exc.fpinst2, err);
+
+        if (!err)
+                vfp_flush_hwstate(thread);
+
+        return err ? -EFAULT : 0;
+}
+
+#endif
+
 /*
  * Do a signal return; undo the signal stack.  These are aligned to 64-bit.
  */
@@ -233,8 +318,8 @@ static int restore_sigframe(struct pt_regs *regs, struct sigframe __user *sf)
                 err |= restore_iwmmxt_context(&aux->iwmmxt);
 #endif
 #ifdef CONFIG_VFP
-//      if (err == 0)
-//              err |= vfp_restore_state(&sf->aux.vfp);
+        if (err == 0)
+                err |= restore_vfp_context(&aux->vfp);
 #endif
 
         return err;
@@ -348,8 +433,8 @@ setup_sigframe(struct sigframe __user *sf, struct pt_regs *regs, sigset_t *set)
                 err |= preserve_iwmmxt_context(&aux->iwmmxt);
 #endif
 #ifdef CONFIG_VFP
-//      if (err == 0)
-//              err |= vfp_save_state(&sf->aux.vfp);
+        if (err == 0)
+                err |= preserve_vfp_context(&aux->vfp);
 #endif
         __put_user_error(0, &aux->end_magic, err);
 
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 57162af53dc..577543f3857 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -99,6 +99,7 @@ int __cpuinit __cpu_up(unsigned int cpu)
         *pmd = __pmd((PHYS_OFFSET & PGDIR_MASK) |
                      PMD_TYPE_SECT | PMD_SECT_AP_WRITE);
         flush_pmd_entry(pmd);
+        outer_clean_range(__pa(pmd), __pa(pmd + 1));
 
         /*
          * We need to tell the secondary core where to find
@@ -106,7 +107,8 @@ int __cpuinit __cpu_up(unsigned int cpu)
          */
         secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
         secondary_data.pgdir = virt_to_phys(pgd);
-        wmb();
+        __cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data));
+        outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1));
 
         /*
          * Now bring the CPU into our world.
diff --git a/arch/arm/kernel/sys_arm.c b/arch/arm/kernel/sys_arm.c
index ae4027bd01b..c23501842b9 100644
--- a/arch/arm/kernel/sys_arm.c
+++ b/arch/arm/kernel/sys_arm.c
@@ -15,7 +15,6 @@
 #include <linux/module.h>
 #include <linux/errno.h>
 #include <linux/sched.h>
-#include <linux/slab.h>
 #include <linux/mm.h>
 #include <linux/sem.h>
 #include <linux/msg.h>
@@ -27,135 +26,7 @@
 #include <linux/file.h>
 #include <linux/ipc.h>
 #include <linux/uaccess.h>
-
-struct mmap_arg_struct {
-        unsigned long addr;
-        unsigned long len;
-        unsigned long prot;
-        unsigned long flags;
-        unsigned long fd;
-        unsigned long offset;
-};
-
-asmlinkage int old_mmap(struct mmap_arg_struct __user *arg)
-{
-        int error = -EFAULT;
-        struct mmap_arg_struct a;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                goto out;
-
-        error = -EINVAL;
-        if (a.offset & ~PAGE_MASK)
-                goto out;
-
-        error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT);
-out:
-        return error;
-}
-
-/*
- * Perform the select(nd, in, out, ex, tv) and mmap() system
- * calls.
- */
-
-struct sel_arg_struct {
-        unsigned long n;
-        fd_set __user *inp, *outp, *exp;
-        struct timeval __user *tvp;
-};
-
-asmlinkage int old_select(struct sel_arg_struct __user *arg)
-{
-        struct sel_arg_struct a;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                return -EFAULT;
-        /* sys_select() does the appropriate kernel locking */
-        return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
-}
-
-#if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT)
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-asmlinkage int sys_ipc(uint call, int first, int second, int third,
-                       void __user *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        switch (call) {
-        case SEMOP:
-                return sys_semtimedop (first, (struct sembuf __user *)ptr, second, NULL);
-        case SEMTIMEDOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr, second,
-                                        (const struct timespec __user *)fifth);
-
-        case SEMGET:
-                return sys_semget (first, second, third);
-        case SEMCTL: {
-                union semun fourth;
-                if (!ptr)
-                        return -EINVAL;
-                if (get_user(fourth.__pad, (void __user * __user *) ptr))
-                        return -EFAULT;
-                return sys_semctl (first, second, third, fourth);
-        }
-
-        case MSGSND:
-                return sys_msgsnd(first, (struct msgbuf __user *) ptr, 
-                                  second, third);
-        case MSGRCV:
-                switch (version) {
-                case 0: {
-                        struct ipc_kludge tmp;
-                        if (!ptr)
-                                return -EINVAL;
-                        if (copy_from_user(&tmp,(struct ipc_kludge __user *)ptr,
-                                           sizeof (tmp)))
-                                return -EFAULT;
-                        return sys_msgrcv (first, tmp.msgp, second,
-                                           tmp.msgtyp, third);
-                }
-                default:
-                        return sys_msgrcv (first,
-                                           (struct msgbuf __user *) ptr,
-                                           second, fifth, third);
-                }
-        case MSGGET:
-                return sys_msgget ((key_t) first, second);
-        case MSGCTL:
-                return sys_msgctl(first, second, (struct msqid_ds __user *)ptr);
-
-        case SHMAT:
-                switch (version) {
-                default: {
-                        ulong raddr;
-                        ret = do_shmat(first, (char __user *)ptr, second, &raddr);
-                        if (ret)
-                                return ret;
-                        return put_user(raddr, (ulong __user *)third);
-                }
-                case 1: /* Of course, we don't support iBCS2! */
-                        return -EINVAL;
-                }
-        case SHMDT: 
-                return sys_shmdt ((char __user *)ptr);
-        case SHMGET:
-                return sys_shmget (first, second, third);
-        case SHMCTL:
-                return sys_shmctl (first, second,
-                                   (struct shmid_ds __user *) ptr);
-        default:
-                return -ENOSYS;
-        }
-}
-#endif
+#include <linux/slab.h>
 
 /* Fork a new task - this creates a new program thread.
  * This is called indirectly via a small wrapper
diff --git a/arch/arm/kernel/sys_oabi-compat.c b/arch/arm/kernel/sys_oabi-compat.c
index d59a0cd537f..33ff678e32f 100644
--- a/arch/arm/kernel/sys_oabi-compat.c
+++ b/arch/arm/kernel/sys_oabi-compat.c
@@ -346,9 +346,6 @@ asmlinkage long sys_oabi_semop(int semid, struct oabi_sembuf __user *tsops,
         return sys_oabi_semtimedop(semid, tsops, nsops, NULL);
 }
 
-extern asmlinkage int sys_ipc(uint call, int first, int second, int third,
-                              void __user *ptr, long fifth);
-
 asmlinkage int sys_oabi_ipc(uint call, int first, int second, int third,
                             void __user *ptr, long fifth)
 {
diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c
index 786ac2b6914..50292cd9c12 100644
--- a/arch/arm/kernel/unwind.c
+++ b/arch/arm/kernel/unwind.c
@@ -359,7 +359,9 @@ void unwind_backtrace(struct pt_regs *regs, struct task_struct *tsk)
                 frame.fp = regs->ARM_fp;
                 frame.sp = regs->ARM_sp;
                 frame.lr = regs->ARM_lr;
-                frame.pc = regs->ARM_pc;
+                /* PC might be corrupted, use LR in that case. */
+                frame.pc = kernel_text_address(regs->ARM_pc)
+                         ? regs->ARM_pc : regs->ARM_lr;
         } else if (tsk == current) {
                 frame.fp = (unsigned long)__builtin_frame_address(0);
                 frame.sp = current_sp;
diff --git a/arch/arm/lib/backtrace.S b/arch/arm/lib/backtrace.S
index aaf7220d9e3..a673297b0cf 100644
--- a/arch/arm/lib/backtrace.S
+++ b/arch/arm/lib/backtrace.S
@@ -110,13 +110,13 @@ no_frame:	ldmfd	sp!, {r4 - r8, pc}
 ENDPROC(__backtrace)
 ENDPROC(c_backtrace)
                 
-                .section __ex_table,"a"
+                .pushsection __ex_table,"a"
                 .align  3
                 .long   1001b, 1006b
                 .long   1002b, 1006b
                 .long   1003b, 1006b
                 .long   1004b, 1006b
-                .previous
+                .popsection
 
 #define instr r4
 #define reg   r5
diff --git a/arch/arm/lib/clear_user.S b/arch/arm/lib/clear_user.S
index 1279abd8b88..5e3f99620c0 100644
--- a/arch/arm/lib/clear_user.S
+++ b/arch/arm/lib/clear_user.S
@@ -46,8 +46,8 @@ USER(		strnebt	r2, [r0])
                 ldmfd   sp!, {r1, pc}
 ENDPROC(__clear_user)
 
-                .section .fixup,"ax"
+                .pushsection .fixup,"ax"
                 .align  0
 9001:           ldmfd   sp!, {r0, pc}
-                .previous
+                .popsection
 
diff --git a/arch/arm/lib/copy_from_user.S b/arch/arm/lib/copy_from_user.S
index e4fe124aced..66a477a3e3c 100644
--- a/arch/arm/lib/copy_from_user.S
+++ b/arch/arm/lib/copy_from_user.S
@@ -90,7 +90,7 @@ ENTRY(__copy_from_user)
 
 ENDPROC(__copy_from_user)
 
-        .section .fixup,"ax"
+        .pushsection .fixup,"ax"
         .align 0
         copy_abort_preamble
         ldmfd   sp!, {r1, r2}
@@ -100,5 +100,5 @@ ENDPROC(__copy_from_user)
         bl      __memzero
         ldr     r0, [sp], #4
         copy_abort_end
-        .previous
+        .popsection
 
diff --git a/arch/arm/lib/copy_to_user.S b/arch/arm/lib/copy_to_user.S
index 1a71e158444..027b69bdbad 100644
--- a/arch/arm/lib/copy_to_user.S
+++ b/arch/arm/lib/copy_to_user.S
@@ -94,12 +94,12 @@ WEAK(__copy_to_user)
 
 ENDPROC(__copy_to_user)
 
-        .section .fixup,"ax"
+        .pushsection .fixup,"ax"
         .align 0
         copy_abort_preamble
         ldmfd   sp!, {r1, r2, r3}
         sub     r0, r0, r1
         rsb     r0, r0, r2
         copy_abort_end
-        .previous
+        .popsection
 
diff --git a/arch/arm/lib/csumpartialcopyuser.S b/arch/arm/lib/csumpartialcopyuser.S
index fd0e9dcd9fd..59ff6fdc1e6 100644
--- a/arch/arm/lib/csumpartialcopyuser.S
+++ b/arch/arm/lib/csumpartialcopyuser.S
@@ -68,7 +68,7 @@
  * so properly, we would have to add in whatever registers were loaded before
  * the fault, which, with the current asm above is not predictable.
  */
-                .section .fixup,"ax"
+                .pushsection .fixup,"ax"
                 .align  4
 9001:           mov     r4, #-EFAULT
                 ldr     r5, [fp, #4]            @ *err_ptr
@@ -80,4 +80,4 @@
                 strneb  r0, [r1], #1
                 bne     9002b
                 load_regs
-                .previous
+                .popsection
diff --git a/arch/arm/lib/getuser.S b/arch/arm/lib/getuser.S
index a1814d92712..b1631a7dbe7 100644
--- a/arch/arm/lib/getuser.S
+++ b/arch/arm/lib/getuser.S
@@ -64,9 +64,9 @@ __get_user_bad:
         mov     pc, lr
 ENDPROC(__get_user_bad)
 
-.section __ex_table, "a"
+.pushsection __ex_table, "a"
         .long   1b, __get_user_bad
         .long   2b, __get_user_bad
         .long   3b, __get_user_bad
         .long   4b, __get_user_bad
-.previous
+.popsection
diff --git a/arch/arm/lib/memmove.S b/arch/arm/lib/memmove.S
index 5025c863713..938fc14f962 100644
--- a/arch/arm/lib/memmove.S
+++ b/arch/arm/lib/memmove.S
@@ -74,7 +74,7 @@ ENTRY(memmove)
                 rsb     ip, ip, #32
                 addne   pc, pc, ip              @ C is always clear here
                 b       7f
-6:              nop
+6:              W(nop)
                 W(ldr)  r3, [r1, #-4]!
                 W(ldr)  r4, [r1, #-4]!
                 W(ldr)  r5, [r1, #-4]!
@@ -85,7 +85,7 @@ ENTRY(memmove)
 
                 add     pc, pc, ip
                 nop
-                nop
+                W(nop)
                 W(str)  r3, [r0, #-4]!
                 W(str)  r4, [r0, #-4]!
                 W(str)  r5, [r0, #-4]!
diff --git a/arch/arm/lib/putuser.S b/arch/arm/lib/putuser.S
index 02fedbf07c0..5a01a23c6c0 100644
--- a/arch/arm/lib/putuser.S
+++ b/arch/arm/lib/putuser.S
@@ -81,11 +81,11 @@ __put_user_bad:
         mov     pc, lr
 ENDPROC(__put_user_bad)
 
-.section __ex_table, "a"
+.pushsection __ex_table, "a"
         .long   1b, __put_user_bad
         .long   2b, __put_user_bad
         .long   3b, __put_user_bad
         .long   4b, __put_user_bad
         .long   5b, __put_user_bad
         .long   6b, __put_user_bad
-.previous
+.popsection
diff --git a/arch/arm/lib/strncpy_from_user.S b/arch/arm/lib/strncpy_from_user.S
index 1c9814f346c..f202d7bd164 100644
--- a/arch/arm/lib/strncpy_from_user.S
+++ b/arch/arm/lib/strncpy_from_user.S
@@ -33,11 +33,11 @@ ENTRY(__strncpy_from_user)
         mov     pc, lr
 ENDPROC(__strncpy_from_user)
 
-        .section .fixup,"ax"
+        .pushsection .fixup,"ax"
         .align  0
 9001:   mov     r3, #0
         strb    r3, [r0, #0]    @ null terminate
         mov     r0, #-EFAULT
         mov     pc, lr
-        .previous
+        .popsection
 
diff --git a/arch/arm/lib/strnlen_user.S b/arch/arm/lib/strnlen_user.S
index 7855b290665..0ecbb459c4f 100644
--- a/arch/arm/lib/strnlen_user.S
+++ b/arch/arm/lib/strnlen_user.S
@@ -33,8 +33,8 @@ ENTRY(__strnlen_user)
         mov     pc, lr
 ENDPROC(__strnlen_user)
 
-        .section .fixup,"ax"
+        .pushsection .fixup,"ax"
         .align  0
 9001:   mov     r0, #0
         mov     pc, lr
-        .previous
+        .popsection
diff --git a/arch/arm/lib/uaccess.S b/arch/arm/lib/uaccess.S
index ffdd27498ce..fee9f6f88ad 100644
--- a/arch/arm/lib/uaccess.S
+++ b/arch/arm/lib/uaccess.S
@@ -279,10 +279,10 @@ USER(		strgtbt	r3, [r0], #1)			@ May fault
                 b       .Lc2u_finished
 ENDPROC(__copy_to_user)
 
-                .section .fixup,"ax"
+                .pushsection .fixup,"ax"
                 .align  0
 9001:           ldmfd   sp!, {r0, r4 - r7, pc}
-                .previous
+                .popsection
 
 /* Prototype: unsigned long __copy_from_user(void *to,const void *from,unsigned long n);
  * Purpose  : copy a block from user memory to kernel memory
@@ -545,7 +545,7 @@ USER(		ldrgtbt	r3, [r1], #1)			@ May fault
                 b       .Lcfu_finished
 ENDPROC(__copy_from_user)
 
-                .section .fixup,"ax"
+                .pushsection .fixup,"ax"
                 .align  0
                 /*
                  * We took an exception.  r0 contains a pointer to
@@ -559,5 +559,5 @@ ENDPROC(__copy_from_user)
                 blne    __memzero
                 mov     r0, r4
                 ldmfd   sp!, {r4 - r7, pc}
-                .previous
+                .popsection
 
diff --git a/arch/arm/lib/uaccess_with_memcpy.c b/arch/arm/lib/uaccess_with_memcpy.c
index 6b967ffb655..e2d2f2cd0c4 100644
--- a/arch/arm/lib/uaccess_with_memcpy.c
+++ b/arch/arm/lib/uaccess_with_memcpy.c
@@ -16,6 +16,7 @@
 #include <linux/mm.h>
 #include <linux/sched.h>
 #include <linux/hardirq.h> /* for in_atomic() */
+#include <linux/gfp.h>
 #include <asm/current.h>
 #include <asm/page.h>
 
diff --git a/arch/arm/mach-aaec2000/core.c b/arch/arm/mach-aaec2000/core.c
index b5c5fc6ba3a..3ef68330452 100644
--- a/arch/arm/mach-aaec2000/core.c
+++ b/arch/arm/mach-aaec2000/core.c
@@ -20,6 +20,7 @@
 #include <linux/timex.h>
 #include <linux/signal.h>
 #include <linux/clk.h>
+#include <linux/gfp.h>
 
 #include <mach/hardware.h>
 #include <asm/irq.h>
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 027dd570dcc..d4004557532 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -16,8 +16,8 @@ obj-$(CONFIG_ARCH_AT91SAM9261)	+= at91sam9261.o at91sam926x_time.o at91sam9261_d
 obj-$(CONFIG_ARCH_AT91SAM9G10)  += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91SAM9263)  += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91SAM9RL)   += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
-obj-$(CONFIG_ARCH_AT91SAM9G20)  += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o  sam9_smc.o
- obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9G20)  += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9G45)  += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91CAP9)     += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT572D940HF)  += at572d940hf.o at91sam926x_time.o at572d940hf_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91X40)      += at91x40.o at91x40_time.o
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index 309f3511aa2..2500f41d8d2 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -58,6 +58,12 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
 {
         u32     sr = at91_sys_read(AT91_ST_SR) & irqmask;
 
+        /*
+         * irqs should be disabled here, but as the irq is shared they are only
+         * guaranteed to be off if the timer irq is registered first.
+         */
+        WARN_ON_ONCE(!irqs_disabled());
+
         /* simulate "oneshot" timer with alarm */
         if (sr & AT91_ST_ALMS) {
                 clkevt.event_handler(&clkevt);
@@ -132,24 +138,11 @@ clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev)
 static int
 clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
 {
-        unsigned long   flags;
         u32             alm;
         int             status = 0;
 
         BUG_ON(delta < 2);
 
-        /* Use "raw" primitives so we behave correctly on RT kernels. */
-        raw_local_irq_save(flags);
-
-        /*
-         * According to Thomas Gleixner irqs are already disabled here.  Simply
-         * removing raw_local_irq_save above (and the matching
-         * raw_local_irq_restore) was not accepted.  See
-         * http://thread.gmane.org/gmane.linux.ports.arm.kernel/41174
-         * So for now (2008-11-20) just warn once if irqs were not disabled ...
-         */
-        WARN_ON_ONCE(!raw_irqs_disabled_flags(flags));
-
         /* The alarm IRQ uses absolute time (now+delta), not the relative
          * time (delta) in our calling convention.  Like all clockevents
          * using such "match" hardware, we have a race to defend against.
@@ -169,7 +162,6 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
         alm += delta;
         at91_sys_write(AT91_ST_RTAR, alm);
 
-        raw_local_irq_restore(flags);
         return status;
 }
 
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index 4bd56aee437..608a63240b6 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -62,16 +62,12 @@ static struct clocksource pit_clk = {
 static void
 pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
 {
-        unsigned long   flags;
-
         switch (mode) {
         case CLOCK_EVT_MODE_PERIODIC:
-                /* update clocksource counter, then enable the IRQ */
-                raw_local_irq_save(flags);
+                /* update clocksource counter */
                 pit_cnt += pit_cycle * PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
                 at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN
                                 | AT91_PIT_PITIEN);
-                raw_local_irq_restore(flags);
                 break;
         case CLOCK_EVT_MODE_ONESHOT:
                 BUG();
@@ -100,6 +96,11 @@ static struct clock_event_device pit_clkevt = {
  */
 static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
 {
+        /*
+         * irqs should be disabled here, but as the irq is shared they are only
+         * guaranteed to be off if the timer irq is registered first.
+         */
+        WARN_ON_ONCE(!irqs_disabled());
 
         /* The PIT interrupt may be disabled, and is shared */
         if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC)
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index 29cf8317748..c11fd47aec5 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -271,10 +271,12 @@ static void __init ek_add_device_buttons(void) {}
 
 
 static struct i2c_board_info __initdata ek_i2c_devices[] = {
-        {
-                I2C_BOARD_INFO("24c512", 0x50),
-                I2C_BOARD_INFO("wm8731", 0x1b),
-        },
+        {
+                I2C_BOARD_INFO("24c512", 0x50)
+        },
+        {
+                I2C_BOARD_INFO("wm8731", 0x1b)
+        },
 };
 
 
diff --git a/arch/arm/mach-at91/include/mach/at91_mci.h b/arch/arm/mach-at91/include/mach/at91_mci.h
index 550d503a1bc..57f8ee15494 100644
--- a/arch/arm/mach-at91/include/mach/at91_mci.h
+++ b/arch/arm/mach-at91/include/mach/at91_mci.h
@@ -77,7 +77,7 @@
 
 #define AT91_MCI_BLKR           0x18            /* Block Register */
 #define         AT91_MCI_BLKR_BCNT(n)   ((0xffff & (n)) << 0)   /* Block count */
-#define         AT91_MCI_BLKR_BLKLEN(n) ((0xffff & (n)) << 16)  /* Block lenght */
+#define         AT91_MCI_BLKR_BLKLEN(n) ((0xffff & (n)) << 16)  /* Block length */
 
 #define AT91_MCI_RSPR(n)        (0x20 + ((n) * 4))      /* Response Registers 0-3 */
 #define AT91_MCR_RDR            0x30            /* Receive Data Register */
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index 987fab3d846..9c5b48e68a7 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -175,8 +175,6 @@ ENTRY(at91_slow_clock)
         orr     r3, r3, #(1 << 29)              /* bit 29 always set */
         str     r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
 
-        wait_pllalock
-
         /* Save PLLB setting and disable it */
         ldr     r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
         str     r3, .saved_pllbr
@@ -184,8 +182,6 @@ ENTRY(at91_slow_clock)
         mov     r3, #AT91_PMC_PLLCOUNT
         str     r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
 
-        wait_pllblock
-
         /* Turn off the main oscillator */
         ldr     r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
         bic     r3, r3, #AT91_PMC_MOSCEN
@@ -205,13 +201,25 @@ ENTRY(at91_slow_clock)
         ldr     r3, .saved_pllbr
         str     r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
 
+        tst     r3, #(AT91_PMC_MUL &  0xff0000)
+        bne     1f
+        tst     r3, #(AT91_PMC_MUL & ~0xff0000)
+        beq     2f
+1:
         wait_pllblock
+2:
 
         /* Restore PLLA setting */
         ldr     r3, .saved_pllar
         str     r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
 
+        tst     r3, #(AT91_PMC_MUL &  0xff0000)
+        bne     3f
+        tst     r3, #(AT91_PMC_MUL & ~0xff0000)
+        beq     4f
+3:
         wait_pllalock
+4:
 
 #ifdef SLOWDOWN_MASTER_CLOCK
         /*
diff --git a/arch/arm/mach-bcmring/dma.c b/arch/arm/mach-bcmring/dma.c
index 7b20fccb9d4..29c0a911df2 100644
--- a/arch/arm/mach-bcmring/dma.c
+++ b/arch/arm/mach-bcmring/dma.c
@@ -28,6 +28,7 @@
 #include <linux/interrupt.h>
 #include <linux/irqreturn.h>
 #include <linux/proc_fs.h>
+#include <linux/slab.h>
 
 #include <mach/timer.h>
 
@@ -2220,11 +2221,15 @@ EXPORT_SYMBOL(dma_map_create_descriptor_ring);
 int dma_unmap(DMA_MemMap_t *memMap,     /* Stores state information about the map */
               int dirtied       /* non-zero if any of the pages were modified */
     ) {
+
+        int rc = 0;
         int regionIdx;
         int segmentIdx;
         DMA_Region_t *region;
         DMA_Segment_t *segment;
 
+        down(&memMap->lock);
+
         for (regionIdx = 0; regionIdx < memMap->numRegionsUsed; regionIdx++) {
                 region = &memMap->region[regionIdx];
 
@@ -2238,7 +2243,8 @@ int dma_unmap(DMA_MemMap_t *memMap,	/* Stores state information about the map */
                                         printk(KERN_ERR
                                                "%s: vmalloc'd pages are not yet supported\n",
                                                __func__);
-                                        return -EINVAL;
+                                        rc = -EINVAL;
+                                        goto out;
                                 }
 
                         case DMA_MEM_TYPE_KMALLOC:
@@ -2275,7 +2281,8 @@ int dma_unmap(DMA_MemMap_t *memMap,	/* Stores state information about the map */
                                         printk(KERN_ERR
                                                "%s: Unsupported memory type: %d\n",
                                                __func__, region->memType);
-                                        return -EINVAL;
+                                        rc = -EINVAL;
+                                        goto out;
                                 }
                         }
 
@@ -2313,9 +2320,10 @@ int dma_unmap(DMA_MemMap_t *memMap,	/* Stores state information about the map */
         memMap->numRegionsUsed = 0;
         memMap->inUse = 0;
 
+out:
         up(&memMap->lock);
 
-        return 0;
+        return rc;
 }
 
 EXPORT_SYMBOL(dma_unmap);
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index d15beceb632..df4ab210586 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -22,6 +22,7 @@
 #include <linux/leds.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
+#include <linux/slab.h>
 #include <linux/mtd/nand.h>
 #include <linux/input.h>
 #include <linux/spi/spi.h>
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 27772e18e45..0d6ee583f65 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -758,7 +758,6 @@ static u8 dm365_default_priorities[DAVINCI_N_AINTC_IRQ] = {
         [IRQ_MMCINT]                    = 7,
         [IRQ_DM365_MMCINT1]             = 7,
         [IRQ_DM365_PWMINT3]             = 7,
-        [IRQ_DDRINT]                    = 4,
         [IRQ_AEMIFINT]                  = 2,
         [IRQ_DM365_SDIOINT1]            = 2,
         [IRQ_TINT0_TINT12]              = 7,
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c
index 15dd886df04..53137387aee 100644
--- a/arch/arm/mach-davinci/dma.c
+++ b/arch/arm/mach-davinci/dma.c
@@ -23,6 +23,7 @@
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/slab.h>
 
 #include <mach/edma.h>
 
@@ -1266,7 +1267,8 @@ int edma_start(unsigned channel)
                 /* EDMA channel with event association */
                 pr_debug("EDMA: ER%d %08x\n", j,
                         edma_shadow0_read_array(ctlr, SH_ER, j));
-                /* Clear any pending error */
+                /* Clear any pending event or error */
+                edma_write_array(ctlr, EDMA_ECR, j, mask);
                 edma_write_array(ctlr, EDMA_EMCR, j, mask);
                 /* Clear any SER */
                 edma_shadow0_write_array(ctlr, SH_SECR, j, mask);
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index cc9be7fee62..03acfd39042 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -3,7 +3,7 @@
  *
  * Author: Mark A. Greer <mgreer@mvista.com>
  *
- * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
+ * 2007, 2009-2010 (c) MontaVista Software, Inc. This file is licensed under
  * the terms of the GNU General Public License version 2. This program
  * is licensed "as is" without any warranty of any kind, whether express
  * or implied.
@@ -13,7 +13,9 @@
 
 #include <video/da8xx-fb.h>
 
+#include <linux/platform_device.h>
 #include <linux/davinci_emac.h>
+
 #include <mach/serial.h>
 #include <mach/edma.h>
 #include <mach/i2c.h>
@@ -144,6 +146,10 @@ extern const short da850_mmcsd0_pins[];
 extern const short da850_nand_pins[];
 extern const short da850_nor_pins[];
 
+#ifdef CONFIG_DAVINCI_MUX
 int da8xx_pinmux_setup(const short pins[]);
+#else
+static inline int da8xx_pinmux_setup(const short pins[]) { return 0; }
+#endif
 
 #endif /* __ASM_ARCH_DAVINCI_DA8XX_H */
diff --git a/arch/arm/mach-davinci/include/mach/i2c.h b/arch/arm/mach-davinci/include/mach/i2c.h
index 39fdceac841..2312d197dfb 100644
--- a/arch/arm/mach-davinci/include/mach/i2c.h
+++ b/arch/arm/mach-davinci/include/mach/i2c.h
@@ -1,5 +1,5 @@
 /*
- * DaVinci I2C controller platfrom_device info
+ * DaVinci I2C controller platform_device info
  *
  * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
  *
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index 42d985beece..9e0b106b4f5 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -253,8 +253,6 @@ static void __init timer_init(void)
                         irq = USING_COMPARE(t) ? dtip[i].cmp_irq : irq;
                         setup_irq(irq, &t->irqaction);
                 }
-
-                timer32_config(&timers[i]);
         }
 }
 
@@ -331,6 +329,7 @@ static void __init davinci_timer_init(void)
         unsigned int clocksource_id;
         static char err[] __initdata = KERN_ERR
                 "%s: can't register clocksource!\n";
+        int i;
 
         clockevent_id = soc_info->timer_info->clockevent_id;
         clocksource_id = soc_info->timer_info->clocksource_id;
@@ -389,6 +388,9 @@ static void __init davinci_timer_init(void)
 
         clockevent_davinci.cpumask = cpumask_of(0);
         clockevents_register_device(&clockevent_davinci);
+
+        for (i=0; i< ARRAY_SIZE(timers); i++)
+                timer32_config(&timers[i]);
 }
 
 struct sys_timer davinci_timer = {
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index 806972a68c8..5da2cf402c8 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -605,7 +605,7 @@ static struct platform_device dove_xor00_channel = {
         .dev            = {
                 .dma_mask               = &dove_xor0_dmamask,
                 .coherent_dma_mask      = DMA_BIT_MASK(64),
-                .platform_data          = (void *)&dove_xor00_data,
+                .platform_data          = &dove_xor00_data,
         },
 };
 
@@ -631,7 +631,7 @@ static struct platform_device dove_xor01_channel = {
         .dev            = {
                 .dma_mask               = &dove_xor0_dmamask,
                 .coherent_dma_mask      = DMA_BIT_MASK(64),
-                .platform_data          = (void *)&dove_xor01_data,
+                .platform_data          = &dove_xor01_data,
         },
 };
 
@@ -704,7 +704,7 @@ static struct platform_device dove_xor10_channel = {
         .dev            = {
                 .dma_mask               = &dove_xor1_dmamask,
                 .coherent_dma_mask      = DMA_BIT_MASK(64),
-                .platform_data          = (void *)&dove_xor10_data,
+                .platform_data          = &dove_xor10_data,
         },
 };
 
@@ -730,7 +730,7 @@ static struct platform_device dove_xor11_channel = {
         .dev            = {
                 .dma_mask               = &dove_xor1_dmamask,
                 .coherent_dma_mask      = DMA_BIT_MASK(64),
-                .platform_data          = (void *)&dove_xor11_data,
+                .platform_data          = &dove_xor11_data,
         },
 };
 
diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c
index cc377ae8c42..cf547ad7ebd 100644
--- a/arch/arm/mach-ep93xx/gpio.c
+++ b/arch/arm/mach-ep93xx/gpio.c
@@ -25,7 +25,7 @@
 #include <mach/hardware.h>
 
 /*************************************************************************
- * GPIO handling for EP93xx
+ * Interrupt handling for EP93xx on-chip GPIOs
  *************************************************************************/
 static unsigned char gpio_int_unmasked[3];
 static unsigned char gpio_int_enabled[3];
@@ -40,7 +40,7 @@ static const u8 eoi_register_offset[3]		= { 0x98, 0xb4, 0x54 };
 static const u8 int_en_register_offset[3]       = { 0x9c, 0xb8, 0x58 };
 static const u8 int_debounce_register_offset[3] = { 0xa8, 0xc4, 0x64 };
 
-void ep93xx_gpio_update_int_params(unsigned port)
+static void ep93xx_gpio_update_int_params(unsigned port)
 {
         BUG_ON(port > 2);
 
@@ -56,7 +56,7 @@ void ep93xx_gpio_update_int_params(unsigned port)
                 EP93XX_GPIO_REG(int_en_register_offset[port]));
 }
 
-void ep93xx_gpio_int_mask(unsigned line)
+static inline void ep93xx_gpio_int_mask(unsigned line)
 {
         gpio_int_unmasked[line >> 3] &= ~(1 << (line & 7));
 }
diff --git a/arch/arm/mach-ep93xx/include/mach/ts72xx.h b/arch/arm/mach-ep93xx/include/mach/ts72xx.h
index 3bd934e9a7f..93107d88ff3 100644
--- a/arch/arm/mach-ep93xx/include/mach/ts72xx.h
+++ b/arch/arm/mach-ep93xx/include/mach/ts72xx.h
@@ -65,6 +65,8 @@
 #define TS72XX_RTC_DATA_PHYS_BASE       0x11700000
 #define TS72XX_RTC_DATA_SIZE            0x00001000
 
+#define TS72XX_WDT_CONTROL_PHYS_BASE    0x23800000
+#define TS72XX_WDT_FEED_PHYS_BASE       0x23c00000
 
 #ifndef __ASSEMBLY__
 
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index f3757a1c5a1..c33360e8286 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -28,7 +28,7 @@
  *
  * Micro9-High has up to 64MB of 32-bit flash on CS1
  * Micro9-Mid has up to 64MB of either 32-bit or 16-bit flash on CS1
- * Micro9-Lite uses a seperate MTD map driver for flash support
+ * Micro9-Lite uses a separate MTD map driver for flash support
  * Micro9-Slim has up to 64MB of either 32-bit or 16-bit flash on CS1
  *************************************************************************/
 static struct physmap_flash_data micro9_flash_data;
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index 259f7822ba5..fac1ec7a60f 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -166,6 +166,26 @@ static struct platform_device ts72xx_rtc_device = {
         .num_resources  = 0,
 };
 
+static struct resource ts72xx_wdt_resources[] = {
+        {
+                .start  = TS72XX_WDT_CONTROL_PHYS_BASE,
+                .end    = TS72XX_WDT_CONTROL_PHYS_BASE + SZ_4K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = TS72XX_WDT_FEED_PHYS_BASE,
+                .end    = TS72XX_WDT_FEED_PHYS_BASE + SZ_4K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device ts72xx_wdt_device = {
+        .name           = "ts72xx-wdt",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(ts72xx_wdt_resources),
+        .resource       = ts72xx_wdt_resources,
+};
+
 static struct ep93xx_eth_data ts72xx_eth_data = {
         .phy_id         = 1,
 };
@@ -175,6 +195,7 @@ static void __init ts72xx_init_machine(void)
         ep93xx_init_devices();
         ts72xx_register_flash();
         platform_device_register(&ts72xx_rtc_device);
+        platform_device_register(&ts72xx_wdt_device);
 
         ep93xx_register_eth(&ts72xx_eth_data, 1);
 }
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index 7a261482821..bdb3f670680 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -14,7 +14,6 @@
  */
 
 #include <linux/sched.h>
-#include <linux/slab.h>
 #include <linux/mman.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
diff --git a/arch/arm/mach-integrator/cpu.c b/arch/arm/mach-integrator/cpu.c
index 44d4c2e8207..f77f2025504 100644
--- a/arch/arm/mach-integrator/cpu.c
+++ b/arch/arm/mach-integrator/cpu.c
@@ -13,7 +13,6 @@
 #include <linux/types.h>
 #include <linux/kernel.h>
 #include <linux/cpufreq.h>
-#include <linux/slab.h>
 #include <linux/sched.h>
 #include <linux/smp.h>
 #include <linux/init.h>
diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c
index 0058c937719..41b10725cef 100644
--- a/arch/arm/mach-integrator/impd1.c
+++ b/arch/arm/mach-integrator/impd1.c
@@ -21,6 +21,7 @@
 #include <linux/amba/bus.h>
 #include <linux/amba/clcd.h>
 #include <linux/io.h>
+#include <linux/slab.h>
 
 #include <asm/clkdev.h>
 #include <mach/clkdev.h>
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 66ef86d6d9e..15e6cc5a352 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -13,7 +13,6 @@
 #include <linux/list.h>
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
-#include <linux/slab.h>
 #include <linux/string.h>
 #include <linux/sysdev.h>
 #include <linux/amba/bus.h>
@@ -21,6 +20,7 @@
 #include <linux/amba/clcd.h>
 #include <linux/amba/mmci.h>
 #include <linux/io.h>
+#include <linux/gfp.h>
 
 #include <asm/clkdev.h>
 #include <mach/clkdev.h>
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index 148d25fc636..ffbd349363a 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -22,7 +22,6 @@
  */
 #include <linux/kernel.h>
 #include <linux/pci.h>
-#include <linux/slab.h>
 #include <linux/ioport.h>
 #include <linux/interrupt.h>
 #include <linux/spinlock.h>
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
index 4873f26a42e..6d5a90813d3 100644
--- a/arch/arm/mach-iop13xx/pci.c
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -18,6 +18,7 @@
  */
 
 #include <linux/pci.h>
+#include <linux/slab.h>
 #include <linux/delay.h>
 #include <linux/jiffies.h>
 #include <asm/irq.h>
diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c
index 93370a46b62..10384fc37cb 100644
--- a/arch/arm/mach-iop32x/glantank.c
+++ b/arch/arm/mach-iop32x/glantank.c
@@ -19,7 +19,6 @@
 #include <linux/pci.h>
 #include <linux/pm.h>
 #include <linux/string.h>
-#include <linux/slab.h>
 #include <linux/serial_core.h>
 #include <linux/serial_8250.h>
 #include <linux/mtd/physmap.h>
diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c
index a7a08dda7f3..d6ac85ff109 100644
--- a/arch/arm/mach-iop32x/iq31244.c
+++ b/arch/arm/mach-iop32x/iq31244.c
@@ -21,7 +21,6 @@
 #include <linux/pci.h>
 #include <linux/pm.h>
 #include <linux/string.h>
-#include <linux/slab.h>
 #include <linux/serial_core.h>
 #include <linux/serial_8250.h>
 #include <linux/mtd/physmap.h>
diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c
index 0200f80c1e1..c6a0e4ee9d9 100644
--- a/arch/arm/mach-iop32x/iq80321.c
+++ b/arch/arm/mach-iop32x/iq80321.c
@@ -18,7 +18,6 @@
 #include <linux/kernel.h>
 #include <linux/pci.h>
 #include <linux/string.h>
-#include <linux/slab.h>
 #include <linux/serial_core.h>
 #include <linux/serial_8250.h>
 #include <linux/mtd/physmap.h>
diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c
index 2a5c637639b..5d99039286e 100644
--- a/arch/arm/mach-iop32x/n2100.c
+++ b/arch/arm/mach-iop32x/n2100.c
@@ -23,7 +23,6 @@
 #include <linux/pci.h>
 #include <linux/pm.h>
 #include <linux/string.h>
-#include <linux/slab.h>
 #include <linux/serial_core.h>
 #include <linux/serial_8250.h>
 #include <linux/mtd/physmap.h>
diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c
index 394e95a30b7..c6ff5523b38 100644
--- a/arch/arm/mach-iop33x/iq80331.c
+++ b/arch/arm/mach-iop33x/iq80331.c
@@ -17,7 +17,6 @@
 #include <linux/kernel.h>
 #include <linux/pci.h>
 #include <linux/string.h>
-#include <linux/slab.h>
 #include <linux/serial_core.h>
 #include <linux/serial_8250.h>
 #include <linux/mtd/physmap.h>
diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c
index a40badf126c..fbf55140939 100644
--- a/arch/arm/mach-iop33x/iq80332.c
+++ b/arch/arm/mach-iop33x/iq80332.c
@@ -17,7 +17,6 @@
 #include <linux/kernel.h>
 #include <linux/pci.h>
 #include <linux/string.h>
-#include <linux/slab.h>
 #include <linux/serial_core.h>
 #include <linux/serial_8250.h>
 #include <linux/mtd/physmap.h>
diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c
index c84dfac1388..1a557e0d055 100644
--- a/arch/arm/mach-ixp2000/enp2611.c
+++ b/arch/arm/mach-ixp2000/enp2611.c
@@ -26,7 +26,6 @@
 #include <linux/bitops.h>
 #include <linux/pci.h>
 #include <linux/ioport.h>
-#include <linux/slab.h>
 #include <linux/delay.h>
 #include <linux/serial.h>
 #include <linux/tty.h>
diff --git a/arch/arm/mach-ixp2000/ixdp2400.c b/arch/arm/mach-ixp2000/ixdp2400.c
index 4467c4224d7..55e5c69352a 100644
--- a/arch/arm/mach-ixp2000/ixdp2400.c
+++ b/arch/arm/mach-ixp2000/ixdp2400.c
@@ -23,7 +23,6 @@
 #include <linux/bitops.h>
 #include <linux/pci.h>
 #include <linux/ioport.h>
-#include <linux/slab.h>
 #include <linux/delay.h>
 #include <linux/io.h>
 
diff --git a/arch/arm/mach-ixp2000/ixdp2800.c b/arch/arm/mach-ixp2000/ixdp2800.c
index 94f68ba9ea5..237b61a85e9 100644
--- a/arch/arm/mach-ixp2000/ixdp2800.c
+++ b/arch/arm/mach-ixp2000/ixdp2800.c
@@ -23,7 +23,6 @@
 #include <linux/bitops.h>
 #include <linux/pci.h>
 #include <linux/ioport.h>
-#include <linux/slab.h>
 #include <linux/delay.h>
 #include <linux/io.h>
 
diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c
index 30451300751..91fffb9b208 100644
--- a/arch/arm/mach-ixp2000/ixdp2x00.c
+++ b/arch/arm/mach-ixp2000/ixdp2x00.c
@@ -23,7 +23,6 @@
 #include <linux/bitops.h>
 #include <linux/pci.h>
 #include <linux/ioport.h>
-#include <linux/slab.h>
 #include <linux/delay.h>
 #include <linux/io.h>
 
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c
index 4a12327a09a..0369ec4242a 100644
--- a/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -23,7 +23,6 @@
 #include <linux/bitops.h>
 #include <linux/pci.h>
 #include <linux/ioport.h>
-#include <linux/slab.h>
 #include <linux/delay.h>
 #include <linux/serial.h>
 #include <linux/tty.h>
diff --git a/arch/arm/mach-ixp2000/pci.c b/arch/arm/mach-ixp2000/pci.c
index 60e9fd08ab8..90771cad06f 100644
--- a/arch/arm/mach-ixp2000/pci.c
+++ b/arch/arm/mach-ixp2000/pci.c
@@ -22,7 +22,6 @@
 #include <linux/mm.h>
 #include <linux/init.h>
 #include <linux/ioport.h>
-#include <linux/slab.h>
 #include <linux/delay.h>
 #include <linux/io.h>
 
diff --git a/arch/arm/mach-ixp23xx/include/mach/memory.h b/arch/arm/mach-ixp23xx/include/mach/memory.h
index 94a3a86cfeb..6ef65d813f1 100644
--- a/arch/arm/mach-ixp23xx/include/mach/memory.h
+++ b/arch/arm/mach-ixp23xx/include/mach/memory.h
@@ -19,7 +19,7 @@
  */
 #define PHYS_OFFSET             (0x00000000)
 
-#define IXP23XX_PCI_SDRAM_OFFSET (*((volatile int *)IXP23XX_PCI_SDRAM_BAR) & 0xfffffff0))
+#define IXP23XX_PCI_SDRAM_OFFSET (*((volatile int *)IXP23XX_PCI_SDRAM_BAR) & 0xfffffff0)
 
 #define __phys_to_bus(x)        ((x) + (IXP23XX_PCI_SDRAM_OFFSET - PHYS_OFFSET))
 #define __bus_to_phys(x)        ((x) - (IXP23XX_PCI_SDRAM_OFFSET - PHYS_OFFSET))
diff --git a/arch/arm/mach-ixp23xx/pci.c b/arch/arm/mach-ixp23xx/pci.c
index 59022becb13..4b0e598a91c 100644
--- a/arch/arm/mach-ixp23xx/pci.c
+++ b/arch/arm/mach-ixp23xx/pci.c
@@ -23,7 +23,6 @@
 #include <linux/mm.h>
 #include <linux/init.h>
 #include <linux/ioport.h>
-#include <linux/slab.h>
 #include <linux/delay.h>
 #include <linux/io.h>
 
diff --git a/arch/arm/mach-ixp4xx/avila-setup.c b/arch/arm/mach-ixp4xx/avila-setup.c
index 6e558a76457..d8bc86d76f1 100644
--- a/arch/arm/mach-ixp4xx/avila-setup.c
+++ b/arch/arm/mach-ixp4xx/avila-setup.c
@@ -17,7 +17,6 @@
 #include <linux/serial.h>
 #include <linux/tty.h>
 #include <linux/serial_8250.h>
-#include <linux/slab.h>
 #include <linux/i2c-gpio.h>
 #include <asm/types.h>
 #include <asm/setup.h>
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index c4a01594c76..e3181534c7f 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -502,32 +502,6 @@ struct pci_bus * __devinit ixp4xx_scan_bus(int nr, struct pci_sys_data *sys)
         return pci_scan_bus(sys->busnr, &ixp4xx_ops, sys);
 }
 
-/*
- * We override these so we properly do dmabounce otherwise drivers
- * are able to set the dma_mask to 0xffffffff and we can no longer
- * trap bounces. :(
- *
- * We just return true on everyhing except for < 64MB in which case 
- * we will fail miseralby and die since we can't handle that case.
- */
-int
-pci_set_dma_mask(struct pci_dev *dev, u64 mask)
-{
-        if (mask >= SZ_64M - 1 )
-                return 0;
-
-        return -EIO;
-}
-    
-int
-pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
-{
-        if (mask >= SZ_64M - 1 )
-                return 0;
-
-        return -EIO;
-}
-
 EXPORT_SYMBOL(ixp4xx_pci_read);
 EXPORT_SYMBOL(ixp4xx_pci_write);
 
diff --git a/arch/arm/mach-ixp4xx/coyote-setup.c b/arch/arm/mach-ixp4xx/coyote-setup.c
index 25bf5ad770e..31a47f6a893 100644
--- a/arch/arm/mach-ixp4xx/coyote-setup.c
+++ b/arch/arm/mach-ixp4xx/coyote-setup.c
@@ -14,7 +14,6 @@
 #include <linux/serial.h>
 #include <linux/tty.h>
 #include <linux/serial_8250.h>
-#include <linux/slab.h>
 
 #include <asm/types.h>
 #include <asm/setup.h>
diff --git a/arch/arm/mach-ixp4xx/gateway7001-setup.c b/arch/arm/mach-ixp4xx/gateway7001-setup.c
index 59b73a0ddfa..2583b2a1317 100644
--- a/arch/arm/mach-ixp4xx/gateway7001-setup.c
+++ b/arch/arm/mach-ixp4xx/gateway7001-setup.c
@@ -17,7 +17,6 @@
 #include <linux/serial.h>
 #include <linux/tty.h>
 #include <linux/serial_8250.h>
-#include <linux/slab.h>
 
 #include <asm/types.h>
 #include <asm/setup.h>
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-setup.c b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
index 0bc7185cb6f..c67586b7940 100644
--- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c
+++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
@@ -27,7 +27,6 @@
 #include <linux/serial.h>
 #include <linux/tty.h>
 #include <linux/serial_8250.h>
-#include <linux/slab.h>
 #include <asm/types.h>
 #include <asm/setup.h>
 #include <asm/memory.h>
diff --git a/arch/arm/mach-ixp4xx/include/mach/hardware.h b/arch/arm/mach-ixp4xx/include/mach/hardware.h
index f9d1c43e4a5..f91ca6d4fbe 100644
--- a/arch/arm/mach-ixp4xx/include/mach/hardware.h
+++ b/arch/arm/mach-ixp4xx/include/mach/hardware.h
@@ -26,11 +26,6 @@
 #define PCIBIOS_MAX_MEM         0x4BFFFFFF
 #endif
 
-/*
- * We override the standard dma-mask routines for bouncing.
- */
-#define HAVE_ARCH_PCI_SET_DMA_MASK
-
 #define pcibios_assign_all_busses()     1
 
 /* Register locations and bits */
diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c
index bbb76898884..827cbc4402f 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-setup.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c
@@ -14,7 +14,6 @@
 #include <linux/serial.h>
 #include <linux/tty.h>
 #include <linux/serial_8250.h>
-#include <linux/slab.h>
 #include <linux/i2c-gpio.h>
 #include <linux/io.h>
 #include <linux/mtd/mtd.h>
diff --git a/arch/arm/mach-ixp4xx/ixp4xx_npe.c b/arch/arm/mach-ixp4xx/ixp4xx_npe.c
index e8bb2577816..a17ed79207a 100644
--- a/arch/arm/mach-ixp4xx/ixp4xx_npe.c
+++ b/arch/arm/mach-ixp4xx/ixp4xx_npe.c
@@ -20,7 +20,6 @@
 #include <linux/io.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/slab.h>
 #include <mach/npe.h>
 
 #define DEBUG_MSG                       0
diff --git a/arch/arm/mach-ixp4xx/wg302v2-setup.c b/arch/arm/mach-ixp4xx/wg302v2-setup.c
index 7ea782021d1..4dd74863daa 100644
--- a/arch/arm/mach-ixp4xx/wg302v2-setup.c
+++ b/arch/arm/mach-ixp4xx/wg302v2-setup.c
@@ -18,7 +18,6 @@
 #include <linux/serial.h>
 #include <linux/tty.h>
 #include <linux/serial_8250.h>
-#include <linux/slab.h>
 
 #include <asm/types.h>
 #include <asm/setup.h>
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index f6c6196a51f..17879a876be 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -32,6 +32,12 @@ config MACH_SHEEVAPLUG
           Say 'Y' here if you want your kernel to support the
           Marvell SheevaPlug Reference Board.
 
+config MACH_ESATA_SHEEVAPLUG
+        bool "Marvell eSATA SheevaPlug Reference Board"
+        help
+          Say 'Y' here if you want your kernel to support the
+          Marvell eSATA SheevaPlug Reference Board.
+
 config MACH_TS219
         bool "QNAP TS-110, TS-119, TS-210, TS-219 and TS-219P Turbo NAS"
         help
@@ -46,18 +52,35 @@ config MACH_TS41X
           QNAP TS-410, TS-410U, TS-419P and TS-419U Turbo NAS
           devices.
 
+config MACH_OPENRD
+        bool
+
 config MACH_OPENRD_BASE
         bool "Marvell OpenRD Base Board"
+        select MACH_OPENRD
         help
           Say 'Y' here if you want your kernel to support the
           Marvell OpenRD Base Board.
 
+config MACH_OPENRD_CLIENT
+        bool "Marvell OpenRD Client Board"
+        select MACH_OPENRD
+        help
+          Say 'Y' here if you want your kernel to support the
+          Marvell OpenRD Client Board.
+
 config MACH_NETSPACE_V2
         bool "LaCie Network Space v2 NAS Board"
         help
           Say 'Y' here if you want your kernel to support the
           LaCie Network Space v2 NAS.
 
+config MACH_INETSPACE_V2
+        bool "LaCie Internet Space v2 NAS Board"
+        help
+          Say 'Y' here if you want your kernel to support the
+          LaCie Internet Space v2 NAS.
+
 endmenu
 
 endif
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
index d4d7f53b0fb..a5530e36ba3 100644
--- a/arch/arm/mach-kirkwood/Makefile
+++ b/arch/arm/mach-kirkwood/Makefile
@@ -5,9 +5,11 @@ obj-$(CONFIG_MACH_RD88F6192_NAS)	+= rd88f6192-nas-setup.o
 obj-$(CONFIG_MACH_RD88F6281)            += rd88f6281-setup.o
 obj-$(CONFIG_MACH_MV88F6281GTW_GE)      += mv88f6281gtw_ge-setup.o
 obj-$(CONFIG_MACH_SHEEVAPLUG)           += sheevaplug-setup.o
+obj-$(CONFIG_MACH_ESATA_SHEEVAPLUG)     += sheevaplug-setup.o
 obj-$(CONFIG_MACH_TS219)                += ts219-setup.o tsx1x-common.o
 obj-$(CONFIG_MACH_TS41X)                += ts41x-setup.o tsx1x-common.o
-obj-$(CONFIG_MACH_OPENRD_BASE)          += openrd_base-setup.o
+obj-$(CONFIG_MACH_OPENRD)               += openrd-setup.o
 obj-$(CONFIG_MACH_NETSPACE_V2)          += netspace_v2-setup.o
+obj-$(CONFIG_MACH_INETSPACE_V2)         += netspace_v2-setup.o
 
 obj-$(CONFIG_CPU_IDLE)                  += cpuidle.o
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 242dd077534..f759ca24392 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -656,7 +656,7 @@ static struct platform_device kirkwood_xor00_channel = {
         .dev            = {
                 .dma_mask               = &kirkwood_xor_dmamask,
                 .coherent_dma_mask      = DMA_BIT_MASK(64),
-                .platform_data          = (void *)&kirkwood_xor00_data,
+                .platform_data          = &kirkwood_xor00_data,
         },
 };
 
@@ -682,7 +682,7 @@ static struct platform_device kirkwood_xor01_channel = {
         .dev            = {
                 .dma_mask               = &kirkwood_xor_dmamask,
                 .coherent_dma_mask      = DMA_BIT_MASK(64),
-                .platform_data          = (void *)&kirkwood_xor01_data,
+                .platform_data          = &kirkwood_xor01_data,
         },
 };
 
@@ -755,7 +755,7 @@ static struct platform_device kirkwood_xor10_channel = {
         .dev            = {
                 .dma_mask               = &kirkwood_xor_dmamask,
                 .coherent_dma_mask      = DMA_BIT_MASK(64),
-                .platform_data          = (void *)&kirkwood_xor10_data,
+                .platform_data          = &kirkwood_xor10_data,
         },
 };
 
@@ -781,7 +781,7 @@ static struct platform_device kirkwood_xor11_channel = {
         .dev            = {
                 .dma_mask               = &kirkwood_xor_dmamask,
                 .coherent_dma_mask      = DMA_BIT_MASK(64),
-                .platform_data          = (void *)&kirkwood_xor11_data,
+                .platform_data          = &kirkwood_xor11_data,
         },
 };
 
diff --git a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
index 0358f45766c..5e6f711b1c6 100644
--- a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
+++ b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
@@ -74,9 +74,9 @@ static struct gpio_keys_button mv88f6281gtw_ge_button_pins[] = {
                 .desc           = "SWR Button",
                 .active_low     = 1,
         }, {
-                .code           = KEY_F1,
+                .code           = KEY_WPS_BUTTON,
                 .gpio           = 46,
-                .desc           = "WPS Button(F1)",
+                .desc           = "WPS Button",
                 .active_low     = 1,
         },
 };
diff --git a/arch/arm/mach-kirkwood/netspace_v2-setup.c b/arch/arm/mach-kirkwood/netspace_v2-setup.c
index 9a064065beb..3ae158d7268 100644
--- a/arch/arm/mach-kirkwood/netspace_v2-setup.c
+++ b/arch/arm/mach-kirkwood/netspace_v2-setup.c
@@ -182,8 +182,14 @@ static struct platform_device netspace_v2_gpio_buttons = {
 
 static struct gpio_led netspace_v2_gpio_led_pins[] = {
         {
-                .name   = "ns_v2:red:fail",
-                .gpio   = NETSPACE_V2_GPIO_RED_LED,
+                .name                   = "ns_v2:blue:sata",
+                .default_trigger        = "default-on",
+                .gpio                   = NETSPACE_V2_GPIO_BLUE_LED_CMD,
+                .active_low             = 1,
+        },
+        {
+                .name                   = "ns_v2:red:fail",
+                .gpio                   = NETSPACE_V2_GPIO_RED_LED,
         },
 };
 
@@ -202,30 +208,19 @@ static struct platform_device netspace_v2_gpio_leds = {
 
 static void __init netspace_v2_gpio_leds_init(void)
 {
-        platform_device_register(&netspace_v2_gpio_leds);
+        int err;
 
-        /*
-         * Configure the front blue LED to blink in relation with the SATA
-         * activity.
-         */
-        if (gpio_request(NETSPACE_V2_GPIO_BLUE_LED_SLOW,
-                         "SATA blue LED slow") != 0)
-                return;
-        if (gpio_direction_output(NETSPACE_V2_GPIO_BLUE_LED_SLOW, 0) != 0)
-                goto err_free_1;
-        if (gpio_request(NETSPACE_V2_GPIO_BLUE_LED_CMD,
-                         "SATA blue LED command") != 0)
-                goto err_free_1;
-        if (gpio_direction_output(NETSPACE_V2_GPIO_BLUE_LED_CMD, 0) != 0)
-                goto err_free_2;
-
-        return;
-
-err_free_2:
-        gpio_free(NETSPACE_V2_GPIO_BLUE_LED_CMD);
-err_free_1:
-        gpio_free(NETSPACE_V2_GPIO_BLUE_LED_SLOW);
-        pr_err("netspace_v2: failed to configure SATA blue LED\n");
+        /* Configure register slow_led to allow SATA activity LED blinking */
+        err = gpio_request(NETSPACE_V2_GPIO_BLUE_LED_SLOW, "blue LED slow");
+        if (err == 0) {
+                err = gpio_direction_output(NETSPACE_V2_GPIO_BLUE_LED_SLOW, 0);
+                if (err)
+                        gpio_free(NETSPACE_V2_GPIO_BLUE_LED_SLOW);
+        }
+        if (err)
+                pr_err("netspace_v2: failed to configure blue LED slow GPIO\n");
+
+        platform_device_register(&netspace_v2_gpio_leds);
 }
 
 /*****************************************************************************
@@ -314,6 +309,7 @@ static void __init netspace_v2_init(void)
                 pr_err("netspace_v2: failed to configure power-off GPIO\n");
 }
 
+#ifdef CONFIG_MACH_NETSPACE_V2
 MACHINE_START(NETSPACE_V2, "LaCie Network Space v2")
         .phys_io        = KIRKWOOD_REGS_PHYS_BASE,
         .io_pg_offst    = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
@@ -323,3 +319,16 @@ MACHINE_START(NETSPACE_V2, "LaCie Network Space v2")
         .init_irq       = kirkwood_init_irq,
         .timer          = &netspace_v2_timer,
 MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_INETSPACE_V2
+MACHINE_START(INETSPACE_V2, "LaCie Internet Space v2")
+        .phys_io        = KIRKWOOD_REGS_PHYS_BASE,
+        .io_pg_offst    = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
+        .boot_params    = 0x00000100,
+        .init_machine   = netspace_v2_init,
+        .map_io         = kirkwood_map_io,
+        .init_irq       = kirkwood_init_irq,
+        .timer          = &netspace_v2_timer,
+MACHINE_END
+#endif
diff --git a/arch/arm/mach-kirkwood/openrd-setup.c b/arch/arm/mach-kirkwood/openrd-setup.c
new file mode 100644
index 00000000000..ad3f1ec3379
--- /dev/null
+++ b/arch/arm/mach-kirkwood/openrd-setup.c
@@ -0,0 +1,118 @@
+/*
+ * arch/arm/mach-kirkwood/openrd-setup.c
+ *
+ * Marvell OpenRD (Base|Client) Board Setup
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/ata_platform.h>
+#include <linux/mv643xx_eth.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <mach/kirkwood.h>
+#include <plat/mvsdio.h>
+#include "common.h"
+#include "mpp.h"
+
+static struct mtd_partition openrd_nand_parts[] = {
+        {
+                .name           = "u-boot",
+                .offset         = 0,
+                .size           = SZ_1M,
+                .mask_flags     = MTD_WRITEABLE
+        }, {
+                .name           = "uImage",
+                .offset         = MTDPART_OFS_NXTBLK,
+                .size           = SZ_4M
+        }, {
+                .name           = "root",
+                .offset         = MTDPART_OFS_NXTBLK,
+                .size           = MTDPART_SIZ_FULL
+        },
+};
+
+static struct mv643xx_eth_platform_data openrd_ge00_data = {
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(8),
+};
+
+static struct mv643xx_eth_platform_data openrd_ge01_data = {
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(24),
+};
+
+static struct mv_sata_platform_data openrd_sata_data = {
+        .n_ports        = 2,
+};
+
+static struct mvsdio_platform_data openrd_mvsdio_data = {
+        .gpio_card_detect = 29, /* MPP29 used as SD card detect */
+};
+
+static unsigned int openrd_mpp_config[] __initdata = {
+        MPP29_GPIO,
+        0
+};
+
+static void __init openrd_init(void)
+{
+        /*
+         * Basic setup. Needs to be called early.
+         */
+        kirkwood_init();
+        kirkwood_mpp_conf(openrd_mpp_config);
+
+        kirkwood_uart0_init();
+        kirkwood_nand_init(ARRAY_AND_SIZE(openrd_nand_parts), 25);
+
+        kirkwood_ehci_init();
+
+        kirkwood_ge00_init(&openrd_ge00_data);
+        if (machine_is_openrd_client())
+                kirkwood_ge01_init(&openrd_ge01_data);
+        kirkwood_sata_init(&openrd_sata_data);
+        kirkwood_sdio_init(&openrd_mvsdio_data);
+
+        kirkwood_i2c_init();
+}
+
+static int __init openrd_pci_init(void)
+{
+        if (machine_is_openrd_base() || machine_is_openrd_client())
+                kirkwood_pcie_init();
+
+        return 0;
+}
+subsys_initcall(openrd_pci_init);
+
+#ifdef CONFIG_MACH_OPENRD_BASE
+MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board")
+        /* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */
+        .phys_io        = KIRKWOOD_REGS_PHYS_BASE,
+        .io_pg_offst    = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
+        .boot_params    = 0x00000100,
+        .init_machine   = openrd_init,
+        .map_io         = kirkwood_map_io,
+        .init_irq       = kirkwood_init_irq,
+        .timer          = &kirkwood_timer,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_OPENRD_CLIENT
+MACHINE_START(OPENRD_CLIENT, "Marvell OpenRD Client Board")
+        /* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */
+        .phys_io        = KIRKWOOD_REGS_PHYS_BASE,
+        .io_pg_offst    = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
+        .boot_params    = 0x00000100,
+        .init_machine   = openrd_init,
+        .map_io         = kirkwood_map_io,
+        .init_irq       = kirkwood_init_irq,
+        .timer          = &kirkwood_timer,
+MACHINE_END
+#endif
diff --git a/arch/arm/mach-kirkwood/openrd_base-setup.c b/arch/arm/mach-kirkwood/openrd_base-setup.c
deleted file mode 100644
index 77617c72229..00000000000
--- a/arch/arm/mach-kirkwood/openrd_base-setup.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * arch/arm/mach-kirkwood/openrd_base-setup.c
- *
- * Marvell OpenRD Base Board Setup
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/mtd/partitions.h>
-#include <linux/ata_platform.h>
-#include <linux/mv643xx_eth.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <mach/kirkwood.h>
-#include <plat/mvsdio.h>
-#include "common.h"
-#include "mpp.h"
-
-static struct mtd_partition openrd_base_nand_parts[] = {
-        {
-                .name = "u-boot",
-                .offset = 0,
-                .size = SZ_1M
-        }, {
-                .name = "uImage",
-                .offset = MTDPART_OFS_NXTBLK,
-                .size = SZ_4M
-        }, {
-                .name = "root",
-                .offset = MTDPART_OFS_NXTBLK,
-                .size = MTDPART_SIZ_FULL
-        },
-};
-
-static struct mv643xx_eth_platform_data openrd_base_ge00_data = {
-        .phy_addr       = MV643XX_ETH_PHY_ADDR(8),
-};
-
-static struct mv_sata_platform_data openrd_base_sata_data = {
-        .n_ports        = 2,
-};
-
-static struct mvsdio_platform_data openrd_base_mvsdio_data = {
-        .gpio_card_detect = 29, /* MPP29 used as SD card detect */
-};
-
-static unsigned int openrd_base_mpp_config[] __initdata = {
-        MPP29_GPIO,
-        0
-};
-
-static void __init openrd_base_init(void)
-{
-        /*
-         * Basic setup. Needs to be called early.
-         */
-        kirkwood_init();
-        kirkwood_mpp_conf(openrd_base_mpp_config);
-
-        kirkwood_uart0_init();
-        kirkwood_nand_init(ARRAY_AND_SIZE(openrd_base_nand_parts), 25);
-
-        kirkwood_ehci_init();
-
-        kirkwood_ge00_init(&openrd_base_ge00_data);
-        kirkwood_sata_init(&openrd_base_sata_data);
-        kirkwood_sdio_init(&openrd_base_mvsdio_data);
-
-        kirkwood_i2c_init();
-}
-
-static int __init openrd_base_pci_init(void)
-{
-        if (machine_is_openrd_base())
-                kirkwood_pcie_init();
-
-        return 0;
- }
-subsys_initcall(openrd_base_pci_init);
-
-
-MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board")
-        /* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */
-        .phys_io        = KIRKWOOD_REGS_PHYS_BASE,
-        .io_pg_offst    = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0x00000100,
-        .init_machine   = openrd_base_init,
-        .map_io         = kirkwood_map_io,
-        .init_irq       = kirkwood_init_irq,
-        .timer          = &kirkwood_timer,
-MACHINE_END
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index a604b2a701a..dee1eff50d3 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -10,6 +10,7 @@
 
 #include <linux/kernel.h>
 #include <linux/pci.h>
+#include <linux/slab.h>
 #include <linux/mbus.h>
 #include <asm/irq.h>
 #include <asm/mach/pci.h>
diff --git a/arch/arm/mach-kirkwood/sheevaplug-setup.c b/arch/arm/mach-kirkwood/sheevaplug-setup.c
index c7319eeac8b..a00879d34d5 100644
--- a/arch/arm/mach-kirkwood/sheevaplug-setup.c
+++ b/arch/arm/mach-kirkwood/sheevaplug-setup.c
@@ -11,6 +11,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
+#include <linux/ata_platform.h>
 #include <linux/mtd/partitions.h>
 #include <linux/mv643xx_eth.h>
 #include <linux/gpio.h>
@@ -42,10 +43,19 @@ static struct mv643xx_eth_platform_data sheevaplug_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(0),
 };
 
+static struct mv_sata_platform_data sheeva_esata_sata_data = {
+        .n_ports        = 2,
+};
+
 static struct mvsdio_platform_data sheevaplug_mvsdio_data = {
         /* unfortunately the CD signal has not been connected */
 };
 
+static struct mvsdio_platform_data sheeva_esata_mvsdio_data = {
+        .gpio_write_protect = 44, /* MPP44 used as SD write protect */
+        .gpio_card_detect = 47,   /* MPP47 used as SD card detect */
+};
+
 static struct gpio_led sheevaplug_led_pins[] = {
         {
                 .name                   = "plug:green:health",
@@ -74,13 +84,26 @@ static unsigned int sheevaplug_mpp_config[] __initdata = {
         0
 };
 
+static unsigned int sheeva_esata_mpp_config[] __initdata = {
+        MPP29_GPIO,     /* USB Power Enable */
+        MPP44_GPIO,     /* SD Write Protect */
+        MPP47_GPIO,     /* SD Card Detect */
+        MPP49_GPIO,     /* LED Green */
+        0
+};
+
 static void __init sheevaplug_init(void)
 {
         /*
          * Basic setup. Needs to be called early.
          */
         kirkwood_init();
-        kirkwood_mpp_conf(sheevaplug_mpp_config);
+
+        /* setup gpio pin select */
+        if (machine_is_sheeva_esata())
+                kirkwood_mpp_conf(sheeva_esata_mpp_config);
+        else
+                kirkwood_mpp_conf(sheevaplug_mpp_config);
 
         kirkwood_uart0_init();
         kirkwood_nand_init(ARRAY_AND_SIZE(sheevaplug_nand_parts), 25);
@@ -91,11 +114,21 @@ static void __init sheevaplug_init(void)
         kirkwood_ehci_init();
 
         kirkwood_ge00_init(&sheevaplug_ge00_data);
-        kirkwood_sdio_init(&sheevaplug_mvsdio_data);
+
+        /* honor lower power consumption for plugs with out eSATA */
+        if (machine_is_sheeva_esata())
+                kirkwood_sata_init(&sheeva_esata_sata_data);
+
+        /* enable sd wp and sd cd on plugs with esata */
+        if (machine_is_sheeva_esata())
+                kirkwood_sdio_init(&sheeva_esata_mvsdio_data);
+        else
+                kirkwood_sdio_init(&sheevaplug_mvsdio_data);
 
         platform_device_register(&sheevaplug_leds);
 }
 
+#ifdef CONFIG_MACH_SHEEVAPLUG
 MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board")
         /* Maintainer: shadi Ammouri <shadi@marvell.com> */
         .phys_io        = KIRKWOOD_REGS_PHYS_BASE,
@@ -106,3 +139,16 @@ MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board")
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
 MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_ESATA_SHEEVAPLUG
+MACHINE_START(ESATA_SHEEVAPLUG, "Marvell eSATA SheevaPlug Reference Board")
+        .phys_io        = KIRKWOOD_REGS_PHYS_BASE,
+        .io_pg_offst    = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
+        .boot_params    = 0x00000100,
+        .init_machine   = sheevaplug_init,
+        .map_io         = kirkwood_map_io,
+        .init_irq       = kirkwood_init_irq,
+        .timer          = &kirkwood_timer,
+MACHINE_END
+#endif
diff --git a/arch/arm/mach-lh7a40x/clcd.c b/arch/arm/mach-lh7a40x/clcd.c
index c472b9e8b37..7fe4fd347c8 100644
--- a/arch/arm/mach-lh7a40x/clcd.c
+++ b/arch/arm/mach-lh7a40x/clcd.c
@@ -10,6 +10,7 @@
  */
 
 #include <linux/init.h>
+#include <linux/gfp.h>
 #include <linux/device.h>
 #include <linux/dma-mapping.h>
 #include <linux/sysdev.h>
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index c6a564fc4a7..6ab843eaa35 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -1,6 +1,6 @@
 if ARCH_MMP
 
-menu "Marvell PXA168/910 Implmentations"
+menu "Marvell PXA168/910/MMP2 Implmentations"
 
 config MACH_ASPENITE
         bool "Marvell's PXA168 Aspenite Development Board"
@@ -16,6 +16,13 @@ config MACH_ZYLONITE2
           Say 'Y' here if you want to support the Marvell PXA168-based
           Zylonite2 Development Board.
 
+config MACH_AVENGERS_LITE
+        bool "Marvell's PXA168 Avengers Lite Development Board"
+        select CPU_PXA168
+        help
+          Say 'Y' here if you want to support the Marvell PXA168-based
+          Avengers Lite Development Board.
+
 config MACH_TAVOREVB
         bool "Marvell's PXA910 TavorEVB Development Board"
         select CPU_PXA910
@@ -30,6 +37,26 @@ config MACH_TTC_DKB
           Say 'Y' here if you want to support the Marvell PXA910-based
           TTC_DKB Development Board.
 
+config MACH_FLINT
+        bool "Marvell's Flint Development Platform"
+        select CPU_MMP2
+        help
+          Say 'Y' here if you want to support the Marvell MMP2-based
+          Flint Development Platform.
+          MMP2-based board can't be co-existed with PXA168-based &
+          PXA910-based development board. Since MMP2 is compatible to
+          ARMv6 architecture.
+
+config MACH_MARVELL_JASPER
+        bool "Marvell's Jasper Development Platform"
+        select CPU_MMP2
+        help
+          Say 'Y' here if you want to support the Marvell MMP2-base
+          Jasper Development Platform.
+          MMP2-based board can't be co-existed with PXA168-based &
+          PXA910-based development board. Since MMP2 is compatible to
+          ARMv6 architecture.
+
 endmenu
 
 config CPU_PXA168
@@ -44,4 +71,10 @@ config CPU_PXA910
         help
           Select code specific to PXA910
 
+config CPU_MMP2
+        bool
+        select CPU_V6
+        select CPU_32v6K
+        help
+          Select code specific to MMP2. MMP2 is ARMv6 compatible.
 endif
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index 6883e658488..8b66d06739c 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -2,14 +2,18 @@
 # Makefile for Marvell's PXA168 processors line
 #
 
-obj-y                           += common.o clock.o devices.o irq.o time.o
+obj-y                           += common.o clock.o devices.o time.o
 
 # SoC support
-obj-$(CONFIG_CPU_PXA168)        += pxa168.o
-obj-$(CONFIG_CPU_PXA910)        += pxa910.o
+obj-$(CONFIG_CPU_PXA168)        += pxa168.o irq-pxa168.o
+obj-$(CONFIG_CPU_PXA910)        += pxa910.o irq-pxa168.o
+obj-$(CONFIG_CPU_MMP2)          += mmp2.o irq-mmp2.o
 
 # board support
 obj-$(CONFIG_MACH_ASPENITE)     += aspenite.o
 obj-$(CONFIG_MACH_ZYLONITE2)    += aspenite.o
+obj-$(CONFIG_MACH_AVENGERS_LITE)+= avengers_lite.o
 obj-$(CONFIG_MACH_TAVOREVB)     += tavorevb.o
 obj-$(CONFIG_MACH_TTC_DKB)      += ttc_dkb.o
+obj-$(CONFIG_MACH_FLINT)        += flint.o
+obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o
diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c
new file mode 100644
index 00000000000..8c3fa5d14f4
--- /dev/null
+++ b/arch/arm/mach-mmp/avengers_lite.c
@@ -0,0 +1,51 @@
+/*
+ *  linux/arch/arm/mach-mmp/avengers_lite.c
+ *
+ *  Support for the Marvell PXA168-based Avengers lite Development Platform.
+ *
+ *  Copyright (C) 2009-2010 Marvell International Ltd.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  publishhed by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <mach/addr-map.h>
+#include <mach/mfp-pxa168.h>
+#include <mach/pxa168.h>
+#include <mach/irqs.h>
+
+
+#include "common.h"
+#include <linux/delay.h>
+
+/* Avengers lite MFP configurations */
+static unsigned long avengers_lite_pin_config_V16F[] __initdata = {
+        /* DEBUG_UART */
+        GPIO88_UART2_TXD,
+        GPIO89_UART2_RXD,
+};
+
+static void __init avengers_lite_init(void)
+{
+        mfp_config(ARRAY_AND_SIZE(avengers_lite_pin_config_V16F));
+
+        /* on-chip devices */
+        pxa168_add_uart(2);
+}
+
+MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform")
+        .phys_io        = APB_PHYS_BASE,
+        .boot_params    = 0x00000100,
+        .io_pg_offst    = (APB_VIRT_BASE >> 18) & 0xfffc,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa168_init_irq,
+        .timer          = &pxa168_timer,
+        .init_machine   = avengers_lite_init,
+MACHINE_END
diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h
index c33fbbc4941..b4a0ba05a0f 100644
--- a/arch/arm/mach-mmp/common.h
+++ b/arch/arm/mach-mmp/common.h
@@ -3,11 +3,15 @@
 struct sys_timer;
 
 extern void timer_init(int irq);
+extern void mmp2_clear_pmic_int(void);
 
 extern struct sys_timer pxa168_timer;
 extern struct sys_timer pxa910_timer;
+extern struct sys_timer mmp2_timer;
 extern void __init pxa168_init_irq(void);
 extern void __init pxa910_init_irq(void);
+extern void __init mmp2_init_icu(void);
+extern void __init mmp2_init_irq(void);
 
 extern void __init icu_init_irq(void);
 extern void __init pxa_map_io(void);
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
new file mode 100644
index 00000000000..4ec7709a346
--- /dev/null
+++ b/arch/arm/mach-mmp/flint.c
@@ -0,0 +1,123 @@
+/*
+ *  linux/arch/arm/mach-mmp/flint.c
+ *
+ *  Support for the Marvell Flint Development Platform.
+ *
+ *  Copyright (C) 2009 Marvell International Ltd.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  publishhed by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/smc91x.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <mach/addr-map.h>
+#include <mach/mfp-mmp2.h>
+#include <mach/mmp2.h>
+
+#include "common.h"
+
+static unsigned long flint_pin_config[] __initdata = {
+        /* UART1 */
+        GPIO45_UART1_RXD,
+        GPIO46_UART1_TXD,
+
+        /* UART2 */
+        GPIO47_UART2_RXD,
+        GPIO48_UART2_TXD,
+
+        /* SMC */
+        GPIO151_SMC_SCLK,
+        GPIO145_SMC_nCS0,
+        GPIO146_SMC_nCS1,
+        GPIO152_SMC_BE0,
+        GPIO153_SMC_BE1,
+        GPIO154_SMC_IRQ,
+        GPIO113_SMC_RDY,
+
+        /*Ethernet*/
+        GPIO155_GPIO155,
+
+        /* DFI */
+        GPIO168_DFI_D0,
+        GPIO167_DFI_D1,
+        GPIO166_DFI_D2,
+        GPIO165_DFI_D3,
+        GPIO107_DFI_D4,
+        GPIO106_DFI_D5,
+        GPIO105_DFI_D6,
+        GPIO104_DFI_D7,
+        GPIO111_DFI_D8,
+        GPIO164_DFI_D9,
+        GPIO163_DFI_D10,
+        GPIO162_DFI_D11,
+        GPIO161_DFI_D12,
+        GPIO110_DFI_D13,
+        GPIO109_DFI_D14,
+        GPIO108_DFI_D15,
+        GPIO143_ND_nCS0,
+        GPIO144_ND_nCS1,
+        GPIO147_ND_nWE,
+        GPIO148_ND_nRE,
+        GPIO150_ND_ALE,
+        GPIO149_ND_CLE,
+        GPIO112_ND_RDY0,
+        GPIO160_ND_RDY1,
+};
+
+static struct smc91x_platdata flint_smc91x_info = {
+        .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+};
+
+static struct resource smc91x_resources[] = {
+        [0] = {
+                .start  = SMC_CS1_PHYS_BASE + 0x300,
+                .end    = SMC_CS1_PHYS_BASE + 0xfffff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = gpio_to_irq(155),
+                .end    = gpio_to_irq(155),
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
+        }
+};
+
+static struct platform_device smc91x_device = {
+        .name           = "smc91x",
+        .id             = 0,
+        .dev            = {
+                .platform_data = &flint_smc91x_info,
+        },
+        .num_resources  = ARRAY_SIZE(smc91x_resources),
+        .resource       = smc91x_resources,
+};
+
+static void __init flint_init(void)
+{
+        mfp_config(ARRAY_AND_SIZE(flint_pin_config));
+
+        /* on-chip devices */
+        mmp2_add_uart(1);
+        mmp2_add_uart(2);
+
+        /* off-chip devices */
+        platform_device_register(&smc91x_device);
+}
+
+MACHINE_START(FLINT, "Flint Development Platform")
+        .phys_io        = APB_PHYS_BASE,
+        .boot_params    = 0x00000100,
+        .io_pg_offst    = (APB_VIRT_BASE >> 18) & 0xfffc,
+        .map_io         = pxa_map_io,
+        .init_irq       = mmp2_init_irq,
+        .timer          = &mmp2_timer,
+        .init_machine   = flint_init,
+MACHINE_END
diff --git a/arch/arm/mach-mmp/include/mach/cputype.h b/arch/arm/mach-mmp/include/mach/cputype.h
index 25e797b0908..83b18721d93 100644
--- a/arch/arm/mach-mmp/include/mach/cputype.h
+++ b/arch/arm/mach-mmp/include/mach/cputype.h
@@ -8,6 +8,7 @@
  *
  * PXA168    A0    0x41159263   0x56158400   0x00A0A333
  * PXA910    Y0    0x41159262   0x56158000   0x00F0C910
+ * MMP2      Z0                 0x560f5811
  */
 
 #ifdef CONFIG_CPU_PXA168
@@ -24,7 +25,15 @@
 #  define __cpu_is_pxa910(id)   (0)
 #endif
 
+#ifdef CONFIG_CPU_MMP2
+#  define __cpu_is_mmp2(id)     \
+        ({ unsigned int _id = ((id) >> 8) & 0xff; _id == 0x58; })
+#else
+#  define __cpu_is_mmp2(id)     (0)
+#endif
+
 #define cpu_is_pxa168()         ({ __cpu_is_pxa168(read_cpuid_id()); })
 #define cpu_is_pxa910()         ({ __cpu_is_pxa910(read_cpuid_id()); })
+#define cpu_is_mmp2()           ({ __cpu_is_mmp2(read_cpuid_id()); })
 
 #endif /* __ASM_MACH_CPUTYPE_H */
diff --git a/arch/arm/mach-mmp/include/mach/devices.h b/arch/arm/mach-mmp/include/mach/devices.h
index 24585397217..1fa0a492454 100644
--- a/arch/arm/mach-mmp/include/mach/devices.h
+++ b/arch/arm/mach-mmp/include/mach/devices.h
@@ -34,4 +34,16 @@ struct pxa_device_desc pxa910_device_##_name __initdata = {		\
         .size           = _size,                                        \
         .dma            = { _dma },                                     \
 };
+
+#define MMP2_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...)     \
+struct pxa_device_desc mmp2_device_##_name __initdata = {               \
+        .dev_name       = "mmp2-" #_name,                               \
+        .drv_name       = _drv,                                         \
+        .id             = _id,                                          \
+        .irq            = IRQ_MMP2_##_irq,                              \
+        .start          = _start,                                       \
+        .size           = _size,                                        \
+        .dma            = { _dma },                                     \
+}
+
 extern int pxa_register_device(struct pxa_device_desc *, void *, size_t);
diff --git a/arch/arm/mach-mmp/include/mach/entry-macro.S b/arch/arm/mach-mmp/include/mach/entry-macro.S
index 6d3cd35478b..c42d9d4e892 100644
--- a/arch/arm/mach-mmp/include/mach/entry-macro.S
+++ b/arch/arm/mach-mmp/include/mach/entry-macro.S
@@ -15,7 +15,12 @@
         .endm
 
         .macro  get_irqnr_preamble, base, tmp
-        ldr     \base, =ICU_AP_IRQ_SEL_INT_NUM
+        mrc     p15, 0, \tmp, c0, c0, 0         @ CPUID
+        and     \tmp, \tmp, #0xff00
+        cmp     \tmp, #0x5800
+        ldr     \base, =ICU_VIRT_BASE
+        addne   \base, \base, #0x10c            @ PJ1 AP INT SEL register
+        addeq   \base, \base, #0x104            @ PJ4 IRQ SEL register
         .endm
 
         .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h
index d68871b0f28..02701196ea0 100644
--- a/arch/arm/mach-mmp/include/mach/irqs.h
+++ b/arch/arm/mach-mmp/include/mach/irqs.h
@@ -113,10 +113,119 @@
 #define IRQ_PXA910_AP_PMU               60
 #define IRQ_PXA910_SM_INT               63      /* from PinMux */
 
-#define IRQ_GPIO_START                  64
-#define IRQ_GPIO_NUM                    128
+/*
+ * Interrupt numbers for MMP2
+ */
+#define IRQ_MMP2_NONE                   (-1)
+#define IRQ_MMP2_SSP1                   0
+#define IRQ_MMP2_SSP2                   1
+#define IRQ_MMP2_SSPA1                  2
+#define IRQ_MMP2_SSPA2                  3
+#define IRQ_MMP2_PMIC_MUX               4       /* PMIC & Charger */
+#define IRQ_MMP2_RTC_MUX                5
+#define IRQ_MMP2_TWSI1                  7
+#define IRQ_MMP2_GPU                    8
+#define IRQ_MMP2_KEYPAD                 9
+#define IRQ_MMP2_ROTARY                 10
+#define IRQ_MMP2_TRACKBALL              11
+#define IRQ_MMP2_ONEWIRE                12
+#define IRQ_MMP2_TIMER1                 13
+#define IRQ_MMP2_TIMER2                 14
+#define IRQ_MMP2_TIMER3                 15
+#define IRQ_MMP2_RIPC                   16
+#define IRQ_MMP2_TWSI_MUX               17      /* TWSI2 ~ TWSI6 */
+#define IRQ_MMP2_HDMI                   19
+#define IRQ_MMP2_SSP3                   20
+#define IRQ_MMP2_SSP4                   21
+#define IRQ_MMP2_USB_HS1                22
+#define IRQ_MMP2_USB_HS2                23
+#define IRQ_MMP2_UART3                  24
+#define IRQ_MMP2_UART1                  27
+#define IRQ_MMP2_UART2                  28
+#define IRQ_MMP2_MIPI_DSI               29
+#define IRQ_MMP2_CI2                    30
+#define IRQ_MMP2_PMU_TIMER1             31
+#define IRQ_MMP2_PMU_TIMER2             32
+#define IRQ_MMP2_PMU_TIMER3             33
+#define IRQ_MMP2_USB_FS                 34
+#define IRQ_MMP2_MISC_MUX               35
+#define IRQ_MMP2_WDT1                   36
+#define IRQ_MMP2_NAND_DMA               37
+#define IRQ_MMP2_USIM                   38
+#define IRQ_MMP2_MMC                    39
+#define IRQ_MMP2_WTM                    40
+#define IRQ_MMP2_LCD                    41
+#define IRQ_MMP2_CI                     42
+#define IRQ_MMP2_IRE                    43
+#define IRQ_MMP2_USB_OTG                44
+#define IRQ_MMP2_NAND                   45
+#define IRQ_MMP2_UART4                  46
+#define IRQ_MMP2_DMA_FIQ                47
+#define IRQ_MMP2_DMA_RIQ                48
+#define IRQ_MMP2_GPIO                   49
+#define IRQ_MMP2_SSP_MUX                51
+#define IRQ_MMP2_MMC2                   52
+#define IRQ_MMP2_MMC3                   53
+#define IRQ_MMP2_MMC4                   54
+#define IRQ_MMP2_MIPI_HSI               55
+#define IRQ_MMP2_MSP                    58
+#define IRQ_MMP2_MIPI_SLIM_DMA          59
+#define IRQ_MMP2_PJ4_FREQ_CHG           60
+#define IRQ_MMP2_MIPI_SLIM              62
+#define IRQ_MMP2_SM                     63
+
+#define IRQ_MMP2_MUX_BASE               64
+
+/* secondary interrupt of INT #4 */
+#define IRQ_MMP2_PMIC_BASE              (IRQ_MMP2_MUX_BASE)
+#define IRQ_MMP2_CHARGER                (IRQ_MMP2_PMIC_BASE + 0)
+#define IRQ_MMP2_PMIC                   (IRQ_MMP2_PMIC_BASE + 1)
+
+/* secondary interrupt of INT #5 */
+#define IRQ_MMP2_RTC_BASE               (IRQ_MMP2_PMIC_BASE + 2)
+#define IRQ_MMP2_RTC_ALARM              (IRQ_MMP2_RTC_BASE + 0)
+#define IRQ_MMP2_RTC                    (IRQ_MMP2_RTC_BASE + 1)
+
+/* secondary interrupt of INT #17 */
+#define IRQ_MMP2_TWSI_BASE              (IRQ_MMP2_RTC_BASE + 2)
+#define IRQ_MMP2_TWSI2                  (IRQ_MMP2_TWSI_BASE + 0)
+#define IRQ_MMP2_TWSI3                  (IRQ_MMP2_TWSI_BASE + 1)
+#define IRQ_MMP2_TWSI4                  (IRQ_MMP2_TWSI_BASE + 2)
+#define IRQ_MMP2_TWSI5                  (IRQ_MMP2_TWSI_BASE + 3)
+#define IRQ_MMP2_TWSI6                  (IRQ_MMP2_TWSI_BASE + 4)
+
+/* secondary interrupt of INT #35 */
+#define IRQ_MMP2_MISC_BASE              (IRQ_MMP2_TWSI_BASE + 5)
+#define IRQ_MMP2_PERF                   (IRQ_MMP2_MISC_BASE + 0)
+#define IRQ_MMP2_L2_PA_ECC              (IRQ_MMP2_MISC_BASE + 1)
+#define IRQ_MMP2_L2_ECC                 (IRQ_MMP2_MISC_BASE + 2)
+#define IRQ_MMP2_L2_UECC                (IRQ_MMP2_MISC_BASE + 3)
+#define IRQ_MMP2_DDR                    (IRQ_MMP2_MISC_BASE + 4)
+#define IRQ_MMP2_FAB0_TIMEOUT           (IRQ_MMP2_MISC_BASE + 5)
+#define IRQ_MMP2_FAB1_TIMEOUT           (IRQ_MMP2_MISC_BASE + 6)
+#define IRQ_MMP2_FAB2_TIMEOUT           (IRQ_MMP2_MISC_BASE + 7)
+#define IRQ_MMP2_THERMAL                (IRQ_MMP2_MISC_BASE + 9)
+#define IRQ_MMP2_MAIN_PMU               (IRQ_MMP2_MISC_BASE + 10)
+#define IRQ_MMP2_WDT2                   (IRQ_MMP2_MISC_BASE + 11)
+#define IRQ_MMP2_CORESIGHT              (IRQ_MMP2_MISC_BASE + 12)
+#define IRQ_MMP2_COMMTX                 (IRQ_MMP2_MISC_BASE + 13)
+#define IRQ_MMP2_COMMRX                 (IRQ_MMP2_MISC_BASE + 14)
+
+/* secondary interrupt of INT #51 */
+#define IRQ_MMP2_SSP_BASE               (IRQ_MMP2_MISC_BASE + 15)
+#define IRQ_MMP2_SSP1_SRDY              (IRQ_MMP2_SSP_BASE + 0)
+#define IRQ_MMP2_SSP3_SRDY              (IRQ_MMP2_SSP_BASE + 1)
+
+#define IRQ_MMP2_MUX_END                (IRQ_MMP2_SSP_BASE + 2)
+
+#define IRQ_GPIO_START                  128
+#define IRQ_GPIO_NUM                    192
 #define IRQ_GPIO(x)                     (IRQ_GPIO_START + (x))
 
-#define NR_IRQS         (IRQ_GPIO_START + IRQ_GPIO_NUM)
+/* Board IRQ - 64 by default, increase if not enough */
+#define IRQ_BOARD_START                 (IRQ_GPIO_START + IRQ_GPIO_NUM)
+#define IRQ_BOARD_END                   (IRQ_BOARD_START + 64)
+
+#define NR_IRQS                         (IRQ_BOARD_END)
 
 #endif /* __ASM_MACH_IRQS_H */
diff --git a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
new file mode 100644
index 00000000000..9f9f8143e27
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h
@@ -0,0 +1,240 @@
+#ifndef __ASM_MACH_MFP_MMP2_H
+#define __ASM_MACH_MFP_MMP2_H
+
+#include <mach/mfp.h>
+
+#define MFP_DRIVE_VERY_SLOW     (0x0 << 13)
+#define MFP_DRIVE_SLOW          (0x2 << 13)
+#define MFP_DRIVE_MEDIUM        (0x4 << 13)
+#define MFP_DRIVE_FAST          (0x8 << 13)
+
+/* GPIO */
+
+/* DFI */
+#define GPIO108_DFI_D15         MFP_CFG(GPIO108, AF0)
+#define GPIO109_DFI_D14         MFP_CFG(GPIO109, AF0)
+#define GPIO110_DFI_D13         MFP_CFG(GPIO110, AF0)
+#define GPIO161_DFI_D12         MFP_CFG(GPIO161, AF0)
+#define GPIO162_DFI_D11         MFP_CFG(GPIO162, AF0)
+#define GPIO163_DFI_D10         MFP_CFG(GPIO163, AF0)
+#define GPIO164_DFI_D9          MFP_CFG(GPIO164, AF0)
+#define GPIO111_DFI_D8          MFP_CFG(GPIO111, AF0)
+#define GPIO104_DFI_D7          MFP_CFG(GPIO104, AF0)
+#define GPIO105_DFI_D6          MFP_CFG(GPIO105, AF0)
+#define GPIO106_DFI_D5          MFP_CFG(GPIO106, AF0)
+#define GPIO107_DFI_D4          MFP_CFG(GPIO107, AF0)
+#define GPIO165_DFI_D3          MFP_CFG(GPIO165, AF0)
+#define GPIO166_DFI_D2          MFP_CFG(GPIO166, AF0)
+#define GPIO167_DFI_D1          MFP_CFG(GPIO167, AF0)
+#define GPIO168_DFI_D0          MFP_CFG(GPIO168, AF0)
+#define GPIO143_ND_nCS0         MFP_CFG(GPIO143, AF0)
+#define GPIO144_ND_nCS1         MFP_CFG(GPIO144, AF0)
+#define GPIO147_ND_nWE          MFP_CFG(GPIO147, AF0)
+#define GPIO148_ND_nRE          MFP_CFG(GPIO148, AF0)
+#define GPIO150_ND_ALE          MFP_CFG(GPIO150, AF0)
+#define GPIO149_ND_CLE          MFP_CFG(GPIO149, AF0)
+#define GPIO112_ND_RDY0         MFP_CFG(GPIO112, AF0)
+#define GPIO160_ND_RDY1         MFP_CFG(GPIO160, AF0)
+
+/* Static Memory Controller */
+#define GPIO145_SMC_nCS0        MFP_CFG(GPIO145, AF0)
+#define GPIO146_SMC_nCS1        MFP_CFG(GPIO146, AF0)
+#define GPIO152_SMC_BE0         MFP_CFG(GPIO152, AF0)
+#define GPIO153_SMC_BE1         MFP_CFG(GPIO153, AF0)
+#define GPIO154_SMC_IRQ         MFP_CFG(GPIO154, AF0)
+#define GPIO113_SMC_RDY         MFP_CFG(GPIO113, AF0)
+#define GPIO151_SMC_SCLK        MFP_CFG(GPIO151, AF0)
+
+/* Ethernet */
+#define GPIO155_SM_ADVMUX       MFP_CFG(GPIO155, AF2)
+#define GPIO155_GPIO155         MFP_CFG(GPIO155, AF1)
+
+/* UART1 */
+#define GPIO45_UART1_RXD        MFP_CFG(GPIO45, AF1)
+#define GPIO46_UART1_TXD        MFP_CFG(GPIO46, AF1)
+#define GPIO29_UART1_RXD        MFP_CFG(GPIO29, AF1)
+#define GPIO30_UART1_TXD        MFP_CFG(GPIO30, AF1)
+#define GPIO31_UART1_CTS        MFP_CFG(GPIO31, AF1)
+#define GPIO32_UART1_RTS        MFP_CFG(GPIO32, AF1)
+
+/* UART2 */
+#define GPIO47_UART2_RXD        MFP_CFG(GPIO47, AF1)
+#define GPIO48_UART2_TXD        MFP_CFG(GPIO48, AF1)
+#define GPIO49_UART2_CTS        MFP_CFG(GPIO49, AF1)
+#define GPIO50_UART2_RTS        MFP_CFG(GPIO50, AF1)
+
+/* UART3 */
+#define GPIO51_UART3_RXD        MFP_CFG(GPIO51, AF1)
+#define GPIO52_UART3_TXD        MFP_CFG(GPIO52, AF1)
+#define GPIO53_UART3_CTS        MFP_CFG(GPIO53, AF1)
+#define GPIO54_UART3_RTS        MFP_CFG(GPIO54, AF1)
+
+/* MMC1 */
+#define GPIO124_MMC1_DAT7       MFP_CFG_DRV(GPIO124, AF1, FAST)
+#define GPIO125_MMC1_DAT6       MFP_CFG_DRV(GPIO125, AF1, FAST)
+#define GPIO129_MMC1_DAT5       MFP_CFG_DRV(GPIO129, AF1, FAST)
+#define GPIO130_MMC1_DAT4       MFP_CFG_DRV(GPIO130, AF1, FAST)
+#define GPIO131_MMC1_DAT3       MFP_CFG_DRV(GPIO131, AF1, FAST)
+#define GPIO132_MMC1_DAT2       MFP_CFG_DRV(GPIO132, AF1, FAST)
+#define GPIO133_MMC1_DAT1       MFP_CFG_DRV(GPIO133, AF1, FAST)
+#define GPIO134_MMC1_DAT0       MFP_CFG_DRV(GPIO134, AF1, FAST)
+#define GPIO136_MMC1_CMD        MFP_CFG_DRV(GPIO136, AF1, FAST)
+#define GPIO139_MMC1_CLK        MFP_CFG_DRV(GPIO139, AF1, FAST)
+#define GPIO140_MMC1_CD         MFP_CFG_DRV(GPIO140, AF1, FAST)
+#define GPIO141_MMC1_WP         MFP_CFG_DRV(GPIO141, AF1, FAST)
+
+/*MMC2*/
+#define GPIO37_MMC2_DAT3        MFP_CFG_DRV(GPIO37, AF1, FAST)
+#define GPIO38_MMC2_DAT2        MFP_CFG_DRV(GPIO38, AF1, FAST)
+#define GPIO39_MMC2_DAT1        MFP_CFG_DRV(GPIO39, AF1, FAST)
+#define GPIO40_MMC2_DAT0        MFP_CFG_DRV(GPIO40, AF1, FAST)
+#define GPIO41_MMC2_CMD         MFP_CFG_DRV(GPIO41, AF1, FAST)
+#define GPIO42_MMC2_CLK         MFP_CFG_DRV(GPIO42, AF1, FAST)
+
+/*MMC3*/
+#define GPIO165_MMC3_DAT7       MFP_CFG_DRV(GPIO165, AF2, FAST)
+#define GPIO162_MMC3_DAT6       MFP_CFG_DRV(GPIO162, AF2, FAST)
+#define GPIO166_MMC3_DAT5       MFP_CFG_DRV(GPIO166, AF2, FAST)
+#define GPIO163_MMC3_DAT4       MFP_CFG_DRV(GPIO163, AF2, FAST)
+#define GPIO167_MMC3_DAT3       MFP_CFG_DRV(GPIO167, AF2, FAST)
+#define GPIO164_MMC3_DAT2       MFP_CFG_DRV(GPIO164, AF2, FAST)
+#define GPIO168_MMC3_DAT1       MFP_CFG_DRV(GPIO168, AF2, FAST)
+#define GPIO111_MMC3_DAT0       MFP_CFG_DRV(GPIO111, AF2, FAST)
+#define GPIO112_MMC3_CMD        MFP_CFG_DRV(GPIO112, AF2, FAST)
+#define GPIO151_MMC3_CLK        MFP_CFG_DRV(GPIO151, AF2, FAST)
+
+/* LCD */
+#define GPIO74_LCD_FCLK         MFP_CFG_DRV(GPIO74, AF1, FAST)
+#define GPIO75_LCD_LCLK         MFP_CFG_DRV(GPIO75, AF1, FAST)
+#define GPIO76_LCD_PCLK         MFP_CFG_DRV(GPIO76, AF1, FAST)
+#define GPIO77_LCD_DENA         MFP_CFG_DRV(GPIO77, AF1, FAST)
+#define GPIO78_LCD_DD0          MFP_CFG_DRV(GPIO78, AF1, FAST)
+#define GPIO79_LCD_DD1          MFP_CFG_DRV(GPIO79, AF1, FAST)
+#define GPIO80_LCD_DD2          MFP_CFG_DRV(GPIO80, AF1, FAST)
+#define GPIO81_LCD_DD3          MFP_CFG_DRV(GPIO81, AF1, FAST)
+#define GPIO82_LCD_DD4          MFP_CFG_DRV(GPIO82, AF1, FAST)
+#define GPIO83_LCD_DD5          MFP_CFG_DRV(GPIO83, AF1, FAST)
+#define GPIO84_LCD_DD6          MFP_CFG_DRV(GPIO84, AF1, FAST)
+#define GPIO85_LCD_DD7          MFP_CFG_DRV(GPIO85, AF1, FAST)
+#define GPIO86_LCD_DD8          MFP_CFG_DRV(GPIO86, AF1, FAST)
+#define GPIO87_LCD_DD9          MFP_CFG_DRV(GPIO87, AF1, FAST)
+#define GPIO88_LCD_DD10         MFP_CFG_DRV(GPIO88, AF1, FAST)
+#define GPIO89_LCD_DD11         MFP_CFG_DRV(GPIO89, AF1, FAST)
+#define GPIO90_LCD_DD12         MFP_CFG_DRV(GPIO90, AF1, FAST)
+#define GPIO91_LCD_DD13         MFP_CFG_DRV(GPIO91, AF1, FAST)
+#define GPIO92_LCD_DD14         MFP_CFG_DRV(GPIO92, AF1, FAST)
+#define GPIO93_LCD_DD15         MFP_CFG_DRV(GPIO93, AF1, FAST)
+#define GPIO94_LCD_DD16         MFP_CFG_DRV(GPIO94, AF1, FAST)
+#define GPIO95_LCD_DD17         MFP_CFG_DRV(GPIO95, AF1, FAST)
+#define GPIO96_LCD_DD18         MFP_CFG_DRV(GPIO96, AF1, FAST)
+#define GPIO97_LCD_DD19         MFP_CFG_DRV(GPIO97, AF1, FAST)
+#define GPIO98_LCD_DD20         MFP_CFG_DRV(GPIO98, AF1, FAST)
+#define GPIO99_LCD_DD21         MFP_CFG_DRV(GPIO99, AF1, FAST)
+#define GPIO100_LCD_DD22        MFP_CFG_DRV(GPIO100, AF1, FAST)
+#define GPIO101_LCD_DD23        MFP_CFG_DRV(GPIO101, AF1, FAST)
+#define GPIO94_SPI_DCLK         MFP_CFG_DRV(GPIO94, AF3, FAST)
+#define GPIO95_SPI_CS0          MFP_CFG_DRV(GPIO95, AF3, FAST)
+#define GPIO96_SPI_DIN          MFP_CFG_DRV(GPIO96, AF3, FAST)
+#define GPIO97_SPI_DOUT         MFP_CFG_DRV(GPIO97, AF3, FAST)
+#define GPIO98_LCD_RST          MFP_CFG_DRV(GPIO98, AF0, FAST)
+
+#define GPIO114_MN_CLK_OUT      MFP_CFG_DRV(GPIO114, AF1, FAST)
+
+/*LCD TV path*/
+#define GPIO124_LCD_DD24        MFP_CFG_DRV(GPIO124, AF2, FAST)
+#define GPIO125_LCD_DD25        MFP_CFG_DRV(GPIO125, AF2, FAST)
+#define GPIO126_LCD_DD33        MFP_CFG_DRV(GPIO126, AF2, FAST)
+#define GPIO127_LCD_DD26        MFP_CFG_DRV(GPIO127, AF2, FAST)
+#define GPIO128_LCD_DD27        MFP_CFG_DRV(GPIO128, AF2, FAST)
+#define GPIO129_LCD_DD28        MFP_CFG_DRV(GPIO129, AF2, FAST)
+#define GPIO130_LCD_DD29        MFP_CFG_DRV(GPIO130, AF2, FAST)
+#define GPIO135_LCD_DD30        MFP_CFG_DRV(GPIO135, AF2, FAST)
+#define GPIO137_LCD_DD31        MFP_CFG_DRV(GPIO137, AF2, FAST)
+#define GPIO138_LCD_DD32        MFP_CFG_DRV(GPIO138, AF2, FAST)
+#define GPIO140_LCD_DD34        MFP_CFG_DRV(GPIO140, AF2, FAST)
+#define GPIO141_LCD_DD35        MFP_CFG_DRV(GPIO141, AF2, FAST)
+
+/* I2C */
+#define GPIO43_TWSI2_SCL        MFP_CFG_DRV(GPIO43, AF1, SLOW)
+#define GPIO44_TWSI2_SDA        MFP_CFG_DRV(GPIO44, AF1, SLOW)
+#define GPIO71_TWSI3_SCL        MFP_CFG_DRV(GPIO71, AF1, SLOW)
+#define GPIO72_TWSI3_SDA        MFP_CFG_DRV(GPIO72, AF1, SLOW)
+#define GPIO99_TWSI5_SCL        MFP_CFG_DRV(GPIO99, AF4, SLOW)
+#define GPIO100_TWSI5_SDA       MFP_CFG_DRV(GPIO100, AF4, SLOW)
+#define GPIO97_TWSI6_SCL        MFP_CFG_DRV(GPIO97, AF2, SLOW)
+#define GPIO98_TWSI6_SDA        MFP_CFG_DRV(GPIO98, AF2, SLOW)
+
+/* SSPA1 */
+#define GPIO24_I2S_SYSCLK       MFP_CFG(GPIO24, AF1)
+#define GPIO25_I2S_BITCLK       MFP_CFG(GPIO25, AF1)
+#define GPIO26_I2S_SYNC         MFP_CFG(GPIO26, AF1)
+#define GPIO27_I2S_DATA_OUT     MFP_CFG(GPIO27, AF1)
+#define GPIO28_I2S_SDATA_IN     MFP_CFG(GPIO28, AF1)
+#define GPIO114_I2S_MCLK        MFP_CFG(GPIO114, AF1)
+
+/* SSPA2 */
+#define GPIO33_SSPA2_CLK        MFP_CFG(GPIO33, AF1)
+#define GPIO34_SSPA2_FRM        MFP_CFG(GPIO34, AF1)
+#define GPIO35_SSPA2_TXD        MFP_CFG(GPIO35, AF1)
+#define GPIO36_SSPA2_RXD        MFP_CFG(GPIO36, AF1)
+
+/* Keypad */
+#define GPIO00_KP_MKIN0         MFP_CFG(GPIO0, AF1)
+#define GPIO01_KP_MKOUT0        MFP_CFG(GPIO1, AF1)
+#define GPIO02_KP_MKIN1         MFP_CFG(GPIO2, AF1)
+#define GPIO03_KP_MKOUT1        MFP_CFG(GPIO3, AF1)
+#define GPIO04_KP_MKIN2         MFP_CFG(GPIO4, AF1)
+#define GPIO05_KP_MKOUT2        MFP_CFG(GPIO5, AF1)
+#define GPIO06_KP_MKIN3         MFP_CFG(GPIO6, AF1)
+#define GPIO07_KP_MKOUT3        MFP_CFG(GPIO7, AF1)
+#define GPIO08_KP_MKIN4         MFP_CFG(GPIO8, AF1)
+#define GPIO09_KP_MKOUT4        MFP_CFG(GPIO9, AF1)
+#define GPIO10_KP_MKIN5         MFP_CFG(GPIO10, AF1)
+#define GPIO11_KP_MKOUT5        MFP_CFG(GPIO11, AF1)
+#define GPIO12_KP_MKIN6         MFP_CFG(GPIO12, AF1)
+#define GPIO13_KP_MKOUT6        MFP_CFG(GPIO13, AF1)
+#define GPIO14_KP_MKIN7         MFP_CFG(GPIO14, AF1)
+#define GPIO15_KP_MKOUT7        MFP_CFG(GPIO15, AF1)
+#define GPIO16_KP_DKIN0         MFP_CFG(GPIO16, AF1)
+#define GPIO17_KP_DKIN1         MFP_CFG(GPIO17, AF1)
+#define GPIO18_KP_DKIN2         MFP_CFG(GPIO18, AF1)
+#define GPIO19_KP_DKIN3         MFP_CFG(GPIO19, AF1)
+#define GPIO20_KP_DKIN4         MFP_CFG(GPIO20, AF1)
+#define GPIO21_KP_DKIN5         MFP_CFG(GPIO21, AF1)
+#define GPIO22_KP_DKIN6         MFP_CFG(GPIO22, AF1)
+#define GPIO23_KP_DKIN7         MFP_CFG(GPIO23, AF1)
+
+/* CAMERA */
+#define GPIO59_CCIC_IN7         MFP_CFG_DRV(GPIO59, AF1, FAST)
+#define GPIO60_CCIC_IN6         MFP_CFG_DRV(GPIO60, AF1, FAST)
+#define GPIO61_CCIC_IN5         MFP_CFG_DRV(GPIO61, AF1, FAST)
+#define GPIO62_CCIC_IN4         MFP_CFG_DRV(GPIO62, AF1, FAST)
+#define GPIO63_CCIC_IN3         MFP_CFG_DRV(GPIO63, AF1, FAST)
+#define GPIO64_CCIC_IN2         MFP_CFG_DRV(GPIO64, AF1, FAST)
+#define GPIO65_CCIC_IN1         MFP_CFG_DRV(GPIO65, AF1, FAST)
+#define GPIO66_CCIC_IN0         MFP_CFG_DRV(GPIO66, AF1, FAST)
+#define GPIO67_CAM_HSYNC        MFP_CFG_DRV(GPIO67, AF1, FAST)
+#define GPIO68_CAM_VSYNC        MFP_CFG_DRV(GPIO68, AF1, FAST)
+#define GPIO69_CAM_MCLK         MFP_CFG_DRV(GPIO69, AF1, FAST)
+#define GPIO70_CAM_PCLK         MFP_CFG_DRV(GPIO70, AF1, FAST)
+
+/* Wifi */
+#define GPIO45_GPIO45           MFP_CFG(GPIO45, AF0)
+#define GPIO46_GPIO46           MFP_CFG(GPIO46, AF0)
+#define GPIO21_GPIO21           MFP_CFG(GPIO21, AF0)
+#define GPIO22_GPIO22           MFP_CFG(GPIO22, AF0)
+#define GPIO55_GPIO55           MFP_CFG(GPIO55, AF0)
+#define GPIO56_GPIO56           MFP_CFG(GPIO56, AF0)
+#define GPIO57_GPIO57           MFP_CFG(GPIO57, AF0)
+#define GPIO58_GPIO58           MFP_CFG(GPIO58, AF0)
+
+/* Codec*/
+#define GPIO23_GPIO23           MFP_CFG(GPIO23, AF0)
+
+#define GPIO101_GPIO101         MFP_CFG(GPIO101, AF0)
+
+/* PMIC */
+#define PMIC_PMIC_INT           MFP_CFG(PMIC_INT, AF0)
+
+#endif /* __ASM_MACH_MFP_MMP2_H */
+
diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
index 3b216bf41e7..ded43c455ec 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
@@ -193,7 +193,9 @@
 #define GPIO32_CF_nCD1          MFP_CFG(GPIO32, AF3)
 #define GPIO33_CF_nCD2          MFP_CFG(GPIO33, AF3)
 
-/* UART1 */
+/* UART */
+#define GPIO88_UART2_TXD        MFP_CFG(GPIO88, AF2)
+#define GPIO89_UART2_RXD        MFP_CFG(GPIO89, AF2)
 #define GPIO107_UART1_TXD       MFP_CFG_DRV(GPIO107, AF1, FAST)
 #define GPIO107_UART1_RXD       MFP_CFG_DRV(GPIO107, AF2, FAST)
 #define GPIO108_UART1_RXD       MFP_CFG_DRV(GPIO108, AF1, FAST)
diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h
new file mode 100644
index 00000000000..459f3be9cfb
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/mmp2.h
@@ -0,0 +1,60 @@
+#ifndef __ASM_MACH_MMP2_H
+#define __ASM_MACH_MMP2_H
+
+#include <linux/i2c.h>
+#include <mach/devices.h>
+#include <plat/i2c.h>
+
+extern struct pxa_device_desc mmp2_device_uart1;
+extern struct pxa_device_desc mmp2_device_uart2;
+extern struct pxa_device_desc mmp2_device_uart3;
+extern struct pxa_device_desc mmp2_device_uart4;
+extern struct pxa_device_desc mmp2_device_twsi1;
+extern struct pxa_device_desc mmp2_device_twsi2;
+extern struct pxa_device_desc mmp2_device_twsi3;
+extern struct pxa_device_desc mmp2_device_twsi4;
+extern struct pxa_device_desc mmp2_device_twsi5;
+extern struct pxa_device_desc mmp2_device_twsi6;
+
+static inline int mmp2_add_uart(int id)
+{
+        struct pxa_device_desc *d = NULL;
+
+        switch (id) {
+        case 1: d = &mmp2_device_uart1; break;
+        case 2: d = &mmp2_device_uart2; break;
+        case 3: d = &mmp2_device_uart3; break;
+        case 4: d = &mmp2_device_uart4; break;
+        default:
+                return -EINVAL;
+        }
+
+        return pxa_register_device(d, NULL, 0);
+}
+
+static inline int mmp2_add_twsi(int id, struct i2c_pxa_platform_data *data,
+                                  struct i2c_board_info *info, unsigned size)
+{
+        struct pxa_device_desc *d = NULL;
+        int ret;
+
+        switch (id) {
+        case 0: d = &mmp2_device_twsi1; break;
+        case 1: d = &mmp2_device_twsi2; break;
+        case 2: d = &mmp2_device_twsi3; break;
+        case 3: d = &mmp2_device_twsi4; break;
+        case 4: d = &mmp2_device_twsi5; break;
+        case 5: d = &mmp2_device_twsi6; break;
+        default:
+                return -EINVAL;
+        }
+
+        ret = i2c_register_board_info(id, info, size);
+        if (ret)
+                return ret;
+
+        return pxa_register_device(d, data, sizeof(*data));
+}
+
+#endif /* __ASM_MACH_MMP2_H */
+
diff --git a/arch/arm/mach-mmp/include/mach/regs-apbc.h b/arch/arm/mach-mmp/include/mach/regs-apbc.h
index 98ccbee4bd0..712af03fd1a 100644
--- a/arch/arm/mach-mmp/include/mach/regs-apbc.h
+++ b/arch/arm/mach-mmp/include/mach/regs-apbc.h
@@ -69,6 +69,47 @@
 #define APBC_PXA910_ASFAR       APBC_REG(0x050)
 #define APBC_PXA910_ASSAR       APBC_REG(0x054)
 
+/*
+ * APB Clock register offsets for MMP2
+ */
+#define APBC_MMP2_RTC           APBC_REG(0x000)
+#define APBC_MMP2_TWSI1         APBC_REG(0x004)
+#define APBC_MMP2_TWSI2         APBC_REG(0x008)
+#define APBC_MMP2_TWSI3         APBC_REG(0x00c)
+#define APBC_MMP2_TWSI4         APBC_REG(0x010)
+#define APBC_MMP2_ONEWIRE       APBC_REG(0x014)
+#define APBC_MMP2_KPC           APBC_REG(0x018)
+#define APBC_MMP2_TB_ROTARY     APBC_REG(0x01c)
+#define APBC_MMP2_SW_JTAG       APBC_REG(0x020)
+#define APBC_MMP2_TIMERS        APBC_REG(0x024)
+#define APBC_MMP2_UART1         APBC_REG(0x02c)
+#define APBC_MMP2_UART2         APBC_REG(0x030)
+#define APBC_MMP2_UART3         APBC_REG(0x034)
+#define APBC_MMP2_GPIO          APBC_REG(0x038)
+#define APBC_MMP2_PWM0          APBC_REG(0x03c)
+#define APBC_MMP2_PWM1          APBC_REG(0x040)
+#define APBC_MMP2_PWM2          APBC_REG(0x044)
+#define APBC_MMP2_PWM3          APBC_REG(0x048)
+#define APBC_MMP2_SSP0          APBC_REG(0x04c)
+#define APBC_MMP2_SSP1          APBC_REG(0x050)
+#define APBC_MMP2_SSP2          APBC_REG(0x054)
+#define APBC_MMP2_SSP3          APBC_REG(0x058)
+#define APBC_MMP2_SSP4          APBC_REG(0x05c)
+#define APBC_MMP2_SSP5          APBC_REG(0x060)
+#define APBC_MMP2_AIB           APBC_REG(0x064)
+#define APBC_MMP2_ASFAR         APBC_REG(0x068)
+#define APBC_MMP2_ASSAR         APBC_REG(0x06c)
+#define APBC_MMP2_USIM          APBC_REG(0x070)
+#define APBC_MMP2_MPMU          APBC_REG(0x074)
+#define APBC_MMP2_IPC           APBC_REG(0x078)
+#define APBC_MMP2_TWSI5         APBC_REG(0x07c)
+#define APBC_MMP2_TWSI6         APBC_REG(0x080)
+#define APBC_MMP2_TWSI_INTSTS   APBC_REG(0x084)
+#define APBC_MMP2_UART4         APBC_REG(0x088)
+#define APBC_MMP2_RIPC          APBC_REG(0x08c)
+#define APBC_MMP2_THSENS1       APBC_REG(0x090) /* Thermal Sensor */
+#define APBC_MMP2_THSENS_INTSTS APBC_REG(0x0a4)
+
 /* Common APB clock register bit definitions */
 #define APBC_APBCLK     (1 << 0)  /* APB Bus Clock Enable */
 #define APBC_FNCLK      (1 << 1)  /* Functional Clock Enable */
diff --git a/arch/arm/mach-mmp/include/mach/regs-icu.h b/arch/arm/mach-mmp/include/mach/regs-icu.h
index e5f08723e0c..f882d91894b 100644
--- a/arch/arm/mach-mmp/include/mach/regs-icu.h
+++ b/arch/arm/mach-mmp/include/mach/regs-icu.h
@@ -17,10 +17,12 @@
 #define ICU_REG(x)      (ICU_VIRT_BASE + (x))
 
 #define ICU_INT_CONF(n)         ICU_REG((n) << 2)
+#define ICU_INT_CONF_MASK       (0xf)
+
+/************ PXA168/PXA910 (MMP) *********************/
 #define ICU_INT_CONF_AP_INT     (1 << 6)
 #define ICU_INT_CONF_CP_INT     (1 << 5)
 #define ICU_INT_CONF_IRQ        (1 << 4)
-#define ICU_INT_CONF_MASK       (0xf)
 
 #define ICU_AP_FIQ_SEL_INT_NUM  ICU_REG(0x108)  /* AP FIQ Selected Interrupt */
 #define ICU_AP_IRQ_SEL_INT_NUM  ICU_REG(0x10C)  /* AP IRQ Selected Interrupt */
@@ -28,4 +30,42 @@
 #define ICU_INT_STATUS_0        ICU_REG(0x128)  /* Interrupt Stuats 0 */
 #define ICU_INT_STATUS_1        ICU_REG(0x12C)  /* Interrupt Status 1 */
 
+/************************** MMP2 ***********************/
+
+/*
+ * IRQ0/FIQ0 is routed to SP IRQ/FIQ.
+ * IRQ1 is routed to PJ4 IRQ, and IRQ2 is routes to PJ4 FIQ.
+ */
+#define ICU_INT_ROUTE_SP_IRQ            (1 << 4)
+#define ICU_INT_ROUTE_PJ4_IRQ           (1 << 5)
+#define ICU_INT_ROUTE_PJ4_FIQ           (1 << 6)
+
+#define MMP2_ICU_PJ4_IRQ_STATUS0        ICU_REG(0x138)
+#define MMP2_ICU_PJ4_IRQ_STATUS1        ICU_REG(0x13c)
+#define MMP2_ICU_PJ4_FIQ_STATUS0        ICU_REG(0x140)
+#define MMP2_ICU_PJ4_FIQ_STATUS1        ICU_REG(0x144)
+
+#define MMP2_ICU_INT4_STATUS            ICU_REG(0x150)
+#define MMP2_ICU_INT5_STATUS            ICU_REG(0x154)
+#define MMP2_ICU_INT17_STATUS           ICU_REG(0x158)
+#define MMP2_ICU_INT35_STATUS           ICU_REG(0x15c)
+#define MMP2_ICU_INT51_STATUS           ICU_REG(0x160)
+
+#define MMP2_ICU_INT4_MASK              ICU_REG(0x168)
+#define MMP2_ICU_INT5_MASK              ICU_REG(0x16C)
+#define MMP2_ICU_INT17_MASK             ICU_REG(0x170)
+#define MMP2_ICU_INT35_MASK             ICU_REG(0x174)
+#define MMP2_ICU_INT51_MASK             ICU_REG(0x178)
+
+#define MMP2_ICU_SP_IRQ_SEL             ICU_REG(0x100)
+#define MMP2_ICU_PJ4_IRQ_SEL            ICU_REG(0x104)
+#define MMP2_ICU_PJ4_FIQ_SEL            ICU_REG(0x108)
+
+#define MMP2_ICU_INVERT                 ICU_REG(0x164)
+
+#define MMP2_ICU_INV_PMIC               (1 << 0)
+#define MMP2_ICU_INV_PERF               (1 << 1)
+#define MMP2_ICU_INV_COMMTX             (1 << 2)
+#define MMP2_ICU_INV_COMMRX             (1 << 3)
+
 #endif /* __ASM_MACH_ICU_H */
diff --git a/arch/arm/mach-mmp/include/mach/uncompress.h b/arch/arm/mach-mmp/include/mach/uncompress.h
index c93d5fa5865..85bd8a2d84b 100644
--- a/arch/arm/mach-mmp/include/mach/uncompress.h
+++ b/arch/arm/mach-mmp/include/mach/uncompress.h
@@ -8,15 +8,16 @@
 
 #include <linux/serial_reg.h>
 #include <mach/addr-map.h>
+#include <asm/mach-types.h>
 
 #define UART1_BASE      (APB_PHYS_BASE + 0x36000)
 #define UART2_BASE      (APB_PHYS_BASE + 0x17000)
 #define UART3_BASE      (APB_PHYS_BASE + 0x18000)
 
+static volatile unsigned long *UART;
+
 static inline void putc(char c)
 {
-        volatile unsigned long *UART = (unsigned long *)UART2_BASE;
-
         /* UART enabled? */
         if (!(UART[UART_IER] & UART_IER_UUE))
                 return;
@@ -34,8 +35,17 @@ static inline void flush(void)
 {
 }
 
+static inline void arch_decomp_setup(void)
+{
+        /* default to UART2 */
+        UART = (unsigned long *)UART2_BASE;
+
+        if (machine_is_avengers_lite())
+                UART = (unsigned long *)UART3_BASE;
+}
+
 /*
  * nothing to do
  */
-#define arch_decomp_setup()
+
 #define arch_decomp_wdog()
diff --git a/arch/arm/mach-mmp/irq-mmp2.c b/arch/arm/mach-mmp/irq-mmp2.c
new file mode 100644
index 00000000000..cb18221c0af
--- /dev/null
+++ b/arch/arm/mach-mmp/irq-mmp2.c
@@ -0,0 +1,154 @@
+/*
+ *  linux/arch/arm/mach-mmp/irq-mmp2.c
+ *
+ *  Generic IRQ handling, GPIO IRQ demultiplexing, etc.
+ *
+ *  Author:     Haojian Zhuang <haojian.zhuang@marvell.com>
+ *  Copyright:  Marvell International Ltd.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+
+#include <mach/regs-icu.h>
+
+#include "common.h"
+
+static void icu_mask_irq(unsigned int irq)
+{
+        uint32_t r = __raw_readl(ICU_INT_CONF(irq));
+
+        r &= ~ICU_INT_ROUTE_PJ4_IRQ;
+        __raw_writel(r, ICU_INT_CONF(irq));
+}
+
+static void icu_unmask_irq(unsigned int irq)
+{
+        uint32_t r = __raw_readl(ICU_INT_CONF(irq));
+
+        r |= ICU_INT_ROUTE_PJ4_IRQ;
+        __raw_writel(r, ICU_INT_CONF(irq));
+}
+
+static struct irq_chip icu_irq_chip = {
+        .name           = "icu_irq",
+        .mask           = icu_mask_irq,
+        .mask_ack       = icu_mask_irq,
+        .unmask         = icu_unmask_irq,
+};
+
+static void pmic_irq_ack(unsigned int irq)
+{
+        if (irq == IRQ_MMP2_PMIC)
+                mmp2_clear_pmic_int();
+}
+
+#define SECOND_IRQ_MASK(_name_, irq_base, prefix)                       \
+static void _name_##_mask_irq(unsigned int irq)                         \
+{                                                                       \
+        uint32_t r;                                                     \
+        r = __raw_readl(prefix##_MASK) | (1 << (irq - irq_base));       \
+        __raw_writel(r, prefix##_MASK);                                 \
+}
+
+#define SECOND_IRQ_UNMASK(_name_, irq_base, prefix)                     \
+static void _name_##_unmask_irq(unsigned int irq)                       \
+{                                                                       \
+        uint32_t r;                                                     \
+        r = __raw_readl(prefix##_MASK) & ~(1 << (irq - irq_base));      \
+        __raw_writel(r, prefix##_MASK);                                 \
+}
+
+#define SECOND_IRQ_DEMUX(_name_, irq_base, prefix)                      \
+static void _name_##_irq_demux(unsigned int irq, struct irq_desc *desc) \
+{                                                                       \
+        unsigned long status, mask, n;                                  \
+        mask = __raw_readl(prefix##_MASK);                              \
+        while (1) {                                                     \
+                status = __raw_readl(prefix##_STATUS) & ~mask;          \
+                if (status == 0)                                        \
+                        break;                                          \
+                n = find_first_bit(&status, BITS_PER_LONG);             \
+                while (n < BITS_PER_LONG) {                             \
+                        generic_handle_irq(irq_base + n);               \
+                        n = find_next_bit(&status, BITS_PER_LONG, n+1); \
+                }                                                       \
+        }                                                               \
+}
+
+#define SECOND_IRQ_CHIP(_name_, irq_base, prefix)                       \
+SECOND_IRQ_MASK(_name_, irq_base, prefix)                               \
+SECOND_IRQ_UNMASK(_name_, irq_base, prefix)                             \
+SECOND_IRQ_DEMUX(_name_, irq_base, prefix)                              \
+static struct irq_chip _name_##_irq_chip = {                            \
+        .name           = #_name_,                                      \
+        .mask           = _name_##_mask_irq,                            \
+        .unmask         = _name_##_unmask_irq,                          \
+}
+
+SECOND_IRQ_CHIP(pmic, IRQ_MMP2_PMIC_BASE, MMP2_ICU_INT4);
+SECOND_IRQ_CHIP(rtc,  IRQ_MMP2_RTC_BASE,  MMP2_ICU_INT5);
+SECOND_IRQ_CHIP(twsi, IRQ_MMP2_TWSI_BASE, MMP2_ICU_INT17);
+SECOND_IRQ_CHIP(misc, IRQ_MMP2_MISC_BASE, MMP2_ICU_INT35);
+SECOND_IRQ_CHIP(ssp,  IRQ_MMP2_SSP_BASE,  MMP2_ICU_INT51);
+
+static void init_mux_irq(struct irq_chip *chip, int start, int num)
+{
+        int irq;
+
+        for (irq = start; num > 0; irq++, num--) {
+                /* mask and clear the IRQ */
+                chip->mask(irq);
+                if (chip->ack)
+                        chip->ack(irq);
+
+                set_irq_chip(irq, chip);
+                set_irq_flags(irq, IRQF_VALID);
+                set_irq_handler(irq, handle_level_irq);
+        }
+}
+
+void __init mmp2_init_icu(void)
+{
+        int irq;
+
+        for (irq = 0; irq < IRQ_MMP2_MUX_BASE; irq++) {
+                icu_mask_irq(irq);
+                set_irq_chip(irq, &icu_irq_chip);
+                set_irq_flags(irq, IRQF_VALID);
+
+                switch (irq) {
+                case IRQ_MMP2_PMIC_MUX:
+                case IRQ_MMP2_RTC_MUX:
+                case IRQ_MMP2_TWSI_MUX:
+                case IRQ_MMP2_MISC_MUX:
+                case IRQ_MMP2_SSP_MUX:
+                        break;
+                default:
+                        set_irq_handler(irq, handle_level_irq);
+                        break;
+                }
+        }
+
+        /* NOTE: IRQ_MMP2_PMIC requires the PMIC MFPR register
+         * to be written to clear the interrupt
+         */
+        pmic_irq_chip.ack = pmic_irq_ack;
+
+        init_mux_irq(&pmic_irq_chip, IRQ_MMP2_PMIC_BASE, 2);
+        init_mux_irq(&rtc_irq_chip, IRQ_MMP2_RTC_BASE, 2);
+        init_mux_irq(&twsi_irq_chip, IRQ_MMP2_TWSI_BASE, 5);
+        init_mux_irq(&misc_irq_chip, IRQ_MMP2_MISC_BASE, 15);
+        init_mux_irq(&ssp_irq_chip, IRQ_MMP2_SSP_BASE, 2);
+
+        set_irq_chained_handler(IRQ_MMP2_PMIC_MUX, pmic_irq_demux);
+        set_irq_chained_handler(IRQ_MMP2_RTC_MUX, rtc_irq_demux);
+        set_irq_chained_handler(IRQ_MMP2_TWSI_MUX, twsi_irq_demux);
+        set_irq_chained_handler(IRQ_MMP2_MISC_MUX, misc_irq_demux);
+        set_irq_chained_handler(IRQ_MMP2_SSP_MUX, ssp_irq_demux);
+}
diff --git a/arch/arm/mach-mmp/irq.c b/arch/arm/mach-mmp/irq-pxa168.c
index 52ff2f065eb..52ff2f065eb 100644
--- a/arch/arm/mach-mmp/irq.c
+++ b/arch/arm/mach-mmp/irq-pxa168.c
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c
new file mode 100644
index 00000000000..cfd4d66ef80
--- /dev/null
+++ b/arch/arm/mach-mmp/jasper.c
@@ -0,0 +1,80 @@
+/*
+ *  linux/arch/arm/mach-mmp/jasper.c
+ *
+ *  Support for the Marvell Jasper Development Platform.
+ *
+ *  Copyright (C) 2009-2010 Marvell International Ltd.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  publishhed by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <mach/addr-map.h>
+#include <mach/mfp-mmp2.h>
+#include <mach/mmp2.h>
+
+#include "common.h"
+
+static unsigned long jasper_pin_config[] __initdata = {
+        /* UART1 */
+        GPIO29_UART1_RXD,
+        GPIO30_UART1_TXD,
+
+        /* UART3 */
+        GPIO51_UART3_RXD,
+        GPIO52_UART3_TXD,
+
+        /* DFI */
+        GPIO168_DFI_D0,
+        GPIO167_DFI_D1,
+        GPIO166_DFI_D2,
+        GPIO165_DFI_D3,
+        GPIO107_DFI_D4,
+        GPIO106_DFI_D5,
+        GPIO105_DFI_D6,
+        GPIO104_DFI_D7,
+        GPIO111_DFI_D8,
+        GPIO164_DFI_D9,
+        GPIO163_DFI_D10,
+        GPIO162_DFI_D11,
+        GPIO161_DFI_D12,
+        GPIO110_DFI_D13,
+        GPIO109_DFI_D14,
+        GPIO108_DFI_D15,
+        GPIO143_ND_nCS0,
+        GPIO144_ND_nCS1,
+        GPIO147_ND_nWE,
+        GPIO148_ND_nRE,
+        GPIO150_ND_ALE,
+        GPIO149_ND_CLE,
+        GPIO112_ND_RDY0,
+        GPIO160_ND_RDY1,
+};
+
+static void __init jasper_init(void)
+{
+        mfp_config(ARRAY_AND_SIZE(jasper_pin_config));
+
+        /* on-chip devices */
+        mmp2_add_uart(1);
+        mmp2_add_uart(3);
+}
+
+MACHINE_START(MARVELL_JASPER, "Jasper Development Platform")
+        .phys_io        = APB_PHYS_BASE,
+        .boot_params    = 0x00000100,
+        .io_pg_offst    = (APB_VIRT_BASE >> 18) & 0xfffc,
+        .map_io         = pxa_map_io,
+        .init_irq       = mmp2_init_irq,
+        .timer          = &mmp2_timer,
+        .init_machine   = jasper_init,
+MACHINE_END
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
new file mode 100644
index 00000000000..72eb9daeea9
--- /dev/null
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -0,0 +1,123 @@
+/*
+ * linux/arch/arm/mach-mmp/mmp2.c
+ *
+ * code name MMP2
+ *
+ * Copyright (C) 2009 Marvell International Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+
+#include <mach/addr-map.h>
+#include <mach/regs-apbc.h>
+#include <mach/regs-apmu.h>
+#include <mach/cputype.h>
+#include <mach/irqs.h>
+#include <mach/mfp.h>
+#include <mach/gpio.h>
+#include <mach/devices.h>
+
+#include "common.h"
+#include "clock.h"
+
+#define MFPR_VIRT_BASE  (APB_VIRT_BASE + 0x1e000)
+
+#define APMASK(i)       (GPIO_REGS_VIRT + BANK_OFF(i) + 0x9c)
+
+static struct mfp_addr_map mmp2_addr_map[] __initdata = {
+        MFP_ADDR(PMIC_INT, 0x2c4),
+
+        MFP_ADDR_END,
+};
+
+void mmp2_clear_pmic_int(void)
+{
+        unsigned long mfpr_pmic, data;
+
+        mfpr_pmic = APB_VIRT_BASE + 0x1e000 + 0x2c4;
+        data = __raw_readl(mfpr_pmic);
+        __raw_writel(data | (1 << 6), mfpr_pmic);
+        __raw_writel(data, mfpr_pmic);
+}
+
+static void __init mmp2_init_gpio(void)
+{
+        int i;
+
+        /* enable GPIO clock */
+        __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_MMP2_GPIO);
+
+        /* unmask GPIO edge detection for all 6 banks -- APMASKx */
+        for (i = 0; i < 6; i++)
+                __raw_writel(0xffffffff, APMASK(i));
+
+        pxa_init_gpio(IRQ_MMP2_GPIO, 0, 167, NULL);
+}
+
+void __init mmp2_init_irq(void)
+{
+        mmp2_init_icu();
+        mmp2_init_gpio();
+}
+
+/* APB peripheral clocks */
+static APBC_CLK(uart1, MMP2_UART1, 1, 26000000);
+static APBC_CLK(uart2, MMP2_UART2, 1, 26000000);
+static APBC_CLK(uart3, MMP2_UART3, 1, 26000000);
+static APBC_CLK(uart4, MMP2_UART4, 1, 26000000);
+static APBC_CLK(twsi1, MMP2_TWSI1, 0, 26000000);
+static APBC_CLK(twsi2, MMP2_TWSI2, 0, 26000000);
+static APBC_CLK(twsi3, MMP2_TWSI3, 0, 26000000);
+static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000);
+static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000);
+static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000);
+static APBC_CLK(rtc, MMP2_RTC, 0, 32768);
+
+static APMU_CLK(nand, NAND, 0xbf, 100000000);
+
+static struct clk_lookup mmp2_clkregs[] = {
+        INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
+        INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
+        INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL),
+        INIT_CLKREG(&clk_uart4, "pxa2xx-uart.3", NULL),
+        INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.0", NULL),
+        INIT_CLKREG(&clk_twsi2, "pxa2xx-i2c.1", NULL),
+        INIT_CLKREG(&clk_twsi3, "pxa2xx-i2c.2", NULL),
+        INIT_CLKREG(&clk_twsi4, "pxa2xx-i2c.3", NULL),
+        INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL),
+        INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL),
+        INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
+};
+
+static int __init mmp2_init(void)
+{
+        if (cpu_is_mmp2()) {
+                mfp_init_base(MFPR_VIRT_BASE);
+                mfp_init_addr(mmp2_addr_map);
+                clks_register(ARRAY_AND_SIZE(mmp2_clkregs));
+        }
+
+        return 0;
+}
+postcore_initcall(mmp2_init);
+
+/* on-chip devices */
+MMP2_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4030000, 0x30, 4, 5);
+MMP2_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4017000, 0x30, 20, 21);
+MMP2_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4018000, 0x30, 22, 23);
+MMP2_DEVICE(uart4, "pxa2xx-uart", 3, UART4, 0xd4016000, 0x30, 18, 19);
+MMP2_DEVICE(twsi1, "pxa2xx-i2c", 0, TWSI1, 0xd4011000, 0x70);
+MMP2_DEVICE(twsi2, "pxa2xx-i2c", 1, TWSI2, 0xd4031000, 0x70);
+MMP2_DEVICE(twsi3, "pxa2xx-i2c", 2, TWSI3, 0xd4032000, 0x70);
+MMP2_DEVICE(twsi4, "pxa2xx-i2c", 3, TWSI4, 0xd4033000, 0x70);
+MMP2_DEVICE(twsi5, "pxa2xx-i2c", 4, TWSI5, 0xd4033800, 0x70);
+MMP2_DEVICE(twsi6, "pxa2xx-i2c", 5, TWSI6, 0xd4034000, 0x70);
+MMP2_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x100, 28, 29);
+
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index a8400bb891e..cf75694e968 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -30,7 +30,10 @@
 
 #include <mach/addr-map.h>
 #include <mach/regs-timers.h>
+#include <mach/regs-apbc.h>
 #include <mach/irqs.h>
+#include <mach/cputype.h>
+#include <asm/mach/time.h>
 
 #include "clock.h"
 
@@ -158,7 +161,7 @@ static void __init timer_config(void)
 
         __raw_writel(cer & ~0x1, TIMERS_VIRT_BASE + TMR_CER); /* disable */
 
-        ccr &= TMR_CCR_CS_0(0x3);
+        ccr &= (cpu_is_mmp2()) ? TMR_CCR_CS_0(0) : TMR_CCR_CS_0(3);
         __raw_writel(ccr, TIMERS_VIRT_BASE + TMR_CCR);
 
         /* free-running mode */
@@ -197,3 +200,24 @@ void __init timer_init(int irq)
         clocksource_register(&cksrc);
         clockevents_register_device(&ckevt);
 }
+
+static void __init mmp2_timer_init(void)
+{
+        unsigned long clk_rst;
+
+        __raw_writel(APBC_APBCLK | APBC_RST, APBC_MMP2_TIMERS);
+
+        /*
+         * enable bus/functional clock, enable 6.5MHz (divider 4),
+         * release reset
+         */
+        clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1);
+        __raw_writel(clk_rst, APBC_MMP2_TIMERS);
+
+        timer_init(IRQ_MMP2_TIMER1);
+}
+
+struct sys_timer mmp2_timer = {
+        .init   = mmp2_timer_init,
+};
+
diff --git a/arch/arm/mach-mv78xx0/Kconfig b/arch/arm/mach-mv78xx0/Kconfig
index 6fbe68fe441..f2d309d0619 100644
--- a/arch/arm/mach-mv78xx0/Kconfig
+++ b/arch/arm/mach-mv78xx0/Kconfig
@@ -14,6 +14,12 @@ config MACH_RD78X00_MASA
           Say 'Y' here if you want your kernel to support the
           Marvell RD-78x00-mASA Reference Design.
 
+config MACH_TERASTATION_WXL
+        bool "Buffalo WLX (Terastation Duo) NAS"
+        help
+          Say 'Y' here if you want your kernel to support the
+          Buffalo WXL Nas.
+
 endmenu
 
 endif
diff --git a/arch/arm/mach-mv78xx0/Makefile b/arch/arm/mach-mv78xx0/Makefile
index da628b7f3bb..67a13f9bfe6 100644
--- a/arch/arm/mach-mv78xx0/Makefile
+++ b/arch/arm/mach-mv78xx0/Makefile
@@ -1,3 +1,4 @@
-obj-y                           += common.o addr-map.o irq.o pcie.o
+obj-y                           += common.o addr-map.o mpp.o irq.o pcie.o
 obj-$(CONFIG_MACH_DB78X00_BP)   += db78x00-bp-setup.o
 obj-$(CONFIG_MACH_RD78X00_MASA) += rd78x00-masa-setup.o
+obj-$(CONFIG_MACH_TERASTATION_WXL) += buffalo-wxl-setup.o
diff --git a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
new file mode 100644
index 00000000000..61e5e583603
--- /dev/null
+++ b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
@@ -0,0 +1,155 @@
+/*
+ * arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
+ *
+ * Buffalo WXL (Terastation Duo) Setup routines
+ *
+ * sebastien requiem <sebastien@requiem.fr>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/ata_platform.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/ethtool.h>
+#include <linux/i2c.h>
+#include <mach/mv78xx0.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include "common.h"
+#include "mpp.h"
+
+
+/* This arch has 2 Giga Ethernet */
+
+static struct mv643xx_eth_platform_data db78x00_ge00_data = {
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(0),
+};
+
+static struct mv643xx_eth_platform_data db78x00_ge01_data = {
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(8),
+};
+
+
+/* 2 SATA controller supporting HotPlug */
+
+static struct mv_sata_platform_data db78x00_sata_data = {
+        .n_ports        = 2,
+};
+
+static struct i2c_board_info __initdata db78x00_i2c_rtc = {
+        I2C_BOARD_INFO("ds1338", 0x68),
+};
+
+
+static unsigned int wxl_mpp_config[] __initdata = {
+        MPP0_GE1_TXCLK,
+        MPP1_GE1_TXCTL,
+        MPP2_GE1_RXCTL,
+        MPP3_GE1_RXCLK,
+        MPP4_GE1_TXD0,
+        MPP5_GE1_TXD1,
+        MPP6_GE1_TXD2,
+        MPP7_GE1_TXD3,
+        MPP8_GE1_RXD0,
+        MPP9_GE1_RXD1,
+        MPP10_GE1_RXD2,
+        MPP11_GE1_RXD3,
+        MPP12_GPIO,
+        MPP13_SYSRST_OUTn,
+        MPP14_SATA1_ACTn,
+        MPP15_SATA0_ACTn,
+        MPP16_GPIO,
+        MPP17_GPIO,
+        MPP18_GPIO,
+        MPP19_GPIO,
+        MPP20_GPIO,
+        MPP21_GPIO,
+        MPP22_GPIO,
+        MPP23_GPIO,
+        MPP24_UA2_TXD,
+        MPP25_UA2_RXD,
+        MPP26_UA2_CTSn,
+        MPP27_UA2_RTSn,
+        MPP28_GPIO,
+        MPP29_SYSRST_OUTn,
+        MPP30_GPIO,
+        MPP31_GPIO,
+        MPP32_GPIO,
+        MPP33_GPIO,
+        MPP34_GPIO,
+        MPP35_GPIO,
+        MPP36_GPIO,
+        MPP37_GPIO,
+        MPP38_GPIO,
+        MPP39_GPIO,
+        MPP40_UNUSED,
+        MPP41_UNUSED,
+        MPP42_UNUSED,
+        MPP43_UNUSED,
+        MPP44_UNUSED,
+        MPP45_UNUSED,
+        MPP46_UNUSED,
+        MPP47_UNUSED,
+        MPP48_SATA1_ACTn,
+        MPP49_SATA0_ACTn,
+        0
+};
+
+
+static void __init wxl_init(void)
+{
+        /*
+         * Basic MV78xx0 setup. Needs to be called early.
+         */
+        mv78xx0_init();
+        mv78xx0_mpp_conf(wxl_mpp_config);
+
+        /*
+         * Partition on-chip peripherals between the two CPU cores.
+         */
+        mv78xx0_ehci0_init();
+        mv78xx0_ehci1_init();
+        mv78xx0_ehci2_init();
+        mv78xx0_ge00_init(&db78x00_ge00_data);
+        mv78xx0_ge01_init(&db78x00_ge01_data);
+        mv78xx0_sata_init(&db78x00_sata_data);
+        mv78xx0_uart0_init();
+        mv78xx0_uart1_init();
+        mv78xx0_uart2_init();
+        mv78xx0_uart3_init();
+        mv78xx0_i2c_init();
+        i2c_register_board_info(0, &db78x00_i2c_rtc, 1);
+}
+
+static int __init wxl_pci_init(void)
+{
+        if (machine_is_terastation_wxl()) {
+                /*
+                 * Assign the x16 PCIe slot on the board to CPU core
+                 * #0, and let CPU core #1 have the four x1 slots.
+                 */
+                if (mv78xx0_core_index() == 0)
+                        mv78xx0_pcie_init(0, 1);
+                else
+                        mv78xx0_pcie_init(1, 0);
+        }
+
+        return 0;
+}
+subsys_initcall(wxl_pci_init);
+
+MACHINE_START(TERASTATION_WXL, "Buffalo Nas WXL")
+        /* Maintainer: Sebastien Requiem <sebastien@requiem.fr> */
+        .phys_io        = MV78XX0_REGS_PHYS_BASE,
+        .io_pg_offst    = ((MV78XX0_REGS_VIRT_BASE) >> 18) & 0xfffc,
+        .boot_params    = 0x00000100,
+        .init_machine   = wxl_init,
+        .map_io         = mv78xx0_map_io,
+        .init_irq       = mv78xx0_init_irq,
+        .timer          = &mv78xx0_timer,
+MACHINE_END
diff --git a/arch/arm/mach-mv78xx0/mpp.c b/arch/arm/mach-mv78xx0/mpp.c
new file mode 100644
index 00000000000..354ac514eb8
--- /dev/null
+++ b/arch/arm/mach-mv78xx0/mpp.c
@@ -0,0 +1,96 @@
+/*
+ * arch/arm/mach-mv78x00/mpp.c
+ *
+ * MPP functions for Marvell MV78x00 SoCs
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/mbus.h>
+#include <linux/io.h>
+#include <asm/gpio.h>
+#include <mach/hardware.h>
+#include "common.h"
+#include "mpp.h"
+
+static unsigned int __init mv78xx0_variant(void)
+{
+        u32 dev, rev;
+
+        mv78xx0_pcie_id(&dev, &rev);
+
+        if (dev == MV78100_DEV_ID && rev >= MV78100_REV_A0)
+                return MPP_78100_A0_MASK;
+
+        printk(KERN_ERR "MPP setup: unknown mv78x00 variant "
+                        "(dev %#x rev %#x)\n", dev, rev);
+        return 0;
+}
+
+#define MPP_CTRL(i)     (DEV_BUS_VIRT_BASE + (i) * 4)
+#define MPP_NR_REGS     (1 + MPP_MAX/8)
+
+void __init mv78xx0_mpp_conf(unsigned int *mpp_list)
+{
+        u32 mpp_ctrl[MPP_NR_REGS];
+        unsigned int variant_mask;
+        int i;
+
+        variant_mask = mv78xx0_variant();
+        if (!variant_mask)
+                return;
+
+        /* Initialize gpiolib. */
+        orion_gpio_init();
+
+        printk(KERN_DEBUG "initial MPP regs:");
+        for (i = 0; i < MPP_NR_REGS; i++) {
+                mpp_ctrl[i] = readl(MPP_CTRL(i));
+                printk(" %08x", mpp_ctrl[i]);
+        }
+        printk("\n");
+
+        while (*mpp_list) {
+                unsigned int num = MPP_NUM(*mpp_list);
+                unsigned int sel = MPP_SEL(*mpp_list);
+                int shift, gpio_mode;
+
+                if (num > MPP_MAX) {
+                        printk(KERN_ERR "mv78xx0_mpp_conf: invalid MPP "
+                                        "number (%u)\n", num);
+                        continue;
+                }
+                if (!(*mpp_list & variant_mask)) {
+                        printk(KERN_WARNING
+                                        "mv78xx0_mpp_conf: requested MPP%u config "
+                                        "unavailable on this hardware\n", num);
+                        continue;
+                }
+
+                shift = (num & 7) << 2;
+                mpp_ctrl[num / 8] &= ~(0xf << shift);
+                mpp_ctrl[num / 8] |= sel << shift;
+
+                gpio_mode = 0;
+                if (*mpp_list & MPP_INPUT_MASK)
+                        gpio_mode |= GPIO_INPUT_OK;
+                if (*mpp_list & MPP_OUTPUT_MASK)
+                        gpio_mode |= GPIO_OUTPUT_OK;
+                if (sel != 0)
+                        gpio_mode = 0;
+                orion_gpio_set_valid(num, gpio_mode);
+
+                mpp_list++;
+        }
+
+        printk(KERN_DEBUG "  final MPP regs:");
+        for (i = 0; i < MPP_NR_REGS; i++) {
+                writel(mpp_ctrl[i], MPP_CTRL(i));
+                printk(" %08x", mpp_ctrl[i]);
+        }
+        printk("\n");
+}
diff --git a/arch/arm/mach-mv78xx0/mpp.h b/arch/arm/mach-mv78xx0/mpp.h
new file mode 100644
index 00000000000..80840b781ea
--- /dev/null
+++ b/arch/arm/mach-mv78xx0/mpp.h
@@ -0,0 +1,347 @@
+/*
+ * linux/arch/arm/mach-mv78xx0/mpp.h -- Multi Purpose Pins
+ *
+ *
+ * sebastien requiem <sebastien@requiem.fr>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __MV78X00_MPP_H
+#define __MV78X00_MPP_H
+
+#define MPP(_num, _sel, _in, _out, _78100_A0) (\
+    /* MPP number */        ((_num) & 0xff) | \
+    /* MPP select value */        (((_sel) & 0xf) << 8) | \
+    /* may be input signal */    ((!!(_in)) << 12) | \
+    /* may be output signal */    ((!!(_out)) << 13) | \
+    /* available on A0 */    ((!!(_78100_A0)) << 14))
+
+#define MPP_NUM(x)    ((x) & 0xff)
+#define MPP_SEL(x)    (((x) >> 8) & 0xf)
+
+                /*   num sel  i  o  78100_A0  */
+
+#define MPP_INPUT_MASK        MPP(0, 0x0, 1, 0, 0)
+#define MPP_OUTPUT_MASK        MPP(0, 0x0, 0, 1, 0)
+
+#define MPP_78100_A0_MASK    MPP(0, 0x0, 0, 0, 1)
+
+#define MPP0_GPIO        MPP(0, 0x0, 1, 1, 1)
+#define MPP0_GE0_COL        MPP(0, 0x1, 1, 0, 1)
+#define MPP0_GE1_TXCLK        MPP(0, 0x2, 0, 1, 1)
+#define MPP0_UNUSED        MPP(0, 0x3, 0, 0, 1)
+
+#define MPP1_GPIO        MPP(1, 0x0, 1, 1, 1)
+#define MPP1_GE0_RXERR        MPP(1, 0x1, 1, 0, 1)
+#define MPP1_GE1_TXCTL        MPP(1, 0x2, 0, 1, 1)
+#define MPP1_UNUSED        MPP(1, 0x3, 0, 0, 1)
+
+#define MPP2_GPIO        MPP(2, 0x0, 1, 1, 1)
+#define MPP2_GE0_CRS        MPP(2, 0x1, 1, 0, 1)
+#define MPP2_GE1_RXCTL        MPP(2, 0x2, 1, 0, 1)
+#define MPP2_UNUSED        MPP(2, 0x3, 0, 0, 1)
+
+#define MPP3_GPIO        MPP(3, 0x0, 1, 1, 1)
+#define MPP3_GE0_TXERR        MPP(3, 0x1, 0, 1, 1)
+#define MPP3_GE1_RXCLK        MPP(3, 0x2, 1, 0, 1)
+#define MPP3_UNUSED        MPP(3, 0x3, 0, 0, 1)
+
+#define MPP4_GPIO        MPP(4, 0x0, 1, 1, 1)
+#define MPP4_GE0_TXD4        MPP(4, 0x1, 0, 1, 1)
+#define MPP4_GE1_TXD0        MPP(4, 0x2, 0, 1, 1)
+#define MPP4_UNUSED        MPP(4, 0x3, 0, 0, 1)
+
+#define MPP5_GPIO        MPP(5, 0x0, 1, 1, 1)
+#define MPP5_GE0_TXD5        MPP(5, 0x1, 0, 1, 1)
+#define MPP5_GE1_TXD1        MPP(5, 0x2, 0, 1, 1)
+#define MPP5_UNUSED        MPP(5, 0x3, 0, 0, 1)
+
+#define MPP6_GPIO        MPP(6, 0x0, 1, 1, 1)
+#define MPP6_GE0_TXD6        MPP(6, 0x1, 0, 1, 1)
+#define MPP6_GE1_TXD2        MPP(6, 0x2, 0, 1, 1)
+#define MPP6_UNUSED        MPP(6, 0x3, 0, 0, 1)
+
+#define MPP7_GPIO        MPP(7, 0x0, 1, 1, 1)
+#define MPP7_GE0_TXD7        MPP(7, 0x1, 0, 1, 1)
+#define MPP7_GE1_TXD3        MPP(7, 0x2, 0, 1, 1)
+#define MPP7_UNUSED        MPP(7, 0x3, 0, 0, 1)
+
+#define MPP8_GPIO        MPP(8, 0x0, 1, 1, 1)
+#define MPP8_GE0_RXD4        MPP(8, 0x1, 1, 0, 1)
+#define MPP8_GE1_RXD0        MPP(8, 0x2, 1, 0, 1)
+#define MPP8_UNUSED        MPP(8, 0x3, 0, 0, 1)
+
+#define MPP9_GPIO        MPP(9, 0x0, 1, 1, 1)
+#define MPP9_GE0_RXD5        MPP(9, 0x1, 1, 0, 1)
+#define MPP9_GE1_RXD1        MPP(9, 0x2, 1, 0, 1)
+#define MPP9_UNUSED        MPP(9, 0x3, 0, 0, 1)
+
+#define MPP10_GPIO        MPP(10, 0x0, 1, 1, 1)
+#define MPP10_GE0_RXD6        MPP(10, 0x1, 1, 0, 1)
+#define MPP10_GE1_RXD2        MPP(10, 0x2, 1, 0, 1)
+#define MPP10_UNUSED        MPP(10, 0x3, 0, 0, 1)
+
+#define MPP11_GPIO        MPP(11, 0x0, 1, 1, 1)
+#define MPP11_GE0_RXD7        MPP(11, 0x1, 1, 0, 1)
+#define MPP11_GE1_RXD3        MPP(11, 0x2, 1, 0, 1)
+#define MPP11_UNUSED        MPP(11, 0x3, 0, 0, 1)
+
+#define MPP12_GPIO        MPP(12, 0x0, 1, 1, 1)
+#define MPP12_M_BB        MPP(12, 0x3, 1, 0, 1)
+#define MPP12_UA0_CTSn        MPP(12, 0x4, 1, 0, 1)
+#define MPP12_NAND_FLASH_REn0    MPP(12, 0x5, 0, 1, 1)
+#define MPP12_TDM0_SCSn        MPP(12, 0X6, 0, 1, 1)
+#define MPP12_UNUSED        MPP(12, 0x1, 0, 0, 1)
+
+#define MPP13_GPIO        MPP(13, 0x0, 1, 1, 1)
+#define MPP13_SYSRST_OUTn    MPP(13, 0x3, 0, 1, 1)
+#define MPP13_UA0_RTSn        MPP(13, 0x4, 0, 1, 1)
+#define MPP13_NAN_FLASH_WEn0    MPP(13, 0x5, 0, 1, 1)
+#define MPP13_TDM_SCLK        MPP(13, 0x6, 0, 1, 1)
+#define MPP13_UNUSED        MPP(13, 0x1, 0, 0, 1)
+
+#define MPP14_GPIO        MPP(14, 0x0, 1, 1, 1)
+#define MPP14_SATA1_ACTn    MPP(14, 0x3, 0, 1, 1)
+#define MPP14_UA1_CTSn        MPP(14, 0x4, 1, 0, 1)
+#define MPP14_NAND_FLASH_REn1    MPP(14, 0x5, 0, 1, 1)
+#define MPP14_TDM_SMOSI        MPP(14, 0x6, 0, 1, 1)
+#define MPP14_UNUSED        MPP(14, 0x1, 0, 0, 1)
+
+#define MPP15_GPIO        MPP(15, 0x0, 1, 1, 1)
+#define MPP15_SATA0_ACTn    MPP(15, 0x3, 0, 1, 1)
+#define MPP15_UA1_RTSn        MPP(15, 0x4, 0, 1, 1)
+#define MPP15_NAND_FLASH_WEn1    MPP(15, 0x5, 0, 1, 1)
+#define MPP15_TDM_SMISO        MPP(15, 0x6, 1, 0, 1)
+#define MPP15_UNUSED        MPP(15, 0x1, 0, 0, 1)
+
+#define MPP16_GPIO        MPP(16, 0x0, 1, 1, 1)
+#define MPP16_SATA1_PRESENTn    MPP(16, 0x3, 0, 1, 1)
+#define MPP16_UA2_TXD        MPP(16, 0x4, 0, 1, 1)
+#define MPP16_NAND_FLASH_REn3    MPP(16, 0x5, 0, 1, 1)
+#define MPP16_TDM_INTn        MPP(16, 0x6, 1, 0, 1)
+#define MPP16_UNUSED        MPP(16, 0x1, 0, 0, 1)
+
+
+#define MPP17_GPIO        MPP(17, 0x0, 1, 1, 1)
+#define MPP17_SATA0_PRESENTn    MPP(17, 0x3, 0, 1, 1)
+#define MPP17_UA2_RXD        MPP(17, 0x4, 1, 0, 1)
+#define MPP17_NAND_FLASH_WEn3    MPP(17, 0x5, 0, 1, 1)
+#define MPP17_TDM_RSTn        MPP(17, 0x6, 0, 1, 1)
+#define MPP17_UNUSED        MPP(17, 0x1, 0, 0, 1)
+
+
+#define MPP18_GPIO        MPP(18, 0x0, 1, 1, 1)
+#define MPP18_UA0_CTSn        MPP(18, 0x4, 1, 0, 1)
+#define MPP18_BOOT_FLASH_REn    MPP(18, 0x5, 0, 1, 1)
+#define MPP18_UNUSED        MPP(18, 0x1, 0, 0, 1)
+
+
+
+#define MPP19_GPIO        MPP(19, 0x0, 1, 1, 1)
+#define MPP19_UA0_CTSn        MPP(19, 0x4, 0, 1, 1)
+#define MPP19_BOOT_FLASH_WEn    MPP(19, 0x5, 0, 1, 1)
+#define MPP19_UNUSED        MPP(19, 0x1, 0, 0, 1)
+
+
+#define MPP20_GPIO        MPP(20, 0x0, 1, 1, 1)
+#define MPP20_UA1_CTSs        MPP(20, 0x4, 1, 0, 1)
+#define MPP20_TDM_PCLK        MPP(20, 0x6, 1, 1, 0)
+#define MPP20_UNUSED        MPP(20, 0x1, 0, 0, 1)
+
+
+
+#define MPP21_GPIO        MPP(21, 0x0, 1, 1, 1)
+#define MPP21_UA1_CTSs        MPP(21, 0x4, 0, 1, 1)
+#define MPP21_TDM_FSYNC        MPP(21, 0x6, 1, 1, 0)
+#define MPP21_UNUSED        MPP(21, 0x1, 0, 0, 1)
+
+
+
+#define MPP22_GPIO        MPP(22, 0x0, 1, 1, 1)
+#define MPP22_UA3_TDX        MPP(22, 0x4, 0, 1, 1)
+#define MPP22_NAND_FLASH_REn2    MPP(22, 0x5, 0, 1, 1)
+#define MPP22_TDM_DRX        MPP(22, 0x6, 1, 0, 1)
+#define MPP22_UNUSED        MPP(22, 0x1, 0, 0, 1)
+
+
+
+#define MPP23_GPIO        MPP(23, 0x0, 1, 1, 1)
+#define MPP23_UA3_RDX        MPP(23, 0x4, 1, 0, 1)
+#define MPP23_NAND_FLASH_WEn2    MPP(23, 0x5, 0, 1, 1)
+#define MPP23_TDM_DTX        MPP(23, 0x6, 0, 1, 1)
+#define MPP23_UNUSED        MPP(23, 0x1, 0, 0, 1)
+
+
+#define MPP24_GPIO        MPP(24, 0x0, 1, 1, 1)
+#define MPP24_UA2_TXD        MPP(24, 0x4, 0, 1, 1)
+#define MPP24_TDM_INTn        MPP(24, 0x6, 1, 0, 1)
+#define MPP24_UNUSED        MPP(24, 0x1, 0, 0, 1)
+
+
+#define MPP25_GPIO        MPP(25, 0x0, 1, 1, 1)
+#define MPP25_UA2_RXD        MPP(25, 0x4, 1, 0, 1)
+#define MPP25_TDM_RSTn        MPP(25, 0x6, 0, 1, 1)
+#define MPP25_UNUSED        MPP(25, 0x1, 0, 0, 1)
+
+
+#define MPP26_GPIO        MPP(26, 0x0, 1, 1, 1)
+#define MPP26_UA2_CTSn        MPP(26, 0x4, 1, 0, 1)
+#define MPP26_TDM_PCLK        MPP(26, 0x6, 1, 1, 1)
+#define MPP26_UNUSED        MPP(26, 0x1, 0, 0, 1)
+
+
+#define MPP27_GPIO        MPP(27, 0x0, 1, 1, 1)
+#define MPP27_UA2_RTSn        MPP(27, 0x4, 0, 1, 1)
+#define MPP27_TDM_FSYNC        MPP(27, 0x6, 1, 1, 1)
+#define MPP27_UNUSED        MPP(27, 0x1, 0, 0, 1)
+
+
+#define MPP28_GPIO        MPP(28, 0x0, 1, 1, 1)
+#define MPP28_UA3_TXD        MPP(28, 0x4, 0, 1, 1)
+#define MPP28_TDM_DRX        MPP(28, 0x6, 1, 0, 1)
+#define MPP28_UNUSED        MPP(28, 0x1, 0, 0, 1)
+
+#define MPP29_GPIO        MPP(29, 0x0, 1, 1, 1)
+#define MPP29_UA3_RXD        MPP(29, 0x4, 1, 0, 1)
+#define MPP29_SYSRST_OUTn    MPP(29, 0x5, 0, 1, 1)
+#define MPP29_TDM_DTX        MPP(29, 0x6, 0, 1, 1)
+#define MPP29_UNUSED        MPP(29, 0x1, 0, 0, 1)
+
+#define MPP30_GPIO        MPP(30, 0x0, 1, 1, 1)
+#define MPP30_UA3_CTSn        MPP(30, 0x4, 1, 0, 1)
+#define MPP30_UNUSED        MPP(30, 0x1, 0, 0, 1)
+
+#define MPP31_GPIO        MPP(31, 0x0, 1, 1, 1)
+#define MPP31_UA3_RTSn        MPP(31, 0x4, 0, 1, 1)
+#define MPP31_TDM1_SCSn        MPP(31, 0x6, 0, 1, 1)
+#define MPP31_UNUSED        MPP(31, 0x1, 0, 0, 1)
+
+
+#define MPP32_GPIO        MPP(32, 0x1, 1, 1, 1)
+#define MPP32_UA3_TDX        MPP(32, 0x4, 0, 1, 1)
+#define MPP32_SYSRST_OUTn    MPP(32, 0x5, 0, 1, 1)
+#define MPP32_TDM0_RXQ        MPP(32, 0x6, 0, 1, 1)
+#define MPP32_UNUSED        MPP(32, 0x3, 0, 0, 1)
+
+
+#define MPP33_GPIO        MPP(33, 0x1, 1, 1, 1)
+#define MPP33_UA3_RDX        MPP(33, 0x4, 1, 0, 1)
+#define MPP33_TDM0_TXQ        MPP(33, 0x6, 0, 1, 1)
+#define MPP33_UNUSED        MPP(33, 0x3, 0, 0, 1)
+
+
+
+#define MPP34_GPIO        MPP(34, 0x1, 1, 1, 1)
+#define MPP34_UA2_TDX        MPP(34, 0x4, 0, 1, 1)
+#define MPP34_TDM1_RXQ        MPP(34, 0x6, 0, 1, 1)
+#define MPP34_UNUSED        MPP(34, 0x3, 0, 0, 1)
+
+
+
+#define MPP35_GPIO        MPP(35, 0x1, 1, 1, 1)
+#define MPP35_UA2_RDX        MPP(35, 0x4, 1, 0, 1)
+#define MPP35_TDM1_TXQ        MPP(35, 0x6, 0, 1, 1)
+#define MPP35_UNUSED        MPP(35, 0x3, 0, 0, 1)
+
+#define MPP36_GPIO        MPP(36, 0x1, 1, 1, 1)
+#define MPP36_UA0_CTSn        MPP(36, 0x2, 1, 0, 1)
+#define MPP36_UA2_TDX        MPP(36, 0x4, 0, 1, 1)
+#define MPP36_TDM0_SCSn        MPP(36, 0x6, 0, 1, 1)
+#define MPP36_UNUSED        MPP(36, 0x3, 0, 0, 1)
+
+
+#define MPP37_GPIO        MPP(37, 0x1, 1, 1, 1)
+#define MPP37_UA0_RTSn        MPP(37, 0x2, 0, 1, 1)
+#define MPP37_UA2_RXD        MPP(37, 0x4, 1, 0, 1)
+#define MPP37_SYSRST_OUTn    MPP(37, 0x5, 0, 1, 1)
+#define MPP37_TDM_SCLK        MPP(37, 0x6, 0, 1, 1)
+#define MPP37_UNUSED        MPP(37, 0x3, 0, 0, 1)
+
+
+
+
+#define MPP38_GPIO        MPP(38, 0x1, 1, 1, 1)
+#define MPP38_UA1_CTSn        MPP(38, 0x2, 1, 0, 1)
+#define MPP38_UA3_TXD        MPP(38, 0x4, 0, 1, 1)
+#define MPP38_SYSRST_OUTn    MPP(38, 0x5, 0, 1, 1)
+#define MPP38_TDM_SMOSI        MPP(38, 0x6, 0, 1, 1)
+#define MPP38_UNUSED        MPP(38, 0x3, 0, 0, 1)
+
+
+
+
+#define MPP39_GPIO        MPP(39, 0x1, 1, 1, 1)
+#define MPP39_UA1_RTSn        MPP(39, 0x2, 0, 1, 1)
+#define MPP39_UA3_RXD        MPP(39, 0x4, 1, 0, 1)
+#define MPP39_SYSRST_OUTn    MPP(39, 0x5, 0, 1, 1)
+#define MPP39_TDM_SMISO        MPP(39, 0x6, 1, 0, 1)
+#define MPP39_UNUSED        MPP(39, 0x3, 0, 0, 1)
+
+
+
+#define MPP40_GPIO        MPP(40, 0x1, 1, 1, 1)
+#define MPP40_TDM_INTn        MPP(40, 0x6, 1, 0, 1)
+#define MPP40_UNUSED        MPP(40, 0x0, 0, 0, 1)
+
+
+
+#define MPP41_GPIO        MPP(41, 0x1, 1, 1, 1)
+#define MPP41_TDM_RSTn        MPP(41, 0x6, 0, 1, 1)
+#define MPP41_UNUSED        MPP(41, 0x0, 0, 0, 1)
+
+
+
+#define MPP42_GPIO        MPP(42, 0x1, 1, 1, 1)
+#define MPP42_TDM_PCLK        MPP(42, 0x6, 1, 1, 1)
+#define MPP42_UNUSED        MPP(42, 0x0, 0, 0, 1)
+
+
+
+#define MPP43_GPIO        MPP(43, 0x1, 1, 1, 1)
+#define MPP43_TDM_FSYNC        MPP(43, 0x6, 1, 1, 1)
+#define MPP43_UNUSED        MPP(43, 0x0, 0, 0, 1)
+
+
+
+#define MPP44_GPIO        MPP(44, 0x1, 1, 1, 1)
+#define MPP44_TDM_DRX        MPP(44, 0x6, 1, 0, 1)
+#define MPP44_UNUSED        MPP(44, 0x0, 0, 0, 1)
+
+
+
+#define MPP45_GPIO        MPP(45, 0x1, 1, 1, 1)
+#define MPP45_SATA0_ACTn    MPP(45, 0x3, 0, 1, 1)
+#define MPP45_TDM_DRX        MPP(45, 0x6, 0, 1, 1)
+#define MPP45_UNUSED        MPP(45, 0x0, 0, 0, 1)
+
+
+#define MPP46_GPIO        MPP(46, 0x1, 1, 1, 1)
+#define MPP46_TDM_SCSn        MPP(46, 0x6, 0, 1, 1)
+#define MPP46_UNUSED        MPP(46, 0x0, 0, 0, 1)
+
+
+#define MPP47_GPIO        MPP(47, 0x1, 1, 1, 1)
+#define MPP47_UNUSED        MPP(47, 0x0, 0, 0, 1)
+
+
+
+#define MPP48_GPIO        MPP(48, 0x1, 1, 1, 1)
+#define MPP48_SATA1_ACTn    MPP(48, 0x3, 0, 1, 1)
+#define MPP48_UNUSED        MPP(48, 0x2, 0, 0, 1)
+
+
+
+#define MPP49_GPIO        MPP(49, 0x1, 1, 1, 1)
+#define MPP49_SATA0_ACTn    MPP(49, 0x3, 0, 1, 1)
+#define MPP49_M_BB        MPP(49, 0x4, 1, 0, 1)
+#define MPP49_UNUSED        MPP(49, 0x2, 0, 0, 1)
+
+
+#define MPP_MAX            49
+
+void mv78xx0_mpp_conf(unsigned int *mpp_list);
+
+#endif
diff --git a/arch/arm/mach-mx1/Makefile b/arch/arm/mach-mx1/Makefile
index 7f86fe073ec..fc2ddf82441 100644
--- a/arch/arm/mach-mx1/Makefile
+++ b/arch/arm/mach-mx1/Makefile
@@ -4,11 +4,12 @@
 
 # Object file lists.
 
+EXTRA_CFLAGS += -DIMX_NEEDS_DEPRECATED_SYMBOLS
 obj-y                   += generic.o clock.o devices.o
 
 # Support for CMOS sensor interface
 obj-$(CONFIG_MX1_VIDEO) += ksym_mx1.o mx1_camera_fiq.o
 
 # Specific board support
-obj-$(CONFIG_ARCH_MX1ADS) += mx1ads.o
-obj-$(CONFIG_MACH_SCB9328) += scb9328.o
\ No newline at end of file
+obj-$(CONFIG_ARCH_MX1ADS) += mach-mx1ads.o
+obj-$(CONFIG_MACH_SCB9328) += mach-scb9328.o
diff --git a/arch/arm/mach-mx1/mx1ads.c b/arch/arm/mach-mx1/mach-mx1ads.c
index 30f04e56faf..51f3cfd83db 100644
--- a/arch/arm/mach-mx1/mx1ads.c
+++ b/arch/arm/mach-mx1/mach-mx1ads.c
@@ -1,5 +1,5 @@
 /*
- * arch/arm/mach-imx/mx1ads.c
+ * arch/arm/mach-imx/mach-mx1ads.c
  *
  * Initially based on:
  *      linux-2.6.7-imx/arch/arm/mach-imx/scb9328.c
@@ -27,7 +27,7 @@
 #include <mach/hardware.h>
 #include <mach/i2c.h>
 #include <mach/imx-uart.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx1.h>
 #include <mach/irqs.h>
 
 #include "devices.h"
@@ -147,7 +147,7 @@ MACHINE_START(MX1ADS, "Freescale MX1ADS")
         /* Maintainer: Sascha Hauer, Pengutronix */
         .phys_io        = IMX_IO_PHYS,
         .io_pg_offst    = (IMX_IO_BASE >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .boot_params    = MX1_PHYS_OFFSET + 0x100,
         .map_io         = mx1_map_io,
         .init_irq       = mx1_init_irq,
         .timer          = &mx1ads_timer,
@@ -157,7 +157,7 @@ MACHINE_END
 MACHINE_START(MXLADS, "Freescale MXLADS")
         .phys_io        = IMX_IO_PHYS,
         .io_pg_offst    = (IMX_IO_BASE >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .boot_params    = MX1_PHYS_OFFSET + 0x100,
         .map_io         = mx1_map_io,
         .init_irq       = mx1_init_irq,
         .timer          = &mx1ads_timer,
diff --git a/arch/arm/mach-mx1/scb9328.c b/arch/arm/mach-mx1/mach-scb9328.c
index 325d98df605..7587a7a1246 100644
--- a/arch/arm/mach-mx1/scb9328.c
+++ b/arch/arm/mach-mx1/mach-scb9328.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/mach-mx1/scb9328.c
+ * linux/arch/arm/mach-mx1/mach-scb9328.c
  *
  * Copyright (c) 2004 Sascha Hauer <saschahauer@web.de>
  * Copyright (c) 2006-2008 Juergen Beisert <jbeisert@netscape.net>
@@ -23,7 +23,7 @@
 #include <mach/hardware.h>
 #include <mach/irqs.h>
 #include <mach/imx-uart.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx1.h>
 
 #include "devices.h"
 
diff --git a/arch/arm/mach-mx2/Kconfig b/arch/arm/mach-mx2/Kconfig
index b96c6a38936..742fd4e6dcb 100644
--- a/arch/arm/mach-mx2/Kconfig
+++ b/arch/arm/mach-mx2/Kconfig
@@ -37,6 +37,7 @@ config MACH_MX27ADS
 config MACH_PCM038
         bool "Phytec phyCORE-i.MX27 CPU module (pcm038)"
         depends on MACH_MX27
+        select MXC_ULPI if USB_ULPI
         help
           Include support for phyCORE-i.MX27 (aka pcm038) platform. This
           includes specific configurations for the module and its peripherals.
@@ -55,7 +56,7 @@ config MACH_PCM970_BASEBOARD
 
 endchoice
 
-config MACH_EUKREA_CPUIMX27
+config MACH_CPUIMX27
         bool "Eukrea CPUIMX27 module"
         depends on MACH_MX27
         help
@@ -64,14 +65,14 @@ config MACH_EUKREA_CPUIMX27
 
 config MACH_EUKREA_CPUIMX27_USESDHC2
         bool "CPUIMX27 integrates SDHC2 module"
-        depends on MACH_EUKREA_CPUIMX27
+        depends on MACH_CPUIMX27
         help
           This adds support for the internal SDHC2 used on CPUIMX27 used
           for wifi or eMMC.
 
 choice
         prompt "Baseboard"
-        depends on MACH_EUKREA_CPUIMX27
+        depends on MACH_CPUIMX27
         default MACH_EUKREA_MBIMX27_BASEBOARD
 
 config MACH_EUKREA_MBIMX27_BASEBOARD
@@ -90,7 +91,7 @@ config MACH_MX27_3DS
           Include support for MX27PDK platform. This includes specific
           configurations for the board and its peripherals.
 
-config MACH_MX27LITE
+config MACH_IMX27LITE
         bool "LogicPD MX27 LITEKIT platform"
         depends on MACH_MX27
         help
@@ -100,6 +101,7 @@ config MACH_MX27LITE
 config MACH_PCA100
         bool "Phytec phyCARD-s (pca100)"
         depends on MACH_MX27
+        select MXC_ULPI if USB_ULPI
         help
           Include support for phyCARD-s (aka pca100) platform. This
           includes specific configurations for the module and its peripherals.
diff --git a/arch/arm/mach-mx2/Makefile b/arch/arm/mach-mx2/Makefile
index 52aca0aaf9b..e3254faac82 100644
--- a/arch/arm/mach-mx2/Makefile
+++ b/arch/arm/mach-mx2/Makefile
@@ -4,21 +4,20 @@
 
 # Object file lists.
 
-obj-y   :=  generic.o devices.o serial.o
+obj-y   :=  devices.o serial.o
 
-obj-$(CONFIG_MACH_MX21) += clock_imx21.o
+obj-$(CONFIG_MACH_MX21) += clock_imx21.o mm-imx21.o
 
 obj-$(CONFIG_MACH_MX27) += cpu_imx27.o
-obj-$(CONFIG_MACH_MX27) += clock_imx27.o
+obj-$(CONFIG_MACH_MX27) += clock_imx27.o mm-imx27.o
 
-obj-$(CONFIG_MACH_MX21ADS) += mx21ads.o
-obj-$(CONFIG_MACH_MX27ADS) += mx27ads.o
-obj-$(CONFIG_MACH_PCM038) += pcm038.o
+obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o
+obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o
+obj-$(CONFIG_MACH_PCM038) += mach-pcm038.o
 obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o
-obj-$(CONFIG_MACH_MX27_3DS) += mx27pdk.o
-obj-$(CONFIG_MACH_MX27LITE) += mx27lite.o
-obj-$(CONFIG_MACH_EUKREA_CPUIMX27) += eukrea_cpuimx27.o
+obj-$(CONFIG_MACH_MX27_3DS) += mach-mx27_3ds.o
+obj-$(CONFIG_MACH_IMX27LITE) += mach-imx27lite.o
+obj-$(CONFIG_MACH_CPUIMX27) += mach-cpuimx27.o
 obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o
-obj-$(CONFIG_MACH_PCA100) += pca100.o
-obj-$(CONFIG_MACH_MXT_TD60) += mxt_td60.o
-
+obj-$(CONFIG_MACH_PCA100) += mach-pca100.o
+obj-$(CONFIG_MACH_MXT_TD60) += mach-mxt_td60.o
diff --git a/arch/arm/mach-mx2/clock_imx21.c b/arch/arm/mach-mx2/clock_imx21.c
index e82b489d121..bb419ef4d13 100644
--- a/arch/arm/mach-mx2/clock_imx21.c
+++ b/arch/arm/mach-mx2/clock_imx21.c
@@ -23,11 +23,242 @@
 #include <linux/module.h>
 
 #include <mach/clock.h>
+#include <mach/hardware.h>
 #include <mach/common.h>
 #include <asm/clkdev.h>
 #include <asm/div64.h>
 
-#include "crm_regs.h"
+#define IO_ADDR_CCM(off)        (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR + (off)))
+
+/* Register offsets */
+#define CCM_CSCR                IO_ADDR_CCM(0x0)
+#define CCM_MPCTL0              IO_ADDR_CCM(0x4)
+#define CCM_MPCTL1              IO_ADDR_CCM(0x8)
+#define CCM_SPCTL0              IO_ADDR_CCM(0xc)
+#define CCM_SPCTL1              IO_ADDR_CCM(0x10)
+#define CCM_OSC26MCTL           IO_ADDR_CCM(0x14)
+#define CCM_PCDR0               IO_ADDR_CCM(0x18)
+#define CCM_PCDR1               IO_ADDR_CCM(0x1c)
+#define CCM_PCCR0               IO_ADDR_CCM(0x20)
+#define CCM_PCCR1               IO_ADDR_CCM(0x24)
+#define CCM_CCSR                IO_ADDR_CCM(0x28)
+#define CCM_PMCTL               IO_ADDR_CCM(0x2c)
+#define CCM_PMCOUNT             IO_ADDR_CCM(0x30)
+#define CCM_WKGDCTL             IO_ADDR_CCM(0x34)
+
+#define CCM_CSCR_PRESC_OFFSET   29
+#define CCM_CSCR_PRESC_MASK     (0x7 << CCM_CSCR_PRESC_OFFSET)
+
+#define CCM_CSCR_USB_OFFSET     26
+#define CCM_CSCR_USB_MASK       (0x7 << CCM_CSCR_USB_OFFSET)
+#define CCM_CSCR_SD_OFFSET      24
+#define CCM_CSCR_SD_MASK        (0x3 << CCM_CSCR_SD_OFFSET)
+#define CCM_CSCR_SPLLRES        (1 << 22)
+#define CCM_CSCR_MPLLRES        (1 << 21)
+#define CCM_CSCR_SSI2_OFFSET    20
+#define CCM_CSCR_SSI2           (1 << CCM_CSCR_SSI2_OFFSET)
+#define CCM_CSCR_SSI1_OFFSET    19
+#define CCM_CSCR_SSI1           (1 << CCM_CSCR_SSI1_OFFSET)
+#define CCM_CSCR_FIR_OFFSET     18
+#define CCM_CSCR_FIR            (1 << CCM_CSCR_FIR_OFFSET)
+#define CCM_CSCR_SP             (1 << 17)
+#define CCM_CSCR_MCU            (1 << 16)
+#define CCM_CSCR_BCLK_OFFSET    10
+#define CCM_CSCR_BCLK_MASK      (0xf << CCM_CSCR_BCLK_OFFSET)
+#define CCM_CSCR_IPDIV_OFFSET   9
+#define CCM_CSCR_IPDIV          (1 << CCM_CSCR_IPDIV_OFFSET)
+
+#define CCM_CSCR_OSC26MDIV      (1 << 4)
+#define CCM_CSCR_OSC26M         (1 << 3)
+#define CCM_CSCR_FPM            (1 << 2)
+#define CCM_CSCR_SPEN           (1 << 1)
+#define CCM_CSCR_MPEN           1
+
+#define CCM_MPCTL0_CPLM         (1 << 31)
+#define CCM_MPCTL0_PD_OFFSET    26
+#define CCM_MPCTL0_PD_MASK      (0xf << 26)
+#define CCM_MPCTL0_MFD_OFFSET   16
+#define CCM_MPCTL0_MFD_MASK     (0x3ff << 16)
+#define CCM_MPCTL0_MFI_OFFSET   10
+#define CCM_MPCTL0_MFI_MASK     (0xf << 10)
+#define CCM_MPCTL0_MFN_OFFSET   0
+#define CCM_MPCTL0_MFN_MASK     0x3ff
+
+#define CCM_MPCTL1_LF           (1 << 15)
+#define CCM_MPCTL1_BRMO         (1 << 6)
+
+#define CCM_SPCTL0_CPLM         (1 << 31)
+#define CCM_SPCTL0_PD_OFFSET    26
+#define CCM_SPCTL0_PD_MASK      (0xf << 26)
+#define CCM_SPCTL0_MFD_OFFSET   16
+#define CCM_SPCTL0_MFD_MASK     (0x3ff << 16)
+#define CCM_SPCTL0_MFI_OFFSET   10
+#define CCM_SPCTL0_MFI_MASK     (0xf << 10)
+#define CCM_SPCTL0_MFN_OFFSET   0
+#define CCM_SPCTL0_MFN_MASK     0x3ff
+
+#define CCM_SPCTL1_LF           (1 << 15)
+#define CCM_SPCTL1_BRMO         (1 << 6)
+
+#define CCM_OSC26MCTL_PEAK_OFFSET       16
+#define CCM_OSC26MCTL_PEAK_MASK         (0x3 << 16)
+#define CCM_OSC26MCTL_AGC_OFFSET        8
+#define CCM_OSC26MCTL_AGC_MASK          (0x3f << 8)
+#define CCM_OSC26MCTL_ANATEST_OFFSET    0
+#define CCM_OSC26MCTL_ANATEST_MASK      0x3f
+
+#define CCM_PCDR0_SSI2BAUDDIV_OFFSET    26
+#define CCM_PCDR0_SSI2BAUDDIV_MASK      (0x3f << 26)
+#define CCM_PCDR0_SSI1BAUDDIV_OFFSET    16
+#define CCM_PCDR0_SSI1BAUDDIV_MASK      (0x3f << 16)
+#define CCM_PCDR0_NFCDIV_OFFSET         12
+#define CCM_PCDR0_NFCDIV_MASK           (0xf << 12)
+#define CCM_PCDR0_48MDIV_OFFSET         5
+#define CCM_PCDR0_48MDIV_MASK           (0x7 << CCM_PCDR0_48MDIV_OFFSET)
+#define CCM_PCDR0_FIRIDIV_OFFSET        0
+#define CCM_PCDR0_FIRIDIV_MASK          0x1f
+#define CCM_PCDR1_PERDIV4_OFFSET        24
+#define CCM_PCDR1_PERDIV4_MASK          (0x3f << 24)
+#define CCM_PCDR1_PERDIV3_OFFSET        16
+#define CCM_PCDR1_PERDIV3_MASK          (0x3f << 16)
+#define CCM_PCDR1_PERDIV2_OFFSET        8
+#define CCM_PCDR1_PERDIV2_MASK          (0x3f << 8)
+#define CCM_PCDR1_PERDIV1_OFFSET        0
+#define CCM_PCDR1_PERDIV1_MASK          0x3f
+
+#define CCM_PCCR_HCLK_CSI_OFFSET        31
+#define CCM_PCCR_HCLK_CSI_REG           CCM_PCCR0
+#define CCM_PCCR_HCLK_DMA_OFFSET        30
+#define CCM_PCCR_HCLK_DMA_REG           CCM_PCCR0
+#define CCM_PCCR_HCLK_BROM_OFFSET       28
+#define CCM_PCCR_HCLK_BROM_REG          CCM_PCCR0
+#define CCM_PCCR_HCLK_EMMA_OFFSET       27
+#define CCM_PCCR_HCLK_EMMA_REG          CCM_PCCR0
+#define CCM_PCCR_HCLK_LCDC_OFFSET       26
+#define CCM_PCCR_HCLK_LCDC_REG          CCM_PCCR0
+#define CCM_PCCR_HCLK_SLCDC_OFFSET      25
+#define CCM_PCCR_HCLK_SLCDC_REG         CCM_PCCR0
+#define CCM_PCCR_HCLK_USBOTG_OFFSET     24
+#define CCM_PCCR_HCLK_USBOTG_REG        CCM_PCCR0
+#define CCM_PCCR_HCLK_BMI_OFFSET        23
+#define CCM_PCCR_BMI_MASK               (1 << CCM_PCCR_BMI_MASK)
+#define CCM_PCCR_HCLK_BMI_REG           CCM_PCCR0
+#define CCM_PCCR_PERCLK4_OFFSET         22
+#define CCM_PCCR_PERCLK4_REG            CCM_PCCR0
+#define CCM_PCCR_SLCDC_OFFSET           21
+#define CCM_PCCR_SLCDC_REG              CCM_PCCR0
+#define CCM_PCCR_FIRI_BAUD_OFFSET       20
+#define CCM_PCCR_FIRI_BAUD_MASK         (1 << CCM_PCCR_FIRI_BAUD_MASK)
+#define CCM_PCCR_FIRI_BAUD_REG          CCM_PCCR0
+#define CCM_PCCR_NFC_OFFSET             19
+#define CCM_PCCR_NFC_REG                CCM_PCCR0
+#define CCM_PCCR_LCDC_OFFSET            18
+#define CCM_PCCR_LCDC_REG               CCM_PCCR0
+#define CCM_PCCR_SSI1_BAUD_OFFSET       17
+#define CCM_PCCR_SSI1_BAUD_REG          CCM_PCCR0
+#define CCM_PCCR_SSI2_BAUD_OFFSET       16
+#define CCM_PCCR_SSI2_BAUD_REG          CCM_PCCR0
+#define CCM_PCCR_EMMA_OFFSET            15
+#define CCM_PCCR_EMMA_REG               CCM_PCCR0
+#define CCM_PCCR_USBOTG_OFFSET          14
+#define CCM_PCCR_USBOTG_REG             CCM_PCCR0
+#define CCM_PCCR_DMA_OFFSET             13
+#define CCM_PCCR_DMA_REG                CCM_PCCR0
+#define CCM_PCCR_I2C1_OFFSET            12
+#define CCM_PCCR_I2C1_REG               CCM_PCCR0
+#define CCM_PCCR_GPIO_OFFSET            11
+#define CCM_PCCR_GPIO_REG               CCM_PCCR0
+#define CCM_PCCR_SDHC2_OFFSET           10
+#define CCM_PCCR_SDHC2_REG              CCM_PCCR0
+#define CCM_PCCR_SDHC1_OFFSET           9
+#define CCM_PCCR_SDHC1_REG              CCM_PCCR0
+#define CCM_PCCR_FIRI_OFFSET            8
+#define CCM_PCCR_FIRI_MASK              (1 << CCM_PCCR_BAUD_MASK)
+#define CCM_PCCR_FIRI_REG               CCM_PCCR0
+#define CCM_PCCR_SSI2_IPG_OFFSET        7
+#define CCM_PCCR_SSI2_REG               CCM_PCCR0
+#define CCM_PCCR_SSI1_IPG_OFFSET        6
+#define CCM_PCCR_SSI1_REG               CCM_PCCR0
+#define CCM_PCCR_CSPI2_OFFSET           5
+#define CCM_PCCR_CSPI2_REG              CCM_PCCR0
+#define CCM_PCCR_CSPI1_OFFSET           4
+#define CCM_PCCR_CSPI1_REG              CCM_PCCR0
+#define CCM_PCCR_UART4_OFFSET           3
+#define CCM_PCCR_UART4_REG              CCM_PCCR0
+#define CCM_PCCR_UART3_OFFSET           2
+#define CCM_PCCR_UART3_REG              CCM_PCCR0
+#define CCM_PCCR_UART2_OFFSET           1
+#define CCM_PCCR_UART2_REG              CCM_PCCR0
+#define CCM_PCCR_UART1_OFFSET           0
+#define CCM_PCCR_UART1_REG              CCM_PCCR0
+
+#define CCM_PCCR_OWIRE_OFFSET           31
+#define CCM_PCCR_OWIRE_REG              CCM_PCCR1
+#define CCM_PCCR_KPP_OFFSET             30
+#define CCM_PCCR_KPP_REG                CCM_PCCR1
+#define CCM_PCCR_RTC_OFFSET             29
+#define CCM_PCCR_RTC_REG                CCM_PCCR1
+#define CCM_PCCR_PWM_OFFSET             28
+#define CCM_PCCR_PWM_REG                CCM_PCCR1
+#define CCM_PCCR_GPT3_OFFSET            27
+#define CCM_PCCR_GPT3_REG               CCM_PCCR1
+#define CCM_PCCR_GPT2_OFFSET            26
+#define CCM_PCCR_GPT2_REG               CCM_PCCR1
+#define CCM_PCCR_GPT1_OFFSET            25
+#define CCM_PCCR_GPT1_REG               CCM_PCCR1
+#define CCM_PCCR_WDT_OFFSET             24
+#define CCM_PCCR_WDT_REG                CCM_PCCR1
+#define CCM_PCCR_CSPI3_OFFSET           23
+#define CCM_PCCR_CSPI3_REG              CCM_PCCR1
+
+#define CCM_PCCR_CSPI1_MASK             (1 << CCM_PCCR_CSPI1_OFFSET)
+#define CCM_PCCR_CSPI2_MASK             (1 << CCM_PCCR_CSPI2_OFFSET)
+#define CCM_PCCR_CSPI3_MASK             (1 << CCM_PCCR_CSPI3_OFFSET)
+#define CCM_PCCR_DMA_MASK               (1 << CCM_PCCR_DMA_OFFSET)
+#define CCM_PCCR_EMMA_MASK              (1 << CCM_PCCR_EMMA_OFFSET)
+#define CCM_PCCR_GPIO_MASK              (1 << CCM_PCCR_GPIO_OFFSET)
+#define CCM_PCCR_GPT1_MASK              (1 << CCM_PCCR_GPT1_OFFSET)
+#define CCM_PCCR_GPT2_MASK              (1 << CCM_PCCR_GPT2_OFFSET)
+#define CCM_PCCR_GPT3_MASK              (1 << CCM_PCCR_GPT3_OFFSET)
+#define CCM_PCCR_HCLK_BROM_MASK         (1 << CCM_PCCR_HCLK_BROM_OFFSET)
+#define CCM_PCCR_HCLK_CSI_MASK          (1 << CCM_PCCR_HCLK_CSI_OFFSET)
+#define CCM_PCCR_HCLK_DMA_MASK          (1 << CCM_PCCR_HCLK_DMA_OFFSET)
+#define CCM_PCCR_HCLK_EMMA_MASK         (1 << CCM_PCCR_HCLK_EMMA_OFFSET)
+#define CCM_PCCR_HCLK_LCDC_MASK         (1 << CCM_PCCR_HCLK_LCDC_OFFSET)
+#define CCM_PCCR_HCLK_SLCDC_MASK        (1 << CCM_PCCR_HCLK_SLCDC_OFFSET)
+#define CCM_PCCR_HCLK_USBOTG_MASK       (1 << CCM_PCCR_HCLK_USBOTG_OFFSET)
+#define CCM_PCCR_I2C1_MASK              (1 << CCM_PCCR_I2C1_OFFSET)
+#define CCM_PCCR_KPP_MASK               (1 << CCM_PCCR_KPP_OFFSET)
+#define CCM_PCCR_LCDC_MASK              (1 << CCM_PCCR_LCDC_OFFSET)
+#define CCM_PCCR_NFC_MASK               (1 << CCM_PCCR_NFC_OFFSET)
+#define CCM_PCCR_OWIRE_MASK             (1 << CCM_PCCR_OWIRE_OFFSET)
+#define CCM_PCCR_PERCLK4_MASK           (1 << CCM_PCCR_PERCLK4_OFFSET)
+#define CCM_PCCR_PWM_MASK               (1 << CCM_PCCR_PWM_OFFSET)
+#define CCM_PCCR_RTC_MASK               (1 << CCM_PCCR_RTC_OFFSET)
+#define CCM_PCCR_SDHC1_MASK             (1 << CCM_PCCR_SDHC1_OFFSET)
+#define CCM_PCCR_SDHC2_MASK             (1 << CCM_PCCR_SDHC2_OFFSET)
+#define CCM_PCCR_SLCDC_MASK             (1 << CCM_PCCR_SLCDC_OFFSET)
+#define CCM_PCCR_SSI1_BAUD_MASK         (1 << CCM_PCCR_SSI1_BAUD_OFFSET)
+#define CCM_PCCR_SSI1_IPG_MASK          (1 << CCM_PCCR_SSI1_IPG_OFFSET)
+#define CCM_PCCR_SSI2_BAUD_MASK         (1 << CCM_PCCR_SSI2_BAUD_OFFSET)
+#define CCM_PCCR_SSI2_IPG_MASK          (1 << CCM_PCCR_SSI2_IPG_OFFSET)
+#define CCM_PCCR_UART1_MASK             (1 << CCM_PCCR_UART1_OFFSET)
+#define CCM_PCCR_UART2_MASK             (1 << CCM_PCCR_UART2_OFFSET)
+#define CCM_PCCR_UART3_MASK             (1 << CCM_PCCR_UART3_OFFSET)
+#define CCM_PCCR_UART4_MASK             (1 << CCM_PCCR_UART4_OFFSET)
+#define CCM_PCCR_USBOTG_MASK            (1 << CCM_PCCR_USBOTG_OFFSET)
+#define CCM_PCCR_WDT_MASK               (1 << CCM_PCCR_WDT_OFFSET)
+
+#define CCM_CCSR_32KSR          (1 << 15)
+
+#define CCM_CCSR_CLKMODE1       (1 << 9)
+#define CCM_CCSR_CLKMODE0       (1 << 8)
+
+#define CCM_CCSR_CLKOSEL_OFFSET 0
+#define CCM_CCSR_CLKOSEL_MASK   0x1f
+
+#define SYS_FMCR                0x14    /* Functional Muxing Control Reg */
+#define SYS_CHIP_ID             0x00    /* The offset of CHIP ID register */
 
 static int _clk_enable(struct clk *clk)
 {
@@ -1002,6 +1233,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
         clk_enable(&uart_clk[0]);
 #endif
 
-        mxc_timer_init(&gpt_clk[0], IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT1);
+        mxc_timer_init(&gpt_clk[0], MX21_IO_ADDRESS(MX21_GPT1_BASE_ADDR),
+                        MX21_INT_GPT1);
         return 0;
 }
diff --git a/arch/arm/mach-mx2/clock_imx27.c b/arch/arm/mach-mx2/clock_imx27.c
index 18c53a6487f..0f0823c8b17 100644
--- a/arch/arm/mach-mx2/clock_imx27.c
+++ b/arch/arm/mach-mx2/clock_imx27.c
@@ -29,21 +29,23 @@
 #include <mach/common.h>
 #include <mach/hardware.h>
 
+#define IO_ADDR_CCM(off)        (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR + (off)))
+
 /* Register offsets */
-#define CCM_CSCR                (IO_ADDRESS(CCM_BASE_ADDR) + 0x0)
-#define CCM_MPCTL0              (IO_ADDRESS(CCM_BASE_ADDR) + 0x4)
-#define CCM_MPCTL1              (IO_ADDRESS(CCM_BASE_ADDR) + 0x8)
-#define CCM_SPCTL0              (IO_ADDRESS(CCM_BASE_ADDR) + 0xC)
-#define CCM_SPCTL1              (IO_ADDRESS(CCM_BASE_ADDR) + 0x10)
-#define CCM_OSC26MCTL           (IO_ADDRESS(CCM_BASE_ADDR) + 0x14)
-#define CCM_PCDR0               (IO_ADDRESS(CCM_BASE_ADDR) + 0x18)
-#define CCM_PCDR1               (IO_ADDRESS(CCM_BASE_ADDR) + 0x1c)
-#define CCM_PCCR0               (IO_ADDRESS(CCM_BASE_ADDR) + 0x20)
-#define CCM_PCCR1               (IO_ADDRESS(CCM_BASE_ADDR) + 0x24)
-#define CCM_CCSR                (IO_ADDRESS(CCM_BASE_ADDR) + 0x28)
-#define CCM_PMCTL               (IO_ADDRESS(CCM_BASE_ADDR) + 0x2c)
-#define CCM_PMCOUNT             (IO_ADDRESS(CCM_BASE_ADDR) + 0x30)
-#define CCM_WKGDCTL             (IO_ADDRESS(CCM_BASE_ADDR) + 0x34)
+#define CCM_CSCR                IO_ADDR_CCM(0x0)
+#define CCM_MPCTL0              IO_ADDR_CCM(0x4)
+#define CCM_MPCTL1              IO_ADDR_CCM(0x8)
+#define CCM_SPCTL0              IO_ADDR_CCM(0xc)
+#define CCM_SPCTL1              IO_ADDR_CCM(0x10)
+#define CCM_OSC26MCTL           IO_ADDR_CCM(0x14)
+#define CCM_PCDR0               IO_ADDR_CCM(0x18)
+#define CCM_PCDR1               IO_ADDR_CCM(0x1c)
+#define CCM_PCCR0               IO_ADDR_CCM(0x20)
+#define CCM_PCCR1               IO_ADDR_CCM(0x24)
+#define CCM_CCSR                IO_ADDR_CCM(0x28)
+#define CCM_PMCTL               IO_ADDR_CCM(0x2c)
+#define CCM_PMCOUNT             IO_ADDR_CCM(0x30)
+#define CCM_WKGDCTL             IO_ADDR_CCM(0x34)
 
 #define CCM_CSCR_UPDATE_DIS     (1 << 31)
 #define CCM_CSCR_SSI2           (1 << 23)
@@ -753,7 +755,8 @@ int __init mx27_clocks_init(unsigned long fref)
         clk_enable(&uart1_clk);
 #endif
 
-        mxc_timer_init(&gpt1_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT1);
+        mxc_timer_init(&gpt1_clk, MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR),
+                        MX27_INT_GPT1);
 
         return 0;
 }
diff --git a/arch/arm/mach-mx2/cpu_imx27.c b/arch/arm/mach-mx2/cpu_imx27.c
index d9e3bf9644c..d8d3b2d84dc 100644
--- a/arch/arm/mach-mx2/cpu_imx27.c
+++ b/arch/arm/mach-mx2/cpu_imx27.c
@@ -39,7 +39,8 @@ static void query_silicon_parameter(void)
          * the silicon revision very early we read it here to
          * avoid any further hooks
         */
-        val = __raw_readl(IO_ADDRESS(SYSCTRL_BASE_ADDR) + SYS_CHIP_ID);
+        val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR
+                                + SYS_CHIP_ID));
 
         cpu_silicon_rev = (int)(val >> 28);
         cpu_partnumber = (int)((val >> 12) & 0xFFFF);
diff --git a/arch/arm/mach-mx2/crm_regs.h b/arch/arm/mach-mx2/crm_regs.h
deleted file mode 100644
index 749de76b3f9..00000000000
--- a/arch/arm/mach-mx2/crm_regs.h
+++ /dev/null
@@ -1,258 +0,0 @@
-/*
- * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
- * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- * MA 02110-1301, USA.
- */
-
-#ifndef __ARCH_ARM_MACH_MX2_CRM_REGS_H__
-#define __ARCH_ARM_MACH_MX2_CRM_REGS_H__
-
-#include <mach/hardware.h>
-
-/* Register offsets */
-#define CCM_CSCR                (IO_ADDRESS(CCM_BASE_ADDR) + 0x0)
-#define CCM_MPCTL0              (IO_ADDRESS(CCM_BASE_ADDR) + 0x4)
-#define CCM_MPCTL1              (IO_ADDRESS(CCM_BASE_ADDR) + 0x8)
-#define CCM_SPCTL0              (IO_ADDRESS(CCM_BASE_ADDR) + 0xC)
-#define CCM_SPCTL1              (IO_ADDRESS(CCM_BASE_ADDR) + 0x10)
-#define CCM_OSC26MCTL           (IO_ADDRESS(CCM_BASE_ADDR) + 0x14)
-#define CCM_PCDR0               (IO_ADDRESS(CCM_BASE_ADDR) + 0x18)
-#define CCM_PCDR1               (IO_ADDRESS(CCM_BASE_ADDR) + 0x1c)
-#define CCM_PCCR0               (IO_ADDRESS(CCM_BASE_ADDR) + 0x20)
-#define CCM_PCCR1               (IO_ADDRESS(CCM_BASE_ADDR) + 0x24)
-#define CCM_CCSR                (IO_ADDRESS(CCM_BASE_ADDR) + 0x28)
-#define CCM_PMCTL               (IO_ADDRESS(CCM_BASE_ADDR) + 0x2c)
-#define CCM_PMCOUNT             (IO_ADDRESS(CCM_BASE_ADDR) + 0x30)
-#define CCM_WKGDCTL             (IO_ADDRESS(CCM_BASE_ADDR) + 0x34)
-
-#define CCM_CSCR_PRESC_OFFSET   29
-#define CCM_CSCR_PRESC_MASK     (0x7 << CCM_CSCR_PRESC_OFFSET)
-
-#define CCM_CSCR_USB_OFFSET     26
-#define CCM_CSCR_USB_MASK       (0x7 << CCM_CSCR_USB_OFFSET)
-#define CCM_CSCR_SD_OFFSET      24
-#define CCM_CSCR_SD_MASK        (0x3 << CCM_CSCR_SD_OFFSET)
-#define CCM_CSCR_SPLLRES        (1 << 22)
-#define CCM_CSCR_MPLLRES        (1 << 21)
-#define CCM_CSCR_SSI2_OFFSET    20
-#define CCM_CSCR_SSI2           (1 << CCM_CSCR_SSI2_OFFSET)
-#define CCM_CSCR_SSI1_OFFSET    19
-#define CCM_CSCR_SSI1           (1 << CCM_CSCR_SSI1_OFFSET)
-#define CCM_CSCR_FIR_OFFSET     18
-#define CCM_CSCR_FIR            (1 << CCM_CSCR_FIR_OFFSET)
-#define CCM_CSCR_SP             (1 << 17)
-#define CCM_CSCR_MCU            (1 << 16)
-#define CCM_CSCR_BCLK_OFFSET    10
-#define CCM_CSCR_BCLK_MASK      (0xf << CCM_CSCR_BCLK_OFFSET)
-#define CCM_CSCR_IPDIV_OFFSET   9
-#define CCM_CSCR_IPDIV          (1 << CCM_CSCR_IPDIV_OFFSET)
-
-#define CCM_CSCR_OSC26MDIV      (1 << 4)
-#define CCM_CSCR_OSC26M         (1 << 3)
-#define CCM_CSCR_FPM            (1 << 2)
-#define CCM_CSCR_SPEN           (1 << 1)
-#define CCM_CSCR_MPEN           1
-
-
-
-#define CCM_MPCTL0_CPLM         (1 << 31)
-#define CCM_MPCTL0_PD_OFFSET    26
-#define CCM_MPCTL0_PD_MASK      (0xf << 26)
-#define CCM_MPCTL0_MFD_OFFSET   16
-#define CCM_MPCTL0_MFD_MASK     (0x3ff << 16)
-#define CCM_MPCTL0_MFI_OFFSET   10
-#define CCM_MPCTL0_MFI_MASK     (0xf << 10)
-#define CCM_MPCTL0_MFN_OFFSET   0
-#define CCM_MPCTL0_MFN_MASK     0x3ff
-
-#define CCM_MPCTL1_LF           (1 << 15)
-#define CCM_MPCTL1_BRMO         (1 << 6)
-
-#define CCM_SPCTL0_CPLM         (1 << 31)
-#define CCM_SPCTL0_PD_OFFSET    26
-#define CCM_SPCTL0_PD_MASK      (0xf << 26)
-#define CCM_SPCTL0_MFD_OFFSET   16
-#define CCM_SPCTL0_MFD_MASK     (0x3ff << 16)
-#define CCM_SPCTL0_MFI_OFFSET   10
-#define CCM_SPCTL0_MFI_MASK     (0xf << 10)
-#define CCM_SPCTL0_MFN_OFFSET   0
-#define CCM_SPCTL0_MFN_MASK     0x3ff
-
-#define CCM_SPCTL1_LF           (1 << 15)
-#define CCM_SPCTL1_BRMO         (1 << 6)
-
-#define CCM_OSC26MCTL_PEAK_OFFSET       16
-#define CCM_OSC26MCTL_PEAK_MASK         (0x3 << 16)
-#define CCM_OSC26MCTL_AGC_OFFSET        8
-#define CCM_OSC26MCTL_AGC_MASK          (0x3f << 8)
-#define CCM_OSC26MCTL_ANATEST_OFFSET    0
-#define CCM_OSC26MCTL_ANATEST_MASK      0x3f
-
-#define CCM_PCDR0_SSI2BAUDDIV_OFFSET    26
-#define CCM_PCDR0_SSI2BAUDDIV_MASK      (0x3f << 26)
-#define CCM_PCDR0_SSI1BAUDDIV_OFFSET    16
-#define CCM_PCDR0_SSI1BAUDDIV_MASK      (0x3f << 16)
-#define CCM_PCDR0_NFCDIV_OFFSET         12
-#define CCM_PCDR0_NFCDIV_MASK           (0xf << 12)
-#define CCM_PCDR0_48MDIV_OFFSET         5
-#define CCM_PCDR0_48MDIV_MASK           (0x7 << CCM_PCDR0_48MDIV_OFFSET)
-#define CCM_PCDR0_FIRIDIV_OFFSET        0
-#define CCM_PCDR0_FIRIDIV_MASK          0x1f
-#define CCM_PCDR1_PERDIV4_OFFSET        24
-#define CCM_PCDR1_PERDIV4_MASK          (0x3f << 24)
-#define CCM_PCDR1_PERDIV3_OFFSET        16
-#define CCM_PCDR1_PERDIV3_MASK          (0x3f << 16)
-#define CCM_PCDR1_PERDIV2_OFFSET        8
-#define CCM_PCDR1_PERDIV2_MASK          (0x3f << 8)
-#define CCM_PCDR1_PERDIV1_OFFSET        0
-#define CCM_PCDR1_PERDIV1_MASK          0x3f
-
-#define CCM_PCCR_HCLK_CSI_OFFSET        31
-#define CCM_PCCR_HCLK_CSI_REG           CCM_PCCR0
-#define CCM_PCCR_HCLK_DMA_OFFSET        30
-#define CCM_PCCR_HCLK_DMA_REG           CCM_PCCR0
-#define CCM_PCCR_HCLK_BROM_OFFSET       28
-#define CCM_PCCR_HCLK_BROM_REG          CCM_PCCR0
-#define CCM_PCCR_HCLK_EMMA_OFFSET       27
-#define CCM_PCCR_HCLK_EMMA_REG          CCM_PCCR0
-#define CCM_PCCR_HCLK_LCDC_OFFSET       26
-#define CCM_PCCR_HCLK_LCDC_REG          CCM_PCCR0
-#define CCM_PCCR_HCLK_SLCDC_OFFSET      25
-#define CCM_PCCR_HCLK_SLCDC_REG         CCM_PCCR0
-#define CCM_PCCR_HCLK_USBOTG_OFFSET     24
-#define CCM_PCCR_HCLK_USBOTG_REG        CCM_PCCR0
-#define CCM_PCCR_HCLK_BMI_OFFSET        23
-#define CCM_PCCR_BMI_MASK               (1 << CCM_PCCR_BMI_MASK)
-#define CCM_PCCR_HCLK_BMI_REG           CCM_PCCR0
-#define CCM_PCCR_PERCLK4_OFFSET         22
-#define CCM_PCCR_PERCLK4_REG            CCM_PCCR0
-#define CCM_PCCR_SLCDC_OFFSET           21
-#define CCM_PCCR_SLCDC_REG              CCM_PCCR0
-#define CCM_PCCR_FIRI_BAUD_OFFSET       20
-#define CCM_PCCR_FIRI_BAUD_MASK         (1 << CCM_PCCR_FIRI_BAUD_MASK)
-#define CCM_PCCR_FIRI_BAUD_REG          CCM_PCCR0
-#define CCM_PCCR_NFC_OFFSET             19
-#define CCM_PCCR_NFC_REG                CCM_PCCR0
-#define CCM_PCCR_LCDC_OFFSET            18
-#define CCM_PCCR_LCDC_REG               CCM_PCCR0
-#define CCM_PCCR_SSI1_BAUD_OFFSET       17
-#define CCM_PCCR_SSI1_BAUD_REG          CCM_PCCR0
-#define CCM_PCCR_SSI2_BAUD_OFFSET       16
-#define CCM_PCCR_SSI2_BAUD_REG          CCM_PCCR0
-#define CCM_PCCR_EMMA_OFFSET            15
-#define CCM_PCCR_EMMA_REG               CCM_PCCR0
-#define CCM_PCCR_USBOTG_OFFSET          14
-#define CCM_PCCR_USBOTG_REG             CCM_PCCR0
-#define CCM_PCCR_DMA_OFFSET             13
-#define CCM_PCCR_DMA_REG                CCM_PCCR0
-#define CCM_PCCR_I2C1_OFFSET            12
-#define CCM_PCCR_I2C1_REG               CCM_PCCR0
-#define CCM_PCCR_GPIO_OFFSET            11
-#define CCM_PCCR_GPIO_REG               CCM_PCCR0
-#define CCM_PCCR_SDHC2_OFFSET           10
-#define CCM_PCCR_SDHC2_REG              CCM_PCCR0
-#define CCM_PCCR_SDHC1_OFFSET           9
-#define CCM_PCCR_SDHC1_REG              CCM_PCCR0
-#define CCM_PCCR_FIRI_OFFSET            8
-#define CCM_PCCR_FIRI_MASK              (1 << CCM_PCCR_BAUD_MASK)
-#define CCM_PCCR_FIRI_REG               CCM_PCCR0
-#define CCM_PCCR_SSI2_IPG_OFFSET        7
-#define CCM_PCCR_SSI2_REG               CCM_PCCR0
-#define CCM_PCCR_SSI1_IPG_OFFSET        6
-#define CCM_PCCR_SSI1_REG               CCM_PCCR0
-#define CCM_PCCR_CSPI2_OFFSET           5
-#define CCM_PCCR_CSPI2_REG              CCM_PCCR0
-#define CCM_PCCR_CSPI1_OFFSET           4
-#define CCM_PCCR_CSPI1_REG              CCM_PCCR0
-#define CCM_PCCR_UART4_OFFSET           3
-#define CCM_PCCR_UART4_REG              CCM_PCCR0
-#define CCM_PCCR_UART3_OFFSET           2
-#define CCM_PCCR_UART3_REG              CCM_PCCR0
-#define CCM_PCCR_UART2_OFFSET           1
-#define CCM_PCCR_UART2_REG              CCM_PCCR0
-#define CCM_PCCR_UART1_OFFSET           0
-#define CCM_PCCR_UART1_REG              CCM_PCCR0
-
-#define CCM_PCCR_OWIRE_OFFSET           31
-#define CCM_PCCR_OWIRE_REG              CCM_PCCR1
-#define CCM_PCCR_KPP_OFFSET             30
-#define CCM_PCCR_KPP_REG                CCM_PCCR1
-#define CCM_PCCR_RTC_OFFSET             29
-#define CCM_PCCR_RTC_REG                CCM_PCCR1
-#define CCM_PCCR_PWM_OFFSET             28
-#define CCM_PCCR_PWM_REG                CCM_PCCR1
-#define CCM_PCCR_GPT3_OFFSET            27
-#define CCM_PCCR_GPT3_REG               CCM_PCCR1
-#define CCM_PCCR_GPT2_OFFSET            26
-#define CCM_PCCR_GPT2_REG               CCM_PCCR1
-#define CCM_PCCR_GPT1_OFFSET            25
-#define CCM_PCCR_GPT1_REG               CCM_PCCR1
-#define CCM_PCCR_WDT_OFFSET             24
-#define CCM_PCCR_WDT_REG                CCM_PCCR1
-#define CCM_PCCR_CSPI3_OFFSET           23
-#define CCM_PCCR_CSPI3_REG              CCM_PCCR1
-
-#define CCM_PCCR_CSPI1_MASK             (1 << CCM_PCCR_CSPI1_OFFSET)
-#define CCM_PCCR_CSPI2_MASK             (1 << CCM_PCCR_CSPI2_OFFSET)
-#define CCM_PCCR_CSPI3_MASK             (1 << CCM_PCCR_CSPI3_OFFSET)
-#define CCM_PCCR_DMA_MASK               (1 << CCM_PCCR_DMA_OFFSET)
-#define CCM_PCCR_EMMA_MASK              (1 << CCM_PCCR_EMMA_OFFSET)
-#define CCM_PCCR_GPIO_MASK              (1 << CCM_PCCR_GPIO_OFFSET)
-#define CCM_PCCR_GPT1_MASK              (1 << CCM_PCCR_GPT1_OFFSET)
-#define CCM_PCCR_GPT2_MASK              (1 << CCM_PCCR_GPT2_OFFSET)
-#define CCM_PCCR_GPT3_MASK              (1 << CCM_PCCR_GPT3_OFFSET)
-#define CCM_PCCR_HCLK_BROM_MASK         (1 << CCM_PCCR_HCLK_BROM_OFFSET)
-#define CCM_PCCR_HCLK_CSI_MASK          (1 << CCM_PCCR_HCLK_CSI_OFFSET)
-#define CCM_PCCR_HCLK_DMA_MASK          (1 << CCM_PCCR_HCLK_DMA_OFFSET)
-#define CCM_PCCR_HCLK_EMMA_MASK         (1 << CCM_PCCR_HCLK_EMMA_OFFSET)
-#define CCM_PCCR_HCLK_LCDC_MASK         (1 << CCM_PCCR_HCLK_LCDC_OFFSET)
-#define CCM_PCCR_HCLK_SLCDC_MASK        (1 << CCM_PCCR_HCLK_SLCDC_OFFSET)
-#define CCM_PCCR_HCLK_USBOTG_MASK       (1 << CCM_PCCR_HCLK_USBOTG_OFFSET)
-#define CCM_PCCR_I2C1_MASK              (1 << CCM_PCCR_I2C1_OFFSET)
-#define CCM_PCCR_KPP_MASK               (1 << CCM_PCCR_KPP_OFFSET)
-#define CCM_PCCR_LCDC_MASK              (1 << CCM_PCCR_LCDC_OFFSET)
-#define CCM_PCCR_NFC_MASK               (1 << CCM_PCCR_NFC_OFFSET)
-#define CCM_PCCR_OWIRE_MASK             (1 << CCM_PCCR_OWIRE_OFFSET)
-#define CCM_PCCR_PERCLK4_MASK           (1 << CCM_PCCR_PERCLK4_OFFSET)
-#define CCM_PCCR_PWM_MASK               (1 << CCM_PCCR_PWM_OFFSET)
-#define CCM_PCCR_RTC_MASK               (1 << CCM_PCCR_RTC_OFFSET)
-#define CCM_PCCR_SDHC1_MASK             (1 << CCM_PCCR_SDHC1_OFFSET)
-#define CCM_PCCR_SDHC2_MASK             (1 << CCM_PCCR_SDHC2_OFFSET)
-#define CCM_PCCR_SLCDC_MASK             (1 << CCM_PCCR_SLCDC_OFFSET)
-#define CCM_PCCR_SSI1_BAUD_MASK         (1 << CCM_PCCR_SSI1_BAUD_OFFSET)
-#define CCM_PCCR_SSI1_IPG_MASK          (1 << CCM_PCCR_SSI1_IPG_OFFSET)
-#define CCM_PCCR_SSI2_BAUD_MASK         (1 << CCM_PCCR_SSI2_BAUD_OFFSET)
-#define CCM_PCCR_SSI2_IPG_MASK          (1 << CCM_PCCR_SSI2_IPG_OFFSET)
-#define CCM_PCCR_UART1_MASK             (1 << CCM_PCCR_UART1_OFFSET)
-#define CCM_PCCR_UART2_MASK             (1 << CCM_PCCR_UART2_OFFSET)
-#define CCM_PCCR_UART3_MASK             (1 << CCM_PCCR_UART3_OFFSET)
-#define CCM_PCCR_UART4_MASK             (1 << CCM_PCCR_UART4_OFFSET)
-#define CCM_PCCR_USBOTG_MASK            (1 << CCM_PCCR_USBOTG_OFFSET)
-#define CCM_PCCR_WDT_MASK               (1 << CCM_PCCR_WDT_OFFSET)
-
-
-#define CCM_CCSR_32KSR          (1 << 15)
-
-#define CCM_CCSR_CLKMODE1       (1 << 9)
-#define CCM_CCSR_CLKMODE0       (1 << 8)
-
-#define CCM_CCSR_CLKOSEL_OFFSET 0
-#define CCM_CCSR_CLKOSEL_MASK   0x1f
-
-#define SYS_FMCR                0x14    /*  Functional Muxing Control Reg */
-#define SYS_CHIP_ID             0x00    /* The offset of CHIP ID register */
-
-#endif /* __ARCH_ARM_MACH_MX2_CRM_REGS_H__ */
diff --git a/arch/arm/mach-mx2/devices.c b/arch/arm/mach-mx2/devices.c
index 3956d82b7c4..b91e412f7b3 100644
--- a/arch/arm/mach-mx2/devices.c
+++ b/arch/arm/mach-mx2/devices.c
@@ -47,65 +47,31 @@
  * - i.MX21: 2 channel
  * - i.MX27: 3 channel
  */
-static struct resource mxc_spi_resources0[] = {
-        {
-               .start = CSPI1_BASE_ADDR,
-               .end = CSPI1_BASE_ADDR + SZ_4K - 1,
-               .flags = IORESOURCE_MEM,
-        }, {
-               .start = MXC_INT_CSPI1,
-               .end = MXC_INT_CSPI1,
-               .flags = IORESOURCE_IRQ,
-        },
-};
-
-static struct resource mxc_spi_resources1[] = {
-        {
-                .start = CSPI2_BASE_ADDR,
-                .end = CSPI2_BASE_ADDR + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        }, {
-                .start = MXC_INT_CSPI2,
-                .end = MXC_INT_CSPI2,
-                .flags = IORESOURCE_IRQ,
-        },
-};
-
-#ifdef CONFIG_MACH_MX27
-static struct resource mxc_spi_resources2[] = {
-        {
-                .start = CSPI3_BASE_ADDR,
-                .end = CSPI3_BASE_ADDR + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        }, {
-                .start = MXC_INT_CSPI3,
-                .end = MXC_INT_CSPI3,
-                .flags = IORESOURCE_IRQ,
-        },
-};
-#endif
-
-struct platform_device mxc_spi_device0 = {
-        .name = "spi_imx",
-        .id = 0,
-        .num_resources = ARRAY_SIZE(mxc_spi_resources0),
-        .resource = mxc_spi_resources0,
-};
+#define DEFINE_IMX_SPI_DEVICE(n, baseaddr, irq)                                 \
+        static struct resource mxc_spi_resources ## n[] = {                     \
+                {                                                               \
+                        .start = baseaddr,                                      \
+                        .end = baseaddr + SZ_4K - 1,                            \
+                        .flags = IORESOURCE_MEM,                                \
+                }, {                                                            \
+                        .start = irq,                                           \
+                        .end = irq,                                             \
+                        .flags = IORESOURCE_IRQ,                                \
+                },                                                              \
+        };                                                                      \
+                                                                                \
+        struct platform_device mxc_spi_device ## n = {                          \
+                .name = "spi_imx",                                              \
+                .id = n,                                                        \
+                .num_resources = ARRAY_SIZE(mxc_spi_resources ## n),            \
+                .resource = mxc_spi_resources ## n,                             \
+        }
 
-struct platform_device mxc_spi_device1 = {
-        .name = "spi_imx",
-        .id = 1,
-        .num_resources = ARRAY_SIZE(mxc_spi_resources1),
-        .resource = mxc_spi_resources1,
-};
+DEFINE_IMX_SPI_DEVICE(0, MX2x_CSPI1_BASE_ADDR, MX2x_INT_CSPI1);
+DEFINE_IMX_SPI_DEVICE(1, MX2x_CSPI2_BASE_ADDR, MX2x_INT_CSPI2);
 
 #ifdef CONFIG_MACH_MX27
-struct platform_device mxc_spi_device2 = {
-        .name = "spi_imx",
-        .id = 2,
-        .num_resources = ARRAY_SIZE(mxc_spi_resources2),
-        .resource = mxc_spi_resources2,
-};
+DEFINE_IMX_SPI_DEVICE(2, MX27_CSPI3_BASE_ADDR, MX27_INT_CSPI3);
 #endif
 
 /*
@@ -113,104 +79,34 @@ struct platform_device mxc_spi_device2 = {
  * - i.MX21: 3 timers
  * - i.MX27: 6 timers
  */
-
-/* We use gpt0 as system timer, so do not add a device for this one */
-
-static struct resource timer1_resources[] = {
-        {
-                .start  = GPT2_BASE_ADDR,
-                .end    = GPT2_BASE_ADDR + 0x17,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start   = MXC_INT_GPT2,
-                .end     = MXC_INT_GPT2,
-                .flags   = IORESOURCE_IRQ,
-        }
-};
-
-struct platform_device mxc_gpt1 = {
-        .name = "imx_gpt",
-        .id = 1,
-        .num_resources = ARRAY_SIZE(timer1_resources),
-        .resource = timer1_resources,
-};
-
-static struct resource timer2_resources[] = {
-        {
-                .start  = GPT3_BASE_ADDR,
-                .end    = GPT3_BASE_ADDR + 0x17,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start   = MXC_INT_GPT3,
-                .end     = MXC_INT_GPT3,
-                .flags   = IORESOURCE_IRQ,
+#define DEFINE_IMX_GPT_DEVICE(n, baseaddr, irq)                         \
+        static struct resource timer ## n ##_resources[] = {            \
+                {                                                       \
+                        .start = baseaddr,                              \
+                        .end = baseaddr + SZ_4K - 1,                    \
+                        .flags = IORESOURCE_MEM,                        \
+                }, {                                                    \
+                        .start = irq,                                   \
+                        .end = irq,                                     \
+                        .flags = IORESOURCE_IRQ,                        \
+                }                                                       \
+        };                                                              \
+                                                                        \
+        struct platform_device mxc_gpt ## n = {                         \
+                .name = "imx_gpt",                                      \
+                .id = n,                                                \
+                .num_resources = ARRAY_SIZE(timer ## n ## _resources),  \
+                .resource = timer ## n ## _resources,                   \
         }
-};
 
-struct platform_device mxc_gpt2 = {
-        .name = "imx_gpt",
-        .id = 2,
-        .num_resources = ARRAY_SIZE(timer2_resources),
-        .resource = timer2_resources,
-};
+/* We use gpt1 as system timer, so do not add a device for this one */
+DEFINE_IMX_GPT_DEVICE(1, MX2x_GPT2_BASE_ADDR, MX2x_INT_GPT2);
+DEFINE_IMX_GPT_DEVICE(2, MX2x_GPT3_BASE_ADDR, MX2x_INT_GPT3);
 
 #ifdef CONFIG_MACH_MX27
-static struct resource timer3_resources[] = {
-        {
-                .start  = GPT4_BASE_ADDR,
-                .end    = GPT4_BASE_ADDR + 0x17,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start   = MXC_INT_GPT4,
-                .end     = MXC_INT_GPT4,
-                .flags   = IORESOURCE_IRQ,
-        }
-};
-
-struct platform_device mxc_gpt3 = {
-        .name = "imx_gpt",
-        .id = 3,
-        .num_resources = ARRAY_SIZE(timer3_resources),
-        .resource = timer3_resources,
-};
-
-static struct resource timer4_resources[] = {
-        {
-                .start  = GPT5_BASE_ADDR,
-                .end    = GPT5_BASE_ADDR + 0x17,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start   = MXC_INT_GPT5,
-                .end     = MXC_INT_GPT5,
-                .flags   = IORESOURCE_IRQ,
-        }
-};
-
-struct platform_device mxc_gpt4 = {
-        .name = "imx_gpt",
-        .id = 4,
-        .num_resources = ARRAY_SIZE(timer4_resources),
-        .resource = timer4_resources,
-};
-
-static struct resource timer5_resources[] = {
-        {
-                .start  = GPT6_BASE_ADDR,
-                .end    = GPT6_BASE_ADDR + 0x17,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start   = MXC_INT_GPT6,
-                .end     = MXC_INT_GPT6,
-                .flags   = IORESOURCE_IRQ,
-        }
-};
-
-struct platform_device mxc_gpt5 = {
-        .name = "imx_gpt",
-        .id = 5,
-        .num_resources = ARRAY_SIZE(timer5_resources),
-        .resource = timer5_resources,
-};
+DEFINE_IMX_GPT_DEVICE(3, MX27_GPT4_BASE_ADDR, MX27_INT_GPT4);
+DEFINE_IMX_GPT_DEVICE(4, MX27_GPT5_BASE_ADDR, MX27_INT_GPT5);
+DEFINE_IMX_GPT_DEVICE(5, MX27_GPT6_BASE_ADDR, MX27_INT_GPT6);
 #endif
 
 /*
@@ -221,9 +117,9 @@ struct platform_device mxc_gpt5 = {
  */
 static struct resource mxc_wdt_resources[] = {
         {
-                .start  = WDOG_BASE_ADDR,
-                .end    = WDOG_BASE_ADDR + 0x30,
-                .flags  = IORESOURCE_MEM,
+                .start = MX2x_WDOG_BASE_ADDR,
+                .end = MX2x_WDOG_BASE_ADDR + SZ_4K - 1,
+                .flags = IORESOURCE_MEM,
         },
 };
 
@@ -236,8 +132,8 @@ struct platform_device mxc_wdt = {
 
 static struct resource mxc_w1_master_resources[] = {
         {
-                .start = OWIRE_BASE_ADDR,
-                .end   = OWIRE_BASE_ADDR + SZ_4K - 1,
+                .start = MX2x_OWIRE_BASE_ADDR,
+                .end = MX2x_OWIRE_BASE_ADDR + SZ_4K - 1,
                 .flags = IORESOURCE_MEM,
         },
 };
@@ -249,24 +145,33 @@ struct platform_device mxc_w1_master_device = {
         .resource = mxc_w1_master_resources,
 };
 
-static struct resource mxc_nand_resources[] = {
-        {
-                .start  = NFC_BASE_ADDR,
-                .end    = NFC_BASE_ADDR + 0xfff,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = MXC_INT_NANDFC,
-                .end    = MXC_INT_NANDFC,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
+#define DEFINE_MXC_NAND_DEVICE(pfx, baseaddr, irq)                      \
+        static struct resource pfx ## _nand_resources[] = {             \
+                {                                                       \
+                        .start = baseaddr,                              \
+                        .end = baseaddr + SZ_4K - 1,                    \
+                        .flags = IORESOURCE_MEM,                        \
+                }, {                                                    \
+                        .start = irq,                                   \
+                        .end = irq,                                     \
+                        .flags = IORESOURCE_IRQ,                        \
+                },                                                      \
+        };                                                              \
+                                                                        \
+        struct platform_device pfx ## _nand_device = {                  \
+                .name = "mxc_nand",                                     \
+                .id = 0,                                                \
+                .num_resources = ARRAY_SIZE(pfx ## _nand_resources),    \
+                .resource = pfx ## _nand_resources,                     \
+        }
 
-struct platform_device mxc_nand_device = {
-        .name = "mxc_nand",
-        .id = 0,
-        .num_resources = ARRAY_SIZE(mxc_nand_resources),
-        .resource = mxc_nand_resources,
-};
+#ifdef CONFIG_MACH_MX21
+DEFINE_MXC_NAND_DEVICE(imx21, MX21_NFC_BASE_ADDR, MX21_INT_NANDFC);
+#endif
+
+#ifdef CONFIG_MACH_MX27
+DEFINE_MXC_NAND_DEVICE(imx27, MX27_NFC_BASE_ADDR, MX27_INT_NANDFC);
+#endif
 
 /*
  * lcdc:
@@ -276,12 +181,12 @@ struct platform_device mxc_nand_device = {
  */
 static struct resource mxc_fb[] = {
         {
-                .start = LCDC_BASE_ADDR,
-                .end   = LCDC_BASE_ADDR + 0xFFF,
+                .start = MX2x_LCDC_BASE_ADDR,
+                .end = MX2x_LCDC_BASE_ADDR + SZ_4K - 1,
                 .flags = IORESOURCE_MEM,
         }, {
-                .start = MXC_INT_LCDC,
-                .end   = MXC_INT_LCDC,
+                .start = MX2x_INT_LCDC,
+                .end = MX2x_INT_LCDC,
                 .flags = IORESOURCE_IRQ,
         }
 };
@@ -300,13 +205,13 @@ struct platform_device mxc_fb_device = {
 #ifdef CONFIG_MACH_MX27
 static struct resource mxc_fec_resources[] = {
         {
-                .start  = FEC_BASE_ADDR,
-                .end    = FEC_BASE_ADDR + 0xfff,
-                .flags  = IORESOURCE_MEM,
+                .start = MX27_FEC_BASE_ADDR,
+                .end = MX27_FEC_BASE_ADDR + SZ_4K - 1,
+                .flags = IORESOURCE_MEM,
         }, {
-                .start  = MXC_INT_FEC,
-                .end    = MXC_INT_FEC,
-                .flags  = IORESOURCE_IRQ,
+                .start = MX27_INT_FEC,
+                .end = MX27_INT_FEC,
+                .flags = IORESOURCE_IRQ,
         },
 };
 
@@ -318,55 +223,41 @@ struct platform_device mxc_fec_device = {
 };
 #endif
 
-static struct resource mxc_i2c_1_resources[] = {
-        {
-                .start  = I2C_BASE_ADDR,
-                .end    = I2C_BASE_ADDR + 0x0fff,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = MXC_INT_I2C,
-                .end    = MXC_INT_I2C,
-                .flags  = IORESOURCE_IRQ,
+#define DEFINE_IMX_I2C_DEVICE(n, baseaddr, irq)                         \
+        static struct resource mxc_i2c_resources ## n[] = {             \
+                {                                                       \
+                        .start = baseaddr,                              \
+                        .end = baseaddr + SZ_4K - 1,                    \
+                        .flags = IORESOURCE_MEM,                        \
+                }, {                                                    \
+                        .start = irq,                                   \
+                        .end = irq,                                     \
+                        .flags = IORESOURCE_IRQ,                        \
+                }                                                       \
+        };                                                              \
+                                                                        \
+        struct platform_device mxc_i2c_device ## n = {                  \
+                .name = "imx-i2c",                                      \
+                .id = n,                                                \
+                .num_resources = ARRAY_SIZE(mxc_i2c_resources ## n),    \
+                .resource = mxc_i2c_resources ## n,                     \
         }
-};
 
-struct platform_device mxc_i2c_device0 = {
-        .name = "imx-i2c",
-        .id = 0,
-        .num_resources = ARRAY_SIZE(mxc_i2c_1_resources),
-        .resource = mxc_i2c_1_resources,
-};
+DEFINE_IMX_I2C_DEVICE(0, MX2x_I2C_BASE_ADDR, MX2x_INT_I2C);
 
 #ifdef CONFIG_MACH_MX27
-static struct resource mxc_i2c_2_resources[] = {
-        {
-                .start  = I2C2_BASE_ADDR,
-                .end    = I2C2_BASE_ADDR + 0x0fff,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = MXC_INT_I2C2,
-                .end    = MXC_INT_I2C2,
-                .flags  = IORESOURCE_IRQ,
-        }
-};
-
-struct platform_device mxc_i2c_device1 = {
-        .name = "imx-i2c",
-        .id = 1,
-        .num_resources = ARRAY_SIZE(mxc_i2c_2_resources),
-        .resource = mxc_i2c_2_resources,
-};
+DEFINE_IMX_I2C_DEVICE(1, MX27_I2C2_BASE_ADDR, MX27_INT_I2C2);
 #endif
 
 static struct resource mxc_pwm_resources[] = {
         {
-                .start  = PWM_BASE_ADDR,
-                .end    = PWM_BASE_ADDR + 0x0fff,
-                .flags  = IORESOURCE_MEM,
+                .start = MX2x_PWM_BASE_ADDR,
+                .end = MX2x_PWM_BASE_ADDR + SZ_4K - 1,
+                .flags = IORESOURCE_MEM,
         }, {
-                .start   = MXC_INT_PWM,
-                .end     = MXC_INT_PWM,
-                .flags   = IORESOURCE_IRQ,
+                .start = MX2x_INT_PWM,
+                .end = MX2x_INT_PWM,
+                .flags = IORESOURCE_IRQ,
         }
 };
 
@@ -377,77 +268,49 @@ struct platform_device mxc_pwm_device = {
         .resource = mxc_pwm_resources,
 };
 
-/*
- * Resource definition for the MXC SDHC
- */
-static struct resource mxc_sdhc1_resources[] = {
-        {
-                .start = SDHC1_BASE_ADDR,
-                .end   = SDHC1_BASE_ADDR + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        }, {
-                .start = MXC_INT_SDHC1,
-                .end   = MXC_INT_SDHC1,
-                .flags = IORESOURCE_IRQ,
-        }, {
-                .start  = DMA_REQ_SDHC1,
-                .end    = DMA_REQ_SDHC1,
-                .flags  = IORESOURCE_DMA,
-        },
-};
-
-static u64 mxc_sdhc1_dmamask = DMA_BIT_MASK(32);
-
-struct platform_device mxc_sdhc_device0 = {
-        .name           = "mxc-mmc",
-        .id             = 0,
-        .dev            = {
-                .dma_mask = &mxc_sdhc1_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-        },
-        .num_resources  = ARRAY_SIZE(mxc_sdhc1_resources),
-        .resource       = mxc_sdhc1_resources,
-};
-
-static struct resource mxc_sdhc2_resources[] = {
-        {
-                .start = SDHC2_BASE_ADDR,
-                .end   = SDHC2_BASE_ADDR + SZ_4K - 1,
-                .flags = IORESOURCE_MEM,
-        }, {
-                .start = MXC_INT_SDHC2,
-                .end   = MXC_INT_SDHC2,
-                .flags = IORESOURCE_IRQ,
-        }, {
-                .start  = DMA_REQ_SDHC2,
-                .end    = DMA_REQ_SDHC2,
-                .flags  = IORESOURCE_DMA,
-        },
-};
-
-static u64 mxc_sdhc2_dmamask = DMA_BIT_MASK(32);
+#define DEFINE_MXC_MMC_DEVICE(n, baseaddr, irq, dmareq)                 \
+        static struct resource mxc_sdhc_resources ## n[] = {            \
+                {                                                       \
+                        .start = baseaddr,                              \
+                        .end = baseaddr + SZ_4K - 1,                    \
+                        .flags = IORESOURCE_MEM,                        \
+                }, {                                                    \
+                        .start = irq,                                   \
+                        .end = irq,                                     \
+                        .flags = IORESOURCE_IRQ,                        \
+                }, {                                                    \
+                        .start = dmareq,                                \
+                        .end = dmareq,                                  \
+                        .flags = IORESOURCE_DMA,                        \
+                },                                                      \
+        };                                                              \
+                                                                        \
+        static u64 mxc_sdhc ## n ## _dmamask = DMA_BIT_MASK(32);        \
+                                                                        \
+        struct platform_device mxc_sdhc_device ## n = {                 \
+                .name = "mxc-mmc",                                      \
+                .id = n,                                                \
+                .dev = {                                                \
+                        .dma_mask = &mxc_sdhc ## n ## _dmamask,         \
+                        .coherent_dma_mask = DMA_BIT_MASK(32),          \
+                },                                                      \
+                .num_resources = ARRAY_SIZE(mxc_sdhc_resources ## n),   \
+                .resource = mxc_sdhc_resources ## n,            \
+        }
 
-struct platform_device mxc_sdhc_device1 = {
-        .name           = "mxc-mmc",
-        .id             = 1,
-        .dev            = {
-                .dma_mask = &mxc_sdhc2_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-        },
-        .num_resources  = ARRAY_SIZE(mxc_sdhc2_resources),
-        .resource       = mxc_sdhc2_resources,
-};
+DEFINE_MXC_MMC_DEVICE(0, MX2x_SDHC1_BASE_ADDR, MX2x_INT_SDHC1, MX2x_DMA_REQ_SDHC1);
+DEFINE_MXC_MMC_DEVICE(1, MX2x_SDHC2_BASE_ADDR, MX2x_INT_SDHC2, MX2x_DMA_REQ_SDHC2);
 
 #ifdef CONFIG_MACH_MX27
 static struct resource otg_resources[] = {
         {
-                .start  = OTG_BASE_ADDR,
-                .end    = OTG_BASE_ADDR + 0x1ff,
-                .flags  = IORESOURCE_MEM,
+                .start = MX27_USBOTG_BASE_ADDR,
+                .end = MX27_USBOTG_BASE_ADDR + 0x1ff,
+                .flags = IORESOURCE_MEM,
         }, {
-                .start  = MXC_INT_USB3,
-                .end    = MXC_INT_USB3,
-                .flags  = IORESOURCE_IRQ,
+                .start = MX27_INT_USB3,
+                .end = MX27_INT_USB3,
+                .flags = IORESOURCE_IRQ,
         },
 };
 
@@ -483,12 +346,12 @@ static u64 usbh1_dmamask = DMA_BIT_MASK(32);
 
 static struct resource mxc_usbh1_resources[] = {
         {
-                .start = OTG_BASE_ADDR + 0x200,
-                .end = OTG_BASE_ADDR + 0x3ff,
+                .start = MX27_USBOTG_BASE_ADDR + 0x200,
+                .end = MX27_USBOTG_BASE_ADDR + 0x3ff,
                 .flags = IORESOURCE_MEM,
         }, {
-                .start = MXC_INT_USB1,
-                .end = MXC_INT_USB1,
+                .start = MX27_INT_USB1,
+                .end = MX27_INT_USB1,
                 .flags = IORESOURCE_IRQ,
         },
 };
@@ -509,12 +372,12 @@ static u64 usbh2_dmamask = DMA_BIT_MASK(32);
 
 static struct resource mxc_usbh2_resources[] = {
         {
-                .start = OTG_BASE_ADDR + 0x400,
-                .end = OTG_BASE_ADDR + 0x5ff,
+                .start = MX27_USBOTG_BASE_ADDR + 0x400,
+                .end = MX27_USBOTG_BASE_ADDR + 0x5ff,
                 .flags = IORESOURCE_MEM,
         }, {
-                .start = MXC_INT_USB2,
-                .end = MXC_INT_USB2,
+                .start = MX27_INT_USB2,
+                .end = MX27_INT_USB2,
                 .flags = IORESOURCE_IRQ,
         },
 };
@@ -531,129 +394,102 @@ struct platform_device mxc_usbh2 = {
 };
 #endif
 
-static struct resource imx_ssi_resources0[] = {
-        {
-                .start  = SSI1_BASE_ADDR,
-                .end    = SSI1_BASE_ADDR + 0x6F,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = MXC_INT_SSI1,
-                .end    = MXC_INT_SSI1,
-                .flags  = IORESOURCE_IRQ,
-        }, {
-                .name   = "tx0",
-                .start  = DMA_REQ_SSI1_TX0,
-                .end    = DMA_REQ_SSI1_TX0,
-                .flags  = IORESOURCE_DMA,
-        }, {
-                .name   = "rx0",
-                .start  = DMA_REQ_SSI1_RX0,
-                .end    = DMA_REQ_SSI1_RX0,
-                .flags  = IORESOURCE_DMA,
-        }, {
-                .name   = "tx1",
-                .start  = DMA_REQ_SSI1_TX1,
-                .end    = DMA_REQ_SSI1_TX1,
-                .flags  = IORESOURCE_DMA,
-        }, {
-                .name   = "rx1",
-                .start  = DMA_REQ_SSI1_RX1,
-                .end    = DMA_REQ_SSI1_RX1,
-                .flags  = IORESOURCE_DMA,
-        },
-};
-
-static struct resource imx_ssi_resources1[] = {
-        {
-                .start  = SSI2_BASE_ADDR,
-                .end    = SSI2_BASE_ADDR + 0x6F,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = MXC_INT_SSI2,
-                .end    = MXC_INT_SSI2,
-                .flags  = IORESOURCE_IRQ,
-        }, {
-                .name   = "tx0",
-                .start  = DMA_REQ_SSI2_TX0,
-                .end    = DMA_REQ_SSI2_TX0,
-                .flags  = IORESOURCE_DMA,
-        }, {
-                .name   = "rx0",
-                .start  = DMA_REQ_SSI2_RX0,
-                .end    = DMA_REQ_SSI2_RX0,
-                .flags  = IORESOURCE_DMA,
-        }, {
-                .name   = "tx1",
-                .start  = DMA_REQ_SSI2_TX1,
-                .end    = DMA_REQ_SSI2_TX1,
-                .flags  = IORESOURCE_DMA,
-        }, {
-                .name   = "rx1",
-                .start  = DMA_REQ_SSI2_RX1,
-                .end    = DMA_REQ_SSI2_RX1,
-                .flags  = IORESOURCE_DMA,
-        },
-};
+#define DEFINE_IMX_SSI_DMARES(_name, ssin, suffix)                      \
+        {                                                               \
+                .name = _name,                                          \
+                .start = MX2x_DMA_REQ_SSI ## ssin ## _ ## suffix,       \
+                .end = MX2x_DMA_REQ_SSI ## ssin ## _ ## suffix,         \
+                .flags = IORESOURCE_DMA,                                \
+        }
 
-struct platform_device imx_ssi_device0 = {
-        .name = "imx-ssi",
-        .id = 0,
-        .num_resources = ARRAY_SIZE(imx_ssi_resources0),
-        .resource = imx_ssi_resources0,
-};
+#define DEFINE_IMX_SSI_DEVICE(n, ssin, baseaddr, irq)                   \
+        static struct resource imx_ssi_resources ## n[] = {             \
+                {                                                       \
+                        .start = MX2x_SSI ## ssin ## _BASE_ADDR,        \
+                        .end = MX2x_SSI ## ssin ## _BASE_ADDR + 0x6f,   \
+                        .flags = IORESOURCE_MEM,                        \
+                }, {                                                    \
+                        .start = MX2x_INT_SSI1,                         \
+                        .end = MX2x_INT_SSI1,                           \
+                        .flags = IORESOURCE_IRQ,                        \
+                },                                                      \
+                DEFINE_IMX_SSI_DMARES("tx0", ssin, TX0),                \
+                DEFINE_IMX_SSI_DMARES("rx0", ssin, RX0),                \
+                DEFINE_IMX_SSI_DMARES("tx1", ssin, TX1),                \
+                DEFINE_IMX_SSI_DMARES("rx1", ssin, RX1),                \
+        };                                                              \
+                                                                        \
+        struct platform_device imx_ssi_device ## n = {                  \
+                .name = "imx-ssi",                                      \
+                .id = n,                                                \
+                .num_resources = ARRAY_SIZE(imx_ssi_resources ## n),    \
+                .resource = imx_ssi_resources ## n,                     \
+        }
 
-struct platform_device imx_ssi_device1 = {
-        .name = "imx-ssi",
-        .id = 1,
-        .num_resources = ARRAY_SIZE(imx_ssi_resources1),
-        .resource = imx_ssi_resources1,
-};
+DEFINE_IMX_SSI_DEVICE(0, 1, MX2x_SSI1_BASE_ADDR, MX2x_INT_SSI1);
+DEFINE_IMX_SSI_DEVICE(1, 2, MX2x_SSI1_BASE_ADDR, MX2x_INT_SSI1);
 
 /* GPIO port description */
-static struct mxc_gpio_port imx_gpio_ports[] = {
-        {
-                .chip.label = "gpio-0",
-                .irq = MXC_INT_GPIO,
-                .base = IO_ADDRESS(GPIO_BASE_ADDR),
-                .virtual_irq_start = MXC_GPIO_IRQ_START,
-        }, {
-                .chip.label = "gpio-1",
-                .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x100),
-                .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
-        }, {
-                .chip.label = "gpio-2",
-                .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x200),
-                .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
-        }, {
-                .chip.label = "gpio-3",
-                .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x300),
-                .virtual_irq_start = MXC_GPIO_IRQ_START + 96,
-        }, {
-                .chip.label = "gpio-4",
-                .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x400),
-                .virtual_irq_start = MXC_GPIO_IRQ_START + 128,
-        }, {
-                .chip.label = "gpio-5",
-                .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x500),
-                .virtual_irq_start = MXC_GPIO_IRQ_START + 160,
+#define DEFINE_MXC_GPIO_PORT_IRQ(SOC, n, _irq)                          \
+        {                                                               \
+                .chip.label = "gpio-" #n,                               \
+                .irq = _irq,                                            \
+                .base = SOC ## _IO_ADDRESS(MX2x_GPIO_BASE_ADDR +        \
+                                n * 0x100),                             \
+                .virtual_irq_start = MXC_GPIO_IRQ_START + n * 32,       \
         }
-};
+
+#define DEFINE_MXC_GPIO_PORT(SOC, n)                                    \
+        {                                                               \
+                .chip.label = "gpio-" #n,                               \
+                .base = SOC ## _IO_ADDRESS(MX2x_GPIO_BASE_ADDR +        \
+                                n * 0x100),                             \
+                .virtual_irq_start = MXC_GPIO_IRQ_START + n * 32,       \
+        }
+
+#define DEFINE_MXC_GPIO_PORTS(SOC, pfx)                                 \
+        static struct mxc_gpio_port pfx ## _gpio_ports[] = {            \
+                DEFINE_MXC_GPIO_PORT_IRQ(SOC, 0, SOC ## _INT_GPIO),     \
+                DEFINE_MXC_GPIO_PORT(SOC, 1),                           \
+                DEFINE_MXC_GPIO_PORT(SOC, 2),                           \
+                DEFINE_MXC_GPIO_PORT(SOC, 3),                           \
+                DEFINE_MXC_GPIO_PORT(SOC, 4),                           \
+                DEFINE_MXC_GPIO_PORT(SOC, 5),                           \
+        }
+
+#ifdef CONFIG_MACH_MX21
+DEFINE_MXC_GPIO_PORTS(MX21, imx21);
+#endif
+
+#ifdef CONFIG_MACH_MX27
+DEFINE_MXC_GPIO_PORTS(MX27, imx27);
+#endif
 
 int __init mxc_register_gpios(void)
 {
-        return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
+#ifdef CONFIG_MACH_MX21
+        if (cpu_is_mx21())
+                return mxc_gpio_init(imx21_gpio_ports, ARRAY_SIZE(imx21_gpio_ports));
+        else
+#endif
+#ifdef CONFIG_MACH_MX27
+        if (cpu_is_mx27())
+                return mxc_gpio_init(imx27_gpio_ports, ARRAY_SIZE(imx27_gpio_ports));
+        else
+#endif
+                return 0;
 }
 
 #ifdef CONFIG_MACH_MX21
 static struct resource mx21_usbhc_resources[] = {
         {
-                .start  = USBOTG_BASE_ADDR,
-                .end    = USBOTG_BASE_ADDR + 0x1FFF,
+                .start  = MX21_BASE_ADDR,
+                .end    = MX21_BASE_ADDR + 0x1FFF,
                 .flags  = IORESOURCE_MEM,
         },
         {
-                .start          = MXC_INT_USBHOST,
-                .end            = MXC_INT_USBHOST,
+                .start          = MX21_INT_USBHOST,
+                .end            = MX21_INT_USBHOST,
                 .flags          = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/arm/mach-mx2/devices.h b/arch/arm/mach-mx2/devices.h
index f12694b0736..84ed5138017 100644
--- a/arch/arm/mach-mx2/devices.h
+++ b/arch/arm/mach-mx2/devices.h
@@ -1,8 +1,10 @@
 extern struct platform_device mxc_gpt1;
 extern struct platform_device mxc_gpt2;
+#ifdef CONFIG_MACH_MX27
 extern struct platform_device mxc_gpt3;
 extern struct platform_device mxc_gpt4;
 extern struct platform_device mxc_gpt5;
+#endif
 extern struct platform_device mxc_wdt;
 extern struct platform_device mxc_uart_device0;
 extern struct platform_device mxc_uart_device1;
@@ -11,12 +13,19 @@ extern struct platform_device mxc_uart_device3;
 extern struct platform_device mxc_uart_device4;
 extern struct platform_device mxc_uart_device5;
 extern struct platform_device mxc_w1_master_device;
-extern struct platform_device mxc_nand_device;
+#ifdef CONFIG_MACH_MX21
+extern struct platform_device imx21_nand_device;
+#endif
+#ifdef CONFIG_MACH_MX27
+extern struct platform_device imx27_nand_device;
+#endif
 extern struct platform_device mxc_fb_device;
 extern struct platform_device mxc_fec_device;
 extern struct platform_device mxc_pwm_device;
 extern struct platform_device mxc_i2c_device0;
+#ifdef CONFIG_MACH_MX27
 extern struct platform_device mxc_i2c_device1;
+#endif
 extern struct platform_device mxc_sdhc_device0;
 extern struct platform_device mxc_sdhc_device1;
 extern struct platform_device mxc_otg_udc_device;
@@ -25,7 +34,9 @@ extern struct platform_device mxc_usbh1;
 extern struct platform_device mxc_usbh2;
 extern struct platform_device mxc_spi_device0;
 extern struct platform_device mxc_spi_device1;
+#ifdef CONFIG_MACH_MX27
 extern struct platform_device mxc_spi_device2;
+#endif
 extern struct platform_device mx21_usbhc_device;
 extern struct platform_device imx_ssi_device0;
 extern struct platform_device imx_ssi_device1;
diff --git a/arch/arm/mach-mx2/eukrea_mbimx27-baseboard.c b/arch/arm/mach-mx2/eukrea_mbimx27-baseboard.c
index 7382b6d27ee..f3b169d5245 100644
--- a/arch/arm/mach-mx2/eukrea_mbimx27-baseboard.c
+++ b/arch/arm/mach-mx2/eukrea_mbimx27-baseboard.c
@@ -28,7 +28,7 @@
 #include <asm/mach/arch.h>
 
 #include <mach/common.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx27.h>
 #include <mach/imxfb.h>
 #include <mach/hardware.h>
 #include <mach/mmc.h>
diff --git a/arch/arm/mach-mx2/eukrea_cpuimx27.c b/arch/arm/mach-mx2/mach-cpuimx27.c
index 7b187606682..1f616dcaabc 100644
--- a/arch/arm/mach-mx2/eukrea_cpuimx27.c
+++ b/arch/arm/mach-mx2/mach-cpuimx27.c
@@ -36,7 +36,7 @@
 #include <mach/common.h>
 #include <mach/hardware.h>
 #include <mach/i2c.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx27.h>
 #include <mach/imx-uart.h>
 #include <mach/mxc_nand.h>
 
@@ -142,28 +142,28 @@ static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
 static struct plat_serial8250_port serial_platform_data[] = {
         {
-                .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x200000),
+                .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
                 .irq = IRQ_GPIOB(23),
                 .uartclk = 14745600,
                 .regshift = 1,
                 .iotype = UPIO_MEM,
                 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
         }, {
-                .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x400000),
+                .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
                 .irq = IRQ_GPIOB(22),
                 .uartclk = 14745600,
                 .regshift = 1,
                 .iotype = UPIO_MEM,
                 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
         }, {
-                .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x800000),
+                .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
                 .irq = IRQ_GPIOB(27),
                 .uartclk = 14745600,
                 .regshift = 1,
                 .iotype = UPIO_MEM,
                 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
         }, {
-                .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x1000000),
+                .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
                 .irq = IRQ_GPIOB(30),
                 .uartclk = 14745600,
                 .regshift = 1,
@@ -189,7 +189,8 @@ static void __init eukrea_cpuimx27_init(void)
 
         mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
 
-        mxc_register_device(&mxc_nand_device, &eukrea_cpuimx27_nand_board_info);
+        mxc_register_device(&imx27_nand_device,
+                        &eukrea_cpuimx27_nand_board_info);
 
         i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
                                 ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
@@ -224,9 +225,9 @@ static struct sys_timer eukrea_cpuimx27_timer = {
 };
 
 MACHINE_START(CPUIMX27, "EUKREA CPUIMX27")
-        .phys_io        = AIPI_BASE_ADDR,
-        .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX27_AIPI_BASE_ADDR,
+        .io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = MX27_PHYS_OFFSET + 0x100,
         .map_io         = mx27_map_io,
         .init_irq       = mx27_init_irq,
         .init_machine   = eukrea_cpuimx27_init,
diff --git a/arch/arm/mach-mx2/mx27lite.c b/arch/arm/mach-mx2/mach-imx27lite.c
index 82ea227ea0c..b5710bf18b9 100644
--- a/arch/arm/mach-mx2/mx27lite.c
+++ b/arch/arm/mach-mx2/mach-imx27lite.c
@@ -27,7 +27,7 @@
 #include <mach/hardware.h>
 #include <mach/common.h>
 #include <mach/imx-uart.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx27.h>
 #include <mach/board-mx27lite.h>
 
 #include "devices.h"
@@ -85,9 +85,9 @@ static struct sys_timer mx27lite_timer = {
 };
 
 MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE")
-        .phys_io        = AIPI_BASE_ADDR,
-        .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX27_AIPI_BASE_ADDR,
+        .io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = MX27_PHYS_OFFSET + 0x100,
         .map_io         = mx27_map_io,
         .init_irq       = mx27_init_irq,
         .init_machine   = mx27lite_init,
diff --git a/arch/arm/mach-mx2/mx21ads.c b/arch/arm/mach-mx2/mach-mx21ads.c
index cf5f77cbc2f..113e58d7cb4 100644
--- a/arch/arm/mach-mx2/mx21ads.c
+++ b/arch/arm/mach-mx2/mach-mx21ads.c
@@ -30,7 +30,7 @@
 #include <asm/mach/map.h>
 #include <mach/imx-uart.h>
 #include <mach/imxfb.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx21.h>
 #include <mach/mxc_nand.h>
 #include <mach/mmc.h>
 #include <mach/board-mx21ads.h>
@@ -118,8 +118,8 @@ static struct physmap_flash_data mx21ads_flash_data = {
 };
 
 static struct resource mx21ads_flash_resource = {
-        .start = CS0_BASE_ADDR,
-        .end = CS0_BASE_ADDR + 0x02000000 - 1,
+        .start = MX21_CS0_BASE_ADDR,
+        .end = MX21_CS0_BASE_ADDR + 0x02000000 - 1,
         .flags = IORESOURCE_MEM,
 };
 
@@ -242,7 +242,7 @@ static struct map_desc mx21ads_io_desc[] __initdata = {
          */
         {
                 .virtual = MX21ADS_MMIO_BASE_ADDR,
-                .pfn = __phys_to_pfn(CS1_BASE_ADDR),
+                .pfn = __phys_to_pfn(MX21_CS1_BASE_ADDR),
                 .length = MX21ADS_MMIO_SIZE,
                 .type = MT_DEVICE,
         },
@@ -268,7 +268,7 @@ static void __init mx21ads_board_init(void)
         mxc_register_device(&mxc_uart_device3, &uart_pdata);
         mxc_register_device(&mxc_fb_device, &mx21ads_fb_data);
         mxc_register_device(&mxc_sdhc_device0, &mx21ads_sdhc_pdata);
-        mxc_register_device(&mxc_nand_device, &mx21ads_nand_board_info);
+        mxc_register_device(&imx21_nand_device, &mx21ads_nand_board_info);
 
         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 }
@@ -284,9 +284,9 @@ static struct sys_timer mx21ads_timer = {
 
 MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
         /* maintainer: Freescale Semiconductor, Inc. */
-        .phys_io        = AIPI_BASE_ADDR,
-        .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX21_AIPI_BASE_ADDR,
+        .io_pg_offst    = ((MX21_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = MX21_PHYS_OFFSET + 0x100,
         .map_io         = mx21ads_map_io,
         .init_irq       = mx21_init_irq,
         .init_machine   = mx21ads_board_init,
diff --git a/arch/arm/mach-mx2/mx27pdk.c b/arch/arm/mach-mx2/mach-mx27_3ds.c
index 6761d1b79e4..b2f4e0db3fb 100644
--- a/arch/arm/mach-mx2/mx27pdk.c
+++ b/arch/arm/mach-mx2/mach-mx27_3ds.c
@@ -26,7 +26,7 @@
 #include <mach/hardware.h>
 #include <mach/common.h>
 #include <mach/imx-uart.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx27.h>
 #include <mach/board-mx27pdk.h>
 
 #include "devices.h"
@@ -85,9 +85,9 @@ static struct sys_timer mx27pdk_timer = {
 
 MACHINE_START(MX27_3DS, "Freescale MX27PDK")
         /* maintainer: Freescale Semiconductor, Inc. */
-        .phys_io        = AIPI_BASE_ADDR,
-        .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX27_AIPI_BASE_ADDR,
+        .io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = MX27_PHYS_OFFSET + 0x100,
         .map_io         = mx27_map_io,
         .init_irq       = mx27_init_irq,
         .init_machine   = mx27pdk_init,
diff --git a/arch/arm/mach-mx2/mx27ads.c b/arch/arm/mach-mx2/mach-mx27ads.c
index 83e412b713e..6ce323669e5 100644
--- a/arch/arm/mach-mx2/mx27ads.c
+++ b/arch/arm/mach-mx2/mach-mx27ads.c
@@ -33,7 +33,7 @@
 #include <asm/mach/map.h>
 #include <mach/gpio.h>
 #include <mach/imx-uart.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx27.h>
 #include <mach/board-mx27ads.h>
 #include <mach/mxc_nand.h>
 #include <mach/i2c.h>
@@ -290,7 +290,7 @@ static void __init mx27ads_board_init(void)
         mxc_register_device(&mxc_uart_device3, &uart_pdata[3]);
         mxc_register_device(&mxc_uart_device4, &uart_pdata[4]);
         mxc_register_device(&mxc_uart_device5, &uart_pdata[5]);
-        mxc_register_device(&mxc_nand_device, &mx27ads_nand_board_info);
+        mxc_register_device(&imx27_nand_device, &mx27ads_nand_board_info);
 
         /* only the i2c master 1 is used on this CPU card */
         i2c_register_board_info(1, mx27ads_i2c_devices,
@@ -320,7 +320,7 @@ static struct sys_timer mx27ads_timer = {
 static struct map_desc mx27ads_io_desc[] __initdata = {
         {
                 .virtual = PBC_BASE_ADDRESS,
-                .pfn = __phys_to_pfn(CS4_BASE_ADDR),
+                .pfn = __phys_to_pfn(MX27_CS4_BASE_ADDR),
                 .length = SZ_1M,
                 .type = MT_DEVICE,
         },
@@ -334,9 +334,9 @@ static void __init mx27ads_map_io(void)
 
 MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
         /* maintainer: Freescale Semiconductor, Inc. */
-        .phys_io        = AIPI_BASE_ADDR,
-        .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX27_AIPI_BASE_ADDR,
+        .io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = MX27_PHYS_OFFSET + 0x100,
         .map_io         = mx27ads_map_io,
         .init_irq       = mx27_init_irq,
         .init_machine   = mx27ads_board_init,
diff --git a/arch/arm/mach-mx2/mxt_td60.c b/arch/arm/mach-mx2/mach-mxt_td60.c
index 8bcc1a5b882..bc385599267 100644
--- a/arch/arm/mach-mx2/mxt_td60.c
+++ b/arch/arm/mach-mx2/mach-mxt_td60.c
@@ -33,7 +33,7 @@
 #include <asm/mach/map.h>
 #include <linux/gpio.h>
 #include <mach/imx-uart.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx27.h>
 #include <mach/mxc_nand.h>
 #include <mach/i2c.h>
 #include <linux/i2c/pca953x.h>
@@ -257,7 +257,7 @@ static void __init mxt_td60_board_init(void)
         mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
         mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
         mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
-        mxc_register_device(&mxc_nand_device, &mxt_td60_nand_board_info);
+        mxc_register_device(&imx27_nand_device, &mxt_td60_nand_board_info);
 
         i2c_register_board_info(0, mxt_td60_i2c_devices,
                                 ARRAY_SIZE(mxt_td60_i2c_devices));
@@ -284,9 +284,9 @@ static struct sys_timer mxt_td60_timer = {
 
 MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60")
         /* maintainer: Maxtrack Industrial */
-        .phys_io        = AIPI_BASE_ADDR,
-        .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX27_AIPI_BASE_ADDR,
+        .io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = MX27_PHYS_OFFSET + 0x100,
         .map_io         = mx27_map_io,
         .init_irq       = mx27_init_irq,
         .init_machine   = mxt_td60_board_init,
diff --git a/arch/arm/mach-mx2/pca100.c b/arch/arm/mach-mx2/mach-pca100.c
index aea3d340d2e..778fff23091 100644
--- a/arch/arm/mach-mx2/pca100.c
+++ b/arch/arm/mach-mx2/mach-pca100.c
@@ -25,25 +25,36 @@
 #include <linux/spi/spi.h>
 #include <linux/spi/eeprom.h>
 #include <linux/irq.h>
+#include <linux/delay.h>
 #include <linux/gpio.h>
+#include <linux/usb/otg.h>
+#include <linux/usb/ulpi.h>
+#include <linux/fsl_devices.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 #include <mach/common.h>
 #include <mach/hardware.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx27.h>
 #include <mach/i2c.h>
 #include <asm/mach/time.h>
 #if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
 #include <mach/spi.h>
 #endif
 #include <mach/imx-uart.h>
+#include <mach/audmux.h>
+#include <mach/ssi.h>
 #include <mach/mxc_nand.h>
 #include <mach/irqs.h>
 #include <mach/mmc.h>
+#include <mach/mxc_ehci.h>
+#include <mach/ulpi.h>
 
 #include "devices.h"
 
+#define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
+#define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24)
+
 static int pca100_pins[] = {
         /* UART1 */
         PE12_PF_UART1_TXD,
@@ -92,6 +103,34 @@ static int pca100_pins[] = {
         PD29_PF_CSPI1_SCLK,
         PD30_PF_CSPI1_MISO,
         PD31_PF_CSPI1_MOSI,
+        /* OTG */
+        OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
+        PC7_PF_USBOTG_DATA5,
+        PC8_PF_USBOTG_DATA6,
+        PC9_PF_USBOTG_DATA0,
+        PC10_PF_USBOTG_DATA2,
+        PC11_PF_USBOTG_DATA1,
+        PC12_PF_USBOTG_DATA4,
+        PC13_PF_USBOTG_DATA3,
+        PE0_PF_USBOTG_NXT,
+        PE1_PF_USBOTG_STP,
+        PE2_PF_USBOTG_DIR,
+        PE24_PF_USBOTG_CLK,
+        PE25_PF_USBOTG_DATA7,
+        /* USBH2 */
+        USBH2_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
+        PA0_PF_USBH2_CLK,
+        PA1_PF_USBH2_DIR,
+        PA2_PF_USBH2_DATA7,
+        PA3_PF_USBH2_NXT,
+        PA4_PF_USBH2_STP,
+        PD19_AF_USBH2_DATA4,
+        PD20_AF_USBH2_DATA3,
+        PD21_AF_USBH2_DATA6,
+        PD22_AF_USBH2_DATA0,
+        PD23_AF_USBH2_DATA2,
+        PD24_AF_USBH2_DATA1,
+        PD26_AF_USBH2_DATA5,
 };
 
 static struct imxuart_platform_data uart_pdata = {
@@ -157,6 +196,37 @@ static struct spi_imx_master pca100_spi_0_data = {
 };
 #endif
 
+static void pca100_ac97_warm_reset(struct snd_ac97 *ac97)
+{
+        mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT);
+        gpio_set_value(GPIO_PORTC + 20, 1);
+        udelay(2);
+        gpio_set_value(GPIO_PORTC + 20, 0);
+        mxc_gpio_mode(PC20_PF_SSI1_FS);
+        msleep(2);
+}
+
+static void pca100_ac97_cold_reset(struct snd_ac97 *ac97)
+{
+        mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT);  /* FS */
+        gpio_set_value(GPIO_PORTC + 20, 0);
+        mxc_gpio_mode(GPIO_PORTC | 22 | GPIO_GPIO | GPIO_OUT);  /* TX */
+        gpio_set_value(GPIO_PORTC + 22, 0);
+        mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_OUT);  /* reset */
+        gpio_set_value(GPIO_PORTC + 28, 0);
+        udelay(10);
+        gpio_set_value(GPIO_PORTC + 28, 1);
+        mxc_gpio_mode(PC20_PF_SSI1_FS);
+        mxc_gpio_mode(PC22_PF_SSI1_TXD);
+        msleep(2);
+}
+
+static struct imx_ssi_platform_data pca100_ssi_pdata = {
+        .ac97_reset             = pca100_ac97_cold_reset,
+        .ac97_warm_reset        = pca100_ac97_warm_reset,
+        .flags                  = IMX_SSI_USE_AC97,
+};
+
 static int pca100_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
                 void *data)
 {
@@ -182,21 +252,79 @@ static struct imxmmc_platform_data sdhc_pdata = {
         .exit = pca100_sdhc2_exit,
 };
 
+static int otg_phy_init(struct platform_device *pdev)
+{
+        gpio_set_value(OTG_PHY_CS_GPIO, 0);
+        return 0;
+}
+
+static struct mxc_usbh_platform_data otg_pdata = {
+        .init   = otg_phy_init,
+        .portsc = MXC_EHCI_MODE_ULPI,
+        .flags  = MXC_EHCI_INTERFACE_DIFF_UNI,
+};
+
+static int usbh2_phy_init(struct platform_device *pdev)
+{
+        gpio_set_value(USBH2_PHY_CS_GPIO, 0);
+        return 0;
+}
+
+static struct mxc_usbh_platform_data usbh2_pdata = {
+        .init   = usbh2_phy_init,
+        .portsc = MXC_EHCI_MODE_ULPI,
+        .flags  = MXC_EHCI_INTERFACE_DIFF_UNI,
+};
+
+static struct fsl_usb2_platform_data otg_device_pdata = {
+        .operating_mode = FSL_USB2_DR_DEVICE,
+        .phy_mode       = FSL_USB2_PHY_ULPI,
+};
+
+static int otg_mode_host;
+
+static int __init pca100_otg_mode(char *options)
+{
+        if (!strcmp(options, "host"))
+                otg_mode_host = 1;
+        else if (!strcmp(options, "device"))
+                otg_mode_host = 0;
+        else
+                pr_info("otg_mode neither \"host\" nor \"device\". "
+                        "Defaulting to device\n");
+        return 0;
+}
+__setup("otg_mode=", pca100_otg_mode);
+
 static void __init pca100_init(void)
 {
         int ret;
 
+        /* SSI unit */
+        mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
+                                  MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */
+                                  MXC_AUDMUX_V1_PCR_TFCSEL(3) |
+                                  MXC_AUDMUX_V1_PCR_TCLKDIR | /* clock is output */
+                                  MXC_AUDMUX_V1_PCR_RXDSEL(3));
+        mxc_audmux_v1_configure_port(3,
+                                  MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */
+                                  MXC_AUDMUX_V1_PCR_TFCSEL(0) |
+                                  MXC_AUDMUX_V1_PCR_TFSDIR |
+                                  MXC_AUDMUX_V1_PCR_RXDSEL(0));
+
         ret = mxc_gpio_setup_multiple_pins(pca100_pins,
                         ARRAY_SIZE(pca100_pins), "PCA100");
         if (ret)
                 printk(KERN_ERR "pca100: Failed to setup pins (%d)\n", ret);
 
+        mxc_register_device(&imx_ssi_device0, &pca100_ssi_pdata);
+
         mxc_register_device(&mxc_uart_device0, &uart_pdata);
 
         mxc_gpio_mode(GPIO_PORTC | 29 | GPIO_GPIO | GPIO_IN);
         mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata);
 
-        mxc_register_device(&mxc_nand_device, &pca100_nand_board_info);
+        mxc_register_device(&imx27_nand_device, &pca100_nand_board_info);
 
         /* only the i2c master 1 is used on this CPU card */
         i2c_register_board_info(1, pca100_i2c_devices,
@@ -220,6 +348,29 @@ static void __init pca100_init(void)
         mxc_register_device(&mxc_spi_device0, &pca100_spi_0_data);
 #endif
 
+        gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs");
+        gpio_direction_output(OTG_PHY_CS_GPIO, 1);
+        gpio_request(USBH2_PHY_CS_GPIO, "usb-host2-cs");
+        gpio_direction_output(USBH2_PHY_CS_GPIO, 1);
+
+#if defined(CONFIG_USB_ULPI)
+        if (otg_mode_host) {
+                otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
+                                USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
+
+                mxc_register_device(&mxc_otg_host, &otg_pdata);
+        }
+
+        usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
+                                USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
+
+        mxc_register_device(&mxc_usbh2, &usbh2_pdata);
+#endif
+        if (!otg_mode_host) {
+                gpio_set_value(OTG_PHY_CS_GPIO, 0);
+                mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
+        }
+
         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 }
 
@@ -233,9 +384,9 @@ static struct sys_timer pca100_timer = {
 };
 
 MACHINE_START(PCA100, "phyCARD-i.MX27")
-        .phys_io        = AIPI_BASE_ADDR,
-        .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX27_AIPI_BASE_ADDR,
+        .io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = MX27_PHYS_OFFSET + 0x100,
         .map_io         = mx27_map_io,
         .init_irq       = mx27_init_irq,
         .init_machine   = pca100_init,
diff --git a/arch/arm/mach-mx2/pcm038.c b/arch/arm/mach-mx2/mach-pcm038.c
index 906d59b0a7a..035fbe046ec 100644
--- a/arch/arm/mach-mx2/pcm038.c
+++ b/arch/arm/mach-mx2/mach-pcm038.c
@@ -36,10 +36,12 @@
 #include <mach/common.h>
 #include <mach/hardware.h>
 #include <mach/i2c.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx27.h>
 #include <mach/imx-uart.h>
 #include <mach/mxc_nand.h>
 #include <mach/spi.h>
+#include <mach/mxc_ehci.h>
+#include <mach/ulpi.h>
 
 #include "devices.h"
 
@@ -96,6 +98,19 @@ static int pcm038_pins[] = {
         PC17_PF_SSI4_RXD,
         PC18_PF_SSI4_TXD,
         PC19_PF_SSI4_CLK,
+        /* USB host */
+        PA0_PF_USBH2_CLK,
+        PA1_PF_USBH2_DIR,
+        PA2_PF_USBH2_DATA7,
+        PA3_PF_USBH2_NXT,
+        PA4_PF_USBH2_STP,
+        PD19_AF_USBH2_DATA4,
+        PD20_AF_USBH2_DATA3,
+        PD21_AF_USBH2_DATA6,
+        PD22_AF_USBH2_DATA0,
+        PD23_AF_USBH2_DATA2,
+        PD24_AF_USBH2_DATA1,
+        PD26_AF_USBH2_DATA5,
 };
 
 /*
@@ -108,8 +123,8 @@ static struct platdata_mtd_ram pcm038_sram_data = {
 };
 
 static struct resource pcm038_sram_resource = {
-        .start = CS1_BASE_ADDR,
-        .end   = CS1_BASE_ADDR + 512 * 1024 - 1,
+        .start = MX27_CS1_BASE_ADDR,
+        .end   = MX27_CS1_BASE_ADDR + 512 * 1024 - 1,
         .flags = IORESOURCE_MEM,
 };
 
@@ -173,9 +188,7 @@ static struct platform_device *platform_devices[] __initdata = {
  * setup other stuffs to access the sram. */
 static void __init pcm038_init_sram(void)
 {
-        __raw_writel(0x0000d843, CSCR_U(1));
-        __raw_writel(0x22252521, CSCR_L(1));
-        __raw_writel(0x22220a00, CSCR_A(1));
+        mx27_setup_weimcs(1, 0x0000d843, 0x22252521, 0x22220a00);
 }
 
 static struct imxi2c_platform_data pcm038_i2c_1_data = {
@@ -279,6 +292,11 @@ static struct spi_board_info pcm038_spi_board_info[] __initdata = {
         }
 };
 
+static struct mxc_usbh_platform_data usbh2_pdata = {
+        .portsc = MXC_EHCI_MODE_ULPI,
+        .flags  = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI,
+};
+
 static void __init pcm038_init(void)
 {
         mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins),
@@ -291,7 +309,7 @@ static void __init pcm038_init(void)
         mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
 
         mxc_gpio_mode(PE16_AF_OWIRE);
-        mxc_register_device(&mxc_nand_device, &pcm038_nand_board_info);
+        mxc_register_device(&imx27_nand_device, &pcm038_nand_board_info);
 
         /* only the i2c master 1 is used on this CPU card */
         i2c_register_board_info(1, pcm038_i2c_devices,
@@ -311,6 +329,8 @@ static void __init pcm038_init(void)
         spi_register_board_info(pcm038_spi_board_info,
                                 ARRAY_SIZE(pcm038_spi_board_info));
 
+        mxc_register_device(&mxc_usbh2, &usbh2_pdata);
+
         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 
 #ifdef CONFIG_MACH_PCM970_BASEBOARD
@@ -328,9 +348,9 @@ static struct sys_timer pcm038_timer = {
 };
 
 MACHINE_START(PCM038, "phyCORE-i.MX27")
-        .phys_io        = AIPI_BASE_ADDR,
-        .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX27_AIPI_BASE_ADDR,
+        .io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = MX27_PHYS_OFFSET + 0x100,
         .map_io         = mx27_map_io,
         .init_irq       = mx27_init_irq,
         .init_machine   = pcm038_init,
diff --git a/arch/arm/mach-mx2/mm-imx21.c b/arch/arm/mach-mx2/mm-imx21.c
new file mode 100644
index 00000000000..64134314d01
--- /dev/null
+++ b/arch/arm/mach-mx2/mm-imx21.c
@@ -0,0 +1,83 @@
+/*
+ * arch/arm/mach-mx2/mm-imx21.c
+ *
+ * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+
+#include <linux/mm.h>
+#include <linux/init.h>
+#include <mach/hardware.h>
+#include <mach/common.h>
+#include <asm/pgtable.h>
+#include <asm/mach/map.h>
+
+/* MX21 memory map definition */
+static struct map_desc imx21_io_desc[] __initdata = {
+        /*
+         * this fixed mapping covers:
+         * - AIPI1
+         * - AIPI2
+         * - AITC
+         * - ROM Patch
+         * - and some reserved space
+         */
+        {
+                .virtual = MX21_AIPI_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX21_AIPI_BASE_ADDR),
+                .length = MX21_AIPI_SIZE,
+                .type = MT_DEVICE
+        },
+        /*
+         * this fixed mapping covers:
+         * - CSI
+         * - ATA
+         */
+        {
+                .virtual = MX21_SAHB1_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX21_SAHB1_BASE_ADDR),
+                .length = MX21_SAHB1_SIZE,
+                .type = MT_DEVICE
+        },
+        /*
+         * this fixed mapping covers:
+         * - EMI
+         */
+        {
+                .virtual = MX21_X_MEMC_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX21_X_MEMC_BASE_ADDR),
+                .length = MX21_X_MEMC_SIZE,
+                .type = MT_DEVICE
+        },
+};
+
+/*
+ * Initialize the memory map. It is called during the
+ * system startup to create static physical to virtual
+ * memory map for the IO modules.
+ */
+void __init mx21_map_io(void)
+{
+        mxc_set_cpu_type(MXC_CPU_MX21);
+        mxc_arch_reset_init(MX21_IO_ADDRESS(MX21_WDOG_BASE_ADDR));
+
+        iotable_init(imx21_io_desc, ARRAY_SIZE(imx21_io_desc));
+}
+
+void __init mx21_init_irq(void)
+{
+        mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR));
+}
diff --git a/arch/arm/mach-mx2/generic.c b/arch/arm/mach-mx2/mm-imx27.c
index ae8f759134d..3366ed44cfd 100644
--- a/arch/arm/mach-mx2/generic.c
+++ b/arch/arm/mach-mx2/mm-imx27.c
@@ -1,5 +1,5 @@
 /*
- * generic.c
+ * arch/arm/mach-mx2/mm-imx27.c
  *
  * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
  *
@@ -26,7 +26,7 @@
 #include <asm/mach/map.h>
 
 /* MX27 memory map definition */
-static struct map_desc mxc_io_desc[] __initdata = {
+static struct map_desc imx27_io_desc[] __initdata = {
         /*
          * this fixed mapping covers:
          * - AIPI1
@@ -36,9 +36,9 @@ static struct map_desc mxc_io_desc[] __initdata = {
          * - and some reserved space
          */
         {
-                .virtual = AIPI_BASE_ADDR_VIRT,
-                .pfn = __phys_to_pfn(AIPI_BASE_ADDR),
-                .length = AIPI_SIZE,
+                .virtual = MX27_AIPI_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX27_AIPI_BASE_ADDR),
+                .length = MX27_AIPI_SIZE,
                 .type = MT_DEVICE
         },
         /*
@@ -47,9 +47,9 @@ static struct map_desc mxc_io_desc[] __initdata = {
          * - ATA
          */
         {
-                .virtual = SAHB1_BASE_ADDR_VIRT,
-                .pfn = __phys_to_pfn(SAHB1_BASE_ADDR),
-                .length = SAHB1_SIZE,
+                .virtual = MX27_SAHB1_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX27_SAHB1_BASE_ADDR),
+                .length = MX27_SAHB1_SIZE,
                 .type = MT_DEVICE
         },
         /*
@@ -57,11 +57,11 @@ static struct map_desc mxc_io_desc[] __initdata = {
          * - EMI
          */
         {
-                .virtual = X_MEMC_BASE_ADDR_VIRT,
-                .pfn = __phys_to_pfn(X_MEMC_BASE_ADDR),
-                .length = X_MEMC_SIZE,
+                .virtual = MX27_X_MEMC_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX27_X_MEMC_BASE_ADDR),
+                .length = MX27_X_MEMC_SIZE,
                 .type = MT_DEVICE
-        }
+        },
 };
 
 /*
@@ -69,29 +69,15 @@ static struct map_desc mxc_io_desc[] __initdata = {
  * system startup to create static physical to virtual
  * memory map for the IO modules.
  */
-void __init mx21_map_io(void)
-{
-        mxc_set_cpu_type(MXC_CPU_MX21);
-        mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
-
-        iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
-}
-
 void __init mx27_map_io(void)
 {
         mxc_set_cpu_type(MXC_CPU_MX27);
-        mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
+        mxc_arch_reset_init(MX27_IO_ADDRESS(MX27_WDOG_BASE_ADDR));
 
-        iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
+        iotable_init(imx27_io_desc, ARRAY_SIZE(imx27_io_desc));
 }
 
 void __init mx27_init_irq(void)
 {
-        mxc_init_irq(IO_ADDRESS(AVIC_BASE_ADDR));
+        mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR));
 }
-
-void __init mx21_init_irq(void)
-{
-        mx27_init_irq();
-}
-
diff --git a/arch/arm/mach-mx2/pcm970-baseboard.c b/arch/arm/mach-mx2/pcm970-baseboard.c
index 3cb7f457e5d..4aafd5b8b85 100644
--- a/arch/arm/mach-mx2/pcm970-baseboard.c
+++ b/arch/arm/mach-mx2/pcm970-baseboard.c
@@ -24,7 +24,7 @@
 #include <asm/mach/arch.h>
 
 #include <mach/common.h>
-#include <mach/iomux.h>
+#include <mach/iomux-mx27.h>
 #include <mach/imxfb.h>
 #include <mach/hardware.h>
 #include <mach/mmc.h>
@@ -190,8 +190,8 @@ static struct imx_fb_platform_data pcm038_fb_data = {
 
 static struct resource pcm970_sja1000_resources[] = {
         {
-                .start   = CS4_BASE_ADDR,
-                .end     = CS4_BASE_ADDR + 0x100 - 1,
+                .start   = MX27_CS4_BASE_ADDR,
+                .end     = MX27_CS4_BASE_ADDR + 0x100 - 1,
                 .flags   = IORESOURCE_MEM,
         }, {
                 .start   = IRQ_GPIOE(19),
diff --git a/arch/arm/mach-mx2/serial.c b/arch/arm/mach-mx2/serial.c
index 40a485cdc10..1c0c835b225 100644
--- a/arch/arm/mach-mx2/serial.c
+++ b/arch/arm/mach-mx2/serial.c
@@ -26,12 +26,12 @@
 
 static struct resource uart0[] = {
         {
-                .start = UART1_BASE_ADDR,
-                .end = UART1_BASE_ADDR + 0x0B5,
+                .start = MX2x_UART1_BASE_ADDR,
+                .end = MX2x_UART1_BASE_ADDR + 0x0B5,
                 .flags = IORESOURCE_MEM,
         }, {
-                .start = MXC_INT_UART1,
-                .end = MXC_INT_UART1,
+                .start = MX2x_INT_UART1,
+                .end = MX2x_INT_UART1,
                 .flags = IORESOURCE_IRQ,
         },
 };
@@ -45,12 +45,12 @@ struct platform_device mxc_uart_device0 = {
 
 static struct resource uart1[] = {
         {
-                .start = UART2_BASE_ADDR,
-                .end = UART2_BASE_ADDR + 0x0B5,
+                .start = MX2x_UART2_BASE_ADDR,
+                .end = MX2x_UART2_BASE_ADDR + 0x0B5,
                 .flags = IORESOURCE_MEM,
         }, {
-                .start = MXC_INT_UART2,
-                .end = MXC_INT_UART2,
+                .start = MX2x_INT_UART2,
+                .end = MX2x_INT_UART2,
                 .flags = IORESOURCE_IRQ,
         },
 };
@@ -64,12 +64,12 @@ struct platform_device mxc_uart_device1 = {
 
 static struct resource uart2[] = {
         {
-                .start = UART3_BASE_ADDR,
-                .end = UART3_BASE_ADDR + 0x0B5,
+                .start = MX2x_UART3_BASE_ADDR,
+                .end = MX2x_UART3_BASE_ADDR + 0x0B5,
                 .flags = IORESOURCE_MEM,
         }, {
-                .start = MXC_INT_UART3,
-                .end = MXC_INT_UART3,
+                .start = MX2x_INT_UART3,
+                .end = MX2x_INT_UART3,
                 .flags = IORESOURCE_IRQ,
         },
 };
@@ -83,12 +83,12 @@ struct platform_device mxc_uart_device2 = {
 
 static struct resource uart3[] = {
         {
-                .start = UART4_BASE_ADDR,
-                .end = UART4_BASE_ADDR + 0x0B5,
+                .start = MX2x_UART4_BASE_ADDR,
+                .end = MX2x_UART4_BASE_ADDR + 0x0B5,
                 .flags = IORESOURCE_MEM,
         }, {
-                .start = MXC_INT_UART4,
-                .end = MXC_INT_UART4,
+                .start = MX2x_INT_UART4,
+                .end = MX2x_INT_UART4,
                 .flags = IORESOURCE_IRQ,
         },
 };
@@ -103,12 +103,12 @@ struct platform_device mxc_uart_device3 = {
 #ifdef CONFIG_MACH_MX27
 static struct resource uart4[] = {
         {
-                .start = UART5_BASE_ADDR,
-                .end = UART5_BASE_ADDR + 0x0B5,
+                .start = MX27_UART5_BASE_ADDR,
+                .end = MX27_UART5_BASE_ADDR + 0x0B5,
                 .flags = IORESOURCE_MEM,
         }, {
-                .start = MXC_INT_UART5,
-                .end = MXC_INT_UART5,
+                .start = MX27_INT_UART5,
+                .end = MX27_INT_UART5,
                 .flags = IORESOURCE_IRQ,
         },
 };
@@ -122,12 +122,12 @@ struct platform_device mxc_uart_device4 = {
 
 static struct resource uart5[] = {
         {
-                .start = UART6_BASE_ADDR,
-                .end = UART6_BASE_ADDR + 0x0B5,
+                .start = MX27_UART6_BASE_ADDR,
+                .end = MX27_UART6_BASE_ADDR + 0x0B5,
                 .flags = IORESOURCE_MEM,
         }, {
-                .start = MXC_INT_UART6,
-                .end = MXC_INT_UART6,
+                .start = MX27_INT_UART6,
+                .end = MX27_INT_UART6,
                 .flags = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/arm/mach-mx25/Kconfig b/arch/arm/mach-mx25/Kconfig
index cc28f56eae8..54d217314ee 100644
--- a/arch/arm/mach-mx25/Kconfig
+++ b/arch/arm/mach-mx25/Kconfig
@@ -3,7 +3,6 @@ if ARCH_MX25
 comment "MX25 platforms:"
 
 config MACH_MX25_3DS
-        select ARCH_MXC_IOMUX_V3
         bool "Support MX25PDK (3DS) Platform"
 
 endif
diff --git a/arch/arm/mach-mx25/Makefile b/arch/arm/mach-mx25/Makefile
index fe23836a9f3..10cebc5ced8 100644
--- a/arch/arm/mach-mx25/Makefile
+++ b/arch/arm/mach-mx25/Makefile
@@ -1,3 +1,3 @@
 obj-y                           := mm.o devices.o
 obj-$(CONFIG_ARCH_MX25)         += clock.o
-obj-$(CONFIG_MACH_MX25_3DS)     += mx25pdk.o
+obj-$(CONFIG_MACH_MX25_3DS)     += mach-mx25pdk.o
diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c
index 37e1359ad0c..155014993b1 100644
--- a/arch/arm/mach-mx25/clock.c
+++ b/arch/arm/mach-mx25/clock.c
@@ -124,6 +124,11 @@ static unsigned long get_rate_gpt(struct clk *clk)
         return get_rate_per(5);
 }
 
+static unsigned long get_rate_lcdc(struct clk *clk)
+{
+        return get_rate_per(7);
+}
+
 static unsigned long get_rate_otg(struct clk *clk)
 {
         return 48000000; /* FIXME */
@@ -167,6 +172,8 @@ DEFINE_CLOCK(cspi1_clk,  0, CCM_CGCR1,  5, get_rate_ipg, NULL, NULL);
 DEFINE_CLOCK(cspi2_clk,  0, CCM_CGCR1,  6, get_rate_ipg, NULL, NULL);
 DEFINE_CLOCK(cspi3_clk,  0, CCM_CGCR1,  7, get_rate_ipg, NULL, NULL);
 DEFINE_CLOCK(fec_ahb_clk, 0, CCM_CGCR0, 23, NULL,        NULL, NULL);
+DEFINE_CLOCK(lcdc_ahb_clk, 0, CCM_CGCR0, 24, NULL,       NULL, NULL);
+DEFINE_CLOCK(lcdc_per_clk, 0, CCM_CGCR0,  7, NULL,       NULL, &lcdc_ahb_clk);
 DEFINE_CLOCK(uart1_clk,  0, CCM_CGCR2, 14, get_rate_uart, NULL, &uart_per_clk);
 DEFINE_CLOCK(uart2_clk,  0, CCM_CGCR2, 15, get_rate_uart, NULL, &uart_per_clk);
 DEFINE_CLOCK(uart3_clk,  0, CCM_CGCR2, 16, get_rate_uart, NULL, &uart_per_clk);
@@ -182,6 +189,8 @@ DEFINE_CLOCK(kpp_clk,	 0, CCM_CGCR1, 28, get_rate_ipg, NULL, NULL);
 DEFINE_CLOCK(tsc_clk,    0, CCM_CGCR2, 13, get_rate_ipg, NULL, NULL);
 DEFINE_CLOCK(i2c_clk,    0, CCM_CGCR0,  6, get_rate_i2c, NULL, NULL);
 DEFINE_CLOCK(fec_clk,    0, CCM_CGCR1, 15, get_rate_ipg, NULL, &fec_ahb_clk);
+DEFINE_CLOCK(dryice_clk, 0, CCM_CGCR1,  8, get_rate_ipg, NULL, NULL);
+DEFINE_CLOCK(lcdc_clk,   0, CCM_CGCR1, 29, get_rate_lcdc, NULL, &lcdc_per_clk);
 
 #define _REGISTER_CLOCK(d, n, c)        \
         {                               \
@@ -214,6 +223,8 @@ static struct clk_lookup lookups[] = {
         _REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk)
         _REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk)
         _REGISTER_CLOCK("fec.0", NULL, fec_clk)
+        _REGISTER_CLOCK("imxdi_rtc.0", NULL, dryice_clk)
+        _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)
 };
 
 int __init mx25_clocks_init(void)
@@ -228,6 +239,9 @@ int __init mx25_clocks_init(void)
         __raw_writel((0xf << 16) | (3 << 26), CRM_BASE + CCM_CGCR1);
         __raw_writel((1 << 5), CRM_BASE + CCM_CGCR2);
 
+        /* Clock source for lcdc is upll */
+        __raw_writel(__raw_readl(CRM_BASE+0x64) | (1 << 7), CRM_BASE + 0x64);
+
         mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
 
         return 0;
diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c
index 9fdeea1c083..3f4b8a0b5fa 100644
--- a/arch/arm/mach-mx25/devices.c
+++ b/arch/arm/mach-mx25/devices.c
@@ -438,3 +438,65 @@ struct platform_device mx25_fec_device = {
         .num_resources  = ARRAY_SIZE(mx25_fec_resources),
         .resource       = mx25_fec_resources,
 };
+
+static struct resource mxc_nand_resources[] = {
+        {
+                .start  = MX25_NFC_BASE_ADDR,
+                .end    = MX25_NFC_BASE_ADDR + 0x1fff,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = MX25_INT_NANDFC,
+                .end    = MX25_INT_NANDFC,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device mxc_nand_device = {
+        .name           = "mxc_nand",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(mxc_nand_resources),
+        .resource       = mxc_nand_resources,
+};
+
+static struct resource mx25_rtc_resources[] = {
+        {
+                .start  = MX25_DRYICE_BASE_ADDR,
+                .end    = MX25_DRYICE_BASE_ADDR + 0x40,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = MX25_INT_DRYICE,
+                .flags  = IORESOURCE_IRQ
+        },
+};
+
+struct platform_device mx25_rtc_device = {
+        .name   = "imxdi_rtc",
+        .id     = 0,
+        .num_resources  = ARRAY_SIZE(mx25_rtc_resources),
+        .resource       = mx25_rtc_resources,
+};
+
+static struct resource mx25_fb_resources[] = {
+        {
+                .start  = MX25_LCDC_BASE_ADDR,
+                .end    = MX25_LCDC_BASE_ADDR + 0xfff,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = MX25_INT_LCDC,
+                .end    = MX25_INT_LCDC,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device mx25_fb_device = {
+        .name           = "imx-fb",
+        .id             = 0,
+        .resource       = mx25_fb_resources,
+        .num_resources  = ARRAY_SIZE(mx25_fb_resources),
+        .dev            = {
+                .coherent_dma_mask = 0xFFFFFFFF,
+        },
+};
diff --git a/arch/arm/mach-mx25/devices.h b/arch/arm/mach-mx25/devices.h
index fe5420fcd11..39560e13bc0 100644
--- a/arch/arm/mach-mx25/devices.h
+++ b/arch/arm/mach-mx25/devices.h
@@ -18,3 +18,6 @@ extern struct platform_device mxc_i2c_device0;
 extern struct platform_device mxc_i2c_device1;
 extern struct platform_device mxc_i2c_device2;
 extern struct platform_device mx25_fec_device;
+extern struct platform_device mxc_nand_device;
+extern struct platform_device mx25_rtc_device;
+extern struct platform_device mx25_fb_device;
diff --git a/arch/arm/mach-mx25/mx25pdk.c b/arch/arm/mach-mx25/mach-mx25pdk.c
index 6f06089246e..83d74109e7d 100644
--- a/arch/arm/mach-mx25/mx25pdk.c
+++ b/arch/arm/mach-mx25/mach-mx25pdk.c
@@ -35,8 +35,9 @@
 #include <mach/imx-uart.h>
 #include <mach/mx25.h>
 #include <mach/mxc_nand.h>
+#include <mach/imxfb.h>
 #include "devices.h"
-#include <mach/iomux.h>
+#include <mach/iomux-mx25.h>
 
 static struct imxuart_platform_data uart_pdata = {
         .flags = IMXUART_HAVE_RTSCTS,
@@ -54,6 +55,31 @@ static struct pad_desc mx25pdk_pads[] = {
         MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
         MX25_PAD_A17__GPIO_2_3, /* FEC_EN, GPIO 35 */
         MX25_PAD_D12__GPIO_4_8, /* FEC_RESET_B, GPIO 104 */
+
+        /* LCD */
+        MX25_PAD_LD0__LD0,
+        MX25_PAD_LD1__LD1,
+        MX25_PAD_LD2__LD2,
+        MX25_PAD_LD3__LD3,
+        MX25_PAD_LD4__LD4,
+        MX25_PAD_LD5__LD5,
+        MX25_PAD_LD6__LD6,
+        MX25_PAD_LD7__LD7,
+        MX25_PAD_LD8__LD8,
+        MX25_PAD_LD9__LD9,
+        MX25_PAD_LD10__LD10,
+        MX25_PAD_LD11__LD11,
+        MX25_PAD_LD12__LD12,
+        MX25_PAD_LD13__LD13,
+        MX25_PAD_LD14__LD14,
+        MX25_PAD_LD15__LD15,
+        MX25_PAD_GPIO_E__LD16,
+        MX25_PAD_GPIO_F__LD17,
+        MX25_PAD_HSYNC__HSYNC,
+        MX25_PAD_VSYNC__VSYNC,
+        MX25_PAD_LSCLK__LSCLK,
+        MX25_PAD_OE_ACD__OE_ACD,
+        MX25_PAD_CONTRAST__CONTRAST,
 };
 
 static struct fec_platform_data mx25_fec_pdata = {
@@ -77,6 +103,40 @@ static void __init mx25pdk_fec_reset(void)
         gpio_set_value(FEC_RESET_B_GPIO, 1);
 }
 
+static struct mxc_nand_platform_data mx25pdk_nand_board_info = {
+        .width          = 1,
+        .hw_ecc         = 1,
+        .flash_bbt      = 1,
+};
+
+static struct imx_fb_videomode mx25pdk_modes[] = {
+        {
+                .mode   = {
+                        .name           = "CRT-VGA",
+                        .refresh        = 60,
+                        .xres           = 640,
+                        .yres           = 480,
+                        .pixclock       = 39683,
+                        .left_margin    = 45,
+                        .right_margin   = 114,
+                        .upper_margin   = 33,
+                        .lower_margin   = 11,
+                        .hsync_len      = 1,
+                        .vsync_len      = 1,
+                },
+                .bpp    = 16,
+                .pcr    = 0xFA208B80,
+        },
+};
+
+static struct imx_fb_platform_data mx25pdk_fb_pdata = {
+        .mode           = mx25pdk_modes,
+        .num_modes      = ARRAY_SIZE(mx25pdk_modes),
+        .pwmr           = 0x00A903FF,
+        .lscr1          = 0x00120300,
+        .dmacr          = 0x00020010,
+};
+
 static void __init mx25pdk_init(void)
 {
         mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads,
@@ -84,6 +144,9 @@ static void __init mx25pdk_init(void)
 
         mxc_register_device(&mxc_uart_device0, &uart_pdata);
         mxc_register_device(&mxc_usbh2, NULL);
+        mxc_register_device(&mxc_nand_device, &mx25pdk_nand_board_info);
+        mxc_register_device(&mx25_rtc_device, NULL);
+        mxc_register_device(&mx25_fb_device, &mx25pdk_fb_pdata);
 
         mx25pdk_fec_reset();
         mxc_register_device(&mx25_fec_device, &mx25_fec_pdata);
@@ -102,7 +165,7 @@ MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)")
         /* Maintainer: Freescale Semiconductor, Inc. */
         .phys_io        = MX25_AIPS1_BASE_ADDR,
         .io_pg_offst    = ((MX25_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .boot_params    = MX25_PHYS_OFFSET + 0x100,
         .map_io         = mx25_map_io,
         .init_irq       = mx25_init_irq,
         .init_machine   = mx25pdk_init,
diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig
index 28294416b0a..170f68e46dd 100644
--- a/arch/arm/mach-mx3/Kconfig
+++ b/arch/arm/mach-mx3/Kconfig
@@ -34,6 +34,7 @@ config MACH_MX31ADS_WM1133_EV1
 config MACH_PCM037
         bool "Support Phytec pcm037 (i.MX31) platforms"
         select ARCH_MX31
+        select MXC_ULPI if USB_ULPI
         help
           Include support for Phytec pcm037 platform. This includes
           specific configurations for the board and its peripherals.
@@ -61,6 +62,15 @@ config MACH_MX31_3DS
           Include support for MX31PDK (3DS) platform. This includes specific
           configurations for the board and its peripherals.
 
+config MACH_MX31_3DS_MXC_NAND_USE_BBT
+        bool "Make the MXC NAND driver use the in flash Bad Block Table"
+        depends on MACH_MX31_3DS
+        depends on MTD_NAND_MXC
+        help
+          Enable this if you want that the MXC NAND driver uses the in flash
+          Bad Block Table to know what blocks are bad instead of scanning the
+          entire flash looking for bad block markers.
+
 config MACH_MX31MOBOARD
         bool "Support mx31moboard platforms (EPFL Mobots group)"
         select ARCH_MX31
@@ -86,6 +96,7 @@ config MACH_QONG
 config MACH_PCM043
         bool "Support Phytec pcm043 (i.MX35) platforms"
         select ARCH_MX35
+        select MXC_ULPI if USB_ULPI
         help
           Include support for Phytec pcm043 platform. This includes
           specific configurations for the board and its peripherals.
@@ -93,6 +104,7 @@ config MACH_PCM043
 config MACH_ARMADILLO5X0
         bool "Support Atmark Armadillo-500 Development Base Board"
         select ARCH_MX31
+        select MXC_ULPI if USB_ULPI
         help
           Include support for Atmark Armadillo-500 platform. This includes
           specific configurations for the board and its peripherals.
diff --git a/arch/arm/mach-mx3/Makefile b/arch/arm/mach-mx3/Makefile
index 93c7b296be6..5d650fda5d5 100644
--- a/arch/arm/mach-mx3/Makefile
+++ b/arch/arm/mach-mx3/Makefile
@@ -5,18 +5,22 @@
 # Object file lists.
 
 obj-y                           := mm.o devices.o cpu.o
-obj-$(CONFIG_ARCH_MX31)         += clock.o iomux.o
+CFLAGS_mm.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
+CFLAGS_devices.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
+CFLAGS_cpu.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
+obj-$(CONFIG_ARCH_MX31)         += clock-imx31.o iomux-imx31.o
 obj-$(CONFIG_ARCH_MX35)         += clock-imx35.o
-obj-$(CONFIG_MACH_MX31ADS)      += mx31ads.o
-obj-$(CONFIG_MACH_MX31LILLY)    += mx31lilly.o mx31lilly-db.o
-obj-$(CONFIG_MACH_MX31LITE)     += mx31lite.o mx31lite-db.o
-obj-$(CONFIG_MACH_PCM037)       += pcm037.o
-obj-$(CONFIG_MACH_PCM037_EET)   += pcm037_eet.o
-obj-$(CONFIG_MACH_MX31_3DS)     += mx31pdk.o
-obj-$(CONFIG_MACH_MX31MOBOARD)  += mx31moboard.o mx31moboard-devboard.o \
-                                   mx31moboard-marxbot.o
-obj-$(CONFIG_MACH_QONG)         += qong.o
-obj-$(CONFIG_MACH_PCM043)       += pcm043.o
-obj-$(CONFIG_MACH_ARMADILLO5X0) += armadillo5x0.o
-obj-$(CONFIG_MACH_MX35_3DS)     += mx35pdk.o
-obj-$(CONFIG_MACH_KZM_ARM11_01) += kzmarm11.o
+obj-$(CONFIG_MACH_MX31ADS)      += mach-mx31ads.o
+obj-$(CONFIG_MACH_MX31LILLY)    += mach-mx31lilly.o mx31lilly-db.o
+obj-$(CONFIG_MACH_MX31LITE)     += mach-mx31lite.o mx31lite-db.o
+obj-$(CONFIG_MACH_PCM037)       += mach-pcm037.o
+obj-$(CONFIG_MACH_PCM037_EET)   += mach-pcm037_eet.o
+obj-$(CONFIG_MACH_MX31_3DS)     += mach-mx31_3ds.o
+CFLAGS_mach-mx31_3ds.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
+obj-$(CONFIG_MACH_MX31MOBOARD)  += mach-mx31moboard.o mx31moboard-devboard.o \
+                                   mx31moboard-marxbot.o mx31moboard-smartbot.o
+obj-$(CONFIG_MACH_QONG)         += mach-qong.o
+obj-$(CONFIG_MACH_PCM043)       += mach-pcm043.o
+obj-$(CONFIG_MACH_ARMADILLO5X0) += mach-armadillo5x0.o
+obj-$(CONFIG_MACH_MX35_3DS)     += mach-mx35pdk.o
+obj-$(CONFIG_MACH_KZM_ARM11_01) += mach-kzm_arm11_01.o
diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock-imx31.c
index b5c39a016db..9a9eb6de612 100644
--- a/arch/arm/mach-mx3/clock.c
+++ b/arch/arm/mach-mx3/clock-imx31.c
@@ -468,6 +468,7 @@ static struct clk ahb_clk = {
         }
 
 DEFINE_CLOCK(perclk_clk,  0, NULL,          0, NULL, NULL, &ipg_clk);
+DEFINE_CLOCK(ckil_clk,    0, NULL,          0, clk_ckil_get_rate, NULL, NULL);
 
 DEFINE_CLOCK(sdhc1_clk,   0, MXC_CCM_CGR0,  0, NULL, NULL, &perclk_clk);
 DEFINE_CLOCK(sdhc2_clk,   1, MXC_CCM_CGR0,  2, NULL, NULL, &perclk_clk);
@@ -490,7 +491,7 @@ DEFINE_CLOCK(mpeg4_clk,   0, MXC_CCM_CGR1,  0, NULL, NULL, &ahb_clk);
 DEFINE_CLOCK(mstick1_clk, 0, MXC_CCM_CGR1,  2, mstick1_get_rate, NULL, &usb_pll_clk);
 DEFINE_CLOCK(mstick2_clk, 1, MXC_CCM_CGR1,  4, mstick2_get_rate, NULL, &usb_pll_clk);
 DEFINE_CLOCK1(csi_clk,    0, MXC_CCM_CGR1,  6, csi, NULL, &serial_pll_clk);
-DEFINE_CLOCK(rtc_clk,     0, MXC_CCM_CGR1,  8, NULL, NULL, &ipg_clk);
+DEFINE_CLOCK(rtc_clk,     0, MXC_CCM_CGR1,  8, NULL, NULL, &ckil_clk);
 DEFINE_CLOCK(wdog_clk,    0, MXC_CCM_CGR1, 10, NULL, NULL, &ipg_clk);
 DEFINE_CLOCK(pwm_clk,     0, MXC_CCM_CGR1, 12, NULL, NULL, &perclk_clk);
 DEFINE_CLOCK(usb_clk2,    0, MXC_CCM_CGR1, 18, usb_get_rate, NULL, &ahb_clk);
@@ -514,7 +515,6 @@ DEFINE_CLOCK(usb_clk1,    0, NULL,          0, usb_get_rate, NULL, &usb_pll_clk)
 DEFINE_CLOCK(nfc_clk,     0, NULL,          0, nfc_get_rate, NULL, &ahb_clk);
 DEFINE_CLOCK(scc_clk,     0, NULL,          0, NULL, NULL, &ipg_clk);
 DEFINE_CLOCK(ipg_clk,     0, NULL,          0, ipg_get_rate, NULL, &ahb_clk);
-DEFINE_CLOCK(ckil_clk,    0, NULL,          0, clk_ckil_get_rate, NULL, NULL);
 
 #define _REGISTER_CLOCK(d, n, c) \
         { \
@@ -572,7 +572,6 @@ static struct clk_lookup lookups[] = {
         _REGISTER_CLOCK(NULL, "iim", iim_clk)
         _REGISTER_CLOCK(NULL, "mpeg4", mpeg4_clk)
         _REGISTER_CLOCK(NULL, "mbx", mbx_clk)
-        _REGISTER_CLOCK("mxc_rtc", NULL, ckil_clk)
 };
 
 int __init mx31_clocks_init(unsigned long fref)
@@ -616,14 +615,15 @@ int __init mx31_clocks_init(unsigned long fref)
 
         mx31_read_cpu_rev();
 
-        if (mx31_revision() >= CHIP_REV_2_0) {
+        if (mx31_revision() >= MX31_CHIP_REV_2_0) {
                 reg = __raw_readl(MXC_CCM_PMCR1);
                 /* No PLL restart on DVFS switch; enable auto EMI handshake */
                 reg |= MXC_CCM_PMCR1_PLLRDIS | MXC_CCM_PMCR1_EMIRQ_EN;
                 __raw_writel(reg, MXC_CCM_PMCR1);
         }
 
-        mxc_timer_init(&ipg_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT);
+        mxc_timer_init(&ipg_clk, MX31_IO_ADDRESS(MX31_GPT1_BASE_ADDR),
+                        MX31_INT_GPT);
 
         return 0;
 }
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index f3f41fa4f21..9f3e943e223 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -28,7 +28,7 @@
 #include <mach/hardware.h>
 #include <mach/common.h>
 
-#define CCM_BASE        IO_ADDRESS(CCM_BASE_ADDR)
+#define CCM_BASE        MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR)
 
 #define CCM_CCMR        0x00
 #define CCM_PDR0        0x04
@@ -502,7 +502,8 @@ int __init mx35_clocks_init()
         __raw_writel((3 << 26) | ll, CCM_BASE + CCM_CGR2);
         __raw_writel(0, CCM_BASE + CCM_CGR3);
 
-        mxc_timer_init(&gpt_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT);
+        mxc_timer_init(&gpt_clk,
+                        MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT);
 
         return 0;
 }
diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c
index db828809c67..861afe0fe3a 100644
--- a/arch/arm/mach-mx3/cpu.c
+++ b/arch/arm/mach-mx3/cpu.c
@@ -41,7 +41,7 @@ void __init mx31_read_cpu_rev(void)
         u32 i, srev;
 
         /* read SREV register from IIM module */
-        srev = __raw_readl(IO_ADDRESS(IIM_BASE_ADDR) + MXC_IIMSREV);
+        srev = __raw_readl(IO_ADDRESS(IIM_BASE_ADDR + MXC_IIMSREV));
 
         for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
                 if (srev == mx31_cpu_type[i].srev) {
diff --git a/arch/arm/mach-mx3/crm_regs.h b/arch/arm/mach-mx3/crm_regs.h
index adfa3627ad8..37a8a07beda 100644
--- a/arch/arm/mach-mx3/crm_regs.h
+++ b/arch/arm/mach-mx3/crm_regs.h
@@ -24,7 +24,7 @@
 #define CKIH_CLK_FREQ_27MHZ     27000000
 #define CKIL_CLK_FREQ           32768
 
-#define MXC_CCM_BASE            IO_ADDRESS(CCM_BASE_ADDR)
+#define MXC_CCM_BASE            MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR)
 
 /* Register addresses */
 #define MXC_CCM_CCMR            (MXC_CCM_BASE + 0x00)
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c
index 6adb586515e..f8911154a9f 100644
--- a/arch/arm/mach-mx3/devices.c
+++ b/arch/arm/mach-mx3/devices.c
@@ -575,11 +575,26 @@ struct platform_device imx_ssi_device1 = {
         .resource = imx_ssi_resources1,
 };
 
-static int mx3_devices_init(void)
+static struct resource imx_wdt_resources[] = {
+        {
+                .flags = IORESOURCE_MEM,
+        },
+};
+
+struct platform_device imx_wdt_device0 = {
+        .name           = "imx-wdt",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(imx_wdt_resources),
+        .resource       = imx_wdt_resources,
+};
+
+static int __init mx3_devices_init(void)
 {
         if (cpu_is_mx31()) {
                 mxc_nand_resources[0].start = MX31_NFC_BASE_ADDR;
                 mxc_nand_resources[0].end = MX31_NFC_BASE_ADDR + 0xfff;
+                imx_wdt_resources[0].start = MX31_WDOG_BASE_ADDR;
+                imx_wdt_resources[0].end = MX31_WDOG_BASE_ADDR + 0x3fff;
                 mxc_register_device(&mxc_rnga_device, NULL);
         }
         if (cpu_is_mx35()) {
@@ -597,6 +612,8 @@ static int mx3_devices_init(void)
                 imx_ssi_resources0[1].end = MX35_INT_SSI1;
                 imx_ssi_resources1[1].start = MX35_INT_SSI2;
                 imx_ssi_resources1[1].end = MX35_INT_SSI2;
+                imx_wdt_resources[0].start = MX35_WDOG_BASE_ADDR;
+                imx_wdt_resources[0].end = MX35_WDOG_BASE_ADDR + 0x3fff;
         }
 
         return 0;
diff --git a/arch/arm/mach-mx3/devices.h b/arch/arm/mach-mx3/devices.h
index 42cf175eac6..4f77eb50127 100644
--- a/arch/arm/mach-mx3/devices.h
+++ b/arch/arm/mach-mx3/devices.h
@@ -25,4 +25,5 @@ extern struct platform_device mxc_spi_device1;
 extern struct platform_device mxc_spi_device2;
 extern struct platform_device imx_ssi_device0;
 extern struct platform_device imx_ssi_device1;
-
+extern struct platform_device imx_ssi_device1;
+extern struct platform_device imx_wdt_device0;
diff --git a/arch/arm/mach-mx3/iomux.c b/arch/arm/mach-mx3/iomux-imx31.c
index c66ccbcdc11..a1d7fa5123d 100644
--- a/arch/arm/mach-mx3/iomux.c
+++ b/arch/arm/mach-mx3/iomux-imx31.c
@@ -29,7 +29,7 @@
 /*
  * IOMUX register (base) addresses
  */
-#define IOMUX_BASE      IO_ADDRESS(IOMUXC_BASE_ADDR)
+#define IOMUX_BASE      MX31_IO_ADDRESS(MX31_IOMUXC_BASE_ADDR)
 #define IOMUXINT_OBS1   (IOMUX_BASE + 0x000)
 #define IOMUXINT_OBS2   (IOMUX_BASE + 0x004)
 #define IOMUXGPR        (IOMUX_BASE + 0x008)
diff --git a/arch/arm/mach-mx3/armadillo5x0.c b/arch/arm/mach-mx3/mach-armadillo5x0.c
index 54aab401dbd..5f72ec91af2 100644
--- a/arch/arm/mach-mx3/armadillo5x0.c
+++ b/arch/arm/mach-mx3/mach-armadillo5x0.c
@@ -36,6 +36,9 @@
 #include <linux/input.h>
 #include <linux/gpio_keys.h>
 #include <linux/i2c.h>
+#include <linux/usb/otg.h>
+#include <linux/usb/ulpi.h>
+#include <linux/delay.h>
 
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
@@ -52,6 +55,8 @@
 #include <mach/ipu.h>
 #include <mach/mx3fb.h>
 #include <mach/mxc_nand.h>
+#include <mach/mxc_ehci.h>
+#include <mach/ulpi.h>
 
 #include "devices.h"
 #include "crm_regs.h"
@@ -103,8 +108,158 @@ static int armadillo5x0_pins[] = {
         /* I2C2 */
         MX31_PIN_CSPI2_MOSI__SCL,
         MX31_PIN_CSPI2_MISO__SDA,
+        /* OTG */
+        MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
+        MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
+        MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
+        MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
+        MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
+        MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
+        MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
+        MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
+        MX31_PIN_USBOTG_CLK__USBOTG_CLK,
+        MX31_PIN_USBOTG_DIR__USBOTG_DIR,
+        MX31_PIN_USBOTG_NXT__USBOTG_NXT,
+        MX31_PIN_USBOTG_STP__USBOTG_STP,
+        /* USB host 2 */
+        IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
 };
 
+/* USB */
+#if defined(CONFIG_USB_ULPI)
+
+#define OTG_RESET IOMUX_TO_GPIO(MX31_PIN_STXD4)
+#define USBH2_RESET IOMUX_TO_GPIO(MX31_PIN_SCK6)
+#define USBH2_CS IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)
+
+#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
+                        PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
+
+static int usbotg_init(struct platform_device *pdev)
+{
+        int err;
+
+        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
+
+        /* Chip already enabled by hardware */
+        /* OTG phy reset*/
+        err = gpio_request(OTG_RESET, "USB-OTG-RESET");
+        if (err) {
+                pr_err("Failed to request the usb otg reset gpio\n");
+                return err;
+        }
+
+        err = gpio_direction_output(OTG_RESET, 1/*HIGH*/);
+        if (err) {
+                pr_err("Failed to reset the usb otg phy\n");
+                goto otg_free_reset;
+        }
+
+        gpio_set_value(OTG_RESET, 0/*LOW*/);
+        mdelay(5);
+        gpio_set_value(OTG_RESET, 1/*HIGH*/);
+
+        return 0;
+
+otg_free_reset:
+        gpio_free(OTG_RESET);
+        return err;
+}
+
+static int usbh2_init(struct platform_device *pdev)
+{
+        int err;
+
+        mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
+
+        mxc_iomux_set_gpr(MUX_PGP_UH2, true);
+
+
+        /* Enable the chip */
+        err = gpio_request(USBH2_CS, "USB-H2-CS");
+        if (err) {
+                pr_err("Failed to request the usb host 2 CS gpio\n");
+                return err;
+        }
+
+        err = gpio_direction_output(USBH2_CS, 0/*Enabled*/);
+        if (err) {
+                pr_err("Failed to drive the usb host 2 CS gpio\n");
+                goto h2_free_cs;
+        }
+
+        /* H2 phy reset*/
+        err = gpio_request(USBH2_RESET, "USB-H2-RESET");
+        if (err) {
+                pr_err("Failed to request the usb host 2 reset gpio\n");
+                goto h2_free_cs;
+        }
+
+        err = gpio_direction_output(USBH2_RESET, 1/*HIGH*/);
+        if (err) {
+                pr_err("Failed to reset the usb host 2 phy\n");
+                goto h2_free_reset;
+        }
+
+        gpio_set_value(USBH2_RESET, 0/*LOW*/);
+        mdelay(5);
+        gpio_set_value(USBH2_RESET, 1/*HIGH*/);
+
+        return 0;
+
+h2_free_reset:
+        gpio_free(USBH2_RESET);
+h2_free_cs:
+        gpio_free(USBH2_CS);
+        return err;
+}
+
+static struct mxc_usbh_platform_data usbotg_pdata = {
+        .init   = usbotg_init,
+        .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
+        .flags  = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI,
+};
+
+static struct mxc_usbh_platform_data usbh2_pdata = {
+        .init   = usbh2_init,
+        .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
+        .flags  = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI,
+};
+#endif /* CONFIG_USB_ULPI */
+
 /* RTC over I2C*/
 #define ARMADILLO5X0_RTC_GPIO   IOMUX_TO_GPIO(MX31_PIN_SRXD4)
 
@@ -182,8 +337,8 @@ static struct physmap_flash_data armadillo5x0_nor_flash_pdata = {
 
 static struct resource armadillo5x0_nor_flash_resource = {
         .flags          = IORESOURCE_MEM,
-        .start          = CS0_BASE_ADDR,
-        .end            = CS0_BASE_ADDR + SZ_64M - 1,
+        .start          = MX31_CS0_BASE_ADDR,
+        .end            = MX31_CS0_BASE_ADDR + SZ_64M - 1,
 };
 
 static struct platform_device armadillo5x0_nor_flash = {
@@ -311,8 +466,8 @@ static struct imxmmc_platform_data sdhc_pdata = {
  */
 static struct resource armadillo5x0_smc911x_resources[] = {
         {
-                .start  = CS3_BASE_ADDR,
-                .end    = CS3_BASE_ADDR + SZ_32M - 1,
+                .start  = MX31_CS3_BASE_ADDR,
+                .end    = MX31_CS3_BASE_ADDR + SZ_32M - 1,
                 .flags  = IORESOURCE_MEM,
         }, {
                 .start  = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
@@ -393,6 +548,17 @@ static void __init armadillo5x0_init(void)
         if (armadillo5x0_i2c_rtc.irq == 0)
                 pr_warning("armadillo5x0_init: failed to get RTC IRQ\n");
         i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1);
+
+        /* USB */
+#if defined(CONFIG_USB_ULPI)
+        usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
+                        USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
+        usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
+                        USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
+
+        mxc_register_device(&mxc_otg_host, &usbotg_pdata);
+        mxc_register_device(&mxc_usbh2, &usbh2_pdata);
+#endif
 }
 
 static void __init armadillo5x0_timer_init(void)
@@ -406,9 +572,9 @@ static struct sys_timer armadillo5x0_timer = {
 
 MACHINE_START(ARMADILLO5X0, "Armadillo-500")
         /* Maintainer: Alberto Panizzo  */
-        .phys_io        = AIPS1_BASE_ADDR,
-        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x00000100,
+        .phys_io        = MX31_AIPS1_BASE_ADDR,
+        .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
+        .boot_params    = MX3x_PHYS_OFFSET + 0x100,
         .map_io         = mx31_map_io,
         .init_irq       = mx31_init_irq,
         .timer          = &armadillo5x0_timer,
diff --git a/arch/arm/mach-mx3/kzmarm11.c b/arch/arm/mach-mx3/mach-kzm_arm11_01.c
index 6fa99ce3008..f085d5d1a6d 100644
--- a/arch/arm/mach-mx3/kzmarm11.c
+++ b/arch/arm/mach-mx3/mach-kzm_arm11_01.c
@@ -46,13 +46,18 @@
 
 #include "devices.h"
 
+#define KZM_ARM11_IO_ADDRESS(x) (                                       \
+        IMX_IO_ADDRESS(x, MX31_CS4) ?:                                  \
+        IMX_IO_ADDRESS(x, MX31_CS5) ?:                                  \
+        MX31_IO_ADDRESS(x))
+
 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
 /*
  * KZM-ARM11-01 has an external UART on FPGA
  */
 static struct plat_serial8250_port serial_platform_data[] = {
         {
-                .membase        = IO_ADDRESS(KZM_ARM11_16550),
+                .membase        = KZM_ARM11_IO_ADDRESS(KZM_ARM11_16550),
                 .mapbase        = KZM_ARM11_16550,
                 .irq            = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
                 .irqflags       = IRQ_TYPE_EDGE_RISING,
@@ -102,9 +107,9 @@ static int __init kzm_init_ext_uart(void)
         /*
          * Unmask UART interrupt
          */
-        tmp = __raw_readb(IO_ADDRESS(KZM_ARM11_CTL1));
+        tmp = __raw_readb(KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
         tmp |= 0x2;
-        __raw_writeb(tmp, IO_ADDRESS(KZM_ARM11_CTL1));
+        __raw_writeb(tmp, KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
 
         return platform_device_register(&serial_device);
 }
@@ -128,8 +133,8 @@ static struct smsc911x_platform_config kzm_smsc9118_config = {
 
 static struct resource kzm_smsc9118_resources[] = {
         {
-                .start  = CS5_BASE_ADDR,
-                .end    = CS5_BASE_ADDR + SZ_128K - 1,
+                .start  = MX31_CS5_BASE_ADDR,
+                .end    = MX31_CS5_BASE_ADDR + SZ_128K - 1,
                 .flags  = IORESOURCE_MEM,
         },
         {
@@ -222,15 +227,15 @@ static void __init kzm_board_init(void)
  */
 static struct map_desc kzm_io_desc[] __initdata = {
         {
-                .virtual        = CS4_BASE_ADDR_VIRT,
-                .pfn            = __phys_to_pfn(CS4_BASE_ADDR),
-                .length         = CS4_SIZE,
+                .virtual        = MX31_CS4_BASE_ADDR_VIRT,
+                .pfn            = __phys_to_pfn(MX31_CS4_BASE_ADDR),
+                .length         = MX31_CS4_SIZE,
                 .type           = MT_DEVICE
         },
         {
-                .virtual        = CS5_BASE_ADDR_VIRT,
-                .pfn            = __phys_to_pfn(CS5_BASE_ADDR),
-                .length         = CS5_SIZE,
+                .virtual        = MX31_CS5_BASE_ADDR_VIRT,
+                .pfn            = __phys_to_pfn(MX31_CS5_BASE_ADDR),
+                .length         = MX31_CS5_SIZE,
                 .type           = MT_DEVICE
         },
 };
@@ -258,9 +263,9 @@ static struct sys_timer kzm_timer = {
  * initialize __mach_desc_KZM_ARM11_01 data structure.
  */
 MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
-        .phys_io        = AIPS1_BASE_ADDR,
-        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX31_AIPS1_BASE_ADDR,
+        .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
+        .boot_params    = MX3x_PHYS_OFFSET + 0x100,
         .map_io         = kzm_map_io,
         .init_irq       = mx31_init_irq,
         .init_machine   = kzm_board_init,
diff --git a/arch/arm/mach-mx3/mx31pdk.c b/arch/arm/mach-mx3/mach-mx31_3ds.c
index 18715f1aa7e..f54af1e29ca 100644
--- a/arch/arm/mach-mx3/mx31pdk.c
+++ b/arch/arm/mach-mx3/mach-mx31_3ds.c
@@ -23,6 +23,9 @@
 #include <linux/gpio.h>
 #include <linux/smsc911x.h>
 #include <linux/platform_device.h>
+#include <linux/mfd/mc13783.h>
+#include <linux/spi/spi.h>
+#include <linux/regulator/machine.h>
 
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
@@ -31,26 +34,96 @@
 #include <asm/memory.h>
 #include <asm/mach/map.h>
 #include <mach/common.h>
-#include <mach/board-mx31pdk.h>
+#include <mach/board-mx31_3ds.h>
 #include <mach/imx-uart.h>
 #include <mach/iomux-mx3.h>
+#include <mach/mxc_nand.h>
+#include <mach/spi.h>
 #include "devices.h"
 
 /*!
- * @file mx31pdk.c
+ * @file mx31_3ds.c
  *
  * @brief This file contains the board-specific initialization routines.
  *
  * @ingroup System
  */
 
-static int mx31pdk_pins[] = {
+static int mx31_3ds_pins[] = {
         /* UART1 */
         MX31_PIN_CTS1__CTS1,
         MX31_PIN_RTS1__RTS1,
         MX31_PIN_TXD1__TXD1,
         MX31_PIN_RXD1__RXD1,
         IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
+        /* SPI 1 */
+        MX31_PIN_CSPI2_SCLK__SCLK,
+        MX31_PIN_CSPI2_MOSI__MOSI,
+        MX31_PIN_CSPI2_MISO__MISO,
+        MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
+        MX31_PIN_CSPI2_SS0__SS0,
+        MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */
+        /* MC13783 IRQ */
+        IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO),
+};
+
+/* Regulators */
+static struct regulator_init_data pwgtx_init = {
+        .constraints = {
+                .boot_on        = 1,
+                .always_on      = 1,
+        },
+};
+
+static struct mc13783_regulator_init_data mx31_3ds_regulators[] = {
+        {
+                .id = MC13783_REGU_PWGT1SPI, /* Power Gate for ARM core. */
+                .init_data = &pwgtx_init,
+        }, {
+                .id = MC13783_REGU_PWGT2SPI, /* Power Gate for L2 Cache. */
+                .init_data = &pwgtx_init,
+        },
+};
+
+/* MC13783 */
+static struct mc13783_platform_data mc13783_pdata __initdata = {
+        .regulators = mx31_3ds_regulators,
+        .num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
+        .flags  = MC13783_USE_REGULATOR,
+};
+
+/* SPI */
+static int spi1_internal_chipselect[] = {
+        MXC_SPI_CS(0),
+        MXC_SPI_CS(2),
+};
+
+static struct spi_imx_master spi1_pdata = {
+        .chipselect     = spi1_internal_chipselect,
+        .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect),
+};
+
+static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
+        {
+                .modalias       = "mc13783",
+                .max_speed_hz   = 1000000,
+                .bus_num        = 1,
+                .chip_select    = 1, /* SS2 */
+                .platform_data  = &mc13783_pdata,
+                .irq            = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
+                .mode = SPI_CS_HIGH,
+        },
+};
+
+/*
+ * NAND Flash
+ */
+static struct mxc_nand_platform_data imx31_3ds_nand_flash_pdata = {
+        .width          = 1,
+        .hw_ecc         = 1,
+#ifdef MACH_MX31_3DS_MXC_NAND_USE_BBT
+        .flash_bbt      = 1,
+#endif
 };
 
 static struct imxuart_platform_data uart_pdata = {
@@ -95,7 +168,7 @@ static struct platform_device smsc911x_device = {
  * LEDs, switches, interrupts for Ethernet.
  */
 
-static void mx31pdk_expio_irq_handler(uint32_t irq, struct irq_desc *desc)
+static void mx31_3ds_expio_irq_handler(uint32_t irq, struct irq_desc *desc)
 {
         uint32_t imr_val;
         uint32_t int_valid;
@@ -163,7 +236,7 @@ static struct irq_chip expio_irq_chip = {
         .unmask = expio_unmask_irq,
 };
 
-static int __init mx31pdk_init_expio(void)
+static int __init mx31_3ds_init_expio(void)
 {
         int i;
         int ret;
@@ -176,7 +249,7 @@ static int __init mx31pdk_init_expio(void)
                 return -ENODEV;
         }
 
-        pr_info("i.MX31PDK Debug board detected, rev = 0x%04X\n",
+        pr_info("i.MX31 3DS Debug board detected, rev = 0x%04X\n",
                 __raw_readw(CPLD_CODE_VER_REG));
 
         /*
@@ -201,7 +274,7 @@ static int __init mx31pdk_init_expio(void)
                 set_irq_flags(i, IRQF_VALID);
         }
         set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_LOW);
-        set_irq_chained_handler(EXPIO_PARENT_INT, mx31pdk_expio_irq_handler);
+        set_irq_chained_handler(EXPIO_PARENT_INT, mx31_3ds_expio_irq_handler);
 
         return 0;
 }
@@ -209,11 +282,11 @@ static int __init mx31pdk_init_expio(void)
 /*
  * This structure defines the MX31 memory map.
  */
-static struct map_desc mx31pdk_io_desc[] __initdata = {
+static struct map_desc mx31_3ds_io_desc[] __initdata = {
         {
-                .virtual = CS5_BASE_ADDR_VIRT,
-                .pfn = __phys_to_pfn(CS5_BASE_ADDR),
-                .length = CS5_SIZE,
+                .virtual = MX31_CS5_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR),
+                .length = MX31_CS5_SIZE,
                 .type = MT_DEVICE,
         },
 };
@@ -221,10 +294,10 @@ static struct map_desc mx31pdk_io_desc[] __initdata = {
 /*
  * Set up static virtual mappings.
  */
-static void __init mx31pdk_map_io(void)
+static void __init mx31_3ds_map_io(void)
 {
         mx31_map_io();
-        iotable_init(mx31pdk_io_desc, ARRAY_SIZE(mx31pdk_io_desc));
+        iotable_init(mx31_3ds_io_desc, ARRAY_SIZE(mx31_3ds_io_desc));
 }
 
 /*!
@@ -232,35 +305,40 @@ static void __init mx31pdk_map_io(void)
  */
 static void __init mxc_board_init(void)
 {
-        mxc_iomux_setup_multiple_pins(mx31pdk_pins, ARRAY_SIZE(mx31pdk_pins),
-                                      "mx31pdk");
+        mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins),
+                                      "mx31_3ds");
 
         mxc_register_device(&mxc_uart_device0, &uart_pdata);
+        mxc_register_device(&mxc_nand_device, &imx31_3ds_nand_flash_pdata);
+
+        mxc_register_device(&mxc_spi_device1, &spi1_pdata);
+        spi_register_board_info(mx31_3ds_spi_devs,
+                                                ARRAY_SIZE(mx31_3ds_spi_devs));
 
-        if (!mx31pdk_init_expio())
+        if (!mx31_3ds_init_expio())
                 platform_device_register(&smsc911x_device);
 }
 
-static void __init mx31pdk_timer_init(void)
+static void __init mx31_3ds_timer_init(void)
 {
         mx31_clocks_init(26000000);
 }
 
-static struct sys_timer mx31pdk_timer = {
-        .init   = mx31pdk_timer_init,
+static struct sys_timer mx31_3ds_timer = {
+        .init   = mx31_3ds_timer_init,
 };
 
 /*
  * The following uses standard kernel macros defined in arch.h in order to
- * initialize __mach_desc_MX31PDK data structure.
+ * initialize __mach_desc_MX31_3DS data structure.
  */
 MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
         /* Maintainer: Freescale Semiconductor, Inc. */
-        .phys_io        = AIPS1_BASE_ADDR,
-        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
-        .map_io         = mx31pdk_map_io,
+        .phys_io        = MX31_AIPS1_BASE_ADDR,
+        .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
+        .boot_params    = MX3x_PHYS_OFFSET + 0x100,
+        .map_io         = mx31_3ds_map_io,
         .init_irq       = mx31_init_irq,
         .init_machine   = mxc_board_init,
-        .timer          = &mx31pdk_timer,
+        .timer          = &mx31_3ds_timer,
 MACHINE_END
diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mach-mx31ads.c
index 938c549767d..b3d1a1895c2 100644
--- a/arch/arm/mach-mx3/mx31ads.c
+++ b/arch/arm/mach-mx3/mach-mx31ads.c
@@ -60,7 +60,7 @@
 static struct plat_serial8250_port serial_platform_data[] = {
         {
                 .membase  = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTA),
-                .mapbase  = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTA),
+                .mapbase  = (unsigned long)(MX31_CS4_BASE_ADDR + PBC_SC16C652_UARTA),
                 .irq      = EXPIO_INT_XUART_INTA,
                 .uartclk  = 14745600,
                 .regshift = 0,
@@ -68,7 +68,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
                 .flags    = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ,
         }, {
                 .membase  = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTB),
-                .mapbase  = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTB),
+                .mapbase  = (unsigned long)(MX31_CS4_BASE_ADDR + PBC_SC16C652_UARTB),
                 .irq      = EXPIO_INT_XUART_INTB,
                 .uartclk  = 14745600,
                 .regshift = 0,
@@ -309,12 +309,8 @@ static struct regulator_init_data ldo1_data = {
 };
 
 static struct regulator_consumer_supply ldo2_consumers[] = {
-        {
-                .supply = "AVDD",
-        },
-        {
-                .supply = "HPVDD",
-        },
+        { .supply = "AVDD", .dev_name = "1-001a" },
+        { .supply = "HPVDD", .dev_name = "1-001a" },
 };
 
 /* CODEC and SIM */
@@ -385,8 +381,6 @@ static struct wm8350_audio_platform_data imx32ads_wm8350_setup = {
 
 static int mx31_wm8350_init(struct wm8350 *wm8350)
 {
-        int i;
-
         wm8350_gpio_config(wm8350, 0, WM8350_GPIO_DIR_IN,
                            WM8350_GPIO0_PWR_ON_IN, WM8350_GPIO_ACTIVE_LOW,
                            WM8350_GPIO_PULL_UP, WM8350_GPIO_INVERT_OFF,
@@ -422,10 +416,6 @@ static int mx31_wm8350_init(struct wm8350 *wm8350)
                            WM8350_GPIO_PULL_NONE, WM8350_GPIO_INVERT_OFF,
                            WM8350_GPIO_DEBOUNCE_OFF);
 
-        /* Fix up for our own supplies. */
-        for (i = 0; i < ARRAY_SIZE(ldo2_consumers); i++)
-                ldo2_consumers[i].dev = wm8350->dev;
-
         wm8350_register_regulator(wm8350, WM8350_DCDC_1, &sw1a_data);
         wm8350_register_regulator(wm8350, WM8350_DCDC_3, &viohi_data);
         wm8350_register_regulator(wm8350, WM8350_DCDC_4, &violo_data);
@@ -493,14 +483,27 @@ static void mxc_init_i2c(void)
 }
 #endif
 
+static unsigned int ssi_pins[] = {
+        MX31_PIN_SFS5__SFS5,
+        MX31_PIN_SCK5__SCK5,
+        MX31_PIN_SRXD5__SRXD5,
+        MX31_PIN_STXD5__STXD5,
+};
+
+static void mxc_init_audio(void)
+{
+        mxc_register_device(&imx_ssi_device0, NULL);
+        mxc_iomux_setup_multiple_pins(ssi_pins, ARRAY_SIZE(ssi_pins), "ssi");
+}
+
 /*!
  * This structure defines static mappings for the i.MX31ADS board.
  */
 static struct map_desc mx31ads_io_desc[] __initdata = {
         {
-                .virtual        = CS4_BASE_ADDR_VIRT,
-                .pfn            = __phys_to_pfn(CS4_BASE_ADDR),
-                .length         = CS4_SIZE / 2,
+                .virtual        = MX31_CS4_BASE_ADDR_VIRT,
+                .pfn            = __phys_to_pfn(MX31_CS4_BASE_ADDR),
+                .length         = MX31_CS4_SIZE / 2,
                 .type           = MT_DEVICE
         },
 };
@@ -528,6 +531,7 @@ static void __init mxc_board_init(void)
         mxc_init_extuart();
         mxc_init_imx_uart();
         mxc_init_i2c();
+        mxc_init_audio();
 }
 
 static void __init mx31ads_timer_init(void)
@@ -545,9 +549,9 @@ static struct sys_timer mx31ads_timer = {
  */
 MACHINE_START(MX31ADS, "Freescale MX31ADS")
         /* Maintainer: Freescale Semiconductor, Inc. */
-        .phys_io        = AIPS1_BASE_ADDR,
-        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX31_AIPS1_BASE_ADDR,
+        .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
+        .boot_params    = MX3x_PHYS_OFFSET + 0x100,
         .map_io         = mx31ads_map_io,
         .init_irq       = mx31ads_init_irq,
         .init_machine   = mxc_board_init,
diff --git a/arch/arm/mach-mx3/mx31lilly.c b/arch/arm/mach-mx3/mach-mx31lilly.c
index 9ce029f554b..80847b04c06 100644
--- a/arch/arm/mach-mx3/mx31lilly.c
+++ b/arch/arm/mach-mx3/mach-mx31lilly.c
@@ -57,8 +57,8 @@
 
 static struct resource smsc91x_resources[] = {
         {
-                .start  = CS4_BASE_ADDR,
-                .end    = CS4_BASE_ADDR + 0xffff,
+                .start  = MX31_CS4_BASE_ADDR,
+                .end    = MX31_CS4_BASE_ADDR + 0xffff,
                 .flags  = IORESOURCE_MEM,
         },
         {
@@ -195,9 +195,9 @@ static struct sys_timer mx31lilly_timer = {
 };
 
 MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
-        .phys_io        = AIPS1_BASE_ADDR,
-        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX31_AIPS1_BASE_ADDR,
+        .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
+        .boot_params    = MX3x_PHYS_OFFSET + 0x100,
         .map_io         = mx31_map_io,
         .init_irq       = mx31_init_irq,
         .init_machine   = mx31lilly_board_init,
diff --git a/arch/arm/mach-mx3/mx31lite.c b/arch/arm/mach-mx3/mach-mx31lite.c
index 789b20d1730..2b6d1140087 100644
--- a/arch/arm/mach-mx3/mx31lite.c
+++ b/arch/arm/mach-mx3/mach-mx31lite.c
@@ -82,8 +82,8 @@ static struct smsc911x_platform_config smsc911x_config = {
 
 static struct resource smsc911x_resources[] = {
         {
-                .start          = CS4_BASE_ADDR,
-                .end            = CS4_BASE_ADDR + 0x100,
+                .start          = MX31_CS4_BASE_ADDR,
+                .end            = MX31_CS4_BASE_ADDR + 0x100,
                 .flags          = IORESOURCE_MEM,
         }, {
                 .start          = IOMUX_TO_IRQ(MX31_PIN_SFS6),
@@ -214,9 +214,9 @@ static struct platform_device physmap_flash_device = {
  */
 static struct map_desc mx31lite_io_desc[] __initdata = {
         {
-                .virtual = CS4_BASE_ADDR_VIRT,
-                .pfn = __phys_to_pfn(CS4_BASE_ADDR),
-                .length = CS4_SIZE,
+                .virtual = MX31_CS4_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
+                .length = MX31_CS4_SIZE,
                 .type = MT_DEVICE
         }
 };
@@ -287,9 +287,9 @@ struct sys_timer mx31lite_timer = {
 
 MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
         /* Maintainer: Freescale Semiconductor, Inc. */
-        .phys_io        = AIPS1_BASE_ADDR,
-        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX31_AIPS1_BASE_ADDR,
+        .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
+        .boot_params    = MX3x_PHYS_OFFSET + 0x100,
         .map_io         = mx31lite_map_io,
         .init_irq       = mx31_init_irq,
         .init_machine   = mxc_board_init,
diff --git a/arch/arm/mach-mx3/mx31moboard.c b/arch/arm/mach-mx3/mach-mx31moboard.c
index cfd605d078e..fccb9207b78 100644
--- a/arch/arm/mach-mx3/mx31moboard.c
+++ b/arch/arm/mach-mx3/mach-mx31moboard.c
@@ -19,6 +19,7 @@
 #include <linux/delay.h>
 #include <linux/dma-mapping.h>
 #include <linux/fsl_devices.h>
+#include <linux/gfp.h>
 #include <linux/gpio.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
@@ -96,9 +97,6 @@ static unsigned int moboard_pins[] = {
         /* LEDs */
         MX31_PIN_SVEN0__GPIO2_0, MX31_PIN_STX0__GPIO2_1,
         MX31_PIN_SRX0__GPIO2_2, MX31_PIN_SIMPD0__GPIO2_3,
-        /* SEL */
-        MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
-        MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
         /* SPI1 */
         MX31_PIN_CSPI2_MOSI__MOSI, MX31_PIN_CSPI2_MISO__MISO,
         MX31_PIN_CSPI2_SCLK__SCLK, MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
@@ -352,9 +350,7 @@ static struct fsl_usb2_platform_data usb_pdata = {
 
 static int moboard_usbh2_hw_init(struct platform_device *pdev)
 {
-        int ret = gpio_request(USBH2_EN_B, "usbh2-en");
-        if (ret)
-                return ret;
+        int ret;
 
         mxc_iomux_set_gpr(MUX_PGP_UH2, true);
 
@@ -371,6 +367,9 @@ static int moboard_usbh2_hw_init(struct platform_device *pdev)
         mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
         mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
 
+        ret = gpio_request(USBH2_EN_B, "usbh2-en");
+        if (ret)
+                return ret;
         gpio_direction_output(USBH2_EN_B, 0);
 
         return 0;
@@ -431,34 +430,6 @@ static struct platform_device mx31moboard_leds_device = {
         },
 };
 
-#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
-#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
-#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
-#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
-
-static void mx31moboard_init_sel_gpios(void)
-{
-        if (!gpio_request(SEL0, "sel0")) {
-                gpio_direction_input(SEL0);
-                gpio_export(SEL0, true);
-        }
-
-        if (!gpio_request(SEL1, "sel1")) {
-                gpio_direction_input(SEL1);
-                gpio_export(SEL1, true);
-        }
-
-        if (!gpio_request(SEL2, "sel2")) {
-                gpio_direction_input(SEL2);
-                gpio_export(SEL2, true);
-        }
-
-        if (!gpio_request(SEL3, "sel3")) {
-                gpio_direction_input(SEL3);
-                gpio_export(SEL3, true);
-        }
-}
-
 static struct ipu_platform_data mx3_ipu_data = {
         .irq_base = MXC_IPU_IRQ_START,
 };
@@ -518,8 +489,6 @@ static void __init mxc_board_init(void)
 
         mxc_register_device(&mxc_uart_device4, &uart4_pdata);
 
-        mx31moboard_init_sel_gpios();
-
         mxc_register_device(&mxc_i2c_device0, &moboard_i2c0_pdata);
         mxc_register_device(&mxc_i2c_device1, &moboard_i2c1_pdata);
 
@@ -552,6 +521,9 @@ static void __init mxc_board_init(void)
         case MX31MARXBOT:
                 mx31moboard_marxbot_init();
                 break;
+        case MX31SMARTBOT:
+                mx31moboard_smartbot_init();
+                break;
         default:
                 printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n",
                         mx31moboard_baseboard);
@@ -569,9 +541,9 @@ struct sys_timer mx31moboard_timer = {
 
 MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard")
         /* Maintainer: Valentin Longchamp, EPFL Mobots group */
-        .phys_io        = AIPS1_BASE_ADDR,
-        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX31_AIPS1_BASE_ADDR,
+        .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
+        .boot_params    = MX3x_PHYS_OFFSET + 0x100,
         .map_io         = mx31_map_io,
         .init_irq       = mx31_init_irq,
         .init_machine   = mxc_board_init,
diff --git a/arch/arm/mach-mx3/mx35pdk.c b/arch/arm/mach-mx3/mach-mx35pdk.c
index 0bbc65ea23c..bcac84d4dca 100644
--- a/arch/arm/mach-mx3/mx35pdk.c
+++ b/arch/arm/mach-mx3/mach-mx35pdk.c
@@ -106,9 +106,9 @@ struct sys_timer mx35pdk_timer = {
 
 MACHINE_START(MX35_3DS, "Freescale MX35PDK")
         /* Maintainer: Freescale Semiconductor, Inc */
-        .phys_io        = AIPS1_BASE_ADDR,
-        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX35_AIPS1_BASE_ADDR,
+        .io_pg_offst    = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = MX3x_PHYS_OFFSET + 0x100,
         .map_io         = mx35_map_io,
         .init_irq       = mx35_init_irq,
         .init_machine   = mxc_board_init,
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/mach-pcm037.c
index 5be396917c9..2df1ec55a97 100644
--- a/arch/arm/mach-mx3/pcm037.c
+++ b/arch/arm/mach-mx3/mach-pcm037.c
@@ -33,6 +33,9 @@
 #include <linux/irq.h>
 #include <linux/fsl_devices.h>
 #include <linux/can/platform/sja1000.h>
+#include <linux/usb/otg.h>
+#include <linux/usb/ulpi.h>
+#include <linux/gfp.h>
 
 #include <media/soc_camera.h>
 
@@ -51,6 +54,8 @@
 #include <mach/mx3_camera.h>
 #include <mach/mx3fb.h>
 #include <mach/mxc_nand.h>
+#include <mach/mxc_ehci.h>
+#include <mach/ulpi.h>
 
 #include "devices.h"
 #include "pcm037.h"
@@ -172,19 +177,7 @@ static unsigned int pcm037_pins[] = {
         MX31_PIN_CSI_VSYNC__CSI_VSYNC,
         /* GPIO */
         IOMUX_MODE(MX31_PIN_ATA_DMACK, IOMUX_CONFIG_GPIO),
-};
-
-static struct physmap_flash_data pcm037_flash_data = {
-        .width  = 2,
-};
-
-static struct resource pcm037_flash_resource = {
-        .start  = 0xa0000000,
-        .end    = 0xa1ffffff,
-        .flags  = IORESOURCE_MEM,
-};
-
-static int usbotg_pins[] = {
+        /* OTG */
         MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
         MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
         MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
@@ -197,39 +190,29 @@ static int usbotg_pins[] = {
         MX31_PIN_USBOTG_DIR__USBOTG_DIR,
         MX31_PIN_USBOTG_NXT__USBOTG_NXT,
         MX31_PIN_USBOTG_STP__USBOTG_STP,
+        /* USB host 2 */
+        IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
+        IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
 };
 
-/* USB OTG HS port */
-static int __init gpio_usbotg_hs_activate(void)
-{
-        int ret = mxc_iomux_setup_multiple_pins(usbotg_pins,
-                                        ARRAY_SIZE(usbotg_pins), "usbotg");
-
-        if (ret < 0) {
-                printk(KERN_ERR "Cannot set up OTG pins\n");
-                return ret;
-        }
-
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-        mxc_iomux_set_pad(MX31_PIN_USBOTG_STP,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
-
-        return 0;
-}
+static struct physmap_flash_data pcm037_flash_data = {
+        .width  = 2,
+};
 
-/* OTG config */
-static struct fsl_usb2_platform_data usb_pdata = {
-        .operating_mode = FSL_USB2_DR_DEVICE,
-        .phy_mode       = FSL_USB2_PHY_ULPI,
+static struct resource pcm037_flash_resource = {
+        .start  = 0xa0000000,
+        .end    = 0xa1ffffff,
+        .flags  = IORESOURCE_MEM,
 };
 
 static struct platform_device pcm037_flash = {
@@ -248,8 +231,8 @@ static struct imxuart_platform_data uart_pdata = {
 
 static struct resource smsc911x_resources[] = {
         {
-                .start          = CS1_BASE_ADDR + 0x300,
-                .end            = CS1_BASE_ADDR + 0x300 + SZ_64K - 1,
+                .start          = MX31_CS1_BASE_ADDR + 0x300,
+                .end            = MX31_CS1_BASE_ADDR + 0x300 + SZ_64K - 1,
                 .flags          = IORESOURCE_MEM,
         }, {
                 .start          = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
@@ -281,8 +264,8 @@ static struct platdata_mtd_ram pcm038_sram_data = {
 };
 
 static struct resource pcm038_sram_resource = {
-        .start = CS4_BASE_ADDR,
-        .end   = CS4_BASE_ADDR + 512 * 1024 - 1,
+        .start = MX31_CS4_BASE_ADDR,
+        .end   = MX31_CS4_BASE_ADDR + 512 * 1024 - 1,
         .flags = IORESOURCE_MEM,
 };
 
@@ -536,8 +519,8 @@ static struct mx3fb_platform_data mx3fb_pdata = {
 
 static struct resource pcm970_sja1000_resources[] = {
         {
-                .start   = CS5_BASE_ADDR,
-                .end     = CS5_BASE_ADDR + 0x100 - 1,
+                .start   = MX31_CS5_BASE_ADDR,
+                .end     = MX31_CS5_BASE_ADDR + 0x100 - 1,
                 .flags   = IORESOURCE_MEM,
         }, {
                 .start   = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)),
@@ -561,16 +544,65 @@ static struct platform_device pcm970_sja1000 = {
         .num_resources = ARRAY_SIZE(pcm970_sja1000_resources),
 };
 
+static struct mxc_usbh_platform_data otg_pdata = {
+        .portsc = MXC_EHCI_MODE_ULPI,
+        .flags  = MXC_EHCI_INTERFACE_DIFF_UNI,
+};
+
+static struct mxc_usbh_platform_data usbh2_pdata = {
+        .portsc = MXC_EHCI_MODE_ULPI,
+        .flags  = MXC_EHCI_INTERFACE_DIFF_UNI,
+};
+
+static struct fsl_usb2_platform_data otg_device_pdata = {
+        .operating_mode = FSL_USB2_DR_DEVICE,
+        .phy_mode       = FSL_USB2_PHY_ULPI,
+};
+
+static int otg_mode_host;
+
+static int __init pcm037_otg_mode(char *options)
+{
+        if (!strcmp(options, "host"))
+                otg_mode_host = 1;
+        else if (!strcmp(options, "device"))
+                otg_mode_host = 0;
+        else
+                pr_info("otg_mode neither \"host\" nor \"device\". "
+                        "Defaulting to device\n");
+        return 0;
+}
+__setup("otg_mode=", pcm037_otg_mode);
+
 /*
  * Board specific initialization.
  */
 static void __init mxc_board_init(void)
 {
         int ret;
+        u32 tmp;
+
+        mxc_iomux_set_gpr(MUX_PGP_UH2, 1);
 
         mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins),
                         "pcm037");
 
+#define H2_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS \
+                | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
+
+        mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, H2_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, H2_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, H2_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBH2_STP, H2_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, H2_PAD_CFG); /* USBH2_DATA0 */
+        mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, H2_PAD_CFG); /* USBH2_DATA1 */
+        mxc_iomux_set_pad(MX31_PIN_SRXD6, H2_PAD_CFG);  /* USBH2_DATA2 */
+        mxc_iomux_set_pad(MX31_PIN_STXD6, H2_PAD_CFG);  /* USBH2_DATA3 */
+        mxc_iomux_set_pad(MX31_PIN_SFS3, H2_PAD_CFG);   /* USBH2_DATA4 */
+        mxc_iomux_set_pad(MX31_PIN_SCK3, H2_PAD_CFG);   /* USBH2_DATA5 */
+        mxc_iomux_set_pad(MX31_PIN_SRXD3, H2_PAD_CFG);  /* USBH2_DATA6 */
+        mxc_iomux_set_pad(MX31_PIN_STXD3, H2_PAD_CFG);  /* USBH2_DATA7 */
+
         if (pcm037_variant() == PCM037_EET)
                 mxc_iomux_setup_multiple_pins(pcm037_uart1_pins,
                         ARRAY_SIZE(pcm037_uart1_pins), "pcm037_uart1");
@@ -608,8 +640,6 @@ static void __init mxc_board_init(void)
         mxc_register_device(&mxcsdhc_device0, &sdhc_pdata);
         mxc_register_device(&mx3_ipu, &mx3_ipu_data);
         mxc_register_device(&mx3_fb, &mx3fb_pdata);
-        if (!gpio_usbotg_hs_activate())
-                mxc_register_device(&mxc_otg_udc_device, &usb_pdata);
 
         /* CSI */
         /* Camera power: default - off */
@@ -623,6 +653,23 @@ static void __init mxc_board_init(void)
                 mxc_register_device(&mx3_camera, &camera_pdata);
 
         platform_device_register(&pcm970_sja1000);
+
+#if defined(CONFIG_USB_ULPI)
+        if (otg_mode_host) {
+                otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
+                                USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
+
+                mxc_register_device(&mxc_otg_host, &otg_pdata);
+        }
+
+        usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
+                                USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
+
+        mxc_register_device(&mxc_usbh2, &usbh2_pdata);
+#endif
+        if (!otg_mode_host)
+                mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
+
 }
 
 static void __init pcm037_timer_init(void)
@@ -636,9 +683,9 @@ struct sys_timer pcm037_timer = {
 
 MACHINE_START(PCM037, "Phytec Phycore pcm037")
         /* Maintainer: Pengutronix */
-        .phys_io        = AIPS1_BASE_ADDR,
-        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX31_AIPS1_BASE_ADDR,
+        .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
+        .boot_params    = MX3x_PHYS_OFFSET + 0x100,
         .map_io         = mx31_map_io,
         .init_irq       = mx31_init_irq,
         .init_machine   = mxc_board_init,
diff --git a/arch/arm/mach-mx3/pcm037_eet.c b/arch/arm/mach-mx3/mach-pcm037_eet.c
index 8d386000fc4..8d386000fc4 100644
--- a/arch/arm/mach-mx3/pcm037_eet.c
+++ b/arch/arm/mach-mx3/mach-pcm037_eet.c
diff --git a/arch/arm/mach-mx3/pcm043.c b/arch/arm/mach-mx3/mach-pcm043.c
index e3aa829be58..1bf1ec2eef5 100644
--- a/arch/arm/mach-mx3/pcm043.c
+++ b/arch/arm/mach-mx3/mach-pcm043.c
@@ -26,8 +26,12 @@
 #include <linux/gpio.h>
 #include <linux/smc911x.h>
 #include <linux/interrupt.h>
+#include <linux/delay.h>
 #include <linux/i2c.h>
 #include <linux/i2c/at24.h>
+#include <linux/usb/otg.h>
+#include <linux/usb/ulpi.h>
+#include <linux/fsl_devices.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -44,6 +48,10 @@
 #include <mach/ipu.h>
 #include <mach/mx3fb.h>
 #include <mach/mxc_nand.h>
+#include <mach/mxc_ehci.h>
+#include <mach/ulpi.h>
+#include <mach/audmux.h>
+#include <mach/ssi.h>
 
 #include "devices.h"
 
@@ -205,6 +213,94 @@ static struct pad_desc pcm043_pads[] = {
         MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS,
         /* gpio */
         MX35_PAD_ATA_CS0__GPIO2_6,
+        /* USB host */
+        MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR,
+        MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC,
+        /* SSI */
+        MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS,
+        MX35_PAD_STXD4__AUDMUX_AUD4_TXD,
+        MX35_PAD_SRXD4__AUDMUX_AUD4_RXD,
+        MX35_PAD_SCK4__AUDMUX_AUD4_TXC,
+};
+
+#define AC97_GPIO_TXFS  (1 * 32 + 31)
+#define AC97_GPIO_TXD   (1 * 32 + 28)
+#define AC97_GPIO_RESET (1 * 32 + 0)
+
+static void pcm043_ac97_warm_reset(struct snd_ac97 *ac97)
+{
+        struct pad_desc txfs_gpio = MX35_PAD_STXFS4__GPIO2_31;
+        struct pad_desc txfs = MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS;
+        int ret;
+
+        ret = gpio_request(AC97_GPIO_TXFS, "SSI");
+        if (ret) {
+                printk("failed to get GPIO_TXFS: %d\n", ret);
+                return;
+        }
+
+        mxc_iomux_v3_setup_pad(&txfs_gpio);
+
+        /* warm reset */
+        gpio_direction_output(AC97_GPIO_TXFS, 1);
+        udelay(2);
+        gpio_set_value(AC97_GPIO_TXFS, 0);
+
+        gpio_free(AC97_GPIO_TXFS);
+        mxc_iomux_v3_setup_pad(&txfs);
+}
+
+static void pcm043_ac97_cold_reset(struct snd_ac97 *ac97)
+{
+        struct pad_desc txfs_gpio = MX35_PAD_STXFS4__GPIO2_31;
+        struct pad_desc txfs = MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS;
+        struct pad_desc txd_gpio = MX35_PAD_STXD4__GPIO2_28;
+        struct pad_desc txd = MX35_PAD_STXD4__AUDMUX_AUD4_TXD;
+        struct pad_desc reset_gpio = MX35_PAD_SD2_CMD__GPIO2_0;
+        int ret;
+
+        ret = gpio_request(AC97_GPIO_TXFS, "SSI");
+        if (ret)
+                goto err1;
+
+        ret = gpio_request(AC97_GPIO_TXD, "SSI");
+        if (ret)
+                goto err2;
+
+        ret = gpio_request(AC97_GPIO_RESET, "SSI");
+        if (ret)
+                goto err3;
+
+        mxc_iomux_v3_setup_pad(&txfs_gpio);
+        mxc_iomux_v3_setup_pad(&txd_gpio);
+        mxc_iomux_v3_setup_pad(&reset_gpio);
+
+        gpio_direction_output(AC97_GPIO_TXFS, 0);
+        gpio_direction_output(AC97_GPIO_TXD, 0);
+
+        /* cold reset */
+        gpio_direction_output(AC97_GPIO_RESET, 0);
+        udelay(10);
+        gpio_direction_output(AC97_GPIO_RESET, 1);
+
+        mxc_iomux_v3_setup_pad(&txd);
+        mxc_iomux_v3_setup_pad(&txfs);
+
+        gpio_free(AC97_GPIO_RESET);
+err3:
+        gpio_free(AC97_GPIO_TXD);
+err2:
+        gpio_free(AC97_GPIO_TXFS);
+err1:
+        if (ret)
+                printk("%s failed with %d\n", __func__, ret);
+        mdelay(1);
+}
+
+static struct imx_ssi_platform_data pcm043_ssi_pdata = {
+        .ac97_reset = pcm043_ac97_cold_reset,
+        .ac97_warm_reset = pcm043_ac97_warm_reset,
+        .flags = IMX_SSI_USE_AC97,
 };
 
 static struct mxc_nand_platform_data pcm037_nand_board_info = {
@@ -212,6 +308,37 @@ static struct mxc_nand_platform_data pcm037_nand_board_info = {
         .hw_ecc = 1,
 };
 
+static struct mxc_usbh_platform_data otg_pdata = {
+        .portsc = MXC_EHCI_MODE_UTMI,
+        .flags  = MXC_EHCI_INTERFACE_DIFF_UNI,
+};
+
+static struct mxc_usbh_platform_data usbh1_pdata = {
+        .portsc = MXC_EHCI_MODE_SERIAL,
+        .flags  = MXC_EHCI_INTERFACE_SINGLE_UNI | MXC_EHCI_INTERNAL_PHY |
+                  MXC_EHCI_IPPUE_DOWN,
+};
+
+static struct fsl_usb2_platform_data otg_device_pdata = {
+        .operating_mode = FSL_USB2_DR_DEVICE,
+        .phy_mode       = FSL_USB2_PHY_UTMI,
+};
+
+static int otg_mode_host;
+
+static int __init pcm043_otg_mode(char *options)
+{
+        if (!strcmp(options, "host"))
+                otg_mode_host = 1;
+        else if (!strcmp(options, "device"))
+                otg_mode_host = 0;
+        else
+                pr_info("otg_mode neither \"host\" nor \"device\". "
+                        "Defaulting to device\n");
+        return 0;
+}
+__setup("otg_mode=", pcm043_otg_mode);
+
 /*
  * Board specific initialization.
  */
@@ -219,10 +346,23 @@ static void __init mxc_board_init(void)
 {
         mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads));
 
+        mxc_audmux_v2_configure_port(3,
+                        MXC_AUDMUX_V2_PTCR_SYN | /* 4wire mode */
+                        MXC_AUDMUX_V2_PTCR_TFSEL(0) |
+                        MXC_AUDMUX_V2_PTCR_TFSDIR,
+                        MXC_AUDMUX_V2_PDCR_RXDSEL(0));
+
+        mxc_audmux_v2_configure_port(0,
+                        MXC_AUDMUX_V2_PTCR_SYN | /* 4wire mode */
+                        MXC_AUDMUX_V2_PTCR_TCSEL(3) |
+                        MXC_AUDMUX_V2_PTCR_TCLKDIR, /* clock is output */
+                        MXC_AUDMUX_V2_PDCR_RXDSEL(3));
+
         platform_add_devices(devices, ARRAY_SIZE(devices));
 
         mxc_register_device(&mxc_uart_device0, &uart_pdata);
         mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info);
+        mxc_register_device(&imx_ssi_device0, &pcm043_ssi_pdata);
 
         mxc_register_device(&mxc_uart_device1, &uart_pdata);
 
@@ -235,6 +375,20 @@ static void __init mxc_board_init(void)
 
         mxc_register_device(&mx3_ipu, &mx3_ipu_data);
         mxc_register_device(&mx3_fb, &mx3fb_pdata);
+
+#if defined(CONFIG_USB_ULPI)
+        if (otg_mode_host) {
+                otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
+                                USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
+
+                mxc_register_device(&mxc_otg_host, &otg_pdata);
+        }
+
+        mxc_register_device(&mxc_usbh1, &usbh1_pdata);
+#endif
+        if (!otg_mode_host)
+                mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
+
 }
 
 static void __init pcm043_timer_init(void)
@@ -248,9 +402,9 @@ struct sys_timer pcm043_timer = {
 
 MACHINE_START(PCM043, "Phytec Phycore pcm043")
         /* Maintainer: Pengutronix */
-        .phys_io        = AIPS1_BASE_ADDR,
-        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX35_AIPS1_BASE_ADDR,
+        .io_pg_offst    = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params    = MX3x_PHYS_OFFSET + 0x100,
         .map_io         = mx35_map_io,
         .init_irq       = mx35_init_irq,
         .init_machine   = mxc_board_init,
diff --git a/arch/arm/mach-mx3/qong.c b/arch/arm/mach-mx3/mach-qong.c
index 044511f1b9a..e5b5b8323a1 100644
--- a/arch/arm/mach-mx3/qong.c
+++ b/arch/arm/mach-mx3/mach-qong.c
@@ -43,7 +43,7 @@
 #define QONG_FPGA_VERSION(major, minor, rev)    \
         (((major & 0xF) << 12) | ((minor & 0xF) << 8) | (rev & 0xFF))
 
-#define QONG_FPGA_BASEADDR              CS1_BASE_ADDR
+#define QONG_FPGA_BASEADDR              MX31_CS1_BASE_ADDR
 #define QONG_FPGA_PERIPH_SIZE           (1 << 24)
 
 #define QONG_FPGA_CTRL_BASEADDR         QONG_FPGA_BASEADDR
@@ -115,8 +115,8 @@ static struct physmap_flash_data qong_flash_data = {
 };
 
 static struct resource qong_flash_resource = {
-        .start = CS0_BASE_ADDR,
-        .end = CS0_BASE_ADDR + QONG_NOR_SIZE - 1,
+        .start = MX31_CS0_BASE_ADDR,
+        .end = MX31_CS0_BASE_ADDR + QONG_NOR_SIZE - 1,
         .flags = IORESOURCE_MEM,
 };
 
@@ -180,8 +180,8 @@ static struct platform_nand_data qong_nand_data = {
 };
 
 static struct resource qong_nand_resource = {
-        .start          = CS3_BASE_ADDR,
-        .end            = CS3_BASE_ADDR + SZ_32M - 1,
+        .start          = MX31_CS3_BASE_ADDR,
+        .end            = MX31_CS3_BASE_ADDR + SZ_32M - 1,
         .flags          = IORESOURCE_MEM,
 };
 
@@ -198,9 +198,7 @@ static struct platform_device qong_nand_device = {
 static void __init qong_init_nand_mtd(void)
 {
         /* init CS */
-        __raw_writel(0x00004f00, CSCR_U(3));
-        __raw_writel(0x20013b31, CSCR_L(3));
-        __raw_writel(0x00020800, CSCR_A(3));
+        mx31_setup_weimcs(3, 0x00004f00, 0x20013b31, 0x00020800);
         mxc_iomux_set_gpr(MUX_SDCTL_CSD1_SEL, true);
 
         /* enable pin */
@@ -275,9 +273,9 @@ static struct sys_timer qong_timer = {
 
 MACHINE_START(QONG, "Dave/DENX QongEVB-LITE")
         /* Maintainer: DENX Software Engineering GmbH */
-        .phys_io        = AIPS1_BASE_ADDR,
-        .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .phys_io        = MX31_AIPS1_BASE_ADDR,
+        .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
+        .boot_params    = MX3x_PHYS_OFFSET + 0x100,
         .map_io         = mx31_map_io,
         .init_irq       = mx31_init_irq,
         .init_machine   = mxc_board_init,
diff --git a/arch/arm/mach-mx3/mx31lite-db.c b/arch/arm/mach-mx3/mx31lite-db.c
index 694611d6b05..093c595ca58 100644
--- a/arch/arm/mach-mx3/mx31lite-db.c
+++ b/arch/arm/mach-mx3/mx31lite-db.c
@@ -28,7 +28,6 @@
 #include <linux/types.h>
 #include <linux/init.h>
 #include <linux/gpio.h>
-#include <linux/platform_device.h>
 #include <linux/leds.h>
 #include <linux/platform_device.h>
 
@@ -67,6 +66,13 @@ static unsigned int litekit_db_board_pins[] __initdata = {
         MX31_PIN_CSPI1_SS0__SS0,
         MX31_PIN_CSPI1_SS1__SS1,
         MX31_PIN_CSPI1_SS2__SS2,
+        /* SDHC1 */
+        MX31_PIN_SD1_DATA0__SD1_DATA0,
+        MX31_PIN_SD1_DATA1__SD1_DATA1,
+        MX31_PIN_SD1_DATA2__SD1_DATA2,
+        MX31_PIN_SD1_DATA3__SD1_DATA3,
+        MX31_PIN_SD1_CLK__SD1_CLK,
+        MX31_PIN_SD1_CMD__SD1_CMD,
 };
 
 /* UART */
@@ -79,11 +85,11 @@ static struct imxuart_platform_data uart_pdata __initdata = {
 static int gpio_det, gpio_wp;
 
 #define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
-                        PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
+                     PAD_CTL_ODE_CMOS)
 
 static int mxc_mmc1_get_ro(struct device *dev)
 {
-        return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_LCS0));
+        return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_GPIO1_6));
 }
 
 static int mxc_mmc1_init(struct device *dev,
@@ -94,12 +100,17 @@ static int mxc_mmc1_init(struct device *dev,
         gpio_det = IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1);
         gpio_wp = IOMUX_TO_GPIO(MX31_PIN_GPIO1_6);
 
-        mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, MMC_PAD_CFG);
-        mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, MMC_PAD_CFG);
-        mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, MMC_PAD_CFG);
-        mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, MMC_PAD_CFG);
+        mxc_iomux_set_pad(MX31_PIN_SD1_DATA0,
+                          MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
+        mxc_iomux_set_pad(MX31_PIN_SD1_DATA1,
+                          MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
+        mxc_iomux_set_pad(MX31_PIN_SD1_DATA2,
+                          MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
+        mxc_iomux_set_pad(MX31_PIN_SD1_DATA3,
+                          MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
+        mxc_iomux_set_pad(MX31_PIN_SD1_CMD,
+                          MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
         mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG);
-        mxc_iomux_set_pad(MX31_PIN_SD1_CMD, MMC_PAD_CFG);
 
         ret = gpio_request(gpio_det, "MMC detect");
         if (ret)
@@ -113,7 +124,7 @@ static int mxc_mmc1_init(struct device *dev,
         gpio_direction_input(gpio_wp);
 
         ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_DCD_DCE1), detect_irq,
-                          IRQF_DISABLED | IRQF_TRIGGER_FALLING,
+                          IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
                           "MMC detect", data);
         if (ret)
                 goto exit_free_wp;
@@ -133,7 +144,7 @@ static void mxc_mmc1_exit(struct device *dev, void *data)
 {
         gpio_free(gpio_det);
         gpio_free(gpio_wp);
-        free_irq(IOMUX_TO_IRQ(MX31_PIN_GPIO1_1), data);
+        free_irq(IOMUX_TO_IRQ(MX31_PIN_DCD_DCE1), data);
 }
 
 static struct imxmmc_platform_data mmc_pdata = {
@@ -194,5 +205,6 @@ void __init mx31lite_db_init(void)
         mxc_register_device(&mxcsdhc_device0, &mmc_pdata);
         mxc_register_device(&mxc_spi_device0, &spi0_pdata);
         platform_device_register(&litekit_led_device);
+        mxc_register_device(&imx_wdt_device0, NULL);
 }
 
diff --git a/arch/arm/mach-mx3/mx31moboard-devboard.c b/arch/arm/mach-mx3/mx31moboard-devboard.c
index 438428eaf76..11b906ce7ea 100644
--- a/arch/arm/mach-mx3/mx31moboard-devboard.c
+++ b/arch/arm/mach-mx3/mx31moboard-devboard.c
@@ -20,6 +20,7 @@
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
+#include <linux/slab.h>
 #include <linux/types.h>
 
 #include <linux/usb/otg.h>
@@ -49,6 +50,9 @@ static unsigned int devboard_pins[] = {
         MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
         MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
         MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
+        /* SEL */
+        MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
+        MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
 };
 
 static struct imxuart_platform_data uart_pdata = {
@@ -108,6 +112,33 @@ static struct imxmmc_platform_data sdhc2_pdata = {
         .exit   = devboard_sdhc2_exit,
 };
 
+#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
+#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
+#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
+#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
+
+static void devboard_init_sel_gpios(void)
+{
+        if (!gpio_request(SEL0, "sel0")) {
+                gpio_direction_input(SEL0);
+                gpio_export(SEL0, true);
+        }
+
+        if (!gpio_request(SEL1, "sel1")) {
+                gpio_direction_input(SEL1);
+                gpio_export(SEL1, true);
+        }
+
+        if (!gpio_request(SEL2, "sel2")) {
+                gpio_direction_input(SEL2);
+                gpio_export(SEL2, true);
+        }
+
+        if (!gpio_request(SEL3, "sel3")) {
+                gpio_direction_input(SEL3);
+                gpio_export(SEL3, true);
+        }
+}
 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
                         PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
 
@@ -196,5 +227,7 @@ void __init mx31moboard_devboard_init(void)
 
         mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata);
 
+        devboard_init_sel_gpios();
+
         devboard_usbh1_init();
 }
diff --git a/arch/arm/mach-mx3/mx31moboard-marxbot.c b/arch/arm/mach-mx3/mx31moboard-marxbot.c
index 1f44b9ccbb0..ffb105e14d8 100644
--- a/arch/arm/mach-mx3/mx31moboard-marxbot.c
+++ b/arch/arm/mach-mx3/mx31moboard-marxbot.c
@@ -22,6 +22,7 @@
 #include <linux/interrupt.h>
 #include <linux/i2c.h>
 #include <linux/spi/spi.h>
+#include <linux/slab.h>
 #include <linux/platform_device.h>
 #include <linux/types.h>
 
@@ -66,6 +67,9 @@ static unsigned int marxbot_pins[] = {
         MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
         MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
         MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
+        /* SEL */
+        MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
+        MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
 };
 
 #define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
@@ -127,12 +131,12 @@ static struct imxmmc_platform_data sdhc2_pdata = {
 static void dspics_resets_init(void)
 {
         if (!gpio_request(TRSLAT_RST_B, "translator-rst")) {
-                gpio_direction_output(TRSLAT_RST_B, 1);
+                gpio_direction_output(TRSLAT_RST_B, 0);
                 gpio_export(TRSLAT_RST_B, false);
         }
 
         if (!gpio_request(DSPICS_RST_B, "dspics-rst")) {
-                gpio_direction_output(DSPICS_RST_B, 1);
+                gpio_direction_output(DSPICS_RST_B, 0);
                 gpio_export(DSPICS_RST_B, false);
         }
 }
@@ -200,7 +204,7 @@ static int __init marxbot_cam_init(void)
         int ret = gpio_request(CAM_CHOICE, "cam-choice");
         if (ret)
                 return ret;
-        gpio_direction_output(CAM_CHOICE, 1);
+        gpio_direction_output(CAM_CHOICE, 0);
 
         ret = gpio_request(BASECAM_RST_B, "basecam-reset");
         if (ret)
@@ -223,6 +227,34 @@ static int __init marxbot_cam_init(void)
         return 0;
 }
 
+#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
+#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
+#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
+#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
+
+static void marxbot_init_sel_gpios(void)
+{
+        if (!gpio_request(SEL0, "sel0")) {
+                gpio_direction_input(SEL0);
+                gpio_export(SEL0, true);
+        }
+
+        if (!gpio_request(SEL1, "sel1")) {
+                gpio_direction_input(SEL1);
+                gpio_export(SEL1, true);
+        }
+
+        if (!gpio_request(SEL2, "sel2")) {
+                gpio_direction_input(SEL2);
+                gpio_export(SEL2, true);
+        }
+
+        if (!gpio_request(SEL3, "sel3")) {
+                gpio_direction_input(SEL3);
+                gpio_export(SEL3, true);
+        }
+}
+
 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
                         PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
 
@@ -307,6 +339,8 @@ void __init mx31moboard_marxbot_init(void)
         mxc_iomux_setup_multiple_pins(marxbot_pins, ARRAY_SIZE(marxbot_pins),
                 "marxbot");
 
+        marxbot_init_sel_gpios();
+
         dspics_resets_init();
 
         mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata);
diff --git a/arch/arm/mach-mx3/mx31moboard-smartbot.c b/arch/arm/mach-mx3/mx31moboard-smartbot.c
new file mode 100644
index 00000000000..52a69fc8b14
--- /dev/null
+++ b/arch/arm/mach-mx3/mx31moboard-smartbot.c
@@ -0,0 +1,162 @@
+/*
+ * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/i2c.h>
+#include <linux/platform_device.h>
+#include <linux/types.h>
+
+#include <mach/common.h>
+#include <mach/hardware.h>
+#include <mach/imx-uart.h>
+#include <mach/iomux-mx3.h>
+
+#include <media/soc_camera.h>
+
+#include "devices.h"
+
+static unsigned int smartbot_pins[] = {
+        /* UART1 */
+        MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2,
+        MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2,
+        /* CSI */
+        MX31_PIN_CSI_D4__CSI_D4, MX31_PIN_CSI_D5__CSI_D5,
+        MX31_PIN_CSI_D6__CSI_D6, MX31_PIN_CSI_D7__CSI_D7,
+        MX31_PIN_CSI_D8__CSI_D8, MX31_PIN_CSI_D9__CSI_D9,
+        MX31_PIN_CSI_D10__CSI_D10, MX31_PIN_CSI_D11__CSI_D11,
+        MX31_PIN_CSI_D12__CSI_D12, MX31_PIN_CSI_D13__CSI_D13,
+        MX31_PIN_CSI_D14__CSI_D14, MX31_PIN_CSI_D15__CSI_D15,
+        MX31_PIN_CSI_HSYNC__CSI_HSYNC, MX31_PIN_CSI_MCLK__CSI_MCLK,
+        MX31_PIN_CSI_PIXCLK__CSI_PIXCLK, MX31_PIN_CSI_VSYNC__CSI_VSYNC,
+        MX31_PIN_GPIO3_0__GPIO3_0, MX31_PIN_GPIO3_1__GPIO3_1,
+        /* ENABLES */
+        MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
+        MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
+};
+
+static struct imxuart_platform_data uart_pdata = {
+        .flags = IMXUART_HAVE_RTSCTS,
+};
+
+#define CAM_POWER       IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)
+#define CAM_RST_B       IOMUX_TO_GPIO(MX31_PIN_GPIO3_0)
+
+static int smartbot_cam_power(struct device *dev, int on)
+{
+        gpio_set_value(CAM_POWER, !on);
+        return 0;
+}
+
+static int smartbot_cam_reset(struct device *dev)
+{
+        gpio_set_value(CAM_RST_B, 0);
+        udelay(100);
+        gpio_set_value(CAM_RST_B, 1);
+        return 0;
+}
+
+static struct i2c_board_info smartbot_i2c_devices[] = {
+        {
+                I2C_BOARD_INFO("mt9t031", 0x5d),
+        },
+};
+
+static struct soc_camera_link base_iclink = {
+        .bus_id         = 0,            /* Must match with the camera ID */
+        .power          = smartbot_cam_power,
+        .reset          = smartbot_cam_reset,
+        .board_info     = &smartbot_i2c_devices[0],
+        .i2c_adapter_id = 0,
+        .module_name    = "mt9t031",
+};
+
+static struct platform_device smartbot_camera[] = {
+        {
+                .name   = "soc-camera-pdrv",
+                .id     = 0,
+                .dev    = {
+                        .platform_data = &base_iclink,
+                },
+        },
+};
+
+static struct platform_device *smartbot_cameras[] __initdata = {
+        &smartbot_camera[0],
+};
+
+static int __init smartbot_cam_init(void)
+{
+        int ret = gpio_request(CAM_RST_B, "cam-reset");
+        if (ret)
+                return ret;
+        gpio_direction_output(CAM_RST_B, 1);
+        ret = gpio_request(CAM_POWER, "cam-standby");
+        if (ret)
+                return ret;
+        gpio_direction_output(CAM_POWER, 0);
+
+        return 0;
+}
+
+#define POWER_EN IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
+#define DSPIC_RST_B IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
+#define TRSLAT_RST_B IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
+#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
+
+static void smartbot_resets_init(void)
+{
+        if (!gpio_request(POWER_EN, "power-enable")) {
+                gpio_direction_output(POWER_EN, 0);
+                gpio_export(POWER_EN, false);
+        }
+
+        if (!gpio_request(DSPIC_RST_B, "dspic-rst")) {
+                gpio_direction_output(DSPIC_RST_B, 0);
+                gpio_export(DSPIC_RST_B, false);
+        }
+
+        if (!gpio_request(TRSLAT_RST_B, "translator-rst")) {
+                gpio_direction_output(TRSLAT_RST_B, 0);
+                gpio_export(TRSLAT_RST_B, false);
+        }
+
+        if (!gpio_request(SEL3, "sel3")) {
+                gpio_direction_input(SEL3);
+                gpio_export(SEL3, true);
+        }
+}
+/*
+ * system init for baseboard usage. Will be called by mx31moboard init.
+ */
+void __init mx31moboard_smartbot_init(void)
+{
+        printk(KERN_INFO "Initializing mx31smartbot peripherals\n");
+
+        mxc_iomux_setup_multiple_pins(smartbot_pins, ARRAY_SIZE(smartbot_pins),
+                "smartbot");
+
+        mxc_register_device(&mxc_uart_device1, &uart_pdata);
+
+        smartbot_resets_init();
+
+        smartbot_cam_init();
+        platform_add_devices(smartbot_cameras, ARRAY_SIZE(smartbot_cameras));
+}
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
new file mode 100644
index 00000000000..1576d51e676
--- /dev/null
+++ b/arch/arm/mach-mx5/Kconfig
@@ -0,0 +1,18 @@
+if ARCH_MX5
+
+config ARCH_MX51
+        bool
+        default y
+        select MXC_TZIC
+        select ARCH_MXC_IOMUX_V3
+
+comment "MX5 platforms:"
+
+config MACH_MX51_BABBAGE
+        bool "Support MX51 BABBAGE platforms"
+        help
+          Include support for MX51 Babbage platform, also known as MX51EVK in
+          u-boot. This includes specific configurations for the board and its
+          peripherals.
+
+endif
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
new file mode 100644
index 00000000000..bf23f869ef5
--- /dev/null
+++ b/arch/arm/mach-mx5/Makefile
@@ -0,0 +1,9 @@
+#
+# Makefile for the linux kernel.
+#
+
+# Object file lists.
+obj-y   := cpu.o mm.o clock-mx51.o devices.o
+
+obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o
+
diff --git a/arch/arm/mach-mx5/Makefile.boot b/arch/arm/mach-mx5/Makefile.boot
new file mode 100644
index 00000000000..9939a19d99a
--- /dev/null
+++ b/arch/arm/mach-mx5/Makefile.boot
@@ -0,0 +1,3 @@
+   zreladdr-y   := 0x90008000
+params_phys-y   := 0x90000100
+initrd_phys-y   := 0x90800000
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
new file mode 100644
index 00000000000..ee67a71db80
--- /dev/null
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -0,0 +1,98 @@
+/*
+ * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/init.h>
+#include <linux/platform_device.h>
+
+#include <mach/common.h>
+#include <mach/hardware.h>
+#include <mach/imx-uart.h>
+#include <mach/iomux-mx51.h>
+
+#include <asm/irq.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+
+#include "devices.h"
+
+static struct platform_device *devices[] __initdata = {
+        &mxc_fec_device,
+};
+
+static struct pad_desc mx51babbage_pads[] = {
+        /* UART1 */
+        MX51_PAD_UART1_RXD__UART1_RXD,
+        MX51_PAD_UART1_TXD__UART1_TXD,
+        MX51_PAD_UART1_RTS__UART1_RTS,
+        MX51_PAD_UART1_CTS__UART1_CTS,
+
+        /* UART2 */
+        MX51_PAD_UART2_RXD__UART2_RXD,
+        MX51_PAD_UART2_TXD__UART2_TXD,
+
+        /* UART3 */
+        MX51_PAD_EIM_D25__UART3_RXD,
+        MX51_PAD_EIM_D26__UART3_TXD,
+        MX51_PAD_EIM_D27__UART3_RTS,
+        MX51_PAD_EIM_D24__UART3_CTS,
+};
+
+/* Serial ports */
+#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
+static struct imxuart_platform_data uart_pdata = {
+        .flags = IMXUART_HAVE_RTSCTS,
+};
+
+static inline void mxc_init_imx_uart(void)
+{
+        mxc_register_device(&mxc_uart_device0, &uart_pdata);
+        mxc_register_device(&mxc_uart_device1, &uart_pdata);
+        mxc_register_device(&mxc_uart_device2, &uart_pdata);
+}
+#else /* !SERIAL_IMX */
+static inline void mxc_init_imx_uart(void)
+{
+}
+#endif /* SERIAL_IMX */
+
+/*
+ * Board specific initialization.
+ */
+static void __init mxc_board_init(void)
+{
+        mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads,
+                                        ARRAY_SIZE(mx51babbage_pads));
+        mxc_init_imx_uart();
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
+static void __init mx51_babbage_timer_init(void)
+{
+        mx51_clocks_init(32768, 24000000, 22579200, 0);
+}
+
+static struct sys_timer mxc_timer = {
+        .init   = mx51_babbage_timer_init,
+};
+
+MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board")
+        /* Maintainer: Amit Kucheria <amit.kucheria@canonical.com> */
+        .phys_io = MX51_AIPS1_BASE_ADDR,
+        .io_pg_offst = ((MX51_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+        .boot_params = PHYS_OFFSET + 0x100,
+        .map_io = mx51_map_io,
+        .init_irq = mx51_init_irq,
+        .init_machine = mxc_board_init,
+        .timer = &mxc_timer,
+MACHINE_END
diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c
new file mode 100644
index 00000000000..8f85f73b83a
--- /dev/null
+++ b/arch/arm/mach-mx5/clock-mx51.c
@@ -0,0 +1,825 @@
+/*
+ * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/mm.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+
+#include <asm/clkdev.h>
+
+#include <mach/hardware.h>
+#include <mach/common.h>
+#include <mach/clock.h>
+
+#include "crm_regs.h"
+
+/* External clock values passed-in by the board code */
+static unsigned long external_high_reference, external_low_reference;
+static unsigned long oscillator_reference, ckih2_reference;
+
+static struct clk osc_clk;
+static struct clk pll1_main_clk;
+static struct clk pll1_sw_clk;
+static struct clk pll2_sw_clk;
+static struct clk pll3_sw_clk;
+static struct clk lp_apm_clk;
+static struct clk periph_apm_clk;
+static struct clk ahb_clk;
+static struct clk ipg_clk;
+
+#define MAX_DPLL_WAIT_TRIES     1000 /* 1000 * udelay(1) = 1ms */
+
+static int _clk_ccgr_enable(struct clk *clk)
+{
+        u32 reg;
+
+        reg = __raw_readl(clk->enable_reg);
+        reg |= MXC_CCM_CCGRx_MOD_ON << clk->enable_shift;
+        __raw_writel(reg, clk->enable_reg);
+
+        return 0;
+}
+
+static void _clk_ccgr_disable(struct clk *clk)
+{
+        u32 reg;
+        reg = __raw_readl(clk->enable_reg);
+        reg &= ~(MXC_CCM_CCGRx_MOD_OFF << clk->enable_shift);
+        __raw_writel(reg, clk->enable_reg);
+
+}
+
+static void _clk_ccgr_disable_inwait(struct clk *clk)
+{
+        u32 reg;
+
+        reg = __raw_readl(clk->enable_reg);
+        reg &= ~(MXC_CCM_CCGRx_CG_MASK << clk->enable_shift);
+        reg |= MXC_CCM_CCGRx_MOD_IDLE << clk->enable_shift;
+        __raw_writel(reg, clk->enable_reg);
+}
+
+/*
+ * For the 4-to-1 muxed input clock
+ */
+static inline u32 _get_mux(struct clk *parent, struct clk *m0,
+                           struct clk *m1, struct clk *m2, struct clk *m3)
+{
+        if (parent == m0)
+                return 0;
+        else if (parent == m1)
+                return 1;
+        else if (parent == m2)
+                return 2;
+        else if (parent == m3)
+                return 3;
+        else
+                BUG();
+
+        return -EINVAL;
+}
+
+static inline void __iomem *_get_pll_base(struct clk *pll)
+{
+        if (pll == &pll1_main_clk)
+                return MX51_DPLL1_BASE;
+        else if (pll == &pll2_sw_clk)
+                return MX51_DPLL2_BASE;
+        else if (pll == &pll3_sw_clk)
+                return MX51_DPLL3_BASE;
+        else
+                BUG();
+
+        return NULL;
+}
+
+static unsigned long clk_pll_get_rate(struct clk *clk)
+{
+        long mfi, mfn, mfd, pdf, ref_clk, mfn_abs;
+        unsigned long dp_op, dp_mfd, dp_mfn, dp_ctl, pll_hfsm, dbl;
+        void __iomem *pllbase;
+        s64 temp;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        pllbase = _get_pll_base(clk);
+
+        dp_ctl = __raw_readl(pllbase + MXC_PLL_DP_CTL);
+        pll_hfsm = dp_ctl & MXC_PLL_DP_CTL_HFSM;
+        dbl = dp_ctl & MXC_PLL_DP_CTL_DPDCK0_2_EN;
+
+        if (pll_hfsm == 0) {
+                dp_op = __raw_readl(pllbase + MXC_PLL_DP_OP);
+                dp_mfd = __raw_readl(pllbase + MXC_PLL_DP_MFD);
+                dp_mfn = __raw_readl(pllbase + MXC_PLL_DP_MFN);
+        } else {
+                dp_op = __raw_readl(pllbase + MXC_PLL_DP_HFS_OP);
+                dp_mfd = __raw_readl(pllbase + MXC_PLL_DP_HFS_MFD);
+                dp_mfn = __raw_readl(pllbase + MXC_PLL_DP_HFS_MFN);
+        }
+        pdf = dp_op & MXC_PLL_DP_OP_PDF_MASK;
+        mfi = (dp_op & MXC_PLL_DP_OP_MFI_MASK) >> MXC_PLL_DP_OP_MFI_OFFSET;
+        mfi = (mfi <= 5) ? 5 : mfi;
+        mfd = dp_mfd & MXC_PLL_DP_MFD_MASK;
+        mfn = mfn_abs = dp_mfn & MXC_PLL_DP_MFN_MASK;
+        /* Sign extend to 32-bits */
+        if (mfn >= 0x04000000) {
+                mfn |= 0xFC000000;
+                mfn_abs = -mfn;
+        }
+
+        ref_clk = 2 * parent_rate;
+        if (dbl != 0)
+                ref_clk *= 2;
+
+        ref_clk /= (pdf + 1);
+        temp = (u64) ref_clk * mfn_abs;
+        do_div(temp, mfd + 1);
+        if (mfn < 0)
+                temp = -temp;
+        temp = (ref_clk * mfi) + temp;
+
+        return temp;
+}
+
+static int _clk_pll_set_rate(struct clk *clk, unsigned long rate)
+{
+        u32 reg;
+        void __iomem *pllbase;
+
+        long mfi, pdf, mfn, mfd = 999999;
+        s64 temp64;
+        unsigned long quad_parent_rate;
+        unsigned long pll_hfsm, dp_ctl;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        pllbase = _get_pll_base(clk);
+
+        quad_parent_rate = 4 * parent_rate;
+        pdf = mfi = -1;
+        while (++pdf < 16 && mfi < 5)
+                mfi = rate * (pdf+1) / quad_parent_rate;
+        if (mfi > 15)
+                return -EINVAL;
+        pdf--;
+
+        temp64 = rate * (pdf+1) - quad_parent_rate * mfi;
+        do_div(temp64, quad_parent_rate/1000000);
+        mfn = (long)temp64;
+
+        dp_ctl = __raw_readl(pllbase + MXC_PLL_DP_CTL);
+        /* use dpdck0_2 */
+        __raw_writel(dp_ctl | 0x1000L, pllbase + MXC_PLL_DP_CTL);
+        pll_hfsm = dp_ctl & MXC_PLL_DP_CTL_HFSM;
+        if (pll_hfsm == 0) {
+                reg = mfi << 4 | pdf;
+                __raw_writel(reg, pllbase + MXC_PLL_DP_OP);
+                __raw_writel(mfd, pllbase + MXC_PLL_DP_MFD);
+                __raw_writel(mfn, pllbase + MXC_PLL_DP_MFN);
+        } else {
+                reg = mfi << 4 | pdf;
+                __raw_writel(reg, pllbase + MXC_PLL_DP_HFS_OP);
+                __raw_writel(mfd, pllbase + MXC_PLL_DP_HFS_MFD);
+                __raw_writel(mfn, pllbase + MXC_PLL_DP_HFS_MFN);
+        }
+
+        return 0;
+}
+
+static int _clk_pll_enable(struct clk *clk)
+{
+        u32 reg;
+        void __iomem *pllbase;
+        int i = 0;
+
+        pllbase = _get_pll_base(clk);
+        reg = __raw_readl(pllbase + MXC_PLL_DP_CTL) | MXC_PLL_DP_CTL_UPEN;
+        __raw_writel(reg, pllbase + MXC_PLL_DP_CTL);
+
+        /* Wait for lock */
+        do {
+                reg = __raw_readl(pllbase + MXC_PLL_DP_CTL);
+                if (reg & MXC_PLL_DP_CTL_LRF)
+                        break;
+
+                udelay(1);
+        } while (++i < MAX_DPLL_WAIT_TRIES);
+
+        if (i == MAX_DPLL_WAIT_TRIES) {
+                pr_err("MX5: pll locking failed\n");
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
+static void _clk_pll_disable(struct clk *clk)
+{
+        u32 reg;
+        void __iomem *pllbase;
+
+        pllbase = _get_pll_base(clk);
+        reg = __raw_readl(pllbase + MXC_PLL_DP_CTL) & ~MXC_PLL_DP_CTL_UPEN;
+        __raw_writel(reg, pllbase + MXC_PLL_DP_CTL);
+}
+
+static int _clk_pll1_sw_set_parent(struct clk *clk, struct clk *parent)
+{
+        u32 reg, step;
+
+        reg = __raw_readl(MXC_CCM_CCSR);
+
+        /* When switching from pll_main_clk to a bypass clock, first select a
+         * multiplexed clock in 'step_sel', then shift the glitchless mux
+         * 'pll1_sw_clk_sel'.
+         *
+         * When switching back, do it in reverse order
+         */
+        if (parent == &pll1_main_clk) {
+                /* Switch to pll1_main_clk */
+                reg &= ~MXC_CCM_CCSR_PLL1_SW_CLK_SEL;
+                __raw_writel(reg, MXC_CCM_CCSR);
+                /* step_clk mux switched to lp_apm, to save power. */
+                reg = __raw_readl(MXC_CCM_CCSR);
+                reg &= ~MXC_CCM_CCSR_STEP_SEL_MASK;
+                reg |= (MXC_CCM_CCSR_STEP_SEL_LP_APM <<
+                                MXC_CCM_CCSR_STEP_SEL_OFFSET);
+        } else {
+                if (parent == &lp_apm_clk) {
+                        step = MXC_CCM_CCSR_STEP_SEL_LP_APM;
+                } else  if (parent == &pll2_sw_clk) {
+                        step = MXC_CCM_CCSR_STEP_SEL_PLL2_DIVIDED;
+                } else  if (parent == &pll3_sw_clk) {
+                        step = MXC_CCM_CCSR_STEP_SEL_PLL3_DIVIDED;
+                } else
+                        return -EINVAL;
+
+                reg &= ~MXC_CCM_CCSR_STEP_SEL_MASK;
+                reg |= (step << MXC_CCM_CCSR_STEP_SEL_OFFSET);
+
+                __raw_writel(reg, MXC_CCM_CCSR);
+                /* Switch to step_clk */
+                reg = __raw_readl(MXC_CCM_CCSR);
+                reg |= MXC_CCM_CCSR_PLL1_SW_CLK_SEL;
+        }
+        __raw_writel(reg, MXC_CCM_CCSR);
+        return 0;
+}
+
+static unsigned long clk_pll1_sw_get_rate(struct clk *clk)
+{
+        u32 reg, div;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        reg = __raw_readl(MXC_CCM_CCSR);
+
+        if (clk->parent == &pll2_sw_clk) {
+                div = ((reg & MXC_CCM_CCSR_PLL2_PODF_MASK) >>
+                       MXC_CCM_CCSR_PLL2_PODF_OFFSET) + 1;
+        } else if (clk->parent == &pll3_sw_clk) {
+                div = ((reg & MXC_CCM_CCSR_PLL3_PODF_MASK) >>
+                       MXC_CCM_CCSR_PLL3_PODF_OFFSET) + 1;
+        } else
+                div = 1;
+        return parent_rate / div;
+}
+
+static int _clk_pll2_sw_set_parent(struct clk *clk, struct clk *parent)
+{
+        u32 reg;
+
+        reg = __raw_readl(MXC_CCM_CCSR);
+
+        if (parent == &pll2_sw_clk)
+                reg &= ~MXC_CCM_CCSR_PLL2_SW_CLK_SEL;
+        else
+                reg |= MXC_CCM_CCSR_PLL2_SW_CLK_SEL;
+
+        __raw_writel(reg, MXC_CCM_CCSR);
+        return 0;
+}
+
+static int _clk_lp_apm_set_parent(struct clk *clk, struct clk *parent)
+{
+        u32 reg;
+
+        if (parent == &osc_clk)
+                reg = __raw_readl(MXC_CCM_CCSR) & ~MXC_CCM_CCSR_LP_APM_SEL;
+        else
+                return -EINVAL;
+
+        __raw_writel(reg, MXC_CCM_CCSR);
+
+        return 0;
+}
+
+static unsigned long clk_arm_get_rate(struct clk *clk)
+{
+        u32 cacrr, div;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+        cacrr = __raw_readl(MXC_CCM_CACRR);
+        div = (cacrr & MXC_CCM_CACRR_ARM_PODF_MASK) + 1;
+
+        return parent_rate / div;
+}
+
+static int _clk_periph_apm_set_parent(struct clk *clk, struct clk *parent)
+{
+        u32 reg, mux;
+        int i = 0;
+
+        mux = _get_mux(parent, &pll1_sw_clk, &pll3_sw_clk, &lp_apm_clk, NULL);
+
+        reg = __raw_readl(MXC_CCM_CBCMR) & ~MXC_CCM_CBCMR_PERIPH_CLK_SEL_MASK;
+        reg |= mux << MXC_CCM_CBCMR_PERIPH_CLK_SEL_OFFSET;
+        __raw_writel(reg, MXC_CCM_CBCMR);
+
+        /* Wait for lock */
+        do {
+                reg = __raw_readl(MXC_CCM_CDHIPR);
+                if (!(reg &  MXC_CCM_CDHIPR_PERIPH_CLK_SEL_BUSY))
+                        break;
+
+                udelay(1);
+        } while (++i < MAX_DPLL_WAIT_TRIES);
+
+        if (i == MAX_DPLL_WAIT_TRIES) {
+                pr_err("MX5: Set parent for periph_apm clock failed\n");
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
+static int _clk_main_bus_set_parent(struct clk *clk, struct clk *parent)
+{
+        u32 reg;
+
+        reg = __raw_readl(MXC_CCM_CBCDR);
+
+        if (parent == &pll2_sw_clk)
+                reg &= ~MXC_CCM_CBCDR_PERIPH_CLK_SEL;
+        else if (parent == &periph_apm_clk)
+                reg |= MXC_CCM_CBCDR_PERIPH_CLK_SEL;
+        else
+                return -EINVAL;
+
+        __raw_writel(reg, MXC_CCM_CBCDR);
+
+        return 0;
+}
+
+static struct clk main_bus_clk = {
+        .parent = &pll2_sw_clk,
+        .set_parent = _clk_main_bus_set_parent,
+};
+
+static unsigned long clk_ahb_get_rate(struct clk *clk)
+{
+        u32 reg, div;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        reg = __raw_readl(MXC_CCM_CBCDR);
+        div = ((reg & MXC_CCM_CBCDR_AHB_PODF_MASK) >>
+               MXC_CCM_CBCDR_AHB_PODF_OFFSET) + 1;
+        return parent_rate / div;
+}
+
+
+static int _clk_ahb_set_rate(struct clk *clk, unsigned long rate)
+{
+        u32 reg, div;
+        unsigned long parent_rate;
+        int i = 0;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        div = parent_rate / rate;
+        if (div > 8 || div < 1 || ((parent_rate / div) != rate))
+                return -EINVAL;
+
+        reg = __raw_readl(MXC_CCM_CBCDR);
+        reg &= ~MXC_CCM_CBCDR_AHB_PODF_MASK;
+        reg |= (div - 1) << MXC_CCM_CBCDR_AHB_PODF_OFFSET;
+        __raw_writel(reg, MXC_CCM_CBCDR);
+
+        /* Wait for lock */
+        do {
+                reg = __raw_readl(MXC_CCM_CDHIPR);
+                if (!(reg & MXC_CCM_CDHIPR_AHB_PODF_BUSY))
+                        break;
+
+                udelay(1);
+        } while (++i < MAX_DPLL_WAIT_TRIES);
+
+        if (i == MAX_DPLL_WAIT_TRIES) {
+                pr_err("MX5: clk_ahb_set_rate failed\n");
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
+static unsigned long _clk_ahb_round_rate(struct clk *clk,
+                                                unsigned long rate)
+{
+        u32 div;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        div = parent_rate / rate;
+        if (div > 8)
+                div = 8;
+        else if (div == 0)
+                div++;
+        return parent_rate / div;
+}
+
+
+static int _clk_max_enable(struct clk *clk)
+{
+        u32 reg;
+
+        _clk_ccgr_enable(clk);
+
+        /* Handshake with MAX when LPM is entered. */
+        reg = __raw_readl(MXC_CCM_CLPCR);
+        reg &= ~MXC_CCM_CLPCR_BYPASS_MAX_LPM_HS;
+        __raw_writel(reg, MXC_CCM_CLPCR);
+
+        return 0;
+}
+
+static void _clk_max_disable(struct clk *clk)
+{
+        u32 reg;
+
+        _clk_ccgr_disable_inwait(clk);
+
+        /* No Handshake with MAX when LPM is entered as its disabled. */
+        reg = __raw_readl(MXC_CCM_CLPCR);
+        reg |= MXC_CCM_CLPCR_BYPASS_MAX_LPM_HS;
+        __raw_writel(reg, MXC_CCM_CLPCR);
+}
+
+static unsigned long clk_ipg_get_rate(struct clk *clk)
+{
+        u32 reg, div;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        reg = __raw_readl(MXC_CCM_CBCDR);
+        div = ((reg & MXC_CCM_CBCDR_IPG_PODF_MASK) >>
+               MXC_CCM_CBCDR_IPG_PODF_OFFSET) + 1;
+
+        return parent_rate / div;
+}
+
+static unsigned long clk_ipg_per_get_rate(struct clk *clk)
+{
+        u32 reg, prediv1, prediv2, podf;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        if (clk->parent == &main_bus_clk || clk->parent == &lp_apm_clk) {
+                /* the main_bus_clk is the one before the DVFS engine */
+                reg = __raw_readl(MXC_CCM_CBCDR);
+                prediv1 = ((reg & MXC_CCM_CBCDR_PERCLK_PRED1_MASK) >>
+                           MXC_CCM_CBCDR_PERCLK_PRED1_OFFSET) + 1;
+                prediv2 = ((reg & MXC_CCM_CBCDR_PERCLK_PRED2_MASK) >>
+                           MXC_CCM_CBCDR_PERCLK_PRED2_OFFSET) + 1;
+                podf = ((reg & MXC_CCM_CBCDR_PERCLK_PODF_MASK) >>
+                        MXC_CCM_CBCDR_PERCLK_PODF_OFFSET) + 1;
+                return parent_rate / (prediv1 * prediv2 * podf);
+        } else if (clk->parent == &ipg_clk)
+                return parent_rate;
+        else
+                BUG();
+}
+
+static int _clk_ipg_per_set_parent(struct clk *clk, struct clk *parent)
+{
+        u32 reg;
+
+        reg = __raw_readl(MXC_CCM_CBCMR);
+
+        reg &= ~MXC_CCM_CBCMR_PERCLK_LP_APM_CLK_SEL;
+        reg &= ~MXC_CCM_CBCMR_PERCLK_IPG_CLK_SEL;
+
+        if (parent == &ipg_clk)
+                reg |= MXC_CCM_CBCMR_PERCLK_IPG_CLK_SEL;
+        else if (parent == &lp_apm_clk)
+                reg |= MXC_CCM_CBCMR_PERCLK_LP_APM_CLK_SEL;
+        else if (parent != &main_bus_clk)
+                return -EINVAL;
+
+        __raw_writel(reg, MXC_CCM_CBCMR);
+
+        return 0;
+}
+
+static unsigned long clk_uart_get_rate(struct clk *clk)
+{
+        u32 reg, prediv, podf;
+        unsigned long parent_rate;
+
+        parent_rate = clk_get_rate(clk->parent);
+
+        reg = __raw_readl(MXC_CCM_CSCDR1);
+        prediv = ((reg & MXC_CCM_CSCDR1_UART_CLK_PRED_MASK) >>
+                  MXC_CCM_CSCDR1_UART_CLK_PRED_OFFSET) + 1;
+        podf = ((reg & MXC_CCM_CSCDR1_UART_CLK_PODF_MASK) >>
+                MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET) + 1;
+
+        return parent_rate / (prediv * podf);
+}
+
+static int _clk_uart_set_parent(struct clk *clk, struct clk *parent)
+{
+        u32 reg, mux;
+
+        mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk,
+                       &lp_apm_clk);
+        reg = __raw_readl(MXC_CCM_CSCMR1) & ~MXC_CCM_CSCMR1_UART_CLK_SEL_MASK;
+        reg |= mux << MXC_CCM_CSCMR1_UART_CLK_SEL_OFFSET;
+        __raw_writel(reg, MXC_CCM_CSCMR1);
+
+        return 0;
+}
+
+static unsigned long get_high_reference_clock_rate(struct clk *clk)
+{
+        return external_high_reference;
+}
+
+static unsigned long get_low_reference_clock_rate(struct clk *clk)
+{
+        return external_low_reference;
+}
+
+static unsigned long get_oscillator_reference_clock_rate(struct clk *clk)
+{
+        return oscillator_reference;
+}
+
+static unsigned long get_ckih2_reference_clock_rate(struct clk *clk)
+{
+        return ckih2_reference;
+}
+
+/* External high frequency clock */
+static struct clk ckih_clk = {
+        .get_rate = get_high_reference_clock_rate,
+};
+
+static struct clk ckih2_clk = {
+        .get_rate = get_ckih2_reference_clock_rate,
+};
+
+static struct clk osc_clk = {
+        .get_rate = get_oscillator_reference_clock_rate,
+};
+
+/* External low frequency (32kHz) clock */
+static struct clk ckil_clk = {
+        .get_rate = get_low_reference_clock_rate,
+};
+
+static struct clk pll1_main_clk = {
+        .parent = &osc_clk,
+        .get_rate = clk_pll_get_rate,
+        .enable = _clk_pll_enable,
+        .disable = _clk_pll_disable,
+};
+
+/* Clock tree block diagram (WIP):
+ *      CCM: Clock Controller Module
+ *
+ * PLL output -> |
+ *               | CCM Switcher -> CCM_CLK_ROOT_GEN ->
+ * PLL bypass -> |
+ *
+ */
+
+/* PLL1 SW supplies to ARM core */
+static struct clk pll1_sw_clk = {
+        .parent = &pll1_main_clk,
+        .set_parent = _clk_pll1_sw_set_parent,
+        .get_rate = clk_pll1_sw_get_rate,
+};
+
+/* PLL2 SW supplies to AXI/AHB/IP buses */
+static struct clk pll2_sw_clk = {
+        .parent = &osc_clk,
+        .get_rate = clk_pll_get_rate,
+        .set_rate = _clk_pll_set_rate,
+        .set_parent = _clk_pll2_sw_set_parent,
+        .enable = _clk_pll_enable,
+        .disable = _clk_pll_disable,
+};
+
+/* PLL3 SW supplies to serial clocks like USB, SSI, etc. */
+static struct clk pll3_sw_clk = {
+        .parent = &osc_clk,
+        .set_rate = _clk_pll_set_rate,
+        .get_rate = clk_pll_get_rate,
+        .enable = _clk_pll_enable,
+        .disable = _clk_pll_disable,
+};
+
+/* Low-power Audio Playback Mode clock */
+static struct clk lp_apm_clk = {
+        .parent = &osc_clk,
+        .set_parent = _clk_lp_apm_set_parent,
+};
+
+static struct clk periph_apm_clk = {
+        .parent = &pll1_sw_clk,
+        .set_parent = _clk_periph_apm_set_parent,
+};
+
+static struct clk cpu_clk = {
+        .parent = &pll1_sw_clk,
+        .get_rate = clk_arm_get_rate,
+};
+
+static struct clk ahb_clk = {
+        .parent = &main_bus_clk,
+        .get_rate = clk_ahb_get_rate,
+        .set_rate = _clk_ahb_set_rate,
+        .round_rate = _clk_ahb_round_rate,
+};
+
+/* Main IP interface clock for access to registers */
+static struct clk ipg_clk = {
+        .parent = &ahb_clk,
+        .get_rate = clk_ipg_get_rate,
+};
+
+static struct clk ipg_perclk = {
+        .parent = &lp_apm_clk,
+        .get_rate = clk_ipg_per_get_rate,
+        .set_parent = _clk_ipg_per_set_parent,
+};
+
+static struct clk uart_root_clk = {
+        .parent = &pll2_sw_clk,
+        .get_rate = clk_uart_get_rate,
+        .set_parent = _clk_uart_set_parent,
+};
+
+static struct clk ahb_max_clk = {
+        .parent = &ahb_clk,
+        .enable_reg = MXC_CCM_CCGR0,
+        .enable_shift = MXC_CCM_CCGRx_CG14_OFFSET,
+        .enable = _clk_max_enable,
+        .disable = _clk_max_disable,
+};
+
+static struct clk aips_tz1_clk = {
+        .parent = &ahb_clk,
+        .secondary = &ahb_max_clk,
+        .enable_reg = MXC_CCM_CCGR0,
+        .enable_shift = MXC_CCM_CCGRx_CG12_OFFSET,
+        .enable = _clk_ccgr_enable,
+        .disable = _clk_ccgr_disable_inwait,
+};
+
+static struct clk aips_tz2_clk = {
+        .parent = &ahb_clk,
+        .secondary = &ahb_max_clk,
+        .enable_reg = MXC_CCM_CCGR0,
+        .enable_shift = MXC_CCM_CCGRx_CG13_OFFSET,
+        .enable = _clk_ccgr_enable,
+        .disable = _clk_ccgr_disable_inwait,
+};
+
+static struct clk gpt_32k_clk = {
+        .id = 0,
+        .parent = &ckil_clk,
+};
+
+#define DEFINE_CLOCK(name, i, er, es, gr, sr, p, s)     \
+        static struct clk name = {                      \
+                .id             = i,                    \
+                .enable_reg     = er,                   \
+                .enable_shift   = es,                   \
+                .get_rate       = gr,                   \
+                .set_rate       = sr,                   \
+                .enable         = _clk_ccgr_enable,     \
+                .disable        = _clk_ccgr_disable,    \
+                .parent         = p,                    \
+                .secondary      = s,                    \
+        }
+
+/* DEFINE_CLOCK(name, id, enable_reg, enable_shift,
+   get_rate, set_rate, parent, secondary); */
+
+/* Shared peripheral bus arbiter */
+DEFINE_CLOCK(spba_clk, 0, MXC_CCM_CCGR5, MXC_CCM_CCGRx_CG0_OFFSET,
+        NULL,  NULL, &ipg_clk, NULL);
+
+/* UART */
+DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG4_OFFSET,
+        NULL,  NULL, &uart_root_clk, NULL);
+DEFINE_CLOCK(uart2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG6_OFFSET,
+        NULL,  NULL, &uart_root_clk, NULL);
+DEFINE_CLOCK(uart3_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG8_OFFSET,
+        NULL,  NULL, &uart_root_clk, NULL);
+DEFINE_CLOCK(uart1_ipg_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG3_OFFSET,
+        NULL,  NULL, &ipg_clk, &aips_tz1_clk);
+DEFINE_CLOCK(uart2_ipg_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG5_OFFSET,
+        NULL,  NULL, &ipg_clk, &aips_tz1_clk);
+DEFINE_CLOCK(uart3_ipg_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG7_OFFSET,
+        NULL,  NULL, &ipg_clk, &spba_clk);
+
+/* GPT */
+DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET,
+        NULL,  NULL, &ipg_clk, NULL);
+DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET,
+        NULL,  NULL, &ipg_clk, NULL);
+
+/* FEC */
+DEFINE_CLOCK(fec_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG12_OFFSET,
+        NULL,  NULL, &ipg_clk, NULL);
+
+#define _REGISTER_CLOCK(d, n, c) \
+       { \
+                .dev_id = d, \
+                .con_id = n, \
+                .clk = &c,   \
+       },
+
+static struct clk_lookup lookups[] = {
+        _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk)
+        _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk)
+        _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk)
+        _REGISTER_CLOCK(NULL, "gpt", gpt_clk)
+        _REGISTER_CLOCK("fec.0", NULL, fec_clk)
+};
+
+static void clk_tree_init(void)
+{
+        u32 reg;
+
+        ipg_perclk.set_parent(&ipg_perclk, &lp_apm_clk);
+
+        /*
+         * Initialise the IPG PER CLK dividers to 3. IPG_PER_CLK should be at
+         * 8MHz, its derived from lp_apm.
+         *
+         * FIXME: Verify if true for all boards
+         */
+        reg = __raw_readl(MXC_CCM_CBCDR);
+        reg &= ~MXC_CCM_CBCDR_PERCLK_PRED1_MASK;
+        reg &= ~MXC_CCM_CBCDR_PERCLK_PRED2_MASK;
+        reg &= ~MXC_CCM_CBCDR_PERCLK_PODF_MASK;
+        reg |= (2 << MXC_CCM_CBCDR_PERCLK_PRED1_OFFSET);
+        __raw_writel(reg, MXC_CCM_CBCDR);
+}
+
+int __init mx51_clocks_init(unsigned long ckil, unsigned long osc,
+                        unsigned long ckih1, unsigned long ckih2)
+{
+        int i;
+
+        external_low_reference = ckil;
+        external_high_reference = ckih1;
+        ckih2_reference = ckih2;
+        oscillator_reference = osc;
+
+        for (i = 0; i < ARRAY_SIZE(lookups); i++)
+                clkdev_add(&lookups[i]);
+
+        clk_tree_init();
+
+        clk_enable(&cpu_clk);
+        clk_enable(&main_bus_clk);
+
+        /* System timer */
+        mxc_timer_init(&gpt_clk, MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR),
+                MX51_MXC_INT_GPT);
+        return 0;
+}
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
new file mode 100644
index 00000000000..2d37785e385
--- /dev/null
+++ b/arch/arm/mach-mx5/cpu.c
@@ -0,0 +1,100 @@
+/*
+ * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ *
+ * This file contains the CPU initialization code.
+ */
+
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <mach/hardware.h>
+#include <asm/io.h>
+
+static int cpu_silicon_rev = -1;
+
+#define SI_REV 0x48
+
+static void query_silicon_parameter(void)
+{
+        void __iomem *rom = ioremap(MX51_IROM_BASE_ADDR, MX51_IROM_SIZE);
+        u32 rev;
+
+        if (!rom) {
+                cpu_silicon_rev = -EINVAL;
+                return;
+        }
+
+        rev = readl(rom + SI_REV);
+        switch (rev) {
+        case 0x1:
+                cpu_silicon_rev = MX51_CHIP_REV_1_0;
+                break;
+        case 0x2:
+                cpu_silicon_rev = MX51_CHIP_REV_1_1;
+                break;
+        case 0x10:
+                cpu_silicon_rev = MX51_CHIP_REV_2_0;
+                break;
+        case 0x20:
+                cpu_silicon_rev = MX51_CHIP_REV_3_0;
+                break;
+        default:
+                cpu_silicon_rev = 0;
+        }
+
+        iounmap(rom);
+}
+
+/*
+ * Returns:
+ *      the silicon revision of the cpu
+ *      -EINVAL - not a mx51
+ */
+int mx51_revision(void)
+{
+        if (!cpu_is_mx51())
+                return -EINVAL;
+
+        if (cpu_silicon_rev == -1)
+                query_silicon_parameter();
+
+        return cpu_silicon_rev;
+}
+EXPORT_SYMBOL(mx51_revision);
+
+static int __init post_cpu_init(void)
+{
+        unsigned int reg;
+        void __iomem *base;
+
+        if (!cpu_is_mx51())
+                return 0;
+
+        base = MX51_IO_ADDRESS(MX51_AIPS1_BASE_ADDR);
+        __raw_writel(0x0, base + 0x40);
+        __raw_writel(0x0, base + 0x44);
+        __raw_writel(0x0, base + 0x48);
+        __raw_writel(0x0, base + 0x4C);
+        reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
+        __raw_writel(reg, base + 0x50);
+
+        base = MX51_IO_ADDRESS(MX51_AIPS2_BASE_ADDR);
+        __raw_writel(0x0, base + 0x40);
+        __raw_writel(0x0, base + 0x44);
+        __raw_writel(0x0, base + 0x48);
+        __raw_writel(0x0, base + 0x4C);
+        reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
+        __raw_writel(reg, base + 0x50);
+
+        return 0;
+}
+
+postcore_initcall(post_cpu_init);
diff --git a/arch/arm/mach-mx5/crm_regs.h b/arch/arm/mach-mx5/crm_regs.h
new file mode 100644
index 00000000000..c776b9af062
--- /dev/null
+++ b/arch/arm/mach-mx5/crm_regs.h
@@ -0,0 +1,583 @@
+/*
+ * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+#ifndef __ARCH_ARM_MACH_MX51_CRM_REGS_H__
+#define __ARCH_ARM_MACH_MX51_CRM_REGS_H__
+
+#define MX51_CCM_BASE           MX51_IO_ADDRESS(MX51_CCM_BASE_ADDR)
+#define MX51_DPLL1_BASE         MX51_IO_ADDRESS(MX51_PLL1_BASE_ADDR)
+#define MX51_DPLL2_BASE         MX51_IO_ADDRESS(MX51_PLL2_BASE_ADDR)
+#define MX51_DPLL3_BASE         MX51_IO_ADDRESS(MX51_PLL3_BASE_ADDR)
+#define MX51_CORTEXA8_BASE      MX51_IO_ADDRESS(MX51_ARM_BASE_ADDR)
+#define MX51_GPC_BASE           MX51_IO_ADDRESS(MX51_GPC_BASE_ADDR)
+
+/* PLL Register Offsets */
+#define MXC_PLL_DP_CTL                  0x00
+#define MXC_PLL_DP_CONFIG               0x04
+#define MXC_PLL_DP_OP                   0x08
+#define MXC_PLL_DP_MFD                  0x0C
+#define MXC_PLL_DP_MFN                  0x10
+#define MXC_PLL_DP_MFNMINUS             0x14
+#define MXC_PLL_DP_MFNPLUS              0x18
+#define MXC_PLL_DP_HFS_OP               0x1C
+#define MXC_PLL_DP_HFS_MFD              0x20
+#define MXC_PLL_DP_HFS_MFN              0x24
+#define MXC_PLL_DP_MFN_TOGC             0x28
+#define MXC_PLL_DP_DESTAT               0x2c
+
+/* PLL Register Bit definitions */
+#define MXC_PLL_DP_CTL_MUL_CTRL         0x2000
+#define MXC_PLL_DP_CTL_DPDCK0_2_EN      0x1000
+#define MXC_PLL_DP_CTL_DPDCK0_2_OFFSET  12
+#define MXC_PLL_DP_CTL_ADE              0x800
+#define MXC_PLL_DP_CTL_REF_CLK_DIV      0x400
+#define MXC_PLL_DP_CTL_REF_CLK_SEL_MASK (3 << 8)
+#define MXC_PLL_DP_CTL_REF_CLK_SEL_OFFSET       8
+#define MXC_PLL_DP_CTL_HFSM             0x80
+#define MXC_PLL_DP_CTL_PRE              0x40
+#define MXC_PLL_DP_CTL_UPEN             0x20
+#define MXC_PLL_DP_CTL_RST              0x10
+#define MXC_PLL_DP_CTL_RCP              0x8
+#define MXC_PLL_DP_CTL_PLM              0x4
+#define MXC_PLL_DP_CTL_BRM0             0x2
+#define MXC_PLL_DP_CTL_LRF              0x1
+
+#define MXC_PLL_DP_CONFIG_BIST          0x8
+#define MXC_PLL_DP_CONFIG_SJC_CE        0x4
+#define MXC_PLL_DP_CONFIG_AREN          0x2
+#define MXC_PLL_DP_CONFIG_LDREQ         0x1
+
+#define MXC_PLL_DP_OP_MFI_OFFSET        4
+#define MXC_PLL_DP_OP_MFI_MASK          (0xF << 4)
+#define MXC_PLL_DP_OP_PDF_OFFSET        0
+#define MXC_PLL_DP_OP_PDF_MASK          0xF
+
+#define MXC_PLL_DP_MFD_OFFSET           0
+#define MXC_PLL_DP_MFD_MASK             0x07FFFFFF
+
+#define MXC_PLL_DP_MFN_OFFSET           0x0
+#define MXC_PLL_DP_MFN_MASK             0x07FFFFFF
+
+#define MXC_PLL_DP_MFN_TOGC_TOG_DIS     (1 << 17)
+#define MXC_PLL_DP_MFN_TOGC_TOG_EN      (1 << 16)
+#define MXC_PLL_DP_MFN_TOGC_CNT_OFFSET  0x0
+#define MXC_PLL_DP_MFN_TOGC_CNT_MASK    0xFFFF
+
+#define MXC_PLL_DP_DESTAT_TOG_SEL       (1 << 31)
+#define MXC_PLL_DP_DESTAT_MFN           0x07FFFFFF
+
+/* Register addresses of CCM*/
+#define MXC_CCM_CCR             (MX51_CCM_BASE + 0x00)
+#define MXC_CCM_CCDR            (MX51_CCM_BASE + 0x04)
+#define MXC_CCM_CSR             (MX51_CCM_BASE + 0x08)
+#define MXC_CCM_CCSR            (MX51_CCM_BASE + 0x0C)
+#define MXC_CCM_CACRR           (MX51_CCM_BASE + 0x10)
+#define MXC_CCM_CBCDR           (MX51_CCM_BASE + 0x14)
+#define MXC_CCM_CBCMR           (MX51_CCM_BASE + 0x18)
+#define MXC_CCM_CSCMR1          (MX51_CCM_BASE + 0x1C)
+#define MXC_CCM_CSCMR2          (MX51_CCM_BASE + 0x20)
+#define MXC_CCM_CSCDR1          (MX51_CCM_BASE + 0x24)
+#define MXC_CCM_CS1CDR          (MX51_CCM_BASE + 0x28)
+#define MXC_CCM_CS2CDR          (MX51_CCM_BASE + 0x2C)
+#define MXC_CCM_CDCDR           (MX51_CCM_BASE + 0x30)
+#define MXC_CCM_CHSCDR          (MX51_CCM_BASE + 0x34)
+#define MXC_CCM_CSCDR2          (MX51_CCM_BASE + 0x38)
+#define MXC_CCM_CSCDR3          (MX51_CCM_BASE + 0x3C)
+#define MXC_CCM_CSCDR4          (MX51_CCM_BASE + 0x40)
+#define MXC_CCM_CWDR            (MX51_CCM_BASE + 0x44)
+#define MXC_CCM_CDHIPR          (MX51_CCM_BASE + 0x48)
+#define MXC_CCM_CDCR            (MX51_CCM_BASE + 0x4C)
+#define MXC_CCM_CTOR            (MX51_CCM_BASE + 0x50)
+#define MXC_CCM_CLPCR           (MX51_CCM_BASE + 0x54)
+#define MXC_CCM_CISR            (MX51_CCM_BASE + 0x58)
+#define MXC_CCM_CIMR            (MX51_CCM_BASE + 0x5C)
+#define MXC_CCM_CCOSR           (MX51_CCM_BASE + 0x60)
+#define MXC_CCM_CGPR            (MX51_CCM_BASE + 0x64)
+#define MXC_CCM_CCGR0           (MX51_CCM_BASE + 0x68)
+#define MXC_CCM_CCGR1           (MX51_CCM_BASE + 0x6C)
+#define MXC_CCM_CCGR2           (MX51_CCM_BASE + 0x70)
+#define MXC_CCM_CCGR3           (MX51_CCM_BASE + 0x74)
+#define MXC_CCM_CCGR4           (MX51_CCM_BASE + 0x78)
+#define MXC_CCM_CCGR5           (MX51_CCM_BASE + 0x7C)
+#define MXC_CCM_CCGR6           (MX51_CCM_BASE + 0x80)
+#define MXC_CCM_CMEOR           (MX51_CCM_BASE + 0x84)
+
+/* Define the bits in register CCR */
+#define MXC_CCM_CCR_COSC_EN             (1 << 12)
+#define MXC_CCM_CCR_FPM_MULT_MASK       (1 << 11)
+#define MXC_CCM_CCR_CAMP2_EN            (1 << 10)
+#define MXC_CCM_CCR_CAMP1_EN            (1 << 9)
+#define MXC_CCM_CCR_FPM_EN              (1 << 8)
+#define MXC_CCM_CCR_OSCNT_OFFSET        (0)
+#define MXC_CCM_CCR_OSCNT_MASK  (0xFF)
+
+/* Define the bits in register CCDR */
+#define MXC_CCM_CCDR_HSC_HS_MASK        (0x1 << 18)
+#define MXC_CCM_CCDR_IPU_HS_MASK        (0x1 << 17)
+#define MXC_CCM_CCDR_EMI_HS_MASK        (0x1 << 16)
+
+/* Define the bits in register CSR */
+#define MXC_CCM_CSR_COSR_READY  (1 << 5)
+#define MXC_CCM_CSR_LVS_VALUE   (1 << 4)
+#define MXC_CCM_CSR_CAMP2_READY (1 << 3)
+#define MXC_CCM_CSR_CAMP1_READY (1 << 2)
+#define MXC_CCM_CSR_FPM_READY   (1 << 1)
+#define MXC_CCM_CSR_REF_EN_B    (1 << 0)
+
+/* Define the bits in register CCSR */
+#define MXC_CCM_CCSR_LP_APM_SEL         (0x1 << 9)
+#define MXC_CCM_CCSR_STEP_SEL_OFFSET    (7)
+#define MXC_CCM_CCSR_STEP_SEL_MASK      (0x3 << 7)
+#define MXC_CCM_CCSR_STEP_SEL_LP_APM       0
+#define MXC_CCM_CCSR_STEP_SEL_PLL1_BYPASS  1 /* Only when JTAG connected? */
+#define MXC_CCM_CCSR_STEP_SEL_PLL2_DIVIDED 2
+#define MXC_CCM_CCSR_STEP_SEL_PLL3_DIVIDED 3
+#define MXC_CCM_CCSR_PLL2_PODF_OFFSET   (5)
+#define MXC_CCM_CCSR_PLL2_PODF_MASK     (0x3 << 5)
+#define MXC_CCM_CCSR_PLL3_PODF_OFFSET   (3)
+#define MXC_CCM_CCSR_PLL3_PODF_MASK     (0x3 << 3)
+#define MXC_CCM_CCSR_PLL1_SW_CLK_SEL    (1 << 2) /* 0: pll1_main_clk,
+                                                    1: step_clk */
+#define MXC_CCM_CCSR_PLL2_SW_CLK_SEL    (1 << 1)
+#define MXC_CCM_CCSR_PLL3_SW_CLK_SEL    (1 << 0)
+
+/* Define the bits in register CACRR */
+#define MXC_CCM_CACRR_ARM_PODF_OFFSET   (0)
+#define MXC_CCM_CACRR_ARM_PODF_MASK     (0x7)
+
+/* Define the bits in register CBCDR */
+#define MXC_CCM_CBCDR_EMI_CLK_SEL               (0x1 << 26)
+#define MXC_CCM_CBCDR_PERIPH_CLK_SEL            (0x1 << 25)
+#define MXC_CCM_CBCDR_DDR_HF_SEL_OFFSET         (30)
+#define MXC_CCM_CBCDR_DDR_HF_SEL                (0x1 << 30)
+#define MXC_CCM_CBCDR_DDR_PODF_OFFSET           (27)
+#define MXC_CCM_CBCDR_DDR_PODF_MASK             (0x7 << 27)
+#define MXC_CCM_CBCDR_EMI_PODF_OFFSET           (22)
+#define MXC_CCM_CBCDR_EMI_PODF_MASK             (0x7 << 22)
+#define MXC_CCM_CBCDR_AXI_B_PODF_OFFSET         (19)
+#define MXC_CCM_CBCDR_AXI_B_PODF_MASK           (0x7 << 19)
+#define MXC_CCM_CBCDR_AXI_A_PODF_OFFSET         (16)
+#define MXC_CCM_CBCDR_AXI_A_PODF_MASK           (0x7 << 16)
+#define MXC_CCM_CBCDR_NFC_PODF_OFFSET           (13)
+#define MXC_CCM_CBCDR_NFC_PODF_MASK             (0x7 << 13)
+#define MXC_CCM_CBCDR_AHB_PODF_OFFSET           (10)
+#define MXC_CCM_CBCDR_AHB_PODF_MASK             (0x7 << 10)
+#define MXC_CCM_CBCDR_IPG_PODF_OFFSET           (8)
+#define MXC_CCM_CBCDR_IPG_PODF_MASK             (0x3 << 8)
+#define MXC_CCM_CBCDR_PERCLK_PRED1_OFFSET       (6)
+#define MXC_CCM_CBCDR_PERCLK_PRED1_MASK         (0x3 << 6)
+#define MXC_CCM_CBCDR_PERCLK_PRED2_OFFSET       (3)
+#define MXC_CCM_CBCDR_PERCLK_PRED2_MASK         (0x7 << 3)
+#define MXC_CCM_CBCDR_PERCLK_PODF_OFFSET        (0)
+#define MXC_CCM_CBCDR_PERCLK_PODF_MASK          (0x7)
+
+/* Define the bits in register CBCMR */
+#define MXC_CCM_CBCMR_VPU_AXI_CLK_SEL_OFFSET    (14)
+#define MXC_CCM_CBCMR_VPU_AXI_CLK_SEL_MASK      (0x3 << 14)
+#define MXC_CCM_CBCMR_PERIPH_CLK_SEL_OFFSET     (12)
+#define MXC_CCM_CBCMR_PERIPH_CLK_SEL_MASK       (0x3 << 12)
+#define MXC_CCM_CBCMR_DDR_CLK_SEL_OFFSET        (10)
+#define MXC_CCM_CBCMR_DDR_CLK_SEL_MASK          (0x3 << 10)
+#define MXC_CCM_CBCMR_ARM_AXI_CLK_SEL_OFFSET    (8)
+#define MXC_CCM_CBCMR_ARM_AXI_CLK_SEL_MASK      (0x3 << 8)
+#define MXC_CCM_CBCMR_IPU_HSP_CLK_SEL_OFFSET    (6)
+#define MXC_CCM_CBCMR_IPU_HSP_CLK_SEL_MASK      (0x3 << 6)
+#define MXC_CCM_CBCMR_GPU_CLK_SEL_OFFSET        (4)
+#define MXC_CCM_CBCMR_GPU_CLK_SEL_MASK          (0x3 << 4)
+#define MXC_CCM_CBCMR_GPU2D_CLK_SEL_OFFSET      (14)
+#define MXC_CCM_CBCMR_GPU2D_CLK_SEL_MASK        (0x3 << 14)
+#define MXC_CCM_CBCMR_PERCLK_LP_APM_CLK_SEL     (0x1 << 1)
+#define MXC_CCM_CBCMR_PERCLK_IPG_CLK_SEL        (0x1 << 0)
+
+/* Define the bits in register CSCMR1 */
+#define MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL_OFFSET          (30)
+#define MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL_MASK            (0x3 << 30)
+#define MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL_OFFSET          (28)
+#define MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL_MASK            (0x3 << 28)
+#define MXC_CCM_CSCMR1_USB_PHY_CLK_SEL_OFFSET           (26)
+#define MXC_CCM_CSCMR1_USB_PHY_CLK_SEL                  (0x1 << 26)
+#define MXC_CCM_CSCMR1_UART_CLK_SEL_OFFSET              (24)
+#define MXC_CCM_CSCMR1_UART_CLK_SEL_MASK                (0x3 << 24)
+#define MXC_CCM_CSCMR1_USBOH3_CLK_SEL_OFFSET            (22)
+#define MXC_CCM_CSCMR1_USBOH3_CLK_SEL_MASK              (0x3 << 22)
+#define MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_OFFSET      (20)
+#define MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_MASK        (0x3 << 20)
+#define MXC_CCM_CSCMR1_ESDHC3_CLK_SEL                   (0x1 << 19)
+#define MXC_CCM_CSCMR1_ESDHC4_CLK_SEL                   (0x1 << 18)
+#define MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_OFFSET      (16)
+#define MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_MASK        (0x3 << 16)
+#define MXC_CCM_CSCMR1_SSI1_CLK_SEL_OFFSET              (14)
+#define MXC_CCM_CSCMR1_SSI1_CLK_SEL_MASK                (0x3 << 14)
+#define MXC_CCM_CSCMR1_SSI2_CLK_SEL_OFFSET              (12)
+#define MXC_CCM_CSCMR1_SSI2_CLK_SEL_MASK                (0x3 << 12)
+#define MXC_CCM_CSCMR1_SSI3_CLK_SEL                     (0x1 << 11)
+#define MXC_CCM_CSCMR1_VPU_RCLK_SEL                     (0x1 << 10)
+#define MXC_CCM_CSCMR1_SSI_APM_CLK_SEL_OFFSET           (8)
+#define MXC_CCM_CSCMR1_SSI_APM_CLK_SEL_MASK             (0x3 << 8)
+#define MXC_CCM_CSCMR1_TVE_CLK_SEL                      (0x1 << 7)
+#define MXC_CCM_CSCMR1_TVE_EXT_CLK_SEL                  (0x1 << 6)
+#define MXC_CCM_CSCMR1_CSPI_CLK_SEL_OFFSET              (4)
+#define MXC_CCM_CSCMR1_CSPI_CLK_SEL_MASK                (0x3 << 4)
+#define MXC_CCM_CSCMR1_SPDIF_CLK_SEL_OFFSET             (2)
+#define MXC_CCM_CSCMR1_SPDIF_CLK_SEL_MASK               (0x3 << 2)
+#define MXC_CCM_CSCMR1_SSI_EXT2_COM_CLK_SEL             (0x1 << 1)
+#define MXC_CCM_CSCMR1_SSI_EXT1_COM_CLK_SEL             (0x1)
+
+/* Define the bits in register CSCMR2 */
+#define MXC_CCM_CSCMR2_DI_CLK_SEL_OFFSET(n)             (26+n*3)
+#define MXC_CCM_CSCMR2_DI_CLK_SEL_MASK(n)               (0x7 << (26+n*3))
+#define MXC_CCM_CSCMR2_CSI_MCLK2_CLK_SEL_OFFSET         (24)
+#define MXC_CCM_CSCMR2_CSI_MCLK2_CLK_SEL_MASK           (0x3 << 24)
+#define MXC_CCM_CSCMR2_CSI_MCLK1_CLK_SEL_OFFSET         (22)
+#define MXC_CCM_CSCMR2_CSI_MCLK1_CLK_SEL_MASK           (0x3 << 22)
+#define MXC_CCM_CSCMR2_ESC_CLK_SEL_OFFSET               (20)
+#define MXC_CCM_CSCMR2_ESC_CLK_SEL_MASK                 (0x3 << 20)
+#define MXC_CCM_CSCMR2_HSC2_CLK_SEL_OFFSET              (18)
+#define MXC_CCM_CSCMR2_HSC2_CLK_SEL_MASK                (0x3 << 18)
+#define MXC_CCM_CSCMR2_HSC1_CLK_SEL_OFFSET              (16)
+#define MXC_CCM_CSCMR2_HSC1_CLK_SEL_MASK                (0x3 << 16)
+#define MXC_CCM_CSCMR2_HSI2C_CLK_SEL_OFFSET             (14)
+#define MXC_CCM_CSCMR2_HSI2C_CLK_SEL_MASK               (0x3 << 14)
+#define MXC_CCM_CSCMR2_FIRI_CLK_SEL_OFFSET              (12)
+#define MXC_CCM_CSCMR2_FIRI_CLK_SEL_MASK                (0x3 << 12)
+#define MXC_CCM_CSCMR2_SIM_CLK_SEL_OFFSET               (10)
+#define MXC_CCM_CSCMR2_SIM_CLK_SEL_MASK                 (0x3 << 10)
+#define MXC_CCM_CSCMR2_SLIMBUS_COM                      (0x1 << 9)
+#define MXC_CCM_CSCMR2_SLIMBUS_CLK_SEL_OFFSET           (6)
+#define MXC_CCM_CSCMR2_SLIMBUS_CLK_SEL_MASK             (0x7 << 6)
+#define MXC_CCM_CSCMR2_SPDIF1_COM                       (1 << 5)
+#define MXC_CCM_CSCMR2_SPDIF0_COM                       (1 << 4)
+#define MXC_CCM_CSCMR2_SPDIF1_CLK_SEL_OFFSET            (2)
+#define MXC_CCM_CSCMR2_SPDIF1_CLK_SEL_MASK              (0x3 << 2)
+#define MXC_CCM_CSCMR2_SPDIF0_CLK_SEL_OFFSET            (0)
+#define MXC_CCM_CSCMR2_SPDIF0_CLK_SEL_MASK              (0x3)
+
+/* Define the bits in register CSCDR1 */
+#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_OFFSET     (22)
+#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_MASK       (0x7 << 22)
+#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_OFFSET     (19)
+#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_MASK       (0x7 << 19)
+#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_OFFSET     (16)
+#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_MASK       (0x7 << 16)
+#define MXC_CCM_CSCDR1_PGC_CLK_PODF_OFFSET              (14)
+#define MXC_CCM_CSCDR1_PGC_CLK_PODF_MASK                (0x3 << 14)
+#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_OFFSET     (11)
+#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_MASK       (0x7 << 11)
+#define MXC_CCM_CSCDR1_USBOH3_CLK_PRED_OFFSET           (8)
+#define MXC_CCM_CSCDR1_USBOH3_CLK_PRED_MASK             (0x7 << 8)
+#define MXC_CCM_CSCDR1_USBOH3_CLK_PODF_OFFSET           (6)
+#define MXC_CCM_CSCDR1_USBOH3_CLK_PODF_MASK             (0x3 << 6)
+#define MXC_CCM_CSCDR1_UART_CLK_PRED_OFFSET             (3)
+#define MXC_CCM_CSCDR1_UART_CLK_PRED_MASK               (0x7 << 3)
+#define MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET             (0)
+#define MXC_CCM_CSCDR1_UART_CLK_PODF_MASK               (0x7)
+
+/* Define the bits in register CS1CDR and CS2CDR */
+#define MXC_CCM_CS1CDR_SSI_EXT1_CLK_PRED_OFFSET         (22)
+#define MXC_CCM_CS1CDR_SSI_EXT1_CLK_PRED_MASK           (0x7 << 22)
+#define MXC_CCM_CS1CDR_SSI_EXT1_CLK_PODF_OFFSET         (16)
+#define MXC_CCM_CS1CDR_SSI_EXT1_CLK_PODF_MASK           (0x3F << 16)
+#define MXC_CCM_CS1CDR_SSI1_CLK_PRED_OFFSET             (6)
+#define MXC_CCM_CS1CDR_SSI1_CLK_PRED_MASK               (0x7 << 6)
+#define MXC_CCM_CS1CDR_SSI1_CLK_PODF_OFFSET             (0)
+#define MXC_CCM_CS1CDR_SSI1_CLK_PODF_MASK               (0x3F)
+
+#define MXC_CCM_CS2CDR_SSI_EXT2_CLK_PRED_OFFSET         (22)
+#define MXC_CCM_CS2CDR_SSI_EXT2_CLK_PRED_MASK           (0x7 << 22)
+#define MXC_CCM_CS2CDR_SSI_EXT2_CLK_PODF_OFFSET         (16)
+#define MXC_CCM_CS2CDR_SSI_EXT2_CLK_PODF_MASK           (0x3F << 16)
+#define MXC_CCM_CS2CDR_SSI2_CLK_PRED_OFFSET             (6)
+#define MXC_CCM_CS2CDR_SSI2_CLK_PRED_MASK               (0x7 << 6)
+#define MXC_CCM_CS2CDR_SSI2_CLK_PODF_OFFSET             (0)
+#define MXC_CCM_CS2CDR_SSI2_CLK_PODF_MASK               (0x3F)
+
+/* Define the bits in register CDCDR */
+#define MXC_CCM_CDCDR_TVE_CLK_PRED_OFFSET               (28)
+#define MXC_CCM_CDCDR_TVE_CLK_PRED_MASK                 (0x7 << 28)
+#define MXC_CCM_CDCDR_SPDIF0_CLK_PRED_OFFSET            (25)
+#define MXC_CCM_CDCDR_SPDIF0_CLK_PRED_MASK              (0x7 << 25)
+#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_OFFSET            (19)
+#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_MASK              (0x3F << 19)
+#define MXC_CCM_CDCDR_SPDIF1_CLK_PRED_OFFSET            (16)
+#define MXC_CCM_CDCDR_SPDIF1_CLK_PRED_MASK              (0x7 << 16)
+#define MXC_CCM_CDCDR_SPDIF1_CLK_PODF_OFFSET            (9)
+#define MXC_CCM_CDCDR_SPDIF1_CLK_PODF_MASK              (0x3F << 9)
+#define MXC_CCM_CDCDR_DI_CLK_PRED_OFFSET                (6)
+#define MXC_CCM_CDCDR_DI_CLK_PRED_MASK                  (0x7 << 6)
+#define MXC_CCM_CDCDR_USB_PHY_PRED_OFFSET               (3)
+#define MXC_CCM_CDCDR_USB_PHY_PRED_MASK                 (0x7 << 3)
+#define MXC_CCM_CDCDR_USB_PHY_PODF_OFFSET               (0)
+#define MXC_CCM_CDCDR_USB_PHY_PODF_MASK                 (0x7)
+
+/* Define the bits in register CHSCCDR */
+#define MXC_CCM_CHSCCDR_ESC_CLK_PRED_OFFSET             (12)
+#define MXC_CCM_CHSCCDR_ESC_CLK_PRED_MASK               (0x7 << 12)
+#define MXC_CCM_CHSCCDR_ESC_CLK_PODF_OFFSET             (6)
+#define MXC_CCM_CHSCCDR_ESC_CLK_PODF_MASK               (0x3F << 6)
+#define MXC_CCM_CHSCCDR_HSC2_CLK_PODF_OFFSET            (3)
+#define MXC_CCM_CHSCCDR_HSC2_CLK_PODF_MASK              (0x7 << 3)
+#define MXC_CCM_CHSCCDR_HSC1_CLK_PODF_OFFSET            (0)
+#define MXC_CCM_CHSCCDR_HSC1_CLK_PODF_MASK              (0x7)
+
+/* Define the bits in register CSCDR2 */
+#define MXC_CCM_CSCDR2_CSPI_CLK_PRED_OFFSET             (25)
+#define MXC_CCM_CSCDR2_CSPI_CLK_PRED_MASK               (0x7 << 25)
+#define MXC_CCM_CSCDR2_CSPI_CLK_PODF_OFFSET             (19)
+#define MXC_CCM_CSCDR2_CSPI_CLK_PODF_MASK               (0x3F << 19)
+#define MXC_CCM_CSCDR2_SIM_CLK_PRED_OFFSET              (16)
+#define MXC_CCM_CSCDR2_SIM_CLK_PRED_MASK                (0x7 << 16)
+#define MXC_CCM_CSCDR2_SIM_CLK_PODF_OFFSET              (9)
+#define MXC_CCM_CSCDR2_SIM_CLK_PODF_MASK                (0x3F << 9)
+#define MXC_CCM_CSCDR2_SLIMBUS_CLK_PRED_OFFSET          (6)
+#define MXC_CCM_CSCDR2_SLIMBUS_PRED_MASK                (0x7 << 6)
+#define MXC_CCM_CSCDR2_SLIMBUS_PODF_OFFSET              (0)
+#define MXC_CCM_CSCDR2_SLIMBUS_PODF_MASK                (0x3F)
+
+/* Define the bits in register CSCDR3 */
+#define MXC_CCM_CSCDR3_HSI2C_CLK_PRED_OFFSET            (16)
+#define MXC_CCM_CSCDR3_HSI2C_CLK_PRED_MASK              (0x7 << 16)
+#define MXC_CCM_CSCDR3_HSI2C_CLK_PODF_OFFSET            (9)
+#define MXC_CCM_CSCDR3_HSI2C_CLK_PODF_MASK              (0x3F << 9)
+#define MXC_CCM_CSCDR3_FIRI_CLK_PRED_OFFSET             (6)
+#define MXC_CCM_CSCDR3_FIRI_CLK_PRED_MASK               (0x7 << 6)
+#define MXC_CCM_CSCDR3_FIRI_CLK_PODF_OFFSET             (0)
+#define MXC_CCM_CSCDR3_FIRI_CLK_PODF_MASK               (0x3F)
+
+/* Define the bits in register CSCDR4 */
+#define MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PRED_OFFSET        (16)
+#define MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PRED_MASK          (0x7 << 16)
+#define MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PODF_OFFSET        (9)
+#define MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PODF_MASK          (0x3F << 9)
+#define MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PRED_OFFSET        (6)
+#define MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PRED_MASK          (0x7 << 6)
+#define MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PODF_OFFSET        (0)
+#define MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PODF_MASK          (0x3F)
+
+/* Define the bits in register CDHIPR */
+#define MXC_CCM_CDHIPR_ARM_PODF_BUSY                    (1 << 16)
+#define MXC_CCM_CDHIPR_DDR_HF_CLK_SEL_BUSY              (1 << 8)
+#define MXC_CCM_CDHIPR_DDR_PODF_BUSY                    (1 << 7)
+#define MXC_CCM_CDHIPR_EMI_CLK_SEL_BUSY                 (1 << 6)
+#define MXC_CCM_CDHIPR_PERIPH_CLK_SEL_BUSY              (1 << 5)
+#define MXC_CCM_CDHIPR_NFC_IPG_INT_MEM_PODF_BUSY        (1 << 4)
+#define MXC_CCM_CDHIPR_AHB_PODF_BUSY                    (1 << 3)
+#define MXC_CCM_CDHIPR_EMI_PODF_BUSY                    (1 << 2)
+#define MXC_CCM_CDHIPR_AXI_B_PODF_BUSY                  (1 << 1)
+#define MXC_CCM_CDHIPR_AXI_A_PODF_BUSY                  (1 << 0)
+
+/* Define the bits in register CDCR */
+#define MXC_CCM_CDCR_ARM_FREQ_SHIFT_DIVIDER             (0x1 << 2)
+#define MXC_CCM_CDCR_PERIPH_CLK_DVFS_PODF_OFFSET        (0)
+#define MXC_CCM_CDCR_PERIPH_CLK_DVFS_PODF_MASK          (0x3)
+
+/* Define the bits in register CLPCR */
+#define MXC_CCM_CLPCR_BYPASS_HSC_LPM_HS         (0x1 << 23)
+#define MXC_CCM_CLPCR_BYPASS_SCC_LPM_HS         (0x1 << 22)
+#define MXC_CCM_CLPCR_BYPASS_MAX_LPM_HS         (0x1 << 21)
+#define MXC_CCM_CLPCR_BYPASS_SDMA_LPM_HS        (0x1 << 20)
+#define MXC_CCM_CLPCR_BYPASS_EMI_LPM_HS         (0x1 << 19)
+#define MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS         (0x1 << 18)
+#define MXC_CCM_CLPCR_BYPASS_RTIC_LPM_HS        (0x1 << 17)
+#define MXC_CCM_CLPCR_BYPASS_RNGC_LPM_HS        (0x1 << 16)
+#define MXC_CCM_CLPCR_COSC_PWRDOWN              (0x1 << 11)
+#define MXC_CCM_CLPCR_STBY_COUNT_OFFSET         (9)
+#define MXC_CCM_CLPCR_STBY_COUNT_MASK           (0x3 << 9)
+#define MXC_CCM_CLPCR_VSTBY                     (0x1 << 8)
+#define MXC_CCM_CLPCR_DIS_REF_OSC               (0x1 << 7)
+#define MXC_CCM_CLPCR_SBYOS                     (0x1 << 6)
+#define MXC_CCM_CLPCR_ARM_CLK_DIS_ON_LPM        (0x1 << 5)
+#define MXC_CCM_CLPCR_LPSR_CLK_SEL_OFFSET       (3)
+#define MXC_CCM_CLPCR_LPSR_CLK_SEL_MASK         (0x3 << 3)
+#define MXC_CCM_CLPCR_LPM_OFFSET                (0)
+#define MXC_CCM_CLPCR_LPM_MASK                  (0x3)
+
+/* Define the bits in register CISR */
+#define MXC_CCM_CISR_ARM_PODF_LOADED                    (0x1 << 25)
+#define MXC_CCM_CISR_NFC_IPG_INT_MEM_PODF_LOADED        (0x1 << 21)
+#define MXC_CCM_CISR_AHB_PODF_LOADED                    (0x1 << 20)
+#define MXC_CCM_CISR_EMI_PODF_LOADED                    (0x1 << 19)
+#define MXC_CCM_CISR_AXI_B_PODF_LOADED                  (0x1 << 18)
+#define MXC_CCM_CISR_AXI_A_PODF_LOADED                  (0x1 << 17)
+#define MXC_CCM_CISR_DIVIDER_LOADED                     (0x1 << 16)
+#define MXC_CCM_CISR_COSC_READY                         (0x1 << 6)
+#define MXC_CCM_CISR_CKIH2_READY                        (0x1 << 5)
+#define MXC_CCM_CISR_CKIH_READY                         (0x1 << 4)
+#define MXC_CCM_CISR_FPM_READY                          (0x1 << 3)
+#define MXC_CCM_CISR_LRF_PLL3                           (0x1 << 2)
+#define MXC_CCM_CISR_LRF_PLL2                           (0x1 << 1)
+#define MXC_CCM_CISR_LRF_PLL1                           (0x1)
+
+/* Define the bits in register CIMR */
+#define MXC_CCM_CIMR_MASK_ARM_PODF_LOADED               (0x1 << 25)
+#define MXC_CCM_CIMR_MASK_NFC_IPG_INT_MEM_PODF_LOADED   (0x1 << 21)
+#define MXC_CCM_CIMR_MASK_EMI_PODF_LOADED               (0x1 << 20)
+#define MXC_CCM_CIMR_MASK_AXI_C_PODF_LOADED             (0x1 << 19)
+#define MXC_CCM_CIMR_MASK_AXI_B_PODF_LOADED             (0x1 << 18)
+#define MXC_CCM_CIMR_MASK_AXI_A_PODF_LOADED             (0x1 << 17)
+#define MXC_CCM_CIMR_MASK_DIVIDER_LOADED                (0x1 << 16)
+#define MXC_CCM_CIMR_MASK_COSC_READY                    (0x1 << 5)
+#define MXC_CCM_CIMR_MASK_CKIH_READY                    (0x1 << 4)
+#define MXC_CCM_CIMR_MASK_FPM_READY                     (0x1 << 3)
+#define MXC_CCM_CIMR_MASK_LRF_PLL3                      (0x1 << 2)
+#define MXC_CCM_CIMR_MASK_LRF_PLL2                      (0x1 << 1)
+#define MXC_CCM_CIMR_MASK_LRF_PLL1                      (0x1)
+
+/* Define the bits in register CCOSR */
+#define MXC_CCM_CCOSR_CKO2_EN_OFFSET                    (0x1 << 24)
+#define MXC_CCM_CCOSR_CKO2_DIV_OFFSET                   (21)
+#define MXC_CCM_CCOSR_CKO2_DIV_MASK                     (0x7 << 21)
+#define MXC_CCM_CCOSR_CKO2_SEL_OFFSET                   (16)
+#define MXC_CCM_CCOSR_CKO2_SEL_MASK                     (0x1F << 16)
+#define MXC_CCM_CCOSR_CKOL_EN                           (0x1 << 7)
+#define MXC_CCM_CCOSR_CKOL_DIV_OFFSET                   (4)
+#define MXC_CCM_CCOSR_CKOL_DIV_MASK                     (0x7 << 4)
+#define MXC_CCM_CCOSR_CKOL_SEL_OFFSET                   (0)
+#define MXC_CCM_CCOSR_CKOL_SEL_MASK                     (0xF)
+
+/* Define the bits in registers CGPR */
+#define MXC_CCM_CGPR_EFUSE_PROG_SUPPLY_GATE             (0x1 << 4)
+#define MXC_CCM_CGPR_FPM_SEL                            (0x1 << 3)
+#define MXC_CCM_CGPR_VL_L2BIST_CLKDIV_OFFSET            (0)
+#define MXC_CCM_CGPR_VL_L2BIST_CLKDIV_MASK              (0x7)
+
+/* Define the bits in registers CCGRx */
+#define MXC_CCM_CCGRx_CG_MASK                           0x3
+#define MXC_CCM_CCGRx_MOD_OFF                           0x0
+#define MXC_CCM_CCGRx_MOD_ON                            0x3
+#define MXC_CCM_CCGRx_MOD_IDLE                          0x1
+
+#define MXC_CCM_CCGRx_CG15_MASK                         (0x3 << 30)
+#define MXC_CCM_CCGRx_CG14_MASK                         (0x3 << 28)
+#define MXC_CCM_CCGRx_CG13_MASK                         (0x3 << 26)
+#define MXC_CCM_CCGRx_CG12_MASK                         (0x3 << 24)
+#define MXC_CCM_CCGRx_CG11_MASK                         (0x3 << 22)
+#define MXC_CCM_CCGRx_CG10_MASK                         (0x3 << 20)
+#define MXC_CCM_CCGRx_CG9_MASK                          (0x3 << 18)
+#define MXC_CCM_CCGRx_CG8_MASK                          (0x3 << 16)
+#define MXC_CCM_CCGRx_CG5_MASK                          (0x3 << 10)
+#define MXC_CCM_CCGRx_CG4_MASK                          (0x3 << 8)
+#define MXC_CCM_CCGRx_CG3_MASK                          (0x3 << 6)
+#define MXC_CCM_CCGRx_CG2_MASK                          (0x3 << 4)
+#define MXC_CCM_CCGRx_CG1_MASK                          (0x3 << 2)
+#define MXC_CCM_CCGRx_CG0_MASK                          (0x3 << 0)
+
+#define MXC_CCM_CCGRx_CG15_OFFSET                       30
+#define MXC_CCM_CCGRx_CG14_OFFSET                       28
+#define MXC_CCM_CCGRx_CG13_OFFSET                       26
+#define MXC_CCM_CCGRx_CG12_OFFSET                       24
+#define MXC_CCM_CCGRx_CG11_OFFSET                       22
+#define MXC_CCM_CCGRx_CG10_OFFSET                       20
+#define MXC_CCM_CCGRx_CG9_OFFSET                        18
+#define MXC_CCM_CCGRx_CG8_OFFSET                        16
+#define MXC_CCM_CCGRx_CG7_OFFSET                        14
+#define MXC_CCM_CCGRx_CG6_OFFSET                        12
+#define MXC_CCM_CCGRx_CG5_OFFSET                        10
+#define MXC_CCM_CCGRx_CG4_OFFSET                        8
+#define MXC_CCM_CCGRx_CG3_OFFSET                        6
+#define MXC_CCM_CCGRx_CG2_OFFSET                        4
+#define MXC_CCM_CCGRx_CG1_OFFSET                        2
+#define MXC_CCM_CCGRx_CG0_OFFSET                        0
+
+#define MXC_DPTC_LP_BASE        (MX51_GPC_BASE + 0x80)
+#define MXC_DPTC_GP_BASE        (MX51_GPC_BASE + 0x100)
+#define MXC_DVFS_CORE_BASE      (MX51_GPC_BASE + 0x180)
+#define MXC_DPTC_PER_BASE       (MX51_GPC_BASE + 0x1C0)
+#define MXC_PGC_IPU_BASE        (MX51_GPC_BASE + 0x220)
+#define MXC_PGC_VPU_BASE        (MX51_GPC_BASE + 0x240)
+#define MXC_PGC_GPU_BASE        (MX51_GPC_BASE + 0x260)
+#define MXC_SRPG_NEON_BASE      (MX51_GPC_BASE + 0x280)
+#define MXC_SRPG_ARM_BASE       (MX51_GPC_BASE + 0x2A0)
+#define MXC_SRPG_EMPGC0_BASE    (MX51_GPC_BASE + 0x2C0)
+#define MXC_SRPG_EMPGC1_BASE    (MX51_GPC_BASE + 0x2D0)
+#define MXC_SRPG_MEGAMIX_BASE   (MX51_GPC_BASE + 0x2E0)
+#define MXC_SRPG_EMI_BASE       (MX51_GPC_BASE + 0x300)
+
+/* CORTEXA8 platform */
+#define MXC_CORTEXA8_PLAT_PVID          (MX51_CORTEXA8_BASE + 0x0)
+#define MXC_CORTEXA8_PLAT_GPC           (MX51_CORTEXA8_BASE + 0x4)
+#define MXC_CORTEXA8_PLAT_PIC           (MX51_CORTEXA8_BASE + 0x8)
+#define MXC_CORTEXA8_PLAT_LPC           (MX51_CORTEXA8_BASE + 0xC)
+#define MXC_CORTEXA8_PLAT_NEON_LPC      (MX51_CORTEXA8_BASE + 0x10)
+#define MXC_CORTEXA8_PLAT_ICGC          (MX51_CORTEXA8_BASE + 0x14)
+#define MXC_CORTEXA8_PLAT_AMC           (MX51_CORTEXA8_BASE + 0x18)
+#define MXC_CORTEXA8_PLAT_NMC           (MX51_CORTEXA8_BASE + 0x20)
+#define MXC_CORTEXA8_PLAT_NMS           (MX51_CORTEXA8_BASE + 0x24)
+
+/* DVFS CORE */
+#define MXC_DVFSTHRS            (MXC_DVFS_CORE_BASE + 0x00)
+#define MXC_DVFSCOUN            (MXC_DVFS_CORE_BASE + 0x04)
+#define MXC_DVFSSIG1            (MXC_DVFS_CORE_BASE + 0x08)
+#define MXC_DVFSSIG0            (MXC_DVFS_CORE_BASE + 0x0C)
+#define MXC_DVFSGPC0            (MXC_DVFS_CORE_BASE + 0x10)
+#define MXC_DVFSGPC1            (MXC_DVFS_CORE_BASE + 0x14)
+#define MXC_DVFSGPBT            (MXC_DVFS_CORE_BASE + 0x18)
+#define MXC_DVFSEMAC            (MXC_DVFS_CORE_BASE + 0x1C)
+#define MXC_DVFSCNTR            (MXC_DVFS_CORE_BASE + 0x20)
+#define MXC_DVFSLTR0_0          (MXC_DVFS_CORE_BASE + 0x24)
+#define MXC_DVFSLTR0_1          (MXC_DVFS_CORE_BASE + 0x28)
+#define MXC_DVFSLTR1_0          (MXC_DVFS_CORE_BASE + 0x2C)
+#define MXC_DVFSLTR1_1          (MXC_DVFS_CORE_BASE + 0x30)
+#define MXC_DVFSPT0             (MXC_DVFS_CORE_BASE + 0x34)
+#define MXC_DVFSPT1             (MXC_DVFS_CORE_BASE + 0x38)
+#define MXC_DVFSPT2             (MXC_DVFS_CORE_BASE + 0x3C)
+#define MXC_DVFSPT3             (MXC_DVFS_CORE_BASE + 0x40)
+
+/* GPC */
+#define MXC_GPC_CNTR            (MX51_GPC_BASE + 0x0)
+#define MXC_GPC_PGR             (MX51_GPC_BASE + 0x4)
+#define MXC_GPC_VCR             (MX51_GPC_BASE + 0x8)
+#define MXC_GPC_ALL_PU          (MX51_GPC_BASE + 0xC)
+#define MXC_GPC_NEON            (MX51_GPC_BASE + 0x10)
+#define MXC_GPC_PGR_ARMPG_OFFSET        8
+#define MXC_GPC_PGR_ARMPG_MASK          (3 << 8)
+
+/* PGC */
+#define MXC_PGC_IPU_PGCR        (MXC_PGC_IPU_BASE + 0x0)
+#define MXC_PGC_IPU_PGSR        (MXC_PGC_IPU_BASE + 0xC)
+#define MXC_PGC_VPU_PGCR        (MXC_PGC_VPU_BASE + 0x0)
+#define MXC_PGC_VPU_PGSR        (MXC_PGC_VPU_BASE + 0xC)
+#define MXC_PGC_GPU_PGCR        (MXC_PGC_GPU_BASE + 0x0)
+#define MXC_PGC_GPU_PGSR        (MXC_PGC_GPU_BASE + 0xC)
+
+#define MXC_PGCR_PCR            1
+#define MXC_SRPGCR_PCR          1
+#define MXC_EMPGCR_PCR          1
+#define MXC_PGSR_PSR            1
+
+
+#define MXC_CORTEXA8_PLAT_LPC_DSM       (1 << 0)
+#define MXC_CORTEXA8_PLAT_LPC_DBG_DSM   (1 << 1)
+
+/* SRPG */
+#define MXC_SRPG_NEON_SRPGCR    (MXC_SRPG_NEON_BASE + 0x0)
+#define MXC_SRPG_NEON_PUPSCR    (MXC_SRPG_NEON_BASE + 0x4)
+#define MXC_SRPG_NEON_PDNSCR    (MXC_SRPG_NEON_BASE + 0x8)
+
+#define MXC_SRPG_ARM_SRPGCR     (MXC_SRPG_ARM_BASE + 0x0)
+#define MXC_SRPG_ARM_PUPSCR     (MXC_SRPG_ARM_BASE + 0x4)
+#define MXC_SRPG_ARM_PDNSCR     (MXC_SRPG_ARM_BASE + 0x8)
+
+#define MXC_SRPG_EMPGC0_SRPGCR  (MXC_SRPG_EMPGC0_BASE + 0x0)
+#define MXC_SRPG_EMPGC0_PUPSCR  (MXC_SRPG_EMPGC0_BASE + 0x4)
+#define MXC_SRPG_EMPGC0_PDNSCR  (MXC_SRPG_EMPGC0_BASE + 0x8)
+
+#define MXC_SRPG_EMPGC1_SRPGCR  (MXC_SRPG_EMPGC1_BASE + 0x0)
+#define MXC_SRPG_EMPGC1_PUPSCR  (MXC_SRPG_EMPGC1_BASE + 0x4)
+#define MXC_SRPG_EMPGC1_PDNSCR  (MXC_SRPG_EMPGC1_BASE + 0x8)
+
+#define MXC_SRPG_MEGAMIX_SRPGCR         (MXC_SRPG_MEGAMIX_BASE + 0x0)
+#define MXC_SRPG_MEGAMIX_PUPSCR         (MXC_SRPG_MEGAMIX_BASE + 0x4)
+#define MXC_SRPG_MEGAMIX_PDNSCR         (MXC_SRPG_MEGAMIX_BASE + 0x8)
+
+#define MXC_SRPGC_EMI_SRPGCR    (MXC_SRPGC_EMI_BASE + 0x0)
+#define MXC_SRPGC_EMI_PUPSCR    (MXC_SRPGC_EMI_BASE + 0x4)
+#define MXC_SRPGC_EMI_PDNSCR    (MXC_SRPGC_EMI_BASE + 0x8)
+
+#endif                          /* __ARCH_ARM_MACH_MX51_CRM_REGS_H__ */
diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c
new file mode 100644
index 00000000000..d6fd3961ade
--- /dev/null
+++ b/arch/arm/mach-mx5/devices.c
@@ -0,0 +1,96 @@
+/*
+ * Copyright 2009 Amit Kucheria <amit.kucheria@canonical.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/platform_device.h>
+#include <mach/hardware.h>
+#include <mach/imx-uart.h>
+
+static struct resource uart0[] = {
+        {
+                .start = MX51_UART1_BASE_ADDR,
+                .end = MX51_UART1_BASE_ADDR + 0xfff,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = MX51_MXC_INT_UART1,
+                .end = MX51_MXC_INT_UART1,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device mxc_uart_device0 = {
+        .name = "imx-uart",
+        .id = 0,
+        .resource = uart0,
+        .num_resources = ARRAY_SIZE(uart0),
+};
+
+static struct resource uart1[] = {
+        {
+                .start = MX51_UART2_BASE_ADDR,
+                .end = MX51_UART2_BASE_ADDR + 0xfff,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = MX51_MXC_INT_UART2,
+                .end = MX51_MXC_INT_UART2,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device mxc_uart_device1 = {
+        .name = "imx-uart",
+        .id = 1,
+        .resource = uart1,
+        .num_resources = ARRAY_SIZE(uart1),
+};
+
+static struct resource uart2[] = {
+        {
+                .start = MX51_UART3_BASE_ADDR,
+                .end = MX51_UART3_BASE_ADDR + 0xfff,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = MX51_MXC_INT_UART3,
+                .end = MX51_MXC_INT_UART3,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device mxc_uart_device2 = {
+        .name = "imx-uart",
+        .id = 2,
+        .resource = uart2,
+        .num_resources = ARRAY_SIZE(uart2),
+};
+
+static struct resource mxc_fec_resources[] = {
+        {
+                .start  = MX51_MXC_FEC_BASE_ADDR,
+                .end    = MX51_MXC_FEC_BASE_ADDR + 0xfff,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = MX51_MXC_INT_FEC,
+                .end    = MX51_MXC_INT_FEC,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device mxc_fec_device = {
+        .name = "fec",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(mxc_fec_resources),
+        .resource = mxc_fec_resources,
+};
+
+/* Dummy definition to allow compiling in AVIC and TZIC simultaneously */
+int __init mxc_register_gpios(void)
+{
+        return 0;
+}
diff --git a/arch/arm/mach-mx5/devices.h b/arch/arm/mach-mx5/devices.h
new file mode 100644
index 00000000000..f339ab8c19b
--- /dev/null
+++ b/arch/arm/mach-mx5/devices.h
@@ -0,0 +1,4 @@
+extern struct platform_device mxc_uart_device0;
+extern struct platform_device mxc_uart_device1;
+extern struct platform_device mxc_uart_device2;
+extern struct platform_device mxc_fec_device;
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
new file mode 100644
index 00000000000..b7677ef80cc
--- /dev/null
+++ b/arch/arm/mach-mx5/mm.c
@@ -0,0 +1,83 @@
+/*
+ * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License.  You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ *
+ * Create static mapping between physical to virtual memory.
+ */
+
+#include <linux/mm.h>
+#include <linux/init.h>
+
+#include <asm/mach/map.h>
+
+#include <mach/hardware.h>
+#include <mach/common.h>
+#include <mach/iomux-v3.h>
+
+/*
+ * Define the MX51 memory map.
+ */
+static struct map_desc mxc_io_desc[] __initdata = {
+        {
+                .virtual = MX51_IRAM_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX51_IRAM_BASE_ADDR),
+                .length = MX51_IRAM_SIZE,
+                .type = MT_DEVICE
+        }, {
+                .virtual = MX51_DEBUG_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX51_DEBUG_BASE_ADDR),
+                .length = MX51_DEBUG_SIZE,
+                .type = MT_DEVICE
+        }, {
+                .virtual = MX51_AIPS1_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX51_AIPS1_BASE_ADDR),
+                .length = MX51_AIPS1_SIZE,
+                .type = MT_DEVICE
+        }, {
+                .virtual = MX51_SPBA0_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX51_SPBA0_BASE_ADDR),
+                .length = MX51_SPBA0_SIZE,
+                .type = MT_DEVICE
+        }, {
+                .virtual = MX51_AIPS2_BASE_ADDR_VIRT,
+                .pfn = __phys_to_pfn(MX51_AIPS2_BASE_ADDR),
+                .length = MX51_AIPS2_SIZE,
+                .type = MT_DEVICE
+        },
+};
+
+/*
+ * This function initializes the memory map. It is called during the
+ * system startup to create static physical to virtual memory mappings
+ * for the IO modules.
+ */
+void __init mx51_map_io(void)
+{
+        mxc_set_cpu_type(MXC_CPU_MX51);
+        mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
+        mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG_BASE_ADDR));
+        iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
+}
+
+void __init mx51_init_irq(void)
+{
+        unsigned long tzic_addr;
+        void __iomem *tzic_virt;
+
+        if (mx51_revision() < MX51_CHIP_REV_2_0)
+                tzic_addr = MX51_TZIC_BASE_ADDR_TO1;
+        else
+                tzic_addr = MX51_TZIC_BASE_ADDR;
+
+        tzic_virt = ioremap(tzic_addr, SZ_16K);
+        if (!tzic_virt)
+                panic("unable to map TZIC interrupt controller\n");
+
+        tzic_init_irq(tzic_virt);
+}
diff --git a/arch/arm/mach-mxc91231/magx-zn5.c b/arch/arm/mach-mxc91231/magx-zn5.c
index 7dbe4ca12ef..69816ba8293 100644
--- a/arch/arm/mach-mxc91231/magx-zn5.c
+++ b/arch/arm/mach-mxc91231/magx-zn5.c
@@ -55,7 +55,7 @@ struct sys_timer zn5_timer = {
 MACHINE_START(MAGX_ZN5, "Motorola Zn5")
         .phys_io        = MXC91231_AIPS1_BASE_ADDR,
         .io_pg_offst    = ((MXC91231_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
-        .boot_params    = PHYS_OFFSET + 0x100,
+        .boot_params    = MXC91231_PHYS_OFFSET + 0x100,
         .map_io         = mxc91231_map_io,
         .init_irq       = mxc91231_init_irq,
         .timer          = &zn5_timer,
diff --git a/arch/arm/mach-netx/fb.c b/arch/arm/mach-netx/fb.c
index 1d844e228ea..5b84bcd3027 100644
--- a/arch/arm/mach-netx/fb.c
+++ b/arch/arm/mach-netx/fb.c
@@ -23,6 +23,7 @@
 #include <linux/amba/bus.h>
 #include <linux/amba/clcd.h>
 #include <linux/err.h>
+#include <linux/gfp.h>
 
 #include <asm/irq.h>
 
diff --git a/arch/arm/mach-netx/xc.c b/arch/arm/mach-netx/xc.c
index 181a78ba816..f009b54e8d2 100644
--- a/arch/arm/mach-netx/xc.c
+++ b/arch/arm/mach-netx/xc.c
@@ -21,6 +21,7 @@
 #include <linux/device.h>
 #include <linux/firmware.h>
 #include <linux/mutex.h>
+#include <linux/slab.h>
 #include <linux/io.h>
 
 #include <mach/hardware.h>
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index 9438bf6613a..ab3712c86d2 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -38,7 +38,7 @@
 #define SRC_CR_INIT_MASK        0x00007fff
 #define SRC_CR_INIT_VAL         0x2aaa8000
 
-/* These adresses span 16MB, so use three individual pages */
+/* These addresses span 16MB, so use three individual pages */
 static struct resource nhk8815_nand_resources[] = {
         {
                 .name = "nand_addr",
diff --git a/arch/arm/mach-nomadik/gpio.c b/arch/arm/mach-nomadik/gpio.c
index 9a09b2791e0..66b1c91ccc7 100644
--- a/arch/arm/mach-nomadik/gpio.c
+++ b/arch/arm/mach-nomadik/gpio.c
@@ -19,6 +19,7 @@
 #include <linux/spinlock.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
+#include <linux/slab.h>
 
 #include <mach/hardware.h>
 #include <mach/gpio.h>
diff --git a/arch/arm/mach-ns9xxx/plat-serial8250.c b/arch/arm/mach-ns9xxx/plat-serial8250.c
index 795b15e8982..463e92465fd 100644
--- a/arch/arm/mach-ns9xxx/plat-serial8250.c
+++ b/arch/arm/mach-ns9xxx/plat-serial8250.c
@@ -10,6 +10,7 @@
  */
 #include <linux/platform_device.h>
 #include <linux/serial_8250.h>
+#include <linux/slab.h>
 
 #include <mach/regs-board-a9m9750dev.h>
 #include <mach/board.h>
diff --git a/arch/arm/mach-ns9xxx/processor-ns9360.c b/arch/arm/mach-ns9xxx/processor-ns9360.c
index abee8338735..aed1999d24f 100644
--- a/arch/arm/mach-ns9xxx/processor-ns9360.c
+++ b/arch/arm/mach-ns9xxx/processor-ns9360.c
@@ -10,7 +10,6 @@
  */
 #include <linux/io.h>
 #include <linux/kernel.h>
-#include <linux/slab.h>
 
 #include <asm/page.h>
 #include <asm/mach/map.h>
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index f9a5cf750b5..e9bdff192f8 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -16,6 +16,7 @@
 #include <linux/err.h>
 #include <linux/io.h>
 #include <linux/platform_device.h>
+#include <linux/slab.h>
 
 #include <mach/irqs.h>
 #include <plat/dma.h>
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 9ad118563f7..20cfbcc6c60 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -68,12 +68,6 @@ struct sys_timer omap_timer;
  * ---------------------------------------------------------------------------
  */
 
-#if defined(CONFIG_ARCH_OMAP16XX)
-#define TIMER_32K_SYNCHRONIZED          0xfffbc410
-#else
-#error OMAP 32KHz timer does not currently work on 15XX!
-#endif
-
 /* 16xx specific defines */
 #define OMAP1_32K_TIMER_BASE            0xfffb9000
 #define OMAP1_32K_TIMER_CR              0x08
@@ -150,15 +144,6 @@ static struct clock_event_device clockevent_32k_timer = {
         .set_mode       = omap_32k_timer_set_mode,
 };
 
-/*
- * The 32KHz synchronized timer is an additional timer on 16xx.
- * It is always running.
- */
-static inline unsigned long omap_32k_sync_timer_read(void)
-{
-        return omap_readl(TIMER_32K_SYNCHRONIZED);
-}
-
 static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id)
 {
         struct clock_event_device *evt = &clockevent_32k_timer;
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index a8a3d1e23e2..2455dcc744a 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -59,8 +59,10 @@ config MACH_OMAP3_BEAGLE
         select OMAP_PACKAGE_CBB
 
 config MACH_DEVKIT8000
-        bool "DEVKIT8000 board"
-        depends on ARCH_OMAP3
+        bool "DEVKIT8000 board"
+        depends on ARCH_OMAP3
+        select OMAP_PACKAGE_CUS
+        select OMAP_MUX
 
 config MACH_OMAP_LDP
         bool "OMAP3 LDP board"
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 2069fb33baa..4b9fc57770d 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -22,6 +22,9 @@ obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
 # SMP support ONLY available for OMAP4
 obj-$(CONFIG_SMP)                       += omap-smp.o omap-headsmp.o
 obj-$(CONFIG_LOCAL_TIMERS)              += timer-mpu.o
+obj-$(CONFIG_ARCH_OMAP4)                += omap44xx-smc.o
+
+AFLAGS_omap44xx-smc.o                   :=-Wa,-march=armv7-a
 
 # Functions loaded to SRAM
 obj-$(CONFIG_ARCH_OMAP2420)             += sram242x.o
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index a101029ceb6..5822bcf7b15 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -648,7 +648,7 @@ static void enable_board_wakeup_source(void)
                 OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
 }
 
-static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
+static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
 
         .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
         .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index 4386d2b4a78..504d2bd222f 100755..100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -54,7 +54,7 @@ static void enable_board_wakeup_source(void)
                 OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
 }
 
-static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
+static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
 
         .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
         .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
@@ -96,6 +96,7 @@ static struct omap_board_mux board_mux[] __initdata = {
 static void __init omap_sdp_init(void)
 {
         omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
+        omap_serial_init();
         zoom_peripherals_init();
         board_smc91x_init();
         enable_board_wakeup_source();
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 180ac112e52..b88f28c5814 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -50,33 +50,9 @@ static struct omap_board_config_kernel sdp4430_config[] __initdata = {
 };
 
 #ifdef CONFIG_CACHE_L2X0
-noinline void omap_smc1(u32 fn, u32 arg)
-{
-        register u32 r12 asm("r12") = fn;
-        register u32 r0 asm("r0") = arg;
-
-        /* This is common routine cache secure monitor API used to
-         * modify the PL310 secure registers.
-         * r0 contains the value to be modified and "r12" contains
-         * the monitor API number. It uses few CPU registers
-         * internally and hence they need be backed up including
-         * link register "lr".
-         * Explicitly save r11 and r12 the compiler generated code
-         * won't save it.
-         */
-        asm volatile(
-                "stmfd r13!, {r11,r12}\n"
-                "dsb\n"
-                "smc\n"
-                "ldmfd r13!, {r11,r12}\n"
-                : "+r" (r0), "+r" (r12)
-                :
-                : "r4", "r5", "r10", "lr", "cc");
-}
-EXPORT_SYMBOL(omap_smc1);
-
 static int __init omap_l2_cache_init(void)
 {
+        extern void omap_smc1(u32 fn, u32 arg);
         void __iomem *l2cache_base;
 
         /* To avoid code running on other OMAPs in
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 70c18614773..c1c4389fbd8 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -273,7 +273,7 @@ static void __init am3517_evm_init_irq(void)
         omap_gpio_init();
 }
 
-static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = {
+static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
         .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
         .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
         .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
@@ -294,9 +294,9 @@ static struct omap_board_mux board_mux[] __initdata = {
 
 static void __init am3517_evm_init(void)
 {
-        am3517_evm_i2c_init();
-
         omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
+
+        am3517_evm_i2c_init();
         platform_add_devices(am3517_evm_devices,
                                 ARRAY_SIZE(am3517_evm_devices));
 
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index afa77caaff4..2de4f79f03a 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -612,7 +612,7 @@ static struct omap2_hsmmc_info mmc[] = {
         {}      /* Terminator */
 };
 
-static struct ehci_hcd_omap_platform_data ehci_pdata = {
+static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = {
         .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
         .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
         .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 371019054b4..47e3af2166d 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -50,7 +50,6 @@
 #include <linux/input/matrix_keypad.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/ads7846.h>
-#include <linux/usb/otg.h>
 #include <linux/dm9000.h>
 #include <linux/interrupt.h>
 
@@ -269,20 +268,6 @@ static int devkit8000_twl_gpio_setup(struct device *dev,
         devkit8000_vmmc1_supply.dev = mmc[0].dev;
         devkit8000_vsim_supply.dev = mmc[0].dev;
 
-        /* REVISIT: need ehci-omap hooks for external VBUS
-         * power switch and overcurrent detect
-         */
-
-        gpio_request(gpio + 1, "EHCI_nOC");
-        gpio_direction_input(gpio + 1);
-
-        /* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */
-        gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR");
-        gpio_direction_output(gpio + TWL4030_GPIO_MAX, 1);
-
-        /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
-        gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
-
         return 0;
 }
 
@@ -303,7 +288,7 @@ static struct regulator_consumer_supply devkit8000_vpll2_supplies[] = {
         .dev            = &devkit8000_lcd_device.dev,
         },
         {
-        .supply         = "vdss_dsi",
+        .supply         = "vdds_dsi",
         .dev            = &devkit8000_dss_device.dev,
         }
 };
@@ -636,20 +621,24 @@ static struct omap_musb_board_data musb_board_data = {
         .power                  = 100,
 };
 
-static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
+static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
 
         .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
-        .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
+        .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN,
         .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
 
         .phy_reset  = true,
         .reset_gpio_port[0]  = -EINVAL,
-        .reset_gpio_port[1]  = 147,
+        .reset_gpio_port[1]  = -EINVAL,
         .reset_gpio_port[2]  = -EINVAL
 };
 
 static void __init devkit8000_init(void)
 {
+        omap_serial_init();
+
+        omap_dm9000_init();
+
         devkit8000_i2c_init();
         platform_add_devices(devkit8000_devices,
                         ARRAY_SIZE(devkit8000_devices));
@@ -659,25 +648,15 @@ static void __init devkit8000_init(void)
         spi_register_board_info(devkit8000_spi_board_info,
         ARRAY_SIZE(devkit8000_spi_board_info));
 
-        omap_serial_init();
-
-        omap_dm9000_init();
-
         devkit8000_ads7846_init();
 
-        omap_mux_init_gpio(170, OMAP_PIN_INPUT);
-
-        gpio_request(170, "DVI_nPD");
-        /* REVISIT leave DVI powered down until it's needed ... */
-        gpio_direction_output(170, true);
-
         usb_musb_init(&musb_board_data);
         usb_ehci_init(&ehci_pdata);
         devkit8000_flash_init();
 
         /* Ensure SDRC pins are mux'd for self-refresh */
-        omap_mux_init_signal("sdr_cke0", OMAP_PIN_OUTPUT);
-        omap_mux_init_signal("sdr_cke1", OMAP_PIN_OUTPUT);
+        omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
+        omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
 }
 
 static void __init devkit8000_map_io(void)
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 9958987a3d0..d55c57b761a 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -16,7 +16,6 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 #include <linux/gpio.h>
-#include <linux/leds.h>
 #include <linux/interrupt.h>
 
 #include <linux/regulator/machine.h>
@@ -39,8 +38,8 @@
 #define IGEP2_SMSC911X_CS       5
 #define IGEP2_SMSC911X_GPIO     176
 #define IGEP2_GPIO_USBH_NRESET  24
-#define IGEP2_GPIO_LED0_RED     26
-#define IGEP2_GPIO_LED0_GREEN   27
+#define IGEP2_GPIO_LED0_GREEN   26
+#define IGEP2_GPIO_LED0_RED     27
 #define IGEP2_GPIO_LED1_RED     28
 #define IGEP2_GPIO_DVI_PUP      170
 #define IGEP2_GPIO_WIFI_NPD     94
@@ -355,34 +354,50 @@ static void __init igep2_display_init(void)
             gpio_direction_output(IGEP2_GPIO_DVI_PUP, 1))
                 pr_err("IGEP v2: Could not obtain gpio GPIO_DVI_PUP\n");
 }
-#ifdef CONFIG_LEDS_TRIGGERS
-static struct gpio_led gpio_leds[] = {
+
+#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
+#include <linux/leds.h>
+
+static struct gpio_led igep2_gpio_leds[] = {
         {
-                .name = "GPIO_LED1_RED",
+                .name = "led0:red",
+                .gpio = IGEP2_GPIO_LED0_RED,
+        },
+        {
+                .name = "led0:green",
                 .default_trigger = "heartbeat",
+                .gpio = IGEP2_GPIO_LED0_GREEN,
+        },
+        {
+                .name = "led1:red",
                 .gpio = IGEP2_GPIO_LED1_RED,
         },
 };
 
-static struct gpio_led_platform_data gpio_leds_info = {
-        .leds           = gpio_leds,
-        .num_leds       = ARRAY_SIZE(gpio_leds),
+static struct gpio_led_platform_data igep2_led_pdata = {
+        .leds           = igep2_gpio_leds,
+        .num_leds       = ARRAY_SIZE(igep2_gpio_leds),
 };
 
-static struct platform_device leds_gpio = {
+static struct platform_device igep2_led_device = {
          .name   = "leds-gpio",
          .id     = -1,
          .dev    = {
-                 .platform_data  =  &gpio_leds_info,
+                 .platform_data  =  &igep2_led_pdata,
         },
 };
+
+static void __init igep2_init_led(void)
+{
+        platform_device_register(&igep2_led_device);
+}
+
+#else
+static inline void igep2_init_led(void) {}
 #endif
 
 static struct platform_device *igep2_devices[] __initdata = {
         &igep2_dss_device,
-#ifdef CONFIG_LEDS_TRIGGERS
-        &leds_gpio,
-#endif
 };
 
 static void __init igep2_init_irq(void)
@@ -442,14 +457,14 @@ static struct omap_musb_board_data musb_board_data = {
         .power                  = 100,
 };
 
-static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
-        .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
-        .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
+static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
+        .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
+        .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN,
         .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
 
         .phy_reset = true,
-        .reset_gpio_port[0] = -EINVAL,
-        .reset_gpio_port[1] = IGEP2_GPIO_USBH_NRESET,
+        .reset_gpio_port[0] = IGEP2_GPIO_USBH_NRESET,
+        .reset_gpio_port[1] = -EINVAL,
         .reset_gpio_port[2] = -EINVAL,
 };
 
@@ -471,31 +486,34 @@ static void __init igep2_init(void)
         usb_ehci_init(&ehci_pdata);
 
         igep2_flash_init();
+        igep2_init_led();
         igep2_display_init();
         igep2_init_smsc911x();
 
         /* GPIO userspace leds */
-        if ((gpio_request(IGEP2_GPIO_LED0_RED, "GPIO_LED0_RED") == 0) &&
+#if !defined(CONFIG_LEDS_GPIO) && !defined(CONFIG_LEDS_GPIO_MODULE)
+        if ((gpio_request(IGEP2_GPIO_LED0_RED, "led0:red") == 0) &&
             (gpio_direction_output(IGEP2_GPIO_LED0_RED, 1) == 0)) {
                 gpio_export(IGEP2_GPIO_LED0_RED, 0);
                 gpio_set_value(IGEP2_GPIO_LED0_RED, 0);
         } else
                 pr_warning("IGEP v2: Could not obtain gpio GPIO_LED0_RED\n");
 
-        if ((gpio_request(IGEP2_GPIO_LED0_GREEN, "GPIO_LED0_GREEN") == 0) &&
+        if ((gpio_request(IGEP2_GPIO_LED0_GREEN, "led0:green") == 0) &&
             (gpio_direction_output(IGEP2_GPIO_LED0_GREEN, 1) == 0)) {
                 gpio_export(IGEP2_GPIO_LED0_GREEN, 0);
                 gpio_set_value(IGEP2_GPIO_LED0_GREEN, 0);
         } else
                 pr_warning("IGEP v2: Could not obtain gpio GPIO_LED0_GREEN\n");
-#ifndef CONFIG_LEDS_TRIGGERS
-        if ((gpio_request(IGEP2_GPIO_LED1_RED, "GPIO_LED1_RED") == 0) &&
+
+        if ((gpio_request(IGEP2_GPIO_LED1_RED, "led1:red") == 0) &&
             (gpio_direction_output(IGEP2_GPIO_LED1_RED, 1) == 0)) {
                 gpio_export(IGEP2_GPIO_LED1_RED, 0);
                 gpio_set_value(IGEP2_GPIO_LED1_RED, 0);
         } else
                 pr_warning("IGEP v2: Could not obtain gpio GPIO_LED1_RED\n");
 #endif
+
         /* GPIO W-LAN + Bluetooth combo module */
         if ((gpio_request(IGEP2_GPIO_WIFI_NPD, "GPIO_WIFI_NPD") == 0) &&
             (gpio_direction_output(IGEP2_GPIO_WIFI_NPD, 1) == 0)) {
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 4cab0522d7c..3ccc34ebdcc 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -37,6 +37,103 @@ static int slot1_cover_open;
 static int slot2_cover_open;
 static struct device *mmc_device;
 
+#define TUSB6010_ASYNC_CS       1
+#define TUSB6010_SYNC_CS        4
+#define TUSB6010_GPIO_INT       58
+#define TUSB6010_GPIO_ENABLE    0
+#define TUSB6010_DMACHAN        0x3f
+
+#if defined(CONFIG_USB_TUSB6010) || \
+        defined(CONFIG_USB_TUSB6010_MODULE)
+/*
+ * Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and
+ * 1.5 V voltage regulators of PM companion chip. Companion chip will then
+ * provide then PGOOD signal to TUSB6010 which will release it from reset.
+ */
+static int tusb_set_power(int state)
+{
+        int i, retval = 0;
+
+        if (state) {
+                gpio_set_value(TUSB6010_GPIO_ENABLE, 1);
+                msleep(1);
+
+                /* Wait until TUSB6010 pulls INT pin down */
+                i = 100;
+                while (i && gpio_get_value(TUSB6010_GPIO_INT)) {
+                        msleep(1);
+                        i--;
+                }
+
+                if (!i) {
+                        printk(KERN_ERR "tusb: powerup failed\n");
+                        retval = -ENODEV;
+                }
+        } else {
+                gpio_set_value(TUSB6010_GPIO_ENABLE, 0);
+                msleep(10);
+        }
+
+        return retval;
+}
+
+static struct musb_hdrc_config musb_config = {
+        .multipoint     = 1,
+        .dyn_fifo       = 1,
+        .num_eps        = 16,
+        .ram_bits       = 12,
+};
+
+static struct musb_hdrc_platform_data tusb_data = {
+#if defined(CONFIG_USB_MUSB_OTG)
+        .mode           = MUSB_OTG,
+#elif defined(CONFIG_USB_MUSB_PERIPHERAL)
+        .mode           = MUSB_PERIPHERAL,
+#else /* defined(CONFIG_USB_MUSB_HOST) */
+        .mode           = MUSB_HOST,
+#endif
+        .set_power      = tusb_set_power,
+        .min_power      = 25,   /* x2 = 50 mA drawn from VBUS as peripheral */
+        .power          = 100,  /* Max 100 mA VBUS for host mode */
+        .config         = &musb_config,
+};
+
+static void __init n8x0_usb_init(void)
+{
+        int ret = 0;
+        static char     announce[] __initdata = KERN_INFO "TUSB 6010\n";
+
+        /* PM companion chip power control pin */
+        ret = gpio_request(TUSB6010_GPIO_ENABLE, "TUSB6010 enable");
+        if (ret != 0) {
+                printk(KERN_ERR "Could not get TUSB power GPIO%i\n",
+                       TUSB6010_GPIO_ENABLE);
+                return;
+        }
+        gpio_direction_output(TUSB6010_GPIO_ENABLE, 0);
+
+        tusb_set_power(0);
+
+        ret = tusb6010_setup_interface(&tusb_data, TUSB6010_REFCLK_19, 2,
+                                        TUSB6010_ASYNC_CS, TUSB6010_SYNC_CS,
+                                        TUSB6010_GPIO_INT, TUSB6010_DMACHAN);
+        if (ret != 0)
+                goto err;
+
+        printk(announce);
+
+        return;
+
+err:
+        gpio_free(TUSB6010_GPIO_ENABLE);
+}
+#else
+
+static void __init n8x0_usb_init(void) {}
+
+#endif /*CONFIG_USB_TUSB6010 */
+
+
 static struct omap2_mcspi_device_config p54spi_mcspi_config = {
         .turbo_mode     = 0,
         .single_channel = 1,
@@ -119,7 +216,7 @@ static void __init n8x0_onenand_init(void) {}
  */
 #define N8X0_SLOT_SWITCH_GPIO   96
 #define N810_EMMC_VSD_GPIO      23
-#define NN810_EMMC_VIO_GPIO     9
+#define N810_EMMC_VIO_GPIO      9
 
 static int n8x0_mmc_switch_slot(struct device *dev, int slot)
 {
@@ -207,10 +304,10 @@ static void n810_set_power_emmc(struct device *dev,
         if (power_on) {
                 gpio_set_value(N810_EMMC_VSD_GPIO, 1);
                 msleep(1);
-                gpio_set_value(NN810_EMMC_VIO_GPIO, 1);
+                gpio_set_value(N810_EMMC_VIO_GPIO, 1);
                 msleep(1);
         } else {
-                gpio_set_value(NN810_EMMC_VIO_GPIO, 0);
+                gpio_set_value(N810_EMMC_VIO_GPIO, 0);
                 msleep(50);
                 gpio_set_value(N810_EMMC_VSD_GPIO, 0);
                 msleep(50);
@@ -371,7 +468,7 @@ static void n8x0_mmc_cleanup(struct device *dev)
 
         if (machine_is_nokia_n810()) {
                 gpio_free(N810_EMMC_VSD_GPIO);
-                gpio_free(NN810_EMMC_VIO_GPIO);
+                gpio_free(N810_EMMC_VIO_GPIO);
         }
 }
 
@@ -432,7 +529,7 @@ void __init n8x0_mmc_init(void)
 
         err = gpio_request(N8X0_SLOT_SWITCH_GPIO, "MMC slot switch");
         if (err)
-                return err;
+                return;
 
         gpio_direction_output(N8X0_SLOT_SWITCH_GPIO, 0);
 
@@ -440,17 +537,17 @@ void __init n8x0_mmc_init(void)
                 err = gpio_request(N810_EMMC_VSD_GPIO, "MMC slot 2 Vddf");
                 if (err) {
                         gpio_free(N8X0_SLOT_SWITCH_GPIO);
-                        return err;
+                        return;
                 }
                 gpio_direction_output(N810_EMMC_VSD_GPIO, 0);
 
-                err = gpio_request(NN810_EMMC_VIO_GPIO, "MMC slot 2 Vdd");
+                err = gpio_request(N810_EMMC_VIO_GPIO, "MMC slot 2 Vdd");
                 if (err) {
                         gpio_free(N8X0_SLOT_SWITCH_GPIO);
                         gpio_free(N810_EMMC_VSD_GPIO);
-                        return err;
+                        return;
                 }
-                gpio_direction_output(NN810_EMMC_VIO_GPIO, 0);
+                gpio_direction_output(N810_EMMC_VIO_GPIO, 0);
         }
 
         mmc_data[0] = &mmc1_data;
@@ -562,6 +659,7 @@ static void __init n8x0_init_machine(void)
         n8x0_menelaus_init();
         n8x0_onenand_init();
         n8x0_mmc_init();
+        n8x0_usb_init();
 }
 
 MACHINE_START(NOKIA_N800, "Nokia N800")
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 6eb77e1f7c8..962d377970e 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -410,7 +410,7 @@ static void __init omap3beagle_flash_init(void)
         }
 }
 
-static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
+static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
 
         .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
         .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index d6bc88c426b..017bb2f4f7d 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -635,7 +635,7 @@ static struct platform_device *omap3_evm_devices[] __initdata = {
         &omap3_evm_dss_device,
 };
 
-static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
+static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = {
 
         .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
         .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 4827f4658df..395d049bf01 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -459,12 +459,20 @@ static struct i2c_board_info __initdata omap3pandora_i2c_boardinfo[] = {
         },
 };
 
+static struct i2c_board_info __initdata omap3pandora_i2c3_boardinfo[] = {
+        {
+                I2C_BOARD_INFO("bq27500", 0x55),
+                .flags = I2C_CLIENT_WAKE,
+        },
+};
+
 static int __init omap3pandora_i2c_init(void)
 {
         omap_register_i2c_bus(1, 2600, omap3pandora_i2c_boardinfo,
                         ARRAY_SIZE(omap3pandora_i2c_boardinfo));
         /* i2c2 pins are not connected */
-        omap_register_i2c_bus(3, 100, NULL, 0);
+        omap_register_i2c_bus(3, 100, omap3pandora_i2c3_boardinfo,
+                        ARRAY_SIZE(omap3pandora_i2c3_boardinfo));
         return 0;
 }
 
@@ -537,7 +545,7 @@ static struct platform_device *omap3pandora_devices[] __initdata = {
         &pandora_dss_device,
 };
 
-static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
+static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
 
         .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
         .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN,
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index 3943d0f8322..2504d41f923 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -493,7 +493,7 @@ static void __init omap3touchbook_flash_init(void)
         }
 }
 
-static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
+static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
 
         .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
         .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
@@ -518,14 +518,14 @@ static void omap3_touchbook_poweroff(void)
         gpio_direction_output(TB_KILL_POWER_GPIO, 0);
 }
 
-static void __init early_touchbook_revision(char **p)
+static int __init early_touchbook_revision(char *p)
 {
-        if (!*p)
-                return;
+        if (!p)
+                return 0;
 
-        strict_strtoul(*p, 10, &touchbook_revision);
+        return strict_strtoul(p, 10, &touchbook_revision);
 }
-__early_param("tbr=", early_touchbook_revision);
+early_param("tbr", early_touchbook_revision);
 
 static struct omap_musb_board_data musb_board_data = {
         .interface_type         = MUSB_INTERFACE_ULPI,
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 50872a42bec..8848c7c5ce4 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -394,7 +394,7 @@ static struct platform_device *overo_devices[] __initdata = {
         &overo_lcd_device,
 };
 
-static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
+static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
         .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
         .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
         .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
diff --git a/arch/arm/mach-omap2/board-sdp-flash.c b/arch/arm/mach-omap2/board-sdp-flash.c
index b1b88deec7f..2d026328e38 100644
--- a/arch/arm/mach-omap2/board-sdp-flash.c
+++ b/arch/arm/mach-omap2/board-sdp-flash.c
@@ -253,20 +253,20 @@ void __init sdp_flash_init(struct flash_partitions sdp_partition_info[])
         }
 
         if (norcs > GPMC_CS_NUM)
-                printk(KERN_INFO "OneNAND: Unable to find configuration "
-                                " in GPMC\n ");
+                printk(KERN_INFO "NOR: Unable to find configuration "
+                                "in GPMC\n");
         else
                 board_nor_init(sdp_partition_info[0], norcs);
 
         if (onenandcs > GPMC_CS_NUM)
                 printk(KERN_INFO "OneNAND: Unable to find configuration "
-                                " in GPMC\n ");
+                                "in GPMC\n");
         else
                 board_onenand_init(sdp_partition_info[1], onenandcs);
 
         if (nandcs > GPMC_CS_NUM)
                 printk(KERN_INFO "NAND: Unable to find configuration "
-                                " in GPMC\n ");
+                                "in GPMC\n");
         else
                 board_nand_init(sdp_partition_info[2], nandcs);
 }
diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c b/arch/arm/mach-omap2/board-zoom-debugboard.c
index bb4018b6064..e15d2e87cfc 100644
--- a/arch/arm/mach-omap2/board-zoom-debugboard.c
+++ b/arch/arm/mach-omap2/board-zoom-debugboard.c
@@ -96,7 +96,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
 
 static struct platform_device zoom_debugboard_serial_device = {
         .name                   = "serial8250",
-        .id                     = 3,
+        .id                     = PLAT8250_DEV_PLATFORM,
         .dev                    = {
                 .platform_data  = serial_platform_data,
         },
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index ca95d8d6413..6b3984964cc 100755..100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -280,7 +280,6 @@ static void enable_board_wakeup_source(void)
 void __init zoom_peripherals_init(void)
 {
         omap_i2c_init();
-        omap_serial_init();
         usb_musb_init(&musb_board_data);
         enable_board_wakeup_source();
 }
diff --git a/arch/arm/mach-omap2/board-zoom3.c b/arch/arm/mach-omap2/board-zoom3.c
index d3e3cd5170d..cd3e40cf3ac 100644
--- a/arch/arm/mach-omap2/board-zoom3.c
+++ b/arch/arm/mach-omap2/board-zoom3.c
@@ -52,7 +52,7 @@ static struct omap_board_mux board_mux[] __initdata = {
 #define board_mux       NULL
 #endif
 
-static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
+static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
         .port_mode[0]           = EHCI_HCD_OMAP_MODE_UNKNOWN,
         .port_mode[1]           = EHCI_HCD_OMAP_MODE_PHY,
         .port_mode[2]           = EHCI_HCD_OMAP_MODE_UNKNOWN,
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index 3b1eac4d539..e60ca4e47bb 100644
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -31,6 +31,7 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 #include <linux/cpufreq.h>
+#include <linux/slab.h>
 
 #include <plat/clock.h>
 #include <plat/sram.h>
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index fc55ab4c32e..1820a556361 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -1841,6 +1841,7 @@ static struct omap_clk omap2420_clks[] = {
         CLK(NULL,       "aes_ick",      &aes_ick,       CK_242X),
         CLK(NULL,       "pka_ick",      &pka_ick,       CK_242X),
         CLK(NULL,       "usb_fck",      &usb_fck,       CK_242X),
+        CLK("musb_hdrc",        "fck",  &osc_ck,        CK_242X),
 };
 
 /*
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 5a974dcbcec..52638df1545 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -895,7 +895,7 @@ static struct clk dpll4_m4x2_ck = {
         .ops            = &clkops_omap2_dflt_wait,
         .parent         = &dpll4_m4_ck,
         .enable_reg     = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
-        .enable_bit     = OMAP3430_PWRDN_CAM_SHIFT,
+        .enable_bit     = OMAP3430_PWRDN_DSS1_SHIFT,
         .flags          = INVERT_ENABLE,
         .clkdm_name     = "dpll4_clkdm",
         .recalc         = &omap3_clkoutx2_recalc,
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 28b107967c8..a5c0c9c8e49 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -2671,10 +2671,10 @@ static struct omap_clk omap44xx_clks[] = {
         CLK("omap-mcbsp.2",     "ick",                          &dummy_ck,      CK_443X),
         CLK("omap-mcbsp.3",     "ick",                          &dummy_ck,      CK_443X),
         CLK("omap-mcbsp.4",     "ick",                          &dummy_ck,      CK_443X),
-        CLK("omap-mcspi.1",     "ick",                          &dummy_ck,      CK_443X),
-        CLK("omap-mcspi.2",     "ick",                          &dummy_ck,      CK_443X),
-        CLK("omap-mcspi.3",     "ick",                          &dummy_ck,      CK_443X),
-        CLK("omap-mcspi.4",     "ick",                          &dummy_ck,      CK_443X),
+        CLK("omap2_mcspi.1",    "ick",                  &dummy_ck,      CK_443X),
+        CLK("omap2_mcspi.2",    "ick",                  &dummy_ck,      CK_443X),
+        CLK("omap2_mcspi.3",    "ick",                  &dummy_ck,      CK_443X),
+        CLK("omap2_mcspi.4",    "ick",                  &dummy_ck,      CK_443X),
         CLK(NULL,       "uart1_ick",                    &dummy_ck,      CK_443X),
         CLK(NULL,       "uart2_ick",                    &dummy_ck,      CK_443X),
         CLK(NULL,       "uart3_ick",                    &dummy_ck,      CK_443X),
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index b87ad66f083..6e568ec995e 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -240,7 +240,7 @@ static void _omap2_clkdm_set_hwsup(struct clockdomain *clkdm, int enable)
                         bits = OMAP24XX_CLKSTCTRL_ENABLE_AUTO;
                 else
                         bits = OMAP24XX_CLKSTCTRL_DISABLE_AUTO;
-        } else if (cpu_is_omap34xx() | cpu_is_omap44xx()) {
+        } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
                 if (enable)
                         bits = OMAP34XX_CLKSTCTRL_ENABLE_AUTO;
                 else
@@ -812,7 +812,7 @@ int omap2_clkdm_sleep(struct clockdomain *clkdm)
                 cm_set_mod_reg_bits(OMAP24XX_FORCESTATE,
                             clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL);
 
-        } else if (cpu_is_omap34xx() | cpu_is_omap44xx()) {
+        } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
 
                 u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_SLEEP <<
                          __ffs(clkdm->clktrctrl_mask));
@@ -856,7 +856,7 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm)
                 cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE,
                               clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL);
 
-        } else if (cpu_is_omap34xx() | cpu_is_omap44xx()) {
+        } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
 
                 u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_WAKEUP <<
                          __ffs(clkdm->clktrctrl_mask));
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 7e7acc19bed..beac46c48c5 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -764,7 +764,7 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
                         if (!cpu_is_omap44xx())
                                 return;
                         base = OMAP4_MMC5_BASE + OMAP4_MMC_REG_OFFSET;
-                        irq = OMAP44XX_IRQ_MMC4;
+                        irq = OMAP44XX_IRQ_MMC5;
                         break;
                 default:
                         continue;
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index 64d74f05abb..e57fb29ff85 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -39,6 +39,9 @@ static int omap2_nand_gpmc_retime(void)
         struct gpmc_timings t;
         int err;
 
+        if (!gpmc_nand_data->gpmc_t)
+                return 0;
+
         memset(&t, 0, sizeof(t));
         t.sync_clk = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->sync_clk);
         t.cs_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_on);
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S
index ff25c7e4e60..50fd7491664 100644
--- a/arch/arm/mach-omap2/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap2/include/mach/entry-macro.S
@@ -52,7 +52,7 @@ omap_irq_base:	.word	0
 
                 mrc     p15, 0, \tmp, c0, c0, 0 @ get processor revision
                 and     \tmp, \tmp, #0x000f0000 @ only check architecture
-                cmp     \tmp, #0x00060000       @ is v6?
+                cmp     \tmp, #0x00070000       @ is v6?
                 beq     2400f                   @ found v6 so it's omap24xx
                 mrc     p15, 0, \tmp, c0, c0, 0 @ get processor revision
                 and     \tmp, \tmp, #0x000000f0 @ check cortex 8 or 9
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 402e8f0d0f2..87f676acf61 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -237,7 +237,7 @@ static void __init _omap2_map_common_io(void)
 }
 
 #ifdef CONFIG_ARCH_OMAP2420
-void __init omap242x_map_common_io()
+void __init omap242x_map_common_io(void)
 {
         iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
         iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
@@ -246,7 +246,7 @@ void __init omap242x_map_common_io()
 #endif
 
 #ifdef CONFIG_ARCH_OMAP2430
-void __init omap243x_map_common_io()
+void __init omap243x_map_common_io(void)
 {
         iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
         iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
@@ -255,7 +255,7 @@ void __init omap243x_map_common_io()
 #endif
 
 #ifdef CONFIG_ARCH_OMAP3
-void __init omap34xx_map_common_io()
+void __init omap34xx_map_common_io(void)
 {
         iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
         _omap2_map_common_io();
@@ -263,7 +263,7 @@ void __init omap34xx_map_common_io()
 #endif
 
 #ifdef CONFIG_ARCH_OMAP4
-void __init omap44xx_map_common_io()
+void __init omap44xx_map_common_io(void)
 {
         iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
         _omap2_map_common_io();
@@ -309,7 +309,6 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
 {
         pwrdm_init(powerdomains_omap);
         clkdm_init(clockdomains_omap, clkdm_autodeps);
-#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once the clkdev is ready */
         if (cpu_is_omap242x())
                 omap2420_hwmod_init();
         else if (cpu_is_omap243x())
@@ -319,7 +318,6 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
         omap2_mux_init();
         /* The OPP tables have to be registered before a clk init */
         omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps);
-#endif
 
         if (cpu_is_omap2420())
                 omap2420_clk_init();
@@ -333,11 +331,12 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
                 pr_err("Could not init clock framework - unknown CPU\n");
 
         omap_serial_early_init();
-#ifndef CONFIG_ARCH_OMAP4
-        omap_hwmod_late_init();
+        if (cpu_is_omap24xx() || cpu_is_omap34xx())   /* FIXME: OMAP4 */
+                omap_hwmod_late_init();
         omap_pm_if_init();
-        omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
-        _omap2_init_reprogram_sdrc();
-#endif
+        if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
+                omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
+                _omap2_init_reprogram_sdrc();
+        }
         gpmc_init();
 }
diff --git a/arch/arm/mach-omap2/iommu2.c b/arch/arm/mach-omap2/iommu2.c
index 6f4b7cc8f4d..4f63dc6859a 100644
--- a/arch/arm/mach-omap2/iommu2.c
+++ b/arch/arm/mach-omap2/iommu2.c
@@ -15,6 +15,7 @@
 #include <linux/device.h>
 #include <linux/jiffies.h>
 #include <linux/module.h>
+#include <linux/slab.h>
 #include <linux/stringify.h>
 
 #include <plat/iommu.h>
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index 52a981cb8fd..318f3638653 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -430,19 +430,19 @@ static int __devinit omap2_mbox_probe(struct platform_device *pdev)
                 if (unlikely(!res)) {
                         dev_err(&pdev->dev, "invalid irq resource\n");
                         ret = -ENODEV;
-                        goto err_iva1;
+                        omap_mbox_unregister(&mbox_dsp_info);
+                        goto err_dsp;
                 }
                 mbox_iva_info.irq = res->start;
                 ret = omap_mbox_register(&pdev->dev, &mbox_iva_info);
-                if (ret)
-                        goto err_iva1;
+                if (ret) {
+                        omap_mbox_unregister(&mbox_dsp_info);
+                        goto err_dsp;
+                }
         }
 #endif
         return 0;
 
-err_iva1:
-        omap_mbox_unregister(&mbox_dsp_info);
-
 err_dsp:
         iounmap(mbox_base);
         return ret;
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index be8fce395a5..2f3cad6f940 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -16,6 +16,7 @@
 #include <linux/err.h>
 #include <linux/io.h>
 #include <linux/platform_device.h>
+#include <linux/slab.h>
 
 #include <mach/irqs.h>
 #include <plat/dma.h>
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index b4ca84ee0a9..8b3d26935a3 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -26,6 +26,7 @@
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/slab.h>
 #include <linux/spinlock.h>
 #include <linux/list.h>
 #include <linux/ctype.h>
diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S
index aa3f65c2ac9..ef0e7a00dd6 100644
--- a/arch/arm/mach-omap2/omap-headsmp.S
+++ b/arch/arm/mach-omap2/omap-headsmp.S
@@ -33,7 +33,7 @@
 ENTRY(omap_secondary_startup)
 hold:   ldr     r12,=0x103
         dsb
-        smc                             @ read from AuxCoreBoot0
+        smc     #0                      @ read from AuxCoreBoot0
         mov     r0, r0, lsr #9
         mrc     p15, 0, r4, c0, c0, 5
         and     r4, r4, #0x0f
@@ -52,7 +52,7 @@ ENTRY(omap_modify_auxcoreboot0)
         stmfd   sp!, {r1-r12, lr}
         ldr     r12, =0x104
         dsb
-        smc
+        smc     #0
         ldmfd   sp!, {r1-r12, pc}
 END(omap_modify_auxcoreboot0)
 
@@ -60,6 +60,6 @@ ENTRY(omap_auxcoreboot_addr)
         stmfd   sp!, {r2-r12, lr}
         ldr     r12, =0x105
         dsb
-        smc
+        smc     #0
         ldmfd   sp!, {r2-r12, pc}
 END(omap_auxcoreboot_addr)
diff --git a/arch/arm/mach-omap2/omap44xx-smc.S b/arch/arm/mach-omap2/omap44xx-smc.S
new file mode 100644
index 00000000000..f61c7771ca4
--- /dev/null
+++ b/arch/arm/mach-omap2/omap44xx-smc.S
@@ -0,0 +1,32 @@
+/*
+ * OMAP44xx secure APIs file.
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ * Written by Santosh Shilimkar <santosh.shilimkar@ti.com>
+ *
+ *
+ * This program is free software,you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/linkage.h>
+
+/*
+ * This is common routine to manage secure monitor API
+ * used to modify the PL310 secure registers.
+ * 'r0' contains the value to be modified and 'r12' contains
+ * the monitor API number. It uses few CPU registers
+ * internally and hence they need be backed up including
+ * link register "lr".
+ * Function signature : void omap_smc1(u32 fn, u32 arg)
+ */
+
+ENTRY(omap_smc1)
+        stmfd   sp!, {r2-r12, lr}
+        mov     r12, r0
+        mov     r0, r1
+        dsb
+        smc     #0
+        ldmfd   sp!, {r2-r12, pc}
+END(omap_smc1)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index c6649472ce0..e436dcb1979 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1511,6 +1511,9 @@ struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
                 c = oh->slaves[oh->_mpu_port_index]->_clk;
         }
 
+        if (!c->clkdm)
+                return NULL;
+
         return c->clkdm->pwrdm.ptr;
 
 }
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index c18f7f2f19b..6cac9817c24 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -25,6 +25,7 @@
 #include <linux/err.h>
 #include <linux/io.h>
 #include <linux/module.h>
+#include <linux/slab.h>
 
 #include <plat/clock.h>
 #include <plat/board.h>
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index fee2efb172e..ea0000bc535 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -27,6 +27,7 @@
 #include <linux/gpio.h>
 #include <linux/clk.h>
 #include <linux/delay.h>
+#include <linux/slab.h>
 
 #include <plat/sram.h>
 #include <plat/clockdomain.h>
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 9a0fb385622..ebfce7d1a5d 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -222,7 +222,7 @@ void pwrdm_init(struct powerdomain **pwrdm_list)
 {
         struct powerdomain **p = NULL;
 
-        if (cpu_is_omap24xx() | cpu_is_omap34xx()) {
+        if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
                 pwrstctrl_reg_offs = OMAP2_PM_PWSTCTRL;
                 pwrstst_reg_offs = OMAP2_PM_PWSTST;
         } else if (cpu_is_omap44xx()) {
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 81872aacb80..07a60f1204c 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -123,7 +123,7 @@ struct omap3_prcm_regs prcm_context;
 u32 omap_prcm_get_reset_sources(void)
 {
         /* XXX This presumably needs modification for 34XX */
-        if (cpu_is_omap24xx() | cpu_is_omap34xx())
+        if (cpu_is_omap24xx() || cpu_is_omap34xx())
                 return prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST) & 0x7f;
         if (cpu_is_omap44xx())
                 return prm_read_mod_reg(WKUP_MOD, OMAP4_RM_RSTST) & 0x7f;
@@ -133,7 +133,7 @@ u32 omap_prcm_get_reset_sources(void)
 EXPORT_SYMBOL(omap_prcm_get_reset_sources);
 
 /* Resets clock rates and reboots the system. Only called from system.h */
-void omap_prcm_arch_reset(char mode)
+void omap_prcm_arch_reset(char mode, const char *cmd)
 {
         s16 prcm_offs = 0;
 
@@ -145,7 +145,7 @@ void omap_prcm_arch_reset(char mode)
                 u32 l;
 
                 prcm_offs = OMAP3430_GR_MOD;
-                l = ('B' << 24) | ('M' << 16) | mode;
+                l = ('B' << 24) | ('M' << 16) | (cmd ? (u8)*cmd : 0);
                 /* Reserve the first word in scratchpad for communicating
                  * with the boot ROM. A pointer to a data structure
                  * describing the boot process can be stored there,
@@ -157,7 +157,7 @@ void omap_prcm_arch_reset(char mode)
         else
                 WARN_ON(1);
 
-        if (cpu_is_omap24xx() | cpu_is_omap34xx())
+        if (cpu_is_omap24xx() || cpu_is_omap34xx())
                 prm_set_mod_reg_bits(OMAP_RST_DPLL3, prcm_offs,
                                                  OMAP2_RM_RSTCTRL);
         if (cpu_is_omap44xx())
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index b79bc8926cc..3771254dfa8 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -115,7 +115,6 @@ static struct plat_serial8250_port serial_platform_data2[] = {
         }
 };
 
-#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
 static struct plat_serial8250_port serial_platform_data3[] = {
         {
                 .irq            = 70,
@@ -128,23 +127,12 @@ static struct plat_serial8250_port serial_platform_data3[] = {
         }
 };
 
-static inline void omap2_set_globals_uart4(struct omap_globals *omap2_globals)
-{
-        serial_platform_data3[0].mapbase = omap2_globals->uart4_phys;
-}
-#else
-static inline void omap2_set_globals_uart4(struct omap_globals *omap2_globals)
-{
-}
-#endif
-
 void __init omap2_set_globals_uart(struct omap_globals *omap2_globals)
 {
         serial_platform_data0[0].mapbase = omap2_globals->uart1_phys;
         serial_platform_data1[0].mapbase = omap2_globals->uart2_phys;
         serial_platform_data2[0].mapbase = omap2_globals->uart3_phys;
-        if (cpu_is_omap3630() || cpu_is_omap44xx())
-                omap2_set_globals_uart4(omap2_globals);
+        serial_platform_data3[0].mapbase = omap2_globals->uart4_phys;
 }
 
 static inline unsigned int __serial_read_reg(struct uart_port *up,
@@ -550,7 +538,7 @@ static ssize_t sleep_timeout_store(struct device *dev,
         unsigned int value;
 
         if (sscanf(buf, "%u", &value) != 1) {
-                printk(KERN_ERR "sleep_timeout_store: Invalid value\n");
+                dev_err(dev, "sleep_timeout_store: Invalid value\n");
                 return -EINVAL;
         }
 
@@ -644,42 +632,53 @@ static void serial_out_override(struct uart_port *up, int offset, int value)
 }
 void __init omap_serial_early_init(void)
 {
-        int i;
+        int i, nr_ports;
         char name[16];
 
+        if (!(cpu_is_omap3630() || cpu_is_omap4430()))
+                nr_ports = 3;
+        else
+                nr_ports = ARRAY_SIZE(omap_uart);
+
         /*
          * Make sure the serial ports are muxed on at this point.
          * You have to mux them off in device drivers later on
          * if not needed.
          */
 
-        for (i = 0; i < ARRAY_SIZE(omap_uart); i++) {
+        for (i = 0; i < nr_ports; i++) {
                 struct omap_uart_state *uart = &omap_uart[i];
                 struct platform_device *pdev = &uart->pdev;
                 struct device *dev = &pdev->dev;
                 struct plat_serial8250_port *p = dev->platform_data;
 
+                /* Don't map zero-based physical address */
+                if (p->mapbase == 0) {
+                        dev_warn(dev, "no physical address for uart#%d,"
+                                 " so skipping early_init...\n", i);
+                        continue;
+                }
                 /*
                  * Module 4KB + L4 interconnect 4KB
                  * Static mapping, never released
                  */
                 p->membase = ioremap(p->mapbase, SZ_8K);
                 if (!p->membase) {
-                        printk(KERN_ERR "ioremap failed for uart%i\n", i + 1);
+                        dev_err(dev, "ioremap failed for uart%i\n", i + 1);
                         continue;
                 }
 
-                sprintf(name, "uart%d_ick", i+1);
+                sprintf(name, "uart%d_ick", i + 1);
                 uart->ick = clk_get(NULL, name);
                 if (IS_ERR(uart->ick)) {
-                        printk(KERN_ERR "Could not get uart%d_ick\n", i+1);
+                        dev_err(dev, "Could not get uart%d_ick\n", i + 1);
                         uart->ick = NULL;
                 }
 
                 sprintf(name, "uart%d_fck", i+1);
                 uart->fck = clk_get(NULL, name);
                 if (IS_ERR(uart->fck)) {
-                        printk(KERN_ERR "Could not get uart%d_fck\n", i+1);
+                        dev_err(dev, "Could not get uart%d_fck\n", i + 1);
                         uart->fck = NULL;
                 }
 
@@ -722,6 +721,13 @@ void __init omap_serial_init_port(int port)
         pdev = &uart->pdev;
         dev = &pdev->dev;
 
+        /* Don't proceed if there's no clocks available */
+        if (unlikely(!uart->ick || !uart->fck)) {
+                WARN(1, "%s: can't init uart%d, no clocks available\n",
+                     kobject_name(&dev->kobj), port);
+                return;
+        }
+
         omap_uart_enable_clocks(uart);
 
         omap_uart_reset(uart);
diff --git a/arch/arm/mach-omap2/usb-ehci.c b/arch/arm/mach-omap2/usb-ehci.c
index f1df873d59d..ee9f548d5d8 100644
--- a/arch/arm/mach-omap2/usb-ehci.c
+++ b/arch/arm/mach-omap2/usb-ehci.c
@@ -70,7 +70,7 @@ static struct platform_device ehci_device = {
 /*
  * setup_ehci_io_mux - initialize IO pad mux for USBHOST
  */
-static void setup_ehci_io_mux(enum ehci_hcd_omap_mode *port_mode)
+static void setup_ehci_io_mux(const enum ehci_hcd_omap_mode *port_mode)
 {
         switch (port_mode[0]) {
         case EHCI_HCD_OMAP_MODE_PHY:
@@ -213,7 +213,7 @@ static void setup_ehci_io_mux(enum ehci_hcd_omap_mode *port_mode)
         return;
 }
 
-void __init usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata)
+void __init usb_ehci_init(const struct ehci_hcd_omap_platform_data *pdata)
 {
         platform_device_add_data(&ehci_device, pdata, sizeof(*pdata));
 
@@ -229,7 +229,7 @@ void __init usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata)
 
 #else
 
-void __init usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata)
+void __init usb_ehci_init(const struct ehci_hcd_omap_platform_data *pdata)
 
 {
 }
diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
index c3d513cad5a..905719a677a 100644
--- a/arch/arm/mach-orion5x/Kconfig
+++ b/arch/arm/mach-orion5x/Kconfig
@@ -57,6 +57,13 @@ config MACH_LINKSTATION_MINI
           Say 'Y' here if you want your kernel to support the
           Buffalo Linkstation Mini platform.
 
+config MACH_LINKSTATION_LS_HGL
+        bool "Buffalo Linkstation LS-HGL"
+        select I2C_BOARDINFO
+        help
+          Say 'Y' here if you want your kernel to support the
+          Buffalo Linkstation LS-HGL platform.
+
 config MACH_TS409
         bool "QNAP TS-409"
         help
diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile
index 89772fcd65c..eb6eabcb41e 100644
--- a/arch/arm/mach-orion5x/Makefile
+++ b/arch/arm/mach-orion5x/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_MACH_KUROBOX_PRO)	+= kurobox_pro-setup.o
 obj-$(CONFIG_MACH_TERASTATION_PRO2)     += terastation_pro2-setup.o
 obj-$(CONFIG_MACH_LINKSTATION_PRO) += kurobox_pro-setup.o
 obj-$(CONFIG_MACH_LINKSTATION_MINI) += lsmini-setup.o
+obj-$(CONFIG_MACH_LINKSTATION_LS_HGL) += ls_hgl-setup.o
 obj-$(CONFIG_MACH_DNS323)       += dns323-setup.o
 obj-$(CONFIG_MACH_TS209)        += ts209-setup.o tsx09-common.o
 obj-$(CONFIG_MACH_TS409)        += ts409-setup.o tsx09-common.o
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index f87fa125380..8dc2c76d226 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -488,7 +488,7 @@ static struct platform_device orion5x_xor0_channel = {
         .dev            = {
                 .dma_mask               = &orion5x_xor_dmamask,
                 .coherent_dma_mask      = DMA_BIT_MASK(64),
-                .platform_data          = (void *)&orion5x_xor0_data,
+                .platform_data          = &orion5x_xor0_data,
         },
 };
 
@@ -514,7 +514,7 @@ static struct platform_device orion5x_xor1_channel = {
         .dev            = {
                 .dma_mask               = &orion5x_xor_dmamask,
                 .coherent_dma_mask      = DMA_BIT_MASK(64),
-                .platform_data          = (void *)&orion5x_xor1_data,
+                .platform_data          = &orion5x_xor1_data,
         },
 };
 
diff --git a/arch/arm/mach-orion5x/d2net-setup.c b/arch/arm/mach-orion5x/d2net-setup.c
index 9d4bf763f25..7130904ad99 100644
--- a/arch/arm/mach-orion5x/d2net-setup.c
+++ b/arch/arm/mach-orion5x/d2net-setup.c
@@ -149,10 +149,7 @@ static void __init d2net_sata_power_init(void)
 
 /*
  * The blue front LED is wired to the CPLD and can blink in relation with the
- * SATA activity. This feature is disabled to make this LED compatible with
- * the leds-gpio driver: MPP14 and MPP15 are configured to act like output
- * GPIO's and have to stay in an active state. This is needed to set the blue
- * LED in a "fix on" state regardless of the SATA activity.
+ * SATA activity.
  *
  * The following array detail the different LED registers and the combination
  * of their possible values:
@@ -171,12 +168,11 @@ static void __init d2net_sata_power_init(void)
 #define D2NET_GPIO_RED_LED              6
 #define D2NET_GPIO_BLUE_LED_BLINK_CTRL  16
 #define D2NET_GPIO_BLUE_LED_OFF         23
-#define D2NET_GPIO_SATA0_ACT            14
-#define D2NET_GPIO_SATA1_ACT            15
 
 static struct gpio_led d2net_leds[] = {
         {
-                .name = "d2net:blue:power",
+                .name = "d2net:blue:sata",
+                .default_trigger = "default-on",
                 .gpio = D2NET_GPIO_BLUE_LED_OFF,
                 .active_low = 1,
         },
@@ -201,25 +197,22 @@ static struct platform_device d2net_gpio_leds = {
 
 static void __init d2net_gpio_leds_init(void)
 {
+        int err;
+
         /* Configure GPIO over MPP max number. */
         orion_gpio_set_valid(D2NET_GPIO_BLUE_LED_OFF, 1);
 
-        if (gpio_request(D2NET_GPIO_SATA0_ACT, "LED SATA0 activity") != 0)
-                return;
-        if (gpio_direction_output(D2NET_GPIO_SATA0_ACT, 1) != 0)
-                goto err_free_1;
-        if (gpio_request(D2NET_GPIO_SATA1_ACT, "LED SATA1 activity") != 0)
-                goto err_free_1;
-        if (gpio_direction_output(D2NET_GPIO_SATA1_ACT, 1) != 0)
-                goto err_free_2;
-        platform_device_register(&d2net_gpio_leds);
-        return;
+        /* Configure register blink_ctrl to allow SATA activity LED blinking. */
+        err = gpio_request(D2NET_GPIO_BLUE_LED_BLINK_CTRL, "blue LED blink");
+        if (err == 0) {
+                err = gpio_direction_output(D2NET_GPIO_BLUE_LED_BLINK_CTRL, 1);
+                if (err)
+                        gpio_free(D2NET_GPIO_BLUE_LED_BLINK_CTRL);
+        }
+        if (err)
+                pr_err("d2net: failed to configure blue LED blink GPIO\n");
 
-err_free_2:
-        gpio_free(D2NET_GPIO_SATA1_ACT);
-err_free_1:
-        gpio_free(D2NET_GPIO_SATA0_ACT);
-        return;
+        platform_device_register(&d2net_gpio_leds);
 }
 
 /****************************************************************************
@@ -289,8 +282,8 @@ static struct orion5x_mpp_mode d2net_mpp_modes[] __initdata = {
         { 11, MPP_UNUSED },
         { 12, MPP_GPIO },       /* SATA 1 power */
         { 13, MPP_UNUSED },
-        { 14, MPP_GPIO },       /* SATA 0 active */
-        { 15, MPP_GPIO },       /* SATA 1 active */
+        { 14, MPP_SATA_LED },   /* SATA 0 active */
+        { 15, MPP_SATA_LED },   /* SATA 1 active */
         { 16, MPP_GPIO },       /* Blue front LED blink control */
         { 17, MPP_UNUSED },
         { 18, MPP_GPIO },       /* Front button (0 = Released, 1 = Pushed ) */
@@ -301,6 +294,8 @@ static struct orion5x_mpp_mode d2net_mpp_modes[] __initdata = {
         /* 24: Inhibit board power off (0 = Disabled, 1 = Enabled) */
 };
 
+#define D2NET_GPIO_INHIBIT_POWER_OFF    24
+
 static void __init d2net_init(void)
 {
         /*
@@ -333,6 +328,8 @@ static void __init d2net_init(void)
 
         i2c_register_board_info(0, d2net_i2c_devices,
                                 ARRAY_SIZE(d2net_i2c_devices));
+
+        orion_gpio_set_valid(D2NET_GPIO_INHIBIT_POWER_OFF, 1);
 }
 
 /* Warning: LaCie use a wrong mach-type (0x20e=526) in their bootloader. */
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index 8f159db4d08..421b82f7c63 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -34,7 +34,8 @@
 #define DNS323_GPIO_LED_RIGHT_AMBER     1
 #define DNS323_GPIO_LED_LEFT_AMBER      2
 #define DNS323_GPIO_SYSTEM_UP           3
-#define DNS323_GPIO_LED_POWER           5
+#define DNS323_GPIO_LED_POWER1          4
+#define DNS323_GPIO_LED_POWER2          5
 #define DNS323_GPIO_OVERTEMP            6
 #define DNS323_GPIO_RTC                 7
 #define DNS323_GPIO_POWER_OFF           8
@@ -237,11 +238,31 @@ error_fail:
  * GPIO LEDs (simple - doesn't use hardware blinking support)
  */
 
+#define ORION_BLINK_HALF_PERIOD 100 /* ms */
+
+static int dns323_gpio_blink_set(unsigned gpio,
+        unsigned long *delay_on, unsigned long *delay_off)
+{
+        static int value = 0;
+
+        if (!*delay_on && !*delay_off)
+                *delay_on = *delay_off = ORION_BLINK_HALF_PERIOD;
+
+        if (ORION_BLINK_HALF_PERIOD == *delay_on
+            && ORION_BLINK_HALF_PERIOD == *delay_off) {
+                value = !value;
+                orion_gpio_set_blink(gpio, value);
+                return 0;
+        }
+
+        return -EINVAL;
+}
+
 static struct gpio_led dns323_leds[] = {
         {
                 .name = "power:blue",
-                .gpio = DNS323_GPIO_LED_POWER,
-                .default_state = LEDS_GPIO_DEFSTATE_ON,
+                .gpio = DNS323_GPIO_LED_POWER2,
+                .default_trigger = "timer",
         }, {
                 .name = "right:amber",
                 .gpio = DNS323_GPIO_LED_RIGHT_AMBER,
@@ -256,6 +277,7 @@ static struct gpio_led dns323_leds[] = {
 static struct gpio_led_platform_data dns323_led_data = {
         .num_leds       = ARRAY_SIZE(dns323_leds),
         .leds           = dns323_leds,
+        .gpio_blink_set = dns323_gpio_blink_set,
 };
 
 static struct platform_device dns323_gpio_leds = {
@@ -412,6 +434,14 @@ static void __init dns323_init(void)
         orion5x_setup_dev_boot_win(DNS323_NOR_BOOT_BASE, DNS323_NOR_BOOT_SIZE);
         platform_device_register(&dns323_nor_flash);
 
+        /* The 5181 power LED is active low and requires
+         * DNS323_GPIO_LED_POWER1 to also be low.
+         */
+        if (dns323_dev_id() == MV88F5181_DEV_ID) {
+                dns323_leds[0].active_low = 1;
+                gpio_direction_output(DNS323_GPIO_LED_POWER1, 0);
+        }
+
         platform_device_register(&dns323_gpio_leds);
 
         platform_device_register(&dns323_button_device);
diff --git a/arch/arm/mach-orion5x/ls_hgl-setup.c b/arch/arm/mach-orion5x/ls_hgl-setup.c
new file mode 100644
index 00000000000..8e569be6e2c
--- /dev/null
+++ b/arch/arm/mach-orion5x/ls_hgl-setup.c
@@ -0,0 +1,276 @@
+/*
+ * arch/arm/mach-orion5x/ls_hgl-setup.c
+ *
+ * Maintainer: Zhu Qingsen <zhuqs@cn.fujitsu.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/physmap.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/leds.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/i2c.h>
+#include <linux/ata_platform.h>
+#include <linux/gpio.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/system.h>
+#include <mach/orion5x.h>
+#include "common.h"
+#include "mpp.h"
+
+/*****************************************************************************
+ * Linkstation LS-HGL Info
+ ****************************************************************************/
+
+/*
+ * 256K NOR flash Device bus boot chip select
+ */
+
+#define LS_HGL_NOR_BOOT_BASE    0xf4000000
+#define LS_HGL_NOR_BOOT_SIZE    SZ_256K
+
+/*****************************************************************************
+ * 256KB NOR Flash on BOOT Device
+ ****************************************************************************/
+
+static struct physmap_flash_data ls_hgl_nor_flash_data = {
+        .width          = 1,
+};
+
+static struct resource ls_hgl_nor_flash_resource = {
+        .flags  = IORESOURCE_MEM,
+        .start  = LS_HGL_NOR_BOOT_BASE,
+        .end    = LS_HGL_NOR_BOOT_BASE + LS_HGL_NOR_BOOT_SIZE - 1,
+};
+
+static struct platform_device ls_hgl_nor_flash = {
+        .name                   = "physmap-flash",
+        .id                     = 0,
+        .dev            = {
+                .platform_data  = &ls_hgl_nor_flash_data,
+        },
+        .num_resources          = 1,
+        .resource               = &ls_hgl_nor_flash_resource,
+};
+
+/*****************************************************************************
+ * Ethernet
+ ****************************************************************************/
+
+static struct mv643xx_eth_platform_data ls_hgl_eth_data = {
+        .phy_addr       = 8,
+};
+
+/*****************************************************************************
+ * RTC 5C372a on I2C bus
+ ****************************************************************************/
+
+static struct i2c_board_info __initdata ls_hgl_i2c_rtc = {
+        I2C_BOARD_INFO("rs5c372a", 0x32),
+};
+
+/*****************************************************************************
+ * LEDs attached to GPIO
+ ****************************************************************************/
+
+#define LS_HGL_GPIO_LED_ALARM   2
+#define LS_HGL_GPIO_LED_INFO    3
+#define LS_HGL_GPIO_LED_FUNC    17
+#define LS_HGL_GPIO_LED_PWR     0
+
+
+static struct gpio_led ls_hgl_led_pins[] = {
+        {
+                .name      = "alarm:red",
+                .gpio      = LS_HGL_GPIO_LED_ALARM,
+                .active_low     = 1,
+        }, {
+                .name      = "info:amber",
+                .gpio      = LS_HGL_GPIO_LED_INFO,
+                .active_low     = 1,
+        }, {
+                .name      = "func:blue:top",
+                .gpio      = LS_HGL_GPIO_LED_FUNC,
+                .active_low     = 1,
+        }, {
+                .name      = "power:blue:bottom",
+                .gpio      = LS_HGL_GPIO_LED_PWR,
+        },
+};
+
+static struct gpio_led_platform_data ls_hgl_led_data = {
+        .leds      = ls_hgl_led_pins,
+        .num_leds       = ARRAY_SIZE(ls_hgl_led_pins),
+};
+
+static struct platform_device ls_hgl_leds = {
+        .name   = "leds-gpio",
+        .id     = -1,
+        .dev    = {
+                .platform_data  = &ls_hgl_led_data,
+        },
+};
+
+/****************************************************************************
+ * GPIO Attached Keys
+ ****************************************************************************/
+#define LS_HGL_GPIO_KEY_FUNC       15
+#define LS_HGL_GPIO_KEY_POWER      8
+#define LS_HGL_GPIO_KEY_AUTOPOWER  10
+
+#define LS_HGL_SW_POWER     0x00
+#define LS_HGL_SW_AUTOPOWER 0x01
+
+static struct gpio_keys_button ls_hgl_buttons[] = {
+        {
+                .code      = KEY_OPTION,
+                .gpio      = LS_HGL_GPIO_KEY_FUNC,
+                .desc      = "Function Button",
+                .active_low     = 1,
+        }, {
+                .type           = EV_SW,
+                .code      = LS_HGL_SW_POWER,
+                .gpio      = LS_HGL_GPIO_KEY_POWER,
+                .desc      = "Power-on Switch",
+                .active_low     = 1,
+        }, {
+                .type           = EV_SW,
+                .code      = LS_HGL_SW_AUTOPOWER,
+                .gpio      = LS_HGL_GPIO_KEY_AUTOPOWER,
+                .desc      = "Power-auto Switch",
+                .active_low     = 1,
+        },
+};
+
+static struct gpio_keys_platform_data ls_hgl_button_data = {
+        .buttons        = ls_hgl_buttons,
+        .nbuttons       = ARRAY_SIZE(ls_hgl_buttons),
+};
+
+static struct platform_device ls_hgl_button_device = {
+        .name      = "gpio-keys",
+        .id          = -1,
+        .num_resources  = 0,
+        .dev        = {
+                .platform_data  = &ls_hgl_button_data,
+        },
+};
+
+
+/*****************************************************************************
+ * SATA
+ ****************************************************************************/
+static struct mv_sata_platform_data ls_hgl_sata_data = {
+        .n_ports        = 2,
+};
+
+
+/*****************************************************************************
+ * Linkstation LS-HGL specific power off method: reboot
+ ****************************************************************************/
+/*
+ * On the Linkstation LS-HGL, the shutdown process is following:
+ * - Userland monitors key events until the power switch goes to off position
+ * - The board reboots
+ * - U-boot starts and goes into an idle mode waiting for the user
+ *   to move the switch to ON position
+ */
+
+static void ls_hgl_power_off(void)
+{
+        arm_machine_restart('h', NULL);
+}
+
+
+/*****************************************************************************
+ * General Setup
+ ****************************************************************************/
+
+#define LS_HGL_GPIO_USB_POWER   9
+#define LS_HGL_GPIO_AUTO_POWER  10
+#define LS_HGL_GPIO_POWER           8
+
+#define LS_HGL_GPIO_HDD_POWER   1
+
+static struct orion5x_mpp_mode ls_hgl_mpp_modes[] __initdata = {
+        {  0, MPP_GPIO }, /* LED_PWR */
+        {  1, MPP_GPIO }, /* HDD_PWR */
+        {  2, MPP_GPIO }, /* LED_ALARM */
+        {  3, MPP_GPIO }, /* LED_INFO */
+        {  4, MPP_UNUSED },
+        {  5, MPP_UNUSED },
+        {  6, MPP_GPIO }, /* FAN_LCK */
+        {  7, MPP_GPIO }, /* INIT */
+        {  8, MPP_GPIO }, /* POWER */
+        {  9, MPP_GPIO }, /* USB_PWR */
+        { 10, MPP_GPIO }, /* AUTO_POWER */
+        { 11, MPP_UNUSED }, /* LED_ETH (dummy) */
+        { 12, MPP_UNUSED },
+        { 13, MPP_UNUSED },
+        { 14, MPP_UNUSED },
+        { 15, MPP_GPIO }, /* FUNC */
+        { 16, MPP_UNUSED },
+        { 17, MPP_GPIO }, /* LED_FUNC */
+        { 18, MPP_UNUSED },
+        { 19, MPP_UNUSED },
+        { -1 },
+};
+
+static void __init ls_hgl_init(void)
+{
+        /*
+         * Setup basic Orion functions. Need to be called early.
+         */
+        orion5x_init();
+
+        orion5x_mpp_conf(ls_hgl_mpp_modes);
+
+        /*
+         * Configure peripherals.
+         */
+        orion5x_ehci0_init();
+        orion5x_ehci1_init();
+        orion5x_eth_init(&ls_hgl_eth_data);
+        orion5x_i2c_init();
+        orion5x_sata_init(&ls_hgl_sata_data);
+        orion5x_uart0_init();
+        orion5x_xor_init();
+
+        orion5x_setup_dev_boot_win(LS_HGL_NOR_BOOT_BASE,
+                                   LS_HGL_NOR_BOOT_SIZE);
+        platform_device_register(&ls_hgl_nor_flash);
+
+        platform_device_register(&ls_hgl_button_device);
+
+        platform_device_register(&ls_hgl_leds);
+
+        i2c_register_board_info(0, &ls_hgl_i2c_rtc, 1);
+
+        /* enable USB power */
+        gpio_set_value(LS_HGL_GPIO_USB_POWER, 1);
+
+        /* register power-off method */
+        pm_power_off = ls_hgl_power_off;
+
+        pr_info("%s: finished\n", __func__);
+}
+
+MACHINE_START(LINKSTATION_LS_HGL, "Buffalo Linkstation LS-HGL")
+        /* Maintainer: Zhu Qingsen <zhuqs@cn.fujistu.com> */
+        .phys_io        = ORION5X_REGS_PHYS_BASE,
+        .io_pg_offst    = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
+        .boot_params    = 0x00000100,
+        .init_machine   = ls_hgl_init,
+        .map_io         = orion5x_map_io,
+        .init_irq       = orion5x_init_irq,
+        .timer          = &orion5x_timer,
+        .fixup          = tag_fixup_mem32,
+MACHINE_END
diff --git a/arch/arm/mach-orion5x/lsmini-setup.c b/arch/arm/mach-orion5x/lsmini-setup.c
index c9bf6b81a80..c704f056de1 100644
--- a/arch/arm/mach-orion5x/lsmini-setup.c
+++ b/arch/arm/mach-orion5x/lsmini-setup.c
@@ -11,7 +11,6 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/pci.h>
 #include <linux/mtd/physmap.h>
 #include <linux/mv643xx_eth.h>
 #include <linux/leds.h>
@@ -19,12 +18,13 @@
 #include <linux/input.h>
 #include <linux/i2c.h>
 #include <linux/ata_platform.h>
-#include <asm/mach-types.h>
 #include <linux/gpio.h>
+#include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include <asm/system.h>
+#include <mach/orion5x.h>
 #include "common.h"
 #include "mpp.h"
-#include "include/mach/system.h"
 
 /*****************************************************************************
  * Linkstation Mini Info
@@ -186,7 +186,7 @@ static struct mv_sata_platform_data lsmini_sata_data = {
 
 static void lsmini_power_off(void)
 {
-        arch_reset(0, NULL);
+        arm_machine_restart('h', NULL);
 }
 
 
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index bdf96eb523b..e8706f15a67 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -12,6 +12,7 @@
 
 #include <linux/kernel.h>
 #include <linux/pci.h>
+#include <linux/slab.h>
 #include <linux/mbus.h>
 #include <asm/irq.h>
 #include <asm/mach/pci.h>
diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
index cb0feca193d..f9f222ebb7e 100644
--- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c
+++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
@@ -77,7 +77,7 @@ static struct gpio_keys_button wrt350n_v2_buttons[] = {
                 .desc           = "Reset Button",
                 .active_low     = 1,
         }, {
-                .code           = KEY_WLAN,
+                .code           = KEY_WPS_BUTTON,
                 .gpio           = 2,
                 .desc           = "WPS Button",
                 .active_low     = 1,
diff --git a/arch/arm/mach-pnx4008/dma.c b/arch/arm/mach-pnx4008/dma.c
index 425f7188505..7fa4bf2e212 100644
--- a/arch/arm/mach-pnx4008/dma.c
+++ b/arch/arm/mach-pnx4008/dma.c
@@ -22,6 +22,7 @@
 #include <linux/dma-mapping.h>
 #include <linux/clk.h>
 #include <linux/io.h>
+#include <linux/gfp.h>
 
 #include <asm/system.h>
 #include <mach/hardware.h>
diff --git a/arch/arm/mach-pnx4008/pm.c b/arch/arm/mach-pnx4008/pm.c
index 1f0585329be..ee3c29c57ae 100644
--- a/arch/arm/mach-pnx4008/pm.c
+++ b/arch/arm/mach-pnx4008/pm.c
@@ -19,6 +19,7 @@
 #include <linux/delay.h>
 #include <linux/clk.h>
 #include <linux/io.h>
+#include <linux/slab.h>
 
 #include <asm/cacheflush.h>
 
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index dee92182749..5b6ee46fa7f 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -115,6 +115,11 @@ config MACH_CM_X300
         select CPU_PXA310
         select HAVE_PWM
 
+config MACH_CAPC7117
+        bool "Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM"
+        select CPU_PXA320
+        select PXA3xx
+
 config ARCH_GUMSTIX
         bool "Gumstix XScale 255 boards"
         select PXA25x
@@ -267,7 +272,6 @@ config MACH_H5000
 config MACH_HIMALAYA
         bool "HTC Himalaya Support"
         select CPU_PXA26x
-        select FB_W100
 
 config MACH_MAGICIAN
         bool "Enable HTC Magician Support"
@@ -417,6 +421,24 @@ config MACH_TREO680
           Say Y here if you intend to run this kernel on Palm Treo 680
           smartphone.
 
+config MACH_RAUMFELD_RC
+        bool "Raumfeld Controller"
+        select PXA3xx
+        select CPU_PXA300
+        select HAVE_PWM
+
+config MACH_RAUMFELD_CONNECTOR
+        bool "Raumfeld Connector"
+        select PXA3xx
+        select CPU_PXA300
+        select PXA_SSP
+
+config MACH_RAUMFELD_SPEAKER
+        bool "Raumfeld Speaker"
+        select PXA3xx
+        select CPU_PXA300
+        select PXA_SSP
+
 config PXA_SHARPSL
         bool "SHARP Zaurus SL-5600, SL-C7xx and SL-Cxx00 Models"
         select SHARP_SCOOP
@@ -431,10 +453,18 @@ config PXA_SHARPSL
 config SHARPSL_PM
         bool
         select APM_EMULATION
+        select SHARPSL_PM_MAX1111
+
+config SHARPSL_PM_MAX1111
+        bool
+        depends on !CORGI_SSP_DEPRECATED
+        select HWMON
+        select SENSORS_MAX1111
 
 config CORGI_SSP_DEPRECATED
         bool
         select PXA_SSP
+        select PXA_SSP_LEGACY
         help
           This option will include corgi_ssp.c and corgi_lcd.c
           that corgi_ts.c and other legacy drivers (corgi_bl.c
@@ -446,6 +476,7 @@ config MACH_POODLE
         select PXA25x
         select SHARP_LOCOMO
         select PXA_SSP
+        select PXA_HAVE_BOARD_IRQS
 
 config MACH_CORGI
         bool "Enable Sharp SL-C700 (Corgi) Support"
@@ -492,6 +523,11 @@ config MACH_TOSA
         select PXA25x
         select PXA_HAVE_BOARD_IRQS
 
+config MACH_ICONTROL
+        bool "TMT iControl/SafeTCam based on the MXM-8x10 CoM"
+        select CPU_PXA320
+        select PXA3xx
+
 config ARCH_PXA_ESERIES
         bool "PXA based Toshiba e-series PDAs"
         select PXA25x
@@ -517,7 +553,6 @@ config MACH_E740
         bool "Toshiba e740"
         default y
         depends on ARCH_PXA_ESERIES
-        select FB_W100
         help
           Say Y here if you intend to run this kernel on a Toshiba
           e740 family PDA.
@@ -526,7 +561,6 @@ config MACH_E750
         bool "Toshiba e750"
         default y
         depends on ARCH_PXA_ESERIES
-        select FB_W100
         help
           Say Y here if you intend to run this kernel on a Toshiba
           e750 family PDA.
@@ -543,7 +577,6 @@ config MACH_E800
         bool "Toshiba e800"
         default y
         depends on ARCH_PXA_ESERIES
-        select FB_W100
         help
           Say Y here if you intend to run this kernel on a Toshiba
           e800 family PDA.
@@ -629,6 +662,11 @@ config PXA_SSP
         help
           Enable support for PXA2xx SSP ports
 
+config PXA_SSP_LEGACY
+        bool
+        help
+          Support of legacy SSP API
+
 config TOSA_BT
         tristate "Control the state of built-in bluetooth chip on Sharp SL-6000"
         depends on MACH_TOSA
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index f64afda7e6f..86bc87b7f2d 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -48,6 +48,7 @@ obj-$(CONFIG_MACH_ARMCORE)	+= cm-x2xx-pci.o
 endif
 obj-$(CONFIG_MACH_EM_X270)      += em-x270.o
 obj-$(CONFIG_MACH_CM_X300)      += cm-x300.o
+obj-$(CONFIG_MACH_CAPC7117)     += capc7117.o mxm8x10.o
 obj-$(CONFIG_ARCH_GUMSTIX)      += gumstix.o
 obj-$(CONFIG_GUMSTIX_AM200EPD)  += am200epd.o
 obj-$(CONFIG_GUMSTIX_AM300EPD)  += am300epd.o
@@ -82,6 +83,7 @@ obj-$(CONFIG_PXA_SHARP_Cxx00)	+= spitz.o sharpsl_pm.o spitz_pm.o
 obj-$(CONFIG_CORGI_SSP_DEPRECATED)      += corgi_ssp.o corgi_lcd.o
 obj-$(CONFIG_MACH_POODLE)       += poodle.o
 obj-$(CONFIG_MACH_TOSA)         += tosa.o
+obj-$(CONFIG_MACH_ICONTROL)     += icontrol.o mxm8x10.o
 obj-$(CONFIG_ARCH_PXA_ESERIES)  += eseries.o
 obj-$(CONFIG_MACH_E330)         += e330.o
 obj-$(CONFIG_MACH_E350)         += e350.o
@@ -89,6 +91,9 @@ obj-$(CONFIG_MACH_E740)		+= e740.o
 obj-$(CONFIG_MACH_E750)         += e750.o
 obj-$(CONFIG_MACH_E400)         += e400.o
 obj-$(CONFIG_MACH_E800)         += e800.o
+obj-$(CONFIG_MACH_RAUMFELD_RC)          += raumfeld.o
+obj-$(CONFIG_MACH_RAUMFELD_CONNECTOR)   += raumfeld.o
+obj-$(CONFIG_MACH_RAUMFELD_SPEAKER)     += raumfeld.o
 
 # Support for blinky lights
 led-y := leds.o
diff --git a/arch/arm/mach-pxa/am300epd.c b/arch/arm/mach-pxa/am300epd.c
index 4bd10a17332..993d75e6639 100644
--- a/arch/arm/mach-pxa/am300epd.c
+++ b/arch/arm/mach-pxa/am300epd.c
@@ -288,7 +288,7 @@ int __init am300_init(void)
 }
 
 module_param(panel_type, uint, 0);
-MODULE_PARM_DESC(panel_type, "Select the panel type: 6, 8, 97");
+MODULE_PARM_DESC(panel_type, "Select the panel type: 37, 6, 97");
 
 MODULE_DESCRIPTION("board driver for am300 epd kit");
 MODULE_AUTHOR("Jaya Kumar");
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index b8cd07ca938..f3b5ace815e 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -132,6 +132,14 @@ static void __init balloon3_init_irq(void)
                 "enabled\n", __func__, BALLOON3_AUX_NIRQ);
 }
 
+static unsigned long balloon3_ac97_pin_config[] = {
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+        GPIO113_AC97_nRESET,
+};
+
 static void balloon3_backlight_power(int on)
 {
         pr_debug("%s: power is %s\n", __func__, on ? "on" : "off");
@@ -140,26 +148,7 @@ static void balloon3_backlight_power(int on)
 
 static unsigned long balloon3_lcd_pin_config[] = {
         /* LCD - 16bpp Active TFT */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         GPIO99_GPIO,            /* Backlight */
 };
@@ -311,8 +300,10 @@ static void __init balloon3_init(void)
         pxa_set_stuart_info(NULL);
 
         pxa_set_i2c_info(NULL);
-        if (balloon3_has(BALLOON3_FEATURE_AUDIO))
+        if (balloon3_has(BALLOON3_FEATURE_AUDIO)) {
+                pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_ac97_pin_config));
                 pxa_set_ac97_info(NULL);
+        }
 
         if (balloon3_has(BALLOON3_FEATURE_TOPPOLY)) {
                 pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_lcd_pin_config));
diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c
new file mode 100644
index 00000000000..aae544631a8
--- /dev/null
+++ b/arch/arm/mach-pxa/capc7117.c
@@ -0,0 +1,158 @@
+/*
+ * linux/arch/arm/mach-pxa/capc7117.c
+ *
+ * Support for the Embedian CAPC-7117 Evaluation Kit
+ * based on the Embedian MXM-8x10 Computer on Module
+ *
+ * Copyright (C) 2009 Embedian Inc.
+ * Copyright (C) 2009 TMT Services & Supplies (Pty) Ltd.
+ *
+ * 2007-09-04: eric miao <eric.y.miao@gmail.com>
+ *             rewrite to align with latest kernel
+ *
+ * 2010-01-09: Edwin Peer <epeer@tmtservices.co.za>
+ *             Hennie van der Merwe <hvdmerwe@tmtservices.co.za>
+ *             rework for upstream merge
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/ata_platform.h>
+#include <linux/serial_8250.h>
+#include <linux/gpio.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#include <mach/pxa320.h>
+#include <mach/mxm8x10.h>
+
+#include "generic.h"
+
+/* IDE (PATA) Support */
+static struct pata_platform_info pata_platform_data = {
+        .ioport_shift = 1
+};
+
+static struct resource capc7117_ide_resources[] = {
+        [0] = {
+               .start = 0x11000020,
+               .end = 0x1100003f,
+               .flags = IORESOURCE_MEM
+        },
+        [1] = {
+               .start = 0x1100001c,
+               .end = 0x1100001c,
+               .flags = IORESOURCE_MEM
+        },
+        [2] = {
+               .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO76)),
+               .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO76)),
+               .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING
+        }
+};
+
+static struct platform_device capc7117_ide_device = {
+        .name = "pata_platform",
+        .num_resources = ARRAY_SIZE(capc7117_ide_resources),
+        .resource = capc7117_ide_resources,
+        .dev = {
+                .platform_data = &pata_platform_data,
+                .coherent_dma_mask = ~0         /* grumble */
+        }
+};
+
+static void __init capc7117_ide_init(void)
+{
+        platform_device_register(&capc7117_ide_device);
+}
+
+/* TI16C752 UART support */
+#define TI16C752_FLAGS          (UPF_BOOT_AUTOCONF | \
+                                        UPF_IOREMAP | \
+                                        UPF_BUGGY_UART | \
+                                        UPF_SKIP_TEST)
+#define TI16C752_UARTCLK        (22118400)
+static struct plat_serial8250_port ti16c752_platform_data[] = {
+        [0] = {
+               .mapbase = 0x14000000,
+               .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO78)),
+               .irqflags = IRQF_TRIGGER_RISING,
+               .flags = TI16C752_FLAGS,
+               .iotype = UPIO_MEM,
+               .regshift = 1,
+               .uartclk = TI16C752_UARTCLK
+        },
+        [1] = {
+               .mapbase = 0x14000040,
+               .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO79)),
+               .irqflags = IRQF_TRIGGER_RISING,
+               .flags = TI16C752_FLAGS,
+               .iotype = UPIO_MEM,
+               .regshift = 1,
+               .uartclk = TI16C752_UARTCLK
+        },
+        [2] = {
+               .mapbase = 0x14000080,
+               .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO80)),
+               .irqflags = IRQF_TRIGGER_RISING,
+               .flags = TI16C752_FLAGS,
+               .iotype = UPIO_MEM,
+               .regshift = 1,
+               .uartclk = TI16C752_UARTCLK
+        },
+        [3] = {
+               .mapbase = 0x140000c0,
+               .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO81)),
+               .irqflags = IRQF_TRIGGER_RISING,
+               .flags = TI16C752_FLAGS,
+               .iotype = UPIO_MEM,
+               .regshift = 1,
+               .uartclk = TI16C752_UARTCLK
+        },
+        [4] = {
+               /* end of array */
+        }
+};
+
+static struct platform_device ti16c752_device = {
+        .name = "serial8250",
+        .id = PLAT8250_DEV_PLATFORM,
+        .dev = {
+                .platform_data = ti16c752_platform_data
+        }
+};
+
+static void __init capc7117_uarts_init(void)
+{
+        platform_device_register(&ti16c752_device);
+}
+
+static void __init capc7117_init(void)
+{
+        /* Init CoM */
+        mxm_8x10_barebones_init();
+
+        /* Init evaluation board peripherals */
+        mxm_8x10_ac97_init();
+        mxm_8x10_usb_host_init();
+        mxm_8x10_mmc_init();
+
+        capc7117_uarts_init();
+        capc7117_ide_init();
+}
+
+MACHINE_START(CAPC7117,
+              "Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM")
+        .phys_io = 0x40000000,
+        .boot_params = 0xa0000100,
+        .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .map_io = pxa_map_io,
+        .init_irq = pxa3xx_init_irq,
+        .timer = &pxa_timer,
+        .init_machine = capc7117_init
+MACHINE_END
diff --git a/arch/arm/mach-pxa/cm-x255.c b/arch/arm/mach-pxa/cm-x255.c
index 253fd76142d..f1a7703d771 100644
--- a/arch/arm/mach-pxa/cm-x255.c
+++ b/arch/arm/mach-pxa/cm-x255.c
@@ -50,26 +50,7 @@ static unsigned long cmx255_pin_config[] = {
         GPIO47_STUART_TXD,
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* SSP1 */
         GPIO23_SSP1_SCLK,
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c
index eea78b6c2bc..a9926bb7592 100644
--- a/arch/arm/mach-pxa/cm-x270.c
+++ b/arch/arm/mach-pxa/cm-x270.c
@@ -71,26 +71,7 @@ static unsigned long cmx270_pin_config[] = {
         GPIO111_MMC_DAT_3,
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* I2C */
         GPIO117_I2C_SCL,
@@ -195,33 +176,57 @@ static struct resource cmx270_2700G_resource[] = {
         },
 };
 
-static unsigned long save_lcd_regs[10];
+static unsigned long cmx270_marathon_on[] = {
+        GPIO58_GPIO,
+        GPIO59_GPIO,
+        GPIO60_GPIO,
+        GPIO61_GPIO,
+        GPIO62_GPIO,
+        GPIO63_GPIO,
+        GPIO64_GPIO,
+        GPIO65_GPIO,
+        GPIO66_GPIO,
+        GPIO67_GPIO,
+        GPIO68_GPIO,
+        GPIO69_GPIO,
+        GPIO70_GPIO,
+        GPIO71_GPIO,
+        GPIO72_GPIO,
+        GPIO73_GPIO,
+        GPIO74_GPIO,
+        GPIO75_GPIO,
+        GPIO76_GPIO,
+        GPIO77_GPIO,
+};
+
+static unsigned long cmx270_marathon_off[] = {
+        GPIOxx_LCD_TFT_16BPP,
+};
 
 static int cmx270_marathon_probe(struct fb_info *fb)
 {
-        /* save PXA-270 pin settings before enabling 2700G */
-        save_lcd_regs[0] = GPDR1;
-        save_lcd_regs[1] = GPDR2;
-        save_lcd_regs[2] = GAFR1_U;
-        save_lcd_regs[3] = GAFR2_L;
-        save_lcd_regs[4] = GAFR2_U;
-
-        /* Disable PXA-270 on-chip controller driving pins */
-        GPDR1 &= ~(0xfc000000);
-        GPDR2 &= ~(0x00c03fff);
-        GAFR1_U &= ~(0xfff00000);
-        GAFR2_L &= ~(0x0fffffff);
-        GAFR2_U &= ~(0x0000f000);
+        int gpio, err;
+
+        for (gpio = 58; gpio <= 77; gpio++) {
+                err = gpio_request(gpio, "LCD");
+                if (err)
+                        return err;
+                gpio_direction_input(gpio);
+        }
+
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_marathon_on));
         return 0;
 }
 
 static int cmx270_marathon_remove(struct fb_info *fb)
 {
-        GPDR1 =   save_lcd_regs[0];
-        GPDR2 =   save_lcd_regs[1];
-        GAFR1_U = save_lcd_regs[2];
-        GAFR2_L = save_lcd_regs[3];
-        GAFR2_U = save_lcd_regs[4];
+        int gpio;
+
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_marathon_off));
+
+        for (gpio = 58; gpio <= 77; gpio++)
+                gpio_free(gpio);
+
         return 0;
 }
 
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c
index 7873fa3d8fa..161fc2d6120 100644
--- a/arch/arm/mach-pxa/cm-x2xx-pci.c
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.c
@@ -59,7 +59,7 @@ void __init cmx2xx_pci_adjust_zones(int node, unsigned long *zone_size,
 static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
 {
         /* clear our parent irq */
-        GEDR(cmx2xx_it8152_irq_gpio) = GPIO_bit(cmx2xx_it8152_irq_gpio);
+        desc->chip->ack(irq);
 
         it8152_irq_demux(irq, desc);
 }
diff --git a/arch/arm/mach-pxa/corgi_ssp.c b/arch/arm/mach-pxa/corgi_ssp.c
index a5ee70735e0..9347254f8bc 100644
--- a/arch/arm/mach-pxa/corgi_ssp.c
+++ b/arch/arm/mach-pxa/corgi_ssp.c
@@ -13,7 +13,6 @@
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/sched.h>
-#include <linux/slab.h>
 #include <linux/delay.h>
 #include <linux/platform_device.h>
 #include <mach/hardware.h>
@@ -204,7 +203,7 @@ void __init corgi_ssp_set_machinfo(struct corgissp_machinfo *machinfo)
         ssp_machinfo = machinfo;
 }
 
-static int __init corgi_ssp_probe(struct platform_device *dev)
+static int __devinit corgi_ssp_probe(struct platform_device *dev)
 {
         int ret;
 
diff --git a/arch/arm/mach-pxa/cpufreq-pxa3xx.c b/arch/arm/mach-pxa/cpufreq-pxa3xx.c
index 149cdd9aee4..27fa329d9a8 100644
--- a/arch/arm/mach-pxa/cpufreq-pxa3xx.c
+++ b/arch/arm/mach-pxa/cpufreq-pxa3xx.c
@@ -14,6 +14,7 @@
 #include <linux/sched.h>
 #include <linux/init.h>
 #include <linux/cpufreq.h>
+#include <linux/slab.h>
 
 #include <mach/pxa3xx-regs.h>
 
diff --git a/arch/arm/mach-pxa/e740.c b/arch/arm/mach-pxa/e740.c
index 94b23a9e387..d578021d1a1 100644
--- a/arch/arm/mach-pxa/e740.c
+++ b/arch/arm/mach-pxa/e740.c
@@ -134,6 +134,12 @@ static unsigned long e740_pin_config[] __initdata = {
         /* IrDA */
         GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
 
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+
         /* Audio power control */
         GPIO16_GPIO,  /* AC97 codec AVDD2 supply (analogue power) */
         GPIO40_GPIO,  /* Mic amp power */
diff --git a/arch/arm/mach-pxa/e750.c b/arch/arm/mach-pxa/e750.c
index 5eccbce73a3..af83caa52dd 100644
--- a/arch/arm/mach-pxa/e750.c
+++ b/arch/arm/mach-pxa/e750.c
@@ -132,6 +132,12 @@ static unsigned long e750_pin_config[] __initdata = {
         /* IrDA */
         GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
 
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+
         /* Audio power control */
         GPIO4_GPIO,  /* Headphone amp power */
         GPIO7_GPIO,  /* Speaker amp power */
diff --git a/arch/arm/mach-pxa/e800.c b/arch/arm/mach-pxa/e800.c
index aad129bed19..8ea97bf53fe 100644
--- a/arch/arm/mach-pxa/e800.c
+++ b/arch/arm/mach-pxa/e800.c
@@ -35,6 +35,14 @@
 
 /* ------------------------ e800 LCD definitions ------------------------- */
 
+static unsigned long e800_pin_config[] __initdata = {
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+};
+
 static struct w100_gen_regs e800_lcd_regs = {
         .lcd_format =            0x00008003,
         .lcdd_cntl1 =            0x02a00000,
@@ -195,6 +203,7 @@ static struct platform_device *devices[] __initdata = {
 
 static void __init e800_init(void)
 {
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(e800_pin_config));
         pxa_set_ffuart_info(NULL);
         pxa_set_btuart_info(NULL);
         pxa_set_stuart_info(NULL);
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index c8a01bc85fd..aab04f33e49 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -109,26 +109,7 @@ static unsigned long common_pin_config[] = {
         GPIO111_MMC_DAT_3,
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* QCI */
         GPIO84_CIF_FV,
diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c
new file mode 100644
index 00000000000..771137fc1a8
--- /dev/null
+++ b/arch/arm/mach-pxa/icontrol.c
@@ -0,0 +1,202 @@
+/*
+ * linux/arch/arm/mach-pxa/icontrol.c
+ *
+ * Support for the iControl and SafeTcam platforms from TMT Services
+ * using the Embedian MXM-8x10 Computer on Module
+ *
+ * Copyright (C) 2009 TMT Services & Supplies (Pty) Ltd.
+ *
+ * 2010-01-21 Hennie van der Merve <hvdmerwe@tmtservies.co.za>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#include <mach/pxa320.h>
+#include <mach/mxm8x10.h>
+
+#include <linux/spi/spi.h>
+#include <mach/pxa2xx_spi.h>
+#include <linux/can/platform/mcp251x.h>
+
+#include "generic.h"
+
+#define ICONTROL_MCP251x_nCS1   (15)
+#define ICONTROL_MCP251x_nCS2   (16)
+#define ICONTROL_MCP251x_nCS3   (17)
+#define ICONTROL_MCP251x_nCS4   (24)
+
+#define ICONTROL_MCP251x_nIRQ1  (74)
+#define ICONTROL_MCP251x_nIRQ2  (75)
+#define ICONTROL_MCP251x_nIRQ3  (76)
+#define ICONTROL_MCP251x_nIRQ4  (77)
+
+static struct pxa2xx_spi_chip mcp251x_chip_info1 = {
+        .tx_threshold   = 8,
+        .rx_threshold   = 128,
+        .dma_burst_size = 8,
+        .timeout        = 235,
+        .gpio_cs        = ICONTROL_MCP251x_nCS1
+};
+
+static struct pxa2xx_spi_chip mcp251x_chip_info2 = {
+        .tx_threshold   = 8,
+        .rx_threshold   = 128,
+        .dma_burst_size = 8,
+        .timeout        = 235,
+        .gpio_cs        = ICONTROL_MCP251x_nCS2
+};
+
+static struct pxa2xx_spi_chip mcp251x_chip_info3 = {
+        .tx_threshold   = 8,
+        .rx_threshold   = 128,
+        .dma_burst_size = 8,
+        .timeout        = 235,
+        .gpio_cs        = ICONTROL_MCP251x_nCS3
+};
+
+static struct pxa2xx_spi_chip mcp251x_chip_info4 = {
+        .tx_threshold   = 8,
+        .rx_threshold   = 128,
+        .dma_burst_size = 8,
+        .timeout        = 235,
+        .gpio_cs        = ICONTROL_MCP251x_nCS4
+};
+
+static struct mcp251x_platform_data mcp251x_info = {
+        .oscillator_frequency = 16E6,
+        .model                = CAN_MCP251X_MCP2515,
+        .board_specific_setup = NULL,
+        .power_enable         = NULL,
+        .transceiver_enable   = NULL
+};
+
+static struct spi_board_info mcp251x_board_info[] = {
+        {
+                .modalias        = "mcp251x",
+                .max_speed_hz    = 6500000,
+                .bus_num         = 3,
+                .chip_select     = 0,
+                .platform_data   = &mcp251x_info,
+                .controller_data = &mcp251x_chip_info1,
+                .irq             = gpio_to_irq(ICONTROL_MCP251x_nIRQ1)
+        },
+        {
+                .modalias        = "mcp251x",
+                .max_speed_hz    = 6500000,
+                .bus_num         = 3,
+                .chip_select     = 1,
+                .platform_data   = &mcp251x_info,
+                .controller_data = &mcp251x_chip_info2,
+                .irq             = gpio_to_irq(ICONTROL_MCP251x_nIRQ2)
+        },
+        {
+                .modalias        = "mcp251x",
+                .max_speed_hz    = 6500000,
+                .bus_num         = 4,
+                .chip_select     = 0,
+                .platform_data   = &mcp251x_info,
+                .controller_data = &mcp251x_chip_info3,
+                .irq             = gpio_to_irq(ICONTROL_MCP251x_nIRQ3)
+        },
+        {
+                .modalias        = "mcp251x",
+                .max_speed_hz    = 6500000,
+                .bus_num         = 4,
+                .chip_select     = 1,
+                .platform_data   = &mcp251x_info,
+                .controller_data = &mcp251x_chip_info4,
+                .irq             = gpio_to_irq(ICONTROL_MCP251x_nIRQ4)
+        }
+};
+
+static struct pxa2xx_spi_master pxa_ssp3_spi_master_info = {
+        .clock_enable   = CKEN_SSP3,
+        .num_chipselect = 2,
+        .enable_dma     = 1
+};
+
+static struct pxa2xx_spi_master pxa_ssp4_spi_master_info = {
+        .clock_enable   = CKEN_SSP4,
+        .num_chipselect = 2,
+        .enable_dma     = 1
+};
+
+struct platform_device pxa_spi_ssp3 = {
+        .name          = "pxa2xx-spi",
+        .id            = 3,
+        .dev           = {
+                .platform_data = &pxa_ssp3_spi_master_info,
+        }
+};
+
+struct platform_device pxa_spi_ssp4 = {
+        .name          = "pxa2xx-spi",
+        .id            = 4,
+        .dev           = {
+                .platform_data = &pxa_ssp4_spi_master_info,
+        }
+};
+
+static struct platform_device *icontrol_spi_devices[] __initdata = {
+        &pxa_spi_ssp3,
+        &pxa_spi_ssp4,
+};
+
+static mfp_cfg_t mfp_can_cfg[] __initdata = {
+        /* CAN CS lines */
+        GPIO15_GPIO,
+        GPIO16_GPIO,
+        GPIO17_GPIO,
+        GPIO24_GPIO,
+
+        /* SPI (SSP3) lines */
+        GPIO89_SSP3_SCLK,
+        GPIO91_SSP3_TXD,
+        GPIO92_SSP3_RXD,
+
+        /* SPI (SSP4) lines */
+        GPIO93_SSP4_SCLK,
+        GPIO95_SSP4_TXD,
+        GPIO96_SSP4_RXD,
+
+        /* CAN nIRQ lines */
+        GPIO74_GPIO | MFP_LPM_EDGE_RISE,
+        GPIO75_GPIO | MFP_LPM_EDGE_RISE,
+        GPIO76_GPIO | MFP_LPM_EDGE_RISE,
+        GPIO77_GPIO | MFP_LPM_EDGE_RISE
+};
+
+static void __init icontrol_can_init(void)
+{
+        pxa3xx_mfp_config(ARRAY_AND_SIZE(mfp_can_cfg));
+        platform_add_devices(ARRAY_AND_SIZE(icontrol_spi_devices));
+        spi_register_board_info(ARRAY_AND_SIZE(mcp251x_board_info));
+}
+
+static void __init icontrol_init(void)
+{
+        mxm_8x10_barebones_init();
+        mxm_8x10_usb_host_init();
+        mxm_8x10_mmc_init();
+
+        icontrol_can_init();
+}
+
+MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM")
+        .phys_io        = 0x40000000,
+        .boot_params    = 0xa0000100,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa3xx_init_irq,
+        .timer          = &pxa_timer,
+        .init_machine   = icontrol_init
+MACHINE_END
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index 5c9e11d74f4..bc78c4dc0c6 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -47,25 +47,7 @@
 
 static unsigned long idp_pin_config[] __initdata = {
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
+        GPIOxx_LCD_DSTN_16BPP,
 
         /* BTUART */
         GPIO42_BTUART_RXD,
diff --git a/arch/arm/mach-pxa/imote2.c b/arch/arm/mach-pxa/imote2.c
index 5b0862df61a..5161dca8ccc 100644
--- a/arch/arm/mach-pxa/imote2.c
+++ b/arch/arm/mach-pxa/imote2.c
@@ -64,7 +64,6 @@ static unsigned long imote2_pin_config[] __initdata = {
         GPIO116_GPIO,                   /* CC_CCA */
         GPIO0_GPIO,                     /* CC_FIFOP */
         GPIO16_GPIO,                    /* CCSFD */
-        GPIO39_GPIO,                    /* CSn */
         GPIO115_GPIO,                   /* Power enable */
 
         /* I2C */
@@ -72,7 +71,7 @@ static unsigned long imote2_pin_config[] __initdata = {
         GPIO118_I2C_SDA,
 
         /* SSP 3 - 802.15.4 radio */
-        GPIO39_GPIO,                    /* Chip Select */
+        GPIO39_GPIO,                    /* Chip Select */
         GPIO34_SSP3_SCLK,
         GPIO35_SSP3_TXD,
         GPIO41_SSP3_RXD,
@@ -560,10 +559,6 @@ static void __init imote2_init(void)
         pxa_set_btuart_info(NULL);
         pxa_set_stuart_info(NULL);
 
-        /* SPI chip select directions - all other directions should
-         * be handled by drivers.*/
-        gpio_direction_output(37, 0);
-
         platform_add_devices(imote2_devices, ARRAY_SIZE(imote2_devices));
 
         pxa2xx_set_spi_info(1, &pxa_ssp_master_0_info);
diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h
index bfec09b1814..1a741065045 100644
--- a/arch/arm/mach-pxa/include/mach/balloon3.h
+++ b/arch/arm/mach-pxa/include/mach/balloon3.h
@@ -129,6 +129,16 @@ enum balloon3_features {
 #define CPLD_AROUTING_LOONR2INT_BIT    6
 #define CPLD_AROUTING_LOONR2EXT_BIT    7
 
+/* Balloon3 Interrupts */
+#define BALLOON3_IRQ(x)         (IRQ_BOARD_START + (x))
+
+#define BALLOON3_BP_CF_NRDY_IRQ BALLOON3_IRQ(0)
+#define BALLOON3_BP_NSTSCHG_IRQ BALLOON3_IRQ(1)
+
+#define BALLOON3_AUX_NIRQ       IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ)
+#define BALLOON3_CODEC_IRQ      IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ)
+#define BALLOON3_S0_CD_IRQ      IRQ_GPIO(BALLOON3_GPIO_S0_CD)
+
 extern int balloon3_has(enum balloon3_features feature);
 
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index e741bf1bfb2..7515757d691 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -314,7 +314,6 @@ extern unsigned long get_clock_tick_rate(void);
 #define PCIBIOS_MIN_IO          0
 #define PCIBIOS_MIN_MEM         0
 #define pcibios_assign_all_busses()     1
-#define HAVE_ARCH_PCI_SET_DMA_MASK      1
 #endif
 
 
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 3677a9af9c8..ffc8314520f 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -135,82 +135,6 @@
 #define IRQ_BOARD_END           (IRQ_BOARD_START + 16)
 #endif
 
-#define IRQ_SA1111_START        (IRQ_BOARD_END)
-#define IRQ_GPAIN0              (IRQ_BOARD_END + 0)
-#define IRQ_GPAIN1              (IRQ_BOARD_END + 1)
-#define IRQ_GPAIN2              (IRQ_BOARD_END + 2)
-#define IRQ_GPAIN3              (IRQ_BOARD_END + 3)
-#define IRQ_GPBIN0              (IRQ_BOARD_END + 4)
-#define IRQ_GPBIN1              (IRQ_BOARD_END + 5)
-#define IRQ_GPBIN2              (IRQ_BOARD_END + 6)
-#define IRQ_GPBIN3              (IRQ_BOARD_END + 7)
-#define IRQ_GPBIN4              (IRQ_BOARD_END + 8)
-#define IRQ_GPBIN5              (IRQ_BOARD_END + 9)
-#define IRQ_GPCIN0              (IRQ_BOARD_END + 10)
-#define IRQ_GPCIN1              (IRQ_BOARD_END + 11)
-#define IRQ_GPCIN2              (IRQ_BOARD_END + 12)
-#define IRQ_GPCIN3              (IRQ_BOARD_END + 13)
-#define IRQ_GPCIN4              (IRQ_BOARD_END + 14)
-#define IRQ_GPCIN5              (IRQ_BOARD_END + 15)
-#define IRQ_GPCIN6              (IRQ_BOARD_END + 16)
-#define IRQ_GPCIN7              (IRQ_BOARD_END + 17)
-#define IRQ_MSTXINT             (IRQ_BOARD_END + 18)
-#define IRQ_MSRXINT             (IRQ_BOARD_END + 19)
-#define IRQ_MSSTOPERRINT        (IRQ_BOARD_END + 20)
-#define IRQ_TPTXINT             (IRQ_BOARD_END + 21)
-#define IRQ_TPRXINT             (IRQ_BOARD_END + 22)
-#define IRQ_TPSTOPERRINT        (IRQ_BOARD_END + 23)
-#define SSPXMTINT               (IRQ_BOARD_END + 24)
-#define SSPRCVINT               (IRQ_BOARD_END + 25)
-#define SSPROR                  (IRQ_BOARD_END + 26)
-#define AUDXMTDMADONEA          (IRQ_BOARD_END + 32)
-#define AUDRCVDMADONEA          (IRQ_BOARD_END + 33)
-#define AUDXMTDMADONEB          (IRQ_BOARD_END + 34)
-#define AUDRCVDMADONEB          (IRQ_BOARD_END + 35)
-#define AUDTFSR                 (IRQ_BOARD_END + 36)
-#define AUDRFSR                 (IRQ_BOARD_END + 37)
-#define AUDTUR                  (IRQ_BOARD_END + 38)
-#define AUDROR                  (IRQ_BOARD_END + 39)
-#define AUDDTS                  (IRQ_BOARD_END + 40)
-#define AUDRDD                  (IRQ_BOARD_END + 41)
-#define AUDSTO                  (IRQ_BOARD_END + 42)
-#define IRQ_USBPWR              (IRQ_BOARD_END + 43)
-#define IRQ_HCIM                (IRQ_BOARD_END + 44)
-#define IRQ_HCIBUFFACC          (IRQ_BOARD_END + 45)
-#define IRQ_HCIRMTWKP           (IRQ_BOARD_END + 46)
-#define IRQ_NHCIMFCIR           (IRQ_BOARD_END + 47)
-#define IRQ_USB_PORT_RESUME     (IRQ_BOARD_END + 48)
-#define IRQ_S0_READY_NINT       (IRQ_BOARD_END + 49)
-#define IRQ_S1_READY_NINT       (IRQ_BOARD_END + 50)
-#define IRQ_S0_CD_VALID         (IRQ_BOARD_END + 51)
-#define IRQ_S1_CD_VALID         (IRQ_BOARD_END + 52)
-#define IRQ_S0_BVD1_STSCHG      (IRQ_BOARD_END + 53)
-#define IRQ_S1_BVD1_STSCHG      (IRQ_BOARD_END + 54)
-
-#define IRQ_LOCOMO_START        (IRQ_BOARD_END)
-#define IRQ_LOCOMO_KEY          (IRQ_BOARD_END + 0)
-#define IRQ_LOCOMO_GPIO0        (IRQ_BOARD_END + 1)
-#define IRQ_LOCOMO_GPIO1        (IRQ_BOARD_END + 2)
-#define IRQ_LOCOMO_GPIO2        (IRQ_BOARD_END + 3)
-#define IRQ_LOCOMO_GPIO3        (IRQ_BOARD_END + 4)
-#define IRQ_LOCOMO_GPIO4        (IRQ_BOARD_END + 5)
-#define IRQ_LOCOMO_GPIO5        (IRQ_BOARD_END + 6)
-#define IRQ_LOCOMO_GPIO6        (IRQ_BOARD_END + 7)
-#define IRQ_LOCOMO_GPIO7        (IRQ_BOARD_END + 8)
-#define IRQ_LOCOMO_GPIO8        (IRQ_BOARD_END + 9)
-#define IRQ_LOCOMO_GPIO9        (IRQ_BOARD_END + 10)
-#define IRQ_LOCOMO_GPIO10       (IRQ_BOARD_END + 11)
-#define IRQ_LOCOMO_GPIO11       (IRQ_BOARD_END + 12)
-#define IRQ_LOCOMO_GPIO12       (IRQ_BOARD_END + 13)
-#define IRQ_LOCOMO_GPIO13       (IRQ_BOARD_END + 14)
-#define IRQ_LOCOMO_GPIO14       (IRQ_BOARD_END + 15)
-#define IRQ_LOCOMO_GPIO15       (IRQ_BOARD_END + 16)
-#define IRQ_LOCOMO_LT           (IRQ_BOARD_END + 17)
-#define IRQ_LOCOMO_SPI_RFR      (IRQ_BOARD_END + 18)
-#define IRQ_LOCOMO_SPI_RFW      (IRQ_BOARD_END + 19)
-#define IRQ_LOCOMO_SPI_OVRN     (IRQ_BOARD_END + 20)
-#define IRQ_LOCOMO_SPI_TEND     (IRQ_BOARD_END + 21)
-
 /*
  * Figure out the MAX IRQ number.
  *
@@ -219,89 +143,16 @@
  * Otherwise, we have the standard IRQs only.
  */
 #ifdef CONFIG_SA1111
-#define NR_IRQS                 (IRQ_S1_BVD1_STSCHG + 1)
-#elif defined(CONFIG_SHARP_LOCOMO)
-#define NR_IRQS                 (IRQ_LOCOMO_SPI_TEND + 1)
+#define NR_IRQS                 (IRQ_BOARD_END + 55)
 #elif defined(CONFIG_PXA_HAVE_BOARD_IRQS)
 #define NR_IRQS                 (IRQ_BOARD_END)
 #else
 #define NR_IRQS                 (IRQ_BOARD_START)
 #endif
 
-/*
- * Board specific IRQs.  Define them here.
- * Do not surround them with ifdefs.
- */
-#define LUBBOCK_IRQ(x)          (IRQ_BOARD_START + (x))
-#define LUBBOCK_SD_IRQ          LUBBOCK_IRQ(0)
-#define LUBBOCK_SA1111_IRQ      LUBBOCK_IRQ(1)
-#define LUBBOCK_USB_IRQ         LUBBOCK_IRQ(2)  /* usb connect */
-#define LUBBOCK_ETH_IRQ         LUBBOCK_IRQ(3)
-#define LUBBOCK_UCB1400_IRQ     LUBBOCK_IRQ(4)
-#define LUBBOCK_BB_IRQ          LUBBOCK_IRQ(5)
-#define LUBBOCK_USB_DISC_IRQ    LUBBOCK_IRQ(6)  /* usb disconnect */
-#define LUBBOCK_LAST_IRQ        LUBBOCK_IRQ(6)
-
-#define LPD270_IRQ(x)           (IRQ_BOARD_START + (x))
-#define LPD270_USBC_IRQ         LPD270_IRQ(2)
-#define LPD270_ETHERNET_IRQ     LPD270_IRQ(3)
-#define LPD270_AC97_IRQ         LPD270_IRQ(4)
-
-#define MAINSTONE_IRQ(x)        (IRQ_BOARD_START + (x))
-#define MAINSTONE_MMC_IRQ       MAINSTONE_IRQ(0)
-#define MAINSTONE_USIM_IRQ      MAINSTONE_IRQ(1)
-#define MAINSTONE_USBC_IRQ      MAINSTONE_IRQ(2)
-#define MAINSTONE_ETHERNET_IRQ  MAINSTONE_IRQ(3)
-#define MAINSTONE_AC97_IRQ      MAINSTONE_IRQ(4)
-#define MAINSTONE_PEN_IRQ       MAINSTONE_IRQ(5)
-#define MAINSTONE_MSINS_IRQ     MAINSTONE_IRQ(6)
-#define MAINSTONE_EXBRD_IRQ     MAINSTONE_IRQ(7)
-#define MAINSTONE_S0_CD_IRQ     MAINSTONE_IRQ(9)
-#define MAINSTONE_S0_STSCHG_IRQ MAINSTONE_IRQ(10)
-#define MAINSTONE_S0_IRQ        MAINSTONE_IRQ(11)
-#define MAINSTONE_S1_CD_IRQ     MAINSTONE_IRQ(13)
-#define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14)
-#define MAINSTONE_S1_IRQ        MAINSTONE_IRQ(15)
-
-/* Balloon3 Interrupts */
-#define BALLOON3_IRQ(x)         (IRQ_BOARD_START + (x))
-
-#define BALLOON3_BP_CF_NRDY_IRQ BALLOON3_IRQ(0)
-#define BALLOON3_BP_NSTSCHG_IRQ BALLOON3_IRQ(1)
-
-#define BALLOON3_AUX_NIRQ       IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ)
-#define BALLOON3_CODEC_IRQ      IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ)
-#define BALLOON3_S0_CD_IRQ      IRQ_GPIO(BALLOON3_GPIO_S0_CD)
-
-/* LoCoMo Interrupts (CONFIG_SHARP_LOCOMO) */
-#define IRQ_LOCOMO_KEY_BASE     (IRQ_BOARD_START + 0)
-#define IRQ_LOCOMO_GPIO_BASE    (IRQ_BOARD_START + 1)
-#define IRQ_LOCOMO_LT_BASE      (IRQ_BOARD_START + 2)
-#define IRQ_LOCOMO_SPI_BASE     (IRQ_BOARD_START + 3)
-
-/* phyCORE-PXA270 (PCM027) Interrupts */
-#define PCM027_IRQ(x)          (IRQ_BOARD_START + (x))
-#define PCM027_BTDET_IRQ       PCM027_IRQ(0)
-#define PCM027_FF_RI_IRQ       PCM027_IRQ(1)
-#define PCM027_MMCDET_IRQ      PCM027_IRQ(2)
-#define PCM027_PM_5V_IRQ       PCM027_IRQ(3)
-
-/* ITE8152 irqs */
 /* add IT8152 IRQs beyond BOARD_END */
 #ifdef CONFIG_PCI_HOST_ITE8152
-#define IT8152_IRQ(x)   (IRQ_BOARD_END + (x))
-
-/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */
-#define IT8152_LD_IRQ_COUNT     9
-#define IT8152_LP_IRQ_COUNT     16
-#define IT8152_PD_IRQ_COUNT     15
-
-/* Priorities: */
-#define IT8152_PD_IRQ(i)        IT8152_IRQ(i)
-#define IT8152_LP_IRQ(i)        (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT)
-#define IT8152_LD_IRQ(i)        (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT + IT8152_LP_IRQ_COUNT)
-
-#define IT8152_LAST_IRQ         IT8152_LD_IRQ(IT8152_LD_IRQ_COUNT - 1)
+#define IT8152_LAST_IRQ         (IRQ_BOARD_END + 40)
 
 #if NR_IRQS < (IT8152_LAST_IRQ+1)
 #undef NR_IRQS
diff --git a/arch/arm/mach-pxa/include/mach/lpd270.h b/arch/arm/mach-pxa/include/mach/lpd270.h
index f89fb715266..0e6440c8168 100644
--- a/arch/arm/mach-pxa/include/mach/lpd270.h
+++ b/arch/arm/mach-pxa/include/mach/lpd270.h
@@ -34,5 +34,9 @@
 #define LPD270_INT_ETHERNET     (1 << 3)  /* Ethernet controller IRQ */
 #define LPD270_INT_USBC         (1 << 2)  /* USB client cable detection IRQ */
 
+#define LPD270_IRQ(x)           (IRQ_BOARD_START + (x))
+#define LPD270_USBC_IRQ         LPD270_IRQ(2)
+#define LPD270_ETHERNET_IRQ     LPD270_IRQ(3)
+#define LPD270_AC97_IRQ         LPD270_IRQ(4)
 
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/lubbock.h b/arch/arm/mach-pxa/include/mach/lubbock.h
index 751b74811d0..a0d4247f08f 100644
--- a/arch/arm/mach-pxa/include/mach/lubbock.h
+++ b/arch/arm/mach-pxa/include/mach/lubbock.h
@@ -34,6 +34,17 @@
 #define LUB_IRQ_SET_CLR         __LUB_REG(LUBBOCK_FPGA_PHYS + 0x0d0)
 #define LUB_GP                  __LUB_REG(LUBBOCK_FPGA_PHYS + 0x100)
 
+/* Board specific IRQs */
+#define LUBBOCK_IRQ(x)          (IRQ_BOARD_START + (x))
+#define LUBBOCK_SD_IRQ          LUBBOCK_IRQ(0)
+#define LUBBOCK_SA1111_IRQ      LUBBOCK_IRQ(1)
+#define LUBBOCK_USB_IRQ         LUBBOCK_IRQ(2)  /* usb connect */
+#define LUBBOCK_ETH_IRQ         LUBBOCK_IRQ(3)
+#define LUBBOCK_UCB1400_IRQ     LUBBOCK_IRQ(4)
+#define LUBBOCK_BB_IRQ          LUBBOCK_IRQ(5)
+#define LUBBOCK_USB_DISC_IRQ    LUBBOCK_IRQ(6)  /* usb disconnect */
+#define LUBBOCK_LAST_IRQ        LUBBOCK_IRQ(6)
+
 #ifndef __ASSEMBLY__
 extern void lubbock_set_misc_wr(unsigned int mask, unsigned int set);
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/mainstone.h b/arch/arm/mach-pxa/include/mach/mainstone.h
index 3461c4302ff..86e623abd64 100644
--- a/arch/arm/mach-pxa/include/mach/mainstone.h
+++ b/arch/arm/mach-pxa/include/mach/mainstone.h
@@ -117,4 +117,21 @@
 #define MST_PCMCIA_PWR_VCC_33   0x8        /* voltage VCC = 3.3V */
 #define MST_PCMCIA_PWR_VCC_50   0x4        /* voltage VCC = 5.0V */
 
+/* board specific IRQs */
+#define MAINSTONE_IRQ(x)        (IRQ_BOARD_START + (x))
+#define MAINSTONE_MMC_IRQ       MAINSTONE_IRQ(0)
+#define MAINSTONE_USIM_IRQ      MAINSTONE_IRQ(1)
+#define MAINSTONE_USBC_IRQ      MAINSTONE_IRQ(2)
+#define MAINSTONE_ETHERNET_IRQ  MAINSTONE_IRQ(3)
+#define MAINSTONE_AC97_IRQ      MAINSTONE_IRQ(4)
+#define MAINSTONE_PEN_IRQ       MAINSTONE_IRQ(5)
+#define MAINSTONE_MSINS_IRQ     MAINSTONE_IRQ(6)
+#define MAINSTONE_EXBRD_IRQ     MAINSTONE_IRQ(7)
+#define MAINSTONE_S0_CD_IRQ     MAINSTONE_IRQ(9)
+#define MAINSTONE_S0_STSCHG_IRQ MAINSTONE_IRQ(10)
+#define MAINSTONE_S0_IRQ        MAINSTONE_IRQ(11)
+#define MAINSTONE_S1_CD_IRQ     MAINSTONE_IRQ(13)
+#define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14)
+#define MAINSTONE_S1_IRQ        MAINSTONE_IRQ(15)
+
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
index 9c787855cf2..cafadc33dfd 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
@@ -190,4 +190,36 @@
 #define GPIO89_AC97_nRESET      MFP_CFG_OUT(GPIO89, AF0, DRIVE_HIGH)
 #endif  /* CONFIG_CPU_PXA26x */
 
+/* commonly used pin configurations */
+#define GPIOxx_LCD_16BPP        \
+        GPIO58_LCD_LDD_0,       \
+        GPIO59_LCD_LDD_1,       \
+        GPIO60_LCD_LDD_2,       \
+        GPIO61_LCD_LDD_3,       \
+        GPIO62_LCD_LDD_4,       \
+        GPIO63_LCD_LDD_5,       \
+        GPIO64_LCD_LDD_6,       \
+        GPIO65_LCD_LDD_7,       \
+        GPIO66_LCD_LDD_8,       \
+        GPIO67_LCD_LDD_9,       \
+        GPIO68_LCD_LDD_10,      \
+        GPIO69_LCD_LDD_11,      \
+        GPIO70_LCD_LDD_12,      \
+        GPIO71_LCD_LDD_13,      \
+        GPIO72_LCD_LDD_14,      \
+        GPIO73_LCD_LDD_15
+
+#define GPIOxx_LCD_DSTN_16BPP   \
+        GPIOxx_LCD_16BPP,       \
+        GPIO74_LCD_FCLK,        \
+        GPIO75_LCD_LCLK,        \
+        GPIO76_LCD_PCLK
+
+#define GPIOxx_LCD_TFT_16BPP    \
+        GPIOxx_LCD_16BPP,       \
+        GPIO74_LCD_FCLK,        \
+        GPIO75_LCD_LCLK,        \
+        GPIO76_LCD_PCLK,        \
+        GPIO77_LCD_BIAS
+
 #endif /* __ASM_ARCH_MFP_PXA25X_H */
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
index 6543c05f47e..ec0f0b0b674 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
@@ -434,5 +434,32 @@
 #define GPIO112_nMSINS          MFP_CFG_IN(GPIO112, AF2)
 #define GPIO32_MSSCLK           MFP_CFG_OUT(GPIO32, AF1, DRIVE_LOW)
 
+/* commonly used pin configurations */
+#define GPIOxx_LCD_16BPP        \
+        GPIO58_LCD_LDD_0,       \
+        GPIO59_LCD_LDD_1,       \
+        GPIO60_LCD_LDD_2,       \
+        GPIO61_LCD_LDD_3,       \
+        GPIO62_LCD_LDD_4,       \
+        GPIO63_LCD_LDD_5,       \
+        GPIO64_LCD_LDD_6,       \
+        GPIO65_LCD_LDD_7,       \
+        GPIO66_LCD_LDD_8,       \
+        GPIO67_LCD_LDD_9,       \
+        GPIO68_LCD_LDD_10,      \
+        GPIO69_LCD_LDD_11,      \
+        GPIO70_LCD_LDD_12,      \
+        GPIO71_LCD_LDD_13,      \
+        GPIO72_LCD_LDD_14,      \
+        GPIO73_LCD_LDD_15
+
+#define GPIOxx_LCD_TFT_16BPP    \
+        GPIOxx_LCD_16BPP,       \
+        GPIO74_LCD_FCLK,        \
+        GPIO75_LCD_LCLK,        \
+        GPIO76_LCD_PCLK,        \
+        GPIO77_LCD_BIAS
+
+
 extern int keypad_set_wake(unsigned int on);
 #endif /* __ASM_ARCH_MFP_PXA27X_H */
diff --git a/arch/arm/mach-pxa/include/mach/mxm8x10.h b/arch/arm/mach-pxa/include/mach/mxm8x10.h
new file mode 100644
index 00000000000..ffa15665a41
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/mxm8x10.h
@@ -0,0 +1,21 @@
+#ifndef __MACH_MXM_8X10_H
+#define __MACH_MXM_8X10_H
+
+#define MXM_8X10_ETH_PHYS       0x13000000
+
+#if defined(CONFIG_MMC)
+
+#define MXM_8X10_SD_nCD (72)
+#define MXM_8X10_SD_WP (84)
+
+extern void mxm_8x10_mmc_init(void);
+#else
+static inline void mxm_8x10_mmc_init(void) {}
+#endif
+
+extern void mxm_8x10_usb_host_init(void);
+extern void mxm_8x10_ac97_init(void);
+
+extern void mxm_8x10_barebones_init(void);
+
+#endif /* __MACH_MXM_8X10_H */
diff --git a/arch/arm/mach-pxa/include/mach/pcm027.h b/arch/arm/mach-pxa/include/mach/pcm027.h
index 4dcd2e8baa6..04083263167 100644
--- a/arch/arm/mach-pxa/include/mach/pcm027.h
+++ b/arch/arm/mach-pxa/include/mach/pcm027.h
@@ -23,6 +23,13 @@
  * Definitions of CPU card resources only
  */
 
+/* phyCORE-PXA270 (PCM027) Interrupts */
+#define PCM027_IRQ(x)          (IRQ_BOARD_START + (x))
+#define PCM027_BTDET_IRQ       PCM027_IRQ(0)
+#define PCM027_FF_RI_IRQ       PCM027_IRQ(1)
+#define PCM027_MMCDET_IRQ      PCM027_IRQ(2)
+#define PCM027_PM_5V_IRQ       PCM027_IRQ(3)
+
 /* I2C RTC */
 #define PCM027_RTC_IRQ_GPIO     0
 #define PCM027_RTC_IRQ          IRQ_GPIO(PCM027_RTC_IRQ_GPIO)
diff --git a/arch/arm/mach-pxa/include/mach/ssp.h b/arch/arm/mach-pxa/include/mach/ssp.h
index cb5cb766f0f..be1be5b6db5 100644
--- a/arch/arm/mach-pxa/include/mach/ssp.h
+++ b/arch/arm/mach-pxa/include/mach/ssp.h
@@ -46,6 +46,7 @@ struct ssp_device {
         int             drcmr_tx;
 };
 
+#ifdef CONFIG_PXA_SSP_LEGACY
 /*
  * SSP initialisation flags
  */
@@ -78,6 +79,7 @@ void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *ssp);
 int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags);
 int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed);
 void ssp_exit(struct ssp_dev *dev);
+#endif /* CONFIG_PXA_SSP_LEGACY */
 
 /**
  * ssp_write_reg - Write to a SSP register
diff --git a/arch/arm/mach-pxa/include/mach/uncompress.h b/arch/arm/mach-pxa/include/mach/uncompress.h
index 237734b5b1b..759b851ec98 100644
--- a/arch/arm/mach-pxa/include/mach/uncompress.h
+++ b/arch/arm/mach-pxa/include/mach/uncompress.h
@@ -10,20 +10,41 @@
  */
 
 #include <linux/serial_reg.h>
-#include <mach/regs-uart.h>
 #include <asm/mach-types.h>
 
-#define __REG(x)       ((volatile unsigned long *)x)
+#define FFUART_BASE     (0x40100000)
+#define BTUART_BASE     (0x40200000)
+#define STUART_BASE     (0x40700000)
 
-static volatile unsigned long *UART = FFUART;
+static unsigned long uart_base;
+static unsigned int uart_shift;
+static unsigned int uart_is_pxa;
+
+static inline unsigned char uart_read(int offset)
+{
+        return *(volatile unsigned char *)(uart_base + (offset << uart_shift));
+}
+
+static inline void uart_write(unsigned char val, int offset)
+{
+        *(volatile unsigned char *)(uart_base + (offset << uart_shift)) = val;
+}
+
+static inline int uart_is_enabled(void)
+{
+        /* assume enabled by default for non-PXA uarts */
+        return uart_is_pxa ? uart_read(UART_IER) & UART_IER_UUE : 1;
+}
 
 static inline void putc(char c)
 {
-        if (!(UART[UART_IER] & IER_UUE))
+        if (!uart_is_enabled())
                 return;
-        while (!(UART[UART_LSR] & LSR_TDRQ))
+
+        while (!(uart_read(UART_LSR) & UART_LSR_THRE))
                 barrier();
-        UART[UART_TX] = c;
+
+        uart_write(c, UART_TX);
 }
 
 /*
@@ -35,10 +56,21 @@ static inline void flush(void)
 
 static inline void arch_decomp_setup(void)
 {
+        /* initialize to default */
+        uart_base = FFUART_BASE;
+        uart_shift = 2;
+        uart_is_pxa = 1;
+
         if (machine_is_littleton() || machine_is_intelmote2()
             || machine_is_csb726() || machine_is_stargate2()
             || machine_is_cm_x300() || machine_is_balloon3())
-                UART = STUART;
+                uart_base = STUART_BASE;
+
+        if (machine_is_arcom_zeus()) {
+                uart_base = 0x10000000; /* nCS4 */
+                uart_shift = 1;
+                uart_is_pxa = 0;
+        }
 }
 
 /*
diff --git a/arch/arm/mach-pxa/include/mach/zeus.h b/arch/arm/mach-pxa/include/mach/zeus.h
index c387046d2f2..6e119976003 100644
--- a/arch/arm/mach-pxa/include/mach/zeus.h
+++ b/arch/arm/mach-pxa/include/mach/zeus.h
@@ -58,6 +58,8 @@
 #define ZEUS_EXT1_GPIO(x)       (ZEUS_EXT1_GPIO_BASE + (x))
 #define ZEUS_USER_GPIO(x)       (ZEUS_USER_GPIO_BASE + (x))
 
+#define ZEUS_CAN_SHDN_GPIO      ZEUS_EXT1_GPIO(2)
+
 /*
  * CPLD registers:
  * Only 4 registers, but spreaded over a 32MB address space.
@@ -68,7 +70,6 @@
 #define ZEUS_CPLD_VERSION       (ZEUS_CPLD + 0x0000)
 #define ZEUS_CPLD_ISA_IRQ       (ZEUS_CPLD + 0x1000)
 #define ZEUS_CPLD_CONTROL       (ZEUS_CPLD + 0x2000)
-#define ZEUS_CPLD_EXTWDOG       (ZEUS_CPLD + 0x3000)
 
 /* CPLD register bits */
 #define ZEUS_CPLD_CONTROL_CF_RST        0x01
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 1373c22dbb8..d279507fc74 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -83,6 +83,10 @@ static unsigned long lpd270_pin_config[] __initdata = {
         GPIO89_USBH1_PEN,
 
         /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
         GPIO45_AC97_SYSCLK,
 
         GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
@@ -121,7 +125,7 @@ static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
 
         pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
         do {
-                GEDR(0) = GPIO_bit(0);  /* clear useless edge notification */
+                desc->chip->ack(irq);   /* clear useless edge notification */
                 if (likely(pending)) {
                         irq = LPD270_IRQ(0) + __ffs(pending);
                         generic_handle_irq(irq);
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 98ee7e59029..63d65a2a038 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -66,26 +66,14 @@ static unsigned long lubbock_pin_config[] __initdata = {
         GPIO25_SSP1_TXD,
         GPIO26_SSP1_RXD,
 
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+
         /* LCD - 16bpp DSTN */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
+        GPIOxx_LCD_DSTN_16BPP,
 
         /* BTUART */
         GPIO42_BTUART_RXD,
@@ -158,7 +146,7 @@ static void lubbock_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
         unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled;
         do {
-                GEDR(0) = GPIO_bit(0);  /* clear our parent irq */
+                desc->chip->ack(irq);   /* clear our parent irq */
                 if (likely(pending)) {
                         irq = LUBBOCK_IRQ(0) + __ffs(pending);
                         generic_handle_irq(irq);
@@ -240,11 +228,18 @@ static struct resource sa1111_resources[] = {
         },
 };
 
+static struct sa1111_platform_data sa1111_info = {
+        .irq_base       = IRQ_BOARD_END,
+};
+
 static struct platform_device sa1111_device = {
         .name           = "sa1111",
         .id             = -1,
         .num_resources  = ARRAY_SIZE(sa1111_resources),
         .resource       = sa1111_resources,
+        .dev            = {
+                .platform_data  = &sa1111_info,
+        },
 };
 
 /* ADS7846 is connected through SSP ... and if your board has J5 populated,
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 189f330719a..e81dd0c8e40 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -88,26 +88,7 @@ static unsigned long magician_pin_config[] __initdata = {
         GPIO112_MMC_CMD,
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* QCI */
         GPIO12_CIF_DD_7,
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 851ee0fc32e..5543c64da9e 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -60,26 +60,7 @@ static unsigned long mainstone_pin_config[] = {
         GPIO15_nCS_1,
 
         /* LCD - 16bpp Active TFT */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
         GPIO16_PWM0_OUT,        /* Backlight */
 
         /* MMC */
@@ -107,6 +88,10 @@ static unsigned long mainstone_pin_config[] = {
         GPIO57_nIOIS16,
 
         /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
         GPIO45_AC97_SYSCLK,
 
         /* Keypad */
@@ -162,7 +147,7 @@ static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
         unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
         do {
-                GEDR(0) = GPIO_bit(0);  /* clear useless edge notification */
+                desc->chip->ack(irq);   /* clear useless edge notification */
                 if (likely(pending)) {
                         irq = MAINSTONE_IRQ(0) + __ffs(pending);
                         generic_handle_irq(irq);
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 2466a44d8fd..7a50ed8fce9 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -38,6 +38,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/usb/gpio_vbus.h>
 #include <linux/regulator/max1586.h>
+#include <linux/slab.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -86,25 +87,7 @@ static unsigned long mioa701_pin_config[] = {
         MIO_CFG_OUT(GPIO22_USB_ENABLE, AF0, DRIVE_LOW),
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* QCI */
         GPIO12_CIF_DD_7,
@@ -155,6 +138,10 @@ static unsigned long mioa701_pin_config[] = {
         GPIO41_FFUART_RTS,
 
         /* Sound */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
         GPIO89_AC97_SYSCLK,
         MIO_CFG_IN(GPIO12_HPJACK_INSERT, AF0),
 
diff --git a/arch/arm/mach-pxa/mxm8x10.c b/arch/arm/mach-pxa/mxm8x10.c
new file mode 100644
index 00000000000..8c9c6f0d56b
--- /dev/null
+++ b/arch/arm/mach-pxa/mxm8x10.c
@@ -0,0 +1,474 @@
+/*
+ * linux/arch/arm/mach-pxa/mxm8x10.c
+ *
+ * Support for the Embedian MXM-8x10 Computer on Module
+ *
+ * Copyright (C) 2006 Marvell International Ltd.
+ * Copyright (C) 2009 Embedian Inc.
+ * Copyright (C) 2009 TMT Services & Supplies (Pty) Ltd.
+ *
+ * 2007-09-04: eric miao <eric.y.miao@gmail.com>
+ *             rewrite to align with latest kernel
+ *
+ * 2010-01-09: Edwin Peer <epeer@tmtservices.co.za>
+ *             Hennie van der Merwe <hvdmerwe@tmtservices.co.za>
+ *             rework for upstream merge
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/serial_8250.h>
+#include <linux/dm9000.h>
+#include <linux/gpio.h>
+
+#include <plat/i2c.h>
+#include <plat/pxa3xx_nand.h>
+
+#include <mach/pxafb.h>
+#include <mach/mmc.h>
+#include <mach/ohci.h>
+#include <mach/pxa320.h>
+
+#include <mach/mxm8x10.h>
+
+#include "devices.h"
+#include "generic.h"
+
+/* GPIO pin definition
+
+External device stuff   - Leave unconfigured for now...
+---------------------
+GPIO0   -   DREQ    (External DMA Request)
+GPIO3   -   nGCS2   (External Chip Select) Where is nGCS0; nGCS1; nGCS4; nGCS5 ?
+GPIO4   -   nGCS3
+GPIO15  -   EXT_GPIO1
+GPIO16  -   EXT_GPIO2
+GPIO17  -   EXT_GPIO3
+GPIO24  -   EXT_GPIO4
+GPIO25  -   EXT_GPIO5
+GPIO26  -   EXT_GPIO6
+GPIO27  -   EXT_GPIO7
+GPIO28  -   EXT_GPIO8
+GPIO29  -   EXT_GPIO9
+GPIO30  -   EXT_GPIO10
+GPIO31  -   EXT_GPIO11
+GPIO57  -   EXT_GPIO12
+GPIO74  -   EXT_IRQ1
+GPIO75  -   EXT_IRQ2
+GPIO76  -   EXT_IRQ3
+GPIO77  -   EXT_IRQ4
+GPIO78  -   EXT_IRQ5
+GPIO79  -   EXT_IRQ6
+GPIO80  -   EXT_IRQ7
+GPIO81  -   EXT_IRQ8
+GPIO87  -   VCCIO_PWREN (External Device PWREN)
+
+Dallas 1-Wire   - Leave unconfigured for now...
+-------------
+GPIO0_2 -   DS - 1Wire
+
+Ethernet
+--------
+GPIO1   -   DM9000 PWR
+GPIO9   -   DM9K_nIRQ
+GPIO36  -   DM9K_RESET
+
+Keypad  - Leave unconfigured by for now...
+------
+GPIO1_2 -   KP_DKIN0
+GPIO5_2 -   KP_MKOUT7
+GPIO82  -   KP_DKIN1
+GPIO85  -   KP_DKIN2
+GPIO86  -   KP_DKIN3
+GPIO113 -   KP_MKIN0
+GPIO114 -   KP_MKIN1
+GPIO115 -   KP_MKIN2
+GPIO116 -   KP_MKIN3
+GPIO117 -   KP_MKIN4
+GPIO118 -   KP_MKIN5
+GPIO119 -   KP_MKIN6
+GPIO120 -   KP_MKIN7
+GPIO121 -   KP_MKOUT0
+GPIO122 -   KP_MKOUT1
+GPIO122 -   KP_MKOUT2
+GPIO123 -   KP_MKOUT3
+GPIO124 -   KP_MKOUT4
+GPIO125 -   KP_MKOUT5
+GPIO127 -   KP_MKOUT6
+
+Data Bus    - Leave unconfigured for now...
+--------
+GPIO2   -   nWait (Data Bus)
+
+USB Device
+----------
+GPIO4_2 -   USBD_PULLUP
+GPIO10  -   UTM_CLK (USB Device UTM Clk)
+GPIO49  -   USB 2.0 Device UTM_DATA0
+GPIO50  -   USB 2.0 Device UTM_DATA1
+GPIO51  -   USB 2.0 Device UTM_DATA2
+GPIO52  -   USB 2.0 Device UTM_DATA3
+GPIO53  -   USB 2.0 Device UTM_DATA4
+GPIO54  -   USB 2.0 Device UTM_DATA5
+GPIO55  -   USB 2.0 Device UTM_DATA6
+GPIO56  -   USB 2.0 Device UTM_DATA7
+GPIO58  -   UTM_RXVALID (USB 2.0 Device)
+GPIO59  -   UTM_RXACTIVE (USB 2.0 Device)
+GPIO60  -   UTM_RXERROR
+GPIO61  -   UTM_OPMODE0
+GPIO62  -   UTM_OPMODE1
+GPIO71  -   USBD_INT    (USB Device?)
+GPIO73  -   UTM_TXREADY (USB 2.0 Device)
+GPIO83  -   UTM_TXVALID (USB 2.0 Device)
+GPIO98  -   UTM_RESET   (USB 2.0 device)
+GPIO99  -   UTM_XCVR_SELECT
+GPIO100 -   UTM_TERM_SELECT
+GPIO101 -   UTM_SUSPENDM_X
+GPIO102 -   UTM_LINESTATE0
+GPIO103 -   UTM_LINESTATE1
+
+Card-Bus Interface  - Leave unconfigured for now...
+------------------
+GPIO5   -   nPIOR (I/O space output enable)
+GPIO6   -   nPIOW (I/O space write enable)
+GPIO7   -   nIOS16 (Input from I/O space telling size of data bus)
+GPIO8   -   nPWAIT (Input for inserting wait states)
+
+LCD
+---
+GPIO6_2     -   LDD0
+GPIO7_2     -   LDD1
+GPIO8_2     -   LDD2
+GPIO9_2     -   LDD3
+GPIO11_2    -   LDD5
+GPIO12_2    -   LDD6
+GPIO13_2    -   LDD7
+GPIO14_2    -   VSYNC
+GPIO15_2    -   HSYNC
+GPIO16_2    -   VCLK
+GPIO17_2    -   HCLK
+GPIO18_2    -   VDEN
+GPIO63      -   LDD8    (CPU LCD)
+GPIO64      -   LDD9    (CPU LCD)
+GPIO65      -   LDD10   (CPU LCD)
+GPIO66      -   LDD11   (CPU LCD)
+GPIO67      -   LDD12   (CPU LCD)
+GPIO68      -   LDD13   (CPU LCD)
+GPIO69      -   LDD14   (CPU LCD)
+GPIO70      -   LDD15   (CPU LCD)
+GPIO88      -   VCCLCD_PWREN (LCD Panel PWREN)
+GPIO97      -   BACKLIGHT_EN
+GPIO104     -   LCD_PWREN
+
+PWM   - Leave unconfigured for now...
+---
+GPIO11  -   PWM0
+GPIO12  -   PWM1
+GPIO13  -   PWM2
+GPIO14  -   PWM3
+
+SD-CARD
+-------
+GPIO18  -   SDDATA0
+GPIO19  -   SDDATA1
+GPIO20  -   SDDATA2
+GPIO21  -   SDDATA3
+GPIO22  -   SDCLK
+GPIO23  -   SDCMD
+GPIO72  -   SD_WP
+GPIO84  -   SD_nIRQ_CD  (SD-Card)
+
+I2C
+---
+GPIO32  -   I2CSCL
+GPIO33  -   I2CSDA
+
+AC97
+----
+GPIO35  -   AC97_SDATA_IN
+GPIO37  -   AC97_SDATA_OUT
+GPIO38  -   AC97_SYNC
+GPIO39  -   AC97_BITCLK
+GPIO40  -   AC97_nRESET
+
+UART1
+-----
+GPIO41  -   UART_RXD1
+GPIO42  -   UART_TXD1
+GPIO43  -   UART_CTS1
+GPIO44  -   UART_DCD1
+GPIO45  -   UART_DSR1
+GPIO46  -   UART_nRI1
+GPIO47  -   UART_DTR1
+GPIO48  -   UART_RTS1
+
+UART2
+-----
+GPIO109 -   RTS2
+GPIO110 -   RXD2
+GPIO111 -   TXD2
+GPIO112 -   nCTS2
+
+UART3
+-----
+GPIO105 -   nCTS3
+GPIO106 -   nRTS3
+GPIO107 -   TXD3
+GPIO108 -   RXD3
+
+SSP3    - Leave unconfigured for now...
+----
+GPIO89  -   SSP3_CLK
+GPIO90  -   SSP3_SFRM
+GPIO91  -   SSP3_TXD
+GPIO92  -   SSP3_RXD
+
+SSP4
+GPIO93  -   SSP4_CLK
+GPIO94  -   SSP4_SFRM
+GPIO95  -   SSP4_TXD
+GPIO96  -   SSP4_RXD
+*/
+
+static mfp_cfg_t mfp_cfg[] __initdata = {
+        /* USB */
+        GPIO10_UTM_CLK,
+        GPIO49_U2D_PHYDATA_0,
+        GPIO50_U2D_PHYDATA_1,
+        GPIO51_U2D_PHYDATA_2,
+        GPIO52_U2D_PHYDATA_3,
+        GPIO53_U2D_PHYDATA_4,
+        GPIO54_U2D_PHYDATA_5,
+        GPIO55_U2D_PHYDATA_6,
+        GPIO56_U2D_PHYDATA_7,
+        GPIO58_UTM_RXVALID,
+        GPIO59_UTM_RXACTIVE,
+        GPIO60_U2D_RXERROR,
+        GPIO61_U2D_OPMODE0,
+        GPIO62_U2D_OPMODE1,
+        GPIO71_GPIO, /* USBD_INT */
+        GPIO73_UTM_TXREADY,
+        GPIO83_U2D_TXVALID,
+        GPIO98_U2D_RESET,
+        GPIO99_U2D_XCVR_SEL,
+        GPIO100_U2D_TERM_SEL,
+        GPIO101_U2D_SUSPEND,
+        GPIO102_UTM_LINESTATE_0,
+        GPIO103_UTM_LINESTATE_1,
+        GPIO4_2_GPIO | MFP_PULL_HIGH, /* UTM_PULLUP */
+
+        /* DM9000 */
+        GPIO1_GPIO,
+        GPIO9_GPIO,
+        GPIO36_GPIO,
+
+        /* AC97 */
+        GPIO35_AC97_SDATA_IN_0,
+        GPIO37_AC97_SDATA_OUT,
+        GPIO38_AC97_SYNC,
+        GPIO39_AC97_BITCLK,
+        GPIO40_AC97_nACRESET,
+
+        /* UARTS */
+        GPIO41_UART1_RXD,
+        GPIO42_UART1_TXD,
+        GPIO43_UART1_CTS,
+        GPIO44_UART1_DCD,
+        GPIO45_UART1_DSR,
+        GPIO46_UART1_RI,
+        GPIO47_UART1_DTR,
+        GPIO48_UART1_RTS,
+
+        GPIO109_UART2_RTS,
+        GPIO110_UART2_RXD,
+        GPIO111_UART2_TXD,
+        GPIO112_UART2_CTS,
+
+        GPIO105_UART3_CTS,
+        GPIO106_UART3_RTS,
+        GPIO107_UART3_TXD,
+        GPIO108_UART3_RXD,
+
+        GPIO78_GPIO,
+        GPIO79_GPIO,
+        GPIO80_GPIO,
+        GPIO81_GPIO,
+
+        /* I2C */
+        GPIO32_I2C_SCL,
+        GPIO33_I2C_SDA,
+
+        /* MMC */
+        GPIO18_MMC1_DAT0,
+        GPIO19_MMC1_DAT1,
+        GPIO20_MMC1_DAT2,
+        GPIO21_MMC1_DAT3,
+        GPIO22_MMC1_CLK,
+        GPIO23_MMC1_CMD,
+        GPIO72_GPIO | MFP_PULL_HIGH, /* Card Detect */
+        GPIO84_GPIO | MFP_PULL_LOW, /* Write Protect */
+
+        /* IRQ */
+        GPIO74_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ1 */
+        GPIO75_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ2 */
+        GPIO76_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ3 */
+        GPIO77_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ4 */
+        GPIO78_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ5 */
+        GPIO79_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ6 */
+        GPIO80_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ7 */
+        GPIO81_GPIO | MFP_LPM_EDGE_RISE  /* EXT_IRQ8 */
+};
+
+/* MMC/MCI Support */
+#if defined(CONFIG_MMC)
+static struct pxamci_platform_data mxm_8x10_mci_platform_data = {
+        .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
+        .detect_delay = 1,
+        .gpio_card_detect = MXM_8X10_SD_nCD,
+        .gpio_card_ro = MXM_8X10_SD_WP,
+        .gpio_power = -1
+};
+
+void __init mxm_8x10_mmc_init(void)
+{
+        pxa_set_mci_info(&mxm_8x10_mci_platform_data);
+}
+#endif
+
+/* USB Open Host Controler Interface */
+static struct pxaohci_platform_data mxm_8x10_ohci_platform_data = {
+        .port_mode = PMM_NPS_MODE,
+        .flags = ENABLE_PORT_ALL
+};
+
+void __init mxm_8x10_usb_host_init(void)
+{
+        pxa_set_ohci_info(&mxm_8x10_ohci_platform_data);
+}
+
+/* AC97 Sound Support */
+static struct platform_device mxm_8x10_ac97_device = {
+        .name = "pxa2xx-ac97"
+};
+
+void __init mxm_8x10_ac97_init(void)
+{
+        platform_device_register(&mxm_8x10_ac97_device);
+}
+
+/* NAND flash Support */
+#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
+#define NAND_BLOCK_SIZE SZ_128K
+#define NB(x)           (NAND_BLOCK_SIZE * (x))
+static struct mtd_partition mxm_8x10_nand_partitions[] = {
+        [0] = {
+               .name = "boot",
+               .size = NB(0x002),
+               .offset = NB(0x000),
+               .mask_flags = MTD_WRITEABLE
+        },
+        [1] = {
+               .name = "kernel",
+               .size = NB(0x010),
+               .offset = NB(0x002),
+               .mask_flags = MTD_WRITEABLE
+        },
+        [2] = {
+               .name = "root",
+               .size = NB(0x36c),
+               .offset = NB(0x012)
+        },
+        [3] = {
+               .name = "bbt",
+               .size = NB(0x082),
+               .offset = NB(0x37e),
+               .mask_flags = MTD_WRITEABLE
+        }
+};
+
+static struct pxa3xx_nand_platform_data mxm_8x10_nand_info = {
+        .enable_arbiter = 1,
+        .keep_config = 1,
+        .parts = mxm_8x10_nand_partitions,
+        .nr_parts = ARRAY_SIZE(mxm_8x10_nand_partitions)
+};
+
+static void __init mxm_8x10_nand_init(void)
+{
+        pxa3xx_set_nand_info(&mxm_8x10_nand_info);
+}
+#else
+static inline void mxm_8x10_nand_init(void) {}
+#endif /* CONFIG_MTD_NAND_PXA3xx || CONFIG_MTD_NAND_PXA3xx_MODULE */
+
+/* Ethernet support: Davicom DM9000 */
+static struct resource dm9k_resources[] = {
+        [0] = {
+               .start = MXM_8X10_ETH_PHYS + 0x300,
+               .end = MXM_8X10_ETH_PHYS + 0x300,
+               .flags = IORESOURCE_MEM
+        },
+        [1] = {
+               .start = MXM_8X10_ETH_PHYS + 0x308,
+               .end = MXM_8X10_ETH_PHYS + 0x308,
+               .flags = IORESOURCE_MEM
+        },
+        [2] = {
+               .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)),
+               .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)),
+               .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
+        }
+};
+
+static struct dm9000_plat_data dm9k_plat_data = {
+        .flags = DM9000_PLATF_16BITONLY
+};
+
+static struct platform_device dm9k_device = {
+        .name = "dm9000",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(dm9k_resources),
+        .resource = dm9k_resources,
+        .dev = {
+                .platform_data = &dm9k_plat_data
+        }
+};
+
+static void __init mxm_8x10_ethernet_init(void)
+{
+        platform_device_register(&dm9k_device);
+}
+
+/* PXA UARTs */
+static void __init mxm_8x10_uarts_init(void)
+{
+        pxa_set_ffuart_info(NULL);
+        pxa_set_btuart_info(NULL);
+        pxa_set_stuart_info(NULL);
+}
+
+/* I2C and Real Time Clock */
+static struct i2c_board_info __initdata mxm_8x10_i2c_devices[] = {
+        {
+                I2C_BOARD_INFO("ds1337", 0x68)
+        }
+};
+
+static void __init mxm_8x10_i2c_init(void)
+{
+        i2c_register_board_info(0, mxm_8x10_i2c_devices,
+                                ARRAY_SIZE(mxm_8x10_i2c_devices));
+        pxa_set_i2c_info(NULL);
+}
+
+void __init mxm_8x10_barebones_init(void)
+{
+        pxa3xx_mfp_config(ARRAY_AND_SIZE(mfp_cfg));
+
+        mxm_8x10_uarts_init();
+        mxm_8x10_nand_init();
+        mxm_8x10_i2c_init();
+        mxm_8x10_ethernet_init();
+}
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index e100af78b16..f70c75b3876 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -83,26 +83,7 @@ static unsigned long palmld_pin_config[] __initdata = {
         GPIO105_KP_MKOUT_2,
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* PWM */
         GPIO16_PWM0_OUT,
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index 8fe3ec27568..d902a813aae 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -87,26 +87,7 @@ static unsigned long palmt5_pin_config[] __initdata = {
         GPIO105_KP_MKOUT_2,
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* PWM */
         GPIO16_PWM0_OUT,
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index b992f07ece2..717d7a63867 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -84,26 +84,7 @@ static unsigned long palmtc_pin_config[] __initdata = {
         GPIO36_GPIO,    /* pullup */
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* MATRIX KEYPAD */
         GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH,       /* in 0 */
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c
index dc728d6ab94..3d284ff1a64 100644
--- a/arch/arm/mach-pxa/palmte2.c
+++ b/arch/arm/mach-pxa/palmte2.c
@@ -73,26 +73,7 @@ static unsigned long palmte2_pin_config[] __initdata = {
         GPIO47_FICP_TXD,
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* GPIO KEYS */
         GPIO5_GPIO,     /* notes */
diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c
index b433bb49671..d8b4469607a 100644
--- a/arch/arm/mach-pxa/palmtreo.c
+++ b/arch/arm/mach-pxa/palmtreo.c
@@ -99,25 +99,7 @@ static unsigned long treo_pin_config[] __initdata = {
         GPIO93_KP_DKIN_0 | WAKEUP_ON_LEVEL_HIGH,        /* Hotsync button */
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* Quick Capture Interface */
         GPIO84_CIF_FV,
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index b37a025c0b7..007b58c11f8 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -110,26 +110,7 @@ static unsigned long palmtx_pin_config[] __initdata = {
         GPIO105_KP_MKOUT_2,
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* FFUART */
         GPIO34_FFUART_RXD,
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
index 1c5d68a9451..3a7925ca394 100644
--- a/arch/arm/mach-pxa/palmz72.c
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -95,26 +95,8 @@ static unsigned long palmz72_pin_config[] __initdata = {
         GPIO105_KP_MKOUT_2,
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
+
         GPIO20_GPIO,    /* bl power */
         GPIO21_GPIO,    /* LCD border switch */
         GPIO22_GPIO,    /* LCD border color */
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index d5255ae74fe..9d0ecea1760 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -58,6 +58,12 @@ static unsigned long pcm990_pin_config[] __initdata = {
         /* I2C */
         GPIO117_I2C_SCL,
         GPIO118_I2C_SDA,
+
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
 };
 
 /*
@@ -259,8 +265,7 @@ static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
         unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
 
         do {
-                GEDR(PCM990_CTRL_INT_IRQ_GPIO) =
-                                        GPIO_bit(PCM990_CTRL_INT_IRQ_GPIO);
+                desc->chip->ack(irq);   /* clear our parent IRQ */
                 if (likely(pending)) {
                         irq = PCM027_IRQ(0) + __ffs(pending);
                         generic_handle_irq(irq);
diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c
index 7693355ee63..166c15f6291 100644
--- a/arch/arm/mach-pxa/pm.c
+++ b/arch/arm/mach-pxa/pm.c
@@ -14,6 +14,7 @@
 #include <linux/module.h>
 #include <linux/suspend.h>
 #include <linux/errno.h>
+#include <linux/slab.h>
 
 #include <mach/pm.h>
 
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index c2b938a4d5c..d58a52415d7 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -91,26 +91,7 @@ static unsigned long poodle_pin_config[] __initdata = {
         GPIO35_FFUART_CTS,
 
         /* LCD */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* PC Card */
         GPIO48_nPOE,
@@ -193,11 +174,18 @@ static struct resource locomo_resources[] = {
         },
 };
 
+static struct locomo_platform_data locomo_info = {
+        .irq_base       = IRQ_BOARD_START,
+};
+
 struct platform_device poodle_locomo_device = {
         .name           = "locomo",
         .id             = 0,
         .num_resources  = ARRAY_SIZE(locomo_resources),
         .resource       = locomo_resources,
+        .dev            = {
+                .platform_data  = &locomo_info,
+        },
 };
 
 EXPORT_SYMBOL(poodle_locomo_device);
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index d783123e2d4..0af36177ff0 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -40,6 +40,25 @@ void pxa27x_clear_otgph(void)
 }
 EXPORT_SYMBOL(pxa27x_clear_otgph);
 
+static unsigned long ac97_reset_config[] = {
+        GPIO95_AC97_nRESET,
+        GPIO95_GPIO,
+        GPIO113_AC97_nRESET,
+        GPIO113_GPIO,
+};
+
+void pxa27x_assert_ac97reset(int reset_gpio, int on)
+{
+        if (reset_gpio == 113)
+                pxa2xx_mfp_config(on ? &ac97_reset_config[0] :
+                                       &ac97_reset_config[1], 1);
+
+        if (reset_gpio == 95)
+                pxa2xx_mfp_config(on ? &ac97_reset_config[2] :
+                                       &ac97_reset_config[3], 1);
+}
+EXPORT_SYMBOL_GPL(pxa27x_assert_ac97reset);
+
 /* Crystal clock: 13MHz */
 #define BASE_CLK        13000000
 
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
new file mode 100644
index 00000000000..44bb675e47f
--- /dev/null
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -0,0 +1,1106 @@
+/*
+ * arch/arm/mach-pxa/raumfeld.c
+ *
+ * Support for the following Raumfeld devices:
+ *
+ *      * Controller
+ *      * Connector
+ *      * Speaker S/M
+ *
+ * See http://www.raumfeld.com for details.
+ *
+ * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/sysdev.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/gpio.h>
+#include <linux/smsc911x.h>
+#include <linux/input.h>
+#include <linux/rotary_encoder.h>
+#include <linux/gpio_keys.h>
+#include <linux/input/eeti_ts.h>
+#include <linux/leds.h>
+#include <linux/w1-gpio.h>
+#include <linux/sched.h>
+#include <linux/pwm_backlight.h>
+#include <linux/i2c.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/spi_gpio.h>
+#include <linux/lis3lv02d.h>
+#include <linux/pda_power.h>
+#include <linux/power_supply.h>
+#include <linux/regulator/max8660.h>
+#include <linux/regulator/machine.h>
+#include <linux/regulator/fixed.h>
+#include <linux/regulator/consumer.h>
+#include <linux/delay.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#include <mach/hardware.h>
+#include <mach/pxa3xx-regs.h>
+#include <mach/mfp-pxa3xx.h>
+#include <mach/mfp-pxa300.h>
+#include <mach/ohci.h>
+#include <mach/pxafb.h>
+#include <mach/mmc.h>
+#include <plat/i2c.h>
+#include <plat/pxa3xx_nand.h>
+
+#include "generic.h"
+#include "devices.h"
+#include "clock.h"
+
+/* common GPIO  definitions */
+
+/* inputs */
+#define GPIO_ON_OFF             (14)
+#define GPIO_VOLENC_A           (19)
+#define GPIO_VOLENC_B           (20)
+#define GPIO_CHARGE_DONE        (23)
+#define GPIO_CHARGE_IND         (27)
+#define GPIO_TOUCH_IRQ          (32)
+#define GPIO_ETH_IRQ            (40)
+#define GPIO_SPI_MISO           (98)
+#define GPIO_ACCEL_IRQ          (104)
+#define GPIO_RESCUE_BOOT        (115)
+#define GPIO_DOCK_DETECT        (116)
+#define GPIO_KEY1               (117)
+#define GPIO_KEY2               (118)
+#define GPIO_KEY3               (119)
+#define GPIO_CHARGE_USB_OK      (112)
+#define GPIO_CHARGE_DC_OK       (101)
+#define GPIO_CHARGE_USB_SUSP    (102)
+
+/* outputs */
+#define GPIO_SHUTDOWN_SUPPLY    (16)
+#define GPIO_SHUTDOWN_BATT      (18)
+#define GPIO_CHRG_PEN2          (31)
+#define GPIO_TFT_VA_EN          (33)
+#define GPIO_SPDIF_CS           (34)
+#define GPIO_LED2               (35)
+#define GPIO_LED1               (36)
+#define GPIO_SPDIF_RESET        (38)
+#define GPIO_SPI_CLK            (95)
+#define GPIO_MCLK_DAC_CS        (96)
+#define GPIO_SPI_MOSI           (97)
+#define GPIO_W1_PULLUP_ENABLE   (105)
+#define GPIO_DISPLAY_ENABLE     (106)
+#define GPIO_MCLK_RESET         (111)
+#define GPIO_W2W_RESET          (113)
+#define GPIO_W2W_PDN            (114)
+#define GPIO_CODEC_RESET        (120)
+#define GPIO_AUDIO_VA_ENABLE    (124)
+#define GPIO_ACCEL_CS           (125)
+#define GPIO_ONE_WIRE           (126)
+
+/*
+ * GPIO configurations
+ */
+static mfp_cfg_t raumfeld_controller_pin_config[] __initdata = {
+        /* UART1 */
+        GPIO77_UART1_RXD,
+        GPIO78_UART1_TXD,
+        GPIO79_UART1_CTS,
+        GPIO81_UART1_DSR,
+        GPIO83_UART1_DTR,
+        GPIO84_UART1_RTS,
+
+        /* UART3 */
+        GPIO110_UART3_RXD,
+
+        /* USB Host */
+        GPIO0_2_USBH_PEN,
+        GPIO1_2_USBH_PWR,
+
+        /* I2C */
+        GPIO21_I2C_SCL | MFP_LPM_FLOAT | MFP_PULL_FLOAT,
+        GPIO22_I2C_SDA | MFP_LPM_FLOAT | MFP_PULL_FLOAT,
+
+        /* SPI */
+        GPIO34_GPIO,    /* SPDIF_CS */
+        GPIO96_GPIO,    /* MCLK_CS */
+        GPIO125_GPIO,   /* ACCEL_CS */
+
+        /* MMC */
+        GPIO3_MMC1_DAT0,
+        GPIO4_MMC1_DAT1,
+        GPIO5_MMC1_DAT2,
+        GPIO6_MMC1_DAT3,
+        GPIO7_MMC1_CLK,
+        GPIO8_MMC1_CMD,
+
+        /* One-wire */
+        GPIO126_GPIO | MFP_LPM_FLOAT,
+        GPIO105_GPIO | MFP_PULL_LOW | MFP_LPM_PULL_LOW,
+
+        /* CHRG_USB_OK */
+        GPIO101_GPIO | MFP_PULL_HIGH,
+        /* CHRG_USB_OK */
+        GPIO112_GPIO | MFP_PULL_HIGH,
+        /* CHRG_USB_SUSP */
+        GPIO102_GPIO,
+        /* DISPLAY_ENABLE */
+        GPIO106_GPIO,
+        /* DOCK_DETECT */
+        GPIO116_GPIO | MFP_LPM_FLOAT | MFP_PULL_FLOAT,
+
+        /* LCD */
+        GPIO54_LCD_LDD_0,
+        GPIO55_LCD_LDD_1,
+        GPIO56_LCD_LDD_2,
+        GPIO57_LCD_LDD_3,
+        GPIO58_LCD_LDD_4,
+        GPIO59_LCD_LDD_5,
+        GPIO60_LCD_LDD_6,
+        GPIO61_LCD_LDD_7,
+        GPIO62_LCD_LDD_8,
+        GPIO63_LCD_LDD_9,
+        GPIO64_LCD_LDD_10,
+        GPIO65_LCD_LDD_11,
+        GPIO66_LCD_LDD_12,
+        GPIO67_LCD_LDD_13,
+        GPIO68_LCD_LDD_14,
+        GPIO69_LCD_LDD_15,
+        GPIO70_LCD_LDD_16,
+        GPIO71_LCD_LDD_17,
+        GPIO72_LCD_FCLK,
+        GPIO73_LCD_LCLK,
+        GPIO74_LCD_PCLK,
+        GPIO75_LCD_BIAS,
+};
+
+static mfp_cfg_t raumfeld_connector_pin_config[] __initdata = {
+        /* UART1 */
+        GPIO77_UART1_RXD,
+        GPIO78_UART1_TXD,
+        GPIO79_UART1_CTS,
+        GPIO81_UART1_DSR,
+        GPIO83_UART1_DTR,
+        GPIO84_UART1_RTS,
+
+        /* UART3 */
+        GPIO110_UART3_RXD,
+
+        /* USB Host */
+        GPIO0_2_USBH_PEN,
+        GPIO1_2_USBH_PWR,
+
+        /* I2C */
+        GPIO21_I2C_SCL | MFP_LPM_FLOAT | MFP_PULL_FLOAT,
+        GPIO22_I2C_SDA | MFP_LPM_FLOAT | MFP_PULL_FLOAT,
+
+        /* SPI */
+        GPIO34_GPIO,    /* SPDIF_CS */
+        GPIO96_GPIO,    /* MCLK_CS */
+        GPIO125_GPIO,   /* ACCEL_CS */
+
+        /* MMC */
+        GPIO3_MMC1_DAT0,
+        GPIO4_MMC1_DAT1,
+        GPIO5_MMC1_DAT2,
+        GPIO6_MMC1_DAT3,
+        GPIO7_MMC1_CLK,
+        GPIO8_MMC1_CMD,
+
+        /* Ethernet */
+        GPIO1_nCS2,                     /* CS */
+        GPIO40_GPIO | MFP_PULL_HIGH,    /* IRQ */
+
+        /* SSP for I2S */
+        GPIO85_SSP1_SCLK,
+        GPIO89_SSP1_EXTCLK,
+        GPIO86_SSP1_FRM,
+        GPIO87_SSP1_TXD,
+        GPIO88_SSP1_RXD,
+        GPIO90_SSP1_SYSCLK,
+
+        /* SSP2 for S/PDIF */
+        GPIO25_SSP2_SCLK,
+        GPIO26_SSP2_FRM,
+        GPIO27_SSP2_TXD,
+        GPIO29_SSP2_EXTCLK,
+
+        /* LEDs */
+        GPIO35_GPIO | MFP_LPM_PULL_LOW,
+        GPIO36_GPIO | MFP_LPM_DRIVE_HIGH,
+};
+
+static mfp_cfg_t raumfeld_speaker_pin_config[] __initdata = {
+        /* UART1 */
+        GPIO77_UART1_RXD,
+        GPIO78_UART1_TXD,
+        GPIO79_UART1_CTS,
+        GPIO81_UART1_DSR,
+        GPIO83_UART1_DTR,
+        GPIO84_UART1_RTS,
+
+        /* UART3 */
+        GPIO110_UART3_RXD,
+
+        /* USB Host */
+        GPIO0_2_USBH_PEN,
+        GPIO1_2_USBH_PWR,
+
+        /* I2C */
+        GPIO21_I2C_SCL | MFP_LPM_FLOAT | MFP_PULL_FLOAT,
+        GPIO22_I2C_SDA | MFP_LPM_FLOAT | MFP_PULL_FLOAT,
+
+        /* SPI */
+        GPIO34_GPIO,    /* SPDIF_CS */
+        GPIO96_GPIO,    /* MCLK_CS */
+        GPIO125_GPIO,   /* ACCEL_CS */
+
+        /* MMC */
+        GPIO3_MMC1_DAT0,
+        GPIO4_MMC1_DAT1,
+        GPIO5_MMC1_DAT2,
+        GPIO6_MMC1_DAT3,
+        GPIO7_MMC1_CLK,
+        GPIO8_MMC1_CMD,
+
+        /* Ethernet */
+        GPIO1_nCS2,                     /* CS */
+        GPIO40_GPIO | MFP_PULL_HIGH,    /* IRQ */
+
+        /* SSP for I2S */
+        GPIO85_SSP1_SCLK,
+        GPIO89_SSP1_EXTCLK,
+        GPIO86_SSP1_FRM,
+        GPIO87_SSP1_TXD,
+        GPIO88_SSP1_RXD,
+        GPIO90_SSP1_SYSCLK,
+
+        /* LEDs */
+        GPIO35_GPIO | MFP_LPM_PULL_LOW,
+        GPIO36_GPIO | MFP_LPM_DRIVE_HIGH,
+};
+
+/*
+ * SMSC LAN9220 Ethernet
+ */
+
+static struct resource smc91x_resources[] = {
+        {
+                .start  = PXA3xx_CS2_PHYS,
+                .end    = PXA3xx_CS2_PHYS + 0xfffff,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = gpio_to_irq(GPIO_ETH_IRQ),
+                .end    = gpio_to_irq(GPIO_ETH_IRQ),
+                .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
+        }
+};
+
+static struct smsc911x_platform_config raumfeld_smsc911x_config = {
+        .phy_interface  = PHY_INTERFACE_MODE_MII,
+        .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+        .irq_type       = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
+        .flags          = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
+};
+
+static struct platform_device smc91x_device = {
+        .name           = "smsc911x",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(smc91x_resources),
+        .resource       = smc91x_resources,
+        .dev            = {
+                .platform_data = &raumfeld_smsc911x_config,
+        }
+};
+
+/**
+ * NAND
+ */
+
+static struct mtd_partition raumfeld_nand_partitions[] = {
+        {
+                .name           = "Bootloader",
+                .offset         = 0,
+                .size           = 0xa0000,
+                .mask_flags     = MTD_WRITEABLE, /* force read-only */
+        },
+        {
+                .name           = "BootloaderEnvironment",
+                .offset         = 0xa0000,
+                .size           = 0x20000,
+        },
+        {
+                .name           = "BootloaderSplashScreen",
+                .offset         = 0xc0000,
+                .size           = 0x60000,
+        },
+        {
+                .name           = "UBI",
+                .offset         = 0x120000,
+                .size           = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct pxa3xx_nand_platform_data raumfeld_nand_info = {
+        .enable_arbiter = 1,
+        .keep_config    = 1,
+        .parts          = raumfeld_nand_partitions,
+        .nr_parts       = ARRAY_SIZE(raumfeld_nand_partitions),
+};
+
+/**
+ * USB (OHCI) support
+ */
+
+static struct pxaohci_platform_data raumfeld_ohci_info = {
+        .port_mode      = PMM_GLOBAL_MODE,
+        .flags          = ENABLE_PORT1,
+};
+
+/**
+ * Rotary encoder input device
+ */
+
+static struct rotary_encoder_platform_data raumfeld_rotary_encoder_info = {
+        .steps          = 24,
+        .axis           = REL_X,
+        .relative_axis  = 1,
+        .gpio_a         = GPIO_VOLENC_A,
+        .gpio_b         = GPIO_VOLENC_B,
+        .inverted_a     = 1,
+        .inverted_b     = 0,
+};
+
+static struct platform_device rotary_encoder_device = {
+        .name           = "rotary-encoder",
+        .id             = 0,
+        .dev            = {
+                .platform_data = &raumfeld_rotary_encoder_info,
+        }
+};
+
+/**
+ * GPIO buttons
+ */
+
+static struct gpio_keys_button gpio_keys_button[] = {
+        {
+                .code                   = KEY_F1,
+                .type                   = EV_KEY,
+                .gpio                   = GPIO_KEY1,
+                .active_low             = 1,
+                .wakeup                 = 0,
+                .debounce_interval      = 5, /* ms */
+                .desc                   = "Button 1",
+        },
+        {
+                .code                   = KEY_F2,
+                .type                   = EV_KEY,
+                .gpio                   = GPIO_KEY2,
+                .active_low             = 1,
+                .wakeup                 = 0,
+                .debounce_interval      = 5, /* ms */
+                .desc                   = "Button 2",
+        },
+        {
+                .code                   = KEY_F3,
+                .type                   = EV_KEY,
+                .gpio                   = GPIO_KEY3,
+                .active_low             = 1,
+                .wakeup                 = 0,
+                .debounce_interval      = 5, /* ms */
+                .desc                   = "Button 3",
+        },
+        {
+                .code                   = KEY_F4,
+                .type                   = EV_KEY,
+                .gpio                   = GPIO_RESCUE_BOOT,
+                .active_low             = 0,
+                .wakeup                 = 0,
+                .debounce_interval      = 5, /* ms */
+                .desc                   = "rescue boot button",
+        },
+        {
+                .code                   = KEY_F5,
+                .type                   = EV_KEY,
+                .gpio                   = GPIO_DOCK_DETECT,
+                .active_low             = 1,
+                .wakeup                 = 0,
+                .debounce_interval      = 5, /* ms */
+                .desc                   = "dock detect",
+        },
+        {
+                .code                   = KEY_F6,
+                .type                   = EV_KEY,
+                .gpio                   = GPIO_ON_OFF,
+                .active_low             = 0,
+                .wakeup                 = 0,
+                .debounce_interval      = 5, /* ms */
+                .desc                   = "on_off button",
+        },
+};
+
+static struct gpio_keys_platform_data gpio_keys_platform_data = {
+        .buttons        = gpio_keys_button,
+        .nbuttons       = ARRAY_SIZE(gpio_keys_button),
+        .rep            = 0,
+};
+
+static struct platform_device raumfeld_gpio_keys_device = {
+        .name   = "gpio-keys",
+        .id     = -1,
+        .dev    = {
+                .platform_data  = &gpio_keys_platform_data,
+        }
+};
+
+/**
+ * GPIO LEDs
+ */
+
+static struct gpio_led raumfeld_leds[] = {
+        {
+                .name           = "raumfeld:1",
+                .gpio           = GPIO_LED1,
+                .active_low     = 1,
+                .default_state  = LEDS_GPIO_DEFSTATE_ON,
+        },
+        {
+                .name           = "raumfeld:2",
+                .gpio           = GPIO_LED2,
+                .active_low     = 0,
+                .default_state  = LEDS_GPIO_DEFSTATE_OFF,
+        }
+};
+
+static struct gpio_led_platform_data raumfeld_led_platform_data = {
+        .leds           = raumfeld_leds,
+        .num_leds       = ARRAY_SIZE(raumfeld_leds),
+};
+
+static struct platform_device raumfeld_led_device = {
+        .name   = "leds-gpio",
+        .id     = -1,
+        .dev    = {
+                .platform_data = &raumfeld_led_platform_data,
+        },
+};
+
+/**
+ * One-wire (W1 bus) support
+ */
+
+static void w1_enable_external_pullup(int enable)
+{
+        gpio_set_value(GPIO_W1_PULLUP_ENABLE, enable);
+        msleep(100);
+}
+
+static struct w1_gpio_platform_data w1_gpio_platform_data = {
+        .pin                    = GPIO_ONE_WIRE,
+        .is_open_drain          = 0,
+        .enable_external_pullup = w1_enable_external_pullup,
+};
+
+struct platform_device raumfeld_w1_gpio_device = {
+        .name   = "w1-gpio",
+        .dev    = {
+                .platform_data = &w1_gpio_platform_data
+        }
+};
+
+static void __init raumfeld_w1_init(void)
+{
+        int ret = gpio_request(GPIO_W1_PULLUP_ENABLE,
+                                "W1 external pullup enable");
+
+        if (ret < 0)
+                pr_warning("Unable to request GPIO_W1_PULLUP_ENABLE\n");
+        else
+                gpio_direction_output(GPIO_W1_PULLUP_ENABLE, 0);
+
+        platform_device_register(&raumfeld_w1_gpio_device);
+}
+
+/**
+ * Framebuffer device
+ */
+
+/* PWM controlled backlight */
+static struct platform_pwm_backlight_data raumfeld_pwm_backlight_data = {
+        .pwm_id         = 0,
+        .max_brightness = 100,
+        .dft_brightness = 100,
+        /* 10000 ns = 10 ms ^= 100 kHz */
+        .pwm_period_ns  = 10000,
+};
+
+static struct platform_device raumfeld_pwm_backlight_device = {
+        .name   = "pwm-backlight",
+        .dev    = {
+                .parent         = &pxa27x_device_pwm0.dev,
+                .platform_data  = &raumfeld_pwm_backlight_data,
+        }
+};
+
+/* LT3593 controlled backlight */
+static struct gpio_led raumfeld_lt3593_led = {
+        .name           = "backlight",
+        .gpio           = mfp_to_gpio(MFP_PIN_GPIO17),
+        .default_state  = LEDS_GPIO_DEFSTATE_ON,
+};
+
+static struct gpio_led_platform_data raumfeld_lt3593_platform_data = {
+        .leds           = &raumfeld_lt3593_led,
+        .num_leds       = 1,
+};
+
+static struct platform_device raumfeld_lt3593_device = {
+        .name   = "leds-lt3593",
+        .id     = -1,
+        .dev    = {
+                .platform_data = &raumfeld_lt3593_platform_data,
+        },
+};
+
+static struct pxafb_mode_info sharp_lq043t3dx02_mode = {
+        .pixclock       = 111000,
+        .xres           = 480,
+        .yres           = 272,
+        .bpp            = 16,
+        .hsync_len      = 4,
+        .left_margin    = 2,
+        .right_margin   = 1,
+        .vsync_len      = 1,
+        .upper_margin   = 3,
+        .lower_margin   = 1,
+        .sync           = 0,
+};
+
+static struct pxafb_mach_info raumfeld_sharp_lcd_info = {
+        .modes          = &sharp_lq043t3dx02_mode,
+        .num_modes      = 1,
+        .video_mem_size = 0x400000,
+        .lcd_conn       = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
+};
+
+static void __init raumfeld_lcd_init(void)
+{
+        int ret;
+
+        set_pxa_fb_info(&raumfeld_sharp_lcd_info);
+
+        /* Earlier devices had the backlight regulator controlled
+         * via PWM, later versions use another controller for that */
+        if ((system_rev & 0xff) < 2) {
+                mfp_cfg_t raumfeld_pwm_pin_config = GPIO17_PWM0_OUT;
+                pxa3xx_mfp_config(&raumfeld_pwm_pin_config, 1);
+                platform_device_register(&raumfeld_pwm_backlight_device);
+        } else
+                platform_device_register(&raumfeld_lt3593_device);
+
+        ret = gpio_request(GPIO_TFT_VA_EN, "display VA enable");
+        if (ret < 0)
+                pr_warning("Unable to request GPIO_TFT_VA_EN\n");
+        else
+                gpio_direction_output(GPIO_TFT_VA_EN, 1);
+
+        ret = gpio_request(GPIO_DISPLAY_ENABLE, "display enable");
+        if (ret < 0)
+                pr_warning("Unable to request GPIO_DISPLAY_ENABLE\n");
+        else
+                gpio_direction_output(GPIO_DISPLAY_ENABLE, 1);
+}
+
+/**
+ * SPI devices
+ */
+
+struct spi_gpio_platform_data raumfeld_spi_platform_data = {
+        .sck            = GPIO_SPI_CLK,
+        .mosi           = GPIO_SPI_MOSI,
+        .miso           = GPIO_SPI_MISO,
+        .num_chipselect = 3,
+};
+
+static struct platform_device raumfeld_spi_device = {
+        .name   = "spi_gpio",
+        .id     = 0,
+        .dev    = {
+                .platform_data  = &raumfeld_spi_platform_data,
+        }
+};
+
+static struct lis3lv02d_platform_data lis3_pdata = {
+        .click_flags    = LIS3_CLICK_SINGLE_X |
+                          LIS3_CLICK_SINGLE_Y |
+                          LIS3_CLICK_SINGLE_Z,
+        .irq_cfg        = LIS3_IRQ1_CLICK | LIS3_IRQ2_CLICK,
+        .wakeup_flags   = LIS3_WAKEUP_X_LO | LIS3_WAKEUP_X_HI |
+                          LIS3_WAKEUP_Y_LO | LIS3_WAKEUP_Y_HI |
+                          LIS3_WAKEUP_Z_LO | LIS3_WAKEUP_Z_HI,
+        .wakeup_thresh  = 10,
+        .click_thresh_x = 10,
+        .click_thresh_y = 10,
+        .click_thresh_z = 10,
+};
+
+#define SPI_AK4104      \
+{                       \
+        .modalias       = "ak4104",     \
+        .max_speed_hz   = 10000,        \
+        .bus_num        = 0,            \
+        .chip_select    = 0,            \
+        .controller_data = (void *) GPIO_SPDIF_CS,      \
+}
+
+#define SPI_LIS3        \
+{                       \
+        .modalias       = "lis3lv02d_spi",      \
+        .max_speed_hz   = 1000000,              \
+        .bus_num        = 0,                    \
+        .chip_select    = 1,                    \
+        .controller_data = (void *) GPIO_ACCEL_CS,      \
+        .platform_data  = &lis3_pdata,          \
+        .irq            = gpio_to_irq(GPIO_ACCEL_IRQ),  \
+}
+
+#define SPI_DAC7512     \
+{       \
+        .modalias       = "dac7512",            \
+        .max_speed_hz   = 1000000,              \
+        .bus_num        = 0,                    \
+        .chip_select    = 2,                    \
+        .controller_data = (void *) GPIO_MCLK_DAC_CS,   \
+}
+
+static struct spi_board_info connector_spi_devices[] __initdata = {
+        SPI_AK4104,
+        SPI_DAC7512,
+};
+
+static struct spi_board_info speaker_spi_devices[] __initdata = {
+        SPI_DAC7512,
+};
+
+static struct spi_board_info controller_spi_devices[] __initdata = {
+        SPI_LIS3,
+};
+
+/**
+ * MMC for Marvell Libertas 8688 via SDIO
+ */
+
+static int raumfeld_mci_init(struct device *dev, irq_handler_t isr, void *data)
+{
+        gpio_set_value(GPIO_W2W_RESET, 1);
+        gpio_set_value(GPIO_W2W_PDN, 1);
+
+        return 0;
+}
+
+static void raumfeld_mci_exit(struct device *dev, void *data)
+{
+        gpio_set_value(GPIO_W2W_RESET, 0);
+        gpio_set_value(GPIO_W2W_PDN, 0);
+}
+
+static struct pxamci_platform_data raumfeld_mci_platform_data = {
+        .init                   = raumfeld_mci_init,
+        .exit                   = raumfeld_mci_exit,
+        .detect_delay           = 20,
+        .gpio_card_detect       = -1,
+        .gpio_card_ro           = -1,
+        .gpio_power             = -1,
+};
+
+/*
+ * External power / charge logic
+ */
+
+static int power_supply_init(struct device *dev)
+{
+        return 0;
+}
+
+static void power_supply_exit(struct device *dev)
+{
+}
+
+static int raumfeld_is_ac_online(void)
+{
+        return !gpio_get_value(GPIO_CHARGE_DC_OK);
+}
+
+static int raumfeld_is_usb_online(void)
+{
+        return 0;
+}
+
+static char *raumfeld_power_supplicants[] = { "ds2760-battery.0" };
+
+static struct pda_power_pdata power_supply_info = {
+        .init                   = power_supply_init,
+        .is_ac_online           = raumfeld_is_ac_online,
+        .is_usb_online          = raumfeld_is_usb_online,
+        .exit                   = power_supply_exit,
+        .supplied_to            = raumfeld_power_supplicants,
+        .num_supplicants        = ARRAY_SIZE(raumfeld_power_supplicants)
+};
+
+static struct resource power_supply_resources[] = {
+        {
+                .name  = "ac",
+                .flags = IORESOURCE_IRQ |
+                         IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE,
+                .start = GPIO_CHARGE_DC_OK,
+                .end   = GPIO_CHARGE_DC_OK,
+        },
+};
+
+static irqreturn_t charge_done_irq(int irq, void *dev_id)
+{
+        struct power_supply *psy;
+
+        psy = power_supply_get_by_name("ds2760-battery.0");
+
+        if (psy)
+                power_supply_set_battery_charged(psy);
+
+        return IRQ_HANDLED;
+}
+
+static struct platform_device raumfeld_power_supply = {
+        .name = "pda-power",
+        .id   = -1,
+        .dev  = {
+                .platform_data = &power_supply_info,
+        },
+        .resource      = power_supply_resources,
+        .num_resources = ARRAY_SIZE(power_supply_resources),
+};
+
+static void __init raumfeld_power_init(void)
+{
+        int ret;
+
+        /* Set PEN2 high to enable maximum charge current */
+        ret = gpio_request(GPIO_CHRG_PEN2, "CHRG_PEN2");
+        if (ret < 0)
+                pr_warning("Unable to request GPIO_CHRG_PEN2\n");
+        else
+                gpio_direction_output(GPIO_CHRG_PEN2, 1);
+
+        ret = gpio_request(GPIO_CHARGE_DC_OK, "CABLE_DC_OK");
+        if (ret < 0)
+                pr_warning("Unable to request GPIO_CHARGE_DC_OK\n");
+
+        ret = gpio_request(GPIO_CHARGE_USB_SUSP, "CHARGE_USB_SUSP");
+        if (ret < 0)
+                pr_warning("Unable to request GPIO_CHARGE_USB_SUSP\n");
+        else
+                gpio_direction_output(GPIO_CHARGE_USB_SUSP, 0);
+
+        power_supply_resources[0].start = gpio_to_irq(GPIO_CHARGE_DC_OK);
+        power_supply_resources[0].end = gpio_to_irq(GPIO_CHARGE_DC_OK);
+
+        ret = request_irq(gpio_to_irq(GPIO_CHARGE_DONE),
+                        &charge_done_irq, IORESOURCE_IRQ_LOWEDGE,
+                        "charge_done", NULL);
+
+        if (ret < 0)
+                printk(KERN_ERR "%s: unable to register irq %d\n", __func__,
+                        GPIO_CHARGE_DONE);
+        else
+                platform_device_register(&raumfeld_power_supply);
+}
+
+/* Fixed regulator for AUDIO_VA, 0-0048 maps to the cs4270 codec device */
+
+static struct regulator_consumer_supply audio_va_consumer_supply =
+        REGULATOR_SUPPLY("va", "0-0048");
+
+struct regulator_init_data audio_va_initdata = {
+        .consumer_supplies = &audio_va_consumer_supply,
+        .num_consumer_supplies = 1,
+        .constraints = {
+                .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+        },
+};
+
+static struct fixed_voltage_config audio_va_config = {
+        .supply_name            = "audio_va",
+        .microvolts             = 5000000,
+        .gpio                   = GPIO_AUDIO_VA_ENABLE,
+        .enable_high            = 1,
+        .enabled_at_boot        = 0,
+        .init_data              = &audio_va_initdata,
+};
+
+static struct platform_device audio_va_device = {
+        .name   = "reg-fixed-voltage",
+        .id     = 0,
+        .dev    = {
+                .platform_data = &audio_va_config,
+        },
+};
+
+/* Dummy supplies for Codec's VD/VLC */
+
+static struct regulator_consumer_supply audio_dummy_supplies[] = {
+        REGULATOR_SUPPLY("vd", "0-0048"),
+        REGULATOR_SUPPLY("vlc", "0-0048"),
+};
+
+struct regulator_init_data audio_dummy_initdata = {
+        .consumer_supplies = audio_dummy_supplies,
+        .num_consumer_supplies = ARRAY_SIZE(audio_dummy_supplies),
+        .constraints = {
+                .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+        },
+};
+
+static struct fixed_voltage_config audio_dummy_config = {
+        .supply_name            = "audio_vd",
+        .microvolts             = 3300000,
+        .gpio                   = -1,
+        .init_data              = &audio_dummy_initdata,
+};
+
+static struct platform_device audio_supply_dummy_device = {
+        .name   = "reg-fixed-voltage",
+        .id     = 1,
+        .dev    = {
+                .platform_data = &audio_dummy_config,
+        },
+};
+
+static struct platform_device *audio_regulator_devices[] = {
+        &audio_va_device,
+        &audio_supply_dummy_device,
+};
+
+/**
+ * Regulator support via MAX8660
+ */
+
+static struct regulator_consumer_supply vcc_mmc_supply =
+        REGULATOR_SUPPLY("vmmc", "pxa2xx-mci.0");
+
+static struct regulator_init_data vcc_mmc_init_data = {
+        .constraints = {
+                .min_uV                 = 3300000,
+                .max_uV                 = 3300000,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL,
+                .valid_ops_mask         = REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_VOLTAGE |
+                                          REGULATOR_CHANGE_MODE,
+        },
+        .consumer_supplies = &vcc_mmc_supply,
+        .num_consumer_supplies = 1,
+};
+
+struct max8660_subdev_data max8660_v6_subdev_data = {
+        .id             = MAX8660_V6,
+        .name           = "vmmc",
+        .platform_data  = &vcc_mmc_init_data,
+};
+
+static struct max8660_platform_data max8660_pdata = {
+        .subdevs = &max8660_v6_subdev_data,
+        .num_subdevs = 1,
+};
+
+/**
+ * I2C devices
+ */
+
+static struct i2c_board_info raumfeld_pwri2c_board_info = {
+        .type           = "max8660",
+        .addr           = 0x34,
+        .platform_data  = &max8660_pdata,
+};
+
+static struct i2c_board_info raumfeld_connector_i2c_board_info __initdata = {
+        .type   = "cs4270",
+        .addr   = 0x48,
+};
+
+static struct eeti_ts_platform_data eeti_ts_pdata = {
+        .irq_active_high = 1,
+};
+
+static struct i2c_board_info raumfeld_controller_i2c_board_info __initdata = {
+        .type   = "eeti_ts",
+        .addr   = 0x0a,
+        .irq    = gpio_to_irq(GPIO_TOUCH_IRQ),
+        .platform_data = &eeti_ts_pdata,
+};
+
+static struct platform_device *raumfeld_common_devices[] = {
+        &raumfeld_gpio_keys_device,
+        &raumfeld_led_device,
+        &raumfeld_spi_device,
+};
+
+static void __init raumfeld_audio_init(void)
+{
+        int ret;
+
+        ret = gpio_request(GPIO_CODEC_RESET, "cs4270 reset");
+        if (ret < 0)
+                pr_warning("unable to request GPIO_CODEC_RESET\n");
+        else
+                gpio_direction_output(GPIO_CODEC_RESET, 1);
+
+        ret = gpio_request(GPIO_SPDIF_RESET, "ak4104 s/pdif reset");
+        if (ret < 0)
+                pr_warning("unable to request GPIO_SPDIF_RESET\n");
+        else
+                gpio_direction_output(GPIO_SPDIF_RESET, 1);
+
+        ret = gpio_request(GPIO_MCLK_RESET, "MCLK reset");
+        if (ret < 0)
+                pr_warning("unable to request GPIO_MCLK_RESET\n");
+        else
+                gpio_direction_output(GPIO_MCLK_RESET, 1);
+
+        platform_add_devices(ARRAY_AND_SIZE(audio_regulator_devices));
+}
+
+static void __init raumfeld_common_init(void)
+{
+        int ret;
+
+        /* The on/off button polarity has changed after revision 1 */
+        if ((system_rev & 0xff) > 1) {
+                int i;
+
+                for (i = 0; i < ARRAY_SIZE(gpio_keys_button); i++)
+                        if (!strcmp(gpio_keys_button[i].desc, "on/off button"))
+                                gpio_keys_button[i].active_low = 1;
+        }
+
+        enable_irq_wake(IRQ_WAKEUP0);
+
+        pxa3xx_set_nand_info(&raumfeld_nand_info);
+        pxa3xx_set_i2c_power_info(NULL);
+        pxa_set_ohci_info(&raumfeld_ohci_info);
+        pxa_set_mci_info(&raumfeld_mci_platform_data);
+        pxa_set_i2c_info(NULL);
+        pxa_set_ffuart_info(NULL);
+
+        ret = gpio_request(GPIO_W2W_RESET, "Wi2Wi reset");
+        if (ret < 0)
+                pr_warning("Unable to request GPIO_W2W_RESET\n");
+        else
+                gpio_direction_output(GPIO_W2W_RESET, 0);
+
+        ret = gpio_request(GPIO_W2W_PDN, "Wi2Wi powerup");
+        if (ret < 0)
+                pr_warning("Unable to request GPIO_W2W_PDN\n");
+        else
+                gpio_direction_output(GPIO_W2W_PDN, 0);
+
+        /* this can be used to switch off the device */
+        ret = gpio_request(GPIO_SHUTDOWN_SUPPLY,
+                                "supply shutdown");
+        if (ret < 0)
+                pr_warning("Unable to request GPIO_SHUTDOWN_SUPPLY\n");
+        else
+                gpio_direction_output(GPIO_SHUTDOWN_SUPPLY, 0);
+
+        platform_add_devices(ARRAY_AND_SIZE(raumfeld_common_devices));
+        i2c_register_board_info(1, &raumfeld_pwri2c_board_info, 1);
+}
+
+static void __init raumfeld_controller_init(void)
+{
+        int ret;
+
+        pxa3xx_mfp_config(ARRAY_AND_SIZE(raumfeld_controller_pin_config));
+        platform_device_register(&rotary_encoder_device);
+        spi_register_board_info(ARRAY_AND_SIZE(controller_spi_devices));
+        i2c_register_board_info(0, &raumfeld_controller_i2c_board_info, 1);
+
+        ret = gpio_request(GPIO_SHUTDOWN_BATT, "battery shutdown");
+        if (ret < 0)
+                pr_warning("Unable to request GPIO_SHUTDOWN_BATT\n");
+        else
+                gpio_direction_output(GPIO_SHUTDOWN_BATT, 0);
+
+        raumfeld_common_init();
+        raumfeld_power_init();
+        raumfeld_lcd_init();
+        raumfeld_w1_init();
+}
+
+static void __init raumfeld_connector_init(void)
+{
+        pxa3xx_mfp_config(ARRAY_AND_SIZE(raumfeld_connector_pin_config));
+        spi_register_board_info(ARRAY_AND_SIZE(connector_spi_devices));
+        i2c_register_board_info(0, &raumfeld_connector_i2c_board_info, 1);
+
+        platform_device_register(&smc91x_device);
+
+        raumfeld_audio_init();
+        raumfeld_common_init();
+}
+
+static void __init raumfeld_speaker_init(void)
+{
+        pxa3xx_mfp_config(ARRAY_AND_SIZE(raumfeld_speaker_pin_config));
+        spi_register_board_info(ARRAY_AND_SIZE(speaker_spi_devices));
+        i2c_register_board_info(0, &raumfeld_connector_i2c_board_info, 1);
+
+        platform_device_register(&smc91x_device);
+        platform_device_register(&rotary_encoder_device);
+
+        raumfeld_audio_init();
+        raumfeld_common_init();
+}
+
+/* physical memory regions */
+#define RAUMFELD_SDRAM_BASE     0xa0000000      /* SDRAM region */
+
+#ifdef CONFIG_MACH_RAUMFELD_RC
+MACHINE_START(RAUMFELD_RC, "Raumfeld Controller")
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = RAUMFELD_SDRAM_BASE + 0x100,
+        .init_machine   = raumfeld_controller_init,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa3xx_init_irq,
+        .timer          = &pxa_timer,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_RAUMFELD_CONNECTOR
+MACHINE_START(RAUMFELD_CONNECTOR, "Raumfeld Connector")
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = RAUMFELD_SDRAM_BASE + 0x100,
+        .init_machine   = raumfeld_connector_init,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa3xx_init_irq,
+        .timer          = &pxa_timer,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_RAUMFELD_SPEAKER
+MACHINE_START(RAUMFELD_SPEAKER, "Raumfeld Speaker")
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = RAUMFELD_SDRAM_BASE + 0x100,
+        .init_machine   = raumfeld_speaker_init,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa3xx_init_irq,
+        .timer          = &pxa_timer,
+MACHINE_END
+#endif
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index 67229a1ef55..463d874bb86 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -900,7 +900,7 @@ static struct platform_suspend_ops sharpsl_pm_ops = {
 };
 #endif
 
-static int __init sharpsl_pm_probe(struct platform_device *pdev)
+static int __devinit sharpsl_pm_probe(struct platform_device *pdev)
 {
         int ret;
 
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 28352c0b8c3..19b5109d980 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -56,25 +56,7 @@ static unsigned long spitz_pin_config[] __initdata = {
         GPIO80_nCS_4,   /* SCOOP #1 */
 
         /* LCD - 16bpp Active TFT */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* PC Card */
         GPIO48_nPOE,
diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c
index 9ebe658590f..a81d6dbf662 100644
--- a/arch/arm/mach-pxa/ssp.c
+++ b/arch/arm/mach-pxa/ssp.c
@@ -35,6 +35,8 @@
 #include <mach/ssp.h>
 #include <mach/regs-ssp.h>
 
+#ifdef CONFIG_PXA_SSP_LEGACY
+
 #define TIMEOUT 100000
 
 static irqreturn_t ssp_interrupt(int irq, void *dev_id)
@@ -303,6 +305,7 @@ void ssp_exit(struct ssp_dev *dev)
         clk_disable(ssp->clk);
         ssp_free(ssp);
 }
+#endif /* CONFIG_PXA_SSP_LEGACY */
 
 static DEFINE_MUTEX(ssp_lock);
 static LIST_HEAD(ssp_list);
@@ -488,6 +491,7 @@ static void __exit pxa_ssp_exit(void)
 arch_initcall(pxa_ssp_init);
 module_exit(pxa_ssp_exit);
 
+#ifdef CONFIG_PXA_SSP_LEGACY
 EXPORT_SYMBOL(ssp_write_word);
 EXPORT_SYMBOL(ssp_read_word);
 EXPORT_SYMBOL(ssp_flush);
@@ -498,6 +502,7 @@ EXPORT_SYMBOL(ssp_restore_state);
 EXPORT_SYMBOL(ssp_init);
 EXPORT_SYMBOL(ssp_exit);
 EXPORT_SYMBOL(ssp_config);
+#endif
 
 MODULE_DESCRIPTION("PXA SSP driver");
 MODULE_AUTHOR("Liam Girdwood");
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index a98a434f011..2041eb1d90b 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -764,11 +764,6 @@ static void __init stargate2_init(void)
         pxa_set_btuart_info(NULL);
         pxa_set_stuart_info(NULL);
 
-        /* spi chip selects */
-        gpio_direction_output(37, 0);
-        gpio_direction_output(24, 0);
-        gpio_direction_output(39, 0);
-
         platform_add_devices(ARRAY_AND_SIZE(stargate2_devices));
 
         pxa2xx_set_spi_info(1, &pxa_ssp_master_0_info);
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index 750c448db67..293e40aeaf2 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -76,14 +76,12 @@ pxa_ost0_interrupt(int irq, void *dev_id)
 static int
 pxa_osmr0_set_next_event(unsigned long delta, struct clock_event_device *dev)
 {
-        unsigned long flags, next, oscr;
+        unsigned long next, oscr;
 
-        raw_local_irq_save(flags);
         OIER |= OIER_E0;
         next = OSCR + delta;
         OSMR0 = next;
         oscr = OSCR;
-        raw_local_irq_restore(flags);
 
         return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;
 }
@@ -91,23 +89,17 @@ pxa_osmr0_set_next_event(unsigned long delta, struct clock_event_device *dev)
 static void
 pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
 {
-        unsigned long irqflags;
-
         switch (mode) {
         case CLOCK_EVT_MODE_ONESHOT:
-                raw_local_irq_save(irqflags);
                 OIER &= ~OIER_E0;
                 OSSR = OSSR_M0;
-                raw_local_irq_restore(irqflags);
                 break;
 
         case CLOCK_EVT_MODE_UNUSED:
         case CLOCK_EVT_MODE_SHUTDOWN:
                 /* initializing, released, or preparing for suspend */
-                raw_local_irq_save(irqflags);
                 OIER &= ~OIER_E0;
                 OSSR = OSSR_M0;
-                raw_local_irq_restore(irqflags);
                 break;
 
         case CLOCK_EVT_MODE_RESUME:
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index c854c168a45..ad552791c4c 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -32,6 +32,7 @@
 #include <linux/gpio.h>
 #include <linux/pda_power.h>
 #include <linux/spi/spi.h>
+#include <linux/input/matrix_keypad.h>
 
 #include <asm/setup.h>
 #include <asm/mach-types.h>
@@ -131,24 +132,24 @@ static unsigned long tosa_pin_config[] = {
         GPIO45_BTUART_RTS,
 
         /* Keybd */
-        GPIO58_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO59_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO60_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO61_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO62_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO63_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO64_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO65_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO66_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO67_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO68_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO69_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO70_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO71_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO72_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO73_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO74_GPIO | MFP_LPM_DRIVE_LOW,
-        GPIO75_GPIO | MFP_LPM_DRIVE_LOW,
+        GPIO58_GPIO | MFP_LPM_DRIVE_LOW,        /* Column 0 */
+        GPIO59_GPIO | MFP_LPM_DRIVE_LOW,        /* Column 1 */
+        GPIO60_GPIO | MFP_LPM_DRIVE_LOW,        /* Column 2 */
+        GPIO61_GPIO | MFP_LPM_DRIVE_LOW,        /* Column 3 */
+        GPIO62_GPIO | MFP_LPM_DRIVE_LOW,        /* Column 4 */
+        GPIO63_GPIO | MFP_LPM_DRIVE_LOW,        /* Column 5 */
+        GPIO64_GPIO | MFP_LPM_DRIVE_LOW,        /* Column 6 */
+        GPIO65_GPIO | MFP_LPM_DRIVE_LOW,        /* Column 7 */
+        GPIO66_GPIO | MFP_LPM_DRIVE_LOW,        /* Column 8 */
+        GPIO67_GPIO | MFP_LPM_DRIVE_LOW,        /* Column 9 */
+        GPIO68_GPIO | MFP_LPM_DRIVE_LOW,        /* Column 10 */
+        GPIO69_GPIO | MFP_LPM_DRIVE_LOW,        /* Row 0 */
+        GPIO70_GPIO | MFP_LPM_DRIVE_LOW,        /* Row 1 */
+        GPIO71_GPIO | MFP_LPM_DRIVE_LOW,        /* Row 2 */
+        GPIO72_GPIO | MFP_LPM_DRIVE_LOW,        /* Row 3 */
+        GPIO73_GPIO | MFP_LPM_DRIVE_LOW,        /* Row 4 */
+        GPIO74_GPIO | MFP_LPM_DRIVE_LOW,        /* Row 5 */
+        GPIO75_GPIO | MFP_LPM_DRIVE_LOW,        /* Row 6 */
 
         /* SPI */
         GPIO81_SSP2_CLK_OUT,
@@ -411,9 +412,87 @@ static struct platform_device tosa_power_device = {
 /*
  * Tosa Keyboard
  */
+static const uint32_t tosakbd_keymap[] = {
+        KEY(0, 2, KEY_W),
+        KEY(0, 6, KEY_K),
+        KEY(0, 7, KEY_BACKSPACE),
+        KEY(0, 8, KEY_P),
+        KEY(1, 1, KEY_Q),
+        KEY(1, 2, KEY_E),
+        KEY(1, 3, KEY_T),
+        KEY(1, 4, KEY_Y),
+        KEY(1, 6, KEY_O),
+        KEY(1, 7, KEY_I),
+        KEY(1, 8, KEY_COMMA),
+        KEY(2, 1, KEY_A),
+        KEY(2, 2, KEY_D),
+        KEY(2, 3, KEY_G),
+        KEY(2, 4, KEY_U),
+        KEY(2, 6, KEY_L),
+        KEY(2, 7, KEY_ENTER),
+        KEY(2, 8, KEY_DOT),
+        KEY(3, 1, KEY_Z),
+        KEY(3, 2, KEY_C),
+        KEY(3, 3, KEY_V),
+        KEY(3, 4, KEY_J),
+        KEY(3, 5, TOSA_KEY_ADDRESSBOOK),
+        KEY(3, 6, TOSA_KEY_CANCEL),
+        KEY(3, 7, TOSA_KEY_CENTER),
+        KEY(3, 8, TOSA_KEY_OK),
+        KEY(3, 9, KEY_LEFTSHIFT),
+        KEY(4, 1, KEY_S),
+        KEY(4, 2, KEY_R),
+        KEY(4, 3, KEY_B),
+        KEY(4, 4, KEY_N),
+        KEY(4, 5, TOSA_KEY_CALENDAR),
+        KEY(4, 6, TOSA_KEY_HOMEPAGE),
+        KEY(4, 7, KEY_LEFTCTRL),
+        KEY(4, 8, TOSA_KEY_LIGHT),
+        KEY(4, 10, KEY_RIGHTSHIFT),
+        KEY(5, 1, KEY_TAB),
+        KEY(5, 2, KEY_SLASH),
+        KEY(5, 3, KEY_H),
+        KEY(5, 4, KEY_M),
+        KEY(5, 5, TOSA_KEY_MENU),
+        KEY(5, 7, KEY_UP),
+        KEY(5, 11, TOSA_KEY_FN),
+        KEY(6, 1, KEY_X),
+        KEY(6, 2, KEY_F),
+        KEY(6, 3, KEY_SPACE),
+        KEY(6, 4, KEY_APOSTROPHE),
+        KEY(6, 5, TOSA_KEY_MAIL),
+        KEY(6, 6, KEY_LEFT),
+        KEY(6, 7, KEY_DOWN),
+        KEY(6, 8, KEY_RIGHT),
+};
+
+static struct matrix_keymap_data tosakbd_keymap_data = {
+        .keymap         = tosakbd_keymap,
+        .keymap_size    = ARRAY_SIZE(tosakbd_keymap),
+};
+
+static const int tosakbd_col_gpios[] =
+                        { 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68 };
+static const int tosakbd_row_gpios[] =
+                        { 69, 70, 71, 72, 73, 74, 75 };
+
+static struct matrix_keypad_platform_data tosakbd_pdata = {
+        .keymap_data            = &tosakbd_keymap_data,
+        .row_gpios              = tosakbd_row_gpios,
+        .col_gpios              = tosakbd_col_gpios,
+        .num_row_gpios          = ARRAY_SIZE(tosakbd_row_gpios),
+        .num_col_gpios          = ARRAY_SIZE(tosakbd_col_gpios),
+        .col_scan_delay_us      = 10,
+        .debounce_ms            = 10,
+        .wakeup                 = 1,
+};
+
 static struct platform_device tosakbd_device = {
-        .name           = "tosa-keyboard",
+        .name           = "matrix-keypad",
         .id             = -1,
+        .dev            = {
+                .platform_data = &tosakbd_pdata,
+        },
 };
 
 static struct gpio_keys_button tosa_gpio_keys[] = {
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 0aa858ebc57..797f2544d0c 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -72,27 +72,14 @@ static unsigned long trizeps4_pin_config[] __initdata = {
         GPIO79_nCS_3,           /* Logic CS */
         GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,       /* Logic irq */
 
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+
         /* LCD - 16bpp Active TFT */
-        GPIO58_LCD_LDD_0,
-        GPIO59_LCD_LDD_1,
-        GPIO60_LCD_LDD_2,
-        GPIO61_LCD_LDD_3,
-        GPIO62_LCD_LDD_4,
-        GPIO63_LCD_LDD_5,
-        GPIO64_LCD_LDD_6,
-        GPIO65_LCD_LDD_7,
-        GPIO66_LCD_LDD_8,
-        GPIO67_LCD_LDD_9,
-        GPIO68_LCD_LDD_10,
-        GPIO69_LCD_LDD_11,
-        GPIO70_LCD_LDD_12,
-        GPIO71_LCD_LDD_13,
-        GPIO72_LCD_LDD_14,
-        GPIO73_LCD_LDD_15,
-        GPIO74_LCD_FCLK,
-        GPIO75_LCD_LCLK,
-        GPIO76_LCD_PCLK,
-        GPIO77_LCD_BIAS,
+        GPIOxx_LCD_TFT_16BPP,
 
         /* UART */
         GPIO9_FFUART_CTS,
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index 89f258c9e12..9e0c5c3988a 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -27,6 +27,7 @@
 #include <linux/delay.h>
 #include <linux/fs.h>
 #include <linux/init.h>
+#include <linux/slab.h>
 #include <linux/interrupt.h>
 #include <linux/major.h>
 #include <linux/module.h>
@@ -281,7 +282,7 @@ static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
         do {
                 /* we're in a chained irq handler,
                  * so ack the interrupt by hand */
-                GEDR(VIPER_CPLD_GPIO) = GPIO_bit(VIPER_CPLD_GPIO);
+                desc->chip->ack(irq);
 
                 if (likely(pending)) {
                         irq = viper_bit_to_irq(__ffs(pending));
@@ -711,6 +712,12 @@ static mfp_cfg_t viper_pin_config[] __initdata = {
         GPIO80_nCS_4,
         GPIO33_nCS_5,
 
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+
         /* FP Backlight */
         GPIO9_GPIO,                             /* VIPER_BCKLIGHT_EN_GPIO */
         GPIO10_GPIO,                            /* VIPER_LCD_EN_GPIO */
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 75f2a37f945..39896d88358 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -26,6 +26,7 @@
 #include <linux/i2c.h>
 #include <linux/i2c/pca953x.h>
 #include <linux/apm-emulation.h>
+#include <linux/can/platform/mcp251x.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -387,11 +388,47 @@ static struct pxa2xx_spi_master pxa2xx_spi_ssp3_master_info = {
         .enable_dma     = 1,
 };
 
-static struct platform_device pxa2xx_spi_ssp3_device = {
-        .name = "pxa2xx-spi",
-        .id = 3,
-        .dev = {
-                .platform_data = &pxa2xx_spi_ssp3_master_info,
+/* CAN bus on SPI */
+static int zeus_mcp2515_setup(struct spi_device *sdev)
+{
+        int err;
+
+        err = gpio_request(ZEUS_CAN_SHDN_GPIO, "CAN shutdown");
+        if (err)
+                return err;
+
+        err = gpio_direction_output(ZEUS_CAN_SHDN_GPIO, 1);
+        if (err) {
+                gpio_free(ZEUS_CAN_SHDN_GPIO);
+                return err;
+        }
+
+        return 0;
+}
+
+static int zeus_mcp2515_transceiver_enable(int enable)
+{
+        gpio_set_value(ZEUS_CAN_SHDN_GPIO, !enable);
+        return 0;
+}
+
+static struct mcp251x_platform_data zeus_mcp2515_pdata = {
+        .oscillator_frequency   = 16*1000*1000,
+        .model                  = CAN_MCP251X_MCP2515,
+        .board_specific_setup   = zeus_mcp2515_setup,
+        .transceiver_enable     = zeus_mcp2515_transceiver_enable,
+        .power_enable           = zeus_mcp2515_transceiver_enable,
+};
+
+static struct spi_board_info zeus_spi_board_info[] = {
+        [0] = {
+                .modalias       = "mcp251x",
+                .platform_data  = &zeus_mcp2515_pdata,
+                .irq            = gpio_to_irq(ZEUS_CAN_GPIO),
+                .max_speed_hz   = 1*1000*1000,
+                .bus_num        = 3,
+                .mode           = SPI_MODE_0,
+                .chip_select    = 0,
         },
 };
 
@@ -457,15 +494,28 @@ static struct platform_device zeus_pcmcia_device = {
         },
 };
 
+static struct resource zeus_max6369_resource = {
+        .start          = ZEUS_CPLD_EXTWDOG_PHYS,
+        .end            = ZEUS_CPLD_EXTWDOG_PHYS,
+        .flags          = IORESOURCE_MEM,
+};
+
+struct platform_device zeus_max6369_device = {
+        .name           = "max6369_wdt",
+        .id             = -1,
+        .resource       = &zeus_max6369_resource,
+        .num_resources  = 1,
+};
+
 static struct platform_device *zeus_devices[] __initdata = {
         &zeus_serial_device,
         &zeus_mtd_devices[0],
         &zeus_dm9k0_device,
         &zeus_dm9k1_device,
         &zeus_sram_device,
-        &pxa2xx_spi_ssp3_device,
         &zeus_leds_device,
         &zeus_pcmcia_device,
+        &zeus_max6369_device,
 };
 
 /* AC'97 */
@@ -509,7 +559,9 @@ static void zeus_ohci_exit(struct device *dev)
 
 static struct pxaohci_platform_data zeus_ohci_platform_data = {
         .port_mode      = PMM_NPS_MODE,
-        .flags          = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
+        /* Clear Power Control Polarity Low and set Power Sense
+         * Polarity Low. Supply power to USB ports. */
+        .flags          = ENABLE_PORT_ALL | POWER_SENSE_LOW,
         .init           = zeus_ohci_init,
         .exit           = zeus_ohci_exit,
 };
@@ -621,11 +673,15 @@ static struct pxa2xx_udc_mach_info zeus_udc_info = {
         .udc_command = zeus_udc_command,
 };
 
+#ifdef CONFIG_PM
 static void zeus_power_off(void)
 {
         local_irq_disable();
         pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP);
 }
+#else
+#define zeus_power_off   NULL
+#endif
 
 #ifdef CONFIG_APM_EMULATION
 static void zeus_get_power_status(struct apm_power_info *info)
@@ -706,6 +762,12 @@ static struct i2c_board_info __initdata zeus_i2c_devices[] = {
 };
 
 static mfp_cfg_t zeus_pin_config[] __initdata = {
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+
         GPIO15_nCS_1,
         GPIO78_nCS_2,
         GPIO80_nCS_4,
@@ -731,6 +793,11 @@ static mfp_cfg_t zeus_pin_config[] __initdata = {
         GPIO104_CIF_DD_2,
         GPIO105_CIF_DD_1,
 
+        GPIO81_SSP3_TXD,
+        GPIO82_SSP3_RXD,
+        GPIO83_SSP3_SFRM,
+        GPIO84_SSP3_SCLK,
+
         GPIO48_nPOE,
         GPIO49_nPWE,
         GPIO50_nPIOR,
@@ -785,6 +852,8 @@ static void __init zeus_init(void)
         pxa_set_ac97_info(&zeus_ac97_info);
         pxa_set_i2c_info(NULL);
         i2c_register_board_info(0, ARRAY_AND_SIZE(zeus_i2c_devices));
+        pxa2xx_set_spi_info(3, &pxa2xx_spi_ssp3_master_info);
+        spi_register_board_info(zeus_spi_board_info, ARRAY_SIZE(zeus_spi_board_info));
 }
 
 static struct map_desc zeus_io_desc[] __initdata = {
@@ -807,12 +876,6 @@ static struct map_desc zeus_io_desc[] __initdata = {
                 .type    = MT_DEVICE,
         },
         {
-                .virtual = ZEUS_CPLD_EXTWDOG,
-                .pfn     = __phys_to_pfn(ZEUS_CPLD_EXTWDOG_PHYS),
-                .length  = 0x1000,
-                .type    = MT_DEVICE,
-        },
-        {
                 .virtual = ZEUS_PC104IO,
                 .pfn     = __phys_to_pfn(ZEUS_PC104IO_PHYS),
                 .length  = 0x00800000,
@@ -837,7 +900,7 @@ static void __init zeus_map_io(void)
         PCFR = PCFR_OPDE | PCFR_DC_EN | PCFR_FS | PCFR_FP;
 }
 
-MACHINE_START(ARCOM_ZEUS, "Arcom ZEUS")
+MACHINE_START(ARCOM_ZEUS, "Arcom/Eurotech ZEUS")
         /* Maintainer: Marc Zyngier <maz@misterjones.org> */
         .phys_io        = 0x40000000,
         .io_pg_offst    = ((io_p2v(0x40000000) >> 18) & 0xfffc),
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 90bd4ef71b2..d5a95738f85 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -31,6 +31,7 @@
 #include <linux/smsc911x.h>
 #include <linux/ata_platform.h>
 #include <linux/amba/mmci.h>
+#include <linux/gfp.h>
 
 #include <asm/clkdev.h>
 #include <asm/system.h>
@@ -253,7 +254,7 @@ static unsigned int realview_mmc_status(struct device *dev)
         else
                 mask = 2;
 
-        return readl(REALVIEW_SYSMCI) & mask;
+        return !(readl(REALVIEW_SYSMCI) & mask);
 }
 
 struct mmci_platform_data realview_mmc0_plat_data = {
diff --git a/arch/arm/mach-rpc/dma.c b/arch/arm/mach-rpc/dma.c
index c47d974d52b..85883b2e0e4 100644
--- a/arch/arm/mach-rpc/dma.c
+++ b/arch/arm/mach-rpc/dma.c
@@ -9,7 +9,6 @@
  *
  *  DMA functions specific to RiscPC architecture
  */
-#include <linux/slab.h>
 #include <linux/mman.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
diff --git a/arch/arm/mach-rpc/include/mach/uncompress.h b/arch/arm/mach-rpc/include/mach/uncompress.h
index d5862368c4f..8c9e2c7161c 100644
--- a/arch/arm/mach-rpc/include/mach/uncompress.h
+++ b/arch/arm/mach-rpc/include/mach/uncompress.h
@@ -109,8 +109,6 @@ static inline void flush(void)
 {
 }
 
-static void error(char *x);
-
 /*
  * Setup for decompression
  */
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index 63b753f56c6..0d8e043804c 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -21,7 +21,7 @@
 #include <mach/dma.h>
 
 #include <plat/cpu.h>
-#include <plat/dma-plat.h>
+#include <plat/dma-s3c24xx.h>
 
 #include <plat/regs-serial.h>
 #include <mach/regs-gpio.h>
diff --git a/arch/arm/mach-s3c2410/h1940-bluetooth.c b/arch/arm/mach-s3c2410/h1940-bluetooth.c
index b7d1f8d27bc..a3f3c7b1ca3 100644
--- a/arch/arm/mach-s3c2410/h1940-bluetooth.c
+++ b/arch/arm/mach-s3c2410/h1940-bluetooth.c
@@ -56,7 +56,7 @@ static const struct rfkill_ops h1940bt_rfkill_ops = {
         .set_block = h1940bt_set_block,
 };
 
-static int __init h1940bt_probe(struct platform_device *pdev)
+static int __devinit h1940bt_probe(struct platform_device *pdev)
 {
         struct rfkill *rfk;
         int ret = 0;
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio-core.h b/arch/arm/mach-s3c2410/include/mach/gpio-track.h
index f8b879a7973..acb25910380 100644
--- a/arch/arm/mach-s3c2410/include/mach/gpio-core.h
+++ b/arch/arm/mach-s3c2410/include/mach/gpio-track.h
@@ -15,7 +15,6 @@
 #ifndef __ASM_ARCH_GPIO_CORE_H
 #define __ASM_ARCH_GPIO_CORE_H __FILE__
 
-#include <plat/gpio-core.h>
 #include <mach/regs-gpio.h>
 
 extern struct s3c_gpio_chip s3c24xx_gpios[];
diff --git a/arch/arm/plat-s3c24xx/include/plat/pm-core.h b/arch/arm/mach-s3c2410/include/mach/pm-core.h
index fb45dd9adca..70a83b209e2 100644
--- a/arch/arm/plat-s3c24xx/include/plat/pm-core.h
+++ b/arch/arm/mach-s3c2410/include/mach/pm-core.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c24xx/include/plat/pll.h
+/* linux/arch/arm/mach-s3c2410/include/pm-core.h
  *
  * Copyright 2008 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
index ebc85c6dadb..fd672f330bf 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
@@ -406,31 +406,31 @@
 #define S3C2443_GPE5_SD1_CLK   (0x02 << 10)
 #define S3C2400_GPE5_EINT5     (0x02 << 10)
 #define S3C2400_GPE5_TCLK1     (0x03 << 10)
+#define S3C2443_GPE5_AC_BITCLK (0x03 << 10)
 
 #define S3C2410_GPE6_SDCMD     (0x02 << 12)
 #define S3C2443_GPE6_SD1_CMD   (0x02 << 12)
-#define S3C2443_GPE6_AC_BITCLK (0x03 << 12)
+#define S3C2443_GPE6_AC_SDI    (0x03 << 12)
 #define S3C2400_GPE6_EINT6     (0x02 << 12)
 
 #define S3C2410_GPE7_SDDAT0    (0x02 << 14)
 #define S3C2443_GPE5_SD1_DAT0  (0x02 << 14)
-#define S3C2443_GPE7_AC_SDI    (0x03 << 14)
+#define S3C2443_GPE7_AC_SDO    (0x03 << 14)
 #define S3C2400_GPE7_EINT7     (0x02 << 14)
 
 #define S3C2410_GPE8_SDDAT1    (0x02 << 16)
 #define S3C2443_GPE8_SD1_DAT1  (0x02 << 16)
-#define S3C2443_GPE8_AC_SDO    (0x03 << 16)
+#define S3C2443_GPE8_AC_SYNC   (0x03 << 16)
 #define S3C2400_GPE8_nXDACK0   (0x02 << 16)
 
 #define S3C2410_GPE9_SDDAT2    (0x02 << 18)
 #define S3C2443_GPE9_SD1_DAT2  (0x02 << 18)
-#define S3C2443_GPE9_AC_SYNC   (0x03 << 18)
+#define S3C2443_GPE9_AC_nRESET (0x03 << 18)
 #define S3C2400_GPE9_nXDACK1   (0x02 << 18)
 #define S3C2400_GPE9_nXBACK    (0x03 << 18)
 
 #define S3C2410_GPE10_SDDAT3   (0x02 << 20)
 #define S3C2443_GPE10_SD1_DAT3 (0x02 << 20)
-#define S3C2443_GPE10_AC_nRESET (0x03 << 20)
 #define S3C2400_GPE10_nXDREQ0  (0x02 << 20)
 
 #define S3C2410_GPE11_SPIMISO0 (0x02 << 22)
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
index 6026d091a2f..d87ebe0cb62 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
@@ -42,23 +42,14 @@
 
 #define S3C2443_PLLCON_OFF              (1<<24)
 
-#define S3C2443_CLKSRC_I2S_EXT          (1<<14)
-#define S3C2443_CLKSRC_I2S_EPLLDIV      (0<<14)
-#define S3C2443_CLKSRC_I2S_EPLLREF      (2<<14)
-#define S3C2443_CLKSRC_I2S_EPLLREF3     (3<<14)
-#define S3C2443_CLKSRC_I2S_MASK         (3<<14)
-
 #define S3C2443_CLKSRC_EPLLREF_XTAL     (2<<7)
 #define S3C2443_CLKSRC_EPLLREF_EXTCLK   (3<<7)
 #define S3C2443_CLKSRC_EPLLREF_MPLLREF  (0<<7)
 #define S3C2443_CLKSRC_EPLLREF_MPLLREF2 (1<<7)
 #define S3C2443_CLKSRC_EPLLREF_MASK     (3<<7)
 
-#define S3C2443_CLKSRC_ESYSCLK_EPLL     (1<<6)
-#define S3C2443_CLKSRC_MSYSCLK_MPLL     (1<<4)
 #define S3C2443_CLKSRC_EXTCLK_DIV       (1<<3)
 
-#define S3C2443_CLKDIV0_DVS             (1<<13)
 #define S3C2443_CLKDIV0_HALF_HCLK       (1<<3)
 #define S3C2443_CLKDIV0_HALF_PCLK       (1<<2)
 
@@ -81,28 +72,7 @@
 #define S3C2443_CLKDIV0_ARMDIV_12       (13<<9)
 #define S3C2443_CLKDIV0_ARMDIV_16       (15<<9)
 
-/* S3C2443_CLKDIV1 */
-
-#define S3C2443_CLKDIV1_CAMDIV_MASK     (15<<26)
-#define S3C2443_CLKDIV1_CAMDIV_SHIFT    (26)
-
-#define S3C2443_CLKDIV1_HSSPIDIV_MASK   (3<<24)
-#define S3C2443_CLKDIV1_HSSPIDIV_SHIFT  (24)
-
-#define S3C2443_CLKDIV1_DISPDIV_MASK    (0xff<<16)
-#define S3C2443_CLKDIV1_DISPDIV_SHIFT   (16)
-
-#define S3C2443_CLKDIV1_I2SDIV_MASK     (15<<12)
-#define S3C2443_CLKDIV1_I2SDIV_SHIFT    (12)
-
-#define S3C2443_CLKDIV1_UARTDIV_MASK    (15<<8)
-#define S3C2443_CLKDIV1_UARTDIV_SHIFT   (8)
-
-#define S3C2443_CLKDIV1_HSMMCDIV_MASK   (3<<6)
-#define S3C2443_CLKDIV1_HSMMCDIV_SHIFT  (6)
-
-#define S3C2443_CLKDIV1_USBHOSTDIV_MASK (3<<4)
-#define S3C2443_CLKDIV1_USBHOSTDIV_SHIFT (4)
+/* S3C2443_CLKDIV1 removed, only used in clock.c code */
 
 #define S3C2443_CLKCON_NAND
 
diff --git a/arch/arm/mach-s3c2410/include/mach/spi-gpio.h b/arch/arm/mach-s3c2410/include/mach/spi-gpio.h
index 980a099e209..dcef2287cb3 100644
--- a/arch/arm/mach-s3c2410/include/mach/spi-gpio.h
+++ b/arch/arm/mach-s3c2410/include/mach/spi-gpio.h
@@ -3,7 +3,7 @@
  * Copyright (c) 2006 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
  *
- * S3C2410 - SPI Controller platfrom_device info
+ * S3C2410 - SPI Controller platform_device info
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/plat-s3c/include/mach/timex.h b/arch/arm/mach-s3c2410/include/mach/timex.h
index 2a425ed0a7e..fe9ca1ffd51 100644
--- a/arch/arm/plat-s3c/include/mach/timex.h
+++ b/arch/arm/mach-s3c2410/include/mach/timex.h
@@ -19,8 +19,6 @@
  * for the time conversion functions to/from jiffies is acceptable.
 */
 
-
 #define CLOCK_TICK_RATE 12000000
 
-
 #endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/plat-s3c/include/mach/vmalloc.h b/arch/arm/mach-s3c2410/include/mach/vmalloc.h
index 299d95f365c..315b0078a34 100644
--- a/arch/arm/plat-s3c/include/mach/vmalloc.h
+++ b/arch/arm/mach-s3c2410/include/mach/vmalloc.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c/include/mach/vmalloc.h
+/* arch/arm/mach-s3c2410/include/mach/vmalloc.h
  *
  * from arch/arm/mach-iop3xx/include/mach/vmalloc.h
  *
@@ -15,6 +15,6 @@
 #ifndef __ASM_ARCH_VMALLOC_H
 #define __ASM_ARCH_VMALLOC_H
 
-#define VMALLOC_END       (0xe0000000UL)
+#define VMALLOC_END       (0xE0000000)
 
 #endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c
index 06a84adfb13..7047317ed7f 100644
--- a/arch/arm/mach-s3c2410/mach-amlm5900.c
+++ b/arch/arm/mach-s3c2410/mach-amlm5900.c
@@ -153,7 +153,7 @@ static struct platform_device *amlm5900_devices[] __initdata = {
         &s3c_device_adc,
         &s3c_device_wdt,
         &s3c_device_i2c0,
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_rtc,
         &s3c_device_usbgadget,
         &s3c_device_sdi,
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index 97162fdd059..02b1b6220cb 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -584,7 +584,7 @@ static struct s3c_hwmon_pdata bast_hwmon_info = {
 // cat /sys/devices/platform/s3c24xx-adc/s3c-hwmon/in_0
 
 static struct platform_device *bast_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_lcd,
         &s3c_device_wdt,
         &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 1e34abe1a19..fbedd076094 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -196,7 +196,7 @@ static struct platform_device h1940_device_bluetooth = {
         .id               = -1,
 };
 
-static struct s3c24xx_mci_pdata h1940_mmc_cfg = {
+static struct s3c24xx_mci_pdata h1940_mmc_cfg __initdata = {
         .gpio_detect   = S3C2410_GPF(5),
         .gpio_wprotect = S3C2410_GPH(8),
         .set_power     = NULL,
@@ -272,7 +272,7 @@ static struct platform_device h1940_lcd_powerdev = {
 
 static struct platform_device *h1940_devices[] __initdata = {
         &s3c_device_ts,
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_lcd,
         &s3c_device_wdt,
         &s3c_device_i2c0,
@@ -311,12 +311,11 @@ static void __init h1940_init(void)
         u32 tmp;
 
         s3c24xx_fb_set_platdata(&h1940_fb_info);
+        s3c24xx_mci_set_platdata(&h1940_mmc_cfg);
         s3c24xx_udc_set_platdata(&h1940_udc_cfg);
         s3c24xx_ts_set_platdata(&h1940_ts_cfg);
         s3c_i2c0_set_platdata(NULL);
 
-        s3c_device_sdi.dev.platform_data = &h1940_mmc_cfg;
-
         /* Turn off suspend on both USB ports, and switch the
          * selectable USB port to USB device mode. */
 
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c
index 0405712c226..684710f8814 100644
--- a/arch/arm/mach-s3c2410/mach-n30.c
+++ b/arch/arm/mach-s3c2410/mach-n30.c
@@ -322,7 +322,7 @@ static struct platform_device *n30_devices[] __initdata = {
         &s3c_device_wdt,
         &s3c_device_i2c0,
         &s3c_device_iis,
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_usbgadget,
         &n30_button_device,
         &n30_blue_led,
diff --git a/arch/arm/mach-s3c2410/mach-otom.c b/arch/arm/mach-s3c2410/mach-otom.c
index f6c7261a4a1..d8c7f2efc1a 100644
--- a/arch/arm/mach-s3c2410/mach-otom.c
+++ b/arch/arm/mach-s3c2410/mach-otom.c
@@ -92,7 +92,7 @@ static struct platform_device otom_device_nor = {
 /* Standard OTOM devices */
 
 static struct platform_device *otom11_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_lcd,
         &s3c_device_wdt,
         &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c
index ab092bcda39..92a4ec375d8 100644
--- a/arch/arm/mach-s3c2410/mach-qt2410.c
+++ b/arch/arm/mach-s3c2410/mach-qt2410.c
@@ -246,7 +246,7 @@ static struct platform_device qt2410_spi = {
 /* Board devices */
 
 static struct platform_device *qt2410_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_lcd,
         &s3c_device_wdt,
         &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c2410/mach-smdk2410.c
index c49126ccb1d..45222304220 100644
--- a/arch/arm/mach-s3c2410/mach-smdk2410.c
+++ b/arch/arm/mach-s3c2410/mach-smdk2410.c
@@ -87,7 +87,7 @@ static struct s3c2410_uartcfg smdk2410_uartcfgs[] __initdata = {
 };
 
 static struct platform_device *smdk2410_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_lcd,
         &s3c_device_wdt,
         &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2410/mach-tct_hammer.c b/arch/arm/mach-s3c2410/mach-tct_hammer.c
index 8fdb0430bd4..929164a8e9b 100644
--- a/arch/arm/mach-s3c2410/mach-tct_hammer.c
+++ b/arch/arm/mach-s3c2410/mach-tct_hammer.c
@@ -129,7 +129,7 @@ static struct platform_device *tct_hammer_devices[] __initdata = {
         &s3c_device_adc,
         &s3c_device_wdt,
         &s3c_device_i2c0,
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_rtc,
         &s3c_device_usbgadget,
         &s3c_device_sdi,
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index 0d61fb57717..9051f0d3112 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -334,7 +334,7 @@ static struct i2c_board_info vr1000_i2c_devs[] __initdata = {
 /* devices for this board */
 
 static struct platform_device *vr1000_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_lcd,
         &s3c_device_wdt,
         &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2410/usb-simtec.c b/arch/arm/mach-s3c2410/usb-simtec.c
index 6b9d0d83a6f..29bd3d987be 100644
--- a/arch/arm/mach-s3c2410/usb-simtec.c
+++ b/arch/arm/mach-s3c2410/usb-simtec.c
@@ -91,7 +91,7 @@ static void usb_simtec_enableoc(struct s3c2410_hcd_info *info, int on)
         }
 }
 
-static struct s3c2410_hcd_info usb_simtec_info = {
+static struct s3c2410_hcd_info usb_simtec_info __initdata = {
         .port[0]        = {
                 .flags  = S3C_HCDFLG_USED
         },
@@ -127,6 +127,6 @@ int usb_simtec_init(void)
         gpio_direction_output(S3C2410_GPB(4), 1);
         gpio_direction_input(S3C2410_GPG(10));
 
-        s3c_device_usb.dev.platform_data = &usb_simtec_info;
+        s3c_ohci_set_platdata(&usb_simtec_info);
         return 0;
 }
diff --git a/arch/arm/mach-s3c2412/clock.c b/arch/arm/mach-s3c2412/clock.c
index a037df5e1c2..0c0505b025c 100644
--- a/arch/arm/mach-s3c2412/clock.c
+++ b/arch/arm/mach-s3c2412/clock.c
@@ -124,7 +124,9 @@ static struct clk clk_usysclk = {
         .name           = "usysclk",
         .id             = -1,
         .parent         = &clk_xtal,
-        .set_parent     = s3c2412_setparent_usysclk,
+        .ops            = &(struct clk_ops) {
+                .set_parent     = s3c2412_setparent_usysclk,
+        },
 };
 
 static struct clk clk_mrefclk = {
@@ -199,10 +201,12 @@ static int s3c2412_setrate_usbsrc(struct clk *clk, unsigned long rate)
 static struct clk clk_usbsrc = {
         .name           = "usbsrc",
         .id             = -1,
-        .get_rate       = s3c2412_getrate_usbsrc,
-        .set_rate       = s3c2412_setrate_usbsrc,
-        .round_rate     = s3c2412_roundrate_usbsrc,
-        .set_parent     = s3c2412_setparent_usbsrc,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s3c2412_getrate_usbsrc,
+                .set_rate       = s3c2412_setrate_usbsrc,
+                .round_rate     = s3c2412_roundrate_usbsrc,
+                .set_parent     = s3c2412_setparent_usbsrc,
+        },
 };
 
 static int s3c2412_setparent_msysclk(struct clk *clk, struct clk *parent)
@@ -225,7 +229,9 @@ static int s3c2412_setparent_msysclk(struct clk *clk, struct clk *parent)
 static struct clk clk_msysclk = {
         .name           = "msysclk",
         .id             = -1,
-        .set_parent     = s3c2412_setparent_msysclk,
+        .ops            = &(struct clk_ops) {
+                .set_parent     = s3c2412_setparent_msysclk,
+        },
 };
 
 static int s3c2412_setparent_armclk(struct clk *clk, struct clk *parent)
@@ -264,7 +270,9 @@ static struct clk clk_armclk = {
         .name           = "armclk",
         .id             = -1,
         .parent         = &clk_msysclk,
-        .set_parent     = s3c2412_setparent_armclk,
+        .ops            = &(struct clk_ops) {
+                .set_parent     = s3c2412_setparent_armclk,
+        },
 };
 
 /* these next clocks have an divider immediately after them,
@@ -337,10 +345,12 @@ static int s3c2412_setrate_uart(struct clk *clk, unsigned long rate)
 static struct clk clk_uart = {
         .name           = "uartclk",
         .id             = -1,
-        .get_rate       = s3c2412_getrate_uart,
-        .set_rate       = s3c2412_setrate_uart,
-        .set_parent     = s3c2412_setparent_uart,
-        .round_rate     = s3c2412_roundrate_clksrc,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s3c2412_getrate_uart,
+                .set_rate       = s3c2412_setrate_uart,
+                .set_parent     = s3c2412_setparent_uart,
+                .round_rate     = s3c2412_roundrate_clksrc,
+        },
 };
 
 static int s3c2412_setparent_i2s(struct clk *clk, struct clk *parent)
@@ -388,10 +398,12 @@ static int s3c2412_setrate_i2s(struct clk *clk, unsigned long rate)
 static struct clk clk_i2s = {
         .name           = "i2sclk",
         .id             = -1,
-        .get_rate       = s3c2412_getrate_i2s,
-        .set_rate       = s3c2412_setrate_i2s,
-        .set_parent     = s3c2412_setparent_i2s,
-        .round_rate     = s3c2412_roundrate_clksrc,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s3c2412_getrate_i2s,
+                .set_rate       = s3c2412_setrate_i2s,
+                .set_parent     = s3c2412_setparent_i2s,
+                .round_rate     = s3c2412_roundrate_clksrc,
+        },
 };
 
 static int s3c2412_setparent_cam(struct clk *clk, struct clk *parent)
@@ -438,10 +450,12 @@ static int s3c2412_setrate_cam(struct clk *clk, unsigned long rate)
 static struct clk clk_cam = {
         .name           = "camif-upll", /* same as 2440 name */
         .id             = -1,
-        .get_rate       = s3c2412_getrate_cam,
-        .set_rate       = s3c2412_setrate_cam,
-        .set_parent     = s3c2412_setparent_cam,
-        .round_rate     = s3c2412_roundrate_clksrc,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s3c2412_getrate_cam,
+                .set_rate       = s3c2412_setrate_cam,
+                .set_parent     = s3c2412_setparent_cam,
+                .round_rate     = s3c2412_roundrate_clksrc,
+        },
 };
 
 /* standard clock definitions */
diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c
index f8d16fc10bc..e880524904e 100644
--- a/arch/arm/mach-s3c2412/dma.c
+++ b/arch/arm/mach-s3c2412/dma.c
@@ -20,7 +20,7 @@
 
 #include <mach/dma.h>
 
-#include <plat/dma-plat.h>
+#include <plat/dma-s3c24xx.h>
 #include <plat/cpu.h>
 
 #include <plat/regs-serial.h>
diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c
index c9fa3fca486..14f4798291a 100644
--- a/arch/arm/mach-s3c2412/mach-jive.c
+++ b/arch/arm/mach-s3c2412/mach-jive.c
@@ -468,7 +468,7 @@ static struct i2c_board_info jive_i2c_devs[] __initdata = {
 /* The platform devices being used. */
 
 static struct platform_device *jive_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_rtc,
         &s3c_device_wdt,
         &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c
index 9a5e4341972..0392065af1a 100644
--- a/arch/arm/mach-s3c2412/mach-smdk2413.c
+++ b/arch/arm/mach-s3c2412/mach-smdk2413.c
@@ -104,8 +104,7 @@ static struct s3c2410_udc_mach_info smdk2413_udc_cfg __initdata = {
 
 
 static struct platform_device *smdk2413_devices[] __initdata = {
-        &s3c_device_usb,
-        //&s3c_device_lcd,
+        &s3c_device_ohci,
         &s3c_device_wdt,
         &s3c_device_i2c0,
         &s3c_device_iis,
diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c
index a6ba591b26b..3ca9265b699 100644
--- a/arch/arm/mach-s3c2412/mach-vstms.c
+++ b/arch/arm/mach-s3c2412/mach-vstms.c
@@ -121,7 +121,7 @@ static struct s3c2410_platform_nand __initdata vstms_nand_info = {
 };
 
 static struct platform_device *vstms_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_wdt,
         &s3c_device_i2c0,
         &s3c_device_iis,
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
index 80879358eb2..7f465265cf0 100644
--- a/arch/arm/mach-s3c2440/Kconfig
+++ b/arch/arm/mach-s3c2440/Kconfig
@@ -15,14 +15,67 @@ config CPU_S3C2440
         help
           Support for S3C2440 Samsung Mobile CPU based systems.
 
+config CPU_S3C2442
+        bool
+        depends on ARCH_S3C2410
+        select CPU_ARM920T
+        select S3C2410_CLOCK
+        select S3C2410_GPIO
+        select S3C2410_PM if PM
+        select CPU_S3C244X
+        select CPU_LLSERIAL_S3C2440
+        help
+          Support for S3C2442 Samsung Mobile CPU based systems.
+
+config CPU_S3C244X
+        bool
+        depends on ARCH_S3C2410 && (CPU_S3C2440 || CPU_S3C2442)
+        help
+          Support for S3C2440 and S3C2442 Samsung Mobile CPU based systems.
+
+
+
+config S3C2440_CPUFREQ
+        bool "S3C2440/S3C2442 CPU Frequency scaling support"
+        depends on CPU_FREQ_S3C24XX && (CPU_S3C2440 || CPU_S3C2442)
+        select S3C2410_CPUFREQ_UTILS
+        default y
+        help
+          CPU Frequency scaling support for S3C2440 and S3C2442 SoC CPUs.
+
+config S3C2440_XTAL_12000000
+        bool
+        help
+          Indicate that the build needs to support 12MHz system
+          crystal.
+
+config S3C2440_XTAL_16934400
+        bool
+        help
+          Indicate that the build needs to support 16.9344MHz system
+          crystal.
+
+config S3C2440_PLL_12000000
+        bool
+        depends on S3C2440_CPUFREQ && S3C2440_XTAL_12000000
+        default y if CPU_FREQ_S3C24XX_PLL
+        help
+          PLL tables for S3C2440 or S3C2442 CPUs with 12MHz crystals.
+
+config S3C2440_PLL_16934400
+        bool
+        depends on S3C2440_CPUFREQ && S3C2440_XTAL_16934400
+        default y if CPU_FREQ_S3C24XX_PLL
+        help
+          PLL tables for S3C2440 or S3C2442 CPUs with 16.934MHz crystals.
+
 config S3C2440_DMA
         bool
         depends on ARCH_S3C2410 && CPU_S3C24405B
         help
           Support for S3C2440 specific DMA code5A
 
-
-menu "S3C2440 Machines"
+menu "S3C2440 and S3C2442 Machines"
 
 config MACH_ANUBIS
         bool "Simtec Electronics ANUBIS"
@@ -37,6 +90,18 @@ config MACH_ANUBIS
           Say Y here if you are using the Simtec Electronics ANUBIS
           development system
 
+config MACH_NEO1973_GTA02
+        bool "Openmoko GTA02 / Freerunner phone"
+        select CPU_S3C2442
+        select MFD_PCF50633
+        select PCF50633_GPIO
+        select I2C
+        select POWER_SUPPLY
+        select MACH_NEO1973
+        select S3C2410_PWM
+        help
+           Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone
+
 config MACH_OSIRIS
         bool "Simtec IM2440D20 (OSIRIS) module"
         select CPU_S3C2440
@@ -94,11 +159,14 @@ config MACH_NEXCODER_2440
 
 config SMDK2440_CPU2440
         bool "SMDK2440 with S3C2440 CPU module"
-        depends on ARCH_S3C2440
         default y if ARCH_S3C2440
         select S3C2440_XTAL_16934400
         select CPU_S3C2440
 
+config SMDK2440_CPU2442
+        bool "SMDM2440 with S3C2442 CPU module"
+        select CPU_S3C2442
+
 config MACH_AT2440EVB
         bool "Avantech AT2440EVB development board"
         select CPU_S3C2440
diff --git a/arch/arm/mach-s3c2440/Makefile b/arch/arm/mach-s3c2440/Makefile
index 5f322453188..c85ba32d895 100644
--- a/arch/arm/mach-s3c2440/Makefile
+++ b/arch/arm/mach-s3c2440/Makefile
@@ -10,10 +10,20 @@ obj-n				:=
 obj-                            :=
 
 obj-$(CONFIG_CPU_S3C2440)       += s3c2440.o dsc.o
+obj-$(CONFIG_CPU_S3C2442)       += s3c2442.o
+
 obj-$(CONFIG_CPU_S3C2440)       += irq.o
 obj-$(CONFIG_CPU_S3C2440)       += clock.o
 obj-$(CONFIG_S3C2440_DMA)       += dma.o
 
+obj-$(CONFIG_CPU_S3C244X)       += s3c244x.o
+obj-$(CONFIG_CPU_S3C244X)       += s3c244x-irq.o
+obj-$(CONFIG_CPU_S3C244X)       += s3c244x-clock.o
+obj-$(CONFIG_S3C2440_CPUFREQ)   += s3c2440-cpufreq.o
+
+obj-$(CONFIG_S3C2440_PLL_12000000) += s3c2440-pll-12000000.o
+obj-$(CONFIG_S3C2440_PLL_16934400) += s3c2440-pll-16934400.o
+
 # Machine support
 
 obj-$(CONFIG_MACH_ANUBIS)       += mach-anubis.o
@@ -23,6 +33,7 @@ obj-$(CONFIG_ARCH_S3C2440)	+= mach-smdk2440.o
 obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o
 obj-$(CONFIG_MACH_AT2440EVB) += mach-at2440evb.o
 obj-$(CONFIG_MACH_MINI2440) += mach-mini2440.o
+obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o
 
 # extra machine support
 
diff --git a/arch/arm/mach-s3c2440/clock.c b/arch/arm/mach-s3c2440/clock.c
index d1c29b2537c..3dc2426e234 100644
--- a/arch/arm/mach-s3c2440/clock.c
+++ b/arch/arm/mach-s3c2440/clock.c
@@ -98,8 +98,10 @@ static struct clk s3c2440_clk_cam = {
 static struct clk s3c2440_clk_cam_upll = {
         .name           = "camif-upll",
         .id             = -1,
-        .set_rate       = s3c2440_camif_upll_setrate,
-        .round_rate     = s3c2440_camif_upll_round,
+        .ops            = &(struct clk_ops) {
+                .set_rate       = s3c2440_camif_upll_setrate,
+                .round_rate     = s3c2440_camif_upll_round,
+        },
 };
 
 static struct clk s3c2440_clk_ac97 = {
diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c
index e08e081430f..3b0529f54e9 100644
--- a/arch/arm/mach-s3c2440/dma.c
+++ b/arch/arm/mach-s3c2440/dma.c
@@ -20,7 +20,7 @@
 #include <mach/map.h>
 #include <mach/dma.h>
 
-#include <plat/dma-plat.h>
+#include <plat/dma-s3c24xx.h>
 #include <plat/cpu.h>
 
 #include <plat/regs-serial.h>
diff --git a/arch/arm/mach-s3c2440/dsc.c b/arch/arm/mach-s3c2440/dsc.c
index 55404427277..9ea66e31f62 100644
--- a/arch/arm/mach-s3c2440/dsc.c
+++ b/arch/arm/mach-s3c2440/dsc.c
@@ -28,7 +28,7 @@
 #include <mach/regs-dsc.h>
 
 #include <plat/cpu.h>
-#include <plat/s3c2440.h>
+#include <plat/s3c244x.h>
 
 int s3c2440_set_dsc(unsigned int pin, unsigned int value)
 {
diff --git a/arch/arm/mach-s3c2442/include/mach/gta02.h b/arch/arm/mach-s3c2440/include/mach/gta02.h
index 953331d8d56..953331d8d56 100644
--- a/arch/arm/mach-s3c2442/include/mach/gta02.h
+++ b/arch/arm/mach-s3c2440/include/mach/gta02.h
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index 62a4c3eba97..b73f78a9da5 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -409,7 +409,7 @@ static struct platform_device anubis_device_sm501 = {
 /* Standard Anubis devices */
 
 static struct platform_device *anubis_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_wdt,
         &s3c_device_adc,
         &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c
index aa69290e04c..84725791e6b 100644
--- a/arch/arm/mach-s3c2440/mach-at2440evb.c
+++ b/arch/arm/mach-s3c2440/mach-at2440evb.c
@@ -165,7 +165,7 @@ static struct platform_device at2440evb_device_eth = {
         },
 };
 
-static struct s3c24xx_mci_pdata at2440evb_mci_pdata = {
+static struct s3c24xx_mci_pdata at2440evb_mci_pdata __initdata = {
         .gpio_detect    = S3C2410_GPG(10),
 };
 
@@ -203,7 +203,7 @@ static struct s3c2410fb_mach_info at2440evb_fb_info __initdata = {
 };
 
 static struct platform_device *at2440evb_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_wdt,
         &s3c_device_adc,
         &s3c_device_i2c0,
@@ -216,8 +216,6 @@ static struct platform_device *at2440evb_devices[] __initdata = {
 
 static void __init at2440evb_map_io(void)
 {
-        s3c_device_sdi.dev.platform_data = &at2440evb_mci_pdata;
-
         s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc));
         s3c24xx_init_clocks(16934400);
         s3c24xx_init_uarts(at2440evb_uartcfgs, ARRAY_SIZE(at2440evb_uartcfgs));
@@ -226,6 +224,7 @@ static void __init at2440evb_map_io(void)
 static void __init at2440evb_init(void)
 {
         s3c24xx_fb_set_platdata(&at2440evb_fb_info);
+        s3c24xx_mci_set_platdata(&at2440evb_mci_pdata);
         s3c_nand_set_platdata(&at2440evb_nand_info);
         s3c_i2c0_set_platdata(NULL);
 
diff --git a/arch/arm/mach-s3c2442/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c
index 0b4a3a03071..45799c608d8 100644
--- a/arch/arm/mach-s3c2442/mach-gta02.c
+++ b/arch/arm/mach-s3c2440/mach-gta02.c
@@ -544,7 +544,7 @@ static struct platform_device gta02_bl_dev = {
 
 
 /* USB */
-static struct s3c2410_hcd_info gta02_usb_info = {
+static struct s3c2410_hcd_info gta02_usb_info __initdata = {
         .port[0]        = {
                 .flags  = S3C_HCDFLG_USED,
         },
@@ -565,7 +565,7 @@ static void __init gta02_map_io(void)
 /* These are the guys that don't need to be children of PMU. */
 
 static struct platform_device *gta02_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_wdt,
         &s3c_device_sdi,
         &s3c_device_usbgadget,
@@ -623,9 +623,8 @@ static void __init gta02_machine_init(void)
         INIT_DELAYED_WORK(&gta02_charger_work, gta02_charger_worker);
 #endif
 
-        s3c_device_usb.dev.platform_data = &gta02_usb_info;
-
         s3c24xx_udc_set_platdata(&gta02_udc_cfg);
+        s3c_ohci_set_platdata(&gta02_usb_info);
         s3c_nand_set_platdata(&gta02_nand_info);
         s3c_i2c0_set_platdata(NULL);
 
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c
index 2068e9096a4..571b17683d9 100644
--- a/arch/arm/mach-s3c2440/mach-mini2440.c
+++ b/arch/arm/mach-s3c2440/mach-mini2440.c
@@ -506,9 +506,8 @@ static struct i2c_board_info mini2440_i2c_devs[] __initdata = {
 };
 
 static struct platform_device *mini2440_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_wdt,
-/*      &s3c_device_adc,*/ /* ADC doesn't like living with touchscreen ! */
         &s3c_device_i2c0,
         &s3c_device_rtc,
         &s3c_device_usbgadget,
@@ -522,8 +521,6 @@ static struct platform_device *mini2440_devices[] __initdata = {
         &s3c_device_sdi,
         &s3c_device_iis,
         &mini2440_audio,
-/*      &s3c_device_timer[0],*/ /* buzzer pwm, no API for it */
-        /* remaining devices are optional */
 };
 
 static void __init mini2440_map_io(void)
@@ -531,8 +528,6 @@ static void __init mini2440_map_io(void)
         s3c24xx_init_io(mini2440_iodesc, ARRAY_SIZE(mini2440_iodesc));
         s3c24xx_init_clocks(12000000);
         s3c24xx_init_uarts(mini2440_uartcfgs, ARRAY_SIZE(mini2440_uartcfgs));
-
-        s3c_device_sdi.dev.platform_data = &mini2440_mmc_cfg;
 }
 
 /*
@@ -678,6 +673,7 @@ static void __init mini2440_init(void)
         }
 
         s3c24xx_udc_set_platdata(&mini2440_udc_cfg);
+        s3c24xx_mci_set_platdata(&mini2440_mmc_cfg);
         s3c_nand_set_platdata(&mini2440_nand_info);
         s3c_i2c0_set_platdata(NULL);
 
diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c
index d43edede590..342041593f2 100644
--- a/arch/arm/mach-s3c2440/mach-nexcoder.c
+++ b/arch/arm/mach-s3c2440/mach-nexcoder.c
@@ -41,7 +41,7 @@
 #include <plat/iic.h>
 
 #include <plat/s3c2410.h>
-#include <plat/s3c2440.h>
+#include <plat/s3c244x.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
@@ -106,7 +106,7 @@ static struct platform_device nexcoder_device_nor = {
 /* Standard Nexcoder devices */
 
 static struct platform_device *nexcoder_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_lcd,
         &s3c_device_wdt,
         &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index a952a13afb1..1e836e506f8 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -176,7 +176,7 @@ static struct s3c2410_platform_nand __initdata rx3715_nand_info = {
 };
 
 static struct platform_device *rx3715_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_lcd,
         &s3c_device_wdt,
         &s3c_device_i2c0,
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c
index ec13e748ccc..3ac3d636d61 100644
--- a/arch/arm/mach-s3c2440/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2440/mach-smdk2440.c
@@ -40,7 +40,7 @@
 #include <plat/iic.h>
 
 #include <plat/s3c2410.h>
-#include <plat/s3c2440.h>
+#include <plat/s3c244x.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
@@ -150,7 +150,7 @@ static struct s3c2410fb_mach_info smdk2440_fb_info __initdata = {
 };
 
 static struct platform_device *smdk2440_devices[] __initdata = {
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_lcd,
         &s3c_device_wdt,
         &s3c_device_i2c0,
diff --git a/arch/arm/plat-s3c24xx/s3c2440-cpufreq.c b/arch/arm/mach-s3c2440/s3c2440-cpufreq.c
index 976002fb1b8..976002fb1b8 100644
--- a/arch/arm/plat-s3c24xx/s3c2440-cpufreq.c
+++ b/arch/arm/mach-s3c2440/s3c2440-cpufreq.c
diff --git a/arch/arm/plat-s3c24xx/s3c2440-pll-12000000.c b/arch/arm/mach-s3c2440/s3c2440-pll-12000000.c
index 49f65032f2c..f105d5e8c47 100644
--- a/arch/arm/plat-s3c24xx/s3c2440-pll-12000000.c
+++ b/arch/arm/mach-s3c2440/s3c2440-pll-12000000.c
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c24xx/s3c2440-pll-12000000.c
+/* arch/arm/mach-s3c2440/s3c2440-pll-12000000.c
  *
  * Copyright (c) 2006-2007 Simtec Electronics
  *      http://armlinux.simtec.co.uk/
diff --git a/arch/arm/plat-s3c24xx/s3c2440-pll-16934400.c b/arch/arm/mach-s3c2440/s3c2440-pll-16934400.c
index 7679af13a94..c8a8f90ef38 100644
--- a/arch/arm/plat-s3c24xx/s3c2440-pll-16934400.c
+++ b/arch/arm/mach-s3c2440/s3c2440-pll-16934400.c
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c24xx/s3c2440-pll-16934400.c
+/* arch/arm/mach-s3c2440/s3c2440-pll-16934400.c
  *
  * Copyright (c) 2006-2008 Simtec Electronics
  *      http://armlinux.simtec.co.uk/
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c
index ac1f7ea5f40..2b68f7ea45a 100644
--- a/arch/arm/mach-s3c2440/s3c2440.c
+++ b/arch/arm/mach-s3c2440/s3c2440.c
@@ -29,9 +29,9 @@
 #include <mach/hardware.h>
 #include <asm/irq.h>
 
-#include <plat/s3c2440.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
+#include <plat/s3c244x.h>
 
 static struct sys_device s3c2440_sysdev = {
         .cls            = &s3c2440_sysclass,
diff --git a/arch/arm/mach-s3c2442/clock.c b/arch/arm/mach-s3c2440/s3c2442.c
index ea1aa1f5157..188ad1e57dc 100644
--- a/arch/arm/mach-s3c2442/clock.c
+++ b/arch/arm/mach-s3c2440/s3c2442.c
@@ -1,10 +1,10 @@
-/* linux/arch/arm/mach-s3c2442/clock.c
+/* linux/arch/arm/mach-s3c2442/s3c2442.c
  *
  * Copyright (c) 2004-2005 Simtec Electronics
  *      http://armlinux.simtec.co.uk/
  *      Ben Dooks <ben@simtec.co.uk>
  *
- * S3C2442 Clock support
+ * S3C2442 core and lock support
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -109,8 +109,10 @@ static struct clk s3c2442_clk_cam = {
 static struct clk s3c2442_clk_cam_upll = {
         .name           = "camif-upll",
         .id             = -1,
-        .set_rate       = s3c2442_camif_upll_setrate,
-        .round_rate     = s3c2442_camif_upll_round,
+        .ops            = &(struct clk_ops) {
+                .set_rate       = s3c2442_camif_upll_setrate,
+                .round_rate     = s3c2442_camif_upll_round,
+        },
 };
 
 static int s3c2442_clk_add(struct sys_device *sysdev)
@@ -149,3 +151,15 @@ static __init int s3c2442_clk_init(void)
 }
 
 arch_initcall(s3c2442_clk_init);
+
+
+static struct sys_device s3c2442_sysdev = {
+        .cls            = &s3c2442_sysclass,
+};
+
+int __init s3c2442_init(void)
+{
+        printk("S3C2442: Initialising architecture\n");
+
+        return sysdev_register(&s3c2442_sysdev);
+}
diff --git a/arch/arm/plat-s3c24xx/s3c244x-clock.c b/arch/arm/mach-s3c2440/s3c244x-clock.c
index 79371091aa3..f8d96130d1d 100644
--- a/arch/arm/plat-s3c24xx/s3c244x-clock.c
+++ b/arch/arm/mach-s3c2440/s3c244x-clock.c
@@ -68,7 +68,9 @@ static int s3c2440_setparent_armclk(struct clk *clk, struct clk *parent)
 static struct clk clk_arm = {
         .name           = "armclk",
         .id             = -1,
-        .set_parent     = s3c2440_setparent_armclk,
+        .ops            = &(struct clk_ops) {
+                .set_parent     = s3c2440_setparent_armclk,
+        },
 };
 
 static int s3c244x_clk_add(struct sys_device *sysdev)
diff --git a/arch/arm/plat-s3c24xx/s3c244x-irq.c b/arch/arm/mach-s3c2440/s3c244x-irq.c
index a75c0c2431e..a75c0c2431e 100644
--- a/arch/arm/plat-s3c24xx/s3c244x-irq.c
+++ b/arch/arm/mach-s3c2440/s3c244x-irq.c
diff --git a/arch/arm/plat-s3c24xx/s3c244x.c b/arch/arm/mach-s3c2440/s3c244x.c
index 12623a474b5..5e4a97e7653 100644
--- a/arch/arm/plat-s3c24xx/s3c244x.c
+++ b/arch/arm/mach-s3c2440/s3c244x.c
@@ -38,8 +38,7 @@
 #include <mach/regs-dsc.h>
 
 #include <plat/s3c2410.h>
-#include <plat/s3c2440.h>
-#include "s3c244x.h"
+#include <plat/s3c244x.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c2442/Kconfig b/arch/arm/mach-s3c2442/Kconfig
deleted file mode 100644
index 8d3811852fc..00000000000
--- a/arch/arm/mach-s3c2442/Kconfig
+++ /dev/null
@@ -1,37 +0,0 @@
-# Copyright 2007 Simtec Electronics
-#
-# Licensed under GPLv2
-
-config CPU_S3C2442
-        bool
-        depends on ARCH_S3C2410
-        select CPU_ARM920T
-        select S3C2410_CLOCK
-        select S3C2410_GPIO
-        select S3C2410_PM if PM
-        select CPU_S3C244X
-        select CPU_LLSERIAL_S3C2440
-        help
-          Support for S3C2442 Samsung Mobile CPU based systems.
-
-
-menu "S3C2442 Machines"
-
-config SMDK2440_CPU2442
-        bool "SMDM2440 with S3C2442 CPU module"
-        depends on ARCH_S3C2440
-        select CPU_S3C2442
-
-config MACH_NEO1973_GTA02
-        bool "Openmoko GTA02 / Freerunner phone"
-        select CPU_S3C2442
-        select MFD_PCF50633
-        select PCF50633_GPIO
-        select I2C
-        select POWER_SUPPLY
-        select MACH_NEO1973
-        select S3C2410_PWM
-        help
-           Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone
-
-endmenu
diff --git a/arch/arm/mach-s3c2442/Makefile b/arch/arm/mach-s3c2442/Makefile
deleted file mode 100644
index 2a19113a576..00000000000
--- a/arch/arm/mach-s3c2442/Makefile
+++ /dev/null
@@ -1,18 +0,0 @@
-# arch/arm/mach-s3c2442/Makefile
-#
-# Copyright 2007 Simtec Electronics
-#
-# Licensed under GPLv2
-
-obj-y                           :=
-obj-m                           :=
-obj-n                           :=
-obj-                            :=
-
-obj-$(CONFIG_CPU_S3C2442)       += s3c2442.o
-obj-$(CONFIG_CPU_S3C2442)       += clock.o
-
-obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o
-
-# Machine support
-
diff --git a/arch/arm/mach-s3c2442/s3c2442.c b/arch/arm/mach-s3c2442/s3c2442.c
deleted file mode 100644
index 4663bdc7fff..00000000000
--- a/arch/arm/mach-s3c2442/s3c2442.c
+++ /dev/null
@@ -1,34 +0,0 @@
-/* linux/arch/arm/mach-s3c2442/s3c2442.c
- *
- * Copyright (c) 2006 Simtec Electronics
- *   Ben Dooks <ben@simtec.co.uk>
- *
- * Samsung S3C2442 Mobile CPU support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/list.h>
-#include <linux/timer.h>
-#include <linux/init.h>
-#include <linux/serial_core.h>
-#include <linux/sysdev.h>
-
-#include <plat/s3c2442.h>
-#include <plat/cpu.h>
-
-static struct sys_device s3c2442_sysdev = {
-        .cls            = &s3c2442_sysclass,
-};
-
-int __init s3c2442_init(void)
-{
-        printk("S3C2442: Initialising architecture\n");
-
-        return sysdev_register(&s3c2442_sysdev);
-}
diff --git a/arch/arm/mach-s3c2443/Kconfig b/arch/arm/mach-s3c2443/Kconfig
index 4314c442490..698140af247 100644
--- a/arch/arm/mach-s3c2443/Kconfig
+++ b/arch/arm/mach-s3c2443/Kconfig
@@ -7,6 +7,7 @@ config CPU_S3C2443
         depends on ARCH_S3C2410
         select S3C2443_DMA if S3C2410_DMA
         select CPU_LLSERIAL_S3C2440
+        select SAMSUNG_CLKSRC
         help
           Support for the S3C2443 SoC from the S3C24XX line
 
diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c
index 2785d69c95b..62cd4eaee01 100644
--- a/arch/arm/mach-s3c2443/clock.c
+++ b/arch/arm/mach-s3c2443/clock.c
@@ -1,6 +1,6 @@
 /* linux/arch/arm/mach-s3c2443/clock.c
  *
- * Copyright (c) 2007 Simtec Electronics
+ * Copyright (c) 2007, 2010 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
  *
  * S3C2443 Clock control support
@@ -42,6 +42,7 @@
 
 #include <plat/s3c2443.h>
 #include <plat/clock.h>
+#include <plat/clock-clksrc.h>
 #include <plat/cpu.h>
 
 /* We currently have to assume that the system is running
@@ -53,141 +54,69 @@
  * set the correct muxing at initialisation
 */
 
-static int s3c2443_clkcon_enable_h(struct clk *clk, int enable)
-{
-        unsigned int clocks = clk->ctrlbit;
-        unsigned long clkcon;
-
-        clkcon = __raw_readl(S3C2443_HCLKCON);
-
-        if (enable)
-                clkcon |= clocks;
-        else
-                clkcon &= ~clocks;
-
-        __raw_writel(clkcon, S3C2443_HCLKCON);
-
-        return 0;
-}
-
-static int s3c2443_clkcon_enable_p(struct clk *clk, int enable)
+static int s3c2443_gate(void __iomem *reg, struct clk *clk, int enable)
 {
-        unsigned int clocks = clk->ctrlbit;
-        unsigned long clkcon;
-
-        clkcon = __raw_readl(S3C2443_PCLKCON);
+        u32 ctrlbit = clk->ctrlbit;
+        u32 con = __raw_readl(reg);
 
         if (enable)
-                clkcon |= clocks;
+                con |= ctrlbit;
         else
-                clkcon &= ~clocks;
-
-        __raw_writel(clkcon, S3C2443_PCLKCON);
+                con &= ~ctrlbit;
 
+        __raw_writel(con, reg);
         return 0;
 }
 
-static int s3c2443_clkcon_enable_s(struct clk *clk, int enable)
-{
-        unsigned int clocks = clk->ctrlbit;
-        unsigned long clkcon;
-
-        clkcon = __raw_readl(S3C2443_SCLKCON);
-
-        if (enable)
-                clkcon |= clocks;
-        else
-                clkcon &= ~clocks;
-
-        __raw_writel(clkcon, S3C2443_SCLKCON);
-
-        return 0;
-}
-
-static unsigned long s3c2443_roundrate_clksrc(struct clk *clk,
-                                              unsigned long rate,
-                                              unsigned int max)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        int div;
-
-        if (rate > parent_rate)
-                return parent_rate;
-
-        /* note, we remove the +/- 1 calculations as they cancel out */
-
-        div = (rate / parent_rate);
-
-        if (div < 1)
-                div = 1;
-        else if (div > max)
-                div = max;
-
-        return parent_rate / div;
-}
-
-static unsigned long s3c2443_roundrate_clksrc4(struct clk *clk,
-                                               unsigned long rate)
+static int s3c2443_clkcon_enable_h(struct clk *clk, int enable)
 {
-        return s3c2443_roundrate_clksrc(clk, rate, 4);
+        return s3c2443_gate(S3C2443_HCLKCON, clk, enable);
 }
 
-static unsigned long s3c2443_roundrate_clksrc16(struct clk *clk,
-                                                unsigned long rate)
+static int s3c2443_clkcon_enable_p(struct clk *clk, int enable)
 {
-        return s3c2443_roundrate_clksrc(clk, rate, 16);
+        return s3c2443_gate(S3C2443_PCLKCON, clk, enable);
 }
 
-static unsigned long s3c2443_roundrate_clksrc256(struct clk *clk,
-                                                 unsigned long rate)
+static int s3c2443_clkcon_enable_s(struct clk *clk, int enable)
 {
-        return s3c2443_roundrate_clksrc(clk, rate, 256);
+        return s3c2443_gate(S3C2443_SCLKCON, clk, enable);
 }
 
 /* clock selections */
 
+/* mpllref is a direct descendant of clk_xtal by default, but it is not
+ * elided as the EPLL can be either sourced by the XTAL or EXTCLK and as
+ * such directly equating the two source clocks is impossible.
+ */
 static struct clk clk_mpllref = {
         .name           = "mpllref",
         .parent         = &clk_xtal,
         .id             = -1,
 };
 
-#if 0
-static struct clk clk_mpll = {
-        .name           = "mpll",
-        .parent         = &clk_mpllref,
-        .id             = -1,
-};
-#endif
-
 static struct clk clk_i2s_ext = {
         .name           = "i2s-ext",
         .id             = -1,
 };
 
-static int s3c2443_setparent_epllref(struct clk *clk, struct clk *parent)
-{
-        unsigned long clksrc = __raw_readl(S3C2443_CLKSRC);
-
-        clksrc &= ~S3C2443_CLKSRC_EPLLREF_MASK;
-
-        if (parent == &clk_xtal)
-                clksrc |= S3C2443_CLKSRC_EPLLREF_XTAL;
-        else if (parent == &clk_ext)
-                clksrc |= S3C2443_CLKSRC_EPLLREF_EXTCLK;
-        else if (parent != &clk_mpllref)
-                return -EINVAL;
-
-        __raw_writel(clksrc, S3C2443_CLKSRC);
-        clk->parent = parent;
-
-        return 0;
-}
+static struct clk *clk_epllref_sources[] = {
+        [0] = &clk_mpllref,
+        [1] = &clk_mpllref,
+        [2] = &clk_xtal,
+        [3] = &clk_ext,
+};
 
-static struct clk clk_epllref = {
-        .name           = "epllref",
-        .id             = -1,
-        .set_parent     = s3c2443_setparent_epllref,
+static struct clksrc_clk clk_epllref = {
+        .clk    = {
+                .name           = "epllref",
+                .id             = -1,
+        },
+        .sources = &(struct clksrc_sources) {
+                .sources = clk_epllref_sources,
+                .nr_sources = ARRAY_SIZE(clk_epllref_sources),
+        },
+        .reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 7 },
 };
 
 static unsigned long s3c2443_getrate_mdivclk(struct clk *clk)
@@ -205,34 +134,29 @@ static struct clk clk_mdivclk = {
         .name           = "mdivclk",
         .parent         = &clk_mpllref,
         .id             = -1,
-        .get_rate       = s3c2443_getrate_mdivclk,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s3c2443_getrate_mdivclk,
+        },
 };
 
-static int s3c2443_setparent_msysclk(struct clk *clk, struct clk *parent)
-{
-        unsigned long clksrc = __raw_readl(S3C2443_CLKSRC);
-
-        clksrc &= ~(S3C2443_CLKSRC_MSYSCLK_MPLL |
-                    S3C2443_CLKSRC_EXTCLK_DIV);
-
-        if (parent == &clk_mpll)
-                clksrc |= S3C2443_CLKSRC_MSYSCLK_MPLL;
-        else if (parent == &clk_mdivclk)
-                clksrc |= S3C2443_CLKSRC_EXTCLK_DIV;
-        else if (parent != &clk_mpllref)
-                return -EINVAL;
-
-        __raw_writel(clksrc, S3C2443_CLKSRC);
-        clk->parent = parent;
-
-        return 0;
-}
+static struct clk *clk_msysclk_sources[] = {
+        [0] = &clk_mpllref,
+        [1] = &clk_mpll,
+        [2] = &clk_mdivclk,
+        [3] = &clk_mpllref,
+};
 
-static struct clk clk_msysclk = {
-        .name           = "msysclk",
-        .parent         = &clk_xtal,
-        .id             = -1,
-        .set_parent     = s3c2443_setparent_msysclk,
+static struct clksrc_clk clk_msysclk = {
+        .clk    = {
+                .name           = "msysclk",
+                .parent         = &clk_xtal,
+                .id             = -1,
+        },
+        .sources = &(struct clksrc_sources) {
+                .sources = clk_msysclk_sources,
+                .nr_sources = ARRAY_SIZE(clk_msysclk_sources),
+        },
+        .reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 3 },
 };
 
 /* armdiv
@@ -241,152 +165,159 @@ static struct clk clk_msysclk = {
  * divider values applied to it to then be fed into armclk.
 */
 
-static struct clk clk_armdiv = {
-        .name           = "armdiv",
-        .id             = -1,
-        .parent         = &clk_msysclk,
-};
+/* armdiv divisor table */
 
-/* armclk
- *
- * this is the clock fed into the ARM core itself, either from
- * armdiv or from hclk.
- */
+static unsigned int armdiv[16] = {
+        [S3C2443_CLKDIV0_ARMDIV_1 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 1,
+        [S3C2443_CLKDIV0_ARMDIV_2 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 2,
+        [S3C2443_CLKDIV0_ARMDIV_3 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 3,
+        [S3C2443_CLKDIV0_ARMDIV_4 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 4,
+        [S3C2443_CLKDIV0_ARMDIV_6 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 6,
+        [S3C2443_CLKDIV0_ARMDIV_8 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 8,
+        [S3C2443_CLKDIV0_ARMDIV_12 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]     = 12,
+        [S3C2443_CLKDIV0_ARMDIV_16 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]     = 16,
+};
 
-static int s3c2443_setparent_armclk(struct clk *clk, struct clk *parent)
+static inline unsigned int s3c2443_fclk_div(unsigned long clkcon0)
 {
-        unsigned long clkdiv0;
-
-        clkdiv0 = __raw_readl(S3C2443_CLKDIV0);
-
-        if (parent == &clk_armdiv)
-                clkdiv0 &= ~S3C2443_CLKDIV0_DVS;
-        else if (parent == &clk_h)
-                clkdiv0 |= S3C2443_CLKDIV0_DVS;
-        else
-                return -EINVAL;
+        clkcon0 &= S3C2443_CLKDIV0_ARMDIV_MASK;
 
-        __raw_writel(clkdiv0, S3C2443_CLKDIV0);
-        return 0;
+        return armdiv[clkcon0 >> S3C2443_CLKDIV0_ARMDIV_SHIFT];
 }
 
-static struct clk clk_arm = {
-        .name           = "armclk",
-        .id             = -1,
-        .set_parent     = s3c2443_setparent_armclk,
-};
+static unsigned long s3c2443_armclk_roundrate(struct clk *clk,
+                                              unsigned long rate)
+{
+        unsigned long parent = clk_get_rate(clk->parent);
+        unsigned long calc;
+        unsigned best = 256; /* bigger than any value */
+        unsigned div;
+        int ptr;
 
-/* esysclk
- *
- * this is sourced from either the EPLL or the EPLLref clock
-*/
+        for (ptr = 0; ptr < ARRAY_SIZE(armdiv); ptr++) {
+                div = armdiv[ptr];
+                calc = parent / div;
+                if (calc <= rate && div < best)
+                        best = div;
+        }
 
-static int s3c2443_setparent_esysclk(struct clk *clk, struct clk *parent)
+        return parent / best;
+}
+
+static int s3c2443_armclk_setrate(struct clk *clk, unsigned long rate)
 {
-        unsigned long clksrc = __raw_readl(S3C2443_CLKSRC);
+        unsigned long parent = clk_get_rate(clk->parent);
+        unsigned long calc;
+        unsigned div;
+        unsigned best = 256; /* bigger than any value */
+        int ptr;
+        int val = -1;
+
+        for (ptr = 0; ptr < ARRAY_SIZE(armdiv); ptr++) {
+                div = armdiv[ptr];
+                calc = parent / div;
+                if (calc <= rate && div < best) {
+                        best = div;
+                        val = ptr;
+                }
+        }
 
-        if (parent == &clk_epll)
-                clksrc |= S3C2443_CLKSRC_ESYSCLK_EPLL;
-        else if (parent == &clk_epllref)
-                clksrc &= ~S3C2443_CLKSRC_ESYSCLK_EPLL;
-        else
-                return -EINVAL;
+        if (val >= 0) {
+                unsigned long clkcon0;
 
-        __raw_writel(clksrc, S3C2443_CLKSRC);
-        clk->parent = parent;
+                clkcon0 = __raw_readl(S3C2443_CLKDIV0);
+                clkcon0 &= S3C2443_CLKDIV0_ARMDIV_MASK;
+                clkcon0 |= val << S3C2443_CLKDIV0_ARMDIV_SHIFT;
+                __raw_writel(clkcon0, S3C2443_CLKDIV0);
+        }
 
-        return 0;
+        return (val == -1) ? -EINVAL : 0;
 }
 
-static struct clk clk_esysclk = {
-        .name           = "esysclk",
-        .parent         = &clk_epll,
+static struct clk clk_armdiv = {
+        .name           = "armdiv",
         .id             = -1,
-        .set_parent     = s3c2443_setparent_esysclk,
+        .parent         = &clk_msysclk.clk,
+        .ops            = &(struct clk_ops) {
+                .round_rate = s3c2443_armclk_roundrate,
+                .set_rate = s3c2443_armclk_setrate,
+        },
 };
 
-/* uartclk
+/* armclk
  *
- * UART baud-rate clock sourced from esysclk via a divisor
-*/
-
-static unsigned long s3c2443_getrate_uart(struct clk *clk)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long div = __raw_readl(S3C2443_CLKDIV1);
-
-        div &= S3C2443_CLKDIV1_UARTDIV_MASK;
-        div >>= S3C2443_CLKDIV1_UARTDIV_SHIFT;
+ * this is the clock fed into the ARM core itself, from armdiv or from hclk.
+ */
 
-        return parent_rate / (div + 1);
-}
+static struct clk *clk_arm_sources[] = {
+        [0] = &clk_armdiv,
+        [1] = &clk_h,
+};
 
+static struct clksrc_clk clk_arm = {
+        .clk    = {
+                .name           = "armclk",
+                .id             = -1,
+        },
+        .sources = &(struct clksrc_sources) {
+                .sources = clk_arm_sources,
+                .nr_sources = ARRAY_SIZE(clk_arm_sources),
+        },
+        .reg_src = { .reg = S3C2443_CLKDIV0, .size = 1, .shift = 13 },
+};
 
-static int s3c2443_setrate_uart(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long clkdivn = __raw_readl(S3C2443_CLKDIV1);
+/* esysclk
+ *
+ * this is sourced from either the EPLL or the EPLLref clock
+*/
 
-        rate = s3c2443_roundrate_clksrc16(clk, rate);
-        rate = parent_rate / rate;
+static struct clk *clk_sysclk_sources[] = {
+        [0] = &clk_epllref.clk,
+        [1] = &clk_epll,
+};
 
-        clkdivn &= ~S3C2443_CLKDIV1_UARTDIV_MASK;
-        clkdivn |= (rate - 1) << S3C2443_CLKDIV1_UARTDIV_SHIFT;
+static struct clksrc_clk clk_esysclk = {
+        .clk    = {
+                .name           = "esysclk",
+                .parent         = &clk_epll,
+                .id             = -1,
+        },
+        .sources = &(struct clksrc_sources) {
+                .sources = clk_sysclk_sources,
+                .nr_sources = ARRAY_SIZE(clk_sysclk_sources),
+        },
+        .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 6 },
+};
 
-        __raw_writel(clkdivn, S3C2443_CLKDIV1);
-        return 0;
-}
+/* uartclk
+ *
+ * UART baud-rate clock sourced from esysclk via a divisor
+*/
 
-static struct clk clk_uart = {
-        .name           = "uartclk",
-        .id             = -1,
-        .parent         = &clk_esysclk,
-        .get_rate       = s3c2443_getrate_uart,
-        .set_rate       = s3c2443_setrate_uart,
-        .round_rate     = s3c2443_roundrate_clksrc16,
+static struct clksrc_clk clk_uart = {
+        .clk    = {
+                .name           = "uartclk",
+                .id             = -1,
+                .parent         = &clk_esysclk.clk,
+        },
+        .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 8 },
 };
 
+
 /* hsspi
  *
  * high-speed spi clock, sourced from esysclk
 */
 
-static unsigned long s3c2443_getrate_hsspi(struct clk *clk)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long div = __raw_readl(S3C2443_CLKDIV1);
-
-        div &= S3C2443_CLKDIV1_HSSPIDIV_MASK;
-        div >>= S3C2443_CLKDIV1_HSSPIDIV_SHIFT;
-
-        return parent_rate / (div + 1);
-}
-
-
-static int s3c2443_setrate_hsspi(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long clkdivn = __raw_readl(S3C2443_CLKDIV1);
-
-        rate = s3c2443_roundrate_clksrc4(clk, rate);
-        rate = parent_rate / rate;
-
-        clkdivn &= ~S3C2443_CLKDIV1_HSSPIDIV_MASK;
-        clkdivn |= (rate - 1) << S3C2443_CLKDIV1_HSSPIDIV_SHIFT;
-
-        __raw_writel(clkdivn, S3C2443_CLKDIV1);
-        return 0;
-}
-
-static struct clk clk_hsspi = {
-        .name           = "hsspi",
-        .id             = -1,
-        .parent         = &clk_esysclk,
-        .ctrlbit        = S3C2443_SCLKCON_HSSPICLK,
-        .enable         = s3c2443_clkcon_enable_s,
-        .get_rate       = s3c2443_getrate_hsspi,
-        .set_rate       = s3c2443_setrate_hsspi,
-        .round_rate     = s3c2443_roundrate_clksrc4,
+static struct clksrc_clk clk_hsspi = {
+        .clk    = {
+                .name           = "hsspi",
+                .id             = -1,
+                .parent         = &clk_esysclk.clk,
+                .ctrlbit        = S3C2443_SCLKCON_HSSPICLK,
+                .enable         = s3c2443_clkcon_enable_s,
+        },
+        .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 4 },
 };
 
 /* usbhost
@@ -394,41 +325,15 @@ static struct clk clk_hsspi = {
  * usb host bus-clock, usually 48MHz to provide USB bus clock timing
 */
 
-static unsigned long s3c2443_getrate_usbhost(struct clk *clk)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long div = __raw_readl(S3C2443_CLKDIV1);
-
-        div &= S3C2443_CLKDIV1_USBHOSTDIV_MASK;
-        div >>= S3C2443_CLKDIV1_USBHOSTDIV_SHIFT;
-
-        return parent_rate / (div + 1);
-}
-
-static int s3c2443_setrate_usbhost(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long clkdivn = __raw_readl(S3C2443_CLKDIV1);
-
-        rate = s3c2443_roundrate_clksrc4(clk, rate);
-        rate = parent_rate / rate;
-
-        clkdivn &= ~S3C2443_CLKDIV1_USBHOSTDIV_MASK;
-        clkdivn |= (rate - 1) << S3C2443_CLKDIV1_USBHOSTDIV_SHIFT;
-
-        __raw_writel(clkdivn, S3C2443_CLKDIV1);
-        return 0;
-}
-
-static struct clk clk_usb_bus_host = {
-        .name           = "usb-bus-host-parent",
-        .id             = -1,
-        .parent         = &clk_esysclk,
-        .ctrlbit        = S3C2443_SCLKCON_USBHOST,
-        .enable         = s3c2443_clkcon_enable_s,
-        .get_rate       = s3c2443_getrate_usbhost,
-        .set_rate       = s3c2443_setrate_usbhost,
-        .round_rate     = s3c2443_roundrate_clksrc4,
+static struct clksrc_clk clk_usb_bus_host = {
+        .clk    = {
+                .name           = "usb-bus-host-parent",
+                .id             = -1,
+                .parent         = &clk_esysclk.clk,
+                .ctrlbit        = S3C2443_SCLKCON_USBHOST,
+                .enable         = s3c2443_clkcon_enable_s,
+        },
+        .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 4 },
 };
 
 /* clk_hsmcc_div
@@ -438,39 +343,13 @@ static struct clk clk_usb_bus_host = {
  * be fed to the hsmmc block
 */
 
-static unsigned long s3c2443_getrate_hsmmc_div(struct clk *clk)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long div = __raw_readl(S3C2443_CLKDIV1);
-
-        div &= S3C2443_CLKDIV1_HSMMCDIV_MASK;
-        div >>= S3C2443_CLKDIV1_HSMMCDIV_SHIFT;
-
-        return parent_rate / (div + 1);
-}
-
-static int s3c2443_setrate_hsmmc_div(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long clkdivn = __raw_readl(S3C2443_CLKDIV1);
-
-        rate = s3c2443_roundrate_clksrc4(clk, rate);
-        rate = parent_rate / rate;
-
-        clkdivn &= ~S3C2443_CLKDIV1_HSMMCDIV_MASK;
-        clkdivn |= (rate - 1) << S3C2443_CLKDIV1_HSMMCDIV_SHIFT;
-
-        __raw_writel(clkdivn, S3C2443_CLKDIV1);
-        return 0;
-}
-
-static struct clk clk_hsmmc_div = {
-        .name           = "hsmmc-div",
-        .id             = -1,
-        .parent         = &clk_esysclk,
-        .get_rate       = s3c2443_getrate_hsmmc_div,
-        .set_rate       = s3c2443_setrate_hsmmc_div,
-        .round_rate     = s3c2443_roundrate_clksrc4,
+static struct clksrc_clk clk_hsmmc_div = {
+        .clk    = {
+                .name           = "hsmmc-div",
+                .id             = -1,
+                .parent         = &clk_esysclk.clk,
+        },
+        .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 },
 };
 
 static int s3c2443_setparent_hsmmc(struct clk *clk, struct clk *parent)
@@ -503,82 +382,55 @@ static int s3c2443_enable_hsmmc(struct clk *clk, int enable)
 static struct clk clk_hsmmc = {
         .name           = "hsmmc-if",
         .id             = -1,
-        .parent         = &clk_hsmmc_div,
+        .parent         = &clk_hsmmc_div.clk,
         .enable         = s3c2443_enable_hsmmc,
-        .set_parent     = s3c2443_setparent_hsmmc,
+        .ops            = &(struct clk_ops) {
+                .set_parent     = s3c2443_setparent_hsmmc,
+        },
 };
 
 /* i2s_eplldiv
  *
- * this clock is the output from the i2s divisor of esysclk
+ * This clock is the output from the I2S divisor of ESYSCLK, and is seperate
+ * from the mux that comes after it (cannot merge into one single clock)
 */
 
-static unsigned long s3c2443_getrate_i2s_eplldiv(struct clk *clk)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long div = __raw_readl(S3C2443_CLKDIV1);
-
-        div &= S3C2443_CLKDIV1_I2SDIV_MASK;
-        div >>= S3C2443_CLKDIV1_I2SDIV_SHIFT;
-
-        return parent_rate / (div + 1);
-}
-
-static int s3c2443_setrate_i2s_eplldiv(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long clkdivn = __raw_readl(S3C2443_CLKDIV1);
-
-        rate = s3c2443_roundrate_clksrc16(clk, rate);
-        rate = parent_rate / rate;
-
-        clkdivn &= ~S3C2443_CLKDIV1_I2SDIV_MASK;
-        clkdivn |= (rate - 1) << S3C2443_CLKDIV1_I2SDIV_SHIFT;
-
-        __raw_writel(clkdivn, S3C2443_CLKDIV1);
-        return 0;
-}
-
-static struct clk clk_i2s_eplldiv = {
-        .name           = "i2s-eplldiv",
-        .id             = -1,
-        .parent         = &clk_esysclk,
-        .get_rate       = s3c2443_getrate_i2s_eplldiv,
-        .set_rate       = s3c2443_setrate_i2s_eplldiv,
-        .round_rate     = s3c2443_roundrate_clksrc16,
+static struct clksrc_clk clk_i2s_eplldiv = {
+        .clk    = {
+                .name           = "i2s-eplldiv",
+                .id             = -1,
+                .parent         = &clk_esysclk.clk,
+        },
+        .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 12, },
 };
 
 /* i2s-ref
  *
  * i2s bus reference clock, selectable from external, esysclk or epllref
+ *
+ * Note, this used to be two clocks, but was compressed into one.
 */
 
-static int s3c2443_setparent_i2s(struct clk *clk, struct clk *parent)
-{
-        unsigned long clksrc = __raw_readl(S3C2443_CLKSRC);
-
-        clksrc &= ~S3C2443_CLKSRC_I2S_MASK;
-
-        if (parent == &clk_epllref)
-                clksrc |= S3C2443_CLKSRC_I2S_EPLLREF;
-        else if (parent == &clk_i2s_ext)
-                clksrc |= S3C2443_CLKSRC_I2S_EXT;
-        else if (parent != &clk_i2s_eplldiv)
-                return -EINVAL;
-
-        clk->parent = parent;
-        __raw_writel(clksrc, S3C2443_CLKSRC);
-
-        return 0;
-}
+struct clk *clk_i2s_srclist[] = {
+        [0] = &clk_i2s_eplldiv.clk,
+        [1] = &clk_i2s_ext,
+        [2] = &clk_epllref.clk,
+        [3] = &clk_epllref.clk,
+};
 
-static struct clk clk_i2s = {
-        .name           = "i2s-if",
-        .id             = -1,
-        .parent         = &clk_i2s_eplldiv,
-        .ctrlbit        = S3C2443_SCLKCON_I2SCLK,
-        .enable         = s3c2443_clkcon_enable_s,
-        .set_parent     = s3c2443_setparent_i2s,
+static struct clksrc_clk clk_i2s = {
+        .clk    = {
+                .name           = "i2s-if",
+                .id             = -1,
+                .ctrlbit        = S3C2443_SCLKCON_I2SCLK,
+                .enable         = s3c2443_clkcon_enable_s,
+
+        },
+        .sources = &(struct clksrc_sources) {
+                .sources = clk_i2s_srclist,
+                .nr_sources = ARRAY_SIZE(clk_i2s_srclist),
+        },
+        .reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 14 },
 };
 
 /* cam-if
@@ -586,41 +438,15 @@ static struct clk clk_i2s = {
  * camera interface bus-clock, divided down from esysclk
 */
 
-static unsigned long s3c2443_getrate_cam(struct clk *clk)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long div = __raw_readl(S3C2443_CLKDIV1);
-
-        div  &= S3C2443_CLKDIV1_CAMDIV_MASK;
-        div >>= S3C2443_CLKDIV1_CAMDIV_SHIFT;
-
-        return parent_rate / (div + 1);
-}
-
-static int s3c2443_setrate_cam(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long clkdiv1 = __raw_readl(S3C2443_CLKDIV1);
-
-        rate = s3c2443_roundrate_clksrc16(clk, rate);
-        rate = parent_rate / rate;
-
-        clkdiv1 &= ~S3C2443_CLKDIV1_CAMDIV_MASK;
-        clkdiv1 |= (rate - 1) << S3C2443_CLKDIV1_CAMDIV_SHIFT;
-
-        __raw_writel(clkdiv1, S3C2443_CLKDIV1);
-        return 0;
-}
-
-static struct clk clk_cam = {
-        .name           = "camif-upll",         /* same as 2440 name */
-        .id             = -1,
-        .parent         = &clk_esysclk,
-        .ctrlbit        = S3C2443_SCLKCON_CAMCLK,
-        .enable         = s3c2443_clkcon_enable_s,
-        .get_rate       = s3c2443_getrate_cam,
-        .set_rate       = s3c2443_setrate_cam,
-        .round_rate     = s3c2443_roundrate_clksrc16,
+static struct clksrc_clk clk_cam = {
+        .clk    = {
+                .name           = "camif-upll", /* same as 2440 name */
+                .id             = -1,
+                .parent         = &clk_esysclk.clk,
+                .ctrlbit        = S3C2443_SCLKCON_CAMCLK,
+                .enable         = s3c2443_clkcon_enable_s,
+        },
+        .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 26 },
 };
 
 /* display-if
@@ -628,41 +454,15 @@ static struct clk clk_cam = {
  * display interface clock, divided from esysclk
 */
 
-static unsigned long s3c2443_getrate_display(struct clk *clk)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long div = __raw_readl(S3C2443_CLKDIV1);
-
-        div &= S3C2443_CLKDIV1_DISPDIV_MASK;
-        div >>= S3C2443_CLKDIV1_DISPDIV_SHIFT;
-
-        return parent_rate / (div + 1);
-}
-
-static int s3c2443_setrate_display(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        unsigned long clkdivn = __raw_readl(S3C2443_CLKDIV1);
-
-        rate = s3c2443_roundrate_clksrc256(clk, rate);
-        rate = parent_rate / rate;
-
-        clkdivn &= ~S3C2443_CLKDIV1_UARTDIV_MASK;
-        clkdivn |= (rate - 1) << S3C2443_CLKDIV1_UARTDIV_SHIFT;
-
-        __raw_writel(clkdivn, S3C2443_CLKDIV1);
-        return 0;
-}
-
-static struct clk clk_display = {
-        .name           = "display-if",
-        .id             = -1,
-        .parent         = &clk_esysclk,
-        .ctrlbit        = S3C2443_SCLKCON_DISPCLK,
-        .enable         = s3c2443_clkcon_enable_s,
-        .get_rate       = s3c2443_getrate_display,
-        .set_rate       = s3c2443_setrate_display,
-        .round_rate     = s3c2443_roundrate_clksrc256,
+static struct clksrc_clk clk_display = {
+        .clk    = {
+                .name           = "display-if",
+                .id             = -1,
+                .parent         = &clk_esysclk.clk,
+                .ctrlbit        = S3C2443_SCLKCON_DISPCLK,
+                .enable         = s3c2443_clkcon_enable_s,
+        },
+        .reg_div = { .reg = S3C2443_CLKDIV1, .size = 8, .shift = 16 },
 };
 
 /* prediv
@@ -684,8 +484,10 @@ static unsigned long s3c2443_prediv_getrate(struct clk *clk)
 static struct clk clk_prediv = {
         .name           = "prediv",
         .id             = -1,
-        .parent         = &clk_msysclk,
-        .get_rate       = s3c2443_prediv_getrate,
+        .parent         = &clk_msysclk.clk,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s3c2443_prediv_getrate,
+        },
 };
 
 /* standard clock definitions */
@@ -857,7 +659,7 @@ static struct clk init_clocks[] = {
         }, {
                 .name           = "usb-bus-host",
                 .id             = -1,
-                .parent         = &clk_usb_bus_host,
+                .parent         = &clk_usb_bus_host.clk,
         }, {
                 .name           = "ac97",
                 .id             = -1,
@@ -868,103 +670,26 @@ static struct clk init_clocks[] = {
 
 /* clocks to add where we need to check their parentage */
 
-/* s3c2443_clk_initparents
- *
- * Initialise the parents for the clocks that we get at start-time
-*/
-
-static int __init clk_init_set_parent(struct clk *clk, struct clk *parent)
-{
-        printk(KERN_DEBUG "clock %s: parent %s\n", clk->name, parent->name);
-        return clk_set_parent(clk, parent);
-}
-
-static void __init s3c2443_clk_initparents(void)
-{
-        unsigned long clksrc = __raw_readl(S3C2443_CLKSRC);
-        struct clk *parent;
-
-        switch (clksrc & S3C2443_CLKSRC_EPLLREF_MASK) {
-        case S3C2443_CLKSRC_EPLLREF_EXTCLK:
-                parent = &clk_ext;
-                break;
-
-        case S3C2443_CLKSRC_EPLLREF_XTAL:
-        default:
-                parent = &clk_xtal;
-                break;
-
-        case S3C2443_CLKSRC_EPLLREF_MPLLREF:
-        case S3C2443_CLKSRC_EPLLREF_MPLLREF2:
-                parent = &clk_mpllref;
-                break;
-        }
-
-        clk_init_set_parent(&clk_epllref, parent);
-
-        switch (clksrc & S3C2443_CLKSRC_I2S_MASK) {
-        case S3C2443_CLKSRC_I2S_EXT:
-                parent = &clk_i2s_ext;
-                break;
-
-        case S3C2443_CLKSRC_I2S_EPLLDIV:
-        default:
-                parent = &clk_i2s_eplldiv;
-                break;
-
-        case S3C2443_CLKSRC_I2S_EPLLREF:
-        case S3C2443_CLKSRC_I2S_EPLLREF3:
-                parent = &clk_epllref;
-        }
-
-        clk_init_set_parent(&clk_i2s, &clk_epllref);
-
-        /* esysclk source */
-
-        parent = (clksrc & S3C2443_CLKSRC_ESYSCLK_EPLL) ?
-                &clk_epll : &clk_epllref;
-
-        clk_init_set_parent(&clk_esysclk, parent);
-
-        /* msysclk source */
-
-        if (clksrc & S3C2443_CLKSRC_MSYSCLK_MPLL) {
-                parent = &clk_mpll;
-        } else {
-                parent = (clksrc & S3C2443_CLKSRC_EXTCLK_DIV) ?
-                        &clk_mdivclk : &clk_mpllref;
-        }
-
-        clk_init_set_parent(&clk_msysclk, parent);
-
-        /* arm */
-
-        if (__raw_readl(S3C2443_CLKDIV0) & S3C2443_CLKDIV0_DVS)
-                parent = &clk_h;
-        else
-                parent = &clk_armdiv;
-
-        clk_init_set_parent(&clk_arm, parent);
-}
-
-/* armdiv divisor table */
-
-static unsigned int armdiv[16] = {
-        [S3C2443_CLKDIV0_ARMDIV_1 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 1,
-        [S3C2443_CLKDIV0_ARMDIV_2 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 2,
-        [S3C2443_CLKDIV0_ARMDIV_3 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 3,
-        [S3C2443_CLKDIV0_ARMDIV_4 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 4,
-        [S3C2443_CLKDIV0_ARMDIV_6 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 6,
-        [S3C2443_CLKDIV0_ARMDIV_8 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]      = 8,
-        [S3C2443_CLKDIV0_ARMDIV_12 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]     = 12,
-        [S3C2443_CLKDIV0_ARMDIV_16 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]     = 16,
+static struct clksrc_clk __initdata *init_list[] = {
+        &clk_epllref, /* should be first */
+        &clk_esysclk,
+        &clk_msysclk,
+        &clk_arm,
+        &clk_i2s_eplldiv,
+        &clk_i2s,
+        &clk_cam,
+        &clk_uart,
+        &clk_display,
+        &clk_hsmmc_div,
+        &clk_usb_bus_host,
 };
 
-static inline unsigned int s3c2443_fclk_div(unsigned long clkcon0)
+static void __init s3c2443_clk_initparents(void)
 {
-        clkcon0 &= S3C2443_CLKDIV0_ARMDIV_MASK;
+        int ptr;
 
-        return armdiv[clkcon0 >> S3C2443_CLKDIV0_ARMDIV_SHIFT];
+        for (ptr = 0; ptr < ARRAY_SIZE(init_list); ptr++)
+                s3c_set_clksrc(init_list[ptr], true);
 }
 
 static inline unsigned long s3c2443_get_hdiv(unsigned long clkcon0)
@@ -976,15 +701,12 @@ static inline unsigned long s3c2443_get_hdiv(unsigned long clkcon0)
 
 /* clocks to add straight away */
 
-static struct clk *clks[] __initdata = {
-        &clk_ext,
-        &clk_epll,
+static struct clksrc_clk *clksrcs[] __initdata = {
         &clk_usb_bus_host,
-        &clk_usb_bus,
-        &clk_esysclk,
         &clk_epllref,
-        &clk_mpllref,
+        &clk_esysclk,
         &clk_msysclk,
+        &clk_arm,
         &clk_uart,
         &clk_display,
         &clk_cam,
@@ -992,9 +714,15 @@ static struct clk *clks[] __initdata = {
         &clk_i2s,
         &clk_hsspi,
         &clk_hsmmc_div,
+};
+
+static struct clk *clks[] __initdata = {
+        &clk_ext,
+        &clk_epll,
+        &clk_usb_bus,
+        &clk_mpllref,
         &clk_hsmmc,
         &clk_armdiv,
-        &clk_arm,
         &clk_prediv,
 };
 
@@ -1014,7 +742,7 @@ void __init_or_cpufreq s3c2443_setup_clocks(void)
         clk_put(xtal_clk);
 
         pll = s3c2443_get_mpll(mpllcon, xtal);
-        clk_msysclk.rate = pll;
+        clk_msysclk.clk.rate = pll;
 
         fclk = pll / s3c2443_fclk_div(clkdiv0);
         hclk = s3c2443_prediv_getrate(&clk_prediv);
@@ -1056,15 +784,18 @@ void __init s3c2443_init_clocks(int xtal)
                 }
         }
 
+        for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
+                s3c_register_clksrc(clksrcs[ptr], 1);
+
         clk_epll.rate = s3c2443_get_epll(epllcon, xtal);
-        clk_epll.parent = &clk_epllref;
-        clk_usb_bus.parent = &clk_usb_bus_host;
+        clk_epll.parent = &clk_epllref.clk;
+        clk_usb_bus.parent = &clk_usb_bus_host.clk;
 
         /* ensure usb bus clock is within correct rate of 48MHz */
 
-        if (clk_get_rate(&clk_usb_bus_host) != (48 * 1000 * 1000)) {
+        if (clk_get_rate(&clk_usb_bus_host.clk) != (48 * 1000 * 1000)) {
                 printk(KERN_INFO "Warning: USB host bus not at 48MHz\n");
-                clk_set_rate(&clk_usb_bus_host, 48*1000*1000);
+                clk_set_rate(&clk_usb_bus_host.clk, 48*1000*1000);
         }
 
         printk("S3C2443: epll %s %ld.%03ld MHz, usb-bus %ld.%03ld MHz\n",
@@ -1074,14 +805,7 @@ void __init s3c2443_init_clocks(int xtal)
 
         /* register clocks from clock array */
 
-        clkp = init_clocks;
-        for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) {
-                ret = s3c24xx_register_clock(clkp);
-                if (ret < 0) {
-                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
-                               clkp->name, ret);
-                }
-        }
+        s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
 
         /* We must be careful disabling the clocks we are not intending to
          * be using at boot time, as subsystems such as the LCD which do
diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c
index 397f3b5c0b4..3f658685ec1 100644
--- a/arch/arm/mach-s3c2443/dma.c
+++ b/arch/arm/mach-s3c2443/dma.c
@@ -20,7 +20,7 @@
 
 #include <mach/dma.h>
 
-#include <plat/dma-plat.h>
+#include <plat/dma-s3c24xx.h>
 #include <plat/cpu.h>
 
 #include <plat/regs-serial.h>
diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c
index 039a4624310..e2e362bda9b 100644
--- a/arch/arm/mach-s3c2443/mach-smdk2443.c
+++ b/arch/arm/mach-s3c2443/mach-smdk2443.c
@@ -40,7 +40,7 @@
 #include <plat/iic.h>
 
 #include <plat/s3c2410.h>
-#include <plat/s3c2440.h>
+#include <plat/s3c2443.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
@@ -106,6 +106,9 @@ static struct platform_device *smdk2443_devices[] __initdata = {
         &s3c_device_wdt,
         &s3c_device_i2c0,
         &s3c_device_hsmmc0,
+#ifdef CONFIG_SND_SOC_SMDK2443_WM9710
+        &s3c_device_ac97,
+#endif
 };
 
 static void __init smdk2443_map_io(void)
@@ -118,6 +121,11 @@ static void __init smdk2443_map_io(void)
 static void __init smdk2443_machine_init(void)
 {
         s3c_i2c0_set_platdata(NULL);
+
+#ifdef CONFIG_SND_SOC_SMDK2443_WM9710
+        s3c24xx_ac97_setup_gpio(S3C24XX_AC97_GPE0);
+#endif
+
         platform_add_devices(smdk2443_devices, ARRAY_SIZE(smdk2443_devices));
         smdk_machine_init();
 }
diff --git a/arch/arm/plat-s3c/include/mach/io.h b/arch/arm/mach-s3c24a0/include/mach/io.h
index f6a53631b66..4326c30fabc 100644
--- a/arch/arm/plat-s3c/include/mach/io.h
+++ b/arch/arm/mach-s3c24a0/include/mach/io.h
@@ -1,9 +1,9 @@
-/* arch/arm/plat-s3c/include/mach/io.h
+/* arch/arm/mach-s3c24a0/include/mach/io.h
  *
  * Copyright 2008 Simtec Electronics
  *      Ben Dooks <ben-linux@fluff.org>
  *
- * Default IO routines for plat-s3c based systems, such as S3C24A0
+ * Default IO routines for S3C24A0
  */
 
 #ifndef __ASM_ARM_ARCH_IO_H
diff --git a/arch/arm/mach-s3c6400/Kconfig b/arch/arm/mach-s3c6400/Kconfig
deleted file mode 100644
index a250bf68709..00000000000
--- a/arch/arm/mach-s3c6400/Kconfig
+++ /dev/null
@@ -1,30 +0,0 @@
-# Copyright 2008 Openmoko, Inc.
-#       Simtec Electronics, Ben Dooks <ben@simtec.co.uk>
-#
-# Licensed under GPLv2
-
-# Configuration options for the S3C6410 CPU
-
-config CPU_S3C6400
-        bool
-        select CPU_S3C6400_INIT
-        select CPU_S3C6400_CLOCK
-        help
-          Enable S3C6400 CPU support
-
-config S3C6400_SETUP_SDHCI
-        bool
-        help
-          Internal configuration for default SDHCI
-          setup for S3C6400.
-
-# S36400 Macchine support
-
-config MACH_SMDK6400
-       bool "SMDK6400"
-        select CPU_S3C6400
-        select S3C_DEV_HSMMC
-        select S3C_DEV_NAND
-        select S3C6400_SETUP_SDHCI
-        help
-          Machine support for the Samsung SMDK6400
diff --git a/arch/arm/mach-s3c6400/Makefile b/arch/arm/mach-s3c6400/Makefile
deleted file mode 100644
index df1ce4aa03e..00000000000
--- a/arch/arm/mach-s3c6400/Makefile
+++ /dev/null
@@ -1,23 +0,0 @@
-# arch/arm/mach-s3c6400/Makefile
-#
-# Copyright 2008 Openmoko, Inc.
-# Copyright 2008 Simtec Electronics
-#
-# Licensed under GPLv2
-
-obj-y                           :=
-obj-m                           :=
-obj-n                           :=
-obj-                            :=
-
-# Core support for S3C6400 system
-
-obj-$(CONFIG_CPU_S3C6400)       += s3c6400.o
-
-# setup support
-
-obj-$(CONFIG_S3C6400_SETUP_SDHCI) += setup-sdhci.o
-
-# Machine support
-
-obj-$(CONFIG_MACH_SMDK6400)     += mach-smdk6400.o
diff --git a/arch/arm/mach-s3c6400/include/mach/dma.h b/arch/arm/mach-s3c6400/include/mach/dma.h
deleted file mode 100644
index 6723860748b..00000000000
--- a/arch/arm/mach-s3c6400/include/mach/dma.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/* linux/arch/arm/mach-s3c6400/include/mach/dma.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C6400 - DMA support
- */
-
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H __FILE__
-
-#define S3C_DMA_CHANNELS        (16)
-
-/* see mach-s3c2410/dma.h for notes on dma channel numbers */
-
-/* Note, for the S3C64XX architecture we keep the DMACH_
- * defines in the order they are allocated to [S]DMA0/[S]DMA1
- * so that is easy to do DHACH_ -> DMA controller conversion
- */
-enum dma_ch {
-        /* DMA0/SDMA0 */
-        DMACH_UART0 = 0,
-        DMACH_UART0_SRC2,
-        DMACH_UART1,
-        DMACH_UART1_SRC2,
-        DMACH_UART2,
-        DMACH_UART2_SRC2,
-        DMACH_UART3,
-        DMACH_UART3_SRC2,
-        DMACH_PCM0_TX,
-        DMACH_PCM0_RX,
-        DMACH_I2S0_OUT,
-        DMACH_I2S0_IN,
-        DMACH_SPI0_TX,
-        DMACH_SPI0_RX,
-        DMACH_HSI_I2SV40_TX,
-        DMACH_HSI_I2SV40_RX,
-
-        /* DMA1/SDMA1 */
-        DMACH_PCM1_TX = 16,
-        DMACH_PCM1_RX,
-        DMACH_I2S1_OUT,
-        DMACH_I2S1_IN,
-        DMACH_SPI1_TX,
-        DMACH_SPI1_RX,
-        DMACH_AC97_PCMOUT,
-        DMACH_AC97_PCMIN,
-        DMACH_AC97_MICIN,
-        DMACH_PWM,
-        DMACH_IRDA,
-        DMACH_EXTERNAL,
-        DMACH_RES1,
-        DMACH_RES2,
-        DMACH_SECURITY_RX,      /* SDMA1 only */
-        DMACH_SECURITY_TX,      /* SDMA1 only */
-        DMACH_MAX               /* the end */
-};
-
-static __inline__ bool s3c_dma_has_circular(void)
-{
-        return true;
-}
-
-#define S3C2410_DMAF_CIRCULAR           (1 << 0)
-
-#include <plat/dma.h>
-
-#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/gpio-core.h b/arch/arm/mach-s3c6400/include/mach/gpio-core.h
deleted file mode 100644
index d89aae68b0a..00000000000
--- a/arch/arm/mach-s3c6400/include/mach/gpio-core.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/* arch/arm/mach-s3c6400/include/mach/gpio-core.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C64XX - GPIO core support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_GPIO_CORE_H
-#define __ASM_ARCH_GPIO_CORE_H __FILE__
-
-/* currently we just include the platform support */
-#include <plat/gpio-core.h>
-
-#endif /* __ASM_ARCH_GPIO_CORE_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/irqs.h b/arch/arm/mach-s3c6400/include/mach/irqs.h
deleted file mode 100644
index 4c97f9a4370..00000000000
--- a/arch/arm/mach-s3c6400/include/mach/irqs.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* linux/arch/arm/mach-s3c6400/include/mach/irqs.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C6400 - IRQ definitions
- */
-
-#ifndef __ASM_ARCH_IRQS_H
-#define __ASM_ARCH_IRQS_H __FILE__
-
-#include <plat/irqs.h>
-
-#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/regs-clock.h b/arch/arm/mach-s3c6400/include/mach/regs-clock.h
deleted file mode 100644
index a6c7f4eb3a1..00000000000
--- a/arch/arm/mach-s3c6400/include/mach/regs-clock.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* linux/arch/arm/mach-s3c6400/include/mach/regs-clock.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      http://armlinux.simtec.co.uk/
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * S3C64XX - clock register compatibility with s3c24xx
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <plat/regs-clock.h>
-
diff --git a/arch/arm/mach-s3c6410/Makefile b/arch/arm/mach-s3c6410/Makefile
deleted file mode 100644
index 3e48c3dbf97..00000000000
--- a/arch/arm/mach-s3c6410/Makefile
+++ /dev/null
@@ -1,26 +0,0 @@
-# arch/arm/plat-s3c6410/Makefile
-#
-# Copyright 2008 Openmoko, Inc.
-# Copyright 2008 Simtec Electronics
-#
-# Licensed under GPLv2
-
-obj-y                           :=
-obj-m                           :=
-obj-n                           :=
-obj-                            :=
-
-# Core support for S3C6410 system
-
-obj-$(CONFIG_CPU_S3C6410)       += cpu.o
-
-# Helper and device support
-
-obj-$(CONFIG_S3C6410_SETUP_SDHCI)       += setup-sdhci.o
-
-# machine support
-
-obj-$(CONFIG_MACH_ANW6410)      += mach-anw6410.o
-obj-$(CONFIG_MACH_SMDK6410)     += mach-smdk6410.o
-obj-$(CONFIG_MACH_NCP)          += mach-ncp.o
-obj-$(CONFIG_MACH_HMT)          += mach-hmt.o
diff --git a/arch/arm/mach-s3c6410/setup-sdhci.c b/arch/arm/mach-s3c6410/setup-sdhci.c
deleted file mode 100644
index 816d2d9f9ef..00000000000
--- a/arch/arm/mach-s3c6410/setup-sdhci.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/* linux/arch/arm/mach-s3c6410/setup-sdhci.c
- *
- * Copyright 2008 Simtec Electronics
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-
-#include <linux/mmc/card.h>
-#include <linux/mmc/host.h>
-
-#include <plat/regs-sdhci.h>
-#include <plat/sdhci.h>
-
-/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
-
-char *s3c6410_hsmmc_clksrcs[4] = {
-        [0] = "hsmmc",
-        [1] = "hsmmc",
-        [2] = "mmc_bus",
-        /* [3] = "48m", - note not successfully used yet */
-};
-
-
-void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev,
-                                    void __iomem *r,
-                                    struct mmc_ios *ios,
-                                    struct mmc_card *card)
-{
-        u32 ctrl2, ctrl3;
-
-        /* don't need to alter anything acording to card-type */
-
-        writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
-
-        ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
-        ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
-        ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
-                  S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
-                  S3C_SDHCI_CTRL2_ENFBCLKRX |
-                  S3C_SDHCI_CTRL2_DFCNT_NONE |
-                  S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
-
-        if (ios->clock < 25 * 1000000)
-                ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
-                         S3C_SDHCI_CTRL3_FCSEL2 |
-                         S3C_SDHCI_CTRL3_FCSEL1 |
-                         S3C_SDHCI_CTRL3_FCSEL0);
-        else
-                ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
-
-        printk(KERN_INFO "%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3);
-        writel(ctrl2, r + S3C_SDHCI_CONTROL2);
-        writel(ctrl3, r + S3C_SDHCI_CONTROL3);
-}
-
diff --git a/arch/arm/mach-s3c6410/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 162f4561f80..959df3840de 100644
--- a/arch/arm/mach-s3c6410/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -1,22 +1,78 @@
 # Copyright 2008 Openmoko, Inc.
-# Copyright 2008 Simtec Electronics
+#       Simtec Electronics, Ben Dooks <ben@simtec.co.uk>
 #
 # Licensed under GPLv2
 
+# temporary until we can eliminate all drivers using it.
+config PLAT_S3C64XX
+        bool
+        depends on ARCH_S3C64XX
+        default y
+        help
+          Base platform code for any Samsung S3C64XX device
+
+
 # Configuration options for the S3C6410 CPU
 
+config CPU_S3C6400
+        bool
+        help
+          Enable S3C6400 CPU support
+
 config CPU_S3C6410
         bool
-        select CPU_S3C6400_INIT
-        select CPU_S3C6400_CLOCK
         help
           Enable S3C6410 CPU support
 
-config S3C6410_SETUP_SDHCI
-        bool
+config S3C64XX_DMA
+        bool "S3C64XX DMA"
+        select S3C_DMA
+
+config S3C64XX_SETUP_SDHCI
         select S3C64XX_SETUP_SDHCI_GPIO
+        bool
         help
-          Internal helper functions for S3C6410 based SDHCI systems
+          Internal configuration for default SDHCI setup for S3C6400 and
+          S3C6410 SoCs.
+
+# platform specific device setup
+
+config S3C64XX_SETUP_I2C0
+        bool
+        default y
+        help
+          Common setup code for i2c bus 0.
+
+          Note, currently since i2c0 is always compiled, this setup helper
+          is always compiled with it.
+
+config S3C64XX_SETUP_I2C1
+        bool
+        help
+          Common setup code for i2c bus 1.
+
+config S3C64XX_SETUP_FB_24BPP
+        bool
+        help
+          Common setup code for S3C64XX with an 24bpp RGB display helper.
+
+config S3C64XX_SETUP_SDHCI_GPIO
+        bool
+        help
+          Common setup code for S3C64XX SDHCI GPIO configurations
+
+# S36400 Macchine support
+
+config MACH_SMDK6400
+       bool "SMDK6400"
+        select CPU_S3C6400
+        select S3C_DEV_HSMMC
+        select S3C_DEV_NAND
+        select S3C64XX_SETUP_SDHCI
+        help
+          Machine support for the Samsung SMDK6400
+
+# S3C6410 machine support
 
 config MACH_ANW6410
         bool "A&W6410"
@@ -35,7 +91,7 @@ config MACH_SMDK6410
         select S3C_DEV_FB
         select S3C_DEV_USB_HOST
         select S3C_DEV_USB_HSOTG
-        select S3C6410_SETUP_SDHCI
+        select S3C64XX_SETUP_SDHCI
         select S3C64XX_SETUP_I2C1
         select S3C64XX_SETUP_FB_24BPP
         help
@@ -58,7 +114,7 @@ config SMDK6410_SD_CH0
           at least some SMDK6410 boards come with the
           resistors fitted so that the card detects for
           channels 0 and 1 are the same.
-       
+
 config SMDK6410_SD_CH1
         bool "Use channel 1 only"
         depends on MACH_SMDK6410
@@ -88,6 +144,21 @@ config SMDK6410_WM1190_EV1
           detected at runtime so the the resulting kernel can be used
           with or without the 1190-EV1 fitted.
 
+config SMDK6410_WM1192_EV1
+        bool "Support Wolfson Microelectronics 1192-EV1 PMIC card"
+        depends on MACH_SMDK6410
+        select REGULATOR
+        select REGULATOR_WM831X
+        select S3C24XX_GPIO_EXTRA64
+        select MFD_WM831X
+        help
+          The Wolfson Microelectronics 1192-EV1 is a WM831x based PMIC
+          daughtercard for the Samsung SMDK6410 reference platform.
+          Enabling this option will build support for this module into
+          the kernel.  The presence of the daughtercard will be
+          detected at runtime so the the resulting kernel can be used
+          with or without the 1192-EV1 fitted.
+
 config MACH_NCP
         bool "NCP"
         select CPU_S3C6410
diff --git a/arch/arm/plat-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile
index b85b4359e93..3758e15086b 100644
--- a/arch/arm/plat-s3c64xx/Makefile
+++ b/arch/arm/mach-s3c64xx/Makefile
@@ -1,4 +1,4 @@
-# arch/arm/plat-s3c64xx/Makefile
+# arch/arm/mach-s3c64xx/Makefile
 #
 # Copyright 2008 Openmoko, Inc.
 # Copyright 2008 Simtec Electronics
@@ -7,29 +7,25 @@
 
 obj-y                           :=
 obj-m                           :=
-obj-n                           := dummy.o
+obj-n                           :=
 obj-                            :=
 
 # Core files
-
-obj-y                           += dev-uart.o
 obj-y                           += cpu.o
-obj-y                           += irq.o
-obj-y                           += irq-eint.o
 obj-y                           += clock.o
 obj-y                           += gpiolib.o
 
-# CPU support
+# Core support for S3C6400 system
 
-obj-$(CONFIG_CPU_S3C6400_INIT)  += s3c6400-init.o
-obj-$(CONFIG_CPU_S3C6400_CLOCK) += s3c6400-clock.o
-obj-$(CONFIG_CPU_FREQ_S3C64XX)  += cpufreq.o
+obj-$(CONFIG_CPU_S3C6400)       += s3c6400.o
+obj-$(CONFIG_CPU_S3C6410)       += s3c6410.o
 
-# PM support
+obj-y                           += irq.o
+obj-y                           += irq-eint.o
 
-obj-$(CONFIG_PM)                += pm.o
-obj-$(CONFIG_PM)                += sleep.o
-obj-$(CONFIG_PM)                += irq-pm.o
+# CPU frequency scaling
+
+obj-$(CONFIG_CPU_FREQ_S3C64XX)  += cpufreq.o
 
 # DMA support
 
@@ -39,6 +35,28 @@ obj-$(CONFIG_S3C64XX_DMA)	+= dma.o
 
 obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o
 obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o
+obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o
 obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o
 obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
-obj-$(CONFIG_SND_S3C24XX_SOC) += dev-audio.o
+
+# PM
+
+obj-$(CONFIG_PM)                += pm.o
+obj-$(CONFIG_PM)                += sleep.o
+obj-$(CONFIG_PM)                += irq-pm.o
+
+# Machine support
+
+obj-$(CONFIG_MACH_ANW6410)      += mach-anw6410.o
+obj-$(CONFIG_MACH_SMDK6400)     += mach-smdk6400.o
+obj-$(CONFIG_MACH_SMDK6410)     += mach-smdk6410.o
+obj-$(CONFIG_MACH_NCP)          += mach-ncp.o
+obj-$(CONFIG_MACH_HMT)          += mach-hmt.o
+
+# device support
+
+obj-y                           += dev-uart.o
+obj-y                           += dev-rtc.o
+obj-y                           += dev-audio.o
+obj-$(CONFIG_S3C_ADC)           += dev-adc.o
+obj-$(CONFIG_S3C64XX_DEV_SPI)   += dev-spi.o
diff --git a/arch/arm/mach-s3c6400/Makefile.boot b/arch/arm/mach-s3c64xx/Makefile.boot
index ba41fdc0a58..ba41fdc0a58 100644
--- a/arch/arm/mach-s3c6400/Makefile.boot
+++ b/arch/arm/mach-s3c64xx/Makefile.boot
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
new file mode 100644
index 00000000000..2ac2e7d73e5
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -0,0 +1,809 @@
+/* linux/arch/arm/plat-s3c64xx/clock.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C64XX Base clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/io.h>
+
+#include <mach/hardware.h>
+#include <mach/map.h>
+
+#include <mach/regs-sys.h>
+#include <mach/regs-clock.h>
+#include <mach/pll.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/cpu-freq.h>
+#include <plat/clock.h>
+#include <plat/clock-clksrc.h>
+
+/* fin_apll, fin_mpll and fin_epll are all the same clock, which we call
+ * ext_xtal_mux for want of an actual name from the manual.
+*/
+
+static struct clk clk_ext_xtal_mux = {
+        .name           = "ext_xtal",
+        .id             = -1,
+};
+
+#define clk_fin_apll clk_ext_xtal_mux
+#define clk_fin_mpll clk_ext_xtal_mux
+#define clk_fin_epll clk_ext_xtal_mux
+
+#define clk_fout_mpll   clk_mpll
+#define clk_fout_epll   clk_epll
+
+struct clk clk_h2 = {
+        .name           = "hclk2",
+        .id             = -1,
+        .rate           = 0,
+};
+
+struct clk clk_27m = {
+        .name           = "clk_27m",
+        .id             = -1,
+        .rate           = 27000000,
+};
+
+static int clk_48m_ctrl(struct clk *clk, int enable)
+{
+        unsigned long flags;
+        u32 val;
+
+        /* can't rely on clock lock, this register has other usages */
+        local_irq_save(flags);
+
+        val = __raw_readl(S3C64XX_OTHERS);
+        if (enable)
+                val |= S3C64XX_OTHERS_USBMASK;
+        else
+                val &= ~S3C64XX_OTHERS_USBMASK;
+
+        __raw_writel(val, S3C64XX_OTHERS);
+        local_irq_restore(flags);
+
+        return 0;
+}
+
+struct clk clk_48m = {
+        .name           = "clk_48m",
+        .id             = -1,
+        .rate           = 48000000,
+        .enable         = clk_48m_ctrl,
+};
+
+static int inline s3c64xx_gate(void __iomem *reg,
+                                struct clk *clk,
+                                int enable)
+{
+        unsigned int ctrlbit = clk->ctrlbit;
+        u32 con;
+
+        con = __raw_readl(reg);
+
+        if (enable)
+                con |= ctrlbit;
+        else
+                con &= ~ctrlbit;
+
+        __raw_writel(con, reg);
+        return 0;
+}
+
+static int s3c64xx_pclk_ctrl(struct clk *clk, int enable)
+{
+        return s3c64xx_gate(S3C_PCLK_GATE, clk, enable);
+}
+
+static int s3c64xx_hclk_ctrl(struct clk *clk, int enable)
+{
+        return s3c64xx_gate(S3C_HCLK_GATE, clk, enable);
+}
+
+int s3c64xx_sclk_ctrl(struct clk *clk, int enable)
+{
+        return s3c64xx_gate(S3C_SCLK_GATE, clk, enable);
+}
+
+static struct clk init_clocks_disable[] = {
+        {
+                .name           = "nand",
+                .id             = -1,
+                .parent         = &clk_h,
+        }, {
+                .name           = "adc",
+                .id             = -1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_TSADC,
+        }, {
+                .name           = "i2c",
+                .id             = -1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_IIC,
+        }, {
+                .name           = "iis",
+                .id             = 0,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_IIS0,
+        }, {
+                .name           = "iis",
+                .id             = 1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_IIS1,
+        }, {
+#ifdef CONFIG_CPU_S3C6410
+                .name           = "iis",
+                .id             = -1,  /* There's only one IISv4 port */
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C6410_CLKCON_PCLK_IIS2,
+        }, {
+#endif
+                .name           = "spi",
+                .id             = 0,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_SPI0,
+        }, {
+                .name           = "spi",
+                .id             = 1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_SPI1,
+        }, {
+                .name           = "spi_48m",
+                .id             = 0,
+                .parent         = &clk_48m,
+                .enable         = s3c64xx_sclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_SCLK_SPI0_48,
+        }, {
+                .name           = "spi_48m",
+                .id             = 1,
+                .parent         = &clk_48m,
+                .enable         = s3c64xx_sclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_SCLK_SPI1_48,
+        }, {
+                .name           = "48m",
+                .id             = 0,
+                .parent         = &clk_48m,
+                .enable         = s3c64xx_sclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_SCLK_MMC0_48,
+        }, {
+                .name           = "48m",
+                .id             = 1,
+                .parent         = &clk_48m,
+                .enable         = s3c64xx_sclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_SCLK_MMC1_48,
+        }, {
+                .name           = "48m",
+                .id             = 2,
+                .parent         = &clk_48m,
+                .enable         = s3c64xx_sclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_SCLK_MMC2_48,
+        }, {
+                .name           = "dma0",
+                .id             = -1,
+                .parent         = &clk_h,
+                .enable         = s3c64xx_hclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_HCLK_DMA0,
+        }, {
+                .name           = "dma1",
+                .id             = -1,
+                .parent         = &clk_h,
+                .enable         = s3c64xx_hclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_HCLK_DMA1,
+        },
+};
+
+static struct clk init_clocks[] = {
+        {
+                .name           = "lcd",
+                .id             = -1,
+                .parent         = &clk_h,
+                .enable         = s3c64xx_hclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_HCLK_LCD,
+        }, {
+                .name           = "gpio",
+                .id             = -1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_GPIO,
+        }, {
+                .name           = "usb-host",
+                .id             = -1,
+                .parent         = &clk_h,
+                .enable         = s3c64xx_hclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_HCLK_UHOST,
+        }, {
+                .name           = "hsmmc",
+                .id             = 0,
+                .parent         = &clk_h,
+                .enable         = s3c64xx_hclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_HCLK_HSMMC0,
+        }, {
+                .name           = "hsmmc",
+                .id             = 1,
+                .parent         = &clk_h,
+                .enable         = s3c64xx_hclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_HCLK_HSMMC1,
+        }, {
+                .name           = "hsmmc",
+                .id             = 2,
+                .parent         = &clk_h,
+                .enable         = s3c64xx_hclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_HCLK_HSMMC2,
+        }, {
+                .name           = "timers",
+                .id             = -1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_PWM,
+        }, {
+                .name           = "uart",
+                .id             = 0,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_UART0,
+        }, {
+                .name           = "uart",
+                .id             = 1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_UART1,
+        }, {
+                .name           = "uart",
+                .id             = 2,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_UART2,
+        }, {
+                .name           = "uart",
+                .id             = 3,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_UART3,
+        }, {
+                .name           = "rtc",
+                .id             = -1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C_CLKCON_PCLK_RTC,
+        }, {
+                .name           = "watchdog",
+                .id             = -1,
+                .parent         = &clk_p,
+                .ctrlbit        = S3C_CLKCON_PCLK_WDT,
+        }, {
+                .name           = "ac97",
+                .id             = -1,
+                .parent         = &clk_p,
+                .ctrlbit        = S3C_CLKCON_PCLK_AC97,
+        }
+};
+
+
+static struct clk clk_fout_apll = {
+        .name           = "fout_apll",
+        .id             = -1,
+};
+
+static struct clk *clk_src_apll_list[] = {
+        [0] = &clk_fin_apll,
+        [1] = &clk_fout_apll,
+};
+
+static struct clksrc_sources clk_src_apll = {
+        .sources        = clk_src_apll_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_apll_list),
+};
+
+static struct clksrc_clk clk_mout_apll = {
+        .clk    = {
+                .name           = "mout_apll",
+                .id             = -1,
+        },
+        .reg_src        = { .reg = S3C_CLK_SRC, .shift = 0, .size = 1  },
+        .sources        = &clk_src_apll,
+};
+
+static struct clk *clk_src_epll_list[] = {
+        [0] = &clk_fin_epll,
+        [1] = &clk_fout_epll,
+};
+
+static struct clksrc_sources clk_src_epll = {
+        .sources        = clk_src_epll_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_epll_list),
+};
+
+static struct clksrc_clk clk_mout_epll = {
+        .clk    = {
+                .name           = "mout_epll",
+                .id             = -1,
+        },
+        .reg_src        = { .reg = S3C_CLK_SRC, .shift = 2, .size = 1  },
+        .sources        = &clk_src_epll,
+};
+
+static struct clk *clk_src_mpll_list[] = {
+        [0] = &clk_fin_mpll,
+        [1] = &clk_fout_mpll,
+};
+
+static struct clksrc_sources clk_src_mpll = {
+        .sources        = clk_src_mpll_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_mpll_list),
+};
+
+static struct clksrc_clk clk_mout_mpll = {
+        .clk = {
+                .name           = "mout_mpll",
+                .id             = -1,
+        },
+        .reg_src        = { .reg = S3C_CLK_SRC, .shift = 1, .size = 1  },
+        .sources        = &clk_src_mpll,
+};
+
+static unsigned int armclk_mask;
+
+static unsigned long s3c64xx_clk_arm_get_rate(struct clk *clk)
+{
+        unsigned long rate = clk_get_rate(clk->parent);
+        u32 clkdiv;
+
+        /* divisor mask starts at bit0, so no need to shift */
+        clkdiv = __raw_readl(S3C_CLK_DIV0) & armclk_mask;
+
+        return rate / (clkdiv + 1);
+}
+
+static unsigned long s3c64xx_clk_arm_round_rate(struct clk *clk,
+                                                unsigned long rate)
+{
+        unsigned long parent = clk_get_rate(clk->parent);
+        u32 div;
+
+        if (parent < rate)
+                return parent;
+
+        div = (parent / rate) - 1;
+        if (div > armclk_mask)
+                div = armclk_mask;
+
+        return parent / (div + 1);
+}
+
+static int s3c64xx_clk_arm_set_rate(struct clk *clk, unsigned long rate)
+{
+        unsigned long parent = clk_get_rate(clk->parent);
+        u32 div;
+        u32 val;
+
+        if (rate < parent / (armclk_mask + 1))
+                return -EINVAL;
+
+        rate = clk_round_rate(clk, rate);
+        div = clk_get_rate(clk->parent) / rate;
+
+        val = __raw_readl(S3C_CLK_DIV0);
+        val &= ~armclk_mask;
+        val |= (div - 1);
+        __raw_writel(val, S3C_CLK_DIV0);
+
+        return 0;
+
+}
+
+static struct clk clk_arm = {
+        .name           = "armclk",
+        .id             = -1,
+        .parent         = &clk_mout_apll.clk,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s3c64xx_clk_arm_get_rate,
+                .set_rate       = s3c64xx_clk_arm_set_rate,
+                .round_rate     = s3c64xx_clk_arm_round_rate,
+        },
+};
+
+static unsigned long s3c64xx_clk_doutmpll_get_rate(struct clk *clk)
+{
+        unsigned long rate = clk_get_rate(clk->parent);
+
+        printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate);
+
+        if (__raw_readl(S3C_CLK_DIV0) & S3C6400_CLKDIV0_MPLL_MASK)
+                rate /= 2;
+
+        return rate;
+}
+
+static struct clk_ops clk_dout_ops = {
+        .get_rate       = s3c64xx_clk_doutmpll_get_rate,
+};
+
+static struct clk clk_dout_mpll = {
+        .name           = "dout_mpll",
+        .id             = -1,
+        .parent         = &clk_mout_mpll.clk,
+        .ops            = &clk_dout_ops,
+};
+
+static struct clk *clkset_spi_mmc_list[] = {
+        &clk_mout_epll.clk,
+        &clk_dout_mpll,
+        &clk_fin_epll,
+        &clk_27m,
+};
+
+static struct clksrc_sources clkset_spi_mmc = {
+        .sources        = clkset_spi_mmc_list,
+        .nr_sources     = ARRAY_SIZE(clkset_spi_mmc_list),
+};
+
+static struct clk *clkset_irda_list[] = {
+        &clk_mout_epll.clk,
+        &clk_dout_mpll,
+        NULL,
+        &clk_27m,
+};
+
+static struct clksrc_sources clkset_irda = {
+        .sources        = clkset_irda_list,
+        .nr_sources     = ARRAY_SIZE(clkset_irda_list),
+};
+
+static struct clk *clkset_uart_list[] = {
+        &clk_mout_epll.clk,
+        &clk_dout_mpll,
+        NULL,
+        NULL
+};
+
+static struct clksrc_sources clkset_uart = {
+        .sources        = clkset_uart_list,
+        .nr_sources     = ARRAY_SIZE(clkset_uart_list),
+};
+
+static struct clk *clkset_uhost_list[] = {
+        &clk_48m,
+        &clk_mout_epll.clk,
+        &clk_dout_mpll,
+        &clk_fin_epll,
+};
+
+static struct clksrc_sources clkset_uhost = {
+        .sources        = clkset_uhost_list,
+        .nr_sources     = ARRAY_SIZE(clkset_uhost_list),
+};
+
+/* The peripheral clocks are all controlled via clocksource followed
+ * by an optional divider and gate stage. We currently roll this into
+ * one clock which hides the intermediate clock from the mux.
+ *
+ * Note, the JPEG clock can only be an even divider...
+ *
+ * The scaler and LCD clocks depend on the S3C64XX version, and also
+ * have a common parent divisor so are not included here.
+ */
+
+/* clocks that feed other parts of the clock source tree */
+
+static struct clk clk_iis_cd0 = {
+        .name           = "iis_cdclk0",
+        .id             = -1,
+};
+
+static struct clk clk_iis_cd1 = {
+        .name           = "iis_cdclk1",
+        .id             = -1,
+};
+
+static struct clk clk_pcm_cd = {
+        .name           = "pcm_cdclk",
+        .id             = -1,
+};
+
+static struct clk *clkset_audio0_list[] = {
+        [0] = &clk_mout_epll.clk,
+        [1] = &clk_dout_mpll,
+        [2] = &clk_fin_epll,
+        [3] = &clk_iis_cd0,
+        [4] = &clk_pcm_cd,
+};
+
+static struct clksrc_sources clkset_audio0 = {
+        .sources        = clkset_audio0_list,
+        .nr_sources     = ARRAY_SIZE(clkset_audio0_list),
+};
+
+static struct clk *clkset_audio1_list[] = {
+        [0] = &clk_mout_epll.clk,
+        [1] = &clk_dout_mpll,
+        [2] = &clk_fin_epll,
+        [3] = &clk_iis_cd1,
+        [4] = &clk_pcm_cd,
+};
+
+static struct clksrc_sources clkset_audio1 = {
+        .sources        = clkset_audio1_list,
+        .nr_sources     = ARRAY_SIZE(clkset_audio1_list),
+};
+
+static struct clk *clkset_camif_list[] = {
+        &clk_h2,
+};
+
+static struct clksrc_sources clkset_camif = {
+        .sources        = clkset_camif_list,
+        .nr_sources     = ARRAY_SIZE(clkset_camif_list),
+};
+
+static struct clksrc_clk clksrcs[] = {
+        {
+                .clk    = {
+                        .name           = "mmc_bus",
+                        .id             = 0,
+                        .ctrlbit        = S3C_CLKCON_SCLK_MMC0,
+                        .enable         = s3c64xx_sclk_ctrl,
+                },
+                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 18, .size = 2  },
+                .reg_div        = { .reg = S3C_CLK_DIV1, .shift = 0, .size = 4  },
+                .sources        = &clkset_spi_mmc,
+        }, {
+                .clk    = {
+                        .name           = "mmc_bus",
+                        .id             = 1,
+                        .ctrlbit        = S3C_CLKCON_SCLK_MMC1,
+                        .enable         = s3c64xx_sclk_ctrl,
+                },
+                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 20, .size = 2  },
+                .reg_div        = { .reg = S3C_CLK_DIV1, .shift = 4, .size = 4  },
+                .sources        = &clkset_spi_mmc,
+        }, {
+                .clk    = {
+                        .name           = "mmc_bus",
+                        .id             = 2,
+                        .ctrlbit        = S3C_CLKCON_SCLK_MMC2,
+                        .enable         = s3c64xx_sclk_ctrl,
+                },
+                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 22, .size = 2  },
+                .reg_div        = { .reg = S3C_CLK_DIV1, .shift = 8, .size = 4  },
+                .sources        = &clkset_spi_mmc,
+        }, {
+                .clk    = {
+                        .name           = "usb-bus-host",
+                        .id             = -1,
+                        .ctrlbit        = S3C_CLKCON_SCLK_UHOST,
+                        .enable         = s3c64xx_sclk_ctrl,
+                },
+                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 5, .size = 2  },
+                .reg_div        = { .reg = S3C_CLK_DIV1, .shift = 20, .size = 4  },
+                .sources        = &clkset_uhost,
+        }, {
+                .clk    = {
+                        .name           = "uclk1",
+                        .id             = -1,
+                        .ctrlbit        = S3C_CLKCON_SCLK_UART,
+                        .enable         = s3c64xx_sclk_ctrl,
+                },
+                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 13, .size = 1  },
+                .reg_div        = { .reg = S3C_CLK_DIV2, .shift = 16, .size = 4  },
+                .sources        = &clkset_uart,
+        }, {
+/* Where does UCLK0 come from? */
+                .clk    = {
+                        .name           = "spi-bus",
+                        .id             = 0,
+                        .ctrlbit        = S3C_CLKCON_SCLK_SPI0,
+                        .enable         = s3c64xx_sclk_ctrl,
+                },
+                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 14, .size = 2  },
+                .reg_div        = { .reg = S3C_CLK_DIV2, .shift = 0, .size = 4  },
+                .sources        = &clkset_spi_mmc,
+        }, {
+                .clk    = {
+                        .name           = "spi-bus",
+                        .id             = 1,
+                        .ctrlbit        = S3C_CLKCON_SCLK_SPI1,
+                        .enable         = s3c64xx_sclk_ctrl,
+                },
+                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 16, .size = 2  },
+                .reg_div        = { .reg = S3C_CLK_DIV2, .shift = 4, .size = 4  },
+                .sources        = &clkset_spi_mmc,
+        }, {
+                .clk    = {
+                        .name           = "audio-bus",
+                        .id             = 0,
+                        .ctrlbit        = S3C_CLKCON_SCLK_AUDIO0,
+                        .enable         = s3c64xx_sclk_ctrl,
+                },
+                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 7, .size = 3  },
+                .reg_div        = { .reg = S3C_CLK_DIV2, .shift = 8, .size = 4  },
+                .sources        = &clkset_audio0,
+        }, {
+                .clk    = {
+                        .name           = "audio-bus",
+                        .id             = 1,
+                        .ctrlbit        = S3C_CLKCON_SCLK_AUDIO1,
+                        .enable         = s3c64xx_sclk_ctrl,
+                },
+                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 10, .size = 3  },
+                .reg_div        = { .reg = S3C_CLK_DIV2, .shift = 12, .size = 4  },
+                .sources        = &clkset_audio1,
+        }, {
+                .clk    = {
+                        .name           = "irda-bus",
+                        .id             = 0,
+                        .ctrlbit        = S3C_CLKCON_SCLK_IRDA,
+                        .enable         = s3c64xx_sclk_ctrl,
+                },
+                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 24, .size = 2  },
+                .reg_div        = { .reg = S3C_CLK_DIV2, .shift = 20, .size = 4  },
+                .sources        = &clkset_irda,
+        }, {
+                .clk    = {
+                        .name           = "camera",
+                        .id             = -1,
+                        .ctrlbit        = S3C_CLKCON_SCLK_CAM,
+                        .enable         = s3c64xx_sclk_ctrl,
+                },
+                .reg_div        = { .reg = S3C_CLK_DIV0, .shift = 20, .size = 4  },
+                .reg_src        = { .reg = NULL, .shift = 0, .size = 0  },
+                .sources        = &clkset_camif,
+        },
+};
+
+/* Clock initialisation code */
+
+static struct clksrc_clk *init_parents[] = {
+        &clk_mout_apll,
+        &clk_mout_epll,
+        &clk_mout_mpll,
+};
+
+#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
+
+void __init_or_cpufreq s3c6400_setup_clocks(void)
+{
+        struct clk *xtal_clk;
+        unsigned long xtal;
+        unsigned long fclk;
+        unsigned long hclk;
+        unsigned long hclk2;
+        unsigned long pclk;
+        unsigned long epll;
+        unsigned long apll;
+        unsigned long mpll;
+        unsigned int ptr;
+        u32 clkdiv0;
+
+        printk(KERN_DEBUG "%s: registering clocks\n", __func__);
+
+        clkdiv0 = __raw_readl(S3C_CLK_DIV0);
+        printk(KERN_DEBUG "%s: clkdiv0 = %08x\n", __func__, clkdiv0);
+
+        xtal_clk = clk_get(NULL, "xtal");
+        BUG_ON(IS_ERR(xtal_clk));
+
+        xtal = clk_get_rate(xtal_clk);
+        clk_put(xtal_clk);
+
+        printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
+
+        /* For now assume the mux always selects the crystal */
+        clk_ext_xtal_mux.parent = xtal_clk;
+
+        epll = s3c6400_get_epll(xtal);
+        mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON));
+        apll = s3c6400_get_pll(xtal, __raw_readl(S3C_APLL_CON));
+
+        fclk = mpll;
+
+        printk(KERN_INFO "S3C64XX: PLL settings, A=%ld, M=%ld, E=%ld\n",
+               apll, mpll, epll);
+
+        hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2);
+        hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK);
+        pclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_PCLK);
+
+        printk(KERN_INFO "S3C64XX: HCLK2=%ld, HCLK=%ld, PCLK=%ld\n",
+               hclk2, hclk, pclk);
+
+        clk_fout_mpll.rate = mpll;
+        clk_fout_epll.rate = epll;
+        clk_fout_apll.rate = apll;
+
+        clk_h2.rate = hclk2;
+        clk_h.rate = hclk;
+        clk_p.rate = pclk;
+        clk_f.rate = fclk;
+
+        for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
+                s3c_set_clksrc(init_parents[ptr], true);
+
+        for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
+                s3c_set_clksrc(&clksrcs[ptr], true);
+}
+
+static struct clk *clks1[] __initdata = {
+        &clk_ext_xtal_mux,
+        &clk_iis_cd0,
+        &clk_iis_cd1,
+        &clk_pcm_cd,
+        &clk_mout_epll.clk,
+        &clk_mout_mpll.clk,
+        &clk_dout_mpll,
+        &clk_arm,
+};
+
+static struct clk *clks[] __initdata = {
+        &clk_ext,
+        &clk_epll,
+        &clk_27m,
+        &clk_48m,
+        &clk_h2,
+};
+
+/**
+ * s3c64xx_register_clocks - register clocks for s3c6400 and s3c6410
+ * @xtal: The rate for the clock crystal feeding the PLLs.
+ * @armclk_divlimit: Divisor mask for ARMCLK.
+ *
+ * Register the clocks for the S3C6400 and S3C6410 SoC range, such
+ * as ARMCLK as well as the necessary parent clocks.
+ *
+ * This call does not setup the clocks, which is left to the
+ * s3c6400_setup_clocks() call which may be needed by the cpufreq
+ * or resume code to re-set the clocks if the bootloader has changed
+ * them.
+ */
+void __init s3c64xx_register_clocks(unsigned long xtal, 
+                                    unsigned armclk_divlimit)
+{
+        struct clk *clkp;
+        int ret;
+        int ptr;
+
+        armclk_mask = armclk_divlimit;
+
+        s3c24xx_register_baseclocks(xtal);
+        s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
+
+        s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
+
+        clkp = init_clocks_disable;
+        for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
+
+                ret = s3c24xx_register_clock(clkp);
+                if (ret < 0) {
+                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
+                               clkp->name, ret);
+                }
+
+                (clkp->enable)(clkp, 0);
+        }
+
+        s3c24xx_register_clocks(clks1, ARRAY_SIZE(clks1));
+        s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
+        s3c_pwmclk_init();
+}
diff --git a/arch/arm/plat-s3c64xx/cpu.c b/arch/arm/mach-s3c64xx/cpu.c
index 49796d2db86..374e45e566b 100644
--- a/arch/arm/plat-s3c64xx/cpu.c
+++ b/arch/arm/mach-s3c64xx/cpu.c
@@ -33,8 +33,8 @@
 #include <plat/devs.h>
 #include <plat/clock.h>
 
-#include <plat/s3c6400.h>
-#include <plat/s3c6410.h>
+#include <mach/s3c6400.h>
+#include <mach/s3c6410.h>
 
 /* table of supported CPUs */
 
@@ -73,17 +73,22 @@ static struct map_desc s3c_iodesc[] __initdata = {
                 .length         = SZ_4K,
                 .type           = MT_DEVICE,
         }, {
+                .virtual        = (unsigned long)S3C_VA_MEM,
+                .pfn            = __phys_to_pfn(S3C64XX_PA_SROM),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
                 .virtual        = (unsigned long)(S3C_VA_UART + UART_OFFS),
                 .pfn            = __phys_to_pfn(S3C_PA_UART),
                 .length         = SZ_4K,
                 .type           = MT_DEVICE,
         }, {
-                .virtual        = (unsigned long)S3C_VA_VIC0,
+                .virtual        = (unsigned long)VA_VIC0,
                 .pfn            = __phys_to_pfn(S3C64XX_PA_VIC0),
                 .length         = SZ_16K,
                 .type           = MT_DEVICE,
         }, {
-                .virtual        = (unsigned long)S3C_VA_VIC1,
+                .virtual        = (unsigned long)VA_VIC1,
                 .pfn            = __phys_to_pfn(S3C64XX_PA_VIC1),
                 .length         = SZ_16K,
                 .type           = MT_DEVICE,
@@ -124,6 +129,12 @@ static struct sys_device s3c64xx_sysdev = {
         .cls    = &s3c64xx_sysclass,
 };
 
+/* uart registration process */
+
+void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
+}
 
 /* read cpu identification code */
 
diff --git a/arch/arm/plat-s3c64xx/cpufreq.c b/arch/arm/mach-s3c64xx/cpufreq.c
index 74c0e8347de..74c0e8347de 100644
--- a/arch/arm/plat-s3c64xx/cpufreq.c
+++ b/arch/arm/mach-s3c64xx/cpufreq.c
diff --git a/arch/arm/mach-s3c64xx/dev-adc.c b/arch/arm/mach-s3c64xx/dev-adc.c
new file mode 100644
index 00000000000..fafef9b6bcf
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/dev-adc.c
@@ -0,0 +1,46 @@
+/* linux/arch/arm/plat-s3c64xx/dev-adc.c
+ *
+ * Copyright 2010 Maurus Cuelenaere
+ *
+ * S3C64xx series device definition for ADC device
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/platform_device.h>
+
+#include <mach/irqs.h>
+#include <mach/map.h>
+
+#include <plat/adc.h>
+#include <plat/devs.h>
+#include <plat/cpu.h>
+
+static struct resource s3c_adc_resource[] = {
+        [0] = {
+                .start = S3C64XX_PA_ADC,
+                .end   = S3C64XX_PA_ADC + SZ_256 - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_TC,
+                .end   = IRQ_TC,
+                .flags = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start = IRQ_ADC,
+                .end   = IRQ_ADC,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device s3c_device_adc = {
+        .name           = "s3c64xx-adc",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(s3c_adc_resource),
+        .resource       = s3c_adc_resource,
+};
diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c
new file mode 100644
index 00000000000..c3e9e73bd0f
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/dev-audio.c
@@ -0,0 +1,335 @@
+/* linux/arch/arm/plat-s3c/dev-audio.c
+ *
+ * Copyright 2009 Wolfson Microelectronics
+ *      Mark Brown <broonie@opensource.wolfsonmicro.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+
+#include <mach/irqs.h>
+#include <mach/map.h>
+#include <mach/dma.h>
+#include <mach/gpio.h>
+
+#include <plat/devs.h>
+#include <plat/audio.h>
+#include <plat/gpio-cfg.h>
+
+#include <mach/gpio-bank-c.h>
+#include <mach/gpio-bank-d.h>
+#include <mach/gpio-bank-e.h>
+#include <mach/gpio-bank-h.h>
+
+static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev)
+{
+        switch (pdev->id) {
+        case 0:
+                s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_I2S0_CLK);
+                s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_I2S0_CDCLK);
+                s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_I2S0_LRCLK);
+                s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_I2S0_DI);
+                s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_I2S0_D0);
+                break;
+        case 1:
+                s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_I2S1_CLK);
+                s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_I2S1_CDCLK);
+                s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_I2S1_LRCLK);
+                s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_I2S1_DI);
+                s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_I2S1_D0);
+        default:
+                printk(KERN_DEBUG "Invalid I2S Controller number!");
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
+static int s3c64xx_i2sv4_cfg_gpio(struct platform_device *pdev)
+{
+        s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C64XX_GPC4_I2S_V40_DO0);
+        s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C64XX_GPC5_I2S_V40_DO1);
+        s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C64XX_GPC7_I2S_V40_DO2);
+        s3c_gpio_cfgpin(S3C64XX_GPH(6), S3C64XX_GPH6_I2S_V40_BCLK);
+        s3c_gpio_cfgpin(S3C64XX_GPH(7), S3C64XX_GPH7_I2S_V40_CDCLK);
+        s3c_gpio_cfgpin(S3C64XX_GPH(8), S3C64XX_GPH8_I2S_V40_LRCLK);
+        s3c_gpio_cfgpin(S3C64XX_GPH(9), S3C64XX_GPH9_I2S_V40_DI);
+
+        return 0;
+}
+
+static struct resource s3c64xx_iis0_resource[] = {
+        [0] = {
+                .start = S3C64XX_PA_IIS0,
+                .end   = S3C64XX_PA_IIS0 + 0x100 - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = DMACH_I2S0_OUT,
+                .end   = DMACH_I2S0_OUT,
+                .flags = IORESOURCE_DMA,
+        },
+        [2] = {
+                .start = DMACH_I2S0_IN,
+                .end   = DMACH_I2S0_IN,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+static struct s3c_audio_pdata s3c_i2s0_pdata = {
+        .cfg_gpio = s3c64xx_i2sv3_cfg_gpio,
+};
+
+struct platform_device s3c64xx_device_iis0 = {
+        .name             = "s3c64xx-iis",
+        .id               = 0,
+        .num_resources    = ARRAY_SIZE(s3c64xx_iis0_resource),
+        .resource         = s3c64xx_iis0_resource,
+        .dev = {
+                .platform_data = &s3c_i2s0_pdata,
+        },
+};
+EXPORT_SYMBOL(s3c64xx_device_iis0);
+
+static struct resource s3c64xx_iis1_resource[] = {
+        [0] = {
+                .start = S3C64XX_PA_IIS1,
+                .end   = S3C64XX_PA_IIS1 + 0x100 - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = DMACH_I2S1_OUT,
+                .end   = DMACH_I2S1_OUT,
+                .flags = IORESOURCE_DMA,
+        },
+        [2] = {
+                .start = DMACH_I2S1_IN,
+                .end   = DMACH_I2S1_IN,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+static struct s3c_audio_pdata s3c_i2s1_pdata = {
+        .cfg_gpio = s3c64xx_i2sv3_cfg_gpio,
+};
+
+struct platform_device s3c64xx_device_iis1 = {
+        .name             = "s3c64xx-iis",
+        .id               = 1,
+        .num_resources    = ARRAY_SIZE(s3c64xx_iis1_resource),
+        .resource         = s3c64xx_iis1_resource,
+        .dev = {
+                .platform_data = &s3c_i2s1_pdata,
+        },
+};
+EXPORT_SYMBOL(s3c64xx_device_iis1);
+
+static struct resource s3c64xx_iisv4_resource[] = {
+        [0] = {
+                .start = S3C64XX_PA_IISV4,
+                .end   = S3C64XX_PA_IISV4 + 0x100 - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = DMACH_HSI_I2SV40_TX,
+                .end   = DMACH_HSI_I2SV40_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        [2] = {
+                .start = DMACH_HSI_I2SV40_RX,
+                .end   = DMACH_HSI_I2SV40_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+static struct s3c_audio_pdata s3c_i2sv4_pdata = {
+        .cfg_gpio = s3c64xx_i2sv4_cfg_gpio,
+};
+
+struct platform_device s3c64xx_device_iisv4 = {
+        .name             = "s3c64xx-iis-v4",
+        .id               = -1,
+        .num_resources    = ARRAY_SIZE(s3c64xx_iisv4_resource),
+        .resource         = s3c64xx_iisv4_resource,
+        .dev = {
+                .platform_data = &s3c_i2sv4_pdata,
+        },
+};
+EXPORT_SYMBOL(s3c64xx_device_iisv4);
+
+
+/* PCM Controller platform_devices */
+
+static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev)
+{
+        switch (pdev->id) {
+        case 0:
+                s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_PCM0_SCLK);
+                s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_PCM0_EXTCLK);
+                s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_PCM0_FSYNC);
+                s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_PCM0_SIN);
+                s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_PCM0_SOUT);
+                break;
+        case 1:
+                s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_PCM1_SCLK);
+                s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_PCM1_EXTCLK);
+                s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_PCM1_FSYNC);
+                s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_PCM1_SIN);
+                s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_PCM1_SOUT);
+                break;
+        default:
+                printk(KERN_DEBUG "Invalid PCM Controller number!");
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
+static struct resource s3c64xx_pcm0_resource[] = {
+        [0] = {
+                .start = S3C64XX_PA_PCM0,
+                .end   = S3C64XX_PA_PCM0 + 0x100 - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = DMACH_PCM0_TX,
+                .end   = DMACH_PCM0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        [2] = {
+                .start = DMACH_PCM0_RX,
+                .end   = DMACH_PCM0_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+static struct s3c_audio_pdata s3c_pcm0_pdata = {
+        .cfg_gpio = s3c64xx_pcm_cfg_gpio,
+};
+
+struct platform_device s3c64xx_device_pcm0 = {
+        .name             = "samsung-pcm",
+        .id               = 0,
+        .num_resources    = ARRAY_SIZE(s3c64xx_pcm0_resource),
+        .resource         = s3c64xx_pcm0_resource,
+        .dev = {
+                .platform_data = &s3c_pcm0_pdata,
+        },
+};
+EXPORT_SYMBOL(s3c64xx_device_pcm0);
+
+static struct resource s3c64xx_pcm1_resource[] = {
+        [0] = {
+                .start = S3C64XX_PA_PCM1,
+                .end   = S3C64XX_PA_PCM1 + 0x100 - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = DMACH_PCM1_TX,
+                .end   = DMACH_PCM1_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        [2] = {
+                .start = DMACH_PCM1_RX,
+                .end   = DMACH_PCM1_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+static struct s3c_audio_pdata s3c_pcm1_pdata = {
+        .cfg_gpio = s3c64xx_pcm_cfg_gpio,
+};
+
+struct platform_device s3c64xx_device_pcm1 = {
+        .name             = "samsung-pcm",
+        .id               = 1,
+        .num_resources    = ARRAY_SIZE(s3c64xx_pcm1_resource),
+        .resource         = s3c64xx_pcm1_resource,
+        .dev = {
+                .platform_data = &s3c_pcm1_pdata,
+        },
+};
+EXPORT_SYMBOL(s3c64xx_device_pcm1);
+
+/* AC97 Controller platform devices */
+
+static int s3c64xx_ac97_cfg_gpd(struct platform_device *pdev)
+{
+        s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_AC97_BITCLK);
+        s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_AC97_nRESET);
+        s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_AC97_SYNC);
+        s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_AC97_SDI);
+        s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_AC97_SDO);
+
+        return 0;
+}
+
+static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev)
+{
+        s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_AC97_BITCLK);
+        s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_AC97_nRESET);
+        s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_AC97_SYNC);
+        s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_AC97_SDI);
+        s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_AC97_SDO);
+
+        return 0;
+}
+
+static struct resource s3c64xx_ac97_resource[] = {
+        [0] = {
+                .start = S3C64XX_PA_AC97,
+                .end   = S3C64XX_PA_AC97 + 0x100 - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = DMACH_AC97_PCMOUT,
+                .end   = DMACH_AC97_PCMOUT,
+                .flags = IORESOURCE_DMA,
+        },
+        [2] = {
+                .start = DMACH_AC97_PCMIN,
+                .end   = DMACH_AC97_PCMIN,
+                .flags = IORESOURCE_DMA,
+        },
+        [3] = {
+                .start = DMACH_AC97_MICIN,
+                .end   = DMACH_AC97_MICIN,
+                .flags = IORESOURCE_DMA,
+        },
+        [4] = {
+                .start = IRQ_AC97,
+                .end   = IRQ_AC97,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+static struct s3c_audio_pdata s3c_ac97_pdata;
+
+static u64 s3c64xx_ac97_dmamask = DMA_BIT_MASK(32);
+
+struct platform_device s3c64xx_device_ac97 = {
+        .name             = "s3c-ac97",
+        .id               = -1,
+        .num_resources    = ARRAY_SIZE(s3c64xx_ac97_resource),
+        .resource         = s3c64xx_ac97_resource,
+        .dev = {
+                .platform_data = &s3c_ac97_pdata,
+                .dma_mask = &s3c64xx_ac97_dmamask,
+                .coherent_dma_mask = DMA_BIT_MASK(32),
+        },
+};
+EXPORT_SYMBOL(s3c64xx_device_ac97);
+
+void __init s3c64xx_ac97_setup_gpio(int num)
+{
+        if (num == S3C64XX_AC97_GPD)
+                s3c_ac97_pdata.cfg_gpio = s3c64xx_ac97_cfg_gpd;
+        else
+                s3c_ac97_pdata.cfg_gpio = s3c64xx_ac97_cfg_gpe;
+}
diff --git a/arch/arm/mach-s3c64xx/dev-rtc.c b/arch/arm/mach-s3c64xx/dev-rtc.c
new file mode 100644
index 00000000000..b9e7a05f012
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/dev-rtc.c
@@ -0,0 +1,43 @@
+/* linux/arch/arm/plat-s3c64xx/dev-rtc.c
+ *
+ * Copyright 2009 by Maurus Cuelenaere <mcuelenaere@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/platform_device.h>
+
+#include <mach/irqs.h>
+#include <mach/map.h>
+
+#include <plat/devs.h>
+
+static struct resource s3c_rtc_resource[] = {
+        [0] = {
+                .start = S3C64XX_PA_RTC,
+                .end   = S3C64XX_PA_RTC + 0xff,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_RTC_ALARM,
+                .end   = IRQ_RTC_ALARM,
+                .flags = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start = IRQ_RTC_TIC,
+                .end   = IRQ_RTC_TIC,
+                .flags = IORESOURCE_IRQ
+        }
+};
+
+struct platform_device s3c_device_rtc = {
+        .name             = "s3c64xx-rtc",
+        .id               = -1,
+        .num_resources    = ARRAY_SIZE(s3c_rtc_resource),
+        .resource         = s3c_rtc_resource,
+};
+EXPORT_SYMBOL(s3c_device_rtc);
diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c
new file mode 100644
index 00000000000..29c32d08851
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/dev-spi.c
@@ -0,0 +1,182 @@
+/* linux/arch/arm/plat-s3c64xx/dev-spi.c
+ *
+ * Copyright (C) 2009 Samsung Electronics Ltd.
+ *      Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+
+#include <mach/dma.h>
+#include <mach/map.h>
+#include <mach/gpio.h>
+#include <mach/gpio-bank-c.h>
+#include <mach/spi-clocks.h>
+
+#include <plat/s3c64xx-spi.h>
+#include <plat/gpio-cfg.h>
+#include <plat/irqs.h>
+
+static char *spi_src_clks[] = {
+        [S3C64XX_SPI_SRCCLK_PCLK] = "pclk",
+        [S3C64XX_SPI_SRCCLK_SPIBUS] = "spi-bus",
+        [S3C64XX_SPI_SRCCLK_48M] = "spi_48m",
+};
+
+/* SPI Controller platform_devices */
+
+/* Since we emulate multi-cs capability, we do not touch the GPC-3,7.
+ * The emulated CS is toggled by board specific mechanism, as it can
+ * be either some immediate GPIO or some signal out of some other
+ * chip in between ... or some yet another way.
+ * We simply do not assume anything about CS.
+ */
+static int s3c64xx_spi_cfg_gpio(struct platform_device *pdev)
+{
+        switch (pdev->id) {
+        case 0:
+                s3c_gpio_cfgpin(S3C64XX_GPC(0), S3C64XX_GPC0_SPI_MISO0);
+                s3c_gpio_cfgpin(S3C64XX_GPC(1), S3C64XX_GPC1_SPI_CLKO);
+                s3c_gpio_cfgpin(S3C64XX_GPC(2), S3C64XX_GPC2_SPI_MOSIO);
+                s3c_gpio_setpull(S3C64XX_GPC(0), S3C_GPIO_PULL_UP);
+                s3c_gpio_setpull(S3C64XX_GPC(1), S3C_GPIO_PULL_UP);
+                s3c_gpio_setpull(S3C64XX_GPC(2), S3C_GPIO_PULL_UP);
+                break;
+
+        case 1:
+                s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C64XX_GPC4_SPI_MISO1);
+                s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C64XX_GPC5_SPI_CLK1);
+                s3c_gpio_cfgpin(S3C64XX_GPC(6), S3C64XX_GPC6_SPI_MOSI1);
+                s3c_gpio_setpull(S3C64XX_GPC(4), S3C_GPIO_PULL_UP);
+                s3c_gpio_setpull(S3C64XX_GPC(5), S3C_GPIO_PULL_UP);
+                s3c_gpio_setpull(S3C64XX_GPC(6), S3C_GPIO_PULL_UP);
+                break;
+
+        default:
+                dev_err(&pdev->dev, "Invalid SPI Controller number!");
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
+static struct resource s3c64xx_spi0_resource[] = {
+        [0] = {
+                .start = S3C64XX_PA_SPI0,
+                .end   = S3C64XX_PA_SPI0 + 0x100 - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = DMACH_SPI0_TX,
+                .end   = DMACH_SPI0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        [2] = {
+                .start = DMACH_SPI0_RX,
+                .end   = DMACH_SPI0_RX,
+                .flags = IORESOURCE_DMA,
+        },
+        [3] = {
+                .start = IRQ_SPI0,
+                .end   = IRQ_SPI0,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+static struct s3c64xx_spi_info s3c64xx_spi0_pdata = {
+        .cfg_gpio = s3c64xx_spi_cfg_gpio,
+        .fifo_lvl_mask = 0x7f,
+        .rx_lvl_offset = 13,
+};
+
+static u64 spi_dmamask = DMA_BIT_MASK(32);
+
+struct platform_device s3c64xx_device_spi0 = {
+        .name             = "s3c64xx-spi",
+        .id               = 0,
+        .num_resources    = ARRAY_SIZE(s3c64xx_spi0_resource),
+        .resource         = s3c64xx_spi0_resource,
+        .dev = {
+                .dma_mask               = &spi_dmamask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                .platform_data = &s3c64xx_spi0_pdata,
+        },
+};
+EXPORT_SYMBOL(s3c64xx_device_spi0);
+
+static struct resource s3c64xx_spi1_resource[] = {
+        [0] = {
+                .start = S3C64XX_PA_SPI1,
+                .end   = S3C64XX_PA_SPI1 + 0x100 - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = DMACH_SPI1_TX,
+                .end   = DMACH_SPI1_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        [2] = {
+                .start = DMACH_SPI1_RX,
+                .end   = DMACH_SPI1_RX,
+                .flags = IORESOURCE_DMA,
+        },
+        [3] = {
+                .start = IRQ_SPI1,
+                .end   = IRQ_SPI1,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+static struct s3c64xx_spi_info s3c64xx_spi1_pdata = {
+        .cfg_gpio = s3c64xx_spi_cfg_gpio,
+        .fifo_lvl_mask = 0x7f,
+        .rx_lvl_offset = 13,
+};
+
+struct platform_device s3c64xx_device_spi1 = {
+        .name             = "s3c64xx-spi",
+        .id               = 1,
+        .num_resources    = ARRAY_SIZE(s3c64xx_spi1_resource),
+        .resource         = s3c64xx_spi1_resource,
+        .dev = {
+                .dma_mask               = &spi_dmamask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                .platform_data = &s3c64xx_spi1_pdata,
+        },
+};
+EXPORT_SYMBOL(s3c64xx_device_spi1);
+
+void __init s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
+{
+        struct s3c64xx_spi_info *pd;
+
+        /* Reject invalid configuration */
+        if (!num_cs || src_clk_nr < 0
+                        || src_clk_nr > S3C64XX_SPI_SRCCLK_48M) {
+                printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
+                return;
+        }
+
+        switch (cntrlr) {
+        case 0:
+                pd = &s3c64xx_spi0_pdata;
+                break;
+        case 1:
+                pd = &s3c64xx_spi1_pdata;
+                break;
+        default:
+                printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
+                                                        __func__, cntrlr);
+                return;
+        }
+
+        pd->num_cs = num_cs;
+        pd->src_clk_nr = src_clk_nr;
+        pd->src_clk_name = spi_src_clks[src_clk_nr];
+}
diff --git a/arch/arm/plat-s3c64xx/dev-uart.c b/arch/arm/mach-s3c64xx/dev-uart.c
index 62c11a6fc7b..f797f748b99 100644
--- a/arch/arm/plat-s3c64xx/dev-uart.c
+++ b/arch/arm/mach-s3c64xx/dev-uart.c
@@ -145,32 +145,3 @@ struct s3c24xx_uart_resources s3c64xx_uart_resources[] __initdata = {
                 .nr_resources   = ARRAY_SIZE(s3c64xx_uart3_resource),
         },
 };
-
-/* uart devices */
-
-static struct platform_device s3c24xx_uart_device0 = {
-        .id             = 0,
-};
-
-static struct platform_device s3c24xx_uart_device1 = {
-        .id             = 1,
-};
-
-static struct platform_device s3c24xx_uart_device2 = {
-        .id             = 2,
-};
-
-static struct platform_device s3c24xx_uart_device3 = {
-        .id             = 3,
-};
-
-struct platform_device *s3c24xx_uart_src[4] = {
-        &s3c24xx_uart_device0,
-        &s3c24xx_uart_device1,
-        &s3c24xx_uart_device2,
-        &s3c24xx_uart_device3,
-};
-
-struct platform_device *s3c24xx_uart_devs[4] = {
-};
-
diff --git a/arch/arm/plat-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index d554b936fcf..33ccf7bf766 100644
--- a/arch/arm/plat-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -18,6 +18,7 @@
 #include <linux/dmapool.h>
 #include <linux/sysdev.h>
 #include <linux/errno.h>
+#include <linux/slab.h>
 #include <linux/delay.h>
 #include <linux/clk.h>
 #include <linux/err.h>
@@ -27,8 +28,7 @@
 #include <mach/map.h>
 #include <mach/irqs.h>
 
-#include <plat/dma-plat.h>
-#include <plat/regs-sys.h>
+#include <mach/regs-sys.h>
 
 #include <asm/hardware/pl080.h>
 
diff --git a/arch/arm/plat-s3c64xx/gpiolib.c b/arch/arm/mach-s3c64xx/gpiolib.c
index 77856045727..66e6794481d 100644
--- a/arch/arm/plat-s3c64xx/gpiolib.c
+++ b/arch/arm/mach-s3c64xx/gpiolib.c
@@ -18,11 +18,11 @@
 
 #include <mach/map.h>
 #include <mach/gpio.h>
-#include <mach/gpio-core.h>
 
+#include <plat/gpio-core.h>
 #include <plat/gpio-cfg.h>
 #include <plat/gpio-cfg-helpers.h>
-#include <plat/regs-gpio.h>
+#include <mach/regs-gpio.h>
 
 /* GPIO bank summary:
  *
@@ -49,150 +49,6 @@
  * [2] BANK has two control registers, GPxCON0 and GPxCON1
  */
 
-#define OFF_GPCON       (0x00)
-#define OFF_GPDAT       (0x04)
-
-#define con_4bit_shift(__off) ((__off) * 4)
-
-#if 1
-#define gpio_dbg(x...) do { } while(0)
-#else
-#define gpio_dbg(x...) printk(KERN_DEBUG x)
-#endif
-
-/* The s3c64xx_gpiolib_4bit routines are to control the gpio banks where
- * the gpio configuration register (GPxCON) has 4 bits per GPIO, as the
- * following example:
- *
- * base + 0x00: Control register, 4 bits per gpio
- *              gpio n: 4 bits starting at (4*n)
- *              0000 = input, 0001 = output, others mean special-function
- * base + 0x04: Data register, 1 bit per gpio
- *              bit n: data bit n
- *
- * Note, since the data register is one bit per gpio and is at base + 0x4
- * we can use s3c_gpiolib_get and s3c_gpiolib_set to change the state of
- * the output.
-*/
-
-static int s3c64xx_gpiolib_4bit_input(struct gpio_chip *chip, unsigned offset)
-{
-        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
-        void __iomem *base = ourchip->base;
-        unsigned long con;
-
-        con = __raw_readl(base + OFF_GPCON);
-        con &= ~(0xf << con_4bit_shift(offset));
-        __raw_writel(con, base + OFF_GPCON);
-
-        gpio_dbg("%s: %p: CON now %08lx\n", __func__, base, con);
-
-        return 0;
-}
-
-static int s3c64xx_gpiolib_4bit_output(struct gpio_chip *chip,
-                                       unsigned offset, int value)
-{
-        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
-        void __iomem *base = ourchip->base;
-        unsigned long con;
-        unsigned long dat;
-
-        con = __raw_readl(base + OFF_GPCON);
-        con &= ~(0xf << con_4bit_shift(offset));
-        con |= 0x1 << con_4bit_shift(offset);
-
-        dat = __raw_readl(base + OFF_GPDAT);
-        if (value)
-                dat |= 1 << offset;
-        else
-                dat &= ~(1 << offset);
-
-        __raw_writel(dat, base + OFF_GPDAT);
-        __raw_writel(con, base + OFF_GPCON);
-        __raw_writel(dat, base + OFF_GPDAT);
-
-        gpio_dbg("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat);
-
-        return 0;
-}
-
-/* The next set of routines are for the case where the GPIO configuration
- * registers are 4 bits per GPIO but there is more than one register (the
- * bank has more than 8 GPIOs.
- *
- * This case is the similar to the 4 bit case, but the registers are as
- * follows:
- *
- * base + 0x00: Control register, 4 bits per gpio (lower 8 GPIOs)
- *              gpio n: 4 bits starting at (4*n)
- *              0000 = input, 0001 = output, others mean special-function
- * base + 0x04: Control register, 4 bits per gpio (up to 8 additions GPIOs)
- *              gpio n: 4 bits starting at (4*n)
- *              0000 = input, 0001 = output, others mean special-function
- * base + 0x08: Data register, 1 bit per gpio
- *              bit n: data bit n
- *
- * To allow us to use the s3c_gpiolib_get and s3c_gpiolib_set routines we
- * store the 'base + 0x4' address so that these routines see the data
- * register at ourchip->base + 0x04.
-*/
-
-static int s3c64xx_gpiolib_4bit2_input(struct gpio_chip *chip, unsigned offset)
-{
-        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
-        void __iomem *base = ourchip->base;
-        void __iomem *regcon = base;
-        unsigned long con;
-
-        if (offset > 7)
-                offset -= 8;
-        else
-                regcon -= 4;
-
-        con = __raw_readl(regcon);
-        con &= ~(0xf << con_4bit_shift(offset));
-        __raw_writel(con, regcon);
-
-        gpio_dbg("%s: %p: CON %08lx\n", __func__, base, con);
-
-        return 0;
-
-}
-
-static int s3c64xx_gpiolib_4bit2_output(struct gpio_chip *chip,
-                                       unsigned offset, int value)
-{
-        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
-        void __iomem *base = ourchip->base;
-        void __iomem *regcon = base;
-        unsigned long con;
-        unsigned long dat;
-
-        if (offset > 7)
-                offset -= 8;
-        else
-                regcon -= 4;
-
-        con = __raw_readl(regcon);
-        con &= ~(0xf << con_4bit_shift(offset));
-        con |= 0x1 << con_4bit_shift(offset);
-
-        dat = __raw_readl(base + OFF_GPDAT);
-        if (value)
-                dat |= 1 << offset;
-        else
-                dat &= ~(1 << offset);
-
-        __raw_writel(dat, base + OFF_GPDAT);
-        __raw_writel(con, regcon);
-        __raw_writel(dat, base + OFF_GPDAT);
-
-        gpio_dbg("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat);
-
-        return 0;
-}
-
 static struct s3c_gpio_cfg gpio_4bit_cfg_noint = {
         .set_config     = s3c_gpio_setcfg_s3c64xx_4bit,
         .set_pull       = s3c_gpio_setpull_updown,
@@ -399,20 +255,6 @@ static struct s3c_gpio_chip gpio_2bit[] = {
         },
 };
 
-static __init void s3c64xx_gpiolib_add_4bit(struct s3c_gpio_chip *chip)
-{
-        chip->chip.direction_input = s3c64xx_gpiolib_4bit_input;
-        chip->chip.direction_output = s3c64xx_gpiolib_4bit_output;
-        chip->pm = __gpio_pm(&s3c_gpio_pm_4bit);
-}
-
-static __init void s3c64xx_gpiolib_add_4bit2(struct s3c_gpio_chip *chip)
-{
-        chip->chip.direction_input = s3c64xx_gpiolib_4bit2_input;
-        chip->chip.direction_output = s3c64xx_gpiolib_4bit2_output;
-        chip->pm = __gpio_pm(&s3c_gpio_pm_4bit);
-}
-
 static __init void s3c64xx_gpiolib_add_2bit(struct s3c_gpio_chip *chip)
 {
         chip->pm = __gpio_pm(&s3c_gpio_pm_2bit);
@@ -432,10 +274,10 @@ static __init void s3c64xx_gpiolib_add(struct s3c_gpio_chip *chips,
 static __init int s3c64xx_gpiolib_init(void)
 {
         s3c64xx_gpiolib_add(gpio_4bit, ARRAY_SIZE(gpio_4bit),
-                            s3c64xx_gpiolib_add_4bit);
+                            samsung_gpiolib_add_4bit);
 
         s3c64xx_gpiolib_add(gpio_4bit2, ARRAY_SIZE(gpio_4bit2),
-                            s3c64xx_gpiolib_add_4bit2);
+                            samsung_gpiolib_add_4bit2);
 
         s3c64xx_gpiolib_add(gpio_2bit, ARRAY_SIZE(gpio_2bit),
                             s3c64xx_gpiolib_add_2bit);
diff --git a/arch/arm/mach-s3c6400/include/mach/debug-macro.S b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S
index 5c88875d6a3..f9ab5d26052 100644
--- a/arch/arm/mach-s3c6400/include/mach/debug-macro.S
+++ b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S
@@ -21,7 +21,7 @@
          * aligned and add in the offset when we load the value here.
          */
 
-        .macro addruart, rx, tmp
+        .macro addruart, rx, rtmp
                 mrc     p15, 0, \rx, c1, c0
                 tst     \rx, #1
                 ldreq   \rx, = S3C_PA_UART
diff --git a/arch/arm/plat-s3c64xx/include/plat/dma-plat.h b/arch/arm/mach-s3c64xx/include/mach/dma.h
index 8f76a1e474d..0a5d9268a23 100644
--- a/arch/arm/plat-s3c64xx/include/plat/dma-plat.h
+++ b/arch/arm/mach-s3c64xx/include/mach/dma.h
@@ -1,16 +1,71 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/dma-plat.h
+/* linux/arch/arm/mach-s3c6400/include/mach/dma.h
  *
- * Copyright 2009 Openmoko, Inc.
- * Copyright 2009 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
  *
- * S3C64XX DMA core
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
+ * S3C6400 - DMA support
+ */
+
+#ifndef __ASM_ARCH_DMA_H
+#define __ASM_ARCH_DMA_H __FILE__
+
+#define S3C_DMA_CHANNELS        (16)
+
+/* see mach-s3c2410/dma.h for notes on dma channel numbers */
+
+/* Note, for the S3C64XX architecture we keep the DMACH_
+ * defines in the order they are allocated to [S]DMA0/[S]DMA1
+ * so that is easy to do DHACH_ -> DMA controller conversion
+ */
+enum dma_ch {
+        /* DMA0/SDMA0 */
+        DMACH_UART0 = 0,
+        DMACH_UART0_SRC2,
+        DMACH_UART1,
+        DMACH_UART1_SRC2,
+        DMACH_UART2,
+        DMACH_UART2_SRC2,
+        DMACH_UART3,
+        DMACH_UART3_SRC2,
+        DMACH_PCM0_TX,
+        DMACH_PCM0_RX,
+        DMACH_I2S0_OUT,
+        DMACH_I2S0_IN,
+        DMACH_SPI0_TX,
+        DMACH_SPI0_RX,
+        DMACH_HSI_I2SV40_TX,
+        DMACH_HSI_I2SV40_RX,
+
+        /* DMA1/SDMA1 */
+        DMACH_PCM1_TX = 16,
+        DMACH_PCM1_RX,
+        DMACH_I2S1_OUT,
+        DMACH_I2S1_IN,
+        DMACH_SPI1_TX,
+        DMACH_SPI1_RX,
+        DMACH_AC97_PCMOUT,
+        DMACH_AC97_PCMIN,
+        DMACH_AC97_MICIN,
+        DMACH_PWM,
+        DMACH_IRDA,
+        DMACH_EXTERNAL,
+        DMACH_RES1,
+        DMACH_RES2,
+        DMACH_SECURITY_RX,      /* SDMA1 only */
+        DMACH_SECURITY_TX,      /* SDMA1 only */
+        DMACH_MAX               /* the end */
+};
+
+static __inline__ bool s3c_dma_has_circular(void)
+{
+        return true;
+}
+
+#define S3C2410_DMAF_CIRCULAR           (1 << 0)
+
+#include <plat/dma.h>
 
 #define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */
 
@@ -68,3 +123,5 @@ struct s3c2410_dma_chan {
 };
 
 #include <plat/dma-core.h>
+
+#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
new file mode 100644
index 00000000000..dd362604dcc
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
@@ -0,0 +1,18 @@
+/* arch/arm/mach-s3c6400/include/mach/entry-macro.S
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Low-level IRQ helper macros for the Samsung S3C64XX series
+ *
+ * This file is licensed under  the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+*/
+
+#include <mach/map.h>
+#include <mach/irqs.h>
+
+#include <asm/entry-macro-vic2.S>
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h
index 9aa0e427d11..34212e1a7e8 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h
index 3933adb4d50..7232c037e64 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h
index e22b49f4f98..db189ab1639 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h
index 6fe4a49c26f..1a01cee7aca 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h
index 7fcf3d8e0a4..f057adb627d 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h
index f3faff974a1..62ab8f5e783 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h
index 35bbd2378e5..b94954af159 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h
index 2ba1767512d..5d75aaad865 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h
index ce9ebe33556..4ceaa6098bc 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h
index 21a906299d3..6f25cd079a4 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h
index 569e7612088..d0aeda1cd9d 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h
index b09e12954b5..21868fa102d 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h
index 92f00517926..46bcfb63b8d 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h
index 565e60aaee4..1712223487b 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/mach-s3c6400/include/mach/gpio.h b/arch/arm/mach-s3c64xx/include/mach/gpio.h
index e8e35e8fe73..0d46e994048 100644
--- a/arch/arm/mach-s3c6400/include/mach/gpio.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio.h
@@ -91,6 +91,10 @@ enum s3c_gpio_number {
 #define S3C_GPIO_END            S3C64XX_GPIO_END
 
 /* define the number of gpios we need to the one after the GPQ() range */
-#define ARCH_NR_GPIOS   (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
+#define GPIO_BOARD_START (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
+
+#define BOARD_NR_GPIOS 16
+
+#define ARCH_NR_GPIOS   (GPIO_BOARD_START + BOARD_NR_GPIOS)
 
 #include <asm-generic/gpio.h>
diff --git a/arch/arm/mach-s3c6400/include/mach/hardware.h b/arch/arm/mach-s3c64xx/include/mach/hardware.h
index 862d033e57a..862d033e57a 100644
--- a/arch/arm/mach-s3c6400/include/mach/hardware.h
+++ b/arch/arm/mach-s3c64xx/include/mach/hardware.h
diff --git a/arch/arm/mach-s3c64xx/include/mach/io.h b/arch/arm/mach-s3c64xx/include/mach/io.h
new file mode 100644
index 00000000000..de5716dbbd6
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/io.h
@@ -0,0 +1,18 @@
+/* arch/arm/mach-s3c64xxinclude/mach/io.h
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben-linux@fluff.org>
+ *
+ * Default IO routines for S3C64XX based
+ */
+
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+/* No current ISA/PCI bus support. */
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
+
+#define IO_SPACE_LIMIT (0xFFFFFFFF)
+
+#endif
diff --git a/arch/arm/plat-s3c64xx/include/plat/irqs.h b/arch/arm/mach-s3c64xx/include/mach/irqs.h
index 7956fd3bb19..e9ab4ac0b9a 100644
--- a/arch/arm/plat-s3c64xx/include/plat/irqs.h
+++ b/arch/arm/mach-s3c64xx/include/mach/irqs.h
@@ -1,15 +1,15 @@
-/* linux/arch/arm/plat-s3c64xx/include/mach/irqs.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/irqs.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
  *      http://armlinux.simtec.co.uk/
  *
- * S3C64XX - Common IRQ support
+ * S3C64XX - IRQ support
  */
 
-#ifndef __ASM_PLAT_S3C64XX_IRQS_H
-#define __ASM_PLAT_S3C64XX_IRQS_H __FILE__
+#ifndef __ASM_MACH_S3C64XX_IRQS_H
+#define __ASM_MACH_S3C64XX_IRQS_H __FILE__
 
 /* we keep the first set of CPU IRQs out of the range of
  * the ISA space, so that the PC104 has them to itself
@@ -24,8 +24,8 @@
 
 #define S3C_IRQ(x)      ((x) + S3C_IRQ_OFFSET)
 
-#define S3C_VIC0_BASE   S3C_IRQ(0)
-#define S3C_VIC1_BASE   S3C_IRQ(32)
+#define IRQ_VIC0_BASE   S3C_IRQ(0)
+#define IRQ_VIC1_BASE   S3C_IRQ(32)
 
 /* UART interrupts, each UART has 4 intterupts per channel so
  * use the space between the ISA and S3C main interrupts. Note, these
@@ -59,8 +59,8 @@
 
 /* VIC based IRQs */
 
-#define S3C64XX_IRQ_VIC0(x)     (S3C_VIC0_BASE + (x))
-#define S3C64XX_IRQ_VIC1(x)     (S3C_VIC1_BASE + (x))
+#define S3C64XX_IRQ_VIC0(x)     (IRQ_VIC0_BASE + (x))
+#define S3C64XX_IRQ_VIC1(x)     (IRQ_VIC1_BASE + (x))
 
 /* VIC0 */
 
@@ -198,7 +198,13 @@
  * interrupt controllers). */
 #define IRQ_BOARD_START (IRQ_EINT_GROUP9_BASE + IRQ_EINT_GROUP9_NR + 1)
 
+#ifdef CONFIG_SMDK6410_WM1190_EV1
+#define IRQ_BOARD_NR 64
+#elif defined(CONFIG_SMDK6410_WM1192_EV1)
+#define IRQ_BOARD_NR 64
+#else
 #define IRQ_BOARD_NR 16
+#endif
 
 #define IRQ_BOARD_END (IRQ_BOARD_START + IRQ_BOARD_NR)
 
@@ -206,5 +212,5 @@
 
 #define NR_IRQS (IRQ_BOARD_END + 1)
 
-#endif /* __ASM_PLAT_S3C64XX_IRQS_H */
+#endif /* __ASM_MACH_S3C64XX_IRQS_H */
 
diff --git a/arch/arm/mach-s3c6400/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h
index 106ee13581e..801c1c0f3a9 100644
--- a/arch/arm/mach-s3c6400/include/mach/map.h
+++ b/arch/arm/mach-s3c64xx/include/mach/map.h
@@ -17,6 +17,18 @@
 
 #include <plat/map-base.h>
 
+/*
+ * Post-mux Chip Select Regions Xm0CSn_
+ * These may be used by SROM, NAND or CF depending on settings
+ */
+
+#define S3C64XX_PA_XM0CSN0 (0x10000000)
+#define S3C64XX_PA_XM0CSN1 (0x18000000)
+#define S3C64XX_PA_XM0CSN2 (0x20000000)
+#define S3C64XX_PA_XM0CSN3 (0x28000000)
+#define S3C64XX_PA_XM0CSN4 (0x30000000)
+#define S3C64XX_PA_XM0CSN5 (0x38000000)
+
 /* HSMMC units */
 #define S3C64XX_PA_HSMMC(x)     (0x7C200000 + ((x) * 0x100000))
 #define S3C64XX_PA_HSMMC0       S3C64XX_PA_HSMMC(0)
@@ -38,16 +50,22 @@
 #define S3C_VA_UART2            S3C_VA_UARTx(2)
 #define S3C_VA_UART3            S3C_VA_UARTx(3)
 
+#define S3C64XX_PA_SROM         (0x70000000)
+
 #define S3C64XX_PA_NAND         (0x70200000)
 #define S3C64XX_PA_FB           (0x77100000)
 #define S3C64XX_PA_USB_HSOTG    (0x7C000000)
 #define S3C64XX_PA_WATCHDOG     (0x7E004000)
+#define S3C64XX_PA_RTC          (0x7E005000)
+#define S3C64XX_PA_ADC          (0x7E00B000)
 #define S3C64XX_PA_SYSCON       (0x7E00F000)
 #define S3C64XX_PA_AC97         (0x7F001000)
 #define S3C64XX_PA_IIS0         (0x7F002000)
 #define S3C64XX_PA_IIS1         (0x7F003000)
 #define S3C64XX_PA_TIMER        (0x7F006000)
 #define S3C64XX_PA_IIC0         (0x7F004000)
+#define S3C64XX_PA_SPI0         (0x7F00B000)
+#define S3C64XX_PA_SPI1         (0x7F00C000)
 #define S3C64XX_PA_PCM0         (0x7F009000)
 #define S3C64XX_PA_PCM1         (0x7F00A000)
 #define S3C64XX_PA_IISV4        (0x7F00D000)
@@ -70,8 +88,8 @@
 #define S3C64XX_VA_USB_HSPHY    S3C_ADDR_CPU(0x00200000)
 
 /* place VICs close together */
-#define S3C_VA_VIC0             (S3C_VA_IRQ + 0x00)
-#define S3C_VA_VIC1             (S3C_VA_IRQ + 0x10000)
+#define VA_VIC0                 (S3C_VA_IRQ + 0x00)
+#define VA_VIC1                 (S3C_VA_IRQ + 0x10000)
 
 /* compatibiltiy defines. */
 #define S3C_PA_TIMER            S3C64XX_PA_TIMER
diff --git a/arch/arm/mach-s3c6400/include/mach/memory.h b/arch/arm/mach-s3c64xx/include/mach/memory.h
index a3ac84a6548..a3ac84a6548 100644
--- a/arch/arm/mach-s3c6400/include/mach/memory.h
+++ b/arch/arm/mach-s3c64xx/include/mach/memory.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/pll.h b/arch/arm/mach-s3c64xx/include/mach/pll.h
index 90bbd72fdc4..90bbd72fdc4 100644
--- a/arch/arm/plat-s3c64xx/include/plat/pll.h
+++ b/arch/arm/mach-s3c64xx/include/mach/pll.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/pm-core.h b/arch/arm/mach-s3c64xx/include/mach/pm-core.h
index d347de3ba0d..1e9f20f0bb7 100644
--- a/arch/arm/plat-s3c64xx/include/plat/pm-core.h
+++ b/arch/arm/mach-s3c64xx/include/mach/pm-core.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c64xx/include/plat/pm-core.h
+/* linux/arch/arm/mach-s3c64xx/include/mach/pm-core.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
@@ -12,7 +12,7 @@
  * published by the Free Software Foundation.
  */
 
-#include <plat/regs-gpio.h>
+#include <mach/regs-gpio.h>
 
 static inline void s3c_pm_debug_init_uart(void)
 {
diff --git a/arch/arm/mach-s3c6400/include/mach/pwm-clock.h b/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
index b25bedee0d5..b25bedee0d5 100644
--- a/arch/arm/mach-s3c6400/include/mach/pwm-clock.h
+++ b/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h
index ff46e7fa957..3ef62741e5d 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h
@@ -35,14 +35,6 @@
 #define S3C_MEM0_GATE           S3C_CLKREG(0x3C)
 
 /* CLKDIV0 */
-#define S3C6400_CLKDIV0_MFC_MASK        (0xf << 28)
-#define S3C6400_CLKDIV0_MFC_SHIFT       (28)
-#define S3C6400_CLKDIV0_JPEG_MASK       (0xf << 24)
-#define S3C6400_CLKDIV0_JPEG_SHIFT      (24)
-#define S3C6400_CLKDIV0_CAM_MASK        (0xf << 20)
-#define S3C6400_CLKDIV0_CAM_SHIFT       (20)
-#define S3C6400_CLKDIV0_SECURITY_MASK   (0x3 << 18)
-#define S3C6400_CLKDIV0_SECURITY_SHIFT  (18)
 #define S3C6400_CLKDIV0_PCLK_MASK       (0xf << 12)
 #define S3C6400_CLKDIV0_PCLK_SHIFT      (12)
 #define S3C6400_CLKDIV0_HCLK2_MASK      (0x7 << 9)
@@ -51,42 +43,11 @@
 #define S3C6400_CLKDIV0_HCLK_SHIFT      (8)
 #define S3C6400_CLKDIV0_MPLL_MASK       (0x1 << 4)
 #define S3C6400_CLKDIV0_MPLL_SHIFT      (4)
+
 #define S3C6400_CLKDIV0_ARM_MASK        (0x7 << 0)
 #define S3C6410_CLKDIV0_ARM_MASK        (0xf << 0)
 #define S3C6400_CLKDIV0_ARM_SHIFT       (0)
 
-/* CLKDIV1 */
-#define S3C6410_CLKDIV1_FIMC_MASK       (0xf << 24)
-#define S3C6410_CLKDIV1_FIMC_SHIFT      (24)
-#define S3C6400_CLKDIV1_UHOST_MASK      (0xf << 20)
-#define S3C6400_CLKDIV1_UHOST_SHIFT     (20)
-#define S3C6400_CLKDIV1_SCALER_MASK     (0xf << 16)
-#define S3C6400_CLKDIV1_SCALER_SHIFT    (16)
-#define S3C6400_CLKDIV1_LCD_MASK        (0xf << 12)
-#define S3C6400_CLKDIV1_LCD_SHIFT       (12)
-#define S3C6400_CLKDIV1_MMC2_MASK       (0xf << 8)
-#define S3C6400_CLKDIV1_MMC2_SHIFT      (8)
-#define S3C6400_CLKDIV1_MMC1_MASK       (0xf << 4)
-#define S3C6400_CLKDIV1_MMC1_SHIFT      (4)
-#define S3C6400_CLKDIV1_MMC0_MASK       (0xf << 0)
-#define S3C6400_CLKDIV1_MMC0_SHIFT      (0)
-
-/* CLKDIV2 */
-#define S3C6410_CLKDIV2_AUDIO2_MASK     (0xf << 24)
-#define S3C6410_CLKDIV2_AUDIO2_SHIFT    (24)
-#define S3C6400_CLKDIV2_IRDA_MASK       (0xf << 20)
-#define S3C6400_CLKDIV2_IRDA_SHIFT      (20)
-#define S3C6400_CLKDIV2_UART_MASK       (0xf << 16)
-#define S3C6400_CLKDIV2_UART_SHIFT      (16)
-#define S3C6400_CLKDIV2_AUDIO1_MASK     (0xf << 12)
-#define S3C6400_CLKDIV2_AUDIO1_SHIFT    (12)
-#define S3C6400_CLKDIV2_AUDIO0_MASK     (0xf << 8)
-#define S3C6400_CLKDIV2_AUDIO0_SHIFT    (8)
-#define S3C6400_CLKDIV2_SPI1_MASK       (0xf << 4)
-#define S3C6400_CLKDIV2_SPI1_SHIFT      (4)
-#define S3C6400_CLKDIV2_SPI0_MASK       (0xf << 0)
-#define S3C6400_CLKDIV2_SPI0_SHIFT      (0)
-
 /* HCLK GATE Registers */
 #define S3C_CLKCON_HCLK_3DSE    (1<<31)
 #define S3C_CLKCON_HCLK_UHOST   (1<<29)
@@ -192,34 +153,4 @@
 #define S3C6400_CLKSRC_EPLL_MOUT_SHIFT  (2)
 #define S3C6400_CLKSRC_MFC              (1 << 4)
 
-#define S3C6410_CLKSRC_TV27_MASK        (0x1 << 31)
-#define S3C6410_CLKSRC_TV27_SHIFT       (31)
-#define S3C6410_CLKSRC_DAC27_MASK       (0x1 << 30)
-#define S3C6410_CLKSRC_DAC27_SHIFT      (30)
-#define S3C6400_CLKSRC_SCALER_MASK      (0x3 << 28)
-#define S3C6400_CLKSRC_SCALER_SHIFT     (28)
-#define S3C6400_CLKSRC_LCD_MASK         (0x3 << 26)
-#define S3C6400_CLKSRC_LCD_SHIFT        (26)
-#define S3C6400_CLKSRC_IRDA_MASK        (0x3 << 24)
-#define S3C6400_CLKSRC_IRDA_SHIFT       (24)
-#define S3C6400_CLKSRC_MMC2_MASK        (0x3 << 22)
-#define S3C6400_CLKSRC_MMC2_SHIFT       (22)
-#define S3C6400_CLKSRC_MMC1_MASK        (0x3 << 20)
-#define S3C6400_CLKSRC_MMC1_SHIFT       (20)
-#define S3C6400_CLKSRC_MMC0_MASK        (0x3 << 18)
-#define S3C6400_CLKSRC_MMC0_SHIFT       (18)
-#define S3C6400_CLKSRC_SPI1_MASK        (0x3 << 16)
-#define S3C6400_CLKSRC_SPI1_SHIFT       (16)
-#define S3C6400_CLKSRC_SPI0_MASK        (0x3 << 14)
-#define S3C6400_CLKSRC_SPI0_SHIFT       (14)
-#define S3C6400_CLKSRC_UART_MASK        (0x1 << 13)
-#define S3C6400_CLKSRC_UART_SHIFT       (13)
-#define S3C6400_CLKSRC_AUDIO1_MASK      (0x7 << 10)
-#define S3C6400_CLKSRC_AUDIO1_SHIFT     (10)
-#define S3C6400_CLKSRC_AUDIO0_MASK      (0x7 << 7)
-#define S3C6400_CLKSRC_AUDIO0_SHIFT     (7)
-#define S3C6400_CLKSRC_UHOST_MASK       (0x3 << 5)
-#define S3C6400_CLKSRC_UHOST_SHIFT      (5)
-
-
 #endif /* _PLAT_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/regs-fb.h b/arch/arm/mach-s3c64xx/include/mach/regs-fb.h
index f56611526c6..f56611526c6 100644
--- a/arch/arm/mach-s3c6400/include/mach/regs-fb.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-fb.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-gpio-memport.h b/arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h
index 82342f6fd27..82342f6fd27 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-gpio-memport.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-gpio.h b/arch/arm/mach-s3c64xx/include/mach/regs-gpio.h
index 81f7f6e6832..81f7f6e6832 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-gpio.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-gpio.h
diff --git a/arch/arm/mach-s3c6400/include/mach/regs-irq.h b/arch/arm/mach-s3c64xx/include/mach/regs-irq.h
index bcce68a0bb7..bcce68a0bb7 100644
--- a/arch/arm/mach-s3c6400/include/mach/regs-irq.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-irq.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-modem.h b/arch/arm/mach-s3c64xx/include/mach/regs-modem.h
index 49f7759dedf..49f7759dedf 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-modem.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-modem.h
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-srom.h b/arch/arm/mach-s3c64xx/include/mach/regs-srom.h
new file mode 100644
index 00000000000..756731b3629
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-srom.h
@@ -0,0 +1,59 @@
+/* arch/arm/plat-s3c64xx/include/plat/regs-srom.h
+ *
+ * Copyright 2009 Andy Green <andy@warmcat.com>
+ *
+ * S3C64XX SROM definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __PLAT_REGS_SROM_H
+#define __PLAT_REGS_SROM_H __FILE__
+
+#define S3C64XX_SROMREG(x)      (S3C_VA_MEM + (x))
+
+#define S3C64XX_SROM_BW         S3C64XX_SROMREG(0)
+#define S3C64XX_SROM_BC0        S3C64XX_SROMREG(4)
+#define S3C64XX_SROM_BC1        S3C64XX_SROMREG(8)
+#define S3C64XX_SROM_BC2        S3C64XX_SROMREG(0xc)
+#define S3C64XX_SROM_BC3        S3C64XX_SROMREG(0x10)
+#define S3C64XX_SROM_BC4        S3C64XX_SROMREG(0x14)
+#define S3C64XX_SROM_BC5        S3C64XX_SROMREG(0x18)
+
+/*
+ * one register BW holds 5 x 4-bit packed settings for NCS0 - NCS4
+ */
+
+#define S3C64XX_SROM_BW__DATAWIDTH__SHIFT       0
+#define S3C64XX_SROM_BW__WAITENABLE__SHIFT      2
+#define S3C64XX_SROM_BW__BYTEENABLE__SHIFT      3
+#define S3C64XX_SROM_BW__CS_MASK 0xf
+
+#define S3C64XX_SROM_BW__NCS0__SHIFT    0
+#define S3C64XX_SROM_BW__NCS1__SHIFT    4
+#define S3C64XX_SROM_BW__NCS2__SHIFT    8
+#define S3C64XX_SROM_BW__NCS3__SHIFT    0xc
+#define S3C64XX_SROM_BW__NCS4__SHIFT    0x10
+
+/*
+ * applies to same to BCS0 - BCS4
+ */
+
+#define S3C64XX_SROM_BCX__PMC__SHIFT    0
+#define S3C64XX_SROM_BCX__PMC__MASK     3
+#define S3C64XX_SROM_BCX__TACP__SHIFT   4
+#define S3C64XX_SROM_BCX__TACP__MASK    0xf
+#define S3C64XX_SROM_BCX__TCAH__SHIFT   8
+#define S3C64XX_SROM_BCX__TCAH__MASK    0xf
+#define S3C64XX_SROM_BCX__TCOH__SHIFT   12
+#define S3C64XX_SROM_BCX__TCOH__MASK    0xf
+#define S3C64XX_SROM_BCX__TACC__SHIFT   16
+#define S3C64XX_SROM_BCX__TACC__MASK    0x1f
+#define S3C64XX_SROM_BCX__TCOS__SHIFT   24
+#define S3C64XX_SROM_BCX__TCOS__MASK    0xf
+#define S3C64XX_SROM_BCX__TACS__SHIFT   28
+#define S3C64XX_SROM_BCX__TACS__MASK    0xf
+
+#endif /* _PLAT_REGS_SROM_H */
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-sys.h b/arch/arm/mach-s3c64xx/include/mach/regs-sys.h
index 69b78d9f83b..69b78d9f83b 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-sys.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-sys.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-syscon-power.h b/arch/arm/mach-s3c64xx/include/mach/regs-syscon-power.h
index 270d96ac970..270d96ac970 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-syscon-power.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-syscon-power.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/s3c6400.h b/arch/arm/mach-s3c64xx/include/mach/s3c6400.h
index 11f2e1e119b..f86958d0535 100644
--- a/arch/arm/plat-s3c64xx/include/plat/s3c6400.h
+++ b/arch/arm/mach-s3c64xx/include/mach/s3c6400.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c64xx/include/plat/s3c6400.h
+/* arch/arm/mach-s3c64xx/include/macht/s3c6400.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
@@ -15,9 +15,10 @@
 /* Common init code for S3C6400 related SoCs */
 
 extern void s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
-extern void s3c6400_register_clocks(unsigned armclk_divlimit);
 extern void s3c6400_setup_clocks(void);
 
+extern void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit);
+
 #ifdef CONFIG_CPU_S3C6400
 
 extern  int s3c6400_init(void);
@@ -33,4 +34,3 @@ extern void s3c6400_init_clocks(int xtal);
 #define s3c6400_map_io NULL
 #define s3c6400_init NULL
 #endif
-
diff --git a/arch/arm/plat-s3c64xx/include/plat/s3c6410.h b/arch/arm/mach-s3c64xx/include/mach/s3c6410.h
index 50dcdd6f680..24f1141ffcb 100644
--- a/arch/arm/plat-s3c64xx/include/plat/s3c6410.h
+++ b/arch/arm/mach-s3c64xx/include/mach/s3c6410.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c64xx/include/plat/s3c6410.h
+/* arch/arm/mach-s3c64xx/include/mach/s3c6410.h
  *
  * Copyright 2008 Openmoko,  Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h b/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h
new file mode 100644
index 00000000000..9d0c43b4b68
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h
@@ -0,0 +1,18 @@
+/* linux/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h
+ *
+ * Copyright (C) 2009 Samsung Electronics Ltd.
+ *      Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __S3C64XX_PLAT_SPI_CLKS_H
+#define __S3C64XX_PLAT_SPI_CLKS_H __FILE__
+
+#define S3C64XX_SPI_SRCCLK_PCLK         0
+#define S3C64XX_SPI_SRCCLK_SPIBUS       1
+#define S3C64XX_SPI_SRCCLK_48M          2
+
+#endif /* __S3C64XX_PLAT_SPI_CLKS_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/system.h b/arch/arm/mach-s3c64xx/include/mach/system.h
index 2e58cb7a714..2e58cb7a714 100644
--- a/arch/arm/mach-s3c6400/include/mach/system.h
+++ b/arch/arm/mach-s3c64xx/include/mach/system.h
diff --git a/arch/arm/mach-s3c6400/include/mach/tick.h b/arch/arm/mach-s3c64xx/include/mach/tick.h
index d9c0dc7014e..ebe18a9469b 100644
--- a/arch/arm/mach-s3c6400/include/mach/tick.h
+++ b/arch/arm/mach-s3c64xx/include/mach/tick.h
@@ -20,7 +20,7 @@
  */
 static inline u32 s3c24xx_ostimer_pending(void)
 {
-        u32 pend = __raw_readl(S3C_VA_VIC0 + VIC_RAW_STATUS);
+        u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
         return pend & 1 << (IRQ_TIMER4_VIC - S3C64XX_IRQ_VIC0(0));
 }
 
diff --git a/arch/arm/mach-s3c64xx/include/mach/timex.h b/arch/arm/mach-s3c64xx/include/mach/timex.h
new file mode 100644
index 00000000000..fb2e8cd4082
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/timex.h
@@ -0,0 +1,24 @@
+/* arch/arm/mach-s3c64xx/include/mach/timex.h
+ *
+ * Copyright (c) 2003-2005 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C6400 - time parameters
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H
+
+/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
+ * a variable is useless. It seems as long as we make our timers an
+ * exact multiple of HZ, any value that makes a 1->1 correspondence
+ * for the time conversion functions to/from jiffies is acceptable.
+*/
+
+#define CLOCK_TICK_RATE 12000000
+
+#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/uncompress.h b/arch/arm/mach-s3c64xx/include/mach/uncompress.h
index c6a82a20bf2..c6a82a20bf2 100644
--- a/arch/arm/mach-s3c6400/include/mach/uncompress.h
+++ b/arch/arm/mach-s3c64xx/include/mach/uncompress.h
diff --git a/arch/arm/mach-s3c64xx/include/mach/vmalloc.h b/arch/arm/mach-s3c64xx/include/mach/vmalloc.h
new file mode 100644
index 00000000000..7411ef3711a
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/vmalloc.h
@@ -0,0 +1,20 @@
+/* arch/arm/mach-s3c64xx/include/mach/vmalloc.h
+ *
+ * from arch/arm/mach-iop3xx/include/mach/vmalloc.h
+ *
+ * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
+ *                    http://www.simtec.co.uk/products/SWLINUX/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C6400 vmalloc definition
+*/
+
+#ifndef __ASM_ARCH_VMALLOC_H
+#define __ASM_ARCH_VMALLOC_H
+
+#define VMALLOC_END       (0xE0000000)
+
+#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/plat-s3c64xx/irq-eint.c b/arch/arm/mach-s3c64xx/irq-eint.c
index ebdf183a091..5682d6a7f4a 100644
--- a/arch/arm/plat-s3c64xx/irq-eint.c
+++ b/arch/arm/mach-s3c64xx/irq-eint.c
@@ -22,7 +22,7 @@
 #include <asm/hardware/vic.h>
 
 #include <plat/regs-irqtype.h>
-#include <plat/regs-gpio.h>
+#include <mach/regs-gpio.h>
 #include <plat/gpio-cfg.h>
 
 #include <mach/map.h>
diff --git a/arch/arm/plat-s3c64xx/irq-pm.c b/arch/arm/mach-s3c64xx/irq-pm.c
index ca523b5d4c1..da1bec64b9d 100644
--- a/arch/arm/plat-s3c64xx/irq-pm.c
+++ b/arch/arm/mach-s3c64xx/irq-pm.c
@@ -23,7 +23,7 @@
 
 #include <plat/regs-serial.h>
 #include <plat/regs-timer.h>
-#include <plat/regs-gpio.h>
+#include <mach/regs-gpio.h>
 #include <plat/cpu.h>
 #include <plat/pm.h>
 
diff --git a/arch/arm/mach-s3c64xx/irq.c b/arch/arm/mach-s3c64xx/irq.c
new file mode 100644
index 00000000000..67a145d440f
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/irq.c
@@ -0,0 +1,69 @@
+/* arch/arm/plat-s3c64xx/irq.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C64XX - Interrupt handling
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/serial_core.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+
+#include <asm/hardware/vic.h>
+
+#include <mach/map.h>
+#include <plat/irq-vic-timer.h>
+#include <plat/irq-uart.h>
+#include <plat/cpu.h>
+
+static struct s3c_uart_irq uart_irqs[] = {
+        [0] = {
+                .regs           = S3C_VA_UART0,
+                .base_irq       = IRQ_S3CUART_BASE0,
+                .parent_irq     = IRQ_UART0,
+        },
+        [1] = {
+                .regs           = S3C_VA_UART1,
+                .base_irq       = IRQ_S3CUART_BASE1,
+                .parent_irq     = IRQ_UART1,
+        },
+        [2] = {
+                .regs           = S3C_VA_UART2,
+                .base_irq       = IRQ_S3CUART_BASE2,
+                .parent_irq     = IRQ_UART2,
+        },
+        [3] = {
+                .regs           = S3C_VA_UART3,
+                .base_irq       = IRQ_S3CUART_BASE3,
+                .parent_irq     = IRQ_UART3,
+        },
+};
+
+
+void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
+{
+        printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
+
+        /* initialise the pair of VICs */
+        vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, 0);
+        vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, 0);
+
+        /* add the timer sub-irqs */
+
+        s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0);
+        s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1);
+        s3c_init_vic_timer_irq(IRQ_TIMER2_VIC, IRQ_TIMER2);
+        s3c_init_vic_timer_irq(IRQ_TIMER3_VIC, IRQ_TIMER3);
+        s3c_init_vic_timer_irq(IRQ_TIMER4_VIC, IRQ_TIMER4);
+
+        s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs));
+}
diff --git a/arch/arm/mach-s3c6410/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c
index 661cca63de2..4a0bb243d14 100644
--- a/arch/arm/mach-s3c6410/mach-anw6410.c
+++ b/arch/arm/mach-s3c64xx/mach-anw6410.c
@@ -1,4 +1,4 @@
-/* linux/arch/arm/mach-s3c6410/mach-anw6410.c
+/* linux/arch/arm/mach-s3c64xx/mach-anw6410.c
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
@@ -45,12 +45,12 @@
 #include <plat/iic.h>
 #include <plat/fb.h>
 
-#include <plat/s3c6410.h>
+#include <mach/s3c6410.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
-#include <plat/regs-gpio.h>
-#include <plat/regs-modem.h>
+#include <mach/regs-gpio.h>
+#include <mach/regs-modem.h>
 
 /* DM9000 */
 #define ANW6410_PA_DM9000       (0x18000000)
diff --git a/arch/arm/mach-s3c6410/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index 7619456f2ae..187441a78dd 100644
--- a/arch/arm/mach-s3c6410/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -38,7 +38,7 @@
 #include <plat/fb.h>
 #include <plat/nand.h>
 
-#include <plat/s3c6410.h>
+#include <mach/s3c6410.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
@@ -233,7 +233,7 @@ static struct platform_device *hmt_devices[] __initdata = {
         &s3c_device_i2c0,
         &s3c_device_nand,
         &s3c_device_fb,
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_timer[1],
         &hmt_backlight_device,
         &hmt_leds_device,
diff --git a/arch/arm/mach-s3c6410/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c
index 55e9bbfaf68..bf65747ea68 100644
--- a/arch/arm/mach-s3c6410/mach-ncp.c
+++ b/arch/arm/mach-s3c64xx/mach-ncp.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/mach-s3c6410/mach-ncp.c
+ * linux/arch/arm/mach-s3c64xx/mach-ncp.c
  *
  * Copyright (C) 2008-2009 Samsung Electronics
  *
@@ -40,7 +40,7 @@
 #include <plat/iic.h>
 #include <plat/fb.h>
 
-#include <plat/s3c6410.h>
+#include <mach/s3c6410.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c6400/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c
index ab19285389a..f7b18983950 100644
--- a/arch/arm/mach-s3c6400/mach-smdk6400.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c
@@ -1,4 +1,4 @@
-/* linux/arch/arm/mach-s3c6400/mach-smdk6400.c
+/* linux/arch/arm/mach-s3c64xx/mach-smdk6400.c
  *
  * Copyright 2008 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
@@ -31,7 +31,7 @@
 
 #include <plat/regs-serial.h>
 
-#include <plat/s3c6400.h>
+#include <mach/s3c6400.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c6410/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index 8969fe73b83..2d5afd221d7 100644
--- a/arch/arm/mach-s3c6410/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -1,4 +1,4 @@
-/* linux/arch/arm/mach-s3c6410/mach-smdk6410.c
+/* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
@@ -21,6 +21,7 @@
 #include <linux/platform_device.h>
 #include <linux/io.h>
 #include <linux/i2c.h>
+#include <linux/leds.h>
 #include <linux/fb.h>
 #include <linux/gpio.h>
 #include <linux/delay.h>
@@ -32,6 +33,11 @@
 #include <linux/mfd/wm8350/pmic.h>
 #endif
 
+#ifdef CONFIG_SMDK6410_WM1192_EV1
+#include <linux/mfd/wm831x/core.h>
+#include <linux/mfd/wm831x/pdata.h>
+#endif
+
 #include <video/platform_lcd.h>
 
 #include <asm/mach/arch.h>
@@ -46,14 +52,15 @@
 #include <asm/mach-types.h>
 
 #include <plat/regs-serial.h>
-#include <plat/regs-modem.h>
-#include <plat/regs-gpio.h>
-#include <plat/regs-sys.h>
+#include <mach/regs-modem.h>
+#include <mach/regs-gpio.h>
+#include <mach/regs-sys.h>
+#include <mach/regs-srom.h>
 #include <plat/iic.h>
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
 
-#include <plat/s3c6410.h>
+#include <mach/s3c6410.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
@@ -154,10 +161,20 @@ static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 };
 
+/*
+ * Configuring Ethernet on SMDK6410
+ *
+ * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
+ * The constant address below corresponds to nCS1
+ *
+ *  1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
+ *  2) CFG6 needs to be switched to "LAN9115" side
+ */
+
 static struct resource smdk6410_smsc911x_resources[] = {
         [0] = {
-                .start = 0x18000000,
-                .end   = 0x18000000 + SZ_64K - 1,
+                .start = S3C64XX_PA_XM0CSN1,
+                .end   = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
                 .flags = IORESOURCE_MEM,
         },
         [1] = {
@@ -235,8 +252,9 @@ static struct platform_device *smdk6410_devices[] __initdata = {
         &s3c_device_i2c0,
         &s3c_device_i2c1,
         &s3c_device_fb,
-        &s3c_device_usb,
+        &s3c_device_ohci,
         &s3c_device_usb_hsotg,
+        &s3c64xx_device_iisv4,
 
 #ifdef CONFIG_REGULATOR
         &smdk6410_b_pwr_5v,
@@ -246,77 +264,124 @@ static struct platform_device *smdk6410_devices[] __initdata = {
         &smdk6410_smsc911x,
 };
 
-#ifdef CONFIG_SMDK6410_WM1190_EV1
-/* S3C64xx internal logic & PLL */
-static struct regulator_init_data wm8350_dcdc1_data = {
+#ifdef CONFIG_REGULATOR
+/* ARM core */
+static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
+        {
+                .supply = "vddarm",
+        }
+};
+
+/* VDDARM, BUCK1 on J5 */
+static struct regulator_init_data smdk6410_vddarm = {
         .constraints = {
-                .name = "PVDD_INT/PVDD_PLL",
-                .min_uV = 1200000,
+                .name = "PVDD_ARM",
+                .min_uV = 1000000,
+                .max_uV = 1300000,
+                .always_on = 1,
+                .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+        },
+        .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
+        .consumer_supplies = smdk6410_vddarm_consumers,
+};
+
+/* VDD_INT, BUCK2 on J5 */
+static struct regulator_init_data smdk6410_vddint = {
+        .constraints = {
+                .name = "PVDD_INT",
+                .min_uV = 1000000,
                 .max_uV = 1200000,
                 .always_on = 1,
-                .apply_uV = 1,
+                .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
         },
 };
 
-/* Memory */
-static struct regulator_init_data wm8350_dcdc3_data = {
+/* VDD_HI, LDO3 on J5 */
+static struct regulator_init_data smdk6410_vddhi = {
         .constraints = {
-                .name = "PVDD_MEM",
-                .min_uV = 1800000,
-                .max_uV = 1800000,
+                .name = "PVDD_HI",
                 .always_on = 1,
-                .state_mem = {
-                         .uV = 1800000,
-                         .mode = REGULATOR_MODE_NORMAL,
-                         .enabled = 1,
-                 },
-                .initial_state = PM_SUSPEND_MEM,
         },
 };
 
-/* USB, EXT, PCM, ADC/DAC, USB, MMC */
-static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
-        {
-                /* WM8580 */
-                .supply = "DVDD",
-                .dev_name = "0-001b",
+/* VDD_PLL, LDO2 on J5 */
+static struct regulator_init_data smdk6410_vddpll = {
+        .constraints = {
+                .name = "PVDD_PLL",
+                .always_on = 1,
         },
 };
 
-static struct regulator_init_data wm8350_dcdc4_data = {
+/* VDD_UH_MMC, LDO5 on J5 */
+static struct regulator_init_data smdk6410_vdduh_mmc = {
         .constraints = {
-                .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
-                .min_uV = 3000000,
-                .max_uV = 3000000,
+                .name = "PVDD_UH/PVDD_MMC",
                 .always_on = 1,
         },
-        .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
-        .consumer_supplies = wm8350_dcdc4_consumers,
 };
 
-/* ARM core */
-static struct regulator_consumer_supply dcdc6_consumers[] = {
-        {
-                .supply = "vddarm",
-        }
+/* VCCM3BT, LDO8 on J5 */
+static struct regulator_init_data smdk6410_vccmc3bt = {
+        .constraints = {
+                .name = "PVCCM3BT",
+                .always_on = 1,
+        },
 };
 
-static struct regulator_init_data wm8350_dcdc6_data = {
+/* VCCM2MTV, LDO11 on J5 */
+static struct regulator_init_data smdk6410_vccm2mtv = {
         .constraints = {
-                .name = "PVDD_ARM",
-                .min_uV = 1000000,
-                .max_uV = 1300000,
+                .name = "PVCCM2MTV",
                 .always_on = 1,
-                .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
         },
-        .num_consumer_supplies = ARRAY_SIZE(dcdc6_consumers),
-        .consumer_supplies = dcdc6_consumers,
 };
 
-/* Alive */
-static struct regulator_init_data wm8350_ldo1_data = {
+/* VDD_LCD, LDO12 on J5 */
+static struct regulator_init_data smdk6410_vddlcd = {
+        .constraints = {
+                .name = "PVDD_LCD",
+                .always_on = 1,
+        },
+};
+
+/* VDD_OTGI, LDO9 on J5 */
+static struct regulator_init_data smdk6410_vddotgi = {
+        .constraints = {
+                .name = "PVDD_OTGI",
+                .always_on = 1,
+        },
+};
+
+/* VDD_OTG, LDO14 on J5 */
+static struct regulator_init_data smdk6410_vddotg = {
+        .constraints = {
+                .name = "PVDD_OTG",
+                .always_on = 1,
+        },
+};
+
+/* VDD_ALIVE, LDO15 on J5 */
+static struct regulator_init_data smdk6410_vddalive = {
         .constraints = {
                 .name = "PVDD_ALIVE",
+                .always_on = 1,
+        },
+};
+
+/* VDD_AUDIO, VLDO_AUDIO on J5 */
+static struct regulator_init_data smdk6410_vddaudio = {
+        .constraints = {
+                .name = "PVDD_AUDIO",
+                .always_on = 1,
+        },
+};
+#endif
+
+#ifdef CONFIG_SMDK6410_WM1190_EV1
+/* S3C64xx internal logic & PLL */
+static struct regulator_init_data wm8350_dcdc1_data = {
+        .constraints = {
+                .name = "PVDD_INT/PVDD_PLL",
                 .min_uV = 1200000,
                 .max_uV = 1200000,
                 .always_on = 1,
@@ -324,24 +389,40 @@ static struct regulator_init_data wm8350_ldo1_data = {
         },
 };
 
-/* OTG */
-static struct regulator_init_data wm8350_ldo2_data = {
+/* Memory */
+static struct regulator_init_data wm8350_dcdc3_data = {
         .constraints = {
-                .name = "PVDD_OTG",
-                .min_uV = 3300000,
-                .max_uV = 3300000,
+                .name = "PVDD_MEM",
+                .min_uV = 1800000,
+                .max_uV = 1800000,
                 .always_on = 1,
+                .state_mem = {
+                         .uV = 1800000,
+                         .mode = REGULATOR_MODE_NORMAL,
+                         .enabled = 1,
+                },
+                .initial_state = PM_SUSPEND_MEM,
         },
 };
 
-/* LCD */
-static struct regulator_init_data wm8350_ldo3_data = {
+/* USB, EXT, PCM, ADC/DAC, USB, MMC */
+static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
+        {
+                /* WM8580 */
+                .supply = "DVDD",
+                .dev_name = "0-001b",
+        },
+};
+
+static struct regulator_init_data wm8350_dcdc4_data = {
         .constraints = {
-                .name = "PVDD_LCD",
+                .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
                 .min_uV = 3000000,
                 .max_uV = 3000000,
                 .always_on = 1,
         },
+        .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
+        .consumer_supplies = wm8350_dcdc4_consumers,
 };
 
 /* OTGi/1190-EV1 HPVDD & AVDD */
@@ -362,10 +443,10 @@ static struct {
         { WM8350_DCDC_1, &wm8350_dcdc1_data },
         { WM8350_DCDC_3, &wm8350_dcdc3_data },
         { WM8350_DCDC_4, &wm8350_dcdc4_data },
-        { WM8350_DCDC_6, &wm8350_dcdc6_data },
-        { WM8350_LDO_1, &wm8350_ldo1_data },
-        { WM8350_LDO_2, &wm8350_ldo2_data },
-        { WM8350_LDO_3, &wm8350_ldo3_data },
+        { WM8350_DCDC_6, &smdk6410_vddarm },
+        { WM8350_LDO_1, &smdk6410_vddalive },
+        { WM8350_LDO_2, &smdk6410_vddotg },
+        { WM8350_LDO_3, &smdk6410_vddlcd },
         { WM8350_LDO_4, &wm8350_ldo4_data },
 };
 
@@ -388,6 +469,107 @@ static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
 static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
         .init = smdk6410_wm8350_init,
         .irq_high = 1,
+        .irq_base = IRQ_BOARD_START,
+};
+#endif
+
+#ifdef CONFIG_SMDK6410_WM1192_EV1
+static struct gpio_led wm1192_pmic_leds[] = {
+        {
+                .name = "PMIC:red:power",
+                .gpio = GPIO_BOARD_START + 3,
+                .default_state = LEDS_GPIO_DEFSTATE_ON,
+        },
+};
+
+static struct gpio_led_platform_data wm1192_pmic_led = {
+        .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
+        .leds = wm1192_pmic_leds,
+};
+
+static struct platform_device wm1192_pmic_led_dev = {
+        .name          = "leds-gpio",
+        .id            = -1,
+        .dev = {
+                .platform_data = &wm1192_pmic_led,
+        },
+};
+
+static int wm1192_pre_init(struct wm831x *wm831x)
+{
+        int ret;
+
+        /* Configure the IRQ line */
+        s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
+
+        ret = platform_device_register(&wm1192_pmic_led_dev);
+        if (ret != 0)
+                dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
+
+        return 0;
+}
+
+static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
+        .isink = 1,
+        .max_uA = 27554,
+};
+
+static struct regulator_init_data wm1192_dcdc3 = {
+        .constraints = {
+                .name = "PVDD_MEM/PVDD_GPS",
+                .always_on = 1,
+        },
+};
+
+static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
+        { .supply = "DVDD", .dev_name = "0-001b", },   /* WM8580 */
+};
+
+static struct regulator_init_data wm1192_ldo1 = {
+        .constraints = {
+                .name = "PVDD_LCD/PVDD_EXT",
+                .always_on = 1,
+        },
+        .consumer_supplies = wm1192_ldo1_consumers,
+        .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
+};
+
+static struct wm831x_status_pdata wm1192_led7_pdata = {
+        .name = "LED7:green:",
+};
+
+static struct wm831x_status_pdata wm1192_led8_pdata = {
+        .name = "LED8:green:",
+};
+
+static struct wm831x_pdata smdk6410_wm1192_pdata = {
+        .pre_init = wm1192_pre_init,
+        .irq_base = IRQ_BOARD_START,
+
+        .backlight = &wm1192_backlight_pdata,
+        .dcdc = {
+                &smdk6410_vddarm,  /* DCDC1 */
+                &smdk6410_vddint,  /* DCDC2 */
+                &wm1192_dcdc3,
+        },
+        .gpio_base = GPIO_BOARD_START,
+        .ldo = {
+                 &wm1192_ldo1,        /* LDO1 */
+                 &smdk6410_vdduh_mmc, /* LDO2 */
+                 NULL,                /* LDO3 NC */
+                 &smdk6410_vddotgi,   /* LDO4 */
+                 &smdk6410_vddotg,    /* LDO5 */
+                 &smdk6410_vddhi,     /* LDO6 */
+                 &smdk6410_vddaudio,  /* LDO7 */
+                 &smdk6410_vccm2mtv,  /* LDO8 */
+                 &smdk6410_vddpll,    /* LDO9 */
+                 &smdk6410_vccmc3bt,  /* LDO10 */
+                 &smdk6410_vddalive,  /* LDO11 */
+        },
+        .status = {
+                &wm1192_led7_pdata,
+                &wm1192_led8_pdata,
+        },
 };
 #endif
 
@@ -395,6 +577,13 @@ static struct i2c_board_info i2c_devs0[] __initdata = {
         { I2C_BOARD_INFO("24c08", 0x50), },
         { I2C_BOARD_INFO("wm8580", 0x1b), },
 
+#ifdef CONFIG_SMDK6410_WM1192_EV1
+        { I2C_BOARD_INFO("wm8312", 0x34),
+          .platform_data = &smdk6410_wm1192_pdata,
+          .irq = S3C_EINT(12),
+        },
+#endif
+
 #ifdef CONFIG_SMDK6410_WM1190_EV1
         { I2C_BOARD_INFO("wm8350", 0x1a),
           .platform_data = &smdk6410_wm8350_pdata,
@@ -430,10 +619,32 @@ static void __init smdk6410_map_io(void)
 
 static void __init smdk6410_machine_init(void)
 {
+        u32 cs1;
+
         s3c_i2c0_set_platdata(NULL);
         s3c_i2c1_set_platdata(NULL);
         s3c_fb_set_platdata(&smdk6410_lcd_pdata);
 
+        /* configure nCS1 width to 16 bits */
+
+        cs1 = __raw_readl(S3C64XX_SROM_BW) &
+                    ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
+        cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
+                (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
+                (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
+                                                   S3C64XX_SROM_BW__NCS1__SHIFT;
+        __raw_writel(cs1, S3C64XX_SROM_BW);
+
+        /* set timing for nCS1 suitable for ethernet chip */
+
+        __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
+                     (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
+                     (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
+                     (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
+                     (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
+                     (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
+                     (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
+
         gpio_request(S3C64XX_GPN(5), "LCD power");
         gpio_request(S3C64XX_GPF(13), "LCD power");
         gpio_request(S3C64XX_GPF(15), "LCD power");
diff --git a/arch/arm/plat-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c
index 47632fc7eb6..b8ac4597fad 100644
--- a/arch/arm/plat-s3c64xx/pm.c
+++ b/arch/arm/mach-s3c64xx/pm.c
@@ -20,14 +20,14 @@
 #include <mach/map.h>
 
 #include <plat/pm.h>
-#include <plat/regs-sys.h>
-#include <plat/regs-gpio.h>
-#include <plat/regs-clock.h>
-#include <plat/regs-syscon-power.h>
-#include <plat/regs-gpio-memport.h>
+#include <mach/regs-sys.h>
+#include <mach/regs-gpio.h>
+#include <mach/regs-clock.h>
+#include <mach/regs-syscon-power.h>
+#include <mach/regs-gpio-memport.h>
 
 #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
-#include <plat/gpio-bank-n.h>
+#include <mach/gpio-bank-n.h>
 
 void s3c_pm_debug_smdkled(u32 set, u32 clear)
 {
diff --git a/arch/arm/mach-s3c6400/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c
index d876ee50367..707e34e3afd 100644
--- a/arch/arm/mach-s3c6400/s3c6400.c
+++ b/arch/arm/mach-s3c64xx/s3c6400.c
@@ -1,4 +1,4 @@
-/* linux/arch/arm/mach-s3c6410/cpu.c
+/* linux/arch/arm/mach-s3c64xx/cpu.c
  *
  * Copyright 2009 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
@@ -30,14 +30,14 @@
 
 #include <plat/cpu-freq.h>
 #include <plat/regs-serial.h>
-#include <plat/regs-clock.h>
+#include <mach/regs-clock.h>
 
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/clock.h>
 #include <plat/sdhci.h>
 #include <plat/iic-core.h>
-#include <plat/s3c6400.h>
+#include <mach/s3c6400.h>
 
 void __init s3c6400_map_io(void)
 {
@@ -55,10 +55,7 @@ void __init s3c6400_map_io(void)
 
 void __init s3c6400_init_clocks(int xtal)
 {
-        printk(KERN_DEBUG "%s: initialising clocks\n", __func__);
-        s3c24xx_register_baseclocks(xtal);
-        s3c64xx_register_clocks();
-        s3c6400_register_clocks(S3C6400_CLKDIV0_ARM_MASK);
+        s3c64xx_register_clocks(xtal, S3C6400_CLKDIV0_ARM_MASK);
         s3c6400_setup_clocks();
 }
 
diff --git a/arch/arm/mach-s3c6410/cpu.c b/arch/arm/mach-s3c64xx/s3c6410.c
index 522c0869195..59635d19466 100644
--- a/arch/arm/mach-s3c6410/cpu.c
+++ b/arch/arm/mach-s3c64xx/s3c6410.c
@@ -1,4 +1,4 @@
-/* linux/arch/arm/mach-s3c6410/cpu.c
+/* linux/arch/arm/mach-s3c64xx/s3c6410.c
  *
  * Copyright 2008 Simtec Electronics
  * Copyright 2008 Simtec Electronics
@@ -31,30 +31,18 @@
 
 #include <plat/cpu-freq.h>
 #include <plat/regs-serial.h>
-#include <plat/regs-clock.h>
+#include <mach/regs-clock.h>
 
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/clock.h>
 #include <plat/sdhci.h>
 #include <plat/iic-core.h>
-#include <plat/s3c6400.h>
-#include <plat/s3c6410.h>
-
-/* Initial IO mappings */
-
-static struct map_desc s3c6410_iodesc[] __initdata = {
-};
-
-/* s3c6410_map_io
- *
- * register the standard cpu IO areas
-*/
+#include <mach/s3c6400.h>
+#include <mach/s3c6410.h>
 
 void __init s3c6410_map_io(void)
 {
-        iotable_init(s3c6410_iodesc, ARRAY_SIZE(s3c6410_iodesc));
-
         /* initialise device information early */
         s3c6410_default_sdhci0();
         s3c6410_default_sdhci1();
@@ -70,9 +58,7 @@ void __init s3c6410_map_io(void)
 void __init s3c6410_init_clocks(int xtal)
 {
         printk(KERN_DEBUG "%s: initialising clocks\n", __func__);
-        s3c24xx_register_baseclocks(xtal);
-        s3c64xx_register_clocks();
-        s3c6400_register_clocks(S3C6410_CLKDIV0_ARM_MASK);
+        s3c64xx_register_clocks(xtal, S3C6410_CLKDIV0_ARM_MASK);
         s3c6400_setup_clocks();
 }
 
diff --git a/arch/arm/plat-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
index 8e28e448dd2..8e28e448dd2 100644
--- a/arch/arm/plat-s3c64xx/setup-fb-24bpp.c
+++ b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
diff --git a/arch/arm/plat-s3c64xx/setup-i2c0.c b/arch/arm/mach-s3c64xx/setup-i2c0.c
index 36448076372..d1b11e6e77e 100644
--- a/arch/arm/plat-s3c64xx/setup-i2c0.c
+++ b/arch/arm/mach-s3c64xx/setup-i2c0.c
@@ -18,8 +18,8 @@
 struct platform_device; /* don't need the contents */
 
 #include <mach/gpio.h>
+#include <mach/gpio-bank-b.h>
 #include <plat/iic.h>
-#include <plat/gpio-bank-b.h>
 #include <plat/gpio-cfg.h>
 
 void s3c_i2c0_cfg_gpio(struct platform_device *dev)
diff --git a/arch/arm/plat-s3c64xx/setup-i2c1.c b/arch/arm/mach-s3c64xx/setup-i2c1.c
index bbe229bd90c..2dce57d8c6f 100644
--- a/arch/arm/plat-s3c64xx/setup-i2c1.c
+++ b/arch/arm/mach-s3c64xx/setup-i2c1.c
@@ -18,8 +18,8 @@
 struct platform_device; /* don't need the contents */
 
 #include <mach/gpio.h>
+#include <mach/gpio-bank-b.h>
 #include <plat/iic.h>
-#include <plat/gpio-bank-b.h>
 #include <plat/gpio-cfg.h>
 
 void s3c_i2c1_cfg_gpio(struct platform_device *dev)
diff --git a/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c
index a58c0cc7ba5..a58c0cc7ba5 100644
--- a/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c
+++ b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c
diff --git a/arch/arm/mach-s3c6400/setup-sdhci.c b/arch/arm/mach-s3c64xx/setup-sdhci.c
index 1039937403b..1a942037c4e 100644
--- a/arch/arm/mach-s3c6400/setup-sdhci.c
+++ b/arch/arm/mach-s3c64xx/setup-sdhci.c
@@ -1,11 +1,11 @@
-/* linux/arch/arm/mach-s3c6410/setup-sdhci.c
+/* linux/arch/arm/mach-s3c64xx/setup-sdhci.c
  *
  * Copyright 2008 Simtec Electronics
  * Copyright 2008 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
  *      http://armlinux.simtec.co.uk/
  *
- * S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC)
+ * S3C6400/S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC)
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -26,7 +26,7 @@
 
 /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
 
-char *s3c6400_hsmmc_clksrcs[4] = {
+char *s3c64xx_hsmmc_clksrcs[4] = {
         [0] = "hsmmc",
         [1] = "hsmmc",
         [2] = "mmc_bus",
@@ -61,3 +61,12 @@ void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
         writel(ctrl3, r + S3C_SDHCI_CONTROL3);
 }
 
+void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev,
+                                  void __iomem *r,
+                                  struct mmc_ios *ios,
+                                  struct mmc_card *card)
+{
+        writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
+
+        s3c6400_setup_sdhci_cfg_card(dev, r, ios, card);
+}
diff --git a/arch/arm/plat-s3c64xx/sleep.S b/arch/arm/mach-s3c64xx/sleep.S
index 8e71fe90a37..b2ef4431736 100644
--- a/arch/arm/plat-s3c64xx/sleep.S
+++ b/arch/arm/mach-s3c64xx/sleep.S
@@ -1,4 +1,4 @@
-/* linux/0arch/arm/plat-s3c64xx/sleep.S
+/* linux/arch/arm/plat-s3c64xx/sleep.S
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
@@ -19,8 +19,8 @@
 #undef S3C64XX_VA_GPIO
 #define S3C64XX_VA_GPIO (0x0)
 
-#include <plat/regs-gpio.h>
-#include <plat/gpio-bank-n.h>
+#include <mach/regs-gpio.h>
+#include <mach/gpio-bank-n.h>
 
 #define LL_UART (S3C_PA_UART + (0x400 * CONFIG_S3C_LOWLEVEL_UART_PORT))
 
diff --git a/arch/arm/mach-s5p6440/Kconfig b/arch/arm/mach-s5p6440/Kconfig
new file mode 100644
index 00000000000..4c29ff8b07d
--- /dev/null
+++ b/arch/arm/mach-s5p6440/Kconfig
@@ -0,0 +1,21 @@
+# arch/arm/mach-s5p6440/Kconfig
+#
+# Copyright (c) 2009 Samsung Electronics Co., Ltd.
+#               http://www.samsung.com/
+#
+# Licensed under GPLv2
+
+if ARCH_S5P6440
+
+config CPU_S5P6440
+        bool
+        help
+          Enable S5P6440 CPU support
+
+config MACH_SMDK6440
+        bool "SMDK6440"
+        select CPU_S5P6440
+        help
+          Machine support for the Samsung SMDK6440
+
+endif
diff --git a/arch/arm/mach-s5p6440/Makefile b/arch/arm/mach-s5p6440/Makefile
new file mode 100644
index 00000000000..1ad894b1d3a
--- /dev/null
+++ b/arch/arm/mach-s5p6440/Makefile
@@ -0,0 +1,19 @@
+# arch/arm/mach-s5p6440/Makefile
+#
+# Copyright (c) 2009 Samsung Electronics Co., Ltd.
+#               http://www.samsung.com/
+#
+# Licensed under GPLv2
+
+obj-y                           :=
+obj-m                           :=
+obj-n                           :=
+obj-                            :=
+
+# Core support for S5P6440 system
+
+obj-$(CONFIG_CPU_S5P6440)       += cpu.o init.o clock.o gpio.o
+
+# machine support
+
+obj-$(CONFIG_MACH_SMDK6440)     += mach-smdk6440.o
diff --git a/arch/arm/mach-s5p6440/Makefile.boot b/arch/arm/mach-s5p6440/Makefile.boot
new file mode 100644
index 00000000000..ff90aa13bd6
--- /dev/null
+++ b/arch/arm/mach-s5p6440/Makefile.boot
@@ -0,0 +1,2 @@
+   zreladdr-y   := 0x20008000
+params_phys-y   := 0x20000100
diff --git a/arch/arm/mach-s5p6440/clock.c b/arch/arm/mach-s5p6440/clock.c
new file mode 100644
index 00000000000..b2672e16e7a
--- /dev/null
+++ b/arch/arm/mach-s5p6440/clock.c
@@ -0,0 +1,698 @@
+/* linux/arch/arm/mach-s5p6440/clock.c
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - Clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/sysdev.h>
+#include <linux/io.h>
+
+#include <mach/hardware.h>
+#include <mach/map.h>
+
+#include <plat/cpu-freq.h>
+#include <mach/regs-clock.h>
+#include <plat/clock.h>
+#include <plat/cpu.h>
+#include <plat/clock-clksrc.h>
+#include <plat/s5p-clock.h>
+#include <plat/pll.h>
+#include <plat/s5p6440.h>
+
+/* APLL Mux output clock */
+static struct clksrc_clk clk_mout_apll = {
+        .clk    = {
+                .name           = "mout_apll",
+                .id             = -1,
+        },
+        .sources        = &clk_src_apll,
+        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
+};
+
+static int s5p6440_epll_enable(struct clk *clk, int enable)
+{
+        unsigned int ctrlbit = clk->ctrlbit;
+        unsigned int epll_con = __raw_readl(S5P_EPLL_CON) & ~ctrlbit;
+
+        if (enable)
+                __raw_writel(epll_con | ctrlbit, S5P_EPLL_CON);
+        else
+                __raw_writel(epll_con, S5P_EPLL_CON);
+
+        return 0;
+}
+
+static unsigned long s5p6440_epll_get_rate(struct clk *clk)
+{
+        return clk->rate;
+}
+
+static u32 epll_div[][5] = {
+        { 36000000,     0,      48, 1, 4 },
+        { 48000000,     0,      32, 1, 3 },
+        { 60000000,     0,      40, 1, 3 },
+        { 72000000,     0,      48, 1, 3 },
+        { 84000000,     0,      28, 1, 2 },
+        { 96000000,     0,      32, 1, 2 },
+        { 32768000,     45264,  43, 1, 4 },
+        { 45158000,     6903,   30, 1, 3 },
+        { 49152000,     50332,  32, 1, 3 },
+        { 67738000,     10398,  45, 1, 3 },
+        { 73728000,     9961,   49, 1, 3 }
+};
+
+static int s5p6440_epll_set_rate(struct clk *clk, unsigned long rate)
+{
+        unsigned int epll_con, epll_con_k;
+        unsigned int i;
+
+        if (clk->rate == rate)  /* Return if nothing changed */
+                return 0;
+
+        epll_con = __raw_readl(S5P_EPLL_CON);
+        epll_con_k = __raw_readl(S5P_EPLL_CON_K);
+
+        epll_con_k &= ~(PLL90XX_KDIV_MASK);
+        epll_con &= ~(PLL90XX_MDIV_MASK | PLL90XX_PDIV_MASK | PLL90XX_SDIV_MASK);
+
+        for (i = 0; i < ARRAY_SIZE(epll_div); i++) {
+                 if (epll_div[i][0] == rate) {
+                        epll_con_k |= (epll_div[i][1] << PLL90XX_KDIV_SHIFT);
+                        epll_con |= (epll_div[i][2] << PLL90XX_MDIV_SHIFT) |
+                                    (epll_div[i][3] << PLL90XX_PDIV_SHIFT) |
+                                    (epll_div[i][4] << PLL90XX_SDIV_SHIFT);
+                        break;
+                }
+        }
+
+        if (i == ARRAY_SIZE(epll_div)) {
+                printk(KERN_ERR "%s: Invalid Clock EPLL Frequency\n", __func__);
+                return -EINVAL;
+        }
+
+        __raw_writel(epll_con, S5P_EPLL_CON);
+        __raw_writel(epll_con_k, S5P_EPLL_CON_K);
+
+        clk->rate = rate;
+
+        return 0;
+}
+
+static struct clk_ops s5p6440_epll_ops = {
+        .get_rate = s5p6440_epll_get_rate,
+        .set_rate = s5p6440_epll_set_rate,
+};
+
+static struct clksrc_clk clk_mout_epll = {
+        .clk    = {
+                .name           = "mout_epll",
+                .id             = -1,
+        },
+        .sources        = &clk_src_epll,
+        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 2, .size = 1 },
+};
+
+static struct clksrc_clk clk_mout_mpll = {
+        .clk = {
+                .name           = "mout_mpll",
+                .id             = -1,
+        },
+        .sources        = &clk_src_mpll,
+        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 1, .size = 1 },
+};
+
+static struct clk clk_h_low = {
+        .name           = "hclk_low",
+        .id             = -1,
+        .rate           = 0,
+        .parent         = NULL,
+        .ctrlbit        = 0,
+        .ops            = &clk_ops_def_setrate,
+};
+
+static struct clk clk_p_low = {
+        .name           = "pclk_low",
+        .id             = -1,
+        .rate           = 0,
+        .parent         = NULL,
+        .ctrlbit        = 0,
+        .ops            = &clk_ops_def_setrate,
+};
+
+enum perf_level {
+        L0 = 532*1000,
+        L1 = 266*1000,
+        L2 = 133*1000,
+};
+
+static const u32 clock_table[][3] = {
+        /*{ARM_CLK, DIVarm, DIVhclk}*/
+        {L0 * 1000, (0 << ARM_DIV_RATIO_SHIFT), (3 << S5P_CLKDIV0_HCLK_SHIFT)},
+        {L1 * 1000, (1 << ARM_DIV_RATIO_SHIFT), (1 << S5P_CLKDIV0_HCLK_SHIFT)},
+        {L2 * 1000, (3 << ARM_DIV_RATIO_SHIFT), (0 << S5P_CLKDIV0_HCLK_SHIFT)},
+};
+
+static unsigned long s5p6440_armclk_get_rate(struct clk *clk)
+{
+        unsigned long rate = clk_get_rate(clk->parent);
+        u32 clkdiv;
+
+        /* divisor mask starts at bit0, so no need to shift */
+        clkdiv = __raw_readl(ARM_CLK_DIV) & ARM_DIV_MASK;
+
+        return rate / (clkdiv + 1);
+}
+
+static unsigned long s5p6440_armclk_round_rate(struct clk *clk,
+                                                unsigned long rate)
+{
+        u32 iter;
+
+        for (iter = 1 ; iter < ARRAY_SIZE(clock_table) ; iter++) {
+                if (rate > clock_table[iter][0])
+                        return clock_table[iter-1][0];
+        }
+
+        return clock_table[ARRAY_SIZE(clock_table) - 1][0];
+}
+
+static int s5p6440_armclk_set_rate(struct clk *clk, unsigned long rate)
+{
+        u32 round_tmp;
+        u32 iter;
+        u32 clk_div0_tmp;
+        u32 cur_rate = clk->ops->get_rate(clk);
+        unsigned long flags;
+
+        round_tmp = clk->ops->round_rate(clk, rate);
+        if (round_tmp == cur_rate)
+                return 0;
+
+
+        for (iter = 0 ; iter < ARRAY_SIZE(clock_table) ; iter++) {
+                if (round_tmp == clock_table[iter][0])
+                        break;
+        }
+
+        if (iter >= ARRAY_SIZE(clock_table))
+                iter = ARRAY_SIZE(clock_table) - 1;
+
+        local_irq_save(flags);
+        if (cur_rate > round_tmp) {
+                /* Frequency Down */
+                clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK);
+                clk_div0_tmp |= clock_table[iter][1];
+                __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
+
+                clk_div0_tmp = __raw_readl(ARM_CLK_DIV) &
+                                ~(S5P_CLKDIV0_HCLK_MASK);
+                clk_div0_tmp |= clock_table[iter][2];
+                __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
+
+
+        } else {
+                /* Frequency Up */
+                clk_div0_tmp = __raw_readl(ARM_CLK_DIV) &
+                                ~(S5P_CLKDIV0_HCLK_MASK);
+                clk_div0_tmp |= clock_table[iter][2];
+                __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
+
+                clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK);
+                clk_div0_tmp |= clock_table[iter][1];
+                __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
+                }
+        local_irq_restore(flags);
+
+        clk->rate = clock_table[iter][0];
+
+        return 0;
+}
+
+static struct clk_ops s5p6440_clkarm_ops = {
+        .get_rate       = s5p6440_armclk_get_rate,
+        .set_rate       = s5p6440_armclk_set_rate,
+        .round_rate     = s5p6440_armclk_round_rate,
+};
+
+static unsigned long s5p6440_clk_doutmpll_get_rate(struct clk *clk)
+{
+        unsigned long rate = clk_get_rate(clk->parent);
+
+        if (__raw_readl(S5P_CLK_DIV0) & S5P_CLKDIV0_MPLL_MASK)
+                rate /= 2;
+
+        return rate;
+}
+
+static struct clk clk_dout_mpll = {
+        .name           = "dout_mpll",
+        .id             = -1,
+        .parent         = &clk_mout_mpll.clk,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s5p6440_clk_doutmpll_get_rate,
+        },
+};
+
+int s5p6440_clk48m_ctrl(struct clk *clk, int enable)
+{
+        unsigned long flags;
+        u32 val;
+
+        /* can't rely on clock lock, this register has other usages */
+        local_irq_save(flags);
+
+        val = __raw_readl(S5P_OTHERS);
+        if (enable)
+                val |= S5P_OTHERS_USB_SIG_MASK;
+        else
+                val &= ~S5P_OTHERS_USB_SIG_MASK;
+
+        __raw_writel(val, S5P_OTHERS);
+
+        local_irq_restore(flags);
+
+        return 0;
+}
+
+static int s5p6440_pclk_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_CLK_GATE_PCLK, clk, enable);
+}
+
+static int s5p6440_hclk0_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_CLK_GATE_HCLK0, clk, enable);
+}
+
+static int s5p6440_hclk1_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_CLK_GATE_HCLK1, clk, enable);
+}
+
+static int s5p6440_sclk_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_CLK_GATE_SCLK0, clk, enable);
+}
+
+static int s5p6440_mem_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_CLK_GATE_MEM0, clk, enable);
+}
+
+/*
+ * The following clocks will be disabled during clock initialization. It is
+ * recommended to keep the following clocks disabled until the driver requests
+ * for enabling the clock.
+ */
+static struct clk init_clocks_disable[] = {
+        {
+                .name           = "nand",
+                .id             = -1,
+                .parent         = &clk_h,
+                .enable         = s5p6440_mem_ctrl,
+                .ctrlbit        = S5P_CLKCON_MEM0_HCLK_NFCON,
+        }, {
+                .name           = "adc",
+                .id             = -1,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_TSADC,
+        }, {
+                .name           = "i2c",
+                .id             = -1,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_IIC0,
+        }, {
+                .name           = "i2s_v40",
+                .id             = 0,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_IIS2,
+        }, {
+                .name           = "spi",
+                .id             = 0,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_SPI0,
+        }, {
+                .name           = "spi",
+                .id             = 1,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_SPI1,
+        }, {
+                .name           = "sclk_spi_48",
+                .id             = 0,
+                .parent         = &clk_48m,
+                .enable         = s5p6440_sclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_SCLK0_SPI0_48,
+        }, {
+                .name           = "sclk_spi_48",
+                .id             = 1,
+                .parent         = &clk_48m,
+                .enable         = s5p6440_sclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_SCLK0_SPI1_48,
+        }, {
+                .name           = "mmc_48m",
+                .id             = 0,
+                .parent         = &clk_48m,
+                .enable         = s5p6440_sclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_SCLK0_MMC0_48,
+        }, {
+                .name           = "mmc_48m",
+                .id             = 1,
+                .parent         = &clk_48m,
+                .enable         = s5p6440_sclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_SCLK0_MMC1_48,
+        }, {
+                .name           = "mmc_48m",
+                .id             = 2,
+                .parent         = &clk_48m,
+                .enable         = s5p6440_sclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_SCLK0_MMC2_48,
+        }, {
+                .name           = "otg",
+                .id             = -1,
+                .parent         = &clk_h_low,
+                .enable         = s5p6440_hclk0_ctrl,
+                .ctrlbit        = S5P_CLKCON_HCLK0_USB
+        }, {
+                .name           = "post",
+                .id             = -1,
+                .parent         = &clk_h_low,
+                .enable         = s5p6440_hclk0_ctrl,
+                .ctrlbit        = S5P_CLKCON_HCLK0_POST0
+        }, {
+                .name           = "lcd",
+                .id             = -1,
+                .parent         = &clk_h_low,
+                .enable         = s5p6440_hclk1_ctrl,
+                .ctrlbit        = S5P_CLKCON_HCLK1_DISPCON,
+        }, {
+                .name           = "hsmmc",
+                .id             = 0,
+                .parent         = &clk_h_low,
+                .enable         = s5p6440_hclk0_ctrl,
+                .ctrlbit        = S5P_CLKCON_HCLK0_HSMMC0,
+        }, {
+                .name           = "hsmmc",
+                .id             = 1,
+                .parent         = &clk_h_low,
+                .enable         = s5p6440_hclk0_ctrl,
+                .ctrlbit        = S5P_CLKCON_HCLK0_HSMMC1,
+        }, {
+                .name           = "hsmmc",
+                .id             = 2,
+                .parent         = &clk_h_low,
+                .enable         = s5p6440_hclk0_ctrl,
+                .ctrlbit        = S5P_CLKCON_HCLK0_HSMMC2,
+        }, {
+                .name           = "rtc",
+                .id             = -1,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_RTC,
+        }, {
+                .name           = "watchdog",
+                .id             = -1,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_WDT,
+        }, {
+                .name           = "timers",
+                .id             = -1,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_PWM,
+        }
+};
+
+/*
+ * The following clocks will be enabled during clock initialization.
+ */
+static struct clk init_clocks[] = {
+        {
+                .name           = "gpio",
+                .id             = -1,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_GPIO,
+        }, {
+                .name           = "uart",
+                .id             = 0,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_UART0,
+        }, {
+                .name           = "uart",
+                .id             = 1,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_UART1,
+        }, {
+                .name           = "uart",
+                .id             = 2,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_UART2,
+        }, {
+                .name           = "uart",
+                .id             = 3,
+                .parent         = &clk_p_low,
+                .enable         = s5p6440_pclk_ctrl,
+                .ctrlbit        = S5P_CLKCON_PCLK_UART3,
+        }
+};
+
+static struct clk clk_iis_cd_v40 = {
+        .name           = "iis_cdclk_v40",
+        .id             = -1,
+};
+
+static struct clk clk_pcm_cd = {
+        .name           = "pcm_cdclk",
+        .id             = -1,
+};
+
+static struct clk *clkset_spi_mmc_list[] = {
+        &clk_mout_epll.clk,
+        &clk_dout_mpll,
+        &clk_fin_epll,
+};
+
+static struct clksrc_sources clkset_spi_mmc = {
+        .sources        = clkset_spi_mmc_list,
+        .nr_sources     = ARRAY_SIZE(clkset_spi_mmc_list),
+};
+
+static struct clk *clkset_uart_list[] = {
+        &clk_mout_epll.clk,
+        &clk_dout_mpll
+};
+
+static struct clksrc_sources clkset_uart = {
+        .sources        = clkset_uart_list,
+        .nr_sources     = ARRAY_SIZE(clkset_uart_list),
+};
+
+static struct clksrc_clk clksrcs[] = {
+        {
+                .clk    = {
+                        .name           = "mmc_bus",
+                        .id             = 0,
+                        .ctrlbit        = S5P_CLKCON_SCLK0_MMC0,
+                        .enable         = s5p6440_sclk_ctrl,
+                },
+                .sources = &clkset_spi_mmc,
+                .reg_src = { .reg = S5P_CLK_SRC0, .shift = 18, .size = 2 },
+                .reg_div = { .reg = S5P_CLK_DIV1, .shift = 0, .size = 4 },
+        }, {
+                .clk    = {
+                        .name           = "mmc_bus",
+                        .id             = 1,
+                        .ctrlbit        = S5P_CLKCON_SCLK0_MMC1,
+                        .enable         = s5p6440_sclk_ctrl,
+                },
+                .sources = &clkset_spi_mmc,
+                .reg_src = { .reg = S5P_CLK_SRC0, .shift = 20, .size = 2 },
+                .reg_div = { .reg = S5P_CLK_DIV1, .shift = 4, .size = 4 },
+        }, {
+                .clk    = {
+                        .name           = "mmc_bus",
+                        .id             = 2,
+                        .ctrlbit        = S5P_CLKCON_SCLK0_MMC2,
+                        .enable         = s5p6440_sclk_ctrl,
+                },
+                .sources = &clkset_spi_mmc,
+                .reg_src = { .reg = S5P_CLK_SRC0, .shift = 22, .size = 2 },
+                .reg_div = { .reg = S5P_CLK_DIV1, .shift = 8, .size = 4 },
+        }, {
+                .clk    = {
+                        .name           = "uclk1",
+                        .id             = -1,
+                        .ctrlbit        = S5P_CLKCON_SCLK0_UART,
+                        .enable         = s5p6440_sclk_ctrl,
+                },
+                .sources = &clkset_uart,
+                .reg_src = { .reg = S5P_CLK_SRC0, .shift = 13, .size = 1 },
+                .reg_div = { .reg = S5P_CLK_DIV2, .shift = 16, .size = 4 },
+        }, {
+                .clk    = {
+                        .name           = "spi_epll",
+                        .id             = 0,
+                        .ctrlbit        = S5P_CLKCON_SCLK0_SPI0,
+                        .enable         = s5p6440_sclk_ctrl,
+                },
+                .sources = &clkset_spi_mmc,
+                .reg_src = { .reg = S5P_CLK_SRC0, .shift = 14, .size = 2 },
+                .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 },
+        }, {
+                .clk    = {
+                        .name           = "spi_epll",
+                        .id             = 1,
+                        .ctrlbit        = S5P_CLKCON_SCLK0_SPI1,
+                        .enable         = s5p6440_sclk_ctrl,
+                },
+                .sources = &clkset_spi_mmc,
+                .reg_src = { .reg = S5P_CLK_SRC0, .shift = 16, .size = 2 },
+                .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 },
+        }
+};
+
+/* Clock initialisation code */
+static struct clksrc_clk *init_parents[] = {
+        &clk_mout_apll,
+        &clk_mout_epll,
+        &clk_mout_mpll,
+};
+
+void __init_or_cpufreq s5p6440_setup_clocks(void)
+{
+        struct clk *xtal_clk;
+        unsigned long xtal;
+        unsigned long fclk;
+        unsigned long hclk;
+        unsigned long hclk_low;
+        unsigned long pclk;
+        unsigned long pclk_low;
+        unsigned long epll;
+        unsigned long apll;
+        unsigned long mpll;
+        unsigned int ptr;
+        u32 clkdiv0;
+        u32 clkdiv3;
+
+        /* Set S5P6440 functions for clk_fout_epll */
+        clk_fout_epll.enable = s5p6440_epll_enable;
+        clk_fout_epll.ops = &s5p6440_epll_ops;
+
+        /* Set S5P6440 functions for arm clock */
+        clk_arm.parent = &clk_mout_apll.clk;
+        clk_arm.ops = &s5p6440_clkarm_ops;
+        clk_48m.enable = s5p6440_clk48m_ctrl;
+
+        clkdiv0 = __raw_readl(S5P_CLK_DIV0);
+        clkdiv3 = __raw_readl(S5P_CLK_DIV3);
+
+        xtal_clk = clk_get(NULL, "ext_xtal");
+        BUG_ON(IS_ERR(xtal_clk));
+
+        xtal = clk_get_rate(xtal_clk);
+        clk_put(xtal_clk);
+
+        epll = s5p_get_pll90xx(xtal, __raw_readl(S5P_EPLL_CON),
+                                __raw_readl(S5P_EPLL_CON_K));
+        mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502);
+        apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4502);
+
+        printk(KERN_INFO "S5P6440: PLL settings, A=%ld.%ldMHz, M=%ld.%ldMHz," \
+                        " E=%ld.%ldMHz\n",
+                        print_mhz(apll), print_mhz(mpll), print_mhz(epll));
+
+        fclk = apll / GET_DIV(clkdiv0, S5P_CLKDIV0_ARM);
+        hclk = fclk / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK);
+        pclk = hclk / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK);
+
+        if (__raw_readl(S5P_OTHERS) & S5P_OTHERS_HCLK_LOW_SEL_MPLL) {
+                /* Asynchronous mode */
+                hclk_low = mpll / GET_DIV(clkdiv3, S5P_CLKDIV3_HCLK_LOW);
+        } else {
+                /* Synchronous mode */
+                hclk_low = apll / GET_DIV(clkdiv3, S5P_CLKDIV3_HCLK_LOW);
+        }
+
+        pclk_low = hclk_low / GET_DIV(clkdiv3, S5P_CLKDIV3_PCLK_LOW);
+
+        printk(KERN_INFO "S5P6440: HCLK=%ld.%ldMHz, HCLK_LOW=%ld.%ldMHz," \
+                        " PCLK=%ld.%ldMHz, PCLK_LOW=%ld.%ldMHz\n",
+                        print_mhz(hclk), print_mhz(hclk_low),
+                        print_mhz(pclk), print_mhz(pclk_low));
+
+        clk_fout_mpll.rate = mpll;
+        clk_fout_epll.rate = epll;
+        clk_fout_apll.rate = apll;
+
+        clk_f.rate = fclk;
+        clk_h.rate = hclk;
+        clk_p.rate = pclk;
+        clk_h_low.rate = hclk_low;
+        clk_p_low.rate = pclk_low;
+
+        for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
+                s3c_set_clksrc(init_parents[ptr], true);
+
+        for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
+                s3c_set_clksrc(&clksrcs[ptr], true);
+}
+
+static struct clk *clks[] __initdata = {
+        &clk_ext,
+        &clk_mout_epll.clk,
+        &clk_mout_mpll.clk,
+        &clk_dout_mpll,
+        &clk_iis_cd_v40,
+        &clk_pcm_cd,
+        &clk_p_low,
+        &clk_h_low,
+};
+
+void __init s5p6440_register_clocks(void)
+{
+        struct clk *clkp;
+        int ret;
+        int ptr;
+
+        ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
+        if (ret > 0)
+                printk(KERN_ERR "Failed to register %u clocks\n", ret);
+
+        s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
+        s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
+
+        clkp = init_clocks_disable;
+        for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
+
+                ret = s3c24xx_register_clock(clkp);
+                if (ret < 0) {
+                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
+                               clkp->name, ret);
+                }
+                (clkp->enable)(clkp, 0);
+        }
+
+        s3c_pwmclk_init();
+}
diff --git a/arch/arm/mach-s5p6440/cpu.c b/arch/arm/mach-s5p6440/cpu.c
new file mode 100644
index 00000000000..1794131aeac
--- /dev/null
+++ b/arch/arm/mach-s5p6440/cpu.c
@@ -0,0 +1,114 @@
+/* linux/arch/arm/mach-s5p6440/cpu.c
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/init.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/sysdev.h>
+#include <linux/serial_core.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <asm/proc-fns.h>
+
+#include <mach/hardware.h>
+#include <mach/map.h>
+#include <asm/irq.h>
+
+#include <plat/regs-serial.h>
+#include <mach/regs-clock.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/clock.h>
+#include <plat/s5p6440.h>
+
+static void s5p6440_idle(void)
+{
+        unsigned long val;
+
+        if (!need_resched()) {
+                val = __raw_readl(S5P_PWR_CFG);
+                val &= ~(0x3<<5);
+                val |= (0x1<<5);
+                __raw_writel(val, S5P_PWR_CFG);
+
+                cpu_do_idle();
+        }
+        local_irq_enable();
+}
+
+/* s5p6440_map_io
+ *
+ * register the standard cpu IO areas
+*/
+
+void __init s5p6440_map_io(void)
+{
+        /* initialize any device information early */
+}
+
+void __init s5p6440_init_clocks(int xtal)
+{
+        printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
+
+        s3c24xx_register_baseclocks(xtal);
+        s5p_register_clocks(xtal);
+        s5p6440_register_clocks();
+        s5p6440_setup_clocks();
+}
+
+void __init s5p6440_init_irq(void)
+{
+        /* S5P6440 supports only 2 VIC */
+        u32 vic[2];
+
+        /*
+         * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)]
+         * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22]
+         */
+        vic[0] = 0xff800ae7;
+        vic[1] = 0xffbf23e5;
+
+        s5p_init_irq(vic, ARRAY_SIZE(vic));
+}
+
+static struct sysdev_class s5p6440_sysclass = {
+        .name   = "s5p6440-core",
+};
+
+static struct sys_device s5p6440_sysdev = {
+        .cls    = &s5p6440_sysclass,
+};
+
+static int __init s5p6440_core_init(void)
+{
+        return sysdev_class_register(&s5p6440_sysclass);
+}
+
+core_initcall(s5p6440_core_init);
+
+int __init s5p6440_init(void)
+{
+        printk(KERN_INFO "S5P6440: Initializing architecture\n");
+
+        /* set idle function */
+        pm_idle = s5p6440_idle;
+
+        return sysdev_register(&s5p6440_sysdev);
+}
diff --git a/arch/arm/mach-s5p6440/gpio.c b/arch/arm/mach-s5p6440/gpio.c
new file mode 100644
index 00000000000..b0ea741177a
--- /dev/null
+++ b/arch/arm/mach-s5p6440/gpio.c
@@ -0,0 +1,322 @@
+/* arch/arm/mach-s5p6440/gpio.c
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - GPIOlib support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <mach/map.h>
+#include <mach/gpio.h>
+#include <mach/regs-gpio.h>
+#include <plat/gpio-core.h>
+#include <plat/gpio-cfg.h>
+#include <plat/gpio-cfg-helpers.h>
+
+/* GPIO bank summary:
+*
+* Bank  GPIOs   Style   SlpCon  ExtInt Group
+* A     6       4Bit    Yes     1
+* B     7       4Bit    Yes     1
+* C     8       4Bit    Yes     2
+* F     2       2Bit    Yes     4 [1]
+* G     7       4Bit    Yes     5
+* H     10      4Bit[2] Yes     6
+* I     16      2Bit    Yes     None
+* J     12      2Bit    Yes     None
+* N     16      2Bit    No      IRQ_EINT
+* P     8       2Bit    Yes     8
+* R     15      4Bit[2] Yes     8
+*
+* [1] BANKF pins 14,15 do not form part of the external interrupt sources
+* [2] BANK has two control registers, GPxCON0 and GPxCON1
+*/
+
+static int s5p6440_gpiolib_rbank_4bit2_input(struct gpio_chip *chip,
+                                             unsigned int offset)
+{
+        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
+        void __iomem *base = ourchip->base;
+        void __iomem *regcon = base;
+        unsigned long con;
+
+        switch (offset) {
+        case 6:
+                offset += 1;
+        case 0:
+        case 1:
+        case 2:
+        case 3:
+        case 4:
+        case 5:
+                regcon -= 4;
+                break;
+        default:
+                offset -= 7;
+                break;
+        }
+
+        con = __raw_readl(regcon);
+        con &= ~(0xf << con_4bit_shift(offset));
+        __raw_writel(con, regcon);
+
+        return 0;
+}
+
+static int s5p6440_gpiolib_rbank_4bit2_output(struct gpio_chip *chip,
+                                              unsigned int offset, int value)
+{
+        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
+        void __iomem *base = ourchip->base;
+        void __iomem *regcon = base;
+        unsigned long con;
+        unsigned long dat;
+        unsigned con_offset  = offset;
+
+        switch (con_offset) {
+        case 6:
+                con_offset += 1;
+        case 0:
+        case 1:
+        case 2:
+        case 3:
+        case 4:
+        case 5:
+                regcon -= 4;
+                break;
+        default:
+                con_offset -= 7;
+                break;
+        }
+
+        con = __raw_readl(regcon);
+        con &= ~(0xf << con_4bit_shift(con_offset));
+        con |= 0x1 << con_4bit_shift(con_offset);
+
+        dat = __raw_readl(base + GPIODAT_OFF);
+        if (value)
+                dat |= 1 << offset;
+        else
+                dat &= ~(1 << offset);
+
+        __raw_writel(con, regcon);
+        __raw_writel(dat, base + GPIODAT_OFF);
+
+        return 0;
+}
+
+int s5p6440_gpio_setcfg_4bit_rbank(struct s3c_gpio_chip *chip,
+                                   unsigned int off, unsigned int cfg)
+{
+        void __iomem *reg = chip->base;
+        unsigned int shift;
+        u32 con;
+
+        switch (off) {
+        case 0:
+        case 1:
+        case 2:
+        case 3:
+        case 4:
+        case 5:
+                shift = (off & 7) * 4;
+                reg -= 4;
+                break;
+        case 6:
+                shift = ((off + 1) & 7) * 4;
+                reg -= 4;
+        default:
+                shift = ((off + 1) & 7) * 4;
+                break;
+        }
+
+        if (s3c_gpio_is_cfg_special(cfg)) {
+                cfg &= 0xf;
+                cfg <<= shift;
+        }
+
+        con = __raw_readl(reg);
+        con &= ~(0xf << shift);
+        con |= cfg;
+        __raw_writel(con, reg);
+
+        return 0;
+}
+
+static struct s3c_gpio_cfg s5p6440_gpio_cfgs[] = {
+        {
+                .cfg_eint       = 0,
+        }, {
+                .cfg_eint       = 7,
+        }, {
+                .cfg_eint       = 3,
+                .set_config     = s5p6440_gpio_setcfg_4bit_rbank,
+        }, {
+                .cfg_eint       = 0,
+                .set_config     = s3c_gpio_setcfg_s3c24xx,
+        }, {
+                .cfg_eint       = 2,
+                .set_config     = s3c_gpio_setcfg_s3c24xx,
+        }, {
+                .cfg_eint       = 3,
+                .set_config     = s3c_gpio_setcfg_s3c24xx,
+        },
+};
+
+static struct s3c_gpio_chip s5p6440_gpio_4bit[] = {
+        {
+                .base   = S5P6440_GPA_BASE,
+                .config = &s5p6440_gpio_cfgs[1],
+                .chip   = {
+                        .base   = S5P6440_GPA(0),
+                        .ngpio  = S5P6440_GPIO_A_NR,
+                        .label  = "GPA",
+                },
+        }, {
+                .base   = S5P6440_GPB_BASE,
+                .config = &s5p6440_gpio_cfgs[1],
+                .chip   = {
+                        .base   = S5P6440_GPB(0),
+                        .ngpio  = S5P6440_GPIO_B_NR,
+                        .label  = "GPB",
+                },
+        }, {
+                .base   = S5P6440_GPC_BASE,
+                .config = &s5p6440_gpio_cfgs[1],
+                .chip   = {
+                        .base   = S5P6440_GPC(0),
+                        .ngpio  = S5P6440_GPIO_C_NR,
+                        .label  = "GPC",
+                },
+        }, {
+                .base   = S5P6440_GPG_BASE,
+                .config = &s5p6440_gpio_cfgs[1],
+                .chip   = {
+                        .base   = S5P6440_GPG(0),
+                        .ngpio  = S5P6440_GPIO_G_NR,
+                        .label  = "GPG",
+                },
+        },
+};
+
+static struct s3c_gpio_chip s5p6440_gpio_4bit2[] = {
+        {
+                .base   = S5P6440_GPH_BASE + 0x4,
+                .config = &s5p6440_gpio_cfgs[1],
+                .chip   = {
+                        .base   = S5P6440_GPH(0),
+                        .ngpio  = S5P6440_GPIO_H_NR,
+                        .label  = "GPH",
+                },
+        },
+};
+
+static struct s3c_gpio_chip gpio_rbank_4bit2[] = {
+        {
+                .base   = S5P6440_GPR_BASE + 0x4,
+                .config = &s5p6440_gpio_cfgs[2],
+                .chip   = {
+                        .base   = S5P6440_GPR(0),
+                        .ngpio  = S5P6440_GPIO_R_NR,
+                        .label  = "GPR",
+                },
+        },
+};
+
+static struct s3c_gpio_chip s5p6440_gpio_2bit[] = {
+        {
+                .base   = S5P6440_GPF_BASE,
+                .config = &s5p6440_gpio_cfgs[5],
+                .chip   = {
+                        .base   = S5P6440_GPF(0),
+                        .ngpio  = S5P6440_GPIO_F_NR,
+                        .label  = "GPF",
+                },
+        }, {
+                .base   = S5P6440_GPI_BASE,
+                .config = &s5p6440_gpio_cfgs[3],
+                .chip   = {
+                        .base   = S5P6440_GPI(0),
+                        .ngpio  = S5P6440_GPIO_I_NR,
+                        .label  = "GPI",
+                },
+        }, {
+                .base   = S5P6440_GPJ_BASE,
+                .config = &s5p6440_gpio_cfgs[3],
+                .chip   = {
+                        .base   = S5P6440_GPJ(0),
+                        .ngpio  = S5P6440_GPIO_J_NR,
+                        .label  = "GPJ",
+                },
+        }, {
+                .base   = S5P6440_GPN_BASE,
+                .config = &s5p6440_gpio_cfgs[4],
+                .chip   = {
+                        .base   = S5P6440_GPN(0),
+                        .ngpio  = S5P6440_GPIO_N_NR,
+                        .label  = "GPN",
+                },
+        }, {
+                .base   = S5P6440_GPP_BASE,
+                .config = &s5p6440_gpio_cfgs[5],
+                .chip   = {
+                        .base   = S5P6440_GPP(0),
+                        .ngpio  = S5P6440_GPIO_P_NR,
+                        .label  = "GPP",
+                },
+        },
+};
+
+void __init s5p6440_gpiolib_set_cfg(struct s3c_gpio_cfg *chipcfg, int nr_chips)
+{
+        for (; nr_chips > 0; nr_chips--, chipcfg++) {
+                if (!chipcfg->set_config)
+                        chipcfg->set_config     = s3c_gpio_setcfg_s3c64xx_4bit;
+                if (!chipcfg->set_pull)
+                        chipcfg->set_pull       = s3c_gpio_setpull_updown;
+                if (!chipcfg->get_pull)
+                        chipcfg->get_pull       = s3c_gpio_getpull_updown;
+        }
+}
+
+static void __init s5p6440_gpio_add_rbank_4bit2(struct s3c_gpio_chip *chip,
+                                                int nr_chips)
+{
+        for (; nr_chips > 0; nr_chips--, chip++) {
+                chip->chip.direction_input = s5p6440_gpiolib_rbank_4bit2_input;
+                chip->chip.direction_output =
+                                        s5p6440_gpiolib_rbank_4bit2_output;
+                s3c_gpiolib_add(chip);
+        }
+}
+
+static int __init s5p6440_gpiolib_init(void)
+{
+        struct s3c_gpio_chip *chips = s5p6440_gpio_2bit;
+        int nr_chips = ARRAY_SIZE(s5p6440_gpio_2bit);
+
+        s5p6440_gpiolib_set_cfg(s5p6440_gpio_cfgs,
+                                ARRAY_SIZE(s5p6440_gpio_cfgs));
+
+        for (; nr_chips > 0; nr_chips--, chips++)
+                s3c_gpiolib_add(chips);
+
+        samsung_gpiolib_add_4bit_chips(s5p6440_gpio_4bit,
+                                ARRAY_SIZE(s5p6440_gpio_4bit));
+
+        samsung_gpiolib_add_4bit2_chips(s5p6440_gpio_4bit2,
+                                ARRAY_SIZE(s5p6440_gpio_4bit2));
+
+        s5p6440_gpio_add_rbank_4bit2(gpio_rbank_4bit2,
+                                ARRAY_SIZE(gpio_rbank_4bit2));
+
+        return 0;
+}
+arch_initcall(s5p6440_gpiolib_init);
diff --git a/arch/arm/mach-s5p6440/include/mach/debug-macro.S b/arch/arm/mach-s5p6440/include/mach/debug-macro.S
new file mode 100644
index 00000000000..1347d7f9907
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/debug-macro.S
@@ -0,0 +1,37 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/debug-macro.S
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* pull in the relevant register and map files. */
+
+#include <mach/map.h>
+#include <plat/regs-serial.h>
+
+        /* note, for the boot process to work we have to keep the UART
+         * virtual address aligned to an 1MiB boundary for the L1
+         * mapping the head code makes. We keep the UART virtual address
+         * aligned and add in the offset when we load the value here.
+         */
+
+        .macro addruart, rx, rtmp
+                mrc     p15, 0, \rx, c1, c0
+                tst     \rx, #1
+                ldreq   \rx, = S3C_PA_UART
+                ldrne   \rx, = S3C_VA_UART
+#if CONFIG_DEBUG_S3C_UART != 0
+                add     \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
+#endif
+        .endm
+
+/* include the reset of the code which will do the work, we're only
+ * compiling for a single cpu processor type so the default of s3c2440
+ * will be fine with us.
+ */
+
+#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s5p6440/include/mach/entry-macro.S b/arch/arm/mach-s5p6440/include/mach/entry-macro.S
new file mode 100644
index 00000000000..e65f1b96726
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/entry-macro.S
@@ -0,0 +1,16 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/entry-macro.S
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Low-level IRQ helper macros for the Samsung S5P6440
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <mach/map.h>
+#include <plat/irqs.h>
+
+#include <asm/entry-macro-vic2.S>
diff --git a/arch/arm/mach-s5p6440/include/mach/gpio.h b/arch/arm/mach-s5p6440/include/mach/gpio.h
new file mode 100644
index 00000000000..21783834f2a
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/gpio.h
@@ -0,0 +1,80 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/gpio.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - GPIO lib support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_GPIO_H
+#define __ASM_ARCH_GPIO_H __FILE__
+
+#define gpio_get_value  __gpio_get_value
+#define gpio_set_value  __gpio_set_value
+#define gpio_cansleep   __gpio_cansleep
+#define gpio_to_irq     __gpio_to_irq
+
+/* GPIO bank sizes */
+#define S5P6440_GPIO_A_NR       (6)
+#define S5P6440_GPIO_B_NR       (7)
+#define S5P6440_GPIO_C_NR       (8)
+#define S5P6440_GPIO_F_NR       (2)
+#define S5P6440_GPIO_G_NR       (7)
+#define S5P6440_GPIO_H_NR       (10)
+#define S5P6440_GPIO_I_NR       (16)
+#define S5P6440_GPIO_J_NR       (12)
+#define S5P6440_GPIO_N_NR       (16)
+#define S5P6440_GPIO_P_NR       (8)
+#define S5P6440_GPIO_R_NR       (15)
+
+/* GPIO bank numbers */
+
+/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
+ * space for debugging purposes so that any accidental
+ * change from one gpio bank to another can be caught.
+*/
+#define S5P6440_GPIO_NEXT(__gpio) \
+        ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
+
+enum s5p_gpio_number {
+        S5P6440_GPIO_A_START = 0,
+        S5P6440_GPIO_B_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_A),
+        S5P6440_GPIO_C_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_B),
+        S5P6440_GPIO_F_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_C),
+        S5P6440_GPIO_G_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_F),
+        S5P6440_GPIO_H_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_G),
+        S5P6440_GPIO_I_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_H),
+        S5P6440_GPIO_J_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_I),
+        S5P6440_GPIO_N_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_J),
+        S5P6440_GPIO_P_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_N),
+        S5P6440_GPIO_R_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_P),
+};
+
+/* S5P6440 GPIO number definitions. */
+#define S5P6440_GPA(_nr)        (S5P6440_GPIO_A_START + (_nr))
+#define S5P6440_GPB(_nr)        (S5P6440_GPIO_B_START + (_nr))
+#define S5P6440_GPC(_nr)        (S5P6440_GPIO_C_START + (_nr))
+#define S5P6440_GPF(_nr)        (S5P6440_GPIO_F_START + (_nr))
+#define S5P6440_GPG(_nr)        (S5P6440_GPIO_G_START + (_nr))
+#define S5P6440_GPH(_nr)        (S5P6440_GPIO_H_START + (_nr))
+#define S5P6440_GPI(_nr)        (S5P6440_GPIO_I_START + (_nr))
+#define S5P6440_GPJ(_nr)        (S5P6440_GPIO_J_START + (_nr))
+#define S5P6440_GPN(_nr)        (S5P6440_GPIO_N_START + (_nr))
+#define S5P6440_GPP(_nr)        (S5P6440_GPIO_P_START + (_nr))
+#define S5P6440_GPR(_nr)        (S5P6440_GPIO_R_START + (_nr))
+
+/* the end of the S5P6440 specific gpios */
+#define S5P6440_GPIO_END        (S5P6440_GPR(S5P6440_GPIO_R_NR) + 1)
+#define S3C_GPIO_END            S5P6440_GPIO_END
+
+/* define the number of gpios we need to the one after the GPR() range */
+#define ARCH_NR_GPIOS           (S5P6440_GPR(S5P6440_GPIO_R_NR) +       \
+                                 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
+
+#include <asm-generic/gpio.h>
+
+#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/hardware.h b/arch/arm/mach-s5p6440/include/mach/hardware.h
new file mode 100644
index 00000000000..be8b26e875d
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/hardware.h
@@ -0,0 +1,18 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/hardware.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - Hardware support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H __FILE__
+
+/* currently nothing here, placeholder */
+
+#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/io.h b/arch/arm/mach-s5p6440/include/mach/io.h
new file mode 100644
index 00000000000..fa2d69cb1ad
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/io.h
@@ -0,0 +1,18 @@
+/* arch/arm/mach-s5p6440/include/mach/io.h
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben-linux@fluff.org>
+ *
+ * Default IO routines for S3C64XX based
+ */
+
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+/* No current ISA/PCI bus support. */
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
+
+#define IO_SPACE_LIMIT (0xFFFFFFFF)
+
+#endif
diff --git a/arch/arm/mach-s5p6440/include/mach/irqs.h b/arch/arm/mach-s5p6440/include/mach/irqs.h
new file mode 100644
index 00000000000..a4b9b40d18f
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/irqs.h
@@ -0,0 +1,111 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/irqs.h
+ *
+ * Copyright 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - IRQ definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_S5P_IRQS_H
+#define __ASM_ARCH_S5P_IRQS_H __FILE__
+
+#include <plat/irqs.h>
+
+/* VIC0 */
+
+#define IRQ_EINT0_3             S5P_IRQ_VIC0(0)
+#define IRQ_EINT4_11            S5P_IRQ_VIC0(1)
+#define IRQ_RTC_TIC             S5P_IRQ_VIC0(2)
+#define IRQ_IIC1                S5P_IRQ_VIC0(5)
+#define IRQ_I2SV40              S5P_IRQ_VIC0(6)
+#define IRQ_GPS                 S5P_IRQ_VIC0(7)
+#define IRQ_POST0               S5P_IRQ_VIC0(9)
+#define IRQ_2D                  S5P_IRQ_VIC0(11)
+#define IRQ_TIMER0_VIC          S5P_IRQ_VIC0(23)
+#define IRQ_TIMER1_VIC          S5P_IRQ_VIC0(24)
+#define IRQ_TIMER2_VIC          S5P_IRQ_VIC0(25)
+#define IRQ_WDT                 S5P_IRQ_VIC0(26)
+#define IRQ_TIMER3_VIC          S5P_IRQ_VIC0(27)
+#define IRQ_TIMER4_VIC          S5P_IRQ_VIC0(28)
+#define IRQ_DISPCON0            S5P_IRQ_VIC0(29)
+#define IRQ_DISPCON1            S5P_IRQ_VIC0(30)
+#define IRQ_DISPCON2            S5P_IRQ_VIC0(31)
+
+/* VIC1 */
+
+#define IRQ_EINT12_15           S5P_IRQ_VIC1(0)
+#define IRQ_PCM0                S5P_IRQ_VIC1(2)
+#define IRQ_UART0               S5P_IRQ_VIC1(5)
+#define IRQ_UART1               S5P_IRQ_VIC1(6)
+#define IRQ_UART2               S5P_IRQ_VIC1(7)
+#define IRQ_UART3               S5P_IRQ_VIC1(8)
+#define IRQ_DMA0                S5P_IRQ_VIC1(9)
+#define IRQ_NFC                 S5P_IRQ_VIC1(13)
+#define IRQ_SPI0                S5P_IRQ_VIC1(16)
+#define IRQ_SPI1                S5P_IRQ_VIC1(17)
+#define IRQ_IIC                 S5P_IRQ_VIC1(18)
+#define IRQ_DISPCON3            S5P_IRQ_VIC1(19)
+#define IRQ_FIMGVG              S5P_IRQ_VIC1(20)
+#define IRQ_EINT_GROUPS         S5P_IRQ_VIC1(21)
+#define IRQ_PMUIRQ              S5P_IRQ_VIC1(23)
+#define IRQ_HSMMC0              S5P_IRQ_VIC1(24)
+#define IRQ_HSMMC1              S5P_IRQ_VIC1(25)
+#define IRQ_HSMMC2              IRQ_SPI1        /* shared with SPI1 */
+#define IRQ_OTG                 S5P_IRQ_VIC1(26)
+#define IRQ_DSI                 S5P_IRQ_VIC1(27)
+#define IRQ_RTC_ALARM           S5P_IRQ_VIC1(28)
+#define IRQ_TSI                 S5P_IRQ_VIC1(29)
+#define IRQ_PENDN               S5P_IRQ_VIC1(30)
+#define IRQ_TC                  IRQ_PENDN
+#define IRQ_ADC                 S5P_IRQ_VIC1(31)
+
+/*
+ * Since the IRQ_EINT(x) are a linear mapping on s5p6440 we just defined
+ * them as an IRQ_EINT(x) macro from S5P_IRQ_EINT_BASE which we place
+ * after the pair of VICs.
+ */
+
+#define S5P_IRQ_EINT_BASE       (S5P_IRQ_VIC1(31) + 6)
+
+#define S5P_EINT(x)             ((x) + S5P_IRQ_EINT_BASE)
+#define IRQ_EINT(x)             S5P_EINT(x)
+
+/*
+ * Next the external interrupt groups. These are similar to the IRQ_EINT(x)
+ * that they are sourced from the GPIO pins but with a different scheme for
+ * priority and source indication.
+ *
+ * The IRQ_EINT(x) can be thought of as 'group 0' of the available GPIO
+ * interrupts, but for historical reasons they are kept apart from these
+ * next interrupts.
+ *
+ * Use IRQ_EINT_GROUP(group, offset) to get the number for use in the
+ * machine specific support files.
+ */
+
+/* Actually, #6 and #7 are missing in the EINT_GROUP1 */
+#define IRQ_EINT_GROUP1_NR      (15)
+#define IRQ_EINT_GROUP2_NR      (8)
+#define IRQ_EINT_GROUP5_NR      (7)
+#define IRQ_EINT_GROUP6_NR      (10)
+/* Actually, #0, #1 and #2 are missing in the EINT_GROUP8 */
+#define IRQ_EINT_GROUP8_NR      (11)
+
+#define IRQ_EINT_GROUP_BASE     S5P_EINT(16)
+#define IRQ_EINT_GROUP1_BASE    (IRQ_EINT_GROUP_BASE + 0)
+#define IRQ_EINT_GROUP2_BASE    (IRQ_EINT_GROUP1_BASE + IRQ_EINT_GROUP1_NR)
+#define IRQ_EINT_GROUP5_BASE    (IRQ_EINT_GROUP2_BASE + IRQ_EINT_GROUP2_NR)
+#define IRQ_EINT_GROUP6_BASE    (IRQ_EINT_GROUP5_BASE + IRQ_EINT_GROUP5_NR)
+#define IRQ_EINT_GROUP8_BASE    (IRQ_EINT_GROUP6_BASE + IRQ_EINT_GROUP6_NR)
+
+#define IRQ_EINT_GROUP(grp, x)  (IRQ_EINT_GROUP##grp##_BASE + (x))
+
+/* Set the default NR_IRQS */
+
+#define NR_IRQS                 (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
+
+#endif /* __ASM_ARCH_S5P_IRQS_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/map.h b/arch/arm/mach-s5p6440/include/mach/map.h
new file mode 100644
index 00000000000..8924e5a4d6a
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/map.h
@@ -0,0 +1,68 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/map.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - Memory map definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_MAP_H
+#define __ASM_ARCH_MAP_H __FILE__
+
+#include <plat/map-base.h>
+#include <plat/map-s5p.h>
+
+#define S5P6440_PA_CHIPID       (0xE0000000)
+#define S5P_PA_CHIPID           S5P6440_PA_CHIPID
+
+#define S5P6440_PA_SYSCON       (0xE0100000)
+#define S5P6440_PA_CLK          (S5P6440_PA_SYSCON + 0x0)
+#define S5P_PA_SYSCON           S5P6440_PA_SYSCON
+
+#define S5P6440_PA_GPIO         (0xE0308000)
+#define S5P_PA_GPIO             S5P6440_PA_GPIO
+
+#define S5P6440_PA_VIC0         (0xE4000000)
+#define S5P_PA_VIC0             S5P6440_PA_VIC0
+
+#define S5P6440_PA_VIC1         (0xE4100000)
+#define S5P_PA_VIC1             S5P6440_PA_VIC1
+
+#define S5P6440_PA_TIMER        (0xEA000000)
+#define S5P_PA_TIMER            S5P6440_PA_TIMER
+
+#define S5P6440_PA_RTC          (0xEA100000)
+#define S5P_PA_RTC              S5P6440_PA_RTC
+
+#define S5P6440_PA_WDT          (0xEA200000)
+#define S5P_PA_WDT              S5P6440_PA_WDT
+
+#define S5P6440_PA_UART         (0xEC000000)
+
+#define S5P_PA_UART0            (S5P6440_PA_UART + 0x0)
+#define S5P_PA_UART1            (S5P6440_PA_UART + 0x400)
+#define S5P_PA_UART2            (S5P6440_PA_UART + 0x800)
+#define S5P_PA_UART3            (S5P6440_PA_UART + 0xC00)
+
+#define S5P_SZ_UART             SZ_256
+
+#define S5P6440_PA_IIC0         (0xEC104000)
+
+#define S5P6440_PA_HSOTG        (0xED100000)
+
+#define S5P6440_PA_HSMMC0       (0xED800000)
+#define S5P6440_PA_HSMMC1       (0xED900000)
+#define S5P6440_PA_HSMMC2       (0xEDA00000)
+
+#define S5P6440_PA_SDRAM        (0x20000000)
+#define S5P_PA_SDRAM            S5P6440_PA_SDRAM
+
+/* compatibiltiy defines. */
+#define S3C_PA_UART             S5P6440_PA_UART
+#define S3C_PA_IIC              S5P6440_PA_IIC0
+
+#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/memory.h b/arch/arm/mach-s5p6440/include/mach/memory.h
new file mode 100644
index 00000000000..d62910c71b5
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/memory.h
@@ -0,0 +1,19 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/memory.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - Memory definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+#define PHYS_OFFSET             UL(0x20000000)
+#define CONSISTENT_DMA_SIZE     SZ_8M
+
+#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/pwm-clock.h b/arch/arm/mach-s5p6440/include/mach/pwm-clock.h
new file mode 100644
index 00000000000..c4bb7c55547
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/pwm-clock.h
@@ -0,0 +1,62 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/pwm-clock.h
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * Copyright 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - pwm clock and timer support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/**
+ * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
+ * @cfg: The timer TCFG1 register bits shifted down to 0.
+ *
+ * Return true if the given configuration from TCFG1 is a TCLK instead
+ * any of the TDIV clocks.
+ */
+static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
+{
+        return tcfg == S3C2410_TCFG1_MUX_TCLK;
+}
+
+/**
+ * tcfg_to_divisor() - convert tcfg1 setting to a divisor
+ * @tcfg1: The tcfg1 setting, shifted down.
+ *
+ * Get the divisor value for the given tcfg1 setting. We assume the
+ * caller has already checked to see if this is not a TCLK source.
+ */
+static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
+{
+        return 1 << (1 + tcfg1);
+}
+
+/**
+ * pwm_tdiv_has_div1() - does the tdiv setting have a /1
+ *
+ * Return true if we have a /1 in the tdiv setting.
+ */
+static inline unsigned int pwm_tdiv_has_div1(void)
+{
+        return 0;
+}
+
+/**
+ * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
+ * @div: The divisor to calculate the bit information for.
+ *
+ * Turn a divisor into the necessary bit field for TCFG1.
+ */
+static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
+{
+        return ilog2(div) - 1;
+}
+
+#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK
diff --git a/arch/arm/mach-s5p6440/include/mach/regs-clock.h b/arch/arm/mach-s5p6440/include/mach/regs-clock.h
new file mode 100644
index 00000000000..c783ecc9f19
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/regs-clock.h
@@ -0,0 +1,130 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/regs-clock.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - Clock register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_CLOCK_H
+#define __ASM_ARCH_REGS_CLOCK_H __FILE__
+
+#include <mach/map.h>
+
+#define S5P_CLKREG(x)           (S3C_VA_SYS + (x))
+
+#define S5P_APLL_LOCK           S5P_CLKREG(0x00)
+#define S5P_MPLL_LOCK           S5P_CLKREG(0x04)
+#define S5P_EPLL_LOCK           S5P_CLKREG(0x08)
+#define S5P_APLL_CON            S5P_CLKREG(0x0C)
+#define S5P_MPLL_CON            S5P_CLKREG(0x10)
+#define S5P_EPLL_CON            S5P_CLKREG(0x14)
+#define S5P_EPLL_CON_K          S5P_CLKREG(0x18)
+#define S5P_CLK_SRC0            S5P_CLKREG(0x1C)
+#define S5P_CLK_DIV0            S5P_CLKREG(0x20)
+#define S5P_CLK_DIV1            S5P_CLKREG(0x24)
+#define S5P_CLK_DIV2            S5P_CLKREG(0x28)
+#define S5P_CLK_OUT             S5P_CLKREG(0x2C)
+#define S5P_CLK_GATE_HCLK0      S5P_CLKREG(0x30)
+#define S5P_CLK_GATE_PCLK       S5P_CLKREG(0x34)
+#define S5P_CLK_GATE_SCLK0      S5P_CLKREG(0x38)
+#define S5P_CLK_GATE_MEM0       S5P_CLKREG(0x3C)
+#define S5P_CLK_DIV3            S5P_CLKREG(0x40)
+#define S5P_CLK_GATE_HCLK1      S5P_CLKREG(0x44)
+#define S5P_CLK_GATE_SCLK1      S5P_CLKREG(0x48)
+#define S5P_AHB_CON0            S5P_CLKREG(0x100)
+#define S5P_CLK_SRC1            S5P_CLKREG(0x10C)
+#define S5P_SWRESET             S5P_CLKREG(0x114)
+#define S5P_SYS_ID              S5P_CLKREG(0x118)
+#define S5P_SYS_OTHERS          S5P_CLKREG(0x11C)
+#define S5P_MEM_CFG_STAT        S5P_CLKREG(0x12C)
+#define S5P_PWR_CFG             S5P_CLKREG(0x804)
+#define S5P_EINT_WAKEUP_MASK    S5P_CLKREG(0x808)
+#define S5P_NORMAL_CFG          S5P_CLKREG(0x810)
+#define S5P_STOP_CFG            S5P_CLKREG(0x814)
+#define S5P_SLEEP_CFG           S5P_CLKREG(0x818)
+#define S5P_OSC_FREQ            S5P_CLKREG(0x820)
+#define S5P_OSC_STABLE          S5P_CLKREG(0x824)
+#define S5P_PWR_STABLE          S5P_CLKREG(0x828)
+#define S5P_MTC_STABLE          S5P_CLKREG(0x830)
+#define S5P_OTHERS              S5P_CLKREG(0x900)
+#define S5P_RST_STAT            S5P_CLKREG(0x904)
+#define S5P_WAKEUP_STAT         S5P_CLKREG(0x908)
+#define S5P_SLPEN               S5P_CLKREG(0x930)
+#define S5P_INFORM0             S5P_CLKREG(0xA00)
+#define S5P_INFORM1             S5P_CLKREG(0xA04)
+#define S5P_INFORM2             S5P_CLKREG(0xA08)
+#define S5P_INFORM3             S5P_CLKREG(0xA0C)
+
+/* CLKDIV0 */
+#define S5P_CLKDIV0_PCLK_MASK           (0xf << 12)
+#define S5P_CLKDIV0_PCLK_SHIFT          (12)
+#define S5P_CLKDIV0_HCLK_MASK           (0xf << 8)
+#define S5P_CLKDIV0_HCLK_SHIFT          (8)
+#define S5P_CLKDIV0_MPLL_MASK           (0x1 << 4)
+#define S5P_CLKDIV0_ARM_MASK            (0xf << 0)
+#define S5P_CLKDIV0_ARM_SHIFT           (0)
+
+/* CLKDIV3 */
+#define S5P_CLKDIV3_PCLK_LOW_MASK       (0xf << 12)
+#define S5P_CLKDIV3_PCLK_LOW_SHIFT      (12)
+#define S5P_CLKDIV3_HCLK_LOW_MASK       (0xf << 8)
+#define S5P_CLKDIV3_HCLK_LOW_SHIFT      (8)
+
+/* HCLK0 GATE Registers */
+#define S5P_CLKCON_HCLK0_USB            (1<<20)
+#define S5P_CLKCON_HCLK0_HSMMC2         (1<<19)
+#define S5P_CLKCON_HCLK0_HSMMC1         (1<<18)
+#define S5P_CLKCON_HCLK0_HSMMC0         (1<<17)
+#define S5P_CLKCON_HCLK0_POST0          (1<<5)
+
+/* HCLK1 GATE Registers */
+#define S5P_CLKCON_HCLK1_DISPCON        (1<<1)
+
+/* PCLK GATE Registers */
+#define S5P_CLKCON_PCLK_IIS2            (1<<26)
+#define S5P_CLKCON_PCLK_SPI1            (1<<22)
+#define S5P_CLKCON_PCLK_SPI0            (1<<21)
+#define S5P_CLKCON_PCLK_GPIO            (1<<18)
+#define S5P_CLKCON_PCLK_IIC0            (1<<17)
+#define S5P_CLKCON_PCLK_TSADC           (1<<12)
+#define S5P_CLKCON_PCLK_PWM             (1<<7)
+#define S5P_CLKCON_PCLK_RTC             (1<<6)
+#define S5P_CLKCON_PCLK_WDT             (1<<5)
+#define S5P_CLKCON_PCLK_UART3           (1<<4)
+#define S5P_CLKCON_PCLK_UART2           (1<<3)
+#define S5P_CLKCON_PCLK_UART1           (1<<2)
+#define S5P_CLKCON_PCLK_UART0           (1<<1)
+
+/* SCLK0 GATE Registers */
+#define S5P_CLKCON_SCLK0_MMC2_48        (1<<29)
+#define S5P_CLKCON_SCLK0_MMC1_48        (1<<28)
+#define S5P_CLKCON_SCLK0_MMC0_48        (1<<27)
+#define S5P_CLKCON_SCLK0_MMC2           (1<<26)
+#define S5P_CLKCON_SCLK0_MMC1           (1<<25)
+#define S5P_CLKCON_SCLK0_MMC0           (1<<24)
+#define S5P_CLKCON_SCLK0_SPI1_48        (1<<23)
+#define S5P_CLKCON_SCLK0_SPI0_48        (1<<22)
+#define S5P_CLKCON_SCLK0_SPI1           (1<<21)
+#define S5P_CLKCON_SCLK0_SPI0           (1<<20)
+#define S5P_CLKCON_SCLK0_UART           (1<<5)
+
+/* SCLK1 GATE Registers */
+
+/* MEM0 GATE Registers */
+#define S5P_CLKCON_MEM0_HCLK_NFCON      (1<<2)
+
+/*OTHERS Resgister */
+#define S5P_OTHERS_USB_SIG_MASK         (1<<16)
+#define S5P_OTHERS_HCLK_LOW_SEL_MPLL    (1<<6)
+
+/* Compatibility defines */
+#define ARM_CLK_DIV                     S5P_CLK_DIV0
+#define ARM_DIV_RATIO_SHIFT             0
+#define ARM_DIV_MASK                    (0xf << ARM_DIV_RATIO_SHIFT)
+
+#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/regs-gpio.h b/arch/arm/mach-s5p6440/include/mach/regs-gpio.h
new file mode 100644
index 00000000000..82ff753913d
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/regs-gpio.h
@@ -0,0 +1,54 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/regs-gpio.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - GPIO register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_REGS_GPIO_H
+#define __ASM_ARCH_REGS_GPIO_H __FILE__
+
+#include <mach/map.h>
+
+/* Base addresses for each of the banks */
+#define S5P6440_GPA_BASE                (S5P_VA_GPIO + 0x0000)
+#define S5P6440_GPB_BASE                (S5P_VA_GPIO + 0x0020)
+#define S5P6440_GPC_BASE                (S5P_VA_GPIO + 0x0040)
+#define S5P6440_GPF_BASE                (S5P_VA_GPIO + 0x00A0)
+#define S5P6440_GPG_BASE                (S5P_VA_GPIO + 0x00C0)
+#define S5P6440_GPH_BASE                (S5P_VA_GPIO + 0x00E0)
+#define S5P6440_GPI_BASE                (S5P_VA_GPIO + 0x0100)
+#define S5P6440_GPJ_BASE                (S5P_VA_GPIO + 0x0120)
+#define S5P6440_GPN_BASE                (S5P_VA_GPIO + 0x0830)
+#define S5P6440_GPP_BASE                (S5P_VA_GPIO + 0x0160)
+#define S5P6440_GPR_BASE                (S5P_VA_GPIO + 0x0290)
+#define S5P6440_EINT0CON0               (S5P_VA_GPIO + 0x900)
+#define S5P6440_EINT0FLTCON0            (S5P_VA_GPIO + 0x910)
+#define S5P6440_EINT0FLTCON1            (S5P_VA_GPIO + 0x914)
+#define S5P6440_EINT0MASK               (S5P_VA_GPIO + 0x920)
+#define S5P6440_EINT0PEND               (S5P_VA_GPIO + 0x924)
+
+/* for LCD */
+#define S5P6440_SPCON_LCD_SEL_RGB       (1 << 0)
+#define S5P6440_SPCON_LCD_SEL_MASK      (3 << 0)
+
+/* These set of macros are not really useful for the
+ * GPF/GPI/GPJ/GPN/GPP,
+ * useful for others set of GPIO's (4 bit)
+ */
+#define S5P6440_GPIO_CONMASK(__gpio)    (0xf << ((__gpio) * 4))
+#define S5P6440_GPIO_INPUT(__gpio)      (0x0 << ((__gpio) * 4))
+#define S5P6440_GPIO_OUTPUT(__gpio)     (0x1 << ((__gpio) * 4))
+
+/* Use these macros for GPF/GPI/GPJ/GPN/GPP set of GPIO (2 bit)
+ * */
+#define S5P6440_GPIO2_CONMASK(__gpio)   (0x3 << ((__gpio) * 2))
+#define S5P6440_GPIO2_INPUT(__gpio)     (0x0 << ((__gpio) * 2))
+#define S5P6440_GPIO2_OUTPUT(__gpio)    (0x1 << ((__gpio) * 2))
+
+#endif /* __ASM_ARCH_REGS_GPIO_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/regs-irq.h b/arch/arm/mach-s5p6440/include/mach/regs-irq.h
new file mode 100644
index 00000000000..a961f4beeb0
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/regs-irq.h
@@ -0,0 +1,19 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/regs-irq.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - IRQ register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_IRQ_H
+#define __ASM_ARCH_REGS_IRQ_H __FILE__
+
+#include <asm/hardware/vic.h>
+#include <mach/map.h>
+
+#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/system.h b/arch/arm/mach-s5p6440/include/mach/system.h
new file mode 100644
index 00000000000..d2dd817da66
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/system.h
@@ -0,0 +1,26 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/system.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - system support header
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_SYSTEM_H
+#define __ASM_ARCH_SYSTEM_H __FILE__
+
+static void arch_idle(void)
+{
+        /* nothing here yet */
+}
+
+static void arch_reset(char mode, const char *cmd)
+{
+        /* nothing here yet */
+}
+
+#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/tick.h b/arch/arm/mach-s5p6440/include/mach/tick.h
new file mode 100644
index 00000000000..2f25c7f0797
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/tick.h
@@ -0,0 +1,24 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/tick.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - Timer tick support definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_TICK_H
+#define __ASM_ARCH_TICK_H __FILE__
+
+static inline u32 s3c24xx_ostimer_pending(void)
+{
+        u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
+        return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
+}
+
+#define TICK_MAX        (0xffffffff)
+
+#endif /* __ASM_ARCH_TICK_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/timex.h b/arch/arm/mach-s5p6440/include/mach/timex.h
new file mode 100644
index 00000000000..fb2e8cd4082
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/timex.h
@@ -0,0 +1,24 @@
+/* arch/arm/mach-s3c64xx/include/mach/timex.h
+ *
+ * Copyright (c) 2003-2005 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C6400 - time parameters
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H
+
+/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
+ * a variable is useless. It seems as long as we make our timers an
+ * exact multiple of HZ, any value that makes a 1->1 correspondence
+ * for the time conversion functions to/from jiffies is acceptable.
+*/
+
+#define CLOCK_TICK_RATE 12000000
+
+#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/uncompress.h b/arch/arm/mach-s5p6440/include/mach/uncompress.h
new file mode 100644
index 00000000000..7c1f600d65c
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/uncompress.h
@@ -0,0 +1,24 @@
+/* linux/arch/arm/mach-s5p6440/include/mach/uncompress.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - uncompress code
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_UNCOMPRESS_H
+#define __ASM_ARCH_UNCOMPRESS_H
+
+#include <mach/map.h>
+#include <plat/uncompress.h>
+
+static void arch_detect_cpu(void)
+{
+        /* we do not need to do any cpu detection here at the moment. */
+}
+
+#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/vmalloc.h b/arch/arm/mach-s5p6440/include/mach/vmalloc.h
new file mode 100644
index 00000000000..16df257b1dc
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/vmalloc.h
@@ -0,0 +1,17 @@
+/* arch/arm/mach-s5p6440/include/mach/vmalloc.h
+ *
+ * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C6400 vmalloc definition
+*/
+
+#ifndef __ASM_ARCH_VMALLOC_H
+#define __ASM_ARCH_VMALLOC_H
+
+#define VMALLOC_END       (0xE0000000)
+
+#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5p6440/init.c b/arch/arm/mach-s5p6440/init.c
new file mode 100644
index 00000000000..a1f3727e402
--- /dev/null
+++ b/arch/arm/mach-s5p6440/init.c
@@ -0,0 +1,52 @@
+/* linux/arch/arm/mach-s5p6440/init.c
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6440 - Init support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/serial_core.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/s5p6440.h>
+#include <plat/regs-serial.h>
+
+static struct s3c24xx_uart_clksrc s5p6440_serial_clocks[] = {
+        [0] = {
+                .name           = "pclk_low",
+                .divisor        = 1,
+                .min_baud       = 0,
+                .max_baud       = 0,
+        },
+        [1] = {
+                .name           = "uclk1",
+                .divisor        = 1,
+                .min_baud       = 0,
+                .max_baud       = 0,
+        },
+};
+
+/* uart registration process */
+void __init s5p6440_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        struct s3c2410_uartcfg *tcfg = cfg;
+        u32 ucnt;
+
+        for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
+                if (!tcfg->clocks) {
+                        tcfg->clocks = s5p6440_serial_clocks;
+                        tcfg->clocks_size = ARRAY_SIZE(s5p6440_serial_clocks);
+                }
+        }
+
+        s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
+}
diff --git a/arch/arm/mach-s5p6440/mach-smdk6440.c b/arch/arm/mach-s5p6440/mach-smdk6440.c
new file mode 100644
index 00000000000..3ae88f2c7c7
--- /dev/null
+++ b/arch/arm/mach-s5p6440/mach-smdk6440.c
@@ -0,0 +1,111 @@
+/* linux/arch/arm/mach-s5p6440/mach-smdk6440.c
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/serial_core.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/clk.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <mach/hardware.h>
+#include <mach/map.h>
+
+#include <asm/irq.h>
+#include <asm/mach-types.h>
+
+#include <plat/regs-serial.h>
+
+#include <plat/s5p6440.h>
+#include <plat/clock.h>
+#include <mach/regs-clock.h>
+#include <plat/devs.h>
+#include <plat/cpu.h>
+#include <plat/pll.h>
+
+#define S5P6440_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |        \
+                                S3C2410_UCON_RXILEVEL |         \
+                                S3C2410_UCON_TXIRQMODE |        \
+                                S3C2410_UCON_RXIRQMODE |        \
+                                S3C2410_UCON_RXFIFO_TOI |       \
+                                S3C2443_UCON_RXERR_IRQEN)
+
+#define S5P6440_ULCON_DEFAULT   S3C2410_LCON_CS8
+
+#define S5P6440_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |       \
+                                S3C2440_UFCON_TXTRIG16 |        \
+                                S3C2410_UFCON_RXTRIG8)
+
+static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = {
+        [0] = {
+                .hwport      = 0,
+                .flags       = 0,
+                .ucon        = S5P6440_UCON_DEFAULT,
+                .ulcon       = S5P6440_ULCON_DEFAULT,
+                .ufcon       = S5P6440_UFCON_DEFAULT,
+        },
+        [1] = {
+                .hwport      = 1,
+                .flags       = 0,
+                .ucon        = S5P6440_UCON_DEFAULT,
+                .ulcon       = S5P6440_ULCON_DEFAULT,
+                .ufcon       = S5P6440_UFCON_DEFAULT,
+        },
+        [2] = {
+                .hwport      = 2,
+                .flags       = 0,
+                .ucon        = S5P6440_UCON_DEFAULT,
+                .ulcon       = S5P6440_ULCON_DEFAULT,
+                .ufcon       = S5P6440_UFCON_DEFAULT,
+        },
+        [3] = {
+                .hwport      = 3,
+                .flags       = 0,
+                .ucon        = S5P6440_UCON_DEFAULT,
+                .ulcon       = S5P6440_ULCON_DEFAULT,
+                .ufcon       = S5P6440_UFCON_DEFAULT,
+        },
+};
+
+static struct platform_device *smdk6440_devices[] __initdata = {
+};
+
+static void __init smdk6440_map_io(void)
+{
+        s5p_init_io(NULL, 0, S5P_SYS_ID);
+        s3c24xx_init_clocks(12000000);
+        s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs));
+}
+
+static void __init smdk6440_machine_init(void)
+{
+        platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices));
+}
+
+MACHINE_START(SMDK6440, "SMDK6440")
+        /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
+        .phys_io        = S3C_PA_UART & 0xfff00000,
+        .io_pg_offst    = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
+        .boot_params    = S5P_PA_SDRAM + 0x100,
+
+        .init_irq       = s5p6440_init_irq,
+        .map_io         = smdk6440_map_io,
+        .init_machine   = smdk6440_machine_init,
+        .timer          = &s3c24xx_timer,
+MACHINE_END
diff --git a/arch/arm/mach-s5p6442/Kconfig b/arch/arm/mach-s5p6442/Kconfig
new file mode 100644
index 00000000000..4f3f6de6a01
--- /dev/null
+++ b/arch/arm/mach-s5p6442/Kconfig
@@ -0,0 +1,24 @@
+# arch/arm/mach-s5p6442/Kconfig
+#
+# Copyright (c) 2010 Samsung Electronics Co., Ltd.
+#               http://www.samsung.com/
+#
+# Licensed under GPLv2
+
+# Configuration options for the S5P6442
+
+if ARCH_S5P6442
+
+config CPU_S5P6442
+        bool
+        select PLAT_S5P
+        help
+          Enable S5P6442 CPU support
+
+config MACH_SMDK6442
+        bool "SMDK6442"
+        select CPU_S5P6442
+        help
+          Machine support for Samsung SMDK6442
+
+endif
diff --git a/arch/arm/mach-s5p6442/Makefile b/arch/arm/mach-s5p6442/Makefile
new file mode 100644
index 00000000000..dde39a6ce6b
--- /dev/null
+++ b/arch/arm/mach-s5p6442/Makefile
@@ -0,0 +1,19 @@
+# arch/arm/mach-s5p6442/Makefile
+#
+# Copyright (c) 2010 Samsung Electronics Co., Ltd.
+#               http://www.samsung.com/
+#
+# Licensed under GPLv2
+
+obj-y                           :=
+obj-m                           :=
+obj-n                           :=
+obj-                            :=
+
+# Core support for S5P6442 system
+
+obj-$(CONFIG_CPU_S5P6442)       += cpu.o init.o clock.o
+
+# machine support
+
+obj-$(CONFIG_MACH_SMDK6442)     += mach-smdk6442.o
diff --git a/arch/arm/mach-s5p6442/Makefile.boot b/arch/arm/mach-s5p6442/Makefile.boot
new file mode 100644
index 00000000000..ff90aa13bd6
--- /dev/null
+++ b/arch/arm/mach-s5p6442/Makefile.boot
@@ -0,0 +1,2 @@
+   zreladdr-y   := 0x20008000
+params_phys-y   := 0x20000100
diff --git a/arch/arm/mach-s5p6442/clock.c b/arch/arm/mach-s5p6442/clock.c
new file mode 100644
index 00000000000..3aadbf42c11
--- /dev/null
+++ b/arch/arm/mach-s5p6442/clock.c
@@ -0,0 +1,396 @@
+/* linux/arch/arm/mach-s5p6442/clock.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6442 - Clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+
+#include <mach/map.h>
+
+#include <plat/cpu-freq.h>
+#include <mach/regs-clock.h>
+#include <plat/clock.h>
+#include <plat/cpu.h>
+#include <plat/pll.h>
+#include <plat/s5p-clock.h>
+#include <plat/clock-clksrc.h>
+#include <plat/s5p6442.h>
+
+static struct clksrc_clk clk_mout_apll = {
+        .clk    = {
+                .name           = "mout_apll",
+                .id             = -1,
+        },
+        .sources        = &clk_src_apll,
+        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
+};
+
+static struct clksrc_clk clk_mout_mpll = {
+        .clk = {
+                .name           = "mout_mpll",
+                .id             = -1,
+        },
+        .sources        = &clk_src_mpll,
+        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 4, .size = 1 },
+};
+
+static struct clksrc_clk clk_mout_epll = {
+        .clk    = {
+                .name           = "mout_epll",
+                .id             = -1,
+        },
+        .sources        = &clk_src_epll,
+        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 8, .size = 1 },
+};
+
+/* Possible clock sources for ARM Mux */
+static struct clk *clk_src_arm_list[] = {
+        [1] = &clk_mout_apll.clk,
+        [2] = &clk_mout_mpll.clk,
+};
+
+static struct clksrc_sources clk_src_arm = {
+        .sources        = clk_src_arm_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_arm_list),
+};
+
+static struct clksrc_clk clk_mout_arm = {
+        .clk    = {
+                .name           = "mout_arm",
+                .id             = -1,
+        },
+        .sources        = &clk_src_arm,
+        .reg_src        = { .reg = S5P_CLK_MUX_STAT0, .shift = 16, .size = 3 },
+};
+
+static struct clk clk_dout_a2m = {
+        .name           = "dout_a2m",
+        .id             = -1,
+        .parent         = &clk_mout_apll.clk,
+};
+
+/* Possible clock sources for D0 Mux */
+static struct clk *clk_src_d0_list[] = {
+        [1] = &clk_mout_mpll.clk,
+        [2] = &clk_dout_a2m,
+};
+
+static struct clksrc_sources clk_src_d0 = {
+        .sources        = clk_src_d0_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_d0_list),
+};
+
+static struct clksrc_clk clk_mout_d0 = {
+        .clk = {
+                .name           = "mout_d0",
+                .id             = -1,
+        },
+        .sources        = &clk_src_d0,
+        .reg_src        = { .reg = S5P_CLK_MUX_STAT0, .shift = 20, .size = 3 },
+};
+
+static struct clk clk_dout_apll = {
+        .name           = "dout_apll",
+        .id             = -1,
+        .parent         = &clk_mout_arm.clk,
+};
+
+/* Possible clock sources for D0SYNC Mux */
+static struct clk *clk_src_d0sync_list[] = {
+        [1] = &clk_mout_d0.clk,
+        [2] = &clk_dout_apll,
+};
+
+static struct clksrc_sources clk_src_d0sync = {
+        .sources        = clk_src_d0sync_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_d0sync_list),
+};
+
+static struct clksrc_clk clk_mout_d0sync = {
+        .clk    = {
+                .name           = "mout_d0sync",
+                .id             = -1,
+        },
+        .sources        = &clk_src_d0sync,
+        .reg_src        = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 },
+};
+
+/* Possible clock sources for D1 Mux */
+static struct clk *clk_src_d1_list[] = {
+        [1] = &clk_mout_mpll.clk,
+        [2] = &clk_dout_a2m,
+};
+
+static struct clksrc_sources clk_src_d1 = {
+        .sources        = clk_src_d1_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_d1_list),
+};
+
+static struct clksrc_clk clk_mout_d1 = {
+        .clk    = {
+                .name           = "mout_d1",
+                .id             = -1,
+        },
+        .sources        = &clk_src_d1,
+        .reg_src        = { .reg = S5P_CLK_MUX_STAT0, .shift = 24, .size = 3 },
+};
+
+/* Possible clock sources for D1SYNC Mux */
+static struct clk *clk_src_d1sync_list[] = {
+        [1] = &clk_mout_d1.clk,
+        [2] = &clk_dout_apll,
+};
+
+static struct clksrc_sources clk_src_d1sync = {
+        .sources        = clk_src_d1sync_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_d1sync_list),
+};
+
+static struct clksrc_clk clk_mout_d1sync = {
+        .clk    = {
+                .name           = "mout_d1sync",
+                .id             = -1,
+        },
+        .sources        = &clk_src_d1sync,
+        .reg_src        = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 },
+};
+
+static struct clk clk_hclkd0 = {
+        .name           = "hclkd0",
+        .id             = -1,
+        .parent         = &clk_mout_d0sync.clk,
+};
+
+static struct clk clk_hclkd1 = {
+        .name           = "hclkd1",
+        .id             = -1,
+        .parent         = &clk_mout_d1sync.clk,
+};
+
+static struct clk clk_pclkd0 = {
+        .name           = "pclkd0",
+        .id             = -1,
+        .parent         = &clk_hclkd0,
+};
+
+static struct clk clk_pclkd1 = {
+        .name           = "pclkd1",
+        .id             = -1,
+        .parent         = &clk_hclkd1,
+};
+
+int s5p6442_clk_ip3_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable);
+}
+
+static struct clksrc_clk clksrcs[] = {
+        {
+                .clk    = {
+                        .name           = "dout_a2m",
+                        .id             = -1,
+                        .parent         = &clk_mout_apll.clk,
+                },
+                .sources = &clk_src_apll,
+                .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
+                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 4, .size = 3 },
+        }, {
+                .clk    = {
+                        .name           = "dout_apll",
+                        .id             = -1,
+                        .parent         = &clk_mout_arm.clk,
+                },
+                .sources = &clk_src_arm,
+                .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 16, .size = 3 },
+                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 0, .size = 3 },
+        }, {
+                .clk    = {
+                        .name           = "hclkd1",
+                        .id             = -1,
+                        .parent         = &clk_mout_d1sync.clk,
+                },
+                .sources = &clk_src_d1sync,
+                .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 },
+                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 24, .size = 4 },
+        }, {
+                .clk    = {
+                        .name           = "hclkd0",
+                        .id             = -1,
+                        .parent         = &clk_mout_d0sync.clk,
+                },
+                .sources = &clk_src_d0sync,
+                .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 },
+                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 16, .size = 4 },
+        }, {
+                .clk    = {
+                        .name           = "pclkd0",
+                        .id             = -1,
+                        .parent         = &clk_hclkd0,
+                },
+                .sources = &clk_src_d0sync,
+                .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 },
+                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 20, .size = 3 },
+        }, {
+                .clk    = {
+                        .name           = "pclkd1",
+                        .id             = -1,
+                        .parent         = &clk_hclkd1,
+                },
+                .sources = &clk_src_d1sync,
+                .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 },
+                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 28, .size = 3 },
+        }
+};
+
+/* Clock initialisation code */
+static struct clksrc_clk *init_parents[] = {
+        &clk_mout_apll,
+        &clk_mout_mpll,
+        &clk_mout_epll,
+        &clk_mout_arm,
+        &clk_mout_d0,
+        &clk_mout_d0sync,
+        &clk_mout_d1,
+        &clk_mout_d1sync,
+};
+
+void __init_or_cpufreq s5p6442_setup_clocks(void)
+{
+        struct clk *pclkd0_clk;
+        struct clk *pclkd1_clk;
+
+        unsigned long xtal;
+        unsigned long arm;
+        unsigned long hclkd0 = 0;
+        unsigned long hclkd1 = 0;
+        unsigned long pclkd0 = 0;
+        unsigned long pclkd1 = 0;
+
+        unsigned long apll;
+        unsigned long mpll;
+        unsigned long epll;
+        unsigned int ptr;
+
+        printk(KERN_DEBUG "%s: registering clocks\n", __func__);
+
+        xtal = clk_get_rate(&clk_xtal);
+
+        printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
+
+        apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508);
+        mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502);
+        epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500);
+
+        printk(KERN_INFO "S5P6440: PLL settings, A=%ld, M=%ld, E=%ld",
+                        apll, mpll, epll);
+
+        clk_fout_apll.rate = apll;
+        clk_fout_mpll.rate = mpll;
+        clk_fout_epll.rate = epll;
+
+        for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
+                s3c_set_clksrc(init_parents[ptr], true);
+
+        for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
+                s3c_set_clksrc(&clksrcs[ptr], true);
+
+        arm = clk_get_rate(&clk_dout_apll);
+        hclkd0 = clk_get_rate(&clk_hclkd0);
+        hclkd1 = clk_get_rate(&clk_hclkd1);
+
+        pclkd0_clk = clk_get(NULL, "pclkd0");
+        BUG_ON(IS_ERR(pclkd0_clk));
+
+        pclkd0 = clk_get_rate(pclkd0_clk);
+        clk_put(pclkd0_clk);
+
+        pclkd1_clk = clk_get(NULL, "pclkd1");
+        BUG_ON(IS_ERR(pclkd1_clk));
+
+        pclkd1 = clk_get_rate(pclkd1_clk);
+        clk_put(pclkd1_clk);
+
+        printk(KERN_INFO "S5P6442: HCLKD0=%ld, HCLKD1=%ld, PCLKD0=%ld, PCLKD1=%ld\n",
+                        hclkd0, hclkd1, pclkd0, pclkd1);
+
+        /* For backward compatibility */
+        clk_f.rate = arm;
+        clk_h.rate = hclkd1;
+        clk_p.rate = pclkd1;
+
+        clk_pclkd0.rate = pclkd0;
+        clk_pclkd1.rate = pclkd1;
+}
+
+static struct clk init_clocks[] = {
+        {
+                .name           = "systimer",
+                .id             = -1,
+                .parent         = &clk_pclkd1,
+                .enable         = s5p6442_clk_ip3_ctrl,
+                .ctrlbit        = (1<<16),
+        }, {
+                .name           = "uart",
+                .id             = 0,
+                .parent         = &clk_pclkd1,
+                .enable         = s5p6442_clk_ip3_ctrl,
+                .ctrlbit        = (1<<17),
+        }, {
+                .name           = "uart",
+                .id             = 1,
+                .parent         = &clk_pclkd1,
+                .enable         = s5p6442_clk_ip3_ctrl,
+                .ctrlbit        = (1<<18),
+        }, {
+                .name           = "uart",
+                .id             = 2,
+                .parent         = &clk_pclkd1,
+                .enable         = s5p6442_clk_ip3_ctrl,
+                .ctrlbit        = (1<<19),
+        }, {
+                .name           = "timers",
+                .id             = -1,
+                .parent         = &clk_pclkd1,
+                .enable         = s5p6442_clk_ip3_ctrl,
+                .ctrlbit        = (1<<23),
+        },
+};
+
+static struct clk *clks[] __initdata = {
+        &clk_ext,
+        &clk_epll,
+        &clk_mout_apll.clk,
+        &clk_mout_mpll.clk,
+        &clk_mout_epll.clk,
+        &clk_mout_d0.clk,
+        &clk_mout_d0sync.clk,
+        &clk_mout_d1.clk,
+        &clk_mout_d1sync.clk,
+        &clk_hclkd0,
+        &clk_pclkd0,
+        &clk_hclkd1,
+        &clk_pclkd1,
+};
+
+void __init s5p6442_register_clocks(void)
+{
+        s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
+
+        s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
+        s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
+
+        s3c_pwmclk_init();
+}
diff --git a/arch/arm/mach-s5p6442/cpu.c b/arch/arm/mach-s5p6442/cpu.c
new file mode 100644
index 00000000000..bc2524df89b
--- /dev/null
+++ b/arch/arm/mach-s5p6442/cpu.c
@@ -0,0 +1,121 @@
+/* linux/arch/arm/mach-s5p6442/cpu.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/init.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/sysdev.h>
+#include <linux/serial_core.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <asm/proc-fns.h>
+
+#include <mach/hardware.h>
+#include <mach/map.h>
+#include <asm/irq.h>
+
+#include <plat/regs-serial.h>
+#include <mach/regs-clock.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/clock.h>
+#include <plat/s5p6442.h>
+
+/* Initial IO mappings */
+
+static struct map_desc s5p6442_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S5P_VA_SYSTIMER,
+                .pfn            = __phys_to_pfn(S5P6442_PA_SYSTIMER),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)VA_VIC2,
+                .pfn            = __phys_to_pfn(S5P6442_PA_VIC2),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }
+};
+
+static void s5p6442_idle(void)
+{
+        if (!need_resched())
+                cpu_do_idle();
+
+        local_irq_enable();
+}
+
+/* s5p6442_map_io
+ *
+ * register the standard cpu IO areas
+*/
+
+void __init s5p6442_map_io(void)
+{
+        iotable_init(s5p6442_iodesc, ARRAY_SIZE(s5p6442_iodesc));
+}
+
+void __init s5p6442_init_clocks(int xtal)
+{
+        printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
+
+        s3c24xx_register_baseclocks(xtal);
+        s5p_register_clocks(xtal);
+        s5p6442_register_clocks();
+        s5p6442_setup_clocks();
+}
+
+void __init s5p6442_init_irq(void)
+{
+        /* S5P6442 supports 3 VIC */
+        u32 vic[3];
+
+        /* VIC0, VIC1, and VIC2: some interrupt reserved */
+        vic[0] = 0x7fefffff;
+        vic[1] = 0X7f389c81;
+        vic[2] = 0X1bbbcfff;
+
+        s5p_init_irq(vic, ARRAY_SIZE(vic));
+}
+
+static struct sysdev_class s5p6442_sysclass = {
+        .name   = "s5p6442-core",
+};
+
+static struct sys_device s5p6442_sysdev = {
+        .cls    = &s5p6442_sysclass,
+};
+
+static int __init s5p6442_core_init(void)
+{
+        return sysdev_class_register(&s5p6442_sysclass);
+}
+
+core_initcall(s5p6442_core_init);
+
+int __init s5p6442_init(void)
+{
+        printk(KERN_INFO "S5P6442: Initializing architecture\n");
+
+        /* set idle function */
+        pm_idle = s5p6442_idle;
+
+        return sysdev_register(&s5p6442_sysdev);
+}
diff --git a/arch/arm/mach-s5p6442/include/mach/debug-macro.S b/arch/arm/mach-s5p6442/include/mach/debug-macro.S
new file mode 100644
index 00000000000..bb6536147ff
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/debug-macro.S
@@ -0,0 +1,36 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/debug-macro.S
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* pull in the relevant register and map files. */
+
+#include <mach/map.h>
+#include <plat/regs-serial.h>
+
+        .macro addruart, rx, rtmp
+                mrc     p15, 0, \rx, c1, c0
+                tst     \rx, #1
+                ldreq   \rx, = S3C_PA_UART
+                ldrne   \rx, = S3C_VA_UART
+#if CONFIG_DEBUG_S3C_UART != 0
+                add     \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
+#endif
+        .endm
+
+#define fifo_full fifo_full_s5pv210
+#define fifo_level fifo_level_s5pv210
+
+/* include the reset of the code which will do the work, we're only
+ * compiling for a single cpu processor type so the default of s3c2440
+ * will be fine with us.
+ */
+
+#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s5p6442/include/mach/entry-macro.S b/arch/arm/mach-s5p6442/include/mach/entry-macro.S
new file mode 100644
index 00000000000..6d574edbf1a
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/entry-macro.S
@@ -0,0 +1,48 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/entry-macro.S
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Low-level IRQ helper macros for the Samsung S5P6442
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <asm/hardware/vic.h>
+#include <mach/map.h>
+#include <plat/irqs.h>
+
+        .macro  disable_fiq
+        .endm
+
+        .macro  get_irqnr_preamble, base, tmp
+        ldr     \base, =VA_VIC0
+        .endm
+
+        .macro  arch_ret_to_user, tmp1, tmp2
+        .endm
+
+        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+
+        @ check the vic0
+        mov     \irqnr, # S5P_IRQ_OFFSET + 31
+        ldr     \irqstat, [ \base, # VIC_IRQ_STATUS ]
+        teq     \irqstat, #0
+
+        @ otherwise try vic1
+        addeq   \tmp, \base, #(VA_VIC1 - VA_VIC0)
+        addeq   \irqnr, \irqnr, #32
+        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
+        teqeq   \irqstat, #0
+
+        @ otherwise try vic2
+        addeq   \tmp, \base, #(VA_VIC2 - VA_VIC0)
+        addeq   \irqnr, \irqnr, #32
+        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
+        teqeq   \irqstat, #0
+
+        clzne   \irqstat, \irqstat
+        subne   \irqnr, \irqnr, \irqstat
+        .endm
diff --git a/arch/arm/mach-s5p6442/include/mach/gpio.h b/arch/arm/mach-s5p6442/include/mach/gpio.h
new file mode 100644
index 00000000000..b8715df2fda
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/gpio.h
@@ -0,0 +1,123 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/gpio.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6442 - GPIO lib support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_GPIO_H
+#define __ASM_ARCH_GPIO_H __FILE__
+
+#define gpio_get_value  __gpio_get_value
+#define gpio_set_value  __gpio_set_value
+#define gpio_cansleep   __gpio_cansleep
+#define gpio_to_irq     __gpio_to_irq
+
+/* GPIO bank sizes */
+#define S5P6442_GPIO_A0_NR      (8)
+#define S5P6442_GPIO_A1_NR      (2)
+#define S5P6442_GPIO_B_NR       (4)
+#define S5P6442_GPIO_C0_NR      (5)
+#define S5P6442_GPIO_C1_NR      (5)
+#define S5P6442_GPIO_D0_NR      (2)
+#define S5P6442_GPIO_D1_NR      (6)
+#define S5P6442_GPIO_E0_NR      (8)
+#define S5P6442_GPIO_E1_NR      (5)
+#define S5P6442_GPIO_F0_NR      (8)
+#define S5P6442_GPIO_F1_NR      (8)
+#define S5P6442_GPIO_F2_NR      (8)
+#define S5P6442_GPIO_F3_NR      (6)
+#define S5P6442_GPIO_G0_NR      (7)
+#define S5P6442_GPIO_G1_NR      (7)
+#define S5P6442_GPIO_G2_NR      (7)
+#define S5P6442_GPIO_H0_NR      (8)
+#define S5P6442_GPIO_H1_NR      (8)
+#define S5P6442_GPIO_H2_NR      (8)
+#define S5P6442_GPIO_H3_NR      (8)
+#define S5P6442_GPIO_J0_NR      (8)
+#define S5P6442_GPIO_J1_NR      (6)
+#define S5P6442_GPIO_J2_NR      (8)
+#define S5P6442_GPIO_J3_NR      (8)
+#define S5P6442_GPIO_J4_NR      (5)
+
+/* GPIO bank numbers */
+
+/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
+ * space for debugging purposes so that any accidental
+ * change from one gpio bank to another can be caught.
+*/
+
+#define S5P6442_GPIO_NEXT(__gpio) \
+        ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
+
+enum s5p_gpio_number {
+        S5P6442_GPIO_A0_START   = 0,
+        S5P6442_GPIO_A1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_A0),
+        S5P6442_GPIO_B_START    = S5P6442_GPIO_NEXT(S5P6442_GPIO_A1),
+        S5P6442_GPIO_C0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_B),
+        S5P6442_GPIO_C1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_C0),
+        S5P6442_GPIO_D0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_C1),
+        S5P6442_GPIO_D1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_D0),
+        S5P6442_GPIO_E0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_D1),
+        S5P6442_GPIO_E1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_E0),
+        S5P6442_GPIO_F0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_E1),
+        S5P6442_GPIO_F1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_F0),
+        S5P6442_GPIO_F2_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_F1),
+        S5P6442_GPIO_F3_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_F2),
+        S5P6442_GPIO_G0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_F3),
+        S5P6442_GPIO_G1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_G0),
+        S5P6442_GPIO_G2_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_G1),
+        S5P6442_GPIO_H0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_G2),
+        S5P6442_GPIO_H1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_H0),
+        S5P6442_GPIO_H2_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_H1),
+        S5P6442_GPIO_H3_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_H2),
+        S5P6442_GPIO_J0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_H3),
+        S5P6442_GPIO_J1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_J0),
+        S5P6442_GPIO_J2_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_J1),
+        S5P6442_GPIO_J3_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_J2),
+        S5P6442_GPIO_J4_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_J3),
+};
+
+/* S5P6442 GPIO number definitions. */
+#define S5P6442_GPA0(_nr)       (S5P6442_GPIO_A0_START + (_nr))
+#define S5P6442_GPA1(_nr)       (S5P6442_GPIO_A1_START + (_nr))
+#define S5P6442_GPB(_nr)        (S5P6442_GPIO_B_START + (_nr))
+#define S5P6442_GPC0(_nr)       (S5P6442_GPIO_C0_START + (_nr))
+#define S5P6442_GPC1(_nr)       (S5P6442_GPIO_C1_START + (_nr))
+#define S5P6442_GPD0(_nr)       (S5P6442_GPIO_D0_START + (_nr))
+#define S5P6442_GPD1(_nr)       (S5P6442_GPIO_D1_START + (_nr))
+#define S5P6442_GPE0(_nr)       (S5P6442_GPIO_E0_START + (_nr))
+#define S5P6442_GPE1(_nr)       (S5P6442_GPIO_E1_START + (_nr))
+#define S5P6442_GPF0(_nr)       (S5P6442_GPIO_F0_START + (_nr))
+#define S5P6442_GPF1(_nr)       (S5P6442_GPIO_F1_START + (_nr))
+#define S5P6442_GPF2(_nr)       (S5P6442_GPIO_F2_START + (_nr))
+#define S5P6442_GPF3(_nr)       (S5P6442_GPIO_F3_START + (_nr))
+#define S5P6442_GPG0(_nr)       (S5P6442_GPIO_G0_START + (_nr))
+#define S5P6442_GPG1(_nr)       (S5P6442_GPIO_G1_START + (_nr))
+#define S5P6442_GPG2(_nr)       (S5P6442_GPIO_G2_START + (_nr))
+#define S5P6442_GPH0(_nr)       (S5P6442_GPIO_H0_START + (_nr))
+#define S5P6442_GPH1(_nr)       (S5P6442_GPIO_H1_START + (_nr))
+#define S5P6442_GPH2(_nr)       (S5P6442_GPIO_H2_START + (_nr))
+#define S5P6442_GPH3(_nr)       (S5P6442_GPIO_H3_START + (_nr))
+#define S5P6442_GPJ0(_nr)       (S5P6442_GPIO_J0_START + (_nr))
+#define S5P6442_GPJ1(_nr)       (S5P6442_GPIO_J1_START + (_nr))
+#define S5P6442_GPJ2(_nr)       (S5P6442_GPIO_J2_START + (_nr))
+#define S5P6442_GPJ3(_nr)       (S5P6442_GPIO_J3_START + (_nr))
+#define S5P6442_GPJ4(_nr)       (S5P6442_GPIO_J4_START + (_nr))
+
+/* the end of the S5P6442 specific gpios */
+#define S5P6442_GPIO_END        (S5P6442_GPJ4(S5P6442_GPIO_J4_NR) + 1)
+#define S3C_GPIO_END            S5P6442_GPIO_END
+
+/* define the number of gpios we need to the one after the GPJ4() range */
+#define ARCH_NR_GPIOS           (S5P6442_GPJ4(S5P6442_GPIO_J4_NR) +     \
+                                 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
+
+#include <asm-generic/gpio.h>
+
+#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/hardware.h b/arch/arm/mach-s5p6442/include/mach/hardware.h
new file mode 100644
index 00000000000..8cd7b67b49d
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/hardware.h
@@ -0,0 +1,18 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/hardware.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6442 - Hardware support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H __FILE__
+
+/* currently nothing here, placeholder */
+
+#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/io.h b/arch/arm/mach-s5p6442/include/mach/io.h
new file mode 100644
index 00000000000..5d2195ad0b6
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/io.h
@@ -0,0 +1,17 @@
+/* arch/arm/mach-s5p6442/include/mach/io.h
+ *
+ * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org>
+ *
+ * Default IO routines for S5P6442
+ */
+
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+/* No current ISA/PCI bus support. */
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
+
+#define IO_SPACE_LIMIT (0xFFFFFFFF)
+
+#endif
diff --git a/arch/arm/mach-s5p6442/include/mach/irqs.h b/arch/arm/mach-s5p6442/include/mach/irqs.h
new file mode 100644
index 00000000000..da665809f6e
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/irqs.h
@@ -0,0 +1,86 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/irqs.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6442 - IRQ definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_IRQS_H
+#define __ASM_ARCH_IRQS_H __FILE__
+
+#include <plat/irqs.h>
+
+/* VIC0 */
+#define IRQ_EINT16_31           S5P_IRQ_VIC0(16)
+#define IRQ_BATF                S5P_IRQ_VIC0(17)
+#define IRQ_MDMA                S5P_IRQ_VIC0(18)
+#define IRQ_PDMA                S5P_IRQ_VIC0(19)
+#define IRQ_TIMER0_VIC          S5P_IRQ_VIC0(21)
+#define IRQ_TIMER1_VIC          S5P_IRQ_VIC0(22)
+#define IRQ_TIMER2_VIC          S5P_IRQ_VIC0(23)
+#define IRQ_TIMER3_VIC          S5P_IRQ_VIC0(24)
+#define IRQ_TIMER4_VIC          S5P_IRQ_VIC0(25)
+#define IRQ_SYSTIMER            S5P_IRQ_VIC0(26)
+#define IRQ_WDT                 S5P_IRQ_VIC0(27)
+#define IRQ_RTC_ALARM           S5P_IRQ_VIC0(28)
+#define IRQ_RTC_TIC             S5P_IRQ_VIC0(29)
+#define IRQ_GPIOINT             S5P_IRQ_VIC0(30)
+
+/* VIC1 */
+#define IRQ_nPMUIRQ             S5P_IRQ_VIC1(0)
+#define IRQ_ONENAND             S5P_IRQ_VIC1(7)
+#define IRQ_UART0               S5P_IRQ_VIC1(10)
+#define IRQ_UART1               S5P_IRQ_VIC1(11)
+#define IRQ_UART2               S5P_IRQ_VIC1(12)
+#define IRQ_SPI0                S5P_IRQ_VIC1(15)
+#define IRQ_IIC                 S5P_IRQ_VIC1(19)
+#define IRQ_IIC1                S5P_IRQ_VIC1(20)
+#define IRQ_IIC2                S5P_IRQ_VIC1(21)
+#define IRQ_OTG                 S5P_IRQ_VIC1(24)
+#define IRQ_MSM                 S5P_IRQ_VIC1(25)
+#define IRQ_HSMMC0              S5P_IRQ_VIC1(26)
+#define IRQ_HSMMC1              S5P_IRQ_VIC1(27)
+#define IRQ_HSMMC2              S5P_IRQ_VIC1(28)
+#define IRQ_COMMRX              S5P_IRQ_VIC1(29)
+#define IRQ_COMMTX              S5P_IRQ_VIC1(30)
+
+/* VIC2 */
+#define IRQ_LCD0                S5P_IRQ_VIC2(0)
+#define IRQ_LCD1                S5P_IRQ_VIC2(1)
+#define IRQ_LCD2                S5P_IRQ_VIC2(2)
+#define IRQ_LCD3                S5P_IRQ_VIC2(3)
+#define IRQ_ROTATOR             S5P_IRQ_VIC2(4)
+#define IRQ_FIMC0               S5P_IRQ_VIC2(5)
+#define IRQ_FIMC1               S5P_IRQ_VIC2(6)
+#define IRQ_FIMC2               S5P_IRQ_VIC2(7)
+#define IRQ_JPEG                S5P_IRQ_VIC2(8)
+#define IRQ_3D                  S5P_IRQ_VIC2(10)
+#define IRQ_Mixer               S5P_IRQ_VIC2(11)
+#define IRQ_MFC                 S5P_IRQ_VIC2(14)
+#define IRQ_TVENC               S5P_IRQ_VIC2(15)
+#define IRQ_I2S0                S5P_IRQ_VIC2(16)
+#define IRQ_I2S1                S5P_IRQ_VIC2(17)
+#define IRQ_RP                  S5P_IRQ_VIC2(19)
+#define IRQ_PCM0                S5P_IRQ_VIC2(20)
+#define IRQ_PCM1                S5P_IRQ_VIC2(21)
+#define IRQ_ADC                 S5P_IRQ_VIC2(23)
+#define IRQ_PENDN               S5P_IRQ_VIC2(24)
+#define IRQ_KEYPAD              S5P_IRQ_VIC2(25)
+#define IRQ_SSS_INT             S5P_IRQ_VIC2(27)
+#define IRQ_SSS_HASH            S5P_IRQ_VIC2(28)
+#define IRQ_VIC_END             S5P_IRQ_VIC2(31)
+
+#define S5P_IRQ_EINT_BASE       (IRQ_VIC_END + 1)
+
+#define IRQ_EINT(x)             ((x) < 16 ? S5P_IRQ_VIC0(x) : \
+                                        (S5P_IRQ_EINT_BASE + (x)-16))
+/* Set the default NR_IRQS */
+
+#define NR_IRQS                 (IRQ_EINT(31) + 1)
+
+#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h
new file mode 100644
index 00000000000..685277d792f
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/map.h
@@ -0,0 +1,58 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/map.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6442 - Memory map definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_MAP_H
+#define __ASM_ARCH_MAP_H __FILE__
+
+#include <plat/map-base.h>
+#include <plat/map-s5p.h>
+
+#define S5P6442_PA_CHIPID       (0xE0000000)
+#define S5P_PA_CHIPID           S5P6442_PA_CHIPID
+
+#define S5P6442_PA_SYSCON       (0xE0100000)
+#define S5P_PA_SYSCON           S5P6442_PA_SYSCON
+
+#define S5P6442_PA_GPIO         (0xE0200000)
+#define S5P_PA_GPIO             S5P6442_PA_GPIO
+
+#define S5P6442_PA_VIC0         (0xE4000000)
+#define S5P_PA_VIC0             S5P6442_PA_VIC0
+
+#define S5P6442_PA_VIC1         (0xE4100000)
+#define S5P_PA_VIC1             S5P6442_PA_VIC1
+
+#define S5P6442_PA_VIC2         (0xE4200000)
+#define S5P_PA_VIC2             S5P6442_PA_VIC2
+
+#define S5P6442_PA_TIMER        (0xEA000000)
+#define S5P_PA_TIMER            S5P6442_PA_TIMER
+
+#define S5P6442_PA_SYSTIMER     (0xEA100000)
+
+#define S5P6442_PA_UART         (0xEC000000)
+
+#define S5P_PA_UART0            (S5P6442_PA_UART + 0x0)
+#define S5P_PA_UART1            (S5P6442_PA_UART + 0x400)
+#define S5P_PA_UART2            (S5P6442_PA_UART + 0x800)
+#define S5P_SZ_UART             SZ_256
+
+#define S5P6442_PA_IIC0         (0xEC100000)
+
+#define S5P6442_PA_SDRAM        (0x20000000)
+#define S5P_PA_SDRAM            S5P6442_PA_SDRAM
+
+/* compatibiltiy defines. */
+#define S3C_PA_UART             S5P6442_PA_UART
+#define S3C_PA_IIC              S5P6442_PA_IIC0
+
+#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/memory.h b/arch/arm/mach-s5p6442/include/mach/memory.h
new file mode 100644
index 00000000000..9ddd877ba2e
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/memory.h
@@ -0,0 +1,19 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/memory.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6442 - Memory definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+#define PHYS_OFFSET             UL(0x20000000)
+#define CONSISTENT_DMA_SIZE     SZ_8M
+
+#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/pwm-clock.h b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
new file mode 100644
index 00000000000..15e8525da0f
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
@@ -0,0 +1,69 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * Copyright 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Based on arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
+ *
+ * S5P6442 - pwm clock and timer support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_PWMCLK_H
+#define __ASM_ARCH_PWMCLK_H __FILE__
+
+/**
+ * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
+ * @cfg: The timer TCFG1 register bits shifted down to 0.
+ *
+ * Return true if the given configuration from TCFG1 is a TCLK instead
+ * any of the TDIV clocks.
+ */
+static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
+{
+        return tcfg == S3C2410_TCFG1_MUX_TCLK;
+}
+
+/**
+ * tcfg_to_divisor() - convert tcfg1 setting to a divisor
+ * @tcfg1: The tcfg1 setting, shifted down.
+ *
+ * Get the divisor value for the given tcfg1 setting. We assume the
+ * caller has already checked to see if this is not a TCLK source.
+ */
+static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
+{
+        return 1 << (1 + tcfg1);
+}
+
+/**
+ * pwm_tdiv_has_div1() - does the tdiv setting have a /1
+ *
+ * Return true if we have a /1 in the tdiv setting.
+ */
+static inline unsigned int pwm_tdiv_has_div1(void)
+{
+        return 0;
+}
+
+/**
+ * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
+ * @div: The divisor to calculate the bit information for.
+ *
+ * Turn a divisor into the necessary bit field for TCFG1.
+ */
+static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
+{
+        return ilog2(div) - 1;
+}
+
+#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK
+
+#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/regs-clock.h b/arch/arm/mach-s5p6442/include/mach/regs-clock.h
new file mode 100644
index 00000000000..d8360b5d4ec
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/regs-clock.h
@@ -0,0 +1,103 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/regs-clock.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6442 - Clock register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_CLOCK_H
+#define __ASM_ARCH_REGS_CLOCK_H __FILE__
+
+#include <mach/map.h>
+
+#define S5P_CLKREG(x)           (S3C_VA_SYS + (x))
+
+#define S5P_APLL_LOCK           S5P_CLKREG(0x00)
+#define S5P_MPLL_LOCK           S5P_CLKREG(0x08)
+#define S5P_EPLL_LOCK           S5P_CLKREG(0x10)
+#define S5P_VPLL_LOCK           S5P_CLKREG(0x20)
+
+#define S5P_APLL_CON            S5P_CLKREG(0x100)
+#define S5P_MPLL_CON            S5P_CLKREG(0x108)
+#define S5P_EPLL_CON            S5P_CLKREG(0x110)
+#define S5P_VPLL_CON            S5P_CLKREG(0x120)
+
+#define S5P_CLK_SRC0            S5P_CLKREG(0x200)
+#define S5P_CLK_SRC1            S5P_CLKREG(0x204)
+#define S5P_CLK_SRC2            S5P_CLKREG(0x208)
+#define S5P_CLK_SRC3            S5P_CLKREG(0x20C)
+#define S5P_CLK_SRC4            S5P_CLKREG(0x210)
+#define S5P_CLK_SRC5            S5P_CLKREG(0x214)
+#define S5P_CLK_SRC6            S5P_CLKREG(0x218)
+
+#define S5P_CLK_SRC_MASK0       S5P_CLKREG(0x280)
+#define S5P_CLK_SRC_MASK1       S5P_CLKREG(0x284)
+
+#define S5P_CLK_DIV0            S5P_CLKREG(0x300)
+#define S5P_CLK_DIV1            S5P_CLKREG(0x304)
+#define S5P_CLK_DIV2            S5P_CLKREG(0x308)
+#define S5P_CLK_DIV3            S5P_CLKREG(0x30C)
+#define S5P_CLK_DIV4            S5P_CLKREG(0x310)
+#define S5P_CLK_DIV5            S5P_CLKREG(0x314)
+#define S5P_CLK_DIV6            S5P_CLKREG(0x318)
+
+#define S5P_CLKGATE_IP3         S5P_CLKREG(0x46C)
+
+/* CLK_OUT */
+#define S5P_CLK_OUT_SHIFT       (12)
+#define S5P_CLK_OUT_MASK        (0x1F << S5P_CLK_OUT_SHIFT)
+#define S5P_CLK_OUT             S5P_CLKREG(0x500)
+
+#define S5P_CLK_DIV_STAT0       S5P_CLKREG(0x1000)
+#define S5P_CLK_DIV_STAT1       S5P_CLKREG(0x1004)
+
+#define S5P_CLK_MUX_STAT0       S5P_CLKREG(0x1100)
+#define S5P_CLK_MUX_STAT1       S5P_CLKREG(0x1104)
+
+#define S5P_MDNIE_SEL           S5P_CLKREG(0x7008)
+
+/* Register Bit definition */
+#define S5P_EPLL_EN                     (1<<31)
+#define S5P_EPLL_MASK                   0xffffffff
+#define S5P_EPLLVAL(_m, _p, _s)         ((_m) << 16 | ((_p) << 8) | ((_s)))
+
+/* CLKDIV0 */
+#define S5P_CLKDIV0_APLL_SHIFT          (0)
+#define S5P_CLKDIV0_APLL_MASK           (0x7 << S5P_CLKDIV0_APLL_SHIFT)
+#define S5P_CLKDIV0_A2M_SHIFT           (4)
+#define S5P_CLKDIV0_A2M_MASK            (0x7 << S5P_CLKDIV0_A2M_SHIFT)
+#define S5P_CLKDIV0_D0CLK_SHIFT         (16)
+#define S5P_CLKDIV0_D0CLK_MASK          (0xF << S5P_CLKDIV0_D0CLK_SHIFT)
+#define S5P_CLKDIV0_P0CLK_SHIFT         (20)
+#define S5P_CLKDIV0_P0CLK_MASK          (0x7 << S5P_CLKDIV0_P0CLK_SHIFT)
+#define S5P_CLKDIV0_D1CLK_SHIFT         (24)
+#define S5P_CLKDIV0_D1CLK_MASK          (0xF << S5P_CLKDIV0_D1CLK_SHIFT)
+#define S5P_CLKDIV0_P1CLK_SHIFT         (28)
+#define S5P_CLKDIV0_P1CLK_MASK          (0x7 << S5P_CLKDIV0_P1CLK_SHIFT)
+
+/* Clock MUX status Registers */
+#define S5P_CLK_MUX_STAT0_APLL_SHIFT    (0)
+#define S5P_CLK_MUX_STAT0_APLL_MASK     (0x7 << S5P_CLK_MUX_STAT0_APLL_SHIFT)
+#define S5P_CLK_MUX_STAT0_MPLL_SHIFT    (4)
+#define S5P_CLK_MUX_STAT0_MPLL_MASK     (0x7 << S5P_CLK_MUX_STAT0_MPLL_SHIFT)
+#define S5P_CLK_MUX_STAT0_EPLL_SHIFT    (8)
+#define S5P_CLK_MUX_STAT0_EPLL_MASK     (0x7 << S5P_CLK_MUX_STAT0_EPLL_SHIFT)
+#define S5P_CLK_MUX_STAT0_VPLL_SHIFT    (12)
+#define S5P_CLK_MUX_STAT0_VPLL_MASK     (0x7 << S5P_CLK_MUX_STAT0_VPLL_SHIFT)
+#define S5P_CLK_MUX_STAT0_MUXARM_SHIFT  (16)
+#define S5P_CLK_MUX_STAT0_MUXARM_MASK   (0x7 << S5P_CLK_MUX_STAT0_MUXARM_SHIFT)
+#define S5P_CLK_MUX_STAT0_MUXD0_SHIFT   (20)
+#define S5P_CLK_MUX_STAT0_MUXD0_MASK    (0x7 << S5P_CLK_MUX_STAT0_MUXD0_SHIFT)
+#define S5P_CLK_MUX_STAT0_MUXD1_SHIFT   (24)
+#define S5P_CLK_MUX_STAT0_MUXD1_MASK    (0x7 << S5P_CLK_MUX_STAT0_MUXD1_SHIFT)
+#define S5P_CLK_MUX_STAT1_D1SYNC_SHIFT  (24)
+#define S5P_CLK_MUX_STAT1_D1SYNC_MASK   (0x7 << S5P_CLK_MUX_STAT1_D1SYNC_SHIFT)
+#define S5P_CLK_MUX_STAT1_D0SYNC_SHIFT  (28)
+#define S5P_CLK_MUX_STAT1_D0SYNC_MASK   (0x7 << S5P_CLK_MUX_STAT1_D0SYNC_SHIFT)
+
+#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/regs-irq.h b/arch/arm/mach-s5p6442/include/mach/regs-irq.h
new file mode 100644
index 00000000000..73782b52a83
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/regs-irq.h
@@ -0,0 +1,19 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/regs-irq.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6442 - IRQ register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_IRQ_H
+#define __ASM_ARCH_REGS_IRQ_H __FILE__
+
+#include <asm/hardware/vic.h>
+#include <mach/map.h>
+
+#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/system.h b/arch/arm/mach-s5p6442/include/mach/system.h
new file mode 100644
index 00000000000..8bcd8ed0c3c
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/system.h
@@ -0,0 +1,26 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/system.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6442 - system support header
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_SYSTEM_H
+#define __ASM_ARCH_SYSTEM_H __FILE__
+
+static void arch_idle(void)
+{
+        /* nothing here yet */
+}
+
+static void arch_reset(char mode, const char *cmd)
+{
+        /* nothing here yet */
+}
+
+#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/tick.h b/arch/arm/mach-s5p6442/include/mach/tick.h
new file mode 100644
index 00000000000..e1d4cabf829
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/tick.h
@@ -0,0 +1,26 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/tick.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Based on arch/arm/mach-s3c6400/include/mach/tick.h
+ *
+ * S5P6442 - Timer tick support definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_TICK_H
+#define __ASM_ARCH_TICK_H __FILE__
+
+static inline u32 s3c24xx_ostimer_pending(void)
+{
+        u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
+        return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
+}
+
+#define TICK_MAX        (0xffffffff)
+
+#endif /* __ASM_ARCH_TICK_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/timex.h b/arch/arm/mach-s5p6442/include/mach/timex.h
new file mode 100644
index 00000000000..ff8f2fcadeb
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/timex.h
@@ -0,0 +1,24 @@
+/* arch/arm/mach-s5p6442/include/mach/timex.h
+ *
+ * Copyright (c) 2003-2010 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S5P6442 - time parameters
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H
+
+/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
+ * a variable is useless. It seems as long as we make our timers an
+ * exact multiple of HZ, any value that makes a 1->1 correspondence
+ * for the time conversion functions to/from jiffies is acceptable.
+*/
+
+#define CLOCK_TICK_RATE 12000000
+
+#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/uncompress.h b/arch/arm/mach-s5p6442/include/mach/uncompress.h
new file mode 100644
index 00000000000..5ac7cbeeb98
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/uncompress.h
@@ -0,0 +1,24 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/uncompress.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P6442 - uncompress code
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_UNCOMPRESS_H
+#define __ASM_ARCH_UNCOMPRESS_H
+
+#include <mach/map.h>
+#include <plat/uncompress.h>
+
+static void arch_detect_cpu(void)
+{
+        /* we do not need to do any cpu detection here at the moment. */
+}
+
+#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/vmalloc.h b/arch/arm/mach-s5p6442/include/mach/vmalloc.h
new file mode 100644
index 00000000000..be3333688c2
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/vmalloc.h
@@ -0,0 +1,17 @@
+/* arch/arm/mach-s5p6442/include/mach/vmalloc.h
+ *
+ * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S5P6442 vmalloc definition
+*/
+
+#ifndef __ASM_ARCH_VMALLOC_H
+#define __ASM_ARCH_VMALLOC_H
+
+#define VMALLOC_END       (0xE0000000)
+
+#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5p6442/init.c b/arch/arm/mach-s5p6442/init.c
new file mode 100644
index 00000000000..1874bdb71e1
--- /dev/null
+++ b/arch/arm/mach-s5p6442/init.c
@@ -0,0 +1,44 @@
+/* linux/arch/arm/mach-s5p6442/s5p6442-init.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/serial_core.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/s5p6442.h>
+#include <plat/regs-serial.h>
+
+static struct s3c24xx_uart_clksrc s5p6442_serial_clocks[] = {
+        [0] = {
+                .name           = "pclk",
+                .divisor        = 1,
+                .min_baud       = 0,
+                .max_baud       = 0,
+        },
+};
+
+/* uart registration process */
+void __init s5p6442_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        struct s3c2410_uartcfg *tcfg = cfg;
+        u32 ucnt;
+
+        for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
+                if (!tcfg->clocks) {
+                        tcfg->clocks = s5p6442_serial_clocks;
+                        tcfg->clocks_size = ARRAY_SIZE(s5p6442_serial_clocks);
+                }
+        }
+
+        s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
+}
diff --git a/arch/arm/mach-s5p6442/mach-smdk6442.c b/arch/arm/mach-s5p6442/mach-smdk6442.c
new file mode 100644
index 00000000000..0d63371ce07
--- /dev/null
+++ b/arch/arm/mach-s5p6442/mach-smdk6442.c
@@ -0,0 +1,91 @@
+/* linux/arch/arm/mach-s5p6442/mach-smdk6442.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/serial_core.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+
+#include <plat/regs-serial.h>
+#include <plat/s5p6442.h>
+#include <plat/devs.h>
+#include <plat/cpu.h>
+
+/* Following are default values for UCON, ULCON and UFCON UART registers */
+#define S5P6442_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |        \
+                                 S3C2410_UCON_RXILEVEL |        \
+                                 S3C2410_UCON_TXIRQMODE |       \
+                                 S3C2410_UCON_RXIRQMODE |       \
+                                 S3C2410_UCON_RXFIFO_TOI |      \
+                                 S3C2443_UCON_RXERR_IRQEN)
+
+#define S5P6442_ULCON_DEFAULT   S3C2410_LCON_CS8
+
+#define S5P6442_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |       \
+                                 S5PV210_UFCON_TXTRIG4 |        \
+                                 S5PV210_UFCON_RXTRIG4)
+
+static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = {
+        [0] = {
+                .hwport         = 0,
+                .flags          = 0,
+                .ucon           = S5P6442_UCON_DEFAULT,
+                .ulcon          = S5P6442_ULCON_DEFAULT,
+                .ufcon          = S5P6442_UFCON_DEFAULT,
+        },
+        [1] = {
+                .hwport         = 1,
+                .flags          = 0,
+                .ucon           = S5P6442_UCON_DEFAULT,
+                .ulcon          = S5P6442_ULCON_DEFAULT,
+                .ufcon          = S5P6442_UFCON_DEFAULT,
+        },
+        [2] = {
+                .hwport         = 2,
+                .flags          = 0,
+                .ucon           = S5P6442_UCON_DEFAULT,
+                .ulcon          = S5P6442_ULCON_DEFAULT,
+                .ufcon          = S5P6442_UFCON_DEFAULT,
+        },
+};
+
+static struct platform_device *smdk6442_devices[] __initdata = {
+};
+
+static void __init smdk6442_map_io(void)
+{
+        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        s3c24xx_init_clocks(12000000);
+        s3c24xx_init_uarts(smdk6442_uartcfgs, ARRAY_SIZE(smdk6442_uartcfgs));
+}
+
+static void __init smdk6442_machine_init(void)
+{
+        platform_add_devices(smdk6442_devices, ARRAY_SIZE(smdk6442_devices));
+}
+
+MACHINE_START(SMDK6442, "SMDK6442")
+        /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
+        .phys_io        = S3C_PA_UART & 0xfff00000,
+        .io_pg_offst    = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
+        .boot_params    = S5P_PA_SDRAM + 0x100,
+        .init_irq       = s5p6442_init_irq,
+        .map_io         = smdk6442_map_io,
+        .init_machine   = smdk6442_machine_init,
+        .timer          = &s3c24xx_timer,
+MACHINE_END
diff --git a/arch/arm/mach-s5pc100/include/mach/gpio-core.h b/arch/arm/mach-s5pc100/include/mach/gpio-core.h
deleted file mode 100644
index ad28d8ec8a7..00000000000
--- a/arch/arm/mach-s5pc100/include/mach/gpio-core.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/* arch/arm/mach-s5pc100/include/mach/gpio-core.h
- *
- * Copyright 2009 Samsung Electronics Co.
- *      Byungho Min <bhmin@samsung.com>
- *
- * S5PC100 - GPIO core support
- *
- * Based on mach-s3c6400/include/mach/gpio-core.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_GPIO_CORE_H
-#define __ASM_ARCH_GPIO_CORE_H __FILE__
-
-/* currently we just include the platform support */
-#include <plat/gpio-core.h>
-
-#endif /* __ASM_ARCH_GPIO_CORE_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/io.h b/arch/arm/mach-s5pc100/include/mach/io.h
new file mode 100644
index 00000000000..819acf5eaf8
--- /dev/null
+++ b/arch/arm/mach-s5pc100/include/mach/io.h
@@ -0,0 +1,18 @@
+/* arch/arm/mach-s5pc100/include/mach/io.h
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben-linux@fluff.org>
+ *
+ * Default IO routines for S5PC100 systems
+ */
+
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+/* No current ISA/PCI bus support. */
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
+
+#define IO_SPACE_LIMIT (0xFFFFFFFF)
+
+#endif
diff --git a/arch/arm/mach-s5pc100/include/mach/tick.h b/arch/arm/mach-s5pc100/include/mach/tick.h
index d3de0f3591a..f338c9eec71 100644
--- a/arch/arm/mach-s5pc100/include/mach/tick.h
+++ b/arch/arm/mach-s5pc100/include/mach/tick.h
@@ -21,7 +21,7 @@
 static inline u32 s3c24xx_ostimer_pending(void)
 {
         u32 pend = __raw_readl(S3C_VA_VIC0 + VIC_RAW_STATUS);
-        return pend & 1 << (IRQ_TIMER4 - S5PC1XX_IRQ_VIC0(0));
+        return pend & 1 << (IRQ_TIMER4_VIC - S5PC1XX_IRQ_VIC0(0));
 }
 
 #define TICK_MAX        (0xffffffff)
diff --git a/arch/arm/mach-s5pc100/include/mach/timex.h b/arch/arm/mach-s5pc100/include/mach/timex.h
new file mode 100644
index 00000000000..47ffb17aff9
--- /dev/null
+++ b/arch/arm/mach-s5pc100/include/mach/timex.h
@@ -0,0 +1,24 @@
+/* arch/arm/mach-s5pc100/include/mach/timex.h
+ *
+ * Copyright (c) 2003-2005 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C6400 - time parameters
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H
+
+/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
+ * a variable is useless. It seems as long as we make our timers an
+ * exact multiple of HZ, any value that makes a 1->1 correspondence
+ * for the time conversion functions to/from jiffies is acceptable.
+*/
+
+#define CLOCK_TICK_RATE 12000000
+
+#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/vmalloc.h b/arch/arm/mach-s5pc100/include/mach/vmalloc.h
new file mode 100644
index 00000000000..be9df79903e
--- /dev/null
+++ b/arch/arm/mach-s5pc100/include/mach/vmalloc.h
@@ -0,0 +1,17 @@
+/* arch/arm/mach-s5pc100/include/mach/vmalloc.h
+ *
+ * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C6400 vmalloc definition
+*/
+
+#ifndef __ASM_ARCH_VMALLOC_H
+#define __ASM_ARCH_VMALLOC_H
+
+#define VMALLOC_END       (0xe0000000UL)
+
+#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5pc100/setup-sdhci.c b/arch/arm/mach-s5pc100/setup-sdhci.c
index 4385986a3da..ea7ff19adb9 100644
--- a/arch/arm/mach-s5pc100/setup-sdhci.c
+++ b/arch/arm/mach-s5pc100/setup-sdhci.c
@@ -28,8 +28,8 @@
 char *s5pc100_hsmmc_clksrcs[4] = {
         [0] = "hsmmc",
         [1] = "hsmmc",
-        /* [2] = "mmc_bus", not yet succesfuuly used yet */
-        /* [3] = "48m", - note not succesfully used yet */
+        /* [2] = "mmc_bus", not yet successfully used yet */
+        /* [3] = "48m", - note not successfully used yet */
 };
 
 
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
new file mode 100644
index 00000000000..af33a1a89b7
--- /dev/null
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -0,0 +1,40 @@
+# arch/arm/mach-s5pv210/Kconfig
+#
+# Copyright (c) 2010 Samsung Electronics Co., Ltd.
+#               http://www.samsung.com/
+#
+# Licensed under GPLv2
+
+# Configuration options for the S5PV210/S5PC110
+
+if ARCH_S5PV210
+
+config CPU_S5PV210
+        bool
+        select PLAT_S5P
+        help
+          Enable S5PV210 CPU support
+
+choice
+        prompt "Select machine type"
+        depends on ARCH_S5PV210
+        default MACH_SMDKV210
+
+config MACH_SMDKV210
+        bool "SMDKV210"
+        select CPU_S5PV210
+        select ARCH_SPARSEMEM_ENABLE
+        help
+          Machine support for Samsung SMDKV210
+
+config MACH_SMDKC110
+        bool "SMDKC110"
+        select CPU_S5PV210
+        select ARCH_SPARSEMEM_ENABLE
+        help
+          Machine support for Samsung SMDKC110
+          S5PC110(MCP) is one of package option of S5PV210
+
+endchoice
+
+endif
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
new file mode 100644
index 00000000000..8ebf51c52a0
--- /dev/null
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -0,0 +1,20 @@
+# arch/arm/mach-s5pv210/Makefile
+#
+# Copyright (c) 2010 Samsung Electronics Co., Ltd.
+#               http://www.samsung.com/
+#
+# Licensed under GPLv2
+
+obj-y                           :=
+obj-m                           :=
+obj-n                           :=
+obj-                            :=
+
+# Core support for S5PV210 system
+
+obj-$(CONFIG_CPU_S5PV210)       += cpu.o init.o clock.o
+
+# machine support
+
+obj-$(CONFIG_MACH_SMDKV210)     += mach-smdkv210.o
+obj-$(CONFIG_MACH_SMDKC110)     += mach-smdkc110.o
diff --git a/arch/arm/mach-s5pv210/Makefile.boot b/arch/arm/mach-s5pv210/Makefile.boot
new file mode 100644
index 00000000000..ff90aa13bd6
--- /dev/null
+++ b/arch/arm/mach-s5pv210/Makefile.boot
@@ -0,0 +1,2 @@
+   zreladdr-y   := 0x20008000
+params_phys-y   := 0x20000100
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
new file mode 100644
index 00000000000..ccccae26235
--- /dev/null
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -0,0 +1,454 @@
+/* linux/arch/arm/mach-s5pv210/clock.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV210 - Clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/sysdev.h>
+#include <linux/io.h>
+
+#include <mach/map.h>
+
+#include <plat/cpu-freq.h>
+#include <mach/regs-clock.h>
+#include <plat/clock.h>
+#include <plat/cpu.h>
+#include <plat/pll.h>
+#include <plat/s5p-clock.h>
+#include <plat/clock-clksrc.h>
+#include <plat/s5pv210.h>
+
+static int s5pv210_clk_ip0_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_CLKGATE_IP0, clk, enable);
+}
+
+static int s5pv210_clk_ip1_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_CLKGATE_IP1, clk, enable);
+}
+
+static int s5pv210_clk_ip2_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_CLKGATE_IP2, clk, enable);
+}
+
+static int s5pv210_clk_ip3_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable);
+}
+
+static struct clk clk_h200 = {
+        .name           = "hclk200",
+        .id             = -1,
+};
+
+static struct clk clk_h100 = {
+        .name           = "hclk100",
+        .id             = -1,
+};
+
+static struct clk clk_h166 = {
+        .name           = "hclk166",
+        .id             = -1,
+};
+
+static struct clk clk_h133 = {
+        .name           = "hclk133",
+        .id             = -1,
+};
+
+static struct clk clk_p100 = {
+        .name           = "pclk100",
+        .id             = -1,
+};
+
+static struct clk clk_p83 = {
+        .name           = "pclk83",
+        .id             = -1,
+};
+
+static struct clk clk_p66 = {
+        .name           = "pclk66",
+        .id             = -1,
+};
+
+static struct clk *sys_clks[] = {
+        &clk_h200,
+        &clk_h100,
+        &clk_h166,
+        &clk_h133,
+        &clk_p100,
+        &clk_p83,
+        &clk_p66
+};
+
+static struct clk init_clocks_disable[] = {
+        {
+                .name           = "rot",
+                .id             = -1,
+                .parent         = &clk_h166,
+                .enable         = s5pv210_clk_ip0_ctrl,
+                .ctrlbit        = (1<<29),
+        }, {
+                .name           = "otg",
+                .id             = -1,
+                .parent         = &clk_h133,
+                .enable         = s5pv210_clk_ip1_ctrl,
+                .ctrlbit        = (1<<16),
+        }, {
+                .name           = "usb-host",
+                .id             = -1,
+                .parent         = &clk_h133,
+                .enable         = s5pv210_clk_ip1_ctrl,
+                .ctrlbit        = (1<<17),
+        }, {
+                .name           = "lcd",
+                .id             = -1,
+                .parent         = &clk_h166,
+                .enable         = s5pv210_clk_ip1_ctrl,
+                .ctrlbit        = (1<<0),
+        }, {
+                .name           = "cfcon",
+                .id             = 0,
+                .parent         = &clk_h133,
+                .enable         = s5pv210_clk_ip1_ctrl,
+                .ctrlbit        = (1<<25),
+        }, {
+                .name           = "hsmmc",
+                .id             = 0,
+                .parent         = &clk_h133,
+                .enable         = s5pv210_clk_ip2_ctrl,
+                .ctrlbit        = (1<<16),
+        }, {
+                .name           = "hsmmc",
+                .id             = 1,
+                .parent         = &clk_h133,
+                .enable         = s5pv210_clk_ip2_ctrl,
+                .ctrlbit        = (1<<17),
+        }, {
+                .name           = "hsmmc",
+                .id             = 2,
+                .parent         = &clk_h133,
+                .enable         = s5pv210_clk_ip2_ctrl,
+                .ctrlbit        = (1<<18),
+        }, {
+                .name           = "hsmmc",
+                .id             = 3,
+                .parent         = &clk_h133,
+                .enable         = s5pv210_clk_ip2_ctrl,
+                .ctrlbit        = (1<<19),
+        }, {
+                .name           = "systimer",
+                .id             = -1,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<16),
+        }, {
+                .name           = "watchdog",
+                .id             = -1,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<22),
+        }, {
+                .name           = "rtc",
+                .id             = -1,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<15),
+        }, {
+                .name           = "i2c",
+                .id             = 0,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<7),
+        }, {
+                .name           = "i2c",
+                .id             = 1,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<8),
+        }, {
+                .name           = "i2c",
+                .id             = 2,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<9),
+        }, {
+                .name           = "spi",
+                .id             = 0,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<12),
+        }, {
+                .name           = "spi",
+                .id             = 1,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<13),
+        }, {
+                .name           = "spi",
+                .id             = 2,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<14),
+        }, {
+                .name           = "timers",
+                .id             = -1,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<23),
+        }, {
+                .name           = "adc",
+                .id             = -1,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<24),
+        }, {
+                .name           = "keypad",
+                .id             = -1,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<21),
+        }, {
+                .name           = "i2s_v50",
+                .id             = 0,
+                .parent         = &clk_p,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<4),
+        }, {
+                .name           = "i2s_v32",
+                .id             = 0,
+                .parent         = &clk_p,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<4),
+        }, {
+                .name           = "i2s_v32",
+                .id             = 1,
+                .parent         = &clk_p,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<4),
+        }
+};
+
+static struct clk init_clocks[] = {
+        {
+                .name           = "uart",
+                .id             = 0,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<7),
+        }, {
+                .name           = "uart",
+                .id             = 1,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<8),
+        }, {
+                .name           = "uart",
+                .id             = 2,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<9),
+        }, {
+                .name           = "uart",
+                .id             = 3,
+                .parent         = &clk_p66,
+                .enable         = s5pv210_clk_ip3_ctrl,
+                .ctrlbit        = (1<<10),
+        },
+};
+
+static struct clksrc_clk clk_mout_apll = {
+        .clk    = {
+                .name           = "mout_apll",
+                .id             = -1,
+        },
+        .sources        = &clk_src_apll,
+        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
+};
+
+static struct clksrc_clk clk_mout_epll = {
+        .clk    = {
+                .name           = "mout_epll",
+                .id             = -1,
+        },
+        .sources        = &clk_src_epll,
+        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 8, .size = 1 },
+};
+
+static struct clksrc_clk clk_mout_mpll = {
+        .clk = {
+                .name           = "mout_mpll",
+                .id             = -1,
+        },
+        .sources        = &clk_src_mpll,
+        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 4, .size = 1 },
+};
+
+static struct clk *clkset_uart_list[] = {
+        [6] = &clk_mout_mpll.clk,
+        [7] = &clk_mout_epll.clk,
+};
+
+static struct clksrc_sources clkset_uart = {
+        .sources        = clkset_uart_list,
+        .nr_sources     = ARRAY_SIZE(clkset_uart_list),
+};
+
+static struct clksrc_clk clksrcs[] = {
+        {
+                .clk    = {
+                        .name           = "uclk1",
+                        .id             = -1,
+                        .ctrlbit        = (1<<17),
+                        .enable         = s5pv210_clk_ip3_ctrl,
+                },
+                .sources = &clkset_uart,
+                .reg_src = { .reg = S5P_CLK_SRC4, .shift = 16, .size = 4 },
+                .reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 },
+        }
+};
+
+/* Clock initialisation code */
+static struct clksrc_clk *init_parents[] = {
+        &clk_mout_apll,
+        &clk_mout_epll,
+        &clk_mout_mpll,
+};
+
+#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
+
+void __init_or_cpufreq s5pv210_setup_clocks(void)
+{
+        struct clk *xtal_clk;
+        unsigned long xtal;
+        unsigned long armclk;
+        unsigned long hclk200;
+        unsigned long hclk166;
+        unsigned long hclk133;
+        unsigned long pclk100;
+        unsigned long pclk83;
+        unsigned long pclk66;
+        unsigned long apll;
+        unsigned long mpll;
+        unsigned long epll;
+        unsigned int ptr;
+        u32 clkdiv0, clkdiv1;
+
+        printk(KERN_DEBUG "%s: registering clocks\n", __func__);
+
+        clkdiv0 = __raw_readl(S5P_CLK_DIV0);
+        clkdiv1 = __raw_readl(S5P_CLK_DIV1);
+
+        printk(KERN_DEBUG "%s: clkdiv0 = %08x, clkdiv1 = %08x\n",
+                                __func__, clkdiv0, clkdiv1);
+
+        xtal_clk = clk_get(NULL, "xtal");
+        BUG_ON(IS_ERR(xtal_clk));
+
+        xtal = clk_get_rate(xtal_clk);
+        clk_put(xtal_clk);
+
+        printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
+
+        apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508);
+        mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502);
+        epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500);
+
+        printk(KERN_INFO "S5PV210: PLL settings, A=%ld, M=%ld, E=%ld",
+                        apll, mpll, epll);
+
+        armclk = apll / GET_DIV(clkdiv0, S5P_CLKDIV0_APLL);
+        if (__raw_readl(S5P_CLK_SRC0) & S5P_CLKSRC0_MUX200_MASK)
+                hclk200 = mpll / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK200);
+        else
+                hclk200 = armclk / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK200);
+
+        if (__raw_readl(S5P_CLK_SRC0) & S5P_CLKSRC0_MUX166_MASK) {
+                hclk166 = apll / GET_DIV(clkdiv0, S5P_CLKDIV0_A2M);
+                hclk166 = hclk166 / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK166);
+        } else
+                hclk166 = mpll / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK166);
+
+        if (__raw_readl(S5P_CLK_SRC0) & S5P_CLKSRC0_MUX133_MASK) {
+                hclk133 = apll / GET_DIV(clkdiv0, S5P_CLKDIV0_A2M);
+                hclk133 = hclk133 / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK133);
+        } else
+                hclk133 = mpll / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK133);
+
+        pclk100 = hclk200 / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK100);
+        pclk83 = hclk166 / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK83);
+        pclk66 = hclk133 / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK66);
+
+        printk(KERN_INFO "S5PV210: ARMCLK=%ld, HCLKM=%ld, HCLKD=%ld, \
+                        HCLKP=%ld, PCLKM=%ld, PCLKD=%ld, PCLKP=%ld\n",
+               armclk, hclk200, hclk166, hclk133, pclk100, pclk83, pclk66);
+
+        clk_fout_apll.rate = apll;
+        clk_fout_mpll.rate = mpll;
+        clk_fout_epll.rate = epll;
+
+        clk_f.rate = armclk;
+        clk_h.rate = hclk133;
+        clk_p.rate = pclk66;
+        clk_p66.rate = pclk66;
+        clk_p83.rate = pclk83;
+        clk_h133.rate = hclk133;
+        clk_h166.rate = hclk166;
+        clk_h200.rate = hclk200;
+
+        for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
+                s3c_set_clksrc(init_parents[ptr], true);
+
+        for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
+                s3c_set_clksrc(&clksrcs[ptr], true);
+}
+
+static struct clk *clks[] __initdata = {
+        &clk_mout_epll.clk,
+        &clk_mout_mpll.clk,
+};
+
+void __init s5pv210_register_clocks(void)
+{
+        struct clk *clkp;
+        int ret;
+        int ptr;
+
+        ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
+        if (ret > 0)
+                printk(KERN_ERR "Failed to register %u clocks\n", ret);
+
+        s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
+        s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
+
+        ret = s3c24xx_register_clocks(sys_clks, ARRAY_SIZE(sys_clks));
+        if (ret > 0)
+                printk(KERN_ERR "Failed to register system clocks\n");
+
+        clkp = init_clocks_disable;
+        for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
+                ret = s3c24xx_register_clock(clkp);
+                if (ret < 0) {
+                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
+                               clkp->name, ret);
+                }
+                (clkp->enable)(clkp, 0);
+        }
+
+        s3c_pwmclk_init();
+}
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c
new file mode 100644
index 00000000000..0e0f8fde2aa
--- /dev/null
+++ b/arch/arm/mach-s5pv210/cpu.c
@@ -0,0 +1,126 @@
+/* linux/arch/arm/mach-s5pv210/cpu.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/sysdev.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <asm/proc-fns.h>
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/clock.h>
+#include <plat/s5pv210.h>
+
+/* Initial IO mappings */
+
+static struct map_desc s5pv210_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S5P_VA_SYSTIMER,
+                .pfn            = __phys_to_pfn(S5PV210_PA_SYSTIMER),
+                .length         = SZ_1M,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)VA_VIC2,
+                .pfn            = __phys_to_pfn(S5PV210_PA_VIC2),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)VA_VIC3,
+                .pfn            = __phys_to_pfn(S5PV210_PA_VIC3),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_SROMC,
+                .pfn            = __phys_to_pfn(S5PV210_PA_SROMC),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }
+};
+
+static void s5pv210_idle(void)
+{
+        if (!need_resched())
+                cpu_do_idle();
+
+        local_irq_enable();
+}
+
+/* s5pv210_map_io
+ *
+ * register the standard cpu IO areas
+*/
+
+void __init s5pv210_map_io(void)
+{
+        iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc));
+}
+
+void __init s5pv210_init_clocks(int xtal)
+{
+        printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
+
+        s3c24xx_register_baseclocks(xtal);
+        s5p_register_clocks(xtal);
+        s5pv210_register_clocks();
+        s5pv210_setup_clocks();
+}
+
+void __init s5pv210_init_irq(void)
+{
+        u32 vic[4];     /* S5PV210 supports 4 VIC */
+
+        /* All the VICs are fully populated. */
+        vic[0] = ~0;
+        vic[1] = ~0;
+        vic[2] = ~0;
+        vic[3] = ~0;
+
+        s5p_init_irq(vic, ARRAY_SIZE(vic));
+}
+
+static struct sysdev_class s5pv210_sysclass = {
+        .name   = "s5pv210-core",
+};
+
+static struct sys_device s5pv210_sysdev = {
+        .cls    = &s5pv210_sysclass,
+};
+
+static int __init s5pv210_core_init(void)
+{
+        return sysdev_class_register(&s5pv210_sysclass);
+}
+
+core_initcall(s5pv210_core_init);
+
+int __init s5pv210_init(void)
+{
+        printk(KERN_INFO "S5PV210: Initializing architecture\n");
+
+        /* set idle function */
+        pm_idle = s5pv210_idle;
+
+        return sysdev_register(&s5pv210_sysdev);
+}
diff --git a/arch/arm/mach-s5pv210/include/mach/debug-macro.S b/arch/arm/mach-s5pv210/include/mach/debug-macro.S
new file mode 100644
index 00000000000..7872f5c3dfc
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/debug-macro.S
@@ -0,0 +1,42 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/debug-macro.S
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* pull in the relevant register and map files. */
+
+#include <mach/map.h>
+#include <plat/regs-serial.h>
+
+        /* note, for the boot process to work we have to keep the UART
+         * virtual address aligned to an 1MiB boundary for the L1
+         * mapping the head code makes. We keep the UART virtual address
+         * aligned and add in the offset when we load the value here.
+         */
+
+        .macro addruart, rx, tmp
+                mrc     p15, 0, \rx, c1, c0
+                tst     \rx, #1
+                ldreq   \rx, = S3C_PA_UART
+                ldrne   \rx, = S3C_VA_UART
+#if CONFIG_DEBUG_S3C_UART != 0
+                add     \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
+#endif
+        .endm
+
+#define fifo_full fifo_full_s5pv210
+#define fifo_level fifo_level_s5pv210
+
+/* include the reset of the code which will do the work, we're only
+ * compiling for a single cpu processor type so the default of s3c2440
+ * will be fine with us.
+ */
+
+#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s5pv210/include/mach/entry-macro.S b/arch/arm/mach-s5pv210/include/mach/entry-macro.S
new file mode 100644
index 00000000000..3aa41ac59f0
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/entry-macro.S
@@ -0,0 +1,54 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/entry-macro.S
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Low-level IRQ helper macros for the Samsung S5PV210
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <asm/hardware/vic.h>
+#include <mach/map.h>
+#include <plat/irqs.h>
+
+        .macro  disable_fiq
+        .endm
+
+        .macro  get_irqnr_preamble, base, tmp
+        ldr     \base, =VA_VIC0
+        .endm
+
+        .macro  arch_ret_to_user, tmp1, tmp2
+        .endm
+
+        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+
+        @ check the vic0
+        mov     \irqnr, # S5P_IRQ_OFFSET + 31
+        ldr     \irqstat, [ \base, # VIC_IRQ_STATUS ]
+        teq     \irqstat, #0
+
+        @ otherwise try vic1
+        addeq   \tmp, \base, #(VA_VIC1 - VA_VIC0)
+        addeq   \irqnr, \irqnr, #32
+        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
+        teqeq   \irqstat, #0
+
+        @ otherwise try vic2
+        addeq   \tmp, \base, #(VA_VIC2 - VA_VIC0)
+        addeq   \irqnr, \irqnr, #32
+        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
+        teqeq   \irqstat, #0
+
+        @ otherwise try vic3
+        addeq   \tmp, \base, #(VA_VIC3 - VA_VIC0)
+        addeq   \irqnr, \irqnr, #32
+        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
+        teqeq   \irqstat, #0
+
+        clzne   \irqstat, \irqstat
+        subne   \irqnr, \irqnr, \irqstat
+        .endm
diff --git a/arch/arm/mach-s5pv210/include/mach/gpio.h b/arch/arm/mach-s5pv210/include/mach/gpio.h
new file mode 100644
index 00000000000..533b020e21e
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/gpio.h
@@ -0,0 +1,129 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/gpio.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV210 - GPIO lib support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_GPIO_H
+#define __ASM_ARCH_GPIO_H __FILE__
+
+#define gpio_get_value  __gpio_get_value
+#define gpio_set_value  __gpio_set_value
+#define gpio_cansleep   __gpio_cansleep
+#define gpio_to_irq     __gpio_to_irq
+
+/* GPIO bank sizes */
+#define S5PV210_GPIO_A0_NR      (8)
+#define S5PV210_GPIO_A1_NR      (4)
+#define S5PV210_GPIO_B_NR       (8)
+#define S5PV210_GPIO_C0_NR      (5)
+#define S5PV210_GPIO_C1_NR      (5)
+#define S5PV210_GPIO_D0_NR      (4)
+#define S5PV210_GPIO_D1_NR      (6)
+#define S5PV210_GPIO_E0_NR      (8)
+#define S5PV210_GPIO_E1_NR      (5)
+#define S5PV210_GPIO_F0_NR      (8)
+#define S5PV210_GPIO_F1_NR      (8)
+#define S5PV210_GPIO_F2_NR      (8)
+#define S5PV210_GPIO_F3_NR      (6)
+#define S5PV210_GPIO_G0_NR      (7)
+#define S5PV210_GPIO_G1_NR      (7)
+#define S5PV210_GPIO_G2_NR      (7)
+#define S5PV210_GPIO_G3_NR      (7)
+#define S5PV210_GPIO_H0_NR      (8)
+#define S5PV210_GPIO_H1_NR      (8)
+#define S5PV210_GPIO_H2_NR      (8)
+#define S5PV210_GPIO_H3_NR      (8)
+#define S5PV210_GPIO_I_NR       (7)
+#define S5PV210_GPIO_J0_NR      (8)
+#define S5PV210_GPIO_J1_NR      (6)
+#define S5PV210_GPIO_J2_NR      (8)
+#define S5PV210_GPIO_J3_NR      (8)
+#define S5PV210_GPIO_J4_NR      (5)
+
+/* GPIO bank numbers */
+
+/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
+ * space for debugging purposes so that any accidental
+ * change from one gpio bank to another can be caught.
+*/
+
+#define S5PV210_GPIO_NEXT(__gpio) \
+        ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
+
+enum s5p_gpio_number {
+        S5PV210_GPIO_A0_START   = 0,
+        S5PV210_GPIO_A1_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_A0),
+        S5PV210_GPIO_B_START    = S5PV210_GPIO_NEXT(S5PV210_GPIO_A1),
+        S5PV210_GPIO_C0_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_B),
+        S5PV210_GPIO_C1_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_C0),
+        S5PV210_GPIO_D0_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_C1),
+        S5PV210_GPIO_D1_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_D0),
+        S5PV210_GPIO_E0_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_D1),
+        S5PV210_GPIO_E1_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_E0),
+        S5PV210_GPIO_F0_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_E1),
+        S5PV210_GPIO_F1_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_F0),
+        S5PV210_GPIO_F2_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_F1),
+        S5PV210_GPIO_F3_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_F2),
+        S5PV210_GPIO_G0_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_F3),
+        S5PV210_GPIO_G1_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_G0),
+        S5PV210_GPIO_G2_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_G1),
+        S5PV210_GPIO_G3_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_G2),
+        S5PV210_GPIO_H0_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_G3),
+        S5PV210_GPIO_H1_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_H0),
+        S5PV210_GPIO_H2_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_H1),
+        S5PV210_GPIO_H3_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_H2),
+        S5PV210_GPIO_I_START    = S5PV210_GPIO_NEXT(S5PV210_GPIO_H3),
+        S5PV210_GPIO_J0_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_I),
+        S5PV210_GPIO_J1_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_J0),
+        S5PV210_GPIO_J2_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_J1),
+        S5PV210_GPIO_J3_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_J2),
+        S5PV210_GPIO_J4_START   = S5PV210_GPIO_NEXT(S5PV210_GPIO_J3),
+};
+
+/* S5PV210 GPIO number definitions */
+#define S5PV210_GPA0(_nr)       (S5PV210_GPIO_A0_START + (_nr))
+#define S5PV210_GPA1(_nr)       (S5PV210_GPIO_A1_START + (_nr))
+#define S5PV210_GPB(_nr)        (S5PV210_GPIO_B_START + (_nr))
+#define S5PV210_GPC0(_nr)       (S5PV210_GPIO_C0_START + (_nr))
+#define S5PV210_GPC1(_nr)       (S5PV210_GPIO_C1_START + (_nr))
+#define S5PV210_GPD0(_nr)       (S5PV210_GPIO_D0_START + (_nr))
+#define S5PV210_GPD1(_nr)       (S5PV210_GPIO_D1_START + (_nr))
+#define S5PV210_GPE0(_nr)       (S5PV210_GPIO_E0_START + (_nr))
+#define S5PV210_GPE1(_nr)       (S5PV210_GPIO_E1_START + (_nr))
+#define S5PV210_GPF0(_nr)       (S5PV210_GPIO_F0_START + (_nr))
+#define S5PV210_GPF1(_nr)       (S5PV210_GPIO_F1_START + (_nr))
+#define S5PV210_GPF2(_nr)       (S5PV210_GPIO_F2_START + (_nr))
+#define S5PV210_GPF3(_nr)       (S5PV210_GPIO_F3_START + (_nr))
+#define S5PV210_GPG0(_nr)       (S5PV210_GPIO_G0_START + (_nr))
+#define S5PV210_GPG1(_nr)       (S5PV210_GPIO_G1_START + (_nr))
+#define S5PV210_GPG2(_nr)       (S5PV210_GPIO_G2_START + (_nr))
+#define S5PV210_GPG3(_nr)       (S5PV210_GPIO_G3_START + (_nr))
+#define S5PV210_GPH0(_nr)       (S5PV210_GPIO_H0_START + (_nr))
+#define S5PV210_GPH1(_nr)       (S5PV210_GPIO_H1_START + (_nr))
+#define S5PV210_GPH2(_nr)       (S5PV210_GPIO_H2_START + (_nr))
+#define S5PV210_GPH3(_nr)       (S5PV210_GPIO_H3_START + (_nr))
+#define S5PV210_GPI(_nr)        (S5PV210_GPIO_I_START + (_nr))
+#define S5PV210_GPJ0(_nr)       (S5PV210_GPIO_J0_START + (_nr))
+#define S5PV210_GPJ1(_nr)       (S5PV210_GPIO_J1_START + (_nr))
+#define S5PV210_GPJ2(_nr)       (S5PV210_GPIO_J2_START + (_nr))
+#define S5PV210_GPJ3(_nr)       (S5PV210_GPIO_J3_START + (_nr))
+#define S5PV210_GPJ4(_nr)       (S5PV210_GPIO_J4_START + (_nr))
+
+/* the end of the S5PV210 specific gpios */
+#define S5PV210_GPIO_END        (S5PV210_GPJ4(S5PV210_GPIO_J4_NR) + 1)
+#define S3C_GPIO_END            S5PV210_GPIO_END
+
+/* define the number of gpios we need to the one after the GPJ4() range */
+#define ARCH_NR_GPIOS           (S5PV210_GPJ4(S5PV210_GPIO_J4_NR) +     \
+                                 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
+
+#include <asm-generic/gpio.h>
+
+#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/hardware.h b/arch/arm/mach-s5pv210/include/mach/hardware.h
new file mode 100644
index 00000000000..fada7a392d0
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/hardware.h
@@ -0,0 +1,18 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/hardware.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV210 - Hardware support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H __FILE__
+
+/* currently nothing here, placeholder */
+
+#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/io.h b/arch/arm/mach-s5pv210/include/mach/io.h
new file mode 100644
index 00000000000..5ab9d560bc8
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/io.h
@@ -0,0 +1,26 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/io.h
+ *
+ * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org>
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Based on arch/arm/mach-s5p6442/include/mach/io.h
+ *
+ * Default IO routines for S5PV210
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H __FILE__
+
+/* No current ISA/PCI bus support. */
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
+
+#define IO_SPACE_LIMIT (0xFFFFFFFF)
+
+#endif /* __ASM_ARM_ARCH_IO_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
new file mode 100644
index 00000000000..62c5175ef29
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -0,0 +1,146 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/irqs.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV210 - IRQ definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_IRQS_H
+#define __ASM_ARCH_IRQS_H __FILE__
+
+#include <plat/irqs.h>
+
+/* VIC0: System, DMA, Timer */
+
+#define IRQ_EINT0               S5P_IRQ_VIC0(0)
+#define IRQ_EINT1               S5P_IRQ_VIC0(1)
+#define IRQ_EINT2               S5P_IRQ_VIC0(2)
+#define IRQ_EINT3               S5P_IRQ_VIC0(3)
+#define IRQ_EINT4               S5P_IRQ_VIC0(4)
+#define IRQ_EINT5               S5P_IRQ_VIC0(5)
+#define IRQ_EINT6               S5P_IRQ_VIC0(6)
+#define IRQ_EINT7               S5P_IRQ_VIC0(7)
+#define IRQ_EINT8               S5P_IRQ_VIC0(8)
+#define IRQ_EINT9               S5P_IRQ_VIC0(9)
+#define IRQ_EINT10              S5P_IRQ_VIC0(10)
+#define IRQ_EINT11              S5P_IRQ_VIC0(11)
+#define IRQ_EINT12              S5P_IRQ_VIC0(12)
+#define IRQ_EINT13              S5P_IRQ_VIC0(13)
+#define IRQ_EINT14              S5P_IRQ_VIC0(14)
+#define IRQ_EINT15              S5P_IRQ_VIC0(15)
+#define IRQ_EINT16_31           S5P_IRQ_VIC0(16)
+#define IRQ_BATF                S5P_IRQ_VIC0(17)
+#define IRQ_MDMA                S5P_IRQ_VIC0(18)
+#define IRQ_PDMA0               S5P_IRQ_VIC0(19)
+#define IRQ_PDMA1               S5P_IRQ_VIC0(20)
+#define IRQ_TIMER0_VIC          S5P_IRQ_VIC0(21)
+#define IRQ_TIMER1_VIC          S5P_IRQ_VIC0(22)
+#define IRQ_TIMER2_VIC          S5P_IRQ_VIC0(23)
+#define IRQ_TIMER3_VIC          S5P_IRQ_VIC0(24)
+#define IRQ_TIMER4_VIC          S5P_IRQ_VIC0(25)
+#define IRQ_SYSTIMER            S5P_IRQ_VIC0(26)
+#define IRQ_WDT                 S5P_IRQ_VIC0(27)
+#define IRQ_RTC_ALARM           S5P_IRQ_VIC0(28)
+#define IRQ_RTC_TIC             S5P_IRQ_VIC0(29)
+#define IRQ_GPIOINT             S5P_IRQ_VIC0(30)
+#define IRQ_FIMC3               S5P_IRQ_VIC0(31)
+
+/* VIC1: ARM, Power, Memory, Connectivity, Storage */
+
+#define IRQ_CORTEX0             S5P_IRQ_VIC1(0)
+#define IRQ_CORTEX1             S5P_IRQ_VIC1(1)
+#define IRQ_CORTEX2             S5P_IRQ_VIC1(2)
+#define IRQ_CORTEX3             S5P_IRQ_VIC1(3)
+#define IRQ_CORTEX4             S5P_IRQ_VIC1(4)
+#define IRQ_IEMAPC              S5P_IRQ_VIC1(5)
+#define IRQ_IEMIEC              S5P_IRQ_VIC1(6)
+#define IRQ_ONENAND             S5P_IRQ_VIC1(7)
+#define IRQ_NFC                 S5P_IRQ_VIC1(8)
+#define IRQ_CFC                 S5P_IRQ_VIC1(9)
+#define IRQ_UART0               S5P_IRQ_VIC1(10)
+#define IRQ_UART1               S5P_IRQ_VIC1(11)
+#define IRQ_UART2               S5P_IRQ_VIC1(12)
+#define IRQ_UART3               S5P_IRQ_VIC1(13)
+#define IRQ_IIC                 S5P_IRQ_VIC1(14)
+#define IRQ_SPI0                S5P_IRQ_VIC1(15)
+#define IRQ_SPI1                S5P_IRQ_VIC1(16)
+#define IRQ_SPI2                S5P_IRQ_VIC1(17)
+#define IRQ_IRDA                S5P_IRQ_VIC1(18)
+#define IRQ_CAN0                S5P_IRQ_VIC1(19)
+#define IRQ_CAN1                S5P_IRQ_VIC1(20)
+#define IRQ_HSIRX               S5P_IRQ_VIC1(21)
+#define IRQ_HSITX               S5P_IRQ_VIC1(22)
+#define IRQ_UHOST               S5P_IRQ_VIC1(23)
+#define IRQ_OTG                 S5P_IRQ_VIC1(24)
+#define IRQ_MSM                 S5P_IRQ_VIC1(25)
+#define IRQ_HSMMC0              S5P_IRQ_VIC1(26)
+#define IRQ_HSMMC1              S5P_IRQ_VIC1(27)
+#define IRQ_HSMMC2              S5P_IRQ_VIC1(28)
+#define IRQ_MIPICSI             S5P_IRQ_VIC1(29)
+#define IRQ_MIPIDSI             S5P_IRQ_VIC1(30)
+#define IRQ_ONENAND_AUDI        S5P_IRQ_VIC1(31)
+
+/* VIC2: Multimedia, Audio, Security */
+
+#define IRQ_LCD0                S5P_IRQ_VIC2(0)
+#define IRQ_LCD1                S5P_IRQ_VIC2(1)
+#define IRQ_LCD2                S5P_IRQ_VIC2(2)
+#define IRQ_LCD3                S5P_IRQ_VIC2(3)
+#define IRQ_ROTATOR             S5P_IRQ_VIC2(4)
+#define IRQ_FIMC0               S5P_IRQ_VIC2(5)
+#define IRQ_FIMC1               S5P_IRQ_VIC2(6)
+#define IRQ_FIMC2               S5P_IRQ_VIC2(7)
+#define IRQ_JPEG                S5P_IRQ_VIC2(8)
+#define IRQ_2D                  S5P_IRQ_VIC2(9)
+#define IRQ_3D                  S5P_IRQ_VIC2(10)
+#define IRQ_MIXER               S5P_IRQ_VIC2(11)
+#define IRQ_HDMI                S5P_IRQ_VIC2(12)
+#define IRQ_IIC1                S5P_IRQ_VIC2(13)
+#define IRQ_MFC                 S5P_IRQ_VIC2(14)
+#define IRQ_TVENC               S5P_IRQ_VIC2(15)
+#define IRQ_I2S0                S5P_IRQ_VIC2(16)
+#define IRQ_I2S1                S5P_IRQ_VIC2(17)
+#define IRQ_I2S2                S5P_IRQ_VIC2(18)
+#define IRQ_AC97                S5P_IRQ_VIC2(19)
+#define IRQ_PCM0                S5P_IRQ_VIC2(20)
+#define IRQ_PCM1                S5P_IRQ_VIC2(21)
+#define IRQ_SPDIF               S5P_IRQ_VIC2(22)
+#define IRQ_ADC                 S5P_IRQ_VIC2(23)
+#define IRQ_PENDN               S5P_IRQ_VIC2(24)
+#define IRQ_TC                  IRQ_PENDN
+#define IRQ_KEYPAD              S5P_IRQ_VIC2(25)
+#define IRQ_CG                  S5P_IRQ_VIC2(26)
+#define IRQ_SEC                 S5P_IRQ_VIC2(27)
+#define IRQ_SECRX               S5P_IRQ_VIC2(28)
+#define IRQ_SECTX               S5P_IRQ_VIC2(29)
+#define IRQ_SDMIRQ              S5P_IRQ_VIC2(30)
+#define IRQ_SDMFIQ              S5P_IRQ_VIC2(31)
+
+/* VIC3: Etc */
+
+#define IRQ_IPC                 S5P_IRQ_VIC3(0)
+#define IRQ_HOSTIF              S5P_IRQ_VIC3(1)
+#define IRQ_MMC3                S5P_IRQ_VIC3(2)
+#define IRQ_CEC                 S5P_IRQ_VIC3(3)
+#define IRQ_TSI                 S5P_IRQ_VIC3(4)
+#define IRQ_MDNIE0              S5P_IRQ_VIC3(5)
+#define IRQ_MDNIE1              S5P_IRQ_VIC3(6)
+#define IRQ_MDNIE2              S5P_IRQ_VIC3(7)
+#define IRQ_MDNIE3              S5P_IRQ_VIC3(8)
+#define IRQ_VIC_END             S5P_IRQ_VIC3(31)
+
+#define S5P_IRQ_EINT_BASE       (IRQ_VIC_END + 1)
+
+#define S5P_EINT(x)             ((x) + S5P_IRQ_EINT_BASE)
+#define IRQ_EINT(x)             S5P_EINT(x)
+
+/* Set the default NR_IRQS */
+
+#define NR_IRQS                 (IRQ_EINT(31) + 1)
+
+#endif /* ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
new file mode 100644
index 00000000000..c22694c8231
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -0,0 +1,65 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/map.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV210 - Memory map definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_MAP_H
+#define __ASM_ARCH_MAP_H __FILE__
+
+#include <plat/map-base.h>
+#include <plat/map-s5p.h>
+
+#define S5PV210_PA_CHIPID       (0xE0000000)
+#define S5P_PA_CHIPID           S5PV210_PA_CHIPID
+
+#define S5PV210_PA_SYSCON       (0xE0100000)
+#define S5P_PA_SYSCON           S5PV210_PA_SYSCON
+
+#define S5PV210_PA_GPIO         (0xE0200000)
+#define S5P_PA_GPIO             S5PV210_PA_GPIO
+
+#define S5PV210_PA_IIC0         (0xE1800000)
+
+#define S5PV210_PA_TIMER        (0xE2500000)
+#define S5P_PA_TIMER            S5PV210_PA_TIMER
+
+#define S5PV210_PA_SYSTIMER     (0xE2600000)
+
+#define S5PV210_PA_UART         (0xE2900000)
+
+#define S5P_PA_UART0            (S5PV210_PA_UART + 0x0)
+#define S5P_PA_UART1            (S5PV210_PA_UART + 0x400)
+#define S5P_PA_UART2            (S5PV210_PA_UART + 0x800)
+#define S5P_PA_UART3            (S5PV210_PA_UART + 0xC00)
+
+#define S5P_SZ_UART             SZ_256
+
+#define S5PV210_PA_SROMC        (0xE8000000)
+
+#define S5PV210_PA_VIC0         (0xF2000000)
+#define S5P_PA_VIC0             S5PV210_PA_VIC0
+
+#define S5PV210_PA_VIC1         (0xF2100000)
+#define S5P_PA_VIC1             S5PV210_PA_VIC1
+
+#define S5PV210_PA_VIC2         (0xF2200000)
+#define S5P_PA_VIC2             S5PV210_PA_VIC2
+
+#define S5PV210_PA_VIC3         (0xF2300000)
+#define S5P_PA_VIC3             S5PV210_PA_VIC3
+
+#define S5PV210_PA_SDRAM        (0x20000000)
+#define S5P_PA_SDRAM            S5PV210_PA_SDRAM
+
+/* compatibiltiy defines. */
+#define S3C_PA_UART             S5PV210_PA_UART
+#define S3C_PA_IIC              S5PV210_PA_IIC0
+
+#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/memory.h b/arch/arm/mach-s5pv210/include/mach/memory.h
new file mode 100644
index 00000000000..379117e2760
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/memory.h
@@ -0,0 +1,23 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/memory.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV210 - Memory definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+#define PHYS_OFFSET             UL(0x20000000)
+#define CONSISTENT_DMA_SIZE     (SZ_8M + SZ_4M + SZ_2M)
+
+/* Maximum of 256MiB in one bank */
+#define MAX_PHYSMEM_BITS        32
+#define SECTION_SIZE_BITS       28
+
+#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/pwm-clock.h b/arch/arm/mach-s5pv210/include/mach/pwm-clock.h
new file mode 100644
index 00000000000..69027fea987
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/pwm-clock.h
@@ -0,0 +1,69 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/pwm-clock.h
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Based on arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
+ *
+ * S5PV210 - pwm clock and timer support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_PWMCLK_H
+#define __ASM_ARCH_PWMCLK_H __FILE__
+
+/**
+ * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
+ * @cfg: The timer TCFG1 register bits shifted down to 0.
+ *
+ * Return true if the given configuration from TCFG1 is a TCLK instead
+ * any of the TDIV clocks.
+ */
+static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
+{
+        return tcfg == S3C2410_TCFG1_MUX_TCLK;
+}
+
+/**
+ * tcfg_to_divisor() - convert tcfg1 setting to a divisor
+ * @tcfg1: The tcfg1 setting, shifted down.
+ *
+ * Get the divisor value for the given tcfg1 setting. We assume the
+ * caller has already checked to see if this is not a TCLK source.
+ */
+static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
+{
+        return 1 << (1 + tcfg1);
+}
+
+/**
+ * pwm_tdiv_has_div1() - does the tdiv setting have a /1
+ *
+ * Return true if we have a /1 in the tdiv setting.
+ */
+static inline unsigned int pwm_tdiv_has_div1(void)
+{
+        return 0;
+}
+
+/**
+ * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
+ * @div: The divisor to calculate the bit information for.
+ *
+ * Turn a divisor into the necessary bit field for TCFG1.
+ */
+static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
+{
+        return ilog2(div) - 1;
+}
+
+#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK
+
+#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
new file mode 100644
index 00000000000..e56e0e4673e
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
@@ -0,0 +1,169 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/regs-clock.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV210 - Clock register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_CLOCK_H
+#define __ASM_ARCH_REGS_CLOCK_H __FILE__
+
+#include <mach/map.h>
+
+#define S5P_CLKREG(x)           (S3C_VA_SYS + (x))
+
+#define S5P_APLL_LOCK           S5P_CLKREG(0x00)
+#define S5P_MPLL_LOCK           S5P_CLKREG(0x08)
+#define S5P_EPLL_LOCK           S5P_CLKREG(0x10)
+#define S5P_VPLL_LOCK           S5P_CLKREG(0x20)
+
+#define S5P_APLL_CON            S5P_CLKREG(0x100)
+#define S5P_MPLL_CON            S5P_CLKREG(0x108)
+#define S5P_EPLL_CON            S5P_CLKREG(0x110)
+#define S5P_VPLL_CON            S5P_CLKREG(0x120)
+
+#define S5P_CLK_SRC0            S5P_CLKREG(0x200)
+#define S5P_CLK_SRC1            S5P_CLKREG(0x204)
+#define S5P_CLK_SRC2            S5P_CLKREG(0x208)
+#define S5P_CLK_SRC3            S5P_CLKREG(0x20C)
+#define S5P_CLK_SRC4            S5P_CLKREG(0x210)
+#define S5P_CLK_SRC5            S5P_CLKREG(0x214)
+#define S5P_CLK_SRC6            S5P_CLKREG(0x218)
+
+#define S5P_CLK_SRC_MASK0       S5P_CLKREG(0x280)
+#define S5P_CLK_SRC_MASK1       S5P_CLKREG(0x284)
+
+#define S5P_CLK_DIV0            S5P_CLKREG(0x300)
+#define S5P_CLK_DIV1            S5P_CLKREG(0x304)
+#define S5P_CLK_DIV2            S5P_CLKREG(0x308)
+#define S5P_CLK_DIV3            S5P_CLKREG(0x30C)
+#define S5P_CLK_DIV4            S5P_CLKREG(0x310)
+#define S5P_CLK_DIV5            S5P_CLKREG(0x314)
+#define S5P_CLK_DIV6            S5P_CLKREG(0x318)
+#define S5P_CLK_DIV7            S5P_CLKREG(0x31C)
+
+#define S5P_CLKGATE_MAIN0       S5P_CLKREG(0x400)
+#define S5P_CLKGATE_MAIN1       S5P_CLKREG(0x404)
+#define S5P_CLKGATE_MAIN2       S5P_CLKREG(0x408)
+
+#define S5P_CLKGATE_PERI0       S5P_CLKREG(0x420)
+#define S5P_CLKGATE_PERI1       S5P_CLKREG(0x424)
+
+#define S5P_CLKGATE_SCLK0       S5P_CLKREG(0x440)
+#define S5P_CLKGATE_SCLK1       S5P_CLKREG(0x444)
+#define S5P_CLKGATE_IP0         S5P_CLKREG(0x460)
+#define S5P_CLKGATE_IP1         S5P_CLKREG(0x464)
+#define S5P_CLKGATE_IP2         S5P_CLKREG(0x468)
+#define S5P_CLKGATE_IP3         S5P_CLKREG(0x46C)
+#define S5P_CLKGATE_IP4         S5P_CLKREG(0x470)
+
+#define S5P_CLKGATE_BLOCK       S5P_CLKREG(0x480)
+#define S5P_CLKGATE_BUS0        S5P_CLKREG(0x484)
+#define S5P_CLKGATE_BUS1        S5P_CLKREG(0x488)
+#define S5P_CLK_OUT             S5P_CLKREG(0x500)
+
+/* CLKSRC0 */
+#define S5P_CLKSRC0_MUX200_MASK         (0x1<<16)
+#define S5P_CLKSRC0_MUX166_MASK         (0x1<<20)
+#define S5P_CLKSRC0_MUX133_MASK         (0x1<<24)
+
+/* CLKDIV0 */
+#define S5P_CLKDIV0_APLL_SHIFT          (0)
+#define S5P_CLKDIV0_APLL_MASK           (0x7 << S5P_CLKDIV0_APLL_SHIFT)
+#define S5P_CLKDIV0_A2M_SHIFT           (4)
+#define S5P_CLKDIV0_A2M_MASK            (0x7 << S5P_CLKDIV0_A2M_SHIFT)
+#define S5P_CLKDIV0_HCLK200_SHIFT       (8)
+#define S5P_CLKDIV0_HCLK200_MASK        (0x7 << S5P_CLKDIV0_HCLK200_SHIFT)
+#define S5P_CLKDIV0_PCLK100_SHIFT       (12)
+#define S5P_CLKDIV0_PCLK100_MASK        (0x7 << S5P_CLKDIV0_PCLK100_SHIFT)
+#define S5P_CLKDIV0_HCLK166_SHIFT       (16)
+#define S5P_CLKDIV0_HCLK166_MASK        (0xF << S5P_CLKDIV0_HCLK166_SHIFT)
+#define S5P_CLKDIV0_PCLK83_SHIFT        (20)
+#define S5P_CLKDIV0_PCLK83_MASK         (0x7 << S5P_CLKDIV0_PCLK83_SHIFT)
+#define S5P_CLKDIV0_HCLK133_SHIFT       (24)
+#define S5P_CLKDIV0_HCLK133_MASK        (0xF << S5P_CLKDIV0_HCLK133_SHIFT)
+#define S5P_CLKDIV0_PCLK66_SHIFT        (28)
+#define S5P_CLKDIV0_PCLK66_MASK         (0x7 << S5P_CLKDIV0_PCLK66_SHIFT)
+
+/* Registers related to power management */
+#define S5P_PWR_CFG             S5P_CLKREG(0xC000)
+#define S5P_EINT_WAKEUP_MASK    S5P_CLKREG(0xC004)
+#define S5P_WAKEUP_MASK         S5P_CLKREG(0xC008)
+#define S5P_PWR_MODE            S5P_CLKREG(0xC00C)
+#define S5P_NORMAL_CFG          S5P_CLKREG(0xC010)
+#define S5P_IDLE_CFG            S5P_CLKREG(0xC020)
+#define S5P_STOP_CFG            S5P_CLKREG(0xC030)
+#define S5P_STOP_MEM_CFG        S5P_CLKREG(0xC034)
+#define S5P_SLEEP_CFG           S5P_CLKREG(0xC040)
+
+#define S5P_OSC_FREQ            S5P_CLKREG(0xC100)
+#define S5P_OSC_STABLE          S5P_CLKREG(0xC104)
+#define S5P_PWR_STABLE          S5P_CLKREG(0xC108)
+#define S5P_MTC_STABLE          S5P_CLKREG(0xC110)
+#define S5P_CLAMP_STABLE        S5P_CLKREG(0xC114)
+
+#define S5P_WAKEUP_STAT         S5P_CLKREG(0xC200)
+#define S5P_BLK_PWR_STAT        S5P_CLKREG(0xC204)
+
+#define S5P_OTHERS              S5P_CLKREG(0xE000)
+#define S5P_OM_STAT             S5P_CLKREG(0xE100)
+#define S5P_USB_PHY_CONTROL     S5P_CLKREG(0xE80C)
+#define S5P_DAC_CONTROL         S5P_CLKREG(0xE810)
+
+#define S5P_INFORM0             S5P_CLKREG(0xF000)
+#define S5P_INFORM1             S5P_CLKREG(0xF004)
+#define S5P_INFORM2             S5P_CLKREG(0xF008)
+#define S5P_INFORM3             S5P_CLKREG(0xF00C)
+#define S5P_INFORM4             S5P_CLKREG(0xF010)
+#define S5P_INFORM5             S5P_CLKREG(0xF014)
+#define S5P_INFORM6             S5P_CLKREG(0xF018)
+#define S5P_INFORM7             S5P_CLKREG(0xF01C)
+
+#define S5P_RST_STAT            S5P_CLKREG(0xA000)
+#define S5P_OSC_CON             S5P_CLKREG(0x8000)
+#define S5P_MIPI_PHY_CON0       S5P_CLKREG(0x7200)
+#define S5P_MIPI_PHY_CON1       S5P_CLKREG(0x7204)
+#define S5P_MIPI_CONTROL        S5P_CLKREG(0xE814)
+
+#define S5P_IDLE_CFG_TL_MASK    (3 << 30)
+#define S5P_IDLE_CFG_TM_MASK    (3 << 28)
+#define S5P_IDLE_CFG_TL_ON      (2 << 30)
+#define S5P_IDLE_CFG_TM_ON      (2 << 28)
+#define S5P_IDLE_CFG_DIDLE      (1 << 0)
+
+#define S5P_CFG_WFI_CLEAN               (~(3 << 8))
+#define S5P_CFG_WFI_IDLE                (1 << 8)
+#define S5P_CFG_WFI_STOP                (2 << 8)
+#define S5P_CFG_WFI_SLEEP               (3 << 8)
+
+#define S5P_OTHER_SYS_INT               24
+#define S5P_OTHER_STA_TYPE              23
+#define S5P_OTHER_SYSC_INTOFF           (1 << 0)
+#define STA_TYPE_EXPON                  0
+#define STA_TYPE_SFR                    1
+
+#define S5P_PWR_STA_EXP_SCALE           0
+#define S5P_PWR_STA_CNT                 4
+
+#define S5P_PWR_STABLE_COUNT            85500
+
+#define S5P_SLEEP_CFG_OSC_EN            (1 << 0)
+#define S5P_SLEEP_CFG_USBOSC_EN         (1 << 1)
+
+/* OTHERS Resgister */
+#define S5P_OTHERS_USB_SIG_MASK         (1 << 16)
+#define S5P_OTHERS_MIPI_DPHY_EN         (1 << 28)
+
+/* MIPI */
+#define S5P_MIPI_DPHY_EN                (3)
+
+/* S5P_DAC_CONTROL */
+#define S5P_DAC_ENABLE                  (1)
+#define S5P_DAC_DISABLE                 (0)
+
+#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-irq.h b/arch/arm/mach-s5pv210/include/mach/regs-irq.h
new file mode 100644
index 00000000000..5c3b104a7c8
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/regs-irq.h
@@ -0,0 +1,19 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/regs-irq.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV210 - IRQ register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_IRQ_H
+#define __ASM_ARCH_REGS_IRQ_H __FILE__
+
+#include <asm/hardware/vic.h>
+#include <mach/map.h>
+
+#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/system.h b/arch/arm/mach-s5pv210/include/mach/system.h
new file mode 100644
index 00000000000..1ca04d5025b
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/system.h
@@ -0,0 +1,26 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/system.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV210 - system support header
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_SYSTEM_H
+#define __ASM_ARCH_SYSTEM_H __FILE__
+
+static void arch_idle(void)
+{
+        /* nothing here yet */
+}
+
+static void arch_reset(char mode, const char *cmd)
+{
+        /* nothing here yet */
+}
+
+#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/tick.h b/arch/arm/mach-s5pv210/include/mach/tick.h
new file mode 100644
index 00000000000..7993b3603cc
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/tick.h
@@ -0,0 +1,26 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/tick.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Based on arch/arm/mach-s3c6400/include/mach/tick.h
+ *
+ * S5PV210 - Timer tick support definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_TICK_H
+#define __ASM_ARCH_TICK_H __FILE__
+
+static inline u32 s3c24xx_ostimer_pending(void)
+{
+        u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
+        return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
+}
+
+#define TICK_MAX        (0xffffffff)
+
+#endif /* __ASM_ARCH_TICK_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/timex.h b/arch/arm/mach-s5pv210/include/mach/timex.h
new file mode 100644
index 00000000000..73dc85496a8
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/timex.h
@@ -0,0 +1,29 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/timex.h
+ *
+ * Copyright (c) 2003-2010 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Based on arch/arm/mach-s5p6442/include/mach/timex.h
+ *
+ * S5PV210 - time parameters
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H __FILE__
+
+/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
+ * a variable is useless. It seems as long as we make our timers an
+ * exact multiple of HZ, any value that makes a 1->1 correspondence
+ * for the time conversion functions to/from jiffies is acceptable.
+*/
+
+#define CLOCK_TICK_RATE 12000000
+
+#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/uncompress.h b/arch/arm/mach-s5pv210/include/mach/uncompress.h
new file mode 100644
index 00000000000..08ff2fda1fb
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/uncompress.h
@@ -0,0 +1,24 @@
+/* linux/arch/arm/mach-s5pv210/include/mach/uncompress.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5PV210 - uncompress code
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_UNCOMPRESS_H
+#define __ASM_ARCH_UNCOMPRESS_H
+
+#include <mach/map.h>
+#include <plat/uncompress.h>
+
+static void arch_detect_cpu(void)
+{
+        /* we do not need to do any cpu detection here at the moment. */
+}
+
+#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/vmalloc.h b/arch/arm/mach-s5pv210/include/mach/vmalloc.h
new file mode 100644
index 00000000000..58f515e0747
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/vmalloc.h
@@ -0,0 +1,22 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/vmalloc.h
+ *
+ * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Based on arch/arm/mach-s5p6442/include/mach/vmalloc.h
+ *
+ * S5PV210 vmalloc definition
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_VMALLOC_H
+#define __ASM_ARCH_VMALLOC_H __FILE__
+
+#define VMALLOC_END       (0xE0000000)
+
+#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5pv210/init.c b/arch/arm/mach-s5pv210/init.c
new file mode 100644
index 00000000000..4865ae2c475
--- /dev/null
+++ b/arch/arm/mach-s5pv210/init.c
@@ -0,0 +1,44 @@
+/* linux/arch/arm/mach-s5pv210/init.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/serial_core.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/s5pv210.h>
+#include <plat/regs-serial.h>
+
+static struct s3c24xx_uart_clksrc s5pv210_serial_clocks[] = {
+        [0] = {
+                .name           = "pclk",
+                .divisor        = 1,
+                .min_baud       = 0,
+                .max_baud       = 0,
+        },
+};
+
+/* uart registration process */
+void __init s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        struct s3c2410_uartcfg *tcfg = cfg;
+        u32 ucnt;
+
+        for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
+                if (!tcfg->clocks) {
+                        tcfg->clocks = s5pv210_serial_clocks;
+                        tcfg->clocks_size = ARRAY_SIZE(s5pv210_serial_clocks);
+                }
+        }
+
+        s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
+}
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
new file mode 100644
index 00000000000..ab4869df30c
--- /dev/null
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -0,0 +1,98 @@
+/* linux/arch/arm/mach-s5pv210/mach-smdkc110.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/serial_core.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+
+#include <plat/regs-serial.h>
+#include <plat/s5pv210.h>
+#include <plat/devs.h>
+#include <plat/cpu.h>
+
+/* Following are default values for UCON, ULCON and UFCON UART registers */
+#define S5PV210_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |        \
+                                 S3C2410_UCON_RXILEVEL |        \
+                                 S3C2410_UCON_TXIRQMODE |       \
+                                 S3C2410_UCON_RXIRQMODE |       \
+                                 S3C2410_UCON_RXFIFO_TOI |      \
+                                 S3C2443_UCON_RXERR_IRQEN)
+
+#define S5PV210_ULCON_DEFAULT   S3C2410_LCON_CS8
+
+#define S5PV210_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |       \
+                                 S5PV210_UFCON_TXTRIG4 |        \
+                                 S5PV210_UFCON_RXTRIG4)
+
+static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
+        [0] = {
+                .hwport         = 0,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+        [1] = {
+                .hwport         = 1,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+        [2] = {
+                .hwport         = 2,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+        [3] = {
+                .hwport         = 3,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+};
+
+static struct platform_device *smdkc110_devices[] __initdata = {
+};
+
+static void __init smdkc110_map_io(void)
+{
+        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        s3c24xx_init_clocks(24000000);
+        s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
+}
+
+static void __init smdkc110_machine_init(void)
+{
+        platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices));
+}
+
+MACHINE_START(SMDKC110, "SMDKC110")
+        /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
+        .phys_io        = S3C_PA_UART & 0xfff00000,
+        .io_pg_offst    = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
+        .boot_params    = S5P_PA_SDRAM + 0x100,
+        .init_irq       = s5pv210_init_irq,
+        .map_io         = smdkc110_map_io,
+        .init_machine   = smdkc110_machine_init,
+        .timer          = &s3c24xx_timer,
+MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
new file mode 100644
index 00000000000..a2788325320
--- /dev/null
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -0,0 +1,98 @@
+/* linux/arch/arm/mach-s5pv210/mach-smdkv210.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/serial_core.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+
+#include <plat/regs-serial.h>
+#include <plat/s5pv210.h>
+#include <plat/devs.h>
+#include <plat/cpu.h>
+
+/* Following are default values for UCON, ULCON and UFCON UART registers */
+#define S5PV210_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |        \
+                                 S3C2410_UCON_RXILEVEL |        \
+                                 S3C2410_UCON_TXIRQMODE |       \
+                                 S3C2410_UCON_RXIRQMODE |       \
+                                 S3C2410_UCON_RXFIFO_TOI |      \
+                                 S3C2443_UCON_RXERR_IRQEN)
+
+#define S5PV210_ULCON_DEFAULT   S3C2410_LCON_CS8
+
+#define S5PV210_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |       \
+                                 S5PV210_UFCON_TXTRIG4 |        \
+                                 S5PV210_UFCON_RXTRIG4)
+
+static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
+        [0] = {
+                .hwport         = 0,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+        [1] = {
+                .hwport         = 1,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+        [2] = {
+                .hwport         = 2,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+        [3] = {
+                .hwport         = 3,
+                .flags          = 0,
+                .ucon           = S5PV210_UCON_DEFAULT,
+                .ulcon          = S5PV210_ULCON_DEFAULT,
+                .ufcon          = S5PV210_UFCON_DEFAULT,
+        },
+};
+
+static struct platform_device *smdkv210_devices[] __initdata = {
+};
+
+static void __init smdkv210_map_io(void)
+{
+        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        s3c24xx_init_clocks(24000000);
+        s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
+}
+
+static void __init smdkv210_machine_init(void)
+{
+        platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
+}
+
+MACHINE_START(SMDKV210, "SMDKV210")
+        /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
+        .phys_io        = S3C_PA_UART & 0xfff00000,
+        .io_pg_offst    = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
+        .boot_params    = S5P_PA_SDRAM + 0x100,
+        .init_irq       = s5pv210_init_irq,
+        .map_io         = smdkv210_map_io,
+        .init_machine   = smdkv210_machine_init,
+        .timer          = &s3c24xx_timer,
+MACHINE_END
diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c
index 051ec0f0023..259cb2c15ff 100644
--- a/arch/arm/mach-sa1100/badge4.c
+++ b/arch/arm/mach-sa1100/badge4.c
@@ -51,6 +51,10 @@ static struct resource sa1111_resources[] = {
         },
 };
 
+static struct sa1111_platform_data sa1111_info = {
+        .irq_base       = IRQ_BOARD_END,
+};
+
 static u64 sa1111_dmamask = 0xffffffffUL;
 
 static struct platform_device sa1111_device = {
@@ -59,6 +63,7 @@ static struct platform_device sa1111_device = {
         .dev            = {
                 .dma_mask = &sa1111_dmamask,
                 .coherent_dma_mask = 0xffffffff,
+                .platform_data = &sa1111_info,
         },
         .num_resources  = ARRAY_SIZE(sa1111_resources),
         .resource       = sa1111_resources,
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index 9982c5c28ed..5d5f330c5d9 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -234,6 +234,10 @@ static struct resource locomo_resources[] = {
         },
 };
 
+static struct locomo_platform_data locomo_info = {
+        .irq_base       = IRQ_BOARD_START,
+};
+
 struct platform_device collie_locomo_device = {
         .name           = "locomo",
         .id             = 0,
diff --git a/arch/arm/mach-sa1100/include/mach/collie.h b/arch/arm/mach-sa1100/include/mach/collie.h
index 71a0b3fdcc8..52acda7061b 100644
--- a/arch/arm/mach-sa1100/include/mach/collie.h
+++ b/arch/arm/mach-sa1100/include/mach/collie.h
@@ -72,13 +72,6 @@
 #define COLLIE_IRQ_GPIO_GA_INT          IRQ_GPIO25
 #define COLLIE_IRQ_GPIO_MAIN_BAT_LOW    IRQ_GPIO26
 
-#define COLLIE_LCM_IRQ_GPIO_RTS         IRQ_LOCOMO_GPIO0
-#define COLLIE_LCM_IRQ_GPIO_CTS         IRQ_LOCOMO_GPIO1
-#define COLLIE_LCM_IRQ_GPIO_DSR         IRQ_LOCOMO_GPIO2
-#define COLLIE_LCM_IRQ_GPIO_DTR         IRQ_LOCOMO_GPIO3
-#define COLLIE_LCM_IRQ_GPIO_nSD_DETECT  IRQ_LOCOMO_GPIO13
-#define COLLIE_LCM_IRQ_GPIO_nSD_WP      IRQ_LOCOMO_GPIO14
-
 /* GPIO's on the TC35143AF (Toshiba Analog Frontend) */
 #define COLLIE_TC35143_GPIO_BASE        (GPIO_MAX + 13)
 #define COLLIE_TC35143_GPIO_VERSION0    UCB_IO_0
diff --git a/arch/arm/mach-sa1100/include/mach/irqs.h b/arch/arm/mach-sa1100/include/mach/irqs.h
index ae81f80b0cf..8c8845b5ae5 100644
--- a/arch/arm/mach-sa1100/include/mach/irqs.h
+++ b/arch/arm/mach-sa1100/include/mach/irqs.h
@@ -68,93 +68,17 @@
 #define IRQ_BOARD_START         49
 #define IRQ_BOARD_END           65
 
-#define IRQ_SA1111_START        (IRQ_BOARD_END)
-#define IRQ_GPAIN0              (IRQ_BOARD_END + 0)
-#define IRQ_GPAIN1              (IRQ_BOARD_END + 1)
-#define IRQ_GPAIN2              (IRQ_BOARD_END + 2)
-#define IRQ_GPAIN3              (IRQ_BOARD_END + 3)
-#define IRQ_GPBIN0              (IRQ_BOARD_END + 4)
-#define IRQ_GPBIN1              (IRQ_BOARD_END + 5)
-#define IRQ_GPBIN2              (IRQ_BOARD_END + 6)
-#define IRQ_GPBIN3              (IRQ_BOARD_END + 7)
-#define IRQ_GPBIN4              (IRQ_BOARD_END + 8)
-#define IRQ_GPBIN5              (IRQ_BOARD_END + 9)
-#define IRQ_GPCIN0              (IRQ_BOARD_END + 10)
-#define IRQ_GPCIN1              (IRQ_BOARD_END + 11)
-#define IRQ_GPCIN2              (IRQ_BOARD_END + 12)
-#define IRQ_GPCIN3              (IRQ_BOARD_END + 13)
-#define IRQ_GPCIN4              (IRQ_BOARD_END + 14)
-#define IRQ_GPCIN5              (IRQ_BOARD_END + 15)
-#define IRQ_GPCIN6              (IRQ_BOARD_END + 16)
-#define IRQ_GPCIN7              (IRQ_BOARD_END + 17)
-#define IRQ_MSTXINT             (IRQ_BOARD_END + 18)
-#define IRQ_MSRXINT             (IRQ_BOARD_END + 19)
-#define IRQ_MSSTOPERRINT        (IRQ_BOARD_END + 20)
-#define IRQ_TPTXINT             (IRQ_BOARD_END + 21)
-#define IRQ_TPRXINT             (IRQ_BOARD_END + 22)
-#define IRQ_TPSTOPERRINT        (IRQ_BOARD_END + 23)
-#define SSPXMTINT               (IRQ_BOARD_END + 24)
-#define SSPRCVINT               (IRQ_BOARD_END + 25)
-#define SSPROR                  (IRQ_BOARD_END + 26)
-#define AUDXMTDMADONEA          (IRQ_BOARD_END + 32)
-#define AUDRCVDMADONEA          (IRQ_BOARD_END + 33)
-#define AUDXMTDMADONEB          (IRQ_BOARD_END + 34)
-#define AUDRCVDMADONEB          (IRQ_BOARD_END + 35)
-#define AUDTFSR                 (IRQ_BOARD_END + 36)
-#define AUDRFSR                 (IRQ_BOARD_END + 37)
-#define AUDTUR                  (IRQ_BOARD_END + 38)
-#define AUDROR                  (IRQ_BOARD_END + 39)
-#define AUDDTS                  (IRQ_BOARD_END + 40)
-#define AUDRDD                  (IRQ_BOARD_END + 41)
-#define AUDSTO                  (IRQ_BOARD_END + 42)
-#define IRQ_USBPWR              (IRQ_BOARD_END + 43)
-#define IRQ_HCIM                (IRQ_BOARD_END + 44)
-#define IRQ_HCIBUFFACC          (IRQ_BOARD_END + 45)
-#define IRQ_HCIRMTWKP           (IRQ_BOARD_END + 46)
-#define IRQ_NHCIMFCIR           (IRQ_BOARD_END + 47)
-#define IRQ_USB_PORT_RESUME     (IRQ_BOARD_END + 48)
-#define IRQ_S0_READY_NINT       (IRQ_BOARD_END + 49)
-#define IRQ_S1_READY_NINT       (IRQ_BOARD_END + 50)
-#define IRQ_S0_CD_VALID         (IRQ_BOARD_END + 51)
-#define IRQ_S1_CD_VALID         (IRQ_BOARD_END + 52)
-#define IRQ_S0_BVD1_STSCHG      (IRQ_BOARD_END + 53)
-#define IRQ_S1_BVD1_STSCHG      (IRQ_BOARD_END + 54)
-
-#define IRQ_LOCOMO_START        (IRQ_BOARD_END)
-#define IRQ_LOCOMO_KEY          (IRQ_BOARD_END + 0)
-#define IRQ_LOCOMO_GPIO0        (IRQ_BOARD_END + 1)
-#define IRQ_LOCOMO_GPIO1        (IRQ_BOARD_END + 2)
-#define IRQ_LOCOMO_GPIO2        (IRQ_BOARD_END + 3)
-#define IRQ_LOCOMO_GPIO3        (IRQ_BOARD_END + 4)
-#define IRQ_LOCOMO_GPIO4        (IRQ_BOARD_END + 5)
-#define IRQ_LOCOMO_GPIO5        (IRQ_BOARD_END + 6)
-#define IRQ_LOCOMO_GPIO6        (IRQ_BOARD_END + 7)
-#define IRQ_LOCOMO_GPIO7        (IRQ_BOARD_END + 8)
-#define IRQ_LOCOMO_GPIO8        (IRQ_BOARD_END + 9)
-#define IRQ_LOCOMO_GPIO9        (IRQ_BOARD_END + 10)
-#define IRQ_LOCOMO_GPIO10       (IRQ_BOARD_END + 11)
-#define IRQ_LOCOMO_GPIO11       (IRQ_BOARD_END + 12)
-#define IRQ_LOCOMO_GPIO12       (IRQ_BOARD_END + 13)
-#define IRQ_LOCOMO_GPIO13       (IRQ_BOARD_END + 14)
-#define IRQ_LOCOMO_GPIO14       (IRQ_BOARD_END + 15)
-#define IRQ_LOCOMO_GPIO15       (IRQ_BOARD_END + 16)
-#define IRQ_LOCOMO_LT           (IRQ_BOARD_END + 17)
-#define IRQ_LOCOMO_SPI_RFR      (IRQ_BOARD_END + 18)
-#define IRQ_LOCOMO_SPI_RFW      (IRQ_BOARD_END + 19)
-#define IRQ_LOCOMO_SPI_REND     (IRQ_BOARD_END + 20)
-#define IRQ_LOCOMO_SPI_TEND     (IRQ_BOARD_END + 21)
-
 /*
  * Figure out the MAX IRQ number.
  *
  * If we have an SA1111, the max IRQ is S1_BVD1_STSCHG+1.
- * If we have an LoCoMo, the max IRQ is IRQ_LOCOMO_SPI_TEND+1
+ * If we have an LoCoMo, the max IRQ is IRQ_BOARD_START + 4
  * Otherwise, we have the standard IRQs only.
  */
 #ifdef CONFIG_SA1111
-#define NR_IRQS                 (IRQ_S1_BVD1_STSCHG + 1)
-#elif defined(CONFIG_SHARP_LOCOMO)
-#define NR_IRQS                 (IRQ_LOCOMO_SPI_TEND + 1)
+#define NR_IRQS                 (IRQ_BOARD_END + 55)
+#elif defined(CONFIG_SHARPSL_LOCOMO)
+#define NR_IRQS                 (IRQ_BOARD_START + 4)
 #else
 #define NR_IRQS                 (IRQ_BOARD_START)
 #endif
@@ -166,10 +90,3 @@
 #define IRQ_NEPONSET_SMC9196    (IRQ_BOARD_START + 0)
 #define IRQ_NEPONSET_USAR       (IRQ_BOARD_START + 1)
 #define IRQ_NEPONSET_SA1111     (IRQ_BOARD_START + 2)
-
-/* LoCoMo Interrupts (CONFIG_SHARP_LOCOMO) */
-#define IRQ_LOCOMO_KEY_BASE     (IRQ_BOARD_START + 0)
-#define IRQ_LOCOMO_GPIO_BASE    (IRQ_BOARD_START + 1)
-#define IRQ_LOCOMO_LT_BASE      (IRQ_BOARD_START + 2)
-#define IRQ_LOCOMO_SPI_BASE     (IRQ_BOARD_START + 3)
-
diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c
index 13ebd2d99bf..d3ec620618f 100644
--- a/arch/arm/mach-sa1100/jornada720.c
+++ b/arch/arm/mach-sa1100/jornada720.c
@@ -208,6 +208,10 @@ static struct resource sa1111_resources[] = {
         },
 };
 
+static struct sa1111_platform_data sa1111_info = {
+        .irq_base       = IRQ_BOARD_END,
+};
+
 static u64 sa1111_dmamask = 0xffffffffUL;
 
 static struct platform_device sa1111_device = {
@@ -216,6 +220,7 @@ static struct platform_device sa1111_device = {
         .dev            = {
                 .dma_mask = &sa1111_dmamask,
                 .coherent_dma_mask = 0xffffffff,
+                .platform_data = &sa1111_info,
         },
         .num_resources  = ARRAY_SIZE(sa1111_resources),
         .resource       = sa1111_resources,
diff --git a/arch/arm/mach-sa1100/jornada720_ssp.c b/arch/arm/mach-sa1100/jornada720_ssp.c
index 506a5e5a9ad..9d490c66891 100644
--- a/arch/arm/mach-sa1100/jornada720_ssp.c
+++ b/arch/arm/mach-sa1100/jornada720_ssp.c
@@ -18,7 +18,6 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/sched.h>
-#include <linux/slab.h>
 
 #include <mach/hardware.h>
 #include <mach/jornada720.h>
@@ -130,7 +129,7 @@ void jornada_ssp_end(void)
 };
 EXPORT_SYMBOL(jornada_ssp_end);
 
-static int __init jornada_ssp_probe(struct platform_device *dev)
+static int __devinit jornada_ssp_probe(struct platform_device *dev)
 {
         int ret;
 
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 6ccd175bc4c..c601a75a333 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -8,7 +8,6 @@
 #include <linux/ioport.h>
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
-#include <linux/slab.h>
 
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
@@ -241,6 +240,10 @@ static struct resource sa1111_resources[] = {
         },
 };
 
+static struct sa1111_platform_data sa1111_info = {
+        .irq_base       = IRQ_BOARD_END,
+};
+
 static u64 sa1111_dmamask = 0xffffffffUL;
 
 static struct platform_device sa1111_device = {
@@ -249,6 +252,7 @@ static struct platform_device sa1111_device = {
         .dev            = {
                 .dma_mask = &sa1111_dmamask,
                 .coherent_dma_mask = 0xffffffff,
+                .platform_data = &sa1111_info,
         },
         .num_resources  = ARRAY_SIZE(sa1111_resources),
         .resource       = sa1111_resources,
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index b9cbb56d6e9..74b6e0e570b 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -35,14 +35,12 @@ static irqreturn_t sa1100_ost0_interrupt(int irq, void *dev_id)
 static int
 sa1100_osmr0_set_next_event(unsigned long delta, struct clock_event_device *c)
 {
-        unsigned long flags, next, oscr;
+        unsigned long next, oscr;
 
-        raw_local_irq_save(flags);
         OIER |= OIER_E0;
         next = OSCR + delta;
         OSMR0 = next;
         oscr = OSCR;
-        raw_local_irq_restore(flags);
 
         return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;
 }
@@ -50,16 +48,12 @@ sa1100_osmr0_set_next_event(unsigned long delta, struct clock_event_device *c)
 static void
 sa1100_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *c)
 {
-        unsigned long flags;
-
         switch (mode) {
         case CLOCK_EVT_MODE_ONESHOT:
         case CLOCK_EVT_MODE_UNUSED:
         case CLOCK_EVT_MODE_SHUTDOWN:
-                raw_local_irq_save(flags);
                 OIER &= ~OIER_E0;
                 OSSR = OSSR_M0;
-                raw_local_irq_restore(flags);
                 break;
 
         case CLOCK_EVT_MODE_RESUME:
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
new file mode 100644
index 00000000000..aeceb9b92ae
--- /dev/null
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -0,0 +1,84 @@
+if ARCH_SHMOBILE
+
+comment "SH-Mobile System Type"
+
+config ARCH_SH7367
+        bool "SH-Mobile G3 (SH7367)"
+        select CPU_V6
+        select HAVE_CLK
+        select COMMON_CLKDEV
+        select GENERIC_TIME
+        select GENERIC_CLOCKEVENTS
+
+config ARCH_SH7377
+        bool "SH-Mobile G4 (SH7377)"
+        select CPU_V7
+        select HAVE_CLK
+        select COMMON_CLKDEV
+        select GENERIC_TIME
+        select GENERIC_CLOCKEVENTS
+
+config ARCH_SH7372
+        bool "SH-Mobile AP4 (SH7372)"
+        select CPU_V7
+        select HAVE_CLK
+        select COMMON_CLKDEV
+        select GENERIC_TIME
+        select GENERIC_CLOCKEVENTS
+
+comment "SH-Mobile Board Type"
+
+config MACH_G3EVM
+        bool "G3EVM board"
+        depends on ARCH_SH7367
+        select ARCH_REQUIRE_GPIOLIB
+
+config MACH_G4EVM
+        bool "G4EVM board"
+        depends on ARCH_SH7377
+        select ARCH_REQUIRE_GPIOLIB
+
+config MACH_AP4EVB
+        bool "AP4EVB board"
+        depends on ARCH_SH7372
+        select ARCH_REQUIRE_GPIOLIB
+
+comment "SH-Mobile System Configuration"
+
+menu "Memory configuration"
+
+config MEMORY_START
+        hex "Physical memory start address"
+        default "0x50000000" if MACH_G3EVM
+        default "0x40000000" if MACH_G4EVM
+        default "0x40000000" if MACH_AP4EVB
+        default "0x00000000"
+        ---help---
+          Tweak this only when porting to a new machine which does not
+          already have a defconfig. Changing it from the known correct
+          value on any of the known systems will only lead to disaster.
+
+config MEMORY_SIZE
+        hex "Physical memory size"
+        default "0x08000000" if MACH_G3EVM
+        default "0x08000000" if MACH_G4EVM
+        default "0x10000000" if MACH_AP4EVB
+        default "0x04000000"
+        help
+          This sets the default memory size assumed by your kernel. It can
+          be overridden as normal by the 'mem=' argument on the kernel command
+          line.
+
+endmenu
+
+menu "Timer and clock configuration"
+
+config SH_TIMER_CMT
+        bool "CMT timer driver"
+        default y
+        help
+          This enables build of the CMT timer driver.
+
+endmenu
+
+endif
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
new file mode 100644
index 00000000000..6d385d371c3
--- /dev/null
+++ b/arch/arm/mach-shmobile/Makefile
@@ -0,0 +1,22 @@
+#
+# Makefile for the linux kernel.
+#
+
+# Common objects
+obj-y                           := timer.o console.o
+
+# CPU objects
+obj-$(CONFIG_ARCH_SH7367)       += setup-sh7367.o clock-sh7367.o intc-sh7367.o
+obj-$(CONFIG_ARCH_SH7377)       += setup-sh7377.o clock-sh7367.o intc-sh7377.o
+obj-$(CONFIG_ARCH_SH7372)       += setup-sh7372.o clock-sh7367.o intc-sh7372.o
+
+# Pinmux setup
+pfc-$(CONFIG_ARCH_SH7367)       := pfc-sh7367.o
+pfc-$(CONFIG_ARCH_SH7377)       := pfc-sh7377.o
+pfc-$(CONFIG_ARCH_SH7372)       := pfc-sh7372.o
+obj-$(CONFIG_GENERIC_GPIO)      += $(pfc-y)
+
+# Board objects
+obj-$(CONFIG_MACH_G3EVM)        += board-g3evm.o
+obj-$(CONFIG_MACH_G4EVM)        += board-g4evm.o
+obj-$(CONFIG_MACH_AP4EVB)       += board-ap4evb.o
diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
new file mode 100644
index 00000000000..1c08ee9de86
--- /dev/null
+++ b/arch/arm/mach-shmobile/Makefile.boot
@@ -0,0 +1,9 @@
+__ZRELADDR      := $(shell /bin/bash -c 'printf "0x%08x" \
+                     $$[$(CONFIG_MEMORY_START) + 0x8000]')
+
+   zreladdr-y   := $(__ZRELADDR)
+
+# Unsupported legacy stuff
+#
+#params_phys-y (Instead: Pass atags pointer in r2)
+#initrd_phys-y (Instead: Use compiled-in initramfs)
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
new file mode 100644
index 00000000000..1c2ec96ce26
--- /dev/null
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -0,0 +1,333 @@
+/*
+ * AP4EVB board support
+ *
+ * Copyright (C) 2010  Magnus Damm
+ * Copyright (C) 2008  Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/io.h>
+#include <linux/smsc911x.h>
+#include <linux/gpio.h>
+#include <linux/input.h>
+#include <linux/input/sh_keysc.h>
+#include <mach/common.h>
+#include <mach/sh7372.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+/*
+ * Address      Interface               BusWidth        note
+ * ------------------------------------------------------------------
+ * 0x0000_0000  NOR Flash ROM (MCP)     16bit           SW7 : bit1 = ON
+ * 0x0800_0000  user area               -
+ * 0x1000_0000  NOR Flash ROM (MCP)     16bit           SW7 : bit1 = OFF
+ * 0x1400_0000  Ether (LAN9220)         16bit
+ * 0x1600_0000  user area               -               cannot use with NAND
+ * 0x1800_0000  user area               -
+ * 0x1A00_0000  -
+ * 0x4000_0000  LPDDR2-SDRAM (POP)      32bit
+ */
+
+/*
+ * NOR Flash ROM
+ *
+ *  SW1  |     SW2    | SW7  | NOR Flash ROM
+ *  bit1 | bit1  bit2 | bit1 | Memory allocation
+ * ------+------------+------+------------------
+ *  OFF  | ON     OFF | ON   |    Area 0
+ *  OFF  | ON     OFF | OFF  |    Area 4
+ */
+
+/*
+ * NAND Flash ROM
+ *
+ *  SW1  |     SW2    | SW7  | NAND Flash ROM
+ *  bit1 | bit1  bit2 | bit2 | Memory allocation
+ * ------+------------+------+------------------
+ *  OFF  | ON     OFF | ON   |    FCE 0
+ *  OFF  | ON     OFF | OFF  |    FCE 1
+ */
+
+/*
+ * SMSC 9220
+ *
+ *  SW1         SMSC 9220
+ * -----------------------
+ *  ON          access disable
+ *  OFF         access enable
+ */
+
+/*
+ * KEYSC
+ *
+ * SW43         KEYSC
+ * -------------------------
+ * ON           enable
+ * OFF          disable
+ */
+
+/* MTD */
+static struct mtd_partition nor_flash_partitions[] = {
+        {
+                .name           = "loader",
+                .offset         = 0x00000000,
+                .size           = 512 * 1024,
+        },
+        {
+                .name           = "bootenv",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 512 * 1024,
+        },
+        {
+                .name           = "kernel_ro",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 8 * 1024 * 1024,
+                .mask_flags     = MTD_WRITEABLE,
+        },
+        {
+                .name           = "kernel",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 8 * 1024 * 1024,
+        },
+        {
+                .name           = "data",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data nor_flash_data = {
+        .width          = 2,
+        .parts          = nor_flash_partitions,
+        .nr_parts       = ARRAY_SIZE(nor_flash_partitions),
+};
+
+static struct resource nor_flash_resources[] = {
+        [0]     = {
+                .start  = 0x00000000,
+                .end    = 0x08000000 - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device nor_flash_device = {
+        .name           = "physmap-flash",
+        .dev            = {
+                .platform_data  = &nor_flash_data,
+        },
+        .num_resources  = ARRAY_SIZE(nor_flash_resources),
+        .resource       = nor_flash_resources,
+};
+
+/* SMSC 9220 */
+static struct resource smc911x_resources[] = {
+        {
+                .start  = 0x14000000,
+                .end    = 0x16000000 - 1,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = 6,
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
+        },
+};
+
+static struct smsc911x_platform_config smsc911x_info = {
+        .flags          = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
+        .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+        .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
+};
+
+static struct platform_device smc911x_device = {
+        .name           = "smsc911x",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(smc911x_resources),
+        .resource       = smc911x_resources,
+        .dev            = {
+                .platform_data = &smsc911x_info,
+        },
+};
+
+/* KEYSC (Needs SW43 set to ON) */
+static struct sh_keysc_info keysc_info = {
+        .mode           = SH_KEYSC_MODE_1,
+        .scan_timing    = 3,
+        .delay          = 2500,
+        .keycodes = {
+                KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
+                KEY_5, KEY_6, KEY_7, KEY_8, KEY_9,
+                KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
+                KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
+                KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
+        },
+};
+
+static struct resource keysc_resources[] = {
+        [0] = {
+                .name   = "KEYSC",
+                .start  = 0xe61b0000,
+                .end    = 0xe61b0063,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 79,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device keysc_device = {
+        .name           = "sh_keysc",
+        .id             = 0, /* "keysc0" clock */
+        .num_resources  = ARRAY_SIZE(keysc_resources),
+        .resource       = keysc_resources,
+        .dev    = {
+                .platform_data  = &keysc_info,
+        },
+};
+
+/* SDHI0 */
+static struct resource sdhi0_resources[] = {
+        [0] = {
+                .name   = "SDHI0",
+                .start  = 0xe6850000,
+                .end    = 0xe68501ff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 96,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device sdhi0_device = {
+        .name           = "sh_mobile_sdhi",
+        .num_resources  = ARRAY_SIZE(sdhi0_resources),
+        .resource       = sdhi0_resources,
+        .id             = 0,
+};
+
+static struct platform_device *ap4evb_devices[] __initdata = {
+        &nor_flash_device,
+        &smc911x_device,
+        &keysc_device,
+        &sdhi0_device,
+};
+
+static struct map_desc ap4evb_io_desc[] __initdata = {
+        /* create a 1:1 entity map for 0xe6xxxxxx
+         * used by CPGA, INTC and PFC.
+         */
+        {
+                .virtual        = 0xe6000000,
+                .pfn            = __phys_to_pfn(0xe6000000),
+                .length         = 256 << 20,
+                .type           = MT_DEVICE_NONSHARED
+        },
+};
+
+static void __init ap4evb_map_io(void)
+{
+        iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc));
+
+        /* setup early devices, clocks and console here as well */
+        sh7372_add_early_devices();
+        sh7367_clock_init(); /* use g3 clocks for now */
+        shmobile_setup_console();
+}
+
+static void __init ap4evb_init(void)
+{
+        sh7372_pinmux_init();
+
+        /* enable SCIFA0 */
+        gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
+        gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
+
+        /* enable SMSC911X */
+        gpio_request(GPIO_FN_CS5A,      NULL);
+        gpio_request(GPIO_FN_IRQ6_39,   NULL);
+
+        /* enable LED 1 - 4 */
+        gpio_request(GPIO_PORT185, NULL);
+        gpio_request(GPIO_PORT186, NULL);
+        gpio_request(GPIO_PORT187, NULL);
+        gpio_request(GPIO_PORT188, NULL);
+        gpio_direction_output(GPIO_PORT185, 1);
+        gpio_direction_output(GPIO_PORT186, 1);
+        gpio_direction_output(GPIO_PORT187, 1);
+        gpio_direction_output(GPIO_PORT188, 1);
+        gpio_export(GPIO_PORT185, 0);
+        gpio_export(GPIO_PORT186, 0);
+        gpio_export(GPIO_PORT187, 0);
+        gpio_export(GPIO_PORT188, 0);
+
+        /* enable Debug switch (S6) */
+        gpio_request(GPIO_PORT32, NULL);
+        gpio_request(GPIO_PORT33, NULL);
+        gpio_request(GPIO_PORT34, NULL);
+        gpio_request(GPIO_PORT35, NULL);
+        gpio_direction_input(GPIO_PORT32);
+        gpio_direction_input(GPIO_PORT33);
+        gpio_direction_input(GPIO_PORT34);
+        gpio_direction_input(GPIO_PORT35);
+        gpio_export(GPIO_PORT32, 0);
+        gpio_export(GPIO_PORT33, 0);
+        gpio_export(GPIO_PORT34, 0);
+        gpio_export(GPIO_PORT35, 0);
+
+        /* enable KEYSC */
+        gpio_request(GPIO_FN_KEYOUT0, NULL);
+        gpio_request(GPIO_FN_KEYOUT1, NULL);
+        gpio_request(GPIO_FN_KEYOUT2, NULL);
+        gpio_request(GPIO_FN_KEYOUT3, NULL);
+        gpio_request(GPIO_FN_KEYOUT4, NULL);
+        gpio_request(GPIO_FN_KEYIN0_136, NULL);
+        gpio_request(GPIO_FN_KEYIN1_135, NULL);
+        gpio_request(GPIO_FN_KEYIN2_134, NULL);
+        gpio_request(GPIO_FN_KEYIN3_133, NULL);
+        gpio_request(GPIO_FN_KEYIN4,     NULL);
+
+        /* SDHI0 */
+        gpio_request(GPIO_FN_SDHICD0, NULL);
+        gpio_request(GPIO_FN_SDHIWP0, NULL);
+        gpio_request(GPIO_FN_SDHICMD0, NULL);
+        gpio_request(GPIO_FN_SDHICLK0, NULL);
+        gpio_request(GPIO_FN_SDHID0_3, NULL);
+        gpio_request(GPIO_FN_SDHID0_2, NULL);
+        gpio_request(GPIO_FN_SDHID0_1, NULL);
+        gpio_request(GPIO_FN_SDHID0_0, NULL);
+
+        sh7372_add_standard_devices();
+
+        platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
+}
+
+MACHINE_START(AP4EVB, "ap4evb")
+        .phys_io        = 0xe6000000,
+        .io_pg_offst    = ((0xe6000000) >> 18) & 0xfffc,
+        .map_io         = ap4evb_map_io,
+        .init_irq       = sh7372_init_irq,
+        .init_machine   = ap4evb_init,
+        .timer          = &shmobile_timer,
+MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c
new file mode 100644
index 00000000000..9247503296c
--- /dev/null
+++ b/arch/arm/mach-shmobile/board-g3evm.c
@@ -0,0 +1,333 @@
+/*
+ * G3EVM board support
+ *
+ * Copyright (C) 2010  Magnus Damm
+ * Copyright (C) 2008  Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/mtd/sh_flctl.h>
+#include <linux/usb/r8a66597.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <linux/input.h>
+#include <linux/input/sh_keysc.h>
+#include <mach/sh7367.h>
+#include <mach/common.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+static struct mtd_partition nor_flash_partitions[] = {
+        {
+                .name           = "loader",
+                .offset         = 0x00000000,
+                .size           = 512 * 1024,
+        },
+        {
+                .name           = "bootenv",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 512 * 1024,
+        },
+        {
+                .name           = "kernel_ro",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 8 * 1024 * 1024,
+                .mask_flags     = MTD_WRITEABLE,
+        },
+        {
+                .name           = "kernel",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 8 * 1024 * 1024,
+        },
+        {
+                .name           = "data",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data nor_flash_data = {
+        .width          = 2,
+        .parts          = nor_flash_partitions,
+        .nr_parts       = ARRAY_SIZE(nor_flash_partitions),
+};
+
+static struct resource nor_flash_resources[] = {
+        [0]     = {
+                .start  = 0x00000000,
+                .end    = 0x08000000 - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device nor_flash_device = {
+        .name           = "physmap-flash",
+        .dev            = {
+                .platform_data  = &nor_flash_data,
+        },
+        .num_resources  = ARRAY_SIZE(nor_flash_resources),
+        .resource       = nor_flash_resources,
+};
+
+/* USBHS */
+void usb_host_port_power(int port, int power)
+{
+        if (!power) /* only power-on supported for now */
+                return;
+
+        /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */
+        __raw_writew(__raw_readw(0xe6890008) | 0x600, 0xe6890008);
+}
+
+static struct r8a66597_platdata usb_host_data = {
+        .on_chip = 1,
+        .port_power = usb_host_port_power,
+};
+
+static struct resource usb_host_resources[] = {
+        [0] = {
+                .name   = "USBHS",
+                .start  = 0xe6890000,
+                .end    = 0xe68900e5,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 65,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device usb_host_device = {
+        .name           = "r8a66597_hcd",
+        .id             = 0,
+        .dev = {
+                .platform_data          = &usb_host_data,
+                .dma_mask               = NULL,
+                .coherent_dma_mask      = 0xffffffff,
+        },
+        .num_resources  = ARRAY_SIZE(usb_host_resources),
+        .resource       = usb_host_resources,
+};
+
+/* KEYSC */
+static struct sh_keysc_info keysc_info = {
+        .mode           = SH_KEYSC_MODE_5,
+        .scan_timing    = 3,
+        .delay          = 100,
+        .keycodes = {
+                KEY_A, KEY_B, KEY_C, KEY_D, KEY_E, KEY_F, KEY_G,
+                KEY_H, KEY_I, KEY_J, KEY_K, KEY_L, KEY_M, KEY_N,
+                KEY_O, KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T, KEY_U,
+                KEY_V, KEY_W, KEY_X, KEY_Y, KEY_Z, KEY_HOME, KEY_SLEEP,
+                KEY_WAKEUP, KEY_COFFEE, KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
+                KEY_5, KEY_6, KEY_7, KEY_8, KEY_9, KEY_STOP, KEY_COMPUTER,
+        },
+};
+
+static struct resource keysc_resources[] = {
+        [0] = {
+                .name   = "KEYSC",
+                .start  = 0xe61b0000,
+                .end    = 0xe61b000f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 79,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device keysc_device = {
+        .name           = "sh_keysc",
+        .num_resources  = ARRAY_SIZE(keysc_resources),
+        .resource       = keysc_resources,
+        .dev    = {
+                .platform_data  = &keysc_info,
+        },
+};
+
+static struct mtd_partition nand_partition_info[] = {
+        {
+                .name   = "system",
+                .offset = 0,
+                .size   = 64 * 1024 * 1024,
+        },
+        {
+                .name   = "userdata",
+                .offset = MTDPART_OFS_APPEND,
+                .size   = 128 * 1024 * 1024,
+        },
+        {
+                .name   = "cache",
+                .offset = MTDPART_OFS_APPEND,
+                .size   = 64 * 1024 * 1024,
+        },
+};
+
+static struct resource nand_flash_resources[] = {
+        [0] = {
+                .start  = 0xe6a30000,
+                .end    = 0xe6a3009b,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct sh_flctl_platform_data nand_flash_data = {
+        .parts          = nand_partition_info,
+        .nr_parts       = ARRAY_SIZE(nand_partition_info),
+        .flcmncr_val    = QTSEL_E | FCKSEL_E | TYPESEL_SET | NANWF_E
+                        | SHBUSSEL | SEL_16BIT,
+};
+
+static struct platform_device nand_flash_device = {
+        .name           = "sh_flctl",
+        .resource       = nand_flash_resources,
+        .num_resources  = ARRAY_SIZE(nand_flash_resources),
+        .dev            = {
+                .platform_data = &nand_flash_data,
+        },
+};
+
+static struct platform_device *g3evm_devices[] __initdata = {
+        &nor_flash_device,
+        &usb_host_device,
+        &keysc_device,
+        &nand_flash_device,
+};
+
+static struct map_desc g3evm_io_desc[] __initdata = {
+        /* create a 1:1 entity map for 0xe6xxxxxx
+         * used by CPGA, INTC and PFC.
+         */
+        {
+                .virtual        = 0xe6000000,
+                .pfn            = __phys_to_pfn(0xe6000000),
+                .length         = 256 << 20,
+                .type           = MT_DEVICE_NONSHARED
+        },
+};
+
+static void __init g3evm_map_io(void)
+{
+        iotable_init(g3evm_io_desc, ARRAY_SIZE(g3evm_io_desc));
+
+        /* setup early devices, clocks and console here as well */
+        sh7367_add_early_devices();
+        sh7367_clock_init();
+        shmobile_setup_console();
+}
+
+static void __init g3evm_init(void)
+{
+        sh7367_pinmux_init();
+
+        /* Lit DS4 LED */
+        gpio_request(GPIO_PORT22, NULL);
+        gpio_direction_output(GPIO_PORT22, 1);
+        gpio_export(GPIO_PORT22, 0);
+
+        /* Lit DS8 LED */
+        gpio_request(GPIO_PORT23, NULL);
+        gpio_direction_output(GPIO_PORT23, 1);
+        gpio_export(GPIO_PORT23, 0);
+
+        /* Lit DS3 LED */
+        gpio_request(GPIO_PORT24, NULL);
+        gpio_direction_output(GPIO_PORT24, 1);
+        gpio_export(GPIO_PORT24, 0);
+
+        /* SCIFA1 */
+        gpio_request(GPIO_FN_SCIFA1_TXD, NULL);
+        gpio_request(GPIO_FN_SCIFA1_RXD, NULL);
+        gpio_request(GPIO_FN_SCIFA1_CTS, NULL);
+        gpio_request(GPIO_FN_SCIFA1_RTS, NULL);
+
+        /* USBHS */
+        gpio_request(GPIO_FN_VBUS0, NULL);
+        gpio_request(GPIO_FN_PWEN, NULL);
+        gpio_request(GPIO_FN_OVCN, NULL);
+        gpio_request(GPIO_FN_OVCN2, NULL);
+        gpio_request(GPIO_FN_EXTLP, NULL);
+        gpio_request(GPIO_FN_IDIN, NULL);
+
+        /* enable clock in SYMSTPCR2 */
+        __raw_writel(__raw_readl(0xe6158048) & ~(1 << 22), 0xe6158048);
+
+        /* setup USB phy */
+        __raw_writew(0x0300, 0xe605810a);       /* USBCR1 */
+        __raw_writew(0x00e0, 0xe60581c0);       /* CPFCH */
+        __raw_writew(0x6010, 0xe60581c6);       /* CGPOSR */
+        __raw_writew(0x8a0a, 0xe605810c);       /* USBCR2 */
+
+        /* KEYSC @ CN7 */
+        gpio_request(GPIO_FN_PORT42_KEYOUT0, NULL);
+        gpio_request(GPIO_FN_PORT43_KEYOUT1, NULL);
+        gpio_request(GPIO_FN_PORT44_KEYOUT2, NULL);
+        gpio_request(GPIO_FN_PORT45_KEYOUT3, NULL);
+        gpio_request(GPIO_FN_PORT46_KEYOUT4, NULL);
+        gpio_request(GPIO_FN_PORT47_KEYOUT5, NULL);
+        gpio_request(GPIO_FN_PORT48_KEYIN0_PU, NULL);
+        gpio_request(GPIO_FN_PORT49_KEYIN1_PU, NULL);
+        gpio_request(GPIO_FN_PORT50_KEYIN2_PU, NULL);
+        gpio_request(GPIO_FN_PORT55_KEYIN3_PU, NULL);
+        gpio_request(GPIO_FN_PORT56_KEYIN4_PU, NULL);
+        gpio_request(GPIO_FN_PORT57_KEYIN5_PU, NULL);
+        gpio_request(GPIO_FN_PORT58_KEYIN6_PU, NULL);
+
+        /* FLCTL */
+        gpio_request(GPIO_FN_FCE0, NULL);
+        gpio_request(GPIO_FN_D0_ED0_NAF0, NULL);
+        gpio_request(GPIO_FN_D1_ED1_NAF1, NULL);
+        gpio_request(GPIO_FN_D2_ED2_NAF2, NULL);
+        gpio_request(GPIO_FN_D3_ED3_NAF3, NULL);
+        gpio_request(GPIO_FN_D4_ED4_NAF4, NULL);
+        gpio_request(GPIO_FN_D5_ED5_NAF5, NULL);
+        gpio_request(GPIO_FN_D6_ED6_NAF6, NULL);
+        gpio_request(GPIO_FN_D7_ED7_NAF7, NULL);
+        gpio_request(GPIO_FN_D8_ED8_NAF8, NULL);
+        gpio_request(GPIO_FN_D9_ED9_NAF9, NULL);
+        gpio_request(GPIO_FN_D10_ED10_NAF10, NULL);
+        gpio_request(GPIO_FN_D11_ED11_NAF11, NULL);
+        gpio_request(GPIO_FN_D12_ED12_NAF12, NULL);
+        gpio_request(GPIO_FN_D13_ED13_NAF13, NULL);
+        gpio_request(GPIO_FN_D14_ED14_NAF14, NULL);
+        gpio_request(GPIO_FN_D15_ED15_NAF15, NULL);
+        gpio_request(GPIO_FN_WE0_XWR0_FWE, NULL);
+        gpio_request(GPIO_FN_FRB, NULL);
+        /* FOE, FCDE, FSC on dedicated pins */
+        __raw_writel(__raw_readl(0xe6158048) & ~(1 << 15), 0xe6158048);
+
+        sh7367_add_standard_devices();
+
+        platform_add_devices(g3evm_devices, ARRAY_SIZE(g3evm_devices));
+}
+
+MACHINE_START(G3EVM, "g3evm")
+        .phys_io        = 0xe6000000,
+        .io_pg_offst    = ((0xe6000000) >> 18) & 0xfffc,
+        .map_io         = g3evm_map_io,
+        .init_irq       = sh7367_init_irq,
+        .init_machine   = g3evm_init,
+        .timer          = &shmobile_timer,
+MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c
new file mode 100644
index 00000000000..10673a90be5
--- /dev/null
+++ b/arch/arm/mach-shmobile/board-g4evm.c
@@ -0,0 +1,268 @@
+/*
+ * G4EVM board support
+ *
+ * Copyright (C) 2010  Magnus Damm
+ * Copyright (C) 2008  Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/usb/r8a66597.h>
+#include <linux/io.h>
+#include <linux/input.h>
+#include <linux/input/sh_keysc.h>
+#include <linux/gpio.h>
+#include <mach/sh7377.h>
+#include <mach/common.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+static struct mtd_partition nor_flash_partitions[] = {
+        {
+                .name           = "loader",
+                .offset         = 0x00000000,
+                .size           = 512 * 1024,
+        },
+        {
+                .name           = "bootenv",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 512 * 1024,
+        },
+        {
+                .name           = "kernel_ro",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 8 * 1024 * 1024,
+                .mask_flags     = MTD_WRITEABLE,
+        },
+        {
+                .name           = "kernel",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 8 * 1024 * 1024,
+        },
+        {
+                .name           = "data",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data nor_flash_data = {
+        .width          = 2,
+        .parts          = nor_flash_partitions,
+        .nr_parts       = ARRAY_SIZE(nor_flash_partitions),
+};
+
+static struct resource nor_flash_resources[] = {
+        [0]     = {
+                .start  = 0x00000000,
+                .end    = 0x08000000 - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device nor_flash_device = {
+        .name           = "physmap-flash",
+        .dev            = {
+                .platform_data  = &nor_flash_data,
+        },
+        .num_resources  = ARRAY_SIZE(nor_flash_resources),
+        .resource       = nor_flash_resources,
+};
+
+/* USBHS */
+void usb_host_port_power(int port, int power)
+{
+        if (!power) /* only power-on supported for now */
+                return;
+
+        /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */
+        __raw_writew(__raw_readw(0xe6890008) | 0x600, 0xe6890008);
+}
+
+static struct r8a66597_platdata usb_host_data = {
+        .on_chip = 1,
+        .port_power = usb_host_port_power,
+};
+
+static struct resource usb_host_resources[] = {
+        [0] = {
+                .name   = "USBHS",
+                .start  = 0xe6890000,
+                .end    = 0xe68900e5,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 65,
+                .end    = 65,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device usb_host_device = {
+        .name           = "r8a66597_hcd",
+        .id             = 0,
+        .dev = {
+                .platform_data          = &usb_host_data,
+                .dma_mask               = NULL,
+                .coherent_dma_mask      = 0xffffffff,
+        },
+        .num_resources  = ARRAY_SIZE(usb_host_resources),
+        .resource       = usb_host_resources,
+};
+
+/* KEYSC */
+static struct sh_keysc_info keysc_info = {
+        .mode           = SH_KEYSC_MODE_5,
+        .scan_timing    = 3,
+        .delay          = 100,
+        .keycodes = {
+                KEY_A, KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
+                KEY_G, KEY_H, KEY_I, KEY_J, KEY_K, KEY_L,
+                KEY_M, KEY_N, KEY_U, KEY_P, KEY_Q, KEY_R,
+                KEY_S, KEY_T, KEY_U, KEY_V, KEY_W, KEY_X,
+                KEY_Y, KEY_Z, KEY_HOME, KEY_SLEEP, KEY_WAKEUP, KEY_COFFEE,
+                KEY_0, KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
+                KEY_6, KEY_7, KEY_8, KEY_9, KEY_STOP, KEY_COMPUTER,
+        },
+};
+
+static struct resource keysc_resources[] = {
+        [0] = {
+                .name   = "KEYSC",
+                .start  = 0xe61b0000,
+                .end    = 0xe61b000f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 79,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device keysc_device = {
+        .name           = "sh_keysc",
+        .id             = 0, /* keysc0 clock */
+        .num_resources  = ARRAY_SIZE(keysc_resources),
+        .resource       = keysc_resources,
+        .dev    = {
+                .platform_data  = &keysc_info,
+        },
+};
+
+static struct platform_device *g4evm_devices[] __initdata = {
+        &nor_flash_device,
+        &usb_host_device,
+        &keysc_device,
+};
+
+static struct map_desc g4evm_io_desc[] __initdata = {
+        /* create a 1:1 entity map for 0xe6xxxxxx
+         * used by CPGA, INTC and PFC.
+         */
+        {
+                .virtual        = 0xe6000000,
+                .pfn            = __phys_to_pfn(0xe6000000),
+                .length         = 256 << 20,
+                .type           = MT_DEVICE_NONSHARED
+        },
+};
+
+static void __init g4evm_map_io(void)
+{
+        iotable_init(g4evm_io_desc, ARRAY_SIZE(g4evm_io_desc));
+
+        /* setup early devices, clocks and console here as well */
+        sh7377_add_early_devices();
+        sh7367_clock_init(); /* use g3 clocks for now */
+        shmobile_setup_console();
+}
+
+static void __init g4evm_init(void)
+{
+        sh7377_pinmux_init();
+
+        /* Lit DS14 LED */
+        gpio_request(GPIO_PORT109, NULL);
+        gpio_direction_output(GPIO_PORT109, 1);
+        gpio_export(GPIO_PORT109, 1);
+
+        /* Lit DS15 LED */
+        gpio_request(GPIO_PORT110, NULL);
+        gpio_direction_output(GPIO_PORT110, 1);
+        gpio_export(GPIO_PORT110, 1);
+
+        /* Lit DS16 LED */
+        gpio_request(GPIO_PORT112, NULL);
+        gpio_direction_output(GPIO_PORT112, 1);
+        gpio_export(GPIO_PORT112, 1);
+
+        /* Lit DS17 LED */
+        gpio_request(GPIO_PORT113, NULL);
+        gpio_direction_output(GPIO_PORT113, 1);
+        gpio_export(GPIO_PORT113, 1);
+
+        /* USBHS */
+        gpio_request(GPIO_FN_VBUS_0, NULL);
+        gpio_request(GPIO_FN_PWEN, NULL);
+        gpio_request(GPIO_FN_OVCN, NULL);
+        gpio_request(GPIO_FN_OVCN2, NULL);
+        gpio_request(GPIO_FN_EXTLP, NULL);
+        gpio_request(GPIO_FN_IDIN, NULL);
+
+        /* enable clock in SMSTPCR3 */
+        __raw_writel(__raw_readl(0xe615013c) & ~(1 << 22), 0xe615013c);
+
+        /* setup USB phy */
+        __raw_writew(0x0200, 0xe605810a);       /* USBCR1 */
+        __raw_writew(0x00e0, 0xe60581c0);       /* CPFCH */
+        __raw_writew(0x6010, 0xe60581c6);       /* CGPOSR */
+        __raw_writew(0x8a0a, 0xe605810c);       /* USBCR2 */
+
+        /* KEYSC @ CN31 */
+        gpio_request(GPIO_FN_PORT60_KEYOUT5, NULL);
+        gpio_request(GPIO_FN_PORT61_KEYOUT4, NULL);
+        gpio_request(GPIO_FN_PORT62_KEYOUT3, NULL);
+        gpio_request(GPIO_FN_PORT63_KEYOUT2, NULL);
+        gpio_request(GPIO_FN_PORT64_KEYOUT1, NULL);
+        gpio_request(GPIO_FN_PORT65_KEYOUT0, NULL);
+        gpio_request(GPIO_FN_PORT66_KEYIN0_PU, NULL);
+        gpio_request(GPIO_FN_PORT67_KEYIN1_PU, NULL);
+        gpio_request(GPIO_FN_PORT68_KEYIN2_PU, NULL);
+        gpio_request(GPIO_FN_PORT69_KEYIN3_PU, NULL);
+        gpio_request(GPIO_FN_PORT70_KEYIN4_PU, NULL);
+        gpio_request(GPIO_FN_PORT71_KEYIN5_PU, NULL);
+        gpio_request(GPIO_FN_PORT72_KEYIN6_PU, NULL);
+
+        sh7377_add_standard_devices();
+
+        platform_add_devices(g4evm_devices, ARRAY_SIZE(g4evm_devices));
+}
+
+MACHINE_START(G4EVM, "g4evm")
+        .phys_io        = 0xe6000000,
+        .io_pg_offst    = ((0xe6000000) >> 18) & 0xfffc,
+        .map_io         = g4evm_map_io,
+        .init_irq       = sh7377_init_irq,
+        .init_machine   = g4evm_init,
+        .timer          = &shmobile_timer,
+MACHINE_END
diff --git a/arch/arm/mach-shmobile/clock-sh7367.c b/arch/arm/mach-shmobile/clock-sh7367.c
new file mode 100644
index 00000000000..bb940c6e4e6
--- /dev/null
+++ b/arch/arm/mach-shmobile/clock-sh7367.c
@@ -0,0 +1,103 @@
+/*
+ * Preliminary clock framework support for sh7367
+ *
+ * Copyright (C) 2010  Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/clk.h>
+
+struct clk {
+        const char *name;
+        unsigned long rate;
+};
+
+#include <asm/clkdev.h>
+
+int __clk_get(struct clk *clk)
+{
+        return 1;
+}
+EXPORT_SYMBOL(__clk_get);
+
+void __clk_put(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(__clk_put);
+
+
+int clk_enable(struct clk *clk)
+{
+        return 0;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_disable);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+        return clk ? clk->rate : 0;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+/* a static peripheral clock for now - enough to get sh-sci working */
+static struct clk peripheral_clk = {
+        .name       = "peripheral_clk",
+        .rate       = 48000000,
+};
+
+/* a static rclk for now - enough to get sh_cmt working */
+static struct clk r_clk = {
+        .name       = "r_clk",
+        .rate       = 32768,
+};
+
+/* a static usb0 for now - enough to get r8a66597 working */
+static struct clk usb0_clk = {
+        .name       = "usb0",
+};
+
+/* a static keysc0 clk for now - enough to get sh_keysc working */
+static struct clk keysc0_clk = {
+        .name       = "keysc0",
+};
+
+static struct clk_lookup lookups[] = {
+        {
+                .clk = &peripheral_clk,
+        }, {
+                .clk = &r_clk,
+        }, {
+                .clk = &usb0_clk,
+        }, {
+                .clk = &keysc0_clk,
+        }
+};
+
+void __init sh7367_clock_init(void)
+{
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(lookups); i++) {
+                lookups[i].con_id = lookups[i].clk->name;
+                clkdev_add(&lookups[i]);
+        }
+}
diff --git a/arch/arm/mach-shmobile/console.c b/arch/arm/mach-shmobile/console.c
new file mode 100644
index 00000000000..9411a5bf4fd
--- /dev/null
+++ b/arch/arm/mach-shmobile/console.c
@@ -0,0 +1,31 @@
+/*
+ * SH-Mobile Console
+ *
+ * Copyright (C) 2010  Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <mach/common.h>
+#include <asm/mach/map.h>
+
+void __init shmobile_setup_console(void)
+{
+        parse_early_param();
+
+        /* Let earlyprintk output early console messages */
+        early_platform_driver_probe("earlyprintk", 1, 1);
+}
diff --git a/arch/arm/mach-shmobile/include/mach/clkdev.h b/arch/arm/mach-shmobile/include/mach/clkdev.h
new file mode 100644
index 00000000000..36d0163a857
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/clkdev.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_CLKDEV_H
+#define __ASM_MACH_CLKDEV_H
+
+int __clk_get(struct clk *clk);
+void __clk_put(struct clk *clk);
+
+#endif /* __ASM_MACH_CLKDEV_H */
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
new file mode 100644
index 00000000000..57903605cc5
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -0,0 +1,23 @@
+#ifndef __ARCH_MACH_COMMON_H
+#define __ARCH_MACH_COMMON_H
+
+extern struct sys_timer shmobile_timer;
+extern void shmobile_setup_console(void);
+
+extern void sh7367_init_irq(void);
+extern void sh7367_add_early_devices(void);
+extern void sh7367_add_standard_devices(void);
+extern void sh7367_clock_init(void);
+extern void sh7367_pinmux_init(void);
+
+extern void sh7377_init_irq(void);
+extern void sh7377_add_early_devices(void);
+extern void sh7377_add_standard_devices(void);
+extern void sh7377_pinmux_init(void);
+
+extern void sh7372_init_irq(void);
+extern void sh7372_add_early_devices(void);
+extern void sh7372_add_standard_devices(void);
+extern void sh7372_pinmux_init(void);
+
+#endif /* __ARCH_MACH_COMMON_H */
diff --git a/arch/arm/mach-shmobile/include/mach/dma.h b/arch/arm/mach-shmobile/include/mach/dma.h
new file mode 100644
index 00000000000..40a8c178f10
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/dma.h
@@ -0,0 +1 @@
+/* empty */
diff --git a/arch/arm/mach-shmobile/include/mach/entry-macro.S b/arch/arm/mach-shmobile/include/mach/entry-macro.S
new file mode 100644
index 00000000000..a285d13c741
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/entry-macro.S
@@ -0,0 +1,39 @@
+/*
+ * Copyright (C) 2008 Renesas Solutions Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <mach/hardware.h>
+#include <mach/irqs.h>
+
+        .macro  disable_fiq
+        .endm
+
+        .macro  get_irqnr_preamble, base, tmp
+        ldr     \base, =INTFLGA
+        .endm
+
+        .macro  arch_ret_to_user, tmp1, tmp2
+        .endm
+
+        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+        ldr     \irqnr, [\base]
+        cmp     \irqnr, #0
+        beq     1000f
+        /* intevt to irq number */
+        lsr     \irqnr, \irqnr, #0x5
+        subs    \irqnr, \irqnr, #16
+
+1000:
+        .endm
diff --git a/arch/arm/mach-shmobile/include/mach/gpio.h b/arch/arm/mach-shmobile/include/mach/gpio.h
new file mode 100644
index 00000000000..5bc6bd444d7
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/gpio.h
@@ -0,0 +1,48 @@
+/*
+ * Generic GPIO API and pinmux table support
+ *
+ * Copyright (c) 2008  Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_ARCH_GPIO_H
+#define __ASM_ARCH_GPIO_H
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+
+#define ARCH_NR_GPIOS 1024
+#include <linux/sh_pfc.h>
+
+#ifdef CONFIG_GPIOLIB
+
+static inline int gpio_get_value(unsigned gpio)
+{
+        return __gpio_get_value(gpio);
+}
+
+static inline void gpio_set_value(unsigned gpio, int value)
+{
+        __gpio_set_value(gpio, value);
+}
+
+static inline int gpio_cansleep(unsigned gpio)
+{
+        return __gpio_cansleep(gpio);
+}
+
+static inline int gpio_to_irq(unsigned gpio)
+{
+        return -ENOSYS;
+}
+
+static inline int irq_to_gpio(unsigned int irq)
+{
+        return -EINVAL;
+}
+
+#endif /* CONFIG_GPIOLIB */
+
+#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-shmobile/include/mach/hardware.h b/arch/arm/mach-shmobile/include/mach/hardware.h
new file mode 100644
index 00000000000..3f0ef194603
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/hardware.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_HARDWARE_H
+#define __ASM_MACH_HARDWARE_H
+
+/* INTFLGA register - used by low level interrupt code in entry-macro.S */
+#define INTFLGA                 0xe6980018
+
+#endif /* __ASM_MACH_HARDWARE_H */
diff --git a/arch/arm/mach-shmobile/include/mach/io.h b/arch/arm/mach-shmobile/include/mach/io.h
new file mode 100644
index 00000000000..7339fe46cb7
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/io.h
@@ -0,0 +1,9 @@
+#ifndef __ASM_MACH_IO_H
+#define __ASM_MACH_IO_H
+
+#define IO_SPACE_LIMIT          0xffffffff
+
+#define __io(a)                 ((void __iomem *)(a))
+#define __mem_pci(a)            (a)
+
+#endif /* __ASM_MACH_IO_H */
diff --git a/arch/arm/mach-shmobile/include/mach/irqs.h b/arch/arm/mach-shmobile/include/mach/irqs.h
new file mode 100644
index 00000000000..5179b72e1ee
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/irqs.h
@@ -0,0 +1,10 @@
+#ifndef __ASM_MACH_IRQS_H
+#define __ASM_MACH_IRQS_H
+
+#define NR_IRQS         512
+#define NR_IRQS_LEGACY  8
+
+#define evt2irq(evt)            (((evt) >> 5) - 16)
+#define irq2evt(irq)            (((irq) + 16) << 5)
+
+#endif /* __ASM_MACH_IRQS_H */
diff --git a/arch/arm/mach-shmobile/include/mach/memory.h b/arch/arm/mach-shmobile/include/mach/memory.h
new file mode 100644
index 00000000000..e188183f4dc
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/memory.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_MEMORY_H
+#define __ASM_MACH_MEMORY_H
+
+#define PHYS_OFFSET     UL(CONFIG_MEMORY_START)
+#define MEM_SIZE        UL(CONFIG_MEMORY_SIZE)
+
+#endif /* __ASM_MACH_MEMORY_H */
diff --git a/arch/arm/mach-shmobile/include/mach/sh7367.h b/arch/arm/mach-shmobile/include/mach/sh7367.h
new file mode 100644
index 00000000000..52d0de686f6
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/sh7367.h
@@ -0,0 +1,332 @@
+#ifndef __ASM_SH7367_H__
+#define __ASM_SH7367_H__
+
+/* Pin Function Controller:
+ * GPIO_FN_xx - GPIO used to select pin function
+ * GPIO_PORTxx - GPIO mapped to real I/O pin on CPU
+ */
+enum {
+        /* 49-1 -> 49-6 (GPIO) */
+        GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,
+        GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,
+
+        GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,
+        GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,
+
+        GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,
+        GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,
+
+        GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,
+        GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,
+
+        GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,
+        GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,
+
+        GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,
+        GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,
+
+        GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,
+        GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,
+
+        GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,
+        GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,
+
+        GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,
+        GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,
+
+        GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,
+        GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,
+
+        GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,
+        GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,
+
+        GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,
+        GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118, GPIO_PORT119,
+
+        GPIO_PORT120, GPIO_PORT121, GPIO_PORT122, GPIO_PORT123, GPIO_PORT124,
+        GPIO_PORT125, GPIO_PORT126, GPIO_PORT127, GPIO_PORT128, GPIO_PORT129,
+
+        GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,
+        GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,
+
+        GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,
+        GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,
+
+        GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,
+        GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,
+
+        GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,
+        GPIO_PORT165, GPIO_PORT166, GPIO_PORT167, GPIO_PORT168, GPIO_PORT169,
+
+        GPIO_PORT170, GPIO_PORT171, GPIO_PORT172, GPIO_PORT173, GPIO_PORT174,
+        GPIO_PORT175, GPIO_PORT176, GPIO_PORT177, GPIO_PORT178, GPIO_PORT179,
+
+        GPIO_PORT180, GPIO_PORT181, GPIO_PORT182, GPIO_PORT183, GPIO_PORT184,
+        GPIO_PORT185, GPIO_PORT186, GPIO_PORT187, GPIO_PORT188, GPIO_PORT189,
+
+        GPIO_PORT190, GPIO_PORT191, GPIO_PORT192, GPIO_PORT193, GPIO_PORT194,
+        GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,
+
+        GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,
+        GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,
+
+        GPIO_PORT210, GPIO_PORT211, GPIO_PORT212, GPIO_PORT213, GPIO_PORT214,
+        GPIO_PORT215, GPIO_PORT216, GPIO_PORT217, GPIO_PORT218, GPIO_PORT219,
+
+        GPIO_PORT220, GPIO_PORT221, GPIO_PORT222, GPIO_PORT223, GPIO_PORT224,
+        GPIO_PORT225, GPIO_PORT226, GPIO_PORT227, GPIO_PORT228, GPIO_PORT229,
+
+        GPIO_PORT230, GPIO_PORT231, GPIO_PORT232, GPIO_PORT233, GPIO_PORT234,
+        GPIO_PORT235, GPIO_PORT236, GPIO_PORT237, GPIO_PORT238, GPIO_PORT239,
+
+        GPIO_PORT240, GPIO_PORT241, GPIO_PORT242, GPIO_PORT243, GPIO_PORT244,
+        GPIO_PORT245, GPIO_PORT246, GPIO_PORT247, GPIO_PORT248, GPIO_PORT249,
+
+        GPIO_PORT250, GPIO_PORT251, GPIO_PORT252, GPIO_PORT253, GPIO_PORT254,
+        GPIO_PORT255, GPIO_PORT256, GPIO_PORT257, GPIO_PORT258, GPIO_PORT259,
+
+        GPIO_PORT260, GPIO_PORT261, GPIO_PORT262, GPIO_PORT263, GPIO_PORT264,
+        GPIO_PORT265, GPIO_PORT266, GPIO_PORT267, GPIO_PORT268, GPIO_PORT269,
+
+        GPIO_PORT270, GPIO_PORT271, GPIO_PORT272,
+
+        /* Special Pull-up / Pull-down Functions */
+        GPIO_FN_PORT48_KEYIN0_PU, GPIO_FN_PORT49_KEYIN1_PU,
+        GPIO_FN_PORT50_KEYIN2_PU, GPIO_FN_PORT55_KEYIN3_PU,
+        GPIO_FN_PORT56_KEYIN4_PU, GPIO_FN_PORT57_KEYIN5_PU,
+        GPIO_FN_PORT58_KEYIN6_PU,
+
+        /* 49-1 (FN) */
+        GPIO_FN_VBUS0, GPIO_FN_CPORT0, GPIO_FN_CPORT1, GPIO_FN_CPORT2,
+        GPIO_FN_CPORT3, GPIO_FN_CPORT4, GPIO_FN_CPORT5, GPIO_FN_CPORT6,
+        GPIO_FN_CPORT7, GPIO_FN_CPORT8, GPIO_FN_CPORT9, GPIO_FN_CPORT10,
+        GPIO_FN_CPORT11, GPIO_FN_SIN2, GPIO_FN_CPORT12, GPIO_FN_XCTS2,
+        GPIO_FN_CPORT13, GPIO_FN_RFSPO4, GPIO_FN_CPORT14, GPIO_FN_RFSPO5,
+        GPIO_FN_CPORT15, GPIO_FN_CPORT16, GPIO_FN_CPORT17, GPIO_FN_SOUT2,
+        GPIO_FN_CPORT18, GPIO_FN_XRTS2, GPIO_FN_CPORT19, GPIO_FN_CPORT20,
+        GPIO_FN_RFSPO6, GPIO_FN_CPORT21, GPIO_FN_STATUS0, GPIO_FN_CPORT22,
+        GPIO_FN_STATUS1, GPIO_FN_CPORT23, GPIO_FN_STATUS2, GPIO_FN_RFSPO7,
+        GPIO_FN_MPORT0, GPIO_FN_MPORT1, GPIO_FN_B_SYNLD1, GPIO_FN_B_SYNLD2,
+        GPIO_FN_XMAINPS, GPIO_FN_XDIVPS, GPIO_FN_XIDRST, GPIO_FN_IDCLK,
+        GPIO_FN_IDIO, GPIO_FN_SOUT1, GPIO_FN_SCIFA4_TXD,
+        GPIO_FN_M02_BERDAT, GPIO_FN_SIN1, GPIO_FN_SCIFA4_RXD, GPIO_FN_XWUP,
+        GPIO_FN_XRTS1, GPIO_FN_SCIFA4_RTS, GPIO_FN_M03_BERCLK,
+        GPIO_FN_XCTS1, GPIO_FN_SCIFA4_CTS,
+
+        /* 49-2 (FN) */
+        GPIO_FN_HSU_IQ_AGC6, GPIO_FN_MFG2_IN2, GPIO_FN_MSIOF2_MCK0,
+        GPIO_FN_HSU_IQ_AGC5, GPIO_FN_MFG2_IN1, GPIO_FN_MSIOF2_MCK1,
+        GPIO_FN_HSU_IQ_AGC4, GPIO_FN_MSIOF2_RSYNC,
+        GPIO_FN_HSU_IQ_AGC3, GPIO_FN_MFG2_OUT1, GPIO_FN_MSIOF2_RSCK,
+        GPIO_FN_HSU_IQ_AGC2, GPIO_FN_PORT42_KEYOUT0,
+        GPIO_FN_HSU_IQ_AGC1, GPIO_FN_PORT43_KEYOUT1,
+        GPIO_FN_HSU_IQ_AGC0, GPIO_FN_PORT44_KEYOUT2,
+        GPIO_FN_HSU_IQ_AGC_ST, GPIO_FN_PORT45_KEYOUT3,
+        GPIO_FN_HSU_IQ_PDO, GPIO_FN_PORT46_KEYOUT4,
+        GPIO_FN_HSU_IQ_PYO, GPIO_FN_PORT47_KEYOUT5,
+        GPIO_FN_HSU_EN_TXMUX_G3MO, GPIO_FN_PORT48_KEYIN0,
+        GPIO_FN_HSU_I_TXMUX_G3MO, GPIO_FN_PORT49_KEYIN1,
+        GPIO_FN_HSU_Q_TXMUX_G3MO, GPIO_FN_PORT50_KEYIN2,
+        GPIO_FN_HSU_SYO, GPIO_FN_PORT51_MSIOF2_TSYNC,
+        GPIO_FN_HSU_SDO, GPIO_FN_PORT52_MSIOF2_TSCK,
+        GPIO_FN_HSU_TGTTI_G3MO, GPIO_FN_PORT53_MSIOF2_TXD,
+        GPIO_FN_B_TIME_STAMP, GPIO_FN_PORT54_MSIOF2_RXD,
+        GPIO_FN_HSU_SDI, GPIO_FN_PORT55_KEYIN3,
+        GPIO_FN_HSU_SCO, GPIO_FN_PORT56_KEYIN4,
+        GPIO_FN_HSU_DREQ, GPIO_FN_PORT57_KEYIN5,
+        GPIO_FN_HSU_DACK, GPIO_FN_PORT58_KEYIN6,
+        GPIO_FN_HSU_CLK61M, GPIO_FN_PORT59_MSIOF2_SS1,
+        GPIO_FN_HSU_XRST, GPIO_FN_PORT60_MSIOF2_SS2,
+        GPIO_FN_PCMCLKO, GPIO_FN_SYNC8KO, GPIO_FN_DNPCM_A, GPIO_FN_UPPCM_A,
+        GPIO_FN_XTALB1L,
+        GPIO_FN_GPS_AGC1, GPIO_FN_SCIFA0_RTS,
+        GPIO_FN_GPS_AGC2, GPIO_FN_SCIFA0_SCK,
+        GPIO_FN_GPS_AGC3, GPIO_FN_SCIFA0_TXD,
+        GPIO_FN_GPS_AGC4, GPIO_FN_SCIFA0_RXD,
+        GPIO_FN_GPS_PWRD, GPIO_FN_SCIFA0_CTS,
+        GPIO_FN_GPS_IM, GPIO_FN_GPS_IS, GPIO_FN_GPS_QM, GPIO_FN_GPS_QS,
+        GPIO_FN_SIUBOMC, GPIO_FN_TPU2TO0,
+        GPIO_FN_SIUCKB, GPIO_FN_TPU2TO1,
+        GPIO_FN_SIUBOLR, GPIO_FN_BBIF2_TSYNC, GPIO_FN_TPU2TO2,
+        GPIO_FN_SIUBOBT, GPIO_FN_BBIF2_TSCK, GPIO_FN_TPU2TO3,
+        GPIO_FN_SIUBOSLD, GPIO_FN_BBIF2_TXD, GPIO_FN_TPU3TO0,
+        GPIO_FN_SIUBILR, GPIO_FN_TPU3TO1,
+        GPIO_FN_SIUBIBT, GPIO_FN_TPU3TO2,
+        GPIO_FN_SIUBISLD, GPIO_FN_TPU3TO3,
+        GPIO_FN_NMI, GPIO_FN_TPU4TO0,
+        GPIO_FN_DNPCM_M, GPIO_FN_TPU4TO1, GPIO_FN_TPU4TO2, GPIO_FN_TPU4TO3,
+        GPIO_FN_IRQ_TMPB,
+        GPIO_FN_PWEN, GPIO_FN_MFG1_OUT1,
+        GPIO_FN_OVCN, GPIO_FN_MFG1_IN1,
+        GPIO_FN_OVCN2, GPIO_FN_MFG1_IN2,
+
+        /* 49-3 (FN) */
+        GPIO_FN_RFSPO1, GPIO_FN_RFSPO2, GPIO_FN_RFSPO3, GPIO_FN_PORT93_VIO_CKO2,
+        GPIO_FN_USBTERM, GPIO_FN_EXTLP, GPIO_FN_IDIN,
+        GPIO_FN_SCIFA5_CTS, GPIO_FN_MFG0_IN1,
+        GPIO_FN_SCIFA5_RTS, GPIO_FN_MFG0_IN2,
+        GPIO_FN_SCIFA5_RXD,
+        GPIO_FN_SCIFA5_TXD,
+        GPIO_FN_SCIFA5_SCK, GPIO_FN_MFG0_OUT1,
+        GPIO_FN_A0_EA0, GPIO_FN_BS,
+        GPIO_FN_A14_EA14, GPIO_FN_PORT102_KEYOUT0,
+        GPIO_FN_A15_EA15, GPIO_FN_PORT103_KEYOUT1, GPIO_FN_DV_CLKOL,
+        GPIO_FN_A16_EA16, GPIO_FN_PORT104_KEYOUT2,
+        GPIO_FN_DV_VSYNCL, GPIO_FN_MSIOF0_SS1,
+        GPIO_FN_A17_EA17, GPIO_FN_PORT105_KEYOUT3,
+        GPIO_FN_DV_HSYNCL, GPIO_FN_MSIOF0_TSYNC,
+        GPIO_FN_A18_EA18, GPIO_FN_PORT106_KEYOUT4,
+        GPIO_FN_DV_DL0, GPIO_FN_MSIOF0_TSCK,
+        GPIO_FN_A19_EA19, GPIO_FN_PORT107_KEYOUT5,
+        GPIO_FN_DV_DL1, GPIO_FN_MSIOF0_TXD,
+        GPIO_FN_A20_EA20, GPIO_FN_PORT108_KEYIN0,
+        GPIO_FN_DV_DL2, GPIO_FN_MSIOF0_RSCK,
+        GPIO_FN_A21_EA21, GPIO_FN_PORT109_KEYIN1,
+        GPIO_FN_DV_DL3, GPIO_FN_MSIOF0_RSYNC,
+        GPIO_FN_A22_EA22, GPIO_FN_PORT110_KEYIN2,
+        GPIO_FN_DV_DL4, GPIO_FN_MSIOF0_MCK0,
+        GPIO_FN_A23_EA23, GPIO_FN_PORT111_KEYIN3,
+        GPIO_FN_DV_DL5, GPIO_FN_MSIOF0_MCK1,
+        GPIO_FN_A24_EA24, GPIO_FN_PORT112_KEYIN4,
+        GPIO_FN_DV_DL6, GPIO_FN_MSIOF0_RXD,
+        GPIO_FN_A25_EA25, GPIO_FN_PORT113_KEYIN5,
+        GPIO_FN_DV_DL7, GPIO_FN_MSIOF0_SS2,
+        GPIO_FN_A26, GPIO_FN_PORT113_KEYIN6, GPIO_FN_DV_CLKIL,
+        GPIO_FN_D0_ED0_NAF0, GPIO_FN_D1_ED1_NAF1, GPIO_FN_D2_ED2_NAF2,
+        GPIO_FN_D3_ED3_NAF3, GPIO_FN_D4_ED4_NAF4, GPIO_FN_D5_ED5_NAF5,
+        GPIO_FN_D6_ED6_NAF6, GPIO_FN_D7_ED7_NAF7, GPIO_FN_D8_ED8_NAF8,
+        GPIO_FN_D9_ED9_NAF9, GPIO_FN_D10_ED10_NAF10, GPIO_FN_D11_ED11_NAF11,
+        GPIO_FN_D12_ED12_NAF12, GPIO_FN_D13_ED13_NAF13,
+        GPIO_FN_D14_ED14_NAF14, GPIO_FN_D15_ED15_NAF15,
+        GPIO_FN_CS4, GPIO_FN_CS5A, GPIO_FN_CS5B, GPIO_FN_FCE1,
+        GPIO_FN_CS6B, GPIO_FN_XCS2, GPIO_FN_FCE0, GPIO_FN_CS6A,
+        GPIO_FN_DACK0, GPIO_FN_WAIT, GPIO_FN_DREQ0, GPIO_FN_RD_XRD,
+        GPIO_FN_A27, GPIO_FN_RDWR_XWE, GPIO_FN_WE0_XWR0_FWE,
+        GPIO_FN_WE1_XWR1, GPIO_FN_FRB, GPIO_FN_CKO,
+        GPIO_FN_NBRSTOUT, GPIO_FN_NBRST,
+
+        /* 49-4 (FN) */
+        GPIO_FN_RFSPO0, GPIO_FN_PORT146_VIO_CKO2, GPIO_FN_TSTMD,
+        GPIO_FN_VIO_VD, GPIO_FN_VIO_HD,
+        GPIO_FN_VIO_D0, GPIO_FN_VIO_D1, GPIO_FN_VIO_D2,
+        GPIO_FN_VIO_D3, GPIO_FN_VIO_D4, GPIO_FN_VIO_D5,
+        GPIO_FN_VIO_D6, GPIO_FN_VIO_D7, GPIO_FN_VIO_D8,
+        GPIO_FN_VIO_D9, GPIO_FN_VIO_D10, GPIO_FN_VIO_D11,
+        GPIO_FN_VIO_D12, GPIO_FN_VIO_D13, GPIO_FN_VIO_D14,
+        GPIO_FN_VIO_D15, GPIO_FN_VIO_CLK, GPIO_FN_VIO_FIELD,
+        GPIO_FN_VIO_CKO,
+        GPIO_FN_MFG3_IN1, GPIO_FN_MFG3_IN2,
+        GPIO_FN_M9_SLCD_A01, GPIO_FN_MFG3_OUT1, GPIO_FN_TPU0TO0,
+        GPIO_FN_M10_SLCD_CK1, GPIO_FN_MFG4_IN1, GPIO_FN_TPU0TO1,
+        GPIO_FN_M11_SLCD_SO1, GPIO_FN_MFG4_IN2, GPIO_FN_TPU0TO2,
+        GPIO_FN_M12_SLCD_CE1, GPIO_FN_MFG4_OUT1, GPIO_FN_TPU0TO3,
+        GPIO_FN_LCDD0, GPIO_FN_PORT175_KEYOUT0, GPIO_FN_DV_D0,
+        GPIO_FN_SIUCKA, GPIO_FN_MFG0_OUT2,
+        GPIO_FN_LCDD1, GPIO_FN_PORT176_KEYOUT1, GPIO_FN_DV_D1,
+        GPIO_FN_SIUAOLR, GPIO_FN_BBIF2_TSYNC1,
+        GPIO_FN_LCDD2, GPIO_FN_PORT177_KEYOUT2, GPIO_FN_DV_D2,
+        GPIO_FN_SIUAOBT, GPIO_FN_BBIF2_TSCK1,
+        GPIO_FN_LCDD3, GPIO_FN_PORT178_KEYOUT3, GPIO_FN_DV_D3,
+        GPIO_FN_SIUAOSLD, GPIO_FN_BBIF2_TXD1,
+        GPIO_FN_LCDD4, GPIO_FN_PORT179_KEYOUT4, GPIO_FN_DV_D4,
+        GPIO_FN_SIUAISPD, GPIO_FN_MFG1_OUT2,
+        GPIO_FN_LCDD5, GPIO_FN_PORT180_KEYOUT5, GPIO_FN_DV_D5,
+        GPIO_FN_SIUAILR, GPIO_FN_MFG2_OUT2,
+        GPIO_FN_LCDD6, GPIO_FN_DV_D6,
+        GPIO_FN_SIUAIBT, GPIO_FN_MFG3_OUT2, GPIO_FN_XWR2,
+        GPIO_FN_LCDD7, GPIO_FN_DV_D7,
+        GPIO_FN_SIUAISLD, GPIO_FN_MFG4_OUT2, GPIO_FN_XWR3,
+        GPIO_FN_LCDD8, GPIO_FN_DV_D8, GPIO_FN_D16, GPIO_FN_ED16,
+        GPIO_FN_LCDD9, GPIO_FN_DV_D9, GPIO_FN_D17, GPIO_FN_ED17,
+        GPIO_FN_LCDD10, GPIO_FN_DV_D10, GPIO_FN_D18, GPIO_FN_ED18,
+        GPIO_FN_LCDD11, GPIO_FN_DV_D11, GPIO_FN_D19, GPIO_FN_ED19,
+        GPIO_FN_LCDD12, GPIO_FN_DV_D12, GPIO_FN_D20, GPIO_FN_ED20,
+        GPIO_FN_LCDD13, GPIO_FN_DV_D13, GPIO_FN_D21, GPIO_FN_ED21,
+        GPIO_FN_LCDD14, GPIO_FN_DV_D14, GPIO_FN_D22, GPIO_FN_ED22,
+        GPIO_FN_LCDD15, GPIO_FN_DV_D15, GPIO_FN_D23, GPIO_FN_ED23,
+        GPIO_FN_LCDD16, GPIO_FN_DV_HSYNC, GPIO_FN_D24, GPIO_FN_ED24,
+        GPIO_FN_LCDD17, GPIO_FN_DV_VSYNC, GPIO_FN_D25, GPIO_FN_ED25,
+        GPIO_FN_LCDD18, GPIO_FN_DREQ2, GPIO_FN_MSIOF0L_TSCK,
+        GPIO_FN_D26, GPIO_FN_ED26,
+        GPIO_FN_LCDD19, GPIO_FN_MSIOF0L_TSYNC,
+        GPIO_FN_D27, GPIO_FN_ED27,
+        GPIO_FN_LCDD20, GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0,
+        GPIO_FN_D28, GPIO_FN_ED28,
+        GPIO_FN_LCDD21, GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1,
+        GPIO_FN_D29, GPIO_FN_ED29,
+        GPIO_FN_LCDD22, GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_SS1,
+        GPIO_FN_D30, GPIO_FN_ED30,
+        GPIO_FN_LCDD23, GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_SS2,
+        GPIO_FN_D31, GPIO_FN_ED31,
+        GPIO_FN_LCDDCK, GPIO_FN_LCDWR, GPIO_FN_DV_CKO, GPIO_FN_SIUAOSPD,
+        GPIO_FN_LCDRD, GPIO_FN_DACK2, GPIO_FN_MSIOF0L_RSYNC,
+
+
+        /* 49-5 (FN) */
+        GPIO_FN_LCDHSYN, GPIO_FN_LCDCS, GPIO_FN_LCDCS2, GPIO_FN_DACK3,
+        GPIO_FN_LCDDISP, GPIO_FN_LCDRS, GPIO_FN_DREQ3, GPIO_FN_MSIOF0L_RSCK,
+        GPIO_FN_LCDCSYN, GPIO_FN_LCDCSYN2, GPIO_FN_DV_CKI,
+        GPIO_FN_LCDLCLK, GPIO_FN_DREQ1, GPIO_FN_MSIOF0L_RXD,
+        GPIO_FN_LCDDON, GPIO_FN_LCDDON2, GPIO_FN_DACK1, GPIO_FN_MSIOF0L_TXD,
+        GPIO_FN_VIO_DR0, GPIO_FN_VIO_DR1, GPIO_FN_VIO_DR2, GPIO_FN_VIO_DR3,
+        GPIO_FN_VIO_DR4, GPIO_FN_VIO_DR5, GPIO_FN_VIO_DR6, GPIO_FN_VIO_DR7,
+        GPIO_FN_VIO_VDR, GPIO_FN_VIO_HDR,
+        GPIO_FN_VIO_CLKR, GPIO_FN_VIO_CKOR,
+        GPIO_FN_SCIFA1_TXD, GPIO_FN_GPS_PGFA0,
+        GPIO_FN_SCIFA1_SCK, GPIO_FN_GPS_PGFA1,
+        GPIO_FN_SCIFA1_RTS, GPIO_FN_GPS_EPPSINMON,
+        GPIO_FN_SCIFA1_RXD, GPIO_FN_SCIFA1_CTS,
+        GPIO_FN_MSIOF1_TXD, GPIO_FN_SCIFA1_TXD2, GPIO_FN_GPS_TXD,
+        GPIO_FN_MSIOF1_TSYNC, GPIO_FN_SCIFA1_CTS2, GPIO_FN_I2C_SDA2,
+        GPIO_FN_MSIOF1_TSCK, GPIO_FN_SCIFA1_SCK2,
+        GPIO_FN_MSIOF1_RXD, GPIO_FN_SCIFA1_RXD2, GPIO_FN_GPS_RXD,
+        GPIO_FN_MSIOF1_RSCK, GPIO_FN_SCIFA1_RTS2,
+        GPIO_FN_MSIOF1_RSYNC, GPIO_FN_I2C_SCL2,
+        GPIO_FN_MSIOF1_MCK0, GPIO_FN_MSIOF1_MCK1,
+        GPIO_FN_MSIOF1_SS1, GPIO_FN_EDBGREQ3,
+        GPIO_FN_MSIOF1_SS2,
+        GPIO_FN_PORT236_IROUT, GPIO_FN_IRDA_OUT,
+        GPIO_FN_IRDA_IN, GPIO_FN_IRDA_FIRSEL,
+        GPIO_FN_TPU1TO0, GPIO_FN_TS_SPSYNC3,
+        GPIO_FN_TPU1TO1, GPIO_FN_TS_SDAT3,
+        GPIO_FN_TPU1TO2, GPIO_FN_TS_SDEN3, GPIO_FN_PORT241_MSIOF2_SS1,
+        GPIO_FN_TPU1TO3, GPIO_FN_PORT242_MSIOF2_TSCK,
+        GPIO_FN_M13_BSW, GPIO_FN_PORT243_MSIOF2_TSYNC,
+        GPIO_FN_M14_GSW, GPIO_FN_PORT244_MSIOF2_TXD,
+        GPIO_FN_PORT245_IROUT, GPIO_FN_M15_RSW,
+        GPIO_FN_SOUT3, GPIO_FN_SCIFA2_TXD1,
+        GPIO_FN_SIN3, GPIO_FN_SCIFA2_RXD1,
+        GPIO_FN_XRTS3, GPIO_FN_SCIFA2_RTS1, GPIO_FN_PORT248_MSIOF2_SS2,
+        GPIO_FN_XCTS3, GPIO_FN_SCIFA2_CTS1, GPIO_FN_PORT249_MSIOF2_RXD,
+        GPIO_FN_DINT, GPIO_FN_SCIFA2_SCK1, GPIO_FN_TS_SCK3,
+        GPIO_FN_SDHICLK0, GPIO_FN_TCK2,
+        GPIO_FN_SDHICD0,
+        GPIO_FN_SDHID0_0, GPIO_FN_TMS2,
+        GPIO_FN_SDHID0_1, GPIO_FN_TDO2,
+        GPIO_FN_SDHID0_2, GPIO_FN_TDI2,
+        GPIO_FN_SDHID0_3, GPIO_FN_RTCK2,
+
+        /* 49-6 (FN) */
+        GPIO_FN_SDHICMD0, GPIO_FN_TRST2,
+        GPIO_FN_SDHIWP0, GPIO_FN_EDBGREQ2,
+        GPIO_FN_SDHICLK1, GPIO_FN_TCK3,
+        GPIO_FN_SDHID1_0, GPIO_FN_M11_SLCD_SO2,
+        GPIO_FN_TS_SPSYNC2, GPIO_FN_TMS3,
+        GPIO_FN_SDHID1_1, GPIO_FN_M9_SLCD_AO2,
+        GPIO_FN_TS_SDAT2, GPIO_FN_TDO3,
+        GPIO_FN_SDHID1_2, GPIO_FN_M10_SLCD_CK2,
+        GPIO_FN_TS_SDEN2, GPIO_FN_TDI3,
+        GPIO_FN_SDHID1_3, GPIO_FN_M12_SLCD_CE2,
+        GPIO_FN_TS_SCK2, GPIO_FN_RTCK3,
+        GPIO_FN_SDHICMD1, GPIO_FN_TRST3,
+        GPIO_FN_SDHICLK2, GPIO_FN_SCIFB_SCK,
+        GPIO_FN_SDHID2_0, GPIO_FN_SCIFB_TXD,
+        GPIO_FN_SDHID2_1, GPIO_FN_SCIFB_CTS,
+        GPIO_FN_SDHID2_2, GPIO_FN_SCIFB_RXD,
+        GPIO_FN_SDHID2_3, GPIO_FN_SCIFB_RTS,
+        GPIO_FN_SDHICMD2,
+        GPIO_FN_RESETOUTS,
+        GPIO_FN_DIVLOCK,
+};
+
+#endif /* __ASM_SH7367_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h
new file mode 100644
index 00000000000..dc34f00c56b
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/sh7372.h
@@ -0,0 +1,434 @@
+/*
+ * Copyright (C) 2010 Renesas Solutions Corp.
+ *
+ * Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef __ASM_SH7372_H__
+#define __ASM_SH7372_H__
+
+/*
+ * Pin Function Controller:
+ *      GPIO_FN_xx - GPIO used to select pin function
+ *      GPIO_PORTxx - GPIO mapped to real I/O pin on CPU
+ */
+enum {
+        /* PORT */
+        GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,
+        GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,
+
+        GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,
+        GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,
+
+        GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,
+        GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,
+
+        GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,
+        GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,
+
+        GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,
+        GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,
+
+        GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,
+        GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,
+
+        GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,
+        GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,
+
+        GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,
+        GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,
+
+        GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,
+        GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,
+
+        GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,
+        GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,
+
+        GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,
+        GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,
+
+        GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,
+        GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118, GPIO_PORT119,
+
+        GPIO_PORT120, GPIO_PORT121, GPIO_PORT122, GPIO_PORT123, GPIO_PORT124,
+        GPIO_PORT125, GPIO_PORT126, GPIO_PORT127, GPIO_PORT128, GPIO_PORT129,
+
+        GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,
+        GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,
+
+        GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,
+        GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,
+
+        GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,
+        GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,
+
+        GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,
+        GPIO_PORT165, GPIO_PORT166, GPIO_PORT167, GPIO_PORT168, GPIO_PORT169,
+
+        GPIO_PORT170, GPIO_PORT171, GPIO_PORT172, GPIO_PORT173, GPIO_PORT174,
+        GPIO_PORT175, GPIO_PORT176, GPIO_PORT177, GPIO_PORT178, GPIO_PORT179,
+
+        GPIO_PORT180, GPIO_PORT181, GPIO_PORT182, GPIO_PORT183, GPIO_PORT184,
+        GPIO_PORT185, GPIO_PORT186, GPIO_PORT187, GPIO_PORT188, GPIO_PORT189,
+
+        GPIO_PORT190,
+
+        /* IRQ */
+        GPIO_FN_IRQ0_6,         /* PORT   6 */
+        GPIO_FN_IRQ0_162,       /* PORT 162 */
+        GPIO_FN_IRQ1,           /* PORT  12 */
+        GPIO_FN_IRQ2_4,         /* PORT   4 */
+        GPIO_FN_IRQ2_5,         /* PORT   5 */
+        GPIO_FN_IRQ3_8,         /* PORT   8 */
+        GPIO_FN_IRQ3_16,        /* PORT  16 */
+        GPIO_FN_IRQ4_17,        /* PORT  17 */
+        GPIO_FN_IRQ4_163,       /* PORT 163 */
+        GPIO_FN_IRQ5,           /* PORT  18 */
+        GPIO_FN_IRQ6_39,        /* PORT  39 */
+        GPIO_FN_IRQ6_164,       /* PORT 164 */
+        GPIO_FN_IRQ7_40,        /* PORT  40 */
+        GPIO_FN_IRQ7_167,       /* PORT 167 */
+        GPIO_FN_IRQ8_41,        /* PORT  41 */
+        GPIO_FN_IRQ8_168,       /* PORT 168 */
+        GPIO_FN_IRQ9_42,        /* PORT  42 */
+        GPIO_FN_IRQ9_169,       /* PORT 169 */
+        GPIO_FN_IRQ10,          /* PORT  65 */
+        GPIO_FN_IRQ11,          /* PORT  67 */
+        GPIO_FN_IRQ12_80,       /* PORT  80 */
+        GPIO_FN_IRQ12_137,      /* PORT 137 */
+        GPIO_FN_IRQ13_81,       /* PORT  81 */
+        GPIO_FN_IRQ13_145,      /* PORT 145 */
+        GPIO_FN_IRQ14_82,       /* PORT  82 */
+        GPIO_FN_IRQ14_146,      /* PORT 146 */
+        GPIO_FN_IRQ15_83,       /* PORT  83 */
+        GPIO_FN_IRQ15_147,      /* PORT 147 */
+        GPIO_FN_IRQ16_84,       /* PORT  84 */
+        GPIO_FN_IRQ16_170,      /* PORT 170 */
+        GPIO_FN_IRQ17,          /* PORT  85 */
+        GPIO_FN_IRQ18,          /* PORT  86 */
+        GPIO_FN_IRQ19,          /* PORT  87 */
+        GPIO_FN_IRQ20,          /* PORT  92 */
+        GPIO_FN_IRQ21,          /* PORT  93 */
+        GPIO_FN_IRQ22,          /* PORT  94 */
+        GPIO_FN_IRQ23,          /* PORT  95 */
+        GPIO_FN_IRQ24,          /* PORT 112 */
+        GPIO_FN_IRQ25,          /* PORT 119 */
+        GPIO_FN_IRQ26_121,      /* PORT 121 */
+        GPIO_FN_IRQ26_172,      /* PORT 172 */
+        GPIO_FN_IRQ27_122,      /* PORT 122 */
+        GPIO_FN_IRQ27_180,      /* PORT 180 */
+        GPIO_FN_IRQ28_123,      /* PORT 123 */
+        GPIO_FN_IRQ28_181,      /* PORT 181 */
+        GPIO_FN_IRQ29_129,      /* PORT 129 */
+        GPIO_FN_IRQ29_182,      /* PORT 182 */
+        GPIO_FN_IRQ30_130,      /* PORT 130 */
+        GPIO_FN_IRQ30_183,      /* PORT 183 */
+        GPIO_FN_IRQ31_138,      /* PORT 138 */
+        GPIO_FN_IRQ31_184,      /* PORT 184 */
+
+        /*
+         * MSIOF0       (PORT 36, 37, 38, 39
+         *                    40, 41, 42, 43, 44, 45)
+         */
+        GPIO_FN_MSIOF0_TSYNC,   GPIO_FN_MSIOF0_TSCK,
+        GPIO_FN_MSIOF0_RXD,     GPIO_FN_MSIOF0_RSCK,
+        GPIO_FN_MSIOF0_RSYNC,   GPIO_FN_MSIOF0_MCK0,
+        GPIO_FN_MSIOF0_MCK1,    GPIO_FN_MSIOF0_SS1,
+        GPIO_FN_MSIOF0_SS2,     GPIO_FN_MSIOF0_TXD,
+
+        /*
+         * MSIOF1       (PORT 39, 40, 41, 42, 43, 44
+         *                    84, 85, 86, 87, 88, 89, 90, 91, 92, 93)
+         */
+        GPIO_FN_MSIOF1_TSCK_39, GPIO_FN_MSIOF1_TSYNC_40,
+        GPIO_FN_MSIOF1_TSCK_88, GPIO_FN_MSIOF1_TSYNC_89,
+        GPIO_FN_MSIOF1_TXD_41,  GPIO_FN_MSIOF1_RXD_42,
+        GPIO_FN_MSIOF1_TXD_90,  GPIO_FN_MSIOF1_RXD_91,
+        GPIO_FN_MSIOF1_SS1_43,  GPIO_FN_MSIOF1_SS2_44,
+        GPIO_FN_MSIOF1_SS1_92,  GPIO_FN_MSIOF1_SS2_93,
+        GPIO_FN_MSIOF1_RSCK,    GPIO_FN_MSIOF1_RSYNC,
+        GPIO_FN_MSIOF1_MCK0,    GPIO_FN_MSIOF1_MCK1,
+
+        /*
+         * MSIOF2       (PORT 134, 135, 136, 137, 138, 139
+         *                    148, 149, 150, 151)
+         */
+        GPIO_FN_MSIOF2_RSCK,    GPIO_FN_MSIOF2_RSYNC,
+        GPIO_FN_MSIOF2_MCK0,    GPIO_FN_MSIOF2_MCK1,
+        GPIO_FN_MSIOF2_SS1,     GPIO_FN_MSIOF2_SS2,
+        GPIO_FN_MSIOF2_TSYNC,   GPIO_FN_MSIOF2_TSCK,
+        GPIO_FN_MSIOF2_RXD,     GPIO_FN_MSIOF2_TXD,
+
+        /* MSIOF3       (PORT 76, 77, 78, 79, 80, 81, 82, 83) */
+        GPIO_FN_BBIF1_RXD,      GPIO_FN_BBIF1_TSYNC,
+        GPIO_FN_BBIF1_TSCK,     GPIO_FN_BBIF1_TXD,
+        GPIO_FN_BBIF1_RSCK,     GPIO_FN_BBIF1_RSYNC,
+        GPIO_FN_BBIF1_FLOW,     GPIO_FN_BB_RX_FLOW_N,
+
+        /* MSIOF4       (PORT 0, 1, 2, 3) */
+        GPIO_FN_BBIF2_TSCK1,    GPIO_FN_BBIF2_TSYNC1,
+        GPIO_FN_BBIF2_TXD1,     GPIO_FN_BBIF2_RXD,
+
+        /* FSI          (PORT 4, 5, 6, 7, 8, 9, 10, 11, 15) */
+        GPIO_FN_FSIACK,         GPIO_FN_FSIBCK,
+        GPIO_FN_FSIAILR,        GPIO_FN_FSIAIBT,
+        GPIO_FN_FSIAISLD,       GPIO_FN_FSIAOMC,
+        GPIO_FN_FSIAOLR,        GPIO_FN_FSIAOBT,
+        GPIO_FN_FSIAOSLD,       GPIO_FN_FSIASPDIF_11,
+        GPIO_FN_FSIASPDIF_15,
+
+        /* FMSI         (PORT 12, 13, 14, 15, 16, 17, 18, 65) */
+        GPIO_FN_FMSOCK,         GPIO_FN_FMSOOLR,
+        GPIO_FN_FMSIOLR,        GPIO_FN_FMSOOBT,
+        GPIO_FN_FMSIOBT,        GPIO_FN_FMSOSLD,
+        GPIO_FN_FMSOILR,        GPIO_FN_FMSIILR,
+        GPIO_FN_FMSOIBT,        GPIO_FN_FMSIIBT,
+        GPIO_FN_FMSISLD,        GPIO_FN_FMSICK,
+
+        /* SCIFA0       (PORT 152, 153, 156, 157, 158) */
+        GPIO_FN_SCIFA0_TXD,     GPIO_FN_SCIFA0_RXD,
+        GPIO_FN_SCIFA0_SCK,     GPIO_FN_SCIFA0_RTS,
+        GPIO_FN_SCIFA0_CTS,
+
+        /* SCIFA1       (PORT 154, 155, 159, 160, 161) */
+        GPIO_FN_SCIFA1_TXD,     GPIO_FN_SCIFA1_RXD,
+        GPIO_FN_SCIFA1_SCK,     GPIO_FN_SCIFA1_RTS,
+        GPIO_FN_SCIFA1_CTS,
+
+        /* SCIFA2       (PORT 94, 95, 96, 97, 98) */
+        GPIO_FN_SCIFA2_CTS1,    GPIO_FN_SCIFA2_RTS1,
+        GPIO_FN_SCIFA2_TXD1,    GPIO_FN_SCIFA2_RXD1,
+        GPIO_FN_SCIFA2_SCK1,
+
+        /* SCIFA3       (PORT 43, 44,
+                             140, 141, 142, 143, 144) */
+        GPIO_FN_SCIFA3_CTS_43,  GPIO_FN_SCIFA3_CTS_140,
+        GPIO_FN_SCIFA3_RTS_44,  GPIO_FN_SCIFA3_RTS_141,
+        GPIO_FN_SCIFA3_SCK,     GPIO_FN_SCIFA3_TXD,
+        GPIO_FN_SCIFA3_RXD,
+
+        /* SCIFA4       (PORT 5, 6) */
+        GPIO_FN_SCIFA4_RXD,     GPIO_FN_SCIFA4_TXD,
+
+        /* SCIFA5       (PORT 8, 12) */
+        GPIO_FN_SCIFA5_RXD,     GPIO_FN_SCIFA5_TXD,
+
+        /* SCIFB        (PORT 162, 163, 164, 165, 166) */
+        GPIO_FN_SCIFB_SCK,      GPIO_FN_SCIFB_RTS,
+        GPIO_FN_SCIFB_CTS,      GPIO_FN_SCIFB_TXD,
+        GPIO_FN_SCIFB_RXD,
+
+        /*
+         * CEU          (PORT 16, 17,
+         *                    100, 101, 102, 103, 104, 105, 106, 107, 108, 109,
+         *                    110, 111, 112, 113, 114, 115, 116, 117, 118, 119,
+         *                    120)
+         */
+        GPIO_FN_VIO_HD,         GPIO_FN_VIO_CKO1,       GPIO_FN_VIO_CKO2,
+        GPIO_FN_VIO_VD,         GPIO_FN_VIO_CLK,        GPIO_FN_VIO_FIELD,
+        GPIO_FN_VIO_CKO,
+        GPIO_FN_VIO_D0,         GPIO_FN_VIO_D1,         GPIO_FN_VIO_D2,
+        GPIO_FN_VIO_D3,         GPIO_FN_VIO_D4,         GPIO_FN_VIO_D5,
+        GPIO_FN_VIO_D6,         GPIO_FN_VIO_D7,         GPIO_FN_VIO_D8,
+        GPIO_FN_VIO_D9,         GPIO_FN_VIO_D10,        GPIO_FN_VIO_D11,
+        GPIO_FN_VIO_D12,        GPIO_FN_VIO_D13,        GPIO_FN_VIO_D14,
+        GPIO_FN_VIO_D15,
+
+        /* USB0         (PORT 113, 114, 115, 116, 117, 167) */
+        GPIO_FN_IDIN_0,         GPIO_FN_EXTLP_0,
+        GPIO_FN_OVCN2_0,        GPIO_FN_PWEN_0,
+        GPIO_FN_OVCN_0,         GPIO_FN_VBUS0_0,
+
+        /* USB1         (PORT 18, 113, 114, 115, 116, 117, 138, 162, 168) */
+        GPIO_FN_IDIN_1_18,      GPIO_FN_IDIN_1_113,
+        GPIO_FN_PWEN_1_115,     GPIO_FN_PWEN_1_138,
+        GPIO_FN_OVCN_1_114,     GPIO_FN_OVCN_1_162,
+        GPIO_FN_EXTLP_1,        GPIO_FN_OVCN2_1,
+        GPIO_FN_VBUS0_1,
+
+        /* GPIO         (PORT 41, 42, 43, 44) */
+        GPIO_FN_GPI0,   GPIO_FN_GPI1,   GPIO_FN_GPO0,   GPIO_FN_GPO1,
+
+        /*
+         * BSC          (PORT 19,
+         *                    20, 21, 22, 25, 26, 27, 28, 29,
+         *                    30, 31, 32, 33, 34, 35, 36, 37, 38, 39,
+         *                    40, 41, 42, 43, 44, 45,
+         *                    62, 63, 64, 65, 66, 67,
+         *                    71, 72, 74, 75)
+         */
+        GPIO_FN_BS,     GPIO_FN_WE1,
+        GPIO_FN_CKO,    GPIO_FN_WAIT,   GPIO_FN_RDWR,
+
+        GPIO_FN_A0,     GPIO_FN_A1,     GPIO_FN_A2,     GPIO_FN_A3,
+        GPIO_FN_A6,     GPIO_FN_A7,     GPIO_FN_A8,     GPIO_FN_A9,
+        GPIO_FN_A10,    GPIO_FN_A11,    GPIO_FN_A12,    GPIO_FN_A13,
+        GPIO_FN_A14,    GPIO_FN_A15,    GPIO_FN_A16,    GPIO_FN_A17,
+        GPIO_FN_A18,    GPIO_FN_A19,    GPIO_FN_A20,    GPIO_FN_A21,
+        GPIO_FN_A22,    GPIO_FN_A23,    GPIO_FN_A24,    GPIO_FN_A25,
+        GPIO_FN_A26,
+
+        GPIO_FN_CS0,    GPIO_FN_CS2,    GPIO_FN_CS4,
+        GPIO_FN_CS5A,   GPIO_FN_CS5B,   GPIO_FN_CS6A,
+
+        /*
+         * BSC/FLCTL            (PORT 23, 24,
+         *                            46, 47, 48, 49,
+         *                            50, 51, 52, 53, 54, 55, 56, 57, 58, 59,
+         *                            60, 61, 69, 70)
+         */
+        GPIO_FN_RD_FSC,         GPIO_FN_WE0_FWE,
+        GPIO_FN_A4_FOE,         GPIO_FN_A5_FCDE,
+        GPIO_FN_D0_NAF0,        GPIO_FN_D1_NAF1,        GPIO_FN_D2_NAF2,
+        GPIO_FN_D3_NAF3,        GPIO_FN_D4_NAF4,        GPIO_FN_D5_NAF5,
+        GPIO_FN_D6_NAF6,        GPIO_FN_D7_NAF7,        GPIO_FN_D8_NAF8,
+        GPIO_FN_D9_NAF9,        GPIO_FN_D10_NAF10,      GPIO_FN_D11_NAF11,
+        GPIO_FN_D12_NAF12,      GPIO_FN_D13_NAF13,      GPIO_FN_D14_NAF14,
+        GPIO_FN_D15_NAF15,
+
+        /*
+         * MMCIF(1)             (PORT 84, 85, 86, 87, 88, 89,
+         *                            90, 91, 92, 99)
+         */
+        GPIO_FN_MMCD0_0,        GPIO_FN_MMCD0_1,        GPIO_FN_MMCD0_2,
+        GPIO_FN_MMCD0_3,        GPIO_FN_MMCD0_4,        GPIO_FN_MMCD0_5,
+        GPIO_FN_MMCD0_6,        GPIO_FN_MMCD0_7,
+        GPIO_FN_MMCCMD0,        GPIO_FN_MMCCLK0,
+
+        /* MMCIF(2)             (PORT 54, 55, 56, 57, 58, 59, 60, 61, 66, 67) */
+        GPIO_FN_MMCD1_0,        GPIO_FN_MMCD1_1,        GPIO_FN_MMCD1_2,
+        GPIO_FN_MMCD1_3,        GPIO_FN_MMCD1_4,        GPIO_FN_MMCD1_5,
+        GPIO_FN_MMCD1_6,        GPIO_FN_MMCD1_7,
+        GPIO_FN_MMCCLK1,        GPIO_FN_MMCCMD1,
+
+        /* SPU2         (PORT 65) */
+        GPIO_FN_VINT_I,
+
+        /* FLCTL        (PORT 66, 68, 73) */
+        GPIO_FN_FCE1,   GPIO_FN_FCE0,   GPIO_FN_FRB,
+
+        /* HSI          (PORT 76, 77, 78, 79, 80, 81, 82, 83) */
+        GPIO_FN_GP_RX_FLAG,     GPIO_FN_GP_RX_DATA,     GPIO_FN_GP_TX_READY,
+        GPIO_FN_GP_RX_WAKE,     GPIO_FN_MP_TX_FLAG,     GPIO_FN_MP_TX_DATA,
+        GPIO_FN_MP_RX_READY,    GPIO_FN_MP_TX_WAKE,
+
+        /*
+         * MFI          (PORT 76, 77, 78, 79,
+         *                    80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
+         *                    90, 91, 92, 93, 94, 95, 96, 97, 98, 99)
+         */
+        GPIO_FN_MFIv6,  /* see MSEL4CR 6 */
+        GPIO_FN_MFIv4,  /* see MSEL4CR 6 */
+
+        GPIO_FN_MEMC_CS0,               GPIO_FN_MEMC_BUSCLK_MEMC_A0,
+        GPIO_FN_MEMC_CS1_MEMC_A1,       GPIO_FN_MEMC_ADV_MEMC_DREQ0,
+        GPIO_FN_MEMC_WAIT_MEMC_DREQ1,   GPIO_FN_MEMC_NOE,
+        GPIO_FN_MEMC_NWE,               GPIO_FN_MEMC_INT,
+
+        GPIO_FN_MEMC_AD0,       GPIO_FN_MEMC_AD1,       GPIO_FN_MEMC_AD2,
+        GPIO_FN_MEMC_AD3,       GPIO_FN_MEMC_AD4,       GPIO_FN_MEMC_AD5,
+        GPIO_FN_MEMC_AD6,       GPIO_FN_MEMC_AD7,       GPIO_FN_MEMC_AD8,
+        GPIO_FN_MEMC_AD9,       GPIO_FN_MEMC_AD10,      GPIO_FN_MEMC_AD11,
+        GPIO_FN_MEMC_AD12,      GPIO_FN_MEMC_AD13,      GPIO_FN_MEMC_AD14,
+        GPIO_FN_MEMC_AD15,
+
+        /* SIM          (PORT 94, 95, 98) */
+        GPIO_FN_SIM_RST,        GPIO_FN_SIM_CLK,        GPIO_FN_SIM_D,
+
+        /* TPU          (PORT 93, 99, 112, 160, 161) */
+        GPIO_FN_TPU0TO0,        GPIO_FN_TPU0TO1,
+        GPIO_FN_TPU0TO2_93,     GPIO_FN_TPU0TO2_99,
+        GPIO_FN_TPU0TO3,
+
+        /* I2C2         (PORT 110, 111) */
+        GPIO_FN_I2C_SCL2,       GPIO_FN_I2C_SDA2,
+
+        /* I2C3(1)      (PORT 114, 115) */
+        GPIO_FN_I2C_SCL3,       GPIO_FN_I2C_SDA3,
+
+        /* I2C3(2)      (PORT 137, 145) */
+        GPIO_FN_I2C_SCL3S,      GPIO_FN_I2C_SDA3S,
+
+        /* I2C4(2)      (PORT 116, 117) */
+        GPIO_FN_I2C_SCL4,       GPIO_FN_I2C_SDA4,
+
+        /* I2C4(2)      (PORT 146, 147) */
+        GPIO_FN_I2C_SCL4S,      GPIO_FN_I2C_SDA4S,
+
+        /*
+         * KEYSC        (PORT 121, 122, 123, 124, 125, 126, 127, 128, 129,
+         *                    130, 131, 132, 133, 134, 135, 136)
+         */
+        GPIO_FN_KEYOUT0,        GPIO_FN_KEYIN0_121,     GPIO_FN_KEYIN0_136,
+        GPIO_FN_KEYOUT1,        GPIO_FN_KEYIN1_122,     GPIO_FN_KEYIN1_135,
+        GPIO_FN_KEYOUT2,        GPIO_FN_KEYIN2_123,     GPIO_FN_KEYIN2_134,
+        GPIO_FN_KEYOUT3,        GPIO_FN_KEYIN3_124,     GPIO_FN_KEYIN3_133,
+        GPIO_FN_KEYOUT4,        GPIO_FN_KEYIN4,
+        GPIO_FN_KEYOUT5,        GPIO_FN_KEYIN5,
+        GPIO_FN_KEYOUT6,        GPIO_FN_KEYIN6,
+        GPIO_FN_KEYOUT7,        GPIO_FN_KEYIN7,
+
+        /*
+         * LCDC         (PORT      121, 122, 123, 124, 125, 126, 127, 128, 129,
+         *                    130, 131, 132, 133, 134, 135, 136, 137, 138, 139,
+         *                    140, 141, 142, 143, 144, 145, 146, 147, 148, 149,
+         *                    150, 151)
+         */
+        GPIO_FN_LCDC0_SELECT, /* LCDC 0 */
+        GPIO_FN_LCDC1_SELECT, /* LCDC 1 */
+        GPIO_FN_LCDHSYN,        GPIO_FN_LCDCS,  GPIO_FN_LCDVSYN,
+        GPIO_FN_LCDDCK,         GPIO_FN_LCDWR,  GPIO_FN_LCDRD,
+        GPIO_FN_LCDDISP,        GPIO_FN_LCDRS,  GPIO_FN_LCDLCLK,
+        GPIO_FN_LCDDON,
+
+        GPIO_FN_LCDD0,  GPIO_FN_LCDD1,  GPIO_FN_LCDD2,  GPIO_FN_LCDD3,
+        GPIO_FN_LCDD4,  GPIO_FN_LCDD5,  GPIO_FN_LCDD6,  GPIO_FN_LCDD7,
+        GPIO_FN_LCDD8,  GPIO_FN_LCDD9,  GPIO_FN_LCDD10, GPIO_FN_LCDD11,
+        GPIO_FN_LCDD12, GPIO_FN_LCDD13, GPIO_FN_LCDD14, GPIO_FN_LCDD15,
+        GPIO_FN_LCDD16, GPIO_FN_LCDD17, GPIO_FN_LCDD18, GPIO_FN_LCDD19,
+        GPIO_FN_LCDD20, GPIO_FN_LCDD21, GPIO_FN_LCDD22, GPIO_FN_LCDD23,
+
+        /* IRDA         (PORT 139, 140, 141, 142) */
+        GPIO_FN_IRDA_OUT,       GPIO_FN_IRDA_IN,        GPIO_FN_IRDA_FIRSEL,
+        GPIO_FN_IROUT_139,      GPIO_FN_IROUT_140,
+
+        /* TSIF1        (PORT 156, 157, 158, 159) */
+        GPIO_FN_TS0_1SELECT, /* TSIF0 - 1 select */
+        GPIO_FN_TS0_2SELECT, /* TSIF0 - 2 select */
+        GPIO_FN_TS1_1SELECT, /* TSIF1 - 1 select */
+        GPIO_FN_TS1_2SELECT, /* TSIF1 - 2 select */
+
+        GPIO_FN_TS_SPSYNC1,     GPIO_FN_TS_SDAT1,
+        GPIO_FN_TS_SDEN1,       GPIO_FN_TS_SCK1,
+
+        /* TSIF2        (PORT 137, 145, 146, 147) */
+        GPIO_FN_TS_SPSYNC2,     GPIO_FN_TS_SDAT2,
+        GPIO_FN_TS_SDEN2,       GPIO_FN_TS_SCK2,
+
+        /* HDMI         (PORT 169, 170) */
+        GPIO_FN_HDMI_HPD,       GPIO_FN_HDMI_CEC,
+
+        /* SDHI0        (PORT 171, 172, 173, 174, 175, 176, 177, 178) */
+        GPIO_FN_SDHICLK0,       GPIO_FN_SDHICD0,
+        GPIO_FN_SDHICMD0,       GPIO_FN_SDHIWP0,
+        GPIO_FN_SDHID0_0,       GPIO_FN_SDHID0_1,
+        GPIO_FN_SDHID0_2,       GPIO_FN_SDHID0_3,
+
+        /* SDHI1        (PORT 179, 180, 181, 182, 183, 184) */
+        GPIO_FN_SDHICLK1,       GPIO_FN_SDHICMD1,       GPIO_FN_SDHID1_0,
+        GPIO_FN_SDHID1_1,       GPIO_FN_SDHID1_2,       GPIO_FN_SDHID1_3,
+
+        /* SDHI2        (PORT 185, 186, 187, 188, 189, 190) */
+        GPIO_FN_SDHICLK2,       GPIO_FN_SDHICMD2,       GPIO_FN_SDHID2_0,
+        GPIO_FN_SDHID2_1,       GPIO_FN_SDHID2_2,       GPIO_FN_SDHID2_3,
+
+        /* SDENC        see MSEL4CR 19 */
+        GPIO_FN_SDENC_CPG,
+        GPIO_FN_SDENC_DV_CLKI,
+};
+
+#endif /* __ASM_SH7372_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/sh7377.h b/arch/arm/mach-shmobile/include/mach/sh7377.h
new file mode 100644
index 00000000000..f580e227dd1
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/sh7377.h
@@ -0,0 +1,360 @@
+#ifndef __ASM_SH7377_H__
+#define __ASM_SH7377_H__
+
+/* Pin Function Controller:
+ * GPIO_FN_xx - GPIO used to select pin function
+ * GPIO_PORTxx - GPIO mapped to real I/O pin on CPU
+ */
+enum {
+        /* 55-1 -> 55-5 (GPIO) */
+        GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,
+        GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,
+
+        GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,
+        GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,
+
+        GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,
+        GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,
+
+        GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,
+        GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,
+
+        GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,
+        GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,
+
+        GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,
+        GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,
+
+        GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,
+        GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,
+
+        GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,
+        GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,
+
+        GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,
+        GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,
+
+        GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,
+        GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,
+
+        GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,
+        GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,
+
+        GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,
+        GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118,
+
+        GPIO_PORT128, GPIO_PORT129,
+
+        GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,
+        GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,
+
+        GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,
+        GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,
+
+        GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,
+        GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,
+
+        GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,
+
+        GPIO_PORT192, GPIO_PORT193, GPIO_PORT194,
+        GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,
+
+        GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,
+        GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,
+
+        GPIO_PORT210, GPIO_PORT211, GPIO_PORT212, GPIO_PORT213, GPIO_PORT214,
+        GPIO_PORT215, GPIO_PORT216, GPIO_PORT217, GPIO_PORT218, GPIO_PORT219,
+
+        GPIO_PORT220, GPIO_PORT221, GPIO_PORT222, GPIO_PORT223, GPIO_PORT224,
+        GPIO_PORT225, GPIO_PORT226, GPIO_PORT227, GPIO_PORT228, GPIO_PORT229,
+
+        GPIO_PORT230, GPIO_PORT231, GPIO_PORT232, GPIO_PORT233, GPIO_PORT234,
+        GPIO_PORT235, GPIO_PORT236, GPIO_PORT237, GPIO_PORT238, GPIO_PORT239,
+
+        GPIO_PORT240, GPIO_PORT241, GPIO_PORT242, GPIO_PORT243, GPIO_PORT244,
+        GPIO_PORT245, GPIO_PORT246, GPIO_PORT247, GPIO_PORT248, GPIO_PORT249,
+
+        GPIO_PORT250, GPIO_PORT251, GPIO_PORT252, GPIO_PORT253, GPIO_PORT254,
+        GPIO_PORT255, GPIO_PORT256, GPIO_PORT257, GPIO_PORT258, GPIO_PORT259,
+
+        GPIO_PORT260, GPIO_PORT261, GPIO_PORT262, GPIO_PORT263, GPIO_PORT264,
+
+        /* Special Pull-up / Pull-down Functions */
+        GPIO_FN_PORT66_KEYIN0_PU, GPIO_FN_PORT67_KEYIN1_PU,
+        GPIO_FN_PORT68_KEYIN2_PU, GPIO_FN_PORT69_KEYIN3_PU,
+        GPIO_FN_PORT70_KEYIN4_PU, GPIO_FN_PORT71_KEYIN5_PU,
+        GPIO_FN_PORT72_KEYIN6_PU,
+
+        /* 55-1 (FN) */
+        GPIO_FN_VBUS_0,
+        GPIO_FN_CPORT0,
+        GPIO_FN_CPORT1,
+        GPIO_FN_CPORT2,
+        GPIO_FN_CPORT3,
+        GPIO_FN_CPORT4,
+        GPIO_FN_CPORT5,
+        GPIO_FN_CPORT6,
+        GPIO_FN_CPORT7,
+        GPIO_FN_CPORT8,
+        GPIO_FN_CPORT9,
+        GPIO_FN_CPORT10,
+        GPIO_FN_CPORT11, GPIO_FN_SIN2,
+        GPIO_FN_CPORT12, GPIO_FN_XCTS2,
+        GPIO_FN_CPORT13, GPIO_FN_RFSPO4,
+        GPIO_FN_CPORT14, GPIO_FN_RFSPO5,
+        GPIO_FN_CPORT15, GPIO_FN_SCIFA0_SCK, GPIO_FN_GPS_AGC2,
+        GPIO_FN_CPORT16, GPIO_FN_SCIFA0_TXD, GPIO_FN_GPS_AGC3,
+        GPIO_FN_CPORT17_IC_OE, GPIO_FN_SOUT2,
+        GPIO_FN_CPORT18, GPIO_FN_XRTS2, GPIO_FN_PORT19_VIO_CKO2,
+        GPIO_FN_CPORT19_MPORT1,
+        GPIO_FN_CPORT20, GPIO_FN_RFSPO6,
+        GPIO_FN_CPORT21, GPIO_FN_STATUS0,
+        GPIO_FN_CPORT22, GPIO_FN_STATUS1,
+        GPIO_FN_CPORT23, GPIO_FN_STATUS2, GPIO_FN_RFSPO7,
+        GPIO_FN_B_SYNLD1,
+        GPIO_FN_B_SYNLD2, GPIO_FN_SYSENMSK,
+        GPIO_FN_XMAINPS,
+        GPIO_FN_XDIVPS,
+        GPIO_FN_XIDRST,
+        GPIO_FN_IDCLK, GPIO_FN_IC_DP,
+        GPIO_FN_IDIO, GPIO_FN_IC_DM,
+        GPIO_FN_SOUT1, GPIO_FN_SCIFA4_TXD, GPIO_FN_M02_BERDAT,
+        GPIO_FN_SIN1, GPIO_FN_SCIFA4_RXD, GPIO_FN_XWUP,
+        GPIO_FN_XRTS1, GPIO_FN_SCIFA4_RTS, GPIO_FN_M03_BERCLK,
+        GPIO_FN_XCTS1, GPIO_FN_SCIFA4_CTS,
+        GPIO_FN_PCMCLKO,
+        GPIO_FN_SYNC8KO,
+
+        /* 55-2 (FN) */
+        GPIO_FN_DNPCM_A,
+        GPIO_FN_UPPCM_A,
+        GPIO_FN_VACK,
+        GPIO_FN_XTALB1L,
+        GPIO_FN_GPS_AGC1, GPIO_FN_SCIFA0_RTS,
+        GPIO_FN_GPS_AGC4, GPIO_FN_SCIFA0_RXD,
+        GPIO_FN_GPS_PWRDOWN, GPIO_FN_SCIFA0_CTS,
+        GPIO_FN_GPS_IM,
+        GPIO_FN_GPS_IS,
+        GPIO_FN_GPS_QM,
+        GPIO_FN_GPS_QS,
+        GPIO_FN_FMSOCK, GPIO_FN_PORT49_IRDA_OUT, GPIO_FN_PORT49_IROUT,
+        GPIO_FN_FMSOOLR, GPIO_FN_BBIF2_TSYNC2, GPIO_FN_TPU2TO2, GPIO_FN_IPORT3,
+        GPIO_FN_FMSIOLR,
+        GPIO_FN_FMSOOBT, GPIO_FN_BBIF2_TSCK2, GPIO_FN_TPU2TO3, GPIO_FN_OPORT1,
+        GPIO_FN_FMSIOBT,
+        GPIO_FN_FMSOSLD, GPIO_FN_BBIF2_TXD2, GPIO_FN_OPORT2,
+        GPIO_FN_FMSOILR, GPIO_FN_PORT53_IRDA_IN, GPIO_FN_TPU3TO3,
+        GPIO_FN_OPORT3, GPIO_FN_FMSIILR,
+        GPIO_FN_FMSOIBT, GPIO_FN_PORT54_IRDA_FIRSEL, GPIO_FN_TPU3TO2,
+        GPIO_FN_FMSIIBT,
+        GPIO_FN_FMSISLD, GPIO_FN_MFG0_OUT1, GPIO_FN_TPU0TO0,
+        GPIO_FN_A0_EA0, GPIO_FN_BS,
+        GPIO_FN_A12_EA12, GPIO_FN_PORT58_VIO_CKOR, GPIO_FN_TPU4TO2,
+        GPIO_FN_A13_EA13, GPIO_FN_PORT59_IROUT, GPIO_FN_MFG0_OUT2,
+        GPIO_FN_TPU0TO1,
+        GPIO_FN_A14_EA14, GPIO_FN_PORT60_KEYOUT5,
+        GPIO_FN_A15_EA15, GPIO_FN_PORT61_KEYOUT4,
+        GPIO_FN_A16_EA16, GPIO_FN_PORT62_KEYOUT3, GPIO_FN_MSIOF0_SS1,
+        GPIO_FN_A17_EA17, GPIO_FN_PORT63_KEYOUT2, GPIO_FN_MSIOF0_TSYNC,
+        GPIO_FN_A18_EA18, GPIO_FN_PORT64_KEYOUT1, GPIO_FN_MSIOF0_TSCK,
+        GPIO_FN_A19_EA19, GPIO_FN_PORT65_KEYOUT0, GPIO_FN_MSIOF0_TXD,
+        GPIO_FN_A20_EA20, GPIO_FN_PORT66_KEYIN0, GPIO_FN_MSIOF0_RSCK,
+        GPIO_FN_A21_EA21, GPIO_FN_PORT67_KEYIN1, GPIO_FN_MSIOF0_RSYNC,
+        GPIO_FN_A22_EA22, GPIO_FN_PORT68_KEYIN2, GPIO_FN_MSIOF0_MCK0,
+        GPIO_FN_A23_EA23, GPIO_FN_PORT69_KEYIN3, GPIO_FN_MSIOF0_MCK1,
+        GPIO_FN_A24_EA24, GPIO_FN_PORT70_KEYIN4, GPIO_FN_MSIOF0_RXD,
+        GPIO_FN_A25_EA25, GPIO_FN_PORT71_KEYIN5, GPIO_FN_MSIOF0_SS2,
+        GPIO_FN_A26, GPIO_FN_PORT72_KEYIN6,
+        GPIO_FN_D0_ED0_NAF0,
+        GPIO_FN_D1_ED1_NAF1,
+        GPIO_FN_D2_ED2_NAF2,
+        GPIO_FN_D3_ED3_NAF3,
+        GPIO_FN_D4_ED4_NAF4,
+        GPIO_FN_D5_ED5_NAF5,
+        GPIO_FN_D6_ED6_NAF6,
+        GPIO_FN_D7_ED7_NAF7,
+        GPIO_FN_D8_ED8_NAF8,
+        GPIO_FN_D9_ED9_NAF9,
+        GPIO_FN_D10_ED10_NAF10,
+        GPIO_FN_D11_ED11_NAF11,
+        GPIO_FN_D12_ED12_NAF12,
+        GPIO_FN_D13_ED13_NAF13,
+        GPIO_FN_D14_ED14_NAF14,
+        GPIO_FN_D15_ED15_NAF15,
+        GPIO_FN_CS4,
+        GPIO_FN_CS5A, GPIO_FN_FMSICK,
+        GPIO_FN_CS5B, GPIO_FN_FCE1,
+
+        /* 55-3 (FN) */
+        GPIO_FN_CS6B, GPIO_FN_XCS2, GPIO_FN_CS6A, GPIO_FN_DACK0,
+        GPIO_FN_FCE0,
+        GPIO_FN_WAIT, GPIO_FN_DREQ0,
+        GPIO_FN_RD_XRD,
+        GPIO_FN_WE0_XWR0_FWE,
+        GPIO_FN_WE1_XWR1,
+        GPIO_FN_FRB,
+        GPIO_FN_CKO,
+        GPIO_FN_NBRSTOUT,
+        GPIO_FN_NBRST,
+        GPIO_FN_GPS_EPPSIN,
+        GPIO_FN_LATCHPULSE,
+        GPIO_FN_LTESIGNAL,
+        GPIO_FN_LEGACYSTATE,
+        GPIO_FN_TCKON,
+        GPIO_FN_VIO_VD, GPIO_FN_PORT128_KEYOUT0, GPIO_FN_IPORT0,
+        GPIO_FN_VIO_HD, GPIO_FN_PORT129_KEYOUT1, GPIO_FN_IPORT1,
+        GPIO_FN_VIO_D0, GPIO_FN_PORT130_KEYOUT2, GPIO_FN_PORT130_MSIOF2_RXD,
+        GPIO_FN_VIO_D1, GPIO_FN_PORT131_KEYOUT3, GPIO_FN_PORT131_MSIOF2_SS1,
+        GPIO_FN_VIO_D2, GPIO_FN_PORT132_KEYOUT4, GPIO_FN_PORT132_MSIOF2_SS2,
+        GPIO_FN_VIO_D3, GPIO_FN_PORT133_KEYOUT5, GPIO_FN_PORT133_MSIOF2_TSYNC,
+        GPIO_FN_VIO_D4, GPIO_FN_PORT134_KEYIN0, GPIO_FN_PORT134_MSIOF2_TXD,
+        GPIO_FN_VIO_D5, GPIO_FN_PORT135_KEYIN1, GPIO_FN_PORT135_MSIOF2_TSCK,
+        GPIO_FN_VIO_D6, GPIO_FN_PORT136_KEYIN2,
+        GPIO_FN_VIO_D7, GPIO_FN_PORT137_KEYIN3,
+        GPIO_FN_VIO_D8, GPIO_FN_M9_SLCD_A01, GPIO_FN_PORT138_FSIAOMC,
+        GPIO_FN_VIO_D9, GPIO_FN_M10_SLCD_CK1, GPIO_FN_PORT139_FSIAOLR,
+        GPIO_FN_VIO_D10, GPIO_FN_M11_SLCD_SO1, GPIO_FN_TPU0TO2,
+        GPIO_FN_PORT140_FSIAOBT,
+        GPIO_FN_VIO_D11, GPIO_FN_M12_SLCD_CE1, GPIO_FN_TPU0TO3,
+        GPIO_FN_PORT141_FSIAOSLD,
+        GPIO_FN_VIO_D12, GPIO_FN_M13_BSW, GPIO_FN_PORT142_FSIACK,
+        GPIO_FN_VIO_D13, GPIO_FN_M14_GSW, GPIO_FN_PORT143_FSIAILR,
+        GPIO_FN_VIO_D14, GPIO_FN_M15_RSW, GPIO_FN_PORT144_FSIAIBT,
+        GPIO_FN_VIO_D15, GPIO_FN_TPU1TO3, GPIO_FN_PORT145_FSIAISLD,
+        GPIO_FN_VIO_CLK, GPIO_FN_PORT146_KEYIN4, GPIO_FN_IPORT2,
+        GPIO_FN_VIO_FIELD, GPIO_FN_PORT147_KEYIN5,
+        GPIO_FN_VIO_CKO, GPIO_FN_PORT148_KEYIN6,
+        GPIO_FN_A27, GPIO_FN_RDWR_XWE, GPIO_FN_MFG0_IN1,
+        GPIO_FN_MFG0_IN2,
+        GPIO_FN_TS_SPSYNC3, GPIO_FN_MSIOF2_RSCK,
+        GPIO_FN_TS_SDAT3, GPIO_FN_MSIOF2_RSYNC,
+        GPIO_FN_TPU1TO2, GPIO_FN_TS_SDEN3, GPIO_FN_PORT153_MSIOF2_SS1,
+        GPIO_FN_SOUT3, GPIO_FN_SCIFA2_TXD1, GPIO_FN_MSIOF2_MCK0,
+        GPIO_FN_SIN3, GPIO_FN_SCIFA2_RXD1, GPIO_FN_MSIOF2_MCK1,
+        GPIO_FN_XRTS3, GPIO_FN_SCIFA2_RTS1, GPIO_FN_PORT156_MSIOF2_SS2,
+        GPIO_FN_XCTS3, GPIO_FN_SCIFA2_CTS1, GPIO_FN_PORT157_MSIOF2_RXD,
+
+        /* 55-4 (FN) */
+        GPIO_FN_DINT, GPIO_FN_SCIFA2_SCK1, GPIO_FN_TS_SCK3,
+        GPIO_FN_PORT159_SCIFB_SCK, GPIO_FN_PORT159_SCIFA5_SCK, GPIO_FN_NMI,
+        GPIO_FN_PORT160_SCIFB_TXD, GPIO_FN_PORT160_SCIFA5_TXD, GPIO_FN_SOUT0,
+        GPIO_FN_PORT161_SCIFB_CTS, GPIO_FN_PORT161_SCIFA5_CTS, GPIO_FN_XCTS0,
+        GPIO_FN_MFG3_IN2,
+        GPIO_FN_PORT162_SCIFB_RXD, GPIO_FN_PORT162_SCIFA5_RXD, GPIO_FN_SIN0,
+        GPIO_FN_MFG3_IN1,
+        GPIO_FN_PORT163_SCIFB_RTS, GPIO_FN_PORT163_SCIFA5_RTS, GPIO_FN_XRTS0,
+        GPIO_FN_MFG3_OUT1,
+        GPIO_FN_TPU3TO0,
+        GPIO_FN_LCDD0, GPIO_FN_PORT192_KEYOUT0, GPIO_FN_EXT_CKI,
+        GPIO_FN_LCDD1, GPIO_FN_PORT193_KEYOUT1, GPIO_FN_PORT193_SCIFA5_CTS,
+        GPIO_FN_BBIF2_TSYNC1,
+        GPIO_FN_LCDD2, GPIO_FN_PORT194_KEYOUT2, GPIO_FN_PORT194_SCIFA5_RTS,
+        GPIO_FN_BBIF2_TSCK1,
+        GPIO_FN_LCDD3, GPIO_FN_PORT195_KEYOUT3, GPIO_FN_PORT195_SCIFA5_RXD,
+        GPIO_FN_BBIF2_TXD1,
+        GPIO_FN_LCDD4, GPIO_FN_PORT196_KEYOUT4, GPIO_FN_PORT196_SCIFA5_TXD,
+        GPIO_FN_LCDD5, GPIO_FN_PORT197_KEYOUT5, GPIO_FN_PORT197_SCIFA5_SCK,
+        GPIO_FN_MFG2_OUT2, GPIO_FN_TPU2TO1,
+        GPIO_FN_LCDD6, GPIO_FN_XWR2,
+        GPIO_FN_LCDD7, GPIO_FN_TPU4TO1, GPIO_FN_MFG4_OUT2, GPIO_FN_XWR3,
+        GPIO_FN_LCDD8, GPIO_FN_PORT200_KEYIN0, GPIO_FN_VIO_DR0, GPIO_FN_D16,
+        GPIO_FN_ED16,
+        GPIO_FN_LCDD9, GPIO_FN_PORT201_KEYIN1, GPIO_FN_VIO_DR1, GPIO_FN_D17,
+        GPIO_FN_ED17,
+        GPIO_FN_LCDD10, GPIO_FN_PORT202_KEYIN2, GPIO_FN_VIO_DR2, GPIO_FN_D18,
+        GPIO_FN_ED18,
+        GPIO_FN_LCDD11, GPIO_FN_PORT203_KEYIN3, GPIO_FN_VIO_DR3, GPIO_FN_D19,
+        GPIO_FN_ED19,
+        GPIO_FN_LCDD12, GPIO_FN_PORT204_KEYIN4, GPIO_FN_VIO_DR4, GPIO_FN_D20,
+        GPIO_FN_ED20,
+        GPIO_FN_LCDD13, GPIO_FN_PORT205_KEYIN5, GPIO_FN_VIO_DR5, GPIO_FN_D21,
+        GPIO_FN_ED21,
+        GPIO_FN_LCDD14, GPIO_FN_PORT206_KEYIN6, GPIO_FN_VIO_DR6, GPIO_FN_D22,
+        GPIO_FN_ED22,
+        GPIO_FN_LCDD15, GPIO_FN_PORT207_MSIOF0L_SS1, GPIO_FN_PORT207_KEYOUT0,
+        GPIO_FN_VIO_DR7,
+        GPIO_FN_D23, GPIO_FN_ED23,
+        GPIO_FN_LCDD16, GPIO_FN_PORT208_MSIOF0L_SS2, GPIO_FN_PORT208_KEYOUT1,
+        GPIO_FN_VIO_VDR,
+        GPIO_FN_D24, GPIO_FN_ED24,
+        GPIO_FN_LCDD17, GPIO_FN_PORT209_KEYOUT2, GPIO_FN_VIO_HDR, GPIO_FN_D25,
+        GPIO_FN_ED25,
+        GPIO_FN_LCDD18, GPIO_FN_DREQ2, GPIO_FN_PORT210_MSIOF0L_SS1, GPIO_FN_D26,
+        GPIO_FN_ED26,
+        GPIO_FN_LCDD19, GPIO_FN_PORT211_MSIOF0L_SS2, GPIO_FN_D27, GPIO_FN_ED27,
+        GPIO_FN_LCDD20, GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0, GPIO_FN_D28,
+        GPIO_FN_ED28,
+        GPIO_FN_LCDD21, GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1, GPIO_FN_D29,
+        GPIO_FN_ED29,
+        GPIO_FN_LCDD22, GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_RSCK, GPIO_FN_D30,
+        GPIO_FN_ED30,
+        GPIO_FN_LCDD23, GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_RSYNC, GPIO_FN_D31,
+        GPIO_FN_ED31,
+        GPIO_FN_LCDDCK, GPIO_FN_LCDWR, GPIO_FN_PORT216_KEYOUT3,
+        GPIO_FN_VIO_CLKR,
+        GPIO_FN_LCDRD, GPIO_FN_DACK2, GPIO_FN_MSIOF0L_TSYNC,
+        GPIO_FN_LCDHSYN, GPIO_FN_LCDCS, GPIO_FN_LCDCS2, GPIO_FN_DACK3,
+        GPIO_FN_PORT218_VIO_CKOR, GPIO_FN_PORT218_KEYOUT4,
+        GPIO_FN_LCDDISP, GPIO_FN_LCDRS, GPIO_FN_DREQ3, GPIO_FN_MSIOF0L_TSCK,
+        GPIO_FN_LCDVSYN, GPIO_FN_LCDVSYN2, GPIO_FN_PORT220_KEYOUT5,
+        GPIO_FN_LCDLCLK, GPIO_FN_DREQ1, GPIO_FN_PWEN, GPIO_FN_MSIOF0L_RXD,
+        GPIO_FN_LCDDON, GPIO_FN_LCDDON2, GPIO_FN_DACK1, GPIO_FN_OVCN,
+        GPIO_FN_MSIOF0L_TXD,
+        GPIO_FN_SCIFA1_TXD, GPIO_FN_OVCN2,
+        GPIO_FN_EXTLP, GPIO_FN_SCIFA1_SCK, GPIO_FN_USBTERM,
+        GPIO_FN_PORT226_VIO_CKO2,
+        GPIO_FN_SCIFA1_RTS, GPIO_FN_IDIN,
+        GPIO_FN_SCIFA1_RXD,
+        GPIO_FN_SCIFA1_CTS, GPIO_FN_MFG1_IN1,
+        GPIO_FN_MSIOF1_TXD, GPIO_FN_SCIFA2_TXD2, GPIO_FN_PORT230_FSIAOMC,
+        GPIO_FN_MSIOF1_TSYNC, GPIO_FN_SCIFA2_CTS2, GPIO_FN_PORT231_FSIAOLR,
+        GPIO_FN_MSIOF1_TSCK, GPIO_FN_SCIFA2_SCK2, GPIO_FN_PORT232_FSIAOBT,
+        GPIO_FN_MSIOF1_RXD, GPIO_FN_SCIFA2_RXD2, GPIO_FN_GPS_VCOTRIG,
+        GPIO_FN_PORT233_FSIACK,
+        GPIO_FN_MSIOF1_RSCK, GPIO_FN_SCIFA2_RTS2, GPIO_FN_PORT234_FSIAOSLD,
+        GPIO_FN_MSIOF1_RSYNC, GPIO_FN_OPORT0, GPIO_FN_MFG1_IN2,
+        GPIO_FN_PORT235_FSIAILR,
+        GPIO_FN_MSIOF1_MCK0, GPIO_FN_I2C_SDA2, GPIO_FN_PORT236_FSIAIBT,
+        GPIO_FN_MSIOF1_MCK1, GPIO_FN_I2C_SCL2, GPIO_FN_PORT237_FSIAISLD,
+        GPIO_FN_MSIOF1_SS1, GPIO_FN_EDBGREQ3,
+
+        /* 55-5 (FN) */
+        GPIO_FN_MSIOF1_SS2,
+        GPIO_FN_SCIFA6_TXD,
+        GPIO_FN_PORT241_IRDA_OUT, GPIO_FN_PORT241_IROUT, GPIO_FN_MFG4_OUT1,
+        GPIO_FN_TPU4TO0,
+        GPIO_FN_PORT242_IRDA_IN, GPIO_FN_MFG4_IN2,
+        GPIO_FN_PORT243_IRDA_FIRSEL, GPIO_FN_PORT243_VIO_CKO2,
+        GPIO_FN_PORT244_SCIFA5_CTS, GPIO_FN_MFG2_IN1, GPIO_FN_PORT244_SCIFB_CTS,
+        GPIO_FN_PORT244_MSIOF2_RXD,
+        GPIO_FN_PORT245_SCIFA5_RTS, GPIO_FN_MFG2_IN2, GPIO_FN_PORT245_SCIFB_RTS,
+        GPIO_FN_PORT245_MSIOF2_TXD,
+        GPIO_FN_PORT246_SCIFA5_RXD, GPIO_FN_MFG1_OUT1,
+        GPIO_FN_PORT246_SCIFB_RXD, GPIO_FN_TPU1TO0,
+        GPIO_FN_PORT247_SCIFA5_TXD, GPIO_FN_MFG3_OUT2,
+        GPIO_FN_PORT247_SCIFB_TXD, GPIO_FN_TPU3TO1,
+        GPIO_FN_PORT248_SCIFA5_SCK, GPIO_FN_MFG2_OUT1,
+        GPIO_FN_PORT248_SCIFB_SCK, GPIO_FN_TPU2TO0,
+        GPIO_FN_PORT248_MSIOF2_TSCK,
+        GPIO_FN_PORT249_IROUT, GPIO_FN_MFG4_IN1, GPIO_FN_PORT249_MSIOF2_TSYNC,
+        GPIO_FN_SDHICLK0, GPIO_FN_TCK2_SWCLK_MC0,
+        GPIO_FN_SDHICD0,
+        GPIO_FN_SDHID0_0, GPIO_FN_TMS2_SWDIO_MC0,
+        GPIO_FN_SDHID0_1, GPIO_FN_TDO2_SWO0_MC0,
+        GPIO_FN_SDHID0_2, GPIO_FN_TDI2,
+        GPIO_FN_SDHID0_3, GPIO_FN_RTCK2_SWO1_MC0,
+        GPIO_FN_SDHICMD0, GPIO_FN_TRST2,
+        GPIO_FN_SDHIWP0, GPIO_FN_EDBGREQ2,
+        GPIO_FN_SDHICLK1, GPIO_FN_TCK3_SWCLK_MC1,
+        GPIO_FN_SDHID1_0, GPIO_FN_M11_SLCD_SO2, GPIO_FN_TS_SPSYNC2,
+        GPIO_FN_TMS3_SWDIO_MC1,
+        GPIO_FN_SDHID1_1, GPIO_FN_M9_SLCD_A02, GPIO_FN_TS_SDAT2,
+        GPIO_FN_TDO3_SWO0_MC1,
+        GPIO_FN_SDHID1_2, GPIO_FN_M10_SLCD_CK2, GPIO_FN_TS_SDEN2, GPIO_FN_TDI3,
+        GPIO_FN_SDHID1_3, GPIO_FN_M12_SLCD_CE2, GPIO_FN_TS_SCK2,
+        GPIO_FN_RTCK3_SWO1_MC1,
+        GPIO_FN_SDHICMD1, GPIO_FN_TRST3,
+        GPIO_FN_RESETOUTS,
+};
+
+#endif /* __ASM_SH7377_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/system.h b/arch/arm/mach-shmobile/include/mach/system.h
new file mode 100644
index 00000000000..76a687eeaa2
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/system.h
@@ -0,0 +1,14 @@
+#ifndef __ASM_ARCH_SYSTEM_H
+#define __ASM_ARCH_SYSTEM_H
+
+static inline void arch_idle(void)
+{
+        cpu_do_idle();
+}
+
+static inline void arch_reset(char mode, const char *cmd)
+{
+        cpu_reset(0);
+}
+
+#endif
diff --git a/arch/arm/mach-shmobile/include/mach/timex.h b/arch/arm/mach-shmobile/include/mach/timex.h
new file mode 100644
index 00000000000..ae0d8d825c2
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/timex.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_MACH_TIMEX_H
+#define __ASM_MACH_TIMEX_H
+
+#define CLOCK_TICK_RATE         1193180 /* unused i8253 PIT value */
+
+#endif /* __ASM_MACH_TIMEX_H */
diff --git a/arch/arm/mach-shmobile/include/mach/uncompress.h b/arch/arm/mach-shmobile/include/mach/uncompress.h
new file mode 100644
index 00000000000..0bd7556b138
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/uncompress.h
@@ -0,0 +1,21 @@
+#ifndef __ASM_MACH_UNCOMPRESS_H
+#define __ASM_MACH_UNCOMPRESS_H
+
+/*
+ * This does not append a newline
+ */
+static void putc(int c)
+{
+}
+
+static inline void flush(void)
+{
+}
+
+static void arch_decomp_setup(void)
+{
+}
+
+#define arch_decomp_wdog()
+
+#endif /* __ASM_MACH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-shmobile/include/mach/vmalloc.h b/arch/arm/mach-shmobile/include/mach/vmalloc.h
new file mode 100644
index 00000000000..fb3c4f1ab25
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/vmalloc.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_MACH_VMALLOC_H
+#define __ASM_MACH_VMALLOC_H
+
+#define VMALLOC_END       (PAGE_OFFSET + 0x24000000)
+
+#endif /* __ASM_MACH_VMALLOC_H */
diff --git a/arch/arm/mach-shmobile/intc-sh7367.c b/arch/arm/mach-shmobile/intc-sh7367.c
new file mode 100644
index 00000000000..5ff70cadfc3
--- /dev/null
+++ b/arch/arm/mach-shmobile/intc-sh7367.c
@@ -0,0 +1,270 @@
+/*
+ * sh7367 processor support - INTC hardware block
+ *
+ * Copyright (C) 2010  Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/sh_intc.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+enum {
+        UNUSED_INTCA = 0,
+        ENABLED,
+        DISABLED,
+
+        /* interrupt sources INTCA */
+        IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A,
+        IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A,
+        DIRC,
+        CRYPT1_ERR, CRYPT2_STD,
+        IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1,
+        ARM11_IRQPMU, ARM11_COMMTX, ARM11_COMMRX,
+        ETM11_ACQCMP, ETM11_FULL,
+        MFI_MFIM, MFI_MFIS,
+        BBIF1, BBIF2,
+        USBDMAC_USHDMI,
+        USBHS_USHI0, USBHS_USHI1,
+        CMT1_CMT10, CMT1_CMT11, CMT1_CMT12, CMT1_CMT13, CMT2, CMT3,
+        KEYSC_KEY,
+        SCIFA0, SCIFA1, SCIFA2, SCIFA3,
+        MSIOF2, MSIOF1,
+        SCIFA4, SCIFA5, SCIFB,
+        FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
+        SDHI0,
+        SDHI1,
+        MSU_MSU, MSU_MSU2,
+        IREM,
+        SIU,
+        SPU,
+        IRDA,
+        TPU0, TPU1, TPU2, TPU3, TPU4,
+        LCRC,
+        PINT1, PINT2,
+        TTI20,
+        MISTY,
+        DDM,
+        SDHI2,
+        RWDT0, RWDT1,
+        DMAC_1_DEI0, DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3,
+        DMAC_2_DEI4, DMAC_2_DEI5, DMAC_2_DADERR,
+        DMAC2_1_DEI0, DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3,
+        DMAC2_2_DEI4, DMAC2_2_DEI5, DMAC2_2_DADERR,
+        DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3,
+        DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR,
+
+        /* interrupt groups INTCA */
+        DMAC_1, DMAC_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2,
+        ETM11, ARM11, USBHS, FLCTL, IIC1
+};
+
+static struct intc_vect intca_vectors[] = {
+        INTC_VECT(IRQ0A, 0x0200), INTC_VECT(IRQ1A, 0x0220),
+        INTC_VECT(IRQ2A, 0x0240), INTC_VECT(IRQ3A, 0x0260),
+        INTC_VECT(IRQ4A, 0x0280), INTC_VECT(IRQ5A, 0x02a0),
+        INTC_VECT(IRQ6A, 0x02c0), INTC_VECT(IRQ7A, 0x02e0),
+        INTC_VECT(IRQ8A, 0x0300), INTC_VECT(IRQ9A, 0x0320),
+        INTC_VECT(IRQ10A, 0x0340), INTC_VECT(IRQ11A, 0x0360),
+        INTC_VECT(IRQ12A, 0x0380), INTC_VECT(IRQ13A, 0x03a0),
+        INTC_VECT(IRQ14A, 0x03c0), INTC_VECT(IRQ15A, 0x03e0),
+        INTC_VECT(DIRC, 0x0560),
+        INTC_VECT(CRYPT1_ERR, 0x05e0),
+        INTC_VECT(CRYPT2_STD, 0x0700),
+        INTC_VECT(IIC1_ALI1, 0x0780), INTC_VECT(IIC1_TACKI1, 0x07a0),
+        INTC_VECT(IIC1_WAITI1, 0x07c0), INTC_VECT(IIC1_DTEI1, 0x07e0),
+        INTC_VECT(ARM11_IRQPMU, 0x0800), INTC_VECT(ARM11_COMMTX, 0x0840),
+        INTC_VECT(ARM11_COMMRX, 0x0860),
+        INTC_VECT(ETM11_ACQCMP, 0x0880), INTC_VECT(ETM11_FULL, 0x08a0),
+        INTC_VECT(MFI_MFIM, 0x0900), INTC_VECT(MFI_MFIS, 0x0920),
+        INTC_VECT(BBIF1, 0x0940), INTC_VECT(BBIF2, 0x0960),
+        INTC_VECT(USBDMAC_USHDMI, 0x0a00),
+        INTC_VECT(USBHS_USHI0, 0x0a20), INTC_VECT(USBHS_USHI1, 0x0a40),
+        INTC_VECT(CMT1_CMT10, 0x0b00), INTC_VECT(CMT1_CMT11, 0x0b20),
+        INTC_VECT(CMT1_CMT12, 0x0b40), INTC_VECT(CMT1_CMT13, 0x0b60),
+        INTC_VECT(CMT2, 0x0b80), INTC_VECT(CMT3, 0x0ba0),
+        INTC_VECT(KEYSC_KEY, 0x0be0),
+        INTC_VECT(SCIFA0, 0x0c00), INTC_VECT(SCIFA1, 0x0c20),
+        INTC_VECT(SCIFA2, 0x0c40), INTC_VECT(SCIFA3, 0x0c60),
+        INTC_VECT(MSIOF2, 0x0c80), INTC_VECT(MSIOF1, 0x0d00),
+        INTC_VECT(SCIFA4, 0x0d20), INTC_VECT(SCIFA5, 0x0d40),
+        INTC_VECT(SCIFB, 0x0d60),
+        INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0),
+        INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0),
+        INTC_VECT(SDHI0, 0x0e00), INTC_VECT(SDHI0, 0x0e20),
+        INTC_VECT(SDHI0, 0x0e40), INTC_VECT(SDHI0, 0x0e60),
+        INTC_VECT(SDHI1, 0x0e80), INTC_VECT(SDHI1, 0x0ea0),
+        INTC_VECT(SDHI1, 0x0ec0), INTC_VECT(SDHI1, 0x0ee0),
+        INTC_VECT(MSU_MSU, 0x0f20), INTC_VECT(MSU_MSU2, 0x0f40),
+        INTC_VECT(IREM, 0x0f60),
+        INTC_VECT(SIU, 0x0fa0),
+        INTC_VECT(SPU, 0x0fc0),
+        INTC_VECT(IRDA, 0x0480),
+        INTC_VECT(TPU0, 0x04a0), INTC_VECT(TPU1, 0x04c0),
+        INTC_VECT(TPU2, 0x04e0), INTC_VECT(TPU3, 0x0500),
+        INTC_VECT(TPU4, 0x0520),
+        INTC_VECT(LCRC, 0x0540),
+        INTC_VECT(PINT1, 0x1000), INTC_VECT(PINT2, 0x1020),
+        INTC_VECT(TTI20, 0x1100),
+        INTC_VECT(MISTY, 0x1120),
+        INTC_VECT(DDM, 0x1140),
+        INTC_VECT(SDHI2, 0x1200), INTC_VECT(SDHI2, 0x1220),
+        INTC_VECT(SDHI2, 0x1240), INTC_VECT(SDHI2, 0x1260),
+        INTC_VECT(RWDT0, 0x1280), INTC_VECT(RWDT1, 0x12a0),
+        INTC_VECT(DMAC_1_DEI0, 0x2000), INTC_VECT(DMAC_1_DEI1, 0x2020),
+        INTC_VECT(DMAC_1_DEI2, 0x2040), INTC_VECT(DMAC_1_DEI3, 0x2060),
+        INTC_VECT(DMAC_2_DEI4, 0x2080), INTC_VECT(DMAC_2_DEI5, 0x20a0),
+        INTC_VECT(DMAC_2_DADERR, 0x20c0),
+        INTC_VECT(DMAC2_1_DEI0, 0x2100), INTC_VECT(DMAC2_1_DEI1, 0x2120),
+        INTC_VECT(DMAC2_1_DEI2, 0x2140), INTC_VECT(DMAC2_1_DEI3, 0x2160),
+        INTC_VECT(DMAC2_2_DEI4, 0x2180), INTC_VECT(DMAC2_2_DEI5, 0x21a0),
+        INTC_VECT(DMAC2_2_DADERR, 0x21c0),
+        INTC_VECT(DMAC3_1_DEI0, 0x2200), INTC_VECT(DMAC3_1_DEI1, 0x2220),
+        INTC_VECT(DMAC3_1_DEI2, 0x2240), INTC_VECT(DMAC3_1_DEI3, 0x2260),
+        INTC_VECT(DMAC3_2_DEI4, 0x2280), INTC_VECT(DMAC3_2_DEI5, 0x22a0),
+        INTC_VECT(DMAC3_2_DADERR, 0x22c0),
+};
+
+static struct intc_group intca_groups[] __initdata = {
+        INTC_GROUP(DMAC_1, DMAC_1_DEI0,
+                   DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3),
+        INTC_GROUP(DMAC_2, DMAC_2_DEI4,
+                   DMAC_2_DEI5, DMAC_2_DADERR),
+        INTC_GROUP(DMAC2_1, DMAC2_1_DEI0,
+                   DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3),
+        INTC_GROUP(DMAC2_2, DMAC2_2_DEI4,
+                   DMAC2_2_DEI5, DMAC2_2_DADERR),
+        INTC_GROUP(DMAC3_1, DMAC3_1_DEI0,
+                   DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3),
+        INTC_GROUP(DMAC3_2, DMAC3_2_DEI4,
+                   DMAC3_2_DEI5, DMAC3_2_DADERR),
+        INTC_GROUP(ETM11, ETM11_ACQCMP, ETM11_FULL),
+        INTC_GROUP(ARM11, ARM11_IRQPMU, ARM11_COMMTX, ARM11_COMMTX),
+        INTC_GROUP(USBHS, USBHS_USHI0, USBHS_USHI1),
+        INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI,
+                   FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
+        INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1),
+};
+
+static struct intc_mask_reg intca_mask_registers[] = {
+        { 0xe6900040, 0xe6900060, 8, /* INTMSK00A / INTMSKCLR00A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900044, 0xe6900064, 8, /* INTMSK10A / INTMSKCLR10A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+        { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */
+          { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0,
+            ARM11_IRQPMU, 0, ARM11_COMMTX, ARM11_COMMRX } },
+        { 0xe6940084, 0xe69400c4, 8, /* IMR1A / IMCR1A */
+          { CRYPT1_ERR, CRYPT2_STD, DIRC, 0,
+            DMAC_1_DEI3, DMAC_1_DEI2, DMAC_1_DEI1, DMAC_1_DEI0 } },
+        { 0xe6940088, 0xe69400c8, 8, /* IMR2A / IMCR2A */
+          { PINT1, PINT2, 0, 0,
+            BBIF1, BBIF2, MFI_MFIS, MFI_MFIM } },
+        { 0xe694008c, 0xe69400cc, 8, /* IMR3A / IMCR3A */
+          { DMAC3_1_DEI3, DMAC3_1_DEI2, DMAC3_1_DEI1, DMAC3_1_DEI0,
+            DMAC3_2_DADERR, DMAC3_2_DEI5, DMAC3_2_DEI4, IRDA } },
+        { 0xe6940090, 0xe69400d0, 8, /* IMR4A / IMCR4A */
+          { DDM, 0, 0, 0,
+            0, 0, ETM11_FULL, ETM11_ACQCMP } },
+        { 0xe6940094, 0xe69400d4, 8, /* IMR5A / IMCR5A */
+          { KEYSC_KEY, DMAC_2_DADERR, DMAC_2_DEI5, DMAC_2_DEI4,
+            SCIFA3, SCIFA2, SCIFA1, SCIFA0 } },
+        { 0xe6940098, 0xe69400d8, 8, /* IMR6A / IMCR6A */
+          { SCIFB, SCIFA5, SCIFA4, MSIOF1,
+            0, 0, MSIOF2, 0 } },
+        { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */
+          { DISABLED, DISABLED, ENABLED, ENABLED,
+            FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
+        { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */
+          { DISABLED, DISABLED, ENABLED, ENABLED,
+            TTI20, USBDMAC_USHDMI, SPU, SIU } },
+        { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
+          { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10,
+            CMT2, USBHS_USHI1, USBHS_USHI0, 0 } },
+        { 0xe69400a8, 0xe69400e8, 8, /* IMR10A / IMCR10A */
+          { 0, DMAC2_2_DADERR, DMAC2_2_DEI5, DMAC2_2_DEI4,
+            0, 0, 0, 0 } },
+        { 0xe69400ac, 0xe69400ec, 8, /* IMR11A / IMCR11A */
+          { IIC1_DTEI1, IIC1_WAITI1, IIC1_TACKI1, IIC1_ALI1,
+            LCRC, MSU_MSU2, IREM, MSU_MSU } },
+        { 0xe69400b0, 0xe69400f0, 8, /* IMR12A / IMCR12A */
+          { 0, 0, TPU0, TPU1,
+            TPU2, TPU3, TPU4, 0 } },
+        { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */
+          { DISABLED, DISABLED, ENABLED, ENABLED,
+            MISTY, CMT3, RWDT1, RWDT0 } },
+};
+
+static struct intc_prio_reg intca_prio_registers[] = {
+        { 0xe6900010, 0, 32, 4, /* INTPRI00A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900014, 0, 32, 4, /* INTPRI10A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+
+        { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, LCRC } },
+        { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, ETM11, BBIF1, BBIF2 } },
+        { 0xe6940008, 0, 16, 4, /* IPRCA */ { CRYPT1_ERR, CRYPT2_STD,
+                                              CMT1_CMT11, ARM11 } },
+        { 0xe694000c, 0, 16, 4, /* IPRDA */ { PINT1, PINT2,
+                                              CMT1_CMT12, TPU4 } },
+        { 0xe6940010, 0, 16, 4, /* IPREA */ { DMAC_1, MFI_MFIS,
+                                              MFI_MFIM, USBHS } },
+        { 0xe6940014, 0, 16, 4, /* IPRFA */ { KEYSC_KEY, DMAC_2,
+                                              0, CMT1_CMT10 } },
+        { 0xe6940018, 0, 16, 4, /* IPRGA */ { SCIFA0, SCIFA1,
+                                              SCIFA2, SCIFA3 } },
+        { 0xe694001c, 0, 16, 4, /* IPRGH */ { MSIOF2, USBDMAC_USHDMI,
+                                              FLCTL, SDHI0 } },
+        { 0xe6940020, 0, 16, 4, /* IPRIA */ { MSIOF1, SCIFA4, MSU_MSU, IIC1 } },
+        { 0xe6940024, 0, 16, 4, /* IPRJA */ { DMAC2_1, DMAC2_2, SIU, TTI20 } },
+        { 0xe6940028, 0, 16, 4, /* IPRKA */ { 0, CMT1_CMT13, IREM, SDHI1 } },
+        { 0xe694002c, 0, 16, 4, /* IPRLA */ { TPU0, TPU1, TPU2, TPU3 } },
+        { 0xe6940030, 0, 16, 4, /* IPRMA */ { MISTY, CMT3, RWDT1, RWDT0 } },
+        { 0xe6940034, 0, 16, 4, /* IPRNA */ { SCIFB, SCIFA5, SPU, DDM } },
+        { 0xe6940038, 0, 16, 4, /* IPROA */ { 0, 0, DIRC, SDHI2 } },
+};
+
+static struct intc_sense_reg intca_sense_registers[] __initdata = {
+        { 0xe6900000, 16, 2, /* ICR1A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900004, 16, 2, /* ICR2A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+};
+
+static struct intc_mask_reg intca_ack_registers[] __initdata = {
+        { 0xe6900020, 0, 8, /* INTREQ00A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900024, 0, 8, /* INTREQ10A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+};
+
+static struct intc_desc intca_desc __initdata = {
+        .name = "sh7367-intca",
+        .force_enable = ENABLED,
+        .force_disable = DISABLED,
+        .hw = INTC_HW_DESC(intca_vectors, intca_groups,
+                           intca_mask_registers, intca_prio_registers,
+                           intca_sense_registers, intca_ack_registers),
+};
+
+void __init sh7367_init_irq(void)
+{
+        /* INTCA */
+        register_intc_controller(&intca_desc);
+}
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
new file mode 100644
index 00000000000..3ce9d9bd589
--- /dev/null
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -0,0 +1,369 @@
+/*
+ * sh7372 processor support - INTC hardware block
+ *
+ * Copyright (C) 2010  Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/sh_intc.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+enum {
+        UNUSED_INTCA = 0,
+        ENABLED,
+        DISABLED,
+
+        /* interrupt sources INTCA */
+        IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A,
+        IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A,
+        IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A,
+        IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A,
+        DIRC,
+        CRYPT_STD,
+        IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1,
+        AP_ARM_IRQPMU, AP_ARM_COMMTX, AP_ARM_COMMRX,
+        MFI_MFIM, MFI_MFIS,
+        BBIF1, BBIF2,
+        USBHSDMAC0_USHDMI,
+        _3DG_SGX540,
+        CMT1_CMT10, CMT1_CMT11, CMT1_CMT12, CMT1_CMT13, CMT2, CMT3,
+        KEYSC_KEY,
+        SCIFA0, SCIFA1, SCIFA2, SCIFA3,
+        MSIOF2, MSIOF1,
+        SCIFA4, SCIFA5, SCIFB,
+        FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
+        SDHI0,
+        SDHI1,
+        IRREM,
+        IRDA,
+        TPU0,
+        TTI20,
+        DDM,
+        SDHI2,
+        RWDT0,
+        DMAC1_1_DEI0, DMAC1_1_DEI1, DMAC1_1_DEI2, DMAC1_1_DEI3,
+        DMAC1_2_DEI4, DMAC1_2_DEI5, DMAC1_2_DADERR,
+        DMAC2_1_DEI0, DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3,
+        DMAC2_2_DEI4, DMAC2_2_DEI5, DMAC2_2_DADERR,
+        DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3,
+        DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR,
+        SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM,
+        HDMI,
+        SPU2_SPU0, SPU2_SPU1,
+        FSI, FMSI,
+        MIPI_HSI,
+        IPMMU_IPMMUD,
+        CEC_1, CEC_2,
+        AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ, AP_ARM_DMAIRQ, AP_ARM_DMASIRQ,
+        MFIS2,
+        CPORTR2S,
+        CMT14, CMT15,
+        MMC_MMC_ERR, MMC_MMC_NOR,
+        IIC4_ALI4, IIC4_TACKI4, IIC4_WAITI4, IIC4_DTEI4,
+        IIC3_ALI3, IIC3_TACKI3, IIC3_WAITI3, IIC3_DTEI3,
+        USB0_USB0I1, USB0_USB0I0,
+        USB1_USB1I1, USB1_USB1I0,
+        USBHSDMAC1_USHDMI,
+
+        /* interrupt groups INTCA */
+        DMAC1_1, DMAC1_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2, SHWYSTAT,
+        AP_ARM1, AP_ARM2, SPU2, FLCTL, IIC1
+};
+
+static struct intc_vect intca_vectors[] __initdata = {
+        INTC_VECT(IRQ0A, 0x0200), INTC_VECT(IRQ1A, 0x0220),
+        INTC_VECT(IRQ2A, 0x0240), INTC_VECT(IRQ3A, 0x0260),
+        INTC_VECT(IRQ4A, 0x0280), INTC_VECT(IRQ5A, 0x02a0),
+        INTC_VECT(IRQ6A, 0x02c0), INTC_VECT(IRQ7A, 0x02e0),
+        INTC_VECT(IRQ8A, 0x0300), INTC_VECT(IRQ9A, 0x0320),
+        INTC_VECT(IRQ10A, 0x0340), INTC_VECT(IRQ11A, 0x0360),
+        INTC_VECT(IRQ12A, 0x0380), INTC_VECT(IRQ13A, 0x03a0),
+        INTC_VECT(IRQ14A, 0x03c0), INTC_VECT(IRQ15A, 0x03e0),
+        INTC_VECT(IRQ16A, 0x3200), INTC_VECT(IRQ17A, 0x3220),
+        INTC_VECT(IRQ18A, 0x3240), INTC_VECT(IRQ19A, 0x3260),
+        INTC_VECT(IRQ20A, 0x3280), INTC_VECT(IRQ31A, 0x32a0),
+        INTC_VECT(IRQ22A, 0x32c0), INTC_VECT(IRQ23A, 0x32e0),
+        INTC_VECT(IRQ24A, 0x3300), INTC_VECT(IRQ25A, 0x3320),
+        INTC_VECT(IRQ26A, 0x3340), INTC_VECT(IRQ27A, 0x3360),
+        INTC_VECT(IRQ28A, 0x3380), INTC_VECT(IRQ29A, 0x33a0),
+        INTC_VECT(IRQ30A, 0x33c0), INTC_VECT(IRQ31A, 0x33e0),
+        INTC_VECT(DIRC, 0x0560),
+        INTC_VECT(CRYPT_STD, 0x0700),
+        INTC_VECT(IIC1_ALI1, 0x0780), INTC_VECT(IIC1_TACKI1, 0x07a0),
+        INTC_VECT(IIC1_WAITI1, 0x07c0), INTC_VECT(IIC1_DTEI1, 0x07e0),
+        INTC_VECT(AP_ARM_IRQPMU, 0x0800), INTC_VECT(AP_ARM_COMMTX, 0x0840),
+        INTC_VECT(AP_ARM_COMMRX, 0x0860),
+        INTC_VECT(MFI_MFIM, 0x0900), INTC_VECT(MFI_MFIS, 0x0920),
+        INTC_VECT(BBIF1, 0x0940), INTC_VECT(BBIF2, 0x0960),
+        INTC_VECT(USBHSDMAC0_USHDMI, 0x0a00),
+        INTC_VECT(_3DG_SGX540, 0x0a60),
+        INTC_VECT(CMT1_CMT10, 0x0b00), INTC_VECT(CMT1_CMT11, 0x0b20),
+        INTC_VECT(CMT1_CMT12, 0x0b40), INTC_VECT(CMT1_CMT13, 0x0b60),
+        INTC_VECT(CMT2, 0x0b80), INTC_VECT(CMT3, 0x0ba0),
+        INTC_VECT(KEYSC_KEY, 0x0be0),
+        INTC_VECT(SCIFA0, 0x0c00), INTC_VECT(SCIFA1, 0x0c20),
+        INTC_VECT(SCIFA2, 0x0c40), INTC_VECT(SCIFA3, 0x0c60),
+        INTC_VECT(MSIOF2, 0x0c80), INTC_VECT(MSIOF1, 0x0d00),
+        INTC_VECT(SCIFA4, 0x0d20), INTC_VECT(SCIFA5, 0x0d40),
+        INTC_VECT(SCIFB, 0x0d60),
+        INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0),
+        INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0),
+        INTC_VECT(SDHI0, 0x0e00), INTC_VECT(SDHI0, 0x0e20),
+        INTC_VECT(SDHI0, 0x0e40), INTC_VECT(SDHI0, 0x0e60),
+        INTC_VECT(SDHI1, 0x0e80), INTC_VECT(SDHI1, 0x0ea0),
+        INTC_VECT(SDHI1, 0x0ec0),
+        INTC_VECT(IRREM, 0x0f60),
+        INTC_VECT(IRDA, 0x0480),
+        INTC_VECT(TPU0, 0x04a0),
+        INTC_VECT(TTI20, 0x1100),
+        INTC_VECT(DDM, 0x1140),
+        INTC_VECT(SDHI2, 0x1200), INTC_VECT(SDHI2, 0x1220),
+        INTC_VECT(SDHI2, 0x1240), INTC_VECT(SDHI2, 0x1260),
+        INTC_VECT(RWDT0, 0x1280),
+        INTC_VECT(DMAC1_1_DEI0, 0x2000), INTC_VECT(DMAC1_1_DEI1, 0x2020),
+        INTC_VECT(DMAC1_1_DEI2, 0x2040), INTC_VECT(DMAC1_1_DEI3, 0x2060),
+        INTC_VECT(DMAC1_2_DEI4, 0x2080), INTC_VECT(DMAC1_2_DEI5, 0x20a0),
+        INTC_VECT(DMAC1_2_DADERR, 0x20c0),
+        INTC_VECT(DMAC2_1_DEI0, 0x2100), INTC_VECT(DMAC2_1_DEI1, 0x2120),
+        INTC_VECT(DMAC2_1_DEI2, 0x2140), INTC_VECT(DMAC2_1_DEI3, 0x2160),
+        INTC_VECT(DMAC2_2_DEI4, 0x2180), INTC_VECT(DMAC2_2_DEI5, 0x21a0),
+        INTC_VECT(DMAC2_2_DADERR, 0x21c0),
+        INTC_VECT(DMAC3_1_DEI0, 0x2200), INTC_VECT(DMAC3_1_DEI1, 0x2220),
+        INTC_VECT(DMAC3_1_DEI2, 0x2240), INTC_VECT(DMAC3_1_DEI3, 0x2260),
+        INTC_VECT(DMAC3_2_DEI4, 0x2280), INTC_VECT(DMAC3_2_DEI5, 0x22a0),
+        INTC_VECT(DMAC3_2_DADERR, 0x22c0),
+        INTC_VECT(SHWYSTAT_RT, 0x1300), INTC_VECT(SHWYSTAT_HS, 0x1320),
+        INTC_VECT(SHWYSTAT_COM, 0x1340),
+        INTC_VECT(HDMI, 0x17e0),
+        INTC_VECT(SPU2_SPU0, 0x1800), INTC_VECT(SPU2_SPU1, 0x1820),
+        INTC_VECT(FSI, 0x1840),
+        INTC_VECT(FMSI, 0x1860),
+        INTC_VECT(MIPI_HSI, 0x18e0),
+        INTC_VECT(IPMMU_IPMMUD, 0x1920),
+        INTC_VECT(CEC_1, 0x1940), INTC_VECT(CEC_2, 0x1960),
+        INTC_VECT(AP_ARM_CTIIRQ, 0x1980),
+        INTC_VECT(AP_ARM_DMAEXTERRIRQ, 0x19a0),
+        INTC_VECT(AP_ARM_DMAIRQ, 0x19c0),
+        INTC_VECT(AP_ARM_DMASIRQ, 0x19e0),
+        INTC_VECT(MFIS2, 0x1a00),
+        INTC_VECT(CPORTR2S, 0x1a20),
+        INTC_VECT(CMT14, 0x1a40), INTC_VECT(CMT15, 0x1a60),
+        INTC_VECT(MMC_MMC_ERR, 0x1ac0), INTC_VECT(MMC_MMC_NOR, 0x1ae0),
+        INTC_VECT(IIC4_ALI4, 0x1b00), INTC_VECT(IIC4_TACKI4, 0x1b20),
+        INTC_VECT(IIC4_WAITI4, 0x1b40), INTC_VECT(IIC4_DTEI4, 0x1b60),
+        INTC_VECT(IIC3_ALI3, 0x1b80), INTC_VECT(IIC3_TACKI3, 0x1ba0),
+        INTC_VECT(IIC3_WAITI3, 0x1bc0), INTC_VECT(IIC3_DTEI3, 0x1be0),
+        INTC_VECT(USB0_USB0I1, 0x1c80), INTC_VECT(USB0_USB0I0, 0x1ca0),
+        INTC_VECT(USB1_USB1I1, 0x1cc0), INTC_VECT(USB1_USB1I0, 0x1ce0),
+        INTC_VECT(USBHSDMAC1_USHDMI, 0x1d00),
+};
+
+static struct intc_group intca_groups[] __initdata = {
+        INTC_GROUP(DMAC1_1, DMAC1_1_DEI0,
+                   DMAC1_1_DEI1, DMAC1_1_DEI2, DMAC1_1_DEI3),
+        INTC_GROUP(DMAC1_2, DMAC1_2_DEI4,
+                   DMAC1_2_DEI5, DMAC1_2_DADERR),
+        INTC_GROUP(DMAC2_1, DMAC2_1_DEI0,
+                   DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3),
+        INTC_GROUP(DMAC2_2, DMAC2_2_DEI4,
+                   DMAC2_2_DEI5, DMAC2_2_DADERR),
+        INTC_GROUP(DMAC3_1, DMAC3_1_DEI0,
+                   DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3),
+        INTC_GROUP(DMAC3_2, DMAC3_2_DEI4,
+                   DMAC3_2_DEI5, DMAC3_2_DADERR),
+        INTC_GROUP(AP_ARM1, AP_ARM_IRQPMU, AP_ARM_COMMTX, AP_ARM_COMMRX),
+        INTC_GROUP(AP_ARM2, AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ,
+                   AP_ARM_DMAIRQ, AP_ARM_DMASIRQ),
+        INTC_GROUP(SPU2, SPU2_SPU0, SPU2_SPU1),
+        INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI,
+                   FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
+        INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1),
+        INTC_GROUP(SHWYSTAT, SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM),
+};
+
+static struct intc_mask_reg intca_mask_registers[] __initdata = {
+        { 0xe6900040, 0xe6900060, 8, /* INTMSK00A / INTMSKCLR00A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900044, 0xe6900064, 8, /* INTMSK10A / INTMSKCLR10A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+        { 0xe6900048, 0xe6900068, 8, /* INTMSK20A / INTMSKCLR20A */
+          { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
+        { 0xe690004c, 0xe690006c, 8, /* INTMSK30A / INTMSKCLR30A */
+          { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
+
+        { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */
+          { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0,
+            AP_ARM_IRQPMU, 0, AP_ARM_COMMTX, AP_ARM_COMMRX } },
+        { 0xe6940084, 0xe69400c4, 8, /* IMR1A / IMCR1A */
+          { 0, CRYPT_STD, DIRC, 0,
+            DMAC1_1_DEI3, DMAC1_1_DEI2, DMAC1_1_DEI1, DMAC1_1_DEI0 } },
+        { 0xe6940088, 0xe69400c8, 8, /* IMR2A / IMCR2A */
+          { 0, 0, 0, 0,
+            BBIF1, BBIF2, MFI_MFIS, MFI_MFIM } },
+        { 0xe694008c, 0xe69400cc, 8, /* IMR3A / IMCR3A */
+          { DMAC3_1_DEI3, DMAC3_1_DEI2, DMAC3_1_DEI1, DMAC3_1_DEI0,
+            DMAC3_2_DADERR, DMAC3_2_DEI5, DMAC3_2_DEI4, IRDA } },
+        { 0xe6940090, 0xe69400d0, 8, /* IMR4A / IMCR4A */
+          { DDM, 0, 0, 0,
+            0, 0, 0, 0 } },
+        { 0xe6940094, 0xe69400d4, 8, /* IMR5A / IMCR5A */
+          { KEYSC_KEY, DMAC1_2_DADERR, DMAC1_2_DEI5, DMAC1_2_DEI4,
+            SCIFA3, SCIFA2, SCIFA1, SCIFA0 } },
+        { 0xe6940098, 0xe69400d8, 8, /* IMR6A / IMCR6A */
+          { SCIFB, SCIFA5, SCIFA4, MSIOF1,
+            0, 0, MSIOF2, 0 } },
+        { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */
+          { DISABLED, DISABLED, ENABLED, ENABLED,
+            FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
+        { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */
+          { 0, DISABLED, ENABLED, ENABLED,
+            TTI20, USBHSDMAC0_USHDMI, 0, 0 } },
+        { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
+          { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10,
+            CMT2, 0, 0, _3DG_SGX540 } },
+        { 0xe69400a8, 0xe69400e8, 8, /* IMR10A / IMCR10A */
+          { 0, DMAC2_2_DADERR, DMAC2_2_DEI5, DMAC2_2_DEI4,
+            0, 0, 0, 0 } },
+        { 0xe69400ac, 0xe69400ec, 8, /* IMR11A / IMCR11A */
+          { IIC1_DTEI1, IIC1_WAITI1, IIC1_TACKI1, IIC1_ALI1,
+            0, 0, IRREM, 0 } },
+        { 0xe69400b0, 0xe69400f0, 8, /* IMR12A / IMCR12A */
+          { 0, 0, TPU0, 0,
+            0, 0, 0, 0 } },
+        { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */
+          { DISABLED, DISABLED, ENABLED, ENABLED,
+            0, CMT3, 0, RWDT0 } },
+        { 0xe6950080, 0xe69500c0, 8, /* IMR0A3 / IMCR0A3 */
+          { SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM, 0,
+            0, 0, 0, 0 } },
+        { 0xe6950090, 0xe69500d0, 8, /* IMR4A3 / IMCR4A3 */
+          { 0, 0, 0, 0,
+            0, 0, 0, HDMI } },
+        { 0xe6950094, 0xe69500d4, 8, /* IMR5A3 / IMCR5A3 */
+          { SPU2_SPU0, SPU2_SPU1, FSI, FMSI,
+            0, 0, 0, MIPI_HSI } },
+        { 0xe6950098, 0xe69500d8, 8, /* IMR6A3 / IMCR6A3 */
+          { 0, IPMMU_IPMMUD, CEC_1, CEC_2,
+            AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ,
+            AP_ARM_DMAIRQ, AP_ARM_DMASIRQ } },
+        { 0xe695009c, 0xe69500dc, 8, /* IMR7A3 / IMCR7A3 */
+          { MFIS2, CPORTR2S, CMT14, CMT15,
+            0, 0, MMC_MMC_ERR, MMC_MMC_NOR } },
+        { 0xe69500a0, 0xe69500e0, 8, /* IMR8A3 / IMCR8A3 */
+          { IIC4_ALI4, IIC4_TACKI4, IIC4_WAITI4, IIC4_DTEI4,
+            IIC3_ALI3, IIC3_TACKI3, IIC3_WAITI3, IIC3_DTEI3 } },
+        { 0xe69500a4, 0xe69500e4, 8, /* IMR9A3 / IMCR9A3 */
+          { 0, 0, 0, 0,
+            USB0_USB0I1, USB0_USB0I0, USB1_USB1I1, USB1_USB1I0 } },
+        { 0xe69500a8, 0xe69500e8, 8, /* IMR10A3 / IMCR10A3 */
+          { USBHSDMAC1_USHDMI, 0, 0, 0,
+            0, 0, 0, 0 } },
+};
+
+static struct intc_prio_reg intca_prio_registers[] __initdata = {
+        { 0xe6900010, 0, 32, 4, /* INTPRI00A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900014, 0, 32, 4, /* INTPRI10A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+        { 0xe6900018, 0, 32, 4, /* INTPRI20A */
+          { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
+        { 0xe690001c, 0, 32, 4, /* INTPRI30A */
+          { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
+
+        { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, 0 } },
+        { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, 0, BBIF1, BBIF2 } },
+        { 0xe6940008, 0, 16, 4, /* IPRCA */ { 0, CRYPT_STD,
+                                              CMT1_CMT11, AP_ARM1 } },
+        { 0xe694000c, 0, 16, 4, /* IPRDA */ { 0, 0,
+                                              CMT1_CMT12, 0 } },
+        { 0xe6940010, 0, 16, 4, /* IPREA */ { DMAC1_1, MFI_MFIS,
+                                              MFI_MFIM, 0 } },
+        { 0xe6940014, 0, 16, 4, /* IPRFA */ { KEYSC_KEY, DMAC1_2,
+                                              _3DG_SGX540, CMT1_CMT10 } },
+        { 0xe6940018, 0, 16, 4, /* IPRGA */ { SCIFA0, SCIFA1,
+                                              SCIFA2, SCIFA3 } },
+        { 0xe694001c, 0, 16, 4, /* IPRGH */ { MSIOF2, USBHSDMAC0_USHDMI,
+                                              FLCTL, SDHI0 } },
+        { 0xe6940020, 0, 16, 4, /* IPRIA */ { MSIOF1, SCIFA4,
+                                              0/* MSU */, IIC1 } },
+        { 0xe6940024, 0, 16, 4, /* IPRJA */ { DMAC2_1, DMAC2_2,
+                                              0/* MSUG */, TTI20 } },
+        { 0xe6940028, 0, 16, 4, /* IPRKA */ { 0, CMT1_CMT13, IRREM, SDHI1 } },
+        { 0xe694002c, 0, 16, 4, /* IPRLA */ { TPU0, 0, 0, 0 } },
+        { 0xe6940030, 0, 16, 4, /* IPRMA */ { 0, CMT3, 0, RWDT0 } },
+        { 0xe6940034, 0, 16, 4, /* IPRNA */ { SCIFB, SCIFA5, 0, DDM } },
+        { 0xe6940038, 0, 16, 4, /* IPROA */ { 0, 0, DIRC, SDHI2 } },
+        { 0xe6950000, 0, 16, 4, /* IPRAA3 */ { SHWYSTAT, 0, 0, 0 } },
+        { 0xe6950024, 0, 16, 4, /* IPRJA3 */ { 0, 0, 0, HDMI } },
+        { 0xe6950028, 0, 16, 4, /* IPRKA3 */ { SPU2, 0, FSI, FMSI } },
+        { 0xe695002c, 0, 16, 4, /* IPRLA3 */ { 0, 0, 0, MIPI_HSI } },
+        { 0xe6950030, 0, 16, 4, /* IPRMA3 */ { IPMMU_IPMMUD, 0,
+                                               CEC_1, CEC_2 } },
+        { 0xe6950034, 0, 16, 4, /* IPRNA3 */ { AP_ARM2, 0, 0, 0 } },
+        { 0xe6950038, 0, 16, 4, /* IPROA3 */ { MFIS2, CPORTR2S,
+                                               CMT14, CMT15 } },
+        { 0xe694003c, 0, 16, 4, /* IPRPA3 */ { 0, 0,
+                                               MMC_MMC_ERR, MMC_MMC_NOR } },
+        { 0xe6940040, 0, 16, 4, /* IPRQA3 */ { IIC4_ALI4, IIC4_TACKI4,
+                                               IIC4_WAITI4, IIC4_DTEI4 } },
+        { 0xe6940044, 0, 16, 4, /* IPRRA3 */ { IIC3_ALI3, IIC3_TACKI3,
+                                               IIC3_WAITI3, IIC3_DTEI3 } },
+        { 0xe6940048, 0, 16, 4, /* IPRSA3 */ { 0/*ERI*/, 0/*RXI*/,
+                                               0/*TXI*/, 0/*TEI*/} },
+        { 0xe694004c, 0, 16, 4, /* IPRTA3 */ { USB0_USB0I1, USB0_USB0I0,
+                                               USB1_USB1I1, USB1_USB1I0 } },
+        { 0xe6940050, 0, 16, 4, /* IPRUA3 */ { USBHSDMAC1_USHDMI, 0, 0, 0 } },
+};
+
+static struct intc_sense_reg intca_sense_registers[] __initdata = {
+        { 0xe6900000, 32, 4, /* ICR1A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900004, 32, 4, /* ICR2A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+        { 0xe6900008, 32, 4, /* ICR3A */
+          { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
+        { 0xe690000c, 32, 4, /* ICR4A */
+          { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
+};
+
+static struct intc_mask_reg intca_ack_registers[] __initdata = {
+        { 0xe6900020, 0, 8, /* INTREQ00A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900024, 0, 8, /* INTREQ10A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+        { 0xe6900028, 0, 8, /* INTREQ20A */
+          { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
+        { 0xe690002c, 0, 8, /* INTREQ30A */
+          { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
+};
+
+static struct intc_desc intca_desc __initdata = {
+        .name = "sh7372-intca",
+        .force_enable = ENABLED,
+        .force_disable = DISABLED,
+        .hw = INTC_HW_DESC(intca_vectors, intca_groups,
+                           intca_mask_registers, intca_prio_registers,
+                           intca_sense_registers, intca_ack_registers),
+};
+
+void __init sh7372_init_irq(void)
+{
+        register_intc_controller(&intca_desc);
+}
diff --git a/arch/arm/mach-shmobile/intc-sh7377.c b/arch/arm/mach-shmobile/intc-sh7377.c
new file mode 100644
index 00000000000..5c781e2d189
--- /dev/null
+++ b/arch/arm/mach-shmobile/intc-sh7377.c
@@ -0,0 +1,352 @@
+/*
+ * sh7377 processor support - INTC hardware block
+ *
+ * Copyright (C) 2010  Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/sh_intc.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+enum {
+        UNUSED_INTCA = 0,
+        ENABLED,
+        DISABLED,
+
+        /* interrupt sources INTCA */
+        IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A,
+        IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A,
+        IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A,
+        IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A,
+        DIRC,
+        _2DG,
+        CRYPT_STD,
+        IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1,
+        AP_ARM_IRQPMU, AP_ARM_COMMTX, AP_ARM_COMMRX,
+        MFI_MFIM, MFI_MFIS,
+        BBIF1, BBIF2,
+        USBDMAC_USHDMI,
+        USBHS_USHI0, USBHS_USHI1,
+        _3DG_SGX540,
+        CMT1_CMT10, CMT1_CMT11, CMT1_CMT12, CMT1_CMT13, CMT2, CMT3,
+        KEYSC_KEY,
+        SCIFA0, SCIFA1, SCIFA2, SCIFA3,
+        MSIOF2, MSIOF1,
+        SCIFA4, SCIFA5, SCIFB,
+        FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
+        SDHI0,
+        SDHI1,
+        MSU_MSU, MSU_MSU2,
+        IRREM,
+        MSUG,
+        IRDA,
+        TPU0, TPU1, TPU2, TPU3, TPU4,
+        LCRC,
+        PINTCA_PINT1, PINTCA_PINT2,
+        TTI20,
+        MISTY,
+        DDM,
+        RWDT0, RWDT1,
+        DMAC_1_DEI0, DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3,
+        DMAC_2_DEI4, DMAC_2_DEI5, DMAC_2_DADERR,
+        DMAC2_1_DEI0, DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3,
+        DMAC2_2_DEI4, DMAC2_2_DEI5, DMAC2_2_DADERR,
+        DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3,
+        DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR,
+        SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM,
+        ICUSB_ICUSB0, ICUSB_ICUSB1,
+        ICUDMC_ICUDMC1, ICUDMC_ICUDMC2,
+        SPU2_SPU0, SPU2_SPU1,
+        FSI,
+        FMSI,
+        SCUV,
+        IPMMU_IPMMUB,
+        AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ, AP_ARM_DMAIRQ, AP_ARM_DMASIRQ,
+        MFIS2,
+        CPORTR2S,
+        CMT14, CMT15,
+        SCIFA6,
+
+        /* interrupt groups INTCA */
+        DMAC_1, DMAC_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2, SHWYSTAT,
+        AP_ARM1, AP_ARM2, USBHS, SPU2, FLCTL, IIC1,
+        ICUSB, ICUDMC
+};
+
+static struct intc_vect intca_vectors[] = {
+        INTC_VECT(IRQ0A, 0x0200), INTC_VECT(IRQ1A, 0x0220),
+        INTC_VECT(IRQ2A, 0x0240), INTC_VECT(IRQ3A, 0x0260),
+        INTC_VECT(IRQ4A, 0x0280), INTC_VECT(IRQ5A, 0x02a0),
+        INTC_VECT(IRQ6A, 0x02c0), INTC_VECT(IRQ7A, 0x02e0),
+        INTC_VECT(IRQ8A, 0x0300), INTC_VECT(IRQ9A, 0x0320),
+        INTC_VECT(IRQ10A, 0x0340), INTC_VECT(IRQ11A, 0x0360),
+        INTC_VECT(IRQ12A, 0x0380), INTC_VECT(IRQ13A, 0x03a0),
+        INTC_VECT(IRQ14A, 0x03c0), INTC_VECT(IRQ15A, 0x03e0),
+        INTC_VECT(IRQ16A, 0x3200), INTC_VECT(IRQ17A, 0x3220),
+        INTC_VECT(IRQ18A, 0x3240), INTC_VECT(IRQ19A, 0x3260),
+        INTC_VECT(IRQ20A, 0x3280), INTC_VECT(IRQ31A, 0x32a0),
+        INTC_VECT(IRQ22A, 0x32c0), INTC_VECT(IRQ23A, 0x32e0),
+        INTC_VECT(IRQ24A, 0x3300), INTC_VECT(IRQ25A, 0x3320),
+        INTC_VECT(IRQ26A, 0x3340), INTC_VECT(IRQ27A, 0x3360),
+        INTC_VECT(IRQ28A, 0x3380), INTC_VECT(IRQ29A, 0x33a0),
+        INTC_VECT(IRQ30A, 0x33c0), INTC_VECT(IRQ31A, 0x33e0),
+        INTC_VECT(DIRC, 0x0560),
+        INTC_VECT(_2DG, 0x05e0),
+        INTC_VECT(CRYPT_STD, 0x0700),
+        INTC_VECT(IIC1_ALI1, 0x0780), INTC_VECT(IIC1_TACKI1, 0x07a0),
+        INTC_VECT(IIC1_WAITI1, 0x07c0), INTC_VECT(IIC1_DTEI1, 0x07e0),
+        INTC_VECT(AP_ARM_IRQPMU, 0x0800), INTC_VECT(AP_ARM_COMMTX, 0x0840),
+        INTC_VECT(AP_ARM_COMMRX, 0x0860),
+        INTC_VECT(MFI_MFIM, 0x0900), INTC_VECT(MFI_MFIS, 0x0920),
+        INTC_VECT(BBIF1, 0x0940), INTC_VECT(BBIF2, 0x0960),
+        INTC_VECT(USBDMAC_USHDMI, 0x0a00),
+        INTC_VECT(USBHS_USHI0, 0x0a20), INTC_VECT(USBHS_USHI1, 0x0a40),
+        INTC_VECT(_3DG_SGX540, 0x0a60),
+        INTC_VECT(CMT1_CMT10, 0x0b00), INTC_VECT(CMT1_CMT11, 0x0b20),
+        INTC_VECT(CMT1_CMT12, 0x0b40), INTC_VECT(CMT1_CMT13, 0x0b60),
+        INTC_VECT(CMT2, 0x0b80), INTC_VECT(CMT3, 0x0ba0),
+        INTC_VECT(KEYSC_KEY, 0x0be0),
+        INTC_VECT(SCIFA0, 0x0c00), INTC_VECT(SCIFA1, 0x0c20),
+        INTC_VECT(SCIFA2, 0x0c40), INTC_VECT(SCIFA3, 0x0c60),
+        INTC_VECT(MSIOF2, 0x0c80), INTC_VECT(MSIOF1, 0x0d00),
+        INTC_VECT(SCIFA4, 0x0d20), INTC_VECT(SCIFA5, 0x0d40),
+        INTC_VECT(SCIFB, 0x0d60),
+        INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0),
+        INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0),
+        INTC_VECT(SDHI0, 0x0e00), INTC_VECT(SDHI0, 0x0e20),
+        INTC_VECT(SDHI0, 0x0e40), INTC_VECT(SDHI0, 0x0e60),
+        INTC_VECT(SDHI1, 0x0e80), INTC_VECT(SDHI1, 0x0ea0),
+        INTC_VECT(SDHI1, 0x0ec0), INTC_VECT(SDHI1, 0x0ee0),
+        INTC_VECT(MSU_MSU, 0x0f20), INTC_VECT(MSU_MSU2, 0x0f40),
+        INTC_VECT(IRREM, 0x0f60),
+        INTC_VECT(MSUG, 0x0fa0),
+        INTC_VECT(IRDA, 0x0480),
+        INTC_VECT(TPU0, 0x04a0), INTC_VECT(TPU1, 0x04c0),
+        INTC_VECT(TPU2, 0x04e0), INTC_VECT(TPU3, 0x0500),
+        INTC_VECT(TPU4, 0x0520),
+        INTC_VECT(LCRC, 0x0540),
+        INTC_VECT(PINTCA_PINT1, 0x1000), INTC_VECT(PINTCA_PINT2, 0x1020),
+        INTC_VECT(TTI20, 0x1100),
+        INTC_VECT(MISTY, 0x1120),
+        INTC_VECT(DDM, 0x1140),
+        INTC_VECT(RWDT0, 0x1280), INTC_VECT(RWDT1, 0x12a0),
+        INTC_VECT(DMAC_1_DEI0, 0x2000), INTC_VECT(DMAC_1_DEI1, 0x2020),
+        INTC_VECT(DMAC_1_DEI2, 0x2040), INTC_VECT(DMAC_1_DEI3, 0x2060),
+        INTC_VECT(DMAC_2_DEI4, 0x2080), INTC_VECT(DMAC_2_DEI5, 0x20a0),
+        INTC_VECT(DMAC_2_DADERR, 0x20c0),
+        INTC_VECT(DMAC2_1_DEI0, 0x2100), INTC_VECT(DMAC2_1_DEI1, 0x2120),
+        INTC_VECT(DMAC2_1_DEI2, 0x2140), INTC_VECT(DMAC2_1_DEI3, 0x2160),
+        INTC_VECT(DMAC2_2_DEI4, 0x2180), INTC_VECT(DMAC2_2_DEI5, 0x21a0),
+        INTC_VECT(DMAC2_2_DADERR, 0x21c0),
+        INTC_VECT(DMAC3_1_DEI0, 0x2200), INTC_VECT(DMAC3_1_DEI1, 0x2220),
+        INTC_VECT(DMAC3_1_DEI2, 0x2240), INTC_VECT(DMAC3_1_DEI3, 0x2260),
+        INTC_VECT(DMAC3_2_DEI4, 0x2280), INTC_VECT(DMAC3_2_DEI5, 0x22a0),
+        INTC_VECT(DMAC3_2_DADERR, 0x22c0),
+        INTC_VECT(SHWYSTAT_RT, 0x1300), INTC_VECT(SHWYSTAT_HS, 0x1d20),
+        INTC_VECT(SHWYSTAT_COM, 0x1340),
+        INTC_VECT(ICUSB_ICUSB0, 0x1700), INTC_VECT(ICUSB_ICUSB1, 0x1720),
+        INTC_VECT(ICUDMC_ICUDMC1, 0x1780), INTC_VECT(ICUDMC_ICUDMC2, 0x17a0),
+        INTC_VECT(SPU2_SPU0, 0x1800), INTC_VECT(SPU2_SPU1, 0x1820),
+        INTC_VECT(FSI, 0x1840),
+        INTC_VECT(FMSI, 0x1860),
+        INTC_VECT(SCUV, 0x1880),
+        INTC_VECT(IPMMU_IPMMUB, 0x1900),
+        INTC_VECT(AP_ARM_CTIIRQ, 0x1980),
+        INTC_VECT(AP_ARM_DMAEXTERRIRQ, 0x19a0),
+        INTC_VECT(AP_ARM_DMAIRQ, 0x19c0),
+        INTC_VECT(AP_ARM_DMASIRQ, 0x19e0),
+        INTC_VECT(MFIS2, 0x1a00),
+        INTC_VECT(CPORTR2S, 0x1a20),
+        INTC_VECT(CMT14, 0x1a40), INTC_VECT(CMT15, 0x1a60),
+        INTC_VECT(SCIFA6, 0x1a80),
+};
+
+static struct intc_group intca_groups[] __initdata = {
+        INTC_GROUP(DMAC_1, DMAC_1_DEI0,
+                   DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3),
+        INTC_GROUP(DMAC_2, DMAC_2_DEI4,
+                   DMAC_2_DEI5, DMAC_2_DADERR),
+        INTC_GROUP(DMAC2_1, DMAC2_1_DEI0,
+                   DMAC2_1_DEI1, DMAC2_1_DEI2, DMAC2_1_DEI3),
+        INTC_GROUP(DMAC2_2, DMAC2_2_DEI4,
+                   DMAC2_2_DEI5, DMAC2_2_DADERR),
+        INTC_GROUP(DMAC3_1, DMAC3_1_DEI0,
+                   DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3),
+        INTC_GROUP(DMAC3_2, DMAC3_2_DEI4,
+                   DMAC3_2_DEI5, DMAC3_2_DADERR),
+        INTC_GROUP(AP_ARM1, AP_ARM_IRQPMU, AP_ARM_COMMTX, AP_ARM_COMMTX),
+        INTC_GROUP(USBHS, USBHS_USHI0, USBHS_USHI1),
+        INTC_GROUP(SPU2, SPU2_SPU0, SPU2_SPU1),
+        INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI,
+                   FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
+        INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1),
+        INTC_GROUP(SHWYSTAT, SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM),
+        INTC_GROUP(ICUSB, ICUSB_ICUSB0, ICUSB_ICUSB1),
+        INTC_GROUP(ICUDMC, ICUDMC_ICUDMC1, ICUDMC_ICUDMC2),
+};
+
+static struct intc_mask_reg intca_mask_registers[] = {
+        { 0xe6900040, 0xe6900060, 8, /* INTMSK00A / INTMSKCLR00A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900044, 0xe6900064, 8, /* INTMSK10A / INTMSKCLR10A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+        { 0xe6900048, 0xe6900068, 8, /* INTMSK20A / INTMSKCLR20A */
+          { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
+        { 0xe690004c, 0xe690006c, 8, /* INTMSK30A / INTMSKCLR30A */
+          { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
+
+        { 0xe6940080, 0xe69400c0, 8, /* IMR0A / IMCR0A */
+          { DMAC2_1_DEI3, DMAC2_1_DEI2, DMAC2_1_DEI1, DMAC2_1_DEI0,
+            AP_ARM_IRQPMU, 0, AP_ARM_COMMTX, AP_ARM_COMMRX } },
+        { 0xe6940084, 0xe69400c4, 8, /* IMR1A / IMCR1A */
+          { _2DG, CRYPT_STD, DIRC, 0,
+            DMAC_1_DEI3, DMAC_1_DEI2, DMAC_1_DEI1, DMAC_1_DEI0 } },
+        { 0xe6940088, 0xe69400c8, 8, /* IMR2A / IMCR2A */
+          { PINTCA_PINT1, PINTCA_PINT2, 0, 0,
+            BBIF1, BBIF2, MFI_MFIS, MFI_MFIM } },
+        { 0xe694008c, 0xe69400cc, 8, /* IMR3A / IMCR3A */
+          { DMAC3_1_DEI3, DMAC3_1_DEI2, DMAC3_1_DEI1, DMAC3_1_DEI0,
+            DMAC3_2_DADERR, DMAC3_2_DEI5, DMAC3_2_DEI4, IRDA } },
+        { 0xe6940090, 0xe69400d0, 8, /* IMR4A / IMCR4A */
+          { DDM, 0, 0, 0,
+            0, 0, 0, 0 } },
+        { 0xe6940094, 0xe69400d4, 8, /* IMR5A / IMCR5A */
+          { KEYSC_KEY, DMAC_2_DADERR, DMAC_2_DEI5, DMAC_2_DEI4,
+            SCIFA3, SCIFA2, SCIFA1, SCIFA0 } },
+        { 0xe6940098, 0xe69400d8, 8, /* IMR6A / IMCR6A */
+          { SCIFB, SCIFA5, SCIFA4, MSIOF1,
+            0, 0, MSIOF2, 0 } },
+        { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */
+          { DISABLED, DISABLED, ENABLED, ENABLED,
+            FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
+        { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */
+          { DISABLED, DISABLED, ENABLED, ENABLED,
+            TTI20, USBDMAC_USHDMI, 0, MSUG } },
+        { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */
+          { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10,
+            CMT2, USBHS_USHI1, USBHS_USHI0, _3DG_SGX540 } },
+        { 0xe69400a8, 0xe69400e8, 8, /* IMR10A / IMCR10A */
+          { 0, DMAC2_2_DADERR, DMAC2_2_DEI5, DMAC2_2_DEI4,
+            0, 0, 0, 0 } },
+        { 0xe69400ac, 0xe69400ec, 8, /* IMR11A / IMCR11A */
+          { IIC1_DTEI1, IIC1_WAITI1, IIC1_TACKI1, IIC1_ALI1,
+            LCRC, MSU_MSU2, IRREM, MSU_MSU } },
+        { 0xe69400b0, 0xe69400f0, 8, /* IMR12A / IMCR12A */
+          { 0, 0, TPU0, TPU1,
+            TPU2, TPU3, TPU4, 0 } },
+        { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */
+          { 0, 0, 0, 0,
+            MISTY, CMT3, RWDT1, RWDT0 } },
+        { 0xe6950080, 0xe69500c0, 8, /* IMR0A3 / IMCR0A3 */
+          { SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM, 0,
+            0, 0, 0, 0 } },
+        { 0xe6950090, 0xe69500d0, 8, /* IMR4A3 / IMCR4A3 */
+          { ICUSB_ICUSB0, ICUSB_ICUSB1, 0, 0,
+            ICUDMC_ICUDMC1, ICUDMC_ICUDMC2, 0, 0 } },
+        { 0xe6950094, 0xe69500d4, 8, /* IMR5A3 / IMCR5A3 */
+          { SPU2_SPU0, SPU2_SPU1, FSI, FMSI,
+            SCUV, 0, 0, 0 } },
+        { 0xe6950098, 0xe69500d8, 8, /* IMR6A3 / IMCR6A3 */
+          { IPMMU_IPMMUB, 0, 0, 0,
+            AP_ARM_CTIIRQ, AP_ARM_DMAEXTERRIRQ,
+            AP_ARM_DMAIRQ, AP_ARM_DMASIRQ } },
+        { 0xe695009c, 0xe69500dc, 8, /* IMR7A3 / IMCR7A3 */
+          { MFIS2, CPORTR2S, CMT14, CMT15,
+            SCIFA6, 0, 0, 0 } },
+};
+
+static struct intc_prio_reg intca_prio_registers[] = {
+        { 0xe6900010, 0, 32, 4, /* INTPRI00A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900014, 0, 32, 4, /* INTPRI10A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+        { 0xe6900018, 0, 32, 4, /* INTPRI10A */
+          { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
+        { 0xe690001c, 0, 32, 4, /* INTPRI30A */
+          { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
+
+        { 0xe6940000, 0, 16, 4, /* IPRAA */ { DMAC3_1, DMAC3_2, CMT2, LCRC } },
+        { 0xe6940004, 0, 16, 4, /* IPRBA */ { IRDA, 0, BBIF1, BBIF2 } },
+        { 0xe6940008, 0, 16, 4, /* IPRCA */ { _2DG, CRYPT_STD,
+                                              CMT1_CMT11, AP_ARM1 } },
+        { 0xe694000c, 0, 16, 4, /* IPRDA */ { PINTCA_PINT1, PINTCA_PINT2,
+                                              CMT1_CMT12, TPU4 } },
+        { 0xe6940010, 0, 16, 4, /* IPREA */ { DMAC_1, MFI_MFIS,
+                                              MFI_MFIM, USBHS } },
+        { 0xe6940014, 0, 16, 4, /* IPRFA */ { KEYSC_KEY, DMAC_2,
+                                              _3DG_SGX540, CMT1_CMT10 } },
+        { 0xe6940018, 0, 16, 4, /* IPRGA */ { SCIFA0, SCIFA1,
+                                              SCIFA2, SCIFA3 } },
+        { 0xe694001c, 0, 16, 4, /* IPRGH */ { MSIOF2, USBDMAC_USHDMI,
+                                              FLCTL, SDHI0 } },
+        { 0xe6940020, 0, 16, 4, /* IPRIA */ { MSIOF1, SCIFA4, MSU_MSU, IIC1 } },
+        { 0xe6940024, 0, 16, 4, /* IPRJA */ { DMAC2_1, DMAC2_2, MSUG, TTI20 } },
+        { 0xe6940028, 0, 16, 4, /* IPRKA */ { 0, CMT1_CMT13, IRREM, SDHI1 } },
+        { 0xe694002c, 0, 16, 4, /* IPRLA */ { TPU0, TPU1, TPU2, TPU3 } },
+        { 0xe6940030, 0, 16, 4, /* IPRMA */ { MISTY, CMT3, RWDT1, RWDT0 } },
+        { 0xe6940034, 0, 16, 4, /* IPRNA */ { SCIFB, SCIFA5, 0, DDM } },
+        { 0xe6940038, 0, 16, 4, /* IPROA */ { 0, 0, DIRC, 0 } },
+        { 0xe6950000, 0, 16, 4, /* IPRAA3 */ { SHWYSTAT, 0, 0, 0 } },
+        { 0xe6950020, 0, 16, 4, /* IPRIA3 */ { ICUSB, 0, 0, 0 } },
+        { 0xe6950024, 0, 16, 4, /* IPRJA3 */ { ICUDMC, 0, 0, 0 } },
+        { 0xe6950028, 0, 16, 4, /* IPRKA3 */ { SPU2, 0, FSI, FMSI } },
+        { 0xe695002c, 0, 16, 4, /* IPRLA3 */ { SCUV, 0, 0, 0 } },
+        { 0xe6950030, 0, 16, 4, /* IPRMA3 */ { IPMMU_IPMMUB, 0, 0, 0 } },
+        { 0xe6950034, 0, 16, 4, /* IPRNA3 */ { AP_ARM2, 0, 0, 0 } },
+        { 0xe6950038, 0, 16, 4, /* IPROA3 */ { MFIS2, CPORTR2S,
+                                               CMT14, CMT15 } },
+        { 0xe694003c, 0, 16, 4, /* IPRPA3 */ { SCIFA6, 0, 0, 0 } },
+};
+
+static struct intc_sense_reg intca_sense_registers[] __initdata = {
+        { 0xe6900000, 16, 2, /* ICR1A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900004, 16, 2, /* ICR2A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+        { 0xe6900008, 16, 2, /* ICR3A */
+          { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
+        { 0xe690000c, 16, 2, /* ICR4A */
+          { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
+};
+
+static struct intc_mask_reg intca_ack_registers[] __initdata = {
+        { 0xe6900020, 0, 8, /* INTREQ00A */
+          { IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A } },
+        { 0xe6900024, 0, 8, /* INTREQ10A */
+          { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } },
+        { 0xe6900028, 0, 8, /* INTREQ20A */
+          { IRQ16A, IRQ17A, IRQ18A, IRQ19A, IRQ20A, IRQ21A, IRQ22A, IRQ23A } },
+        { 0xe690002c, 0, 8, /* INTREQ30A */
+          { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } },
+};
+
+static struct intc_desc intca_desc __initdata = {
+        .name = "sh7377-intca",
+        .force_enable = ENABLED,
+        .force_disable = DISABLED,
+        .hw = INTC_HW_DESC(intca_vectors, intca_groups,
+                           intca_mask_registers, intca_prio_registers,
+                           intca_sense_registers, intca_ack_registers),
+};
+
+void __init sh7377_init_irq(void)
+{
+        register_intc_controller(&intca_desc);
+}
diff --git a/arch/arm/mach-shmobile/pfc-sh7367.c b/arch/arm/mach-shmobile/pfc-sh7367.c
new file mode 100644
index 00000000000..128555e76e4
--- /dev/null
+++ b/arch/arm/mach-shmobile/pfc-sh7367.c
@@ -0,0 +1,1801 @@
+/*
+ * sh7367 processor support - PFC hardware block
+ *
+ * Copyright (C) 2010  Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <mach/sh7367.h>
+
+#define _1(fn, pfx, sfx) fn(pfx, sfx)
+
+#define _10(fn, pfx, sfx)                               \
+        _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx),       \
+        _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx),       \
+        _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx),       \
+        _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx),       \
+        _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
+
+#define _90(fn, pfx, sfx)                               \
+        _10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx),     \
+        _10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx),     \
+        _10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx),     \
+        _10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx),     \
+        _10(fn, pfx##9, sfx)
+
+#define _273(fn, pfx, sfx)              \
+        _10(fn, pfx, sfx), _90(fn, pfx, sfx),           \
+        _10(fn, pfx##10, sfx), _90(fn, pfx##1, sfx),    \
+        _10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx),   \
+        _10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx),   \
+        _10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx),   \
+        _10(fn, pfx##26, sfx), _1(fn, pfx##270, sfx),   \
+        _1(fn, pfx##271, sfx), _1(fn, pfx##272, sfx)
+
+#define _PORT(pfx, sfx) pfx##_##sfx
+#define PORT_273(str) _273(_PORT, PORT, str)
+
+enum {
+        PINMUX_RESERVED = 0,
+
+        PINMUX_DATA_BEGIN,
+        PORT_273(DATA), /* PORT0_DATA -> PORT272_DATA */
+        PINMUX_DATA_END,
+
+        PINMUX_INPUT_BEGIN,
+        PORT_273(IN), /* PORT0_IN -> PORT272_IN */
+        PINMUX_INPUT_END,
+
+        PINMUX_INPUT_PULLUP_BEGIN,
+        PORT_273(IN_PU), /* PORT0_IN_PU -> PORT272_IN_PU */
+        PINMUX_INPUT_PULLUP_END,
+
+        PINMUX_INPUT_PULLDOWN_BEGIN,
+        PORT_273(IN_PD), /* PORT0_IN_PD -> PORT272_IN_PD */
+        PINMUX_INPUT_PULLDOWN_END,
+
+        PINMUX_OUTPUT_BEGIN,
+        PORT_273(OUT), /* PORT0_OUT -> PORT272_OUT */
+        PINMUX_OUTPUT_END,
+
+        PINMUX_FUNCTION_BEGIN,
+        PORT_273(FN_IN), /* PORT0_FN_IN -> PORT272_FN_IN */
+        PORT_273(FN_OUT), /* PORT0_FN_OUT -> PORT272_FN_OUT */
+        PORT_273(FN0), /* PORT0_FN0 -> PORT272_FN0 */
+        PORT_273(FN1), /* PORT0_FN1 -> PORT272_FN1 */
+        PORT_273(FN2), /* PORT0_FN2 -> PORT272_FN2 */
+        PORT_273(FN3), /* PORT0_FN3 -> PORT272_FN3 */
+        PORT_273(FN4), /* PORT0_FN4 -> PORT272_FN4 */
+        PORT_273(FN5), /* PORT0_FN5 -> PORT272_FN5 */
+        PORT_273(FN6), /* PORT0_FN6 -> PORT272_FN6 */
+        PORT_273(FN7), /* PORT0_FN7 -> PORT272_FN7 */
+
+        MSELBCR_MSEL2_1, MSELBCR_MSEL2_0,
+        PINMUX_FUNCTION_END,
+
+        PINMUX_MARK_BEGIN,
+        /* Special Pull-up / Pull-down Functions */
+        PORT48_KEYIN0_PU_MARK, PORT49_KEYIN1_PU_MARK,
+        PORT50_KEYIN2_PU_MARK, PORT55_KEYIN3_PU_MARK,
+        PORT56_KEYIN4_PU_MARK, PORT57_KEYIN5_PU_MARK,
+        PORT58_KEYIN6_PU_MARK,
+
+        /* 49-1 */
+        VBUS0_MARK, CPORT0_MARK, CPORT1_MARK, CPORT2_MARK,
+        CPORT3_MARK, CPORT4_MARK, CPORT5_MARK, CPORT6_MARK,
+        CPORT7_MARK, CPORT8_MARK, CPORT9_MARK, CPORT10_MARK,
+        CPORT11_MARK, SIN2_MARK, CPORT12_MARK, XCTS2_MARK,
+        CPORT13_MARK, RFSPO4_MARK, CPORT14_MARK, RFSPO5_MARK,
+        CPORT15_MARK, CPORT16_MARK, CPORT17_MARK, SOUT2_MARK,
+        CPORT18_MARK, XRTS2_MARK, CPORT19_MARK, CPORT20_MARK,
+        RFSPO6_MARK, CPORT21_MARK, STATUS0_MARK, CPORT22_MARK,
+        STATUS1_MARK, CPORT23_MARK, STATUS2_MARK, RFSPO7_MARK,
+        MPORT0_MARK, MPORT1_MARK, B_SYNLD1_MARK, B_SYNLD2_MARK,
+        XMAINPS_MARK, XDIVPS_MARK, XIDRST_MARK, IDCLK_MARK,
+        IDIO_MARK, SOUT1_MARK, SCIFA4_TXD_MARK,
+        M02_BERDAT_MARK, SIN1_MARK, SCIFA4_RXD_MARK, XWUP_MARK,
+        XRTS1_MARK, SCIFA4_RTS_MARK, M03_BERCLK_MARK,
+        XCTS1_MARK, SCIFA4_CTS_MARK,
+
+        /* 49-2 */
+        HSU_IQ_AGC6_MARK, MFG2_IN2_MARK, MSIOF2_MCK0_MARK,
+        HSU_IQ_AGC5_MARK, MFG2_IN1_MARK, MSIOF2_MCK1_MARK,
+        HSU_IQ_AGC4_MARK, MSIOF2_RSYNC_MARK,
+        HSU_IQ_AGC3_MARK, MFG2_OUT1_MARK, MSIOF2_RSCK_MARK,
+        HSU_IQ_AGC2_MARK, PORT42_KEYOUT0_MARK,
+        HSU_IQ_AGC1_MARK, PORT43_KEYOUT1_MARK,
+        HSU_IQ_AGC0_MARK, PORT44_KEYOUT2_MARK,
+        HSU_IQ_AGC_ST_MARK, PORT45_KEYOUT3_MARK,
+        HSU_IQ_PDO_MARK, PORT46_KEYOUT4_MARK,
+        HSU_IQ_PYO_MARK, PORT47_KEYOUT5_MARK,
+        HSU_EN_TXMUX_G3MO_MARK, PORT48_KEYIN0_MARK,
+        HSU_I_TXMUX_G3MO_MARK, PORT49_KEYIN1_MARK,
+        HSU_Q_TXMUX_G3MO_MARK, PORT50_KEYIN2_MARK,
+        HSU_SYO_MARK, PORT51_MSIOF2_TSYNC_MARK,
+        HSU_SDO_MARK, PORT52_MSIOF2_TSCK_MARK,
+        HSU_TGTTI_G3MO_MARK, PORT53_MSIOF2_TXD_MARK,
+        B_TIME_STAMP_MARK, PORT54_MSIOF2_RXD_MARK,
+        HSU_SDI_MARK, PORT55_KEYIN3_MARK,
+        HSU_SCO_MARK, PORT56_KEYIN4_MARK,
+        HSU_DREQ_MARK, PORT57_KEYIN5_MARK,
+        HSU_DACK_MARK, PORT58_KEYIN6_MARK,
+        HSU_CLK61M_MARK, PORT59_MSIOF2_SS1_MARK,
+        HSU_XRST_MARK, PORT60_MSIOF2_SS2_MARK,
+        PCMCLKO_MARK, SYNC8KO_MARK, DNPCM_A_MARK, UPPCM_A_MARK,
+        XTALB1L_MARK,
+        GPS_AGC1_MARK, SCIFA0_RTS_MARK,
+        GPS_AGC2_MARK, SCIFA0_SCK_MARK,
+        GPS_AGC3_MARK, SCIFA0_TXD_MARK,
+        GPS_AGC4_MARK, SCIFA0_RXD_MARK,
+        GPS_PWRD_MARK, SCIFA0_CTS_MARK,
+        GPS_IM_MARK, GPS_IS_MARK, GPS_QM_MARK, GPS_QS_MARK,
+        SIUBOMC_MARK, TPU2TO0_MARK,
+        SIUCKB_MARK, TPU2TO1_MARK,
+        SIUBOLR_MARK, BBIF2_TSYNC_MARK, TPU2TO2_MARK,
+        SIUBOBT_MARK, BBIF2_TSCK_MARK, TPU2TO3_MARK,
+        SIUBOSLD_MARK, BBIF2_TXD_MARK, TPU3TO0_MARK,
+        SIUBILR_MARK, TPU3TO1_MARK,
+        SIUBIBT_MARK, TPU3TO2_MARK,
+        SIUBISLD_MARK, TPU3TO3_MARK,
+        NMI_MARK, TPU4TO0_MARK,
+        DNPCM_M_MARK, TPU4TO1_MARK, TPU4TO2_MARK, TPU4TO3_MARK,
+        IRQ_TMPB_MARK,
+        PWEN_MARK, MFG1_OUT1_MARK,
+        OVCN_MARK, MFG1_IN1_MARK,
+        OVCN2_MARK, MFG1_IN2_MARK,
+
+        /* 49-3 */
+        RFSPO1_MARK, RFSPO2_MARK, RFSPO3_MARK, PORT93_VIO_CKO2_MARK,
+        USBTERM_MARK, EXTLP_MARK, IDIN_MARK,
+        SCIFA5_CTS_MARK, MFG0_IN1_MARK,
+        SCIFA5_RTS_MARK, MFG0_IN2_MARK,
+        SCIFA5_RXD_MARK,
+        SCIFA5_TXD_MARK,
+        SCIFA5_SCK_MARK, MFG0_OUT1_MARK,
+        A0_EA0_MARK, BS_MARK,
+        A14_EA14_MARK, PORT102_KEYOUT0_MARK,
+        A15_EA15_MARK, PORT103_KEYOUT1_MARK, DV_CLKOL_MARK,
+        A16_EA16_MARK, PORT104_KEYOUT2_MARK,
+        DV_VSYNCL_MARK, MSIOF0_SS1_MARK,
+        A17_EA17_MARK, PORT105_KEYOUT3_MARK,
+        DV_HSYNCL_MARK, MSIOF0_TSYNC_MARK,
+        A18_EA18_MARK, PORT106_KEYOUT4_MARK,
+        DV_DL0_MARK, MSIOF0_TSCK_MARK,
+        A19_EA19_MARK, PORT107_KEYOUT5_MARK,
+        DV_DL1_MARK, MSIOF0_TXD_MARK,
+        A20_EA20_MARK, PORT108_KEYIN0_MARK,
+        DV_DL2_MARK, MSIOF0_RSCK_MARK,
+        A21_EA21_MARK, PORT109_KEYIN1_MARK,
+        DV_DL3_MARK, MSIOF0_RSYNC_MARK,
+        A22_EA22_MARK, PORT110_KEYIN2_MARK,
+        DV_DL4_MARK, MSIOF0_MCK0_MARK,
+        A23_EA23_MARK, PORT111_KEYIN3_MARK,
+        DV_DL5_MARK, MSIOF0_MCK1_MARK,
+        A24_EA24_MARK, PORT112_KEYIN4_MARK,
+        DV_DL6_MARK, MSIOF0_RXD_MARK,
+        A25_EA25_MARK, PORT113_KEYIN5_MARK,
+        DV_DL7_MARK, MSIOF0_SS2_MARK,
+        A26_MARK, PORT113_KEYIN6_MARK, DV_CLKIL_MARK,
+        D0_ED0_NAF0_MARK, D1_ED1_NAF1_MARK, D2_ED2_NAF2_MARK,
+        D3_ED3_NAF3_MARK, D4_ED4_NAF4_MARK, D5_ED5_NAF5_MARK,
+        D6_ED6_NAF6_MARK, D7_ED7_NAF7_MARK, D8_ED8_NAF8_MARK,
+        D9_ED9_NAF9_MARK, D10_ED10_NAF10_MARK, D11_ED11_NAF11_MARK,
+        D12_ED12_NAF12_MARK, D13_ED13_NAF13_MARK,
+        D14_ED14_NAF14_MARK, D15_ED15_NAF15_MARK,
+        CS4_MARK, CS5A_MARK, CS5B_MARK, FCE1_MARK,
+        CS6B_MARK, XCS2_MARK, FCE0_MARK, CS6A_MARK,
+        DACK0_MARK, WAIT_MARK, DREQ0_MARK, RD_XRD_MARK,
+        A27_MARK, RDWR_XWE_MARK, WE0_XWR0_FWE_MARK,
+        WE1_XWR1_MARK, FRB_MARK, CKO_MARK,
+        NBRSTOUT_MARK, NBRST_MARK,
+
+        /* 49-4 */
+        RFSPO0_MARK, PORT146_VIO_CKO2_MARK, TSTMD_MARK,
+        VIO_VD_MARK, VIO_HD_MARK,
+        VIO_D0_MARK, VIO_D1_MARK, VIO_D2_MARK,
+        VIO_D3_MARK, VIO_D4_MARK, VIO_D5_MARK,
+        VIO_D6_MARK, VIO_D7_MARK, VIO_D8_MARK,
+        VIO_D9_MARK, VIO_D10_MARK, VIO_D11_MARK,
+        VIO_D12_MARK, VIO_D13_MARK, VIO_D14_MARK,
+        VIO_D15_MARK, VIO_CLK_MARK, VIO_FIELD_MARK,
+        VIO_CKO_MARK,
+        MFG3_IN1_MARK, MFG3_IN2_MARK,
+        M9_SLCD_A01_MARK, MFG3_OUT1_MARK, TPU0TO0_MARK,
+        M10_SLCD_CK1_MARK, MFG4_IN1_MARK, TPU0TO1_MARK,
+        M11_SLCD_SO1_MARK, MFG4_IN2_MARK, TPU0TO2_MARK,
+        M12_SLCD_CE1_MARK, MFG4_OUT1_MARK, TPU0TO3_MARK,
+        LCDD0_MARK, PORT175_KEYOUT0_MARK, DV_D0_MARK,
+        SIUCKA_MARK, MFG0_OUT2_MARK,
+        LCDD1_MARK, PORT176_KEYOUT1_MARK, DV_D1_MARK,
+        SIUAOLR_MARK, BBIF2_TSYNC1_MARK,
+        LCDD2_MARK, PORT177_KEYOUT2_MARK, DV_D2_MARK,
+        SIUAOBT_MARK, BBIF2_TSCK1_MARK,
+        LCDD3_MARK, PORT178_KEYOUT3_MARK, DV_D3_MARK,
+        SIUAOSLD_MARK, BBIF2_TXD1_MARK,
+        LCDD4_MARK, PORT179_KEYOUT4_MARK, DV_D4_MARK,
+        SIUAISPD_MARK, MFG1_OUT2_MARK,
+        LCDD5_MARK, PORT180_KEYOUT5_MARK, DV_D5_MARK,
+        SIUAILR_MARK, MFG2_OUT2_MARK,
+        LCDD6_MARK, DV_D6_MARK,
+        SIUAIBT_MARK, MFG3_OUT2_MARK, XWR2_MARK,
+        LCDD7_MARK, DV_D7_MARK,
+        SIUAISLD_MARK, MFG4_OUT2_MARK, XWR3_MARK,
+        LCDD8_MARK, DV_D8_MARK, D16_MARK, ED16_MARK,
+        LCDD9_MARK, DV_D9_MARK, D17_MARK, ED17_MARK,
+        LCDD10_MARK, DV_D10_MARK, D18_MARK, ED18_MARK,
+        LCDD11_MARK, DV_D11_MARK, D19_MARK, ED19_MARK,
+        LCDD12_MARK, DV_D12_MARK, D20_MARK, ED20_MARK,
+        LCDD13_MARK, DV_D13_MARK, D21_MARK, ED21_MARK,
+        LCDD14_MARK, DV_D14_MARK, D22_MARK, ED22_MARK,
+        LCDD15_MARK, DV_D15_MARK, D23_MARK, ED23_MARK,
+        LCDD16_MARK, DV_HSYNC_MARK, D24_MARK, ED24_MARK,
+        LCDD17_MARK, DV_VSYNC_MARK, D25_MARK, ED25_MARK,
+        LCDD18_MARK, DREQ2_MARK, MSIOF0L_TSCK_MARK,
+        D26_MARK, ED26_MARK,
+        LCDD19_MARK, MSIOF0L_TSYNC_MARK,
+        D27_MARK, ED27_MARK,
+        LCDD20_MARK, TS_SPSYNC1_MARK, MSIOF0L_MCK0_MARK,
+        D28_MARK, ED28_MARK,
+        LCDD21_MARK, TS_SDAT1_MARK, MSIOF0L_MCK1_MARK,
+        D29_MARK, ED29_MARK,
+        LCDD22_MARK, TS_SDEN1_MARK, MSIOF0L_SS1_MARK,
+        D30_MARK, ED30_MARK,
+        LCDD23_MARK, TS_SCK1_MARK, MSIOF0L_SS2_MARK,
+        D31_MARK, ED31_MARK,
+        LCDDCK_MARK, LCDWR_MARK, DV_CKO_MARK, SIUAOSPD_MARK,
+        LCDRD_MARK, DACK2_MARK, MSIOF0L_RSYNC_MARK,
+
+        /* 49-5 */
+        LCDHSYN_MARK, LCDCS_MARK, LCDCS2_MARK, DACK3_MARK,
+        LCDDISP_MARK, LCDRS_MARK, DREQ3_MARK, MSIOF0L_RSCK_MARK,
+        LCDCSYN_MARK, LCDCSYN2_MARK, DV_CKI_MARK,
+        LCDLCLK_MARK, DREQ1_MARK, MSIOF0L_RXD_MARK,
+        LCDDON_MARK, LCDDON2_MARK, DACK1_MARK, MSIOF0L_TXD_MARK,
+        VIO_DR0_MARK, VIO_DR1_MARK, VIO_DR2_MARK, VIO_DR3_MARK,
+        VIO_DR4_MARK, VIO_DR5_MARK, VIO_DR6_MARK, VIO_DR7_MARK,
+        VIO_VDR_MARK, VIO_HDR_MARK,
+        VIO_CLKR_MARK, VIO_CKOR_MARK,
+        SCIFA1_TXD_MARK, GPS_PGFA0_MARK,
+        SCIFA1_SCK_MARK, GPS_PGFA1_MARK,
+        SCIFA1_RTS_MARK, GPS_EPPSINMON_MARK,
+        SCIFA1_RXD_MARK, SCIFA1_CTS_MARK,
+        MSIOF1_TXD_MARK, SCIFA1_TXD2_MARK, GPS_TXD_MARK,
+        MSIOF1_TSYNC_MARK, SCIFA1_CTS2_MARK, I2C_SDA2_MARK,
+        MSIOF1_TSCK_MARK, SCIFA1_SCK2_MARK,
+        MSIOF1_RXD_MARK, SCIFA1_RXD2_MARK, GPS_RXD_MARK,
+        MSIOF1_RSCK_MARK, SCIFA1_RTS2_MARK,
+        MSIOF1_RSYNC_MARK, I2C_SCL2_MARK,
+        MSIOF1_MCK0_MARK, MSIOF1_MCK1_MARK,
+        MSIOF1_SS1_MARK, EDBGREQ3_MARK,
+        MSIOF1_SS2_MARK,
+        PORT236_IROUT_MARK, IRDA_OUT_MARK,
+        IRDA_IN_MARK, IRDA_FIRSEL_MARK,
+        TPU1TO0_MARK, TS_SPSYNC3_MARK,
+        TPU1TO1_MARK, TS_SDAT3_MARK,
+        TPU1TO2_MARK, TS_SDEN3_MARK, PORT241_MSIOF2_SS1_MARK,
+        TPU1TO3_MARK, PORT242_MSIOF2_TSCK_MARK,
+        M13_BSW_MARK, PORT243_MSIOF2_TSYNC_MARK,
+        M14_GSW_MARK, PORT244_MSIOF2_TXD_MARK,
+        PORT245_IROUT_MARK, M15_RSW_MARK,
+        SOUT3_MARK, SCIFA2_TXD1_MARK,
+        SIN3_MARK, SCIFA2_RXD1_MARK,
+        XRTS3_MARK, SCIFA2_RTS1_MARK, PORT248_MSIOF2_SS2_MARK,
+        XCTS3_MARK, SCIFA2_CTS1_MARK, PORT249_MSIOF2_RXD_MARK,
+        DINT_MARK, SCIFA2_SCK1_MARK, TS_SCK3_MARK,
+        SDHICLK0_MARK, TCK2_MARK,
+        SDHICD0_MARK,
+        SDHID0_0_MARK, TMS2_MARK,
+        SDHID0_1_MARK, TDO2_MARK,
+        SDHID0_2_MARK, TDI2_MARK,
+        SDHID0_3_MARK, RTCK2_MARK,
+
+        /* 49-6 */
+        SDHICMD0_MARK, TRST2_MARK,
+        SDHIWP0_MARK, EDBGREQ2_MARK,
+        SDHICLK1_MARK, TCK3_MARK,
+        SDHID1_0_MARK, M11_SLCD_SO2_MARK,
+        TS_SPSYNC2_MARK, TMS3_MARK,
+        SDHID1_1_MARK, M9_SLCD_AO2_MARK,
+        TS_SDAT2_MARK, TDO3_MARK,
+        SDHID1_2_MARK, M10_SLCD_CK2_MARK,
+        TS_SDEN2_MARK, TDI3_MARK,
+        SDHID1_3_MARK, M12_SLCD_CE2_MARK,
+        TS_SCK2_MARK, RTCK3_MARK,
+        SDHICMD1_MARK, TRST3_MARK,
+        SDHICLK2_MARK, SCIFB_SCK_MARK,
+        SDHID2_0_MARK, SCIFB_TXD_MARK,
+        SDHID2_1_MARK, SCIFB_CTS_MARK,
+        SDHID2_2_MARK, SCIFB_RXD_MARK,
+        SDHID2_3_MARK, SCIFB_RTS_MARK,
+        SDHICMD2_MARK,
+        RESETOUTS_MARK,
+        DIVLOCK_MARK,
+        PINMUX_MARK_END,
+};
+
+#define PORT_DATA_I(nr) \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
+
+#define PORT_DATA_I_PD(nr) \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
+                    PORT##nr##_IN, PORT##nr##_IN_PD)
+
+#define PORT_DATA_I_PU(nr) \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
+                    PORT##nr##_IN, PORT##nr##_IN_PU)
+
+#define PORT_DATA_I_PU_PD(nr) \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
+                    PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
+
+#define PORT_DATA_O(nr) \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
+
+#define PORT_DATA_IO(nr) \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
+                    PORT##nr##_IN)
+
+#define PORT_DATA_IO_PD(nr) \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
+                    PORT##nr##_IN, PORT##nr##_IN_PD)
+
+#define PORT_DATA_IO_PU(nr) \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
+                    PORT##nr##_IN, PORT##nr##_IN_PU)
+
+#define PORT_DATA_IO_PU_PD(nr) \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
+                    PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
+
+
+static pinmux_enum_t pinmux_data[] = {
+
+        /* specify valid pin states for each pin in GPIO mode */
+
+        /* 49-1 (GPIO) */
+        PORT_DATA_I_PD(0),
+        PORT_DATA_I_PU(1), PORT_DATA_I_PU(2), PORT_DATA_I_PU(3),
+        PORT_DATA_I_PU(4), PORT_DATA_I_PU(5), PORT_DATA_I_PU(6),
+        PORT_DATA_I_PU(7), PORT_DATA_I_PU(8), PORT_DATA_I_PU(9),
+        PORT_DATA_I_PU(10), PORT_DATA_I_PU(11), PORT_DATA_I_PU(12),
+        PORT_DATA_I_PU(13),
+        PORT_DATA_IO_PU_PD(14), PORT_DATA_IO_PU_PD(15),
+        PORT_DATA_O(16), PORT_DATA_O(17), PORT_DATA_O(18), PORT_DATA_O(19),
+        PORT_DATA_O(20), PORT_DATA_O(21), PORT_DATA_O(22), PORT_DATA_O(23),
+        PORT_DATA_O(24), PORT_DATA_O(25), PORT_DATA_O(26),
+        PORT_DATA_I_PD(27), PORT_DATA_I_PD(28),
+        PORT_DATA_O(29), PORT_DATA_O(30), PORT_DATA_O(31), PORT_DATA_O(32),
+        PORT_DATA_IO_PU(33),
+        PORT_DATA_O(34),
+        PORT_DATA_I_PU(35),
+        PORT_DATA_O(36),
+        PORT_DATA_I_PU_PD(37),
+
+        /* 49-2 (GPIO) */
+        PORT_DATA_IO_PU_PD(38),
+        PORT_DATA_IO_PD(39), PORT_DATA_IO_PD(40), PORT_DATA_IO_PD(41),
+        PORT_DATA_O(42), PORT_DATA_O(43), PORT_DATA_O(44), PORT_DATA_O(45),
+        PORT_DATA_O(46), PORT_DATA_O(47),
+        PORT_DATA_I_PU_PD(48), PORT_DATA_I_PU_PD(49), PORT_DATA_I_PU_PD(50),
+        PORT_DATA_IO_PD(51), PORT_DATA_IO_PD(52),
+        PORT_DATA_O(53),
+        PORT_DATA_IO_PD(54),
+        PORT_DATA_I_PU_PD(55),
+        PORT_DATA_IO_PU_PD(56),
+        PORT_DATA_I_PU_PD(57),
+        PORT_DATA_IO_PU_PD(58),
+        PORT_DATA_O(59), PORT_DATA_O(60), PORT_DATA_O(61), PORT_DATA_O(62),
+        PORT_DATA_O(63),
+        PORT_DATA_I_PU(64),
+        PORT_DATA_O(65), PORT_DATA_O(66), PORT_DATA_O(67), PORT_DATA_O(68),
+        PORT_DATA_IO_PD(69), PORT_DATA_IO_PD(70),
+        PORT_DATA_I_PD(71), PORT_DATA_I_PD(72), PORT_DATA_I_PD(73),
+        PORT_DATA_I_PD(74),
+        PORT_DATA_IO_PU_PD(75), PORT_DATA_IO_PU_PD(76),
+        PORT_DATA_IO_PD(77), PORT_DATA_IO_PD(78),
+        PORT_DATA_O(79),
+        PORT_DATA_IO_PD(80), PORT_DATA_IO_PD(81), PORT_DATA_IO_PD(82),
+        PORT_DATA_IO_PU_PD(83), PORT_DATA_IO_PU_PD(84),
+        PORT_DATA_IO_PU_PD(85), PORT_DATA_IO_PU_PD(86),
+        PORT_DATA_I_PD(87),
+        PORT_DATA_IO_PU_PD(88),
+        PORT_DATA_I_PU_PD(89), PORT_DATA_I_PU_PD(90),
+
+        /* 49-3 (GPIO) */
+        PORT_DATA_O(91), PORT_DATA_O(92), PORT_DATA_O(93), PORT_DATA_O(94),
+        PORT_DATA_I_PU_PD(95),
+        PORT_DATA_IO_PU_PD(96), PORT_DATA_IO_PU_PD(97), PORT_DATA_IO_PU_PD(98),
+        PORT_DATA_IO_PU_PD(99), PORT_DATA_IO_PU_PD(100),
+        PORT_DATA_IO(101), PORT_DATA_IO(102), PORT_DATA_IO(103),
+        PORT_DATA_IO_PD(104), PORT_DATA_IO_PD(105), PORT_DATA_IO_PD(106),
+        PORT_DATA_IO_PD(107),
+        PORT_DATA_IO_PU_PD(108), PORT_DATA_IO_PU_PD(109),
+        PORT_DATA_IO_PU_PD(110), PORT_DATA_IO_PU_PD(111),
+        PORT_DATA_IO_PU_PD(112), PORT_DATA_IO_PU_PD(113),
+        PORT_DATA_IO_PU_PD(114),
+        PORT_DATA_IO_PU(115), PORT_DATA_IO_PU(116), PORT_DATA_IO_PU(117),
+        PORT_DATA_IO_PU(118), PORT_DATA_IO_PU(119), PORT_DATA_IO_PU(120),
+        PORT_DATA_IO_PU(121), PORT_DATA_IO_PU(122), PORT_DATA_IO_PU(123),
+        PORT_DATA_IO_PU(124), PORT_DATA_IO_PU(125), PORT_DATA_IO_PU(126),
+        PORT_DATA_IO_PU(127), PORT_DATA_IO_PU(128), PORT_DATA_IO_PU(129),
+        PORT_DATA_IO_PU(130),
+        PORT_DATA_O(131), PORT_DATA_O(132), PORT_DATA_O(133),
+        PORT_DATA_IO_PU(134),
+        PORT_DATA_O(135), PORT_DATA_O(136),
+        PORT_DATA_I_PU_PD(137),
+        PORT_DATA_IO(138),
+        PORT_DATA_IO_PU_PD(139),
+        PORT_DATA_IO(140), PORT_DATA_IO(141),
+        PORT_DATA_I_PU(142),
+        PORT_DATA_O(143), PORT_DATA_O(144),
+        PORT_DATA_I_PU(145),
+
+        /* 49-4 (GPIO) */
+        PORT_DATA_O(146),
+        PORT_DATA_I_PU_PD(147),
+        PORT_DATA_I_PD(148), PORT_DATA_I_PD(149),
+        PORT_DATA_IO_PD(150), PORT_DATA_IO_PD(151), PORT_DATA_IO_PD(152),
+        PORT_DATA_IO_PD(153), PORT_DATA_IO_PD(154), PORT_DATA_IO_PD(155),
+        PORT_DATA_IO_PD(156), PORT_DATA_IO_PD(157), PORT_DATA_IO_PD(158),
+        PORT_DATA_IO_PD(159), PORT_DATA_IO_PD(160), PORT_DATA_IO_PD(161),
+        PORT_DATA_IO_PD(162), PORT_DATA_IO_PD(163), PORT_DATA_IO_PD(164),
+        PORT_DATA_IO_PD(165), PORT_DATA_IO_PD(166),
+        PORT_DATA_IO_PU_PD(167),
+        PORT_DATA_O(168),
+        PORT_DATA_I_PD(169), PORT_DATA_I_PD(170),
+        PORT_DATA_O(171),
+        PORT_DATA_IO_PD(172), PORT_DATA_IO_PD(173),
+        PORT_DATA_O(174),
+        PORT_DATA_IO_PD(175), PORT_DATA_IO_PD(176), PORT_DATA_IO_PD(177),
+        PORT_DATA_IO_PD(178), PORT_DATA_IO_PD(179), PORT_DATA_IO_PD(180),
+        PORT_DATA_IO_PD(181), PORT_DATA_IO_PD(182), PORT_DATA_IO_PD(183),
+        PORT_DATA_IO_PD(184), PORT_DATA_IO_PD(185), PORT_DATA_IO_PD(186),
+        PORT_DATA_IO_PD(187), PORT_DATA_IO_PD(188), PORT_DATA_IO_PD(189),
+        PORT_DATA_IO_PD(190), PORT_DATA_IO_PD(191), PORT_DATA_IO_PD(192),
+        PORT_DATA_IO_PD(193), PORT_DATA_IO_PD(194), PORT_DATA_IO_PD(195),
+        PORT_DATA_IO_PD(196), PORT_DATA_IO_PD(197), PORT_DATA_IO_PD(198),
+        PORT_DATA_O(199),
+        PORT_DATA_IO_PD(200),
+
+        /* 49-5 (GPIO) */
+        PORT_DATA_O(201),
+        PORT_DATA_IO_PD(202), PORT_DATA_IO_PD(203),
+        PORT_DATA_I(204),
+        PORT_DATA_O(205),
+        PORT_DATA_IO_PD(206), PORT_DATA_IO_PD(207), PORT_DATA_IO_PD(208),
+        PORT_DATA_IO_PD(209), PORT_DATA_IO_PD(210), PORT_DATA_IO_PD(211),
+        PORT_DATA_IO_PD(212), PORT_DATA_IO_PD(213), PORT_DATA_IO_PD(214),
+        PORT_DATA_IO_PD(215), PORT_DATA_IO_PD(216),
+        PORT_DATA_O(217),
+        PORT_DATA_I_PU_PD(218), PORT_DATA_I_PU_PD(219),
+        PORT_DATA_O(220), PORT_DATA_O(221), PORT_DATA_O(222),
+        PORT_DATA_I_PD(223),
+        PORT_DATA_I_PU_PD(224),
+        PORT_DATA_O(225),
+        PORT_DATA_IO_PD(226),
+        PORT_DATA_IO_PU_PD(227),
+        PORT_DATA_I_PD(228),
+        PORT_DATA_IO_PD(229), PORT_DATA_IO_PD(230),
+        PORT_DATA_I_PU_PD(231), PORT_DATA_I_PU_PD(232),
+        PORT_DATA_IO_PU_PD(233), PORT_DATA_IO_PU_PD(234),
+        PORT_DATA_I_PU_PD(235),
+        PORT_DATA_O(236),
+        PORT_DATA_I_PD(237),
+        PORT_DATA_IO_PU_PD(238), PORT_DATA_IO_PU_PD(239),
+        PORT_DATA_IO_PD(240), PORT_DATA_IO_PD(241),
+        PORT_DATA_IO_PD(242), PORT_DATA_IO_PD(243),
+        PORT_DATA_O(244),
+        PORT_DATA_IO_PU_PD(245),
+        PORT_DATA_O(246),
+        PORT_DATA_I_PD(247),
+        PORT_DATA_IO_PU_PD(248),
+        PORT_DATA_I_PU_PD(249),
+        PORT_DATA_IO_PD(250), PORT_DATA_IO_PD(251),
+        PORT_DATA_IO_PU_PD(252), PORT_DATA_IO_PU_PD(253),
+        PORT_DATA_IO_PU_PD(254), PORT_DATA_IO_PU_PD(255),
+        PORT_DATA_IO_PU_PD(256),
+
+        /* 49-6 (GPIO) */
+        PORT_DATA_IO_PU_PD(257), PORT_DATA_IO_PU_PD(258),
+        PORT_DATA_IO_PD(259),
+        PORT_DATA_IO_PU(260), PORT_DATA_IO_PU(261), PORT_DATA_IO_PU(262),
+        PORT_DATA_IO_PU(263), PORT_DATA_IO_PU(264),
+        PORT_DATA_O(265),
+        PORT_DATA_IO_PU(266), PORT_DATA_IO_PU(267), PORT_DATA_IO_PU(268),
+        PORT_DATA_IO_PU(269), PORT_DATA_IO_PU(270),
+        PORT_DATA_O(271),
+        PORT_DATA_I_PD(272),
+
+        /* Special Pull-up / Pull-down Functions */
+        PINMUX_DATA(PORT48_KEYIN0_PU_MARK, MSELBCR_MSEL2_1,
+                    PORT48_FN2, PORT48_IN_PU),
+        PINMUX_DATA(PORT49_KEYIN1_PU_MARK, MSELBCR_MSEL2_1,
+                    PORT49_FN2, PORT49_IN_PU),
+        PINMUX_DATA(PORT50_KEYIN2_PU_MARK, MSELBCR_MSEL2_1,
+                    PORT50_FN2, PORT50_IN_PU),
+        PINMUX_DATA(PORT55_KEYIN3_PU_MARK, MSELBCR_MSEL2_1,
+                    PORT55_FN2, PORT55_IN_PU),
+        PINMUX_DATA(PORT56_KEYIN4_PU_MARK, MSELBCR_MSEL2_1,
+                    PORT56_FN2, PORT56_IN_PU),
+        PINMUX_DATA(PORT57_KEYIN5_PU_MARK, MSELBCR_MSEL2_1,
+                    PORT57_FN2, PORT57_IN_PU),
+        PINMUX_DATA(PORT58_KEYIN6_PU_MARK, MSELBCR_MSEL2_1,
+                    PORT58_FN2, PORT58_IN_PU),
+
+        /* 49-1 (FN) */
+        PINMUX_DATA(VBUS0_MARK, PORT0_FN1),
+        PINMUX_DATA(CPORT0_MARK, PORT1_FN1),
+        PINMUX_DATA(CPORT1_MARK, PORT2_FN1),
+        PINMUX_DATA(CPORT2_MARK, PORT3_FN1),
+        PINMUX_DATA(CPORT3_MARK, PORT4_FN1),
+        PINMUX_DATA(CPORT4_MARK, PORT5_FN1),
+        PINMUX_DATA(CPORT5_MARK, PORT6_FN1),
+        PINMUX_DATA(CPORT6_MARK, PORT7_FN1),
+        PINMUX_DATA(CPORT7_MARK, PORT8_FN1),
+        PINMUX_DATA(CPORT8_MARK, PORT9_FN1),
+        PINMUX_DATA(CPORT9_MARK, PORT10_FN1),
+        PINMUX_DATA(CPORT10_MARK, PORT11_FN1),
+        PINMUX_DATA(CPORT11_MARK, PORT12_FN1),
+        PINMUX_DATA(SIN2_MARK, PORT12_FN2),
+        PINMUX_DATA(CPORT12_MARK, PORT13_FN1),
+        PINMUX_DATA(XCTS2_MARK, PORT13_FN2),
+        PINMUX_DATA(CPORT13_MARK, PORT14_FN1),
+        PINMUX_DATA(RFSPO4_MARK, PORT14_FN2),
+        PINMUX_DATA(CPORT14_MARK, PORT15_FN1),
+        PINMUX_DATA(RFSPO5_MARK, PORT15_FN2),
+        PINMUX_DATA(CPORT15_MARK, PORT16_FN1),
+        PINMUX_DATA(CPORT16_MARK, PORT17_FN1),
+        PINMUX_DATA(CPORT17_MARK, PORT18_FN1),
+        PINMUX_DATA(SOUT2_MARK, PORT18_FN2),
+        PINMUX_DATA(CPORT18_MARK, PORT19_FN1),
+        PINMUX_DATA(XRTS2_MARK, PORT19_FN1),
+        PINMUX_DATA(CPORT19_MARK, PORT20_FN1),
+        PINMUX_DATA(CPORT20_MARK, PORT21_FN1),
+        PINMUX_DATA(RFSPO6_MARK, PORT21_FN2),
+        PINMUX_DATA(CPORT21_MARK, PORT22_FN1),
+        PINMUX_DATA(STATUS0_MARK, PORT22_FN2),
+        PINMUX_DATA(CPORT22_MARK, PORT23_FN1),
+        PINMUX_DATA(STATUS1_MARK, PORT23_FN2),
+        PINMUX_DATA(CPORT23_MARK, PORT24_FN1),
+        PINMUX_DATA(STATUS2_MARK, PORT24_FN2),
+        PINMUX_DATA(RFSPO7_MARK, PORT24_FN3),
+        PINMUX_DATA(MPORT0_MARK, PORT25_FN1),
+        PINMUX_DATA(MPORT1_MARK, PORT26_FN1),
+        PINMUX_DATA(B_SYNLD1_MARK, PORT27_FN1),
+        PINMUX_DATA(B_SYNLD2_MARK, PORT28_FN1),
+        PINMUX_DATA(XMAINPS_MARK, PORT29_FN1),
+        PINMUX_DATA(XDIVPS_MARK, PORT30_FN1),
+        PINMUX_DATA(XIDRST_MARK, PORT31_FN1),
+        PINMUX_DATA(IDCLK_MARK, PORT32_FN1),
+        PINMUX_DATA(IDIO_MARK, PORT33_FN1),
+        PINMUX_DATA(SOUT1_MARK, PORT34_FN1),
+        PINMUX_DATA(SCIFA4_TXD_MARK, PORT34_FN2),
+        PINMUX_DATA(M02_BERDAT_MARK, PORT34_FN3),
+        PINMUX_DATA(SIN1_MARK, PORT35_FN1),
+        PINMUX_DATA(SCIFA4_RXD_MARK, PORT35_FN2),
+        PINMUX_DATA(XWUP_MARK, PORT35_FN3),
+        PINMUX_DATA(XRTS1_MARK, PORT36_FN1),
+        PINMUX_DATA(SCIFA4_RTS_MARK, PORT36_FN2),
+        PINMUX_DATA(M03_BERCLK_MARK, PORT36_FN3),
+        PINMUX_DATA(XCTS1_MARK, PORT37_FN1),
+        PINMUX_DATA(SCIFA4_CTS_MARK, PORT37_FN2),
+
+        /* 49-2 (FN) */
+        PINMUX_DATA(HSU_IQ_AGC6_MARK, PORT38_FN1),
+        PINMUX_DATA(MFG2_IN2_MARK, PORT38_FN2),
+        PINMUX_DATA(MSIOF2_MCK0_MARK, PORT38_FN3),
+        PINMUX_DATA(HSU_IQ_AGC5_MARK, PORT39_FN1),
+        PINMUX_DATA(MFG2_IN1_MARK, PORT39_FN2),
+        PINMUX_DATA(MSIOF2_MCK1_MARK, PORT39_FN3),
+        PINMUX_DATA(HSU_IQ_AGC4_MARK, PORT40_FN1),
+        PINMUX_DATA(MSIOF2_RSYNC_MARK, PORT40_FN3),
+        PINMUX_DATA(HSU_IQ_AGC3_MARK, PORT41_FN1),
+        PINMUX_DATA(MFG2_OUT1_MARK, PORT41_FN2),
+        PINMUX_DATA(MSIOF2_RSCK_MARK, PORT41_FN3),
+        PINMUX_DATA(HSU_IQ_AGC2_MARK, PORT42_FN1),
+        PINMUX_DATA(PORT42_KEYOUT0_MARK, MSELBCR_MSEL2_1, PORT42_FN2),
+        PINMUX_DATA(HSU_IQ_AGC1_MARK, PORT43_FN1),
+        PINMUX_DATA(PORT43_KEYOUT1_MARK, MSELBCR_MSEL2_1, PORT43_FN2),
+        PINMUX_DATA(HSU_IQ_AGC0_MARK, PORT44_FN1),
+        PINMUX_DATA(PORT44_KEYOUT2_MARK, MSELBCR_MSEL2_1, PORT44_FN2),
+        PINMUX_DATA(HSU_IQ_AGC_ST_MARK, PORT45_FN1),
+        PINMUX_DATA(PORT45_KEYOUT3_MARK, MSELBCR_MSEL2_1, PORT45_FN2),
+        PINMUX_DATA(HSU_IQ_PDO_MARK, PORT46_FN1),
+        PINMUX_DATA(PORT46_KEYOUT4_MARK, MSELBCR_MSEL2_1, PORT46_FN2),
+        PINMUX_DATA(HSU_IQ_PYO_MARK, PORT47_FN1),
+        PINMUX_DATA(PORT47_KEYOUT5_MARK, MSELBCR_MSEL2_1, PORT47_FN2),
+        PINMUX_DATA(HSU_EN_TXMUX_G3MO_MARK, PORT48_FN1),
+        PINMUX_DATA(PORT48_KEYIN0_MARK, MSELBCR_MSEL2_1, PORT48_FN2),
+        PINMUX_DATA(HSU_I_TXMUX_G3MO_MARK, PORT49_FN1),
+        PINMUX_DATA(PORT49_KEYIN1_MARK, MSELBCR_MSEL2_1, PORT49_FN2),
+        PINMUX_DATA(HSU_Q_TXMUX_G3MO_MARK, PORT50_FN1),
+        PINMUX_DATA(PORT50_KEYIN2_MARK, MSELBCR_MSEL2_1, PORT50_FN2),
+        PINMUX_DATA(HSU_SYO_MARK, PORT51_FN1),
+        PINMUX_DATA(PORT51_MSIOF2_TSYNC_MARK, PORT51_FN2),
+        PINMUX_DATA(HSU_SDO_MARK, PORT52_FN1),
+        PINMUX_DATA(PORT52_MSIOF2_TSCK_MARK, PORT52_FN2),
+        PINMUX_DATA(HSU_TGTTI_G3MO_MARK, PORT53_FN1),
+        PINMUX_DATA(PORT53_MSIOF2_TXD_MARK, PORT53_FN2),
+        PINMUX_DATA(B_TIME_STAMP_MARK, PORT54_FN1),
+        PINMUX_DATA(PORT54_MSIOF2_RXD_MARK, PORT54_FN2),
+        PINMUX_DATA(HSU_SDI_MARK, PORT55_FN1),
+        PINMUX_DATA(PORT55_KEYIN3_MARK, MSELBCR_MSEL2_1, PORT55_FN2),
+        PINMUX_DATA(HSU_SCO_MARK, PORT56_FN1),
+        PINMUX_DATA(PORT56_KEYIN4_MARK, MSELBCR_MSEL2_1, PORT56_FN2),
+        PINMUX_DATA(HSU_DREQ_MARK, PORT57_FN1),
+        PINMUX_DATA(PORT57_KEYIN5_MARK, MSELBCR_MSEL2_1, PORT57_FN2),
+        PINMUX_DATA(HSU_DACK_MARK, PORT58_FN1),
+        PINMUX_DATA(PORT58_KEYIN6_MARK, MSELBCR_MSEL2_1, PORT58_FN2),
+        PINMUX_DATA(HSU_CLK61M_MARK, PORT59_FN1),
+        PINMUX_DATA(PORT59_MSIOF2_SS1_MARK, PORT59_FN2),
+        PINMUX_DATA(HSU_XRST_MARK, PORT60_FN1),
+        PINMUX_DATA(PORT60_MSIOF2_SS2_MARK, PORT60_FN2),
+        PINMUX_DATA(PCMCLKO_MARK, PORT61_FN1),
+        PINMUX_DATA(SYNC8KO_MARK, PORT62_FN1),
+        PINMUX_DATA(DNPCM_A_MARK, PORT63_FN1),
+        PINMUX_DATA(UPPCM_A_MARK, PORT64_FN1),
+        PINMUX_DATA(XTALB1L_MARK, PORT65_FN1),
+        PINMUX_DATA(GPS_AGC1_MARK, PORT66_FN1),
+        PINMUX_DATA(SCIFA0_RTS_MARK, PORT66_FN2),
+        PINMUX_DATA(GPS_AGC2_MARK, PORT67_FN1),
+        PINMUX_DATA(SCIFA0_SCK_MARK, PORT67_FN2),
+        PINMUX_DATA(GPS_AGC3_MARK, PORT68_FN1),
+        PINMUX_DATA(SCIFA0_TXD_MARK, PORT68_FN2),
+        PINMUX_DATA(GPS_AGC4_MARK, PORT69_FN1),
+        PINMUX_DATA(SCIFA0_RXD_MARK, PORT69_FN2),
+        PINMUX_DATA(GPS_PWRD_MARK, PORT70_FN1),
+        PINMUX_DATA(SCIFA0_CTS_MARK, PORT70_FN2),
+        PINMUX_DATA(GPS_IM_MARK, PORT71_FN1),
+        PINMUX_DATA(GPS_IS_MARK, PORT72_FN1),
+        PINMUX_DATA(GPS_QM_MARK, PORT73_FN1),
+        PINMUX_DATA(GPS_QS_MARK, PORT74_FN1),
+        PINMUX_DATA(SIUBOMC_MARK, PORT75_FN1),
+        PINMUX_DATA(TPU2TO0_MARK, PORT75_FN3),
+        PINMUX_DATA(SIUCKB_MARK, PORT76_FN1),
+        PINMUX_DATA(TPU2TO1_MARK, PORT76_FN3),
+        PINMUX_DATA(SIUBOLR_MARK, PORT77_FN1),
+        PINMUX_DATA(BBIF2_TSYNC_MARK, PORT77_FN2),
+        PINMUX_DATA(TPU2TO2_MARK, PORT77_FN3),
+        PINMUX_DATA(SIUBOBT_MARK, PORT78_FN1),
+        PINMUX_DATA(BBIF2_TSCK_MARK, PORT78_FN2),
+        PINMUX_DATA(TPU2TO3_MARK, PORT78_FN3),
+        PINMUX_DATA(SIUBOSLD_MARK, PORT79_FN1),
+        PINMUX_DATA(BBIF2_TXD_MARK, PORT79_FN2),
+        PINMUX_DATA(TPU3TO0_MARK, PORT79_FN3),
+        PINMUX_DATA(SIUBILR_MARK, PORT80_FN1),
+        PINMUX_DATA(TPU3TO1_MARK, PORT80_FN3),
+        PINMUX_DATA(SIUBIBT_MARK, PORT81_FN1),
+        PINMUX_DATA(TPU3TO2_MARK, PORT81_FN3),
+        PINMUX_DATA(SIUBISLD_MARK, PORT82_FN1),
+        PINMUX_DATA(TPU3TO3_MARK, PORT82_FN3),
+        PINMUX_DATA(NMI_MARK, PORT83_FN1),
+        PINMUX_DATA(TPU4TO0_MARK, PORT83_FN3),
+        PINMUX_DATA(DNPCM_M_MARK, PORT84_FN1),
+        PINMUX_DATA(TPU4TO1_MARK, PORT84_FN3),
+        PINMUX_DATA(TPU4TO2_MARK, PORT85_FN3),
+        PINMUX_DATA(TPU4TO3_MARK, PORT86_FN3),
+        PINMUX_DATA(IRQ_TMPB_MARK, PORT87_FN1),
+        PINMUX_DATA(PWEN_MARK, PORT88_FN1),
+        PINMUX_DATA(MFG1_OUT1_MARK, PORT88_FN2),
+        PINMUX_DATA(OVCN_MARK, PORT89_FN1),
+        PINMUX_DATA(MFG1_IN1_MARK, PORT89_FN2),
+        PINMUX_DATA(OVCN2_MARK, PORT90_FN1),
+        PINMUX_DATA(MFG1_IN2_MARK, PORT90_FN2),
+
+        /* 49-3 (FN) */
+        PINMUX_DATA(RFSPO1_MARK, PORT91_FN1),
+        PINMUX_DATA(RFSPO2_MARK, PORT92_FN1),
+        PINMUX_DATA(RFSPO3_MARK, PORT93_FN1),
+        PINMUX_DATA(PORT93_VIO_CKO2_MARK, PORT93_FN2),
+        PINMUX_DATA(USBTERM_MARK, PORT94_FN1),
+        PINMUX_DATA(EXTLP_MARK, PORT94_FN2),
+        PINMUX_DATA(IDIN_MARK, PORT95_FN1),
+        PINMUX_DATA(SCIFA5_CTS_MARK, PORT96_FN1),
+        PINMUX_DATA(MFG0_IN1_MARK, PORT96_FN2),
+        PINMUX_DATA(SCIFA5_RTS_MARK, PORT97_FN1),
+        PINMUX_DATA(MFG0_IN2_MARK, PORT97_FN2),
+        PINMUX_DATA(SCIFA5_RXD_MARK, PORT98_FN1),
+        PINMUX_DATA(SCIFA5_TXD_MARK, PORT99_FN1),
+        PINMUX_DATA(SCIFA5_SCK_MARK, PORT100_FN1),
+        PINMUX_DATA(MFG0_OUT1_MARK, PORT100_FN2),
+        PINMUX_DATA(A0_EA0_MARK, PORT101_FN1),
+        PINMUX_DATA(BS_MARK, PORT101_FN2),
+        PINMUX_DATA(A14_EA14_MARK, PORT102_FN1),
+        PINMUX_DATA(PORT102_KEYOUT0_MARK, MSELBCR_MSEL2_0, PORT102_FN2),
+        PINMUX_DATA(A15_EA15_MARK, PORT103_FN1),
+        PINMUX_DATA(PORT103_KEYOUT1_MARK, MSELBCR_MSEL2_0, PORT103_FN2),
+        PINMUX_DATA(DV_CLKOL_MARK, PORT103_FN3),
+        PINMUX_DATA(A16_EA16_MARK, PORT104_FN1),
+        PINMUX_DATA(PORT104_KEYOUT2_MARK, MSELBCR_MSEL2_0, PORT104_FN2),
+        PINMUX_DATA(DV_VSYNCL_MARK, PORT104_FN3),
+        PINMUX_DATA(MSIOF0_SS1_MARK, PORT104_FN4),
+        PINMUX_DATA(A17_EA17_MARK, PORT105_FN1),
+        PINMUX_DATA(PORT105_KEYOUT3_MARK, MSELBCR_MSEL2_0, PORT105_FN2),
+        PINMUX_DATA(DV_HSYNCL_MARK, PORT105_FN3),
+        PINMUX_DATA(MSIOF0_TSYNC_MARK, PORT105_FN4),
+        PINMUX_DATA(A18_EA18_MARK, PORT106_FN1),
+        PINMUX_DATA(PORT106_KEYOUT4_MARK, MSELBCR_MSEL2_0, PORT106_FN2),
+        PINMUX_DATA(DV_DL0_MARK, PORT106_FN3),
+        PINMUX_DATA(MSIOF0_TSCK_MARK, PORT106_FN4),
+        PINMUX_DATA(A19_EA19_MARK, PORT107_FN1),
+        PINMUX_DATA(PORT107_KEYOUT5_MARK, MSELBCR_MSEL2_0, PORT107_FN2),
+        PINMUX_DATA(DV_DL1_MARK, PORT107_FN3),
+        PINMUX_DATA(MSIOF0_TXD_MARK, PORT107_FN4),
+        PINMUX_DATA(A20_EA20_MARK, PORT108_FN1),
+        PINMUX_DATA(PORT108_KEYIN0_MARK, MSELBCR_MSEL2_0, PORT108_FN2),
+        PINMUX_DATA(DV_DL2_MARK, PORT108_FN3),
+        PINMUX_DATA(MSIOF0_RSCK_MARK, PORT108_FN4),
+        PINMUX_DATA(A21_EA21_MARK, PORT109_FN1),
+        PINMUX_DATA(PORT109_KEYIN1_MARK, MSELBCR_MSEL2_0, PORT109_FN2),
+        PINMUX_DATA(DV_DL3_MARK, PORT109_FN3),
+        PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT109_FN4),
+        PINMUX_DATA(A22_EA22_MARK, PORT110_FN1),
+        PINMUX_DATA(PORT110_KEYIN2_MARK, MSELBCR_MSEL2_0, PORT110_FN2),
+        PINMUX_DATA(DV_DL4_MARK, PORT110_FN3),
+        PINMUX_DATA(MSIOF0_MCK0_MARK, PORT110_FN4),
+        PINMUX_DATA(A23_EA23_MARK, PORT111_FN1),
+        PINMUX_DATA(PORT111_KEYIN3_MARK, MSELBCR_MSEL2_0, PORT111_FN2),
+        PINMUX_DATA(DV_DL5_MARK, PORT111_FN3),
+        PINMUX_DATA(MSIOF0_MCK1_MARK, PORT111_FN4),
+        PINMUX_DATA(A24_EA24_MARK, PORT112_FN1),
+        PINMUX_DATA(PORT112_KEYIN4_MARK, MSELBCR_MSEL2_0, PORT112_FN2),
+        PINMUX_DATA(DV_DL6_MARK, PORT112_FN3),
+        PINMUX_DATA(MSIOF0_RXD_MARK, PORT112_FN4),
+        PINMUX_DATA(A25_EA25_MARK, PORT113_FN1),
+        PINMUX_DATA(PORT113_KEYIN5_MARK, MSELBCR_MSEL2_0, PORT113_FN2),
+        PINMUX_DATA(DV_DL7_MARK, PORT113_FN3),
+        PINMUX_DATA(MSIOF0_SS2_MARK, PORT113_FN4),
+        PINMUX_DATA(A26_MARK, PORT114_FN1),
+        PINMUX_DATA(PORT113_KEYIN6_MARK, MSELBCR_MSEL2_0, PORT114_FN2),
+        PINMUX_DATA(DV_CLKIL_MARK, PORT114_FN3),
+        PINMUX_DATA(D0_ED0_NAF0_MARK, PORT115_FN1),
+        PINMUX_DATA(D1_ED1_NAF1_MARK, PORT116_FN1),
+        PINMUX_DATA(D2_ED2_NAF2_MARK, PORT117_FN1),
+        PINMUX_DATA(D3_ED3_NAF3_MARK, PORT118_FN1),
+        PINMUX_DATA(D4_ED4_NAF4_MARK, PORT119_FN1),
+        PINMUX_DATA(D5_ED5_NAF5_MARK, PORT120_FN1),
+        PINMUX_DATA(D6_ED6_NAF6_MARK, PORT121_FN1),
+        PINMUX_DATA(D7_ED7_NAF7_MARK, PORT122_FN1),
+        PINMUX_DATA(D8_ED8_NAF8_MARK, PORT123_FN1),
+        PINMUX_DATA(D9_ED9_NAF9_MARK, PORT124_FN1),
+        PINMUX_DATA(D10_ED10_NAF10_MARK, PORT125_FN1),
+        PINMUX_DATA(D11_ED11_NAF11_MARK, PORT126_FN1),
+        PINMUX_DATA(D12_ED12_NAF12_MARK, PORT127_FN1),
+        PINMUX_DATA(D13_ED13_NAF13_MARK, PORT128_FN1),
+        PINMUX_DATA(D14_ED14_NAF14_MARK, PORT129_FN1),
+        PINMUX_DATA(D15_ED15_NAF15_MARK, PORT130_FN1),
+        PINMUX_DATA(CS4_MARK, PORT131_FN1),
+        PINMUX_DATA(CS5A_MARK, PORT132_FN1),
+        PINMUX_DATA(CS5B_MARK, PORT133_FN1),
+        PINMUX_DATA(FCE1_MARK, PORT133_FN2),
+        PINMUX_DATA(CS6B_MARK, PORT134_FN1),
+        PINMUX_DATA(XCS2_MARK, PORT134_FN2),
+        PINMUX_DATA(FCE0_MARK, PORT135_FN1),
+        PINMUX_DATA(CS6A_MARK, PORT136_FN1),
+        PINMUX_DATA(DACK0_MARK, PORT136_FN2),
+        PINMUX_DATA(WAIT_MARK, PORT137_FN1),
+        PINMUX_DATA(DREQ0_MARK, PORT137_FN2),
+        PINMUX_DATA(RD_XRD_MARK, PORT138_FN1),
+        PINMUX_DATA(A27_MARK, PORT139_FN1),
+        PINMUX_DATA(RDWR_XWE_MARK, PORT139_FN2),
+        PINMUX_DATA(WE0_XWR0_FWE_MARK, PORT140_FN1),
+        PINMUX_DATA(WE1_XWR1_MARK, PORT141_FN1),
+        PINMUX_DATA(FRB_MARK, PORT142_FN1),
+        PINMUX_DATA(CKO_MARK, PORT143_FN1),
+        PINMUX_DATA(NBRSTOUT_MARK, PORT144_FN1),
+        PINMUX_DATA(NBRST_MARK, PORT145_FN1),
+
+        /* 49-4 (FN) */
+        PINMUX_DATA(RFSPO0_MARK, PORT146_FN1),
+        PINMUX_DATA(PORT146_VIO_CKO2_MARK, PORT146_FN2),
+        PINMUX_DATA(TSTMD_MARK, PORT147_FN1),
+        PINMUX_DATA(VIO_VD_MARK, PORT148_FN1),
+        PINMUX_DATA(VIO_HD_MARK, PORT149_FN1),
+        PINMUX_DATA(VIO_D0_MARK, PORT150_FN1),
+        PINMUX_DATA(VIO_D1_MARK, PORT151_FN1),
+        PINMUX_DATA(VIO_D2_MARK, PORT152_FN1),
+        PINMUX_DATA(VIO_D3_MARK, PORT153_FN1),
+        PINMUX_DATA(VIO_D4_MARK, PORT154_FN1),
+        PINMUX_DATA(VIO_D5_MARK, PORT155_FN1),
+        PINMUX_DATA(VIO_D6_MARK, PORT156_FN1),
+        PINMUX_DATA(VIO_D7_MARK, PORT157_FN1),
+        PINMUX_DATA(VIO_D8_MARK, PORT158_FN1),
+        PINMUX_DATA(VIO_D9_MARK, PORT159_FN1),
+        PINMUX_DATA(VIO_D10_MARK, PORT160_FN1),
+        PINMUX_DATA(VIO_D11_MARK, PORT161_FN1),
+        PINMUX_DATA(VIO_D12_MARK, PORT162_FN1),
+        PINMUX_DATA(VIO_D13_MARK, PORT163_FN1),
+        PINMUX_DATA(VIO_D14_MARK, PORT164_FN1),
+        PINMUX_DATA(VIO_D15_MARK, PORT165_FN1),
+        PINMUX_DATA(VIO_CLK_MARK, PORT166_FN1),
+        PINMUX_DATA(VIO_FIELD_MARK, PORT167_FN1),
+        PINMUX_DATA(VIO_CKO_MARK, PORT168_FN1),
+        PINMUX_DATA(MFG3_IN1_MARK, PORT169_FN2),
+        PINMUX_DATA(MFG3_IN2_MARK, PORT170_FN2),
+        PINMUX_DATA(M9_SLCD_A01_MARK, PORT171_FN1),
+        PINMUX_DATA(MFG3_OUT1_MARK, PORT171_FN2),
+        PINMUX_DATA(TPU0TO0_MARK, PORT171_FN3),
+        PINMUX_DATA(M10_SLCD_CK1_MARK, PORT172_FN1),
+        PINMUX_DATA(MFG4_IN1_MARK, PORT172_FN2),
+        PINMUX_DATA(TPU0TO1_MARK, PORT172_FN3),
+        PINMUX_DATA(M11_SLCD_SO1_MARK, PORT173_FN1),
+        PINMUX_DATA(MFG4_IN2_MARK, PORT173_FN2),
+        PINMUX_DATA(TPU0TO2_MARK, PORT173_FN3),
+        PINMUX_DATA(M12_SLCD_CE1_MARK, PORT174_FN1),
+        PINMUX_DATA(MFG4_OUT1_MARK, PORT174_FN2),
+        PINMUX_DATA(TPU0TO3_MARK, PORT174_FN3),
+        PINMUX_DATA(LCDD0_MARK, PORT175_FN1),
+        PINMUX_DATA(PORT175_KEYOUT0_MARK, PORT175_FN2),
+        PINMUX_DATA(DV_D0_MARK, PORT175_FN3),
+        PINMUX_DATA(SIUCKA_MARK, PORT175_FN4),
+        PINMUX_DATA(MFG0_OUT2_MARK, PORT175_FN5),
+        PINMUX_DATA(LCDD1_MARK, PORT176_FN1),
+        PINMUX_DATA(PORT176_KEYOUT1_MARK, PORT176_FN2),
+        PINMUX_DATA(DV_D1_MARK, PORT176_FN3),
+        PINMUX_DATA(SIUAOLR_MARK, PORT176_FN4),
+        PINMUX_DATA(BBIF2_TSYNC1_MARK, PORT176_FN5),
+        PINMUX_DATA(LCDD2_MARK, PORT177_FN1),
+        PINMUX_DATA(PORT177_KEYOUT2_MARK, PORT177_FN2),
+        PINMUX_DATA(DV_D2_MARK, PORT177_FN3),
+        PINMUX_DATA(SIUAOBT_MARK, PORT177_FN4),
+        PINMUX_DATA(BBIF2_TSCK1_MARK, PORT177_FN5),
+        PINMUX_DATA(LCDD3_MARK, PORT178_FN1),
+        PINMUX_DATA(PORT178_KEYOUT3_MARK, PORT178_FN2),
+        PINMUX_DATA(DV_D3_MARK, PORT178_FN3),
+        PINMUX_DATA(SIUAOSLD_MARK, PORT178_FN4),
+        PINMUX_DATA(BBIF2_TXD1_MARK, PORT178_FN5),
+        PINMUX_DATA(LCDD4_MARK, PORT179_FN1),
+        PINMUX_DATA(PORT179_KEYOUT4_MARK, PORT179_FN2),
+        PINMUX_DATA(DV_D4_MARK, PORT179_FN3),
+        PINMUX_DATA(SIUAISPD_MARK, PORT179_FN4),
+        PINMUX_DATA(MFG1_OUT2_MARK, PORT179_FN5),
+        PINMUX_DATA(LCDD5_MARK, PORT180_FN1),
+        PINMUX_DATA(PORT180_KEYOUT5_MARK, PORT180_FN2),
+        PINMUX_DATA(DV_D5_MARK, PORT180_FN3),
+        PINMUX_DATA(SIUAILR_MARK, PORT180_FN4),
+        PINMUX_DATA(MFG2_OUT2_MARK, PORT180_FN5),
+        PINMUX_DATA(LCDD6_MARK, PORT181_FN1),
+        PINMUX_DATA(DV_D6_MARK, PORT181_FN3),
+        PINMUX_DATA(SIUAIBT_MARK, PORT181_FN4),
+        PINMUX_DATA(MFG3_OUT2_MARK, PORT181_FN5),
+        PINMUX_DATA(XWR2_MARK, PORT181_FN7),
+        PINMUX_DATA(LCDD7_MARK, PORT182_FN1),
+        PINMUX_DATA(DV_D7_MARK, PORT182_FN3),
+        PINMUX_DATA(SIUAISLD_MARK, PORT182_FN4),
+        PINMUX_DATA(MFG4_OUT2_MARK, PORT182_FN5),
+        PINMUX_DATA(XWR3_MARK, PORT182_FN7),
+        PINMUX_DATA(LCDD8_MARK, PORT183_FN1),
+        PINMUX_DATA(DV_D8_MARK, PORT183_FN3),
+        PINMUX_DATA(D16_MARK, PORT183_FN6),
+        PINMUX_DATA(ED16_MARK, PORT183_FN7),
+        PINMUX_DATA(LCDD9_MARK, PORT184_FN1),
+        PINMUX_DATA(DV_D9_MARK, PORT184_FN3),
+        PINMUX_DATA(D17_MARK, PORT184_FN6),
+        PINMUX_DATA(ED17_MARK, PORT184_FN7),
+        PINMUX_DATA(LCDD10_MARK, PORT185_FN1),
+        PINMUX_DATA(DV_D10_MARK, PORT185_FN3),
+        PINMUX_DATA(D18_MARK, PORT185_FN6),
+        PINMUX_DATA(ED18_MARK, PORT185_FN7),
+        PINMUX_DATA(LCDD11_MARK, PORT186_FN1),
+        PINMUX_DATA(DV_D11_MARK, PORT186_FN3),
+        PINMUX_DATA(D19_MARK, PORT186_FN6),
+        PINMUX_DATA(ED19_MARK, PORT186_FN7),
+        PINMUX_DATA(LCDD12_MARK, PORT187_FN1),
+        PINMUX_DATA(DV_D12_MARK, PORT187_FN3),
+        PINMUX_DATA(D20_MARK, PORT187_FN6),
+        PINMUX_DATA(ED20_MARK, PORT187_FN7),
+        PINMUX_DATA(LCDD13_MARK, PORT188_FN1),
+        PINMUX_DATA(DV_D13_MARK, PORT188_FN3),
+        PINMUX_DATA(D21_MARK, PORT188_FN6),
+        PINMUX_DATA(ED21_MARK, PORT188_FN7),
+        PINMUX_DATA(LCDD14_MARK, PORT189_FN1),
+        PINMUX_DATA(DV_D14_MARK, PORT189_FN3),
+        PINMUX_DATA(D22_MARK, PORT189_FN6),
+        PINMUX_DATA(ED22_MARK, PORT189_FN7),
+        PINMUX_DATA(LCDD15_MARK, PORT190_FN1),
+        PINMUX_DATA(DV_D15_MARK, PORT190_FN3),
+        PINMUX_DATA(D23_MARK, PORT190_FN6),
+        PINMUX_DATA(ED23_MARK, PORT190_FN7),
+        PINMUX_DATA(LCDD16_MARK, PORT191_FN1),
+        PINMUX_DATA(DV_HSYNC_MARK, PORT191_FN3),
+        PINMUX_DATA(D24_MARK, PORT191_FN6),
+        PINMUX_DATA(ED24_MARK, PORT191_FN7),
+        PINMUX_DATA(LCDD17_MARK, PORT192_FN1),
+        PINMUX_DATA(DV_VSYNC_MARK, PORT192_FN3),
+        PINMUX_DATA(D25_MARK, PORT192_FN6),
+        PINMUX_DATA(ED25_MARK, PORT192_FN7),
+        PINMUX_DATA(LCDD18_MARK, PORT193_FN1),
+        PINMUX_DATA(DREQ2_MARK, PORT193_FN2),
+        PINMUX_DATA(MSIOF0L_TSCK_MARK, PORT193_FN5),
+        PINMUX_DATA(D26_MARK, PORT193_FN6),
+        PINMUX_DATA(ED26_MARK, PORT193_FN7),
+        PINMUX_DATA(LCDD19_MARK, PORT194_FN1),
+        PINMUX_DATA(MSIOF0L_TSYNC_MARK, PORT194_FN5),
+        PINMUX_DATA(D27_MARK, PORT194_FN6),
+        PINMUX_DATA(ED27_MARK, PORT194_FN7),
+        PINMUX_DATA(LCDD20_MARK, PORT195_FN1),
+        PINMUX_DATA(TS_SPSYNC1_MARK, PORT195_FN2),
+        PINMUX_DATA(MSIOF0L_MCK0_MARK, PORT195_FN5),
+        PINMUX_DATA(D28_MARK, PORT195_FN6),
+        PINMUX_DATA(ED28_MARK, PORT195_FN7),
+        PINMUX_DATA(LCDD21_MARK, PORT196_FN1),
+        PINMUX_DATA(TS_SDAT1_MARK, PORT196_FN2),
+        PINMUX_DATA(MSIOF0L_MCK1_MARK, PORT196_FN5),
+        PINMUX_DATA(D29_MARK, PORT196_FN6),
+        PINMUX_DATA(ED29_MARK, PORT196_FN7),
+        PINMUX_DATA(LCDD22_MARK, PORT197_FN1),
+        PINMUX_DATA(TS_SDEN1_MARK, PORT197_FN2),
+        PINMUX_DATA(MSIOF0L_SS1_MARK, PORT197_FN5),
+        PINMUX_DATA(D30_MARK, PORT197_FN6),
+        PINMUX_DATA(ED30_MARK, PORT197_FN7),
+        PINMUX_DATA(LCDD23_MARK, PORT198_FN1),
+        PINMUX_DATA(TS_SCK1_MARK, PORT198_FN2),
+        PINMUX_DATA(MSIOF0L_SS2_MARK, PORT198_FN5),
+        PINMUX_DATA(D31_MARK, PORT198_FN6),
+        PINMUX_DATA(ED31_MARK, PORT198_FN7),
+        PINMUX_DATA(LCDDCK_MARK, PORT199_FN1),
+        PINMUX_DATA(LCDWR_MARK, PORT199_FN2),
+        PINMUX_DATA(DV_CKO_MARK, PORT199_FN3),
+        PINMUX_DATA(SIUAOSPD_MARK, PORT199_FN4),
+        PINMUX_DATA(LCDRD_MARK, PORT200_FN1),
+        PINMUX_DATA(DACK2_MARK, PORT200_FN2),
+        PINMUX_DATA(MSIOF0L_RSYNC_MARK, PORT200_FN5),
+
+        /* 49-5 (FN) */
+        PINMUX_DATA(LCDHSYN_MARK, PORT201_FN1),
+        PINMUX_DATA(LCDCS_MARK, PORT201_FN2),
+        PINMUX_DATA(LCDCS2_MARK, PORT201_FN3),
+        PINMUX_DATA(DACK3_MARK, PORT201_FN4),
+        PINMUX_DATA(LCDDISP_MARK, PORT202_FN1),
+        PINMUX_DATA(LCDRS_MARK, PORT202_FN2),
+        PINMUX_DATA(DREQ3_MARK, PORT202_FN4),
+        PINMUX_DATA(MSIOF0L_RSCK_MARK, PORT202_FN5),
+        PINMUX_DATA(LCDCSYN_MARK, PORT203_FN1),
+        PINMUX_DATA(LCDCSYN2_MARK, PORT203_FN2),
+        PINMUX_DATA(DV_CKI_MARK, PORT203_FN3),
+        PINMUX_DATA(LCDLCLK_MARK, PORT204_FN1),
+        PINMUX_DATA(DREQ1_MARK, PORT204_FN3),
+        PINMUX_DATA(MSIOF0L_RXD_MARK, PORT204_FN5),
+        PINMUX_DATA(LCDDON_MARK, PORT205_FN1),
+        PINMUX_DATA(LCDDON2_MARK, PORT205_FN2),
+        PINMUX_DATA(DACK1_MARK, PORT205_FN3),
+        PINMUX_DATA(MSIOF0L_TXD_MARK, PORT205_FN5),
+        PINMUX_DATA(VIO_DR0_MARK, PORT206_FN1),
+        PINMUX_DATA(VIO_DR1_MARK, PORT207_FN1),
+        PINMUX_DATA(VIO_DR2_MARK, PORT208_FN1),
+        PINMUX_DATA(VIO_DR3_MARK, PORT209_FN1),
+        PINMUX_DATA(VIO_DR4_MARK, PORT210_FN1),
+        PINMUX_DATA(VIO_DR5_MARK, PORT211_FN1),
+        PINMUX_DATA(VIO_DR6_MARK, PORT212_FN1),
+        PINMUX_DATA(VIO_DR7_MARK, PORT213_FN1),
+        PINMUX_DATA(VIO_VDR_MARK, PORT214_FN1),
+        PINMUX_DATA(VIO_HDR_MARK, PORT215_FN1),
+        PINMUX_DATA(VIO_CLKR_MARK, PORT216_FN1),
+        PINMUX_DATA(VIO_CKOR_MARK, PORT217_FN1),
+        PINMUX_DATA(SCIFA1_TXD_MARK, PORT220_FN2),
+        PINMUX_DATA(GPS_PGFA0_MARK, PORT220_FN3),
+        PINMUX_DATA(SCIFA1_SCK_MARK, PORT221_FN2),
+        PINMUX_DATA(GPS_PGFA1_MARK, PORT221_FN3),
+        PINMUX_DATA(SCIFA1_RTS_MARK, PORT222_FN2),
+        PINMUX_DATA(GPS_EPPSINMON_MARK, PORT222_FN3),
+        PINMUX_DATA(SCIFA1_RXD_MARK, PORT223_FN2),
+        PINMUX_DATA(SCIFA1_CTS_MARK, PORT224_FN2),
+        PINMUX_DATA(MSIOF1_TXD_MARK, PORT225_FN1),
+        PINMUX_DATA(SCIFA1_TXD2_MARK, PORT225_FN2),
+        PINMUX_DATA(GPS_TXD_MARK, PORT225_FN3),
+        PINMUX_DATA(MSIOF1_TSYNC_MARK, PORT226_FN1),
+        PINMUX_DATA(SCIFA1_CTS2_MARK, PORT226_FN2),
+        PINMUX_DATA(I2C_SDA2_MARK, PORT226_FN3),
+        PINMUX_DATA(MSIOF1_TSCK_MARK, PORT227_FN1),
+        PINMUX_DATA(SCIFA1_SCK2_MARK, PORT227_FN2),
+        PINMUX_DATA(MSIOF1_RXD_MARK, PORT228_FN1),
+        PINMUX_DATA(SCIFA1_RXD2_MARK, PORT228_FN2),
+        PINMUX_DATA(GPS_RXD_MARK, PORT228_FN3),
+        PINMUX_DATA(MSIOF1_RSCK_MARK, PORT229_FN1),
+        PINMUX_DATA(SCIFA1_RTS2_MARK, PORT229_FN2),
+        PINMUX_DATA(MSIOF1_RSYNC_MARK, PORT230_FN1),
+        PINMUX_DATA(I2C_SCL2_MARK, PORT230_FN3),
+        PINMUX_DATA(MSIOF1_MCK0_MARK, PORT231_FN1),
+        PINMUX_DATA(MSIOF1_MCK1_MARK, PORT232_FN1),
+        PINMUX_DATA(MSIOF1_SS1_MARK, PORT233_FN1),
+        PINMUX_DATA(EDBGREQ3_MARK, PORT233_FN2),
+        PINMUX_DATA(MSIOF1_SS2_MARK, PORT234_FN1),
+        PINMUX_DATA(PORT236_IROUT_MARK, PORT236_FN1),
+        PINMUX_DATA(IRDA_OUT_MARK, PORT236_FN2),
+        PINMUX_DATA(IRDA_IN_MARK, PORT237_FN2),
+        PINMUX_DATA(IRDA_FIRSEL_MARK, PORT238_FN1),
+        PINMUX_DATA(TPU1TO0_MARK, PORT239_FN3),
+        PINMUX_DATA(TS_SPSYNC3_MARK, PORT239_FN4),
+        PINMUX_DATA(TPU1TO1_MARK, PORT240_FN3),
+        PINMUX_DATA(TS_SDAT3_MARK, PORT240_FN4),
+        PINMUX_DATA(TPU1TO2_MARK, PORT241_FN3),
+        PINMUX_DATA(TS_SDEN3_MARK, PORT241_FN4),
+        PINMUX_DATA(PORT241_MSIOF2_SS1_MARK, PORT241_FN5),
+        PINMUX_DATA(TPU1TO3_MARK, PORT242_FN3),
+        PINMUX_DATA(PORT242_MSIOF2_TSCK_MARK, PORT242_FN5),
+        PINMUX_DATA(M13_BSW_MARK, PORT243_FN2),
+        PINMUX_DATA(PORT243_MSIOF2_TSYNC_MARK, PORT243_FN5),
+        PINMUX_DATA(M14_GSW_MARK, PORT244_FN2),
+        PINMUX_DATA(PORT244_MSIOF2_TXD_MARK, PORT244_FN5),
+        PINMUX_DATA(PORT245_IROUT_MARK, PORT245_FN1),
+        PINMUX_DATA(M15_RSW_MARK, PORT245_FN2),
+        PINMUX_DATA(SOUT3_MARK, PORT246_FN1),
+        PINMUX_DATA(SCIFA2_TXD1_MARK, PORT246_FN2),
+        PINMUX_DATA(SIN3_MARK, PORT247_FN1),
+        PINMUX_DATA(SCIFA2_RXD1_MARK, PORT247_FN2),
+        PINMUX_DATA(XRTS3_MARK, PORT248_FN1),
+        PINMUX_DATA(SCIFA2_RTS1_MARK, PORT248_FN2),
+        PINMUX_DATA(PORT248_MSIOF2_SS2_MARK, PORT248_FN5),
+        PINMUX_DATA(XCTS3_MARK, PORT249_FN1),
+        PINMUX_DATA(SCIFA2_CTS1_MARK, PORT249_FN2),
+        PINMUX_DATA(PORT249_MSIOF2_RXD_MARK, PORT249_FN5),
+        PINMUX_DATA(DINT_MARK, PORT250_FN1),
+        PINMUX_DATA(SCIFA2_SCK1_MARK, PORT250_FN2),
+        PINMUX_DATA(TS_SCK3_MARK, PORT250_FN4),
+        PINMUX_DATA(SDHICLK0_MARK, PORT251_FN1),
+        PINMUX_DATA(TCK2_MARK, PORT251_FN2),
+        PINMUX_DATA(SDHICD0_MARK, PORT252_FN1),
+        PINMUX_DATA(SDHID0_0_MARK, PORT253_FN1),
+        PINMUX_DATA(TMS2_MARK, PORT253_FN2),
+        PINMUX_DATA(SDHID0_1_MARK, PORT254_FN1),
+        PINMUX_DATA(TDO2_MARK, PORT254_FN2),
+        PINMUX_DATA(SDHID0_2_MARK, PORT255_FN1),
+        PINMUX_DATA(TDI2_MARK, PORT255_FN2),
+        PINMUX_DATA(SDHID0_3_MARK, PORT256_FN1),
+        PINMUX_DATA(RTCK2_MARK, PORT256_FN2),
+
+        /* 49-6 (FN) */
+        PINMUX_DATA(SDHICMD0_MARK, PORT257_FN1),
+        PINMUX_DATA(TRST2_MARK, PORT257_FN2),
+        PINMUX_DATA(SDHIWP0_MARK, PORT258_FN1),
+        PINMUX_DATA(EDBGREQ2_MARK, PORT258_FN2),
+        PINMUX_DATA(SDHICLK1_MARK, PORT259_FN1),
+        PINMUX_DATA(TCK3_MARK, PORT259_FN4),
+        PINMUX_DATA(SDHID1_0_MARK, PORT260_FN1),
+        PINMUX_DATA(M11_SLCD_SO2_MARK, PORT260_FN2),
+        PINMUX_DATA(TS_SPSYNC2_MARK, PORT260_FN3),
+        PINMUX_DATA(TMS3_MARK, PORT260_FN4),
+        PINMUX_DATA(SDHID1_1_MARK, PORT261_FN1),
+        PINMUX_DATA(M9_SLCD_AO2_MARK, PORT261_FN2),
+        PINMUX_DATA(TS_SDAT2_MARK, PORT261_FN3),
+        PINMUX_DATA(TDO3_MARK, PORT261_FN4),
+        PINMUX_DATA(SDHID1_2_MARK, PORT262_FN1),
+        PINMUX_DATA(M10_SLCD_CK2_MARK, PORT262_FN2),
+        PINMUX_DATA(TS_SDEN2_MARK, PORT262_FN3),
+        PINMUX_DATA(TDI3_MARK, PORT262_FN4),
+        PINMUX_DATA(SDHID1_3_MARK, PORT263_FN1),
+        PINMUX_DATA(M12_SLCD_CE2_MARK, PORT263_FN2),
+        PINMUX_DATA(TS_SCK2_MARK, PORT263_FN3),
+        PINMUX_DATA(RTCK3_MARK, PORT263_FN4),
+        PINMUX_DATA(SDHICMD1_MARK, PORT264_FN1),
+        PINMUX_DATA(TRST3_MARK, PORT264_FN4),
+        PINMUX_DATA(SDHICLK2_MARK, PORT265_FN1),
+        PINMUX_DATA(SCIFB_SCK_MARK, PORT265_FN2),
+        PINMUX_DATA(SDHID2_0_MARK, PORT266_FN1),
+        PINMUX_DATA(SCIFB_TXD_MARK, PORT266_FN2),
+        PINMUX_DATA(SDHID2_1_MARK, PORT267_FN1),
+        PINMUX_DATA(SCIFB_CTS_MARK, PORT267_FN2),
+        PINMUX_DATA(SDHID2_2_MARK, PORT268_FN1),
+        PINMUX_DATA(SCIFB_RXD_MARK, PORT268_FN2),
+        PINMUX_DATA(SDHID2_3_MARK, PORT269_FN1),
+        PINMUX_DATA(SCIFB_RTS_MARK, PORT269_FN2),
+        PINMUX_DATA(SDHICMD2_MARK, PORT270_FN1),
+        PINMUX_DATA(RESETOUTS_MARK, PORT271_FN1),
+        PINMUX_DATA(DIVLOCK_MARK, PORT272_FN1),
+};
+
+#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
+#define GPIO_PORT_273() _273(_GPIO_PORT, , unused)
+#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
+
+static struct pinmux_gpio pinmux_gpios[] = {
+        /* 49-1 -> 49-6 (GPIO) */
+        GPIO_PORT_273(),
+
+        /* Special Pull-up / Pull-down Functions */
+        GPIO_FN(PORT48_KEYIN0_PU), GPIO_FN(PORT49_KEYIN1_PU),
+        GPIO_FN(PORT50_KEYIN2_PU), GPIO_FN(PORT55_KEYIN3_PU),
+        GPIO_FN(PORT56_KEYIN4_PU), GPIO_FN(PORT57_KEYIN5_PU),
+        GPIO_FN(PORT58_KEYIN6_PU),
+
+        /* 49-1 (FN) */
+        GPIO_FN(VBUS0), GPIO_FN(CPORT0), GPIO_FN(CPORT1), GPIO_FN(CPORT2),
+        GPIO_FN(CPORT3), GPIO_FN(CPORT4), GPIO_FN(CPORT5), GPIO_FN(CPORT6),
+        GPIO_FN(CPORT7), GPIO_FN(CPORT8), GPIO_FN(CPORT9), GPIO_FN(CPORT10),
+        GPIO_FN(CPORT11), GPIO_FN(SIN2), GPIO_FN(CPORT12), GPIO_FN(XCTS2),
+        GPIO_FN(CPORT13), GPIO_FN(RFSPO4), GPIO_FN(CPORT14), GPIO_FN(RFSPO5),
+        GPIO_FN(CPORT15), GPIO_FN(CPORT16), GPIO_FN(CPORT17), GPIO_FN(SOUT2),
+        GPIO_FN(CPORT18), GPIO_FN(XRTS2), GPIO_FN(CPORT19), GPIO_FN(CPORT20),
+        GPIO_FN(RFSPO6), GPIO_FN(CPORT21), GPIO_FN(STATUS0), GPIO_FN(CPORT22),
+        GPIO_FN(STATUS1), GPIO_FN(CPORT23), GPIO_FN(STATUS2), GPIO_FN(RFSPO7),
+        GPIO_FN(MPORT0), GPIO_FN(MPORT1), GPIO_FN(B_SYNLD1), GPIO_FN(B_SYNLD2),
+        GPIO_FN(XMAINPS), GPIO_FN(XDIVPS), GPIO_FN(XIDRST), GPIO_FN(IDCLK),
+        GPIO_FN(IDIO), GPIO_FN(SOUT1), GPIO_FN(SCIFA4_TXD),
+        GPIO_FN(M02_BERDAT), GPIO_FN(SIN1), GPIO_FN(SCIFA4_RXD), GPIO_FN(XWUP),
+        GPIO_FN(XRTS1), GPIO_FN(SCIFA4_RTS), GPIO_FN(M03_BERCLK),
+        GPIO_FN(XCTS1), GPIO_FN(SCIFA4_CTS),
+
+        /* 49-2 (FN) */
+        GPIO_FN(HSU_IQ_AGC6), GPIO_FN(MFG2_IN2), GPIO_FN(MSIOF2_MCK0),
+        GPIO_FN(HSU_IQ_AGC5), GPIO_FN(MFG2_IN1), GPIO_FN(MSIOF2_MCK1),
+        GPIO_FN(HSU_IQ_AGC4), GPIO_FN(MSIOF2_RSYNC),
+        GPIO_FN(HSU_IQ_AGC3), GPIO_FN(MFG2_OUT1), GPIO_FN(MSIOF2_RSCK),
+        GPIO_FN(HSU_IQ_AGC2), GPIO_FN(PORT42_KEYOUT0),
+        GPIO_FN(HSU_IQ_AGC1), GPIO_FN(PORT43_KEYOUT1),
+        GPIO_FN(HSU_IQ_AGC0), GPIO_FN(PORT44_KEYOUT2),
+        GPIO_FN(HSU_IQ_AGC_ST), GPIO_FN(PORT45_KEYOUT3),
+        GPIO_FN(HSU_IQ_PDO), GPIO_FN(PORT46_KEYOUT4),
+        GPIO_FN(HSU_IQ_PYO), GPIO_FN(PORT47_KEYOUT5),
+        GPIO_FN(HSU_EN_TXMUX_G3MO), GPIO_FN(PORT48_KEYIN0),
+        GPIO_FN(HSU_I_TXMUX_G3MO), GPIO_FN(PORT49_KEYIN1),
+        GPIO_FN(HSU_Q_TXMUX_G3MO), GPIO_FN(PORT50_KEYIN2),
+        GPIO_FN(HSU_SYO), GPIO_FN(PORT51_MSIOF2_TSYNC),
+        GPIO_FN(HSU_SDO), GPIO_FN(PORT52_MSIOF2_TSCK),
+        GPIO_FN(HSU_TGTTI_G3MO), GPIO_FN(PORT53_MSIOF2_TXD),
+        GPIO_FN(B_TIME_STAMP), GPIO_FN(PORT54_MSIOF2_RXD),
+        GPIO_FN(HSU_SDI), GPIO_FN(PORT55_KEYIN3),
+        GPIO_FN(HSU_SCO), GPIO_FN(PORT56_KEYIN4),
+        GPIO_FN(HSU_DREQ), GPIO_FN(PORT57_KEYIN5),
+        GPIO_FN(HSU_DACK), GPIO_FN(PORT58_KEYIN6),
+        GPIO_FN(HSU_CLK61M), GPIO_FN(PORT59_MSIOF2_SS1),
+        GPIO_FN(HSU_XRST), GPIO_FN(PORT60_MSIOF2_SS2),
+        GPIO_FN(PCMCLKO), GPIO_FN(SYNC8KO), GPIO_FN(DNPCM_A), GPIO_FN(UPPCM_A),
+        GPIO_FN(XTALB1L),
+        GPIO_FN(GPS_AGC1), GPIO_FN(SCIFA0_RTS),
+        GPIO_FN(GPS_AGC2), GPIO_FN(SCIFA0_SCK),
+        GPIO_FN(GPS_AGC3), GPIO_FN(SCIFA0_TXD),
+        GPIO_FN(GPS_AGC4), GPIO_FN(SCIFA0_RXD),
+        GPIO_FN(GPS_PWRD), GPIO_FN(SCIFA0_CTS),
+        GPIO_FN(GPS_IM), GPIO_FN(GPS_IS), GPIO_FN(GPS_QM), GPIO_FN(GPS_QS),
+        GPIO_FN(SIUBOMC), GPIO_FN(TPU2TO0),
+        GPIO_FN(SIUCKB), GPIO_FN(TPU2TO1),
+        GPIO_FN(SIUBOLR), GPIO_FN(BBIF2_TSYNC), GPIO_FN(TPU2TO2),
+        GPIO_FN(SIUBOBT), GPIO_FN(BBIF2_TSCK), GPIO_FN(TPU2TO3),
+        GPIO_FN(SIUBOSLD), GPIO_FN(BBIF2_TXD), GPIO_FN(TPU3TO0),
+        GPIO_FN(SIUBILR), GPIO_FN(TPU3TO1),
+        GPIO_FN(SIUBIBT), GPIO_FN(TPU3TO2),
+        GPIO_FN(SIUBISLD), GPIO_FN(TPU3TO3),
+        GPIO_FN(NMI), GPIO_FN(TPU4TO0),
+        GPIO_FN(DNPCM_M), GPIO_FN(TPU4TO1), GPIO_FN(TPU4TO2), GPIO_FN(TPU4TO3),
+        GPIO_FN(IRQ_TMPB),
+        GPIO_FN(PWEN), GPIO_FN(MFG1_OUT1),
+        GPIO_FN(OVCN), GPIO_FN(MFG1_IN1),
+        GPIO_FN(OVCN2), GPIO_FN(MFG1_IN2),
+
+        /* 49-3 (FN) */
+        GPIO_FN(RFSPO1), GPIO_FN(RFSPO2), GPIO_FN(RFSPO3),
+        GPIO_FN(PORT93_VIO_CKO2),
+        GPIO_FN(USBTERM), GPIO_FN(EXTLP), GPIO_FN(IDIN),
+        GPIO_FN(SCIFA5_CTS), GPIO_FN(MFG0_IN1),
+        GPIO_FN(SCIFA5_RTS), GPIO_FN(MFG0_IN2),
+        GPIO_FN(SCIFA5_RXD),
+        GPIO_FN(SCIFA5_TXD),
+        GPIO_FN(SCIFA5_SCK), GPIO_FN(MFG0_OUT1),
+        GPIO_FN(A0_EA0), GPIO_FN(BS),
+        GPIO_FN(A14_EA14), GPIO_FN(PORT102_KEYOUT0),
+        GPIO_FN(A15_EA15), GPIO_FN(PORT103_KEYOUT1), GPIO_FN(DV_CLKOL),
+        GPIO_FN(A16_EA16), GPIO_FN(PORT104_KEYOUT2),
+        GPIO_FN(DV_VSYNCL), GPIO_FN(MSIOF0_SS1),
+        GPIO_FN(A17_EA17), GPIO_FN(PORT105_KEYOUT3),
+        GPIO_FN(DV_HSYNCL), GPIO_FN(MSIOF0_TSYNC),
+        GPIO_FN(A18_EA18), GPIO_FN(PORT106_KEYOUT4),
+        GPIO_FN(DV_DL0), GPIO_FN(MSIOF0_TSCK),
+        GPIO_FN(A19_EA19), GPIO_FN(PORT107_KEYOUT5),
+        GPIO_FN(DV_DL1), GPIO_FN(MSIOF0_TXD),
+        GPIO_FN(A20_EA20), GPIO_FN(PORT108_KEYIN0),
+        GPIO_FN(DV_DL2), GPIO_FN(MSIOF0_RSCK),
+        GPIO_FN(A21_EA21), GPIO_FN(PORT109_KEYIN1),
+        GPIO_FN(DV_DL3), GPIO_FN(MSIOF0_RSYNC),
+        GPIO_FN(A22_EA22), GPIO_FN(PORT110_KEYIN2),
+        GPIO_FN(DV_DL4), GPIO_FN(MSIOF0_MCK0),
+        GPIO_FN(A23_EA23), GPIO_FN(PORT111_KEYIN3),
+        GPIO_FN(DV_DL5), GPIO_FN(MSIOF0_MCK1),
+        GPIO_FN(A24_EA24), GPIO_FN(PORT112_KEYIN4),
+        GPIO_FN(DV_DL6), GPIO_FN(MSIOF0_RXD),
+        GPIO_FN(A25_EA25), GPIO_FN(PORT113_KEYIN5),
+        GPIO_FN(DV_DL7), GPIO_FN(MSIOF0_SS2),
+        GPIO_FN(A26), GPIO_FN(PORT113_KEYIN6), GPIO_FN(DV_CLKIL),
+        GPIO_FN(D0_ED0_NAF0), GPIO_FN(D1_ED1_NAF1), GPIO_FN(D2_ED2_NAF2),
+        GPIO_FN(D3_ED3_NAF3), GPIO_FN(D4_ED4_NAF4), GPIO_FN(D5_ED5_NAF5),
+        GPIO_FN(D6_ED6_NAF6), GPIO_FN(D7_ED7_NAF7), GPIO_FN(D8_ED8_NAF8),
+        GPIO_FN(D9_ED9_NAF9), GPIO_FN(D10_ED10_NAF10), GPIO_FN(D11_ED11_NAF11),
+        GPIO_FN(D12_ED12_NAF12), GPIO_FN(D13_ED13_NAF13),
+        GPIO_FN(D14_ED14_NAF14), GPIO_FN(D15_ED15_NAF15),
+        GPIO_FN(CS4), GPIO_FN(CS5A), GPIO_FN(CS5B), GPIO_FN(FCE1),
+        GPIO_FN(CS6B), GPIO_FN(XCS2), GPIO_FN(FCE0), GPIO_FN(CS6A),
+        GPIO_FN(DACK0), GPIO_FN(WAIT), GPIO_FN(DREQ0), GPIO_FN(RD_XRD),
+        GPIO_FN(A27), GPIO_FN(RDWR_XWE), GPIO_FN(WE0_XWR0_FWE),
+        GPIO_FN(WE1_XWR1), GPIO_FN(FRB), GPIO_FN(CKO),
+        GPIO_FN(NBRSTOUT), GPIO_FN(NBRST),
+
+        /* 49-4 (FN) */
+        GPIO_FN(RFSPO0), GPIO_FN(PORT146_VIO_CKO2), GPIO_FN(TSTMD),
+        GPIO_FN(VIO_VD), GPIO_FN(VIO_HD),
+        GPIO_FN(VIO_D0), GPIO_FN(VIO_D1), GPIO_FN(VIO_D2),
+        GPIO_FN(VIO_D3), GPIO_FN(VIO_D4), GPIO_FN(VIO_D5),
+        GPIO_FN(VIO_D6), GPIO_FN(VIO_D7), GPIO_FN(VIO_D8),
+        GPIO_FN(VIO_D9), GPIO_FN(VIO_D10), GPIO_FN(VIO_D11),
+        GPIO_FN(VIO_D12), GPIO_FN(VIO_D13), GPIO_FN(VIO_D14),
+        GPIO_FN(VIO_D15), GPIO_FN(VIO_CLK), GPIO_FN(VIO_FIELD),
+        GPIO_FN(VIO_CKO),
+        GPIO_FN(MFG3_IN1), GPIO_FN(MFG3_IN2),
+        GPIO_FN(M9_SLCD_A01), GPIO_FN(MFG3_OUT1), GPIO_FN(TPU0TO0),
+        GPIO_FN(M10_SLCD_CK1), GPIO_FN(MFG4_IN1), GPIO_FN(TPU0TO1),
+        GPIO_FN(M11_SLCD_SO1), GPIO_FN(MFG4_IN2), GPIO_FN(TPU0TO2),
+        GPIO_FN(M12_SLCD_CE1), GPIO_FN(MFG4_OUT1), GPIO_FN(TPU0TO3),
+        GPIO_FN(LCDD0), GPIO_FN(PORT175_KEYOUT0), GPIO_FN(DV_D0),
+        GPIO_FN(SIUCKA), GPIO_FN(MFG0_OUT2),
+        GPIO_FN(LCDD1), GPIO_FN(PORT176_KEYOUT1), GPIO_FN(DV_D1),
+        GPIO_FN(SIUAOLR), GPIO_FN(BBIF2_TSYNC1),
+        GPIO_FN(LCDD2), GPIO_FN(PORT177_KEYOUT2), GPIO_FN(DV_D2),
+        GPIO_FN(SIUAOBT), GPIO_FN(BBIF2_TSCK1),
+        GPIO_FN(LCDD3), GPIO_FN(PORT178_KEYOUT3), GPIO_FN(DV_D3),
+        GPIO_FN(SIUAOSLD), GPIO_FN(BBIF2_TXD1),
+        GPIO_FN(LCDD4), GPIO_FN(PORT179_KEYOUT4), GPIO_FN(DV_D4),
+        GPIO_FN(SIUAISPD), GPIO_FN(MFG1_OUT2),
+        GPIO_FN(LCDD5), GPIO_FN(PORT180_KEYOUT5), GPIO_FN(DV_D5),
+        GPIO_FN(SIUAILR), GPIO_FN(MFG2_OUT2),
+        GPIO_FN(LCDD6), GPIO_FN(DV_D6),
+        GPIO_FN(SIUAIBT), GPIO_FN(MFG3_OUT2), GPIO_FN(XWR2),
+        GPIO_FN(LCDD7), GPIO_FN(DV_D7),
+        GPIO_FN(SIUAISLD), GPIO_FN(MFG4_OUT2), GPIO_FN(XWR3),
+        GPIO_FN(LCDD8), GPIO_FN(DV_D8), GPIO_FN(D16), GPIO_FN(ED16),
+        GPIO_FN(LCDD9), GPIO_FN(DV_D9), GPIO_FN(D17), GPIO_FN(ED17),
+        GPIO_FN(LCDD10), GPIO_FN(DV_D10), GPIO_FN(D18), GPIO_FN(ED18),
+        GPIO_FN(LCDD11), GPIO_FN(DV_D11), GPIO_FN(D19), GPIO_FN(ED19),
+        GPIO_FN(LCDD12), GPIO_FN(DV_D12), GPIO_FN(D20), GPIO_FN(ED20),
+        GPIO_FN(LCDD13), GPIO_FN(DV_D13), GPIO_FN(D21), GPIO_FN(ED21),
+        GPIO_FN(LCDD14), GPIO_FN(DV_D14), GPIO_FN(D22), GPIO_FN(ED22),
+        GPIO_FN(LCDD15), GPIO_FN(DV_D15), GPIO_FN(D23), GPIO_FN(ED23),
+        GPIO_FN(LCDD16), GPIO_FN(DV_HSYNC), GPIO_FN(D24), GPIO_FN(ED24),
+        GPIO_FN(LCDD17), GPIO_FN(DV_VSYNC), GPIO_FN(D25), GPIO_FN(ED25),
+        GPIO_FN(LCDD18), GPIO_FN(DREQ2), GPIO_FN(MSIOF0L_TSCK),
+        GPIO_FN(D26), GPIO_FN(ED26),
+        GPIO_FN(LCDD19), GPIO_FN(MSIOF0L_TSYNC),
+        GPIO_FN(D27), GPIO_FN(ED27),
+        GPIO_FN(LCDD20), GPIO_FN(TS_SPSYNC1), GPIO_FN(MSIOF0L_MCK0),
+        GPIO_FN(D28), GPIO_FN(ED28),
+        GPIO_FN(LCDD21), GPIO_FN(TS_SDAT1), GPIO_FN(MSIOF0L_MCK1),
+        GPIO_FN(D29), GPIO_FN(ED29),
+        GPIO_FN(LCDD22), GPIO_FN(TS_SDEN1), GPIO_FN(MSIOF0L_SS1),
+        GPIO_FN(D30), GPIO_FN(ED30),
+        GPIO_FN(LCDD23), GPIO_FN(TS_SCK1), GPIO_FN(MSIOF0L_SS2),
+        GPIO_FN(D31), GPIO_FN(ED31),
+        GPIO_FN(LCDDCK), GPIO_FN(LCDWR), GPIO_FN(DV_CKO), GPIO_FN(SIUAOSPD),
+        GPIO_FN(LCDRD), GPIO_FN(DACK2), GPIO_FN(MSIOF0L_RSYNC),
+
+        /* 49-5 (FN) */
+        GPIO_FN(LCDHSYN), GPIO_FN(LCDCS), GPIO_FN(LCDCS2), GPIO_FN(DACK3),
+        GPIO_FN(LCDDISP), GPIO_FN(LCDRS), GPIO_FN(DREQ3), GPIO_FN(MSIOF0L_RSCK),
+        GPIO_FN(LCDCSYN), GPIO_FN(LCDCSYN2), GPIO_FN(DV_CKI),
+        GPIO_FN(LCDLCLK), GPIO_FN(DREQ1), GPIO_FN(MSIOF0L_RXD),
+        GPIO_FN(LCDDON), GPIO_FN(LCDDON2), GPIO_FN(DACK1), GPIO_FN(MSIOF0L_TXD),
+        GPIO_FN(VIO_DR0), GPIO_FN(VIO_DR1), GPIO_FN(VIO_DR2), GPIO_FN(VIO_DR3),
+        GPIO_FN(VIO_DR4), GPIO_FN(VIO_DR5), GPIO_FN(VIO_DR6), GPIO_FN(VIO_DR7),
+        GPIO_FN(VIO_VDR), GPIO_FN(VIO_HDR),
+        GPIO_FN(VIO_CLKR), GPIO_FN(VIO_CKOR),
+        GPIO_FN(SCIFA1_TXD), GPIO_FN(GPS_PGFA0),
+        GPIO_FN(SCIFA1_SCK), GPIO_FN(GPS_PGFA1),
+        GPIO_FN(SCIFA1_RTS), GPIO_FN(GPS_EPPSINMON),
+        GPIO_FN(SCIFA1_RXD), GPIO_FN(SCIFA1_CTS),
+        GPIO_FN(MSIOF1_TXD), GPIO_FN(SCIFA1_TXD2), GPIO_FN(GPS_TXD),
+        GPIO_FN(MSIOF1_TSYNC), GPIO_FN(SCIFA1_CTS2), GPIO_FN(I2C_SDA2),
+        GPIO_FN(MSIOF1_TSCK), GPIO_FN(SCIFA1_SCK2),
+        GPIO_FN(MSIOF1_RXD), GPIO_FN(SCIFA1_RXD2), GPIO_FN(GPS_RXD),
+        GPIO_FN(MSIOF1_RSCK), GPIO_FN(SCIFA1_RTS2),
+        GPIO_FN(MSIOF1_RSYNC), GPIO_FN(I2C_SCL2),
+        GPIO_FN(MSIOF1_MCK0), GPIO_FN(MSIOF1_MCK1),
+        GPIO_FN(MSIOF1_SS1), GPIO_FN(EDBGREQ3),
+        GPIO_FN(MSIOF1_SS2),
+        GPIO_FN(PORT236_IROUT), GPIO_FN(IRDA_OUT),
+        GPIO_FN(IRDA_IN), GPIO_FN(IRDA_FIRSEL),
+        GPIO_FN(TPU1TO0), GPIO_FN(TS_SPSYNC3),
+        GPIO_FN(TPU1TO1), GPIO_FN(TS_SDAT3),
+        GPIO_FN(TPU1TO2), GPIO_FN(TS_SDEN3), GPIO_FN(PORT241_MSIOF2_SS1),
+        GPIO_FN(TPU1TO3), GPIO_FN(PORT242_MSIOF2_TSCK),
+        GPIO_FN(M13_BSW), GPIO_FN(PORT243_MSIOF2_TSYNC),
+        GPIO_FN(M14_GSW), GPIO_FN(PORT244_MSIOF2_TXD),
+        GPIO_FN(PORT245_IROUT), GPIO_FN(M15_RSW),
+        GPIO_FN(SOUT3), GPIO_FN(SCIFA2_TXD1),
+        GPIO_FN(SIN3), GPIO_FN(SCIFA2_RXD1),
+        GPIO_FN(XRTS3), GPIO_FN(SCIFA2_RTS1), GPIO_FN(PORT248_MSIOF2_SS2),
+        GPIO_FN(XCTS3), GPIO_FN(SCIFA2_CTS1), GPIO_FN(PORT249_MSIOF2_RXD),
+        GPIO_FN(DINT), GPIO_FN(SCIFA2_SCK1), GPIO_FN(TS_SCK3),
+        GPIO_FN(SDHICLK0), GPIO_FN(TCK2),
+        GPIO_FN(SDHICD0),
+        GPIO_FN(SDHID0_0), GPIO_FN(TMS2),
+        GPIO_FN(SDHID0_1), GPIO_FN(TDO2),
+        GPIO_FN(SDHID0_2), GPIO_FN(TDI2),
+        GPIO_FN(SDHID0_3), GPIO_FN(RTCK2),
+
+        /* 49-6 (FN) */
+        GPIO_FN(SDHICMD0), GPIO_FN(TRST2),
+        GPIO_FN(SDHIWP0), GPIO_FN(EDBGREQ2),
+        GPIO_FN(SDHICLK1), GPIO_FN(TCK3),
+        GPIO_FN(SDHID1_0), GPIO_FN(M11_SLCD_SO2),
+        GPIO_FN(TS_SPSYNC2), GPIO_FN(TMS3),
+        GPIO_FN(SDHID1_1), GPIO_FN(M9_SLCD_AO2),
+        GPIO_FN(TS_SDAT2), GPIO_FN(TDO3),
+        GPIO_FN(SDHID1_2), GPIO_FN(M10_SLCD_CK2),
+        GPIO_FN(TS_SDEN2), GPIO_FN(TDI3),
+        GPIO_FN(SDHID1_3), GPIO_FN(M12_SLCD_CE2),
+        GPIO_FN(TS_SCK2), GPIO_FN(RTCK3),
+        GPIO_FN(SDHICMD1), GPIO_FN(TRST3),
+        GPIO_FN(SDHICLK2), GPIO_FN(SCIFB_SCK),
+        GPIO_FN(SDHID2_0), GPIO_FN(SCIFB_TXD),
+        GPIO_FN(SDHID2_1), GPIO_FN(SCIFB_CTS),
+        GPIO_FN(SDHID2_2), GPIO_FN(SCIFB_RXD),
+        GPIO_FN(SDHID2_3), GPIO_FN(SCIFB_RTS),
+        GPIO_FN(SDHICMD2),
+        GPIO_FN(RESETOUTS),
+        GPIO_FN(DIVLOCK),
+};
+
+/* helper for top 4 bits in PORTnCR */
+#define PCRH(in, in_pd, in_pu, out)             \
+        0, (out), (in), 0,                      \
+        0, 0, 0, 0,                             \
+        0, 0, (in_pd), 0,                       \
+        0, 0, (in_pu), 0
+
+#define PORTCR(nr, reg)                                         \
+        { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) {           \
+                PCRH(PORT##nr##_IN, PORT##nr##_IN_PD,           \
+                     PORT##nr##_IN_PU, PORT##nr##_OUT),         \
+                PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
+                PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
+                PORT##nr##_FN6, PORT##nr##_FN7 }                \
+        }
+
+static struct pinmux_cfg_reg pinmux_config_regs[] = {
+        PORTCR(0, 0xe6050000), /* PORT0CR */
+        PORTCR(1, 0xe6050001), /* PORT1CR */
+        PORTCR(2, 0xe6050002), /* PORT2CR */
+        PORTCR(3, 0xe6050003), /* PORT3CR */
+        PORTCR(4, 0xe6050004), /* PORT4CR */
+        PORTCR(5, 0xe6050005), /* PORT5CR */
+        PORTCR(6, 0xe6050006), /* PORT6CR */
+        PORTCR(7, 0xe6050007), /* PORT7CR */
+        PORTCR(8, 0xe6050008), /* PORT8CR */
+        PORTCR(9, 0xe6050009), /* PORT9CR */
+
+        PORTCR(10, 0xe605000a), /* PORT10CR */
+        PORTCR(11, 0xe605000b), /* PORT11CR */
+        PORTCR(12, 0xe605000c), /* PORT12CR */
+        PORTCR(13, 0xe605000d), /* PORT13CR */
+        PORTCR(14, 0xe605000e), /* PORT14CR */
+        PORTCR(15, 0xe605000f), /* PORT15CR */
+        PORTCR(16, 0xe6050010), /* PORT16CR */
+        PORTCR(17, 0xe6050011), /* PORT17CR */
+        PORTCR(18, 0xe6050012), /* PORT18CR */
+        PORTCR(19, 0xe6050013), /* PORT19CR */
+
+        PORTCR(20, 0xe6050014), /* PORT20CR */
+        PORTCR(21, 0xe6050015), /* PORT21CR */
+        PORTCR(22, 0xe6050016), /* PORT22CR */
+        PORTCR(23, 0xe6050017), /* PORT23CR */
+        PORTCR(24, 0xe6050018), /* PORT24CR */
+        PORTCR(25, 0xe6050019), /* PORT25CR */
+        PORTCR(26, 0xe605001a), /* PORT26CR */
+        PORTCR(27, 0xe605001b), /* PORT27CR */
+        PORTCR(28, 0xe605001c), /* PORT28CR */
+        PORTCR(29, 0xe605001d), /* PORT29CR */
+
+        PORTCR(30, 0xe605001e), /* PORT30CR */
+        PORTCR(31, 0xe605001f), /* PORT31CR */
+        PORTCR(32, 0xe6050020), /* PORT32CR */
+        PORTCR(33, 0xe6050021), /* PORT33CR */
+        PORTCR(34, 0xe6050022), /* PORT34CR */
+        PORTCR(35, 0xe6050023), /* PORT35CR */
+        PORTCR(36, 0xe6050024), /* PORT36CR */
+        PORTCR(37, 0xe6050025), /* PORT37CR */
+        PORTCR(38, 0xe6050026), /* PORT38CR */
+        PORTCR(39, 0xe6050027), /* PORT39CR */
+
+        PORTCR(40, 0xe6050028), /* PORT40CR */
+        PORTCR(41, 0xe6050029), /* PORT41CR */
+        PORTCR(42, 0xe605002a), /* PORT42CR */
+        PORTCR(43, 0xe605002b), /* PORT43CR */
+        PORTCR(44, 0xe605002c), /* PORT44CR */
+        PORTCR(45, 0xe605002d), /* PORT45CR */
+        PORTCR(46, 0xe605002e), /* PORT46CR */
+        PORTCR(47, 0xe605002f), /* PORT47CR */
+        PORTCR(48, 0xe6050030), /* PORT48CR */
+        PORTCR(49, 0xe6050031), /* PORT49CR */
+
+        PORTCR(50, 0xe6050032), /* PORT50CR */
+        PORTCR(51, 0xe6050033), /* PORT51CR */
+        PORTCR(52, 0xe6050034), /* PORT52CR */
+        PORTCR(53, 0xe6050035), /* PORT53CR */
+        PORTCR(54, 0xe6050036), /* PORT54CR */
+        PORTCR(55, 0xe6050037), /* PORT55CR */
+        PORTCR(56, 0xe6050038), /* PORT56CR */
+        PORTCR(57, 0xe6050039), /* PORT57CR */
+        PORTCR(58, 0xe605003a), /* PORT58CR */
+        PORTCR(59, 0xe605003b), /* PORT59CR */
+
+        PORTCR(60, 0xe605003c), /* PORT60CR */
+        PORTCR(61, 0xe605003d), /* PORT61CR */
+        PORTCR(62, 0xe605003e), /* PORT62CR */
+        PORTCR(63, 0xe605003f), /* PORT63CR */
+        PORTCR(64, 0xe6050040), /* PORT64CR */
+        PORTCR(65, 0xe6050041), /* PORT65CR */
+        PORTCR(66, 0xe6050042), /* PORT66CR */
+        PORTCR(67, 0xe6050043), /* PORT67CR */
+        PORTCR(68, 0xe6050044), /* PORT68CR */
+        PORTCR(69, 0xe6050045), /* PORT69CR */
+
+        PORTCR(70, 0xe6050046), /* PORT70CR */
+        PORTCR(71, 0xe6050047), /* PORT71CR */
+        PORTCR(72, 0xe6050048), /* PORT72CR */
+        PORTCR(73, 0xe6050049), /* PORT73CR */
+        PORTCR(74, 0xe605004a), /* PORT74CR */
+        PORTCR(75, 0xe605004b), /* PORT75CR */
+        PORTCR(76, 0xe605004c), /* PORT76CR */
+        PORTCR(77, 0xe605004d), /* PORT77CR */
+        PORTCR(78, 0xe605004e), /* PORT78CR */
+        PORTCR(79, 0xe605004f), /* PORT79CR */
+
+        PORTCR(80, 0xe6050050), /* PORT80CR */
+        PORTCR(81, 0xe6050051), /* PORT81CR */
+        PORTCR(82, 0xe6050052), /* PORT82CR */
+        PORTCR(83, 0xe6050053), /* PORT83CR */
+        PORTCR(84, 0xe6050054), /* PORT84CR */
+        PORTCR(85, 0xe6050055), /* PORT85CR */
+        PORTCR(86, 0xe6050056), /* PORT86CR */
+        PORTCR(87, 0xe6050057), /* PORT87CR */
+        PORTCR(88, 0xe6051058), /* PORT88CR */
+        PORTCR(89, 0xe6051059), /* PORT89CR */
+
+        PORTCR(90, 0xe605105a), /* PORT90CR */
+        PORTCR(91, 0xe605105b), /* PORT91CR */
+        PORTCR(92, 0xe605105c), /* PORT92CR */
+        PORTCR(93, 0xe605105d), /* PORT93CR */
+        PORTCR(94, 0xe605105e), /* PORT94CR */
+        PORTCR(95, 0xe605105f), /* PORT95CR */
+        PORTCR(96, 0xe6051060), /* PORT96CR */
+        PORTCR(97, 0xe6051061), /* PORT97CR */
+        PORTCR(98, 0xe6051062), /* PORT98CR */
+        PORTCR(99, 0xe6051063), /* PORT99CR */
+
+        PORTCR(100, 0xe6051064), /* PORT100CR */
+        PORTCR(101, 0xe6051065), /* PORT101CR */
+        PORTCR(102, 0xe6051066), /* PORT102CR */
+        PORTCR(103, 0xe6051067), /* PORT103CR */
+        PORTCR(104, 0xe6051068), /* PORT104CR */
+        PORTCR(105, 0xe6051069), /* PORT105CR */
+        PORTCR(106, 0xe605106a), /* PORT106CR */
+        PORTCR(107, 0xe605106b), /* PORT107CR */
+        PORTCR(108, 0xe605106c), /* PORT108CR */
+        PORTCR(109, 0xe605106d), /* PORT109CR */
+
+        PORTCR(110, 0xe605106e), /* PORT110CR */
+        PORTCR(111, 0xe605106f), /* PORT111CR */
+        PORTCR(112, 0xe6051070), /* PORT112CR */
+        PORTCR(113, 0xe6051071), /* PORT113CR */
+        PORTCR(114, 0xe6051072), /* PORT114CR */
+        PORTCR(115, 0xe6051073), /* PORT115CR */
+        PORTCR(116, 0xe6051074), /* PORT116CR */
+        PORTCR(117, 0xe6051075), /* PORT117CR */
+        PORTCR(118, 0xe6051076), /* PORT118CR */
+        PORTCR(119, 0xe6051077), /* PORT119CR */
+
+        PORTCR(120, 0xe6051078), /* PORT120CR */
+        PORTCR(121, 0xe6051079), /* PORT121CR */
+        PORTCR(122, 0xe605107a), /* PORT122CR */
+        PORTCR(123, 0xe605107b), /* PORT123CR */
+        PORTCR(124, 0xe605107c), /* PORT124CR */
+        PORTCR(125, 0xe605107d), /* PORT125CR */
+        PORTCR(126, 0xe605107e), /* PORT126CR */
+        PORTCR(127, 0xe605107f), /* PORT127CR */
+        PORTCR(128, 0xe6051080), /* PORT128CR */
+        PORTCR(129, 0xe6051081), /* PORT129CR */
+
+        PORTCR(130, 0xe6051082), /* PORT130CR */
+        PORTCR(131, 0xe6051083), /* PORT131CR */
+        PORTCR(132, 0xe6051084), /* PORT132CR */
+        PORTCR(133, 0xe6051085), /* PORT133CR */
+        PORTCR(134, 0xe6051086), /* PORT134CR */
+        PORTCR(135, 0xe6051087), /* PORT135CR */
+        PORTCR(136, 0xe6051088), /* PORT136CR */
+        PORTCR(137, 0xe6051089), /* PORT137CR */
+        PORTCR(138, 0xe605108a), /* PORT138CR */
+        PORTCR(139, 0xe605108b), /* PORT139CR */
+
+        PORTCR(140, 0xe605108c), /* PORT140CR */
+        PORTCR(141, 0xe605108d), /* PORT141CR */
+        PORTCR(142, 0xe605108e), /* PORT142CR */
+        PORTCR(143, 0xe605108f), /* PORT143CR */
+        PORTCR(144, 0xe6051090), /* PORT144CR */
+        PORTCR(145, 0xe6051091), /* PORT145CR */
+        PORTCR(146, 0xe6051092), /* PORT146CR */
+        PORTCR(147, 0xe6051093), /* PORT147CR */
+        PORTCR(148, 0xe6051094), /* PORT148CR */
+        PORTCR(149, 0xe6051095), /* PORT149CR */
+
+        PORTCR(150, 0xe6051096), /* PORT150CR */
+        PORTCR(151, 0xe6051097), /* PORT151CR */
+        PORTCR(152, 0xe6051098), /* PORT152CR */
+        PORTCR(153, 0xe6051099), /* PORT153CR */
+        PORTCR(154, 0xe605109a), /* PORT154CR */
+        PORTCR(155, 0xe605109b), /* PORT155CR */
+        PORTCR(156, 0xe605109c), /* PORT156CR */
+        PORTCR(157, 0xe605109d), /* PORT157CR */
+        PORTCR(158, 0xe605109e), /* PORT158CR */
+        PORTCR(159, 0xe605109f), /* PORT159CR */
+
+        PORTCR(160, 0xe60510a0), /* PORT160CR */
+        PORTCR(161, 0xe60510a1), /* PORT161CR */
+        PORTCR(162, 0xe60510a2), /* PORT162CR */
+        PORTCR(163, 0xe60510a3), /* PORT163CR */
+        PORTCR(164, 0xe60510a4), /* PORT164CR */
+        PORTCR(165, 0xe60510a5), /* PORT165CR */
+        PORTCR(166, 0xe60510a6), /* PORT166CR */
+        PORTCR(167, 0xe60510a7), /* PORT167CR */
+        PORTCR(168, 0xe60510a8), /* PORT168CR */
+        PORTCR(169, 0xe60510a9), /* PORT169CR */
+
+        PORTCR(170, 0xe60510aa), /* PORT170CR */
+        PORTCR(171, 0xe60510ab), /* PORT171CR */
+        PORTCR(172, 0xe60510ac), /* PORT172CR */
+        PORTCR(173, 0xe60510ad), /* PORT173CR */
+        PORTCR(174, 0xe60510ae), /* PORT174CR */
+        PORTCR(175, 0xe60520af), /* PORT175CR */
+        PORTCR(176, 0xe60520b0), /* PORT176CR */
+        PORTCR(177, 0xe60520b1), /* PORT177CR */
+        PORTCR(178, 0xe60520b2), /* PORT178CR */
+        PORTCR(179, 0xe60520b3), /* PORT179CR */
+
+        PORTCR(180, 0xe60520b4), /* PORT180CR */
+        PORTCR(181, 0xe60520b5), /* PORT181CR */
+        PORTCR(182, 0xe60520b6), /* PORT182CR */
+        PORTCR(183, 0xe60520b7), /* PORT183CR */
+        PORTCR(184, 0xe60520b8), /* PORT184CR */
+        PORTCR(185, 0xe60520b9), /* PORT185CR */
+        PORTCR(186, 0xe60520ba), /* PORT186CR */
+        PORTCR(187, 0xe60520bb), /* PORT187CR */
+        PORTCR(188, 0xe60520bc), /* PORT188CR */
+        PORTCR(189, 0xe60520bd), /* PORT189CR */
+
+        PORTCR(190, 0xe60520be), /* PORT190CR */
+        PORTCR(191, 0xe60520bf), /* PORT191CR */
+        PORTCR(192, 0xe60520c0), /* PORT192CR */
+        PORTCR(193, 0xe60520c1), /* PORT193CR */
+        PORTCR(194, 0xe60520c2), /* PORT194CR */
+        PORTCR(195, 0xe60520c3), /* PORT195CR */
+        PORTCR(196, 0xe60520c4), /* PORT196CR */
+        PORTCR(197, 0xe60520c5), /* PORT197CR */
+        PORTCR(198, 0xe60520c6), /* PORT198CR */
+        PORTCR(199, 0xe60520c7), /* PORT199CR */
+
+        PORTCR(200, 0xe60520c8), /* PORT200CR */
+        PORTCR(201, 0xe60520c9), /* PORT201CR */
+        PORTCR(202, 0xe60520ca), /* PORT202CR */
+        PORTCR(203, 0xe60520cb), /* PORT203CR */
+        PORTCR(204, 0xe60520cc), /* PORT204CR */
+        PORTCR(205, 0xe60520cd), /* PORT205CR */
+        PORTCR(206, 0xe60520ce), /* PORT206CR */
+        PORTCR(207, 0xe60520cf), /* PORT207CR */
+        PORTCR(208, 0xe60520d0), /* PORT208CR */
+        PORTCR(209, 0xe60520d1), /* PORT209CR */
+
+        PORTCR(210, 0xe60520d2), /* PORT210CR */
+        PORTCR(211, 0xe60520d3), /* PORT211CR */
+        PORTCR(212, 0xe60520d4), /* PORT212CR */
+        PORTCR(213, 0xe60520d5), /* PORT213CR */
+        PORTCR(214, 0xe60520d6), /* PORT214CR */
+        PORTCR(215, 0xe60520d7), /* PORT215CR */
+        PORTCR(216, 0xe60520d8), /* PORT216CR */
+        PORTCR(217, 0xe60520d9), /* PORT217CR */
+        PORTCR(218, 0xe60520da), /* PORT218CR */
+        PORTCR(219, 0xe60520db), /* PORT219CR */
+
+        PORTCR(220, 0xe60520dc), /* PORT220CR */
+        PORTCR(221, 0xe60520dd), /* PORT221CR */
+        PORTCR(222, 0xe60520de), /* PORT222CR */
+        PORTCR(223, 0xe60520df), /* PORT223CR */
+        PORTCR(224, 0xe60520e0), /* PORT224CR */
+        PORTCR(225, 0xe60520e1), /* PORT225CR */
+        PORTCR(226, 0xe60520e2), /* PORT226CR */
+        PORTCR(227, 0xe60520e3), /* PORT227CR */
+        PORTCR(228, 0xe60520e4), /* PORT228CR */
+        PORTCR(229, 0xe60520e5), /* PORT229CR */
+
+        PORTCR(230, 0xe60520e6), /* PORT230CR */
+        PORTCR(231, 0xe60520e7), /* PORT231CR */
+        PORTCR(232, 0xe60520e8), /* PORT232CR */
+        PORTCR(233, 0xe60520e9), /* PORT233CR */
+        PORTCR(234, 0xe60520ea), /* PORT234CR */
+        PORTCR(235, 0xe60520eb), /* PORT235CR */
+        PORTCR(236, 0xe60530ec), /* PORT236CR */
+        PORTCR(237, 0xe60530ed), /* PORT237CR */
+        PORTCR(238, 0xe60530ee), /* PORT238CR */
+        PORTCR(239, 0xe60530ef), /* PORT239CR */
+
+        PORTCR(240, 0xe60530f0), /* PORT240CR */
+        PORTCR(241, 0xe60530f1), /* PORT241CR */
+        PORTCR(242, 0xe60530f2), /* PORT242CR */
+        PORTCR(243, 0xe60530f3), /* PORT243CR */
+        PORTCR(244, 0xe60530f4), /* PORT244CR */
+        PORTCR(245, 0xe60530f5), /* PORT245CR */
+        PORTCR(246, 0xe60530f6), /* PORT246CR */
+        PORTCR(247, 0xe60530f7), /* PORT247CR */
+        PORTCR(248, 0xe60530f8), /* PORT248CR */
+        PORTCR(249, 0xe60530f9), /* PORT249CR */
+
+        PORTCR(250, 0xe60530fa), /* PORT250CR */
+        PORTCR(251, 0xe60530fb), /* PORT251CR */
+        PORTCR(252, 0xe60530fc), /* PORT252CR */
+        PORTCR(253, 0xe60530fd), /* PORT253CR */
+        PORTCR(254, 0xe60530fe), /* PORT254CR */
+        PORTCR(255, 0xe60530ff), /* PORT255CR */
+        PORTCR(256, 0xe6053100), /* PORT256CR */
+        PORTCR(257, 0xe6053101), /* PORT257CR */
+        PORTCR(258, 0xe6053102), /* PORT258CR */
+        PORTCR(259, 0xe6053103), /* PORT259CR */
+
+        PORTCR(260, 0xe6053104), /* PORT260CR */
+        PORTCR(261, 0xe6053105), /* PORT261CR */
+        PORTCR(262, 0xe6053106), /* PORT262CR */
+        PORTCR(263, 0xe6053107), /* PORT263CR */
+        PORTCR(264, 0xe6053108), /* PORT264CR */
+        PORTCR(265, 0xe6053109), /* PORT265CR */
+        PORTCR(266, 0xe605310a), /* PORT266CR */
+        PORTCR(267, 0xe605310b), /* PORT267CR */
+        PORTCR(268, 0xe605310c), /* PORT268CR */
+        PORTCR(269, 0xe605310d), /* PORT269CR */
+
+        PORTCR(270, 0xe605310e), /* PORT270CR */
+        PORTCR(271, 0xe605310f), /* PORT271CR */
+        PORTCR(272, 0xe6053110), /* PORT272CR */
+
+        { PINMUX_CFG_REG("MSELBCR", 0xe6058024, 32, 1) {
+                0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+                0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+                0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                MSELBCR_MSEL2_0, MSELBCR_MSEL2_1,
+                0, 0,
+                0, 0 }
+        },
+        { },
+};
+
+static struct pinmux_data_reg pinmux_data_regs[] = {
+        { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054000, 32) {
+                PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA,
+                PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
+                PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA,
+                PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA,
+                PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA,
+                PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA,
+                PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA,
+                PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA }
+        },
+        { PINMUX_DATA_REG("PORTL063_032DR", 0xe6054004, 32) {
+                PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA,
+                PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA,
+                PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA,
+                PORT51_DATA, PORT50_DATA, PORT49_DATA, PORT48_DATA,
+                PORT47_DATA, PORT46_DATA, PORT45_DATA, PORT44_DATA,
+                PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA,
+                PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA,
+                PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA }
+        },
+        { PINMUX_DATA_REG("PORTL095_064DR", 0xe6054008, 32) {
+                PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA,
+                PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA,
+                PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA,
+                PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA,
+                PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA,
+                PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA,
+                PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA,
+                PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA }
+        },
+        { PINMUX_DATA_REG("PORTD127_096DR", 0xe6055004, 32) {
+                PORT127_DATA, PORT126_DATA, PORT125_DATA, PORT124_DATA,
+                PORT123_DATA, PORT122_DATA, PORT121_DATA, PORT120_DATA,
+                PORT119_DATA, PORT118_DATA, PORT117_DATA, PORT116_DATA,
+                PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA,
+                PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA,
+                PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA,
+                PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA,
+                PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA }
+        },
+        { PINMUX_DATA_REG("PORTD159_128DR", 0xe6055008, 32) {
+                PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA,
+                PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA,
+                PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA,
+                PORT147_DATA, PORT146_DATA, PORT145_DATA, PORT144_DATA,
+                PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA,
+                PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA,
+                PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA,
+                PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA }
+        },
+        { PINMUX_DATA_REG("PORTR191_160DR", 0xe6056000, 32) {
+                PORT191_DATA, PORT190_DATA, PORT189_DATA, PORT188_DATA,
+                PORT187_DATA, PORT186_DATA, PORT185_DATA, PORT184_DATA,
+                PORT183_DATA, PORT182_DATA, PORT181_DATA, PORT180_DATA,
+                PORT179_DATA, PORT178_DATA, PORT177_DATA, PORT176_DATA,
+                PORT175_DATA, PORT174_DATA, PORT173_DATA, PORT172_DATA,
+                PORT171_DATA, PORT170_DATA, PORT169_DATA, PORT168_DATA,
+                PORT167_DATA, PORT166_DATA, PORT165_DATA, PORT164_DATA,
+                PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA }
+        },
+        { PINMUX_DATA_REG("PORTR223_192DR", 0xe6056004, 32) {
+                PORT223_DATA, PORT222_DATA, PORT221_DATA, PORT220_DATA,
+                PORT219_DATA, PORT218_DATA, PORT217_DATA, PORT216_DATA,
+                PORT215_DATA, PORT214_DATA, PORT213_DATA, PORT212_DATA,
+                PORT211_DATA, PORT210_DATA, PORT209_DATA, PORT208_DATA,
+                PORT207_DATA, PORT206_DATA, PORT205_DATA, PORT204_DATA,
+                PORT203_DATA, PORT202_DATA, PORT201_DATA, PORT200_DATA,
+                PORT199_DATA, PORT198_DATA, PORT197_DATA, PORT196_DATA,
+                PORT195_DATA, PORT194_DATA, PORT193_DATA, PORT192_DATA }
+        },
+        { PINMUX_DATA_REG("PORTU255_224DR", 0xe6057000, 32) {
+                PORT255_DATA, PORT254_DATA, PORT253_DATA, PORT252_DATA,
+                PORT251_DATA, PORT250_DATA, PORT249_DATA, PORT248_DATA,
+                PORT247_DATA, PORT246_DATA, PORT245_DATA, PORT244_DATA,
+                PORT243_DATA, PORT242_DATA, PORT241_DATA, PORT240_DATA,
+                PORT239_DATA, PORT238_DATA, PORT237_DATA, PORT236_DATA,
+                PORT235_DATA, PORT234_DATA, PORT233_DATA, PORT232_DATA,
+                PORT231_DATA, PORT230_DATA, PORT229_DATA, PORT228_DATA,
+                PORT227_DATA, PORT226_DATA, PORT225_DATA, PORT224_DATA }
+        },
+        { PINMUX_DATA_REG("PORTU287_256DR", 0xe6057004, 32) {
+                0, 0, 0, 0,
+                0, 0, 0, 0,
+                0, 0, 0, 0,
+                0, 0, 0, PORT272_DATA,
+                PORT271_DATA, PORT270_DATA, PORT269_DATA, PORT268_DATA,
+                PORT267_DATA, PORT266_DATA, PORT265_DATA, PORT264_DATA,
+                PORT263_DATA, PORT262_DATA, PORT261_DATA, PORT260_DATA,
+                PORT259_DATA, PORT258_DATA, PORT257_DATA, PORT256_DATA }
+        },
+        { },
+};
+
+static struct pinmux_info sh7367_pinmux_info = {
+        .name = "sh7367_pfc",
+        .reserved_id = PINMUX_RESERVED,
+        .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
+        .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
+        .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
+        .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END },
+        .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
+        .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
+        .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
+
+        .first_gpio = GPIO_PORT0,
+        .last_gpio = GPIO_FN_DIVLOCK,
+
+        .gpios = pinmux_gpios,
+        .cfg_regs = pinmux_config_regs,
+        .data_regs = pinmux_data_regs,
+
+        .gpio_data = pinmux_data,
+        .gpio_data_size = ARRAY_SIZE(pinmux_data),
+};
+
+void sh7367_pinmux_init(void)
+{
+        register_pinmux(&sh7367_pinmux_info);
+}
diff --git a/arch/arm/mach-shmobile/pfc-sh7372.c b/arch/arm/mach-shmobile/pfc-sh7372.c
new file mode 100644
index 00000000000..9557d0964d7
--- /dev/null
+++ b/arch/arm/mach-shmobile/pfc-sh7372.c
@@ -0,0 +1,1637 @@
+/*
+ * sh7372 processor support - PFC hardware block
+ *
+ * Copyright (C) 2010  Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ *
+ * Based on
+ * sh7367 processor support - PFC hardware block
+ * Copyright (C) 2010  Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <mach/sh7372.h>
+
+#define _1(fn, pfx, sfx) fn(pfx, sfx)
+
+#define _10(fn, pfx, sfx)                               \
+        _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx),       \
+        _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx),       \
+        _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx),       \
+        _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx),       \
+        _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
+
+#define _80(fn, pfx, sfx)                               \
+        _10(fn, pfx##1, sfx),   _10(fn, pfx##2, sfx),   \
+        _10(fn, pfx##3, sfx),   _10(fn, pfx##4, sfx),   \
+        _10(fn, pfx##5, sfx),   _10(fn, pfx##6, sfx),   \
+        _10(fn, pfx##7, sfx),   _10(fn, pfx##8, sfx)
+
+#define _190(fn, pfx, sfx) \
+        _10(fn, pfx, sfx), _80(fn, pfx, sfx), _10(fn, pfx##9, sfx), \
+        _10(fn, pfx##10, sfx), _80(fn, pfx##1, sfx), _1(fn, pfx##190, sfx)
+
+#define _PORT(pfx, sfx) pfx##_##sfx
+#define PORT_ALL(str) _190(_PORT, PORT, str)
+
+enum {
+        PINMUX_RESERVED = 0,
+
+        /* PORT0_DATA -> PORT190_DATA */
+        PINMUX_DATA_BEGIN,
+        PORT_ALL(DATA),
+        PINMUX_DATA_END,
+
+        /* PORT0_IN -> PORT190_IN */
+        PINMUX_INPUT_BEGIN,
+        PORT_ALL(IN),
+        PINMUX_INPUT_END,
+
+        /* PORT0_IN_PU -> PORT190_IN_PU */
+        PINMUX_INPUT_PULLUP_BEGIN,
+        PORT_ALL(IN_PU),
+        PINMUX_INPUT_PULLUP_END,
+
+        /* PORT0_IN_PD -> PORT190_IN_PD */
+        PINMUX_INPUT_PULLDOWN_BEGIN,
+        PORT_ALL(IN_PD),
+        PINMUX_INPUT_PULLDOWN_END,
+
+        /* PORT0_OUT -> PORT190_OUT */
+        PINMUX_OUTPUT_BEGIN,
+        PORT_ALL(OUT),
+        PINMUX_OUTPUT_END,
+
+        PINMUX_FUNCTION_BEGIN,
+        PORT_ALL(FN_IN),        /* PORT0_FN_IN  -> PORT190_FN_IN */
+        PORT_ALL(FN_OUT),       /* PORT0_FN_OUT -> PORT190_FN_OUT */
+        PORT_ALL(FN0),          /* PORT0_FN0    -> PORT190_FN0 */
+        PORT_ALL(FN1),          /* PORT0_FN1    -> PORT190_FN1 */
+        PORT_ALL(FN2),          /* PORT0_FN2    -> PORT190_FN2 */
+        PORT_ALL(FN3),          /* PORT0_FN3    -> PORT190_FN3 */
+        PORT_ALL(FN4),          /* PORT0_FN4    -> PORT190_FN4 */
+        PORT_ALL(FN5),          /* PORT0_FN5    -> PORT190_FN5 */
+        PORT_ALL(FN6),          /* PORT0_FN6    -> PORT190_FN6 */
+        PORT_ALL(FN7),          /* PORT0_FN7    -> PORT190_FN7 */
+
+        MSEL1CR_31_0,   MSEL1CR_31_1,
+        MSEL1CR_30_0,   MSEL1CR_30_1,
+        MSEL1CR_29_0,   MSEL1CR_29_1,
+        MSEL1CR_28_0,   MSEL1CR_28_1,
+        MSEL1CR_27_0,   MSEL1CR_27_1,
+        MSEL1CR_26_0,   MSEL1CR_26_1,
+        MSEL1CR_16_0,   MSEL1CR_16_1,
+        MSEL1CR_15_0,   MSEL1CR_15_1,
+        MSEL1CR_14_0,   MSEL1CR_14_1,
+        MSEL1CR_13_0,   MSEL1CR_13_1,
+        MSEL1CR_12_0,   MSEL1CR_12_1,
+        MSEL1CR_9_0,    MSEL1CR_9_1,
+        MSEL1CR_8_0,    MSEL1CR_8_1,
+        MSEL1CR_7_0,    MSEL1CR_7_1,
+        MSEL1CR_6_0,    MSEL1CR_6_1,
+        MSEL1CR_4_0,    MSEL1CR_4_1,
+        MSEL1CR_3_0,    MSEL1CR_3_1,
+        MSEL1CR_2_0,    MSEL1CR_2_1,
+        MSEL1CR_0_0,    MSEL1CR_0_1,
+
+        MSEL3CR_27_0,   MSEL3CR_27_1,
+        MSEL3CR_26_0,   MSEL3CR_26_1,
+        MSEL3CR_21_0,   MSEL3CR_21_1,
+        MSEL3CR_20_0,   MSEL3CR_20_1,
+        MSEL3CR_15_0,   MSEL3CR_15_1,
+        MSEL3CR_9_0,    MSEL3CR_9_1,
+        MSEL3CR_6_0,    MSEL3CR_6_1,
+
+        MSEL4CR_19_0,   MSEL4CR_19_1,
+        MSEL4CR_18_0,   MSEL4CR_18_1,
+        MSEL4CR_17_0,   MSEL4CR_17_1,
+        MSEL4CR_16_0,   MSEL4CR_16_1,
+        MSEL4CR_15_0,   MSEL4CR_15_1,
+        MSEL4CR_14_0,   MSEL4CR_14_1,
+        MSEL4CR_10_0,   MSEL4CR_10_1,
+        MSEL4CR_6_0,    MSEL4CR_6_1,
+        MSEL4CR_4_0,    MSEL4CR_4_1,
+        MSEL4CR_1_0,    MSEL4CR_1_1,
+        PINMUX_FUNCTION_END,
+
+        PINMUX_MARK_BEGIN,
+
+        /* IRQ */
+        IRQ0_6_MARK,    IRQ0_162_MARK,  IRQ1_MARK,      IRQ2_4_MARK,
+        IRQ2_5_MARK,    IRQ3_8_MARK,    IRQ3_16_MARK,   IRQ4_17_MARK,
+        IRQ4_163_MARK,  IRQ5_MARK,      IRQ6_39_MARK,   IRQ6_164_MARK,
+        IRQ7_40_MARK,   IRQ7_167_MARK,  IRQ8_41_MARK,   IRQ8_168_MARK,
+        IRQ9_42_MARK,   IRQ9_169_MARK,  IRQ10_MARK,     IRQ11_MARK,
+        IRQ12_80_MARK,  IRQ12_137_MARK, IRQ13_81_MARK,  IRQ13_145_MARK,
+        IRQ14_82_MARK,  IRQ14_146_MARK, IRQ15_83_MARK,  IRQ15_147_MARK,
+        IRQ16_84_MARK,  IRQ16_170_MARK, IRQ17_MARK,     IRQ18_MARK,
+        IRQ19_MARK,     IRQ20_MARK,     IRQ21_MARK,     IRQ22_MARK,
+        IRQ23_MARK,     IRQ24_MARK,     IRQ25_MARK,     IRQ26_121_MARK,
+        IRQ26_172_MARK, IRQ27_122_MARK, IRQ27_180_MARK, IRQ28_123_MARK,
+        IRQ28_181_MARK, IRQ29_129_MARK, IRQ29_182_MARK, IRQ30_130_MARK,
+        IRQ30_183_MARK, IRQ31_138_MARK, IRQ31_184_MARK,
+
+        /* MSIOF0 */
+        MSIOF0_TSYNC_MARK,      MSIOF0_TSCK_MARK,       MSIOF0_RXD_MARK,
+        MSIOF0_RSCK_MARK,       MSIOF0_RSYNC_MARK,      MSIOF0_MCK0_MARK,
+        MSIOF0_MCK1_MARK,       MSIOF0_SS1_MARK,        MSIOF0_SS2_MARK,
+        MSIOF0_TXD_MARK,
+
+        /* MSIOF1 */
+        MSIOF1_TSCK_39_MARK,    MSIOF1_TSYNC_40_MARK,
+        MSIOF1_TSCK_88_MARK,    MSIOF1_TSYNC_89_MARK,
+        MSIOF1_TXD_41_MARK,     MSIOF1_RXD_42_MARK,
+        MSIOF1_TXD_90_MARK,     MSIOF1_RXD_91_MARK,
+        MSIOF1_SS1_43_MARK,     MSIOF1_SS2_44_MARK,
+        MSIOF1_SS1_92_MARK,     MSIOF1_SS2_93_MARK,
+        MSIOF1_RSCK_MARK,       MSIOF1_RSYNC_MARK,
+        MSIOF1_MCK0_MARK,       MSIOF1_MCK1_MARK,
+
+        /* MSIOF2 */
+        MSIOF2_RSCK_MARK,       MSIOF2_RSYNC_MARK,      MSIOF2_MCK0_MARK,
+        MSIOF2_MCK1_MARK,       MSIOF2_SS1_MARK,        MSIOF2_SS2_MARK,
+        MSIOF2_TSYNC_MARK,      MSIOF2_TSCK_MARK,       MSIOF2_RXD_MARK,
+        MSIOF2_TXD_MARK,
+
+        /* MSIOF3 */
+        BBIF1_RXD_MARK,         BBIF1_TSYNC_MARK,       BBIF1_TSCK_MARK,
+        BBIF1_TXD_MARK,         BBIF1_RSCK_MARK,        BBIF1_RSYNC_MARK,
+        BBIF1_FLOW_MARK,        BB_RX_FLOW_N_MARK,
+
+        /* MSIOF4 */
+        BBIF2_TSCK1_MARK,       BBIF2_TSYNC1_MARK,
+        BBIF2_TXD1_MARK,        BBIF2_RXD_MARK,
+
+        /* FSI */
+        FSIACK_MARK,    FSIBCK_MARK,            FSIAILR_MARK,   FSIAIBT_MARK,
+        FSIAISLD_MARK,  FSIAOMC_MARK,           FSIAOLR_MARK,   FSIAOBT_MARK,
+        FSIAOSLD_MARK,  FSIASPDIF_11_MARK,      FSIASPDIF_15_MARK,
+
+        /* FMSI */
+        FMSOCK_MARK,    FMSOOLR_MARK,   FMSIOLR_MARK,   FMSOOBT_MARK,
+        FMSIOBT_MARK,   FMSOSLD_MARK,   FMSOILR_MARK,   FMSIILR_MARK,
+        FMSOIBT_MARK,   FMSIIBT_MARK,   FMSISLD_MARK,   FMSICK_MARK,
+
+        /* SCIFA0 */
+        SCIFA0_TXD_MARK,        SCIFA0_RXD_MARK,        SCIFA0_SCK_MARK,
+        SCIFA0_RTS_MARK,        SCIFA0_CTS_MARK,
+
+        /* SCIFA1 */
+        SCIFA1_TXD_MARK,        SCIFA1_RXD_MARK,        SCIFA1_SCK_MARK,
+        SCIFA1_RTS_MARK,        SCIFA1_CTS_MARK,
+
+        /* SCIFA2 */
+        SCIFA2_CTS1_MARK,       SCIFA2_RTS1_MARK,       SCIFA2_TXD1_MARK,
+        SCIFA2_RXD1_MARK,       SCIFA2_SCK1_MARK,
+
+        /* SCIFA3 */
+        SCIFA3_CTS_43_MARK,     SCIFA3_CTS_140_MARK,    SCIFA3_RTS_44_MARK,
+        SCIFA3_RTS_141_MARK,    SCIFA3_SCK_MARK,        SCIFA3_TXD_MARK,
+        SCIFA3_RXD_MARK,
+
+        /* SCIFA4 */
+        SCIFA4_RXD_MARK,        SCIFA4_TXD_MARK,
+
+        /* SCIFA5 */
+        SCIFA5_RXD_MARK,        SCIFA5_TXD_MARK,
+
+        /* SCIFB */
+        SCIFB_SCK_MARK, SCIFB_RTS_MARK, SCIFB_CTS_MARK,
+        SCIFB_TXD_MARK, SCIFB_RXD_MARK,
+
+        /* CEU */
+        VIO_HD_MARK,    VIO_CKO1_MARK,  VIO_CKO2_MARK,  VIO_VD_MARK,
+        VIO_CLK_MARK,   VIO_FIELD_MARK, VIO_CKO_MARK,
+        VIO_D0_MARK,    VIO_D1_MARK,    VIO_D2_MARK,    VIO_D3_MARK,
+        VIO_D4_MARK,    VIO_D5_MARK,    VIO_D6_MARK,    VIO_D7_MARK,
+        VIO_D8_MARK,    VIO_D9_MARK,    VIO_D10_MARK,   VIO_D11_MARK,
+        VIO_D12_MARK,   VIO_D13_MARK,   VIO_D14_MARK,   VIO_D15_MARK,
+
+        /* USB0 */
+        IDIN_0_MARK,    EXTLP_0_MARK,   OVCN2_0_MARK,   PWEN_0_MARK,
+        OVCN_0_MARK,    VBUS0_0_MARK,
+
+        /* USB1 */
+        IDIN_1_18_MARK,         IDIN_1_113_MARK,
+        PWEN_1_115_MARK,        PWEN_1_138_MARK,
+        OVCN_1_114_MARK,        OVCN_1_162_MARK,
+        EXTLP_1_MARK,           OVCN2_1_MARK,
+        VBUS0_1_MARK,
+
+        /* GPIO */
+        GPI0_MARK,      GPI1_MARK,      GPO0_MARK,      GPO1_MARK,
+
+        /* BSC */
+        BS_MARK,        WE1_MARK,
+        CKO_MARK,       WAIT_MARK,      RDWR_MARK,
+
+        A0_MARK,        A1_MARK,        A2_MARK,        A3_MARK,
+        A6_MARK,        A7_MARK,        A8_MARK,        A9_MARK,
+        A10_MARK,       A11_MARK,       A12_MARK,       A13_MARK,
+        A14_MARK,       A15_MARK,       A16_MARK,       A17_MARK,
+        A18_MARK,       A19_MARK,       A20_MARK,       A21_MARK,
+        A22_MARK,       A23_MARK,       A24_MARK,       A25_MARK,
+        A26_MARK,
+
+        CS0_MARK,       CS2_MARK,       CS4_MARK,
+        CS5A_MARK,      CS5B_MARK,      CS6A_MARK,
+
+        /* BSC/FLCTL */
+        RD_FSC_MARK,    WE0_FWE_MARK,   A4_FOE_MARK,    A5_FCDE_MARK,
+        D0_NAF0_MARK,   D1_NAF1_MARK,   D2_NAF2_MARK,   D3_NAF3_MARK,
+        D4_NAF4_MARK,   D5_NAF5_MARK,   D6_NAF6_MARK,   D7_NAF7_MARK,
+        D8_NAF8_MARK,   D9_NAF9_MARK,   D10_NAF10_MARK, D11_NAF11_MARK,
+        D12_NAF12_MARK, D13_NAF13_MARK, D14_NAF14_MARK, D15_NAF15_MARK,
+
+        /* MMCIF(1) */
+        MMCD0_0_MARK,   MMCD0_1_MARK,   MMCD0_2_MARK,   MMCD0_3_MARK,
+        MMCD0_4_MARK,   MMCD0_5_MARK,   MMCD0_6_MARK,   MMCD0_7_MARK,
+        MMCCMD0_MARK,   MMCCLK0_MARK,
+
+        /* MMCIF(2) */
+        MMCD1_0_MARK,   MMCD1_1_MARK,   MMCD1_2_MARK,   MMCD1_3_MARK,
+        MMCD1_4_MARK,   MMCD1_5_MARK,   MMCD1_6_MARK,   MMCD1_7_MARK,
+        MMCCLK1_MARK,   MMCCMD1_MARK,
+
+        /* SPU2 */
+        VINT_I_MARK,
+
+        /* FLCTL */
+        FCE1_MARK,      FCE0_MARK,      FRB_MARK,
+
+        /* HSI */
+        GP_RX_FLAG_MARK,        GP_RX_DATA_MARK,        GP_TX_READY_MARK,
+        GP_RX_WAKE_MARK,        MP_TX_FLAG_MARK,        MP_TX_DATA_MARK,
+        MP_RX_READY_MARK,       MP_TX_WAKE_MARK,
+
+        /* MFI */
+        MFIv6_MARK,
+        MFIv4_MARK,
+
+        MEMC_CS0_MARK,                  MEMC_BUSCLK_MEMC_A0_MARK,
+        MEMC_CS1_MEMC_A1_MARK,          MEMC_ADV_MEMC_DREQ0_MARK,
+        MEMC_WAIT_MEMC_DREQ1_MARK,      MEMC_NOE_MARK,
+        MEMC_NWE_MARK,                  MEMC_INT_MARK,
+
+        MEMC_AD0_MARK,  MEMC_AD1_MARK,  MEMC_AD2_MARK,
+        MEMC_AD3_MARK,  MEMC_AD4_MARK,  MEMC_AD5_MARK,
+        MEMC_AD6_MARK,  MEMC_AD7_MARK,  MEMC_AD8_MARK,
+        MEMC_AD9_MARK,  MEMC_AD10_MARK, MEMC_AD11_MARK,
+        MEMC_AD12_MARK, MEMC_AD13_MARK, MEMC_AD14_MARK,
+        MEMC_AD15_MARK,
+
+        /* SIM */
+        SIM_RST_MARK,   SIM_CLK_MARK,   SIM_D_MARK,
+
+        /* TPU */
+        TPU0TO0_MARK,           TPU0TO1_MARK,
+        TPU0TO2_93_MARK,        TPU0TO2_99_MARK,
+        TPU0TO3_MARK,
+
+        /* I2C2 */
+        I2C_SCL2_MARK,  I2C_SDA2_MARK,
+
+        /* I2C3(1) */
+        I2C_SCL3_MARK,  I2C_SDA3_MARK,
+
+        /* I2C3(2) */
+        I2C_SCL3S_MARK, I2C_SDA3S_MARK,
+
+        /* I2C4(2) */
+        I2C_SCL4_MARK,  I2C_SDA4_MARK,
+
+        /* I2C4(2) */
+        I2C_SCL4S_MARK, I2C_SDA4S_MARK,
+
+        /* KEYSC */
+        KEYOUT0_MARK,   KEYIN0_121_MARK,        KEYIN0_136_MARK,
+        KEYOUT1_MARK,   KEYIN1_122_MARK,        KEYIN1_135_MARK,
+        KEYOUT2_MARK,   KEYIN2_123_MARK,        KEYIN2_134_MARK,
+        KEYOUT3_MARK,   KEYIN3_124_MARK,        KEYIN3_133_MARK,
+        KEYOUT4_MARK,   KEYIN4_MARK,
+        KEYOUT5_MARK,   KEYIN5_MARK,
+        KEYOUT6_MARK,   KEYIN6_MARK,
+        KEYOUT7_MARK,   KEYIN7_MARK,
+
+        /* LCDC */
+        LCDC0_SELECT_MARK,
+        LCDC1_SELECT_MARK,
+        LCDHSYN_MARK,   LCDCS_MARK,     LCDVSYN_MARK,   LCDDCK_MARK,
+        LCDWR_MARK,     LCDRD_MARK,     LCDDISP_MARK,   LCDRS_MARK,
+        LCDLCLK_MARK,   LCDDON_MARK,
+
+        LCDD0_MARK,     LCDD1_MARK,     LCDD2_MARK,     LCDD3_MARK,
+        LCDD4_MARK,     LCDD5_MARK,     LCDD6_MARK,     LCDD7_MARK,
+        LCDD8_MARK,     LCDD9_MARK,     LCDD10_MARK,    LCDD11_MARK,
+        LCDD12_MARK,    LCDD13_MARK,    LCDD14_MARK,    LCDD15_MARK,
+        LCDD16_MARK,    LCDD17_MARK,    LCDD18_MARK,    LCDD19_MARK,
+        LCDD20_MARK,    LCDD21_MARK,    LCDD22_MARK,    LCDD23_MARK,
+
+        /* IRDA */
+        IRDA_OUT_MARK,  IRDA_IN_MARK,   IRDA_FIRSEL_MARK,
+        IROUT_139_MARK, IROUT_140_MARK,
+
+        /* TSIF1 */
+        TS0_1SELECT_MARK,
+        TS0_2SELECT_MARK,
+        TS1_1SELECT_MARK,
+        TS1_2SELECT_MARK,
+
+        TS_SPSYNC1_MARK,        TS_SDAT1_MARK,
+        TS_SDEN1_MARK,          TS_SCK1_MARK,
+
+        /* TSIF2 */
+        TS_SPSYNC2_MARK,        TS_SDAT2_MARK,
+        TS_SDEN2_MARK,          TS_SCK2_MARK,
+
+        /* HDMI */
+        HDMI_HPD_MARK,  HDMI_CEC_MARK,
+
+        /* SDHI0 */
+        SDHICLK0_MARK,  SDHICD0_MARK,
+        SDHICMD0_MARK,  SDHIWP0_MARK,
+        SDHID0_0_MARK,  SDHID0_1_MARK,
+        SDHID0_2_MARK,  SDHID0_3_MARK,
+
+        /* SDHI1 */
+        SDHICLK1_MARK,  SDHICMD1_MARK,  SDHID1_0_MARK,
+        SDHID1_1_MARK,  SDHID1_2_MARK,  SDHID1_3_MARK,
+
+        /* SDHI2 */
+        SDHICLK2_MARK,  SDHICMD2_MARK,  SDHID2_0_MARK,
+        SDHID2_1_MARK,  SDHID2_2_MARK,  SDHID2_3_MARK,
+
+        /* SDENC */
+        SDENC_CPG_MARK,
+        SDENC_DV_CLKI_MARK,
+
+        PINMUX_MARK_END,
+};
+
+/* PORT_DATA_I_PD(nr) */
+#define _I___D(nr)                           \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
+                    PORT##nr##_IN, PORT##nr##_IN_PD)
+
+/* PORT_DATA_I_PU(nr) */
+#define _I__U_(nr)                           \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
+                    PORT##nr##_IN, PORT##nr##_IN_PU)
+
+/* PORT_DATA_I_PU_PD(nr) */
+#define _I__UD(nr)                           \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
+                    PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
+
+/* PORT_DATA_O(nr) */
+#define __O___(nr)                                                      \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
+
+/* PORT_DATA_IO(nr) */
+#define _IO___(nr)                                   \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
+                    PORT##nr##_IN)
+
+/* PORT_DATA_IO_PD(nr) */
+#define _IO__D(nr)                                           \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
+                    PORT##nr##_IN, PORT##nr##_IN_PD)
+
+/* PORT_DATA_IO_PU(nr) */
+#define _IO_U_(nr)                                           \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
+                    PORT##nr##_IN, PORT##nr##_IN_PU)
+
+/* PORT_DATA_IO_PU_PD(nr) */
+#define _IO_UD(nr)                                           \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
+                    PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
+
+
+static pinmux_enum_t pinmux_data[] = {
+
+        /* specify valid pin states for each pin in GPIO mode */
+
+        _IO__D(0), _IO__D(1), __O___(2), _I___D(3), _I___D(4),
+        _I___D(5), _IO_UD(6), _I___D(7), _IO__D(8), __O___(9),
+
+        __O___(10), __O___(11), _IO_UD(12), _IO__D(13), _IO__D(14),
+        __O___(15), _IO__D(16), _IO__D(17), _I___D(18), _IO___(19),
+
+        _IO___(20), _IO___(21), _IO___(22), _IO___(23), _IO___(24),
+        _IO___(25), _IO___(26), _IO___(27), _IO___(28), _IO___(29),
+
+        _IO___(30), _IO___(31), _IO___(32), _IO___(33), _IO___(34),
+        _IO___(35), _IO___(36), _IO___(37), _IO___(38), _IO___(39),
+
+        _IO___(40), _IO___(41), _IO___(42), _IO___(43), _IO___(44),
+        _IO___(45), _IO_U_(46), _IO_U_(47), _IO_U_(48), _IO_U_(49),
+
+        _IO_U_(50), _IO_U_(51), _IO_U_(52), _IO_U_(53), _IO_U_(54),
+        _IO_U_(55), _IO_U_(56), _IO_U_(57), _IO_U_(58), _IO_U_(59),
+
+        _IO_U_(60), _IO_U_(61), _IO___(62), __O___(63), __O___(64),
+        _IO_U_(65), __O___(66), _IO_U_(67), __O___(68), _IO___(69), /*66?*/
+
+        _IO___(70), _IO___(71), __O___(72), _I__U_(73), _I__UD(74),
+        _IO_UD(75), _IO_UD(76), _IO_UD(77), _IO_UD(78), _IO_UD(79),
+
+        _IO_UD(80), _IO_UD(81), _IO_UD(82), _IO_UD(83), _IO_UD(84),
+        _IO_UD(85), _IO_UD(86), _IO_UD(87), _IO_UD(88), _IO_UD(89),
+
+        _IO_UD(90), _IO_UD(91), _IO_UD(92), _IO_UD(93), _IO_UD(94),
+        _IO_UD(95), _IO_U_(96), _IO_UD(97), _IO_UD(98), __O___(99), /*99?*/
+
+        _IO__D(100), _IO__D(101), _IO__D(102), _IO__D(103), _IO__D(104),
+        _IO__D(105), _IO_U_(106), _IO_U_(107), _IO_U_(108), _IO_U_(109),
+
+        _IO_U_(110), _IO_U_(111), _IO__D(112), _IO__D(113), _IO_U_(114),
+        _IO_U_(115), _IO_U_(116), _IO_U_(117), _IO_U_(118), _IO_U_(119),
+
+        _IO_U_(120), _IO__D(121), _IO__D(122), _IO__D(123), _IO__D(124),
+        _IO__D(125), _IO__D(126), _IO__D(127), _IO__D(128), _IO_UD(129),
+
+        _IO_UD(130), _IO_UD(131), _IO_UD(132), _IO_UD(133), _IO_UD(134),
+        _IO_UD(135), _IO__D(136), _IO__D(137), _IO__D(138), _IO__D(139),
+
+        _IO__D(140), _IO__D(141), _IO__D(142), _IO_UD(143), _IO__D(144),
+        _IO__D(145), _IO__D(146), _IO__D(147), _IO__D(148), _IO__D(149),
+
+        _IO__D(150), _IO__D(151), _IO_UD(152), _I___D(153), _IO_UD(154),
+        _I___D(155), _IO__D(156), _IO__D(157), _I___D(158), _IO__D(159),
+
+        __O___(160), _IO__D(161), _IO__D(162), _IO__D(163), _I___D(164),
+        _IO__D(165), _I___D(166), _I___D(167), _I___D(168), _I___D(169),
+
+        _I___D(170), __O___(171), _IO_UD(172), _IO_UD(173), _IO_UD(174),
+        _IO_UD(175), _IO_UD(176), _IO_UD(177), _IO_UD(178), __O___(179),
+
+        _IO_UD(180), _IO_UD(181), _IO_UD(182), _IO_UD(183), _IO_UD(184),
+        __O___(185), _IO_UD(186), _IO_UD(187), _IO_UD(188), _IO_UD(189),
+
+        _IO_UD(190),
+
+        /* IRQ */
+        PINMUX_DATA(IRQ0_6_MARK,        PORT6_FN0,      MSEL1CR_0_0),
+        PINMUX_DATA(IRQ0_162_MARK,      PORT162_FN0,    MSEL1CR_0_1),
+        PINMUX_DATA(IRQ1_MARK,          PORT12_FN0),
+        PINMUX_DATA(IRQ2_4_MARK,        PORT4_FN0,      MSEL1CR_2_0),
+        PINMUX_DATA(IRQ2_5_MARK,        PORT5_FN0,      MSEL1CR_2_1),
+        PINMUX_DATA(IRQ3_8_MARK,        PORT8_FN0,      MSEL1CR_3_0),
+        PINMUX_DATA(IRQ3_16_MARK,       PORT16_FN0,     MSEL1CR_3_1),
+        PINMUX_DATA(IRQ4_17_MARK,       PORT17_FN0,     MSEL1CR_4_0),
+        PINMUX_DATA(IRQ4_163_MARK,      PORT163_FN0,    MSEL1CR_4_1),
+        PINMUX_DATA(IRQ5_MARK,          PORT18_FN0),
+        PINMUX_DATA(IRQ6_39_MARK,       PORT39_FN0,     MSEL1CR_6_0),
+        PINMUX_DATA(IRQ6_164_MARK,      PORT164_FN0,    MSEL1CR_6_1),
+        PINMUX_DATA(IRQ7_40_MARK,       PORT40_FN0,     MSEL1CR_7_1),
+        PINMUX_DATA(IRQ7_167_MARK,      PORT167_FN0,    MSEL1CR_7_0),
+        PINMUX_DATA(IRQ8_41_MARK,       PORT41_FN0,     MSEL1CR_8_1),
+        PINMUX_DATA(IRQ8_168_MARK,      PORT168_FN0,    MSEL1CR_8_0),
+        PINMUX_DATA(IRQ9_42_MARK,       PORT42_FN0,     MSEL1CR_9_0),
+        PINMUX_DATA(IRQ9_169_MARK,      PORT169_FN0,    MSEL1CR_9_1),
+        PINMUX_DATA(IRQ10_MARK,         PORT65_FN0,     MSEL1CR_9_1),
+        PINMUX_DATA(IRQ11_MARK,         PORT67_FN0),
+        PINMUX_DATA(IRQ12_80_MARK,      PORT80_FN0,     MSEL1CR_12_0),
+        PINMUX_DATA(IRQ12_137_MARK,     PORT137_FN0,    MSEL1CR_12_1),
+        PINMUX_DATA(IRQ13_81_MARK,      PORT81_FN0,     MSEL1CR_13_0),
+        PINMUX_DATA(IRQ13_145_MARK,     PORT145_FN0,    MSEL1CR_13_1),
+        PINMUX_DATA(IRQ14_82_MARK,      PORT82_FN0,     MSEL1CR_14_0),
+        PINMUX_DATA(IRQ14_146_MARK,     PORT146_FN0,    MSEL1CR_14_1),
+        PINMUX_DATA(IRQ15_83_MARK,      PORT83_FN0,     MSEL1CR_15_0),
+        PINMUX_DATA(IRQ15_147_MARK,     PORT147_FN0,    MSEL1CR_15_1),
+        PINMUX_DATA(IRQ16_84_MARK,      PORT84_FN0,     MSEL1CR_16_0),
+        PINMUX_DATA(IRQ16_170_MARK,     PORT170_FN0,    MSEL1CR_16_1),
+        PINMUX_DATA(IRQ17_MARK,         PORT85_FN0),
+        PINMUX_DATA(IRQ18_MARK,         PORT86_FN0),
+        PINMUX_DATA(IRQ19_MARK,         PORT87_FN0),
+        PINMUX_DATA(IRQ20_MARK,         PORT92_FN0),
+        PINMUX_DATA(IRQ21_MARK,         PORT93_FN0),
+        PINMUX_DATA(IRQ22_MARK,         PORT94_FN0),
+        PINMUX_DATA(IRQ23_MARK,         PORT95_FN0),
+        PINMUX_DATA(IRQ24_MARK,         PORT112_FN0),
+        PINMUX_DATA(IRQ25_MARK,         PORT119_FN0),
+        PINMUX_DATA(IRQ26_121_MARK,     PORT121_FN0,    MSEL1CR_26_1),
+        PINMUX_DATA(IRQ26_172_MARK,     PORT172_FN0,    MSEL1CR_26_0),
+        PINMUX_DATA(IRQ27_122_MARK,     PORT122_FN0,    MSEL1CR_27_1),
+        PINMUX_DATA(IRQ27_180_MARK,     PORT180_FN0,    MSEL1CR_27_0),
+        PINMUX_DATA(IRQ28_123_MARK,     PORT123_FN0,    MSEL1CR_28_1),
+        PINMUX_DATA(IRQ28_181_MARK,     PORT181_FN0,    MSEL1CR_28_0),
+        PINMUX_DATA(IRQ29_129_MARK,     PORT129_FN0,    MSEL1CR_29_1),
+        PINMUX_DATA(IRQ29_182_MARK,     PORT182_FN0,    MSEL1CR_29_0),
+        PINMUX_DATA(IRQ30_130_MARK,     PORT130_FN0,    MSEL1CR_30_1),
+        PINMUX_DATA(IRQ30_183_MARK,     PORT183_FN0,    MSEL1CR_30_0),
+        PINMUX_DATA(IRQ31_138_MARK,     PORT138_FN0,    MSEL1CR_31_1),
+        PINMUX_DATA(IRQ31_184_MARK,     PORT184_FN0,    MSEL1CR_31_0),
+
+        /* Function 1 */
+        PINMUX_DATA(BBIF2_TSCK1_MARK,           PORT0_FN1),
+        PINMUX_DATA(BBIF2_TSYNC1_MARK,          PORT1_FN1),
+        PINMUX_DATA(BBIF2_TXD1_MARK,            PORT2_FN1),
+        PINMUX_DATA(BBIF2_RXD_MARK,             PORT3_FN1),
+        PINMUX_DATA(FSIACK_MARK,                PORT4_FN1),
+        PINMUX_DATA(FSIAILR_MARK,               PORT5_FN1),
+        PINMUX_DATA(FSIAIBT_MARK,               PORT6_FN1),
+        PINMUX_DATA(FSIAISLD_MARK,              PORT7_FN1),
+        PINMUX_DATA(FSIAOMC_MARK,               PORT8_FN1),
+        PINMUX_DATA(FSIAOLR_MARK,               PORT9_FN1),
+        PINMUX_DATA(FSIAOBT_MARK,               PORT10_FN1),
+        PINMUX_DATA(FSIAOSLD_MARK,              PORT11_FN1),
+        PINMUX_DATA(FMSOCK_MARK,                PORT12_FN1),
+        PINMUX_DATA(FMSOOLR_MARK,               PORT13_FN1),
+        PINMUX_DATA(FMSOOBT_MARK,               PORT14_FN1),
+        PINMUX_DATA(FMSOSLD_MARK,               PORT15_FN1),
+        PINMUX_DATA(FMSOILR_MARK,               PORT16_FN1),
+        PINMUX_DATA(FMSOIBT_MARK,               PORT17_FN1),
+        PINMUX_DATA(FMSISLD_MARK,               PORT18_FN1),
+        PINMUX_DATA(A0_MARK,                    PORT19_FN1),
+        PINMUX_DATA(A1_MARK,                    PORT20_FN1),
+        PINMUX_DATA(A2_MARK,                    PORT21_FN1),
+        PINMUX_DATA(A3_MARK,                    PORT22_FN1),
+        PINMUX_DATA(A4_FOE_MARK,                PORT23_FN1),
+        PINMUX_DATA(A5_FCDE_MARK,               PORT24_FN1),
+        PINMUX_DATA(A6_MARK,                    PORT25_FN1),
+        PINMUX_DATA(A7_MARK,                    PORT26_FN1),
+        PINMUX_DATA(A8_MARK,                    PORT27_FN1),
+        PINMUX_DATA(A9_MARK,                    PORT28_FN1),
+        PINMUX_DATA(A10_MARK,                   PORT29_FN1),
+        PINMUX_DATA(A11_MARK,                   PORT30_FN1),
+        PINMUX_DATA(A12_MARK,                   PORT31_FN1),
+        PINMUX_DATA(A13_MARK,                   PORT32_FN1),
+        PINMUX_DATA(A14_MARK,                   PORT33_FN1),
+        PINMUX_DATA(A15_MARK,                   PORT34_FN1),
+        PINMUX_DATA(A16_MARK,                   PORT35_FN1),
+        PINMUX_DATA(A17_MARK,                   PORT36_FN1),
+        PINMUX_DATA(A18_MARK,                   PORT37_FN1),
+        PINMUX_DATA(A19_MARK,                   PORT38_FN1),
+        PINMUX_DATA(A20_MARK,                   PORT39_FN1),
+        PINMUX_DATA(A21_MARK,                   PORT40_FN1),
+        PINMUX_DATA(A22_MARK,                   PORT41_FN1),
+        PINMUX_DATA(A23_MARK,                   PORT42_FN1),
+        PINMUX_DATA(A24_MARK,                   PORT43_FN1),
+        PINMUX_DATA(A25_MARK,                   PORT44_FN1),
+        PINMUX_DATA(A26_MARK,                   PORT45_FN1),
+        PINMUX_DATA(D0_NAF0_MARK,               PORT46_FN1),
+        PINMUX_DATA(D1_NAF1_MARK,               PORT47_FN1),
+        PINMUX_DATA(D2_NAF2_MARK,               PORT48_FN1),
+        PINMUX_DATA(D3_NAF3_MARK,               PORT49_FN1),
+        PINMUX_DATA(D4_NAF4_MARK,               PORT50_FN1),
+        PINMUX_DATA(D5_NAF5_MARK,               PORT51_FN1),
+        PINMUX_DATA(D6_NAF6_MARK,               PORT52_FN1),
+        PINMUX_DATA(D7_NAF7_MARK,               PORT53_FN1),
+        PINMUX_DATA(D8_NAF8_MARK,               PORT54_FN1),
+        PINMUX_DATA(D9_NAF9_MARK,               PORT55_FN1),
+        PINMUX_DATA(D10_NAF10_MARK,             PORT56_FN1),
+        PINMUX_DATA(D11_NAF11_MARK,             PORT57_FN1),
+        PINMUX_DATA(D12_NAF12_MARK,             PORT58_FN1),
+        PINMUX_DATA(D13_NAF13_MARK,             PORT59_FN1),
+        PINMUX_DATA(D14_NAF14_MARK,             PORT60_FN1),
+        PINMUX_DATA(D15_NAF15_MARK,             PORT61_FN1),
+        PINMUX_DATA(CS0_MARK,                   PORT62_FN1),
+        PINMUX_DATA(CS2_MARK,                   PORT63_FN1),
+        PINMUX_DATA(CS4_MARK,                   PORT64_FN1),
+        PINMUX_DATA(CS5A_MARK,                  PORT65_FN1),
+        PINMUX_DATA(CS5B_MARK,                  PORT66_FN1),
+        PINMUX_DATA(CS6A_MARK,                  PORT67_FN1),
+        PINMUX_DATA(FCE0_MARK,                  PORT68_FN1),
+        PINMUX_DATA(RD_FSC_MARK,                PORT69_FN1),
+        PINMUX_DATA(WE0_FWE_MARK,               PORT70_FN1),
+        PINMUX_DATA(WE1_MARK,                   PORT71_FN1),
+        PINMUX_DATA(CKO_MARK,                   PORT72_FN1),
+        PINMUX_DATA(FRB_MARK,                   PORT73_FN1),
+        PINMUX_DATA(WAIT_MARK,                  PORT74_FN1),
+        PINMUX_DATA(RDWR_MARK,                  PORT75_FN1),
+        PINMUX_DATA(MEMC_AD0_MARK,              PORT76_FN1),
+        PINMUX_DATA(MEMC_AD1_MARK,              PORT77_FN1),
+        PINMUX_DATA(MEMC_AD2_MARK,              PORT78_FN1),
+        PINMUX_DATA(MEMC_AD3_MARK,              PORT79_FN1),
+        PINMUX_DATA(MEMC_AD4_MARK,              PORT80_FN1),
+        PINMUX_DATA(MEMC_AD5_MARK,              PORT81_FN1),
+        PINMUX_DATA(MEMC_AD6_MARK,              PORT82_FN1),
+        PINMUX_DATA(MEMC_AD7_MARK,              PORT83_FN1),
+        PINMUX_DATA(MEMC_AD8_MARK,              PORT84_FN1),
+        PINMUX_DATA(MEMC_AD9_MARK,              PORT85_FN1),
+        PINMUX_DATA(MEMC_AD10_MARK,             PORT86_FN1),
+        PINMUX_DATA(MEMC_AD11_MARK,             PORT87_FN1),
+        PINMUX_DATA(MEMC_AD12_MARK,             PORT88_FN1),
+        PINMUX_DATA(MEMC_AD13_MARK,             PORT89_FN1),
+        PINMUX_DATA(MEMC_AD14_MARK,             PORT90_FN1),
+        PINMUX_DATA(MEMC_AD15_MARK,             PORT91_FN1),
+        PINMUX_DATA(MEMC_CS0_MARK,              PORT92_FN1),
+        PINMUX_DATA(MEMC_BUSCLK_MEMC_A0_MARK,   PORT93_FN1),
+        PINMUX_DATA(MEMC_CS1_MEMC_A1_MARK,      PORT94_FN1),
+        PINMUX_DATA(MEMC_ADV_MEMC_DREQ0_MARK,   PORT95_FN1),
+        PINMUX_DATA(MEMC_WAIT_MEMC_DREQ1_MARK,  PORT96_FN1),
+        PINMUX_DATA(MEMC_NOE_MARK,              PORT97_FN1),
+        PINMUX_DATA(MEMC_NWE_MARK,              PORT98_FN1),
+        PINMUX_DATA(MEMC_INT_MARK,              PORT99_FN1),
+        PINMUX_DATA(VIO_VD_MARK,                PORT100_FN1),
+        PINMUX_DATA(VIO_HD_MARK,                PORT101_FN1),
+        PINMUX_DATA(VIO_D0_MARK,                PORT102_FN1),
+        PINMUX_DATA(VIO_D1_MARK,                PORT103_FN1),
+        PINMUX_DATA(VIO_D2_MARK,                PORT104_FN1),
+        PINMUX_DATA(VIO_D3_MARK,                PORT105_FN1),
+        PINMUX_DATA(VIO_D4_MARK,                PORT106_FN1),
+        PINMUX_DATA(VIO_D5_MARK,                PORT107_FN1),
+        PINMUX_DATA(VIO_D6_MARK,                PORT108_FN1),
+        PINMUX_DATA(VIO_D7_MARK,                PORT109_FN1),
+        PINMUX_DATA(VIO_D8_MARK,                PORT110_FN1),
+        PINMUX_DATA(VIO_D9_MARK,                PORT111_FN1),
+        PINMUX_DATA(VIO_D10_MARK,               PORT112_FN1),
+        PINMUX_DATA(VIO_D11_MARK,               PORT113_FN1),
+        PINMUX_DATA(VIO_D12_MARK,               PORT114_FN1),
+        PINMUX_DATA(VIO_D13_MARK,               PORT115_FN1),
+        PINMUX_DATA(VIO_D14_MARK,               PORT116_FN1),
+        PINMUX_DATA(VIO_D15_MARK,               PORT117_FN1),
+        PINMUX_DATA(VIO_CLK_MARK,               PORT118_FN1),
+        PINMUX_DATA(VIO_FIELD_MARK,             PORT119_FN1),
+        PINMUX_DATA(VIO_CKO_MARK,               PORT120_FN1),
+        PINMUX_DATA(LCDD0_MARK,                 PORT121_FN1),
+        PINMUX_DATA(LCDD1_MARK,                 PORT122_FN1),
+        PINMUX_DATA(LCDD2_MARK,                 PORT123_FN1),
+        PINMUX_DATA(LCDD3_MARK,                 PORT124_FN1),
+        PINMUX_DATA(LCDD4_MARK,                 PORT125_FN1),
+        PINMUX_DATA(LCDD5_MARK,                 PORT126_FN1),
+        PINMUX_DATA(LCDD6_MARK,                 PORT127_FN1),
+        PINMUX_DATA(LCDD7_MARK,                 PORT128_FN1),
+        PINMUX_DATA(LCDD8_MARK,                 PORT129_FN1),
+        PINMUX_DATA(LCDD9_MARK,                 PORT130_FN1),
+        PINMUX_DATA(LCDD10_MARK,                PORT131_FN1),
+        PINMUX_DATA(LCDD11_MARK,                PORT132_FN1),
+        PINMUX_DATA(LCDD12_MARK,                PORT133_FN1),
+        PINMUX_DATA(LCDD13_MARK,                PORT134_FN1),
+        PINMUX_DATA(LCDD14_MARK,                PORT135_FN1),
+        PINMUX_DATA(LCDD15_MARK,                PORT136_FN1),
+        PINMUX_DATA(LCDD16_MARK,                PORT137_FN1),
+        PINMUX_DATA(LCDD17_MARK,                PORT138_FN1),
+        PINMUX_DATA(LCDD18_MARK,                PORT139_FN1),
+        PINMUX_DATA(LCDD19_MARK,                PORT140_FN1),
+        PINMUX_DATA(LCDD20_MARK,                PORT141_FN1),
+        PINMUX_DATA(LCDD21_MARK,                PORT142_FN1),
+        PINMUX_DATA(LCDD22_MARK,                PORT143_FN1),
+        PINMUX_DATA(LCDD23_MARK,                PORT144_FN1),
+        PINMUX_DATA(LCDHSYN_MARK,               PORT145_FN1),
+        PINMUX_DATA(LCDVSYN_MARK,               PORT146_FN1),
+        PINMUX_DATA(LCDDCK_MARK,                PORT147_FN1),
+        PINMUX_DATA(LCDRD_MARK,                 PORT148_FN1),
+        PINMUX_DATA(LCDDISP_MARK,               PORT149_FN1),
+        PINMUX_DATA(LCDLCLK_MARK,               PORT150_FN1),
+        PINMUX_DATA(LCDDON_MARK,                PORT151_FN1),
+        PINMUX_DATA(SCIFA0_TXD_MARK,            PORT152_FN1),
+        PINMUX_DATA(SCIFA0_RXD_MARK,            PORT153_FN1),
+        PINMUX_DATA(SCIFA1_TXD_MARK,            PORT154_FN1),
+        PINMUX_DATA(SCIFA1_RXD_MARK,            PORT155_FN1),
+        PINMUX_DATA(TS_SPSYNC1_MARK,            PORT156_FN1),
+        PINMUX_DATA(TS_SDAT1_MARK,              PORT157_FN1),
+        PINMUX_DATA(TS_SDEN1_MARK,              PORT158_FN1),
+        PINMUX_DATA(TS_SCK1_MARK,               PORT159_FN1),
+        PINMUX_DATA(TPU0TO0_MARK,               PORT160_FN1),
+        PINMUX_DATA(TPU0TO1_MARK,               PORT161_FN1),
+        PINMUX_DATA(SCIFB_SCK_MARK,             PORT162_FN1),
+        PINMUX_DATA(SCIFB_RTS_MARK,             PORT163_FN1),
+        PINMUX_DATA(SCIFB_CTS_MARK,             PORT164_FN1),
+        PINMUX_DATA(SCIFB_TXD_MARK,             PORT165_FN1),
+        PINMUX_DATA(SCIFB_RXD_MARK,             PORT166_FN1),
+        PINMUX_DATA(VBUS0_0_MARK,               PORT167_FN1),
+        PINMUX_DATA(VBUS0_1_MARK,               PORT168_FN1),
+        PINMUX_DATA(HDMI_HPD_MARK,              PORT169_FN1),
+        PINMUX_DATA(HDMI_CEC_MARK,              PORT170_FN1),
+        PINMUX_DATA(SDHICLK0_MARK,              PORT171_FN1),
+        PINMUX_DATA(SDHICD0_MARK,               PORT172_FN1),
+        PINMUX_DATA(SDHID0_0_MARK,              PORT173_FN1),
+        PINMUX_DATA(SDHID0_1_MARK,              PORT174_FN1),
+        PINMUX_DATA(SDHID0_2_MARK,              PORT175_FN1),
+        PINMUX_DATA(SDHID0_3_MARK,              PORT176_FN1),
+        PINMUX_DATA(SDHICMD0_MARK,              PORT177_FN1),
+        PINMUX_DATA(SDHIWP0_MARK,               PORT178_FN1),
+        PINMUX_DATA(SDHICLK1_MARK,              PORT179_FN1),
+        PINMUX_DATA(SDHID1_0_MARK,              PORT180_FN1),
+        PINMUX_DATA(SDHID1_1_MARK,              PORT181_FN1),
+        PINMUX_DATA(SDHID1_2_MARK,              PORT182_FN1),
+        PINMUX_DATA(SDHID1_3_MARK,              PORT183_FN1),
+        PINMUX_DATA(SDHICMD1_MARK,              PORT184_FN1),
+        PINMUX_DATA(SDHICLK2_MARK,              PORT185_FN1),
+        PINMUX_DATA(SDHID2_0_MARK,              PORT186_FN1),
+        PINMUX_DATA(SDHID2_1_MARK,              PORT187_FN1),
+        PINMUX_DATA(SDHID2_2_MARK,              PORT188_FN1),
+        PINMUX_DATA(SDHID2_3_MARK,              PORT189_FN1),
+        PINMUX_DATA(SDHICMD2_MARK,              PORT190_FN1),
+
+        /* Function 2 */
+        PINMUX_DATA(FSIBCK_MARK,                PORT4_FN2),
+        PINMUX_DATA(SCIFA4_RXD_MARK,            PORT5_FN2),
+        PINMUX_DATA(SCIFA4_TXD_MARK,            PORT6_FN2),
+        PINMUX_DATA(SCIFA5_RXD_MARK,            PORT8_FN2),
+        PINMUX_DATA(FSIASPDIF_11_MARK,          PORT11_FN2),
+        PINMUX_DATA(SCIFA5_TXD_MARK,            PORT12_FN2),
+        PINMUX_DATA(FMSIOLR_MARK,               PORT13_FN2),
+        PINMUX_DATA(FMSIOBT_MARK,               PORT14_FN2),
+        PINMUX_DATA(FSIASPDIF_15_MARK,          PORT15_FN2),
+        PINMUX_DATA(FMSIILR_MARK,               PORT16_FN2),
+        PINMUX_DATA(FMSIIBT_MARK,               PORT17_FN2),
+        PINMUX_DATA(BS_MARK,                    PORT19_FN2),
+        PINMUX_DATA(MSIOF0_TSYNC_MARK,          PORT36_FN2),
+        PINMUX_DATA(MSIOF0_TSCK_MARK,           PORT37_FN2),
+        PINMUX_DATA(MSIOF0_RXD_MARK,            PORT38_FN2),
+        PINMUX_DATA(MSIOF0_RSCK_MARK,           PORT39_FN2),
+        PINMUX_DATA(MSIOF0_RSYNC_MARK,          PORT40_FN2),
+        PINMUX_DATA(MSIOF0_MCK0_MARK,           PORT41_FN2),
+        PINMUX_DATA(MSIOF0_MCK1_MARK,           PORT42_FN2),
+        PINMUX_DATA(MSIOF0_SS1_MARK,            PORT43_FN2),
+        PINMUX_DATA(MSIOF0_SS2_MARK,            PORT44_FN2),
+        PINMUX_DATA(MSIOF0_TXD_MARK,            PORT45_FN2),
+        PINMUX_DATA(FMSICK_MARK,                PORT65_FN2),
+        PINMUX_DATA(FCE1_MARK,                  PORT66_FN2),
+        PINMUX_DATA(BBIF1_RXD_MARK,             PORT76_FN2),
+        PINMUX_DATA(BBIF1_TSYNC_MARK,           PORT77_FN2),
+        PINMUX_DATA(BBIF1_TSCK_MARK,            PORT78_FN2),
+        PINMUX_DATA(BBIF1_TXD_MARK,             PORT79_FN2),
+        PINMUX_DATA(BBIF1_RSCK_MARK,            PORT80_FN2),
+        PINMUX_DATA(BBIF1_RSYNC_MARK,           PORT81_FN2),
+        PINMUX_DATA(BBIF1_FLOW_MARK,            PORT82_FN2),
+        PINMUX_DATA(BB_RX_FLOW_N_MARK,          PORT83_FN2),
+        PINMUX_DATA(MSIOF1_RSCK_MARK,           PORT84_FN2),
+        PINMUX_DATA(MSIOF1_RSYNC_MARK,          PORT85_FN2),
+        PINMUX_DATA(MSIOF1_MCK0_MARK,           PORT86_FN2),
+        PINMUX_DATA(MSIOF1_MCK1_MARK,           PORT87_FN2),
+        PINMUX_DATA(MSIOF1_TSCK_88_MARK,        PORT88_FN2, MSEL4CR_10_1),
+        PINMUX_DATA(MSIOF1_TSYNC_89_MARK,       PORT89_FN2, MSEL4CR_10_1),
+        PINMUX_DATA(MSIOF1_TXD_90_MARK,         PORT90_FN2, MSEL4CR_10_1),
+        PINMUX_DATA(MSIOF1_RXD_91_MARK,         PORT91_FN2, MSEL4CR_10_1),
+        PINMUX_DATA(MSIOF1_SS1_92_MARK,         PORT92_FN2, MSEL4CR_10_1),
+        PINMUX_DATA(MSIOF1_SS2_93_MARK,         PORT93_FN2, MSEL4CR_10_1),
+        PINMUX_DATA(SCIFA2_CTS1_MARK,           PORT94_FN2),
+        PINMUX_DATA(SCIFA2_RTS1_MARK,           PORT95_FN2),
+        PINMUX_DATA(SCIFA2_TXD1_MARK,           PORT96_FN2),
+        PINMUX_DATA(SCIFA2_RXD1_MARK,           PORT97_FN2),
+        PINMUX_DATA(SCIFA2_SCK1_MARK,           PORT98_FN2),
+        PINMUX_DATA(I2C_SCL2_MARK,              PORT110_FN2),
+        PINMUX_DATA(I2C_SDA2_MARK,              PORT111_FN2),
+        PINMUX_DATA(I2C_SCL3_MARK,              PORT114_FN2, MSEL4CR_16_1),
+        PINMUX_DATA(I2C_SDA3_MARK,              PORT115_FN2, MSEL4CR_16_1),
+        PINMUX_DATA(I2C_SCL4_MARK,              PORT116_FN2, MSEL4CR_17_1),
+        PINMUX_DATA(I2C_SDA4_MARK,              PORT117_FN2, MSEL4CR_17_1),
+        PINMUX_DATA(MSIOF2_RSCK_MARK,           PORT134_FN2),
+        PINMUX_DATA(MSIOF2_RSYNC_MARK,          PORT135_FN2),
+        PINMUX_DATA(MSIOF2_MCK0_MARK,           PORT136_FN2),
+        PINMUX_DATA(MSIOF2_MCK1_MARK,           PORT137_FN2),
+        PINMUX_DATA(MSIOF2_SS1_MARK,            PORT138_FN2),
+        PINMUX_DATA(MSIOF2_SS2_MARK,            PORT139_FN2),
+        PINMUX_DATA(SCIFA3_CTS_140_MARK,        PORT140_FN2, MSEL3CR_9_1),
+        PINMUX_DATA(SCIFA3_RTS_141_MARK,        PORT141_FN2),
+        PINMUX_DATA(SCIFA3_SCK_MARK,            PORT142_FN2),
+        PINMUX_DATA(SCIFA3_TXD_MARK,            PORT143_FN2),
+        PINMUX_DATA(SCIFA3_RXD_MARK,            PORT144_FN2),
+        PINMUX_DATA(MSIOF2_TSYNC_MARK,          PORT148_FN2),
+        PINMUX_DATA(MSIOF2_TSCK_MARK,           PORT149_FN2),
+        PINMUX_DATA(MSIOF2_RXD_MARK,            PORT150_FN2),
+        PINMUX_DATA(MSIOF2_TXD_MARK,            PORT151_FN2),
+        PINMUX_DATA(SCIFA0_SCK_MARK,            PORT156_FN2),
+        PINMUX_DATA(SCIFA0_RTS_MARK,            PORT157_FN2),
+        PINMUX_DATA(SCIFA0_CTS_MARK,            PORT158_FN2),
+        PINMUX_DATA(SCIFA1_SCK_MARK,            PORT159_FN2),
+        PINMUX_DATA(SCIFA1_RTS_MARK,            PORT160_FN2),
+        PINMUX_DATA(SCIFA1_CTS_MARK,            PORT161_FN2),
+
+        /* Function 3 */
+        PINMUX_DATA(VIO_CKO1_MARK,              PORT16_FN3),
+        PINMUX_DATA(VIO_CKO2_MARK,              PORT17_FN3),
+        PINMUX_DATA(IDIN_1_18_MARK,             PORT18_FN3, MSEL4CR_14_1),
+        PINMUX_DATA(MSIOF1_TSCK_39_MARK,        PORT39_FN3, MSEL4CR_10_0),
+        PINMUX_DATA(MSIOF1_TSYNC_40_MARK,       PORT40_FN3, MSEL4CR_10_0),
+        PINMUX_DATA(MSIOF1_TXD_41_MARK,         PORT41_FN3, MSEL4CR_10_0),
+        PINMUX_DATA(MSIOF1_RXD_42_MARK,         PORT42_FN3, MSEL4CR_10_0),
+        PINMUX_DATA(MSIOF1_SS1_43_MARK,         PORT43_FN3, MSEL4CR_10_0),
+        PINMUX_DATA(MSIOF1_SS2_44_MARK,         PORT44_FN3, MSEL4CR_10_0),
+        PINMUX_DATA(MMCD1_0_MARK,               PORT54_FN3, MSEL4CR_15_1),
+        PINMUX_DATA(MMCD1_1_MARK,               PORT55_FN3, MSEL4CR_15_1),
+        PINMUX_DATA(MMCD1_2_MARK,               PORT56_FN3, MSEL4CR_15_1),
+        PINMUX_DATA(MMCD1_3_MARK,               PORT57_FN3, MSEL4CR_15_1),
+        PINMUX_DATA(MMCD1_4_MARK,               PORT58_FN3, MSEL4CR_15_1),
+        PINMUX_DATA(MMCD1_5_MARK,               PORT59_FN3, MSEL4CR_15_1),
+        PINMUX_DATA(MMCD1_6_MARK,               PORT60_FN3, MSEL4CR_15_1),
+        PINMUX_DATA(MMCD1_7_MARK,               PORT61_FN3, MSEL4CR_15_1),
+        PINMUX_DATA(VINT_I_MARK,                PORT65_FN3),
+        PINMUX_DATA(MMCCLK1_MARK,               PORT66_FN3, MSEL4CR_15_1),
+        PINMUX_DATA(MMCCMD1_MARK,               PORT67_FN3, MSEL4CR_15_1),
+        PINMUX_DATA(TPU0TO2_93_MARK,            PORT93_FN3),
+        PINMUX_DATA(TPU0TO2_99_MARK,            PORT99_FN3),
+        PINMUX_DATA(TPU0TO3_MARK,               PORT112_FN3),
+        PINMUX_DATA(IDIN_0_MARK,                PORT113_FN3),
+        PINMUX_DATA(EXTLP_0_MARK,               PORT114_FN3),
+        PINMUX_DATA(OVCN2_0_MARK,               PORT115_FN3),
+        PINMUX_DATA(PWEN_0_MARK,                PORT116_FN3),
+        PINMUX_DATA(OVCN_0_MARK,                PORT117_FN3),
+        PINMUX_DATA(KEYOUT7_MARK,               PORT121_FN3),
+        PINMUX_DATA(KEYOUT6_MARK,               PORT122_FN3),
+        PINMUX_DATA(KEYOUT5_MARK,               PORT123_FN3),
+        PINMUX_DATA(KEYOUT4_MARK,               PORT124_FN3),
+        PINMUX_DATA(KEYOUT3_MARK,               PORT125_FN3),
+        PINMUX_DATA(KEYOUT2_MARK,               PORT126_FN3),
+        PINMUX_DATA(KEYOUT1_MARK,               PORT127_FN3),
+        PINMUX_DATA(KEYOUT0_MARK,               PORT128_FN3),
+        PINMUX_DATA(KEYIN7_MARK,                PORT129_FN3),
+        PINMUX_DATA(KEYIN6_MARK,                PORT130_FN3),
+        PINMUX_DATA(KEYIN5_MARK,                PORT131_FN3),
+        PINMUX_DATA(KEYIN4_MARK,                PORT132_FN3),
+        PINMUX_DATA(KEYIN3_133_MARK,            PORT133_FN3, MSEL4CR_18_0),
+        PINMUX_DATA(KEYIN2_134_MARK,            PORT134_FN3, MSEL4CR_18_0),
+        PINMUX_DATA(KEYIN1_135_MARK,            PORT135_FN3, MSEL4CR_18_0),
+        PINMUX_DATA(KEYIN0_136_MARK,            PORT136_FN3, MSEL4CR_18_0),
+        PINMUX_DATA(TS_SPSYNC2_MARK,            PORT137_FN3),
+        PINMUX_DATA(IROUT_139_MARK,             PORT139_FN3),
+        PINMUX_DATA(IRDA_OUT_MARK,              PORT140_FN3),
+        PINMUX_DATA(IRDA_IN_MARK,               PORT141_FN3),
+        PINMUX_DATA(IRDA_FIRSEL_MARK,           PORT142_FN3),
+        PINMUX_DATA(TS_SDAT2_MARK,              PORT145_FN3),
+        PINMUX_DATA(TS_SDEN2_MARK,              PORT146_FN3),
+        PINMUX_DATA(TS_SCK2_MARK,               PORT147_FN3),
+
+        /* Function 4 */
+        PINMUX_DATA(SCIFA3_CTS_43_MARK, PORT43_FN4, MSEL3CR_9_0),
+        PINMUX_DATA(SCIFA3_RTS_44_MARK, PORT44_FN4),
+        PINMUX_DATA(GP_RX_FLAG_MARK,    PORT76_FN4),
+        PINMUX_DATA(GP_RX_DATA_MARK,    PORT77_FN4),
+        PINMUX_DATA(GP_TX_READY_MARK,   PORT78_FN4),
+        PINMUX_DATA(GP_RX_WAKE_MARK,    PORT79_FN4),
+        PINMUX_DATA(MP_TX_FLAG_MARK,    PORT80_FN4),
+        PINMUX_DATA(MP_TX_DATA_MARK,    PORT81_FN4),
+        PINMUX_DATA(MP_RX_READY_MARK,   PORT82_FN4),
+        PINMUX_DATA(MP_TX_WAKE_MARK,    PORT83_FN4),
+        PINMUX_DATA(MMCD0_0_MARK,       PORT84_FN4, MSEL4CR_15_0),
+        PINMUX_DATA(MMCD0_1_MARK,       PORT85_FN4, MSEL4CR_15_0),
+        PINMUX_DATA(MMCD0_2_MARK,       PORT86_FN4, MSEL4CR_15_0),
+        PINMUX_DATA(MMCD0_3_MARK,       PORT87_FN4, MSEL4CR_15_0),
+        PINMUX_DATA(MMCD0_4_MARK,       PORT88_FN4, MSEL4CR_15_0),
+        PINMUX_DATA(MMCD0_5_MARK,       PORT89_FN4, MSEL4CR_15_0),
+        PINMUX_DATA(MMCD0_6_MARK,       PORT90_FN4, MSEL4CR_15_0),
+        PINMUX_DATA(MMCD0_7_MARK,       PORT91_FN4, MSEL4CR_15_0),
+        PINMUX_DATA(MMCCMD0_MARK,       PORT92_FN4, MSEL4CR_15_0),
+        PINMUX_DATA(SIM_RST_MARK,       PORT94_FN4),
+        PINMUX_DATA(SIM_CLK_MARK,       PORT95_FN4),
+        PINMUX_DATA(SIM_D_MARK,         PORT98_FN4),
+        PINMUX_DATA(MMCCLK0_MARK,       PORT99_FN4, MSEL4CR_15_0),
+        PINMUX_DATA(IDIN_1_113_MARK,    PORT113_FN4, MSEL4CR_14_0),
+        PINMUX_DATA(OVCN_1_114_MARK,    PORT114_FN4, MSEL4CR_14_0),
+        PINMUX_DATA(PWEN_1_115_MARK,    PORT115_FN4),
+        PINMUX_DATA(EXTLP_1_MARK,       PORT116_FN4),
+        PINMUX_DATA(OVCN2_1_MARK,       PORT117_FN4),
+        PINMUX_DATA(KEYIN0_121_MARK,    PORT121_FN4, MSEL4CR_18_1),
+        PINMUX_DATA(KEYIN1_122_MARK,    PORT122_FN4, MSEL4CR_18_1),
+        PINMUX_DATA(KEYIN2_123_MARK,    PORT123_FN4, MSEL4CR_18_1),
+        PINMUX_DATA(KEYIN3_124_MARK,    PORT124_FN4, MSEL4CR_18_1),
+        PINMUX_DATA(PWEN_1_138_MARK,    PORT138_FN4),
+        PINMUX_DATA(IROUT_140_MARK,     PORT140_FN4),
+        PINMUX_DATA(LCDCS_MARK,         PORT145_FN4),
+        PINMUX_DATA(LCDWR_MARK,         PORT147_FN4),
+        PINMUX_DATA(LCDRS_MARK,         PORT149_FN4),
+        PINMUX_DATA(OVCN_1_162_MARK,    PORT162_FN4, MSEL4CR_14_1),
+
+        /* Function 5 */
+        PINMUX_DATA(GPI0_MARK,          PORT41_FN5),
+        PINMUX_DATA(GPI1_MARK,          PORT42_FN5),
+        PINMUX_DATA(GPO0_MARK,          PORT43_FN5),
+        PINMUX_DATA(GPO1_MARK,          PORT44_FN5),
+        PINMUX_DATA(I2C_SCL3S_MARK,     PORT137_FN5, MSEL4CR_16_0),
+        PINMUX_DATA(I2C_SDA3S_MARK,     PORT145_FN5, MSEL4CR_16_0),
+        PINMUX_DATA(I2C_SCL4S_MARK,     PORT146_FN5, MSEL4CR_17_0),
+        PINMUX_DATA(I2C_SDA4S_MARK,     PORT147_FN5, MSEL4CR_17_0),
+
+        /* Function select */
+        PINMUX_DATA(LCDC0_SELECT_MARK,  MSEL3CR_6_0),
+        PINMUX_DATA(LCDC1_SELECT_MARK,  MSEL3CR_6_1),
+
+        PINMUX_DATA(TS0_1SELECT_MARK,   MSEL3CR_21_0, MSEL3CR_20_0),
+        PINMUX_DATA(TS0_2SELECT_MARK,   MSEL3CR_21_0, MSEL3CR_20_1),
+        PINMUX_DATA(TS1_1SELECT_MARK,   MSEL3CR_27_0, MSEL3CR_26_0),
+        PINMUX_DATA(TS1_2SELECT_MARK,   MSEL3CR_27_0, MSEL3CR_26_1),
+
+        PINMUX_DATA(SDENC_CPG_MARK,     MSEL4CR_19_0),
+        PINMUX_DATA(SDENC_DV_CLKI_MARK, MSEL4CR_19_1),
+
+        PINMUX_DATA(MFIv6_MARK,         MSEL4CR_6_0),
+        PINMUX_DATA(MFIv4_MARK,         MSEL4CR_6_1),
+};
+
+#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
+#define GPIO_PORT_ALL() _190(_GPIO_PORT, , unused)
+#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
+
+static struct pinmux_gpio pinmux_gpios[] = {
+
+        /* PORT */
+        GPIO_PORT_ALL(),
+
+        /* IRQ */
+        GPIO_FN(IRQ0_6),        GPIO_FN(IRQ0_162),      GPIO_FN(IRQ1),
+        GPIO_FN(IRQ2_4),        GPIO_FN(IRQ2_5),        GPIO_FN(IRQ3_8),
+        GPIO_FN(IRQ3_16),       GPIO_FN(IRQ4_17),       GPIO_FN(IRQ4_163),
+        GPIO_FN(IRQ5),          GPIO_FN(IRQ6_39),       GPIO_FN(IRQ6_164),
+        GPIO_FN(IRQ7_40),       GPIO_FN(IRQ7_167),      GPIO_FN(IRQ8_41),
+        GPIO_FN(IRQ8_168),      GPIO_FN(IRQ9_42),       GPIO_FN(IRQ9_169),
+        GPIO_FN(IRQ10),         GPIO_FN(IRQ11),         GPIO_FN(IRQ12_80),
+        GPIO_FN(IRQ12_137),     GPIO_FN(IRQ13_81),      GPIO_FN(IRQ13_145),
+        GPIO_FN(IRQ14_82),      GPIO_FN(IRQ14_146),     GPIO_FN(IRQ15_83),
+        GPIO_FN(IRQ15_147),     GPIO_FN(IRQ16_84),      GPIO_FN(IRQ16_170),
+        GPIO_FN(IRQ17),         GPIO_FN(IRQ18),         GPIO_FN(IRQ19),
+        GPIO_FN(IRQ20),         GPIO_FN(IRQ21),         GPIO_FN(IRQ22),
+        GPIO_FN(IRQ23),         GPIO_FN(IRQ24),         GPIO_FN(IRQ25),
+        GPIO_FN(IRQ26_121),     GPIO_FN(IRQ26_172),     GPIO_FN(IRQ27_122),
+        GPIO_FN(IRQ27_180),     GPIO_FN(IRQ28_123),     GPIO_FN(IRQ28_181),
+        GPIO_FN(IRQ29_129),     GPIO_FN(IRQ29_182),     GPIO_FN(IRQ30_130),
+        GPIO_FN(IRQ30_183),     GPIO_FN(IRQ31_138),     GPIO_FN(IRQ31_184),
+
+        /* MSIOF0 */
+        GPIO_FN(MSIOF0_TSYNC),  GPIO_FN(MSIOF0_TSCK),   GPIO_FN(MSIOF0_RXD),
+        GPIO_FN(MSIOF0_RSCK),   GPIO_FN(MSIOF0_RSYNC),  GPIO_FN(MSIOF0_MCK0),
+        GPIO_FN(MSIOF0_MCK1),   GPIO_FN(MSIOF0_SS1),    GPIO_FN(MSIOF0_SS2),
+        GPIO_FN(MSIOF0_TXD),
+
+        /* MSIOF1 */
+        GPIO_FN(MSIOF1_TSCK_39),        GPIO_FN(MSIOF1_TSCK_88),
+        GPIO_FN(MSIOF1_TSYNC_40),       GPIO_FN(MSIOF1_TSYNC_89),
+        GPIO_FN(MSIOF1_TXD_41),         GPIO_FN(MSIOF1_TXD_90),
+        GPIO_FN(MSIOF1_RXD_42),         GPIO_FN(MSIOF1_RXD_91),
+        GPIO_FN(MSIOF1_SS1_43),         GPIO_FN(MSIOF1_SS1_92),
+        GPIO_FN(MSIOF1_SS2_44),         GPIO_FN(MSIOF1_SS2_93),
+        GPIO_FN(MSIOF1_RSCK),           GPIO_FN(MSIOF1_RSYNC),
+        GPIO_FN(MSIOF1_MCK0),           GPIO_FN(MSIOF1_MCK1),
+
+        /* MSIOF2 */
+        GPIO_FN(MSIOF2_RSCK),   GPIO_FN(MSIOF2_RSYNC),  GPIO_FN(MSIOF2_MCK0),
+        GPIO_FN(MSIOF2_MCK1),   GPIO_FN(MSIOF2_SS1),    GPIO_FN(MSIOF2_SS2),
+        GPIO_FN(MSIOF2_TSYNC),  GPIO_FN(MSIOF2_TSCK),   GPIO_FN(MSIOF2_RXD),
+        GPIO_FN(MSIOF2_TXD),
+
+        /* MSIOF3 */
+        GPIO_FN(BBIF1_RXD),     GPIO_FN(BBIF1_TSYNC),   GPIO_FN(BBIF1_TSCK),
+        GPIO_FN(BBIF1_TXD),     GPIO_FN(BBIF1_RSCK),    GPIO_FN(BBIF1_RSYNC),
+        GPIO_FN(BBIF1_FLOW),    GPIO_FN(BB_RX_FLOW_N),
+
+        /* MSIOF4 */
+        GPIO_FN(BBIF2_TSCK1),   GPIO_FN(BBIF2_TSYNC1),
+        GPIO_FN(BBIF2_TXD1),    GPIO_FN(BBIF2_RXD),
+
+        /* FSI */
+        GPIO_FN(FSIACK),        GPIO_FN(FSIBCK),        GPIO_FN(FSIAILR),
+        GPIO_FN(FSIAIBT),       GPIO_FN(FSIAISLD),      GPIO_FN(FSIAOMC),
+        GPIO_FN(FSIAOLR),       GPIO_FN(FSIAOBT),       GPIO_FN(FSIAOSLD),
+        GPIO_FN(FSIASPDIF_11),  GPIO_FN(FSIASPDIF_15),
+
+        /* FMSI */
+        GPIO_FN(FMSOCK),        GPIO_FN(FMSOOLR),       GPIO_FN(FMSIOLR),
+        GPIO_FN(FMSOOBT),       GPIO_FN(FMSIOBT),       GPIO_FN(FMSOSLD),
+        GPIO_FN(FMSOILR),       GPIO_FN(FMSIILR),       GPIO_FN(FMSOIBT),
+        GPIO_FN(FMSIIBT),       GPIO_FN(FMSISLD),       GPIO_FN(FMSICK),
+
+        /* SCIFA0 */
+        GPIO_FN(SCIFA0_TXD),    GPIO_FN(SCIFA0_RXD),    GPIO_FN(SCIFA0_SCK),
+        GPIO_FN(SCIFA0_RTS),    GPIO_FN(SCIFA0_CTS),
+
+        /* SCIFA1 */
+        GPIO_FN(SCIFA1_TXD),    GPIO_FN(SCIFA1_RXD),    GPIO_FN(SCIFA1_SCK),
+        GPIO_FN(SCIFA1_RTS),    GPIO_FN(SCIFA1_CTS),
+
+        /* SCIFA2 */
+        GPIO_FN(SCIFA2_CTS1),   GPIO_FN(SCIFA2_RTS1),   GPIO_FN(SCIFA2_TXD1),
+        GPIO_FN(SCIFA2_RXD1),   GPIO_FN(SCIFA2_SCK1),
+
+        /* SCIFA3 */
+        GPIO_FN(SCIFA3_CTS_43),         GPIO_FN(SCIFA3_CTS_140),
+        GPIO_FN(SCIFA3_RTS_44),         GPIO_FN(SCIFA3_RTS_141),
+        GPIO_FN(SCIFA3_SCK),            GPIO_FN(SCIFA3_TXD),
+        GPIO_FN(SCIFA3_RXD),
+
+        /* SCIFA4 */
+        GPIO_FN(SCIFA4_RXD),    GPIO_FN(SCIFA4_TXD),
+
+        /* SCIFA5 */
+        GPIO_FN(SCIFA5_RXD),    GPIO_FN(SCIFA5_TXD),
+
+        /* SCIFB */
+        GPIO_FN(SCIFB_SCK),     GPIO_FN(SCIFB_RTS),     GPIO_FN(SCIFB_CTS),
+        GPIO_FN(SCIFB_TXD),     GPIO_FN(SCIFB_RXD),
+
+        /* CEU */
+        GPIO_FN(VIO_HD),        GPIO_FN(VIO_CKO1),      GPIO_FN(VIO_CKO2),
+        GPIO_FN(VIO_VD),        GPIO_FN(VIO_CLK),       GPIO_FN(VIO_FIELD),
+        GPIO_FN(VIO_CKO),       GPIO_FN(VIO_D0),        GPIO_FN(VIO_D1),
+        GPIO_FN(VIO_D2),        GPIO_FN(VIO_D3),        GPIO_FN(VIO_D4),
+        GPIO_FN(VIO_D5),        GPIO_FN(VIO_D6),        GPIO_FN(VIO_D7),
+        GPIO_FN(VIO_D8),        GPIO_FN(VIO_D9),        GPIO_FN(VIO_D10),
+        GPIO_FN(VIO_D11),       GPIO_FN(VIO_D12),       GPIO_FN(VIO_D13),
+        GPIO_FN(VIO_D14),       GPIO_FN(VIO_D15),
+
+        /* USB0 */
+        GPIO_FN(IDIN_0),        GPIO_FN(EXTLP_0),       GPIO_FN(OVCN2_0),
+        GPIO_FN(PWEN_0),        GPIO_FN(OVCN_0),        GPIO_FN(VBUS0_0),
+
+        /* USB1 */
+        GPIO_FN(IDIN_1_18),     GPIO_FN(IDIN_1_113),
+        GPIO_FN(OVCN_1_114),    GPIO_FN(OVCN_1_162),
+        GPIO_FN(PWEN_1_115),    GPIO_FN(PWEN_1_138),
+        GPIO_FN(EXTLP_1),       GPIO_FN(OVCN2_1),
+        GPIO_FN(VBUS0_1),
+
+        /* GPIO */
+        GPIO_FN(GPI0),  GPIO_FN(GPI1),  GPIO_FN(GPO0),  GPIO_FN(GPO1),
+
+        /* BSC */
+        GPIO_FN(BS),    GPIO_FN(WE1),   GPIO_FN(CKO),
+        GPIO_FN(WAIT),  GPIO_FN(RDWR),
+
+        GPIO_FN(A0),    GPIO_FN(A1),    GPIO_FN(A2),
+        GPIO_FN(A3),    GPIO_FN(A6),    GPIO_FN(A7),
+        GPIO_FN(A8),    GPIO_FN(A9),    GPIO_FN(A10),
+        GPIO_FN(A11),   GPIO_FN(A12),   GPIO_FN(A13),
+        GPIO_FN(A14),   GPIO_FN(A15),   GPIO_FN(A16),
+        GPIO_FN(A17),   GPIO_FN(A18),   GPIO_FN(A19),
+        GPIO_FN(A20),   GPIO_FN(A21),   GPIO_FN(A22),
+        GPIO_FN(A23),   GPIO_FN(A24),   GPIO_FN(A25),
+        GPIO_FN(A26),
+
+        GPIO_FN(CS0),   GPIO_FN(CS2),   GPIO_FN(CS4),
+        GPIO_FN(CS5A),  GPIO_FN(CS5B),  GPIO_FN(CS6A),
+
+        /* BSC/FLCTL */
+        GPIO_FN(RD_FSC),        GPIO_FN(WE0_FWE),       GPIO_FN(A4_FOE),
+        GPIO_FN(A5_FCDE),       GPIO_FN(D0_NAF0),       GPIO_FN(D1_NAF1),
+        GPIO_FN(D2_NAF2),       GPIO_FN(D3_NAF3),       GPIO_FN(D4_NAF4),
+        GPIO_FN(D5_NAF5),       GPIO_FN(D6_NAF6),       GPIO_FN(D7_NAF7),
+        GPIO_FN(D8_NAF8),       GPIO_FN(D9_NAF9),       GPIO_FN(D10_NAF10),
+        GPIO_FN(D11_NAF11),     GPIO_FN(D12_NAF12),     GPIO_FN(D13_NAF13),
+        GPIO_FN(D14_NAF14),     GPIO_FN(D15_NAF15),
+
+        /* MMCIF(1) */
+        GPIO_FN(MMCD0_0),       GPIO_FN(MMCD0_1),       GPIO_FN(MMCD0_2),
+        GPIO_FN(MMCD0_3),       GPIO_FN(MMCD0_4),       GPIO_FN(MMCD0_5),
+        GPIO_FN(MMCD0_6),       GPIO_FN(MMCD0_7),       GPIO_FN(MMCCMD0),
+        GPIO_FN(MMCCLK0),
+
+        /* MMCIF(2) */
+        GPIO_FN(MMCD1_0),       GPIO_FN(MMCD1_1),       GPIO_FN(MMCD1_2),
+        GPIO_FN(MMCD1_3),       GPIO_FN(MMCD1_4),       GPIO_FN(MMCD1_5),
+        GPIO_FN(MMCD1_6),       GPIO_FN(MMCD1_7),       GPIO_FN(MMCCLK1),
+        GPIO_FN(MMCCMD1),
+
+        /* SPU2 */
+        GPIO_FN(VINT_I),
+
+        /* FLCTL */
+        GPIO_FN(FCE1),  GPIO_FN(FCE0),  GPIO_FN(FRB),
+
+        /* HSI */
+        GPIO_FN(GP_RX_FLAG),    GPIO_FN(GP_RX_DATA),    GPIO_FN(GP_TX_READY),
+        GPIO_FN(GP_RX_WAKE),    GPIO_FN(MP_TX_FLAG),    GPIO_FN(MP_TX_DATA),
+        GPIO_FN(MP_RX_READY),   GPIO_FN(MP_TX_WAKE),
+
+        /* MFI */
+        GPIO_FN(MFIv6),
+        GPIO_FN(MFIv4),
+
+        GPIO_FN(MEMC_BUSCLK_MEMC_A0),   GPIO_FN(MEMC_ADV_MEMC_DREQ0),
+        GPIO_FN(MEMC_WAIT_MEMC_DREQ1),  GPIO_FN(MEMC_CS1_MEMC_A1),
+        GPIO_FN(MEMC_CS0),      GPIO_FN(MEMC_NOE),
+        GPIO_FN(MEMC_NWE),      GPIO_FN(MEMC_INT),
+
+        GPIO_FN(MEMC_AD0),      GPIO_FN(MEMC_AD1),      GPIO_FN(MEMC_AD2),
+        GPIO_FN(MEMC_AD3),      GPIO_FN(MEMC_AD4),      GPIO_FN(MEMC_AD5),
+        GPIO_FN(MEMC_AD6),      GPIO_FN(MEMC_AD7),      GPIO_FN(MEMC_AD8),
+        GPIO_FN(MEMC_AD9),      GPIO_FN(MEMC_AD10),     GPIO_FN(MEMC_AD11),
+        GPIO_FN(MEMC_AD12),     GPIO_FN(MEMC_AD13),     GPIO_FN(MEMC_AD14),
+        GPIO_FN(MEMC_AD15),
+
+        /* SIM */
+        GPIO_FN(SIM_RST),       GPIO_FN(SIM_CLK),       GPIO_FN(SIM_D),
+
+        /* TPU */
+        GPIO_FN(TPU0TO0),       GPIO_FN(TPU0TO1),       GPIO_FN(TPU0TO2_93),
+        GPIO_FN(TPU0TO2_99),    GPIO_FN(TPU0TO3),
+
+        /* I2C2 */
+        GPIO_FN(I2C_SCL2),      GPIO_FN(I2C_SDA2),
+
+        /* I2C3(1) */
+        GPIO_FN(I2C_SCL3),      GPIO_FN(I2C_SDA3),
+
+        /* I2C3(2) */
+        GPIO_FN(I2C_SCL3S),     GPIO_FN(I2C_SDA3S),
+
+        /* I2C4(2) */
+        GPIO_FN(I2C_SCL4),      GPIO_FN(I2C_SDA4),
+
+        /* I2C4(2) */
+        GPIO_FN(I2C_SCL4S),     GPIO_FN(I2C_SDA4S),
+
+        /* KEYSC */
+        GPIO_FN(KEYOUT0),       GPIO_FN(KEYIN0_121),    GPIO_FN(KEYIN0_136),
+        GPIO_FN(KEYOUT1),       GPIO_FN(KEYIN1_122),    GPIO_FN(KEYIN1_135),
+        GPIO_FN(KEYOUT2),       GPIO_FN(KEYIN2_123),    GPIO_FN(KEYIN2_134),
+        GPIO_FN(KEYOUT3),       GPIO_FN(KEYIN3_124),    GPIO_FN(KEYIN3_133),
+        GPIO_FN(KEYOUT4),       GPIO_FN(KEYIN4),        GPIO_FN(KEYOUT5),
+        GPIO_FN(KEYIN5),        GPIO_FN(KEYOUT6),       GPIO_FN(KEYIN6),
+        GPIO_FN(KEYOUT7),       GPIO_FN(KEYIN7),
+
+        /* LCDC */
+        GPIO_FN(LCDHSYN),       GPIO_FN(LCDCS), GPIO_FN(LCDVSYN),
+        GPIO_FN(LCDDCK),        GPIO_FN(LCDWR), GPIO_FN(LCDRD),
+        GPIO_FN(LCDDISP),       GPIO_FN(LCDRS), GPIO_FN(LCDLCLK),
+        GPIO_FN(LCDDON),
+
+        GPIO_FN(LCDD0),         GPIO_FN(LCDD1),         GPIO_FN(LCDD2),
+        GPIO_FN(LCDD3),         GPIO_FN(LCDD4),         GPIO_FN(LCDD5),
+        GPIO_FN(LCDD6),         GPIO_FN(LCDD7),         GPIO_FN(LCDD8),
+        GPIO_FN(LCDD9),         GPIO_FN(LCDD10),        GPIO_FN(LCDD11),
+        GPIO_FN(LCDD12),        GPIO_FN(LCDD13),        GPIO_FN(LCDD14),
+        GPIO_FN(LCDD15),        GPIO_FN(LCDD16),        GPIO_FN(LCDD17),
+        GPIO_FN(LCDD18),        GPIO_FN(LCDD19),        GPIO_FN(LCDD20),
+        GPIO_FN(LCDD21),        GPIO_FN(LCDD22),        GPIO_FN(LCDD23),
+
+        /* IRDA */
+        GPIO_FN(IRDA_OUT),      GPIO_FN(IRDA_IN),       GPIO_FN(IRDA_FIRSEL),
+        GPIO_FN(IROUT_139),     GPIO_FN(IROUT_140),
+
+        /* TSIF1 */
+        GPIO_FN(TS0_1SELECT),
+        GPIO_FN(TS0_2SELECT),
+        GPIO_FN(TS1_1SELECT),
+        GPIO_FN(TS1_2SELECT),
+
+        GPIO_FN(TS_SPSYNC1),    GPIO_FN(TS_SDAT1),
+        GPIO_FN(TS_SDEN1),      GPIO_FN(TS_SCK1),
+
+        /* TSIF2 */
+        GPIO_FN(TS_SPSYNC2),    GPIO_FN(TS_SDAT2),
+        GPIO_FN(TS_SDEN2),      GPIO_FN(TS_SCK2),
+
+        /* HDMI */
+        GPIO_FN(HDMI_HPD),      GPIO_FN(HDMI_CEC),
+
+        /* SDHI0 */
+        GPIO_FN(SDHICLK0),      GPIO_FN(SDHICD0),       GPIO_FN(SDHICMD0),
+        GPIO_FN(SDHIWP0),       GPIO_FN(SDHID0_0),      GPIO_FN(SDHID0_1),
+        GPIO_FN(SDHID0_2),      GPIO_FN(SDHID0_3),
+
+        /* SDHI1 */
+        GPIO_FN(SDHICLK1),      GPIO_FN(SDHICMD1),      GPIO_FN(SDHID1_0),
+        GPIO_FN(SDHID1_1),      GPIO_FN(SDHID1_2),      GPIO_FN(SDHID1_3),
+
+        /* SDHI2 */
+        GPIO_FN(SDHICLK2),      GPIO_FN(SDHICMD2),      GPIO_FN(SDHID2_0),
+        GPIO_FN(SDHID2_1),      GPIO_FN(SDHID2_2),      GPIO_FN(SDHID2_3),
+
+        /* SDENC */
+        GPIO_FN(SDENC_CPG),
+        GPIO_FN(SDENC_DV_CLKI),
+};
+
+/* helper for top 4 bits in PORTnCR */
+#define PCRH(in, in_pd, in_pu, out)             \
+        0, (out), (in), 0,                      \
+        0, 0, 0, 0,                             \
+        0, 0, (in_pd), 0,                       \
+        0, 0, (in_pu), 0
+
+#define PORTCR(nr, reg)                                         \
+        { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) {           \
+                PCRH(PORT##nr##_IN, PORT##nr##_IN_PD,           \
+                     PORT##nr##_IN_PU, PORT##nr##_OUT),         \
+                PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
+                PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
+                PORT##nr##_FN6, PORT##nr##_FN7 }                \
+        }
+
+static struct pinmux_cfg_reg pinmux_config_regs[] = {
+        PORTCR(0,       0xE6051000), /* PORT0CR */
+        PORTCR(1,       0xE6051001), /* PORT1CR */
+        PORTCR(2,       0xE6051002), /* PORT2CR */
+        PORTCR(3,       0xE6051003), /* PORT3CR */
+        PORTCR(4,       0xE6051004), /* PORT4CR */
+        PORTCR(5,       0xE6051005), /* PORT5CR */
+        PORTCR(6,       0xE6051006), /* PORT6CR */
+        PORTCR(7,       0xE6051007), /* PORT7CR */
+        PORTCR(8,       0xE6051008), /* PORT8CR */
+        PORTCR(9,       0xE6051009), /* PORT9CR */
+        PORTCR(10,      0xE605100A), /* PORT10CR */
+        PORTCR(11,      0xE605100B), /* PORT11CR */
+        PORTCR(12,      0xE605100C), /* PORT12CR */
+        PORTCR(13,      0xE605100D), /* PORT13CR */
+        PORTCR(14,      0xE605100E), /* PORT14CR */
+        PORTCR(15,      0xE605100F), /* PORT15CR */
+        PORTCR(16,      0xE6051010), /* PORT16CR */
+        PORTCR(17,      0xE6051011), /* PORT17CR */
+        PORTCR(18,      0xE6051012), /* PORT18CR */
+        PORTCR(19,      0xE6051013), /* PORT19CR */
+        PORTCR(20,      0xE6051014), /* PORT20CR */
+        PORTCR(21,      0xE6051015), /* PORT21CR */
+        PORTCR(22,      0xE6051016), /* PORT22CR */
+        PORTCR(23,      0xE6051017), /* PORT23CR */
+        PORTCR(24,      0xE6051018), /* PORT24CR */
+        PORTCR(25,      0xE6051019), /* PORT25CR */
+        PORTCR(26,      0xE605101A), /* PORT26CR */
+        PORTCR(27,      0xE605101B), /* PORT27CR */
+        PORTCR(28,      0xE605101C), /* PORT28CR */
+        PORTCR(29,      0xE605101D), /* PORT29CR */
+        PORTCR(30,      0xE605101E), /* PORT30CR */
+        PORTCR(31,      0xE605101F), /* PORT31CR */
+        PORTCR(32,      0xE6051020), /* PORT32CR */
+        PORTCR(33,      0xE6051021), /* PORT33CR */
+        PORTCR(34,      0xE6051022), /* PORT34CR */
+        PORTCR(35,      0xE6051023), /* PORT35CR */
+        PORTCR(36,      0xE6051024), /* PORT36CR */
+        PORTCR(37,      0xE6051025), /* PORT37CR */
+        PORTCR(38,      0xE6051026), /* PORT38CR */
+        PORTCR(39,      0xE6051027), /* PORT39CR */
+        PORTCR(40,      0xE6051028), /* PORT40CR */
+        PORTCR(41,      0xE6051029), /* PORT41CR */
+        PORTCR(42,      0xE605102A), /* PORT42CR */
+        PORTCR(43,      0xE605102B), /* PORT43CR */
+        PORTCR(44,      0xE605102C), /* PORT44CR */
+        PORTCR(45,      0xE605102D), /* PORT45CR */
+        PORTCR(46,      0xE605202E), /* PORT46CR */
+        PORTCR(47,      0xE605202F), /* PORT47CR */
+        PORTCR(48,      0xE6052030), /* PORT48CR */
+        PORTCR(49,      0xE6052031), /* PORT49CR */
+        PORTCR(50,      0xE6052032), /* PORT50CR */
+        PORTCR(51,      0xE6052033), /* PORT51CR */
+        PORTCR(52,      0xE6052034), /* PORT52CR */
+        PORTCR(53,      0xE6052035), /* PORT53CR */
+        PORTCR(54,      0xE6052036), /* PORT54CR */
+        PORTCR(55,      0xE6052037), /* PORT55CR */
+        PORTCR(56,      0xE6052038), /* PORT56CR */
+        PORTCR(57,      0xE6052039), /* PORT57CR */
+        PORTCR(58,      0xE605203A), /* PORT58CR */
+        PORTCR(59,      0xE605203B), /* PORT59CR */
+        PORTCR(60,      0xE605203C), /* PORT60CR */
+        PORTCR(61,      0xE605203D), /* PORT61CR */
+        PORTCR(62,      0xE605203E), /* PORT62CR */
+        PORTCR(63,      0xE605203F), /* PORT63CR */
+        PORTCR(64,      0xE6052040), /* PORT64CR */
+        PORTCR(65,      0xE6052041), /* PORT65CR */
+        PORTCR(66,      0xE6052042), /* PORT66CR */
+        PORTCR(67,      0xE6052043), /* PORT67CR */
+        PORTCR(68,      0xE6052044), /* PORT68CR */
+        PORTCR(69,      0xE6052045), /* PORT69CR */
+        PORTCR(70,      0xE6052046), /* PORT70CR */
+        PORTCR(71,      0xE6052047), /* PORT71CR */
+        PORTCR(72,      0xE6052048), /* PORT72CR */
+        PORTCR(73,      0xE6052049), /* PORT73CR */
+        PORTCR(74,      0xE605204A), /* PORT74CR */
+        PORTCR(75,      0xE605204B), /* PORT75CR */
+        PORTCR(76,      0xE605004C), /* PORT76CR */
+        PORTCR(77,      0xE605004D), /* PORT77CR */
+        PORTCR(78,      0xE605004E), /* PORT78CR */
+        PORTCR(79,      0xE605004F), /* PORT79CR */
+        PORTCR(80,      0xE6050050), /* PORT80CR */
+        PORTCR(81,      0xE6050051), /* PORT81CR */
+        PORTCR(82,      0xE6050052), /* PORT82CR */
+        PORTCR(83,      0xE6050053), /* PORT83CR */
+        PORTCR(84,      0xE6050054), /* PORT84CR */
+        PORTCR(85,      0xE6050055), /* PORT85CR */
+        PORTCR(86,      0xE6050056), /* PORT86CR */
+        PORTCR(87,      0xE6050057), /* PORT87CR */
+        PORTCR(88,      0xE6050058), /* PORT88CR */
+        PORTCR(89,      0xE6050059), /* PORT89CR */
+        PORTCR(90,      0xE605005A), /* PORT90CR */
+        PORTCR(91,      0xE605005B), /* PORT91CR */
+        PORTCR(92,      0xE605005C), /* PORT92CR */
+        PORTCR(93,      0xE605005D), /* PORT93CR */
+        PORTCR(94,      0xE605005E), /* PORT94CR */
+        PORTCR(95,      0xE605005F), /* PORT95CR */
+        PORTCR(96,      0xE6050060), /* PORT96CR */
+        PORTCR(97,      0xE6050061), /* PORT97CR */
+        PORTCR(98,      0xE6050062), /* PORT98CR */
+        PORTCR(99,      0xE6050063), /* PORT99CR */
+        PORTCR(100,     0xE6053064), /* PORT100CR */
+        PORTCR(101,     0xE6053065), /* PORT101CR */
+        PORTCR(102,     0xE6053066), /* PORT102CR */
+        PORTCR(103,     0xE6053067), /* PORT103CR */
+        PORTCR(104,     0xE6053068), /* PORT104CR */
+        PORTCR(105,     0xE6053069), /* PORT105CR */
+        PORTCR(106,     0xE605306A), /* PORT106CR */
+        PORTCR(107,     0xE605306B), /* PORT107CR */
+        PORTCR(108,     0xE605306C), /* PORT108CR */
+        PORTCR(109,     0xE605306D), /* PORT109CR */
+        PORTCR(110,     0xE605306E), /* PORT110CR */
+        PORTCR(111,     0xE605306F), /* PORT111CR */
+        PORTCR(112,     0xE6053070), /* PORT112CR */
+        PORTCR(113,     0xE6053071), /* PORT113CR */
+        PORTCR(114,     0xE6053072), /* PORT114CR */
+        PORTCR(115,     0xE6053073), /* PORT115CR */
+        PORTCR(116,     0xE6053074), /* PORT116CR */
+        PORTCR(117,     0xE6053075), /* PORT117CR */
+        PORTCR(118,     0xE6053076), /* PORT118CR */
+        PORTCR(119,     0xE6053077), /* PORT119CR */
+        PORTCR(120,     0xE6053078), /* PORT120CR */
+        PORTCR(121,     0xE6050079), /* PORT121CR */
+        PORTCR(122,     0xE605007A), /* PORT122CR */
+        PORTCR(123,     0xE605007B), /* PORT123CR */
+        PORTCR(124,     0xE605007C), /* PORT124CR */
+        PORTCR(125,     0xE605007D), /* PORT125CR */
+        PORTCR(126,     0xE605007E), /* PORT126CR */
+        PORTCR(127,     0xE605007F), /* PORT127CR */
+        PORTCR(128,     0xE6050080), /* PORT128CR */
+        PORTCR(129,     0xE6050081), /* PORT129CR */
+        PORTCR(130,     0xE6050082), /* PORT130CR */
+        PORTCR(131,     0xE6050083), /* PORT131CR */
+        PORTCR(132,     0xE6050084), /* PORT132CR */
+        PORTCR(133,     0xE6050085), /* PORT133CR */
+        PORTCR(134,     0xE6050086), /* PORT134CR */
+        PORTCR(135,     0xE6050087), /* PORT135CR */
+        PORTCR(136,     0xE6050088), /* PORT136CR */
+        PORTCR(137,     0xE6050089), /* PORT137CR */
+        PORTCR(138,     0xE605008A), /* PORT138CR */
+        PORTCR(139,     0xE605008B), /* PORT139CR */
+        PORTCR(140,     0xE605008C), /* PORT140CR */
+        PORTCR(141,     0xE605008D), /* PORT141CR */
+        PORTCR(142,     0xE605008E), /* PORT142CR */
+        PORTCR(143,     0xE605008F), /* PORT143CR */
+        PORTCR(144,     0xE6050090), /* PORT144CR */
+        PORTCR(145,     0xE6050091), /* PORT145CR */
+        PORTCR(146,     0xE6050092), /* PORT146CR */
+        PORTCR(147,     0xE6050093), /* PORT147CR */
+        PORTCR(148,     0xE6050094), /* PORT148CR */
+        PORTCR(149,     0xE6050095), /* PORT149CR */
+        PORTCR(150,     0xE6050096), /* PORT150CR */
+        PORTCR(151,     0xE6050097), /* PORT151CR */
+        PORTCR(152,     0xE6053098), /* PORT152CR */
+        PORTCR(153,     0xE6053099), /* PORT153CR */
+        PORTCR(154,     0xE605309A), /* PORT154CR */
+        PORTCR(155,     0xE605309B), /* PORT155CR */
+        PORTCR(156,     0xE605009C), /* PORT156CR */
+        PORTCR(157,     0xE605009D), /* PORT157CR */
+        PORTCR(158,     0xE605009E), /* PORT158CR */
+        PORTCR(159,     0xE605009F), /* PORT159CR */
+        PORTCR(160,     0xE60500A0), /* PORT160CR */
+        PORTCR(161,     0xE60500A1), /* PORT161CR */
+        PORTCR(162,     0xE60500A2), /* PORT162CR */
+        PORTCR(163,     0xE60500A3), /* PORT163CR */
+        PORTCR(164,     0xE60500A4), /* PORT164CR */
+        PORTCR(165,     0xE60500A5), /* PORT165CR */
+        PORTCR(166,     0xE60500A6), /* PORT166CR */
+        PORTCR(167,     0xE60520A7), /* PORT167CR */
+        PORTCR(168,     0xE60520A8), /* PORT168CR */
+        PORTCR(169,     0xE60520A9), /* PORT169CR */
+        PORTCR(170,     0xE60520AA), /* PORT170CR */
+        PORTCR(171,     0xE60520AB), /* PORT171CR */
+        PORTCR(172,     0xE60520AC), /* PORT172CR */
+        PORTCR(173,     0xE60520AD), /* PORT173CR */
+        PORTCR(174,     0xE60520AE), /* PORT174CR */
+        PORTCR(175,     0xE60520AF), /* PORT175CR */
+        PORTCR(176,     0xE60520B0), /* PORT176CR */
+        PORTCR(177,     0xE60520B1), /* PORT177CR */
+        PORTCR(178,     0xE60520B2), /* PORT178CR */
+        PORTCR(179,     0xE60520B3), /* PORT179CR */
+        PORTCR(180,     0xE60520B4), /* PORT180CR */
+        PORTCR(181,     0xE60520B5), /* PORT181CR */
+        PORTCR(182,     0xE60520B6), /* PORT182CR */
+        PORTCR(183,     0xE60520B7), /* PORT183CR */
+        PORTCR(184,     0xE60520B8), /* PORT184CR */
+        PORTCR(185,     0xE60520B9), /* PORT185CR */
+        PORTCR(186,     0xE60520BA), /* PORT186CR */
+        PORTCR(187,     0xE60520BB), /* PORT187CR */
+        PORTCR(188,     0xE60520BC), /* PORT188CR */
+        PORTCR(189,     0xE60520BD), /* PORT189CR */
+        PORTCR(190,     0xE60520BE), /* PORT190CR */
+
+        { PINMUX_CFG_REG("MSEL1CR", 0xE605800C, 32, 1) {
+                        MSEL1CR_31_0,   MSEL1CR_31_1,
+                        MSEL1CR_30_0,   MSEL1CR_30_1,
+                        MSEL1CR_29_0,   MSEL1CR_29_1,
+                        MSEL1CR_28_0,   MSEL1CR_28_1,
+                        MSEL1CR_27_0,   MSEL1CR_27_1,
+                        MSEL1CR_26_0,   MSEL1CR_26_1,
+                        0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+                        0, 0, 0, 0, 0, 0, 0, 0,
+                        MSEL1CR_16_0,   MSEL1CR_16_1,
+                        MSEL1CR_15_0,   MSEL1CR_15_1,
+                        MSEL1CR_14_0,   MSEL1CR_14_1,
+                        MSEL1CR_13_0,   MSEL1CR_13_1,
+                        MSEL1CR_12_0,   MSEL1CR_12_1,
+                        0, 0, 0, 0,
+                        MSEL1CR_9_0,    MSEL1CR_9_1,
+                        MSEL1CR_8_0,    MSEL1CR_8_1,
+                        MSEL1CR_7_0,    MSEL1CR_7_1,
+                        MSEL1CR_6_0,    MSEL1CR_6_1,
+                        0, 0,
+                        MSEL1CR_4_0,    MSEL1CR_4_1,
+                        MSEL1CR_3_0,    MSEL1CR_3_1,
+                        MSEL1CR_2_0,    MSEL1CR_2_1,
+                        0, 0,
+                        MSEL1CR_0_0,    MSEL1CR_0_1,
+                }
+        },
+        { PINMUX_CFG_REG("MSEL3CR", 0xE6058020, 32, 1) {
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        MSEL3CR_27_0,   MSEL3CR_27_1,
+                        MSEL3CR_26_0,   MSEL3CR_26_1,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        MSEL3CR_21_0,   MSEL3CR_21_1,
+                        MSEL3CR_20_0,   MSEL3CR_20_1,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        MSEL3CR_15_0,   MSEL3CR_15_1,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0,
+                        MSEL3CR_9_0,    MSEL3CR_9_1,
+                        0, 0, 0, 0,
+                        MSEL3CR_6_0,    MSEL3CR_6_1,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        }
+        },
+        { PINMUX_CFG_REG("MSEL4CR", 0xE6058024, 32, 1) {
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        MSEL4CR_19_0,   MSEL4CR_19_1,
+                        MSEL4CR_18_0,   MSEL4CR_18_1,
+                        MSEL4CR_17_0,   MSEL4CR_17_1,
+                        MSEL4CR_16_0,   MSEL4CR_16_1,
+                        MSEL4CR_15_0,   MSEL4CR_15_1,
+                        MSEL4CR_14_0,   MSEL4CR_14_1,
+                        0, 0, 0, 0,
+                        0, 0,
+                        MSEL4CR_10_0,   MSEL4CR_10_1,
+                        0, 0, 0, 0,
+                        0, 0,
+                        MSEL4CR_6_0,    MSEL4CR_6_1,
+                        0, 0,
+                        MSEL4CR_4_0,    MSEL4CR_4_1,
+                        0, 0, 0, 0,
+                        MSEL4CR_1_0,    MSEL4CR_1_1,
+                        0, 0,
+                }
+        },
+        { },
+};
+
+static struct pinmux_data_reg pinmux_data_regs[] = {
+        { PINMUX_DATA_REG("PORTL095_064DR", 0xE6054008, 32) {
+                        PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA,
+                        PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA,
+                        PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA,
+                        PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA,
+                        PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                }
+        },
+        { PINMUX_DATA_REG("PORTL127_096DR", 0xE605400C, 32) {
+                        PORT127_DATA, PORT126_DATA, PORT125_DATA, PORT124_DATA,
+                        PORT123_DATA, PORT122_DATA, PORT121_DATA, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        PORT99_DATA,  PORT98_DATA,  PORT97_DATA,  PORT96_DATA,
+                }
+        },
+        { PINMUX_DATA_REG("PORTL159_128DR", 0xE6054010, 32) {
+                        PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA,
+                        0, 0, 0, 0,
+                        PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA,
+                        PORT147_DATA, PORT146_DATA, PORT145_DATA, PORT144_DATA,
+                        PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA,
+                        PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA,
+                        PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA,
+                        PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA,
+                }
+        },
+        { PINMUX_DATA_REG("PORTL191_160DR", 0xE6054014, 32) {
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0,            PORT166_DATA, PORT165_DATA, PORT164_DATA,
+                        PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA,
+                }
+        },
+        { PINMUX_DATA_REG("PORTD031_000DR", 0xE6055000, 32) {
+                        PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA,
+                        PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
+                        PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA,
+                        PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA,
+                        PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA,
+                        PORT11_DATA, PORT10_DATA, PORT9_DATA,  PORT8_DATA,
+                        PORT7_DATA,  PORT6_DATA,  PORT5_DATA,  PORT4_DATA,
+                        PORT3_DATA,  PORT2_DATA,  PORT1_DATA,  PORT0_DATA,
+                }
+        },
+        { PINMUX_DATA_REG("PORTD063_032DR", 0xE6055004, 32) {
+                        0, 0, 0, 0, 0, 0, 0, 0,
+                        0, 0, 0, 0, 0, 0, 0, 0,
+                        0,           0,           PORT45_DATA, PORT44_DATA,
+                        PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA,
+                        PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA,
+                        PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA,
+                }
+        },
+        { PINMUX_DATA_REG("PORTR063_032DR", 0xE6056004, 32) {
+                        PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA,
+                        PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA,
+                        PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA,
+                        PORT51_DATA, PORT50_DATA, PORT49_DATA, PORT48_DATA,
+                        PORT47_DATA, PORT46_DATA, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                }
+        },
+        { PINMUX_DATA_REG("PORTR095_064DR", 0xE6056008, 32) {
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA,
+                        PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA,
+                        PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA,
+                }
+        },
+        { PINMUX_DATA_REG("PORTR191_160DR", 0xE6056014, 32) {
+                        0,            PORT190_DATA, PORT189_DATA, PORT188_DATA,
+                        PORT187_DATA, PORT186_DATA, PORT185_DATA, PORT184_DATA,
+                        PORT183_DATA, PORT182_DATA, PORT181_DATA, PORT180_DATA,
+                        PORT179_DATA, PORT178_DATA, PORT177_DATA, PORT176_DATA,
+                        PORT175_DATA, PORT174_DATA, PORT173_DATA, PORT172_DATA,
+                        PORT171_DATA, PORT170_DATA, PORT169_DATA, PORT168_DATA,
+                        PORT167_DATA, 0, 0, 0,
+                        0, 0, 0, 0,
+                }
+        },
+        { PINMUX_DATA_REG("PORTU127_096DR", 0xE605700C, 32) {
+                        0, 0, 0, 0,
+                        0, 0, 0, PORT120_DATA,
+                        PORT119_DATA, PORT118_DATA, PORT117_DATA, PORT116_DATA,
+                        PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA,
+                        PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA,
+                        PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA,
+                        PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA,
+                        0, 0, 0, 0,
+                }
+        },
+        { PINMUX_DATA_REG("PORTU159_128DR", 0xE6057010, 32) {
+                        0, 0, 0, 0,
+                        PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                }
+        },
+        { },
+};
+
+static struct pinmux_info sh7372_pinmux_info = {
+        .name = "sh7372_pfc",
+        .reserved_id = PINMUX_RESERVED,
+        .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
+        .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
+        .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
+        .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END },
+        .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
+        .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
+        .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
+
+        .first_gpio = GPIO_PORT0,
+        .last_gpio = GPIO_FN_SDENC_DV_CLKI,
+
+        .gpios = pinmux_gpios,
+        .cfg_regs = pinmux_config_regs,
+        .data_regs = pinmux_data_regs,
+
+        .gpio_data = pinmux_data,
+        .gpio_data_size = ARRAY_SIZE(pinmux_data),
+};
+
+void sh7372_pinmux_init(void)
+{
+        register_pinmux(&sh7372_pinmux_info);
+}
diff --git a/arch/arm/mach-shmobile/pfc-sh7377.c b/arch/arm/mach-shmobile/pfc-sh7377.c
new file mode 100644
index 00000000000..613e6842ad0
--- /dev/null
+++ b/arch/arm/mach-shmobile/pfc-sh7377.c
@@ -0,0 +1,1767 @@
+/*
+ * sh7377 processor support - PFC hardware block
+ *
+ * Copyright (C) 2010  NISHIMOTO Hiroki
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of the
+ * License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <mach/sh7377.h>
+
+#define _1(fn, pfx, sfx) fn(pfx, sfx)
+
+#define _10(fn, pfx, sfx)                               \
+        _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx),       \
+        _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx),       \
+        _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx),       \
+        _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx),       \
+        _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
+
+#define _90(fn, pfx, sfx)                               \
+        _10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx),     \
+        _10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx),     \
+        _10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx),     \
+        _10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx),     \
+        _10(fn, pfx##9, sfx)
+
+#define _265(fn, pfx, sfx)                              \
+        _10(fn, pfx, sfx), _90(fn, pfx, sfx),           \
+        _10(fn, pfx##10, sfx),                          \
+        _1(fn, pfx##110, sfx), _1(fn, pfx##111, sfx),   \
+        _1(fn, pfx##112, sfx), _1(fn, pfx##113, sfx),   \
+        _1(fn, pfx##114, sfx), _1(fn, pfx##115, sfx),   \
+        _1(fn, pfx##116, sfx), _1(fn, pfx##117, sfx),   \
+        _1(fn, pfx##118, sfx),                          \
+        _1(fn, pfx##128, sfx), _1(fn, pfx##129, sfx),   \
+        _10(fn, pfx##13, sfx), _10(fn, pfx##14, sfx),   \
+        _10(fn, pfx##15, sfx),                          \
+        _1(fn, pfx##160, sfx), _1(fn, pfx##161, sfx),   \
+        _1(fn, pfx##162, sfx), _1(fn, pfx##163, sfx),   \
+        _1(fn, pfx##164, sfx),                          \
+        _1(fn, pfx##192, sfx), _1(fn, pfx##193, sfx),   \
+        _1(fn, pfx##194, sfx), _1(fn, pfx##195, sfx),   \
+        _1(fn, pfx##196, sfx), _1(fn, pfx##197, sfx),   \
+        _1(fn, pfx##198, sfx), _1(fn, pfx##199, sfx),   \
+        _10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx),   \
+        _10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx),   \
+        _10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx),   \
+        _1(fn, pfx##260, sfx), _1(fn, pfx##261, sfx),   \
+        _1(fn, pfx##262, sfx), _1(fn, pfx##263, sfx),   \
+        _1(fn, pfx##264, sfx)
+
+#define _PORT(pfx, sfx) pfx##_##sfx
+#define PORT_265(str) _265(_PORT, PORT, str)
+
+enum {
+        PINMUX_RESERVED = 0,
+
+        PINMUX_DATA_BEGIN,
+        PORT_265(DATA), /* PORT0_DATA -> PORT264_DATA */
+        PINMUX_DATA_END,
+
+        PINMUX_INPUT_BEGIN,
+        PORT_265(IN), /* PORT0_IN -> PORT264_IN */
+        PINMUX_INPUT_END,
+
+        PINMUX_INPUT_PULLUP_BEGIN,
+        PORT_265(IN_PU), /* PORT0_IN_PU -> PORT264_IN_PU */
+        PINMUX_INPUT_PULLUP_END,
+
+        PINMUX_INPUT_PULLDOWN_BEGIN,
+        PORT_265(IN_PD), /* PORT0_IN_PD -> PORT264_IN_PD */
+        PINMUX_INPUT_PULLDOWN_END,
+
+        PINMUX_OUTPUT_BEGIN,
+        PORT_265(OUT), /* PORT0_OUT -> PORT264_OUT */
+        PINMUX_OUTPUT_END,
+
+        PINMUX_FUNCTION_BEGIN,
+        PORT_265(FN_IN), /* PORT0_FN_IN -> PORT264_FN_IN */
+        PORT_265(FN_OUT), /* PORT0_FN_OUT -> PORT264_FN_OUT */
+        PORT_265(FN0), /* PORT0_FN0 -> PORT264_FN0 */
+        PORT_265(FN1), /* PORT0_FN1 -> PORT264_FN1 */
+        PORT_265(FN2), /* PORT0_FN2 -> PORT264_FN2 */
+        PORT_265(FN3), /* PORT0_FN3 -> PORT264_FN3 */
+        PORT_265(FN4), /* PORT0_FN4 -> PORT264_FN4 */
+        PORT_265(FN5), /* PORT0_FN5 -> PORT264_FN5 */
+        PORT_265(FN6), /* PORT0_FN6 -> PORT264_FN6 */
+        PORT_265(FN7), /* PORT0_FN7 -> PORT264_FN7 */
+
+        MSELBCR_MSEL17_1, MSELBCR_MSEL17_0,
+        MSELBCR_MSEL16_1, MSELBCR_MSEL16_0,
+        PINMUX_FUNCTION_END,
+
+        PINMUX_MARK_BEGIN,
+        /* Special Pull-up / Pull-down Functions */
+        PORT66_KEYIN0_PU_MARK, PORT67_KEYIN1_PU_MARK,
+        PORT68_KEYIN2_PU_MARK, PORT69_KEYIN3_PU_MARK,
+        PORT70_KEYIN4_PU_MARK, PORT71_KEYIN5_PU_MARK,
+        PORT72_KEYIN6_PU_MARK,
+
+        /* 55-1 */
+        VBUS_0_MARK,
+        CPORT0_MARK,
+        CPORT1_MARK,
+        CPORT2_MARK,
+        CPORT3_MARK,
+        CPORT4_MARK,
+        CPORT5_MARK,
+        CPORT6_MARK,
+        CPORT7_MARK,
+        CPORT8_MARK,
+        CPORT9_MARK,
+        CPORT10_MARK,
+        CPORT11_MARK, SIN2_MARK,
+        CPORT12_MARK, XCTS2_MARK,
+        CPORT13_MARK, RFSPO4_MARK,
+        CPORT14_MARK, RFSPO5_MARK,
+        CPORT15_MARK, SCIFA0_SCK_MARK, GPS_AGC2_MARK,
+        CPORT16_MARK, SCIFA0_TXD_MARK, GPS_AGC3_MARK,
+        CPORT17_IC_OE_MARK, SOUT2_MARK,
+        CPORT18_MARK, XRTS2_MARK, PORT19_VIO_CKO2_MARK,
+        CPORT19_MPORT1_MARK,
+        CPORT20_MARK, RFSPO6_MARK,
+        CPORT21_MARK, STATUS0_MARK,
+        CPORT22_MARK, STATUS1_MARK,
+        CPORT23_MARK, STATUS2_MARK, RFSPO7_MARK,
+        B_SYNLD1_MARK,
+        B_SYNLD2_MARK, SYSENMSK_MARK,
+        XMAINPS_MARK,
+        XDIVPS_MARK,
+        XIDRST_MARK,
+        IDCLK_MARK, IC_DP_MARK,
+        IDIO_MARK, IC_DM_MARK,
+        SOUT1_MARK, SCIFA4_TXD_MARK, M02_BERDAT_MARK,
+        SIN1_MARK, SCIFA4_RXD_MARK, XWUP_MARK,
+        XRTS1_MARK, SCIFA4_RTS_MARK, M03_BERCLK_MARK,
+        XCTS1_MARK, SCIFA4_CTS_MARK,
+        PCMCLKO_MARK,
+        SYNC8KO_MARK,
+
+        /* 55-2 */
+        DNPCM_A_MARK,
+        UPPCM_A_MARK,
+        VACK_MARK,
+        XTALB1L_MARK,
+        GPS_AGC1_MARK, SCIFA0_RTS_MARK,
+        GPS_AGC4_MARK, SCIFA0_RXD_MARK,
+        GPS_PWRDOWN_MARK, SCIFA0_CTS_MARK,
+        GPS_IM_MARK,
+        GPS_IS_MARK,
+        GPS_QM_MARK,
+        GPS_QS_MARK,
+        FMSOCK_MARK, PORT49_IRDA_OUT_MARK, PORT49_IROUT_MARK,
+        FMSOOLR_MARK, BBIF2_TSYNC2_MARK, TPU2TO2_MARK, IPORT3_MARK,
+        FMSIOLR_MARK,
+        FMSOOBT_MARK, BBIF2_TSCK2_MARK, TPU2TO3_MARK, OPORT1_MARK,
+        FMSIOBT_MARK,
+        FMSOSLD_MARK, BBIF2_TXD2_MARK, OPORT2_MARK,
+        FMSOILR_MARK, PORT53_IRDA_IN_MARK, TPU3TO3_MARK, OPORT3_MARK,
+        FMSIILR_MARK,
+        FMSOIBT_MARK, PORT54_IRDA_FIRSEL_MARK, TPU3TO2_MARK, FMSIIBT_MARK,
+        FMSISLD_MARK, MFG0_OUT1_MARK, TPU0TO0_MARK,
+        A0_EA0_MARK, BS_MARK,
+        A12_EA12_MARK, PORT58_VIO_CKOR_MARK, TPU4TO2_MARK,
+        A13_EA13_MARK, PORT59_IROUT_MARK, MFG0_OUT2_MARK, TPU0TO1_MARK,
+        A14_EA14_MARK, PORT60_KEYOUT5_MARK,
+        A15_EA15_MARK, PORT61_KEYOUT4_MARK,
+        A16_EA16_MARK, PORT62_KEYOUT3_MARK, MSIOF0_SS1_MARK,
+        A17_EA17_MARK, PORT63_KEYOUT2_MARK, MSIOF0_TSYNC_MARK,
+        A18_EA18_MARK, PORT64_KEYOUT1_MARK, MSIOF0_TSCK_MARK,
+        A19_EA19_MARK, PORT65_KEYOUT0_MARK, MSIOF0_TXD_MARK,
+        A20_EA20_MARK, PORT66_KEYIN0_MARK, MSIOF0_RSCK_MARK,
+        A21_EA21_MARK, PORT67_KEYIN1_MARK, MSIOF0_RSYNC_MARK,
+        A22_EA22_MARK, PORT68_KEYIN2_MARK, MSIOF0_MCK0_MARK,
+        A23_EA23_MARK, PORT69_KEYIN3_MARK, MSIOF0_MCK1_MARK,
+        A24_EA24_MARK, PORT70_KEYIN4_MARK, MSIOF0_RXD_MARK,
+        A25_EA25_MARK, PORT71_KEYIN5_MARK, MSIOF0_SS2_MARK,
+        A26_MARK, PORT72_KEYIN6_MARK,
+        D0_ED0_NAF0_MARK,
+        D1_ED1_NAF1_MARK,
+        D2_ED2_NAF2_MARK,
+        D3_ED3_NAF3_MARK,
+        D4_ED4_NAF4_MARK,
+        D5_ED5_NAF5_MARK,
+        D6_ED6_NAF6_MARK,
+        D7_ED7_NAF7_MARK,
+        D8_ED8_NAF8_MARK,
+        D9_ED9_NAF9_MARK,
+        D10_ED10_NAF10_MARK,
+        D11_ED11_NAF11_MARK,
+        D12_ED12_NAF12_MARK,
+        D13_ED13_NAF13_MARK,
+        D14_ED14_NAF14_MARK,
+        D15_ED15_NAF15_MARK,
+        CS4_MARK,
+        CS5A_MARK, FMSICK_MARK,
+        CS5B_MARK, FCE1_MARK,
+
+        /* 55-3 */
+        CS6B_MARK, XCS2_MARK, CS6A_MARK, DACK0_MARK,
+        FCE0_MARK,
+        WAIT_MARK, DREQ0_MARK,
+        RD_XRD_MARK,
+        WE0_XWR0_FWE_MARK,
+        WE1_XWR1_MARK,
+        FRB_MARK,
+        CKO_MARK,
+        NBRSTOUT_MARK,
+        NBRST_MARK,
+        GPS_EPPSIN_MARK,
+        LATCHPULSE_MARK,
+        LTESIGNAL_MARK,
+        LEGACYSTATE_MARK,
+        TCKON_MARK,
+        VIO_VD_MARK, PORT128_KEYOUT0_MARK, IPORT0_MARK,
+        VIO_HD_MARK, PORT129_KEYOUT1_MARK, IPORT1_MARK,
+        VIO_D0_MARK, PORT130_KEYOUT2_MARK, PORT130_MSIOF2_RXD_MARK,
+        VIO_D1_MARK, PORT131_KEYOUT3_MARK, PORT131_MSIOF2_SS1_MARK,
+        VIO_D2_MARK, PORT132_KEYOUT4_MARK, PORT132_MSIOF2_SS2_MARK,
+        VIO_D3_MARK, PORT133_KEYOUT5_MARK, PORT133_MSIOF2_TSYNC_MARK,
+        VIO_D4_MARK, PORT134_KEYIN0_MARK, PORT134_MSIOF2_TXD_MARK,
+        VIO_D5_MARK, PORT135_KEYIN1_MARK, PORT135_MSIOF2_TSCK_MARK,
+        VIO_D6_MARK, PORT136_KEYIN2_MARK,
+        VIO_D7_MARK, PORT137_KEYIN3_MARK,
+        VIO_D8_MARK, M9_SLCD_A01_MARK, PORT138_FSIAOMC_MARK,
+        VIO_D9_MARK, M10_SLCD_CK1_MARK, PORT139_FSIAOLR_MARK,
+        VIO_D10_MARK, M11_SLCD_SO1_MARK, TPU0TO2_MARK, PORT140_FSIAOBT_MARK,
+        VIO_D11_MARK, M12_SLCD_CE1_MARK, TPU0TO3_MARK, PORT141_FSIAOSLD_MARK,
+        VIO_D12_MARK, M13_BSW_MARK, PORT142_FSIACK_MARK,
+        VIO_D13_MARK, M14_GSW_MARK, PORT143_FSIAILR_MARK,
+        VIO_D14_MARK, M15_RSW_MARK, PORT144_FSIAIBT_MARK,
+        VIO_D15_MARK, TPU1TO3_MARK, PORT145_FSIAISLD_MARK,
+        VIO_CLK_MARK, PORT146_KEYIN4_MARK, IPORT2_MARK,
+        VIO_FIELD_MARK, PORT147_KEYIN5_MARK,
+        VIO_CKO_MARK, PORT148_KEYIN6_MARK,
+        A27_MARK, RDWR_XWE_MARK, MFG0_IN1_MARK,
+        MFG0_IN2_MARK,
+        TS_SPSYNC3_MARK, MSIOF2_RSCK_MARK,
+        TS_SDAT3_MARK, MSIOF2_RSYNC_MARK,
+        TPU1TO2_MARK, TS_SDEN3_MARK, PORT153_MSIOF2_SS1_MARK,
+        SOUT3_MARK, SCIFA2_TXD1_MARK, MSIOF2_MCK0_MARK,
+        SIN3_MARK, SCIFA2_RXD1_MARK, MSIOF2_MCK1_MARK,
+        XRTS3_MARK, SCIFA2_RTS1_MARK, PORT156_MSIOF2_SS2_MARK,
+        XCTS3_MARK, SCIFA2_CTS1_MARK, PORT157_MSIOF2_RXD_MARK,
+
+        /* 55-4 */
+        DINT_MARK, SCIFA2_SCK1_MARK, TS_SCK3_MARK,
+        PORT159_SCIFB_SCK_MARK, PORT159_SCIFA5_SCK_MARK, NMI_MARK,
+        PORT160_SCIFB_TXD_MARK, PORT160_SCIFA5_TXD_MARK, SOUT0_MARK,
+        PORT161_SCIFB_CTS_MARK, PORT161_SCIFA5_CTS_MARK, XCTS0_MARK,
+        MFG3_IN2_MARK,
+        PORT162_SCIFB_RXD_MARK, PORT162_SCIFA5_RXD_MARK, SIN0_MARK,
+        MFG3_IN1_MARK,
+        PORT163_SCIFB_RTS_MARK, PORT163_SCIFA5_RTS_MARK, XRTS0_MARK,
+        MFG3_OUT1_MARK, TPU3TO0_MARK,
+        LCDD0_MARK, PORT192_KEYOUT0_MARK, EXT_CKI_MARK,
+        LCDD1_MARK, PORT193_KEYOUT1_MARK, PORT193_SCIFA5_CTS_MARK,
+        BBIF2_TSYNC1_MARK,
+        LCDD2_MARK, PORT194_KEYOUT2_MARK, PORT194_SCIFA5_RTS_MARK,
+        BBIF2_TSCK1_MARK,
+        LCDD3_MARK, PORT195_KEYOUT3_MARK, PORT195_SCIFA5_RXD_MARK,
+        BBIF2_TXD1_MARK,
+        LCDD4_MARK, PORT196_KEYOUT4_MARK, PORT196_SCIFA5_TXD_MARK,
+        LCDD5_MARK, PORT197_KEYOUT5_MARK, PORT197_SCIFA5_SCK_MARK,
+        MFG2_OUT2_MARK,
+        TPU2TO1_MARK,
+        LCDD6_MARK, XWR2_MARK,
+        LCDD7_MARK, TPU4TO1_MARK, MFG4_OUT2_MARK, XWR3_MARK,
+        LCDD8_MARK, PORT200_KEYIN0_MARK, VIO_DR0_MARK, D16_MARK, ED16_MARK,
+        LCDD9_MARK, PORT201_KEYIN1_MARK, VIO_DR1_MARK, D17_MARK, ED17_MARK,
+        LCDD10_MARK, PORT202_KEYIN2_MARK, VIO_DR2_MARK, D18_MARK, ED18_MARK,
+        LCDD11_MARK, PORT203_KEYIN3_MARK, VIO_DR3_MARK, D19_MARK, ED19_MARK,
+        LCDD12_MARK, PORT204_KEYIN4_MARK, VIO_DR4_MARK, D20_MARK, ED20_MARK,
+        LCDD13_MARK, PORT205_KEYIN5_MARK, VIO_DR5_MARK, D21_MARK, ED21_MARK,
+        LCDD14_MARK, PORT206_KEYIN6_MARK, VIO_DR6_MARK, D22_MARK, ED22_MARK,
+        LCDD15_MARK, PORT207_MSIOF0L_SS1_MARK, PORT207_KEYOUT0_MARK,
+        VIO_DR7_MARK, D23_MARK, ED23_MARK,
+        LCDD16_MARK, PORT208_MSIOF0L_SS2_MARK, PORT208_KEYOUT1_MARK,
+        VIO_VDR_MARK, D24_MARK, ED24_MARK,
+        LCDD17_MARK, PORT209_KEYOUT2_MARK, VIO_HDR_MARK, D25_MARK, ED25_MARK,
+        LCDD18_MARK, DREQ2_MARK, PORT210_MSIOF0L_SS1_MARK, D26_MARK, ED26_MARK,
+        LCDD19_MARK, PORT211_MSIOF0L_SS2_MARK, D27_MARK, ED27_MARK,
+        LCDD20_MARK, TS_SPSYNC1_MARK, MSIOF0L_MCK0_MARK, D28_MARK, ED28_MARK,
+        LCDD21_MARK, TS_SDAT1_MARK, MSIOF0L_MCK1_MARK, D29_MARK, ED29_MARK,
+        LCDD22_MARK, TS_SDEN1_MARK, MSIOF0L_RSCK_MARK, D30_MARK, ED30_MARK,
+        LCDD23_MARK, TS_SCK1_MARK, MSIOF0L_RSYNC_MARK, D31_MARK, ED31_MARK,
+        LCDDCK_MARK, LCDWR_MARK, PORT216_KEYOUT3_MARK, VIO_CLKR_MARK,
+        LCDRD_MARK, DACK2_MARK, MSIOF0L_TSYNC_MARK,
+        LCDHSYN_MARK, LCDCS_MARK, LCDCS2_MARK, DACK3_MARK,
+        PORT218_VIO_CKOR_MARK, PORT218_KEYOUT4_MARK,
+        LCDDISP_MARK, LCDRS_MARK, DREQ3_MARK, MSIOF0L_TSCK_MARK,
+        LCDVSYN_MARK, LCDVSYN2_MARK, PORT220_KEYOUT5_MARK,
+        LCDLCLK_MARK, DREQ1_MARK, PWEN_MARK, MSIOF0L_RXD_MARK,
+        LCDDON_MARK, LCDDON2_MARK, DACK1_MARK, OVCN_MARK, MSIOF0L_TXD_MARK,
+        SCIFA1_TXD_MARK, OVCN2_MARK,
+        EXTLP_MARK, SCIFA1_SCK_MARK, USBTERM_MARK, PORT226_VIO_CKO2_MARK,
+        SCIFA1_RTS_MARK, IDIN_MARK,
+        SCIFA1_RXD_MARK,
+        SCIFA1_CTS_MARK, MFG1_IN1_MARK,
+        MSIOF1_TXD_MARK, SCIFA2_TXD2_MARK, PORT230_FSIAOMC_MARK,
+        MSIOF1_TSYNC_MARK, SCIFA2_CTS2_MARK, PORT231_FSIAOLR_MARK,
+        MSIOF1_TSCK_MARK, SCIFA2_SCK2_MARK, PORT232_FSIAOBT_MARK,
+        MSIOF1_RXD_MARK, SCIFA2_RXD2_MARK, GPS_VCOTRIG_MARK,
+        PORT233_FSIACK_MARK,
+        MSIOF1_RSCK_MARK, SCIFA2_RTS2_MARK, PORT234_FSIAOSLD_MARK,
+        MSIOF1_RSYNC_MARK, OPORT0_MARK, MFG1_IN2_MARK, PORT235_FSIAILR_MARK,
+        MSIOF1_MCK0_MARK, I2C_SDA2_MARK, PORT236_FSIAIBT_MARK,
+        MSIOF1_MCK1_MARK, I2C_SCL2_MARK, PORT237_FSIAISLD_MARK,
+        MSIOF1_SS1_MARK, EDBGREQ3_MARK,
+
+        /* 55-5 */
+        MSIOF1_SS2_MARK,
+        SCIFA6_TXD_MARK,
+        PORT241_IRDA_OUT_MARK, PORT241_IROUT_MARK, MFG4_OUT1_MARK,
+        TPU4TO0_MARK,
+        PORT242_IRDA_IN_MARK, MFG4_IN2_MARK,
+        PORT243_IRDA_FIRSEL_MARK, PORT243_VIO_CKO2_MARK,
+        PORT244_SCIFA5_CTS_MARK, MFG2_IN1_MARK, PORT244_SCIFB_CTS_MARK,
+        PORT244_MSIOF2_RXD_MARK,
+        PORT245_SCIFA5_RTS_MARK, MFG2_IN2_MARK, PORT245_SCIFB_RTS_MARK,
+        PORT245_MSIOF2_TXD_MARK,
+        PORT246_SCIFA5_RXD_MARK, MFG1_OUT1_MARK, PORT246_SCIFB_RXD_MARK,
+        TPU1TO0_MARK,
+        PORT247_SCIFA5_TXD_MARK, MFG3_OUT2_MARK, PORT247_SCIFB_TXD_MARK,
+        TPU3TO1_MARK,
+        PORT248_SCIFA5_SCK_MARK, MFG2_OUT1_MARK, PORT248_SCIFB_SCK_MARK,
+        TPU2TO0_MARK,
+        PORT248_MSIOF2_TSCK_MARK,
+        PORT249_IROUT_MARK, MFG4_IN1_MARK, PORT249_MSIOF2_TSYNC_MARK,
+        SDHICLK0_MARK, TCK2_SWCLK_MC0_MARK,
+        SDHICD0_MARK,
+        SDHID0_0_MARK, TMS2_SWDIO_MC0_MARK,
+        SDHID0_1_MARK, TDO2_SWO0_MC0_MARK,
+        SDHID0_2_MARK, TDI2_MARK,
+        SDHID0_3_MARK, RTCK2_SWO1_MC0_MARK,
+        SDHICMD0_MARK, TRST2_MARK,
+        SDHIWP0_MARK, EDBGREQ2_MARK,
+        SDHICLK1_MARK, TCK3_SWCLK_MC1_MARK,
+        SDHID1_0_MARK, M11_SLCD_SO2_MARK, TS_SPSYNC2_MARK,
+        TMS3_SWDIO_MC1_MARK,
+        SDHID1_1_MARK, M9_SLCD_A02_MARK, TS_SDAT2_MARK, TDO3_SWO0_MC1_MARK,
+        SDHID1_2_MARK, M10_SLCD_CK2_MARK, TS_SDEN2_MARK, TDI3_MARK,
+        SDHID1_3_MARK, M12_SLCD_CE2_MARK, TS_SCK2_MARK, RTCK3_SWO1_MC1_MARK,
+        SDHICMD1_MARK, TRST3_MARK,
+        RESETOUTS_MARK,
+        PINMUX_MARK_END,
+};
+
+#define PORT_DATA_I(nr) \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
+
+#define PORT_DATA_I_PD(nr)      \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
+                                PORT##nr##_IN, PORT##nr##_IN_PD)
+
+#define PORT_DATA_I_PU(nr)      \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
+                                PORT##nr##_IN, PORT##nr##_IN_PU)
+
+#define PORT_DATA_I_PU_PD(nr)   \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
+                                PORT##nr##_IN, PORT##nr##_IN_PD,        \
+                                PORT##nr##_IN_PU)
+
+#define PORT_DATA_O(nr) \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
+                                PORT##nr##_OUT)
+
+#define PORT_DATA_IO(nr)        \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
+                                PORT##nr##_OUT, PORT##nr##_IN)
+
+#define PORT_DATA_IO_PD(nr)     \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
+                                PORT##nr##_OUT, PORT##nr##_IN,          \
+                                PORT##nr##_IN_PD)
+
+#define PORT_DATA_IO_PU(nr)     \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
+                                PORT##nr##_OUT, PORT##nr##_IN,          \
+                                PORT##nr##_IN_PU)
+
+#define PORT_DATA_IO_PU_PD(nr)  \
+        PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
+                                PORT##nr##_OUT, PORT##nr##_IN,          \
+                                PORT##nr##_IN_PD, PORT##nr##_IN_PU)
+
+static pinmux_enum_t pinmux_data[] = {
+        /* specify valid pin states for each pin in GPIO mode */
+        /* 55-1 (GPIO) */
+        PORT_DATA_I_PD(0), PORT_DATA_I_PU(1),
+        PORT_DATA_I_PU(2), PORT_DATA_I_PU(3),
+        PORT_DATA_I_PU(4), PORT_DATA_I_PU(5),
+        PORT_DATA_I_PU(6), PORT_DATA_I_PU(7),
+        PORT_DATA_I_PU(8), PORT_DATA_I_PU(9),
+        PORT_DATA_I_PU(10), PORT_DATA_I_PU(11),
+        PORT_DATA_IO_PU(12), PORT_DATA_IO_PU(13),
+        PORT_DATA_IO_PU_PD(14), PORT_DATA_IO_PU_PD(15),
+        PORT_DATA_O(16), PORT_DATA_IO(17),
+        PORT_DATA_O(18), PORT_DATA_O(19),
+        PORT_DATA_O(20), PORT_DATA_O(21),
+        PORT_DATA_O(22), PORT_DATA_O(23),
+        PORT_DATA_O(24), PORT_DATA_I_PD(25),
+        PORT_DATA_I_PD(26), PORT_DATA_O(27),
+        PORT_DATA_O(28), PORT_DATA_O(29),
+        PORT_DATA_IO(30), PORT_DATA_IO_PU(31),
+        PORT_DATA_IO_PD(32), PORT_DATA_I_PU(33),
+        PORT_DATA_IO_PD(34), PORT_DATA_I_PU_PD(35),
+        PORT_DATA_O(36), PORT_DATA_IO(37),
+
+        /* 55-2 (GPIO) */
+        PORT_DATA_O(38), PORT_DATA_I_PU(39),
+        PORT_DATA_I_PU_PD(40), PORT_DATA_O(41),
+        PORT_DATA_IO_PD(42), PORT_DATA_IO_PD(43),
+        PORT_DATA_IO_PD(44), PORT_DATA_I_PD(45),
+        PORT_DATA_I_PD(46), PORT_DATA_I_PD(47),
+        PORT_DATA_I_PD(48), PORT_DATA_IO_PU_PD(49),
+        PORT_DATA_IO_PD(50), PORT_DATA_IO_PD(51),
+        PORT_DATA_O(52), PORT_DATA_IO_PU_PD(53),
+        PORT_DATA_IO_PU_PD(54), PORT_DATA_IO_PD(55),
+        PORT_DATA_I_PU_PD(56), PORT_DATA_IO(57),
+        PORT_DATA_IO(58), PORT_DATA_IO(59),
+        PORT_DATA_IO(60), PORT_DATA_IO(61),
+        PORT_DATA_IO_PD(62), PORT_DATA_IO_PD(63),
+        PORT_DATA_IO_PD(64), PORT_DATA_IO_PD(65),
+        PORT_DATA_IO_PU_PD(66), PORT_DATA_IO_PU_PD(67),
+        PORT_DATA_IO_PU_PD(68), PORT_DATA_IO_PU_PD(69),
+        PORT_DATA_IO_PU_PD(70), PORT_DATA_IO_PU_PD(71),
+        PORT_DATA_IO_PU_PD(72), PORT_DATA_I_PU_PD(73),
+        PORT_DATA_IO_PU(74), PORT_DATA_IO_PU(75),
+        PORT_DATA_IO_PU(76), PORT_DATA_IO_PU(77),
+        PORT_DATA_IO_PU(78), PORT_DATA_IO_PU(79),
+        PORT_DATA_IO_PU(80), PORT_DATA_IO_PU(81),
+        PORT_DATA_IO_PU(82), PORT_DATA_IO_PU(83),
+        PORT_DATA_IO_PU(84), PORT_DATA_IO_PU(85),
+        PORT_DATA_IO_PU(86), PORT_DATA_IO_PU(87),
+        PORT_DATA_IO_PU(88), PORT_DATA_IO_PU(89),
+        PORT_DATA_O(90), PORT_DATA_IO_PU(91),
+        PORT_DATA_O(92),
+
+        /* 55-3 (GPIO) */
+        PORT_DATA_IO_PU(93),
+        PORT_DATA_O(94),
+        PORT_DATA_I_PU_PD(95),
+        PORT_DATA_IO(96), PORT_DATA_IO(97),
+        PORT_DATA_IO(98), PORT_DATA_I_PU(99),
+        PORT_DATA_O(100), PORT_DATA_O(101),
+        PORT_DATA_I_PU(102), PORT_DATA_IO_PD(103),
+        PORT_DATA_I_PD(104), PORT_DATA_I_PD(105),
+        PORT_DATA_I_PD(106), PORT_DATA_I_PD(107),
+        PORT_DATA_I_PD(108), PORT_DATA_IO_PD(109),
+        PORT_DATA_IO_PD(110), PORT_DATA_I_PD(111),
+        PORT_DATA_IO_PD(112), PORT_DATA_IO_PD(113),
+        PORT_DATA_IO_PD(114), PORT_DATA_I_PD(115),
+        PORT_DATA_I_PD(116), PORT_DATA_IO_PD(117),
+        PORT_DATA_I_PD(118), PORT_DATA_IO_PD(128),
+        PORT_DATA_IO_PD(129), PORT_DATA_IO_PD(130),
+        PORT_DATA_IO_PD(131), PORT_DATA_IO_PD(132),
+        PORT_DATA_IO_PD(133), PORT_DATA_IO_PU_PD(134),
+        PORT_DATA_IO_PU_PD(135), PORT_DATA_IO_PU_PD(136),
+        PORT_DATA_IO_PU_PD(137), PORT_DATA_IO_PD(138),
+        PORT_DATA_IO_PD(139), PORT_DATA_IO_PD(140),
+        PORT_DATA_IO_PD(141), PORT_DATA_IO_PD(142),
+        PORT_DATA_IO_PD(143), PORT_DATA_IO_PU_PD(144),
+        PORT_DATA_IO_PD(145), PORT_DATA_IO_PU_PD(146),
+        PORT_DATA_IO_PU_PD(147), PORT_DATA_IO_PU_PD(148),
+        PORT_DATA_IO_PU_PD(149), PORT_DATA_I_PD(150),
+        PORT_DATA_IO_PU_PD(151), PORT_DATA_IO_PD(152),
+        PORT_DATA_IO_PD(153), PORT_DATA_IO_PD(154),
+        PORT_DATA_I_PD(155), PORT_DATA_IO_PU_PD(156),
+        PORT_DATA_I_PD(157), PORT_DATA_IO_PD(158),
+
+        /* 55-4 (GPIO) */
+        PORT_DATA_IO_PU_PD(159), PORT_DATA_IO_PU_PD(160),
+        PORT_DATA_I_PU_PD(161), PORT_DATA_I_PU_PD(162),
+        PORT_DATA_IO_PU_PD(163), PORT_DATA_I_PU_PD(164),
+        PORT_DATA_IO_PD(192), PORT_DATA_IO_PD(193),
+        PORT_DATA_IO_PD(194), PORT_DATA_IO_PD(195),
+        PORT_DATA_IO_PD(196), PORT_DATA_IO_PD(197),
+        PORT_DATA_IO_PD(198), PORT_DATA_IO_PD(199),
+        PORT_DATA_IO_PU_PD(200), PORT_DATA_IO_PU_PD(201),
+        PORT_DATA_IO_PU_PD(202), PORT_DATA_IO_PU_PD(203),
+        PORT_DATA_IO_PU_PD(204), PORT_DATA_IO_PU_PD(205),
+        PORT_DATA_IO_PU_PD(206), PORT_DATA_IO_PD(207),
+        PORT_DATA_IO_PD(208), PORT_DATA_IO_PD(209),
+        PORT_DATA_IO_PD(210), PORT_DATA_IO_PD(211),
+        PORT_DATA_IO_PD(212), PORT_DATA_IO_PD(213),
+        PORT_DATA_IO_PD(214), PORT_DATA_IO_PD(215),
+        PORT_DATA_IO_PD(216), PORT_DATA_IO_PD(217),
+        PORT_DATA_O(218), PORT_DATA_IO_PD(219),
+        PORT_DATA_IO_PD(220), PORT_DATA_IO_PD(221),
+        PORT_DATA_IO_PU_PD(222),
+        PORT_DATA_I_PU_PD(223), PORT_DATA_I_PU_PD(224),
+        PORT_DATA_IO_PU_PD(225), PORT_DATA_O(226),
+        PORT_DATA_IO_PU_PD(227), PORT_DATA_I_PD(228),
+        PORT_DATA_I_PD(229), PORT_DATA_IO(230),
+        PORT_DATA_IO_PD(231), PORT_DATA_IO_PU_PD(232),
+        PORT_DATA_I_PD(233), PORT_DATA_IO_PU_PD(234),
+        PORT_DATA_IO_PU_PD(235), PORT_DATA_IO_PU_PD(236),
+        PORT_DATA_IO_PD(237), PORT_DATA_IO_PU_PD(238),
+
+        /* 55-5 (GPIO) */
+        PORT_DATA_IO_PU_PD(239), PORT_DATA_IO_PU_PD(240),
+        PORT_DATA_O(241), PORT_DATA_I_PD(242),
+        PORT_DATA_IO_PU_PD(243), PORT_DATA_IO_PU_PD(244),
+        PORT_DATA_IO_PU_PD(245), PORT_DATA_IO_PU_PD(246),
+        PORT_DATA_IO_PU_PD(247), PORT_DATA_IO_PU_PD(248),
+        PORT_DATA_IO_PU_PD(249), PORT_DATA_IO_PD(250),
+        PORT_DATA_IO_PU_PD(251), PORT_DATA_IO_PU_PD(252),
+        PORT_DATA_IO_PU_PD(253), PORT_DATA_IO_PU_PD(254),
+        PORT_DATA_IO_PU_PD(255), PORT_DATA_IO_PU_PD(256),
+        PORT_DATA_IO_PU_PD(257), PORT_DATA_IO_PD(258),
+        PORT_DATA_IO_PU_PD(259), PORT_DATA_IO_PU_PD(260),
+        PORT_DATA_IO_PU_PD(261), PORT_DATA_IO_PU_PD(262),
+        PORT_DATA_IO_PU_PD(263),
+
+        /* Special Pull-up / Pull-down Functions */
+        PINMUX_DATA(PORT66_KEYIN0_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
+                                PORT66_FN2, PORT66_IN_PU),
+        PINMUX_DATA(PORT67_KEYIN1_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
+                                PORT67_FN2, PORT67_IN_PU),
+        PINMUX_DATA(PORT68_KEYIN2_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
+                                PORT68_FN2, PORT68_IN_PU),
+        PINMUX_DATA(PORT69_KEYIN3_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
+                                PORT69_FN2, PORT69_IN_PU),
+        PINMUX_DATA(PORT70_KEYIN4_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
+                                PORT70_FN2, PORT70_IN_PU),
+        PINMUX_DATA(PORT71_KEYIN5_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
+                                PORT71_FN2, PORT71_IN_PU),
+        PINMUX_DATA(PORT72_KEYIN6_PU_MARK, MSELBCR_MSEL17_0, MSELBCR_MSEL16_0,
+                                PORT72_FN2, PORT72_IN_PU),
+
+
+        /* 55-1 (FN) */
+        PINMUX_DATA(VBUS_0_MARK, PORT0_FN1),
+        PINMUX_DATA(CPORT0_MARK, PORT1_FN1),
+        PINMUX_DATA(CPORT1_MARK, PORT2_FN1),
+        PINMUX_DATA(CPORT2_MARK, PORT3_FN1),
+        PINMUX_DATA(CPORT3_MARK, PORT4_FN1),
+        PINMUX_DATA(CPORT4_MARK, PORT5_FN1),
+        PINMUX_DATA(CPORT5_MARK, PORT6_FN1),
+        PINMUX_DATA(CPORT6_MARK, PORT7_FN1),
+        PINMUX_DATA(CPORT7_MARK, PORT8_FN1),
+        PINMUX_DATA(CPORT8_MARK, PORT9_FN1),
+        PINMUX_DATA(CPORT9_MARK, PORT10_FN1),
+        PINMUX_DATA(CPORT10_MARK, PORT11_FN1),
+        PINMUX_DATA(CPORT11_MARK, PORT12_FN1),
+        PINMUX_DATA(SIN2_MARK, PORT12_FN2),
+        PINMUX_DATA(CPORT12_MARK, PORT13_FN1),
+        PINMUX_DATA(XCTS2_MARK, PORT13_FN2),
+        PINMUX_DATA(CPORT13_MARK, PORT14_FN1),
+        PINMUX_DATA(RFSPO4_MARK, PORT14_FN2),
+        PINMUX_DATA(CPORT14_MARK, PORT15_FN1),
+        PINMUX_DATA(RFSPO5_MARK, PORT15_FN2),
+        PINMUX_DATA(CPORT15_MARK, PORT16_FN1),
+        PINMUX_DATA(SCIFA0_SCK_MARK, PORT16_FN2),
+        PINMUX_DATA(GPS_AGC2_MARK, PORT16_FN3),
+        PINMUX_DATA(CPORT16_MARK, PORT17_FN1),
+        PINMUX_DATA(SCIFA0_TXD_MARK, PORT17_FN2),
+        PINMUX_DATA(GPS_AGC3_MARK, PORT17_FN3),
+        PINMUX_DATA(CPORT17_IC_OE_MARK, PORT18_FN1),
+        PINMUX_DATA(SOUT2_MARK, PORT18_FN2),
+        PINMUX_DATA(CPORT18_MARK, PORT19_FN1),
+        PINMUX_DATA(XRTS2_MARK, PORT19_FN2),
+        PINMUX_DATA(PORT19_VIO_CKO2_MARK, PORT19_FN3),
+        PINMUX_DATA(CPORT19_MPORT1_MARK, PORT20_FN1),
+        PINMUX_DATA(CPORT20_MARK, PORT21_FN1),
+        PINMUX_DATA(RFSPO6_MARK, PORT21_FN2),
+        PINMUX_DATA(CPORT21_MARK, PORT22_FN1),
+        PINMUX_DATA(STATUS0_MARK, PORT22_FN2),
+        PINMUX_DATA(CPORT22_MARK, PORT23_FN1),
+        PINMUX_DATA(STATUS1_MARK, PORT23_FN2),
+        PINMUX_DATA(CPORT23_MARK, PORT24_FN1),
+        PINMUX_DATA(STATUS2_MARK, PORT24_FN2),
+        PINMUX_DATA(RFSPO7_MARK, PORT24_FN3),
+        PINMUX_DATA(B_SYNLD1_MARK, PORT25_FN1),
+        PINMUX_DATA(B_SYNLD2_MARK, PORT26_FN1),
+        PINMUX_DATA(SYSENMSK_MARK, PORT26_FN2),
+        PINMUX_DATA(XMAINPS_MARK, PORT27_FN1),
+        PINMUX_DATA(XDIVPS_MARK, PORT28_FN1),
+        PINMUX_DATA(XIDRST_MARK, PORT29_FN1),
+        PINMUX_DATA(IDCLK_MARK, PORT30_FN1),
+        PINMUX_DATA(IC_DP_MARK, PORT30_FN2),
+        PINMUX_DATA(IDIO_MARK, PORT31_FN1),
+        PINMUX_DATA(IC_DM_MARK, PORT31_FN2),
+        PINMUX_DATA(SOUT1_MARK, PORT32_FN1),
+        PINMUX_DATA(SCIFA4_TXD_MARK, PORT32_FN2),
+        PINMUX_DATA(M02_BERDAT_MARK, PORT32_FN3),
+        PINMUX_DATA(SIN1_MARK, PORT33_FN1),
+        PINMUX_DATA(SCIFA4_RXD_MARK, PORT33_FN2),
+        PINMUX_DATA(XWUP_MARK, PORT33_FN3),
+        PINMUX_DATA(XRTS1_MARK, PORT34_FN1),
+        PINMUX_DATA(SCIFA4_RTS_MARK, PORT34_FN2),
+        PINMUX_DATA(M03_BERCLK_MARK, PORT34_FN3),
+        PINMUX_DATA(XCTS1_MARK, PORT35_FN1),
+        PINMUX_DATA(SCIFA4_CTS_MARK, PORT35_FN2),
+        PINMUX_DATA(PCMCLKO_MARK, PORT36_FN1),
+        PINMUX_DATA(SYNC8KO_MARK, PORT37_FN1),
+
+        /* 55-2 (FN) */
+        PINMUX_DATA(DNPCM_A_MARK, PORT38_FN1),
+        PINMUX_DATA(UPPCM_A_MARK, PORT39_FN1),
+        PINMUX_DATA(VACK_MARK, PORT40_FN1),
+        PINMUX_DATA(XTALB1L_MARK, PORT41_FN1),
+        PINMUX_DATA(GPS_AGC1_MARK, PORT42_FN1),
+        PINMUX_DATA(SCIFA0_RTS_MARK, PORT42_FN2),
+        PINMUX_DATA(GPS_AGC4_MARK, PORT43_FN1),
+        PINMUX_DATA(SCIFA0_RXD_MARK, PORT43_FN2),
+        PINMUX_DATA(GPS_PWRDOWN_MARK, PORT44_FN1),
+        PINMUX_DATA(SCIFA0_CTS_MARK, PORT44_FN2),
+        PINMUX_DATA(GPS_IM_MARK, PORT45_FN1),
+        PINMUX_DATA(GPS_IS_MARK, PORT46_FN1),
+        PINMUX_DATA(GPS_QM_MARK, PORT47_FN1),
+        PINMUX_DATA(GPS_QS_MARK, PORT48_FN1),
+        PINMUX_DATA(FMSOCK_MARK, PORT49_FN1),
+        PINMUX_DATA(PORT49_IRDA_OUT_MARK, PORT49_FN2),
+        PINMUX_DATA(PORT49_IROUT_MARK, PORT49_FN3),
+        PINMUX_DATA(FMSOOLR_MARK, PORT50_FN1),
+        PINMUX_DATA(BBIF2_TSYNC2_MARK, PORT50_FN2),
+        PINMUX_DATA(TPU2TO2_MARK, PORT50_FN3),
+        PINMUX_DATA(IPORT3_MARK, PORT50_FN4),
+        PINMUX_DATA(FMSIOLR_MARK, PORT50_FN5),
+        PINMUX_DATA(FMSOOBT_MARK, PORT51_FN1),
+        PINMUX_DATA(BBIF2_TSCK2_MARK, PORT51_FN2),
+        PINMUX_DATA(TPU2TO3_MARK, PORT51_FN3),
+        PINMUX_DATA(OPORT1_MARK, PORT51_FN4),
+        PINMUX_DATA(FMSIOBT_MARK, PORT51_FN5),
+        PINMUX_DATA(FMSOSLD_MARK, PORT52_FN1),
+        PINMUX_DATA(BBIF2_TXD2_MARK, PORT52_FN2),
+        PINMUX_DATA(OPORT2_MARK, PORT52_FN3),
+        PINMUX_DATA(FMSOILR_MARK, PORT53_FN1),
+        PINMUX_DATA(PORT53_IRDA_IN_MARK, PORT53_FN2),
+        PINMUX_DATA(TPU3TO3_MARK, PORT53_FN3),
+        PINMUX_DATA(OPORT3_MARK, PORT53_FN4),
+        PINMUX_DATA(FMSIILR_MARK, PORT53_FN5),
+        PINMUX_DATA(FMSOIBT_MARK, PORT54_FN1),
+        PINMUX_DATA(PORT54_IRDA_FIRSEL_MARK, PORT54_FN2),
+        PINMUX_DATA(TPU3TO2_MARK, PORT54_FN3),
+        PINMUX_DATA(FMSIIBT_MARK, PORT54_FN4),
+        PINMUX_DATA(FMSISLD_MARK, PORT55_FN1),
+        PINMUX_DATA(MFG0_OUT1_MARK, PORT55_FN2),
+        PINMUX_DATA(TPU0TO0_MARK, PORT55_FN3),
+        PINMUX_DATA(A0_EA0_MARK, PORT57_FN1),
+        PINMUX_DATA(BS_MARK, PORT57_FN2),
+        PINMUX_DATA(A12_EA12_MARK, PORT58_FN1),
+        PINMUX_DATA(PORT58_VIO_CKOR_MARK, PORT58_FN2),
+        PINMUX_DATA(TPU4TO2_MARK, PORT58_FN3),
+        PINMUX_DATA(A13_EA13_MARK, PORT59_FN1),
+        PINMUX_DATA(PORT59_IROUT_MARK, PORT59_FN2),
+        PINMUX_DATA(MFG0_OUT2_MARK, PORT59_FN3),
+        PINMUX_DATA(TPU0TO1_MARK, PORT59_FN4),
+        PINMUX_DATA(A14_EA14_MARK, PORT60_FN1),
+        PINMUX_DATA(PORT60_KEYOUT5_MARK, PORT60_FN2),
+        PINMUX_DATA(A15_EA15_MARK, PORT61_FN1),
+        PINMUX_DATA(PORT61_KEYOUT4_MARK, PORT61_FN2),
+        PINMUX_DATA(A16_EA16_MARK, PORT62_FN1),
+        PINMUX_DATA(PORT62_KEYOUT3_MARK, PORT62_FN2),
+        PINMUX_DATA(MSIOF0_SS1_MARK, PORT62_FN3),
+        PINMUX_DATA(A17_EA17_MARK, PORT63_FN1),
+        PINMUX_DATA(PORT63_KEYOUT2_MARK, PORT63_FN2),
+        PINMUX_DATA(MSIOF0_TSYNC_MARK, PORT63_FN3),
+        PINMUX_DATA(A18_EA18_MARK, PORT64_FN1),
+        PINMUX_DATA(PORT64_KEYOUT1_MARK, PORT64_FN2),
+        PINMUX_DATA(MSIOF0_TSCK_MARK, PORT64_FN3),
+        PINMUX_DATA(A19_EA19_MARK, PORT65_FN1),
+        PINMUX_DATA(PORT65_KEYOUT0_MARK, PORT65_FN2),
+        PINMUX_DATA(MSIOF0_TXD_MARK, PORT65_FN3),
+        PINMUX_DATA(A20_EA20_MARK, PORT66_FN1),
+        PINMUX_DATA(PORT66_KEYIN0_MARK, PORT66_FN2),
+        PINMUX_DATA(MSIOF0_RSCK_MARK, PORT66_FN3),
+        PINMUX_DATA(A21_EA21_MARK, PORT67_FN1),
+        PINMUX_DATA(PORT67_KEYIN1_MARK, PORT67_FN2),
+        PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT67_FN3),
+        PINMUX_DATA(A22_EA22_MARK, PORT68_FN1),
+        PINMUX_DATA(PORT68_KEYIN2_MARK, PORT68_FN2),
+        PINMUX_DATA(MSIOF0_MCK0_MARK, PORT68_FN3),
+        PINMUX_DATA(A23_EA23_MARK, PORT69_FN1),
+        PINMUX_DATA(PORT69_KEYIN3_MARK, PORT69_FN2),
+        PINMUX_DATA(MSIOF0_MCK1_MARK, PORT69_FN3),
+        PINMUX_DATA(A24_EA24_MARK, PORT70_FN1),
+        PINMUX_DATA(PORT70_KEYIN4_MARK, PORT70_FN2),
+        PINMUX_DATA(MSIOF0_RXD_MARK, PORT70_FN3),
+        PINMUX_DATA(A25_EA25_MARK, PORT71_FN1),
+        PINMUX_DATA(PORT71_KEYIN5_MARK, PORT71_FN2),
+        PINMUX_DATA(MSIOF0_SS2_MARK, PORT71_FN3),
+        PINMUX_DATA(A26_MARK, PORT72_FN1),
+        PINMUX_DATA(PORT72_KEYIN6_MARK, PORT72_FN2),
+        PINMUX_DATA(D0_ED0_NAF0_MARK, PORT74_FN1),
+        PINMUX_DATA(D1_ED1_NAF1_MARK, PORT75_FN1),
+        PINMUX_DATA(D2_ED2_NAF2_MARK, PORT76_FN1),
+        PINMUX_DATA(D3_ED3_NAF3_MARK, PORT77_FN1),
+        PINMUX_DATA(D4_ED4_NAF4_MARK, PORT78_FN1),
+        PINMUX_DATA(D5_ED5_NAF5_MARK, PORT79_FN1),
+        PINMUX_DATA(D6_ED6_NAF6_MARK, PORT80_FN1),
+        PINMUX_DATA(D7_ED7_NAF7_MARK, PORT81_FN1),
+        PINMUX_DATA(D8_ED8_NAF8_MARK, PORT82_FN1),
+        PINMUX_DATA(D9_ED9_NAF9_MARK, PORT83_FN1),
+        PINMUX_DATA(D10_ED10_NAF10_MARK, PORT84_FN1),
+        PINMUX_DATA(D11_ED11_NAF11_MARK, PORT85_FN1),
+        PINMUX_DATA(D12_ED12_NAF12_MARK, PORT86_FN1),
+        PINMUX_DATA(D13_ED13_NAF13_MARK, PORT87_FN1),
+        PINMUX_DATA(D14_ED14_NAF14_MARK, PORT88_FN1),
+        PINMUX_DATA(D15_ED15_NAF15_MARK, PORT89_FN1),
+        PINMUX_DATA(CS4_MARK, PORT90_FN1),
+        PINMUX_DATA(CS5A_MARK, PORT91_FN1),
+        PINMUX_DATA(FMSICK_MARK, PORT91_FN2),
+        PINMUX_DATA(CS5B_MARK, PORT92_FN1),
+        PINMUX_DATA(FCE1_MARK, PORT92_FN2),
+
+        /* 55-3 (FN) */
+        PINMUX_DATA(CS6B_MARK, PORT93_FN1),
+        PINMUX_DATA(XCS2_MARK, PORT93_FN2),
+        PINMUX_DATA(CS6A_MARK, PORT93_FN3),
+        PINMUX_DATA(DACK0_MARK, PORT93_FN4),
+        PINMUX_DATA(FCE0_MARK, PORT94_FN1),
+        PINMUX_DATA(WAIT_MARK, PORT95_FN1),
+        PINMUX_DATA(DREQ0_MARK, PORT95_FN2),
+        PINMUX_DATA(RD_XRD_MARK, PORT96_FN1),
+        PINMUX_DATA(WE0_XWR0_FWE_MARK, PORT97_FN1),
+        PINMUX_DATA(WE1_XWR1_MARK, PORT98_FN1),
+        PINMUX_DATA(FRB_MARK, PORT99_FN1),
+        PINMUX_DATA(CKO_MARK, PORT100_FN1),
+        PINMUX_DATA(NBRSTOUT_MARK, PORT101_FN1),
+        PINMUX_DATA(NBRST_MARK, PORT102_FN1),
+        PINMUX_DATA(GPS_EPPSIN_MARK, PORT106_FN1),
+        PINMUX_DATA(LATCHPULSE_MARK, PORT110_FN1),
+        PINMUX_DATA(LTESIGNAL_MARK, PORT111_FN1),
+        PINMUX_DATA(LEGACYSTATE_MARK, PORT112_FN1),
+        PINMUX_DATA(TCKON_MARK, PORT118_FN1),
+        PINMUX_DATA(VIO_VD_MARK, PORT128_FN1),
+        PINMUX_DATA(PORT128_KEYOUT0_MARK, PORT128_FN2),
+        PINMUX_DATA(IPORT0_MARK, PORT128_FN3),
+        PINMUX_DATA(VIO_HD_MARK, PORT129_FN1),
+        PINMUX_DATA(PORT129_KEYOUT1_MARK, PORT129_FN2),
+        PINMUX_DATA(IPORT1_MARK, PORT129_FN3),
+        PINMUX_DATA(VIO_D0_MARK, PORT130_FN1),
+        PINMUX_DATA(PORT130_KEYOUT2_MARK, PORT130_FN2),
+        PINMUX_DATA(PORT130_MSIOF2_RXD_MARK, PORT130_FN3),
+        PINMUX_DATA(VIO_D1_MARK, PORT131_FN1),
+        PINMUX_DATA(PORT131_KEYOUT3_MARK, PORT131_FN2),
+        PINMUX_DATA(PORT131_MSIOF2_SS1_MARK, PORT131_FN3),
+        PINMUX_DATA(VIO_D2_MARK, PORT132_FN1),
+        PINMUX_DATA(PORT132_KEYOUT4_MARK, PORT132_FN2),
+        PINMUX_DATA(PORT132_MSIOF2_SS2_MARK, PORT132_FN3),
+        PINMUX_DATA(VIO_D3_MARK, PORT133_FN1),
+        PINMUX_DATA(PORT133_KEYOUT5_MARK, PORT133_FN2),
+        PINMUX_DATA(PORT133_MSIOF2_TSYNC_MARK, PORT133_FN3),
+        PINMUX_DATA(VIO_D4_MARK, PORT134_FN1),
+        PINMUX_DATA(PORT134_KEYIN0_MARK, PORT134_FN2),
+        PINMUX_DATA(PORT134_MSIOF2_TXD_MARK, PORT134_FN3),
+        PINMUX_DATA(VIO_D5_MARK, PORT135_FN1),
+        PINMUX_DATA(PORT135_KEYIN1_MARK, PORT135_FN2),
+        PINMUX_DATA(PORT135_MSIOF2_TSCK_MARK, PORT135_FN3),
+        PINMUX_DATA(VIO_D6_MARK, PORT136_FN1),
+        PINMUX_DATA(PORT136_KEYIN2_MARK, PORT136_FN2),
+        PINMUX_DATA(VIO_D7_MARK, PORT137_FN1),
+        PINMUX_DATA(PORT137_KEYIN3_MARK, PORT137_FN2),
+        PINMUX_DATA(VIO_D8_MARK, PORT138_FN1),
+        PINMUX_DATA(M9_SLCD_A01_MARK, PORT138_FN2),
+        PINMUX_DATA(PORT138_FSIAOMC_MARK, PORT138_FN3),
+        PINMUX_DATA(VIO_D9_MARK, PORT139_FN1),
+        PINMUX_DATA(M10_SLCD_CK1_MARK, PORT139_FN2),
+        PINMUX_DATA(PORT139_FSIAOLR_MARK, PORT139_FN3),
+        PINMUX_DATA(VIO_D10_MARK, PORT140_FN1),
+        PINMUX_DATA(M11_SLCD_SO1_MARK, PORT140_FN2),
+        PINMUX_DATA(TPU0TO2_MARK, PORT140_FN3),
+        PINMUX_DATA(PORT140_FSIAOBT_MARK, PORT140_FN4),
+        PINMUX_DATA(VIO_D11_MARK, PORT141_FN1),
+        PINMUX_DATA(M12_SLCD_CE1_MARK, PORT141_FN2),
+        PINMUX_DATA(TPU0TO3_MARK, PORT141_FN3),
+        PINMUX_DATA(PORT141_FSIAOSLD_MARK, PORT141_FN4),
+        PINMUX_DATA(VIO_D12_MARK, PORT142_FN1),
+        PINMUX_DATA(M13_BSW_MARK, PORT142_FN2),
+        PINMUX_DATA(PORT142_FSIACK_MARK, PORT142_FN3),
+        PINMUX_DATA(VIO_D13_MARK, PORT143_FN1),
+        PINMUX_DATA(M14_GSW_MARK, PORT143_FN2),
+        PINMUX_DATA(PORT143_FSIAILR_MARK, PORT143_FN3),
+        PINMUX_DATA(VIO_D14_MARK, PORT144_FN1),
+        PINMUX_DATA(M15_RSW_MARK, PORT144_FN2),
+        PINMUX_DATA(PORT144_FSIAIBT_MARK, PORT144_FN3),
+        PINMUX_DATA(VIO_D15_MARK, PORT145_FN1),
+        PINMUX_DATA(TPU1TO3_MARK, PORT145_FN2),
+        PINMUX_DATA(PORT145_FSIAISLD_MARK, PORT145_FN3),
+        PINMUX_DATA(VIO_CLK_MARK, PORT146_FN1),
+        PINMUX_DATA(PORT146_KEYIN4_MARK, PORT146_FN2),
+        PINMUX_DATA(IPORT2_MARK, PORT146_FN3),
+        PINMUX_DATA(VIO_FIELD_MARK, PORT147_FN1),
+        PINMUX_DATA(PORT147_KEYIN5_MARK, PORT147_FN2),
+        PINMUX_DATA(VIO_CKO_MARK, PORT148_FN1),
+        PINMUX_DATA(PORT148_KEYIN6_MARK, PORT148_FN2),
+        PINMUX_DATA(A27_MARK, PORT149_FN1),
+        PINMUX_DATA(RDWR_XWE_MARK, PORT149_FN2),
+        PINMUX_DATA(MFG0_IN1_MARK, PORT149_FN3),
+        PINMUX_DATA(MFG0_IN2_MARK, PORT150_FN1),
+        PINMUX_DATA(TS_SPSYNC3_MARK, PORT151_FN1),
+        PINMUX_DATA(MSIOF2_RSCK_MARK, PORT151_FN2),
+        PINMUX_DATA(TS_SDAT3_MARK, PORT152_FN1),
+        PINMUX_DATA(MSIOF2_RSYNC_MARK, PORT152_FN2),
+        PINMUX_DATA(TPU1TO2_MARK, PORT153_FN1),
+        PINMUX_DATA(TS_SDEN3_MARK, PORT153_FN2),
+        PINMUX_DATA(PORT153_MSIOF2_SS1_MARK, PORT153_FN3),
+        PINMUX_DATA(SOUT3_MARK, PORT154_FN1),
+        PINMUX_DATA(SCIFA2_TXD1_MARK, PORT154_FN2),
+        PINMUX_DATA(MSIOF2_MCK0_MARK, PORT154_FN3),
+        PINMUX_DATA(SIN3_MARK, PORT155_FN1),
+        PINMUX_DATA(SCIFA2_RXD1_MARK, PORT155_FN2),
+        PINMUX_DATA(MSIOF2_MCK1_MARK, PORT155_FN3),
+        PINMUX_DATA(XRTS3_MARK, PORT156_FN1),
+        PINMUX_DATA(SCIFA2_RTS1_MARK, PORT156_FN2),
+        PINMUX_DATA(PORT156_MSIOF2_SS2_MARK, PORT156_FN3),
+        PINMUX_DATA(XCTS3_MARK, PORT157_FN1),
+        PINMUX_DATA(SCIFA2_CTS1_MARK, PORT157_FN2),
+        PINMUX_DATA(PORT157_MSIOF2_RXD_MARK, PORT157_FN3),
+
+        /* 55-4 (FN) */
+        PINMUX_DATA(DINT_MARK, PORT158_FN1),
+        PINMUX_DATA(SCIFA2_SCK1_MARK, PORT158_FN2),
+        PINMUX_DATA(TS_SCK3_MARK, PORT158_FN3),
+        PINMUX_DATA(PORT159_SCIFB_SCK_MARK, PORT159_FN1),
+        PINMUX_DATA(PORT159_SCIFA5_SCK_MARK, PORT159_FN2),
+        PINMUX_DATA(NMI_MARK, PORT159_FN3),
+        PINMUX_DATA(PORT160_SCIFB_TXD_MARK, PORT160_FN1),
+        PINMUX_DATA(PORT160_SCIFA5_TXD_MARK, PORT160_FN2),
+        PINMUX_DATA(SOUT0_MARK, PORT160_FN3),
+        PINMUX_DATA(PORT161_SCIFB_CTS_MARK, PORT161_FN1),
+        PINMUX_DATA(PORT161_SCIFA5_CTS_MARK, PORT161_FN2),
+        PINMUX_DATA(XCTS0_MARK, PORT161_FN3),
+        PINMUX_DATA(MFG3_IN2_MARK, PORT161_FN4),
+        PINMUX_DATA(PORT162_SCIFB_RXD_MARK, PORT162_FN1),
+        PINMUX_DATA(PORT162_SCIFA5_RXD_MARK, PORT162_FN2),
+        PINMUX_DATA(SIN0_MARK, PORT162_FN3),
+        PINMUX_DATA(MFG3_IN1_MARK, PORT162_FN4),
+        PINMUX_DATA(PORT163_SCIFB_RTS_MARK, PORT163_FN1),
+        PINMUX_DATA(PORT163_SCIFA5_RTS_MARK, PORT163_FN2),
+        PINMUX_DATA(XRTS0_MARK, PORT163_FN3),
+        PINMUX_DATA(MFG3_OUT1_MARK, PORT163_FN4),
+        PINMUX_DATA(TPU3TO0_MARK, PORT163_FN5),
+        PINMUX_DATA(LCDD0_MARK, PORT192_FN1),
+        PINMUX_DATA(PORT192_KEYOUT0_MARK, PORT192_FN2),
+        PINMUX_DATA(EXT_CKI_MARK, PORT192_FN3),
+        PINMUX_DATA(LCDD1_MARK, PORT193_FN1),
+        PINMUX_DATA(PORT193_KEYOUT1_MARK, PORT193_FN2),
+        PINMUX_DATA(PORT193_SCIFA5_CTS_MARK, PORT193_FN3),
+        PINMUX_DATA(BBIF2_TSYNC1_MARK, PORT193_FN4),
+        PINMUX_DATA(LCDD2_MARK, PORT194_FN1),
+        PINMUX_DATA(PORT194_KEYOUT2_MARK, PORT194_FN2),
+        PINMUX_DATA(PORT194_SCIFA5_RTS_MARK, PORT194_FN3),
+        PINMUX_DATA(BBIF2_TSCK1_MARK, PORT194_FN4),
+        PINMUX_DATA(LCDD3_MARK, PORT195_FN1),
+        PINMUX_DATA(PORT195_KEYOUT3_MARK, PORT195_FN2),
+        PINMUX_DATA(PORT195_SCIFA5_RXD_MARK, PORT195_FN3),
+        PINMUX_DATA(BBIF2_TXD1_MARK, PORT195_FN4),
+        PINMUX_DATA(LCDD4_MARK, PORT196_FN1),
+        PINMUX_DATA(PORT196_KEYOUT4_MARK, PORT196_FN2),
+        PINMUX_DATA(PORT196_SCIFA5_TXD_MARK, PORT196_FN3),
+        PINMUX_DATA(LCDD5_MARK, PORT197_FN1),
+        PINMUX_DATA(PORT197_KEYOUT5_MARK, PORT197_FN2),
+        PINMUX_DATA(PORT197_SCIFA5_SCK_MARK, PORT197_FN3),
+        PINMUX_DATA(MFG2_OUT2_MARK, PORT197_FN4),
+        PINMUX_DATA(LCDD6_MARK, PORT198_FN1),
+        PINMUX_DATA(LCDD7_MARK, PORT199_FN1),
+        PINMUX_DATA(TPU4TO1_MARK, PORT199_FN2),
+        PINMUX_DATA(MFG4_OUT2_MARK, PORT199_FN3),
+        PINMUX_DATA(LCDD8_MARK, PORT200_FN1),
+        PINMUX_DATA(PORT200_KEYIN0_MARK, PORT200_FN2),
+        PINMUX_DATA(VIO_DR0_MARK, PORT200_FN3),
+        PINMUX_DATA(D16_MARK, PORT200_FN4),
+        PINMUX_DATA(LCDD9_MARK, PORT201_FN1),
+        PINMUX_DATA(PORT201_KEYIN1_MARK, PORT201_FN2),
+        PINMUX_DATA(VIO_DR1_MARK, PORT201_FN3),
+        PINMUX_DATA(D17_MARK, PORT201_FN4),
+        PINMUX_DATA(LCDD10_MARK, PORT202_FN1),
+        PINMUX_DATA(PORT202_KEYIN2_MARK, PORT202_FN2),
+        PINMUX_DATA(VIO_DR2_MARK, PORT202_FN3),
+        PINMUX_DATA(D18_MARK, PORT202_FN4),
+        PINMUX_DATA(LCDD11_MARK, PORT203_FN1),
+        PINMUX_DATA(PORT203_KEYIN3_MARK, PORT203_FN2),
+        PINMUX_DATA(VIO_DR3_MARK, PORT203_FN3),
+        PINMUX_DATA(D19_MARK, PORT203_FN4),
+        PINMUX_DATA(LCDD12_MARK, PORT204_FN1),
+        PINMUX_DATA(PORT204_KEYIN4_MARK, PORT204_FN2),
+        PINMUX_DATA(VIO_DR4_MARK, PORT204_FN3),
+        PINMUX_DATA(D20_MARK, PORT204_FN4),
+        PINMUX_DATA(LCDD13_MARK, PORT205_FN1),
+        PINMUX_DATA(PORT205_KEYIN5_MARK, PORT205_FN2),
+        PINMUX_DATA(VIO_DR5_MARK, PORT205_FN3),
+        PINMUX_DATA(D21_MARK, PORT205_FN4),
+        PINMUX_DATA(LCDD14_MARK, PORT206_FN1),
+        PINMUX_DATA(PORT206_KEYIN6_MARK, PORT206_FN2),
+        PINMUX_DATA(VIO_DR6_MARK, PORT206_FN3),
+        PINMUX_DATA(D22_MARK, PORT206_FN4),
+        PINMUX_DATA(LCDD15_MARK, PORT207_FN1),
+        PINMUX_DATA(PORT207_MSIOF0L_SS1_MARK, PORT207_FN2),
+        PINMUX_DATA(PORT207_KEYOUT0_MARK, PORT207_FN3),
+        PINMUX_DATA(VIO_DR7_MARK, PORT207_FN4),
+        PINMUX_DATA(D23_MARK, PORT207_FN5),
+        PINMUX_DATA(LCDD16_MARK, PORT208_FN1),
+        PINMUX_DATA(PORT208_MSIOF0L_SS2_MARK, PORT208_FN2),
+        PINMUX_DATA(PORT208_KEYOUT1_MARK, PORT208_FN3),
+        PINMUX_DATA(VIO_VDR_MARK, PORT208_FN4),
+        PINMUX_DATA(D24_MARK, PORT208_FN5),
+        PINMUX_DATA(LCDD17_MARK, PORT209_FN1),
+        PINMUX_DATA(PORT209_KEYOUT2_MARK, PORT209_FN2),
+        PINMUX_DATA(VIO_HDR_MARK, PORT209_FN3),
+        PINMUX_DATA(D25_MARK, PORT209_FN4),
+        PINMUX_DATA(LCDD18_MARK, PORT210_FN1),
+        PINMUX_DATA(DREQ2_MARK, PORT210_FN2),
+        PINMUX_DATA(PORT210_MSIOF0L_SS1_MARK, PORT210_FN3),
+        PINMUX_DATA(D26_MARK, PORT210_FN4),
+        PINMUX_DATA(LCDD19_MARK, PORT211_FN1),
+        PINMUX_DATA(PORT211_MSIOF0L_SS2_MARK, PORT211_FN2),
+        PINMUX_DATA(D27_MARK, PORT211_FN3),
+        PINMUX_DATA(LCDD20_MARK, PORT212_FN1),
+        PINMUX_DATA(TS_SPSYNC1_MARK, PORT212_FN2),
+        PINMUX_DATA(MSIOF0L_MCK0_MARK, PORT212_FN3),
+        PINMUX_DATA(D28_MARK, PORT212_FN4),
+        PINMUX_DATA(LCDD21_MARK, PORT213_FN1),
+        PINMUX_DATA(TS_SDAT1_MARK, PORT213_FN2),
+        PINMUX_DATA(MSIOF0L_MCK1_MARK, PORT213_FN3),
+        PINMUX_DATA(D29_MARK, PORT213_FN4),
+        PINMUX_DATA(LCDD22_MARK, PORT214_FN1),
+        PINMUX_DATA(TS_SDEN1_MARK, PORT214_FN2),
+        PINMUX_DATA(MSIOF0L_RSCK_MARK, PORT214_FN3),
+        PINMUX_DATA(D30_MARK, PORT214_FN4),
+        PINMUX_DATA(LCDD23_MARK, PORT215_FN1),
+        PINMUX_DATA(TS_SCK1_MARK, PORT215_FN2),
+        PINMUX_DATA(MSIOF0L_RSYNC_MARK, PORT215_FN3),
+        PINMUX_DATA(D31_MARK, PORT215_FN4),
+        PINMUX_DATA(LCDDCK_MARK, PORT216_FN1),
+        PINMUX_DATA(LCDWR_MARK, PORT216_FN2),
+        PINMUX_DATA(PORT216_KEYOUT3_MARK, PORT216_FN3),
+        PINMUX_DATA(VIO_CLKR_MARK, PORT216_FN4),
+        PINMUX_DATA(LCDRD_MARK, PORT217_FN1),
+        PINMUX_DATA(DACK2_MARK, PORT217_FN2),
+        PINMUX_DATA(MSIOF0L_TSYNC_MARK, PORT217_FN3),
+        PINMUX_DATA(LCDHSYN_MARK, PORT218_FN1),
+        PINMUX_DATA(LCDCS_MARK, PORT218_FN2),
+        PINMUX_DATA(LCDCS2_MARK, PORT218_FN3),
+        PINMUX_DATA(DACK3_MARK, PORT218_FN4),
+        PINMUX_DATA(PORT218_VIO_CKOR_MARK, PORT218_FN5),
+        PINMUX_DATA(PORT218_KEYOUT4_MARK, PORT218_FN6),
+        PINMUX_DATA(LCDDISP_MARK, PORT219_FN1),
+        PINMUX_DATA(LCDRS_MARK, PORT219_FN2),
+        PINMUX_DATA(DREQ3_MARK, PORT219_FN3),
+        PINMUX_DATA(MSIOF0L_TSCK_MARK, PORT219_FN4),
+        PINMUX_DATA(LCDVSYN_MARK, PORT220_FN1),
+        PINMUX_DATA(LCDVSYN2_MARK, PORT220_FN2),
+        PINMUX_DATA(PORT220_KEYOUT5_MARK, PORT220_FN3),
+        PINMUX_DATA(LCDLCLK_MARK, PORT221_FN1),
+        PINMUX_DATA(DREQ1_MARK, PORT221_FN2),
+        PINMUX_DATA(PWEN_MARK, PORT221_FN3),
+        PINMUX_DATA(MSIOF0L_RXD_MARK, PORT221_FN4),
+        PINMUX_DATA(LCDDON_MARK, PORT222_FN1),
+        PINMUX_DATA(LCDDON2_MARK, PORT222_FN2),
+        PINMUX_DATA(DACK1_MARK, PORT222_FN3),
+        PINMUX_DATA(OVCN_MARK, PORT222_FN4),
+        PINMUX_DATA(MSIOF0L_TXD_MARK, PORT222_FN5),
+        PINMUX_DATA(SCIFA1_TXD_MARK, PORT225_FN1),
+        PINMUX_DATA(OVCN2_MARK, PORT225_FN2),
+        PINMUX_DATA(EXTLP_MARK, PORT226_FN1),
+        PINMUX_DATA(SCIFA1_SCK_MARK, PORT226_FN2),
+        PINMUX_DATA(USBTERM_MARK, PORT226_FN3),
+        PINMUX_DATA(PORT226_VIO_CKO2_MARK, PORT226_FN4),
+        PINMUX_DATA(SCIFA1_RTS_MARK, PORT227_FN1),
+        PINMUX_DATA(IDIN_MARK, PORT227_FN2),
+        PINMUX_DATA(SCIFA1_RXD_MARK, PORT228_FN1),
+        PINMUX_DATA(SCIFA1_CTS_MARK, PORT229_FN1),
+        PINMUX_DATA(MFG1_IN1_MARK, PORT229_FN2),
+        PINMUX_DATA(MSIOF1_TXD_MARK, PORT230_FN1),
+        PINMUX_DATA(SCIFA2_TXD2_MARK, PORT230_FN2),
+        PINMUX_DATA(PORT230_FSIAOMC_MARK, PORT230_FN3),
+        PINMUX_DATA(MSIOF1_TSYNC_MARK, PORT231_FN1),
+        PINMUX_DATA(SCIFA2_CTS2_MARK, PORT231_FN2),
+        PINMUX_DATA(PORT231_FSIAOLR_MARK, PORT231_FN3),
+        PINMUX_DATA(MSIOF1_TSCK_MARK, PORT232_FN1),
+        PINMUX_DATA(SCIFA2_SCK2_MARK, PORT232_FN2),
+        PINMUX_DATA(PORT232_FSIAOBT_MARK, PORT232_FN3),
+        PINMUX_DATA(MSIOF1_RXD_MARK, PORT233_FN1),
+        PINMUX_DATA(SCIFA2_RXD2_MARK, PORT233_FN2),
+        PINMUX_DATA(GPS_VCOTRIG_MARK, PORT233_FN3),
+        PINMUX_DATA(PORT233_FSIACK_MARK, PORT233_FN4),
+        PINMUX_DATA(MSIOF1_RSCK_MARK, PORT234_FN1),
+        PINMUX_DATA(SCIFA2_RTS2_MARK, PORT234_FN2),
+        PINMUX_DATA(PORT234_FSIAOSLD_MARK, PORT234_FN3),
+        PINMUX_DATA(MSIOF1_RSYNC_MARK, PORT235_FN1),
+        PINMUX_DATA(OPORT0_MARK, PORT235_FN2),
+        PINMUX_DATA(MFG1_IN2_MARK, PORT235_FN3),
+        PINMUX_DATA(PORT235_FSIAILR_MARK, PORT235_FN4),
+        PINMUX_DATA(MSIOF1_MCK0_MARK, PORT236_FN1),
+        PINMUX_DATA(I2C_SDA2_MARK, PORT236_FN2),
+        PINMUX_DATA(PORT236_FSIAIBT_MARK, PORT236_FN3),
+        PINMUX_DATA(MSIOF1_MCK1_MARK, PORT237_FN1),
+        PINMUX_DATA(I2C_SCL2_MARK, PORT237_FN2),
+        PINMUX_DATA(PORT237_FSIAISLD_MARK, PORT237_FN3),
+        PINMUX_DATA(MSIOF1_SS1_MARK, PORT238_FN1),
+        PINMUX_DATA(EDBGREQ3_MARK, PORT238_FN2),
+
+        /* 55-5 (FN) */
+        PINMUX_DATA(MSIOF1_SS2_MARK, PORT239_FN1),
+        PINMUX_DATA(SCIFA6_TXD_MARK, PORT240_FN1),
+        PINMUX_DATA(PORT241_IRDA_OUT_MARK, PORT241_FN1),
+        PINMUX_DATA(PORT241_IROUT_MARK, PORT241_FN2),
+        PINMUX_DATA(MFG4_OUT1_MARK, PORT241_FN3),
+        PINMUX_DATA(TPU4TO0_MARK, PORT241_FN4),
+        PINMUX_DATA(PORT242_IRDA_IN_MARK, PORT242_FN1),
+        PINMUX_DATA(MFG4_IN2_MARK, PORT242_FN2),
+        PINMUX_DATA(PORT243_IRDA_FIRSEL_MARK, PORT243_FN1),
+        PINMUX_DATA(PORT243_VIO_CKO2_MARK, PORT243_FN2),
+        PINMUX_DATA(PORT244_SCIFA5_CTS_MARK, PORT244_FN1),
+        PINMUX_DATA(MFG2_IN1_MARK, PORT244_FN2),
+        PINMUX_DATA(PORT244_SCIFB_CTS_MARK, PORT244_FN3),
+        PINMUX_DATA(PORT245_SCIFA5_RTS_MARK, PORT245_FN1),
+        PINMUX_DATA(MFG2_IN2_MARK, PORT245_FN2),
+        PINMUX_DATA(PORT245_SCIFB_RTS_MARK, PORT245_FN3),
+        PINMUX_DATA(PORT246_SCIFA5_RXD_MARK, PORT246_FN1),
+        PINMUX_DATA(MFG1_OUT1_MARK, PORT246_FN2),
+        PINMUX_DATA(PORT246_SCIFB_RXD_MARK, PORT246_FN3),
+        PINMUX_DATA(TPU1TO0_MARK, PORT246_FN4),
+        PINMUX_DATA(PORT247_SCIFA5_TXD_MARK, PORT247_FN1),
+        PINMUX_DATA(MFG3_OUT2_MARK, PORT247_FN2),
+        PINMUX_DATA(PORT247_SCIFB_TXD_MARK, PORT247_FN3),
+        PINMUX_DATA(TPU3TO1_MARK, PORT247_FN4),
+        PINMUX_DATA(PORT248_SCIFA5_SCK_MARK, PORT248_FN1),
+        PINMUX_DATA(MFG2_OUT1_MARK, PORT248_FN2),
+        PINMUX_DATA(PORT248_SCIFB_SCK_MARK, PORT248_FN3),
+        PINMUX_DATA(TPU2TO0_MARK, PORT248_FN4),
+        PINMUX_DATA(PORT249_IROUT_MARK, PORT249_FN1),
+        PINMUX_DATA(MFG4_IN1_MARK, PORT249_FN2),
+        PINMUX_DATA(SDHICLK0_MARK, PORT250_FN1),
+        PINMUX_DATA(TCK2_SWCLK_MC0_MARK, PORT250_FN2),
+        PINMUX_DATA(SDHICD0_MARK, PORT251_FN1),
+        PINMUX_DATA(SDHID0_0_MARK, PORT252_FN1),
+        PINMUX_DATA(TMS2_SWDIO_MC0_MARK, PORT252_FN2),
+        PINMUX_DATA(SDHID0_1_MARK, PORT253_FN1),
+        PINMUX_DATA(TDO2_SWO0_MC0_MARK, PORT253_FN2),
+        PINMUX_DATA(SDHID0_2_MARK, PORT254_FN1),
+        PINMUX_DATA(TDI2_MARK, PORT254_FN2),
+        PINMUX_DATA(SDHID0_3_MARK, PORT255_FN1),
+        PINMUX_DATA(RTCK2_SWO1_MC0_MARK, PORT255_FN2),
+        PINMUX_DATA(SDHICMD0_MARK, PORT256_FN1),
+        PINMUX_DATA(TRST2_MARK, PORT256_FN2),
+        PINMUX_DATA(SDHIWP0_MARK, PORT257_FN1),
+        PINMUX_DATA(EDBGREQ2_MARK, PORT257_FN2),
+        PINMUX_DATA(SDHICLK1_MARK, PORT258_FN1),
+        PINMUX_DATA(TCK3_SWCLK_MC1_MARK, PORT258_FN2),
+        PINMUX_DATA(SDHID1_0_MARK, PORT259_FN1),
+        PINMUX_DATA(M11_SLCD_SO2_MARK, PORT259_FN2),
+        PINMUX_DATA(TS_SPSYNC2_MARK, PORT259_FN3),
+        PINMUX_DATA(TMS3_SWDIO_MC1_MARK, PORT259_FN4),
+        PINMUX_DATA(SDHID1_1_MARK, PORT260_FN1),
+        PINMUX_DATA(M9_SLCD_A02_MARK, PORT260_FN2),
+        PINMUX_DATA(TS_SDAT2_MARK, PORT260_FN3),
+        PINMUX_DATA(TDO3_SWO0_MC1_MARK, PORT260_FN4),
+        PINMUX_DATA(SDHID1_2_MARK, PORT261_FN1),
+        PINMUX_DATA(M10_SLCD_CK2_MARK, PORT261_FN2),
+        PINMUX_DATA(TS_SDEN2_MARK, PORT261_FN3),
+        PINMUX_DATA(TDI3_MARK, PORT261_FN4),
+        PINMUX_DATA(SDHID1_3_MARK, PORT262_FN1),
+        PINMUX_DATA(M12_SLCD_CE2_MARK, PORT262_FN2),
+        PINMUX_DATA(TS_SCK2_MARK, PORT262_FN3),
+        PINMUX_DATA(RTCK3_SWO1_MC1_MARK, PORT262_FN4),
+        PINMUX_DATA(SDHICMD1_MARK, PORT263_FN1),
+        PINMUX_DATA(TRST3_MARK, PORT263_FN2),
+        PINMUX_DATA(RESETOUTS_MARK, PORT264_FN1),
+};
+
+#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
+#define GPIO_PORT_265() _265(_GPIO_PORT, , unused)
+#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
+
+static struct pinmux_gpio pinmux_gpios[] = {
+        /* 55-1 -> 55-5 (GPIO) */
+        GPIO_PORT_265(),
+
+        /* Special Pull-up / Pull-down Functions */
+        GPIO_FN(PORT66_KEYIN0_PU), GPIO_FN(PORT67_KEYIN1_PU),
+        GPIO_FN(PORT68_KEYIN2_PU), GPIO_FN(PORT69_KEYIN3_PU),
+        GPIO_FN(PORT70_KEYIN4_PU), GPIO_FN(PORT71_KEYIN5_PU),
+        GPIO_FN(PORT72_KEYIN6_PU),
+
+        /* 55-1 (FN) */
+        GPIO_FN(VBUS_0),
+        GPIO_FN(CPORT0),
+        GPIO_FN(CPORT1),
+        GPIO_FN(CPORT2),
+        GPIO_FN(CPORT3),
+        GPIO_FN(CPORT4),
+        GPIO_FN(CPORT5),
+        GPIO_FN(CPORT6),
+        GPIO_FN(CPORT7),
+        GPIO_FN(CPORT8),
+        GPIO_FN(CPORT9),
+        GPIO_FN(CPORT10),
+        GPIO_FN(CPORT11), GPIO_FN(SIN2),
+        GPIO_FN(CPORT12), GPIO_FN(XCTS2),
+        GPIO_FN(CPORT13), GPIO_FN(RFSPO4),
+        GPIO_FN(CPORT14), GPIO_FN(RFSPO5),
+        GPIO_FN(CPORT15), GPIO_FN(SCIFA0_SCK), GPIO_FN(GPS_AGC2),
+        GPIO_FN(CPORT16), GPIO_FN(SCIFA0_TXD), GPIO_FN(GPS_AGC3),
+        GPIO_FN(CPORT17_IC_OE), GPIO_FN(SOUT2),
+        GPIO_FN(CPORT18), GPIO_FN(XRTS2), GPIO_FN(PORT19_VIO_CKO2),
+        GPIO_FN(CPORT19_MPORT1),
+        GPIO_FN(CPORT20), GPIO_FN(RFSPO6),
+        GPIO_FN(CPORT21), GPIO_FN(STATUS0),
+        GPIO_FN(CPORT22), GPIO_FN(STATUS1),
+        GPIO_FN(CPORT23), GPIO_FN(STATUS2), GPIO_FN(RFSPO7),
+        GPIO_FN(B_SYNLD1),
+        GPIO_FN(B_SYNLD2), GPIO_FN(SYSENMSK),
+        GPIO_FN(XMAINPS),
+        GPIO_FN(XDIVPS),
+        GPIO_FN(XIDRST),
+        GPIO_FN(IDCLK), GPIO_FN(IC_DP),
+        GPIO_FN(IDIO), GPIO_FN(IC_DM),
+        GPIO_FN(SOUT1), GPIO_FN(SCIFA4_TXD), GPIO_FN(M02_BERDAT),
+        GPIO_FN(SIN1), GPIO_FN(SCIFA4_RXD), GPIO_FN(XWUP),
+        GPIO_FN(XRTS1), GPIO_FN(SCIFA4_RTS), GPIO_FN(M03_BERCLK),
+        GPIO_FN(XCTS1), GPIO_FN(SCIFA4_CTS),
+        GPIO_FN(PCMCLKO),
+        GPIO_FN(SYNC8KO),
+
+        /* 55-2 (FN) */
+        GPIO_FN(DNPCM_A),
+        GPIO_FN(UPPCM_A),
+        GPIO_FN(VACK),
+        GPIO_FN(XTALB1L),
+        GPIO_FN(GPS_AGC1), GPIO_FN(SCIFA0_RTS),
+        GPIO_FN(GPS_AGC4), GPIO_FN(SCIFA0_RXD),
+        GPIO_FN(GPS_PWRDOWN), GPIO_FN(SCIFA0_CTS),
+        GPIO_FN(GPS_IM),
+        GPIO_FN(GPS_IS),
+        GPIO_FN(GPS_QM),
+        GPIO_FN(GPS_QS),
+        GPIO_FN(FMSOCK), GPIO_FN(PORT49_IRDA_OUT), GPIO_FN(PORT49_IROUT),
+        GPIO_FN(FMSOOLR), GPIO_FN(BBIF2_TSYNC2), GPIO_FN(TPU2TO2),
+        GPIO_FN(IPORT3), GPIO_FN(FMSIOLR),
+        GPIO_FN(FMSOOBT), GPIO_FN(BBIF2_TSCK2), GPIO_FN(TPU2TO3),
+        GPIO_FN(OPORT1), GPIO_FN(FMSIOBT),
+        GPIO_FN(FMSOSLD), GPIO_FN(BBIF2_TXD2), GPIO_FN(OPORT2),
+        GPIO_FN(FMSOILR), GPIO_FN(PORT53_IRDA_IN), GPIO_FN(TPU3TO3),
+        GPIO_FN(OPORT3), GPIO_FN(FMSIILR),
+        GPIO_FN(FMSOIBT), GPIO_FN(PORT54_IRDA_FIRSEL), GPIO_FN(TPU3TO2),
+        GPIO_FN(FMSIIBT),
+        GPIO_FN(FMSISLD), GPIO_FN(MFG0_OUT1), GPIO_FN(TPU0TO0),
+        GPIO_FN(A0_EA0), GPIO_FN(BS),
+        GPIO_FN(A12_EA12), GPIO_FN(PORT58_VIO_CKOR), GPIO_FN(TPU4TO2),
+        GPIO_FN(A13_EA13), GPIO_FN(PORT59_IROUT), GPIO_FN(MFG0_OUT2),
+        GPIO_FN(TPU0TO1),
+        GPIO_FN(A14_EA14), GPIO_FN(PORT60_KEYOUT5),
+        GPIO_FN(A15_EA15), GPIO_FN(PORT61_KEYOUT4),
+        GPIO_FN(A16_EA16), GPIO_FN(PORT62_KEYOUT3), GPIO_FN(MSIOF0_SS1),
+        GPIO_FN(A17_EA17), GPIO_FN(PORT63_KEYOUT2), GPIO_FN(MSIOF0_TSYNC),
+        GPIO_FN(A18_EA18), GPIO_FN(PORT64_KEYOUT1), GPIO_FN(MSIOF0_TSCK),
+        GPIO_FN(A19_EA19), GPIO_FN(PORT65_KEYOUT0), GPIO_FN(MSIOF0_TXD),
+        GPIO_FN(A20_EA20), GPIO_FN(PORT66_KEYIN0), GPIO_FN(MSIOF0_RSCK),
+        GPIO_FN(A21_EA21), GPIO_FN(PORT67_KEYIN1), GPIO_FN(MSIOF0_RSYNC),
+        GPIO_FN(A22_EA22), GPIO_FN(PORT68_KEYIN2), GPIO_FN(MSIOF0_MCK0),
+        GPIO_FN(A23_EA23), GPIO_FN(PORT69_KEYIN3), GPIO_FN(MSIOF0_MCK1),
+        GPIO_FN(A24_EA24), GPIO_FN(PORT70_KEYIN4), GPIO_FN(MSIOF0_RXD),
+        GPIO_FN(A25_EA25), GPIO_FN(PORT71_KEYIN5), GPIO_FN(MSIOF0_SS2),
+        GPIO_FN(A26), GPIO_FN(PORT72_KEYIN6),
+        GPIO_FN(D0_ED0_NAF0),
+        GPIO_FN(D1_ED1_NAF1),
+        GPIO_FN(D2_ED2_NAF2),
+        GPIO_FN(D3_ED3_NAF3),
+        GPIO_FN(D4_ED4_NAF4),
+        GPIO_FN(D5_ED5_NAF5),
+        GPIO_FN(D6_ED6_NAF6),
+        GPIO_FN(D7_ED7_NAF7),
+        GPIO_FN(D8_ED8_NAF8),
+        GPIO_FN(D9_ED9_NAF9),
+        GPIO_FN(D10_ED10_NAF10),
+        GPIO_FN(D11_ED11_NAF11),
+        GPIO_FN(D12_ED12_NAF12),
+        GPIO_FN(D13_ED13_NAF13),
+        GPIO_FN(D14_ED14_NAF14),
+        GPIO_FN(D15_ED15_NAF15),
+        GPIO_FN(CS4),
+        GPIO_FN(CS5A), GPIO_FN(FMSICK),
+
+        /* 55-3 (FN) */
+        GPIO_FN(CS5B), GPIO_FN(FCE1),
+        GPIO_FN(CS6B), GPIO_FN(XCS2), GPIO_FN(CS6A), GPIO_FN(DACK0),
+        GPIO_FN(FCE0),
+        GPIO_FN(WAIT), GPIO_FN(DREQ0),
+        GPIO_FN(RD_XRD),
+        GPIO_FN(WE0_XWR0_FWE),
+        GPIO_FN(WE1_XWR1),
+        GPIO_FN(FRB),
+        GPIO_FN(CKO),
+        GPIO_FN(NBRSTOUT),
+        GPIO_FN(NBRST),
+        GPIO_FN(GPS_EPPSIN),
+        GPIO_FN(LATCHPULSE),
+        GPIO_FN(LTESIGNAL),
+        GPIO_FN(LEGACYSTATE),
+        GPIO_FN(TCKON),
+        GPIO_FN(VIO_VD), GPIO_FN(PORT128_KEYOUT0), GPIO_FN(IPORT0),
+        GPIO_FN(VIO_HD), GPIO_FN(PORT129_KEYOUT1), GPIO_FN(IPORT1),
+        GPIO_FN(VIO_D0), GPIO_FN(PORT130_KEYOUT2), GPIO_FN(PORT130_MSIOF2_RXD),
+        GPIO_FN(VIO_D1), GPIO_FN(PORT131_KEYOUT3), GPIO_FN(PORT131_MSIOF2_SS1),
+        GPIO_FN(VIO_D2), GPIO_FN(PORT132_KEYOUT4), GPIO_FN(PORT132_MSIOF2_SS2),
+        GPIO_FN(VIO_D3), GPIO_FN(PORT133_KEYOUT5),
+        GPIO_FN(PORT133_MSIOF2_TSYNC),
+        GPIO_FN(VIO_D4), GPIO_FN(PORT134_KEYIN0), GPIO_FN(PORT134_MSIOF2_TXD),
+        GPIO_FN(VIO_D5), GPIO_FN(PORT135_KEYIN1), GPIO_FN(PORT135_MSIOF2_TSCK),
+        GPIO_FN(VIO_D6), GPIO_FN(PORT136_KEYIN2),
+        GPIO_FN(VIO_D7), GPIO_FN(PORT137_KEYIN3),
+        GPIO_FN(VIO_D8), GPIO_FN(M9_SLCD_A01), GPIO_FN(PORT138_FSIAOMC),
+        GPIO_FN(VIO_D9), GPIO_FN(M10_SLCD_CK1), GPIO_FN(PORT139_FSIAOLR),
+        GPIO_FN(VIO_D10), GPIO_FN(M11_SLCD_SO1), GPIO_FN(TPU0TO2),
+        GPIO_FN(PORT140_FSIAOBT),
+        GPIO_FN(VIO_D11), GPIO_FN(M12_SLCD_CE1), GPIO_FN(TPU0TO3),
+        GPIO_FN(PORT141_FSIAOSLD),
+        GPIO_FN(VIO_D12), GPIO_FN(M13_BSW), GPIO_FN(PORT142_FSIACK),
+        GPIO_FN(VIO_D13), GPIO_FN(M14_GSW), GPIO_FN(PORT143_FSIAILR),
+        GPIO_FN(VIO_D14), GPIO_FN(M15_RSW), GPIO_FN(PORT144_FSIAIBT),
+        GPIO_FN(VIO_D15), GPIO_FN(TPU1TO3), GPIO_FN(PORT145_FSIAISLD),
+        GPIO_FN(VIO_CLK), GPIO_FN(PORT146_KEYIN4), GPIO_FN(IPORT2),
+        GPIO_FN(VIO_FIELD), GPIO_FN(PORT147_KEYIN5),
+        GPIO_FN(VIO_CKO), GPIO_FN(PORT148_KEYIN6),
+        GPIO_FN(A27), GPIO_FN(RDWR_XWE), GPIO_FN(MFG0_IN1),
+        GPIO_FN(MFG0_IN2),
+        GPIO_FN(TS_SPSYNC3), GPIO_FN(MSIOF2_RSCK),
+        GPIO_FN(TS_SDAT3), GPIO_FN(MSIOF2_RSYNC),
+        GPIO_FN(TPU1TO2), GPIO_FN(TS_SDEN3), GPIO_FN(PORT153_MSIOF2_SS1),
+        GPIO_FN(SOUT3), GPIO_FN(SCIFA2_TXD1), GPIO_FN(MSIOF2_MCK0),
+        GPIO_FN(SIN3), GPIO_FN(SCIFA2_RXD1), GPIO_FN(MSIOF2_MCK1),
+        GPIO_FN(XRTS3), GPIO_FN(SCIFA2_RTS1), GPIO_FN(PORT156_MSIOF2_SS2),
+        GPIO_FN(XCTS3), GPIO_FN(SCIFA2_CTS1), GPIO_FN(PORT157_MSIOF2_RXD),
+
+        /* 55-4 (FN) */
+        GPIO_FN(DINT), GPIO_FN(SCIFA2_SCK1), GPIO_FN(TS_SCK3),
+        GPIO_FN(PORT159_SCIFB_SCK), GPIO_FN(PORT159_SCIFA5_SCK), GPIO_FN(NMI),
+        GPIO_FN(PORT160_SCIFB_TXD), GPIO_FN(PORT160_SCIFA5_TXD), GPIO_FN(SOUT0),
+        GPIO_FN(PORT161_SCIFB_CTS), GPIO_FN(PORT161_SCIFA5_CTS), GPIO_FN(XCTS0),
+        GPIO_FN(MFG3_IN2),
+        GPIO_FN(PORT162_SCIFB_RXD), GPIO_FN(PORT162_SCIFA5_RXD), GPIO_FN(SIN0),
+        GPIO_FN(MFG3_IN1),
+        GPIO_FN(PORT163_SCIFB_RTS), GPIO_FN(PORT163_SCIFA5_RTS), GPIO_FN(XRTS0),
+        GPIO_FN(MFG3_OUT1), GPIO_FN(TPU3TO0),
+        GPIO_FN(LCDD0), GPIO_FN(PORT192_KEYOUT0), GPIO_FN(EXT_CKI),
+        GPIO_FN(LCDD1), GPIO_FN(PORT193_KEYOUT1), GPIO_FN(PORT193_SCIFA5_CTS),
+        GPIO_FN(BBIF2_TSYNC1),
+        GPIO_FN(LCDD2), GPIO_FN(PORT194_KEYOUT2), GPIO_FN(PORT194_SCIFA5_RTS),
+        GPIO_FN(BBIF2_TSCK1),
+        GPIO_FN(LCDD3), GPIO_FN(PORT195_KEYOUT3), GPIO_FN(PORT195_SCIFA5_RXD),
+        GPIO_FN(BBIF2_TXD1),
+        GPIO_FN(LCDD4), GPIO_FN(PORT196_KEYOUT4), GPIO_FN(PORT196_SCIFA5_TXD),
+        GPIO_FN(LCDD5), GPIO_FN(PORT197_KEYOUT5), GPIO_FN(PORT197_SCIFA5_SCK),
+        GPIO_FN(MFG2_OUT2),
+        GPIO_FN(LCDD6),
+        GPIO_FN(LCDD7), GPIO_FN(TPU4TO1), GPIO_FN(MFG4_OUT2),
+        GPIO_FN(LCDD8), GPIO_FN(PORT200_KEYIN0), GPIO_FN(VIO_DR0),
+        GPIO_FN(D16),
+        GPIO_FN(LCDD9), GPIO_FN(PORT201_KEYIN1), GPIO_FN(VIO_DR1),
+        GPIO_FN(D17),
+        GPIO_FN(LCDD10), GPIO_FN(PORT202_KEYIN2), GPIO_FN(VIO_DR2),
+        GPIO_FN(D18),
+        GPIO_FN(LCDD11), GPIO_FN(PORT203_KEYIN3), GPIO_FN(VIO_DR3),
+        GPIO_FN(D19),
+        GPIO_FN(LCDD12), GPIO_FN(PORT204_KEYIN4), GPIO_FN(VIO_DR4),
+        GPIO_FN(D20),
+        GPIO_FN(LCDD13), GPIO_FN(PORT205_KEYIN5), GPIO_FN(VIO_DR5),
+        GPIO_FN(D21),
+        GPIO_FN(LCDD14), GPIO_FN(PORT206_KEYIN6), GPIO_FN(VIO_DR6),
+        GPIO_FN(D22),
+        GPIO_FN(LCDD15), GPIO_FN(PORT207_MSIOF0L_SS1), GPIO_FN(PORT207_KEYOUT0),
+        GPIO_FN(VIO_DR7), GPIO_FN(D23),
+        GPIO_FN(LCDD16), GPIO_FN(PORT208_MSIOF0L_SS2), GPIO_FN(PORT208_KEYOUT1),
+        GPIO_FN(VIO_VDR), GPIO_FN(D24),
+        GPIO_FN(LCDD17), GPIO_FN(PORT209_KEYOUT2), GPIO_FN(VIO_HDR),
+        GPIO_FN(D25),
+        GPIO_FN(LCDD18), GPIO_FN(DREQ2), GPIO_FN(PORT210_MSIOF0L_SS1),
+        GPIO_FN(D26),
+        GPIO_FN(LCDD19), GPIO_FN(PORT211_MSIOF0L_SS2), GPIO_FN(D27),
+        GPIO_FN(LCDD20), GPIO_FN(TS_SPSYNC1), GPIO_FN(MSIOF0L_MCK0),
+        GPIO_FN(D28),
+        GPIO_FN(LCDD21), GPIO_FN(TS_SDAT1), GPIO_FN(MSIOF0L_MCK1),
+        GPIO_FN(D29),
+        GPIO_FN(LCDD22), GPIO_FN(TS_SDEN1), GPIO_FN(MSIOF0L_RSCK),
+        GPIO_FN(D30),
+        GPIO_FN(LCDD23), GPIO_FN(TS_SCK1), GPIO_FN(MSIOF0L_RSYNC),
+        GPIO_FN(D31),
+        GPIO_FN(LCDDCK), GPIO_FN(LCDWR), GPIO_FN(PORT216_KEYOUT3),
+        GPIO_FN(VIO_CLKR),
+        GPIO_FN(LCDRD), GPIO_FN(DACK2), GPIO_FN(MSIOF0L_TSYNC),
+        GPIO_FN(LCDHSYN), GPIO_FN(LCDCS), GPIO_FN(LCDCS2), GPIO_FN(DACK3),
+        GPIO_FN(PORT218_VIO_CKOR), GPIO_FN(PORT218_KEYOUT4),
+        GPIO_FN(LCDDISP), GPIO_FN(LCDRS), GPIO_FN(DREQ3), GPIO_FN(MSIOF0L_TSCK),
+        GPIO_FN(LCDVSYN), GPIO_FN(LCDVSYN2), GPIO_FN(PORT220_KEYOUT5),
+        GPIO_FN(LCDLCLK), GPIO_FN(DREQ1), GPIO_FN(PWEN), GPIO_FN(MSIOF0L_RXD),
+        GPIO_FN(LCDDON), GPIO_FN(LCDDON2), GPIO_FN(DACK1), GPIO_FN(OVCN),
+        GPIO_FN(MSIOF0L_TXD),
+        GPIO_FN(SCIFA1_TXD), GPIO_FN(OVCN2),
+        GPIO_FN(EXTLP), GPIO_FN(SCIFA1_SCK), GPIO_FN(USBTERM),
+        GPIO_FN(PORT226_VIO_CKO2),
+        GPIO_FN(SCIFA1_RTS), GPIO_FN(IDIN),
+        GPIO_FN(SCIFA1_RXD),
+        GPIO_FN(SCIFA1_CTS), GPIO_FN(MFG1_IN1),
+        GPIO_FN(MSIOF1_TXD), GPIO_FN(SCIFA2_TXD2), GPIO_FN(PORT230_FSIAOMC),
+        GPIO_FN(MSIOF1_TSYNC), GPIO_FN(SCIFA2_CTS2), GPIO_FN(PORT231_FSIAOLR),
+        GPIO_FN(MSIOF1_TSCK), GPIO_FN(SCIFA2_SCK2), GPIO_FN(PORT232_FSIAOBT),
+        GPIO_FN(MSIOF1_RXD), GPIO_FN(SCIFA2_RXD2), GPIO_FN(GPS_VCOTRIG),
+        GPIO_FN(PORT233_FSIACK),
+        GPIO_FN(MSIOF1_RSCK), GPIO_FN(SCIFA2_RTS2), GPIO_FN(PORT234_FSIAOSLD),
+        GPIO_FN(MSIOF1_RSYNC), GPIO_FN(OPORT0), GPIO_FN(MFG1_IN2),
+        GPIO_FN(PORT235_FSIAILR),
+        GPIO_FN(MSIOF1_MCK0), GPIO_FN(I2C_SDA2), GPIO_FN(PORT236_FSIAIBT),
+        GPIO_FN(MSIOF1_MCK1), GPIO_FN(I2C_SCL2), GPIO_FN(PORT237_FSIAISLD),
+        GPIO_FN(MSIOF1_SS1), GPIO_FN(EDBGREQ3),
+
+        /* 55-5 (FN) */
+        GPIO_FN(MSIOF1_SS2),
+        GPIO_FN(SCIFA6_TXD),
+        GPIO_FN(PORT241_IRDA_OUT), GPIO_FN(PORT241_IROUT), GPIO_FN(MFG4_OUT1),
+        GPIO_FN(TPU4TO0),
+        GPIO_FN(PORT242_IRDA_IN), GPIO_FN(MFG4_IN2),
+        GPIO_FN(PORT243_IRDA_FIRSEL), GPIO_FN(PORT243_VIO_CKO2),
+        GPIO_FN(PORT244_SCIFA5_CTS), GPIO_FN(MFG2_IN1),
+        GPIO_FN(PORT244_SCIFB_CTS),
+        GPIO_FN(PORT245_SCIFA5_RTS), GPIO_FN(MFG2_IN2),
+        GPIO_FN(PORT245_SCIFB_RTS),
+        GPIO_FN(PORT246_SCIFA5_RXD), GPIO_FN(MFG1_OUT1),
+        GPIO_FN(PORT246_SCIFB_RXD), GPIO_FN(TPU1TO0),
+        GPIO_FN(PORT247_SCIFA5_TXD), GPIO_FN(MFG3_OUT2),
+        GPIO_FN(PORT247_SCIFB_TXD), GPIO_FN(TPU3TO1),
+        GPIO_FN(PORT248_SCIFA5_SCK), GPIO_FN(MFG2_OUT1),
+        GPIO_FN(PORT248_SCIFB_SCK), GPIO_FN(TPU2TO0),
+        GPIO_FN(PORT249_IROUT), GPIO_FN(MFG4_IN1),
+        GPIO_FN(SDHICLK0), GPIO_FN(TCK2_SWCLK_MC0),
+        GPIO_FN(SDHICD0),
+        GPIO_FN(SDHID0_0), GPIO_FN(TMS2_SWDIO_MC0),
+        GPIO_FN(SDHID0_1), GPIO_FN(TDO2_SWO0_MC0),
+        GPIO_FN(SDHID0_2), GPIO_FN(TDI2),
+        GPIO_FN(SDHID0_3), GPIO_FN(RTCK2_SWO1_MC0),
+        GPIO_FN(SDHICMD0), GPIO_FN(TRST2),
+        GPIO_FN(SDHIWP0), GPIO_FN(EDBGREQ2),
+        GPIO_FN(SDHICLK1), GPIO_FN(TCK3_SWCLK_MC1),
+        GPIO_FN(SDHID1_0), GPIO_FN(M11_SLCD_SO2), GPIO_FN(TS_SPSYNC2),
+        GPIO_FN(TMS3_SWDIO_MC1),
+        GPIO_FN(SDHID1_1), GPIO_FN(M9_SLCD_A02), GPIO_FN(TS_SDAT2),
+        GPIO_FN(TDO3_SWO0_MC1),
+        GPIO_FN(SDHID1_2), GPIO_FN(M10_SLCD_CK2), GPIO_FN(TS_SDEN2),
+        GPIO_FN(TDI3),
+        GPIO_FN(SDHID1_3), GPIO_FN(M12_SLCD_CE2), GPIO_FN(TS_SCK2),
+        GPIO_FN(RTCK3_SWO1_MC1),
+        GPIO_FN(SDHICMD1), GPIO_FN(TRST3),
+        GPIO_FN(RESETOUTS),
+};
+
+/* helper for top 4 bits in PORTnCR */
+#define PCRH(in, in_pd, in_pu, out)     \
+        0, (out), (in), 0,      \
+                0, 0, 0, 0,     \
+                0, 0, (in_pd), 0,       \
+                0, 0, (in_pu), 0
+
+#define PORTCR(nr, reg) \
+        { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) {   \
+                        PCRH(PORT##nr##_IN, PORT##nr##_IN_PD,   \
+                                 PORT##nr##_IN_PU, PORT##nr##_OUT),     \
+                                PORT##nr##_FN0, PORT##nr##_FN1, \
+                                PORT##nr##_FN2, PORT##nr##_FN3, \
+                                PORT##nr##_FN4, PORT##nr##_FN5, \
+                                PORT##nr##_FN6, PORT##nr##_FN7 }        \
+        }
+
+static struct pinmux_cfg_reg pinmux_config_regs[] = {
+        PORTCR(0, 0xe6050000), /* PORT0CR */
+        PORTCR(1, 0xe6050001), /* PORT1CR */
+        PORTCR(2, 0xe6050002), /* PORT2CR */
+        PORTCR(3, 0xe6050003), /* PORT3CR */
+        PORTCR(4, 0xe6050004), /* PORT4CR */
+        PORTCR(5, 0xe6050005), /* PORT5CR */
+        PORTCR(6, 0xe6050006), /* PORT6CR */
+        PORTCR(7, 0xe6050007), /* PORT7CR */
+        PORTCR(8, 0xe6050008), /* PORT8CR */
+        PORTCR(9, 0xe6050009), /* PORT9CR */
+
+        PORTCR(10, 0xe605000a), /* PORT10CR */
+        PORTCR(11, 0xe605000b), /* PORT11CR */
+        PORTCR(12, 0xe605000c), /* PORT12CR */
+        PORTCR(13, 0xe605000d), /* PORT13CR */
+        PORTCR(14, 0xe605000e), /* PORT14CR */
+        PORTCR(15, 0xe605000f), /* PORT15CR */
+        PORTCR(16, 0xe6050010), /* PORT16CR */
+        PORTCR(17, 0xe6050011), /* PORT17CR */
+        PORTCR(18, 0xe6050012), /* PORT18CR */
+        PORTCR(19, 0xe6050013), /* PORT19CR */
+
+        PORTCR(20, 0xe6050014), /* PORT20CR */
+        PORTCR(21, 0xe6050015), /* PORT21CR */
+        PORTCR(22, 0xe6050016), /* PORT22CR */
+        PORTCR(23, 0xe6050017), /* PORT23CR */
+        PORTCR(24, 0xe6050018), /* PORT24CR */
+        PORTCR(25, 0xe6050019), /* PORT25CR */
+        PORTCR(26, 0xe605001a), /* PORT26CR */
+        PORTCR(27, 0xe605001b), /* PORT27CR */
+        PORTCR(28, 0xe605001c), /* PORT28CR */
+        PORTCR(29, 0xe605001d), /* PORT29CR */
+
+        PORTCR(30, 0xe605001e), /* PORT30CR */
+        PORTCR(31, 0xe605001f), /* PORT31CR */
+        PORTCR(32, 0xe6050020), /* PORT32CR */
+        PORTCR(33, 0xe6050021), /* PORT33CR */
+        PORTCR(34, 0xe6050022), /* PORT34CR */
+        PORTCR(35, 0xe6050023), /* PORT35CR */
+        PORTCR(36, 0xe6050024), /* PORT36CR */
+        PORTCR(37, 0xe6050025), /* PORT37CR */
+        PORTCR(38, 0xe6050026), /* PORT38CR */
+        PORTCR(39, 0xe6050027), /* PORT39CR */
+
+        PORTCR(40, 0xe6050028), /* PORT40CR */
+        PORTCR(41, 0xe6050029), /* PORT41CR */
+        PORTCR(42, 0xe605002a), /* PORT42CR */
+        PORTCR(43, 0xe605002b), /* PORT43CR */
+        PORTCR(44, 0xe605002c), /* PORT44CR */
+        PORTCR(45, 0xe605002d), /* PORT45CR */
+        PORTCR(46, 0xe605002e), /* PORT46CR */
+        PORTCR(47, 0xe605002f), /* PORT47CR */
+        PORTCR(48, 0xe6050030), /* PORT48CR */
+        PORTCR(49, 0xe6050031), /* PORT49CR */
+
+        PORTCR(50, 0xe6050032), /* PORT50CR */
+        PORTCR(51, 0xe6050033), /* PORT51CR */
+        PORTCR(52, 0xe6050034), /* PORT52CR */
+        PORTCR(53, 0xe6050035), /* PORT53CR */
+        PORTCR(54, 0xe6050036), /* PORT54CR */
+        PORTCR(55, 0xe6050037), /* PORT55CR */
+        PORTCR(56, 0xe6050038), /* PORT56CR */
+        PORTCR(57, 0xe6050039), /* PORT57CR */
+        PORTCR(58, 0xe605003a), /* PORT58CR */
+        PORTCR(59, 0xe605003b), /* PORT59CR */
+
+        PORTCR(60, 0xe605003c), /* PORT60CR */
+        PORTCR(61, 0xe605003d), /* PORT61CR */
+        PORTCR(62, 0xe605003e), /* PORT62CR */
+        PORTCR(63, 0xe605003f), /* PORT63CR */
+        PORTCR(64, 0xe6050040), /* PORT64CR */
+        PORTCR(65, 0xe6050041), /* PORT65CR */
+        PORTCR(66, 0xe6050042), /* PORT66CR */
+        PORTCR(67, 0xe6050043), /* PORT67CR */
+        PORTCR(68, 0xe6050044), /* PORT68CR */
+        PORTCR(69, 0xe6050045), /* PORT69CR */
+
+        PORTCR(70, 0xe6050046), /* PORT70CR */
+        PORTCR(71, 0xe6050047), /* PORT71CR */
+        PORTCR(72, 0xe6050048), /* PORT72CR */
+        PORTCR(73, 0xe6050049), /* PORT73CR */
+        PORTCR(74, 0xe605004a), /* PORT74CR */
+        PORTCR(75, 0xe605004b), /* PORT75CR */
+        PORTCR(76, 0xe605004c), /* PORT76CR */
+        PORTCR(77, 0xe605004d), /* PORT77CR */
+        PORTCR(78, 0xe605004e), /* PORT78CR */
+        PORTCR(79, 0xe605004f), /* PORT79CR */
+
+        PORTCR(80, 0xe6050050), /* PORT80CR */
+        PORTCR(81, 0xe6050051), /* PORT81CR */
+        PORTCR(82, 0xe6050052), /* PORT82CR */
+        PORTCR(83, 0xe6050053), /* PORT83CR */
+        PORTCR(84, 0xe6050054), /* PORT84CR */
+        PORTCR(85, 0xe6050055), /* PORT85CR */
+        PORTCR(86, 0xe6050056), /* PORT86CR */
+        PORTCR(87, 0xe6050057), /* PORT87CR */
+        PORTCR(88, 0xe6050058), /* PORT88CR */
+        PORTCR(89, 0xe6050059), /* PORT89CR */
+
+        PORTCR(90, 0xe605005a), /* PORT90CR */
+        PORTCR(91, 0xe605005b), /* PORT91CR */
+        PORTCR(92, 0xe605005c), /* PORT92CR */
+        PORTCR(93, 0xe605005d), /* PORT93CR */
+        PORTCR(94, 0xe605005e), /* PORT94CR */
+        PORTCR(95, 0xe605005f), /* PORT95CR */
+        PORTCR(96, 0xe6050060), /* PORT96CR */
+        PORTCR(97, 0xe6050061), /* PORT97CR */
+        PORTCR(98, 0xe6050062), /* PORT98CR */
+        PORTCR(99, 0xe6050063), /* PORT99CR */
+
+        PORTCR(100, 0xe6050064), /* PORT100CR */
+        PORTCR(101, 0xe6050065), /* PORT101CR */
+        PORTCR(102, 0xe6050066), /* PORT102CR */
+        PORTCR(103, 0xe6050067), /* PORT103CR */
+        PORTCR(104, 0xe6050068), /* PORT104CR */
+        PORTCR(105, 0xe6050069), /* PORT105CR */
+        PORTCR(106, 0xe605006a), /* PORT106CR */
+        PORTCR(107, 0xe605006b), /* PORT107CR */
+        PORTCR(108, 0xe605006c), /* PORT108CR */
+        PORTCR(109, 0xe605006d), /* PORT109CR */
+
+        PORTCR(110, 0xe605006e), /* PORT110CR */
+        PORTCR(111, 0xe605006f), /* PORT111CR */
+        PORTCR(112, 0xe6050070), /* PORT112CR */
+        PORTCR(113, 0xe6050071), /* PORT113CR */
+        PORTCR(114, 0xe6050072), /* PORT114CR */
+        PORTCR(115, 0xe6050073), /* PORT115CR */
+        PORTCR(116, 0xe6050074), /* PORT116CR */
+        PORTCR(117, 0xe6050075), /* PORT117CR */
+        PORTCR(118, 0xe6050076), /* PORT118CR */
+
+        PORTCR(128, 0xe6051080), /* PORT128CR */
+        PORTCR(129, 0xe6051081), /* PORT129CR */
+
+        PORTCR(130, 0xe6051082), /* PORT130CR */
+        PORTCR(131, 0xe6051083), /* PORT131CR */
+        PORTCR(132, 0xe6051084), /* PORT132CR */
+        PORTCR(133, 0xe6051085), /* PORT133CR */
+        PORTCR(134, 0xe6051086), /* PORT134CR */
+        PORTCR(135, 0xe6051087), /* PORT135CR */
+        PORTCR(136, 0xe6051088), /* PORT136CR */
+        PORTCR(137, 0xe6051089), /* PORT137CR */
+        PORTCR(138, 0xe605108a), /* PORT138CR */
+        PORTCR(139, 0xe605108b), /* PORT139CR */
+
+        PORTCR(140, 0xe605108c), /* PORT140CR */
+        PORTCR(141, 0xe605108d), /* PORT141CR */
+        PORTCR(142, 0xe605108e), /* PORT142CR */
+        PORTCR(143, 0xe605108f), /* PORT143CR */
+        PORTCR(144, 0xe6051090), /* PORT144CR */
+        PORTCR(145, 0xe6051091), /* PORT145CR */
+        PORTCR(146, 0xe6051092), /* PORT146CR */
+        PORTCR(147, 0xe6051093), /* PORT147CR */
+        PORTCR(148, 0xe6051094), /* PORT148CR */
+        PORTCR(149, 0xe6051095), /* PORT149CR */
+
+        PORTCR(150, 0xe6051096), /* PORT150CR */
+        PORTCR(151, 0xe6051097), /* PORT151CR */
+        PORTCR(152, 0xe6051098), /* PORT152CR */
+        PORTCR(153, 0xe6051099), /* PORT153CR */
+        PORTCR(154, 0xe605109a), /* PORT154CR */
+        PORTCR(155, 0xe605109b), /* PORT155CR */
+        PORTCR(156, 0xe605109c), /* PORT156CR */
+        PORTCR(157, 0xe605109d), /* PORT157CR */
+        PORTCR(158, 0xe605109e), /* PORT158CR */
+        PORTCR(159, 0xe605109f), /* PORT159CR */
+
+        PORTCR(160, 0xe60510a0), /* PORT160CR */
+        PORTCR(161, 0xe60510a1), /* PORT161CR */
+        PORTCR(162, 0xe60510a2), /* PORT162CR */
+        PORTCR(163, 0xe60510a3), /* PORT163CR */
+        PORTCR(164, 0xe60510a4), /* PORT164CR */
+
+        PORTCR(192, 0xe60520c0), /* PORT192CR */
+        PORTCR(193, 0xe60520c1), /* PORT193CR */
+        PORTCR(194, 0xe60520c2), /* PORT194CR */
+        PORTCR(195, 0xe60520c3), /* PORT195CR */
+        PORTCR(196, 0xe60520c4), /* PORT196CR */
+        PORTCR(197, 0xe60520c5), /* PORT197CR */
+        PORTCR(198, 0xe60520c6), /* PORT198CR */
+        PORTCR(199, 0xe60520c7), /* PORT199CR */
+
+        PORTCR(200, 0xe60520c8), /* PORT200CR */
+        PORTCR(201, 0xe60520c9), /* PORT201CR */
+        PORTCR(202, 0xe60520ca), /* PORT202CR */
+        PORTCR(203, 0xe60520cb), /* PORT203CR */
+        PORTCR(204, 0xe60520cc), /* PORT204CR */
+        PORTCR(205, 0xe60520cd), /* PORT205CR */
+        PORTCR(206, 0xe60520ce), /* PORT206CR */
+        PORTCR(207, 0xe60520cf), /* PORT207CR */
+        PORTCR(208, 0xe60520d0), /* PORT208CR */
+        PORTCR(209, 0xe60520d1), /* PORT209CR */
+
+        PORTCR(210, 0xe60520d2), /* PORT210CR */
+        PORTCR(211, 0xe60520d3), /* PORT211CR */
+        PORTCR(212, 0xe60520d4), /* PORT212CR */
+        PORTCR(213, 0xe60520d5), /* PORT213CR */
+        PORTCR(214, 0xe60520d6), /* PORT214CR */
+        PORTCR(215, 0xe60520d7), /* PORT215CR */
+        PORTCR(216, 0xe60520d8), /* PORT216CR */
+        PORTCR(217, 0xe60520d9), /* PORT217CR */
+        PORTCR(218, 0xe60520da), /* PORT218CR */
+        PORTCR(219, 0xe60520db), /* PORT219CR */
+
+        PORTCR(220, 0xe60520dc), /* PORT220CR */
+        PORTCR(221, 0xe60520dd), /* PORT221CR */
+        PORTCR(222, 0xe60520de), /* PORT222CR */
+        PORTCR(223, 0xe60520df), /* PORT223CR */
+        PORTCR(224, 0xe60520e0), /* PORT224CR */
+        PORTCR(225, 0xe60520e1), /* PORT225CR */
+        PORTCR(226, 0xe60520e2), /* PORT226CR */
+        PORTCR(227, 0xe60520e3), /* PORT227CR */
+        PORTCR(228, 0xe60520e4), /* PORT228CR */
+        PORTCR(229, 0xe60520e5), /* PORT229CR */
+
+        PORTCR(230, 0xe60520e6), /* PORT230CR */
+        PORTCR(231, 0xe60520e7), /* PORT231CR */
+        PORTCR(232, 0xe60520e8), /* PORT232CR */
+        PORTCR(233, 0xe60520e9), /* PORT233CR */
+        PORTCR(234, 0xe60520ea), /* PORT234CR */
+        PORTCR(235, 0xe60520eb), /* PORT235CR */
+        PORTCR(236, 0xe60520ec), /* PORT236CR */
+        PORTCR(237, 0xe60520ed), /* PORT237CR */
+        PORTCR(238, 0xe60520ee), /* PORT238CR */
+        PORTCR(239, 0xe60520ef), /* PORT239CR */
+
+        PORTCR(240, 0xe60520f0), /* PORT240CR */
+        PORTCR(241, 0xe60520f1), /* PORT241CR */
+        PORTCR(242, 0xe60520f2), /* PORT242CR */
+        PORTCR(243, 0xe60520f3), /* PORT243CR */
+        PORTCR(244, 0xe60520f4), /* PORT244CR */
+        PORTCR(245, 0xe60520f5), /* PORT245CR */
+        PORTCR(246, 0xe60520f6), /* PORT246CR */
+        PORTCR(247, 0xe60520f7), /* PORT247CR */
+        PORTCR(248, 0xe60520f8), /* PORT248CR */
+        PORTCR(249, 0xe60520f9), /* PORT249CR */
+
+        PORTCR(250, 0xe60520fa), /* PORT250CR */
+        PORTCR(251, 0xe60520fb), /* PORT251CR */
+        PORTCR(252, 0xe60520fc), /* PORT252CR */
+        PORTCR(253, 0xe60520fd), /* PORT253CR */
+        PORTCR(254, 0xe60520fe), /* PORT254CR */
+        PORTCR(255, 0xe60520ff), /* PORT255CR */
+        PORTCR(256, 0xe6052100), /* PORT256CR */
+        PORTCR(257, 0xe6052101), /* PORT257CR */
+        PORTCR(258, 0xe6052102), /* PORT258CR */
+        PORTCR(259, 0xe6052103), /* PORT259CR */
+
+        PORTCR(260, 0xe6052104), /* PORT260CR */
+        PORTCR(261, 0xe6052105), /* PORT261CR */
+        PORTCR(262, 0xe6052106), /* PORT262CR */
+        PORTCR(263, 0xe6052107), /* PORT263CR */
+        PORTCR(264, 0xe6052108), /* PORT264CR */
+
+        { PINMUX_CFG_REG("MSELBCR", 0xe6058024, 32, 1) {
+                        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+                        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+                        MSELBCR_MSEL17_0, MSELBCR_MSEL17_1,
+                        MSELBCR_MSEL16_0, MSELBCR_MSEL16_1,
+                        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+                        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
+        },
+        { },
+};
+
+static struct pinmux_data_reg pinmux_data_regs[] = {
+        { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054000, 32) {
+                        PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA,
+                        PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
+                        PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA,
+                        PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA,
+                        PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA,
+                        PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA,
+                        PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA,
+                        PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA }
+        },
+        { PINMUX_DATA_REG("PORTL063_032DR", 0xe6054004, 32) {
+                        PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA,
+                        PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA,
+                        PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA,
+                        PORT51_DATA, PORT50_DATA, PORT49_DATA, PORT48_DATA,
+                        PORT47_DATA, PORT46_DATA, PORT45_DATA, PORT44_DATA,
+                        PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA,
+                        PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA,
+                        PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA }
+        },
+        { PINMUX_DATA_REG("PORTL095_064DR", 0xe6054008, 32) {
+                        PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA,
+                        PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA,
+                        PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA,
+                        PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA,
+                        PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA,
+                        PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA,
+                        PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA,
+                        PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA }
+        },
+        { PINMUX_DATA_REG("PORTD127_096DR", 0xe605400C, 32) {
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, PORT118_DATA, PORT117_DATA, PORT116_DATA,
+                        PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA,
+                        PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA,
+                        PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA,
+                        PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA,
+                        PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA }
+        },
+        { PINMUX_DATA_REG("PORTD159_128DR", 0xe6055000, 32) {
+                        PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA,
+                        PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA,
+                        PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA,
+                        PORT147_DATA, PORT146_DATA, PORT145_DATA, PORT144_DATA,
+                        PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA,
+                        PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA,
+                        PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA,
+                        PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA }
+        },
+        { PINMUX_DATA_REG("PORTR191_160DR", 0xe6055004, 32) {
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, PORT164_DATA,
+                        PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA }
+        },
+        { PINMUX_DATA_REG("PORTR223_192DR", 0xe6056000, 32) {
+                        PORT223_DATA, PORT222_DATA, PORT221_DATA, PORT220_DATA,
+                        PORT219_DATA, PORT218_DATA, PORT217_DATA, PORT216_DATA,
+                        PORT215_DATA, PORT214_DATA, PORT213_DATA, PORT212_DATA,
+                        PORT211_DATA, PORT210_DATA, PORT209_DATA, PORT208_DATA,
+                        PORT207_DATA, PORT206_DATA, PORT205_DATA, PORT204_DATA,
+                        PORT203_DATA, PORT202_DATA, PORT201_DATA, PORT200_DATA,
+                        PORT199_DATA, PORT198_DATA, PORT197_DATA, PORT196_DATA,
+                        PORT195_DATA, PORT194_DATA, PORT193_DATA, PORT192_DATA }
+        },
+        { PINMUX_DATA_REG("PORTU255_224DR", 0xe6056004, 32) {
+                        PORT255_DATA, PORT254_DATA, PORT253_DATA, PORT252_DATA,
+                        PORT251_DATA, PORT250_DATA, PORT249_DATA, PORT248_DATA,
+                        PORT247_DATA, PORT246_DATA, PORT245_DATA, PORT244_DATA,
+                        PORT243_DATA, PORT242_DATA, PORT241_DATA, PORT240_DATA,
+                        PORT239_DATA, PORT238_DATA, PORT237_DATA, PORT236_DATA,
+                        PORT235_DATA, PORT234_DATA, PORT233_DATA, PORT232_DATA,
+                        PORT231_DATA, PORT230_DATA, PORT229_DATA, PORT228_DATA,
+                        PORT227_DATA, PORT226_DATA, PORT225_DATA, PORT224_DATA }
+        },
+        { PINMUX_DATA_REG("PORTU287_256DR", 0xe6056008, 32) {
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, 0,
+                        0, 0, 0, PORT264_DATA,
+                        PORT263_DATA, PORT262_DATA, PORT261_DATA, PORT260_DATA,
+                        PORT259_DATA, PORT258_DATA, PORT257_DATA, PORT256_DATA }
+        },
+        { },
+};
+
+static struct pinmux_info sh7377_pinmux_info = {
+        .name = "sh7377_pfc",
+        .reserved_id = PINMUX_RESERVED,
+        .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
+        .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
+        .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
+        .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END },
+        .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
+        .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
+        .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
+
+        .first_gpio = GPIO_PORT0,
+        .last_gpio = GPIO_FN_RESETOUTS,
+
+        .gpios = pinmux_gpios,
+        .cfg_regs = pinmux_config_regs,
+        .data_regs = pinmux_data_regs,
+
+        .gpio_data = pinmux_data,
+        .gpio_data_size = ARRAY_SIZE(pinmux_data),
+};
+
+void sh7377_pinmux_init(void)
+{
+        register_pinmux(&sh7377_pinmux_info);
+}
diff --git a/arch/arm/mach-shmobile/setup-sh7367.c b/arch/arm/mach-shmobile/setup-sh7367.c
new file mode 100644
index 00000000000..eca90716140
--- /dev/null
+++ b/arch/arm/mach-shmobile/setup-sh7367.c
@@ -0,0 +1,198 @@
+/*
+ * sh7367 processor support
+ *
+ * Copyright (C) 2010  Magnus Damm
+ * Copyright (C) 2008  Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/io.h>
+#include <linux/serial_sci.h>
+#include <linux/sh_timer.h>
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xe6c40000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 80, 80, 80, 80 },
+};
+
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xe6c50000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 81, 81, 81, 81 },
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xe6c60000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 82, 82, 82, 82 },
+};
+
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xe6c70000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 83, 83, 83, 83 },
+};
+
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
+        .dev            = {
+                .platform_data  = &scif3_platform_data,
+        },
+};
+
+static struct plat_sci_port scif4_platform_data = {
+        .mapbase        = 0xe6c80000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 89, 89, 89, 89 },
+};
+
+static struct platform_device scif4_device = {
+        .name           = "sh-sci",
+        .id             = 4,
+        .dev            = {
+                .platform_data  = &scif4_platform_data,
+        },
+};
+
+static struct plat_sci_port scif5_platform_data = {
+        .mapbase        = 0xe6cb0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 90, 90, 90, 90 },
+};
+
+static struct platform_device scif5_device = {
+        .name           = "sh-sci",
+        .id             = 5,
+        .dev            = {
+                .platform_data  = &scif5_platform_data,
+        },
+};
+
+static struct plat_sci_port scif6_platform_data = {
+        .mapbase        = 0xe6c30000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 91, 91, 91, 91 },
+};
+
+static struct platform_device scif6_device = {
+        .name           = "sh-sci",
+        .id             = 6,
+        .dev            = {
+                .platform_data  = &scif6_platform_data,
+        },
+};
+
+static struct sh_timer_config cmt10_platform_data = {
+        .name = "CMT10",
+        .channel_offset = 0x10,
+        .timer_bit = 0,
+        .clk = "r_clk",
+        .clockevent_rating = 125,
+        .clocksource_rating = 125,
+};
+
+static struct resource cmt10_resources[] = {
+        [0] = {
+                .name   = "CMT10",
+                .start  = 0xe6138010,
+                .end    = 0xe613801b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 72,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt10_device = {
+        .name           = "sh_cmt",
+        .id             = 10,
+        .dev = {
+                .platform_data  = &cmt10_platform_data,
+        },
+        .resource       = cmt10_resources,
+        .num_resources  = ARRAY_SIZE(cmt10_resources),
+};
+
+static struct platform_device *sh7367_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
+        &scif6_device,
+        &cmt10_device,
+};
+
+void __init sh7367_add_standard_devices(void)
+{
+        platform_add_devices(sh7367_early_devices,
+                             ARRAY_SIZE(sh7367_early_devices));
+}
+
+#define SYMSTPCR2 0xe6158048
+#define SYMSTPCR2_CMT1 (1 << 29)
+
+void __init sh7367_add_early_devices(void)
+{
+        /* enable clock to CMT1 */
+        __raw_writel(__raw_readl(SYMSTPCR2) & ~SYMSTPCR2_CMT1, SYMSTPCR2);
+
+        early_platform_add_devices(sh7367_early_devices,
+                                   ARRAY_SIZE(sh7367_early_devices));
+}
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
new file mode 100644
index 00000000000..1d1153290f5
--- /dev/null
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -0,0 +1,199 @@
+/*
+ * sh7372 processor support
+ *
+ * Copyright (C) 2010  Magnus Damm
+ * Copyright (C) 2008  Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/io.h>
+#include <linux/serial_sci.h>
+#include <linux/sh_intc.h>
+#include <linux/sh_timer.h>
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xe6c40000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 80, 80, 80, 80 },
+};
+
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xe6c50000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 81, 81, 81, 81 },
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xe6c60000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 82, 82, 82, 82 },
+};
+
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xe6c70000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 83, 83, 83, 83 },
+};
+
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
+        .dev            = {
+                .platform_data  = &scif3_platform_data,
+        },
+};
+
+static struct plat_sci_port scif4_platform_data = {
+        .mapbase        = 0xe6c80000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 89, 89, 89, 89 },
+};
+
+static struct platform_device scif4_device = {
+        .name           = "sh-sci",
+        .id             = 4,
+        .dev            = {
+                .platform_data  = &scif4_platform_data,
+        },
+};
+
+static struct plat_sci_port scif5_platform_data = {
+        .mapbase        = 0xe6cb0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 90, 90, 90, 90 },
+};
+
+static struct platform_device scif5_device = {
+        .name           = "sh-sci",
+        .id             = 5,
+        .dev            = {
+                .platform_data  = &scif5_platform_data,
+        },
+};
+
+static struct plat_sci_port scif6_platform_data = {
+        .mapbase        = 0xe6c30000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 91, 91, 91, 91 },
+};
+
+static struct platform_device scif6_device = {
+        .name           = "sh-sci",
+        .id             = 6,
+        .dev            = {
+                .platform_data  = &scif6_platform_data,
+        },
+};
+
+static struct sh_timer_config cmt10_platform_data = {
+        .name = "CMT10",
+        .channel_offset = 0x10,
+        .timer_bit = 0,
+        .clk = "r_clk",
+        .clockevent_rating = 125,
+        .clocksource_rating = 125,
+};
+
+static struct resource cmt10_resources[] = {
+        [0] = {
+                .name   = "CMT10",
+                .start  = 0xe6138010,
+                .end    = 0xe613801b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 72,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt10_device = {
+        .name           = "sh_cmt",
+        .id             = 10,
+        .dev = {
+                .platform_data  = &cmt10_platform_data,
+        },
+        .resource       = cmt10_resources,
+        .num_resources  = ARRAY_SIZE(cmt10_resources),
+};
+
+static struct platform_device *sh7372_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
+        &scif6_device,
+        &cmt10_device,
+};
+
+void __init sh7372_add_standard_devices(void)
+{
+        platform_add_devices(sh7372_early_devices,
+                            ARRAY_SIZE(sh7372_early_devices));
+}
+
+#define SMSTPCR3 0xe615013c
+#define SMSTPCR3_CMT1 (1 << 29)
+
+void __init sh7372_add_early_devices(void)
+{
+        /* enable clock to CMT1 */
+        __raw_writel(__raw_readl(SMSTPCR3) & ~SMSTPCR3_CMT1, SMSTPCR3);
+
+        early_platform_add_devices(sh7372_early_devices,
+                                   ARRAY_SIZE(sh7372_early_devices));
+}
diff --git a/arch/arm/mach-shmobile/setup-sh7377.c b/arch/arm/mach-shmobile/setup-sh7377.c
new file mode 100644
index 00000000000..60e37774c35
--- /dev/null
+++ b/arch/arm/mach-shmobile/setup-sh7377.c
@@ -0,0 +1,215 @@
+/*
+ * sh7377 processor support
+ *
+ * Copyright (C) 2010  Magnus Damm
+ * Copyright (C) 2008  Yoshihiro Shimoda
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/io.h>
+#include <linux/serial_sci.h>
+#include <linux/sh_intc.h>
+#include <linux/sh_timer.h>
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xe6c40000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 80, 80, 80, 80 },
+};
+
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xe6c50000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 81, 81, 81, 81 },
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xe6c60000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 82, 82, 82, 82 },
+};
+
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xe6c70000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 83, 83, 83, 83 },
+};
+
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
+        .dev            = {
+                .platform_data  = &scif3_platform_data,
+        },
+};
+
+static struct plat_sci_port scif4_platform_data = {
+        .mapbase        = 0xe6c80000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 89, 89, 89, 89 },
+};
+
+static struct platform_device scif4_device = {
+        .name           = "sh-sci",
+        .id             = 4,
+        .dev            = {
+                .platform_data  = &scif4_platform_data,
+        },
+};
+
+static struct plat_sci_port scif5_platform_data = {
+        .mapbase        = 0xe6cb0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 90, 90, 90, 90 },
+};
+
+static struct platform_device scif5_device = {
+        .name           = "sh-sci",
+        .id             = 5,
+        .dev            = {
+                .platform_data  = &scif5_platform_data,
+        },
+};
+
+static struct plat_sci_port scif6_platform_data = {
+        .mapbase        = 0xe6cc0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 196, 196, 196, 196 },
+};
+
+static struct platform_device scif6_device = {
+        .name           = "sh-sci",
+        .id             = 6,
+        .dev            = {
+                .platform_data  = &scif6_platform_data,
+        },
+};
+
+static struct plat_sci_port scif7_platform_data = {
+        .mapbase        = 0xe6c30000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 91, 91, 91, 91 },
+};
+
+static struct platform_device scif7_device = {
+        .name           = "sh-sci",
+        .id             = 7,
+        .dev            = {
+                .platform_data  = &scif7_platform_data,
+        },
+};
+
+static struct sh_timer_config cmt10_platform_data = {
+        .name = "CMT10",
+        .channel_offset = 0x10,
+        .timer_bit = 0,
+        .clk = "r_clk",
+        .clockevent_rating = 125,
+        .clocksource_rating = 125,
+};
+
+static struct resource cmt10_resources[] = {
+        [0] = {
+                .name   = "CMT10",
+                .start  = 0xe6138010,
+                .end    = 0xe613801b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 72,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt10_device = {
+        .name           = "sh_cmt",
+        .id             = 10,
+        .dev = {
+                .platform_data  = &cmt10_platform_data,
+        },
+        .resource       = cmt10_resources,
+        .num_resources  = ARRAY_SIZE(cmt10_resources),
+};
+
+static struct platform_device *sh7377_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
+        &scif6_device,
+        &scif7_device,
+        &cmt10_device,
+};
+
+void __init sh7377_add_standard_devices(void)
+{
+        platform_add_devices(sh7377_early_devices,
+                            ARRAY_SIZE(sh7377_early_devices));
+}
+
+#define SMSTPCR3 0xe615013c
+#define SMSTPCR3_CMT1 (1 << 29)
+
+void __init sh7377_add_early_devices(void)
+{
+        /* enable clock to CMT1 */
+        __raw_writel(__raw_readl(SMSTPCR3) & ~SMSTPCR3_CMT1, SMSTPCR3);
+
+        early_platform_add_devices(sh7377_early_devices,
+                                   ARRAY_SIZE(sh7377_early_devices));
+}
diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
new file mode 100644
index 00000000000..895794b543c
--- /dev/null
+++ b/arch/arm/mach-shmobile/timer.c
@@ -0,0 +1,46 @@
+/*
+ * SH-Mobile Timer
+ *
+ * Copyright (C) 2010  Magnus Damm
+ * Copyright (C) 2002 - 2009  Paul Mundt
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ *
+ */
+#include <linux/platform_device.h>
+#include <asm/mach/time.h>
+
+static void __init shmobile_late_time_init(void)
+{
+        /*
+         * Make sure all compiled-in early timers register themselves.
+         *
+         * Run probe() for two "earlytimer" devices, these will be the
+         * clockevents and clocksource devices respectively. In the event
+         * that only a clockevents device is available, we -ENODEV on the
+         * clocksource and the jiffies clocksource is used transparently
+         * instead. No error handling is necessary here.
+         */
+        early_platform_driver_register_all("earlytimer");
+        early_platform_driver_probe("earlytimer", 2, 0);
+}
+
+static void __init shmobile_timer_init(void)
+{
+        late_time_init = shmobile_late_time_init;
+}
+
+struct sys_timer shmobile_timer = {
+        .init           = shmobile_timer_init,
+};
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index 01b50313914..5f34eb674d6 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -358,7 +358,7 @@ static struct resource ave_resources[] = {
         /*
          * The AVE3e requires two regions of 256MB that it considers
          * "invisible". The hardware will not be able to access these
-         * adresses, so they should never point to system RAM.
+         * addresses, so they should never point to system RAM.
          */
         {
                 .name  = "AVE3e Reserved 0",
@@ -1596,7 +1596,7 @@ static void __init u300_init_check_chip(void)
 /*
  * Some devices and their resources require reserved physical memory from
  * the end of the available RAM. This function traverses the list of devices
- * and assigns actual adresses to these.
+ * and assigns actual addresses to these.
  */
 static void __init u300_assign_physmem(void)
 {
diff --git a/arch/arm/mach-u300/dummyspichip.c b/arch/arm/mach-u300/dummyspichip.c
index 962f9de454d..5f55012b7c9 100644
--- a/arch/arm/mach-u300/dummyspichip.c
+++ b/arch/arm/mach-u300/dummyspichip.c
@@ -15,6 +15,7 @@
 #include <linux/mutex.h>
 #include <linux/spi/spi.h>
 #include <linux/dma-mapping.h>
+#include <linux/slab.h>
 /*
  * WARNING! Do not include this pl022-specific controller header
  * for any generic driver. It is only done in this dummy chip
diff --git a/arch/arm/mach-u300/include/mach/debug-macro.S b/arch/arm/mach-u300/include/mach/debug-macro.S
index ca4a028c266..92c12420256 100644
--- a/arch/arm/mach-u300/include/mach/debug-macro.S
+++ b/arch/arm/mach-u300/include/mach/debug-macro.S
@@ -11,7 +11,7 @@
 #include <mach/hardware.h>
 
         .macro  addruart, rx, tmp
-        /* If we move the adress using MMU, use this. */
+        /* If we move the address using MMU, use this. */
         mrc     p15, 0, \rx, c1, c0
         tst     \rx, #1                 @ MMU enabled?
         ldreq   \rx,      = U300_SLOW_PER_PHYS_BASE @ MMU off, physical address
diff --git a/arch/arm/mach-u300/mmc.c b/arch/arm/mach-u300/mmc.c
index 109f5a6e71c..77fbb1e0e52 100644
--- a/arch/arm/mach-u300/mmc.c
+++ b/arch/arm/mach-u300/mmc.c
@@ -20,6 +20,7 @@
 #include <linux/regulator/machine.h>
 #include <linux/gpio.h>
 #include <linux/amba/mmci.h>
+#include <linux/slab.h>
 
 #include "mmc.h"
 #include "padmux.h"
diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h
index 6da650202dc..04ea836969b 100644
--- a/arch/arm/mach-ux500/include/mach/hardware.h
+++ b/arch/arm/mach-ux500/include/mach/hardware.h
@@ -68,12 +68,12 @@
 #define U8500_PKAM_BASE         (U8500_PER6_BASE + 0x2000)
 #define U8500_CRYPTO0_BASE      (U8500_PER6_BASE + 0xa000)
 #define U8500_CRYPTO1_BASE      (U8500_PER6_BASE + 0xb000)
-#define U8500_CLKRST6_BASE      (U8500_PER7_BASE + 0xf000)
+#define U8500_CLKRST6_BASE      (U8500_PER6_BASE + 0xf000)
 
 /* per5 base addressess */
 #define U8500_USBOTG_BASE       (U8500_PER5_BASE + 0x00000)
 #define U8500_GPIO5_BASE        (U8500_PER5_BASE + 0x1e000)
-#define U8500_CLKRST5_BASE      (U8500_PER7_BASE + 0x1f000)
+#define U8500_CLKRST5_BASE      (U8500_PER5_BASE + 0x1f000)
 
 /* per4 base addressess */
 #define U8500_BACKUPRAM0_BASE   (U8500_PER4_BASE + 0x0000)
@@ -95,7 +95,7 @@
 #define U8500_UART2_BASE        (U8500_PER3_BASE + 0x7000)
 #define U8500_SDI5_BASE         (U8500_PER3_BASE + 0x8000)
 #define U8500_GPIO3_BASE        (U8500_PER3_BASE + 0xe000)
-#define U8500_CLKRST3_BASE      (U8500_PER7_BASE + 0xf000)
+#define U8500_CLKRST3_BASE      (U8500_PER3_BASE + 0xf000)
 
 /* per2 base addressess */
 #define U8500_I2C3_BASE         (U8500_PER2_BASE + 0x0000)
@@ -123,7 +123,7 @@
 #define U8500_SPI3_BASE         (U8500_PER1_BASE + 0x9000)
 #define U8500_SLIM0_BASE        (U8500_PER1_BASE + 0xa000)
 #define U8500_GPIO1_BASE        (U8500_PER1_BASE + 0xe000)
-#define U8500_CLKRST1_BASE      (U8500_PER2_BASE + 0xf000)
+#define U8500_CLKRST1_BASE      (U8500_PER1_BASE + 0xf000)
 
 /* ST-Ericsson modified pl022 id */
 #define SSP_PER_ID              0x01080022
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 9ddb49b1cb7..3b1a4ee0181 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -32,6 +32,7 @@
 #include <linux/clockchips.h>
 #include <linux/cnt32_to_63.h>
 #include <linux/io.h>
+#include <linux/gfp.h>
 
 #include <asm/clkdev.h>
 #include <asm/system.h>
diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c
index 7161ba23b58..334f0df4e94 100644
--- a/arch/arm/mach-versatile/pci.c
+++ b/arch/arm/mach-versatile/pci.c
@@ -16,7 +16,6 @@
  */
 #include <linux/kernel.h>
 #include <linux/pci.h>
-#include <linux/slab.h>
 #include <linux/ioport.h>
 #include <linux/interrupt.h>
 #include <linux/spinlock.h>
diff --git a/arch/arm/mach-w90x900/cpu.h b/arch/arm/mach-w90x900/cpu.h
index 4d58ba164e2..f8730b60bd7 100644
--- a/arch/arm/mach-w90x900/cpu.h
+++ b/arch/arm/mach-w90x900/cpu.h
@@ -57,3 +57,4 @@ extern struct platform_device nuc900_device_fmi;
 extern struct platform_device nuc900_device_kpi;
 extern struct platform_device nuc900_device_rtc;
 extern struct platform_device nuc900_device_ts;
+extern struct platform_device nuc900_device_lcd;
diff --git a/arch/arm/mach-w90x900/dev.c b/arch/arm/mach-w90x900/dev.c
index ec711f4b401..e2958eb567f 100644
--- a/arch/arm/mach-w90x900/dev.c
+++ b/arch/arm/mach-w90x900/dev.c
@@ -18,6 +18,7 @@
 #include <linux/timer.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
+#include <linux/slab.h>
 
 #include <linux/mtd/physmap.h>
 #include <linux/mtd/mtd.h>
@@ -34,6 +35,7 @@
 #include <mach/regs-serial.h>
 #include <mach/nuc900_spi.h>
 #include <mach/map.h>
+#include <mach/fb.h>
 
 #include "cpu.h"
 
@@ -380,6 +382,47 @@ struct platform_device nuc900_device_kpi = {
         .resource       = nuc900_kpi_resource,
 };
 
+#ifdef CONFIG_FB_NUC900
+
+static struct resource nuc900_lcd_resource[] = {
+        [0] = {
+                .start = W90X900_PA_LCD,
+                .end   = W90X900_PA_LCD + W90X900_SZ_LCD - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_LCD,
+                .end   = IRQ_LCD,
+                .flags = IORESOURCE_IRQ,
+        }
+};
+
+static u64 nuc900_device_lcd_dmamask = -1;
+struct platform_device nuc900_device_lcd = {
+        .name             = "nuc900-lcd",
+        .id               = -1,
+        .num_resources    = ARRAY_SIZE(nuc900_lcd_resource),
+        .resource         = nuc900_lcd_resource,
+        .dev              = {
+                .dma_mask               = &nuc900_device_lcd_dmamask,
+                .coherent_dma_mask      = -1,
+        }
+};
+
+void  nuc900_fb_set_platdata(struct nuc900fb_mach_info *pd)
+{
+        struct nuc900fb_mach_info *npd;
+
+        npd = kmalloc(sizeof(*npd), GFP_KERNEL);
+        if (npd) {
+                memcpy(npd, pd, sizeof(*npd));
+                nuc900_device_lcd.dev.platform_data = npd;
+        } else {
+                printk(KERN_ERR "no memory for LCD platform data\n");
+        }
+}
+#endif
+
 /*Here should be your evb resourse,such as LCD*/
 
 static struct platform_device *nuc900_public_dev[] __initdata = {
diff --git a/arch/arm/mach-w90x900/include/mach/fb.h b/arch/arm/mach-w90x900/include/mach/fb.h
new file mode 100644
index 00000000000..cec5ece765e
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/fb.h
@@ -0,0 +1,83 @@
+/* linux/include/asm/arch-nuc900/fb.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * Changelog:
+ *
+ *   2008/08/26     vincen.zswan modify this file for LCD.
+ */
+
+#ifndef __ASM_ARM_FB_H
+#define __ASM_ARM_FB_H
+
+
+
+/* LCD Controller Hardware Desc */
+struct nuc900fb_hw {
+        unsigned int lcd_dccs;
+        unsigned int lcd_device_ctrl;
+        unsigned int lcd_mpulcd_cmd;
+        unsigned int lcd_int_cs;
+        unsigned int lcd_crtc_size;
+        unsigned int lcd_crtc_dend;
+        unsigned int lcd_crtc_hr;
+        unsigned int lcd_crtc_hsync;
+        unsigned int lcd_crtc_vr;
+        unsigned int lcd_va_baddr0;
+        unsigned int lcd_va_baddr1;
+        unsigned int lcd_va_fbctrl;
+        unsigned int lcd_va_scale;
+        unsigned int lcd_va_test;
+        unsigned int lcd_va_win;
+        unsigned int lcd_va_stuff;
+};
+
+/* LCD Display Description */
+struct nuc900fb_display {
+        /* LCD Image type */
+        unsigned type;
+
+        /* LCD Screen Size */
+        unsigned short width;
+        unsigned short height;
+
+        /* LCD Screen Info */
+        unsigned short xres;
+        unsigned short yres;
+        unsigned short bpp;
+
+        unsigned long pixclock;
+        unsigned short left_margin;
+        unsigned short right_margin;
+        unsigned short hsync_len;
+        unsigned short upper_margin;
+        unsigned short lower_margin;
+        unsigned short vsync_len;
+
+        /* hardware special register value */
+        unsigned int dccs;
+        unsigned int devctl;
+        unsigned int fbctrl;
+        unsigned int scale;
+};
+
+struct nuc900fb_mach_info {
+        struct nuc900fb_display *displays;
+        unsigned num_displays;
+        unsigned default_display;
+        /* GPIO Setting  Info */
+        unsigned gpio_dir;
+        unsigned gpio_dir_mask;
+        unsigned gpio_data;
+        unsigned gpio_data_mask;
+};
+
+extern void __init nuc900_fb_set_platdata(struct nuc900fb_mach_info *);
+
+#endif /* __ASM_ARM_FB_H */
diff --git a/arch/arm/mach-w90x900/include/mach/regs-ldm.h b/arch/arm/mach-w90x900/include/mach/regs-ldm.h
new file mode 100644
index 00000000000..e9d480a5b23
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/regs-ldm.h
@@ -0,0 +1,253 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/regs-serial.h
+ *
+ * Copyright (c) 2009 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ *  Description:
+ *     Nuvoton Display, LCM Register list
+ *  Author:  Wang Qiang (rurality.linux@gmail.com) 2009/12/11
+ *
+ */
+
+
+#ifndef __ASM_ARM_W90X900_REGS_LDM_H
+#define __ASM_ARM_W90X900_REGS_LDM_H
+
+#include <mach/map.h>
+
+/* Display Controller Control/Status Register */
+#define REG_LCM_DCCS                    (0x00)
+
+#define LCM_DCCS_ENG_RST                (1 << 0)
+#define LCM_DCCS_VA_EN                  (1 << 1)
+#define LCM_DCCS_OSD_EN                 (1 << 2)
+#define LCM_DCCS_DISP_OUT_EN            (1 << 3)
+#define LCM_DCCS_DISP_INT_EN            (1 << 4)
+#define LCM_DCCS_CMD_ON                 (1 << 5)
+#define LCM_DCCS_FIELD_INTR             (1 << 6)
+#define LCM_DCCS_SINGLE                 (1 << 7)
+
+enum LCM_DCCS_VA_SRC {
+        LCM_DCCS_VA_SRC_YUV422          = (0 << 8),
+        LCM_DCCS_VA_SRC_YCBCR422        = (1 << 8),
+        LCM_DCCS_VA_SRC_RGB888          = (2 << 8),
+        LCM_DCCS_VA_SRC_RGB666          = (3 << 8),
+        LCM_DCCS_VA_SRC_RGB565          = (4 << 8),
+        LCM_DCCS_VA_SRC_RGB444LOW       = (5 << 8),
+        LCM_DCCS_VA_SRC_RGB444HIGH      = (7 << 8)
+};
+
+
+/* Display Device Control Register */
+#define REG_LCM_DEV_CTRL                (0x04)
+
+enum LCM_DEV_CTRL_SWAP_YCbCr {
+        LCM_DEV_CTRL_SWAP_UYVY          = (0 << 1),
+        LCM_DEV_CTRL_SWAP_YUYV          = (1 << 1),
+        LCM_DEV_CTRL_SWAP_VYUY          = (2 << 1),
+        LCM_DEV_CTRL_SWAP_YVYU          = (3 << 1)
+};
+
+enum LCM_DEV_CTRL_RGB_SHIFT {
+        LCM_DEV_CTRL_RGB_SHIFT_NOT      = (0 << 3),
+        LCM_DEV_CTRL_RGB_SHIFT_ONECYCLE = (1 << 3),
+        LCM_DEV_CTRL_RGB_SHIFT_TWOCYCLE = (2 << 3),
+        LCM_DEV_CTRL_RGB_SHIFT_NOT_DEF  = (3 << 3)
+};
+
+enum LCM_DEV_CTRL_DEVICE {
+        LCM_DEV_CTRL_DEVICE_YUV422      = (0 << 5),
+        LCM_DEV_CTRL_DEVICE_YUV444      = (1 << 5),
+        LCM_DEV_CTRL_DEVICE_UNIPAC      = (4 << 5),
+        LCM_DEV_CTRL_DEVICE_SEIKO_EPSON = (5 << 5),
+        LCM_DEV_CTRL_DEVICE_HIGH_COLOR  = (6 << 5),
+        LCM_DEV_CTRL_DEVICE_MPU         = (7 << 5)
+};
+
+#define LCM_DEV_CTRL_LCD_DDA            (8)
+#define LCM_DEV_CTRL_YUV2CCIR           (16)
+
+enum LCM_DEV_CTRL_LCD_SEL {
+        LCM_DEV_CTRL_LCD_SEL_RGB_GBR    = (0 << 17),
+        LCM_DEV_CTRL_LCD_SEL_BGR_RBG    = (1 << 17),
+        LCM_DEV_CTRL_LCD_SEL_GBR_RGB    = (2 << 17),
+        LCM_DEV_CTRL_LCD_SEL_RBG_BGR    = (3 << 17)
+};
+
+enum LCM_DEV_CTRL_FAL_D {
+        LCM_DEV_CTRL_FAL_D_FALLING      = (0 << 19),
+        LCM_DEV_CTRL_FAL_D_RISING       = (1 << 19),
+};
+
+enum LCM_DEV_CTRL_H_POL {
+        LCM_DEV_CTRL_H_POL_LOW          = (0 << 20),
+        LCM_DEV_CTRL_H_POL_HIGH         = (1 << 20),
+};
+
+enum LCM_DEV_CTRL_V_POL {
+        LCM_DEV_CTRL_V_POL_LOW          = (0 << 21),
+        LCM_DEV_CTRL_V_POL_HIGH         = (1 << 21),
+};
+
+enum LCM_DEV_CTRL_VR_LACE {
+        LCM_DEV_CTRL_VR_LACE_NINTERLACE = (0 << 22),
+        LCM_DEV_CTRL_VR_LACE_INTERLACE  = (1 << 22),
+};
+
+enum LCM_DEV_CTRL_LACE {
+        LCM_DEV_CTRL_LACE_NINTERLACE    = (0 << 23),
+        LCM_DEV_CTRL_LACE_INTERLACE     = (1 << 23),
+};
+
+enum LCM_DEV_CTRL_RGB_SCALE {
+        LCM_DEV_CTRL_RGB_SCALE_4096     = (0 << 24),
+        LCM_DEV_CTRL_RGB_SCALE_65536    = (1 << 24),
+        LCM_DEV_CTRL_RGB_SCALE_262144   = (2 << 24),
+        LCM_DEV_CTRL_RGB_SCALE_16777216 = (3 << 24),
+};
+
+enum LCM_DEV_CTRL_DBWORD {
+        LCM_DEV_CTRL_DBWORD_HALFWORD    = (0 << 26),
+        LCM_DEV_CTRL_DBWORD_FULLWORD    = (1 << 26),
+};
+
+enum LCM_DEV_CTRL_MPU68 {
+        LCM_DEV_CTRL_MPU68_80_SERIES    = (0 << 27),
+        LCM_DEV_CTRL_MPU68_68_SERIES    = (1 << 27),
+};
+
+enum LCM_DEV_CTRL_DE_POL {
+        LCM_DEV_CTRL_DE_POL_HIGH        = (0 << 28),
+        LCM_DEV_CTRL_DE_POL_LOW         = (1 << 28),
+};
+
+#define LCM_DEV_CTRL_CMD16              (29)
+#define LCM_DEV_CTRL_CM16t18            (30)
+#define LCM_DEV_CTRL_CMD_LOW            (31)
+
+/* MPU-Interface LCD Write Command */
+#define REG_LCM_MPU_CMD                 (0x08)
+
+/* Interrupt Control/Status Register */
+#define REG_LCM_INT_CS                  (0x0c)
+#define LCM_INT_CS_DISP_F_EN            (1 << 0)
+#define LCM_INT_CS_UNDERRUN_EN          (1 << 1)
+#define LCM_INT_CS_BUS_ERROR_INT        (1 << 28)
+#define LCM_INT_CS_UNDERRUN_INT         (1 << 29)
+#define LCM_INT_CS_DISP_F_STATUS        (1 << 30)
+#define LCM_INT_CS_DISP_F_INT           (1 << 31)
+
+/* CRTC Display Size Control Register */
+#define REG_LCM_CRTC_SIZE               (0x10)
+#define LCM_CRTC_SIZE_VTTVAL(x)         ((x) << 16)
+#define LCM_CRTC_SIZE_HTTVAL(x)         ((x) << 0)
+
+/* CRTC Display Enable End */
+#define REG_LCM_CRTC_DEND               (0x14)
+#define LCM_CRTC_DEND_VDENDVAL(x)       ((x) << 16)
+#define LCM_CRTC_DEND_HDENDVAL(x)       ((x) << 0)
+
+/* CRTC Internal Horizontal Retrace Control Register */
+#define REG_LCM_CRTC_HR                 (0x18)
+#define LCM_CRTC_HR_EVAL(x)             ((x) << 16)
+#define LCM_CRTC_HR_SVAL(x)             ((x) << 0)
+
+/* CRTC Horizontal Sync Control Register */
+#define REG_LCM_CRTC_HSYNC              (0x1C)
+#define LCM_CRTC_HSYNC_SHIFTVAL(x)      ((x) << 30)
+#define LCM_CRTC_HSYNC_EVAL(x)          ((x) << 16)
+#define LCM_CRTC_HSYNC_SVAL(x)          ((x) << 0)
+
+/* CRTC Internal Vertical Retrace Control Register */
+#define REG_LCM_CRTC_VR                 (0x20)
+#define LCM_CRTC_VR_EVAL(x)             ((x) << 16)
+#define LCM_CRTC_VR_SVAL(x)             ((x) << 0)
+
+/* Video Stream Frame Buffer-0 Starting Address */
+#define REG_LCM_VA_BADDR0               (0x24)
+
+/* Video Stream Frame Buffer-1 Starting Address */
+#define REG_LCM_VA_BADDR1               (0x28)
+
+/* Video Stream Frame Buffer Control Register */
+#define REG_LCM_VA_FBCTRL               (0x2C)
+#define LCM_VA_FBCTRL_IO_REGION_HALF    (1 << 28)
+#define LCM_VA_FBCTRL_FIELD_DUAL        (1 << 29)
+#define LCM_VA_FBCTRL_START_BUF         (1 << 30)
+#define LCM_VA_FBCTRL_DB_EN             (1 << 31)
+
+/* Video Stream Scaling Control Register */
+#define REG_LCM_VA_SCALE                (0x30)
+#define LCM_VA_SCALE_XCOPY_INTERPOLATION (0 << 15)
+#define LCM_VA_SCALE_XCOPY_DUPLICATION   (1 << 15)
+
+/* Image Stream Active Window Coordinates */
+#define REG_LCM_VA_WIN                  (0x38)
+
+/* Image Stream Stuff Pixel */
+#define REG_LCM_VA_STUFF                (0x3C)
+
+/* OSD Window Starting Coordinates */
+#define REG_LCM_OSD_WINS                (0x40)
+
+/* OSD Window Ending Coordinates */
+#define REG_LCM_OSD_WINE                (0x44)
+
+/* OSD Stream Frame Buffer Starting Address */
+#define REG_LCM_OSD_BADDR               (0x48)
+
+/* OSD Stream Frame Buffer Control Register */
+#define REG_LCM_OSD_FBCTRL              (0x4c)
+
+/* OSD Overlay Control Register */
+#define REG_LCM_OSD_OVERLAY             (0x50)
+
+/* OSD Overlay Color-Key Pattern Register */
+#define REG_LCM_OSD_CKEY                (0x54)
+
+/* OSD Overlay Color-Key Mask Register */
+#define REG_LCM_OSD_CMASK               (0x58)
+
+/* OSD Window Skip1 Register */
+#define REG_LCM_OSD_SKIP1               (0x5C)
+
+/* OSD Window Skip2 Register */
+#define REG_LCM_OSD_SKIP2               (0x60)
+
+/* OSD horizontal up scaling control register */
+#define REG_LCM_OSD_SCALE               (0x64)
+
+/* MPU Vsync control register */
+#define REG_LCM_MPU_VSYNC               (0x68)
+
+/* Hardware cursor control Register */
+#define REG_LCM_HC_CTRL                 (0x6C)
+
+/* Hardware cursot tip point potison on va picture */
+#define REG_LCM_HC_POS                  (0x70)
+
+/* Hardware Cursor Window Buffer Control Register */
+#define REG_LCM_HC_WBCTRL               (0x74)
+
+/* Hardware cursor memory base address register */
+#define REG_LCM_HC_BADDR                (0x78)
+
+/* Hardware cursor color ram register mapped to bpp = 0 */
+#define REG_LCM_HC_COLOR0               (0x7C)
+
+/* Hardware cursor color ram register mapped to bpp = 1 */
+#define REG_LCM_HC_COLOR1               (0x80)
+
+/* Hardware cursor color ram register mapped to bpp = 2 */
+#define REG_LCM_HC_COLOR2               (0x84)
+
+/* Hardware cursor color ram register mapped to bpp = 3 */
+#define REG_LCM_HC_COLOR3               (0x88)
+
+#endif /* __ASM_ARM_W90X900_REGS_LDM_H */
diff --git a/arch/arm/mach-w90x900/mach-nuc950evb.c b/arch/arm/mach-w90x900/mach-nuc950evb.c
index cef903bcccd..b3edc3cccf5 100644
--- a/arch/arm/mach-w90x900/mach-nuc950evb.c
+++ b/arch/arm/mach-w90x900/mach-nuc950evb.c
@@ -10,6 +10,8 @@
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
  * published by the Free Software Foundation;version 2 of the License.
+ *   history:
+ *     Wang Qiang (rurality.linux@gmail.com) add LCD support
  *
  */
 
@@ -18,9 +20,51 @@
 #include <asm/mach/map.h>
 #include <asm/mach-types.h>
 #include <mach/map.h>
+#include <mach/regs-ldm.h>
+#include <mach/fb.h>
 
 #include "nuc950.h"
 
+#ifdef CONFIG_FB_NUC900
+/* LCD Controller */
+static struct nuc900fb_display __initdata nuc950_lcd_info[] = {
+        /* Giantplus Technology GPM1040A0 320x240 Color TFT LCD */
+        [0] = {
+                .type           = LCM_DCCS_VA_SRC_RGB565,
+                .width          = 320,
+                .height         = 240,
+                .xres           = 320,
+                .yres           = 240,
+                .bpp            = 16,
+                .pixclock       = 200000,
+                .left_margin    = 34,
+                .right_margin   = 54,
+                .hsync_len      = 10,
+                .upper_margin   = 18,
+                .lower_margin   = 4,
+                .vsync_len      = 1,
+                .dccs           = 0x8e00041a,
+                .devctl         = 0x060800c0,
+                .fbctrl         = 0x00a000a0,
+                .scale          = 0x04000400,
+        },
+};
+
+static struct nuc900fb_mach_info nuc950_fb_info __initdata = {
+#if defined(CONFIG_GPM1040A0_320X240)
+        .displays               = &nuc950_lcd_info[0],
+#else
+        .displays               = nuc950_lcd_info,
+#endif
+        .num_displays           = ARRAY_SIZE(nuc950_lcd_info),
+        .default_display        = 0,
+        .gpio_dir               = 0x00000004,
+        .gpio_dir_mask          = 0xFFFFFFFD,
+        .gpio_data              = 0x00000004,
+        .gpio_data_mask         = 0xFFFFFFFD,
+};
+#endif
+
 static void __init nuc950evb_map_io(void)
 {
         nuc950_map_io();
@@ -30,6 +74,9 @@ static void __init nuc950evb_map_io(void)
 static void __init nuc950evb_init(void)
 {
         nuc950_board_init();
+#ifdef CONFIG_FB_NUC900
+        nuc900_fb_set_platdata(&nuc950_fb_info);
+#endif
 }
 
 MACHINE_START(W90P950EVB, "W90P950EVB")
diff --git a/arch/arm/mach-w90x900/nuc950.c b/arch/arm/mach-w90x900/nuc950.c
index 149508116d1..4d1f1ab044c 100644
--- a/arch/arm/mach-w90x900/nuc950.c
+++ b/arch/arm/mach-w90x900/nuc950.c
@@ -18,6 +18,7 @@
 #include <linux/platform_device.h>
 #include <asm/mach/map.h>
 #include <mach/hardware.h>
+
 #include "cpu.h"
 
 /* define specific CPU platform device */
@@ -25,6 +26,9 @@
 static struct platform_device *nuc950_dev[] __initdata = {
         &nuc900_device_kpi,
         &nuc900_device_fmi,
+#ifdef CONFIG_FB_NUC900
+        &nuc900_device_lcd,
+#endif
 };
 
 /* define specific CPU platform io map */
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index c4ed9f93f64..5bd7c89a604 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -736,6 +736,12 @@ config NEEDS_SYSCALL_FOR_CMPXCHG
 config OUTER_CACHE
         bool
 
+config OUTER_CACHE_SYNC
+        bool
+        help
+          The outer cache has a outer_cache_fns.sync function pointer
+          that can be used to drain the write buffer of the outer cache.
+
 config CACHE_FEROCEON_L2
         bool "Enable the Feroceon L2 cache controller"
         depends on ARCH_KIRKWOOD || ARCH_MV78XX0
@@ -757,6 +763,7 @@ config CACHE_L2X0
                    REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || ARCH_NOMADIK || ARCH_OMAP4
         default y
         select OUTER_CACHE
+        select OUTER_CACHE_SYNC
         help
           This option enables the L2x0 PrimeCell.
 
@@ -781,3 +788,9 @@ config ARM_L1_CACHE_SHIFT
         int
         default 6 if ARM_L1_CACHE_SHIFT_6
         default 5
+
+config ARCH_HAS_BARRIERS
+        bool
+        help
+          This option allows the use of custom mandatory barriers
+          included via the mach/barriers.h file.
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index edddd66faac..a2ab51fa73e 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -166,15 +166,15 @@ union offset_union {
  THUMB( "1:     "ins"   %1, [%2]\n"     )               \
  THUMB( "       add     %2, %2, #1\n"   )               \
         "2:\n"                                          \
-        "       .section .fixup,\"ax\"\n"               \
+        "       .pushsection .fixup,\"ax\"\n"           \
         "       .align  2\n"                            \
         "3:     mov     %0, #1\n"                       \
         "       b       2b\n"                           \
-        "       .previous\n"                            \
-        "       .section __ex_table,\"a\"\n"            \
+        "       .popsection\n"                          \
+        "       .pushsection __ex_table,\"a\"\n"        \
         "       .align  3\n"                            \
         "       .long   1b, 3b\n"                       \
-        "       .previous\n"                            \
+        "       .popsection\n"                          \
         : "=r" (err), "=&r" (val), "=r" (addr)          \
         : "0" (err), "2" (addr))
 
@@ -226,16 +226,16 @@ union offset_union {
                 "       mov     %1, %1, "NEXT_BYTE"\n"          \
                 "2:     "ins"   %1, [%2]\n"                     \
                 "3:\n"                                          \
-                "       .section .fixup,\"ax\"\n"               \
+                "       .pushsection .fixup,\"ax\"\n"           \
                 "       .align  2\n"                            \
                 "4:     mov     %0, #1\n"                       \
                 "       b       3b\n"                           \
-                "       .previous\n"                            \
-                "       .section __ex_table,\"a\"\n"            \
+                "       .popsection\n"                          \
+                "       .pushsection __ex_table,\"a\"\n"        \
                 "       .align  3\n"                            \
                 "       .long   1b, 4b\n"                       \
                 "       .long   2b, 4b\n"                       \
-                "       .previous\n"                            \
+                "       .popsection\n"                          \
                 : "=r" (err), "=&r" (v), "=&r" (a)              \
                 : "0" (err), "1" (v), "2" (a));                 \
                 if (err)                                        \
@@ -266,18 +266,18 @@ union offset_union {
                 "       mov     %1, %1, "NEXT_BYTE"\n"          \
                 "4:     "ins"   %1, [%2]\n"                     \
                 "5:\n"                                          \
-                "       .section .fixup,\"ax\"\n"               \
+                "       .pushsection .fixup,\"ax\"\n"           \
                 "       .align  2\n"                            \
                 "6:     mov     %0, #1\n"                       \
                 "       b       5b\n"                           \
-                "       .previous\n"                            \
-                "       .section __ex_table,\"a\"\n"            \
+                "       .popsection\n"                          \
+                "       .pushsection __ex_table,\"a\"\n"        \
                 "       .align  3\n"                            \
                 "       .long   1b, 6b\n"                       \
                 "       .long   2b, 6b\n"                       \
                 "       .long   3b, 6b\n"                       \
                 "       .long   4b, 6b\n"                       \
-                "       .previous\n"                            \
+                "       .popsection\n"                          \
                 : "=r" (err), "=&r" (v), "=&r" (a)              \
                 : "0" (err), "1" (v), "2" (a));                 \
                 if (err)                                        \
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 07334632d3e..21ad68ba22b 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -93,6 +93,15 @@ static inline void l2x0_flush_line(unsigned long addr)
 }
 #endif
 
+static void l2x0_cache_sync(void)
+{
+        unsigned long flags;
+
+        spin_lock_irqsave(&l2x0_lock, flags);
+        cache_sync();
+        spin_unlock_irqrestore(&l2x0_lock, flags);
+}
+
 static inline void l2x0_inv_all(void)
 {
         unsigned long flags;
@@ -225,6 +234,7 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
         outer_cache.inv_range = l2x0_inv_range;
         outer_cache.clean_range = l2x0_clean_range;
         outer_cache.flush_range = l2x0_flush_range;
+        outer_cache.sync = l2x0_cache_sync;
 
         printk(KERN_INFO "L2X0 cache controller enabled\n");
 }
diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c
index 8bca4dea6df..f55fa1044f7 100644
--- a/arch/arm/mm/copypage-v6.c
+++ b/arch/arm/mm/copypage-v6.c
@@ -41,14 +41,7 @@ static void v6_copy_user_highpage_nonaliasing(struct page *to,
         kfrom = kmap_atomic(from, KM_USER0);
         kto = kmap_atomic(to, KM_USER1);
         copy_page(kto, kfrom);
-#ifdef CONFIG_HIGHMEM
-        /*
-         * kmap_atomic() doesn't set the page virtual address, and
-         * kunmap_atomic() takes care of cache flushing already.
-         */
-        if (page_address(to) != NULL)
-#endif
-                __cpuc_flush_dcache_area(kto, PAGE_SIZE);
+        __cpuc_flush_dcache_area(kto, PAGE_SIZE);
         kunmap_atomic(kto, KM_USER1);
         kunmap_atomic(kfrom, KM_USER0);
 }
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 0da7eccf774..13fa536d82e 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -11,7 +11,7 @@
  */
 #include <linux/module.h>
 #include <linux/mm.h>
-#include <linux/slab.h>
+#include <linux/gfp.h>
 #include <linux/errno.h>
 #include <linux/list.h>
 #include <linux/init.h>
@@ -464,6 +464,11 @@ static void dma_cache_maint_page(struct page *page, unsigned long offset,
                                 vaddr += offset;
                                 op(vaddr, len, dir);
                                 kunmap_high(page);
+                        } else if (cache_is_vipt()) {
+                                pte_t saved_pte;
+                                vaddr = kmap_high_l1_vipt(page, &saved_pte);
+                                op(vaddr + offset, len, dir);
+                                kunmap_high_l1_vipt(page, saved_pte);
                         }
                 } else {
                         vaddr = page_address(page) + offset;
diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c
index c9b97e9836a..0d414c28eb2 100644
--- a/arch/arm/mm/fault-armv.c
+++ b/arch/arm/mm/fault-armv.c
@@ -16,6 +16,7 @@
 #include <linux/vmalloc.h>
 #include <linux/init.h>
 #include <linux/pagemap.h>
+#include <linux/gfp.h>
 
 #include <asm/bugs.h>
 #include <asm/cacheflush.h>
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index e34f095e209..c6844cb9b50 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -13,6 +13,7 @@
 
 #include <asm/cacheflush.h>
 #include <asm/cachetype.h>
+#include <asm/highmem.h>
 #include <asm/smp_plat.h>
 #include <asm/system.h>
 #include <asm/tlbflush.h>
@@ -152,21 +153,25 @@ void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
 
 void __flush_dcache_page(struct address_space *mapping, struct page *page)
 {
-        void *addr = page_address(page);
-
         /*
          * Writeback any data associated with the kernel mapping of this
          * page.  This ensures that data in the physical page is mutually
          * coherent with the kernels mapping.
          */
-#ifdef CONFIG_HIGHMEM
-        /*
-         * kmap_atomic() doesn't set the page virtual address, and
-         * kunmap_atomic() takes care of cache flushing already.
-         */
-        if (addr)
-#endif
-                __cpuc_flush_dcache_area(addr, PAGE_SIZE);
+        if (!PageHighMem(page)) {
+                __cpuc_flush_dcache_area(page_address(page), PAGE_SIZE);
+        } else {
+                void *addr = kmap_high_get(page);
+                if (addr) {
+                        __cpuc_flush_dcache_area(addr, PAGE_SIZE);
+                        kunmap_high(page);
+                } else if (cache_is_vipt()) {
+                        pte_t saved_pte;
+                        addr = kmap_high_l1_vipt(page, &saved_pte);
+                        __cpuc_flush_dcache_area(addr, PAGE_SIZE);
+                        kunmap_high_l1_vipt(page, saved_pte);
+                }
+        }
 
         /*
          * If this is a page cache page, and we have an aliasing VIPT cache,
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c
index 2be1ec7c1b4..77b030f5ec0 100644
--- a/arch/arm/mm/highmem.c
+++ b/arch/arm/mm/highmem.c
@@ -79,7 +79,8 @@ void kunmap_atomic(void *kvaddr, enum km_type type)
         unsigned int idx = type + KM_TYPE_NR * smp_processor_id();
 
         if (kvaddr >= (void *)FIXADDR_START) {
-                __cpuc_flush_dcache_area((void *)vaddr, PAGE_SIZE);
+                if (cache_is_vivt())
+                        __cpuc_flush_dcache_area((void *)vaddr, PAGE_SIZE);
 #ifdef CONFIG_DEBUG_HIGHMEM
                 BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx));
                 set_pte_ext(TOP_PTE(vaddr), __pte(0), 0);
@@ -124,3 +125,87 @@ struct page *kmap_atomic_to_page(const void *ptr)
         pte = TOP_PTE(vaddr);
         return pte_page(*pte);
 }
+
+#ifdef CONFIG_CPU_CACHE_VIPT
+
+#include <linux/percpu.h>
+
+/*
+ * The VIVT cache of a highmem page is always flushed before the page
+ * is unmapped. Hence unmapped highmem pages need no cache maintenance
+ * in that case.
+ *
+ * However unmapped pages may still be cached with a VIPT cache, and
+ * it is not possible to perform cache maintenance on them using physical
+ * addresses unfortunately.  So we have no choice but to set up a temporary
+ * virtual mapping for that purpose.
+ *
+ * Yet this VIPT cache maintenance may be triggered from DMA support
+ * functions which are possibly called from interrupt context. As we don't
+ * want to keep interrupt disabled all the time when such maintenance is
+ * taking place, we therefore allow for some reentrancy by preserving and
+ * restoring the previous fixmap entry before the interrupted context is
+ * resumed.  If the reentrancy depth is 0 then there is no need to restore
+ * the previous fixmap, and leaving the current one in place allow it to
+ * be reused the next time without a TLB flush (common with DMA).
+ */
+
+static DEFINE_PER_CPU(int, kmap_high_l1_vipt_depth);
+
+void *kmap_high_l1_vipt(struct page *page, pte_t *saved_pte)
+{
+        unsigned int idx, cpu = smp_processor_id();
+        int *depth = &per_cpu(kmap_high_l1_vipt_depth, cpu);
+        unsigned long vaddr, flags;
+        pte_t pte, *ptep;
+
+        idx = KM_L1_CACHE + KM_TYPE_NR * cpu;
+        vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
+        ptep = TOP_PTE(vaddr);
+        pte = mk_pte(page, kmap_prot);
+
+        if (!in_interrupt())
+                preempt_disable();
+
+        raw_local_irq_save(flags);
+        (*depth)++;
+        if (pte_val(*ptep) == pte_val(pte)) {
+                *saved_pte = pte;
+        } else {
+                *saved_pte = *ptep;
+                set_pte_ext(ptep, pte, 0);
+                local_flush_tlb_kernel_page(vaddr);
+        }
+        raw_local_irq_restore(flags);
+
+        return (void *)vaddr;
+}
+
+void kunmap_high_l1_vipt(struct page *page, pte_t saved_pte)
+{
+        unsigned int idx, cpu = smp_processor_id();
+        int *depth = &per_cpu(kmap_high_l1_vipt_depth, cpu);
+        unsigned long vaddr, flags;
+        pte_t pte, *ptep;
+
+        idx = KM_L1_CACHE + KM_TYPE_NR * cpu;
+        vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
+        ptep = TOP_PTE(vaddr);
+        pte = mk_pte(page, kmap_prot);
+
+        BUG_ON(pte_val(*ptep) != pte_val(pte));
+        BUG_ON(*depth <= 0);
+
+        raw_local_irq_save(flags);
+        (*depth)--;
+        if (*depth != 0 && pte_val(pte) != pte_val(saved_pte)) {
+                set_pte_ext(ptep, saved_pte, 0);
+                local_flush_tlb_kernel_page(vaddr);
+        }
+        raw_local_irq_restore(flags);
+
+        if (!in_interrupt())
+                preempt_enable();
+}
+
+#endif  /* CONFIG_CPU_CACHE_VIPT */
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 7829cb5425f..83db12a68d5 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -17,6 +17,7 @@
 #include <linux/initrd.h>
 #include <linux/sort.h>
 #include <linux/highmem.h>
+#include <linux/gfp.h>
 
 #include <asm/mach-types.h>
 #include <asm/sections.h>
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 9d4da6ac28e..241c24a1c18 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -420,6 +420,10 @@ static void __init build_mem_type_table(void)
                 user_pgprot |= L_PTE_SHARED;
                 kern_pgprot |= L_PTE_SHARED;
                 vecs_pgprot |= L_PTE_SHARED;
+                mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_S;
+                mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_SHARED;
+                mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_S;
+                mem_types[MT_DEVICE_CACHED].prot_pte |= L_PTE_SHARED;
                 mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
                 mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;
 #endif
@@ -1050,10 +1054,12 @@ void setup_mm_for_reboot(char mode)
         pgd_t *pgd;
         int i;
 
-        if (current->mm && current->mm->pgd)
-                pgd = current->mm->pgd;
-        else
-                pgd = init_mm.pgd;
+        /*
+         * We need to access to user-mode page tables here. For kernel threads
+         * we don't have any user-mode mappings so we use the context that we
+         * "borrowed".
+         */
+        pgd = current->active_mm->pgd;
 
         base_pmdval = PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | PMD_TYPE_SECT;
         if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())
diff --git a/arch/arm/mm/pgd.c b/arch/arm/mm/pgd.c
index 2690146161b..be5f58e153b 100644
--- a/arch/arm/mm/pgd.c
+++ b/arch/arm/mm/pgd.c
@@ -8,6 +8,7 @@
  * published by the Free Software Foundation.
  */
 #include <linux/mm.h>
+#include <linux/gfp.h>
 #include <linux/highmem.h>
 
 #include <asm/pgalloc.h>
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S
index ee7700242c1..5c47760c206 100644
--- a/arch/arm/mm/proc-sa1100.S
+++ b/arch/arm/mm/proc-sa1100.S
@@ -45,7 +45,7 @@ ENTRY(cpu_sa1100_proc_init)
         mcr     p15, 0, r0, c9, c0, 5           @ Allow read-buffer operations from userland
         mov     pc, lr
 
-        .previous
+        .section .text
 
 /*
  * cpu_sa1100_proc_fin()
diff --git a/arch/arm/nwfpe/entry.S b/arch/arm/nwfpe/entry.S
index 48bca0db460..cafa1835433 100644
--- a/arch/arm/nwfpe/entry.S
+++ b/arch/arm/nwfpe/entry.S
@@ -111,12 +111,12 @@ next:
         @ to fault.  Emit the appropriate exception gunk to fix things up.
         @ ??? For some reason, faults can happen at .Lx2 even with a
         @ plain LDR instruction.  Weird, but it seems harmless.
-        .section .fixup,"ax"
+        .pushsection .fixup,"ax"
         .align  2
 .Lfix:  mov     pc, r9                  @ let the user eat segfaults
-        .previous
+        .popsection
 
-        .section __ex_table,"a"
+        .pushsection __ex_table,"a"
         .align  3
         .long   .Lx1, .Lfix
-        .previous
+        .popsection
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index 8b0a1ee039f..7f7ad6f289b 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -9,38 +9,43 @@ choice
 config ARCH_MX1
         bool "MX1-based"
         select CPU_ARM920T
-        select COMMON_CLKDEV
+        select IMX_HAVE_IOMUX_V1
         help
           This enables support for systems based on the Freescale i.MX1 family
 
 config ARCH_MX2
         bool "MX2-based"
         select CPU_ARM926T
-        select COMMON_CLKDEV
+        select IMX_HAVE_IOMUX_V1
         help
           This enables support for systems based on the Freescale i.MX2 family
 
 config ARCH_MX25
         bool "MX25-based"
         select CPU_ARM926T
-        select COMMON_CLKDEV
+        select ARCH_MXC_IOMUX_V3
+        select HAVE_FB_IMX
         help
           This enables support for systems based on the Freescale i.MX25 family
 
 config ARCH_MX3
         bool "MX3-based"
         select CPU_V6
-        select COMMON_CLKDEV
         help
           This enables support for systems based on the Freescale i.MX3 family
 
 config ARCH_MXC91231
         bool "MXC91231-based"
         select CPU_V6
-        select COMMON_CLKDEV
         help
           This enables support for systems based on the Freescale MXC91231 family
 
+config ARCH_MX5
+        bool "MX5-based"
+        select CPU_V7
+        help
+          This enables support for systems based on the Freescale i.MX51 family
+
 endchoice
 
 source "arch/arm/mach-mx1/Kconfig"
@@ -48,12 +53,12 @@ source "arch/arm/mach-mx2/Kconfig"
 source "arch/arm/mach-mx3/Kconfig"
 source "arch/arm/mach-mx25/Kconfig"
 source "arch/arm/mach-mxc91231/Kconfig"
+source "arch/arm/mach-mx5/Kconfig"
 
 endmenu
 
 config MXC_IRQ_PRIOR
         bool "Use IRQ priority"
-        depends on ARCH_MXC
         help
           Select this if you want to use prioritized IRQ handling.
           This feature prevents higher priority ISR to be interrupted
@@ -62,9 +67,16 @@ config MXC_IRQ_PRIOR
           requirements for timing.
           Say N here, unless you have a specialized requirement.
 
+config MXC_TZIC
+        bool "Enable TrustZone Interrupt Controller"
+        depends on ARCH_MX51
+        help
+          This will be automatically selected for all processors
+          containing this interrupt controller.
+          Say N here only if you are really sure.
+
 config MXC_PWM
         tristate "Enable PWM driver"
-        depends on ARCH_MXC
         select HAVE_PWM
         help
           Enable support for the i.MX PWM controller(s).
@@ -74,7 +86,9 @@ config MXC_ULPI
 
 config ARCH_HAS_RNGA
         bool
-        depends on ARCH_MXC
+
+config IMX_HAVE_IOMUX_V1
+        bool
 
 config ARCH_MXC_IOMUX_V3
         bool
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
index 6cee38df58b..895bc3c5e0c 100644
--- a/arch/arm/plat-mxc/Makefile
+++ b/arch/arm/plat-mxc/Makefile
@@ -5,8 +5,12 @@
 # Common support
 obj-y := irq.o clock.o gpio.o time.o devices.o cpu.o system.o
 
-obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o
-obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o
+# MX51 uses the TZIC interrupt controller, older platforms use AVIC (irq.o)
+obj-$(CONFIG_MXC_TZIC) += tzic.o
+
+obj-$(CONFIG_ARCH_MX1) += dma-mx1-mx2.o
+obj-$(CONFIG_ARCH_MX2) += dma-mx1-mx2.o
+obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o
 obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o
 obj-$(CONFIG_MXC_PWM)  += pwm.o
 obj-$(CONFIG_USB_EHCI_MXC) += ehci.o
diff --git a/arch/arm/plat-mxc/audmux-v1.c b/arch/arm/plat-mxc/audmux-v1.c
index da6387dcdf2..b62917ca3f9 100644
--- a/arch/arm/plat-mxc/audmux-v1.c
+++ b/arch/arm/plat-mxc/audmux-v1.c
@@ -50,8 +50,18 @@ EXPORT_SYMBOL_GPL(mxc_audmux_v1_configure_port);
 
 static int mxc_audmux_v1_init(void)
 {
-        if (cpu_is_mx27() || cpu_is_mx21())
-                audmux_base = IO_ADDRESS(AUDMUX_BASE_ADDR);
+#ifdef CONFIG_MACH_MX21
+        if (cpu_is_mx21())
+                audmux_base = MX21_IO_ADDRESS(MX21_AUDMUX_BASE_ADDR);
+        else
+#endif
+#ifdef CONFIG_MACH_MX27
+        if (cpu_is_mx27())
+                audmux_base = MX27_IO_ADDRESS(MX27_AUDMUX_BASE_ADDR);
+        else
+#endif
+                (void)0;
+        
         return 0;
 }
 
diff --git a/arch/arm/plat-mxc/audmux-v2.c b/arch/arm/plat-mxc/audmux-v2.c
index b06954a8443..0c2cc5cd4d8 100644
--- a/arch/arm/plat-mxc/audmux-v2.c
+++ b/arch/arm/plat-mxc/audmux-v2.c
@@ -24,6 +24,7 @@
 #include <linux/io.h>
 #include <linux/clk.h>
 #include <linux/debugfs.h>
+#include <linux/slab.h>
 #include <mach/audmux.h>
 #include <mach/hardware.h>
 
@@ -190,7 +191,10 @@ static int mxc_audmux_v2_init(void)
 {
         int ret;
 
-        if (cpu_is_mx35()) {
+        if (cpu_is_mx31())
+                audmux_base = MX31_IO_ADDRESS(MX31_AUDMUX_BASE_ADDR);
+
+        else if (cpu_is_mx35()) {
                 audmux_clk = clk_get(NULL, "audmux");
                 if (IS_ERR(audmux_clk)) {
                         ret = PTR_ERR(audmux_clk);
@@ -198,11 +202,9 @@ static int mxc_audmux_v2_init(void)
                                         ret);
                         return ret;
                 }
+                audmux_base = MX35_IO_ADDRESS(MX35_AUDMUX_BASE_ADDR);
         }
 
-        if (cpu_is_mx31() || cpu_is_mx35())
-                audmux_base = IO_ADDRESS(AUDMUX_BASE_ADDR);
-
         audmux_debugfs_init();
 
         return 0;
diff --git a/arch/arm/plat-mxc/clock.c b/arch/arm/plat-mxc/clock.c
index 9e8fbd57495..323ff8ccc87 100644
--- a/arch/arm/plat-mxc/clock.c
+++ b/arch/arm/plat-mxc/clock.c
@@ -56,6 +56,7 @@ static void __clk_disable(struct clk *clk)
         __clk_disable(clk->parent);
         __clk_disable(clk->secondary);
 
+        WARN_ON(!clk->usecount);
         if (!(--clk->usecount) && clk->disable)
                 clk->disable(clk);
 }
diff --git a/arch/arm/plat-mxc/dma-mx1-mx2.c b/arch/arm/plat-mxc/dma-mx1-mx2.c
index 9c1b3f9c4f4..e16014b0d13 100644
--- a/arch/arm/plat-mxc/dma-mx1-mx2.c
+++ b/arch/arm/plat-mxc/dma-mx1-mx2.c
@@ -128,6 +128,18 @@ struct imx_dma_channel {
         int hw_chaining;
 };
 
+static void __iomem *imx_dmav1_baseaddr;
+
+static void imx_dmav1_writel(unsigned val, unsigned offset)
+{
+        __raw_writel(val, imx_dmav1_baseaddr + offset);
+}
+
+static unsigned imx_dmav1_readl(unsigned offset)
+{
+        return __raw_readl(imx_dmav1_baseaddr + offset);
+}
+
 static struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS];
 
 static struct clk *dma_clk;
@@ -140,7 +152,6 @@ static int imx_dma_hw_chain(struct imx_dma_channel *imxdma)
                 return 0;
 }
 
-
 /*
  * imx_dma_sg_next - prepare next chunk for scatter-gather DMA emulation
  */
@@ -160,17 +171,17 @@ static inline int imx_dma_sg_next(int channel, struct scatterlist *sg)
                 imxdma->resbytes -= now;
 
         if ((imxdma->dma_mode & DMA_MODE_MASK) == DMA_MODE_READ)
-                __raw_writel(sg->dma_address, DMA_BASE + DMA_DAR(channel));
+                imx_dmav1_writel(sg->dma_address, DMA_DAR(channel));
         else
-                __raw_writel(sg->dma_address, DMA_BASE + DMA_SAR(channel));
+                imx_dmav1_writel(sg->dma_address, DMA_SAR(channel));
 
-        __raw_writel(now, DMA_BASE + DMA_CNTR(channel));
+        imx_dmav1_writel(now, DMA_CNTR(channel));
 
         pr_debug("imxdma%d: next sg chunk dst 0x%08x, src 0x%08x, "
                 "size 0x%08x\n", channel,
-                 __raw_readl(DMA_BASE + DMA_DAR(channel)),
-                 __raw_readl(DMA_BASE + DMA_SAR(channel)),
-                 __raw_readl(DMA_BASE + DMA_CNTR(channel)));
+                 imx_dmav1_readl(DMA_DAR(channel)),
+                 imx_dmav1_readl(DMA_SAR(channel)),
+                 imx_dmav1_readl(DMA_CNTR(channel)));
 
         return now;
 }
@@ -218,27 +229,26 @@ imx_dma_setup_single(int channel, dma_addr_t dma_address,
                         channel, __func__, (unsigned int)dma_address,
                         dma_length, dev_addr);
 
-                __raw_writel(dev_addr, DMA_BASE + DMA_SAR(channel));
-                __raw_writel(dma_address, DMA_BASE + DMA_DAR(channel));
-                __raw_writel(imxdma->ccr_from_device,
-                                DMA_BASE + DMA_CCR(channel));
+                imx_dmav1_writel(dev_addr, DMA_SAR(channel));
+                imx_dmav1_writel(dma_address, DMA_DAR(channel));
+                imx_dmav1_writel(imxdma->ccr_from_device, DMA_CCR(channel));
         } else if ((dmamode & DMA_MODE_MASK) == DMA_MODE_WRITE) {
                 pr_debug("imxdma%d: %s dma_addressg=0x%08x dma_length=%d "
                         "dev_addr=0x%08x for write\n",
                         channel, __func__, (unsigned int)dma_address,
                         dma_length, dev_addr);
 
-                __raw_writel(dma_address, DMA_BASE + DMA_SAR(channel));
-                __raw_writel(dev_addr, DMA_BASE + DMA_DAR(channel));
-                __raw_writel(imxdma->ccr_to_device,
-                                DMA_BASE + DMA_CCR(channel));
+                imx_dmav1_writel(dma_address, DMA_SAR(channel));
+                imx_dmav1_writel(dev_addr, DMA_DAR(channel));
+                imx_dmav1_writel(imxdma->ccr_to_device,
+                                DMA_CCR(channel));
         } else {
                 printk(KERN_ERR "imxdma%d: imx_dma_setup_single bad dmamode\n",
                        channel);
                 return -EINVAL;
         }
 
-        __raw_writel(dma_length, DMA_BASE + DMA_CNTR(channel));
+        imx_dmav1_writel(dma_length, DMA_CNTR(channel));
 
         return 0;
 }
@@ -316,17 +326,15 @@ imx_dma_setup_sg(int channel,
                         "dev_addr=0x%08x for read\n",
                         channel, __func__, sg, sgcount, dma_length, dev_addr);
 
-                __raw_writel(dev_addr, DMA_BASE + DMA_SAR(channel));
-                __raw_writel(imxdma->ccr_from_device,
-                                DMA_BASE + DMA_CCR(channel));
+                imx_dmav1_writel(dev_addr, DMA_SAR(channel));
+                imx_dmav1_writel(imxdma->ccr_from_device, DMA_CCR(channel));
         } else if ((dmamode & DMA_MODE_MASK) == DMA_MODE_WRITE) {
                 pr_debug("imxdma%d: %s sg=%p sgcount=%d total length=%d "
                         "dev_addr=0x%08x for write\n",
                         channel, __func__, sg, sgcount, dma_length, dev_addr);
 
-                __raw_writel(dev_addr, DMA_BASE + DMA_DAR(channel));
-                __raw_writel(imxdma->ccr_to_device,
-                                DMA_BASE + DMA_CCR(channel));
+                imx_dmav1_writel(dev_addr, DMA_DAR(channel));
+                imx_dmav1_writel(imxdma->ccr_to_device, DMA_CCR(channel));
         } else {
                 printk(KERN_ERR "imxdma%d: imx_dma_setup_sg bad dmamode\n",
                        channel);
@@ -360,7 +368,7 @@ imx_dma_config_channel(int channel, unsigned int config_port,
         imxdma->ccr_from_device = config_port | (config_mem << 2) | dreq;
         imxdma->ccr_to_device = config_mem | (config_port << 2) | dreq;
 
-        __raw_writel(dmareq, DMA_BASE + DMA_RSSR(channel));
+        imx_dmav1_writel(dmareq, DMA_RSSR(channel));
 
         return 0;
 }
@@ -368,7 +376,7 @@ EXPORT_SYMBOL(imx_dma_config_channel);
 
 void imx_dma_config_burstlen(int channel, unsigned int burstlen)
 {
-        __raw_writel(burstlen, DMA_BASE + DMA_BLR(channel));
+        imx_dmav1_writel(burstlen, DMA_BLR(channel));
 }
 EXPORT_SYMBOL(imx_dma_config_burstlen);
 
@@ -398,7 +406,7 @@ imx_dma_setup_handlers(int channel,
         }
 
         local_irq_save(flags);
-        __raw_writel(1 << channel, DMA_BASE + DMA_DISR);
+        imx_dmav1_writel(1 << channel, DMA_DISR);
         imxdma->irq_handler = irq_handler;
         imxdma->err_handler = err_handler;
         imxdma->data = data;
@@ -462,22 +470,21 @@ void imx_dma_enable(int channel)
 
         local_irq_save(flags);
 
-        __raw_writel(1 << channel, DMA_BASE + DMA_DISR);
-        __raw_writel(__raw_readl(DMA_BASE + DMA_DIMR) & ~(1 << channel),
-                DMA_BASE + DMA_DIMR);
-        __raw_writel(__raw_readl(DMA_BASE + DMA_CCR(channel)) | CCR_CEN |
-                CCR_ACRPT,
-                DMA_BASE + DMA_CCR(channel));
+        imx_dmav1_writel(1 << channel, DMA_DISR);
+        imx_dmav1_writel(imx_dmav1_readl(DMA_DIMR) & ~(1 << channel), DMA_DIMR);
+        imx_dmav1_writel(imx_dmav1_readl(DMA_CCR(channel)) | CCR_CEN |
+                CCR_ACRPT, DMA_CCR(channel));
 
 #ifdef CONFIG_ARCH_MX2
-        if (imxdma->sg && imx_dma_hw_chain(imxdma)) {
+        if ((cpu_is_mx21() || cpu_is_mx27()) &&
+                        imxdma->sg && imx_dma_hw_chain(imxdma)) {
                 imxdma->sg = sg_next(imxdma->sg);
                 if (imxdma->sg) {
                         u32 tmp;
                         imx_dma_sg_next(channel, imxdma->sg);
-                        tmp = __raw_readl(DMA_BASE + DMA_CCR(channel));
-                        __raw_writel(tmp | CCR_RPT | CCR_ACRPT,
-                                DMA_BASE + DMA_CCR(channel));
+                        tmp = imx_dmav1_readl(DMA_CCR(channel));
+                        imx_dmav1_writel(tmp | CCR_RPT | CCR_ACRPT,
+                                DMA_CCR(channel));
                 }
         }
 #endif
@@ -502,11 +509,10 @@ void imx_dma_disable(int channel)
                 del_timer(&imxdma->watchdog);
 
         local_irq_save(flags);
-        __raw_writel(__raw_readl(DMA_BASE + DMA_DIMR) | (1 << channel),
-                DMA_BASE + DMA_DIMR);
-        __raw_writel(__raw_readl(DMA_BASE + DMA_CCR(channel)) & ~CCR_CEN,
-                DMA_BASE + DMA_CCR(channel));
-        __raw_writel(1 << channel, DMA_BASE + DMA_DISR);
+        imx_dmav1_writel(imx_dmav1_readl(DMA_DIMR) | (1 << channel), DMA_DIMR);
+        imx_dmav1_writel(imx_dmav1_readl(DMA_CCR(channel)) & ~CCR_CEN,
+                        DMA_CCR(channel));
+        imx_dmav1_writel(1 << channel, DMA_DISR);
         imxdma->in_use = 0;
         local_irq_restore(flags);
 }
@@ -517,7 +523,7 @@ static void imx_dma_watchdog(unsigned long chno)
 {
         struct imx_dma_channel *imxdma = &imx_dma_channels[chno];
 
-        __raw_writel(0, DMA_BASE + DMA_CCR(chno));
+        imx_dmav1_writel(0, DMA_CCR(chno));
         imxdma->in_use = 0;
         imxdma->sg = NULL;
 
@@ -533,17 +539,17 @@ static irqreturn_t dma_err_handler(int irq, void *dev_id)
         unsigned int err_mask;
         int errcode;
 
-        disr = __raw_readl(DMA_BASE + DMA_DISR);
+        disr = imx_dmav1_readl(DMA_DISR);
 
-        err_mask = __raw_readl(DMA_BASE + DMA_DBTOSR) |
-                   __raw_readl(DMA_BASE + DMA_DRTOSR) |
-                   __raw_readl(DMA_BASE + DMA_DSESR)  |
-                   __raw_readl(DMA_BASE + DMA_DBOSR);
+        err_mask = imx_dmav1_readl(DMA_DBTOSR) |
+                   imx_dmav1_readl(DMA_DRTOSR) |
+                   imx_dmav1_readl(DMA_DSESR)  |
+                   imx_dmav1_readl(DMA_DBOSR);
 
         if (!err_mask)
                 return IRQ_HANDLED;
 
-        __raw_writel(disr & err_mask, DMA_BASE + DMA_DISR);
+        imx_dmav1_writel(disr & err_mask, DMA_DISR);
 
         for (i = 0; i < IMX_DMA_CHANNELS; i++) {
                 if (!(err_mask & (1 << i)))
@@ -551,20 +557,20 @@ static irqreturn_t dma_err_handler(int irq, void *dev_id)
                 imxdma = &imx_dma_channels[i];
                 errcode = 0;
 
-                if (__raw_readl(DMA_BASE + DMA_DBTOSR) & (1 << i)) {
-                        __raw_writel(1 << i, DMA_BASE + DMA_DBTOSR);
+                if (imx_dmav1_readl(DMA_DBTOSR) & (1 << i)) {
+                        imx_dmav1_writel(1 << i, DMA_DBTOSR);
                         errcode |= IMX_DMA_ERR_BURST;
                 }
-                if (__raw_readl(DMA_BASE + DMA_DRTOSR) & (1 << i)) {
-                        __raw_writel(1 << i, DMA_BASE + DMA_DRTOSR);
+                if (imx_dmav1_readl(DMA_DRTOSR) & (1 << i)) {
+                        imx_dmav1_writel(1 << i, DMA_DRTOSR);
                         errcode |= IMX_DMA_ERR_REQUEST;
                 }
-                if (__raw_readl(DMA_BASE + DMA_DSESR) & (1 << i)) {
-                        __raw_writel(1 << i, DMA_BASE + DMA_DSESR);
+                if (imx_dmav1_readl(DMA_DSESR) & (1 << i)) {
+                        imx_dmav1_writel(1 << i, DMA_DSESR);
                         errcode |= IMX_DMA_ERR_TRANSFER;
                 }
-                if (__raw_readl(DMA_BASE + DMA_DBOSR) & (1 << i)) {
-                        __raw_writel(1 << i, DMA_BASE + DMA_DBOSR);
+                if (imx_dmav1_readl(DMA_DBOSR) & (1 << i)) {
+                        imx_dmav1_writel(1 << i, DMA_DBOSR);
                         errcode |= IMX_DMA_ERR_BUFFER;
                 }
                 if (imxdma->name && imxdma->err_handler) {
@@ -607,7 +613,7 @@ static void dma_irq_handle_channel(int chno)
                 if (imxdma->sg) {
                         imx_dma_sg_next(chno, imxdma->sg);
 
-                        tmp = __raw_readl(DMA_BASE + DMA_CCR(chno));
+                        tmp = imx_dmav1_readl(DMA_CCR(chno));
 
                         if (imx_dma_hw_chain(imxdma)) {
                                 /* FIXME: The timeout should probably be
@@ -617,15 +623,13 @@ static void dma_irq_handle_channel(int chno)
                                         jiffies + msecs_to_jiffies(500));
 
                                 tmp |= CCR_CEN | CCR_RPT | CCR_ACRPT;
-                                __raw_writel(tmp, DMA_BASE +
-                                                DMA_CCR(chno));
+                                imx_dmav1_writel(tmp, DMA_CCR(chno));
                         } else {
-                                __raw_writel(tmp & ~CCR_CEN, DMA_BASE +
-                                                DMA_CCR(chno));
+                                imx_dmav1_writel(tmp & ~CCR_CEN, DMA_CCR(chno));
                                 tmp |= CCR_CEN;
                         }
 
-                        __raw_writel(tmp, DMA_BASE + DMA_CCR(chno));
+                        imx_dmav1_writel(tmp, DMA_CCR(chno));
 
                         if (imxdma->prog_handler)
                                 imxdma->prog_handler(chno, imxdma->data,
@@ -640,7 +644,7 @@ static void dma_irq_handle_channel(int chno)
                 }
         }
 
-        __raw_writel(0, DMA_BASE + DMA_CCR(chno));
+        imx_dmav1_writel(0, DMA_CCR(chno));
         imxdma->in_use = 0;
         if (imxdma->irq_handler)
                 imxdma->irq_handler(chno, imxdma->data);
@@ -651,15 +655,16 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id)
         int i, disr;
 
 #ifdef CONFIG_ARCH_MX2
-        dma_err_handler(irq, dev_id);
+        if (cpu_is_mx21() || cpu_is_mx27())
+                dma_err_handler(irq, dev_id);
 #endif
 
-        disr = __raw_readl(DMA_BASE + DMA_DISR);
+        disr = imx_dmav1_readl(DMA_DISR);
 
         pr_debug("imxdma: dma_irq_handler called, disr=0x%08x\n",
                      disr);
 
-        __raw_writel(disr, DMA_BASE + DMA_DISR);
+        imx_dmav1_writel(disr, DMA_DISR);
         for (i = 0; i < IMX_DMA_CHANNELS; i++) {
                 if (disr & (1 << i))
                         dma_irq_handle_channel(i);
@@ -699,17 +704,19 @@ int imx_dma_request(int channel, const char *name)
         local_irq_restore(flags); /* request_irq() can block */
 
 #ifdef CONFIG_ARCH_MX2
-        ret = request_irq(MXC_INT_DMACH0 + channel, dma_irq_handler, 0, "DMA",
-                        NULL);
-        if (ret) {
-                imxdma->name = NULL;
-                printk(KERN_CRIT "Can't register IRQ %d for DMA channel %d\n",
-                                MXC_INT_DMACH0 + channel, channel);
-                return ret;
+        if (cpu_is_mx21() || cpu_is_mx27()) {
+                ret = request_irq(MX2x_INT_DMACH0 + channel,
+                                dma_irq_handler, 0, "DMA", NULL);
+                if (ret) {
+                        imxdma->name = NULL;
+                        pr_crit("Can't register IRQ %d for DMA channel %d\n",
+                                        MX2x_INT_DMACH0 + channel, channel);
+                        return ret;
+                }
+                init_timer(&imxdma->watchdog);
+                imxdma->watchdog.function = &imx_dma_watchdog;
+                imxdma->watchdog.data = channel;
         }
-        init_timer(&imxdma->watchdog);
-        imxdma->watchdog.function = &imx_dma_watchdog;
-        imxdma->watchdog.data = channel;
 #endif
 
         return ret;
@@ -738,7 +745,8 @@ void imx_dma_free(int channel)
         imxdma->name = NULL;
 
 #ifdef CONFIG_ARCH_MX2
-        free_irq(MXC_INT_DMACH0 + channel, NULL);
+        if (cpu_is_mx21() || cpu_is_mx27())
+                free_irq(MX2x_INT_DMACH0 + channel, NULL);
 #endif
 
         local_irq_restore(flags);
@@ -796,34 +804,53 @@ static int __init imx_dma_init(void)
         int ret = 0;
         int i;
 
+#ifdef CONFIG_ARCH_MX1
+        if (cpu_is_mx1())
+                imx_dmav1_baseaddr = MX1_IO_ADDRESS(MX1_DMA_BASE_ADDR);
+        else
+#endif
+#ifdef CONFIG_MACH_MX21
+        if (cpu_is_mx21())
+                imx_dmav1_baseaddr = MX21_IO_ADDRESS(MX21_DMA_BASE_ADDR);
+        else
+#endif
+#ifdef CONFIG_MACH_MX27
+        if (cpu_is_mx27())
+                imx_dmav1_baseaddr = MX27_IO_ADDRESS(MX27_DMA_BASE_ADDR);
+        else
+#endif
+                BUG();
+
         dma_clk = clk_get(NULL, "dma");
         clk_enable(dma_clk);
 
         /* reset DMA module */
-        __raw_writel(DCR_DRST, DMA_BASE + DMA_DCR);
+        imx_dmav1_writel(DCR_DRST, DMA_DCR);
 
 #ifdef CONFIG_ARCH_MX1
-        ret = request_irq(DMA_INT, dma_irq_handler, 0, "DMA", NULL);
-        if (ret) {
-                printk(KERN_CRIT "Wow!  Can't register IRQ for DMA\n");
-                return ret;
-        }
+        if (cpu_is_mx1()) {
+                ret = request_irq(MX1_DMA_INT, dma_irq_handler, 0, "DMA", NULL);
+                if (ret) {
+                        pr_crit("Wow!  Can't register IRQ for DMA\n");
+                        return ret;
+                }
 
-        ret = request_irq(DMA_ERR, dma_err_handler, 0, "DMA", NULL);
-        if (ret) {
-                printk(KERN_CRIT "Wow!  Can't register ERRIRQ for DMA\n");
-                free_irq(DMA_INT, NULL);
-                return ret;
+                ret = request_irq(MX1_DMA_ERR, dma_err_handler, 0, "DMA", NULL);
+                if (ret) {
+                        pr_crit("Wow!  Can't register ERRIRQ for DMA\n");
+                        free_irq(MX1_DMA_INT, NULL);
+                        return ret;
+                }
         }
 #endif
         /* enable DMA module */
-        __raw_writel(DCR_DEN, DMA_BASE + DMA_DCR);
+        imx_dmav1_writel(DCR_DEN, DMA_DCR);
 
         /* clear all interrupts */
-        __raw_writel((1 << IMX_DMA_CHANNELS) - 1, DMA_BASE + DMA_DISR);
+        imx_dmav1_writel((1 << IMX_DMA_CHANNELS) - 1, DMA_DISR);
 
         /* disable interrupts */
-        __raw_writel((1 << IMX_DMA_CHANNELS) - 1, DMA_BASE + DMA_DIMR);
+        imx_dmav1_writel((1 << IMX_DMA_CHANNELS) - 1, DMA_DIMR);
 
         for (i = 0; i < IMX_DMA_CHANNELS; i++) {
                 imx_dma_channels[i].sg = NULL;
diff --git a/arch/arm/plat-mxc/ehci.c b/arch/arm/plat-mxc/ehci.c
index 41599be882e..cb0b6387448 100644
--- a/arch/arm/plat-mxc/ehci.c
+++ b/arch/arm/plat-mxc/ehci.c
@@ -25,25 +25,37 @@
 #define USBCTRL_OTGBASE_OFFSET  0x600
 
 #define MX31_OTG_SIC_SHIFT      29
-#define MX31_OTG_SIC_MASK       (0xf << MX31_OTG_SIC_SHIFT)
+#define MX31_OTG_SIC_MASK       (0x3 << MX31_OTG_SIC_SHIFT)
 #define MX31_OTG_PM_BIT         (1 << 24)
 
 #define MX31_H2_SIC_SHIFT       21
-#define MX31_H2_SIC_MASK        (0xf << MX31_H2_SIC_SHIFT)
+#define MX31_H2_SIC_MASK        (0x3 << MX31_H2_SIC_SHIFT)
 #define MX31_H2_PM_BIT          (1 << 16)
 #define MX31_H2_DT_BIT          (1 << 5)
 
 #define MX31_H1_SIC_SHIFT       13
-#define MX31_H1_SIC_MASK        (0xf << MX31_H1_SIC_SHIFT)
+#define MX31_H1_SIC_MASK        (0x3 << MX31_H1_SIC_SHIFT)
 #define MX31_H1_PM_BIT          (1 << 8)
 #define MX31_H1_DT_BIT          (1 << 4)
 
+#define MX35_OTG_SIC_SHIFT      29
+#define MX35_OTG_SIC_MASK       (0x3 << MX35_OTG_SIC_SHIFT)
+#define MX35_OTG_PM_BIT         (1 << 24)
+
+#define MX35_H1_SIC_SHIFT       21
+#define MX35_H1_SIC_MASK        (0x3 << MX35_H1_SIC_SHIFT)
+#define MX35_H1_PM_BIT          (1 << 8)
+#define MX35_H1_IPPUE_UP_BIT    (1 << 7)
+#define MX35_H1_IPPUE_DOWN_BIT  (1 << 6)
+#define MX35_H1_TLL_BIT         (1 << 5)
+#define MX35_H1_USBTE_BIT       (1 << 4)
+
 int mxc_set_usbcontrol(int port, unsigned int flags)
 {
         unsigned int v;
-
+#ifdef CONFIG_ARCH_MX3
         if (cpu_is_mx31()) {
-                v = readl(IO_ADDRESS(MX31_OTG_BASE_ADDR +
+                v = readl(MX31_IO_ADDRESS(MX31_OTG_BASE_ADDR +
                                      USBCTRL_OTGBASE_OFFSET));
 
                 switch (port) {
@@ -51,15 +63,15 @@ int mxc_set_usbcontrol(int port, unsigned int flags)
                         v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
                         v |= (flags & MXC_EHCI_INTERFACE_MASK)
                                         << MX31_OTG_SIC_SHIFT;
-                        if (flags & MXC_EHCI_POWER_PINS_ENABLED)
+                        if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
                                 v |= MX31_OTG_PM_BIT;
 
                         break;
                 case 1: /* H1 port */
-                        v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT);
+                        v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT | MX31_H1_DT_BIT);
                         v |= (flags & MXC_EHCI_INTERFACE_MASK)
                                                 << MX31_H1_SIC_SHIFT;
-                        if (flags & MXC_EHCI_POWER_PINS_ENABLED)
+                        if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
                                 v |= MX31_H1_PM_BIT;
 
                         if (!(flags & MXC_EHCI_TTL_ENABLED))
@@ -67,7 +79,7 @@ int mxc_set_usbcontrol(int port, unsigned int flags)
 
                         break;
                 case 2: /* H2 port */
-                        v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT);
+                        v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT | MX31_H2_DT_BIT);
                         v |= (flags & MXC_EHCI_INTERFACE_MASK)
                                                 << MX31_H2_SIC_SHIFT;
                         if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
@@ -77,13 +89,103 @@ int mxc_set_usbcontrol(int port, unsigned int flags)
                                 v |= MX31_H2_DT_BIT;
 
                         break;
+                default:
+                        return -EINVAL;
                 }
 
-                writel(v, IO_ADDRESS(MX31_OTG_BASE_ADDR +
+                writel(v, MX31_IO_ADDRESS(MX31_OTG_BASE_ADDR +
                                      USBCTRL_OTGBASE_OFFSET));
                 return 0;
         }
 
+        if (cpu_is_mx35()) {
+                v = readl(MX35_IO_ADDRESS(MX35_OTG_BASE_ADDR +
+                                     USBCTRL_OTGBASE_OFFSET));
+
+                switch (port) {
+                case 0: /* OTG port */
+                        v &= ~(MX35_OTG_SIC_MASK | MX35_OTG_PM_BIT);
+                        v |= (flags & MXC_EHCI_INTERFACE_MASK)
+                                        << MX35_OTG_SIC_SHIFT;
+                        if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
+                                v |= MX35_OTG_PM_BIT;
+
+                        break;
+                case 1: /* H1 port */
+                        v &= ~(MX35_H1_SIC_MASK | MX35_H1_PM_BIT | MX35_H1_TLL_BIT |
+                                MX35_H1_USBTE_BIT | MX35_H1_IPPUE_DOWN_BIT | MX35_H1_IPPUE_UP_BIT);
+                        v |= (flags & MXC_EHCI_INTERFACE_MASK)
+                                                << MX35_H1_SIC_SHIFT;
+                        if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
+                                v |= MX35_H1_PM_BIT;
+
+                        if (!(flags & MXC_EHCI_TTL_ENABLED))
+                                v |= MX35_H1_TLL_BIT;
+
+                        if (flags & MXC_EHCI_INTERNAL_PHY)
+                                v |= MX35_H1_USBTE_BIT;
+
+                        if (flags & MXC_EHCI_IPPUE_DOWN)
+                                v |= MX35_H1_IPPUE_DOWN_BIT;
+
+                        if (flags & MXC_EHCI_IPPUE_UP)
+                                v |= MX35_H1_IPPUE_UP_BIT;
+
+                        break;
+                default:
+                        return -EINVAL;
+                }
+
+                writel(v, MX35_IO_ADDRESS(MX35_OTG_BASE_ADDR +
+                                     USBCTRL_OTGBASE_OFFSET));
+                return 0;
+        }
+#endif /* CONFIG_ARCH_MX3 */
+#ifdef CONFIG_MACH_MX27
+        if (cpu_is_mx27()) {
+                /* On i.MX27 we can use the i.MX31 USBCTRL bits, they
+                 * are identical
+                 */
+                v = readl(MX27_IO_ADDRESS(MX27_OTG_BASE_ADDR +
+                                     USBCTRL_OTGBASE_OFFSET));
+                switch (port) {
+                case 0: /* OTG port */
+                        v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
+                        v |= (flags & MXC_EHCI_INTERFACE_MASK)
+                                        << MX31_OTG_SIC_SHIFT;
+                        if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
+                                v |= MX31_OTG_PM_BIT;
+                        break;
+                case 1: /* H1 port */
+                        v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT | MX31_H1_DT_BIT);
+                        v |= (flags & MXC_EHCI_INTERFACE_MASK)
+                                                << MX31_H1_SIC_SHIFT;
+                        if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
+                                v |= MX31_H1_PM_BIT;
+
+                        if (!(flags & MXC_EHCI_TTL_ENABLED))
+                                v |= MX31_H1_DT_BIT;
+
+                        break;
+                case 2: /* H2 port */
+                        v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT | MX31_H2_DT_BIT);
+                        v |= (flags & MXC_EHCI_INTERFACE_MASK)
+                                                << MX31_H2_SIC_SHIFT;
+                        if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
+                                v |= MX31_H2_PM_BIT;
+
+                        if (!(flags & MXC_EHCI_TTL_ENABLED))
+                                v |= MX31_H2_DT_BIT;
+
+                        break;
+                default:
+                        return -EINVAL;
+                }
+                writel(v, MX27_IO_ADDRESS(MX27_OTG_BASE_ADDR +
+                                     USBCTRL_OTGBASE_OFFSET));
+                return 0;
+        }
+#endif /* CONFIG_MACH_MX27 */
         printk(KERN_WARNING
                 "%s() unable to setup USBCONTROL for this CPU\n", __func__);
         return -EINVAL;
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c
index d65ebe303b9..70b23893f09 100644
--- a/arch/arm/plat-mxc/gpio.c
+++ b/arch/arm/plat-mxc/gpio.c
@@ -140,16 +140,13 @@ static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio)
         val = __raw_readl(reg);
         edge = (val >> (bit << 1)) & 3;
         val &= ~(0x3 << (bit << 1));
-        switch (edge) {
-        case GPIO_INT_HIGH_LEV:
+        if (edge == GPIO_INT_HIGH_LEV) {
                 edge = GPIO_INT_LOW_LEV;
                 pr_debug("mxc: switch GPIO %d to low trigger\n", gpio);
-                break;
-        case GPIO_INT_LOW_LEV:
+        } else if (edge == GPIO_INT_LOW_LEV) {
                 edge = GPIO_INT_HIGH_LEV;
                 pr_debug("mxc: switch GPIO %d to high trigger\n", gpio);
-                break;
-        default:
+        } else {
                 pr_err("mxc: invalid configuration for GPIO %d: %x\n",
                        gpio, edge);
                 return;
@@ -157,25 +154,20 @@ static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio)
         __raw_writel(val | (edge << (bit << 1)), reg);
 }
 
-/* handle n interrupts in one status register */
+/* handle 32 interrupts in one status register */
 static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat)
 {
-        u32 gpio_irq_no;
+        u32 gpio_irq_no_base = port->virtual_irq_start;
 
-        gpio_irq_no = port->virtual_irq_start;
-        for (; irq_stat != 0; irq_stat >>= 1, gpio_irq_no++) {
-                u32 gpio = irq_to_gpio(gpio_irq_no);
-
-                if ((irq_stat & 1) == 0)
-                        continue;
+        while (irq_stat != 0) {
+                int irqoffset = fls(irq_stat) - 1;
 
-                BUG_ON(!(irq_desc[gpio_irq_no].handle_irq));
+                if (port->both_edges & (1 << irqoffset))
+                        mxc_flip_edge(port, irqoffset);
 
-                if (port->both_edges & (1 << (gpio & 31)))
-                        mxc_flip_edge(port, gpio);
+                generic_handle_irq(gpio_irq_no_base + irqoffset);
 
-                irq_desc[gpio_irq_no].handle_irq(gpio_irq_no,
-                                &irq_desc[gpio_irq_no]);
+                irq_stat &= ~(1 << irqoffset);
         }
 }
 
diff --git a/arch/arm/plat-mxc/include/mach/board-kzmarm11.h b/arch/arm/plat-mxc/include/mach/board-kzmarm11.h
index 05ff2f31ef1..93cc66f104c 100644
--- a/arch/arm/plat-mxc/include/mach/board-kzmarm11.h
+++ b/arch/arm/plat-mxc/include/mach/board-kzmarm11.h
@@ -21,19 +21,19 @@
 /*
  *  KZM-ARM11-01 Board Control Registers on FPGA
  */
-#define KZM_ARM11_CTL1          (CS4_BASE_ADDR + 0x1000)
-#define KZM_ARM11_CTL2          (CS4_BASE_ADDR + 0x1001)
-#define KZM_ARM11_RSW1          (CS4_BASE_ADDR + 0x1002)
-#define KZM_ARM11_BACK_LIGHT    (CS4_BASE_ADDR + 0x1004)
-#define KZM_ARM11_FPGA_REV      (CS4_BASE_ADDR + 0x1008)
-#define KZM_ARM11_7SEG_LED      (CS4_BASE_ADDR + 0x1010)
-#define KZM_ARM11_LEDS          (CS4_BASE_ADDR + 0x1020)
-#define KZM_ARM11_DIPSW2        (CS4_BASE_ADDR + 0x1003)
+#define KZM_ARM11_CTL1          (MX31_CS4_BASE_ADDR + 0x1000)
+#define KZM_ARM11_CTL2          (MX31_CS4_BASE_ADDR + 0x1001)
+#define KZM_ARM11_RSW1          (MX31_CS4_BASE_ADDR + 0x1002)
+#define KZM_ARM11_BACK_LIGHT    (MX31_CS4_BASE_ADDR + 0x1004)
+#define KZM_ARM11_FPGA_REV      (MX31_CS4_BASE_ADDR + 0x1008)
+#define KZM_ARM11_7SEG_LED      (MX31_CS4_BASE_ADDR + 0x1010)
+#define KZM_ARM11_LEDS          (MX31_CS4_BASE_ADDR + 0x1020)
+#define KZM_ARM11_DIPSW2        (MX31_CS4_BASE_ADDR + 0x1003)
 
 /*
  * External UART for touch panel on FPGA
  */
-#define KZM_ARM11_16550         (CS4_BASE_ADDR + 0x1050)
+#define KZM_ARM11_16550         (MX31_CS4_BASE_ADDR + 0x1050)
 
 #endif /* __ARM_ARCH_BOARD_KZM_ARM11_H */
 
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31pdk.h b/arch/arm/plat-mxc/include/mach/board-mx31_3ds.h
index 2bbd6ed17f5..da92933a233 100644
--- a/arch/arm/plat-mxc/include/mach/board-mx31pdk.h
+++ b/arch/arm/plat-mxc/include/mach/board-mx31_3ds.h
@@ -8,8 +8,8 @@
  * published by the Free Software Foundation.
  */
 
-#ifndef __ASM_ARCH_MXC_BOARD_MX31PDK_H__
-#define __ASM_ARCH_MXC_BOARD_MX31PDK_H__
+#ifndef __ASM_ARCH_MXC_BOARD_MX31_3DS_H__
+#define __ASM_ARCH_MXC_BOARD_MX31_3DS_H__
 
 /* Definitions for components on the Debug board */
 
@@ -56,4 +56,4 @@
 
 #define MXC_MAX_EXP_IO_LINES    16
 
-#endif /* __ASM_ARCH_MXC_BOARD_MX31PDK_H__ */
+#endif /* __ASM_ARCH_MXC_BOARD_MX31_3DS_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31ads.h b/arch/arm/plat-mxc/include/mach/board-mx31ads.h
index 2cbfa35e82f..095a199591c 100644
--- a/arch/arm/plat-mxc/include/mach/board-mx31ads.h
+++ b/arch/arm/plat-mxc/include/mach/board-mx31ads.h
@@ -14,7 +14,7 @@
 #include <mach/hardware.h>
 
 /* Base address of PBC controller */
-#define PBC_BASE_ADDRESS        IO_ADDRESS(CS4_BASE_ADDR)
+#define PBC_BASE_ADDRESS        MX31_CS4_BASE_ADDR_VIRT
 /* Offsets for the PBC Controller register */
 
 /* PBC Board status register offset */
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h b/arch/arm/plat-mxc/include/mach/board-mx31moboard.h
index d5be6b5a6ac..fc5fec9b55f 100644
--- a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h
+++ b/arch/arm/plat-mxc/include/mach/board-mx31moboard.h
@@ -25,6 +25,7 @@ enum mx31moboard_boards {
         MX31NOBOARD     = 0,
         MX31DEVBOARD    = 1,
         MX31MARXBOT     = 2,
+        MX31SMARTBOT    = 3,
 };
 
 /*
@@ -34,6 +35,7 @@ enum mx31moboard_boards {
 
 extern void mx31moboard_devboard_init(void);
 extern void mx31moboard_marxbot_init(void);
+extern void mx31moboard_smartbot_init(void);
 
 #endif
 
diff --git a/arch/arm/plat-mxc/include/mach/clock.h b/arch/arm/plat-mxc/include/mach/clock.h
index 43a82d0c534..753a5988d85 100644
--- a/arch/arm/plat-mxc/include/mach/clock.h
+++ b/arch/arm/plat-mxc/include/mach/clock.h
@@ -26,13 +26,6 @@
 struct module;
 
 struct clk {
-#ifndef CONFIG_COMMON_CLKDEV
-        /* As soon as i.MX1 and i.MX31 switched to clkdev, this
-         * block can go away */
-        struct list_head node;
-        struct module *owner;
-        const char *name;
-#endif
         int id;
         /* Source clock this clk depends on */
         struct clk *parent;
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 4bf1068ffad..2941472582d 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -20,14 +20,17 @@ extern void mx25_map_io(void);
 extern void mx27_map_io(void);
 extern void mx31_map_io(void);
 extern void mx35_map_io(void);
+extern void mx51_map_io(void);
 extern void mxc91231_map_io(void);
 extern void mxc_init_irq(void __iomem *);
+extern void tzic_init_irq(void __iomem *);
 extern void mx1_init_irq(void);
 extern void mx21_init_irq(void);
 extern void mx25_init_irq(void);
 extern void mx27_init_irq(void);
 extern void mx31_init_irq(void);
 extern void mx35_init_irq(void);
+extern void mx51_init_irq(void);
 extern void mxc91231_init_irq(void);
 extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int);
 extern int mx1_clocks_init(unsigned long fref);
@@ -36,6 +39,8 @@ extern int mx25_clocks_init(void);
 extern int mx27_clocks_init(unsigned long fref);
 extern int mx31_clocks_init(unsigned long fref);
 extern int mx35_clocks_init(void);
+extern int mx51_clocks_init(unsigned long ckil, unsigned long osc,
+                        unsigned long ckih1, unsigned long ckih2);
 extern int mxc91231_clocks_init(unsigned long fref);
 extern int mxc_register_gpios(void);
 extern int mxc_register_device(struct platform_device *pdev, void *data);
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S
index 5a6ae1b9e1e..0b6e11eaeb8 100644
--- a/arch/arm/plat-mxc/include/mach/debug-macro.S
+++ b/arch/arm/plat-mxc/include/mach/debug-macro.S
@@ -10,6 +10,7 @@
  * published by the Free Software Foundation.
  *
  */
+#define IMX_NEEDS_DEPRECATED_SYMBOLS
 
 #ifdef CONFIG_ARCH_MX1
 #include <mach/mx1.h>
@@ -44,13 +45,22 @@
 #define UART_VADDR      AIPS1_IO_ADDRESS(UART1_BASE_ADDR)
 #endif
 
+#ifdef CONFIG_ARCH_MX5
+#ifdef UART_PADDR
+#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
+#endif
+#include <mach/mx51.h>
+#define UART_PADDR      MX51_UART1_BASE_ADDR
+#define UART_VADDR      MX51_AIPS1_IO_ADDRESS(MX51_UART1_BASE_ADDR)
+#endif
+
 #ifdef CONFIG_ARCH_MXC91231
 #ifdef UART_PADDR
 #error "CONFIG_DEBUG_LL is incompatible with multiple archs"
 #endif
 #include <mach/mxc91231.h>
 #define UART_PADDR      MXC91231_UART2_BASE_ADDR
-#define UART_VADDR      MXC91231_AIPS1_IO_ADDRESS(MXC91231_UART2_BASE_ADDR)
+#define UART_VADDR      MXC91231_IO_ADDRESS(MXC91231_UART2_BASE_ADDR)
 #endif
                 .macro  addruart, rx, tmp
                 mrc     p15, 0, \rx, c1, c0
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S
index 7cf290efe76..aeb08697726 100644
--- a/arch/arm/plat-mxc/include/mach/entry-macro.S
+++ b/arch/arm/plat-mxc/include/mach/entry-macro.S
@@ -1,6 +1,6 @@
 /*
  *  Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org>
- *  Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
+ *  Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
  */
 
 /*
@@ -18,11 +18,16 @@
         .endm
 
         .macro  get_irqnr_preamble, base, tmp
+#ifndef CONFIG_MXC_TZIC
         ldr     \base, =avic_base
         ldr     \base, [\base]
 #ifdef CONFIG_MXC_IRQ_PRIOR
         ldr     r4, [\base, #AVIC_NIMASK]
 #endif
+#elif defined CONFIG_MXC_TZIC
+        ldr     \base, =tzic_base
+        ldr     \base, [\base]
+#endif /* CONFIG_MXC_TZIC */
         .endm
 
         .macro  arch_ret_to_user, tmp1, tmp2
@@ -32,6 +37,7 @@
         @ and returns its number in irqnr
         @ and returns if an interrupt occured in irqstat
         .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+#ifndef CONFIG_MXC_TZIC
         @ Load offset & priority of the highest priority
         @ interrupt pending from AVIC_NIVECSR
         ldr     \irqstat, [\base, #0x40]
@@ -45,6 +51,32 @@
         strne   \tmp, [\base, #AVIC_NIMASK]
         streq   r4, [\base, #AVIC_NIMASK]
 #endif
+#elif defined CONFIG_MXC_TZIC
+        @ Load offset & priority of the highest priority
+        @ interrupt pending.
+        @ 0xD80 is HIPND0 register
+        mov     \irqnr, #0
+        mov     \irqstat, #0x0D80
+1000:
+        ldr     \tmp,   [\irqstat, \base]
+        cmp     \tmp, #0
+        bne     1001f
+        addeq   \irqnr, \irqnr, #32
+        addeq   \irqstat, \irqstat, #4
+        cmp     \irqnr, #128
+        blo     1000b
+        b       2001f
+1001:   mov     \irqstat, #1
+1002:   tst     \tmp, \irqstat
+        bne     2002f
+        movs    \tmp, \tmp, lsr #1
+        addne   \irqnr, \irqnr, #1
+        bne     1002b
+2001:
+        mov  \irqnr, #0
+2002:
+        movs \irqnr, \irqnr
+#endif
         .endm
 
         @ irq priority table (not used)
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
index 78db75475f6..ebadf4ac43f 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/plat-mxc/include/mach/hardware.h
@@ -22,6 +22,15 @@
 
 #include <asm/sizes.h>
 
+#define IMX_IO_ADDRESS(addr, module)                                    \
+        ((void __force __iomem *)                                       \
+         (((unsigned long)((addr) - (module ## _BASE_ADDR)) < module ## _SIZE) ?\
+         (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0))
+
+#ifdef CONFIG_ARCH_MX5
+#include <mach/mx51.h>
+#endif
+
 #ifdef CONFIG_ARCH_MX3
 #include <mach/mx3x.h>
 #include <mach/mx31.h>
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx1.h b/arch/arm/plat-mxc/include/mach/iomux-mx1.h
index bf23305c19c..6b1507cf378 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx1.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx1.h
@@ -1,166 +1,155 @@
 /*
-* Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License
-* as published by the Free Software Foundation; either version 2
-* of the License, or (at your option) any later version.
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
-* MA 02110-1301, USA.
-*/
+ * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+#ifndef __MACH_IOMUX_MX1_H__
+#define __MACH_IOMUX_MX1_H__
 
-#ifndef _MXC_IOMUX_MX1_H
-#define _MXC_IOMUX_MX1_H
+#include <mach/iomux-v1.h>
 
-#ifndef GPIO_PORTA
-#error Please include mach/iomux.h
-#endif
+#define PA0_AIN_SPI2_CLK        (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0)
+#define PA0_AF_ETMTRACESYNC     (GPIO_PORTA | GPIO_AF | 0)
+#define PA1_AOUT_SPI2_RXD       (GPIO_PORTA | GPIO_AOUT | GPIO_IN | 1)
+#define PA1_PF_TIN              (GPIO_PORTA | GPIO_PF | 1)
+#define PA2_PF_PWM0             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 2)
+#define PA3_PF_CSI_MCLK         (GPIO_PORTA | GPIO_PF | 3)
+#define PA4_PF_CSI_D0           (GPIO_PORTA | GPIO_PF | 4)
+#define PA5_PF_CSI_D1           (GPIO_PORTA | GPIO_PF | 5)
+#define PA6_PF_CSI_D2           (GPIO_PORTA | GPIO_PF | 6)
+#define PA7_PF_CSI_D3           (GPIO_PORTA | GPIO_PF | 7)
+#define PA8_PF_CSI_D4           (GPIO_PORTA | GPIO_PF | 8)
+#define PA9_PF_CSI_D5           (GPIO_PORTA | GPIO_PF | 9)
+#define PA10_PF_CSI_D6          (GPIO_PORTA | GPIO_PF | 10)
+#define PA11_PF_CSI_D7          (GPIO_PORTA | GPIO_PF | 11)
+#define PA12_PF_CSI_VSYNC       (GPIO_PORTA | GPIO_PF | 12)
+#define PA13_PF_CSI_HSYNC       (GPIO_PORTA | GPIO_PF | 13)
+#define PA14_PF_CSI_PIXCLK      (GPIO_PORTA | GPIO_PF | 14)
+#define PA15_PF_I2C_SDA         (GPIO_PORTA | GPIO_PF | GPIO_OUT | 15)
+#define PA16_PF_I2C_SCL         (GPIO_PORTA | GPIO_PF | GPIO_OUT | 16)
+#define PA17_AF_ETMTRACEPKT4    (GPIO_PORTA | GPIO_AF | 17)
+#define PA17_AIN_SPI2_SS        (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 17)
+#define PA18_AF_ETMTRACEPKT5    (GPIO_PORTA | GPIO_AF | 18)
+#define PA19_AF_ETMTRACEPKT6    (GPIO_PORTA | GPIO_AF | 19)
+#define PA20_AF_ETMTRACEPKT7    (GPIO_PORTA | GPIO_AF | 20)
+#define PA21_PF_A0              (GPIO_PORTA | GPIO_PF | 21)
+#define PA22_PF_CS4             (GPIO_PORTA | GPIO_PF | 22)
+#define PA23_PF_CS5             (GPIO_PORTA | GPIO_PF | 23)
+#define PA24_PF_A16             (GPIO_PORTA | GPIO_PF | 24)
+#define PA24_AF_ETMTRACEPKT0    (GPIO_PORTA | GPIO_AF | 24)
+#define PA25_PF_A17             (GPIO_PORTA | GPIO_PF | 25)
+#define PA25_AF_ETMTRACEPKT1    (GPIO_PORTA | GPIO_AF | 25)
+#define PA26_PF_A18             (GPIO_PORTA | GPIO_PF | 26)
+#define PA26_AF_ETMTRACEPKT2    (GPIO_PORTA | GPIO_AF | 26)
+#define PA27_PF_A19             (GPIO_PORTA | GPIO_PF | 27)
+#define PA27_AF_ETMTRACEPKT3    (GPIO_PORTA | GPIO_AF | 27)
+#define PA28_PF_A20             (GPIO_PORTA | GPIO_PF | 28)
+#define PA28_AF_ETMPIPESTAT0    (GPIO_PORTA | GPIO_AF | 28)
+#define PA29_PF_A21             (GPIO_PORTA | GPIO_PF | 29)
+#define PA29_AF_ETMPIPESTAT1    (GPIO_PORTA | GPIO_AF | 29)
+#define PA30_PF_A22             (GPIO_PORTA | GPIO_PF | 30)
+#define PA30_AF_ETMPIPESTAT2    (GPIO_PORTA | GPIO_AF | 30)
+#define PA31_PF_A23             (GPIO_PORTA | GPIO_PF | 31)
+#define PA31_AF_ETMTRACECLK     (GPIO_PORTA | GPIO_AF | 31)
+#define PB8_PF_SD_DAT0          (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 8)
+#define PB8_AF_MS_PIO           (GPIO_PORTB | GPIO_AF | 8)
+#define PB9_PF_SD_DAT1          (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 9)
+#define PB9_AF_MS_PI1           (GPIO_PORTB | GPIO_AF | 9)
+#define PB10_PF_SD_DAT2         (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 10)
+#define PB10_AF_MS_SCLKI        (GPIO_PORTB | GPIO_AF | 10)
+#define PB11_PF_SD_DAT3         (GPIO_PORTB | GPIO_PF | 11)
+#define PB11_AF_MS_SDIO         (GPIO_PORTB | GPIO_AF | 11)
+#define PB12_PF_SD_CLK          (GPIO_PORTB | GPIO_PF | 12)
+#define PB12_AF_MS_SCLK0        (GPIO_PORTB | GPIO_AF | 12)
+#define PB13_PF_SD_CMD          (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 13)
+#define PB13_AF_MS_BS           (GPIO_PORTB | GPIO_AF | 13)
+#define PB14_AF_SSI_RXFS        (GPIO_PORTB | GPIO_AF | 14)
+#define PB15_AF_SSI_RXCLK       (GPIO_PORTB | GPIO_AF | 15)
+#define PB16_AF_SSI_RXDAT       (GPIO_PORTB | GPIO_AF | GPIO_IN | 16)
+#define PB17_AF_SSI_TXDAT       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 17)
+#define PB18_AF_SSI_TXFS        (GPIO_PORTB | GPIO_AF | 18)
+#define PB19_AF_SSI_TXCLK       (GPIO_PORTB | GPIO_AF | 19)
+#define PB20_PF_USBD_AFE        (GPIO_PORTB | GPIO_PF | 20)
+#define PB21_PF_USBD_OE         (GPIO_PORTB | GPIO_PF | 21)
+#define PB22_PF_USBD_RCV        (GPIO_PORTB | GPIO_PF | 22)
+#define PB23_PF_USBD_SUSPND     (GPIO_PORTB | GPIO_PF | 23)
+#define PB24_PF_USBD_VP         (GPIO_PORTB | GPIO_PF | 24)
+#define PB25_PF_USBD_VM         (GPIO_PORTB | GPIO_PF | 25)
+#define PB26_PF_USBD_VPO        (GPIO_PORTB | GPIO_PF | 26)
+#define PB27_PF_USBD_VMO        (GPIO_PORTB | GPIO_PF | 27)
+#define PB28_PF_UART2_CTS       (GPIO_PORTB | GPIO_PF | GPIO_OUT | 28)
+#define PB29_PF_UART2_RTS       (GPIO_PORTB | GPIO_PF | GPIO_IN | 29)
+#define PB30_PF_UART2_TXD       (GPIO_PORTB | GPIO_PF | GPIO_OUT | 30)
+#define PB31_PF_UART2_RXD       (GPIO_PORTB | GPIO_PF | GPIO_IN | 31)
+#define PC3_PF_SSI_RXFS         (GPIO_PORTC | GPIO_PF | 3)
+#define PC4_PF_SSI_RXCLK        (GPIO_PORTC | GPIO_PF | 4)
+#define PC5_PF_SSI_RXDAT        (GPIO_PORTC | GPIO_PF | GPIO_IN | 5)
+#define PC6_PF_SSI_TXDAT        (GPIO_PORTC | GPIO_PF | GPIO_OUT | 6)
+#define PC7_PF_SSI_TXFS         (GPIO_PORTC | GPIO_PF | 7)
+#define PC8_PF_SSI_TXCLK        (GPIO_PORTC | GPIO_PF | 8)
+#define PC9_PF_UART1_CTS        (GPIO_PORTC | GPIO_PF | GPIO_OUT | 9)
+#define PC10_PF_UART1_RTS       (GPIO_PORTC | GPIO_PF | GPIO_IN | 10)
+#define PC11_PF_UART1_TXD       (GPIO_PORTC | GPIO_PF | GPIO_OUT | 11)
+#define PC12_PF_UART1_RXD       (GPIO_PORTC | GPIO_PF | GPIO_IN | 12)
+#define PC13_PF_SPI1_SPI_RDY    (GPIO_PORTC | GPIO_PF | 13)
+#define PC14_PF_SPI1_SCLK       (GPIO_PORTC | GPIO_PF | 14)
+#define PC15_PF_SPI1_SS         (GPIO_PORTC | GPIO_PF | 15)
+#define PC16_PF_SPI1_MISO       (GPIO_PORTC | GPIO_PF | 16)
+#define PC17_PF_SPI1_MOSI       (GPIO_PORTC | GPIO_PF | 17)
+#define PC24_BIN_UART3_RI       (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 24)
+#define PC25_BIN_UART3_DSR      (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 25)
+#define PC26_AOUT_UART3_DTR     (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 26)
+#define PC27_BIN_UART3_DCD      (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 27)
+#define PC28_BIN_UART3_CTS      (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 28)
+#define PC29_AOUT_UART3_RTS     (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 29)
+#define PC30_BIN_UART3_TX       (GPIO_PORTC | GPIO_BIN | 30)
+#define PC31_AOUT_UART3_RX      (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 31)
+#define PD6_PF_LSCLK            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 6)
+#define PD7_PF_REV              (GPIO_PORTD | GPIO_PF | 7)
+#define PD7_AF_UART2_DTR        (GPIO_PORTD | GPIO_AF | GPIO_IN | 7)
+#define PD7_AIN_SPI2_SCLK       (GPIO_PORTD | GPIO_AIN | 7)
+#define PD8_PF_CLS              (GPIO_PORTD | GPIO_PF | 8)
+#define PD8_AF_UART2_DCD        (GPIO_PORTD | GPIO_AF | GPIO_OUT | 8)
+#define PD8_AIN_SPI2_SS         (GPIO_PORTD | GPIO_AIN | 8)
+#define PD9_PF_PS               (GPIO_PORTD | GPIO_PF | 9)
+#define PD9_AF_UART2_RI         (GPIO_PORTD | GPIO_AF | GPIO_OUT | 9)
+#define PD9_AOUT_SPI2_RXD       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 9)
+#define PD10_PF_SPL_SPR         (GPIO_PORTD | GPIO_PF | GPIO_OUT | 10)
+#define PD10_AF_UART2_DSR       (GPIO_PORTD | GPIO_AF | GPIO_OUT | 10)
+#define PD10_AIN_SPI2_TXD       (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 10)
+#define PD11_PF_CONTRAST        (GPIO_PORTD | GPIO_PF | GPIO_OUT | 11)
+#define PD12_PF_ACD_OE          (GPIO_PORTD | GPIO_PF | GPIO_OUT | 12)
+#define PD13_PF_LP_HSYNC        (GPIO_PORTD | GPIO_PF | GPIO_OUT | 13)
+#define PD14_PF_FLM_VSYNC       (GPIO_PORTD | GPIO_PF | GPIO_OUT | 14)
+#define PD15_PF_LD0             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 15)
+#define PD16_PF_LD1             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 16)
+#define PD17_PF_LD2             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17)
+#define PD18_PF_LD3             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18)
+#define PD19_PF_LD4             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 19)
+#define PD20_PF_LD5             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 20)
+#define PD21_PF_LD6             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 21)
+#define PD22_PF_LD7             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 22)
+#define PD23_PF_LD8             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 23)
+#define PD24_PF_LD9             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 24)
+#define PD25_PF_LD10            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25)
+#define PD26_PF_LD11            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26)
+#define PD27_PF_LD12            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27)
+#define PD28_PF_LD13            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 28)
+#define PD29_PF_LD14            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 29)
+#define PD30_PF_LD15            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 30)
+#define PD31_PF_TMR2OUT         (GPIO_PORTD | GPIO_PF | 31)
+#define PD31_BIN_SPI2_TXD       (GPIO_PORTD | GPIO_BIN | 31)
 
-/* FIXME: This list is not completed. The correct directions are
-* missing on some (many) pins
-*/
-
-
-/* Primary GPIO pin functions */
-
-#define PA0_AIN_SPI2_CLK        (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0)
-#define PA0_AF_ETMTRACESYNC     (GPIO_PORTA | GPIO_AF | 0)
-#define PA1_AOUT_SPI2_RXD       (GPIO_PORTA | GPIO_AOUT | GPIO_IN | 1)
-#define PA1_PF_TIN              (GPIO_PORTA | GPIO_PF | 1)
-#define PA2_PF_PWM0             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 2)
-#define PA3_PF_CSI_MCLK         (GPIO_PORTA | GPIO_PF | 3)
-#define PA4_PF_CSI_D0           (GPIO_PORTA | GPIO_PF | 4)
-#define PA5_PF_CSI_D1           (GPIO_PORTA | GPIO_PF | 5)
-#define PA6_PF_CSI_D2           (GPIO_PORTA | GPIO_PF | 6)
-#define PA7_PF_CSI_D3           (GPIO_PORTA | GPIO_PF | 7)
-#define PA8_PF_CSI_D4           (GPIO_PORTA | GPIO_PF | 8)
-#define PA9_PF_CSI_D5           (GPIO_PORTA | GPIO_PF | 9)
-#define PA10_PF_CSI_D6          (GPIO_PORTA | GPIO_PF | 10)
-#define PA11_PF_CSI_D7          (GPIO_PORTA | GPIO_PF | 11)
-#define PA12_PF_CSI_VSYNC       (GPIO_PORTA | GPIO_PF | 12)
-#define PA13_PF_CSI_HSYNC       (GPIO_PORTA | GPIO_PF | 13)
-#define PA14_PF_CSI_PIXCLK      (GPIO_PORTA | GPIO_PF | 14)
-#define PA15_PF_I2C_SDA         (GPIO_PORTA | GPIO_PF | GPIO_OUT | 15)
-#define PA16_PF_I2C_SCL         (GPIO_PORTA | GPIO_PF | GPIO_OUT | 16)
-#define PA17_AF_ETMTRACEPKT4    (GPIO_PORTA | GPIO_AF | 17)
-#define PA17_AIN_SPI2_SS        (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 17)
-#define PA18_AF_ETMTRACEPKT5    (GPIO_PORTA | GPIO_AF | 18)
-#define PA19_AF_ETMTRACEPKT6    (GPIO_PORTA | GPIO_AF | 19)
-#define PA20_AF_ETMTRACEPKT7    (GPIO_PORTA | GPIO_AF | 20)
-#define PA21_PF_A0              (GPIO_PORTA | GPIO_PF | 21)
-#define PA22_PF_CS4             (GPIO_PORTA | GPIO_PF | 22)
-#define PA23_PF_CS5             (GPIO_PORTA | GPIO_PF | 23)
-#define PA24_PF_A16             (GPIO_PORTA | GPIO_PF | 24)
-#define PA24_AF_ETMTRACEPKT0    (GPIO_PORTA | GPIO_AF | 24)
-#define PA25_PF_A17             (GPIO_PORTA | GPIO_PF | 25)
-#define PA25_AF_ETMTRACEPKT1    (GPIO_PORTA | GPIO_AF | 25)
-#define PA26_PF_A18             (GPIO_PORTA | GPIO_PF | 26)
-#define PA26_AF_ETMTRACEPKT2    (GPIO_PORTA | GPIO_AF | 26)
-#define PA27_PF_A19             (GPIO_PORTA | GPIO_PF | 27)
-#define PA27_AF_ETMTRACEPKT3    (GPIO_PORTA | GPIO_AF | 27)
-#define PA28_PF_A20             (GPIO_PORTA | GPIO_PF | 28)
-#define PA28_AF_ETMPIPESTAT0    (GPIO_PORTA | GPIO_AF | 28)
-#define PA29_PF_A21             (GPIO_PORTA | GPIO_PF | 29)
-#define PA29_AF_ETMPIPESTAT1    (GPIO_PORTA | GPIO_AF | 29)
-#define PA30_PF_A22             (GPIO_PORTA | GPIO_PF | 30)
-#define PA30_AF_ETMPIPESTAT2    (GPIO_PORTA | GPIO_AF | 30)
-#define PA31_PF_A23             (GPIO_PORTA | GPIO_PF | 31)
-#define PA31_AF_ETMTRACECLK     (GPIO_PORTA | GPIO_AF | 31)
-#define PB8_PF_SD_DAT0          (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 8)
-#define PB8_AF_MS_PIO           (GPIO_PORTB | GPIO_AF | 8)
-#define PB9_PF_SD_DAT1          (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 9)
-#define PB9_AF_MS_PI1           (GPIO_PORTB | GPIO_AF | 9)
-#define PB10_PF_SD_DAT2         (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 10)
-#define PB10_AF_MS_SCLKI        (GPIO_PORTB | GPIO_AF | 10)
-#define PB11_PF_SD_DAT3         (GPIO_PORTB | GPIO_PF | 11)
-#define PB11_AF_MS_SDIO         (GPIO_PORTB | GPIO_AF | 11)
-#define PB12_PF_SD_CLK          (GPIO_PORTB | GPIO_PF | 12)
-#define PB12_AF_MS_SCLK0        (GPIO_PORTB | GPIO_AF | 12)
-#define PB13_PF_SD_CMD          (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 13)
-#define PB13_AF_MS_BS           (GPIO_PORTB | GPIO_AF | 13)
-#define PB14_AF_SSI_RXFS        (GPIO_PORTB | GPIO_AF | 14)
-#define PB15_AF_SSI_RXCLK       (GPIO_PORTB | GPIO_AF | 15)
-#define PB16_AF_SSI_RXDAT       (GPIO_PORTB | GPIO_AF | GPIO_IN | 16)
-#define PB17_AF_SSI_TXDAT       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 17)
-#define PB18_AF_SSI_TXFS        (GPIO_PORTB | GPIO_AF | 18)
-#define PB19_AF_SSI_TXCLK       (GPIO_PORTB | GPIO_AF | 19)
-#define PB20_PF_USBD_AFE        (GPIO_PORTB | GPIO_PF | 20)
-#define PB21_PF_USBD_OE         (GPIO_PORTB | GPIO_PF | 21)
-#define PB22_PF_USBD_RCV        (GPIO_PORTB | GPIO_PF | 22)
-#define PB23_PF_USBD_SUSPND     (GPIO_PORTB | GPIO_PF | 23)
-#define PB24_PF_USBD_VP         (GPIO_PORTB | GPIO_PF | 24)
-#define PB25_PF_USBD_VM         (GPIO_PORTB | GPIO_PF | 25)
-#define PB26_PF_USBD_VPO        (GPIO_PORTB | GPIO_PF | 26)
-#define PB27_PF_USBD_VMO        (GPIO_PORTB | GPIO_PF | 27)
-#define PB28_PF_UART2_CTS       (GPIO_PORTB | GPIO_PF | GPIO_OUT | 28)
-#define PB29_PF_UART2_RTS       (GPIO_PORTB | GPIO_PF | GPIO_IN | 29)
-#define PB30_PF_UART2_TXD       (GPIO_PORTB | GPIO_PF | GPIO_OUT | 30)
-#define PB31_PF_UART2_RXD       (GPIO_PORTB | GPIO_PF | GPIO_IN | 31)
-#define PC3_PF_SSI_RXFS         (GPIO_PORTC | GPIO_PF | 3)
-#define PC4_PF_SSI_RXCLK        (GPIO_PORTC | GPIO_PF | 4)
-#define PC5_PF_SSI_RXDAT        (GPIO_PORTC | GPIO_PF | GPIO_IN | 5)
-#define PC6_PF_SSI_TXDAT        (GPIO_PORTC | GPIO_PF | GPIO_OUT | 6)
-#define PC7_PF_SSI_TXFS         (GPIO_PORTC | GPIO_PF | 7)
-#define PC8_PF_SSI_TXCLK        (GPIO_PORTC | GPIO_PF | 8)
-#define PC9_PF_UART1_CTS        (GPIO_PORTC | GPIO_PF | GPIO_OUT | 9)
-#define PC10_PF_UART1_RTS       (GPIO_PORTC | GPIO_PF | GPIO_IN | 10)
-#define PC11_PF_UART1_TXD       (GPIO_PORTC | GPIO_PF | GPIO_OUT | 11)
-#define PC12_PF_UART1_RXD       (GPIO_PORTC | GPIO_PF | GPIO_IN | 12)
-#define PC13_PF_SPI1_SPI_RDY    (GPIO_PORTC | GPIO_PF | 13)
-#define PC14_PF_SPI1_SCLK       (GPIO_PORTC | GPIO_PF | 14)
-#define PC15_PF_SPI1_SS         (GPIO_PORTC | GPIO_PF | 15)
-#define PC16_PF_SPI1_MISO       (GPIO_PORTC | GPIO_PF | 16)
-#define PC17_PF_SPI1_MOSI       (GPIO_PORTC | GPIO_PF | 17)
-#define PC24_BIN_UART3_RI       (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 24)
-#define PC25_BIN_UART3_DSR      (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 25)
-#define PC26_AOUT_UART3_DTR     (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 26)
-#define PC27_BIN_UART3_DCD      (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 27)
-#define PC28_BIN_UART3_CTS      (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 28)
-#define PC29_AOUT_UART3_RTS     (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 29)
-#define PC30_BIN_UART3_TX       (GPIO_PORTC | GPIO_BIN | 30)
-#define PC31_AOUT_UART3_RX      (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 31)
-#define PD6_PF_LSCLK            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 6)
-#define PD7_PF_REV              (GPIO_PORTD | GPIO_PF | 7)
-#define PD7_AF_UART2_DTR        (GPIO_PORTD | GPIO_AF | GPIO_IN | 7)
-#define PD7_AIN_SPI2_SCLK       (GPIO_PORTD | GPIO_AIN | 7)
-#define PD8_PF_CLS              (GPIO_PORTD | GPIO_PF | 8)
-#define PD8_AF_UART2_DCD        (GPIO_PORTD | GPIO_AF | GPIO_OUT | 8)
-#define PD8_AIN_SPI2_SS         (GPIO_PORTD | GPIO_AIN | 8)
-#define PD9_PF_PS               (GPIO_PORTD | GPIO_PF | 9)
-#define PD9_AF_UART2_RI         (GPIO_PORTD | GPIO_AF | GPIO_OUT | 9)
-#define PD9_AOUT_SPI2_RXD       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 9)
-#define PD10_PF_SPL_SPR         (GPIO_PORTD | GPIO_PF | GPIO_OUT | 10)
-#define PD10_AF_UART2_DSR       (GPIO_PORTD | GPIO_AF | GPIO_OUT | 10)
-#define PD10_AIN_SPI2_TXD       (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 10)
-#define PD11_PF_CONTRAST        (GPIO_PORTD | GPIO_PF | GPIO_OUT | 11)
-#define PD12_PF_ACD_OE          (GPIO_PORTD | GPIO_PF | GPIO_OUT | 12)
-#define PD13_PF_LP_HSYNC        (GPIO_PORTD | GPIO_PF | GPIO_OUT | 13)
-#define PD14_PF_FLM_VSYNC       (GPIO_PORTD | GPIO_PF | GPIO_OUT | 14)
-#define PD15_PF_LD0             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 15)
-#define PD16_PF_LD1             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 16)
-#define PD17_PF_LD2             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17)
-#define PD18_PF_LD3             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18)
-#define PD19_PF_LD4             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 19)
-#define PD20_PF_LD5             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 20)
-#define PD21_PF_LD6             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 21)
-#define PD22_PF_LD7             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 22)
-#define PD23_PF_LD8             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 23)
-#define PD24_PF_LD9             (GPIO_PORTD | GPIO_PF | GPIO_OUT | 24)
-#define PD25_PF_LD10            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25)
-#define PD26_PF_LD11            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26)
-#define PD27_PF_LD12            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27)
-#define PD28_PF_LD13            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 28)
-#define PD29_PF_LD14            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 29)
-#define PD30_PF_LD15            (GPIO_PORTD | GPIO_PF | GPIO_OUT | 30)
-#define PD31_PF_TMR2OUT         (GPIO_PORTD | GPIO_PF | 31)
-#define PD31_BIN_SPI2_TXD       (GPIO_PORTD | GPIO_BIN | 31)
-
-
-#endif
+#endif /* ifndef __MACH_IOMUX_MX1_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx21.h b/arch/arm/plat-mxc/include/mach/iomux-mx21.h
index 63aaa972e27..1495dfda783 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx21.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx21.h
@@ -1,126 +1,122 @@
 /*
-* Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License
-* as published by the Free Software Foundation; either version 2
-* of the License, or (at your option) any later version.
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
-* MA 02110-1301, USA.
-*/
-
-#ifndef _MXC_IOMUX_MX21_H
-#define _MXC_IOMUX_MX21_H
-
-#ifndef GPIO_PORTA
-#error Please include mach/iomux.h
-#endif
-
+ * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+#ifndef __MACH_IOMUX_MX21_H__
+#define __MACH_IOMUX_MX21_H__
+
+#include <mach/iomux-mx2x.h>
+#include <mach/iomux-v1.h>
 
 /* Primary GPIO pin functions */
 
-#define PB22_PF_USBH1_BYP       (GPIO_PORTB | GPIO_PF | 22)
-#define PB25_PF_USBH1_ON        (GPIO_PORTB | GPIO_PF | 25)
-#define PC5_PF_USBOTG_SDA       (GPIO_PORTC | GPIO_PF | 5)
-#define PC6_PF_USBOTG_SCL       (GPIO_PORTC | GPIO_PF | 6)
-#define PC7_PF_USBOTG_ON        (GPIO_PORTC | GPIO_PF | 7)
-#define PC8_PF_USBOTG_FS        (GPIO_PORTC | GPIO_PF | 8)
-#define PC9_PF_USBOTG_OE        (GPIO_PORTC | GPIO_PF | 9)
-#define PC10_PF_USBOTG_TXDM     (GPIO_PORTC | GPIO_PF | 10)
-#define PC11_PF_USBOTG_TXDP     (GPIO_PORTC | GPIO_PF | 11)
-#define PC12_PF_USBOTG_RXDM     (GPIO_PORTC | GPIO_PF | 12)
-#define PC13_PF_USBOTG_RXDP     (GPIO_PORTC | GPIO_PF | 13)
-#define PC16_PF_SAP_FS          (GPIO_PORTC | GPIO_PF | 16)
-#define PC17_PF_SAP_RXD         (GPIO_PORTC | GPIO_PF | 17)
-#define PC18_PF_SAP_TXD         (GPIO_PORTC | GPIO_PF | 18)
-#define PC19_PF_SAP_CLK         (GPIO_PORTC | GPIO_PF | 19)
-#define PE0_PF_TEST_WB2         (GPIO_PORTE | GPIO_PF | 0)
-#define PE1_PF_TEST_WB1         (GPIO_PORTE | GPIO_PF | 1)
-#define PE2_PF_TEST_WB0         (GPIO_PORTE | GPIO_PF | 2)
-#define PF1_PF_NFCE             (GPIO_PORTF | GPIO_PF | 1)
-#define PF3_PF_NFCLE            (GPIO_PORTF | GPIO_PF | 3)
-#define PF7_PF_NFIO0            (GPIO_PORTF | GPIO_PF | 7)
-#define PF8_PF_NFIO1            (GPIO_PORTF | GPIO_PF | 8)
-#define PF9_PF_NFIO2            (GPIO_PORTF | GPIO_PF | 9)
-#define PF10_PF_NFIO3           (GPIO_PORTF | GPIO_PF | 10)
-#define PF11_PF_NFIO4           (GPIO_PORTF | GPIO_PF | 11)
-#define PF12_PF_NFIO5           (GPIO_PORTF | GPIO_PF | 12)
-#define PF13_PF_NFIO6           (GPIO_PORTF | GPIO_PF | 13)
-#define PF14_PF_NFIO7           (GPIO_PORTF | GPIO_PF | 14)
-#define PF16_PF_RES             (GPIO_PORTF | GPIO_PF | 16)
+#define PB22_PF_USBH1_BYP       (GPIO_PORTB | GPIO_PF | 22)
+#define PB25_PF_USBH1_ON        (GPIO_PORTB | GPIO_PF | 25)
+#define PC5_PF_USBOTG_SDA       (GPIO_PORTC | GPIO_PF | 5)
+#define PC6_PF_USBOTG_SCL       (GPIO_PORTC | GPIO_PF | 6)
+#define PC7_PF_USBOTG_ON        (GPIO_PORTC | GPIO_PF | 7)
+#define PC8_PF_USBOTG_FS        (GPIO_PORTC | GPIO_PF | 8)
+#define PC9_PF_USBOTG_OE        (GPIO_PORTC | GPIO_PF | 9)
+#define PC10_PF_USBOTG_TXDM     (GPIO_PORTC | GPIO_PF | 10)
+#define PC11_PF_USBOTG_TXDP     (GPIO_PORTC | GPIO_PF | 11)
+#define PC12_PF_USBOTG_RXDM     (GPIO_PORTC | GPIO_PF | 12)
+#define PC13_PF_USBOTG_RXDP     (GPIO_PORTC | GPIO_PF | 13)
+#define PC16_PF_SAP_FS          (GPIO_PORTC | GPIO_PF | 16)
+#define PC17_PF_SAP_RXD         (GPIO_PORTC | GPIO_PF | 17)
+#define PC18_PF_SAP_TXD         (GPIO_PORTC | GPIO_PF | 18)
+#define PC19_PF_SAP_CLK         (GPIO_PORTC | GPIO_PF | 19)
+#define PE0_PF_TEST_WB2         (GPIO_PORTE | GPIO_PF | 0)
+#define PE1_PF_TEST_WB1         (GPIO_PORTE | GPIO_PF | 1)
+#define PE2_PF_TEST_WB0         (GPIO_PORTE | GPIO_PF | 2)
+#define PF1_PF_NFCE             (GPIO_PORTF | GPIO_PF | 1)
+#define PF3_PF_NFCLE            (GPIO_PORTF | GPIO_PF | 3)
+#define PF7_PF_NFIO0            (GPIO_PORTF | GPIO_PF | 7)
+#define PF8_PF_NFIO1            (GPIO_PORTF | GPIO_PF | 8)
+#define PF9_PF_NFIO2            (GPIO_PORTF | GPIO_PF | 9)
+#define PF10_PF_NFIO3           (GPIO_PORTF | GPIO_PF | 10)
+#define PF11_PF_NFIO4           (GPIO_PORTF | GPIO_PF | 11)
+#define PF12_PF_NFIO5           (GPIO_PORTF | GPIO_PF | 12)
+#define PF13_PF_NFIO6           (GPIO_PORTF | GPIO_PF | 13)
+#define PF14_PF_NFIO7           (GPIO_PORTF | GPIO_PF | 14)
+#define PF16_PF_RES             (GPIO_PORTF | GPIO_PF | 16)
 
 /* Alternate GPIO pin functions */
 
-#define PA5_AF_BMI_CLK_CS       (GPIO_PORTA | GPIO_AF | 5)
-#define PA6_AF_BMI_D0           (GPIO_PORTA | GPIO_AF | 6)
-#define PA7_AF_BMI_D1           (GPIO_PORTA | GPIO_AF | 7)
-#define PA8_AF_BMI_D2           (GPIO_PORTA | GPIO_AF | 8)
-#define PA9_AF_BMI_D3           (GPIO_PORTA | GPIO_AF | 9)
-#define PA10_AF_BMI_D4          (GPIO_PORTA | GPIO_AF | 10)
-#define PA11_AF_BMI_D5          (GPIO_PORTA | GPIO_AF | 11)
-#define PA12_AF_BMI_D6          (GPIO_PORTA | GPIO_AF | 12)
-#define PA13_AF_BMI_D7          (GPIO_PORTA | GPIO_AF | 13)
-#define PA14_AF_BMI_D8          (GPIO_PORTA | GPIO_AF | 14)
-#define PA15_AF_BMI_D9          (GPIO_PORTA | GPIO_AF | 15)
-#define PA16_AF_BMI_D10         (GPIO_PORTA | GPIO_AF | 16)
-#define PA17_AF_BMI_D11         (GPIO_PORTA | GPIO_AF | 17)
-#define PA18_AF_BMI_D12         (GPIO_PORTA | GPIO_AF | 18)
-#define PA19_AF_BMI_D13         (GPIO_PORTA | GPIO_AF | 19)
-#define PA20_AF_BMI_D14         (GPIO_PORTA | GPIO_AF | 20)
-#define PA21_AF_BMI_D15         (GPIO_PORTA | GPIO_AF | 21)
-#define PA22_AF_BMI_READ_REQ    (GPIO_PORTA | GPIO_AF | 22)
-#define PA23_AF_BMI_WRITE       (GPIO_PORTA | GPIO_AF | 23)
-#define PA29_AF_BMI_RX_FULL     (GPIO_PORTA | GPIO_AF | 29)
-#define PA30_AF_BMI_READ        (GPIO_PORTA | GPIO_AF | 30)
+#define PA5_AF_BMI_CLK_CS       (GPIO_PORTA | GPIO_AF | 5)
+#define PA6_AF_BMI_D0           (GPIO_PORTA | GPIO_AF | 6)
+#define PA7_AF_BMI_D1           (GPIO_PORTA | GPIO_AF | 7)
+#define PA8_AF_BMI_D2           (GPIO_PORTA | GPIO_AF | 8)
+#define PA9_AF_BMI_D3           (GPIO_PORTA | GPIO_AF | 9)
+#define PA10_AF_BMI_D4          (GPIO_PORTA | GPIO_AF | 10)
+#define PA11_AF_BMI_D5          (GPIO_PORTA | GPIO_AF | 11)
+#define PA12_AF_BMI_D6          (GPIO_PORTA | GPIO_AF | 12)
+#define PA13_AF_BMI_D7          (GPIO_PORTA | GPIO_AF | 13)
+#define PA14_AF_BMI_D8          (GPIO_PORTA | GPIO_AF | 14)
+#define PA15_AF_BMI_D9          (GPIO_PORTA | GPIO_AF | 15)
+#define PA16_AF_BMI_D10         (GPIO_PORTA | GPIO_AF | 16)
+#define PA17_AF_BMI_D11         (GPIO_PORTA | GPIO_AF | 17)
+#define PA18_AF_BMI_D12         (GPIO_PORTA | GPIO_AF | 18)
+#define PA19_AF_BMI_D13         (GPIO_PORTA | GPIO_AF | 19)
+#define PA20_AF_BMI_D14         (GPIO_PORTA | GPIO_AF | 20)
+#define PA21_AF_BMI_D15         (GPIO_PORTA | GPIO_AF | 21)
+#define PA22_AF_BMI_READ_REQ    (GPIO_PORTA | GPIO_AF | 22)
+#define PA23_AF_BMI_WRITE       (GPIO_PORTA | GPIO_AF | 23)
+#define PA29_AF_BMI_RX_FULL     (GPIO_PORTA | GPIO_AF | 29)
+#define PA30_AF_BMI_READ        (GPIO_PORTA | GPIO_AF | 30)
 
 /* AIN GPIO pin functions */
 
-#define PC14_AIN_SYS_CLK        (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 14)
-#define PD21_AIN_USBH2_FS       (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 21)
-#define PD22_AIN_USBH2_OE       (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 22)
-#define PD23_AIN_USBH2_TXDM     (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 23)
-#define PD24_AIN_USBH2_TXDP     (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 24)
-#define PE8_AIN_IR_TXD          (GPIO_PORTE | GPIO_AIN | GPIO_OUT | 8)
-#define PF0_AIN_PC_RST          (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 0)
-#define PF1_AIN_PC_CE1          (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 1)
-#define PF2_AIN_PC_CE2          (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 2)
-#define PF3_AIN_PC_POE          (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 3)
-#define PF4_AIN_PC_OE           (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 4)
-#define PF5_AIN_PC_RW           (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 5)
+#define PC14_AIN_SYS_CLK        (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 14)
+#define PD21_AIN_USBH2_FS       (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 21)
+#define PD22_AIN_USBH2_OE       (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 22)
+#define PD23_AIN_USBH2_TXDM     (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 23)
+#define PD24_AIN_USBH2_TXDP     (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 24)
+#define PE8_AIN_IR_TXD          (GPIO_PORTE | GPIO_AIN | GPIO_OUT | 8)
+#define PF0_AIN_PC_RST          (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 0)
+#define PF1_AIN_PC_CE1          (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 1)
+#define PF2_AIN_PC_CE2          (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 2)
+#define PF3_AIN_PC_POE          (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 3)
+#define PF4_AIN_PC_OE           (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 4)
+#define PF5_AIN_PC_RW           (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 5)
 
 /* BIN GPIO pin functions */
 
-#define PC14_BIN_SYS_CLK        (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 14)
-#define PD27_BIN_EXT_DMA_GRANT  (GPIO_PORTD | GPIO_BIN | GPIO_OUT | 27)
+#define PC14_BIN_SYS_CLK        (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 14)
+#define PD27_BIN_EXT_DMA_GRANT  (GPIO_PORTD | GPIO_BIN | GPIO_OUT | 27)
 
 /* CIN GPIO pin functions */
 
-#define PB26_CIN_USBH1_RXDAT    (GPIO_PORTB | GPIO_CIN | GPIO_OUT | 26)
+#define PB26_CIN_USBH1_RXDAT    (GPIO_PORTB | GPIO_CIN | GPIO_OUT | 26)
 
 /* AOUT GPIO pin functions */
 
-#define PA29_AOUT_BMI_WAIT      (GPIO_PORTA | GPIO_AOUT | GPIO_IN | 29)
-#define PD19_AOUT_USBH2_RXDM    (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 19)
-#define PD20_AOUT_USBH2_RXDP    (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 20)
-#define PD25_AOUT_EXT_DMAREQ    (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 25)
-#define PD26_AOUT_USBOTG_RXDAT  (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 26)
-#define PE9_AOUT_IR_RXD         (GPIO_PORTE | GPIO_AOUT | GPIO_IN | 9)
-#define PF6_AOUT_PC_BVD2        (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 6)
-#define PF7_AOUT_PC_BVD1        (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 7)
-#define PF8_AOUT_PC_VS2         (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 8)
-#define PF9_AOUT_PC_VS1         (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 9)
-#define PF10_AOUT_PC_WP         (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 10)
-#define PF11_AOUT_PC_READY      (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 11)
-#define PF12_AOUT_PC_WAIT       (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 12)
-#define PF13_AOUT_PC_CD2        (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 13)
-#define PF14_AOUT_PC_CD1        (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 14)
-
-
-#endif
+#define PA29_AOUT_BMI_WAIT      (GPIO_PORTA | GPIO_AOUT | GPIO_IN | 29)
+#define PD19_AOUT_USBH2_RXDM    (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 19)
+#define PD20_AOUT_USBH2_RXDP    (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 20)
+#define PD25_AOUT_EXT_DMAREQ    (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 25)
+#define PD26_AOUT_USBOTG_RXDAT  (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 26)
+#define PE9_AOUT_IR_RXD         (GPIO_PORTE | GPIO_AOUT | GPIO_IN | 9)
+#define PF6_AOUT_PC_BVD2        (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 6)
+#define PF7_AOUT_PC_BVD1        (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 7)
+#define PF8_AOUT_PC_VS2         (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 8)
+#define PF9_AOUT_PC_VS1         (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 9)
+#define PF10_AOUT_PC_WP         (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 10)
+#define PF11_AOUT_PC_READY      (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 11)
+#define PF12_AOUT_PC_WAIT       (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 12)
+#define PF13_AOUT_PC_CD2        (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 13)
+#define PF14_AOUT_PC_CD1        (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 14)
+
+#endif /* ifndef __MACH_IOMUX_MX21_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
index 9af494f0ab3..f39220d1b67 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
@@ -7,7 +7,7 @@
  *    Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
  * and
  * arch/arm/plat-mxc/include/mach/iomux-mx35.h
- *    Copyright (C, NO_PAD_CTRL) 2009 by Jan Weitzel Phytec Messtechnik GmbH <armlinux@phytec.de>
+ *    Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH <armlinux@phytec.de>
  *
  * The code contained herein is licensed under the GNU General Public
  * License. You may obtain a copy of the GNU General Public License
@@ -16,24 +16,11 @@
  * http://www.opensource.org/licenses/gpl-license.html
  * http://www.gnu.org/copyleft/gpl.html
  */
-#ifndef __IOMUX_MX25_H__
-#define __IOMUX_MX25_H__
+#ifndef __MACH_IOMUX_MX25_H__
+#define __MACH_IOMUX_MX25_H__
 
 #include <mach/iomux-v3.h>
 
-#ifndef GPIO_PORTA
-#error Please include mach/iomux.h
-#endif
-
-/*
- *
- * @brief MX25 I/O Pin List
- *
- * @ingroup GPIO_MX25
- */
-
-#ifndef __ASSEMBLY__
-
 /*
  * IOMUX/PAD Bit field definitions
  */
@@ -462,9 +449,11 @@
 #define MX25_PAD_GPIO_C__CAN2_TX        IOMUX_PAD(0x3f8, 0x1fc, 0x16, 0, 0, PAD_CTL_PUS_22K_UP)
 
 #define MX25_PAD_GPIO_D__GPIO_D         IOMUX_PAD(0x3fc, 0x200, 0x10, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_GPIO_E__LD16           IOMUX_PAD(0x400, 0x204, 0x02, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_GPIO_D__CAN2_RX        IOMUX_PAD(0x3fc, 0x200, 0x16, 0x484, 1, PAD_CTL_PUS_22K_UP)
 
 #define MX25_PAD_GPIO_E__GPIO_E         IOMUX_PAD(0x400, 0x204, 0x10, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_GPIO_F__LD17           IOMUX_PAD(0x404, 0x208, 0x02, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_GPIO_E__AUD7_TXD       IOMUX_PAD(0x400, 0x204, 0x14, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_GPIO_F__GPIO_F         IOMUX_PAD(0x404, 0x208, 0x10, 0, 0, NO_PAD_CTRL)
@@ -513,5 +502,4 @@
 #define MX25_PAD_CTL_GRP_DVS_SDHC1      IOMUX_PAD(0x458, 0x000, 0, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_CTL_GRP_DVS_LCD        IOMUX_PAD(0x45c, 0x000, 0, 0, 0, NO_PAD_CTRL)
 
-#endif // __ASSEMBLY__
-#endif // __IOMUX_MX25_H__
+#endif /* __MACH_IOMUX_MX25_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx27.h b/arch/arm/plat-mxc/include/mach/iomux-mx27.h
index 5ac158b70f6..d9f9a6e32d8 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx27.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx27.h
@@ -1,207 +1,205 @@
 /*
-* Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
-* Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License
-* as published by the Free Software Foundation; either version 2
-* of the License, or (at your option) any later version.
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
-* MA 02110-1301, USA.
-*/
-
-#ifndef _MXC_IOMUX_MX27_H
-#define _MXC_IOMUX_MX27_H
-
-#ifndef GPIO_PORTA
-#error Please include mach/iomux.h
-#endif
-
+ * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
+ * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+#ifndef __MACH_IOMUX_MX27_H__
+#define __MACH_IOMUX_MX27_H__
+
+#include <mach/iomux-mx2x.h>
+#include <mach/iomux-v1.h>
 
 /* Primary GPIO pin functions */
 
-#define PA0_PF_USBH2_CLK        (GPIO_PORTA | GPIO_PF | 0)
-#define PA1_PF_USBH2_DIR        (GPIO_PORTA | GPIO_PF | 1)
-#define PA2_PF_USBH2_DATA7      (GPIO_PORTA | GPIO_PF | 2)
-#define PA3_PF_USBH2_NXT        (GPIO_PORTA | GPIO_PF | 3)
-#define PA4_PF_USBH2_STP        (GPIO_PORTA | GPIO_PF | 4)
-#define PB22_PF_USBH1_SUSP      (GPIO_PORTB | GPIO_PF | 22)
-#define PB25_PF_USBH1_RCV       (GPIO_PORTB | GPIO_PF | 25)
-#define PC5_PF_I2C2_SDA         (GPIO_PORTC | GPIO_PF | GPIO_IN | 5)
-#define PC6_PF_I2C2_SCL         (GPIO_PORTC | GPIO_PF | GPIO_IN | 6)
-#define PC7_PF_USBOTG_DATA5     (GPIO_PORTC | GPIO_PF | GPIO_OUT | 7)
-#define PC8_PF_USBOTG_DATA6     (GPIO_PORTC | GPIO_PF | GPIO_OUT | 8)
-#define PC9_PF_USBOTG_DATA0     (GPIO_PORTC | GPIO_PF | GPIO_OUT | 9)
-#define PC10_PF_USBOTG_DATA2    (GPIO_PORTC | GPIO_PF | GPIO_OUT | 10)
-#define PC11_PF_USBOTG_DATA1    (GPIO_PORTC | GPIO_PF | GPIO_OUT | 11)
-#define PC12_PF_USBOTG_DATA4    (GPIO_PORTC | GPIO_PF | GPIO_OUT | 12)
-#define PC13_PF_USBOTG_DATA3    (GPIO_PORTC | GPIO_PF | GPIO_OUT | 13)
-#define PC16_PF_SSI4_FS         (GPIO_PORTC | GPIO_PF | GPIO_IN | 16)
-#define PC17_PF_SSI4_RXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 17)
-#define PC18_PF_SSI4_TXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 18)
-#define PC19_PF_SSI4_CLK        (GPIO_PORTC | GPIO_PF | GPIO_IN | 19)
-#define PC25_AF_GPT5_TIN        (GPIO_PORTC | GPIO_AF | 25)
-#define PC27_AF_GPT4_TIN        (GPIO_PORTC | GPIO_AF | 27)
-#define PD0_PF_SD3_CMD          (GPIO_PORTD | GPIO_PF | 0)
-#define PD1_PF_SD3_CLK          (GPIO_PORTD | GPIO_PF | 1)
-#define PD2_PF_ATA_DATA0        (GPIO_PORTD | GPIO_PF | 2)
-#define PD3_PF_ATA_DATA1        (GPIO_PORTD | GPIO_PF | 3)
-#define PD4_PF_ATA_DATA2        (GPIO_PORTD | GPIO_PF | 4)
-#define PD5_PF_ATA_DATA3        (GPIO_PORTD | GPIO_PF | 5)
-#define PD6_PF_ATA_DATA4        (GPIO_PORTD | GPIO_PF | 6)
-#define PD7_PF_ATA_DATA5        (GPIO_PORTD | GPIO_PF | 7)
-#define PD8_PF_ATA_DATA6        (GPIO_PORTD | GPIO_PF | 8)
-#define PD9_PF_ATA_DATA7        (GPIO_PORTD | GPIO_PF | 9)
-#define PD10_PF_ATA_DATA8       (GPIO_PORTD | GPIO_PF | 10)
-#define PD11_PF_ATA_DATA9       (GPIO_PORTD | GPIO_PF | 11)
-#define PD12_PF_ATA_DATA10      (GPIO_PORTD | GPIO_PF | 12)
-#define PD13_PF_ATA_DATA11      (GPIO_PORTD | GPIO_PF | 13)
-#define PD14_PF_ATA_DATA12      (GPIO_PORTD | GPIO_PF | 14)
-#define PD15_PF_ATA_DATA13      (GPIO_PORTD | GPIO_PF | 15)
-#define PD16_PF_ATA_DATA14      (GPIO_PORTD | GPIO_PF | 16)
-#define PE0_PF_USBOTG_NXT       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 0)
-#define PE1_PF_USBOTG_STP       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 1)
-#define PE2_PF_USBOTG_DIR       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 2)
-#define PE24_PF_USBOTG_CLK      (GPIO_PORTE | GPIO_PF | GPIO_OUT | 24)
-#define PE25_PF_USBOTG_DATA7    (GPIO_PORTE | GPIO_PF | GPIO_OUT | 25)
-#define PF1_PF_NFCLE            (GPIO_PORTF | GPIO_PF | 1)
-#define PF3_PF_NFCE             (GPIO_PORTF | GPIO_PF | 3)
-#define PF7_PF_PC_POE           (GPIO_PORTF | GPIO_PF | 7)
-#define PF8_PF_PC_RW            (GPIO_PORTF | GPIO_PF | 8)
-#define PF9_PF_PC_IOIS16        (GPIO_PORTF | GPIO_PF | 9)
-#define PF10_PF_PC_RST          (GPIO_PORTF | GPIO_PF | 10)
-#define PF11_PF_PC_BVD2         (GPIO_PORTF | GPIO_PF | 11)
-#define PF12_PF_PC_BVD1         (GPIO_PORTF | GPIO_PF | 12)
-#define PF13_PF_PC_VS2          (GPIO_PORTF | GPIO_PF | 13)
-#define PF14_PF_PC_VS1          (GPIO_PORTF | GPIO_PF | 14)
-#define PF16_PF_PC_PWRON        (GPIO_PORTF | GPIO_PF | 16)
-#define PF17_PF_PC_READY        (GPIO_PORTF | GPIO_PF | 17)
-#define PF18_PF_PC_WAIT         (GPIO_PORTF | GPIO_PF | 18)
-#define PF19_PF_PC_CD2          (GPIO_PORTF | GPIO_PF | 19)
-#define PF20_PF_PC_CD1          (GPIO_PORTF | GPIO_PF | 20)
-#define PF23_PF_ATA_DATA15      (GPIO_PORTF | GPIO_PF | 23)
+#define PA0_PF_USBH2_CLK        (GPIO_PORTA | GPIO_PF | 0)
+#define PA1_PF_USBH2_DIR        (GPIO_PORTA | GPIO_PF | 1)
+#define PA2_PF_USBH2_DATA7      (GPIO_PORTA | GPIO_PF | 2)
+#define PA3_PF_USBH2_NXT        (GPIO_PORTA | GPIO_PF | 3)
+#define PA4_PF_USBH2_STP        (GPIO_PORTA | GPIO_PF | 4)
+#define PB22_PF_USBH1_SUSP      (GPIO_PORTB | GPIO_PF | 22)
+#define PB25_PF_USBH1_RCV       (GPIO_PORTB | GPIO_PF | 25)
+#define PC5_PF_I2C2_SDA         (GPIO_PORTC | GPIO_PF | GPIO_IN | 5)
+#define PC6_PF_I2C2_SCL         (GPIO_PORTC | GPIO_PF | GPIO_IN | 6)
+#define PC7_PF_USBOTG_DATA5     (GPIO_PORTC | GPIO_PF | GPIO_OUT | 7)
+#define PC8_PF_USBOTG_DATA6     (GPIO_PORTC | GPIO_PF | GPIO_OUT | 8)
+#define PC9_PF_USBOTG_DATA0     (GPIO_PORTC | GPIO_PF | GPIO_OUT | 9)
+#define PC10_PF_USBOTG_DATA2    (GPIO_PORTC | GPIO_PF | GPIO_OUT | 10)
+#define PC11_PF_USBOTG_DATA1    (GPIO_PORTC | GPIO_PF | GPIO_OUT | 11)
+#define PC12_PF_USBOTG_DATA4    (GPIO_PORTC | GPIO_PF | GPIO_OUT | 12)
+#define PC13_PF_USBOTG_DATA3    (GPIO_PORTC | GPIO_PF | GPIO_OUT | 13)
+#define PC16_PF_SSI4_FS         (GPIO_PORTC | GPIO_PF | GPIO_IN | 16)
+#define PC17_PF_SSI4_RXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 17)
+#define PC18_PF_SSI4_TXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 18)
+#define PC19_PF_SSI4_CLK        (GPIO_PORTC | GPIO_PF | GPIO_IN | 19)
+#define PD0_PF_SD3_CMD          (GPIO_PORTD | GPIO_PF | 0)
+#define PD1_PF_SD3_CLK          (GPIO_PORTD | GPIO_PF | 1)
+#define PD2_PF_ATA_DATA0        (GPIO_PORTD | GPIO_PF | 2)
+#define PD3_PF_ATA_DATA1        (GPIO_PORTD | GPIO_PF | 3)
+#define PD4_PF_ATA_DATA2        (GPIO_PORTD | GPIO_PF | 4)
+#define PD5_PF_ATA_DATA3        (GPIO_PORTD | GPIO_PF | 5)
+#define PD6_PF_ATA_DATA4        (GPIO_PORTD | GPIO_PF | 6)
+#define PD7_PF_ATA_DATA5        (GPIO_PORTD | GPIO_PF | 7)
+#define PD8_PF_ATA_DATA6        (GPIO_PORTD | GPIO_PF | 8)
+#define PD9_PF_ATA_DATA7        (GPIO_PORTD | GPIO_PF | 9)
+#define PD10_PF_ATA_DATA8       (GPIO_PORTD | GPIO_PF | 10)
+#define PD11_PF_ATA_DATA9       (GPIO_PORTD | GPIO_PF | 11)
+#define PD12_PF_ATA_DATA10      (GPIO_PORTD | GPIO_PF | 12)
+#define PD13_PF_ATA_DATA11      (GPIO_PORTD | GPIO_PF | 13)
+#define PD14_PF_ATA_DATA12      (GPIO_PORTD | GPIO_PF | 14)
+#define PD15_PF_ATA_DATA13      (GPIO_PORTD | GPIO_PF | 15)
+#define PD16_PF_ATA_DATA14      (GPIO_PORTD | GPIO_PF | 16)
+#define PE0_PF_USBOTG_NXT       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 0)
+#define PE1_PF_USBOTG_STP       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 1)
+#define PE2_PF_USBOTG_DIR       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 2)
+#define PE24_PF_USBOTG_CLK      (GPIO_PORTE | GPIO_PF | GPIO_OUT | 24)
+#define PE25_PF_USBOTG_DATA7    (GPIO_PORTE | GPIO_PF | GPIO_OUT | 25)
+#define PF1_PF_NFCLE            (GPIO_PORTF | GPIO_PF | 1)
+#define PF3_PF_NFCE             (GPIO_PORTF | GPIO_PF | 3)
+#define PF7_PF_PC_POE           (GPIO_PORTF | GPIO_PF | 7)
+#define PF8_PF_PC_RW            (GPIO_PORTF | GPIO_PF | 8)
+#define PF9_PF_PC_IOIS16        (GPIO_PORTF | GPIO_PF | 9)
+#define PF10_PF_PC_RST          (GPIO_PORTF | GPIO_PF | 10)
+#define PF11_PF_PC_BVD2         (GPIO_PORTF | GPIO_PF | 11)
+#define PF12_PF_PC_BVD1         (GPIO_PORTF | GPIO_PF | 12)
+#define PF13_PF_PC_VS2          (GPIO_PORTF | GPIO_PF | 13)
+#define PF14_PF_PC_VS1          (GPIO_PORTF | GPIO_PF | 14)
+#define PF16_PF_PC_PWRON        (GPIO_PORTF | GPIO_PF | 16)
+#define PF17_PF_PC_READY        (GPIO_PORTF | GPIO_PF | 17)
+#define PF18_PF_PC_WAIT         (GPIO_PORTF | GPIO_PF | 18)
+#define PF19_PF_PC_CD2          (GPIO_PORTF | GPIO_PF | 19)
+#define PF20_PF_PC_CD1          (GPIO_PORTF | GPIO_PF | 20)
+#define PF23_PF_ATA_DATA15      (GPIO_PORTF | GPIO_PF | 23)
 
 /* Alternate GPIO pin functions */
 
-#define PB4_AF_MSHC_DATA0       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 4)
-#define PB5_AF_MSHC_DATA1       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 5)
-#define PB6_AF_MSHC_DATA2       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 6)
-#define PB7_AF_MSHC_DATA4       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 7)
-#define PB8_AF_MSHC_BS          (GPIO_PORTB | GPIO_AF | GPIO_OUT | 8)
-#define PB9_AF_MSHC_SCLK        (GPIO_PORTB | GPIO_AF | GPIO_OUT | 9)
-#define PB10_AF_UART6_TXD       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 10)
-#define PB11_AF_UART6_RXD       (GPIO_PORTB | GPIO_AF | GPIO_IN | 11)
-#define PB12_AF_UART6_CTS       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 12)
-#define PB13_AF_UART6_RTS       (GPIO_PORTB | GPIO_AF | GPIO_IN | 13)
-#define PB18_AF_UART5_TXD       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 18)
-#define PB19_AF_UART5_RXD       (GPIO_PORTB | GPIO_AF | GPIO_IN | 19)
-#define PB20_AF_UART5_CTS       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 20)
-#define PB21_AF_UART5_RTS       (GPIO_PORTB | GPIO_AF | GPIO_IN | 21)
-#define PC8_AF_FEC_MDIO         (GPIO_PORTC | GPIO_AF | GPIO_IN | 8)
-#define PC24_AF_GPT5_TOUT       (GPIO_PORTC | GPIO_AF | 24)
-#define PC26_AF_GPT4_TOUT       (GPIO_PORTC | GPIO_AF | 26)
-#define PD1_AF_ETMTRACE_PKT15   (GPIO_PORTD | GPIO_AF | 1)
-#define PD6_AF_ETMTRACE_PKT14   (GPIO_PORTD | GPIO_AF | 6)
-#define PD7_AF_ETMTRACE_PKT13   (GPIO_PORTD | GPIO_AF | 7)
-#define PD9_AF_ETMTRACE_PKT12   (GPIO_PORTD | GPIO_AF | 9)
-#define PD2_AF_SD3_D0           (GPIO_PORTD | GPIO_AF | 2)
-#define PD3_AF_SD3_D1           (GPIO_PORTD | GPIO_AF | 3)
-#define PD4_AF_SD3_D2           (GPIO_PORTD | GPIO_AF | 4)
-#define PD5_AF_SD3_D3           (GPIO_PORTD | GPIO_AF | 5)
-#define PD8_AF_FEC_MDIO         (GPIO_PORTD | GPIO_AF | GPIO_IN | 8)
-#define PD10_AF_ETMTRACE_PKT11  (GPIO_PORTD | GPIO_AF | 10)
-#define PD11_AF_ETMTRACE_PKT10  (GPIO_PORTD | GPIO_AF | 11)
-#define PD12_AF_ETMTRACE_PKT9   (GPIO_PORTD | GPIO_AF | 12)
-#define PD13_AF_ETMTRACE_PKT8   (GPIO_PORTD | GPIO_AF | 13)
-#define PD14_AF_ETMTRACE_PKT7   (GPIO_PORTD | GPIO_AF | 14)
-#define PD15_AF_ETMTRACE_PKT6   (GPIO_PORTD | GPIO_AF | 15)
-#define PD16_AF_ETMTRACE_PKT5   (GPIO_PORTD | GPIO_AF | 16)
-#define PF1_AF_ETMTRACE_PKT0    (GPIO_PORTF | GPIO_AF | 1)
-#define PF3_AF_ETMTRACE_PKT2    (GPIO_PORTF | GPIO_AF | 3)
-#define PF5_AF_ETMPIPESTAT11    (GPIO_PORTF | GPIO_AF | 5)
-#define PF7_AF_ATA_BUFFER_EN    (GPIO_PORTF | GPIO_AF | 7)
-#define PF8_AF_ATA_IORDY        (GPIO_PORTF | GPIO_AF | 8)
-#define PF9_AF_ATA_INTRQ        (GPIO_PORTF | GPIO_AF | 9)
-#define PF10_AF_ATA_RESET       (GPIO_PORTF | GPIO_AF | 10)
-#define PF11_AF_ATA_DMACK       (GPIO_PORTF | GPIO_AF | 11)
-#define PF12_AF_ATA_DMAREQ      (GPIO_PORTF | GPIO_AF | 12)
-#define PF13_AF_ATA_DA0         (GPIO_PORTF | GPIO_AF | 13)
-#define PF14_AF_ATA_DA1         (GPIO_PORTF | GPIO_AF | 14)
-#define PF15_AF_ETMTRACE_SYNC   (GPIO_PORTF | GPIO_AF | 15)
-#define PF16_AF_ATA_DA2         (GPIO_PORTF | GPIO_AF | 16)
-#define PF17_AF_ATA_CS0         (GPIO_PORTF | GPIO_AF | 17)
-#define PF18_AF_ATA_CS1         (GPIO_PORTF | GPIO_AF | 18)
-#define PF19_AF_ATA_DIOW        (GPIO_PORTF | GPIO_AF | 19)
-#define PF20_AF_ATA_DIOR        (GPIO_PORTF | GPIO_AF | 20)
-#define PF22_AF_ETMTRACE_CLK    (GPIO_PORTF | GPIO_AF | 22)
-#define PF23_AF_ETMTRACE_PKT4   (GPIO_PORTF | GPIO_AF | 23)
+#define PB4_AF_MSHC_DATA0       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 4)
+#define PB5_AF_MSHC_DATA1       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 5)
+#define PB6_AF_MSHC_DATA2       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 6)
+#define PB7_AF_MSHC_DATA4       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 7)
+#define PB8_AF_MSHC_BS          (GPIO_PORTB | GPIO_AF | GPIO_OUT | 8)
+#define PB9_AF_MSHC_SCLK        (GPIO_PORTB | GPIO_AF | GPIO_OUT | 9)
+#define PB10_AF_UART6_TXD       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 10)
+#define PB11_AF_UART6_RXD       (GPIO_PORTB | GPIO_AF | GPIO_IN | 11)
+#define PB12_AF_UART6_CTS       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 12)
+#define PB13_AF_UART6_RTS       (GPIO_PORTB | GPIO_AF | GPIO_IN | 13)
+#define PB18_AF_UART5_TXD       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 18)
+#define PB19_AF_UART5_RXD       (GPIO_PORTB | GPIO_AF | GPIO_IN | 19)
+#define PB20_AF_UART5_CTS       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 20)
+#define PB21_AF_UART5_RTS       (GPIO_PORTB | GPIO_AF | GPIO_IN | 21)
+#define PC8_AF_FEC_MDIO         (GPIO_PORTC | GPIO_AF | GPIO_IN | 8)
+#define PC24_AF_GPT5_TOUT       (GPIO_PORTC | GPIO_AF | 24)
+#define PC25_AF_GPT5_TIN        (GPIO_PORTC | GPIO_AF | 25)
+#define PC26_AF_GPT4_TOUT       (GPIO_PORTC | GPIO_AF | 26)
+#define PC27_AF_GPT4_TIN        (GPIO_PORTC | GPIO_AF | 27)
+#define PD1_AF_ETMTRACE_PKT15   (GPIO_PORTD | GPIO_AF | 1)
+#define PD6_AF_ETMTRACE_PKT14   (GPIO_PORTD | GPIO_AF | 6)
+#define PD7_AF_ETMTRACE_PKT13   (GPIO_PORTD | GPIO_AF | 7)
+#define PD9_AF_ETMTRACE_PKT12   (GPIO_PORTD | GPIO_AF | 9)
+#define PD2_AF_SD3_D0           (GPIO_PORTD | GPIO_AF | 2)
+#define PD3_AF_SD3_D1           (GPIO_PORTD | GPIO_AF | 3)
+#define PD4_AF_SD3_D2           (GPIO_PORTD | GPIO_AF | 4)
+#define PD5_AF_SD3_D3           (GPIO_PORTD | GPIO_AF | 5)
+#define PD8_AF_FEC_MDIO         (GPIO_PORTD | GPIO_AF | GPIO_IN | 8)
+#define PD10_AF_ETMTRACE_PKT11  (GPIO_PORTD | GPIO_AF | 10)
+#define PD11_AF_ETMTRACE_PKT10  (GPIO_PORTD | GPIO_AF | 11)
+#define PD12_AF_ETMTRACE_PKT9   (GPIO_PORTD | GPIO_AF | 12)
+#define PD13_AF_ETMTRACE_PKT8   (GPIO_PORTD | GPIO_AF | 13)
+#define PD14_AF_ETMTRACE_PKT7   (GPIO_PORTD | GPIO_AF | 14)
+#define PD15_AF_ETMTRACE_PKT6   (GPIO_PORTD | GPIO_AF | 15)
+#define PD16_AF_ETMTRACE_PKT5   (GPIO_PORTD | GPIO_AF | 16)
+#define PF1_AF_ETMTRACE_PKT0    (GPIO_PORTF | GPIO_AF | 1)
+#define PF3_AF_ETMTRACE_PKT2    (GPIO_PORTF | GPIO_AF | 3)
+#define PF5_AF_ETMPIPESTAT11    (GPIO_PORTF | GPIO_AF | 5)
+#define PF7_AF_ATA_BUFFER_EN    (GPIO_PORTF | GPIO_AF | 7)
+#define PF8_AF_ATA_IORDY        (GPIO_PORTF | GPIO_AF | 8)
+#define PF9_AF_ATA_INTRQ        (GPIO_PORTF | GPIO_AF | 9)
+#define PF10_AF_ATA_RESET       (GPIO_PORTF | GPIO_AF | 10)
+#define PF11_AF_ATA_DMACK       (GPIO_PORTF | GPIO_AF | 11)
+#define PF12_AF_ATA_DMAREQ      (GPIO_PORTF | GPIO_AF | 12)
+#define PF13_AF_ATA_DA0         (GPIO_PORTF | GPIO_AF | 13)
+#define PF14_AF_ATA_DA1         (GPIO_PORTF | GPIO_AF | 14)
+#define PF15_AF_ETMTRACE_SYNC   (GPIO_PORTF | GPIO_AF | 15)
+#define PF16_AF_ATA_DA2         (GPIO_PORTF | GPIO_AF | 16)
+#define PF17_AF_ATA_CS0         (GPIO_PORTF | GPIO_AF | 17)
+#define PF18_AF_ATA_CS1         (GPIO_PORTF | GPIO_AF | 18)
+#define PF19_AF_ATA_DIOW        (GPIO_PORTF | GPIO_AF | 19)
+#define PF20_AF_ATA_DIOR        (GPIO_PORTF | GPIO_AF | 20)
+#define PF22_AF_ETMTRACE_CLK    (GPIO_PORTF | GPIO_AF | 22)
+#define PF23_AF_ETMTRACE_PKT4   (GPIO_PORTF | GPIO_AF | 23)
 
 /* AIN GPIO pin functions */
 
-#define PC14_AIN_SSI1_MCLK      (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 14)
-#define PC15_AIN_GPT6_TOUT      (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 15)
-#define PD0_AIN_FEC_TXD0        (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 0)
-#define PD1_AIN_FEC_TXD1        (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 1)
-#define PD2_AIN_FEC_TXD2        (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 2)
-#define PD3_AIN_FEC_TXD3        (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 3)
-#define PD9_AIN_FEC_MDC         (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 9)
-#define PD16_AIN_FEC_TX_ER      (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 16)
-#define PD27_AIN_EXT_DMA_GRANT  (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 27)
-#define PF23_AIN_FEC_TX_EN      (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 23)
+#define PC14_AIN_SSI1_MCLK      (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 14)
+#define PC15_AIN_GPT6_TOUT      (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 15)
+#define PD0_AIN_FEC_TXD0        (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 0)
+#define PD1_AIN_FEC_TXD1        (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 1)
+#define PD2_AIN_FEC_TXD2        (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 2)
+#define PD3_AIN_FEC_TXD3        (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 3)
+#define PD9_AIN_FEC_MDC         (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 9)
+#define PD16_AIN_FEC_TX_ER      (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 16)
+#define PD27_AIN_EXT_DMA_GRANT  (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 27)
+#define PF23_AIN_FEC_TX_EN      (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 23)
 
 /* BIN GPIO pin functions */
 
-#define PC14_BIN_SSI2_MCLK      (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 14)
+#define PC14_BIN_SSI2_MCLK      (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 14)
 
 /* CIN GPIO pin functions */
 
-#define PD2_CIN_SLCDC1_DAT0     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 2)
-#define PD3_CIN_SLCDC1_DAT1     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 3)
-#define PD4_CIN_SLCDC1_DAT2     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 4)
-#define PD5_CIN_SLCDC1_DAT3     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 5)
-#define PD6_CIN_SLCDC1_DAT4     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 6)
-#define PD7_CIN_SLCDC1_DAT5     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 7)
-#define PD8_CIN_SLCDC1_DAT6     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 8)
-#define PD9_CIN_SLCDC1_DAT7     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 9)
-#define PD10_CIN_SLCDC1_DAT8    (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 10)
-#define PD11_CIN_SLCDC1_DAT9    (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 11)
-#define PD12_CIN_SLCDC1_DAT10   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 12)
-#define PD13_CIN_SLCDC1_DAT11   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 13)
-#define PD14_CIN_SLCDC1_DAT12   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 14)
-#define PD15_CIN_SLCDC1_DAT13   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 15)
-#define PD16_CIN_SLCDC1_DAT14   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 16)
-#define PD23_CIN_SLCDC1_DAT15   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 23)
-#define PF27_CIN_EXT_DMA_GRANT  (GPIO_PORTF | GPIO_CIN | GPIO_OUT | 27)
+#define PD2_CIN_SLCDC1_DAT0     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 2)
+#define PD3_CIN_SLCDC1_DAT1     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 3)
+#define PD4_CIN_SLCDC1_DAT2     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 4)
+#define PD5_CIN_SLCDC1_DAT3     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 5)
+#define PD6_CIN_SLCDC1_DAT4     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 6)
+#define PD7_CIN_SLCDC1_DAT5     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 7)
+#define PD8_CIN_SLCDC1_DAT6     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 8)
+#define PD9_CIN_SLCDC1_DAT7     (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 9)
+#define PD10_CIN_SLCDC1_DAT8    (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 10)
+#define PD11_CIN_SLCDC1_DAT9    (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 11)
+#define PD12_CIN_SLCDC1_DAT10   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 12)
+#define PD13_CIN_SLCDC1_DAT11   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 13)
+#define PD14_CIN_SLCDC1_DAT12   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 14)
+#define PD15_CIN_SLCDC1_DAT13   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 15)
+#define PD16_CIN_SLCDC1_DAT14   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 16)
+#define PD23_CIN_SLCDC1_DAT15   (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 23)
+#define PF27_CIN_EXT_DMA_GRANT  (GPIO_PORTF | GPIO_CIN | GPIO_OUT | 27)
 /* LCDC_TESTx on PBxx omitted, because it's not clear what they do */
 
 /* AOUT GPIO pin functions */
 
-#define PC14_AOUT_GPT6_TIN      (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 14)
-#define PD4_AOUT_FEC_RX_ER      (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 4)
-#define PD5_AOUT_FEC_RXD1       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 5)
-#define PD6_AOUT_FEC_RXD2       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 6)
-#define PD7_AOUT_FEC_RXD3       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 7)
-#define PD10_AOUT_FEC_CRS       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 10)
-#define PD11_AOUT_FEC_TX_CLK    (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 11)
-#define PD12_AOUT_FEC_RXD0      (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 12)
-#define PD13_AOUT_FEC_RX_DV     (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 13)
-#define PD14_AOUT_FEC_RX_CLK    (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 14)
-#define PD15_AOUT_FEC_COL       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 15)
-
-#define PC17_BOUT_PC_IOIS16     (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 17)
-#define PC18_BOUT_PC_BVD2       (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 18)
-#define PC19_BOUT_PC_BVD1       (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 19)
-#define PC28_BOUT_PC_BVD2       (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 28)
-#define PC29_BOUT_PC_VS1        (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 29)
-#define PC30_BOUT_PC_READY      (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 30)
-#define PC31_BOUT_PC_WAIT       (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 31)
-
-
-#endif /* _MXC_GPIO_MX1_MX2_H */
+#define PC14_AOUT_GPT6_TIN      (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 14)
+#define PD4_AOUT_FEC_RX_ER      (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 4)
+#define PD5_AOUT_FEC_RXD1       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 5)
+#define PD6_AOUT_FEC_RXD2       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 6)
+#define PD7_AOUT_FEC_RXD3       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 7)
+#define PD10_AOUT_FEC_CRS       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 10)
+#define PD11_AOUT_FEC_TX_CLK    (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 11)
+#define PD12_AOUT_FEC_RXD0      (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 12)
+#define PD13_AOUT_FEC_RX_DV     (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 13)
+#define PD14_AOUT_FEC_RX_CLK    (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 14)
+#define PD15_AOUT_FEC_COL       (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 15)
+
+/* BOUT GPIO pin functions */
+
+#define PC17_BOUT_PC_IOIS16     (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 17)
+#define PC18_BOUT_PC_BVD2       (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 18)
+#define PC19_BOUT_PC_BVD1       (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 19)
+#define PC28_BOUT_PC_BVD2       (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 28)
+#define PC29_BOUT_PC_VS1        (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 29)
+#define PC30_BOUT_PC_READY      (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 30)
+#define PC31_BOUT_PC_WAIT       (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 31)
+
+#endif /* __MACH_IOMUX_MX27_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h b/arch/arm/plat-mxc/include/mach/iomux-mx2x.h
index fb5ae638e79..c4f116d214f 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx2x.h
@@ -1,237 +1,230 @@
 /*
-* Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
-* Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License
-* as published by the Free Software Foundation; either version 2
-* of the License, or (at your option) any later version.
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
-* MA 02110-1301, USA.
-*/
-
-#ifndef _MXC_IOMUX_MX2x_H
-#define _MXC_IOMUX_MX2x_H
-
-#ifndef GPIO_PORTA
-#error Please include mach/iomux.h
-#endif
-
+ * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
+ * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+#ifndef __MACH_IOMUX_MX2x_H__
+#define __MACH_IOMUX_MX2x_H__
 
 /* Primary GPIO pin functions */
 
-#define PA5_PF_LSCLK            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 5)
-#define PA6_PF_LD0              (GPIO_PORTA | GPIO_PF | GPIO_OUT | 6)
-#define PA7_PF_LD1              (GPIO_PORTA | GPIO_PF | GPIO_OUT | 7)
-#define PA8_PF_LD2              (GPIO_PORTA | GPIO_PF | GPIO_OUT | 8)
-#define PA9_PF_LD3              (GPIO_PORTA | GPIO_PF | GPIO_OUT | 9)
-#define PA10_PF_LD4             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 10)
-#define PA11_PF_LD5             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 11)
-#define PA12_PF_LD6             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 12)
-#define PA13_PF_LD7             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 13)
-#define PA14_PF_LD8             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 14)
-#define PA15_PF_LD9             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 15)
-#define PA16_PF_LD10            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 16)
-#define PA17_PF_LD11            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 17)
-#define PA18_PF_LD12            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 18)
-#define PA19_PF_LD13            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 19)
-#define PA20_PF_LD14            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 20)
-#define PA21_PF_LD15            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 21)
-#define PA22_PF_LD16            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 22)
-#define PA23_PF_LD17            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 23)
-#define PA24_PF_REV             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 24)
-#define PA25_PF_CLS             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 25)
-#define PA26_PF_PS              (GPIO_PORTA | GPIO_PF | GPIO_OUT | 26)
-#define PA27_PF_SPL_SPR         (GPIO_PORTA | GPIO_PF | GPIO_OUT | 27)
-#define PA28_PF_HSYNC           (GPIO_PORTA | GPIO_PF | GPIO_OUT | 28)
-#define PA29_PF_VSYNC           (GPIO_PORTA | GPIO_PF | GPIO_OUT | 29)
-#define PA30_PF_CONTRAST        (GPIO_PORTA | GPIO_PF | GPIO_OUT | 30)
-#define PA31_PF_OE_ACD          (GPIO_PORTA | GPIO_PF | GPIO_OUT | 31)
-#define PB4_PF_SD2_D0           (GPIO_PORTB | GPIO_PF | 4)
-#define PB5_PF_SD2_D1           (GPIO_PORTB | GPIO_PF | 5)
-#define PB6_PF_SD2_D2           (GPIO_PORTB | GPIO_PF | 6)
-#define PB7_PF_SD2_D3           (GPIO_PORTB | GPIO_PF | 7)
-#define PB8_PF_SD2_CMD          (GPIO_PORTB | GPIO_PF | 8)
-#define PB9_PF_SD2_CLK          (GPIO_PORTB | GPIO_PF | 9)
-#define PB10_PF_CSI_D0          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 10)
-#define PB11_PF_CSI_D1          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 11)
-#define PB12_PF_CSI_D2          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 12)
-#define PB13_PF_CSI_D3          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 13)
-#define PB14_PF_CSI_D4          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 14)
-#define PB15_PF_CSI_MCLK        (GPIO_PORTB | GPIO_PF | GPIO_OUT | 15)
-#define PB16_PF_CSI_PIXCLK      (GPIO_PORTB | GPIO_PF | GPIO_OUT | 16)
-#define PB17_PF_CSI_D5          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 17)
-#define PB18_PF_CSI_D6          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 18)
-#define PB19_PF_CSI_D7          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 19)
-#define PB20_PF_CSI_VSYNC       (GPIO_PORTB | GPIO_PF | GPIO_OUT | 20)
-#define PB21_PF_CSI_HSYNC       (GPIO_PORTB | GPIO_PF | GPIO_OUT | 21)
-#define PB23_PF_USB_PWR         (GPIO_PORTB | GPIO_PF | 23)
-#define PB24_PF_USB_OC          (GPIO_PORTB | GPIO_PF | 24)
-#define PB26_PF_USBH1_FS        (GPIO_PORTB | GPIO_PF | 26)
-#define PB27_PF_USBH1_OE        (GPIO_PORTB | GPIO_PF | 27)
-#define PB28_PF_USBH1_TXDM      (GPIO_PORTB | GPIO_PF | 28)
-#define PB29_PF_USBH1_TXDP      (GPIO_PORTB | GPIO_PF | 29)
-#define PB30_PF_USBH1_RXDM      (GPIO_PORTB | GPIO_PF | 30)
-#define PB31_PF_USBH1_RXDP      (GPIO_PORTB | GPIO_PF | 31)
-#define PC14_PF_TOUT            (GPIO_PORTC | GPIO_PF | 14)
-#define PC15_PF_TIN             (GPIO_PORTC | GPIO_PF | 15)
-#define PC20_PF_SSI1_FS         (GPIO_PORTC | GPIO_PF | GPIO_IN | 20)
-#define PC21_PF_SSI1_RXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 21)
-#define PC22_PF_SSI1_TXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 22)
-#define PC23_PF_SSI1_CLK        (GPIO_PORTC | GPIO_PF | GPIO_IN | 23)
-#define PC24_PF_SSI2_FS         (GPIO_PORTC | GPIO_PF | GPIO_IN | 24)
-#define PC25_PF_SSI2_RXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 25)
-#define PC26_PF_SSI2_TXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 26)
-#define PC27_PF_SSI2_CLK        (GPIO_PORTC | GPIO_PF | GPIO_IN | 27)
-#define PC28_PF_SSI3_FS         (GPIO_PORTC | GPIO_PF | GPIO_IN | 28)
-#define PC29_PF_SSI3_RXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 29)
-#define PC30_PF_SSI3_TXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 30)
-#define PC31_PF_SSI3_CLK        (GPIO_PORTC | GPIO_PF | GPIO_IN | 31)
-#define PD17_PF_I2C_DATA        (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17)
-#define PD18_PF_I2C_CLK         (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18)
-#define PD19_PF_CSPI2_SS2       (GPIO_PORTD | GPIO_PF | 19)
-#define PD20_PF_CSPI2_SS1       (GPIO_PORTD | GPIO_PF | 20)
-#define PD21_PF_CSPI2_SS0       (GPIO_PORTD | GPIO_PF | 21)
-#define PD22_PF_CSPI2_SCLK      (GPIO_PORTD | GPIO_PF | 22)
-#define PD23_PF_CSPI2_MISO      (GPIO_PORTD | GPIO_PF | 23)
-#define PD24_PF_CSPI2_MOSI      (GPIO_PORTD | GPIO_PF | 24)
-#define PD25_PF_CSPI1_RDY       (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25)
-#define PD26_PF_CSPI1_SS2       (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26)
-#define PD27_PF_CSPI1_SS1       (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27)
-#define PD28_PF_CSPI1_SS0       (GPIO_PORTD | GPIO_PF | GPIO_OUT | 28)
-#define PD29_PF_CSPI1_SCLK      (GPIO_PORTD | GPIO_PF | GPIO_OUT | 29)
-#define PD30_PF_CSPI1_MISO      (GPIO_PORTD | GPIO_PF | GPIO_IN | 30)
-#define PD31_PF_CSPI1_MOSI      (GPIO_PORTD | GPIO_PF | GPIO_OUT | 31)
-#define PE3_PF_UART2_CTS        (GPIO_PORTE | GPIO_PF | GPIO_OUT | 3)
-#define PE4_PF_UART2_RTS        (GPIO_PORTE | GPIO_PF | GPIO_IN | 4)
-#define PE5_PF_PWMO             (GPIO_PORTE | GPIO_PF | 5)
-#define PE6_PF_UART2_TXD        (GPIO_PORTE | GPIO_PF | GPIO_OUT | 6)
-#define PE7_PF_UART2_RXD        (GPIO_PORTE | GPIO_PF | GPIO_IN | 7)
-#define PE8_PF_UART3_TXD        (GPIO_PORTE | GPIO_PF | GPIO_OUT | 8)
-#define PE9_PF_UART3_RXD        (GPIO_PORTE | GPIO_PF | GPIO_IN | 9)
-#define PE10_PF_UART3_CTS       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 10)
-#define PE11_PF_UART3_RTS       (GPIO_PORTE | GPIO_PF | GPIO_IN | 11)
-#define PE12_PF_UART1_TXD       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 12)
-#define PE13_PF_UART1_RXD       (GPIO_PORTE | GPIO_PF | GPIO_IN | 13)
-#define PE14_PF_UART1_CTS       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 14)
-#define PE15_PF_UART1_RTS       (GPIO_PORTE | GPIO_PF | GPIO_IN | 15)
-#define PE16_PF_RTCK            (GPIO_PORTE | GPIO_PF | GPIO_OUT | 16)
-#define PE17_PF_RESET_OUT       (GPIO_PORTE | GPIO_PF | 17)
-#define PE18_PF_SD1_D0          (GPIO_PORTE | GPIO_PF | 18)
-#define PE19_PF_SD1_D1          (GPIO_PORTE | GPIO_PF | 19)
-#define PE20_PF_SD1_D2          (GPIO_PORTE | GPIO_PF | 20)
-#define PE21_PF_SD1_D3          (GPIO_PORTE | GPIO_PF | 21)
-#define PE22_PF_SD1_CMD         (GPIO_PORTE | GPIO_PF | 22)
-#define PE23_PF_SD1_CLK         (GPIO_PORTE | GPIO_PF | 23)
-#define PF0_PF_NRFB             (GPIO_PORTF | GPIO_PF | 0)
-#define PF2_PF_NFWP             (GPIO_PORTF | GPIO_PF | 2)
-#define PF4_PF_NFALE            (GPIO_PORTF | GPIO_PF | 4)
-#define PF5_PF_NFRE             (GPIO_PORTF | GPIO_PF | 5)
-#define PF6_PF_NFWE             (GPIO_PORTF | GPIO_PF | 6)
-#define PF15_PF_CLKO            (GPIO_PORTF | GPIO_PF | 15)
-#define PF21_PF_CS4             (GPIO_PORTF | GPIO_PF | 21)
-#define PF22_PF_CS5             (GPIO_PORTF | GPIO_PF | 22)
+#define PA5_PF_LSCLK            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 5)
+#define PA6_PF_LD0              (GPIO_PORTA | GPIO_PF | GPIO_OUT | 6)
+#define PA7_PF_LD1              (GPIO_PORTA | GPIO_PF | GPIO_OUT | 7)
+#define PA8_PF_LD2              (GPIO_PORTA | GPIO_PF | GPIO_OUT | 8)
+#define PA9_PF_LD3              (GPIO_PORTA | GPIO_PF | GPIO_OUT | 9)
+#define PA10_PF_LD4             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 10)
+#define PA11_PF_LD5             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 11)
+#define PA12_PF_LD6             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 12)
+#define PA13_PF_LD7             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 13)
+#define PA14_PF_LD8             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 14)
+#define PA15_PF_LD9             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 15)
+#define PA16_PF_LD10            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 16)
+#define PA17_PF_LD11            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 17)
+#define PA18_PF_LD12            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 18)
+#define PA19_PF_LD13            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 19)
+#define PA20_PF_LD14            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 20)
+#define PA21_PF_LD15            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 21)
+#define PA22_PF_LD16            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 22)
+#define PA23_PF_LD17            (GPIO_PORTA | GPIO_PF | GPIO_OUT | 23)
+#define PA24_PF_REV             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 24)
+#define PA25_PF_CLS             (GPIO_PORTA | GPIO_PF | GPIO_OUT | 25)
+#define PA26_PF_PS              (GPIO_PORTA | GPIO_PF | GPIO_OUT | 26)
+#define PA27_PF_SPL_SPR         (GPIO_PORTA | GPIO_PF | GPIO_OUT | 27)
+#define PA28_PF_HSYNC           (GPIO_PORTA | GPIO_PF | GPIO_OUT | 28)
+#define PA29_PF_VSYNC           (GPIO_PORTA | GPIO_PF | GPIO_OUT | 29)
+#define PA30_PF_CONTRAST        (GPIO_PORTA | GPIO_PF | GPIO_OUT | 30)
+#define PA31_PF_OE_ACD          (GPIO_PORTA | GPIO_PF | GPIO_OUT | 31)
+#define PB4_PF_SD2_D0           (GPIO_PORTB | GPIO_PF | 4)
+#define PB5_PF_SD2_D1           (GPIO_PORTB | GPIO_PF | 5)
+#define PB6_PF_SD2_D2           (GPIO_PORTB | GPIO_PF | 6)
+#define PB7_PF_SD2_D3           (GPIO_PORTB | GPIO_PF | 7)
+#define PB8_PF_SD2_CMD          (GPIO_PORTB | GPIO_PF | 8)
+#define PB9_PF_SD2_CLK          (GPIO_PORTB | GPIO_PF | 9)
+#define PB10_PF_CSI_D0          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 10)
+#define PB11_PF_CSI_D1          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 11)
+#define PB12_PF_CSI_D2          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 12)
+#define PB13_PF_CSI_D3          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 13)
+#define PB14_PF_CSI_D4          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 14)
+#define PB15_PF_CSI_MCLK        (GPIO_PORTB | GPIO_PF | GPIO_OUT | 15)
+#define PB16_PF_CSI_PIXCLK      (GPIO_PORTB | GPIO_PF | GPIO_OUT | 16)
+#define PB17_PF_CSI_D5          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 17)
+#define PB18_PF_CSI_D6          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 18)
+#define PB19_PF_CSI_D7          (GPIO_PORTB | GPIO_PF | GPIO_OUT | 19)
+#define PB20_PF_CSI_VSYNC       (GPIO_PORTB | GPIO_PF | GPIO_OUT | 20)
+#define PB21_PF_CSI_HSYNC       (GPIO_PORTB | GPIO_PF | GPIO_OUT | 21)
+#define PB23_PF_USB_PWR         (GPIO_PORTB | GPIO_PF | 23)
+#define PB24_PF_USB_OC          (GPIO_PORTB | GPIO_PF | 24)
+#define PB26_PF_USBH1_FS        (GPIO_PORTB | GPIO_PF | 26)
+#define PB27_PF_USBH1_OE        (GPIO_PORTB | GPIO_PF | 27)
+#define PB28_PF_USBH1_TXDM      (GPIO_PORTB | GPIO_PF | 28)
+#define PB29_PF_USBH1_TXDP      (GPIO_PORTB | GPIO_PF | 29)
+#define PB30_PF_USBH1_RXDM      (GPIO_PORTB | GPIO_PF | 30)
+#define PB31_PF_USBH1_RXDP      (GPIO_PORTB | GPIO_PF | 31)
+#define PC14_PF_TOUT            (GPIO_PORTC | GPIO_PF | 14)
+#define PC15_PF_TIN             (GPIO_PORTC | GPIO_PF | 15)
+#define PC20_PF_SSI1_FS         (GPIO_PORTC | GPIO_PF | GPIO_IN | 20)
+#define PC21_PF_SSI1_RXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 21)
+#define PC22_PF_SSI1_TXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 22)
+#define PC23_PF_SSI1_CLK        (GPIO_PORTC | GPIO_PF | GPIO_IN | 23)
+#define PC24_PF_SSI2_FS         (GPIO_PORTC | GPIO_PF | GPIO_IN | 24)
+#define PC25_PF_SSI2_RXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 25)
+#define PC26_PF_SSI2_TXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 26)
+#define PC27_PF_SSI2_CLK        (GPIO_PORTC | GPIO_PF | GPIO_IN | 27)
+#define PC28_PF_SSI3_FS         (GPIO_PORTC | GPIO_PF | GPIO_IN | 28)
+#define PC29_PF_SSI3_RXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 29)
+#define PC30_PF_SSI3_TXD        (GPIO_PORTC | GPIO_PF | GPIO_IN | 30)
+#define PC31_PF_SSI3_CLK        (GPIO_PORTC | GPIO_PF | GPIO_IN | 31)
+#define PD17_PF_I2C_DATA        (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17)
+#define PD18_PF_I2C_CLK         (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18)
+#define PD19_PF_CSPI2_SS2       (GPIO_PORTD | GPIO_PF | 19)
+#define PD20_PF_CSPI2_SS1       (GPIO_PORTD | GPIO_PF | 20)
+#define PD21_PF_CSPI2_SS0       (GPIO_PORTD | GPIO_PF | 21)
+#define PD22_PF_CSPI2_SCLK      (GPIO_PORTD | GPIO_PF | 22)
+#define PD23_PF_CSPI2_MISO      (GPIO_PORTD | GPIO_PF | 23)
+#define PD24_PF_CSPI2_MOSI      (GPIO_PORTD | GPIO_PF | 24)
+#define PD25_PF_CSPI1_RDY       (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25)
+#define PD26_PF_CSPI1_SS2       (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26)
+#define PD27_PF_CSPI1_SS1       (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27)
+#define PD28_PF_CSPI1_SS0       (GPIO_PORTD | GPIO_PF | GPIO_OUT | 28)
+#define PD29_PF_CSPI1_SCLK      (GPIO_PORTD | GPIO_PF | GPIO_OUT | 29)
+#define PD30_PF_CSPI1_MISO      (GPIO_PORTD | GPIO_PF | GPIO_IN | 30)
+#define PD31_PF_CSPI1_MOSI      (GPIO_PORTD | GPIO_PF | GPIO_OUT | 31)
+#define PE3_PF_UART2_CTS        (GPIO_PORTE | GPIO_PF | GPIO_OUT | 3)
+#define PE4_PF_UART2_RTS        (GPIO_PORTE | GPIO_PF | GPIO_IN | 4)
+#define PE5_PF_PWMO             (GPIO_PORTE | GPIO_PF | 5)
+#define PE6_PF_UART2_TXD        (GPIO_PORTE | GPIO_PF | GPIO_OUT | 6)
+#define PE7_PF_UART2_RXD        (GPIO_PORTE | GPIO_PF | GPIO_IN | 7)
+#define PE8_PF_UART3_TXD        (GPIO_PORTE | GPIO_PF | GPIO_OUT | 8)
+#define PE9_PF_UART3_RXD        (GPIO_PORTE | GPIO_PF | GPIO_IN | 9)
+#define PE10_PF_UART3_CTS       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 10)
+#define PE11_PF_UART3_RTS       (GPIO_PORTE | GPIO_PF | GPIO_IN | 11)
+#define PE12_PF_UART1_TXD       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 12)
+#define PE13_PF_UART1_RXD       (GPIO_PORTE | GPIO_PF | GPIO_IN | 13)
+#define PE14_PF_UART1_CTS       (GPIO_PORTE | GPIO_PF | GPIO_OUT | 14)
+#define PE15_PF_UART1_RTS       (GPIO_PORTE | GPIO_PF | GPIO_IN | 15)
+#define PE16_PF_RTCK            (GPIO_PORTE | GPIO_PF | GPIO_OUT | 16)
+#define PE17_PF_RESET_OUT       (GPIO_PORTE | GPIO_PF | 17)
+#define PE18_PF_SD1_D0          (GPIO_PORTE | GPIO_PF | 18)
+#define PE19_PF_SD1_D1          (GPIO_PORTE | GPIO_PF | 19)
+#define PE20_PF_SD1_D2          (GPIO_PORTE | GPIO_PF | 20)
+#define PE21_PF_SD1_D3          (GPIO_PORTE | GPIO_PF | 21)
+#define PE22_PF_SD1_CMD         (GPIO_PORTE | GPIO_PF | 22)
+#define PE23_PF_SD1_CLK         (GPIO_PORTE | GPIO_PF | 23)
+#define PF0_PF_NRFB             (GPIO_PORTF | GPIO_PF | 0)
+#define PF2_PF_NFWP             (GPIO_PORTF | GPIO_PF | 2)
+#define PF4_PF_NFALE            (GPIO_PORTF | GPIO_PF | 4)
+#define PF5_PF_NFRE             (GPIO_PORTF | GPIO_PF | 5)
+#define PF6_PF_NFWE             (GPIO_PORTF | GPIO_PF | 6)
+#define PF15_PF_CLKO            (GPIO_PORTF | GPIO_PF | 15)
+#define PF21_PF_CS4             (GPIO_PORTF | GPIO_PF | 21)
+#define PF22_PF_CS5             (GPIO_PORTF | GPIO_PF | 22)
 
 /* Alternate GPIO pin functions */
 
-#define PB26_AF_UART4_RTS       (GPIO_PORTB | GPIO_AF | GPIO_IN | 26)
-#define PB28_AF_UART4_TXD       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 28)
-#define PB29_AF_UART4_CTS       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 29)
-#define PB31_AF_UART4_RXD       (GPIO_PORTB | GPIO_AF | GPIO_IN | 31)
-#define PC28_AF_SLCDC2_D0       (GPIO_PORTC | GPIO_AF | 28)
-#define PC29_AF_SLCDC2_RS       (GPIO_PORTC | GPIO_AF | 29)
-#define PC30_AF_SLCDC2_CS       (GPIO_PORTC | GPIO_AF | 30)
-#define PC31_AF_SLCDC2_CLK      (GPIO_PORTC | GPIO_AF | 31)
-#define PD19_AF_USBH2_DATA4     (GPIO_PORTD | GPIO_AF | 19)
-#define PD20_AF_USBH2_DATA3     (GPIO_PORTD | GPIO_AF | 20)
-#define PD21_AF_USBH2_DATA6     (GPIO_PORTD | GPIO_AF | 21)
-#define PD22_AF_USBH2_DATA0     (GPIO_PORTD | GPIO_AF | 22)
-#define PD23_AF_USBH2_DATA2     (GPIO_PORTD | GPIO_AF | 23)
-#define PD24_AF_USBH2_DATA1     (GPIO_PORTD | GPIO_AF | 24)
-#define PD26_AF_USBH2_DATA5     (GPIO_PORTD | GPIO_AF | 26)
-#define PE0_AF_KP_COL6          (GPIO_PORTE | GPIO_AF | 0)
-#define PE1_AF_KP_ROW6          (GPIO_PORTE | GPIO_AF | 1)
-#define PE2_AF_KP_ROW7          (GPIO_PORTE | GPIO_AF | 2)
-#define PE3_AF_KP_COL7          (GPIO_PORTE | GPIO_AF | 3)
-#define PE4_AF_KP_ROW7          (GPIO_PORTE | GPIO_AF | 4)
-#define PE6_AF_KP_COL6          (GPIO_PORTE | GPIO_AF | 6)
-#define PE7_AF_KP_ROW6          (GPIO_PORTE | GPIO_AF | 7)
-#define PE16_AF_OWIRE           (GPIO_PORTE | GPIO_AF | 16)
-#define PE18_AF_CSPI3_MISO      (GPIO_PORTE | GPIO_AF | GPIO_IN | 18)
-#define PE21_AF_CSPI3_SS        (GPIO_PORTE | GPIO_AF | GPIO_OUT | 21)
-#define PE22_AF_CSPI3_MOSI      (GPIO_PORTE | GPIO_AF | GPIO_OUT | 22)
-#define PE23_AF_CSPI3_SCLK      (GPIO_PORTE | GPIO_AF | GPIO_OUT | 23)
+#define PB26_AF_UART4_RTS       (GPIO_PORTB | GPIO_AF | GPIO_IN | 26)
+#define PB28_AF_UART4_TXD       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 28)
+#define PB29_AF_UART4_CTS       (GPIO_PORTB | GPIO_AF | GPIO_OUT | 29)
+#define PB31_AF_UART4_RXD       (GPIO_PORTB | GPIO_AF | GPIO_IN | 31)
+#define PC28_AF_SLCDC2_D0       (GPIO_PORTC | GPIO_AF | 28)
+#define PC29_AF_SLCDC2_RS       (GPIO_PORTC | GPIO_AF | 29)
+#define PC30_AF_SLCDC2_CS       (GPIO_PORTC | GPIO_AF | 30)
+#define PC31_AF_SLCDC2_CLK      (GPIO_PORTC | GPIO_AF | 31)
+#define PD19_AF_USBH2_DATA4     (GPIO_PORTD | GPIO_AF | 19)
+#define PD20_AF_USBH2_DATA3     (GPIO_PORTD | GPIO_AF | 20)
+#define PD21_AF_USBH2_DATA6     (GPIO_PORTD | GPIO_AF | 21)
+#define PD22_AF_USBH2_DATA0     (GPIO_PORTD | GPIO_AF | 22)
+#define PD23_AF_USBH2_DATA2     (GPIO_PORTD | GPIO_AF | 23)
+#define PD24_AF_USBH2_DATA1     (GPIO_PORTD | GPIO_AF | 24)
+#define PD26_AF_USBH2_DATA5     (GPIO_PORTD | GPIO_AF | 26)
+#define PE0_AF_KP_COL6          (GPIO_PORTE | GPIO_AF | 0)
+#define PE1_AF_KP_ROW6          (GPIO_PORTE | GPIO_AF | 1)
+#define PE2_AF_KP_ROW7          (GPIO_PORTE | GPIO_AF | 2)
+#define PE3_AF_KP_COL7          (GPIO_PORTE | GPIO_AF | 3)
+#define PE4_AF_KP_ROW7          (GPIO_PORTE | GPIO_AF | 4)
+#define PE6_AF_KP_COL6          (GPIO_PORTE | GPIO_AF | 6)
+#define PE7_AF_KP_ROW6          (GPIO_PORTE | GPIO_AF | 7)
+#define PE16_AF_OWIRE           (GPIO_PORTE | GPIO_AF | 16)
+#define PE18_AF_CSPI3_MISO      (GPIO_PORTE | GPIO_AF | GPIO_IN | 18)
+#define PE21_AF_CSPI3_SS        (GPIO_PORTE | GPIO_AF | GPIO_OUT | 21)
+#define PE22_AF_CSPI3_MOSI      (GPIO_PORTE | GPIO_AF | GPIO_OUT | 22)
+#define PE23_AF_CSPI3_SCLK      (GPIO_PORTE | GPIO_AF | GPIO_OUT | 23)
 
 /* AIN GPIO pin functions */
 
-#define PA6_AIN_SLCDC1_DAT0     (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 6)
-#define PA7_AIN_SLCDC1_DAT1     (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 7)
-#define PA8_AIN_SLCDC1_DAT2     (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 8)
-#define PA0_AIN_SLCDC1_DAT3     (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0)
-#define PA11_AIN_SLCDC1_DAT5    (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 11)
-#define PA13_AIN_SLCDC1_DAT7    (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 13)
-#define PA15_AIN_SLCDC1_DAT9    (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 15)
-#define PA17_AIN_SLCDC1_DAT11   (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 17)
-#define PA19_AIN_SLCDC1_DAT13   (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 19)
-#define PA21_AIN_SLCDC1_DAT15   (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 21)
-#define PA22_AIN_EXT_DMAGRANT   (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 22)
-#define PA24_AIN_SLCDC1_D0      (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 24)
-#define PA25_AIN_SLCDC1_RS      (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 25)
-#define PA26_AIN_SLCDC1_CS      (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 26)
-#define PA27_AIN_SLCDC1_CLK     (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 27)
-#define PB6_AIN_SLCDC1_D0       (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 6)
-#define PB7_AIN_SLCDC1_RS       (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 7)
-#define PB8_AIN_SLCDC1_CS       (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 8)
-#define PB9_AIN_SLCDC1_CLK      (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 9)
-#define PB25_AIN_SLCDC1_DAT0    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 25)
-#define PB26_AIN_SLCDC1_DAT1    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 26)
-#define PB27_AIN_SLCDC1_DAT2    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 27)
-#define PB28_AIN_SLCDC1_DAT3    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 28)
-#define PB29_AIN_SLCDC1_DAT4    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 29)
-#define PB30_AIN_SLCDC1_DAT5    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 30)
-#define PB31_AIN_SLCDC1_DAT6    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 31)
-#define PC5_AIN_SLCDC1_DAT7     (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 5)
-#define PC6_AIN_SLCDC1_DAT8     (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 6)
-#define PC7_AIN_SLCDC1_DAT9     (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 7)
-#define PC8_AIN_SLCDC1_DAT10    (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 8)
-#define PC9_AIN_SLCDC1_DAT11    (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 9)
-#define PC10_AIN_SLCDC1_DAT12   (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 10)
-#define PC11_AIN_SLCDC1_DAT13   (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 11)
-#define PC12_AIN_SLCDC1_DAT14   (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 12)
-#define PC13_AIN_SLCDC1_DAT15   (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 13)
-#define PE5_AIN_PC_SPKOUT       (GPIO_PORTE | GPIO_AIN | GPIO_OUT | 5)
+#define PA6_AIN_SLCDC1_DAT0     (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 6)
+#define PA7_AIN_SLCDC1_DAT1     (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 7)
+#define PA8_AIN_SLCDC1_DAT2     (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 8)
+#define PA0_AIN_SLCDC1_DAT3     (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0)
+#define PA11_AIN_SLCDC1_DAT5    (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 11)
+#define PA13_AIN_SLCDC1_DAT7    (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 13)
+#define PA15_AIN_SLCDC1_DAT9    (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 15)
+#define PA17_AIN_SLCDC1_DAT11   (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 17)
+#define PA19_AIN_SLCDC1_DAT13   (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 19)
+#define PA21_AIN_SLCDC1_DAT15   (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 21)
+#define PA22_AIN_EXT_DMAGRANT   (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 22)
+#define PA24_AIN_SLCDC1_D0      (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 24)
+#define PA25_AIN_SLCDC1_RS      (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 25)
+#define PA26_AIN_SLCDC1_CS      (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 26)
+#define PA27_AIN_SLCDC1_CLK     (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 27)
+#define PB6_AIN_SLCDC1_D0       (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 6)
+#define PB7_AIN_SLCDC1_RS       (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 7)
+#define PB8_AIN_SLCDC1_CS       (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 8)
+#define PB9_AIN_SLCDC1_CLK      (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 9)
+#define PB25_AIN_SLCDC1_DAT0    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 25)
+#define PB26_AIN_SLCDC1_DAT1    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 26)
+#define PB27_AIN_SLCDC1_DAT2    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 27)
+#define PB28_AIN_SLCDC1_DAT3    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 28)
+#define PB29_AIN_SLCDC1_DAT4    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 29)
+#define PB30_AIN_SLCDC1_DAT5    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 30)
+#define PB31_AIN_SLCDC1_DAT6    (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 31)
+#define PC5_AIN_SLCDC1_DAT7     (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 5)
+#define PC6_AIN_SLCDC1_DAT8     (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 6)
+#define PC7_AIN_SLCDC1_DAT9     (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 7)
+#define PC8_AIN_SLCDC1_DAT10    (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 8)
+#define PC9_AIN_SLCDC1_DAT11    (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 9)
+#define PC10_AIN_SLCDC1_DAT12   (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 10)
+#define PC11_AIN_SLCDC1_DAT13   (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 11)
+#define PC12_AIN_SLCDC1_DAT14   (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 12)
+#define PC13_AIN_SLCDC1_DAT15   (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 13)
+#define PE5_AIN_PC_SPKOUT       (GPIO_PORTE | GPIO_AIN | GPIO_OUT | 5)
 
 /* BIN GPIO pin functions */
 
-#define PE5_BIN_TOUT2           (GPIO_PORTE | GPIO_BIN | GPIO_OUT | 5)
+#define PE5_BIN_TOUT2           (GPIO_PORTE | GPIO_BIN | GPIO_OUT | 5)
 
 /* CIN GPIO pin functions */
 
-#define PA14_CIN_SLCDC1_DAT0    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 14)
-#define PA15_CIN_SLCDC1_DAT1    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 15)
-#define PA16_CIN_SLCDC1_DAT2    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 16)
-#define PA17_CIN_SLCDC1_DAT3    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 17)
-#define PA18_CIN_SLCDC1_DAT4    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 18)
-#define PA19_CIN_SLCDC1_DAT5    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 19)
-#define PA20_CIN_SLCDC1_DAT6    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 20)
-#define PA21_CIN_SLCDC1_DAT7    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 21)
-#define PB30_CIN_UART4_CTS      (GPIO_PORTB | GPIO_CIN | GPIO_OUT | 30)
-#define PE5_CIN_TOUT3           (GPIO_PORTE | GPIO_CIN | GPIO_OUT | 5)
+#define PA14_CIN_SLCDC1_DAT0    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 14)
+#define PA15_CIN_SLCDC1_DAT1    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 15)
+#define PA16_CIN_SLCDC1_DAT2    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 16)
+#define PA17_CIN_SLCDC1_DAT3    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 17)
+#define PA18_CIN_SLCDC1_DAT4    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 18)
+#define PA19_CIN_SLCDC1_DAT5    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 19)
+#define PA20_CIN_SLCDC1_DAT6    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 20)
+#define PA21_CIN_SLCDC1_DAT7    (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 21)
+#define PB30_CIN_UART4_CTS      (GPIO_PORTB | GPIO_CIN | GPIO_OUT | 30)
+#define PE5_CIN_TOUT3           (GPIO_PORTE | GPIO_CIN | GPIO_OUT | 5)
 
 /* AOUT GPIO pin functions */
 
-#define PB29_AOUT_UART4_RXD     (GPIO_PORTB | GPIO_AOUT | GPIO_IN | 29)
-#define PB31_AOUT_UART4_RTS     (GPIO_PORTB | GPIO_AOUT | GPIO_IN | 31)
+#define PB29_AOUT_UART4_RXD     (GPIO_PORTB | GPIO_AOUT | GPIO_IN | 29)
+#define PB31_AOUT_UART4_RTS     (GPIO_PORTB | GPIO_AOUT | GPIO_IN | 31)
 #define PC8_AOUT_USBOTG_TXR_INT (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 8)
-#define PC15_AOUT_WKGD          (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 15)
-#define PF21_AOUT_DTACK         (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 21)
-
+#define PC15_AOUT_WKGD          (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 15)
+#define PF21_AOUT_DTACK         (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 21)
 
-#endif
+#endif /* ifndef __MACH_IOMUX_MX2x_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
index e1fc6da1cd1..e51465d7b22 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
@@ -16,12 +16,10 @@
  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  * MA 02110-1301, USA.
  */
-
-#ifndef __MACH_MX31_IOMUX_H__
-#define __MACH_MX31_IOMUX_H__
+#ifndef __MACH_IOMUX_MX3_H__
+#define __MACH_IOMUX_MX3_H__
 
 #include <linux/types.h>
-
 /*
  * various IOMUX output functions
  */
@@ -34,7 +32,7 @@
 #define IOMUX_OCONFIG_ALT4 (5 << 4)     /* used as alternate function 4 */
 #define IOMUX_OCONFIG_ALT5 (6 << 4)     /* used as alternate function 5 */
 #define IOMUX_OCONFIG_ALT6 (7 << 4)     /* used as alternate function 6 */
-#define IOMUX_ICONFIG_NONE  0           /* not configured for input */
+#define IOMUX_ICONFIG_NONE  0           /* not configured for input */
 #define IOMUX_ICONFIG_GPIO  1           /* used as GPIO */
 #define IOMUX_ICONFIG_FUNC  2           /* used as function */
 #define IOMUX_ICONFIG_ALT1  4           /* used as alternate function 1 */
@@ -167,11 +165,6 @@ int mxc_iomux_mode(unsigned int pin_mode);
         MXC_GPIO_IRQ_START)
 
 /*
- * The number of gpio devices among the pads
- */
-#define GPIO_PORT_MAX 3
-
-/*
  * This enumeration is constructed based on the Section
  * "sw_pad_ctl & sw_mux_ctl details" of the MX31 IC Spec. Each enumerated
  * value is constructed based on the rules described above.
@@ -633,40 +626,40 @@ enum iomux_pins {
 #define MX31_PIN_TXD2__GPIO1_28         IOMUX_MODE(MX31_PIN_TXD2, IOMUX_CONFIG_GPIO)
 #define MX31_PIN_CSI_D4__GPIO3_4        IOMUX_MODE(MX31_PIN_CSI_D4, IOMUX_CONFIG_GPIO)
 #define MX31_PIN_CSI_D5__GPIO3_5        IOMUX_MODE(MX31_PIN_CSI_D5, IOMUX_CONFIG_GPIO)
-#define MX31_PIN_USBOTG_DATA0__USBOTG_DATA0    IOMUX_MODE(MX31_PIN_USBOTG_DATA0, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBOTG_DATA1__USBOTG_DATA1    IOMUX_MODE(MX31_PIN_USBOTG_DATA1, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBOTG_DATA2__USBOTG_DATA2    IOMUX_MODE(MX31_PIN_USBOTG_DATA2, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBOTG_DATA3__USBOTG_DATA3    IOMUX_MODE(MX31_PIN_USBOTG_DATA3, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBOTG_DATA4__USBOTG_DATA4    IOMUX_MODE(MX31_PIN_USBOTG_DATA4, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBOTG_DATA5__USBOTG_DATA5    IOMUX_MODE(MX31_PIN_USBOTG_DATA5, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBOTG_DATA6__USBOTG_DATA6    IOMUX_MODE(MX31_PIN_USBOTG_DATA6, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBOTG_DATA7__USBOTG_DATA7    IOMUX_MODE(MX31_PIN_USBOTG_DATA7, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBOTG_CLK__USBOTG_CLK        IOMUX_MODE(MX31_PIN_USBOTG_CLK, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBOTG_DIR__USBOTG_DIR        IOMUX_MODE(MX31_PIN_USBOTG_DIR, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBOTG_NXT__USBOTG_NXT        IOMUX_MODE(MX31_PIN_USBOTG_NXT, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBOTG_STP__USBOTG_STP        IOMUX_MODE(MX31_PIN_USBOTG_STP, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_CSPI1_MOSI__USBH1_RXDM        IOMUX_MODE(MX31_PIN_CSPI1_MOSI, IOMUX_CONFIG_ALT1)
-#define MX31_PIN_CSPI1_MISO__USBH1_RXDP        IOMUX_MODE(MX31_PIN_CSPI1_MISO, IOMUX_CONFIG_ALT1)
-#define MX31_PIN_CSPI1_SS0__USBH1_TXDM         IOMUX_MODE(MX31_PIN_CSPI1_SS0,  IOMUX_CONFIG_ALT1)
-#define MX31_PIN_CSPI1_SS1__USBH1_TXDP         IOMUX_MODE(MX31_PIN_CSPI1_SS1,  IOMUX_CONFIG_ALT1)
-#define MX31_PIN_CSPI1_SS2__USBH1_RCV          IOMUX_MODE(MX31_PIN_CSPI1_SS2,  IOMUX_CONFIG_ALT1)
-#define MX31_PIN_CSPI1_SCLK__USBH1_OEB         IOMUX_MODE(MX31_PIN_CSPI1_SCLK, IOMUX_CONFIG_ALT1)
-#define MX31_PIN_CSPI1_SPI_RDY__USBH1_FS       IOMUX_MODE(MX31_PIN_CSPI1_SPI_RDY, IOMUX_CONFIG_ALT1)
+#define MX31_PIN_USBOTG_DATA0__USBOTG_DATA0     IOMUX_MODE(MX31_PIN_USBOTG_DATA0, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DATA1__USBOTG_DATA1     IOMUX_MODE(MX31_PIN_USBOTG_DATA1, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DATA2__USBOTG_DATA2     IOMUX_MODE(MX31_PIN_USBOTG_DATA2, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DATA3__USBOTG_DATA3     IOMUX_MODE(MX31_PIN_USBOTG_DATA3, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DATA4__USBOTG_DATA4     IOMUX_MODE(MX31_PIN_USBOTG_DATA4, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DATA5__USBOTG_DATA5     IOMUX_MODE(MX31_PIN_USBOTG_DATA5, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DATA6__USBOTG_DATA6     IOMUX_MODE(MX31_PIN_USBOTG_DATA6, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DATA7__USBOTG_DATA7     IOMUX_MODE(MX31_PIN_USBOTG_DATA7, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_CLK__USBOTG_CLK         IOMUX_MODE(MX31_PIN_USBOTG_CLK, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DIR__USBOTG_DIR         IOMUX_MODE(MX31_PIN_USBOTG_DIR, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_NXT__USBOTG_NXT         IOMUX_MODE(MX31_PIN_USBOTG_NXT, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_STP__USBOTG_STP         IOMUX_MODE(MX31_PIN_USBOTG_STP, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_CSPI1_MOSI__USBH1_RXDM         IOMUX_MODE(MX31_PIN_CSPI1_MOSI, IOMUX_CONFIG_ALT1)
+#define MX31_PIN_CSPI1_MISO__USBH1_RXDP         IOMUX_MODE(MX31_PIN_CSPI1_MISO, IOMUX_CONFIG_ALT1)
+#define MX31_PIN_CSPI1_SS0__USBH1_TXDM          IOMUX_MODE(MX31_PIN_CSPI1_SS0, IOMUX_CONFIG_ALT1)
+#define MX31_PIN_CSPI1_SS1__USBH1_TXDP          IOMUX_MODE(MX31_PIN_CSPI1_SS1, IOMUX_CONFIG_ALT1)
+#define MX31_PIN_CSPI1_SS2__USBH1_RCV           IOMUX_MODE(MX31_PIN_CSPI1_SS2, IOMUX_CONFIG_ALT1)
+#define MX31_PIN_CSPI1_SCLK__USBH1_OEB          IOMUX_MODE(MX31_PIN_CSPI1_SCLK, IOMUX_CONFIG_ALT1)
+#define MX31_PIN_CSPI1_SPI_RDY__USBH1_FS        IOMUX_MODE(MX31_PIN_CSPI1_SPI_RDY, IOMUX_CONFIG_ALT1)
 #define MX31_PIN_SFS6__USBH1_SUSPEND    IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_NFRE_B__GPIO1_11       IOMUX_MODE(MX31_PIN_NFRE_B, IOMUX_CONFIG_GPIO)
 #define MX31_PIN_NFALE__GPIO1_12        IOMUX_MODE(MX31_PIN_NFALE, IOMUX_CONFIG_GPIO)
-#define MX31_PIN_USBH2_DATA0__USBH2_DATA0      IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBH2_DATA1__USBH2_DATA1      IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBH2_DATA0__USBH2_DATA0       IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBH2_DATA1__USBH2_DATA1       IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_STXD3__USBH2_DATA2     IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_SRXD3__USBH2_DATA3     IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_SCK3__USBH2_DATA4      IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_SFS3__USBH2_DATA5      IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_STXD6__USBH2_DATA6     IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_SRXD6__USBH2_DATA7     IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBH2_CLK__USBH2_CLK          IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBH2_DIR__USBH2_DIR          IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBH2_NXT__USBH2_NXT          IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC)
-#define MX31_PIN_USBH2_STP__USBH2_STP          IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBH2_CLK__USBH2_CLK           IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBH2_DIR__USBH2_DIR           IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBH2_NXT__USBH2_NXT           IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBH2_STP__USBH2_STP           IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_SCK6__GPIO1_25         IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO)
 #define MX31_PIN_USB_OC__GPIO1_30       IOMUX_MODE(MX31_PIN_USB_OC, IOMUX_CONFIG_GPIO)
 #define MX31_PIN_I2C_DAT__I2C1_SDA      IOMUX_MODE(MX31_PIN_I2C_DAT, IOMUX_CONFIG_FUNC)
@@ -711,8 +704,8 @@ enum iomux_pins {
 #define MX31_PIN_DSR_DCE1__GPIO2_9      IOMUX_MODE(MX31_PIN_DSR_DCE1, IOMUX_CONFIG_GPIO)
 #define MX31_PIN_RI_DCE1__GPIO2_10      IOMUX_MODE(MX31_PIN_RI_DCE1, IOMUX_CONFIG_GPIO)
 #define MX31_PIN_DCD_DCE1__GPIO2_11     IOMUX_MODE(MX31_PIN_DCD_DCE1, IOMUX_CONFIG_GPIO)
-#define MX31_PIN_STXD5__GPIO1_21       IOMUX_MODE(MX31_PIN_STXD5, IOMUX_CONFIG_GPIO)
-#define MX31_PIN_SRXD5__GPIO1_22       IOMUX_MODE(MX31_PIN_SRXD5, IOMUX_CONFIG_GPIO)
+#define MX31_PIN_STXD5__GPIO1_21        IOMUX_MODE(MX31_PIN_STXD5, IOMUX_CONFIG_GPIO)
+#define MX31_PIN_SRXD5__GPIO1_22        IOMUX_MODE(MX31_PIN_SRXD5, IOMUX_CONFIG_GPIO)
 #define MX31_PIN_GPIO1_3__GPIO1_3       IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO)
 #define MX31_PIN_CSPI2_SS1__CSPI3_SS1   IOMUX_MODE(MX31_PIN_CSPI2_SS1, IOMUX_CONFIG_ALT1)
 #define MX31_PIN_RTS1__GPIO2_6          IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_GPIO)
@@ -727,13 +720,14 @@ enum iomux_pins {
 #define MX31_PIN_SCK5__SCK5             IOMUX_MODE(MX31_PIN_SCK5, IOMUX_CONFIG_FUNC)
 #define MX31_PIN_SFS5__SFS5             IOMUX_MODE(MX31_PIN_SFS5, IOMUX_CONFIG_FUNC)
 
-/*XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed by cspi2_ss0, cspi2_ss1, cspi1_ss0
- * cspi1_ss1*/
+/*
+ * XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed with cspi2_ss0,
+ * cspi2_ss1, cspi1_ss0 cspi1_ss1
+ */
 
 /*
  * This function configures the pad value for a IOMUX pin.
  */
 void mxc_iomux_set_pad(enum iomux_pins, u32);
 
-#endif
-
+#endif /* ifndef __MACH_IOMUX_MX3_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx35.h b/arch/arm/plat-mxc/include/mach/iomux-mx35.h
index c88d40795f7..2a24bae1b87 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx35.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx35.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (C, NO_PAD_CTRL) 2009 by Jan Weitzel Phytec Messtechnik GmbH <armlinux@phytec.de>
+ * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH <armlinux@phytec.de>
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx51.h b/arch/arm/plat-mxc/include/mach/iomux-mx51.h
new file mode 100644
index 00000000000..b4f975e6a66
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx51.h
@@ -0,0 +1,326 @@
+/*
+ * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#ifndef __MACH_IOMUX_MX51_H__
+#define __MACH_IOMUX_MX51_H__
+
+#include <mach/iomux-v3.h>
+
+/*
+ * various IOMUX alternate output functions (1-7)
+ */
+typedef enum iomux_config {
+        IOMUX_CONFIG_ALT0,
+        IOMUX_CONFIG_ALT1,
+        IOMUX_CONFIG_ALT2,
+        IOMUX_CONFIG_ALT3,
+        IOMUX_CONFIG_ALT4,
+        IOMUX_CONFIG_ALT5,
+        IOMUX_CONFIG_ALT6,
+        IOMUX_CONFIG_ALT7,
+        IOMUX_CONFIG_GPIO,      /* added to help user use GPIO mode */
+        IOMUX_CONFIG_SION = 0x1 << 4,   /* LOOPBACK:MUX SION bit */
+} iomux_pin_cfg_t;
+
+/* Pad control groupings */
+#define MX51_UART1_PAD_CTRL     (PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
+                                PAD_CTL_DSE_HIGH)
+#define MX51_UART2_PAD_CTRL     (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_DSE_HIGH | \
+                                PAD_CTL_SRE_FAST)
+#define MX51_UART3_PAD_CTRL     (PAD_CTL_PKE | PAD_CTL_DSE_HIGH | \
+                                PAD_CTL_SRE_FAST)
+
+/*
+ * The naming convention for the pad modes is MX51_PAD_<padname>__<padmode>
+ * If <padname> or <padmode> refers to a GPIO, it is named
+ * GPIO_<unit>_<num> see also iomux-v3.h
+ */
+
+/*
+ * FIXME: This was converted using scripts from existing Freescale code to
+ * this form used upstream. Need to verify the name format.
+ */
+
+/*                                              PAD      MUX   ALT INPSE PATH PADCTRL */
+
+#define MX51_PAD_GPIO_2_0__EIM_D16      IOMUX_PAD(0x3f0, 0x05c, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_1__EIM_D17      IOMUX_PAD(0x3f4, 0x060, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_2__EIM_D18      IOMUX_PAD(0x3f8, 0x064, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_3__EIM_D19      IOMUX_PAD(0x3fc, 0x068, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_4__EIM_D20      IOMUX_PAD(0x400, 0x06c, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_5__EIM_D21      IOMUX_PAD(0x404, 0x070, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_6__EIM_D22      IOMUX_PAD(0x408, 0x074, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_7__EIM_D23      IOMUX_PAD(0x40c, 0x078, 1, 0x0,   0, NO_PAD_CTRL)
+
+/* Babbage UART3 */
+#define MX51_PAD_EIM_D24__UART3_CTS     IOMUX_PAD(0x410, 0x07c, IOMUX_CONFIG_ALT3, 0x0, 0, MX51_UART3_PAD_CTRL)
+#define MX51_PAD_EIM_D25__UART3_RXD     IOMUX_PAD(0x414, 0x080, IOMUX_CONFIG_ALT3, 0x9f4, 0, MX51_UART3_PAD_CTRL)
+#define MX51_PAD_EIM_D26__UART3_TXD     IOMUX_PAD(0x418, 0x084, IOMUX_CONFIG_ALT3, 0x0, 0, MX51_UART3_PAD_CTRL)
+#define MX51_PAD_EIM_D27__UART3_RTS     IOMUX_PAD(0x41c, 0x088, IOMUX_CONFIG_ALT3, 0x9f0, 0, MX51_UART3_PAD_CTRL)
+
+#define MX51_PAD_EIM_D28__EIM_D28       IOMUX_PAD(0x420, 0x08c, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_D29__EIM_D29       IOMUX_PAD(0x424, 0x090, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_D30__EIM_D30       IOMUX_PAD(0x428, 0x094, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_D31__EIM_D31       IOMUX_PAD(0x42c, 0x09c, 0, 0x0,   0, NO_PAD_CTRL)
+
+#define MX51_PAD_GPIO_2_10__EIM_A16     IOMUX_PAD(0x430, 0x09c, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_11__EIM_A17     IOMUX_PAD(0x434, 0x0a0, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_12__EIM_A18     IOMUX_PAD(0x438, 0x0a4, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_13__EIM_A19     IOMUX_PAD(0x43c, 0x0a8, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_14__EIM_A20     IOMUX_PAD(0x440, 0x0ac, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_15__EIM_A21     IOMUX_PAD(0x444, 0x0b0, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_16__EIM_A22     IOMUX_PAD(0x448, 0x0b4, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_17__EIM_A23     IOMUX_PAD(0x44c, 0x0b8, 1, 0x0,   0, NO_PAD_CTRL)
+
+#define MX51_PAD_GPIO_2_18__EIM_A24     IOMUX_PAD(0x450, 0x0bc, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_19__EIM_A25     IOMUX_PAD(0x454, 0x0c0, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_20__EIM_A26     IOMUX_PAD(0x458, 0x0c4, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_21__EIM_A27     IOMUX_PAD(0x45c, 0x0c8, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_EB0__EIM_EB0       IOMUX_PAD(0x460, 0x0cc, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_EB1__EIM_EB1       IOMUX_PAD(0x464, 0x0d0, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_22__EIM_EB2     IOMUX_PAD(0x468, 0x0d4, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_23__EIM_EB3     IOMUX_PAD(0x46c, 0x0d8, 1, 0x0,   0, NO_PAD_CTRL)
+
+#define MX51_PAD_GPIO_2_24__EIM_OE      IOMUX_PAD(0x470, 0x0dc, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_25__EIM_CS0     IOMUX_PAD(0x474, 0x0e0, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_26__EIM_CS1     IOMUX_PAD(0x478, 0x0e4, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_27__EIM_CS2     IOMUX_PAD(0x47c, 0x0e8, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_28__EIM_CS3     IOMUX_PAD(0x480, 0x0ec, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_29__EIM_CS4     IOMUX_PAD(0x484, 0x0f0, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_30__EIM_CS5     IOMUX_PAD(0x488, 0x0f4, 1, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_2_31__EIM_DTACK   IOMUX_PAD(0x48c, 0x0f8, 1, 0x0,   0, NO_PAD_CTRL)
+
+#define MX51_PAD_GPIO_3_1__EIM_LBA      IOMUX_PAD(0x494, 0xFC, 1, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_2__EIM_CRE      IOMUX_PAD(0x4A0, 0x100, 1, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DRAM_CS1__DRAM_CS1     IOMUX_PAD(0x4D0, 0x104, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_3__NANDF_WE_B   IOMUX_PAD(0x4E4, 0x108, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_4__NANDF_RE_B   IOMUX_PAD(0x4E8, 0x10C, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_5__NANDF_ALE    IOMUX_PAD(0x4EC, 0x110, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_6__NANDF_CLE    IOMUX_PAD(0x4F0, 0x114, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_7__NANDF_WP_B   IOMUX_PAD(0x4F4, 0x118, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_8__NANDF_RB0    IOMUX_PAD(0x4F8, 0x11C, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_9__NANDF_RB1    IOMUX_PAD(0x4FC, 0x120, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_10__NANDF_RB2   IOMUX_PAD(0x500, 0x124, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_11__NANDF_RB3   IOMUX_PAD(0x504, 0x128, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_12__GPIO_NAND   IOMUX_PAD(0x514, 0x12C, 3, 0x0, 0, NO_PAD_CTRL)
+/* REVISIT: Not sure of these values
+
+  #define MX51_PAD_GPIO_1___NANDF_RB4   IOMUX_PAD(, , , 0x0, 0, NO_PAD_CTRL)
+  #define MX51_PAD_GPIO_3_13__NANDF_RB5 IOMUX_PAD(0x5D8, 0x130, 3, 0x0, 0, NO_PAD_CTRL)
+  #define MX51_PAD_GPIO_3_15__NANDF_RB7 IOMUX_PAD(0x5E0, 0x138, 3, 0x0, 0, NO_PAD_CTRL)
+*/
+#define MX51_PAD_GPIO_3_14__NANDF_RB6   IOMUX_PAD(0x5DC, 0x134, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_16__NANDF_CS0   IOMUX_PAD(0x518, 0x130, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_17__NANDF_CS1   IOMUX_PAD(0x51C, 0x134, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_18__NANDF_CS2   IOMUX_PAD(0x520, 0x138, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_19__NANDF_CS3   IOMUX_PAD(0x524, 0x13C, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_20__NANDF_CS4   IOMUX_PAD(0x528, 0x140, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_21__NANDF_CS5   IOMUX_PAD(0x52C, 0x144, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_22__NANDF_CS6   IOMUX_PAD(0x530, 0x148, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_23__NANDF_CS7   IOMUX_PAD(0x534, 0x14C, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_24__NANDF_RDY_INT       IOMUX_PAD(0x538, 0x150, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_25__NANDF_D15   IOMUX_PAD(0x53C, 0x154, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_26__NANDF_D14   IOMUX_PAD(0x540, 0x158, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_27__NANDF_D13   IOMUX_PAD(0x544, 0x15C, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_28__NANDF_D12   IOMUX_PAD(0x548, 0x160, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_29__NANDF_D11   IOMUX_PAD(0x54C, 0x164, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_30__NANDF_D10   IOMUX_PAD(0x550, 0x168, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_31__NANDF_D9    IOMUX_PAD(0x554, 0x16C, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_0__NANDF_D8     IOMUX_PAD(0x558, 0x170, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_1__NANDF_D7     IOMUX_PAD(0x55C, 0x174, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_2__NANDF_D6     IOMUX_PAD(0x560, 0x178, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_3__NANDF_D5     IOMUX_PAD(0x564, 0x17C, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_4__NANDF_D4     IOMUX_PAD(0x568, 0x180, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_5__NANDF_D3     IOMUX_PAD(0x56C, 0x184, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_6__NANDF_D2     IOMUX_PAD(0x570, 0x188, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_7__NANDF_D1     IOMUX_PAD(0x574, 0x18C, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_8__NANDF_D0     IOMUX_PAD(0x578, 0x190, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_12__CSI1_D8     IOMUX_PAD(0x57C, 0x194, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_13__CSI1_D9     IOMUX_PAD(0x580, 0x198, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_D10__CSI1_D10     IOMUX_PAD(0x584, 0x19C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_D11__CSI1_D11     IOMUX_PAD(0x588, 0x1A0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_D12__CSI1_D12     IOMUX_PAD(0x58C, 0x1A4, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_D13__CSI1_D13     IOMUX_PAD(0x590, 0x1A8, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_D14__CSI1_D14     IOMUX_PAD(0x594, 0x1AC, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_D15__CSI1_D15     IOMUX_PAD(0x598, 0x1B0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_D16__CSI1_D16     IOMUX_PAD(0x59C, 0x1B4, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_D17__CSI1_D17     IOMUX_PAD(0x5A0, 0x1B8, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_D18__CSI1_D18     IOMUX_PAD(0x5A4, 0x1BC, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_D19__CSI1_D19     IOMUX_PAD(0x5A8, 0x1C0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_VSYNC__CSI1_VSYNC IOMUX_PAD(0x5AC, 0x1C4, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_HSYNC__CSI1_HSYNC IOMUX_PAD(0x5B0, 0x1C8, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_PIXCLK__CSI1_PIXCLK       IOMUX_PAD(0x5B4, 0x0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_MCLK__CSI1_MCLK   IOMUX_PAD(0x5B8, 0x0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI1_PKE0__CSI1_PKE0   IOMUX_PAD(0x860, 0x0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_9__CSI2_D12     IOMUX_PAD(0x5BC, 0x1CC, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_10__CSI2_D13    IOMUX_PAD(0x5C0, 0x1D0, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_11__CSI2_D14    IOMUX_PAD(0x5C4, 0x1D4, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_12__CSI2_D15    IOMUX_PAD(0x5C8, 0x1D8, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_11__CSI2_D16    IOMUX_PAD(0x5CC, 0x1DC, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_12__CSI2_D17    IOMUX_PAD(0x5D0, 0x1E0, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_11__CSI2_D18    IOMUX_PAD(0x5D4, 0x1E4, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_12__CSI2_D19    IOMUX_PAD(0x5D8, 0x1E8, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_13__CSI2_VSYNC  IOMUX_PAD(0x5DC, 0x1EC, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_14__CSI2_HSYNC  IOMUX_PAD(0x5E0, 0x1F0, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_15__CSI2_PIXCLK IOMUX_PAD(0x5E4, 0x1F4, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_CSI2_PKE0__CSI2_PKE0   IOMUX_PAD(0x81C, 0x0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_16__I2C1_CLK    IOMUX_PAD(0x5E8, 0x1F8, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_17__I2C1_DAT    IOMUX_PAD(0x5EC, 0x1FC, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_18__AUD3_BB_TXD IOMUX_PAD(0x5F0, 0x200, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_19__AUD3_BB_RXD IOMUX_PAD(0x5F4, 0x204, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_20__AUD3_BB_CK  IOMUX_PAD(0x5F8, 0x208, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_21__AUD3_BB_FS  IOMUX_PAD(0x5FC, 0x20C, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_22__CSPI1_MOSI  IOMUX_PAD(0x600, 0x210, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_23__CSPI1_MISO  IOMUX_PAD(0x604, 0x214, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_24__CSPI1_SS0   IOMUX_PAD(0x608, 0x218, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_25__CSPI1_SS1   IOMUX_PAD(0x60C, 0x21C, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_26__CSPI1_RDY   IOMUX_PAD(0x610, 0x220, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_4_27__CSPI1_SCLK  IOMUX_PAD(0x614, 0x224, 3, 0x0, 0, NO_PAD_CTRL)
+
+/* Babbage UART1 */
+#define MX51_PAD_UART1_RXD__UART1_RXD   IOMUX_PAD(0x618, 0x228, IOMUX_CONFIG_ALT0, 0x9e4, 0, MX51_UART1_PAD_CTRL | PAD_CTL_SRE_FAST)
+#define MX51_PAD_UART1_TXD__UART1_TXD   IOMUX_PAD(0x61C, 0x22C, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_UART1_PAD_CTRL | PAD_CTL_SRE_FAST)
+#define MX51_PAD_UART1_RTS__UART1_RTS   IOMUX_PAD(0x620, 0x230, IOMUX_CONFIG_ALT0, 0x9e0, 0, MX51_UART1_PAD_CTRL)
+#define MX51_PAD_UART1_CTS__UART1_CTS   IOMUX_PAD(0x624, 0x234, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_UART1_PAD_CTRL)
+
+/* Babbage UART2 */
+#define MX51_PAD_UART2_RXD__UART2_RXD   IOMUX_PAD(0x628, 0x238, IOMUX_CONFIG_ALT0, 0x9ec, 2, MX51_UART2_PAD_CTRL)
+#define MX51_PAD_UART2_TXD__UART2_TXD   IOMUX_PAD(0x62C, 0x23C, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_UART2_PAD_CTRL)
+
+#define MX51_PAD_GPIO_1_22__UART3_RXD   IOMUX_PAD(0x630, 0x240, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_23__UART3_TXD   IOMUX_PAD(0x634, 0x244, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_24__OWIRE_LINE  IOMUX_PAD(0x638, 0x248, 3, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_KEY_ROW0__KEY_ROW0     IOMUX_PAD(0x63C, 0x24C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_KEY_ROW1__KEY_ROW1     IOMUX_PAD(0x640, 0x250, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_KEY_ROW2__KEY_ROW2     IOMUX_PAD(0x644, 0x254, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_KEY_ROW3__KEY_ROW3     IOMUX_PAD(0x648, 0x258, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_KEY_COL0__KEY_COL0     IOMUX_PAD(0x64C, 0x25C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_KEY_COL1__KEY_COL1     IOMUX_PAD(0x650, 0x260, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_KEY_COL2__KEY_COL2     IOMUX_PAD(0x654, 0x264, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_KEY_COL3__KEY_COL3     IOMUX_PAD(0x658, 0x268, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_KEY_COL4__KEY_COL4     IOMUX_PAD(0x65C, 0x26C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_KEY_COL5__KEY_COL5     IOMUX_PAD(0x660, 0x270, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_25__USBH1_CLK   IOMUX_PAD(0x678, 0x278, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_26__USBH1_DIR   IOMUX_PAD(0x67C, 0x27C, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_27__USBH1_STP   IOMUX_PAD(0x680, 0x280, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_28__USBH1_NXT   IOMUX_PAD(0x684, 0x284, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_11__USBH1_DATA0 IOMUX_PAD(0x688, 0x288, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_12__USBH1_DATA1 IOMUX_PAD(0x68C, 0x28C, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_13__USBH1_DATA2 IOMUX_PAD(0x690, 0x290, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_14__USBH1_DATA3 IOMUX_PAD(0x694, 0x294, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_15__USBH1_DATA4 IOMUX_PAD(0x698, 0x298, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_16__USBH1_DATA5 IOMUX_PAD(0x69C, 0x29C, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_17__USBH1_DATA6 IOMUX_PAD(0x6A0, 0x2A0, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_18__USBH1_DATA7 IOMUX_PAD(0x6A4, 0x2A4, 2, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_0__DI1_PIN11    IOMUX_PAD(0x6A8, 0x2A8, 4, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_1__DI1_PIN12    IOMUX_PAD(0x6AC, 0x2AC, 4, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_2__DI1_PIN13    IOMUX_PAD(0x6B0, 0x2B0, 4, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_3__DI1_D0_CS    IOMUX_PAD(0x6B4, 0x2B4, 4, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_4__DI1_D1_CS    IOMUX_PAD(0x6B8, 0x2B8, 4, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_5__DISPB2_SER_DIN       IOMUX_PAD(0x6BC, 0x2BC, 4, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_6__DISPB2_SER_DIO       IOMUX_PAD(0x6C0, 0x2C0, 4, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_7__DISPB2_SER_CLK       IOMUX_PAD(0x6C4, 0x2C4, 4, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_3_8__DISPB2_SER_RS        IOMUX_PAD(0x6C8, 0x2C8, 4, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT0__DISP1_DAT0 IOMUX_PAD(0x6CC, 0x2CC, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT1__DISP1_DAT1 IOMUX_PAD(0x6D0, 0x2D0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT2__DISP1_DAT2 IOMUX_PAD(0x6D4, 0x2D4, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT3__DISP1_DAT3 IOMUX_PAD(0x6D8, 0x2D8, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT4__DISP1_DAT4 IOMUX_PAD(0x6DC, 0x2DC, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT5__DISP1_DAT5 IOMUX_PAD(0x6E0, 0x2E0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT6__DISP1_DAT6 IOMUX_PAD(0x6E4, 0x2E4, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT7__DISP1_DAT7 IOMUX_PAD(0x6E8, 0x2E8, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT8__DISP1_DAT8 IOMUX_PAD(0x6EC, 0x2EC, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT9__DISP1_DAT9 IOMUX_PAD(0x6F0, 0x2F0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT10__DISP1_DAT10       IOMUX_PAD(0x6F4, 0x2F4, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT11__DISP1_DAT11       IOMUX_PAD(0x6F8, 0x2F8, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT12__DISP1_DAT12       IOMUX_PAD(0x6FC, 0x2FC, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT13__DISP1_DAT13       IOMUX_PAD(0x700, 0x300, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT14__DISP1_DAT14       IOMUX_PAD(0x704, 0x304, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT15__DISP1_DAT15       IOMUX_PAD(0x708, 0x308, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT16__DISP1_DAT16       IOMUX_PAD(0x70C, 0x30C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT17__DISP1_DAT17       IOMUX_PAD(0x710, 0x310, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT18__DISP1_DAT18       IOMUX_PAD(0x714, 0x314, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT19__DISP1_DAT19       IOMUX_PAD(0x718, 0x318, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT20__DISP1_DAT20       IOMUX_PAD(0x71C, 0x31C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT21__DISP1_DAT21       IOMUX_PAD(0x720, 0x320, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT22__DISP1_DAT22       IOMUX_PAD(0x724, 0x324, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP1_DAT23__DISP1_DAT23       IOMUX_PAD(0x728, 0x328, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI1_PIN3__DI1_PIN3     IOMUX_PAD(0x72C, 0x32C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI1_PIN2__DI1_PIN2     IOMUX_PAD(0x734, 0x330, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI_GP1__DI_GP1 IOMUX_PAD(0x73C, 0x334, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI_GP2__DI_GP2 IOMUX_PAD(0x740, 0x338, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI_GP3__DI_GP3 IOMUX_PAD(0x744, 0x33C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI2_PIN4__DI2_PIN4     IOMUX_PAD(0x748, 0x340, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI2_PIN2__DI2_PIN2     IOMUX_PAD(0x74C, 0x344, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI2_PIN3__DI2_PIN3     IOMUX_PAD(0x750, 0x348, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK     IOMUX_PAD(0x754, 0x34C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DI_GP4__DI_GP4 IOMUX_PAD(0x758, 0x350, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT0__DISP2_DAT0 IOMUX_PAD(0x75C, 0x354, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT1__DISP2_DAT1 IOMUX_PAD(0x760, 0x358, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT2__DISP2_DAT2 IOMUX_PAD(0x764, 0x35C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT3__DISP2_DAT3 IOMUX_PAD(0x768, 0x360, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT4__DISP2_DAT4 IOMUX_PAD(0x76C, 0x364, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT5__DISP2_DAT5 IOMUX_PAD(0x770, 0x368, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_19__DISP2_DAT6  IOMUX_PAD(0x774, 0x36C, 5, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_29__DISP2_DAT7  IOMUX_PAD(0x778, 0x370, 5, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_30__DISP2_DAT8  IOMUX_PAD(0x77C, 0x374, 5, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_31__DISP2_DAT9  IOMUX_PAD(0x780, 0x378, 5, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT10__DISP2_DAT10       IOMUX_PAD(0x784, 0x37C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT11__DISP2_DAT11       IOMUX_PAD(0x788, 0x380, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT12__DISP2_DAT12       IOMUX_PAD(0x78C, 0x384, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT13__DISP2_DAT13       IOMUX_PAD(0x790, 0x388, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT14__DISP2_DAT14       IOMUX_PAD(0x794, 0x38C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_DISP2_DAT15__DISP2_DAT15       IOMUX_PAD(0x798, 0x390, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD1_CMD__SD1_CMD       IOMUX_PAD(0x79C, 0x394, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD1_CLK__SD1_CLK       IOMUX_PAD(0x7A0, 0x398, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD1_DATA0__SD1_DATA0   IOMUX_PAD(0x7A4, 0x39C, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD1_DATA1__SD1_DATA1   IOMUX_PAD(0x7A8, 0x3A0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD1_DATA2__SD1_DATA2   IOMUX_PAD(0x7AC, 0x3A4, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD1_DATA3__SD1_DATA3   IOMUX_PAD(0x7B0, 0x3A8, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_0__GPIO1_0      IOMUX_PAD(0x7B4, 0x3AC, 1, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_1__GPIO1_1      IOMUX_PAD(0x7B8, 0x3B0, 1, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD2_CMD__SD2_CMD       IOMUX_PAD(0x7BC, 0x3B4, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD2_CLK__SD2_CLK       IOMUX_PAD(0x7C0, 0x3B8, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD2_DATA0__SD2_DATA0   IOMUX_PAD(0x7C4, 0x3BC, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD2_DATA1__SD2_DATA1   IOMUX_PAD(0x7C8, 0x3C0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD2_DATA2__SD2_DATA2   IOMUX_PAD(0x7CC, 0x3C4, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_SD2_DATA3__SD2_DATA3   IOMUX_PAD(0x7D0, 0x3C8, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_2__GPIO1_2      IOMUX_PAD(0x7D4, 0x3CC, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_3__GPIO1_3      IOMUX_PAD(0x7D8, 0x3D0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_PMIC_INT_REQ__PMIC_INT_REQ     IOMUX_PAD(0x7FC, 0x3D4, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_4__GPIO1_4      IOMUX_PAD(0x804, 0x3D8, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_5__GPIO1_5      IOMUX_PAD(0x808, 0x3DC, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_6__GPIO1_6      IOMUX_PAD(0x80C, 0x3E0, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_7__GPIO1_7      IOMUX_PAD(0x810, 0x3E4, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX51_PAD_GPIO_1_8__GPIO1_8      IOMUX_PAD(0x814, 0x3E8, 0, 0x0, 1, \
+                                                (PAD_CTL_SRE_SLOW | PAD_CTL_DSE_MED | PAD_CTL_PUS_100K_UP |  PAD_CTL_HYS))
+#define MX51_PAD_GPIO_1_9__GPIO1_9      IOMUX_PAD(0x818, 0x3EC, 0, 0x0, 0, NO_PAD_CTRL)
+
+/* EIM */
+#define MX51_PAD_EIM_DA0__EIM_DA0       IOMUX_PAD(0x7a8, 0x01c, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA1__EIM_DA1       IOMUX_PAD(0x7a8, 0x020, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA2__EIM_DA2       IOMUX_PAD(0x7a8, 0x024, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA3__EIM_DA3       IOMUX_PAD(0x7a8, 0x028, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA4__EIM_DA4       IOMUX_PAD(0x7ac, 0x02c, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA5__EIM_DA5       IOMUX_PAD(0x7ac, 0x030, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA6__EIM_DA6       IOMUX_PAD(0x7ac, 0x034, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA7__EIM_DA7       IOMUX_PAD(0x7ac, 0x038, 0, 0x0,   0, NO_PAD_CTRL)
+
+#define MX51_PAD_EIM_DA8__EIM_DA8       IOMUX_PAD(0x7b0, 0x03c, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA9__EIM_DA9       IOMUX_PAD(0x7b0, 0x040, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA10__EIM_DA10     IOMUX_PAD(0x7b0, 0x044, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA11__EIM_DA11     IOMUX_PAD(0x7b0, 0x048, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA12__EIM_DA12     IOMUX_PAD(0x7bc, 0x04c, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA13__EIM_DA13     IOMUX_PAD(0x7bc, 0x050, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA14__EIM_DA14     IOMUX_PAD(0x7bc, 0x054, 0, 0x0,   0, NO_PAD_CTRL)
+#define MX51_PAD_EIM_DA15__EIM_DA15     IOMUX_PAD(0x7bc, 0x058, 0, 0x0,   0, NO_PAD_CTRL)
+
+#endif /* __MACH_IOMUX_MX51_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v1.h b/arch/arm/plat-mxc/include/mach/iomux-v1.h
new file mode 100644
index 00000000000..884f5753f27
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/iomux-v1.h
@@ -0,0 +1,103 @@
+/*
+ * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
+ * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+#ifndef __MACH_IOMUX_V1_H__
+#define __MACH_IOMUX_V1_H__
+
+/*
+*  GPIO Module and I/O Multiplexer
+*  x = 0..3 for reg_A, reg_B, reg_C, reg_D
+*/
+#define MXC_DDIR(x)     (0x00 + ((x) << 8))
+#define MXC_OCR1(x)     (0x04 + ((x) << 8))
+#define MXC_OCR2(x)     (0x08 + ((x) << 8))
+#define MXC_ICONFA1(x)  (0x0c + ((x) << 8))
+#define MXC_ICONFA2(x)  (0x10 + ((x) << 8))
+#define MXC_ICONFB1(x)  (0x14 + ((x) << 8))
+#define MXC_ICONFB2(x)  (0x18 + ((x) << 8))
+#define MXC_DR(x)       (0x1c + ((x) << 8))
+#define MXC_GIUS(x)     (0x20 + ((x) << 8))
+#define MXC_SSR(x)      (0x24 + ((x) << 8))
+#define MXC_ICR1(x)     (0x28 + ((x) << 8))
+#define MXC_ICR2(x)     (0x2c + ((x) << 8))
+#define MXC_IMR(x)      (0x30 + ((x) << 8))
+#define MXC_ISR(x)      (0x34 + ((x) << 8))
+#define MXC_GPR(x)      (0x38 + ((x) << 8))
+#define MXC_SWR(x)      (0x3c + ((x) << 8))
+#define MXC_PUEN(x)     (0x40 + ((x) << 8))
+
+#define MX1_NUM_GPIO_PORT       4
+#define MX21_NUM_GPIO_PORT      6
+#define MX27_NUM_GPIO_PORT      6
+
+#define GPIO_PIN_MASK 0x1f
+
+#define GPIO_PORT_SHIFT 5
+#define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT)
+
+#define GPIO_PORTA      (0 << GPIO_PORT_SHIFT)
+#define GPIO_PORTB      (1 << GPIO_PORT_SHIFT)
+#define GPIO_PORTC      (2 << GPIO_PORT_SHIFT)
+#define GPIO_PORTD      (3 << GPIO_PORT_SHIFT)
+#define GPIO_PORTE      (4 << GPIO_PORT_SHIFT)
+#define GPIO_PORTF      (5 << GPIO_PORT_SHIFT)
+
+#define GPIO_OUT        (1 << 8)
+#define GPIO_IN         (0 << 8)
+#define GPIO_PUEN       (1 << 9)
+
+#define GPIO_PF         (1 << 10)
+#define GPIO_AF         (1 << 11)
+
+#define GPIO_OCR_SHIFT 12
+#define GPIO_OCR_MASK   (3 << GPIO_OCR_SHIFT)
+#define GPIO_AIN        (0 << GPIO_OCR_SHIFT)
+#define GPIO_BIN        (1 << GPIO_OCR_SHIFT)
+#define GPIO_CIN        (2 << GPIO_OCR_SHIFT)
+#define GPIO_GPIO       (3 << GPIO_OCR_SHIFT)
+
+#define GPIO_AOUT_SHIFT 14
+#define GPIO_AOUT_MASK  (3 << GPIO_AOUT_SHIFT)
+#define GPIO_AOUT       (0 << GPIO_AOUT_SHIFT)
+#define GPIO_AOUT_ISR   (1 << GPIO_AOUT_SHIFT)
+#define GPIO_AOUT_0     (2 << GPIO_AOUT_SHIFT)
+#define GPIO_AOUT_1     (3 << GPIO_AOUT_SHIFT)
+
+#define GPIO_BOUT_SHIFT 16
+#define GPIO_BOUT_MASK  (3 << GPIO_BOUT_SHIFT)
+#define GPIO_BOUT       (0 << GPIO_BOUT_SHIFT)
+#define GPIO_BOUT_ISR   (1 << GPIO_BOUT_SHIFT)
+#define GPIO_BOUT_0     (2 << GPIO_BOUT_SHIFT)
+#define GPIO_BOUT_1     (3 << GPIO_BOUT_SHIFT)
+
+/* decode irq number to use with IMR(x), ISR(x) and friends */
+#define IRQ_TO_REG(irq) ((irq - MXC_INTERNAL_IRQS) >> 5)
+
+#define IRQ_GPIOA(x)  (MXC_GPIO_IRQ_START + x)
+#define IRQ_GPIOB(x)  (IRQ_GPIOA(32) + x)
+#define IRQ_GPIOC(x)  (IRQ_GPIOB(32) + x)
+#define IRQ_GPIOD(x)  (IRQ_GPIOC(32) + x)
+#define IRQ_GPIOE(x)  (IRQ_GPIOD(32) + x)
+#define IRQ_GPIOF(x)  (IRQ_GPIOE(32) + x)
+
+extern int mxc_gpio_mode(int gpio_mode);
+extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
+                const char *label);
+extern void mxc_gpio_release_multiple_pins(const int *pin_list, int count);
+
+#endif /* __MACH_IOMUX_V1_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/plat-mxc/include/mach/iomux-v3.h
index 1deda018489..f2f73d31d5b 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-v3.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-v3.h
@@ -81,11 +81,13 @@ struct pad_desc {
 
 #define PAD_CTL_ODE                     (1 << 3)
 
-#define PAD_CTL_DSE_STANDARD            (0 << 1)
-#define PAD_CTL_DSE_HIGH                (1 << 1)
-#define PAD_CTL_DSE_MAX                 (2 << 1)
+#define PAD_CTL_DSE_LOW                 (0 << 1)
+#define PAD_CTL_DSE_MED                 (1 << 1)
+#define PAD_CTL_DSE_HIGH                (2 << 1)
+#define PAD_CTL_DSE_MAX                 (3 << 1)
 
 #define PAD_CTL_SRE_FAST                (1 << 0)
+#define PAD_CTL_SRE_SLOW                (0 << 0)
 
 /*
  * setups a single pad in the iomuxer
diff --git a/arch/arm/plat-mxc/include/mach/iomux.h b/arch/arm/plat-mxc/include/mach/iomux.h
index 011cfcd8b82..3d226d7e7be 100644
--- a/arch/arm/plat-mxc/include/mach/iomux.h
+++ b/arch/arm/plat-mxc/include/mach/iomux.h
@@ -1,102 +1,14 @@
 /*
-* Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
-* Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License
-* as published by the Free Software Foundation; either version 2
-* of the License, or (at your option) any later version.
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
-* MA 02110-1301, USA.
-*/
-
-#ifndef _MXC_IOMUX_H
-#define _MXC_IOMUX_H
-
-/*
-*  GPIO Module and I/O Multiplexer
-*  x = 0..3 for reg_A, reg_B, reg_C, reg_D
-*/
-#define VA_GPIO_BASE    IO_ADDRESS(GPIO_BASE_ADDR)
-#define MXC_DDIR(x)    (0x00 + ((x) << 8))
-#define MXC_OCR1(x)    (0x04 + ((x) << 8))
-#define MXC_OCR2(x)    (0x08 + ((x) << 8))
-#define MXC_ICONFA1(x) (0x0c + ((x) << 8))
-#define MXC_ICONFA2(x) (0x10 + ((x) << 8))
-#define MXC_ICONFB1(x) (0x14 + ((x) << 8))
-#define MXC_ICONFB2(x) (0x18 + ((x) << 8))
-#define MXC_DR(x)      (0x1c + ((x) << 8))
-#define MXC_GIUS(x)    (0x20 + ((x) << 8))
-#define MXC_SSR(x)     (0x24 + ((x) << 8))
-#define MXC_ICR1(x)    (0x28 + ((x) << 8))
-#define MXC_ICR2(x)    (0x2c + ((x) << 8))
-#define MXC_IMR(x)     (0x30 + ((x) << 8))
-#define MXC_ISR(x)     (0x34 + ((x) << 8))
-#define MXC_GPR(x)     (0x38 + ((x) << 8))
-#define MXC_SWR(x)     (0x3c + ((x) << 8))
-#define MXC_PUEN(x)    (0x40 + ((x) << 8))
-
-#ifdef CONFIG_ARCH_MX1
-# define GPIO_PORT_MAX  3
-#endif
-#ifdef CONFIG_ARCH_MX2
-# define GPIO_PORT_MAX  5
-#endif
-#ifdef CONFIG_ARCH_MX25
-# define GPIO_PORT_MAX  3
-#endif
-
-#ifndef GPIO_PORT_MAX
-# error "GPIO config port count unknown!"
-#endif
-
-#define GPIO_PIN_MASK 0x1f
-
-#define GPIO_PORT_SHIFT 5
-#define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT)
-
-#define GPIO_PORTA (0 << GPIO_PORT_SHIFT)
-#define GPIO_PORTB (1 << GPIO_PORT_SHIFT)
-#define GPIO_PORTC (2 << GPIO_PORT_SHIFT)
-#define GPIO_PORTD (3 << GPIO_PORT_SHIFT)
-#define GPIO_PORTE (4 << GPIO_PORT_SHIFT)
-#define GPIO_PORTF (5 << GPIO_PORT_SHIFT)
-
-#define GPIO_OUT   (1 << 8)
-#define GPIO_IN    (0 << 8)
-#define GPIO_PUEN  (1 << 9)
-
-#define GPIO_PF    (1 << 10)
-#define GPIO_AF    (1 << 11)
-
-#define GPIO_OCR_SHIFT 12
-#define GPIO_OCR_MASK (3 << GPIO_OCR_SHIFT)
-#define GPIO_AIN   (0 << GPIO_OCR_SHIFT)
-#define GPIO_BIN   (1 << GPIO_OCR_SHIFT)
-#define GPIO_CIN   (2 << GPIO_OCR_SHIFT)
-#define GPIO_GPIO  (3 << GPIO_OCR_SHIFT)
-
-#define GPIO_AOUT_SHIFT 14
-#define GPIO_AOUT_MASK (3 << GPIO_AOUT_SHIFT)
-#define GPIO_AOUT     (0 << GPIO_AOUT_SHIFT)
-#define GPIO_AOUT_ISR (1 << GPIO_AOUT_SHIFT)
-#define GPIO_AOUT_0   (2 << GPIO_AOUT_SHIFT)
-#define GPIO_AOUT_1   (3 << GPIO_AOUT_SHIFT)
-
-#define GPIO_BOUT_SHIFT 16
-#define GPIO_BOUT_MASK (3 << GPIO_BOUT_SHIFT)
-#define GPIO_BOUT      (0 << GPIO_BOUT_SHIFT)
-#define GPIO_BOUT_ISR  (1 << GPIO_BOUT_SHIFT)
-#define GPIO_BOUT_0    (2 << GPIO_BOUT_SHIFT)
-#define GPIO_BOUT_1    (3 << GPIO_BOUT_SHIFT)
+ * Copyright (C) 2010 Uwe Kleine-Koenig, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#ifndef __MACH_IOMUX_H__
+#define __MACH_IOMUX_H__
 
+/* This file will go away, please include mach/iomux-mx... directly */
 
 #ifdef CONFIG_ARCH_MX1
 #include <mach/iomux-mx1.h>
@@ -110,25 +22,5 @@
 #include <mach/iomux-mx27.h>
 #endif
 #endif
-#ifdef CONFIG_ARCH_MX25
-#include <mach/iomux-mx25.h>
-#endif
 
-
-/* decode irq number to use with IMR(x), ISR(x) and friends */
-#define IRQ_TO_REG(irq) ((irq - MXC_INTERNAL_IRQS) >> 5)
-
-#define IRQ_GPIOA(x)  (MXC_GPIO_IRQ_START + x)
-#define IRQ_GPIOB(x)  (IRQ_GPIOA(32) + x)
-#define IRQ_GPIOC(x)  (IRQ_GPIOB(32) + x)
-#define IRQ_GPIOD(x)  (IRQ_GPIOC(32) + x)
-#define IRQ_GPIOE(x)  (IRQ_GPIOD(32) + x)
-#define IRQ_GPIOF(x)  (IRQ_GPIOE(32) + x)
-
-
-extern void mxc_gpio_mode(int gpio_mode);
-extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
-        const char *label);
-extern void mxc_gpio_release_multiple_pins(const int *pin_list, int count);
-
-#endif
+#endif /* __MACH_IOMUX_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h
index 0cb347645db..86781f7b0c0 100644
--- a/arch/arm/plat-mxc/include/mach/irqs.h
+++ b/arch/arm/plat-mxc/include/mach/irqs.h
@@ -12,22 +12,29 @@
 #define __ASM_ARCH_MXC_IRQS_H__
 
 /*
- * So far all i.MX SoCs have 64 internal interrupts
+ * SoCs with TZIC interrupt controller have 128 IRQs, those with AVIC have 64
  */
+#ifdef CONFIG_MXC_TZIC
+#define MXC_INTERNAL_IRQS       128
+#else
 #define MXC_INTERNAL_IRQS       64
+#endif
 
 #define MXC_GPIO_IRQ_START      MXC_INTERNAL_IRQS
 
-#if defined CONFIG_ARCH_MX1
-#define MXC_GPIO_IRQS           (32 * 4)
-#elif defined CONFIG_ARCH_MX2
+/* these are ordered by size to support multi-SoC kernels */
+#if defined CONFIG_ARCH_MX2
 #define MXC_GPIO_IRQS           (32 * 6)
-#elif defined CONFIG_ARCH_MX3
-#define MXC_GPIO_IRQS           (32 * 3)
+#elif defined CONFIG_ARCH_MX1
+#define MXC_GPIO_IRQS           (32 * 4)
 #elif defined CONFIG_ARCH_MX25
 #define MXC_GPIO_IRQS           (32 * 4)
+#elif defined CONFIG_ARCH_MX5
+#define MXC_GPIO_IRQS           (32 * 4)
 #elif defined CONFIG_ARCH_MXC91231
 #define MXC_GPIO_IRQS           (32 * 4)
+#elif defined CONFIG_ARCH_MX3
+#define MXC_GPIO_IRQS           (32 * 3)
 #endif
 
 /*
@@ -51,6 +58,7 @@
 #else
 #define MX3_IPU_IRQS 0
 #endif
+/* REVISIT: Add IPU irqs on IMX51 */
 
 #define NR_IRQS                 (MXC_IPU_IRQ_START + MX3_IPU_IRQS)
 
diff --git a/arch/arm/plat-mxc/include/mach/memory.h b/arch/arm/plat-mxc/include/mach/memory.h
index d3afafdcc0e..c4b40c35a6a 100644
--- a/arch/arm/plat-mxc/include/mach/memory.h
+++ b/arch/arm/plat-mxc/include/mach/memory.h
@@ -11,37 +11,45 @@
 #ifndef __ASM_ARCH_MXC_MEMORY_H__
 #define __ASM_ARCH_MXC_MEMORY_H__
 
-#if defined CONFIG_ARCH_MX1
-#define PHYS_OFFSET             UL(0x08000000)
-#elif defined CONFIG_ARCH_MX2
-#ifdef CONFIG_MACH_MX21
-#define PHYS_OFFSET             UL(0xC0000000)
-#endif
-#ifdef CONFIG_MACH_MX27
-#define PHYS_OFFSET             UL(0xA0000000)
-#endif
-#elif defined CONFIG_ARCH_MX3
-#define PHYS_OFFSET             UL(0x80000000)
-#elif defined CONFIG_ARCH_MX25
-#define PHYS_OFFSET             UL(0x80000000)
-#elif defined CONFIG_ARCH_MXC91231
-#define PHYS_OFFSET             UL(0x90000000)
+#define MX1_PHYS_OFFSET         UL(0x08000000)
+#define MX21_PHYS_OFFSET        UL(0xc0000000)
+#define MX25_PHYS_OFFSET        UL(0x80000000)
+#define MX27_PHYS_OFFSET        UL(0xa0000000)
+#define MX3x_PHYS_OFFSET        UL(0x80000000)
+#define MX51_PHYS_OFFSET        UL(0x90000000)
+#define MXC91231_PHYS_OFFSET    UL(0x90000000)
+
+#if !defined(CONFIG_RUNTIME_PHYS_OFFSET)
+# if defined CONFIG_ARCH_MX1
+#  define PHYS_OFFSET           MX1_PHYS_OFFSET
+# elif defined CONFIG_MACH_MX21
+#  define PHYS_OFFSET           MX21_PHYS_OFFSET
+# elif defined CONFIG_ARCH_MX25
+#  define PHYS_OFFSET           MX25_PHYS_OFFSET
+# elif defined CONFIG_MACH_MX27
+#  define PHYS_OFFSET           MX27_PHYS_OFFSET
+# elif defined CONFIG_ARCH_MX3
+#  define PHYS_OFFSET           MX3x_PHYS_OFFSET
+# elif defined CONFIG_ARCH_MXC91231
+#  define PHYS_OFFSET           MXC91231_PHYS_OFFSET
+# elif defined CONFIG_ARCH_MX5
+#  define PHYS_OFFSET           MX51_PHYS_OFFSET
+# endif
 #endif
 
-#if defined(CONFIG_MX1_VIDEO)
+#if defined(CONFIG_MX3_VIDEO)
 /*
  * Increase size of DMA-consistent memory region.
- * This is required for i.MX camera driver to capture at least four VGA frames.
+ * This is required for mx3 camera driver to capture at least two QXGA frames.
  */
-#define CONSISTENT_DMA_SIZE SZ_4M
-#endif /* CONFIG_MX1_VIDEO */
+#define CONSISTENT_DMA_SIZE SZ_8M
 
-#if defined(CONFIG_MX3_VIDEO)
+#elif defined(CONFIG_MX1_VIDEO)
 /*
  * Increase size of DMA-consistent memory region.
- * This is required for mx3 camera driver to capture at least two QXGA frames.
+ * This is required for i.MX camera driver to capture at least four VGA frames.
  */
-#define CONSISTENT_DMA_SIZE SZ_8M
-#endif /* CONFIG_MX3_VIDEO */
+#define CONSISTENT_DMA_SIZE SZ_4M
+#endif /* CONFIG_MX1_VIDEO */
 
 #endif /* __ASM_ARCH_MXC_MEMORY_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mtd-xip.h b/arch/arm/plat-mxc/include/mach/mtd-xip.h
deleted file mode 100644
index 1ab1bba5688..00000000000
--- a/arch/arm/plat-mxc/include/mach/mtd-xip.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * MTD primitives for XIP support. Architecture specific functions
- *
- * Do not include this file directly. It's included from linux/mtd/xip.h
- *
- * Copyright (C) 2008 Darius Augulis <augulis.darius@gmail.com>, Teltonika, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#include <mach/mxc_timer.h>
-
-#ifndef __ARCH_IMX_MTD_XIP_H__
-#define __ARCH_IMX_MTD_XIP_H__
-
-#ifdef CONFIG_ARCH_MX1
-/* AITC registers */
-#define AITC_BASE       IO_ADDRESS(AVIC_BASE_ADDR)
-#define NIPNDH          (AITC_BASE + 0x58)
-#define NIPNDL          (AITC_BASE + 0x5C)
-#define INTENABLEH      (AITC_BASE + 0x10)
-#define INTENABLEL      (AITC_BASE + 0x14)
-/* MTD macros */
-#define xip_irqpending() ((__raw_readl(INTENABLEH) &  __raw_readl(NIPNDH)) \
-                        || (__raw_readl(INTENABLEL) &  __raw_readl(NIPNDL)))
-#define xip_currtime()          (__raw_readl(TIMER_BASE + MXC_TCN))
-#define xip_elapsed_since(x)    (signed)((__raw_readl(TIMER_BASE + MXC_TCN) - (x)) / 96)
-#define xip_cpu_idle()          asm volatile ("mcr p15, 0, %0, c7, c0, 4" :: "r" (0))
-#endif /* CONFIG_ARCH_MX1 */
-
-#endif /* __ARCH_IMX_MTD_XIP_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h
index 1b2890a5c45..5eba7e6785d 100644
--- a/arch/arm/plat-mxc/include/mach/mx1.h
+++ b/arch/arm/plat-mxc/include/mach/mx1.h
@@ -9,156 +9,289 @@
  * published by the Free Software Foundation.
  */
 
-#ifndef __ASM_ARCH_MXC_MX1_H__
-#define __ASM_ARCH_MXC_MX1_H__
+#ifndef __MACH_MX1_H__
+#define __MACH_MX1_H__
 
 #include <mach/vmalloc.h>
 
 /*
  * Memory map
  */
-#define IMX_IO_PHYS     0x00200000
-#define IMX_IO_SIZE     0x00100000
-#define IMX_IO_BASE     VMALLOC_END
+#define MX1_IO_BASE_ADDR        0x00200000
+#define MX1_IO_SIZE             SZ_1M
+#define MX1_IO_BASE_ADDR_VIRT   VMALLOC_END
 
-#define IMX_CS0_PHYS    0x10000000
-#define IMX_CS0_SIZE    0x02000000
+#define MX1_CS0_PHYS            0x10000000
+#define MX1_CS0_SIZE            0x02000000
 
-#define IMX_CS1_PHYS    0x12000000
-#define IMX_CS1_SIZE    0x01000000
+#define MX1_CS1_PHYS            0x12000000
+#define MX1_CS1_SIZE            0x01000000
 
-#define IMX_CS2_PHYS    0x13000000
-#define IMX_CS2_SIZE    0x01000000
+#define MX1_CS2_PHYS            0x13000000
+#define MX1_CS2_SIZE            0x01000000
 
-#define IMX_CS3_PHYS    0x14000000
-#define IMX_CS3_SIZE    0x01000000
+#define MX1_CS3_PHYS            0x14000000
+#define MX1_CS3_SIZE            0x01000000
 
-#define IMX_CS4_PHYS    0x15000000
-#define IMX_CS4_SIZE    0x01000000
+#define MX1_CS4_PHYS            0x15000000
+#define MX1_CS4_SIZE            0x01000000
 
-#define IMX_CS5_PHYS    0x16000000
-#define IMX_CS5_SIZE    0x01000000
+#define MX1_CS5_PHYS            0x16000000
+#define MX1_CS5_SIZE            0x01000000
 
 /*
  *  Register BASEs, based on OFFSETs
  */
-#define AIPI1_BASE_ADDR         (0x00000 + IMX_IO_PHYS)
-#define WDT_BASE_ADDR           (0x01000 + IMX_IO_PHYS)
-#define TIM1_BASE_ADDR          (0x02000 + IMX_IO_PHYS)
-#define TIM2_BASE_ADDR          (0x03000 + IMX_IO_PHYS)
-#define RTC_BASE_ADDR           (0x04000 + IMX_IO_PHYS)
-#define LCDC_BASE_ADDR          (0x05000 + IMX_IO_PHYS)
-#define UART1_BASE_ADDR         (0x06000 + IMX_IO_PHYS)
-#define UART2_BASE_ADDR         (0x07000 + IMX_IO_PHYS)
-#define PWM_BASE_ADDR           (0x08000 + IMX_IO_PHYS)
-#define DMA_BASE_ADDR           (0x09000 + IMX_IO_PHYS)
-#define AIPI2_BASE_ADDR         (0x10000 + IMX_IO_PHYS)
-#define SIM_BASE_ADDR           (0x11000 + IMX_IO_PHYS)
-#define USBD_BASE_ADDR          (0x12000 + IMX_IO_PHYS)
-#define SPI1_BASE_ADDR          (0x13000 + IMX_IO_PHYS)
-#define MMC_BASE_ADDR           (0x14000 + IMX_IO_PHYS)
-#define ASP_BASE_ADDR           (0x15000 + IMX_IO_PHYS)
-#define BTA_BASE_ADDR           (0x16000 + IMX_IO_PHYS)
-#define I2C_BASE_ADDR           (0x17000 + IMX_IO_PHYS)
-#define SSI_BASE_ADDR           (0x18000 + IMX_IO_PHYS)
-#define SPI2_BASE_ADDR          (0x19000 + IMX_IO_PHYS)
-#define MSHC_BASE_ADDR          (0x1A000 + IMX_IO_PHYS)
-#define CCM_BASE_ADDR           (0x1B000 + IMX_IO_PHYS)
-#define SCM_BASE_ADDR           (0x1B804 + IMX_IO_PHYS)
-#define GPIO_BASE_ADDR          (0x1C000 + IMX_IO_PHYS)
-#define EIM_BASE_ADDR           (0x20000 + IMX_IO_PHYS)
-#define SDRAMC_BASE_ADDR        (0x21000 + IMX_IO_PHYS)
-#define MMA_BASE_ADDR           (0x22000 + IMX_IO_PHYS)
-#define AVIC_BASE_ADDR          (0x23000 + IMX_IO_PHYS)
-#define CSI_BASE_ADDR           (0x24000 + IMX_IO_PHYS)
+#define MX1_AIPI1_BASE_ADDR             (0x00000 + MX1_IO_BASE_ADDR)
+#define MX1_WDT_BASE_ADDR               (0x01000 + MX1_IO_BASE_ADDR)
+#define MX1_TIM1_BASE_ADDR              (0x02000 + MX1_IO_BASE_ADDR)
+#define MX1_TIM2_BASE_ADDR              (0x03000 + MX1_IO_BASE_ADDR)
+#define MX1_RTC_BASE_ADDR               (0x04000 + MX1_IO_BASE_ADDR)
+#define MX1_LCDC_BASE_ADDR              (0x05000 + MX1_IO_BASE_ADDR)
+#define MX1_UART1_BASE_ADDR             (0x06000 + MX1_IO_BASE_ADDR)
+#define MX1_UART2_BASE_ADDR             (0x07000 + MX1_IO_BASE_ADDR)
+#define MX1_PWM_BASE_ADDR               (0x08000 + MX1_IO_BASE_ADDR)
+#define MX1_DMA_BASE_ADDR               (0x09000 + MX1_IO_BASE_ADDR)
+#define MX1_AIPI2_BASE_ADDR             (0x10000 + MX1_IO_BASE_ADDR)
+#define MX1_SIM_BASE_ADDR               (0x11000 + MX1_IO_BASE_ADDR)
+#define MX1_USBD_BASE_ADDR              (0x12000 + MX1_IO_BASE_ADDR)
+#define MX1_SPI1_BASE_ADDR              (0x13000 + MX1_IO_BASE_ADDR)
+#define MX1_MMC_BASE_ADDR               (0x14000 + MX1_IO_BASE_ADDR)
+#define MX1_ASP_BASE_ADDR               (0x15000 + MX1_IO_BASE_ADDR)
+#define MX1_BTA_BASE_ADDR               (0x16000 + MX1_IO_BASE_ADDR)
+#define MX1_I2C_BASE_ADDR               (0x17000 + MX1_IO_BASE_ADDR)
+#define MX1_SSI_BASE_ADDR               (0x18000 + MX1_IO_BASE_ADDR)
+#define MX1_SPI2_BASE_ADDR              (0x19000 + MX1_IO_BASE_ADDR)
+#define MX1_MSHC_BASE_ADDR              (0x1A000 + MX1_IO_BASE_ADDR)
+#define MX1_CCM_BASE_ADDR               (0x1B000 + MX1_IO_BASE_ADDR)
+#define MX1_SCM_BASE_ADDR               (0x1B804 + MX1_IO_BASE_ADDR)
+#define MX1_GPIO_BASE_ADDR              (0x1C000 + MX1_IO_BASE_ADDR)
+#define MX1_EIM_BASE_ADDR               (0x20000 + MX1_IO_BASE_ADDR)
+#define MX1_SDRAMC_BASE_ADDR            (0x21000 + MX1_IO_BASE_ADDR)
+#define MX1_MMA_BASE_ADDR               (0x22000 + MX1_IO_BASE_ADDR)
+#define MX1_AVIC_BASE_ADDR              (0x23000 + MX1_IO_BASE_ADDR)
+#define MX1_CSI_BASE_ADDR               (0x24000 + MX1_IO_BASE_ADDR)
 
 /* macro to get at IO space when running virtually */
-#define IO_ADDRESS(x)   ((x) - IMX_IO_PHYS + IMX_IO_BASE)
-
-/* define macros needed for entry-macro.S */
-#define AVIC_IO_ADDRESS(x)      IO_ADDRESS(x)
+#define MX1_IO_ADDRESS(x) (                                             \
+        IMX_IO_ADDRESS(x, MX1_IO))
 
 /* fixed interrput numbers */
-#define INT_SOFTINT             0
-#define CSI_INT                 6
-#define DSPA_MAC_INT            7
-#define DSPA_INT                8
-#define COMP_INT                9
-#define MSHC_XINT               10
-#define GPIO_INT_PORTA          11
-#define GPIO_INT_PORTB          12
-#define GPIO_INT_PORTC          13
-#define LCDC_INT                14
-#define SIM_INT                 15
-#define SIM_DATA_INT            16
-#define RTC_INT                 17
-#define RTC_SAMINT              18
-#define UART2_MINT_PFERR        19
-#define UART2_MINT_RTS          20
-#define UART2_MINT_DTR          21
-#define UART2_MINT_UARTC        22
-#define UART2_MINT_TX           23
-#define UART2_MINT_RX           24
-#define UART1_MINT_PFERR        25
-#define UART1_MINT_RTS          26
-#define UART1_MINT_DTR          27
-#define UART1_MINT_UARTC        28
-#define UART1_MINT_TX           29
-#define UART1_MINT_RX           30
-#define VOICE_DAC_INT           31
-#define VOICE_ADC_INT           32
-#define PEN_DATA_INT            33
-#define PWM_INT                 34
-#define SDHC_INT                35
-#define I2C_INT                 39
-#define CSPI_INT                41
-#define SSI_TX_INT              42
-#define SSI_TX_ERR_INT          43
-#define SSI_RX_INT              44
-#define SSI_RX_ERR_INT          45
-#define TOUCH_INT               46
-#define USBD_INT0               47
-#define USBD_INT1               48
-#define USBD_INT2               49
-#define USBD_INT3               50
-#define USBD_INT4               51
-#define USBD_INT5               52
-#define USBD_INT6               53
-#define BTSYS_INT               55
-#define BTTIM_INT               56
-#define BTWUI_INT               57
-#define TIM2_INT                58
-#define TIM1_INT                59
-#define DMA_ERR                 60
-#define DMA_INT                 61
-#define GPIO_INT_PORTD          62
-#define WDT_INT                 63
+#define MX1_INT_SOFTINT         0
+#define MX1_CSI_INT             6
+#define MX1_DSPA_MAC_INT        7
+#define MX1_DSPA_INT            8
+#define MX1_COMP_INT            9
+#define MX1_MSHC_XINT           10
+#define MX1_GPIO_INT_PORTA      11
+#define MX1_GPIO_INT_PORTB      12
+#define MX1_GPIO_INT_PORTC      13
+#define MX1_LCDC_INT            14
+#define MX1_SIM_INT             15
+#define MX1_SIM_DATA_INT        16
+#define MX1_RTC_INT             17
+#define MX1_RTC_SAMINT          18
+#define MX1_UART2_MINT_PFERR    19
+#define MX1_UART2_MINT_RTS      20
+#define MX1_UART2_MINT_DTR      21
+#define MX1_UART2_MINT_UARTC    22
+#define MX1_UART2_MINT_TX       23
+#define MX1_UART2_MINT_RX       24
+#define MX1_UART1_MINT_PFERR    25
+#define MX1_UART1_MINT_RTS      26
+#define MX1_UART1_MINT_DTR      27
+#define MX1_UART1_MINT_UARTC    28
+#define MX1_UART1_MINT_TX       29
+#define MX1_UART1_MINT_RX       30
+#define MX1_VOICE_DAC_INT       31
+#define MX1_VOICE_ADC_INT       32
+#define MX1_PEN_DATA_INT        33
+#define MX1_PWM_INT             34
+#define MX1_SDHC_INT            35
+#define MX1_I2C_INT             39
+#define MX1_CSPI_INT            41
+#define MX1_SSI_TX_INT          42
+#define MX1_SSI_TX_ERR_INT      43
+#define MX1_SSI_RX_INT          44
+#define MX1_SSI_RX_ERR_INT      45
+#define MX1_TOUCH_INT           46
+#define MX1_USBD_INT0           47
+#define MX1_USBD_INT1           48
+#define MX1_USBD_INT2           49
+#define MX1_USBD_INT3           50
+#define MX1_USBD_INT4           51
+#define MX1_USBD_INT5           52
+#define MX1_USBD_INT6           53
+#define MX1_BTSYS_INT           55
+#define MX1_BTTIM_INT           56
+#define MX1_BTWUI_INT           57
+#define MX1_TIM2_INT            58
+#define MX1_TIM1_INT            59
+#define MX1_DMA_ERR             60
+#define MX1_DMA_INT             61
+#define MX1_GPIO_INT_PORTD      62
+#define MX1_WDT_INT             63
 
 /* DMA */
-#define DMA_REQ_UART3_T         2
-#define DMA_REQ_UART3_R         3
-#define DMA_REQ_SSI2_T          4
-#define DMA_REQ_SSI2_R          5
-#define DMA_REQ_CSI_STAT        6
-#define DMA_REQ_CSI_R           7
-#define DMA_REQ_MSHC            8
-#define DMA_REQ_DSPA_DCT_DOUT   9
-#define DMA_REQ_DSPA_DCT_DIN    10
-#define DMA_REQ_DSPA_MAC        11
-#define DMA_REQ_EXT             12
-#define DMA_REQ_SDHC            13
-#define DMA_REQ_SPI1_R          14
-#define DMA_REQ_SPI1_T          15
-#define DMA_REQ_SSI_T           16
-#define DMA_REQ_SSI_R           17
-#define DMA_REQ_ASP_DAC         18
-#define DMA_REQ_ASP_ADC         19
-#define DMA_REQ_USP_EP(x)       (20 + (x))
-#define DMA_REQ_SPI2_R          26
-#define DMA_REQ_SPI2_T          27
-#define DMA_REQ_UART2_T         28
-#define DMA_REQ_UART2_R         29
-#define DMA_REQ_UART1_T         30
-#define DMA_REQ_UART1_R         31
-
-#endif /*  __ASM_ARCH_MXC_MX1_H__ */
+#define MX1_DMA_REQ_UART3_T             2
+#define MX1_DMA_REQ_UART3_R             3
+#define MX1_DMA_REQ_SSI2_T              4
+#define MX1_DMA_REQ_SSI2_R              5
+#define MX1_DMA_REQ_CSI_STAT            6
+#define MX1_DMA_REQ_CSI_R               7
+#define MX1_DMA_REQ_MSHC                8
+#define MX1_DMA_REQ_DSPA_DCT_DOUT       9
+#define MX1_DMA_REQ_DSPA_DCT_DIN        10
+#define MX1_DMA_REQ_DSPA_MAC            11
+#define MX1_DMA_REQ_EXT                 12
+#define MX1_DMA_REQ_SDHC                13
+#define MX1_DMA_REQ_SPI1_R              14
+#define MX1_DMA_REQ_SPI1_T              15
+#define MX1_DMA_REQ_SSI_T               16
+#define MX1_DMA_REQ_SSI_R               17
+#define MX1_DMA_REQ_ASP_DAC             18
+#define MX1_DMA_REQ_ASP_ADC             19
+#define MX1_DMA_REQ_USP_EP(x)           (20 + (x))
+#define MX1_DMA_REQ_SPI2_R              26
+#define MX1_DMA_REQ_SPI2_T              27
+#define MX1_DMA_REQ_UART2_T             28
+#define MX1_DMA_REQ_UART2_R             29
+#define MX1_DMA_REQ_UART1_T             30
+#define MX1_DMA_REQ_UART1_R             31
+
+/*
+ * This doesn't depend on IMX_NEEDS_DEPRECATED_SYMBOLS
+ * to not break drivers/usb/gadget/imx_udc.  Should go
+ * away after this driver uses the new name.
+ */
+#define USBD_INT0               MX1_USBD_INT0
+
+#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
+/* these should go away */
+#define IMX_IO_PHYS MX1_IO_BASE_ADDR
+#define IMX_IO_SIZE MX1_IO_SIZE
+#define IMX_IO_BASE MX1_IO_BASE_ADDR_VIRT
+#define IMX_CS0_PHYS MX1_CS0_PHYS
+#define IMX_CS0_SIZE MX1_CS0_SIZE
+#define IMX_CS1_PHYS MX1_CS1_PHYS
+#define IMX_CS1_SIZE MX1_CS1_SIZE
+#define IMX_CS2_PHYS MX1_CS2_PHYS
+#define IMX_CS2_SIZE MX1_CS2_SIZE
+#define IMX_CS3_PHYS MX1_CS3_PHYS
+#define IMX_CS3_SIZE MX1_CS3_SIZE
+#define IMX_CS4_PHYS MX1_CS4_PHYS
+#define IMX_CS4_SIZE MX1_CS4_SIZE
+#define IMX_CS5_PHYS MX1_CS5_PHYS
+#define IMX_CS5_SIZE MX1_CS5_SIZE
+#define AIPI1_BASE_ADDR MX1_AIPI1_BASE_ADDR
+#define WDT_BASE_ADDR MX1_WDT_BASE_ADDR
+#define TIM1_BASE_ADDR MX1_TIM1_BASE_ADDR
+#define TIM2_BASE_ADDR MX1_TIM2_BASE_ADDR
+#define RTC_BASE_ADDR MX1_RTC_BASE_ADDR
+#define LCDC_BASE_ADDR MX1_LCDC_BASE_ADDR
+#define UART1_BASE_ADDR MX1_UART1_BASE_ADDR
+#define UART2_BASE_ADDR MX1_UART2_BASE_ADDR
+#define PWM_BASE_ADDR MX1_PWM_BASE_ADDR
+#define DMA_BASE_ADDR MX1_DMA_BASE_ADDR
+#define AIPI2_BASE_ADDR MX1_AIPI2_BASE_ADDR
+#define SIM_BASE_ADDR MX1_SIM_BASE_ADDR
+#define USBD_BASE_ADDR MX1_USBD_BASE_ADDR
+#define SPI1_BASE_ADDR MX1_SPI1_BASE_ADDR
+#define MMC_BASE_ADDR MX1_MMC_BASE_ADDR
+#define ASP_BASE_ADDR MX1_ASP_BASE_ADDR
+#define BTA_BASE_ADDR MX1_BTA_BASE_ADDR
+#define I2C_BASE_ADDR MX1_I2C_BASE_ADDR
+#define SSI_BASE_ADDR MX1_SSI_BASE_ADDR
+#define SPI2_BASE_ADDR MX1_SPI2_BASE_ADDR
+#define MSHC_BASE_ADDR MX1_MSHC_BASE_ADDR
+#define CCM_BASE_ADDR MX1_CCM_BASE_ADDR
+#define SCM_BASE_ADDR MX1_SCM_BASE_ADDR
+#define GPIO_BASE_ADDR MX1_GPIO_BASE_ADDR
+#define EIM_BASE_ADDR MX1_EIM_BASE_ADDR
+#define SDRAMC_BASE_ADDR MX1_SDRAMC_BASE_ADDR
+#define MMA_BASE_ADDR MX1_MMA_BASE_ADDR
+#define AVIC_BASE_ADDR MX1_AVIC_BASE_ADDR
+#define CSI_BASE_ADDR MX1_CSI_BASE_ADDR
+#define IO_ADDRESS(x) MX1_IO_ADDRESS(x)
+#define AVIC_IO_ADDRESS(x) IO_ADDRESS(x)
+#define INT_SOFTINT MX1_INT_SOFTINT
+#define CSI_INT MX1_CSI_INT
+#define DSPA_MAC_INT MX1_DSPA_MAC_INT
+#define DSPA_INT MX1_DSPA_INT
+#define COMP_INT MX1_COMP_INT
+#define MSHC_XINT MX1_MSHC_XINT
+#define GPIO_INT_PORTA MX1_GPIO_INT_PORTA
+#define GPIO_INT_PORTB MX1_GPIO_INT_PORTB
+#define GPIO_INT_PORTC MX1_GPIO_INT_PORTC
+#define LCDC_INT MX1_LCDC_INT
+#define SIM_INT MX1_SIM_INT
+#define SIM_DATA_INT MX1_SIM_DATA_INT
+#define RTC_INT MX1_RTC_INT
+#define RTC_SAMINT MX1_RTC_SAMINT
+#define UART2_MINT_PFERR MX1_UART2_MINT_PFERR
+#define UART2_MINT_RTS MX1_UART2_MINT_RTS
+#define UART2_MINT_DTR MX1_UART2_MINT_DTR
+#define UART2_MINT_UARTC MX1_UART2_MINT_UARTC
+#define UART2_MINT_TX MX1_UART2_MINT_TX
+#define UART2_MINT_RX MX1_UART2_MINT_RX
+#define UART1_MINT_PFERR MX1_UART1_MINT_PFERR
+#define UART1_MINT_RTS MX1_UART1_MINT_RTS
+#define UART1_MINT_DTR MX1_UART1_MINT_DTR
+#define UART1_MINT_UARTC MX1_UART1_MINT_UARTC
+#define UART1_MINT_TX MX1_UART1_MINT_TX
+#define UART1_MINT_RX MX1_UART1_MINT_RX
+#define VOICE_DAC_INT MX1_VOICE_DAC_INT
+#define VOICE_ADC_INT MX1_VOICE_ADC_INT
+#define PEN_DATA_INT MX1_PEN_DATA_INT
+#define PWM_INT MX1_PWM_INT
+#define SDHC_INT MX1_SDHC_INT
+#define I2C_INT MX1_I2C_INT
+#define CSPI_INT MX1_CSPI_INT
+#define SSI_TX_INT MX1_SSI_TX_INT
+#define SSI_TX_ERR_INT MX1_SSI_TX_ERR_INT
+#define SSI_RX_INT MX1_SSI_RX_INT
+#define SSI_RX_ERR_INT MX1_SSI_RX_ERR_INT
+#define TOUCH_INT MX1_TOUCH_INT
+#define USBD_INT1 MX1_USBD_INT1
+#define USBD_INT2 MX1_USBD_INT2
+#define USBD_INT3 MX1_USBD_INT3
+#define USBD_INT4 MX1_USBD_INT4
+#define USBD_INT5 MX1_USBD_INT5
+#define USBD_INT6 MX1_USBD_INT6
+#define BTSYS_INT MX1_BTSYS_INT
+#define BTTIM_INT MX1_BTTIM_INT
+#define BTWUI_INT MX1_BTWUI_INT
+#define TIM2_INT MX1_TIM2_INT
+#define TIM1_INT MX1_TIM1_INT
+#define DMA_ERR MX1_DMA_ERR
+#define DMA_INT MX1_DMA_INT
+#define GPIO_INT_PORTD MX1_GPIO_INT_PORTD
+#define WDT_INT MX1_WDT_INT
+#define DMA_REQ_UART3_T MX1_DMA_REQ_UART3_T
+#define DMA_REQ_UART3_R MX1_DMA_REQ_UART3_R
+#define DMA_REQ_SSI2_T MX1_DMA_REQ_SSI2_T
+#define DMA_REQ_SSI2_R MX1_DMA_REQ_SSI2_R
+#define DMA_REQ_CSI_STAT MX1_DMA_REQ_CSI_STAT
+#define DMA_REQ_CSI_R MX1_DMA_REQ_CSI_R
+#define DMA_REQ_MSHC MX1_DMA_REQ_MSHC
+#define DMA_REQ_DSPA_DCT_DOUT MX1_DMA_REQ_DSPA_DCT_DOUT
+#define DMA_REQ_DSPA_DCT_DIN MX1_DMA_REQ_DSPA_DCT_DIN
+#define DMA_REQ_DSPA_MAC MX1_DMA_REQ_DSPA_MAC
+#define DMA_REQ_EXT MX1_DMA_REQ_EXT
+#define DMA_REQ_SDHC MX1_DMA_REQ_SDHC
+#define DMA_REQ_SPI1_R MX1_DMA_REQ_SPI1_R
+#define DMA_REQ_SPI1_T MX1_DMA_REQ_SPI1_T
+#define DMA_REQ_SSI_T MX1_DMA_REQ_SSI_T
+#define DMA_REQ_SSI_R MX1_DMA_REQ_SSI_R
+#define DMA_REQ_ASP_DAC MX1_DMA_REQ_ASP_DAC
+#define DMA_REQ_ASP_ADC MX1_DMA_REQ_ASP_ADC
+#define DMA_REQ_USP_EP(x) MX1_DMA_REQ_USP_EP(x)
+#define DMA_REQ_SPI2_R MX1_DMA_REQ_SPI2_R
+#define DMA_REQ_SPI2_T MX1_DMA_REQ_SPI2_T
+#define DMA_REQ_UART2_T MX1_DMA_REQ_UART2_T
+#define DMA_REQ_UART2_R MX1_DMA_REQ_UART2_R
+#define DMA_REQ_UART1_T MX1_DMA_REQ_UART1_T
+#define DMA_REQ_UART1_R MX1_DMA_REQ_UART1_R
+#endif /* ifdef IMX_NEEDS_DEPRECATED_SYMBOLS */
+
+#endif /* ifndef __MACH_MX1_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/plat-mxc/include/mach/mx21.h
index bb297d8765a..ed98b9c9f38 100644
--- a/arch/arm/plat-mxc/include/mach/mx21.h
+++ b/arch/arm/plat-mxc/include/mach/mx21.h
@@ -22,8 +22,8 @@
  * MA  02110-1301, USA.
  */
 
-#ifndef __ASM_ARCH_MXC_MX21_H__
-#define __ASM_ARCH_MXC_MX21_H__
+#ifndef __MACH_MX21_H__
+#define __MACH_MX21_H__
 
 #define MX21_AIPI_BASE_ADDR             0x10000000
 #define MX21_AIPI_BASE_ADDR_VIRT        0xf4000000
@@ -92,6 +92,11 @@
 
 #define MX21_IRAM_BASE_ADDR             0xffffe800      /* internal ram */
 
+#define MX21_IO_ADDRESS(x) (                                            \
+        IMX_IO_ADDRESS(x, MX21_AIPI) ?:                                 \
+        IMX_IO_ADDRESS(x, MX21_SAHB1) ?:                                \
+        IMX_IO_ADDRESS(x, MX21_X_MEMC))
+
 /* fixed interrupt numbers */
 #define MX21_INT_CSPI3          6
 #define MX21_INT_GPIO           8
@@ -179,6 +184,7 @@
 #define MX21_DMA_REQ_CSI_STAT   30
 #define MX21_DMA_REQ_CSI_RX     31
 
+#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
 /* these should go away */
 #define SDRAM_BASE_ADDR MX21_SDRAM_BASE_ADDR
 #define CSD1_BASE_ADDR MX21_CSD1_BASE_ADDR
@@ -211,5 +217,6 @@
 #define DMA_REQ_FIRI_RX MX21_DMA_REQ_FIRI_RX
 #define DMA_REQ_BMI_TX MX21_DMA_REQ_BMI_TX
 #define DMA_REQ_BMI_RX MX21_DMA_REQ_BMI_RX
+#endif
 
-#endif /* __ASM_ARCH_MXC_MX21_H__ */
+#endif /* ifndef __MACH_MX21_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index 854e2dc5848..4eb6e334bda 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -22,27 +22,27 @@
 #define MX25_GPIO3_BASE_ADDR_VIRT       (MX25_AIPS2_BASE_ADDR_VIRT + 0xa4000)
 #define MX25_GPIO4_BASE_ADDR_VIRT       (MX25_AIPS2_BASE_ADDR_VIRT + 0x9c000)
 
-#define MX25_AIPS1_IO_ADDRESS(x)  \
-        (((x) - MX25_AIPS1_BASE_ADDR) + MX25_AIPS1_BASE_ADDR_VIRT)
-#define MX25_AIPS2_IO_ADDRESS(x)  \
-        (((x) - MX25_AIPS2_BASE_ADDR) + MX25_AIPS2_BASE_ADDR_VIRT)
-#define MX25_AVIC_IO_ADDRESS(x)  \
-        (((x) - MX25_AVIC_BASE_ADDR) + MX25_AVIC_BASE_ADDR_VIRT)
+#define MX25_IO_ADDRESS(x) (                                    \
+        IMX_IO_ADDRESS(x, MX25_AIPS1) ?:                        \
+        IMX_IO_ADDRESS(x, MX25_AIPS2) ?:                        \
+        IMX_IO_ADDRESS(x, MX25_AVIC))
 
-#define __in_range(addr, name)  ((addr) >= name##_BASE_ADDR && (addr) < name##_BASE_ADDR + name##_SIZE)
-
-#define MX25_IO_ADDRESS(x)                                      \
-        (void __force __iomem *)                                \
-        (__in_range(x, MX25_AIPS1) ? MX25_AIPS1_IO_ADDRESS(x) : \
-        __in_range(x, MX25_AIPS2) ? MX25_AIPS2_IO_ADDRESS(x) :  \
-        __in_range(x, MX25_AVIC) ? MX25_AVIC_IO_ADDRESS(x) :    \
-        0xDEADBEEF)
-
-#define UART1_BASE_ADDR                 0x43f90000
-#define UART2_BASE_ADDR                 0x43f94000
+#define MX25_UART1_BASE_ADDR            0x43f90000
+#define MX25_UART2_BASE_ADDR            0x43f94000
 
 #define MX25_FEC_BASE_ADDR              0x50038000
+#define MX25_NFC_BASE_ADDR              0xbb000000
+#define MX25_DRYICE_BASE_ADDR           0x53ffc000
+#define MX25_LCDC_BASE_ADDR             0x53fbc000
 
+#define MX25_INT_DRYICE 25
 #define MX25_INT_FEC    57
+#define MX25_INT_NANDFC 33
+#define MX25_INT_LCDC   39
+
+#if defined(IMX_NEEDS_DEPRECATED_SYMBOLS)
+#define UART1_BASE_ADDR                 MX25_UART1_BASE_ADDR
+#define UART2_BASE_ADDR                 MX25_UART2_BASE_ADDR
+#endif
 
-#endif /* __MACH_MX25_H__ */
+#endif /* ifndef __MACH_MX25_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h
index e2ae19f5171..bae9cd75bee 100644
--- a/arch/arm/plat-mxc/include/mach/mx27.h
+++ b/arch/arm/plat-mxc/include/mach/mx27.h
@@ -21,8 +21,12 @@
  * MA  02110-1301, USA.
  */
 
-#ifndef __ASM_ARCH_MXC_MX27_H__
-#define __ASM_ARCH_MXC_MX27_H__
+#ifndef __MACH_MX27_H__
+#define __MACH_MX27_H__
+
+#ifndef __ASSEMBLER__
+#include <linux/io.h>
+#endif
 
 #define MX27_AIPI_BASE_ADDR             0x10000000
 #define MX27_AIPI_BASE_ADDR_VIRT        0xf4000000
@@ -109,11 +113,31 @@
 #define MX27_M3IF_BASE_ADDR                     (MX27_X_MEMC_BASE_ADDR + 0x3000)
 #define MX27_PCMCIA_CTL_BASE_ADDR               (MX27_X_MEMC_BASE_ADDR + 0x4000)
 
+#define MX27_WEIM_CSCRx_BASE_ADDR(cs)   (MX27_WEIM_BASE_ADDR + (cs) * 0x10)
+#define MX27_WEIM_CSCRxU(cs)                    (MX27_WEIM_CSCRx_BASE_ADDR(cs))
+#define MX27_WEIM_CSCRxL(cs)                    (MX27_WEIM_CSCRx_BASE_ADDR(cs) + 0x4)
+#define MX27_WEIM_CSCRxA(cs)                    (MX27_WEIM_CSCRx_BASE_ADDR(cs) + 0x8)
+
 #define MX27_PCMCIA_MEM_BASE_ADDR       0xdc000000
 
 /* IRAM */
 #define MX27_IRAM_BASE_ADDR             0xffff4c00      /* internal ram */
 
+#define MX27_IO_ADDRESS(x) (                                            \
+        IMX_IO_ADDRESS(x, MX27_AIPI) ?:                                 \
+        IMX_IO_ADDRESS(x, MX27_SAHB1) ?:                                \
+        IMX_IO_ADDRESS(x, MX27_X_MEMC))
+
+#ifndef __ASSEMBLER__
+static inline void mx27_setup_weimcs(size_t cs,
+                unsigned upper, unsigned lower, unsigned addional)
+{
+        __raw_writel(upper, MX27_IO_ADDRESS(MX27_WEIM_CSCRxU(cs)));
+        __raw_writel(lower, MX27_IO_ADDRESS(MX27_WEIM_CSCRxL(cs)));
+        __raw_writel(addional, MX27_IO_ADDRESS(MX27_WEIM_CSCRxA(cs)));
+}
+#endif
+
 /* fixed interrupt numbers */
 #define MX27_INT_I2C2           1
 #define MX27_INT_GPT6           2
@@ -225,6 +249,7 @@
 extern int mx27_revision(void);
 #endif
 
+#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
 /* these should go away */
 #define MSHC_BASE_ADDR MX27_MSHC_BASE_ADDR
 #define GPT5_BASE_ADDR MX27_GPT5_BASE_ADDR
@@ -292,5 +317,6 @@ extern int mx27_revision(void);
 #define DMA_REQ_UART6_RX MX27_DMA_REQ_UART6_RX
 #define DMA_REQ_SDHC3 MX27_DMA_REQ_SDHC3
 #define DMA_REQ_NFC MX27_DMA_REQ_NFC
+#endif
 
-#endif /* __ASM_ARCH_MXC_MX27_H__ */
+#endif /* ifndef __MACH_MX27_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx2x.h b/arch/arm/plat-mxc/include/mach/mx2x.h
index f2eaf140ed0..afb895a0b5b 100644
--- a/arch/arm/plat-mxc/include/mach/mx2x.h
+++ b/arch/arm/plat-mxc/include/mach/mx2x.h
@@ -20,8 +20,8 @@
  * MA  02110-1301, USA.
  */
 
-#ifndef __ASM_ARCH_MXC_MX2x_H__
-#define __ASM_ARCH_MXC_MX2x_H__
+#ifndef __MACH_MX2x_H__
+#define __MACH_MX2x_H__
 
 /* The following addresses are common between i.MX21 and i.MX27 */
 
@@ -176,6 +176,7 @@
 #define MX2x_DMA_REQ_CSI_STAT   30
 #define MX2x_DMA_REQ_CSI_RX     31
 
+#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
 /* these should go away */
 #define AIPI_BASE_ADDR MX2x_AIPI_BASE_ADDR
 #define AIPI_BASE_ADDR_VIRT MX2x_AIPI_BASE_ADDR_VIRT
@@ -287,5 +288,6 @@
 #define DMA_REQ_UART1_TX MX2x_DMA_REQ_UART1_TX
 #define DMA_REQ_CSI_STAT MX2x_DMA_REQ_CSI_STAT
 #define DMA_REQ_CSI_RX MX2x_DMA_REQ_CSI_RX
+#endif
 
-#endif /* __ASM_ARCH_MXC_MX2x_H__ */
+#endif /* ifndef __MACH_MX2x_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h
index b8b47d139eb..fb90e119c2b 100644
--- a/arch/arm/plat-mxc/include/mach/mx31.h
+++ b/arch/arm/plat-mxc/include/mach/mx31.h
@@ -1,3 +1,10 @@
+#ifndef __MACH_MX31_H__
+#define __MACH_MX31_H__
+
+#ifndef __ASSEMBLER__
+#include <linux/io.h>
+#endif
+
 /*
  * IRAM
  */
@@ -107,8 +114,30 @@
 #define MX31_EMI_CTL_BASE_ADDR                  (MX31_X_MEMC_BASE_ADDR + 0x4000)
 #define MX31_PCMCIA_CTL_BASE_ADDR               MX31_EMI_CTL_BASE_ADDR
 
+#define MX31_WEIM_CSCRx_BASE_ADDR(cs)   (MX31_WEIM_BASE_ADDR + (cs) * 0x10)
+#define MX31_WEIM_CSCRxU(cs)                    (MX31_WEIM_CSCRx_BASE_ADDR(cs))
+#define MX31_WEIM_CSCRxL(cs)                    (MX31_WEIM_CSCRx_BASE_ADDR(cs) + 0x4)
+#define MX31_WEIM_CSCRxA(cs)                    (MX31_WEIM_CSCRx_BASE_ADDR(cs) + 0x8)
+
 #define MX31_PCMCIA_MEM_BASE_ADDR       0xbc000000
 
+#define MX31_IO_ADDRESS(x) (                                            \
+        IMX_IO_ADDRESS(x, MX31_AIPS1) ?:                                \
+        IMX_IO_ADDRESS(x, MX31_AIPS2) ?:                                \
+        IMX_IO_ADDRESS(x, MX31_AVIC) ?:                                 \
+        IMX_IO_ADDRESS(x, MX31_X_MEMC) ?:                               \
+        IMX_IO_ADDRESS(x, MX31_SPBA0))
+
+#ifndef __ASSEMBLER__
+static inline void mx31_setup_weimcs(size_t cs,
+                unsigned upper, unsigned lower, unsigned addional)
+{
+        __raw_writel(upper, MX31_IO_ADDRESS(MX31_WEIM_CSCRxU(cs)));
+        __raw_writel(lower, MX31_IO_ADDRESS(MX31_WEIM_CSCRxL(cs)));
+        __raw_writel(addional, MX31_IO_ADDRESS(MX31_WEIM_CSCRxA(cs)));
+}
+#endif
+
 #define MX31_INT_I2C3           3
 #define MX31_INT_I2C2           4
 #define MX31_INT_MPEG4_ENCODER  5
@@ -186,6 +215,7 @@
 #define MX31_SYSTEM_REV_MIN             MX31_CHIP_REV_1_0
 #define MX31_SYSTEM_REV_NUM             3
 
+#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
 /* these should go away */
 #define ATA_BASE_ADDR MX31_ATA_BASE_ADDR
 #define UART4_BASE_ADDR MX31_UART4_BASE_ADDR
@@ -216,3 +246,6 @@
 #define MXC_INT_UART5 MX31_INT_UART5
 #define MXC_INT_CCM MX31_INT_CCM
 #define MXC_INT_PCMCIA MX31_INT_PCMCIA
+#endif
+
+#endif /* ifndef __MACH_MX31_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h
index af871bce35b..526a55842ae 100644
--- a/arch/arm/plat-mxc/include/mach/mx35.h
+++ b/arch/arm/plat-mxc/include/mach/mx35.h
@@ -1,3 +1,5 @@
+#ifndef __MACH_MX35_H__
+#define __MACH_MX35_H__
 /*
  * IRAM
  */
@@ -104,6 +106,13 @@
 #define MX35_NFC_BASE_ADDR              0xbb000000
 #define MX35_PCMCIA_MEM_BASE_ADDR       0xbc000000
 
+#define MX35_IO_ADDRESS(x) (                                            \
+        IMX_IO_ADDRESS(x, MX35_AIPS1) ?:                                \
+        IMX_IO_ADDRESS(x, MX35_AIPS2) ?:                                \
+        IMX_IO_ADDRESS(x, MX35_AVIC) ?:                                 \
+        IMX_IO_ADDRESS(x, MX35_X_MEMC) ?:                               \
+        IMX_IO_ADDRESS(x, MX35_SPBA0))
+
 /*
  * Interrupt numbers
  */
@@ -180,6 +189,7 @@
 #define MX35_SYSTEM_REV_MIN             MX35_CHIP_REV_1_0
 #define MX35_SYSTEM_REV_NUM             3
 
+#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
 /* these should go away */
 #define MXC_FEC_BASE_ADDR MX35_FEC_BASE_ADDR
 #define MXC_INT_OWIRE MX35_INT_OWIRE
@@ -195,3 +205,6 @@
 #define MXC_INT_MLB MX35_INT_MLB
 #define MXC_INT_SPDIF MX35_INT_SPDIF
 #define MXC_INT_FEC MX35_INT_FEC
+#endif
+
+#endif /* ifndef __MACH_MX35_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h
index be69272407a..7a356de385f 100644
--- a/arch/arm/plat-mxc/include/mach/mx3x.h
+++ b/arch/arm/plat-mxc/include/mach/mx3x.h
@@ -8,8 +8,8 @@
  * published by the Free Software Foundation.
  */
 
-#ifndef __ASM_ARCH_MXC_MX31_H__
-#define __ASM_ARCH_MXC_MX31_H__
+#ifndef __MACH_MX3x_H__
+#define __MACH_MX3x_H__
 
 /*
  * MX31 memory map:
@@ -269,6 +269,7 @@ static inline int mx31_revision(void)
 }
 #endif
 
+#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
 /* these should go away */
 #define L2CC_BASE_ADDR MX3x_L2CC_BASE_ADDR
 #define L2CC_SIZE MX3x_L2CC_SIZE
@@ -401,5 +402,6 @@ static inline int mx31_revision(void)
 #define CHIP_REV_3_2 MX3x_CHIP_REV_3_2
 #define SYSTEM_REV_MIN MX3x_SYSTEM_REV_MIN
 #define SYSTEM_REV_NUM MX3x_SYSTEM_REV_NUM
+#endif
 
-#endif /*  __ASM_ARCH_MXC_MX31_H__ */
+#endif /* ifndef __MACH_MX3x_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h
new file mode 100644
index 00000000000..5aad344d565
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/mx51.h
@@ -0,0 +1,445 @@
+#ifndef __ASM_ARCH_MXC_MX51_H__
+#define __ASM_ARCH_MXC_MX51_H__
+
+/*
+ * MX51 memory map:
+ *
+ *
+ * Virt         Phys            Size    What
+ * ---------------------------------------------------------------------------
+ * FA3E0000     1FFE0000        128K    IRAM (SCCv2 RAM)
+ *              30000000        256M    GPU
+ *              40000000        512M    IPU
+ * FA200000     60000000        1M      DEBUG
+ * FB100000     70000000        1M      SPBA 0
+ * FB000000     73F00000        1M      AIPS 1
+ * FB200000     83F00000        1M      AIPS 2
+ *              8FFFC000        16K     TZIC (interrupt controller)
+ *              90000000        256M    CSD0 SDRAM/DDR
+ *              A0000000        256M    CSD1 SDRAM/DDR
+ *              B0000000        128M    CS0 Flash
+ *              B8000000        128M    CS1 Flash
+ *              C0000000        128M    CS2 Flash
+ *              C8000000        64M     CS3 Flash
+ *              CC000000        32M     CS4 SRAM
+ *              CE000000        32M     CS5 SRAM
+ *              CFFF0000        64K     NFC (NAND Flash AXI)
+ *
+ */
+
+/*
+ * IROM
+ */
+#define MX51_IROM_BASE_ADDR             0x0
+#define MX51_IROM_SIZE                  SZ_64K
+
+/*
+ * IRAM
+ */
+#define MX51_IRAM_BASE_ADDR             0x1FFE0000      /* internal ram */
+#define MX51_IRAM_BASE_ADDR_VIRT        0xFA3E0000
+#define MX51_IRAM_PARTITIONS            16
+#define MX51_IRAM_PARTITIONS_TO1        12
+#define MX51_IRAM_SIZE          (MX51_IRAM_PARTITIONS * SZ_8K)  /* 128KB */
+
+/*
+ * NFC
+ */
+#define MX51_NFC_AXI_BASE_ADDR          0xCFFF0000      /* NAND flash AXI */
+#define MX51_NFC_AXI_SIZE               SZ_64K
+
+/*
+ * Graphics Memory of GPU
+ */
+#define MX51_GPU_BASE_ADDR              0x20000000
+#define MX51_GPU2D_BASE_ADDR            0xD0000000
+
+#define MX51_TZIC_BASE_ADDR_TO1         0x8FFFC000
+#define MX51_TZIC_BASE_ADDR             0xE0000000
+
+#define MX51_DEBUG_BASE_ADDR            0x60000000
+#define MX51_DEBUG_BASE_ADDR_VIRT       0xFA200000
+#define MX51_DEBUG_SIZE                 SZ_1M
+#define MX51_ETB_BASE_ADDR              (MX51_DEBUG_BASE_ADDR + 0x00001000)
+#define MX51_ETM_BASE_ADDR              (MX51_DEBUG_BASE_ADDR + 0x00002000)
+#define MX51_TPIU_BASE_ADDR             (MX51_DEBUG_BASE_ADDR + 0x00003000)
+#define MX51_CTI0_BASE_ADDR             (MX51_DEBUG_BASE_ADDR + 0x00004000)
+#define MX51_CTI1_BASE_ADDR             (MX51_DEBUG_BASE_ADDR + 0x00005000)
+#define MX51_CTI2_BASE_ADDR             (MX51_DEBUG_BASE_ADDR + 0x00006000)
+#define MX51_CTI3_BASE_ADDR             (MX51_DEBUG_BASE_ADDR + 0x00007000)
+#define MX51_CORTEX_DBG_BASE_ADDR       (MX51_DEBUG_BASE_ADDR + 0x00008000)
+
+/*
+ * SPBA global module enabled #0
+ */
+#define MX51_SPBA0_BASE_ADDR            0x70000000
+#define MX51_SPBA0_BASE_ADDR_VIRT       0xFB100000
+#define MX51_SPBA0_SIZE                 SZ_1M
+
+#define MX51_MMC_SDHC1_BASE_ADDR        (MX51_SPBA0_BASE_ADDR + 0x00004000)
+#define MX51_MMC_SDHC2_BASE_ADDR        (MX51_SPBA0_BASE_ADDR + 0x00008000)
+#define MX51_UART3_BASE_ADDR            (MX51_SPBA0_BASE_ADDR + 0x0000C000)
+#define MX51_CSPI1_BASE_ADDR            (MX51_SPBA0_BASE_ADDR + 0x00010000)
+#define MX51_SSI2_BASE_ADDR             (MX51_SPBA0_BASE_ADDR + 0x00014000)
+#define MX51_MMC_SDHC3_BASE_ADDR        (MX51_SPBA0_BASE_ADDR + 0x00020000)
+#define MX51_MMC_SDHC4_BASE_ADDR        (MX51_SPBA0_BASE_ADDR + 0x00024000)
+#define MX51_SPDIF_BASE_ADDR            (MX51_SPBA0_BASE_ADDR + 0x00028000)
+#define MX51_ATA_DMA_BASE_ADDR          (MX51_SPBA0_BASE_ADDR + 0x00030000)
+#define MX51_SLIM_DMA_BASE_ADDR         (MX51_SPBA0_BASE_ADDR + 0x00034000)
+#define MX51_HSI2C_DMA_BASE_ADDR        (MX51_SPBA0_BASE_ADDR + 0x00038000)
+#define MX51_SPBA_CTRL_BASE_ADDR        (MX51_SPBA0_BASE_ADDR + 0x0003C000)
+
+/*
+ * defines for SPBA modules
+ */
+#define MX51_SPBA_SDHC1 0x04
+#define MX51_SPBA_SDHC2 0x08
+#define MX51_SPBA_UART3 0x0C
+#define MX51_SPBA_CSPI1 0x10
+#define MX51_SPBA_SSI2  0x14
+#define MX51_SPBA_SDHC3 0x20
+#define MX51_SPBA_SDHC4 0x24
+#define MX51_SPBA_SPDIF 0x28
+#define MX51_SPBA_ATA   0x30
+#define MX51_SPBA_SLIM  0x34
+#define MX51_SPBA_HSI2C 0x38
+#define MX51_SPBA_CTRL  0x3C
+
+/*
+ * AIPS 1
+ */
+#define MX51_AIPS1_BASE_ADDR    0x73F00000
+#define MX51_AIPS1_BASE_ADDR_VIRT       0xFB000000
+#define MX51_AIPS1_SIZE         SZ_1M
+
+#define MX51_OTG_BASE_ADDR      (MX51_AIPS1_BASE_ADDR + 0x00080000)
+#define MX51_GPIO1_BASE_ADDR    (MX51_AIPS1_BASE_ADDR + 0x00084000)
+#define MX51_GPIO2_BASE_ADDR    (MX51_AIPS1_BASE_ADDR + 0x00088000)
+#define MX51_GPIO3_BASE_ADDR    (MX51_AIPS1_BASE_ADDR + 0x0008C000)
+#define MX51_GPIO4_BASE_ADDR    (MX51_AIPS1_BASE_ADDR + 0x00090000)
+#define MX51_KPP_BASE_ADDR      (MX51_AIPS1_BASE_ADDR + 0x00094000)
+#define MX51_WDOG_BASE_ADDR     (MX51_AIPS1_BASE_ADDR + 0x00098000)
+#define MX51_WDOG2_BASE_ADDR    (MX51_AIPS1_BASE_ADDR + 0x0009C000)
+#define MX51_GPT1_BASE_ADDR     (MX51_AIPS1_BASE_ADDR + 0x000A0000)
+#define MX51_SRTC_BASE_ADDR     (MX51_AIPS1_BASE_ADDR + 0x000A4000)
+#define MX51_IOMUXC_BASE_ADDR   (MX51_AIPS1_BASE_ADDR + 0x000A8000)
+#define MX51_EPIT1_BASE_ADDR    (MX51_AIPS1_BASE_ADDR + 0x000AC000)
+#define MX51_EPIT2_BASE_ADDR    (MX51_AIPS1_BASE_ADDR + 0x000B0000)
+#define MX51_PWM1_BASE_ADDR     (MX51_AIPS1_BASE_ADDR + 0x000B4000)
+#define MX51_PWM2_BASE_ADDR     (MX51_AIPS1_BASE_ADDR + 0x000B8000)
+#define MX51_UART1_BASE_ADDR    (MX51_AIPS1_BASE_ADDR + 0x000BC000)
+#define MX51_UART2_BASE_ADDR    (MX51_AIPS1_BASE_ADDR + 0x000C0000)
+#define MX51_SRC_BASE_ADDR      (MX51_AIPS1_BASE_ADDR + 0x000D0000)
+#define MX51_CCM_BASE_ADDR      (MX51_AIPS1_BASE_ADDR + 0x000D4000)
+#define MX51_GPC_BASE_ADDR      (MX51_AIPS1_BASE_ADDR + 0x000D8000)
+
+/*
+ * Defines for modules using static and dynamic DMA channels
+ */
+#define MX51_MXC_DMA_CHANNEL_IRAM       30
+#define MX51_MXC_DMA_CHANNEL_SPDIF_TX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_UART1_RX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_UART1_TX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_UART2_RX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_UART2_TX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_UART3_RX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_UART3_TX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_MMC1       MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_MMC2       MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_SSI1_RX    MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_SSI1_TX    MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_SSI2_RX    MXC_DMA_DYNAMIC_CHANNEL
+#ifdef CONFIG_SDMA_IRAM
+#define MX51_MXC_DMA_CHANNEL_SSI2_TX    (MX51_MXC_DMA_CHANNEL_IRAM + 1)
+#else                           /*CONFIG_SDMA_IRAM */
+#define MX51_MXC_DMA_CHANNEL_SSI2_TX    MXC_DMA_DYNAMIC_CHANNEL
+#endif                          /*CONFIG_SDMA_IRAM */
+#define MX51_MXC_DMA_CHANNEL_CSPI1_RX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_CSPI1_TX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_CSPI2_RX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_CSPI2_TX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_CSPI3_RX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_CSPI3_TX   MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_ATA_RX     MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_ATA_TX     MXC_DMA_DYNAMIC_CHANNEL
+#define MX51_MXC_DMA_CHANNEL_MEMORY     MXC_DMA_DYNAMIC_CHANNEL
+
+/*
+ * AIPS 2
+ */
+#define MX51_AIPS2_BASE_ADDR            0x83F00000
+#define MX51_AIPS2_BASE_ADDR_VIRT       0xFB200000
+#define MX51_AIPS2_SIZE                 SZ_1M
+
+#define MX51_PLL1_BASE_ADDR     (MX51_AIPS2_BASE_ADDR + 0x00080000)
+#define MX51_PLL2_BASE_ADDR     (MX51_AIPS2_BASE_ADDR + 0x00084000)
+#define MX51_PLL3_BASE_ADDR     (MX51_AIPS2_BASE_ADDR + 0x00088000)
+#define MX51_AHBMAX_BASE_ADDR   (MX51_AIPS2_BASE_ADDR + 0x00094000)
+#define MX51_IIM_BASE_ADDR      (MX51_AIPS2_BASE_ADDR + 0x00098000)
+#define MX51_CSU_BASE_ADDR      (MX51_AIPS2_BASE_ADDR + 0x0009C000)
+#define MX51_ARM_BASE_ADDR      (MX51_AIPS2_BASE_ADDR + 0x000A0000)
+#define MX51_OWIRE_BASE_ADDR    (MX51_AIPS2_BASE_ADDR + 0x000A4000)
+#define MX51_FIRI_BASE_ADDR     (MX51_AIPS2_BASE_ADDR + 0x000A8000)
+#define MX51_CSPI2_BASE_ADDR    (MX51_AIPS2_BASE_ADDR + 0x000AC000)
+#define MX51_SDMA_BASE_ADDR     (MX51_AIPS2_BASE_ADDR + 0x000B0000)
+#define MX51_SCC_BASE_ADDR      (MX51_AIPS2_BASE_ADDR + 0x000B4000)
+#define MX51_ROMCP_BASE_ADDR    (MX51_AIPS2_BASE_ADDR + 0x000B8000)
+#define MX51_RTIC_BASE_ADDR     (MX51_AIPS2_BASE_ADDR + 0x000BC000)
+#define MX51_CSPI3_BASE_ADDR    (MX51_AIPS2_BASE_ADDR + 0x000C0000)
+#define MX51_I2C2_BASE_ADDR     (MX51_AIPS2_BASE_ADDR + 0x000C4000)
+#define MX51_I2C1_BASE_ADDR     (MX51_AIPS2_BASE_ADDR + 0x000C8000)
+#define MX51_SSI1_BASE_ADDR     (MX51_AIPS2_BASE_ADDR + 0x000CC000)
+#define MX51_AUDMUX_BASE_ADDR   (MX51_AIPS2_BASE_ADDR + 0x000D0000)
+#define MX51_M4IF_BASE_ADDR     (MX51_AIPS2_BASE_ADDR + 0x000D8000)
+#define MX51_ESDCTL_BASE_ADDR   (MX51_AIPS2_BASE_ADDR + 0x000D9000)
+#define MX51_WEIM_BASE_ADDR     (MX51_AIPS2_BASE_ADDR + 0x000DA000)
+#define MX51_NFC_BASE_ADDR      (MX51_AIPS2_BASE_ADDR + 0x000DB000)
+#define MX51_EMI_BASE_ADDR      (MX51_AIPS2_BASE_ADDR + 0x000DBF00)
+#define MX51_MIPI_HSC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x000DC000)
+#define MX51_ATA_BASE_ADDR      (MX51_AIPS2_BASE_ADDR + 0x000E0000)
+#define MX51_SIM_BASE_ADDR      (MX51_AIPS2_BASE_ADDR + 0x000E4000)
+#define MX51_SSI3BASE_ADDR      (MX51_AIPS2_BASE_ADDR + 0x000E8000)
+#define MX51_MXC_FEC_BASE_ADDR  (MX51_AIPS2_BASE_ADDR + 0x000EC000)
+#define MX51_TVE_BASE_ADDR      (MX51_AIPS2_BASE_ADDR + 0x000F0000)
+#define MX51_VPU_BASE_ADDR      (MX51_AIPS2_BASE_ADDR + 0x000F4000)
+#define MX51_SAHARA_BASE_ADDR   (MX51_AIPS2_BASE_ADDR + 0x000F8000)
+
+/*
+ * Memory regions and CS
+ */
+#define MX51_GPU_CTRL_BASE_ADDR         0x30000000
+#define MX51_IPU_CTRL_BASE_ADDR         0x40000000
+#define MX51_CSD0_BASE_ADDR             0x90000000
+#define MX51_CSD1_BASE_ADDR             0xA0000000
+#define MX51_CS0_BASE_ADDR              0xB0000000
+#define MX51_CS1_BASE_ADDR              0xB8000000
+#define MX51_CS2_BASE_ADDR              0xC0000000
+#define MX51_CS3_BASE_ADDR              0xC8000000
+#define MX51_CS4_BASE_ADDR              0xCC000000
+#define MX51_CS5_BASE_ADDR              0xCE000000
+
+/* Does given address belongs to the specified memory region? */
+#define ADDRESS_IN_REGION(addr, start, size)                    \
+        (((addr) >= (start)) && ((addr) < (start)+(size)))
+
+/* Does given address belongs to the specified named `module'? */
+#define MX51_IS_MODULE(addr, module)                           \
+        ADDRESS_IN_REGION(addr, MX51_ ## module ## _BASE_ADDR, \
+                                MX51_ ## module ## _SIZE)
+/*
+ * This macro defines the physical to virtual address mapping for all the
+ * peripheral modules. It is used by passing in the physical address as x
+ * and returning the virtual address. If the physical address is not mapped,
+ * it returns 0xDEADBEEF
+ */
+
+#define MX51_IO_ADDRESS(x)                                      \
+        (void __iomem *)                                        \
+        (MX51_IS_MODULE(x, IRAM) ? MX51_IRAM_IO_ADDRESS(x) :    \
+        MX51_IS_MODULE(x, DEBUG) ? MX51_DEBUG_IO_ADDRESS(x) :   \
+        MX51_IS_MODULE(x, SPBA0) ? MX51_SPBA0_IO_ADDRESS(x) :   \
+        MX51_IS_MODULE(x, AIPS1) ? MX51_AIPS1_IO_ADDRESS(x) :   \
+        MX51_IS_MODULE(x, AIPS2) ? MX51_AIPS2_IO_ADDRESS(x) : \
+        0xDEADBEEF)
+
+/*
+ * define the address mapping macros: in physical address order
+ */
+#define MX51_IRAM_IO_ADDRESS(x)  \
+        (((x) - MX51_IRAM_BASE_ADDR) + MX51_IRAM_BASE_ADDR_VIRT)
+
+#define MX51_DEBUG_IO_ADDRESS(x)  \
+        (((x) - MX51_DEBUG_BASE_ADDR) + MX51_DEBUG_BASE_ADDR_VIRT)
+
+#define MX51_SPBA0_IO_ADDRESS(x)  \
+        (((x) - MX51_SPBA0_BASE_ADDR) + MX51_SPBA0_BASE_ADDR_VIRT)
+
+#define MX51_AIPS1_IO_ADDRESS(x)  \
+        (((x) - MX51_AIPS1_BASE_ADDR) + MX51_AIPS1_BASE_ADDR_VIRT)
+
+#define MX51_AIPS2_IO_ADDRESS(x)  \
+        (((x) - MX51_AIPS2_BASE_ADDR) + MX51_AIPS2_BASE_ADDR_VIRT)
+
+#define MX51_IS_MEM_DEVICE_NONSHARED(x)         0
+
+/*
+ * DMA request assignments
+ */
+#define MX51_DMA_REQ_SSI3_TX1   47
+#define MX51_DMA_REQ_SSI3_RX1   46
+#define MX51_DMA_REQ_SPDIF      45
+#define MX51_DMA_REQ_UART3_TX   44
+#define MX51_DMA_REQ_UART3_RX   43
+#define MX51_DMA_REQ_SLIM_B_TX  42
+#define MX51_DMA_REQ_SDHC4      41
+#define MX51_DMA_REQ_SDHC3      40
+#define MX51_DMA_REQ_CSPI_TX    39
+#define MX51_DMA_REQ_CSPI_RX    38
+#define MX51_DMA_REQ_SSI3_TX2   37
+#define MX51_DMA_REQ_IPU        36
+#define MX51_DMA_REQ_SSI3_RX2   35
+#define MX51_DMA_REQ_EPIT2      34
+#define MX51_DMA_REQ_CTI2_1     33
+#define MX51_DMA_REQ_EMI_WR     32
+#define MX51_DMA_REQ_CTI2_0     31
+#define MX51_DMA_REQ_EMI_RD     30
+#define MX51_DMA_REQ_SSI1_TX1   29
+#define MX51_DMA_REQ_SSI1_RX1   28
+#define MX51_DMA_REQ_SSI1_TX2   27
+#define MX51_DMA_REQ_SSI1_RX2   26
+#define MX51_DMA_REQ_SSI2_TX1   25
+#define MX51_DMA_REQ_SSI2_RX1   24
+#define MX51_DMA_REQ_SSI2_TX2   23
+#define MX51_DMA_REQ_SSI2_RX2   22
+#define MX51_DMA_REQ_SDHC2      21
+#define MX51_DMA_REQ_SDHC1      20
+#define MX51_DMA_REQ_UART1_TX   19
+#define MX51_DMA_REQ_UART1_RX   18
+#define MX51_DMA_REQ_UART2_TX   17
+#define MX51_DMA_REQ_UART2_RX   16
+#define MX51_DMA_REQ_GPU        15
+#define MX51_DMA_REQ_EXTREQ1    14
+#define MX51_DMA_REQ_FIRI_TX    13
+#define MX51_DMA_REQ_FIRI_RX    12
+#define MX51_DMA_REQ_HS_I2C_RX  11
+#define MX51_DMA_REQ_HS_I2C_TX  10
+#define MX51_DMA_REQ_CSPI2_TX   9
+#define MX51_DMA_REQ_CSPI2_RX   8
+#define MX51_DMA_REQ_CSPI1_TX   7
+#define MX51_DMA_REQ_CSPI1_RX   6
+#define MX51_DMA_REQ_SLIM_B     5
+#define MX51_DMA_REQ_ATA_TX_END 4
+#define MX51_DMA_REQ_ATA_TX     3
+#define MX51_DMA_REQ_ATA_RX     2
+#define MX51_DMA_REQ_GPC        1
+#define MX51_DMA_REQ_VPU        0
+
+/*
+ * Interrupt numbers
+ */
+#define MX51_MXC_INT_BASE       0
+#define MX51_MXC_INT_RESV0      0
+#define MX51_MXC_INT_MMC_SDHC1  1
+#define MX51_MXC_INT_MMC_SDHC2  2
+#define MX51_MXC_INT_MMC_SDHC3  3
+#define MX51_MXC_INT_MMC_SDHC4  4
+#define MX51_MXC_INT_RESV5      5
+#define MX51_MXC_INT_SDMA       6
+#define MX51_MXC_INT_IOMUX      7
+#define MX51_MXC_INT_NFC        8
+#define MX51_MXC_INT_VPU        9
+#define MX51_MXC_INT_IPU_ERR    10
+#define MX51_MXC_INT_IPU_SYN    11
+#define MX51_MXC_INT_GPU        12
+#define MX51_MXC_INT_RESV13     13
+#define MX51_MXC_INT_USB_H1     14
+#define MX51_MXC_INT_EMI        15
+#define MX51_MXC_INT_USB_H2     16
+#define MX51_MXC_INT_USB_H3     17
+#define MX51_MXC_INT_USB_OTG    18
+#define MX51_MXC_INT_SAHARA_H0  19
+#define MX51_MXC_INT_SAHARA_H1  20
+#define MX51_MXC_INT_SCC_SMN    21
+#define MX51_MXC_INT_SCC_STZ    22
+#define MX51_MXC_INT_SCC_SCM    23
+#define MX51_MXC_INT_SRTC_NTZ   24
+#define MX51_MXC_INT_SRTC_TZ    25
+#define MX51_MXC_INT_RTIC       26
+#define MX51_MXC_INT_CSU        27
+#define MX51_MXC_INT_SLIM_B     28
+#define MX51_MXC_INT_SSI1       29
+#define MX51_MXC_INT_SSI2       30
+#define MX51_MXC_INT_UART1      31
+#define MX51_MXC_INT_UART2      32
+#define MX51_MXC_INT_UART3      33
+#define MX51_MXC_INT_RESV34     34
+#define MX51_MXC_INT_RESV35     35
+#define MX51_MXC_INT_CSPI1      36
+#define MX51_MXC_INT_CSPI2      37
+#define MX51_MXC_INT_CSPI       38
+#define MX51_MXC_INT_GPT        39
+#define MX51_MXC_INT_EPIT1      40
+#define MX51_MXC_INT_EPIT2      41
+#define MX51_MXC_INT_GPIO1_INT7 42
+#define MX51_MXC_INT_GPIO1_INT6 43
+#define MX51_MXC_INT_GPIO1_INT5 44
+#define MX51_MXC_INT_GPIO1_INT4 45
+#define MX51_MXC_INT_GPIO1_INT3 46
+#define MX51_MXC_INT_GPIO1_INT2 47
+#define MX51_MXC_INT_GPIO1_INT1 48
+#define MX51_MXC_INT_GPIO1_INT0 49
+#define MX51_MXC_INT_GPIO1_LOW  50
+#define MX51_MXC_INT_GPIO1_HIGH 51
+#define MX51_MXC_INT_GPIO2_LOW  52
+#define MX51_MXC_INT_GPIO2_HIGH 53
+#define MX51_MXC_INT_GPIO3_LOW  54
+#define MX51_MXC_INT_GPIO3_HIGH 55
+#define MX51_MXC_INT_GPIO4_LOW  56
+#define MX51_MXC_INT_GPIO4_HIGH 57
+#define MX51_MXC_INT_WDOG1      58
+#define MX51_MXC_INT_WDOG2      59
+#define MX51_MXC_INT_KPP        60
+#define MX51_MXC_INT_PWM1       61
+#define MX51_MXC_INT_I2C1       62
+#define MX51_MXC_INT_I2C2       63
+#define MX51_MXC_INT_HS_I2C     64
+#define MX51_MXC_INT_RESV65     65
+#define MX51_MXC_INT_RESV66     66
+#define MX51_MXC_INT_SIM_IPB    67
+#define MX51_MXC_INT_SIM_DAT    68
+#define MX51_MXC_INT_IIM        69
+#define MX51_MXC_INT_ATA        70
+#define MX51_MXC_INT_CCM1       71
+#define MX51_MXC_INT_CCM2       72
+#define MX51_MXC_INT_GPC1       73
+#define MX51_MXC_INT_GPC2       74
+#define MX51_MXC_INT_SRC        75
+#define MX51_MXC_INT_NM         76
+#define MX51_MXC_INT_PMU        77
+#define MX51_MXC_INT_CTI_IRQ    78
+#define MX51_MXC_INT_CTI1_TG0   79
+#define MX51_MXC_INT_CTI1_TG1   80
+#define MX51_MXC_INT_MCG_ERR    81
+#define MX51_MXC_INT_MCG_TMR    82
+#define MX51_MXC_INT_MCG_FUNC   83
+#define MX51_MXC_INT_GPU2_IRQ   84
+#define MX51_MXC_INT_GPU2_BUSY  85
+#define MX51_MXC_INT_RESV86     86
+#define MX51_MXC_INT_FEC        87
+#define MX51_MXC_INT_OWIRE      88
+#define MX51_MXC_INT_CTI1_TG2   89
+#define MX51_MXC_INT_SJC        90
+#define MX51_MXC_INT_SPDIF      91
+#define MX51_MXC_INT_TVE        92
+#define MX51_MXC_INT_FIRI       93
+#define MX51_MXC_INT_PWM2       94
+#define MX51_MXC_INT_SLIM_EXP   95
+#define MX51_MXC_INT_SSI3       96
+#define MX51_MXC_INT_EMI_BOOT   97
+#define MX51_MXC_INT_CTI1_TG3   98
+#define MX51_MXC_INT_SMC_RX     99
+#define MX51_MXC_INT_VPU_IDLE   100
+#define MX51_MXC_INT_EMI_NFC    101
+#define MX51_MXC_INT_GPU_IDLE   102
+
+/* silicon revisions specific to i.MX51 */
+#define MX51_CHIP_REV_1_0       0x10
+#define MX51_CHIP_REV_1_1       0x11
+#define MX51_CHIP_REV_1_2       0x12
+#define MX51_CHIP_REV_1_3       0x13
+#define MX51_CHIP_REV_2_0       0x20
+#define MX51_CHIP_REV_2_1       0x21
+#define MX51_CHIP_REV_2_2       0x22
+#define MX51_CHIP_REV_2_3       0x23
+#define MX51_CHIP_REV_3_0       0x30
+#define MX51_CHIP_REV_3_1       0x31
+#define MX51_CHIP_REV_3_2       0x32
+
+/* Mandatory defines used globally */
+
+#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS)
+
+extern int mx51_revision(void);
+#endif
+
+#endif  /*  __ASM_ARCH_MXC_MX51_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index 51990536b84..a790bf21297 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -30,6 +30,7 @@
 #define MXC_CPU_MX27            27
 #define MXC_CPU_MX31            31
 #define MXC_CPU_MX35            35
+#define MXC_CPU_MX51            51
 #define MXC_CPU_MXC91231        91231
 
 #ifndef __ASSEMBLY__
@@ -108,6 +109,18 @@ extern unsigned int __mxc_cpu_type;
 # define cpu_is_mx35()          (0)
 #endif
 
+#ifdef CONFIG_ARCH_MX5
+# ifdef mxc_cpu_type
+#  undef mxc_cpu_type
+#  define mxc_cpu_type __mxc_cpu_type
+# else
+#  define mxc_cpu_type MXC_CPU_MX51
+# endif
+# define cpu_is_mx51()          (mxc_cpu_type == MXC_CPU_MX51)
+#else
+# define cpu_is_mx51()          (0)
+#endif
+
 #ifdef CONFIG_ARCH_MXC91231
 # ifdef mxc_cpu_type
 #  undef mxc_cpu_type
@@ -121,9 +134,10 @@ extern unsigned int __mxc_cpu_type;
 #endif
 
 #if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2)
-#define CSCR_U(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10)
-#define CSCR_L(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x4)
-#define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x8)
+/* These are deprecated, use mx[23][157]_setup_weimcs instead. */
+#define CSCR_U(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10))
+#define CSCR_L(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10 + 0x4))
+#define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10 + 0x8))
 #endif
 
 #define cpu_is_mx3()    (cpu_is_mx31() || cpu_is_mx35() || cpu_is_mxc91231())
diff --git a/arch/arm/plat-mxc/include/mach/mxc91231.h b/arch/arm/plat-mxc/include/mach/mxc91231.h
index 81484d1ef23..5182b986b78 100644
--- a/arch/arm/plat-mxc/include/mach/mxc91231.h
+++ b/arch/arm/plat-mxc/include/mach/mxc91231.h
@@ -184,60 +184,22 @@
 #define MXC91231_CS4_BASE_ADDR          0xB4000000
 #define MXC91231_CS5_BASE_ADDR          0xB6000000
 
-/* Is given address belongs to the specified memory region? */
-#define ADDRESS_IN_REGION(addr, start, size) \
-        (((addr) >= (start)) && ((addr) < (start)+(size)))
-
-/* Is given address belongs to the specified named `module'? */
-#define MXC91231_IS_MODULE(addr, module) \
-        ADDRESS_IN_REGION(addr, MXC91231_ ## module ## _BASE_ADDR, \
-                                MXC91231_ ## module ## _SIZE)
 /*
  * This macro defines the physical to virtual address mapping for all the
  * peripheral modules. It is used by passing in the physical address as x
  * and returning the virtual address. If the physical address is not mapped,
- * it returns 0xDEADBEEF
- */
-
-#define MXC91231_IO_ADDRESS(x) \
-        (void __iomem *) \
-        (MXC91231_IS_MODULE(x, L2CC) ? MXC91231_L2CC_IO_ADDRESS(x) : \
-         MXC91231_IS_MODULE(x, AIPS1) ? MXC91231_AIPS1_IO_ADDRESS(x) : \
-         MXC91231_IS_MODULE(x, AIPS2) ? MXC91231_AIPS2_IO_ADDRESS(x) : \
-         MXC91231_IS_MODULE(x, SPBA0) ? MXC91231_SPBA0_IO_ADDRESS(x) : \
-         MXC91231_IS_MODULE(x, SPBA1) ? MXC91231_SPBA1_IO_ADDRESS(x) : \
-         MXC91231_IS_MODULE(x, ROMP) ? MXC91231_ROMP_IO_ADDRESS(x) : \
-         MXC91231_IS_MODULE(x, AVIC) ? MXC91231_AVIC_IO_ADDRESS(x) : \
-         MXC91231_IS_MODULE(x, X_MEMC) ? MXC91231_X_MEMC_IO_ADDRESS(x) : \
-         0xDEADBEEF)
-
-
-/*
- * define the address mapping macros: in physical address order
+ * it returns 0.
  */
-#define MXC91231_L2CC_IO_ADDRESS(x)  \
-        (((x) - MXC91231_L2CC_BASE_ADDR) + MXC91231_L2CC_BASE_ADDR_VIRT)
-
-#define MXC91231_AIPS1_IO_ADDRESS(x)  \
-        (((x) - MXC91231_AIPS1_BASE_ADDR) + MXC91231_AIPS1_BASE_ADDR_VIRT)
-
-#define MXC91231_SPBA0_IO_ADDRESS(x)  \
-        (((x) - MXC91231_SPBA0_BASE_ADDR) + MXC91231_SPBA0_BASE_ADDR_VIRT)
-
-#define MXC91231_SPBA1_IO_ADDRESS(x)  \
-        (((x) - MXC91231_SPBA1_BASE_ADDR) + MXC91231_SPBA1_BASE_ADDR_VIRT)
-
-#define MXC91231_AIPS2_IO_ADDRESS(x)  \
-        (((x) - MXC91231_AIPS2_BASE_ADDR) + MXC91231_AIPS2_BASE_ADDR_VIRT)
-
-#define MXC91231_ROMP_IO_ADDRESS(x)  \
-        (((x) - MXC91231_ROMP_BASE_ADDR) + MXC91231_ROMP_BASE_ADDR_VIRT)
-
-#define MXC91231_AVIC_IO_ADDRESS(x)  \
-        (((x) - MXC91231_AVIC_BASE_ADDR) + MXC91231_AVIC_BASE_ADDR_VIRT)
 
-#define MXC91231_X_MEMC_IO_ADDRESS(x)  \
-        (((x) - MXC91231_X_MEMC_BASE_ADDR) + MXC91231_X_MEMC_BASE_ADDR_VIRT)
+#define MXC91231_IO_ADDRESS(x) (                                        \
+        IMX_IO_ADDRESS(x, MXC91231_L2CC) ?:                             \
+        IMX_IO_ADDRESS(x, MXC91231_X_MEMC) ?:                           \
+        IMX_IO_ADDRESS(x, MXC91231_ROMP) ?:                             \
+        IMX_IO_ADDRESS(x, MXC91231_AVIC) ?:                             \
+        IMX_IO_ADDRESS(x, MXC91231_AIPS1) ?:                            \
+        IMX_IO_ADDRESS(x, MXC91231_SPBA0) ?:                            \
+        IMX_IO_ADDRESS(x, MXC91231_SPBA1) ?:                            \
+        IMX_IO_ADDRESS(x, MXC91231_AIPS2))
 
 /*
  * Interrupt numbers
diff --git a/arch/arm/plat-mxc/include/mach/mxc_ehci.h b/arch/arm/plat-mxc/include/mach/mxc_ehci.h
index 8f796239393..4b9b8368c0c 100644
--- a/arch/arm/plat-mxc/include/mach/mxc_ehci.h
+++ b/arch/arm/plat-mxc/include/mach/mxc_ehci.h
@@ -22,6 +22,10 @@
 #define MXC_EHCI_POWER_PINS_ENABLED     (1 << 5)
 #define MXC_EHCI_TTL_ENABLED            (1 << 6)
 
+#define MXC_EHCI_INTERNAL_PHY           (1 << 7)
+#define MXC_EHCI_IPPUE_DOWN             (1 << 8)
+#define MXC_EHCI_IPPUE_UP               (1 << 9)
+
 struct mxc_usbh_platform_data {
         int (*init)(struct platform_device *pdev);
         int (*exit)(struct platform_device *pdev);
diff --git a/arch/arm/plat-mxc/include/mach/ssi.h b/arch/arm/plat-mxc/include/mach/ssi.h
new file mode 100644
index 00000000000..c34ded523f1
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/ssi.h
@@ -0,0 +1,18 @@
+#ifndef __MACH_SSI_H
+#define __MACH_SSI_H
+
+struct snd_ac97;
+
+extern unsigned char imx_ssi_fiq_start, imx_ssi_fiq_end;
+extern unsigned long imx_ssi_fiq_base, imx_ssi_fiq_tx_buffer, imx_ssi_fiq_rx_buffer;
+
+struct imx_ssi_platform_data {
+        unsigned int flags;
+#define IMX_SSI_DMA            (1 << 0)
+#define IMX_SSI_USE_AC97       (1 << 1)
+        void (*ac97_reset) (struct snd_ac97 *ac97);
+        void (*ac97_warm_reset)(struct snd_ac97 *ac97);
+};
+
+#endif /* __MACH_SSI_H */
+
diff --git a/arch/arm/plat-mxc/include/mach/timex.h b/arch/arm/plat-mxc/include/mach/timex.h
index 527a6c24788..024416ed11c 100644
--- a/arch/arm/plat-mxc/include/mach/timex.h
+++ b/arch/arm/plat-mxc/include/mach/timex.h
@@ -28,6 +28,8 @@
 #define CLOCK_TICK_RATE         16625000
 #elif defined CONFIG_ARCH_MX25
 #define CLOCK_TICK_RATE         16000000
+#elif defined CONFIG_ARCH_MX5
+#define CLOCK_TICK_RATE         8000000
 #elif defined CONFIG_ARCH_MXC91231
 #define CLOCK_TICK_RATE         13000000
 #endif
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
index d49384cb1e9..b6d3d0fddc4 100644
--- a/arch/arm/plat-mxc/include/mach/uncompress.h
+++ b/arch/arm/plat-mxc/include/mach/uncompress.h
@@ -1,8 +1,6 @@
 /*
  *  arch/arm/plat-mxc/include/mach/uncompress.h
  *
- *
- *
  *  Copyright (C) 1999 ARM Limited
  *  Copyright (C) Shane Nay (shane@minirl.com)
  *
@@ -25,7 +23,6 @@
 
 #define __MXC_BOOT_UNCOMPRESS
 
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 
 static unsigned long uart_base;
@@ -69,6 +66,7 @@ static inline void flush(void)
 #define MX2X_UART1_BASE_ADDR    0x1000a000
 #define MX3X_UART1_BASE_ADDR    0x43F90000
 #define MX3X_UART2_BASE_ADDR    0x43F94000
+#define MX51_UART1_BASE_ADDR    0x73fbc000
 
 static __inline__ void __arch_decomp_setup(unsigned long arch_id)
 {
@@ -104,6 +102,9 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
         case MACH_TYPE_MAGX_ZN5:
                 uart_base = MX3X_UART2_BASE_ADDR;
                 break;
+        case MACH_TYPE_MX51_BABBAGE:
+                uart_base = MX51_UART1_BASE_ADDR;
+                break;
         default:
                 break;
         }
diff --git a/arch/arm/plat-mxc/iomux-mx1-mx2.c b/arch/arm/plat-mxc/iomux-mx1-mx2.c
deleted file mode 100644
index a37163ce280..00000000000
--- a/arch/arm/plat-mxc/iomux-mx1-mx2.c
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- *  arch/arm/mach-mxc/generic.c
- *
- *  author: Sascha Hauer
- *  Created: april 20th, 2004
- *  Copyright: Synertronixx GmbH
- *
- *  Common code for i.MX machines
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
- */
-
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/string.h>
-#include <linux/gpio.h>
-
-#include <mach/hardware.h>
-#include <asm/mach/map.h>
-#include <mach/iomux.h>
-
-void mxc_gpio_mode(int gpio_mode)
-{
-        unsigned int pin = gpio_mode & GPIO_PIN_MASK;
-        unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
-        unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> GPIO_OCR_SHIFT;
-        unsigned int tmp;
-
-        /* Pullup enable */
-        tmp = __raw_readl(VA_GPIO_BASE + MXC_PUEN(port));
-        if (gpio_mode & GPIO_PUEN)
-                tmp |= (1 << pin);
-        else
-                tmp &= ~(1 << pin);
-        __raw_writel(tmp, VA_GPIO_BASE + MXC_PUEN(port));
-
-        /* Data direction */
-        tmp = __raw_readl(VA_GPIO_BASE + MXC_DDIR(port));
-        if (gpio_mode & GPIO_OUT)
-                tmp |= 1 << pin;
-        else
-                tmp &= ~(1 << pin);
-        __raw_writel(tmp, VA_GPIO_BASE + MXC_DDIR(port));
-
-        /* Primary / alternate function */
-        tmp = __raw_readl(VA_GPIO_BASE + MXC_GPR(port));
-        if (gpio_mode & GPIO_AF)
-                tmp |= (1 << pin);
-        else
-                tmp &= ~(1 << pin);
-        __raw_writel(tmp, VA_GPIO_BASE + MXC_GPR(port));
-
-        /* use as gpio? */
-        tmp = __raw_readl(VA_GPIO_BASE + MXC_GIUS(port));
-        if (gpio_mode & (GPIO_PF | GPIO_AF))
-                tmp &= ~(1 << pin);
-        else
-                tmp |= (1 << pin);
-        __raw_writel(tmp, VA_GPIO_BASE + MXC_GIUS(port));
-
-        if (pin < 16) {
-                tmp = __raw_readl(VA_GPIO_BASE + MXC_OCR1(port));
-                tmp &= ~(3 << (pin * 2));
-                tmp |= (ocr << (pin * 2));
-                __raw_writel(tmp, VA_GPIO_BASE + MXC_OCR1(port));
-
-                tmp = __raw_readl(VA_GPIO_BASE + MXC_ICONFA1(port));
-                tmp &= ~(3 << (pin * 2));
-                tmp |= ((gpio_mode >> GPIO_AOUT_SHIFT) & 3) << (pin * 2);
-                __raw_writel(tmp, VA_GPIO_BASE + MXC_ICONFA1(port));
-
-                tmp = __raw_readl(VA_GPIO_BASE + MXC_ICONFB1(port));
-                tmp &= ~(3 << (pin * 2));
-                tmp |= ((gpio_mode >> GPIO_BOUT_SHIFT) & 3) << (pin * 2);
-                __raw_writel(tmp, VA_GPIO_BASE + MXC_ICONFB1(port));
-        } else {
-                pin -= 16;
-
-                tmp = __raw_readl(VA_GPIO_BASE + MXC_OCR2(port));
-                tmp &= ~(3 << (pin * 2));
-                tmp |= (ocr << (pin * 2));
-                __raw_writel(tmp, VA_GPIO_BASE + MXC_OCR2(port));
-
-                tmp = __raw_readl(VA_GPIO_BASE + MXC_ICONFA2(port));
-                tmp &= ~(3 << (pin * 2));
-                tmp |= ((gpio_mode >> GPIO_AOUT_SHIFT) & 3) << (pin * 2);
-                __raw_writel(tmp, VA_GPIO_BASE + MXC_ICONFA2(port));
-
-                tmp = __raw_readl(VA_GPIO_BASE + MXC_ICONFB2(port));
-                tmp &= ~(3 << (pin * 2));
-                tmp |= ((gpio_mode >> GPIO_BOUT_SHIFT) & 3) << (pin * 2);
-                __raw_writel(tmp, VA_GPIO_BASE + MXC_ICONFB2(port));
-        }
-}
-EXPORT_SYMBOL(mxc_gpio_mode);
-
-int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
-                const char *label)
-{
-        const int *p = pin_list;
-        int i;
-        unsigned gpio;
-        unsigned mode;
-        int ret = -EINVAL;
-
-        for (i = 0; i < count; i++) {
-                gpio = *p & (GPIO_PIN_MASK | GPIO_PORT_MASK);
-                mode = *p & ~(GPIO_PIN_MASK | GPIO_PORT_MASK);
-
-                if (gpio >= (GPIO_PORT_MAX + 1) * 32)
-                        goto setup_error;
-
-                ret = gpio_request(gpio, label);
-                if (ret)
-                        goto setup_error;
-
-                mxc_gpio_mode(gpio | mode);
-
-                p++;
-        }
-        return 0;
-
-setup_error:
-        mxc_gpio_release_multiple_pins(pin_list, i);
-        return ret;
-}
-EXPORT_SYMBOL(mxc_gpio_setup_multiple_pins);
-
-void mxc_gpio_release_multiple_pins(const int *pin_list, int count)
-{
-        const int *p = pin_list;
-        int i;
-
-        for (i = 0; i < count; i++) {
-                unsigned gpio = *p & (GPIO_PIN_MASK | GPIO_PORT_MASK);
-                gpio_free(gpio);
-                p++;
-        }
-
-}
-EXPORT_SYMBOL(mxc_gpio_release_multiple_pins);
-
diff --git a/arch/arm/plat-mxc/iomux-v1.c b/arch/arm/plat-mxc/iomux-v1.c
new file mode 100644
index 00000000000..960a02cbcba
--- /dev/null
+++ b/arch/arm/plat-mxc/iomux-v1.c
@@ -0,0 +1,238 @@
+/*
+ * arch/arm/plat-mxc/iomux-v1.c
+ *
+ * Copyright (C) 2004 Sascha Hauer, Synertronixx GmbH
+ * Copyright (C) 2009 Uwe Kleine-Koenig, Pengutronix
+ *
+ * Common code for i.MX1, i.MX21 and i.MX27
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
+ */
+
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/string.h>
+#include <linux/gpio.h>
+
+#include <mach/hardware.h>
+#include <asm/mach/map.h>
+#include <mach/iomux-v1.h>
+
+static void __iomem *imx_iomuxv1_baseaddr;
+static unsigned imx_iomuxv1_numports;
+
+static inline unsigned long imx_iomuxv1_readl(unsigned offset)
+{
+        return __raw_readl(imx_iomuxv1_baseaddr + offset);
+}
+
+static inline void imx_iomuxv1_writel(unsigned long val, unsigned offset)
+{
+        __raw_writel(val, imx_iomuxv1_baseaddr + offset);
+}
+
+static inline void imx_iomuxv1_rmwl(unsigned offset,
+                unsigned long mask, unsigned long value)
+{
+        unsigned long reg = imx_iomuxv1_readl(offset);
+
+        reg &= ~mask;
+        reg |= value;
+
+        imx_iomuxv1_writel(reg, offset);
+}
+
+static inline void imx_iomuxv1_set_puen(
+                unsigned int port, unsigned int pin, int on)
+{
+        unsigned long mask = 1 << pin;
+
+        imx_iomuxv1_rmwl(MXC_PUEN(port), mask, on ? mask : 0);
+}
+
+static inline void imx_iomuxv1_set_ddir(
+                unsigned int port, unsigned int pin, int out)
+{
+        unsigned long mask = 1 << pin;
+
+        imx_iomuxv1_rmwl(MXC_DDIR(port), mask, out ? mask : 0);
+}
+
+static inline void imx_iomuxv1_set_gpr(
+                unsigned int port, unsigned int pin, int af)
+{
+        unsigned long mask = 1 << pin;
+
+        imx_iomuxv1_rmwl(MXC_GPR(port), mask, af ? mask : 0);
+}
+
+static inline void imx_iomuxv1_set_gius(
+                unsigned int port, unsigned int pin, int inuse)
+{
+        unsigned long mask = 1 << pin;
+
+        imx_iomuxv1_rmwl(MXC_GIUS(port), mask, inuse ? mask : 0);
+}
+
+static inline void imx_iomuxv1_set_ocr(
+                unsigned int port, unsigned int pin, unsigned int ocr)
+{
+        unsigned long shift = (pin & 0xf) << 1;
+        unsigned long mask = 3 << shift;
+        unsigned long value = ocr << shift;
+        unsigned long offset = pin < 16 ? MXC_OCR1(port) : MXC_OCR2(port);
+
+        imx_iomuxv1_rmwl(offset, mask, value);
+}
+
+static inline void imx_iomuxv1_set_iconfa(
+                unsigned int port, unsigned int pin, unsigned int aout)
+{
+        unsigned long shift = (pin & 0xf) << 1;
+        unsigned long mask = 3 << shift;
+        unsigned long value = aout << shift;
+        unsigned long offset = pin < 16 ? MXC_ICONFA1(port) : MXC_ICONFA2(port);
+
+        imx_iomuxv1_rmwl(offset, mask, value);
+}
+
+static inline void imx_iomuxv1_set_iconfb(
+                unsigned int port, unsigned int pin, unsigned int bout)
+{
+        unsigned long shift = (pin & 0xf) << 1;
+        unsigned long mask = 3 << shift;
+        unsigned long value = bout << shift;
+        unsigned long offset = pin < 16 ? MXC_ICONFB1(port) : MXC_ICONFB2(port);
+
+        imx_iomuxv1_rmwl(offset, mask, value);
+}
+
+int mxc_gpio_mode(int gpio_mode)
+{
+        unsigned int pin = gpio_mode & GPIO_PIN_MASK;
+        unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
+        unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> GPIO_OCR_SHIFT;
+        unsigned int aout = (gpio_mode >> GPIO_AOUT_SHIFT) & 3;
+        unsigned int bout = (gpio_mode >> GPIO_BOUT_SHIFT) & 3;
+
+        if (port >= imx_iomuxv1_numports)
+                return -EINVAL;
+
+        /* Pullup enable */
+        imx_iomuxv1_set_puen(port, pin, gpio_mode & GPIO_PUEN);
+
+        /* Data direction */
+        imx_iomuxv1_set_ddir(port, pin, gpio_mode & GPIO_OUT);
+
+        /* Primary / alternate function */
+        imx_iomuxv1_set_gpr(port, pin, gpio_mode & GPIO_AF);
+
+        /* use as gpio? */
+        imx_iomuxv1_set_gius(port, pin, !(gpio_mode & (GPIO_PF | GPIO_AF)));
+
+        imx_iomuxv1_set_ocr(port, pin, ocr);
+
+        imx_iomuxv1_set_iconfa(port, pin, aout);
+
+        imx_iomuxv1_set_iconfb(port, pin, bout);
+
+        return 0;
+}
+EXPORT_SYMBOL(mxc_gpio_mode);
+
+static int imx_iomuxv1_setup_multiple(const int *list, unsigned count)
+{
+        size_t i;
+        int ret;
+
+        for (i = 0; i < count; ++i) {
+                ret = mxc_gpio_mode(list[i]);
+
+                if (ret)
+                        return ret;
+        }
+
+        return ret;
+}
+
+int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
+                const char *label)
+{
+        size_t i;
+        int ret;
+
+        for (i = 0; i < count; ++i) {
+                unsigned gpio = pin_list[i] & (GPIO_PIN_MASK | GPIO_PORT_MASK);
+
+                ret = gpio_request(gpio, label);
+                if (ret)
+                        goto err_gpio_request;
+        }
+
+        ret = imx_iomuxv1_setup_multiple(pin_list, count);
+        if (ret)
+                goto err_setup;
+
+        return 0;
+
+err_setup:
+        BUG_ON(i != count);
+
+err_gpio_request:
+        mxc_gpio_release_multiple_pins(pin_list, i);
+
+        return ret;
+}
+EXPORT_SYMBOL(mxc_gpio_setup_multiple_pins);
+
+void mxc_gpio_release_multiple_pins(const int *pin_list, int count)
+{
+        size_t i;
+
+        for (i = 0; i < count; ++i) {
+                unsigned gpio = pin_list[i] & (GPIO_PIN_MASK | GPIO_PORT_MASK);
+
+                gpio_free(gpio);
+        }
+}
+EXPORT_SYMBOL(mxc_gpio_release_multiple_pins);
+
+static int imx_iomuxv1_init(void)
+{
+#ifdef CONFIG_ARCH_MX1
+        if (cpu_is_mx1()) {
+                imx_iomuxv1_baseaddr = MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR);
+                imx_iomuxv1_numports = MX1_NUM_GPIO_PORT;
+        } else
+#endif
+#ifdef CONFIG_MACH_MX21
+        if (cpu_is_mx21()) {
+                imx_iomuxv1_baseaddr = MX21_IO_ADDRESS(MX21_GPIO_BASE_ADDR);
+                imx_iomuxv1_numports = MX21_NUM_GPIO_PORT;
+        } else
+#endif
+#ifdef CONFIG_MACH_MX27
+        if (cpu_is_mx27()) {
+                imx_iomuxv1_baseaddr = MX27_IO_ADDRESS(MX27_GPIO_BASE_ADDR);
+                imx_iomuxv1_numports = MX27_NUM_GPIO_PORT;
+        } else
+#endif
+                return -ENODEV;
+
+        return 0;
+}
+pure_initcall(imx_iomuxv1_init);
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c
index 4ff6dfe0428..c36f2630ed9 100644
--- a/arch/arm/plat-mxc/pwm.c
+++ b/arch/arm/plat-mxc/pwm.c
@@ -11,6 +11,7 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
+#include <linux/slab.h>
 #include <linux/err.h>
 #include <linux/clk.h>
 #include <linux/io.h>
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c
index 844567ee35f..c1ce51abdba 100644
--- a/arch/arm/plat-mxc/time.c
+++ b/arch/arm/plat-mxc/time.c
@@ -30,9 +30,15 @@
 #include <asm/mach/time.h>
 #include <mach/common.h>
 
+/*
+ * There are 2 versions of the timer hardware on Freescale MXC hardware.
+ * Version 1: MX1/MXL, MX21, MX27.
+ * Version 2: MX25, MX31, MX35, MX37, MX51
+ */
+
 /* defines common for all i.MX */
 #define MXC_TCTL                0x00
-#define MXC_TCTL_TEN            (1 << 0)
+#define MXC_TCTL_TEN            (1 << 0) /* Enable module */
 #define MXC_TPRER               0x04
 
 /* MX1, MX21, MX27 */
@@ -47,8 +53,8 @@
 #define MX2_TSTAT_CAPT          (1 << 1)
 #define MX2_TSTAT_COMP          (1 << 0)
 
-/* MX31, MX35, MX25, MXC91231 */
-#define MX3_TCTL_WAITEN         (1 << 3)
+/* MX31, MX35, MX25, MXC91231, MX5 */
+#define MX3_TCTL_WAITEN         (1 << 3) /* Wait enable mode */
 #define MX3_TCTL_CLK_IPG        (1 << 6)
 #define MX3_TCTL_FRR            (1 << 9)
 #define MX3_IR                  0x0c
@@ -57,6 +63,9 @@
 #define MX3_TCN                 0x24
 #define MX3_TCMP                0x10
 
+#define timer_is_v1()   (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27())
+#define timer_is_v2()   (!timer_is_v1())
+
 static struct clock_event_device clockevent_mxc;
 static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED;
 
@@ -66,7 +75,7 @@ static inline void gpt_irq_disable(void)
 {
         unsigned int tmp;
 
-        if (cpu_is_mx3() || cpu_is_mx25())
+        if (timer_is_v2())
                 __raw_writel(0, timer_base + MX3_IR);
         else {
                 tmp = __raw_readl(timer_base + MXC_TCTL);
@@ -76,7 +85,7 @@ static inline void gpt_irq_disable(void)
 
 static inline void gpt_irq_enable(void)
 {
-        if (cpu_is_mx3() || cpu_is_mx25())
+        if (timer_is_v2())
                 __raw_writel(1<<0, timer_base + MX3_IR);
         else {
                 __raw_writel(__raw_readl(timer_base + MXC_TCTL) | MX1_2_TCTL_IRQEN,
@@ -86,11 +95,13 @@ static inline void gpt_irq_enable(void)
 
 static void gpt_irq_acknowledge(void)
 {
-        if (cpu_is_mx1())
-                __raw_writel(0, timer_base + MX1_2_TSTAT);
-        if (cpu_is_mx2())
-                __raw_writel(MX2_TSTAT_CAPT | MX2_TSTAT_COMP, timer_base + MX1_2_TSTAT);
-        if (cpu_is_mx3() || cpu_is_mx25())
+        if (timer_is_v1()) {
+                if (cpu_is_mx1())
+                        __raw_writel(0, timer_base + MX1_2_TSTAT);
+                else
+                        __raw_writel(MX2_TSTAT_CAPT | MX2_TSTAT_COMP,
+                                timer_base + MX1_2_TSTAT);
+        } else if (timer_is_v2())
                 __raw_writel(MX3_TSTAT_OF1, timer_base + MX3_TSTAT);
 }
 
@@ -117,7 +128,7 @@ static int __init mxc_clocksource_init(struct clk *timer_clk)
 {
         unsigned int c = clk_get_rate(timer_clk);
 
-        if (cpu_is_mx3() || cpu_is_mx25())
+        if (timer_is_v2())
                 clocksource_mxc.read = mx3_get_cycles;
 
         clocksource_mxc.mult = clocksource_hz2mult(c,
@@ -180,7 +191,7 @@ static void mxc_set_mode(enum clock_event_mode mode,
 
         if (mode != clockevent_mode) {
                 /* Set event time into far-far future */
-                if (cpu_is_mx3() || cpu_is_mx25())
+                if (timer_is_v2())
                         __raw_writel(__raw_readl(timer_base + MX3_TCN) - 3,
                                         timer_base + MX3_TCMP);
                 else
@@ -233,7 +244,7 @@ static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id)
         struct clock_event_device *evt = &clockevent_mxc;
         uint32_t tstat;
 
-        if (cpu_is_mx3() || cpu_is_mx25())
+        if (timer_is_v2())
                 tstat = __raw_readl(timer_base + MX3_TSTAT);
         else
                 tstat = __raw_readl(timer_base + MX1_2_TSTAT);
@@ -264,7 +275,7 @@ static int __init mxc_clockevent_init(struct clk *timer_clk)
 {
         unsigned int c = clk_get_rate(timer_clk);
 
-        if (cpu_is_mx3() || cpu_is_mx25())
+        if (timer_is_v2())
                 clockevent_mxc.set_next_event = mx3_set_next_event;
 
         clockevent_mxc.mult = div_sc(c, NSEC_PER_SEC,
@@ -296,7 +307,7 @@ void __init mxc_timer_init(struct clk *timer_clk, void __iomem *base, int irq)
         __raw_writel(0, timer_base + MXC_TCTL);
         __raw_writel(0, timer_base + MXC_TPRER); /* see datasheet note */
 
-        if (cpu_is_mx3() || cpu_is_mx25())
+        if (timer_is_v2())
                 tctl_val = MX3_TCTL_CLK_IPG | MX3_TCTL_FRR | MX3_TCTL_WAITEN | MXC_TCTL_TEN;
         else
                 tctl_val = MX1_2_TCTL_FRR | MX1_2_TCTL_CLK_PCLK1 | MXC_TCTL_TEN;
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c
new file mode 100644
index 00000000000..afa6709db0b
--- /dev/null
+++ b/arch/arm/plat-mxc/tzic.c
@@ -0,0 +1,172 @@
+/*
+ * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+
+#include <asm/mach/irq.h>
+
+#include <mach/hardware.h>
+
+/*
+ *****************************************
+ * TZIC Registers                        *
+ *****************************************
+ */
+
+#define TZIC_INTCNTL    0x0000  /* Control register */
+#define TZIC_INTTYPE    0x0004  /* Controller Type register */
+#define TZIC_IMPID      0x0008  /* Distributor Implementer Identification */
+#define TZIC_PRIOMASK   0x000C  /* Priority Mask Reg */
+#define TZIC_SYNCCTRL   0x0010  /* Synchronizer Control register */
+#define TZIC_DSMINT     0x0014  /* DSM interrupt Holdoffregister */
+#define TZIC_INTSEC0(i) (0x0080 + ((i) << 2)) /* Interrupt Security Reg 0 */
+#define TZIC_ENSET0(i)  (0x0100 + ((i) << 2)) /* Enable Set Reg 0 */
+#define TZIC_ENCLEAR0(i) (0x0180 + ((i) << 2)) /* Enable Clear Reg 0 */
+#define TZIC_SRCSET0    0x0200  /* Source Set Register 0 */
+#define TZIC_SRCCLAR0   0x0280  /* Source Clear Register 0 */
+#define TZIC_PRIORITY0  0x0400  /* Priority Register 0 */
+#define TZIC_PND0       0x0D00  /* Pending Register 0 */
+#define TZIC_HIPND0     0x0D80  /* High Priority Pending Register */
+#define TZIC_WAKEUP0(i) (0x0E00 + ((i) << 2))   /* Wakeup Config Register */
+#define TZIC_SWINT      0x0F00  /* Software Interrupt Rigger Register */
+#define TZIC_ID0        0x0FD0  /* Indentification Register 0 */
+
+void __iomem *tzic_base; /* Used as irq controller base in entry-macro.S */
+
+/**
+ * tzic_mask_irq() - Disable interrupt number "irq" in the TZIC
+ *
+ * @param  irq          interrupt source number
+ */
+static void tzic_mask_irq(unsigned int irq)
+{
+        int index, off;
+
+        index = irq >> 5;
+        off = irq & 0x1F;
+        __raw_writel(1 << off, tzic_base + TZIC_ENCLEAR0(index));
+}
+
+/**
+ * tzic_unmask_irq() - Enable interrupt number "irq" in the TZIC
+ *
+ * @param  irq          interrupt source number
+ */
+static void tzic_unmask_irq(unsigned int irq)
+{
+        int index, off;
+
+        index = irq >> 5;
+        off = irq & 0x1F;
+        __raw_writel(1 << off, tzic_base + TZIC_ENSET0(index));
+}
+
+static unsigned int wakeup_intr[4];
+
+/**
+ * tzic_set_wake_irq() - Set interrupt number "irq" in the TZIC as a wake-up source.
+ *
+ * @param  irq          interrupt source number
+ * @param  enable       enable as wake-up if equal to non-zero
+ *                      disble as wake-up if equal to zero
+ *
+ * @return       This function returns 0 on success.
+ */
+static int tzic_set_wake_irq(unsigned int irq, unsigned int enable)
+{
+        unsigned int index, off;
+
+        index = irq >> 5;
+        off = irq & 0x1F;
+
+        if (index > 3)
+                return -EINVAL;
+
+        if (enable)
+                wakeup_intr[index] |= (1 << off);
+        else
+                wakeup_intr[index] &= ~(1 << off);
+
+        return 0;
+}
+
+static struct irq_chip mxc_tzic_chip = {
+        .name = "MXC_TZIC",
+        .ack = tzic_mask_irq,
+        .mask = tzic_mask_irq,
+        .unmask = tzic_unmask_irq,
+        .set_wake = tzic_set_wake_irq,
+};
+
+/*
+ * This function initializes the TZIC hardware and disables all the
+ * interrupts. It registers the interrupt enable and disable functions
+ * to the kernel for each interrupt source.
+ */
+void __init tzic_init_irq(void __iomem *irqbase)
+{
+        int i;
+
+        tzic_base = irqbase;
+        /* put the TZIC into the reset value with
+         * all interrupts disabled
+         */
+        i = __raw_readl(tzic_base + TZIC_INTCNTL);
+
+        __raw_writel(0x80010001, tzic_base + TZIC_INTCNTL);
+        __raw_writel(0x1f, tzic_base + TZIC_PRIOMASK);
+        __raw_writel(0x02, tzic_base + TZIC_SYNCCTRL);
+
+        for (i = 0; i < 4; i++)
+                __raw_writel(0xFFFFFFFF, tzic_base + TZIC_INTSEC0(i));
+
+        /* disable all interrupts */
+        for (i = 0; i < 4; i++)
+                __raw_writel(0xFFFFFFFF, tzic_base + TZIC_ENCLEAR0(i));
+
+        /* all IRQ no FIQ Warning :: No selection */
+
+        for (i = 0; i < MXC_INTERNAL_IRQS; i++) {
+                set_irq_chip(i, &mxc_tzic_chip);
+                set_irq_handler(i, handle_level_irq);
+                set_irq_flags(i, IRQF_VALID);
+        }
+
+        pr_info("TrustZone Interrupt Controller (TZIC) initialized\n");
+}
+
+/**
+ * tzic_enable_wake() - enable wakeup interrupt
+ *
+ * @param is_idle               1 if called in idle loop (ENSET0 register);
+ *                              0 to be used when called from low power entry
+ * @return                      0 if successful; non-zero otherwise
+ */
+int tzic_enable_wake(int is_idle)
+{
+        unsigned int i, v;
+
+        __raw_writel(1, tzic_base + TZIC_DSMINT);
+        if (unlikely(__raw_readl(tzic_base + TZIC_DSMINT) == 0))
+                return -EAGAIN;
+
+        for (i = 0; i < 4; i++) {
+                v = is_idle ? __raw_readl(TZIC_ENSET0(i)) : wakeup_intr[i];
+                __raw_writel(v, TZIC_WAKEUP0(i));
+        }
+
+        return 0;
+}
diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c
index 62f18ad43a2..fa7cb3a57cb 100644
--- a/arch/arm/plat-nomadik/timer.c
+++ b/arch/arm/plat-nomadik/timer.c
@@ -49,24 +49,17 @@ static struct clocksource nmdk_clksrc = {
 static void nmdk_clkevt_mode(enum clock_event_mode mode,
                              struct clock_event_device *dev)
 {
-        unsigned long flags;
-
         switch (mode) {
         case CLOCK_EVT_MODE_PERIODIC:
-                /* enable interrupts -- and count current value? */
-                raw_local_irq_save(flags);
+                /* count current value? */
                 writel(readl(mtu_base + MTU_IMSC) | 1, mtu_base + MTU_IMSC);
-                raw_local_irq_restore(flags);
                 break;
         case CLOCK_EVT_MODE_ONESHOT:
                 BUG(); /* Not supported, yet */
                 /* FALLTHROUGH */
         case CLOCK_EVT_MODE_SHUTDOWN:
         case CLOCK_EVT_MODE_UNUSED:
-                /* disable irq */
-                raw_local_irq_save(flags);
                 writel(readl(mtu_base + MTU_IMSC) & ~1, mtu_base + MTU_IMSC);
-                raw_local_irq_restore(flags);
                 break;
         case CLOCK_EVT_MODE_RESUME:
                 break;
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 088c1a03b94..f12f0e39ddf 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -44,9 +44,6 @@
 
 #define NO_LENGTH_CHECK 0xffffffff
 
-unsigned char omap_bootloader_tag[512];
-int omap_bootloader_tag_len;
-
 struct omap_board_config_kernel *omap_board_config;
 int omap_board_config_size;
 
@@ -100,10 +97,17 @@ EXPORT_SYMBOL(omap_get_var_config);
 
 #include <linux/clocksource.h>
 
+/*
+ * offset_32k holds the init time counter value. It is then subtracted
+ * from every counter read to achieve a counter that counts time from the
+ * kernel boot (needed for sched_clock()).
+ */
+static u32 offset_32k __read_mostly;
+
 #ifdef CONFIG_ARCH_OMAP16XX
 static cycle_t omap16xx_32k_read(struct clocksource *cs)
 {
-        return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED);
+        return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED) - offset_32k;
 }
 #else
 #define omap16xx_32k_read       NULL
@@ -112,7 +116,7 @@ static cycle_t omap16xx_32k_read(struct clocksource *cs)
 #ifdef CONFIG_ARCH_OMAP2420
 static cycle_t omap2420_32k_read(struct clocksource *cs)
 {
-        return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10);
+        return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10) - offset_32k;
 }
 #else
 #define omap2420_32k_read       NULL
@@ -121,7 +125,7 @@ static cycle_t omap2420_32k_read(struct clocksource *cs)
 #ifdef CONFIG_ARCH_OMAP2430
 static cycle_t omap2430_32k_read(struct clocksource *cs)
 {
-        return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10);
+        return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10) - offset_32k;
 }
 #else
 #define omap2430_32k_read       NULL
@@ -130,7 +134,7 @@ static cycle_t omap2430_32k_read(struct clocksource *cs)
 #ifdef CONFIG_ARCH_OMAP3
 static cycle_t omap34xx_32k_read(struct clocksource *cs)
 {
-        return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10);
+        return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10) - offset_32k;
 }
 #else
 #define omap34xx_32k_read       NULL
@@ -139,7 +143,7 @@ static cycle_t omap34xx_32k_read(struct clocksource *cs)
 #ifdef CONFIG_ARCH_OMAP4
 static cycle_t omap44xx_32k_read(struct clocksource *cs)
 {
-        return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10);
+        return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10) - offset_32k;
 }
 #else
 #define omap44xx_32k_read       NULL
@@ -227,6 +231,8 @@ static int __init omap_init_clocksource_32k(void)
                 clocksource_32k.mult = clocksource_hz2mult(32768,
                                             clocksource_32k.shift);
 
+                offset_32k = clocksource_32k.read(&clocksource_32k);
+
                 if (clocksource_register(&clocksource_32k))
                         printk(err, clocksource_32k.name);
         }
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 4a4cd8774aa..95677d17cd1 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -14,6 +14,7 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/slab.h>
 
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 2ab224c8e16..1d959965ff5 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -29,6 +29,7 @@
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/io.h>
+#include <linux/slab.h>
 
 #include <asm/system.h>
 #include <mach/hardware.h>
@@ -936,6 +937,15 @@ void omap_start_dma(int lch)
 {
         u32 l;
 
+        /*
+         * The CPC/CDAC register needs to be initialized to zero
+         * before starting dma transfer.
+         */
+        if (cpu_is_omap15xx())
+                dma_write(0, CPC(lch));
+        else
+                dma_write(0, CDAC(lch));
+
         if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
                 int next_lch, cur_lch;
                 char dma_chan_link_map[OMAP_DMA4_LOGICAL_DMA_CH_COUNT];
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 337199ed347..45a225d0912 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -798,7 +798,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
         case METHOD_MPUIO:
                 reg += OMAP_MPUIO_GPIO_INT_EDGE;
                 l = __raw_readl(reg);
-                if (trigger & IRQ_TYPE_EDGE_BOTH)
+                if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
                         bank->toggle_mask |= 1 << gpio;
                 if (trigger & IRQ_TYPE_EDGE_RISING)
                         l |= 1 << gpio;
@@ -812,7 +812,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
         case METHOD_GPIO_1510:
                 reg += OMAP1510_GPIO_INT_CONTROL;
                 l = __raw_readl(reg);
-                if (trigger & IRQ_TYPE_EDGE_BOTH)
+                if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
                         bank->toggle_mask |= 1 << gpio;
                 if (trigger & IRQ_TYPE_EDGE_RISING)
                         l |= 1 << gpio;
@@ -846,7 +846,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
         case METHOD_GPIO_7XX:
                 reg += OMAP7XX_GPIO_INT_CONTROL;
                 l = __raw_readl(reg);
-                if (trigger & IRQ_TYPE_EDGE_BOTH)
+                if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
                         bank->toggle_mask |= 1 << gpio;
                 if (trigger & IRQ_TYPE_EDGE_RISING)
                         l |= 1 << gpio;
@@ -2140,18 +2140,18 @@ void omap2_gpio_resume_after_retention(void)
                 if (gen) {
                         u32 old0, old1;
 
-                        if (cpu_is_omap24xx() || cpu_is_omap44xx()) {
+                        if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
                                 old0 = __raw_readl(bank->base +
                                         OMAP24XX_GPIO_LEVELDETECT0);
                                 old1 = __raw_readl(bank->base +
                                         OMAP24XX_GPIO_LEVELDETECT1);
-                        __raw_writel(old0 | gen, bank->base +
+                                __raw_writel(old0 | gen, bank->base +
                                         OMAP24XX_GPIO_LEVELDETECT0);
-                        __raw_writel(old1 | gen, bank->base +
+                                __raw_writel(old1 | gen, bank->base +
                                         OMAP24XX_GPIO_LEVELDETECT1);
-                        __raw_writel(old0, bank->base +
+                                __raw_writel(old0, bank->base +
                                         OMAP24XX_GPIO_LEVELDETECT0);
-                        __raw_writel(old1, bank->base +
+                                __raw_writel(old1, bank->base +
                                         OMAP24XX_GPIO_LEVELDETECT1);
                         }
 
diff --git a/arch/arm/plat-omap/include/plat/blizzard.h b/arch/arm/plat-omap/include/plat/blizzard.h
index 8d160f17137..56e7f2e7d12 100644
--- a/arch/arm/plat-omap/include/plat/blizzard.h
+++ b/arch/arm/plat-omap/include/plat/blizzard.h
@@ -6,7 +6,7 @@ struct blizzard_platform_data {
         void            (*power_down)(struct device *dev);
         unsigned long   (*get_clock_rate)(struct device *dev);
 
-        unsigned        te_connected : 1;
+        unsigned        te_connected:1;
 };
 
 #endif
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index ed8786c41df..75141742300 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -167,10 +167,14 @@ IS_OMAP_SUBCLASS(443x, 0x443)
 #if defined(MULTI_OMAP2)
 # if defined(CONFIG_ARCH_OMAP2)
 #  undef  cpu_is_omap24xx
-#  undef  cpu_is_omap242x
-#  undef  cpu_is_omap243x
 #  define cpu_is_omap24xx()             is_omap24xx()
+# endif
+# if defined (CONFIG_ARCH_OMAP2420)
+#  undef  cpu_is_omap242x
 #  define cpu_is_omap242x()             is_omap242x()
+# endif
+# if defined (CONFIG_ARCH_OMAP2430)
+#  undef  cpu_is_omap243x
 #  define cpu_is_omap243x()             is_omap243x()
 # endif
 # if defined(CONFIG_ARCH_OMAP3)
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index b65088a869e..401701977db 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -345,8 +345,6 @@
 #define INT_34XX_MMC3_IRQ       94
 #define INT_34XX_GPT12_IRQ      95
 
-#define INT_34XX_BENCH_MPU_EMUL 3
-
 #define INT_35XX_HECC0_IRQ              24
 #define INT_35XX_HECC1_IRQ              28
 #define INT_35XX_EMAC_C0_RXTHRESH_IRQ   67
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
index 39748354ce4..7de903d7c1c 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -59,7 +59,7 @@
 #define OMAP44XX_MCBSP1_BASE    0x49022000
 #define OMAP44XX_MCBSP2_BASE    0x49024000
 #define OMAP44XX_MCBSP3_BASE    0x49026000
-#define OMAP44XX_MCBSP4_BASE    0x48074000
+#define OMAP44XX_MCBSP4_BASE    0x48096000
 
 #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
 
diff --git a/arch/arm/plat-omap/include/plat/nand.h b/arch/arm/plat-omap/include/plat/nand.h
index 6ba88d2630d..f8efd5466b1 100644
--- a/arch/arm/plat-omap/include/plat/nand.h
+++ b/arch/arm/plat-omap/include/plat/nand.h
@@ -29,4 +29,11 @@ struct omap_nand_platform_data {
 /* size (4 KiB) for IO mapping */
 #define NAND_IO_SIZE    SZ_4K
 
+#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
 extern int gpmc_nand_init(struct omap_nand_platform_data *d);
+#else
+static inline int gpmc_nand_init(struct omap_nand_platform_data *d)
+{
+        return 0;
+}
+#endif
diff --git a/arch/arm/plat-omap/include/plat/omap44xx.h b/arch/arm/plat-omap/include/plat/omap44xx.h
index 2302474a374..b3ef1a7f53c 100644
--- a/arch/arm/plat-omap/include/plat/omap44xx.h
+++ b/arch/arm/plat-omap/include/plat/omap44xx.h
@@ -32,7 +32,7 @@
 #define OMAP4430_PRM_BASE               0x4a306000
 #define OMAP44XX_GPMC_BASE              0x50000000
 #define OMAP443X_SCM_BASE               0x4a002000
-#define OMAP443X_CTRL_BASE              OMAP443X_SCM_BASE
+#define OMAP443X_CTRL_BASE              0x4a100000
 #define OMAP44XX_IC_BASE                0x48200000
 #define OMAP44XX_IVA_INTC_BASE          0x40000000
 #define IRQ_SIR_IRQ                     0x0040
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 440b4164f2f..36d6ea56ab5 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -294,8 +294,8 @@ struct omap_hwmod_class_sysconfig {
         u16 rev_offs;
         u16 sysc_offs;
         u16 syss_offs;
+        u16 sysc_flags;
         u8 idlemodes;
-        u8 sysc_flags;
         u8 clockact;
         struct omap_hwmod_sysc_fields *sysc_fields;
 };
diff --git a/arch/arm/plat-omap/include/plat/prcm.h b/arch/arm/plat-omap/include/plat/prcm.h
index d6a0e27d5a7..9fbd91419cd 100644
--- a/arch/arm/plat-omap/include/plat/prcm.h
+++ b/arch/arm/plat-omap/include/plat/prcm.h
@@ -24,7 +24,7 @@
 #define __ASM_ARM_ARCH_OMAP_PRCM_H
 
 u32 omap_prcm_get_reset_sources(void);
-void omap_prcm_arch_reset(char mode);
+void omap_prcm_arch_reset(char mode, const char *cmd);
 int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest,
                          const char *name);
 
diff --git a/arch/arm/plat-omap/include/plat/system.h b/arch/arm/plat-omap/include/plat/system.h
index c58a4ef42a4..d0a119f735b 100644
--- a/arch/arm/plat-omap/include/plat/system.h
+++ b/arch/arm/plat-omap/include/plat/system.h
@@ -22,7 +22,7 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-static inline void omap1_arch_reset(char mode)
+static inline void omap1_arch_reset(char mode, const char *cmd)
 {
         /*
          * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
@@ -43,9 +43,9 @@ static inline void omap1_arch_reset(char mode)
 static inline void arch_reset(char mode, const char *cmd)
 {
         if (!cpu_class_is_omap2())
-                omap1_arch_reset(mode);
+                omap1_arch_reset(mode, cmd);
         else
-                omap_prcm_arch_reset(mode);
+                omap_prcm_arch_reset(mode, cmd);
 }
 
 #endif
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
index 288e29e1c06..876ca8d5e92 100644
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ b/arch/arm/plat-omap/include/plat/usb.h
@@ -46,14 +46,14 @@ struct ehci_hcd_omap_platform_data {
 struct omap_musb_board_data {
         u8      interface_type;
         u8      mode;
-        u8      power;
+        u16     power;
 };
 
 enum musb_interface    {MUSB_INTERFACE_ULPI, MUSB_INTERFACE_UTMI};
 
 extern void usb_musb_init(struct omap_musb_board_data *board_data);
 
-extern void usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata);
+extern void usb_ehci_init(const struct ehci_hcd_omap_platform_data *pdata);
 
 #endif
 
diff --git a/arch/arm/plat-omap/iommu-debug.c b/arch/arm/plat-omap/iommu-debug.c
index afd1c27cff7..e6c0d536899 100644
--- a/arch/arm/plat-omap/iommu-debug.c
+++ b/arch/arm/plat-omap/iommu-debug.c
@@ -13,6 +13,7 @@
 #include <linux/err.h>
 #include <linux/clk.h>
 #include <linux/io.h>
+#include <linux/slab.h>
 #include <linux/uaccess.h>
 #include <linux/platform_device.h>
 #include <linux/debugfs.h>
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index 905ed832df5..0e137663349 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap/iommu.c
@@ -13,6 +13,7 @@
 
 #include <linux/err.h>
 #include <linux/module.h>
+#include <linux/slab.h>
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
 #include <linux/clk.h>
diff --git a/arch/arm/plat-omap/iovmm.c b/arch/arm/plat-omap/iovmm.c
index 936aef1971c..65c6d1ff723 100644
--- a/arch/arm/plat-omap/iovmm.c
+++ b/arch/arm/plat-omap/iovmm.c
@@ -11,6 +11,7 @@
  */
 
 #include <linux/err.h>
+#include <linux/slab.h>
 #include <linux/vmalloc.h>
 #include <linux/device.h>
 #include <linux/scatterlist.h>
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c
index 4229cec5314..08a2df76628 100644
--- a/arch/arm/plat-omap/mailbox.c
+++ b/arch/arm/plat-omap/mailbox.c
@@ -25,6 +25,7 @@
 #include <linux/interrupt.h>
 #include <linux/device.h>
 #include <linux/delay.h>
+#include <linux/slab.h>
 
 #include <plat/mailbox.h>
 
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index e47686e0a63..e1d0440fd4a 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -23,6 +23,7 @@
 #include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/io.h>
+#include <linux/slab.h>
 
 #include <plat/dma.h>
 #include <plat/mcbsp.h>
@@ -133,8 +134,7 @@ static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
                 dev_err(mcbsp_tx->dev, "TX Frame Sync Error! : 0x%x\n",
                         irqst_spcr2);
                 /* Writing zero to XSYNC_ERR clears the IRQ */
-                MCBSP_WRITE(mcbsp_tx, SPCR2,
-                            MCBSP_READ_CACHE(mcbsp_tx, SPCR2) & ~(XSYNC_ERR));
+                MCBSP_WRITE(mcbsp_tx, SPCR2, MCBSP_READ_CACHE(mcbsp_tx, SPCR2));
         } else {
                 complete(&mcbsp_tx->tx_irq_completion);
         }
@@ -154,8 +154,7 @@ static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
                 dev_err(mcbsp_rx->dev, "RX Frame Sync Error! : 0x%x\n",
                         irqst_spcr1);
                 /* Writing zero to RSYNC_ERR clears the IRQ */
-                MCBSP_WRITE(mcbsp_rx, SPCR1,
-                            MCBSP_READ_CACHE(mcbsp_rx, SPCR1) & ~(RSYNC_ERR));
+                MCBSP_WRITE(mcbsp_rx, SPCR1, MCBSP_READ_CACHE(mcbsp_rx, SPCR1));
         } else {
                 complete(&mcbsp_rx->tx_irq_completion);
         }
@@ -934,8 +933,7 @@ int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
         /* if frame sync error - clear the error */
         if (MCBSP_READ(mcbsp, SPCR2) & XSYNC_ERR) {
                 /* clear error */
-                MCBSP_WRITE(mcbsp, SPCR2,
-                                MCBSP_READ_CACHE(mcbsp, SPCR2) & (~XSYNC_ERR));
+                MCBSP_WRITE(mcbsp, SPCR2, MCBSP_READ_CACHE(mcbsp, SPCR2));
                 /* resend */
                 return -1;
         } else {
@@ -975,8 +973,7 @@ int omap_mcbsp_pollread(unsigned int id, u16 *buf)
         /* if frame sync error - clear the error */
         if (MCBSP_READ(mcbsp, SPCR1) & RSYNC_ERR) {
                 /* clear error */
-                MCBSP_WRITE(mcbsp, SPCR1,
-                                MCBSP_READ_CACHE(mcbsp, SPCR1) & (~RSYNC_ERR));
+                MCBSP_WRITE(mcbsp, SPCR1, MCBSP_READ_CACHE(mcbsp, SPCR1));
                 /* resend */
                 return -1;
         } else {
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
index 59043589484..0f519747951 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -79,6 +79,7 @@
 
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
+#include <linux/slab.h>
 #include <linux/err.h>
 #include <linux/io.h>
 
diff --git a/arch/arm/plat-pxa/dma.c b/arch/arm/plat-pxa/dma.c
index 2975798d411..742350e0f2a 100644
--- a/arch/arm/plat-pxa/dma.c
+++ b/arch/arm/plat-pxa/dma.c
@@ -14,6 +14,7 @@
 
 #include <linux/module.h>
 #include <linux/init.h>
+#include <linux/slab.h>
 #include <linux/kernel.h>
 #include <linux/interrupt.h>
 #include <linux/errno.h>
diff --git a/arch/arm/plat-pxa/pwm.c b/arch/arm/plat-pxa/pwm.c
index 51dc5c8106c..0732c6c8d51 100644
--- a/arch/arm/plat-pxa/pwm.c
+++ b/arch/arm/plat-pxa/pwm.c
@@ -14,6 +14,7 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
+#include <linux/slab.h>
 #include <linux/err.h>
 #include <linux/clk.h>
 #include <linux/io.h>
diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig
deleted file mode 100644
index 9e9d0286e48..00000000000
--- a/arch/arm/plat-s3c/Kconfig
+++ /dev/null
@@ -1,215 +0,0 @@
-# Copyright 2007 Simtec Electronics
-#
-# Licensed under GPLv2
-
-config PLAT_S3C
-        bool
-        depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX
-        default y
-        select NO_IOPORT
-        help
-          Base platform code for any Samsung S3C device
-
-# low-level serial option nodes
-
-if PLAT_S3C
-
-config CPU_LLSERIAL_S3C2410_ONLY
-        bool
-        default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440
-
-config CPU_LLSERIAL_S3C2440_ONLY
-        bool
-        default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410
-
-config CPU_LLSERIAL_S3C2410
-        bool
-        help
-          Selected if there is an S3C2410 (or register compatible) serial
-          low-level implementation needed
-
-config CPU_LLSERIAL_S3C2440
-        bool
-        help
-          Selected if there is an S3C2440 (or register compatible) serial
-          low-level implementation needed
-
-# boot configurations
-
-comment "Boot options"
-
-config S3C_BOOT_WATCHDOG
-        bool "S3C Initialisation watchdog"
-        depends on S3C2410_WATCHDOG
-        help
-          Say y to enable the watchdog during the kernel decompression
-          stage. If the kernel fails to uncompress, then the watchdog
-          will trigger a reset and the system should restart.
-
-config S3C_BOOT_ERROR_RESET
-        bool "S3C Reboot on decompression error"
-        help
-          Say y here to use the watchdog to reset the system if the
-          kernel decompressor detects an error during decompression.
-
-config S3C_BOOT_UART_FORCE_FIFO
-       bool "Force UART FIFO on during boot process"
-       default y
-       help
-         Say Y here to force the UART FIFOs on during the kernel
-         uncompressor
-
-comment "Power management"
-
-config S3C2410_PM_DEBUG
-        bool "S3C2410 PM Suspend debug"
-        depends on PM
-        help
-          Say Y here if you want verbose debugging from the PM Suspend and
-          Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
-          for more information.
-
-config S3C_PM_DEBUG_LED_SMDK
-       bool "SMDK LED suspend/resume debugging"
-       depends on PM && (MACH_SMDK6410)
-       help
-         Say Y here to enable the use of the SMDK LEDs on the baseboard
-         for debugging of the state of the suspend and resume process.
-
-         Note, this currently only works for S3C64XX based SMDK boards.
-
-config S3C2410_PM_CHECK
-        bool "S3C2410 PM Suspend Memory CRC"
-        depends on PM && CRC32
-        help
-          Enable the PM code's memory area checksum over sleep. This option
-          will generate CRCs of all blocks of memory, and store them before
-          going to sleep. The blocks are then checked on resume for any
-          errors.
-
-          Note, this can take several seconds depending on memory size
-          and CPU speed.
-
-          See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
-
-config S3C2410_PM_CHECK_CHUNKSIZE
-        int "S3C2410 PM Suspend CRC Chunksize (KiB)"
-        depends on PM && S3C2410_PM_CHECK
-        default 64
-        help
-          Set the chunksize in Kilobytes of the CRC for checking memory
-          corruption over suspend and resume. A smaller value will mean that
-          the CRC data block will take more memory, but wil identify any
-          faults with better precision.
-
-          See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
-
-config S3C_LOWLEVEL_UART_PORT
-        int "S3C UART to use for low-level messages"
-        default 0
-        help
-          Choice of which UART port to use for the low-level messages,
-          such as the `Uncompressing...` at start time. The value of
-          this configuration should be between zero and two. The port
-          must have been initialised by the boot-loader before use.
-
-# options for gpiolib support
-
-config S3C_GPIO_SPACE
-        int "Space between gpio banks"
-        default 0
-        help
-          Add a number of spare GPIO entries between each bank for debugging
-          purposes. This allows any problems where an counter overflows from
-          one bank to another to be caught, at the expense of using a little
-          more memory.
-
-config S3C_GPIO_TRACK
-        bool
-        help
-          Internal configuration option to enable the s3c specific gpio
-          chip tracking if the platform requires it.
-
-config S3C_GPIO_PULL_UPDOWN
-        bool
-        help
-          Internal configuration to enable the correct GPIO pull helper
-
-config S3C_GPIO_PULL_DOWN
-        bool
-        help
-          Internal configuration to enable the correct GPIO pull helper
-
-config S3C_GPIO_PULL_UP
-        bool
-        help
-          Internal configuration to enable the correct GPIO pull helper
-
-config S3C_GPIO_CFG_S3C24XX
-        bool
-        help
-          Internal configuration to enable S3C24XX style GPIO configuration
-          functions.
-
-config S3C_GPIO_CFG_S3C64XX
-        bool
-        help
-          Internal configuration to enable S3C64XX style GPIO configuration
-          functions.
-
-config S5P_GPIO_CFG_S5PC1XX
-        bool
-        help
-          Internal configuration to enable S5PC1XX style GPIO configuration
-          functions.
-
-# DMA
-
-config S3C_DMA
-        bool
-        help
-          Internal configuration for S3C DMA core
-
-# device definitions to compile in
-
-config S3C_DEV_HSMMC
-        bool
-        help
-          Compile in platform device definitions for HSMMC code
-
-config S3C_DEV_HSMMC1
-        bool
-        help
-          Compile in platform device definitions for HSMMC channel 1
-
-config S3C_DEV_HSMMC2
-        bool
-        help
-          Compile in platform device definitions for HSMMC channel 2
-
-config S3C_DEV_I2C1
-        bool
-        help
-          Compile in platform device definitions for I2C channel 1
-
-config S3C_DEV_FB
-        bool
-        help
-          Compile in platform device definition for framebuffer
-
-config S3C_DEV_USB_HOST
-        bool
-        help
-          Compile in platform device definition for USB host.
-
-config S3C_DEV_USB_HSOTG
-        bool
-        help
-          Compile in platform device definition for USB high-speed OtG
-
-config S3C_DEV_NAND
-        bool
-        help
-          Compile in platform device definition for NAND controller
-
-endif
diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile
deleted file mode 100644
index 50444da9842..00000000000
--- a/arch/arm/plat-s3c/Makefile
+++ /dev/null
@@ -1,45 +0,0 @@
-# arch/arm/plat-s3c/Makefile
-#
-# Copyright 2008 Simtec Electronics
-#
-# Licensed under GPLv2
-
-obj-y                           :=
-obj-m                           :=
-obj-n                           :=
-obj-                            :=
-
-# Core support for all Samsung SoCs
-
-obj-y                           +=  init.o
-obj-y                           += time.o
-obj-y                           += clock.o
-obj-y                           += pwm-clock.o
-obj-y                           += gpio.o
-obj-y                           += gpio-config.o
-
-# DMA support
-
-obj-$(CONFIG_S3C_DMA)           += dma.o
-
-# PM support
-
-obj-$(CONFIG_PM)                += pm.o
-obj-$(CONFIG_PM)                += pm-gpio.o
-obj-$(CONFIG_S3C2410_PM_CHECK)  += pm-check.o
-
-# PWM support
-
-obj-$(CONFIG_HAVE_PWM)          += pwm.o
-
-# devices
-
-obj-$(CONFIG_S3C_DEV_HSMMC)     += dev-hsmmc.o
-obj-$(CONFIG_S3C_DEV_HSMMC1)    += dev-hsmmc1.o
-obj-$(CONFIG_S3C_DEV_HSMMC2)    += dev-hsmmc2.o
-obj-y                           += dev-i2c0.o
-obj-$(CONFIG_S3C_DEV_I2C1)      += dev-i2c1.o
-obj-$(CONFIG_S3C_DEV_FB)        += dev-fb.o
-obj-$(CONFIG_S3C_DEV_USB_HOST)  += dev-usb.o
-obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o
-obj-$(CONFIG_S3C_DEV_NAND)      += dev-nand.o
diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig
index 342647eb91d..6e93ef8f3d4 100644
--- a/arch/arm/plat-s3c24xx/Kconfig
+++ b/arch/arm/plat-s3c24xx/Kconfig
@@ -14,58 +14,40 @@ config PLAT_S3C24XX
 
 if PLAT_S3C24XX
 
-# code that is shared between a number of the s3c24xx implementations
+# low-level serial option nodes
 
-config S3C2410_CLOCK
+config CPU_LLSERIAL_S3C2410_ONLY
         bool
-        help
-          Clock code for the S3C2410, and similar processors which
-          is currently includes the S3C2410, S3C2440, S3C2442.
+        default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440
 
-config S3C24XX_DCLK
+config CPU_LLSERIAL_S3C2440_ONLY
         bool
-        help
-          Clock code for supporting DCLK/CLKOUT on S3C24XX architectures
+        default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410
 
-config CPU_S3C244X
+config CPU_LLSERIAL_S3C2410
         bool
-        depends on ARCH_S3C2410 && (CPU_S3C2440 || CPU_S3C2442)
-        help
-          Support for S3C2440 and S3C2442 Samsung Mobile CPU based systems.
-
-config S3C2440_CPUFREQ
-        bool "S3C2440/S3C2442 CPU Frequency scaling support"
-        depends on CPU_FREQ_S3C24XX && (CPU_S3C2440 || CPU_S3C2442)
-        select S3C2410_CPUFREQ_UTILS
-        default y
         help
-          CPU Frequency scaling support for S3C2440 and S3C2442 SoC CPUs.
+          Selected if there is an S3C2410 (or register compatible) serial
+          low-level implementation needed
 
-config S3C2440_XTAL_12000000
+config CPU_LLSERIAL_S3C2440
         bool
         help
-          Indicate that the build needs to support 12MHz system
-          crystal.
+          Selected if there is an S3C2440 (or register compatible) serial
+          low-level implementation needed
 
-config S3C2440_XTAL_16934400
-        bool
-        help
-          Indicate that the build needs to support 16.9344MHz system
-          crystal.
+# code that is shared between a number of the s3c24xx implementations
 
-config S3C2440_PLL_12000000
+config S3C2410_CLOCK
         bool
-        depends on S3C2440_CPUFREQ && S3C2440_XTAL_12000000
-        default y if CPU_FREQ_S3C24XX_PLL
         help
-          PLL tables for S3C2440 or S3C2442 CPUs with 12MHz crystals.
+          Clock code for the S3C2410, and similar processors which
+          is currently includes the S3C2410, S3C2440, S3C2442.
 
-config S3C2440_PLL_16934400
+config S3C24XX_DCLK
         bool
-        depends on S3C2440_CPUFREQ && S3C2440_XTAL_16934400
-        default y if CPU_FREQ_S3C24XX_PLL
         help
-          PLL tables for S3C2440 or S3C2442 CPUs with 16.934MHz crystals.
+          Clock code for supporting DCLK/CLKOUT on S3C24XX architectures
 
 config S3C24XX_PWM
         bool "PWM device support"
@@ -74,7 +56,6 @@ config S3C24XX_PWM
           Support for exporting the PWM timer blocks via the pwm device
           system.
 
-
 # gpio configurations
 
 config S3C24XX_GPIO_EXTRA
@@ -117,13 +98,6 @@ config S3C2410_DMA_DEBUG
           Enable debugging output for the DMA code. This option sends info
           to the kernel log, at priority KERN_DEBUG.
 
-config S3C24XX_ADC
-        bool "ADC common driver support"
-        help
-          Core support for the ADC block found in the S3C24XX SoC systems
-          for drivers such as the touchscreen and hwmon to use to share
-          this resource.
-
 # SPI default pin configuration code
 
 config S3C24XX_SPI_BUS0_GPE11_GPE12_GPE13
diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile
index 5dee8c12e8b..c2237c41141 100644
--- a/arch/arm/plat-s3c24xx/Makefile
+++ b/arch/arm/plat-s3c24xx/Makefile
@@ -25,20 +25,12 @@ obj-$(CONFIG_CPU_FREQ_S3C24XX_DEBUGFS) += cpu-freq-debugfs.o
 
 # Architecture dependant builds
 
-obj-$(CONFIG_CPU_S3C244X)       += s3c244x.o
-obj-$(CONFIG_CPU_S3C244X)       += s3c244x-irq.o
-obj-$(CONFIG_CPU_S3C244X)       += s3c244x-clock.o
-obj-$(CONFIG_S3C2440_CPUFREQ)   += s3c2440-cpufreq.o
-obj-$(CONFIG_S3C2440_PLL_12000000) += s3c2440-pll-12000000.o
-obj-$(CONFIG_S3C2440_PLL_16934400) += s3c2440-pll-16934400.o
-
 obj-$(CONFIG_PM_SIMTEC)         += pm-simtec.o
 obj-$(CONFIG_PM)                += pm.o
 obj-$(CONFIG_PM)                += irq-pm.o
 obj-$(CONFIG_PM)                += sleep.o
 obj-$(CONFIG_S3C2410_CLOCK)     += s3c2410-clock.o
 obj-$(CONFIG_S3C2410_DMA)       += dma.o
-obj-$(CONFIG_S3C24XX_ADC)       += adc.o
 obj-$(CONFIG_S3C2410_IOTIMING)  += s3c2410-iotiming.o
 obj-$(CONFIG_S3C2412_IOTIMING)  += s3c2412-iotiming.o
 obj-$(CONFIG_S3C2410_CPUFREQ_UTILS) += s3c2410-cpufreq-utils.o
diff --git a/arch/arm/plat-s3c24xx/clock-dclk.c b/arch/arm/plat-s3c24xx/clock-dclk.c
index ac061a1bcb3..cf97caafe56 100644
--- a/arch/arm/plat-s3c24xx/clock-dclk.c
+++ b/arch/arm/plat-s3c24xx/clock-dclk.c
@@ -161,14 +161,18 @@ static int s3c24xx_clkout_setparent(struct clk *clk, struct clk *parent)
 
 /* external clock definitions */
 
+static struct clk_ops dclk_ops = {
+        .set_parent     = s3c24xx_dclk_setparent,
+        .set_rate       = s3c24xx_set_dclk_rate,
+        .round_rate     = s3c24xx_round_dclk_rate,
+};
+
 struct clk s3c24xx_dclk0 = {
         .name           = "dclk0",
         .id             = -1,
         .ctrlbit        = S3C2410_DCLKCON_DCLK0EN,
         .enable         = s3c24xx_dclk_enable,
-        .set_parent     = s3c24xx_dclk_setparent,
-        .set_rate       = s3c24xx_set_dclk_rate,
-        .round_rate     = s3c24xx_round_dclk_rate,
+        .ops            = &dclk_ops,
 };
 
 struct clk s3c24xx_dclk1 = {
@@ -176,19 +180,21 @@ struct clk s3c24xx_dclk1 = {
         .id             = -1,
         .ctrlbit        = S3C2410_DCLKCON_DCLK1EN,
         .enable         = s3c24xx_dclk_enable,
-        .set_parent     = s3c24xx_dclk_setparent,
-        .set_rate       = s3c24xx_set_dclk_rate,
-        .round_rate     = s3c24xx_round_dclk_rate,
+        .ops            = &dclk_ops,
+};
+
+static struct clk_ops clkout_ops = {
+        .set_parent     = s3c24xx_clkout_setparent,
 };
 
 struct clk s3c24xx_clkout0 = {
         .name           = "clkout0",
         .id             = -1,
-        .set_parent     = s3c24xx_clkout_setparent,
+        .ops            = &clkout_ops,
 };
 
 struct clk s3c24xx_clkout1 = {
         .name           = "clkout1",
         .id             = -1,
-        .set_parent     = s3c24xx_clkout_setparent,
+        .ops            = &clkout_ops,
 };
diff --git a/arch/arm/plat-s3c24xx/cpu-freq.c b/arch/arm/plat-s3c24xx/cpu-freq.c
index 2d42efb9f4e..1ecc15bfe9d 100644
--- a/arch/arm/plat-s3c24xx/cpu-freq.c
+++ b/arch/arm/plat-s3c24xx/cpu-freq.c
@@ -23,6 +23,7 @@
 #include <linux/sysdev.h>
 #include <linux/kobject.h>
 #include <linux/sysfs.h>
+#include <linux/slab.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
index 4af9dd94879..9ca64df35bf 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/plat-s3c24xx/cpu.c
@@ -49,9 +49,7 @@
 #include <plat/s3c2400.h>
 #include <plat/s3c2410.h>
 #include <plat/s3c2412.h>
-#include "s3c244x.h"
-#include <plat/s3c2440.h>
-#include <plat/s3c2442.h>
+#include <plat/s3c244x.h>
 #include <plat/s3c2443.h>
 
 /* table of supported CPUs */
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index 7f686a31e67..9265f09bfa5 100644
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -20,6 +20,7 @@
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/slab.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -32,6 +33,7 @@
 
 #include <plat/regs-serial.h>
 #include <plat/udc.h>
+#include <plat/mci.h>
 
 #include <plat/devs.h>
 #include <plat/cpu.h>
@@ -112,34 +114,6 @@ struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
         },
 };
 
-/* yart devices */
-
-static struct platform_device s3c24xx_uart_device0 = {
-        .id             = 0,
-};
-
-static struct platform_device s3c24xx_uart_device1 = {
-        .id             = 1,
-};
-
-static struct platform_device s3c24xx_uart_device2 = {
-        .id             = 2,
-};
-
-static struct platform_device s3c24xx_uart_device3 = {
-        .id             = 3,
-};
-
-struct platform_device *s3c24xx_uart_src[4] = {
-        &s3c24xx_uart_device0,
-        &s3c24xx_uart_device1,
-        &s3c24xx_uart_device2,
-        &s3c24xx_uart_device3,
-};
-
-struct platform_device *s3c24xx_uart_devs[4] = {
-};
-
 /* LCD Controller */
 
 static struct resource s3c_lcd_resource[] = {
@@ -185,9 +159,27 @@ void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
 }
 
 /* Touchscreen */
+
+static struct resource s3c_ts_resource[] = {
+        [0] = {
+                .start = S3C24XX_PA_ADC,
+                .end   = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_TC,
+                .end   = IRQ_TC,
+                .flags = IORESOURCE_IRQ,
+        },
+
+};
+
 struct platform_device s3c_device_ts = {
         .name             = "s3c2410-ts",
         .id               = -1,
+        .dev.parent     = &s3c_device_adc.dev,
+        .num_resources    = ARRAY_SIZE(s3c_ts_resource),
+        .resource         = s3c_ts_resource,
 };
 EXPORT_SYMBOL(s3c_device_ts);
 
@@ -379,6 +371,18 @@ struct platform_device s3c_device_sdi = {
 
 EXPORT_SYMBOL(s3c_device_sdi);
 
+void s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
+{
+        struct s3c24xx_mci_pdata *npd;
+
+        npd = kmemdup(pdata, sizeof(struct s3c24xx_mci_pdata), GFP_KERNEL);
+        if (!npd)
+                printk(KERN_ERR "%s: no memory to copy pdata", __func__);
+
+        s3c_device_sdi.dev.platform_data = npd;
+}
+
+
 /* SPI (0) */
 
 static struct resource s3c_spi0_resource[] = {
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index f0ea7943ac5..93827b3d4e8 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -33,7 +33,7 @@
 #include <mach/dma.h>
 #include <mach/map.h>
 
-#include <plat/dma-plat.h>
+#include <plat/dma-s3c24xx.h>
 #include <plat/regs-dma.h>
 
 /* io map for dma */
diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c
index 6d7a961d326..4f0f11a6a67 100644
--- a/arch/arm/plat-s3c24xx/gpiolib.c
+++ b/arch/arm/plat-s3c24xx/gpiolib.c
@@ -20,7 +20,7 @@
 #include <linux/io.h>
 #include <linux/gpio.h>
 
-#include <mach/gpio-core.h>
+#include <plat/gpio-core.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
 #include <plat/pm.h>
diff --git a/arch/arm/plat-s3c/include/plat/audio-simtec.h b/arch/arm/plat-s3c24xx/include/plat/audio-simtec.h
index 53a93656d5d..de5e88fdcb3 100644
--- a/arch/arm/plat-s3c/include/plat/audio-simtec.h
+++ b/arch/arm/plat-s3c24xx/include/plat/audio-simtec.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c/include/plat/audio-simtec.h
+/* arch/arm/plat-s3c24xx/include/plat/audio-simtec.h
  *
  * Copyright 2008 Simtec Electronics
  *      http://armlinux.simtec.co.uk/
diff --git a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h b/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
index 33d421d78ba..d623235ae96 100644
--- a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
+++ b/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
@@ -135,7 +135,7 @@ struct s3c_cpufreq_config {
  * @locktime_m: The lock-time in uS for the MPLL.
  * @locktime_u: The lock-time in uS for the UPLL.
  * @locttime_bits: The number of bits each LOCKTIME field.
- * @need_pll: Set if this driver needs to change the PLL values to acheive
+ * @need_pll: Set if this driver needs to change the PLL values to achieve
  *      any frequency changes. This is really only need by devices like the
  *      S3C2410 where there is no or limited divider between the PLL and the
  *      ARMCLK.
diff --git a/arch/arm/plat-s3c24xx/include/plat/mci.h b/arch/arm/plat-s3c24xx/include/plat/mci.h
index 36aaa10fad0..2ac2b21ec49 100644
--- a/arch/arm/plat-s3c24xx/include/plat/mci.h
+++ b/arch/arm/plat-s3c24xx/include/plat/mci.h
@@ -40,4 +40,13 @@ struct s3c24xx_mci_pdata {
                                      unsigned short vdd);
 };
 
+/**
+ * s3c24xx_mci_set_platdata - set platform data for mmc/sdi device
+ * @pdata: The platform data
+ *
+ * Copy the platform data supplied by @pdata so that this can be marked
+ * __initdata.
+ */
+extern void s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata);
+
 #endif /* _ARCH_NCI_H */
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2440.h b/arch/arm/plat-s3c24xx/include/plat/s3c2440.h
deleted file mode 100644
index 107853bf948..00000000000
--- a/arch/arm/plat-s3c24xx/include/plat/s3c2440.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* linux/include/asm-arm/plat-s3c24xx/s3c2440.h
- *
- * Copyright (c) 2004-2005 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * Header file for s3c2440 cpu support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifdef CONFIG_CPU_S3C2440
-extern  int s3c2440_init(void);
-#else
-#define s3c2440_init NULL
-#endif
diff --git a/arch/arm/plat-s3c24xx/s3c244x.h b/arch/arm/plat-s3c24xx/include/plat/s3c244x.h
index 6aab5eaae2b..307248d1ccb 100644
--- a/arch/arm/plat-s3c24xx/s3c244x.h
+++ b/arch/arm/plat-s3c24xx/include/plat/s3c244x.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c24xx/s3c244x.h
+/* linux/arch/arm/plat-s3c24xx/include/plat/s3c244x.h
  *
  * Copyright (c) 2004-2005 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
@@ -23,3 +23,15 @@ extern void s3c244x_init_clocks(int xtal);
 #define s3c244x_init_uarts NULL
 #define s3c244x_map_io NULL
 #endif
+
+#ifdef CONFIG_CPU_S3C2440
+extern  int s3c2440_init(void);
+#else
+#define s3c2440_init NULL
+#endif
+
+#ifdef CONFIG_CPU_S3C2442
+extern  int s3c2442_init(void);
+#else
+#define s3c2442_init NULL
+#endif
diff --git a/arch/arm/plat-s3c24xx/s3c2410-iotiming.c b/arch/arm/plat-s3c24xx/s3c2410-iotiming.c
index 963fb0b4379..b1908e56da1 100644
--- a/arch/arm/plat-s3c24xx/s3c2410-iotiming.c
+++ b/arch/arm/plat-s3c24xx/s3c2410-iotiming.c
@@ -17,6 +17,7 @@
 #include <linux/cpufreq.h>
 #include <linux/seq_file.h>
 #include <linux/io.h>
+#include <linux/slab.h>
 
 #include <mach/map.h>
 #include <mach/regs-mem.h>
diff --git a/arch/arm/plat-s3c24xx/s3c2412-iotiming.c b/arch/arm/plat-s3c24xx/s3c2412-iotiming.c
index 24993dce10b..0b46d3895d6 100644
--- a/arch/arm/plat-s3c24xx/s3c2412-iotiming.c
+++ b/arch/arm/plat-s3c24xx/s3c2412-iotiming.c
@@ -21,6 +21,7 @@
 #include <linux/delay.h>
 #include <linux/clk.h>
 #include <linux/err.h>
+#include <linux/slab.h>
 
 #include <linux/amba/pl093.h>
 
diff --git a/arch/arm/plat-s3c64xx/Kconfig b/arch/arm/plat-s3c64xx/Kconfig
deleted file mode 100644
index e6da87a5885..00000000000
--- a/arch/arm/plat-s3c64xx/Kconfig
+++ /dev/null
@@ -1,71 +0,0 @@
-# Copyright 2008 Openmoko, Inc.
-# Copyright 2008 Simtec Electronics
-#       Ben Dooks <ben@simtec.co.uk>
-#
-# Licensed under GPLv2
-
-config PLAT_S3C64XX
-        bool
-        depends on ARCH_S3C64XX
-        default y
-        select CPU_V6
-        select PLAT_S3C
-        select ARM_VIC
-        select NO_IOPORT
-        select ARCH_REQUIRE_GPIOLIB
-        select S3C_GPIO_TRACK
-        select S3C_GPIO_PULL_UPDOWN
-        select S3C_GPIO_CFG_S3C24XX
-        select S3C_GPIO_CFG_S3C64XX
-        select S3C_DEV_NAND
-        select USB_ARCH_HAS_OHCI
-        help
-          Base platform code for any Samsung S3C64XX device
-
-if PLAT_S3C64XX
-
-# Configuration options shared by all S3C64XX implementations
-
-config CPU_S3C6400_INIT
-        bool
-        help
-          Common initialisation code for the S3C6400 that is shared
-          by other CPUs in the series, such as the S3C6410.
-
-config CPU_S3C6400_CLOCK
-        bool
-        help
-          Common clock support code for the S3C6400 that is shared
-          by other CPUs in the series, such as the S3C6410.
-
-config S3C64XX_DMA
-        bool "S3C64XX DMA"
-        select S3C_DMA
-
-# platform specific device setup
-
-config S3C64XX_SETUP_I2C0
-        bool
-        default y
-        help
-          Common setup code for i2c bus 0.
-
-          Note, currently since i2c0 is always compiled, this setup helper
-          is always compiled with it.
-
-config S3C64XX_SETUP_I2C1
-        bool
-        help
-          Common setup code for i2c bus 1.
-
-config S3C64XX_SETUP_FB_24BPP
-        bool
-        help
-          Common setup code for S3C64XX with an 24bpp RGB display helper.
-
-config S3C64XX_SETUP_SDHCI_GPIO
-        bool
-        help
-          Common setup code for S3C64XX SDHCI GPIO configurations
-
-endif
diff --git a/arch/arm/plat-s3c64xx/clock.c b/arch/arm/plat-s3c64xx/clock.c
deleted file mode 100644
index 7a36e899360..00000000000
--- a/arch/arm/plat-s3c64xx/clock.c
+++ /dev/null
@@ -1,300 +0,0 @@
-/* linux/arch/arm/plat-s3c64xx/clock.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C64XX Base clock support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <mach/map.h>
-
-#include <plat/regs-sys.h>
-#include <plat/regs-clock.h>
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/clock.h>
-
-struct clk clk_h2 = {
-        .name           = "hclk2",
-        .id             = -1,
-        .rate           = 0,
-};
-
-struct clk clk_27m = {
-        .name           = "clk_27m",
-        .id             = -1,
-        .rate           = 27000000,
-};
-
-static int clk_48m_ctrl(struct clk *clk, int enable)
-{
-        unsigned long flags;
-        u32 val;
-
-        /* can't rely on clock lock, this register has other usages */
-        local_irq_save(flags);
-
-        val = __raw_readl(S3C64XX_OTHERS);
-        if (enable)
-                val |= S3C64XX_OTHERS_USBMASK;
-        else
-                val &= ~S3C64XX_OTHERS_USBMASK;
-
-        __raw_writel(val, S3C64XX_OTHERS);
-        local_irq_restore(flags);
-
-        return 0;
-}
-
-struct clk clk_48m = {
-        .name           = "clk_48m",
-        .id             = -1,
-        .rate           = 48000000,
-        .enable         = clk_48m_ctrl,
-};
-
-static int inline s3c64xx_gate(void __iomem *reg,
-                                struct clk *clk,
-                                int enable)
-{
-        unsigned int ctrlbit = clk->ctrlbit;
-        u32 con;
-
-        con = __raw_readl(reg);
-
-        if (enable)
-                con |= ctrlbit;
-        else
-                con &= ~ctrlbit;
-
-        __raw_writel(con, reg);
-        return 0;
-}
-
-static int s3c64xx_pclk_ctrl(struct clk *clk, int enable)
-{
-        return s3c64xx_gate(S3C_PCLK_GATE, clk, enable);
-}
-
-static int s3c64xx_hclk_ctrl(struct clk *clk, int enable)
-{
-        return s3c64xx_gate(S3C_HCLK_GATE, clk, enable);
-}
-
-int s3c64xx_sclk_ctrl(struct clk *clk, int enable)
-{
-        return s3c64xx_gate(S3C_SCLK_GATE, clk, enable);
-}
-
-static struct clk init_clocks_disable[] = {
-        {
-                .name           = "nand",
-                .id             = -1,
-                .parent         = &clk_h,
-        }, {
-                .name           = "adc",
-                .id             = -1,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_TSADC,
-        }, {
-                .name           = "i2c",
-                .id             = -1,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_IIC,
-        }, {
-                .name           = "iis",
-                .id             = 0,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_IIS0,
-        }, {
-                .name           = "iis",
-                .id             = 1,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_IIS1,
-        }, {
-                .name           = "spi",
-                .id             = 0,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_SPI0,
-        }, {
-                .name           = "spi",
-                .id             = 1,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_SPI1,
-        }, {
-                .name           = "48m",
-                .id             = 0,
-                .parent         = &clk_48m,
-                .enable         = s3c64xx_sclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_SCLK_MMC0_48,
-        }, {
-                .name           = "48m",
-                .id             = 1,
-                .parent         = &clk_48m,
-                .enable         = s3c64xx_sclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_SCLK_MMC1_48,
-        }, {
-                .name           = "48m",
-                .id             = 2,
-                .parent         = &clk_48m,
-                .enable         = s3c64xx_sclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_SCLK_MMC2_48,
-        }, {
-                .name           = "dma0",
-                .id             = -1,
-                .parent         = &clk_h,
-                .enable         = s3c64xx_hclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_HCLK_DMA0,
-        }, {
-                .name           = "dma1",
-                .id             = -1,
-                .parent         = &clk_h,
-                .enable         = s3c64xx_hclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_HCLK_DMA1,
-        },
-};
-
-static struct clk init_clocks[] = {
-        {
-                .name           = "lcd",
-                .id             = -1,
-                .parent         = &clk_h,
-                .enable         = s3c64xx_hclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_HCLK_LCD,
-        }, {
-                .name           = "gpio",
-                .id             = -1,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_GPIO,
-        }, {
-                .name           = "usb-host",
-                .id             = -1,
-                .parent         = &clk_h,
-                .enable         = s3c64xx_hclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_HCLK_UHOST,
-        }, {
-                .name           = "hsmmc",
-                .id             = 0,
-                .parent         = &clk_h,
-                .enable         = s3c64xx_hclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_HCLK_HSMMC0,
-        }, {
-                .name           = "hsmmc",
-                .id             = 1,
-                .parent         = &clk_h,
-                .enable         = s3c64xx_hclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_HCLK_HSMMC1,
-        }, {
-                .name           = "hsmmc",
-                .id             = 2,
-                .parent         = &clk_h,
-                .enable         = s3c64xx_hclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_HCLK_HSMMC2,
-        }, {
-                .name           = "timers",
-                .id             = -1,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_PWM,
-        }, {
-                .name           = "uart",
-                .id             = 0,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_UART0,
-        }, {
-                .name           = "uart",
-                .id             = 1,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_UART1,
-        }, {
-                .name           = "uart",
-                .id             = 2,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_UART2,
-        }, {
-                .name           = "uart",
-                .id             = 3,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_UART3,
-        }, {
-                .name           = "rtc",
-                .id             = -1,
-                .parent         = &clk_p,
-                .enable         = s3c64xx_pclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_PCLK_RTC,
-        }, {
-                .name           = "watchdog",
-                .id             = -1,
-                .parent         = &clk_p,
-                .ctrlbit        = S3C_CLKCON_PCLK_WDT,
-        }, {
-                .name           = "ac97",
-                .id             = -1,
-                .parent         = &clk_p,
-                .ctrlbit        = S3C_CLKCON_PCLK_AC97,
-        }
-};
-
-static struct clk *clks[] __initdata = {
-        &clk_ext,
-        &clk_epll,
-        &clk_27m,
-        &clk_48m,
-        &clk_h2,
-};
-
-void __init s3c64xx_register_clocks(void)
-{
-        struct clk *clkp;
-        int ret;
-        int ptr;
-
-        s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
-
-        clkp = init_clocks;
-        for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) {
-                ret = s3c24xx_register_clock(clkp);
-                if (ret < 0) {
-                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
-                               clkp->name, ret);
-                }
-        }
-
-        clkp = init_clocks_disable;
-        for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
-
-                ret = s3c24xx_register_clock(clkp);
-                if (ret < 0) {
-                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
-                               clkp->name, ret);
-                }
-
-                (clkp->enable)(clkp, 0);
-        }
-
-        s3c_pwmclk_init();
-}
diff --git a/arch/arm/plat-s3c64xx/dev-audio.c b/arch/arm/plat-s3c64xx/dev-audio.c
deleted file mode 100644
index a21a88fbb7e..00000000000
--- a/arch/arm/plat-s3c64xx/dev-audio.c
+++ /dev/null
@@ -1,167 +0,0 @@
-/* linux/arch/arm/plat-s3c/dev-audio.c
- *
- * Copyright 2009 Wolfson Microelectronics
- *      Mark Brown <broonie@opensource.wolfsonmicro.com>
- *
-
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/platform_device.h>
-
-#include <mach/irqs.h>
-#include <mach/map.h>
-#include <mach/dma.h>
-#include <mach/gpio.h>
-
-#include <plat/devs.h>
-#include <plat/audio.h>
-#include <plat/gpio-bank-d.h>
-#include <plat/gpio-bank-e.h>
-#include <plat/gpio-cfg.h>
-
-static struct resource s3c64xx_iis0_resource[] = {
-        [0] = {
-                .start = S3C64XX_PA_IIS0,
-                .end   = S3C64XX_PA_IIS0 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-};
-
-struct platform_device s3c64xx_device_iis0 = {
-        .name             = "s3c64xx-iis",
-        .id               = 0,
-        .num_resources    = ARRAY_SIZE(s3c64xx_iis0_resource),
-        .resource         = s3c64xx_iis0_resource,
-};
-EXPORT_SYMBOL(s3c64xx_device_iis0);
-
-static struct resource s3c64xx_iis1_resource[] = {
-        [0] = {
-                .start = S3C64XX_PA_IIS1,
-                .end   = S3C64XX_PA_IIS1 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-};
-
-struct platform_device s3c64xx_device_iis1 = {
-        .name             = "s3c64xx-iis",
-        .id               = 1,
-        .num_resources    = ARRAY_SIZE(s3c64xx_iis1_resource),
-        .resource         = s3c64xx_iis1_resource,
-};
-EXPORT_SYMBOL(s3c64xx_device_iis1);
-
-static struct resource s3c64xx_iisv4_resource[] = {
-        [0] = {
-                .start = S3C64XX_PA_IISV4,
-                .end   = S3C64XX_PA_IISV4 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-};
-
-struct platform_device s3c64xx_device_iisv4 = {
-        .name             = "s3c64xx-iis-v4",
-        .id               = -1,
-        .num_resources    = ARRAY_SIZE(s3c64xx_iisv4_resource),
-        .resource         = s3c64xx_iisv4_resource,
-};
-EXPORT_SYMBOL(s3c64xx_device_iisv4);
-
-
-/* PCM Controller platform_devices */
-
-static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev)
-{
-        switch (pdev->id) {
-        case 0:
-                s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_PCM0_SCLK);
-                s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_PCM0_EXTCLK);
-                s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_PCM0_FSYNC);
-                s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_PCM0_SIN);
-                s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_PCM0_SOUT);
-                break;
-        case 1:
-                s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_PCM1_SCLK);
-                s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_PCM1_EXTCLK);
-                s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_PCM1_FSYNC);
-                s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_PCM1_SIN);
-                s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_PCM1_SOUT);
-                break;
-        default:
-                printk(KERN_DEBUG "Invalid PCM Controller number!");
-                return -EINVAL;
-        }
-
-        return 0;
-}
-
-static struct resource s3c64xx_pcm0_resource[] = {
-        [0] = {
-                .start = S3C64XX_PA_PCM0,
-                .end   = S3C64XX_PA_PCM0 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = DMACH_PCM0_TX,
-                .end   = DMACH_PCM0_TX,
-                .flags = IORESOURCE_DMA,
-        },
-        [2] = {
-                .start = DMACH_PCM0_RX,
-                .end   = DMACH_PCM0_RX,
-                .flags = IORESOURCE_DMA,
-        },
-};
-
-static struct s3c_audio_pdata s3c_pcm0_pdata = {
-        .cfg_gpio = s3c64xx_pcm_cfg_gpio,
-};
-
-struct platform_device s3c64xx_device_pcm0 = {
-        .name             = "samsung-pcm",
-        .id               = 0,
-        .num_resources    = ARRAY_SIZE(s3c64xx_pcm0_resource),
-        .resource         = s3c64xx_pcm0_resource,
-        .dev = {
-                .platform_data = &s3c_pcm0_pdata,
-        },
-};
-EXPORT_SYMBOL(s3c64xx_device_pcm0);
-
-static struct resource s3c64xx_pcm1_resource[] = {
-        [0] = {
-                .start = S3C64XX_PA_PCM1,
-                .end   = S3C64XX_PA_PCM1 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = DMACH_PCM1_TX,
-                .end   = DMACH_PCM1_TX,
-                .flags = IORESOURCE_DMA,
-        },
-        [2] = {
-                .start = DMACH_PCM1_RX,
-                .end   = DMACH_PCM1_RX,
-                .flags = IORESOURCE_DMA,
-        },
-};
-
-static struct s3c_audio_pdata s3c_pcm1_pdata = {
-        .cfg_gpio = s3c64xx_pcm_cfg_gpio,
-};
-
-struct platform_device s3c64xx_device_pcm1 = {
-        .name             = "samsung-pcm",
-        .id               = 1,
-        .num_resources    = ARRAY_SIZE(s3c64xx_pcm1_resource),
-        .resource         = s3c64xx_pcm1_resource,
-        .dev = {
-                .platform_data = &s3c_pcm1_pdata,
-        },
-};
-EXPORT_SYMBOL(s3c64xx_device_pcm1);
diff --git a/arch/arm/plat-s3c64xx/irq.c b/arch/arm/plat-s3c64xx/irq.c
deleted file mode 100644
index 8dc5b6da978..00000000000
--- a/arch/arm/plat-s3c64xx/irq.c
+++ /dev/null
@@ -1,256 +0,0 @@
-/* arch/arm/plat-s3c64xx/irq.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C64XX - Interrupt handling
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/serial_core.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-
-#include <asm/hardware/vic.h>
-
-#include <mach/map.h>
-#include <plat/regs-serial.h>
-#include <plat/regs-timer.h>
-#include <plat/cpu.h>
-
-/* Timer interrupt handling */
-
-static void s3c_irq_demux_timer(unsigned int base_irq, unsigned int sub_irq)
-{
-        generic_handle_irq(sub_irq);
-}
-
-static void s3c_irq_demux_timer0(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_timer(irq, IRQ_TIMER0);
-}
-
-static void s3c_irq_demux_timer1(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_timer(irq, IRQ_TIMER1);
-}
-
-static void s3c_irq_demux_timer2(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_timer(irq, IRQ_TIMER2);
-}
-
-static void s3c_irq_demux_timer3(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_timer(irq, IRQ_TIMER3);
-}
-
-static void s3c_irq_demux_timer4(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_timer(irq, IRQ_TIMER4);
-}
-
-/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
-
-static void s3c_irq_timer_mask(unsigned int irq)
-{
-        u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
-
-        reg &= 0x1f;  /* mask out pending interrupts */
-        reg &= ~(1 << (irq - IRQ_TIMER0));
-        __raw_writel(reg, S3C64XX_TINT_CSTAT);
-}
-
-static void s3c_irq_timer_unmask(unsigned int irq)
-{
-        u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
-
-        reg &= 0x1f;  /* mask out pending interrupts */
-        reg |= 1 << (irq - IRQ_TIMER0);
-        __raw_writel(reg, S3C64XX_TINT_CSTAT);
-}
-
-static void s3c_irq_timer_ack(unsigned int irq)
-{
-        u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
-
-        reg &= 0x1f;
-        reg |= (1 << 5) << (irq - IRQ_TIMER0);
-        __raw_writel(reg, S3C64XX_TINT_CSTAT);
-}
-
-static struct irq_chip s3c_irq_timer = {
-        .name           = "s3c-timer",
-        .mask           = s3c_irq_timer_mask,
-        .unmask         = s3c_irq_timer_unmask,
-        .ack            = s3c_irq_timer_ack,
-};
-
-struct uart_irq {
-        void __iomem    *regs;
-        unsigned int     base_irq;
-        unsigned int     parent_irq;
-};
-
-/* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
- * are consecutive when looking up the interrupt in the demux routines.
- */
-static struct uart_irq uart_irqs[] = {
-        [0] = {
-                .regs           = S3C_VA_UART0,
-                .base_irq       = IRQ_S3CUART_BASE0,
-                .parent_irq     = IRQ_UART0,
-        },
-        [1] = {
-                .regs           = S3C_VA_UART1,
-                .base_irq       = IRQ_S3CUART_BASE1,
-                .parent_irq     = IRQ_UART1,
-        },
-        [2] = {
-                .regs           = S3C_VA_UART2,
-                .base_irq       = IRQ_S3CUART_BASE2,
-                .parent_irq     = IRQ_UART2,
-        },
-        [3] = {
-                .regs           = S3C_VA_UART3,
-                .base_irq       = IRQ_S3CUART_BASE3,
-                .parent_irq     = IRQ_UART3,
-        },
-};
-
-static inline void __iomem *s3c_irq_uart_base(unsigned int irq)
-{
-        struct uart_irq *uirq = get_irq_chip_data(irq);
-        return uirq->regs;
-}
-
-static inline unsigned int s3c_irq_uart_bit(unsigned int irq)
-{
-        return irq & 3;
-}
-
-/* UART interrupt registers, not worth adding to seperate include header */
-
-static void s3c_irq_uart_mask(unsigned int irq)
-{
-        void __iomem *regs = s3c_irq_uart_base(irq);
-        unsigned int bit = s3c_irq_uart_bit(irq);
-        u32 reg;
-
-        reg = __raw_readl(regs + S3C64XX_UINTM);
-        reg |= (1 << bit);
-        __raw_writel(reg, regs + S3C64XX_UINTM);
-}
-
-static void s3c_irq_uart_maskack(unsigned int irq)
-{
-        void __iomem *regs = s3c_irq_uart_base(irq);
-        unsigned int bit = s3c_irq_uart_bit(irq);
-        u32 reg;
-
-        reg = __raw_readl(regs + S3C64XX_UINTM);
-        reg |= (1 << bit);
-        __raw_writel(reg, regs + S3C64XX_UINTM);
-        __raw_writel(1 << bit, regs + S3C64XX_UINTP);
-}
-
-static void s3c_irq_uart_unmask(unsigned int irq)
-{
-        void __iomem *regs = s3c_irq_uart_base(irq);
-        unsigned int bit = s3c_irq_uart_bit(irq);
-        u32 reg;
-
-        reg = __raw_readl(regs + S3C64XX_UINTM);
-        reg &= ~(1 << bit);
-        __raw_writel(reg, regs + S3C64XX_UINTM);
-}
-
-static void s3c_irq_uart_ack(unsigned int irq)
-{
-        void __iomem *regs = s3c_irq_uart_base(irq);
-        unsigned int bit = s3c_irq_uart_bit(irq);
-
-        __raw_writel(1 << bit, regs + S3C64XX_UINTP);
-}
-
-static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc)
-{
-        struct uart_irq *uirq = &uart_irqs[irq - IRQ_UART0];
-        u32 pend = __raw_readl(uirq->regs + S3C64XX_UINTP);
-        int base = uirq->base_irq;
-
-        if (pend & (1 << 0))
-                generic_handle_irq(base);
-        if (pend & (1 << 1))
-                generic_handle_irq(base + 1);
-        if (pend & (1 << 2))
-                generic_handle_irq(base + 2);
-        if (pend & (1 << 3))
-                generic_handle_irq(base + 3);
-}
-
-static struct irq_chip s3c_irq_uart = {
-        .name           = "s3c-uart",
-        .mask           = s3c_irq_uart_mask,
-        .unmask         = s3c_irq_uart_unmask,
-        .mask_ack       = s3c_irq_uart_maskack,
-        .ack            = s3c_irq_uart_ack,
-};
-
-static void __init s3c64xx_uart_irq(struct uart_irq *uirq)
-{
-        void __iomem *reg_base = uirq->regs;
-        unsigned int irq;
-        int offs;
-
-        /* mask all interrupts at the start. */
-        __raw_writel(0xf, reg_base + S3C64XX_UINTM);
-
-        for (offs = 0; offs < 3; offs++) {
-                irq = uirq->base_irq + offs;
-
-                set_irq_chip(irq, &s3c_irq_uart);
-                set_irq_chip_data(irq, uirq);
-                set_irq_handler(irq, handle_level_irq);
-                set_irq_flags(irq, IRQF_VALID);
-        }
-
-        set_irq_chained_handler(uirq->parent_irq, s3c_irq_demux_uart);
-}
-
-void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
-{
-        int uart, irq;
-
-        printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
-
-        /* initialise the pair of VICs */
-        vic_init(S3C_VA_VIC0, S3C_VIC0_BASE, vic0_valid, 0);
-        vic_init(S3C_VA_VIC1, S3C_VIC1_BASE, vic1_valid, 0);
-
-        /* add the timer sub-irqs */
-
-        set_irq_chained_handler(IRQ_TIMER0_VIC, s3c_irq_demux_timer0);
-        set_irq_chained_handler(IRQ_TIMER1_VIC, s3c_irq_demux_timer1);
-        set_irq_chained_handler(IRQ_TIMER2_VIC, s3c_irq_demux_timer2);
-        set_irq_chained_handler(IRQ_TIMER3_VIC, s3c_irq_demux_timer3);
-        set_irq_chained_handler(IRQ_TIMER4_VIC, s3c_irq_demux_timer4);
-
-        for (irq = IRQ_TIMER0; irq <= IRQ_TIMER4; irq++) {
-                set_irq_chip(irq, &s3c_irq_timer);
-                set_irq_handler(irq, handle_level_irq);
-                set_irq_flags(irq, IRQF_VALID);
-        }
-
-        for (uart = 0; uart < ARRAY_SIZE(uart_irqs); uart++)
-                s3c64xx_uart_irq(&uart_irqs[uart]);
-}
-
-
diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c
deleted file mode 100644
index ffd56deb9e8..00000000000
--- a/arch/arm/plat-s3c64xx/s3c6400-clock.c
+++ /dev/null
@@ -1,758 +0,0 @@
-/* linux/arch/arm/plat-s3c64xx/s3c6400-clock.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C6400 based common clock support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/sysdev.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <mach/map.h>
-
-#include <plat/cpu-freq.h>
-
-#include <plat/regs-clock.h>
-#include <plat/clock.h>
-#include <plat/cpu.h>
-#include <plat/pll.h>
-
-/* fin_apll, fin_mpll and fin_epll are all the same clock, which we call
- * ext_xtal_mux for want of an actual name from the manual.
-*/
-
-static struct clk clk_ext_xtal_mux = {
-        .name           = "ext_xtal",
-        .id             = -1,
-};
-
-#define clk_fin_apll clk_ext_xtal_mux
-#define clk_fin_mpll clk_ext_xtal_mux
-#define clk_fin_epll clk_ext_xtal_mux
-
-#define clk_fout_mpll   clk_mpll
-#define clk_fout_epll   clk_epll
-
-struct clk_sources {
-        unsigned int    nr_sources;
-        struct clk      **sources;
-};
-
-struct clksrc_clk {
-        struct clk              clk;
-        unsigned int            mask;
-        unsigned int            shift;
-
-        struct clk_sources      *sources;
-
-        unsigned int            divider_shift;
-        void __iomem            *reg_divider;
-};
-
-static struct clk clk_fout_apll = {
-        .name           = "fout_apll",
-        .id             = -1,
-};
-
-static struct clk *clk_src_apll_list[] = {
-        [0] = &clk_fin_apll,
-        [1] = &clk_fout_apll,
-};
-
-static struct clk_sources clk_src_apll = {
-        .sources        = clk_src_apll_list,
-        .nr_sources     = ARRAY_SIZE(clk_src_apll_list),
-};
-
-static struct clksrc_clk clk_mout_apll = {
-        .clk    = {
-                .name           = "mout_apll",
-                .id             = -1,
-        },
-        .shift          = S3C6400_CLKSRC_APLL_MOUT_SHIFT,
-        .mask           = S3C6400_CLKSRC_APLL_MOUT,
-        .sources        = &clk_src_apll,
-};
-
-static struct clk *clk_src_epll_list[] = {
-        [0] = &clk_fin_epll,
-        [1] = &clk_fout_epll,
-};
-
-static struct clk_sources clk_src_epll = {
-        .sources        = clk_src_epll_list,
-        .nr_sources     = ARRAY_SIZE(clk_src_epll_list),
-};
-
-static struct clksrc_clk clk_mout_epll = {
-        .clk    = {
-                .name           = "mout_epll",
-                .id             = -1,
-        },
-        .shift          = S3C6400_CLKSRC_EPLL_MOUT_SHIFT,
-        .mask           = S3C6400_CLKSRC_EPLL_MOUT,
-        .sources        = &clk_src_epll,
-};
-
-static struct clk *clk_src_mpll_list[] = {
-        [0] = &clk_fin_mpll,
-        [1] = &clk_fout_mpll,
-};
-
-static struct clk_sources clk_src_mpll = {
-        .sources        = clk_src_mpll_list,
-        .nr_sources     = ARRAY_SIZE(clk_src_mpll_list),
-};
-
-static struct clksrc_clk clk_mout_mpll = {
-        .clk = {
-                .name           = "mout_mpll",
-                .id             = -1,
-        },
-        .shift          = S3C6400_CLKSRC_MPLL_MOUT_SHIFT,
-        .mask           = S3C6400_CLKSRC_MPLL_MOUT,
-        .sources        = &clk_src_mpll,
-};
-
-static unsigned int armclk_mask;
-
-static unsigned long s3c64xx_clk_arm_get_rate(struct clk *clk)
-{
-        unsigned long rate = clk_get_rate(clk->parent);
-        u32 clkdiv;
-
-        /* divisor mask starts at bit0, so no need to shift */
-        clkdiv = __raw_readl(S3C_CLK_DIV0) & armclk_mask;
-
-        return rate / (clkdiv + 1);
-}
-
-static unsigned long s3c64xx_clk_arm_round_rate(struct clk *clk,
-                                                unsigned long rate)
-{
-        unsigned long parent = clk_get_rate(clk->parent);
-        u32 div;
-
-        if (parent < rate)
-                return parent;
-
-        div = (parent / rate) - 1;
-        if (div > armclk_mask)
-                div = armclk_mask;
-
-        return parent / (div + 1);
-}
-
-static int s3c64xx_clk_arm_set_rate(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent = clk_get_rate(clk->parent);
-        u32 div;
-        u32 val;
-
-        if (rate < parent / (armclk_mask + 1))
-                return -EINVAL;
-
-        rate = clk_round_rate(clk, rate);
-        div = clk_get_rate(clk->parent) / rate;
-
-        val = __raw_readl(S3C_CLK_DIV0);
-        val &= ~armclk_mask;
-        val |= (div - 1);
-        __raw_writel(val, S3C_CLK_DIV0);
-
-        return 0;
-
-}
-
-static struct clk clk_arm = {
-        .name           = "armclk",
-        .id             = -1,
-        .parent         = &clk_mout_apll.clk,
-        .get_rate       = s3c64xx_clk_arm_get_rate,
-        .set_rate       = s3c64xx_clk_arm_set_rate,
-        .round_rate     = s3c64xx_clk_arm_round_rate,
-};
-
-static unsigned long s3c64xx_clk_doutmpll_get_rate(struct clk *clk)
-{
-        unsigned long rate = clk_get_rate(clk->parent);
-
-        printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate);
-
-        if (__raw_readl(S3C_CLK_DIV0) & S3C6400_CLKDIV0_MPLL_MASK)
-                rate /= 2;
-
-        return rate;
-}
-
-static struct clk clk_dout_mpll = {
-        .name           = "dout_mpll",
-        .id             = -1,
-        .parent         = &clk_mout_mpll.clk,
-        .get_rate       = s3c64xx_clk_doutmpll_get_rate,
-};
-
-static struct clk *clkset_spi_mmc_list[] = {
-        &clk_mout_epll.clk,
-        &clk_dout_mpll,
-        &clk_fin_epll,
-        &clk_27m,
-};
-
-static struct clk_sources clkset_spi_mmc = {
-        .sources        = clkset_spi_mmc_list,
-        .nr_sources     = ARRAY_SIZE(clkset_spi_mmc_list),
-};
-
-static struct clk *clkset_irda_list[] = {
-        &clk_mout_epll.clk,
-        &clk_dout_mpll,
-        NULL,
-        &clk_27m,
-};
-
-static struct clk_sources clkset_irda = {
-        .sources        = clkset_irda_list,
-        .nr_sources     = ARRAY_SIZE(clkset_irda_list),
-};
-
-static struct clk *clkset_uart_list[] = {
-        &clk_mout_epll.clk,
-        &clk_dout_mpll,
-        NULL,
-        NULL
-};
-
-static struct clk_sources clkset_uart = {
-        .sources        = clkset_uart_list,
-        .nr_sources     = ARRAY_SIZE(clkset_uart_list),
-};
-
-static struct clk *clkset_uhost_list[] = {
-        &clk_48m,
-        &clk_mout_epll.clk,
-        &clk_dout_mpll,
-        &clk_fin_epll,
-};
-
-static struct clk_sources clkset_uhost = {
-        .sources        = clkset_uhost_list,
-        .nr_sources     = ARRAY_SIZE(clkset_uhost_list),
-};
-
-
-/* The peripheral clocks are all controlled via clocksource followed
- * by an optional divider and gate stage. We currently roll this into
- * one clock which hides the intermediate clock from the mux.
- *
- * Note, the JPEG clock can only be an even divider...
- *
- * The scaler and LCD clocks depend on the S3C64XX version, and also
- * have a common parent divisor so are not included here.
- */
-
-static inline struct clksrc_clk *to_clksrc(struct clk *clk)
-{
-        return container_of(clk, struct clksrc_clk, clk);
-}
-
-static unsigned long s3c64xx_getrate_clksrc(struct clk *clk)
-{
-        struct clksrc_clk *sclk = to_clksrc(clk);
-        unsigned long rate = clk_get_rate(clk->parent);
-        u32 clkdiv = __raw_readl(sclk->reg_divider);
-
-        clkdiv >>= sclk->divider_shift;
-        clkdiv &= 0xf;
-        clkdiv++;
-
-        rate /= clkdiv;
-        return rate;
-}
-
-static int s3c64xx_setrate_clksrc(struct clk *clk, unsigned long rate)
-{
-        struct clksrc_clk *sclk = to_clksrc(clk);
-        void __iomem *reg = sclk->reg_divider;
-        unsigned int div;
-        u32 val;
-
-        rate = clk_round_rate(clk, rate);
-        div = clk_get_rate(clk->parent) / rate;
-        if (div > 16)
-                return -EINVAL;
-
-        val = __raw_readl(reg);
-        val &= ~(0xf << sclk->divider_shift);
-        val |= (div - 1) << sclk->divider_shift;
-        __raw_writel(val, reg);
-
-        return 0;
-}
-
-static int s3c64xx_setparent_clksrc(struct clk *clk, struct clk *parent)
-{
-        struct clksrc_clk *sclk = to_clksrc(clk);
-        struct clk_sources *srcs = sclk->sources;
-        u32 clksrc = __raw_readl(S3C_CLK_SRC);
-        int src_nr = -1;
-        int ptr;
-
-        for (ptr = 0; ptr < srcs->nr_sources; ptr++)
-                if (srcs->sources[ptr] == parent) {
-                        src_nr = ptr;
-                        break;
-                }
-
-        if (src_nr >= 0) {
-                clksrc &= ~sclk->mask;
-                clksrc |= src_nr << sclk->shift;
-
-                __raw_writel(clksrc, S3C_CLK_SRC);
-
-                clk->parent = parent;
-                return 0;
-        }
-
-        return -EINVAL;
-}
-
-static unsigned long s3c64xx_roundrate_clksrc(struct clk *clk,
-                                              unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        int div;
-
-        if (rate > parent_rate)
-                rate = parent_rate;
-        else {
-                div = parent_rate / rate;
-
-                if (div == 0)
-                        div = 1;
-                if (div > 16)
-                        div = 16;
-
-                rate = parent_rate / div;
-        }
-
-        return rate;
-}
-
-static struct clksrc_clk clk_mmc0 = {
-        .clk    = {
-                .name           = "mmc_bus",
-                .id             = 0,
-                .ctrlbit        = S3C_CLKCON_SCLK_MMC0,
-                .enable         = s3c64xx_sclk_ctrl,
-                .set_parent     = s3c64xx_setparent_clksrc,
-                .get_rate       = s3c64xx_getrate_clksrc,
-                .set_rate       = s3c64xx_setrate_clksrc,
-                .round_rate     = s3c64xx_roundrate_clksrc,
-        },
-        .shift          = S3C6400_CLKSRC_MMC0_SHIFT,
-        .mask           = S3C6400_CLKSRC_MMC0_MASK,
-        .sources        = &clkset_spi_mmc,
-        .divider_shift  = S3C6400_CLKDIV1_MMC0_SHIFT,
-        .reg_divider    = S3C_CLK_DIV1,
-};
-
-static struct clksrc_clk clk_mmc1 = {
-        .clk    = {
-                .name           = "mmc_bus",
-                .id             = 1,
-                .ctrlbit        = S3C_CLKCON_SCLK_MMC1,
-                .enable         = s3c64xx_sclk_ctrl,
-                .get_rate       = s3c64xx_getrate_clksrc,
-                .set_rate       = s3c64xx_setrate_clksrc,
-                .set_parent     = s3c64xx_setparent_clksrc,
-                .round_rate     = s3c64xx_roundrate_clksrc,
-        },
-        .shift          = S3C6400_CLKSRC_MMC1_SHIFT,
-        .mask           = S3C6400_CLKSRC_MMC1_MASK,
-        .sources        = &clkset_spi_mmc,
-        .divider_shift  = S3C6400_CLKDIV1_MMC1_SHIFT,
-        .reg_divider    = S3C_CLK_DIV1,
-};
-
-static struct clksrc_clk clk_mmc2 = {
-        .clk    = {
-                .name           = "mmc_bus",
-                .id             = 2,
-                .ctrlbit        = S3C_CLKCON_SCLK_MMC2,
-                .enable         = s3c64xx_sclk_ctrl,
-                .get_rate       = s3c64xx_getrate_clksrc,
-                .set_rate       = s3c64xx_setrate_clksrc,
-                .set_parent     = s3c64xx_setparent_clksrc,
-                .round_rate     = s3c64xx_roundrate_clksrc,
-        },
-        .shift          = S3C6400_CLKSRC_MMC2_SHIFT,
-        .mask           = S3C6400_CLKSRC_MMC2_MASK,
-        .sources        = &clkset_spi_mmc,
-        .divider_shift  = S3C6400_CLKDIV1_MMC2_SHIFT,
-        .reg_divider    = S3C_CLK_DIV1,
-};
-
-static struct clksrc_clk clk_usbhost = {
-        .clk    = {
-                .name           = "usb-bus-host",
-                .id             = -1,
-                .ctrlbit        = S3C_CLKCON_SCLK_UHOST,
-                .enable         = s3c64xx_sclk_ctrl,
-                .set_parent     = s3c64xx_setparent_clksrc,
-                .get_rate       = s3c64xx_getrate_clksrc,
-                .set_rate       = s3c64xx_setrate_clksrc,
-                .round_rate     = s3c64xx_roundrate_clksrc,
-        },
-        .shift          = S3C6400_CLKSRC_UHOST_SHIFT,
-        .mask           = S3C6400_CLKSRC_UHOST_MASK,
-        .sources        = &clkset_uhost,
-        .divider_shift  = S3C6400_CLKDIV1_UHOST_SHIFT,
-        .reg_divider    = S3C_CLK_DIV1,
-};
-
-static struct clksrc_clk clk_uart_uclk1 = {
-        .clk    = {
-                .name           = "uclk1",
-                .id             = -1,
-                .ctrlbit        = S3C_CLKCON_SCLK_UART,
-                .enable         = s3c64xx_sclk_ctrl,
-                .set_parent     = s3c64xx_setparent_clksrc,
-                .get_rate       = s3c64xx_getrate_clksrc,
-                .set_rate       = s3c64xx_setrate_clksrc,
-                .round_rate     = s3c64xx_roundrate_clksrc,
-        },
-        .shift          = S3C6400_CLKSRC_UART_SHIFT,
-        .mask           = S3C6400_CLKSRC_UART_MASK,
-        .sources        = &clkset_uart,
-        .divider_shift  = S3C6400_CLKDIV2_UART_SHIFT,
-        .reg_divider    = S3C_CLK_DIV2,
-};
-
-/* Where does UCLK0 come from? */
-
-static struct clksrc_clk clk_spi0 = {
-        .clk    = {
-                .name           = "spi-bus",
-                .id             = 0,
-                .ctrlbit        = S3C_CLKCON_SCLK_SPI0,
-                .enable         = s3c64xx_sclk_ctrl,
-                .set_parent     = s3c64xx_setparent_clksrc,
-                .get_rate       = s3c64xx_getrate_clksrc,
-                .set_rate       = s3c64xx_setrate_clksrc,
-                .round_rate     = s3c64xx_roundrate_clksrc,
-        },
-        .shift          = S3C6400_CLKSRC_SPI0_SHIFT,
-        .mask           = S3C6400_CLKSRC_SPI0_MASK,
-        .sources        = &clkset_spi_mmc,
-        .divider_shift  = S3C6400_CLKDIV2_SPI0_SHIFT,
-        .reg_divider    = S3C_CLK_DIV2,
-};
-
-static struct clksrc_clk clk_spi1 = {
-        .clk    = {
-                .name           = "spi-bus",
-                .id             = 1,
-                .ctrlbit        = S3C_CLKCON_SCLK_SPI1,
-                .enable         = s3c64xx_sclk_ctrl,
-                .set_parent     = s3c64xx_setparent_clksrc,
-                .get_rate       = s3c64xx_getrate_clksrc,
-                .set_rate       = s3c64xx_setrate_clksrc,
-                .round_rate     = s3c64xx_roundrate_clksrc,
-        },
-        .shift          = S3C6400_CLKSRC_SPI1_SHIFT,
-        .mask           = S3C6400_CLKSRC_SPI1_MASK,
-        .sources        = &clkset_spi_mmc,
-        .divider_shift  = S3C6400_CLKDIV2_SPI1_SHIFT,
-        .reg_divider    = S3C_CLK_DIV2,
-};
-
-static struct clk clk_iis_cd0 = {
-        .name           = "iis_cdclk0",
-        .id             = -1,
-};
-
-static struct clk clk_iis_cd1 = {
-        .name           = "iis_cdclk1",
-        .id             = -1,
-};
-
-static struct clk clk_pcm_cd = {
-        .name           = "pcm_cdclk",
-        .id             = -1,
-};
-
-static struct clk *clkset_audio0_list[] = {
-        [0] = &clk_mout_epll.clk,
-        [1] = &clk_dout_mpll,
-        [2] = &clk_fin_epll,
-        [3] = &clk_iis_cd0,
-        [4] = &clk_pcm_cd,
-};
-
-static struct clk_sources clkset_audio0 = {
-        .sources        = clkset_audio0_list,
-        .nr_sources     = ARRAY_SIZE(clkset_audio0_list),
-};
-
-static struct clksrc_clk clk_audio0 = {
-        .clk    = {
-                .name           = "audio-bus",
-                .id             = 0,
-                .ctrlbit        = S3C_CLKCON_SCLK_AUDIO0,
-                .enable         = s3c64xx_sclk_ctrl,
-                .set_parent     = s3c64xx_setparent_clksrc,
-                .get_rate       = s3c64xx_getrate_clksrc,
-                .set_rate       = s3c64xx_setrate_clksrc,
-                .round_rate     = s3c64xx_roundrate_clksrc,
-        },
-        .shift          = S3C6400_CLKSRC_AUDIO0_SHIFT,
-        .mask           = S3C6400_CLKSRC_AUDIO0_MASK,
-        .sources        = &clkset_audio0,
-        .divider_shift  = S3C6400_CLKDIV2_AUDIO0_SHIFT,
-        .reg_divider    = S3C_CLK_DIV2,
-};
-
-static struct clk *clkset_audio1_list[] = {
-        [0] = &clk_mout_epll.clk,
-        [1] = &clk_dout_mpll,
-        [2] = &clk_fin_epll,
-        [3] = &clk_iis_cd1,
-        [4] = &clk_pcm_cd,
-};
-
-static struct clk_sources clkset_audio1 = {
-        .sources        = clkset_audio1_list,
-        .nr_sources     = ARRAY_SIZE(clkset_audio1_list),
-};
-
-static struct clksrc_clk clk_audio1 = {
-        .clk    = {
-                .name           = "audio-bus",
-                .id             = 1,
-                .ctrlbit        = S3C_CLKCON_SCLK_AUDIO1,
-                .enable         = s3c64xx_sclk_ctrl,
-                .set_parent     = s3c64xx_setparent_clksrc,
-                .get_rate       = s3c64xx_getrate_clksrc,
-                .set_rate       = s3c64xx_setrate_clksrc,
-                .round_rate     = s3c64xx_roundrate_clksrc,
-        },
-        .shift          = S3C6400_CLKSRC_AUDIO1_SHIFT,
-        .mask           = S3C6400_CLKSRC_AUDIO1_MASK,
-        .sources        = &clkset_audio1,
-        .divider_shift  = S3C6400_CLKDIV2_AUDIO1_SHIFT,
-        .reg_divider    = S3C_CLK_DIV2,
-};
-
-static struct clksrc_clk clk_irda = {
-        .clk    = {
-                .name           = "irda-bus",
-                .id             = 0,
-                .ctrlbit        = S3C_CLKCON_SCLK_IRDA,
-                .enable         = s3c64xx_sclk_ctrl,
-                .set_parent     = s3c64xx_setparent_clksrc,
-                .get_rate       = s3c64xx_getrate_clksrc,
-                .set_rate       = s3c64xx_setrate_clksrc,
-                .round_rate     = s3c64xx_roundrate_clksrc,
-        },
-        .shift          = S3C6400_CLKSRC_IRDA_SHIFT,
-        .mask           = S3C6400_CLKSRC_IRDA_MASK,
-        .sources        = &clkset_irda,
-        .divider_shift  = S3C6400_CLKDIV2_IRDA_SHIFT,
-        .reg_divider    = S3C_CLK_DIV2,
-};
-
-static struct clk *clkset_camif_list[] = {
-        &clk_h2,
-};
-
-static struct clk_sources clkset_camif = {
-        .sources        = clkset_camif_list,
-        .nr_sources     = ARRAY_SIZE(clkset_camif_list),
-};
-
-static struct clksrc_clk clk_camif = {
-        .clk    = {
-                .name           = "camera",
-                .id             = -1,
-                .ctrlbit        = S3C_CLKCON_SCLK_CAM,
-                .enable         = s3c64xx_sclk_ctrl,
-                .set_parent     = s3c64xx_setparent_clksrc,
-                .get_rate       = s3c64xx_getrate_clksrc,
-                .set_rate       = s3c64xx_setrate_clksrc,
-                .round_rate     = s3c64xx_roundrate_clksrc,
-        },
-        .shift          = 0,
-        .mask           = 0,
-        .sources        = &clkset_camif,
-        .divider_shift  = S3C6400_CLKDIV0_CAM_SHIFT,
-        .reg_divider    = S3C_CLK_DIV0,
-};
-
-/* Clock initialisation code */
-
-static struct clksrc_clk *init_parents[] = {
-        &clk_mout_apll,
-        &clk_mout_epll,
-        &clk_mout_mpll,
-        &clk_mmc0,
-        &clk_mmc1,
-        &clk_mmc2,
-        &clk_usbhost,
-        &clk_uart_uclk1,
-        &clk_spi0,
-        &clk_spi1,
-        &clk_audio0,
-        &clk_audio1,
-        &clk_irda,
-        &clk_camif,
-};
-
-static void __init_or_cpufreq s3c6400_set_clksrc(struct clksrc_clk *clk)
-{
-        struct clk_sources *srcs = clk->sources;
-        u32 clksrc = __raw_readl(S3C_CLK_SRC);
-
-        clksrc &= clk->mask;
-        clksrc >>= clk->shift;
-
-        if (clksrc > srcs->nr_sources || !srcs->sources[clksrc]) {
-                printk(KERN_ERR "%s: bad source %d\n",
-                       clk->clk.name, clksrc);
-                return;
-        }
-
-        clk->clk.parent = srcs->sources[clksrc];
-
-        printk(KERN_INFO "%s: source is %s (%d), rate is %ld\n",
-               clk->clk.name, clk->clk.parent->name, clksrc,
-               clk_get_rate(&clk->clk));
-}
-
-#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
-
-void __init_or_cpufreq s3c6400_setup_clocks(void)
-{
-        struct clk *xtal_clk;
-        unsigned long xtal;
-        unsigned long fclk;
-        unsigned long hclk;
-        unsigned long hclk2;
-        unsigned long pclk;
-        unsigned long epll;
-        unsigned long apll;
-        unsigned long mpll;
-        unsigned int ptr;
-        u32 clkdiv0;
-
-        printk(KERN_DEBUG "%s: registering clocks\n", __func__);
-
-        clkdiv0 = __raw_readl(S3C_CLK_DIV0);
-        printk(KERN_DEBUG "%s: clkdiv0 = %08x\n", __func__, clkdiv0);
-
-        xtal_clk = clk_get(NULL, "xtal");
-        BUG_ON(IS_ERR(xtal_clk));
-
-        xtal = clk_get_rate(xtal_clk);
-        clk_put(xtal_clk);
-
-        printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
-
-        /* For now assume the mux always selects the crystal */
-        clk_ext_xtal_mux.parent = xtal_clk;
-
-        epll = s3c6400_get_epll(xtal);
-        mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON));
-        apll = s3c6400_get_pll(xtal, __raw_readl(S3C_APLL_CON));
-
-        fclk = mpll;
-
-        printk(KERN_INFO "S3C64XX: PLL settings, A=%ld, M=%ld, E=%ld\n",
-               apll, mpll, epll);
-
-        hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2);
-        hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK);
-        pclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_PCLK);
-
-        printk(KERN_INFO "S3C64XX: HCLK2=%ld, HCLK=%ld, PCLK=%ld\n",
-               hclk2, hclk, pclk);
-
-        clk_fout_mpll.rate = mpll;
-        clk_fout_epll.rate = epll;
-        clk_fout_apll.rate = apll;
-
-        clk_h2.rate = hclk2;
-        clk_h.rate = hclk;
-        clk_p.rate = pclk;
-        clk_f.rate = fclk;
-
-        for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
-                s3c6400_set_clksrc(init_parents[ptr]);
-}
-
-static struct clk *clks[] __initdata = {
-        &clk_ext_xtal_mux,
-        &clk_iis_cd0,
-        &clk_iis_cd1,
-        &clk_pcm_cd,
-        &clk_mout_epll.clk,
-        &clk_mout_mpll.clk,
-        &clk_dout_mpll,
-        &clk_mmc0.clk,
-        &clk_mmc1.clk,
-        &clk_mmc2.clk,
-        &clk_usbhost.clk,
-        &clk_uart_uclk1.clk,
-        &clk_spi0.clk,
-        &clk_spi1.clk,
-        &clk_audio0.clk,
-        &clk_audio1.clk,
-        &clk_irda.clk,
-        &clk_camif.clk,
-        &clk_arm,
-};
-
-/**
- * s3c6400_register_clocks - register clocks for s3c6400 and above
- * @armclk_divlimit: Divisor mask for ARMCLK
- *
- * Register the clocks for the S3C6400 and above SoC range, such
- * as ARMCLK and the clocks which have divider chains attached.
- *
- * This call does not setup the clocks, which is left to the
- * s3c6400_setup_clocks() call which may be needed by the cpufreq
- * or resume code to re-set the clocks if the bootloader has changed
- * them.
- */
-void __init s3c6400_register_clocks(unsigned armclk_divlimit)
-{
-        struct clk *clkp;
-        int ret;
-        int ptr;
-
-        armclk_mask = armclk_divlimit;
-
-        for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) {
-                clkp = clks[ptr];
-                ret = s3c24xx_register_clock(clkp);
-                if (ret < 0) {
-                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
-                               clkp->name, ret);
-                }
-        }
-}
diff --git a/arch/arm/plat-s3c64xx/s3c6400-init.c b/arch/arm/plat-s3c64xx/s3c6400-init.c
deleted file mode 100644
index 6c28f39df09..00000000000
--- a/arch/arm/plat-s3c64xx/s3c6400-init.c
+++ /dev/null
@@ -1,29 +0,0 @@
-/* linux/arch/arm/plat-s3c64xx/s3c6400-init.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C6400 - CPU initialisation (common with other S3C64XX chips)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/s3c6400.h>
-#include <plat/s3c6410.h>
-
-/* uart registration process */
-
-void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-        s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
-}
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
new file mode 100644
index 00000000000..d400a6a20fe
--- /dev/null
+++ b/arch/arm/plat-s5p/Kconfig
@@ -0,0 +1,25 @@
+# arch/arm/plat-s5p/Kconfig
+#
+# Copyright (c) 2009 Samsung Electronics Co., Ltd.
+#               http://www.samsung.com/
+#
+# Licensed under GPLv2
+
+config PLAT_S5P
+        bool
+        depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210)
+        default y
+        select ARM_VIC
+        select NO_IOPORT
+        select ARCH_REQUIRE_GPIOLIB
+        select S3C_GPIO_TRACK
+        select SAMSUNG_GPIOLIB_4BIT
+        select S3C_GPIO_CFG_S3C64XX
+        select S3C_GPIO_PULL_UPDOWN
+        select S3C_GPIO_CFG_S3C24XX
+        select PLAT_SAMSUNG
+        select SAMSUNG_CLKSRC
+        select SAMSUNG_IRQ_VIC_TIMER
+        select SAMSUNG_IRQ_UART
+        help
+          Base platform code for Samsung's S5P series SoC.
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
new file mode 100644
index 00000000000..a7c54b332d2
--- /dev/null
+++ b/arch/arm/plat-s5p/Makefile
@@ -0,0 +1,19 @@
+# arch/arm/plat-s5p/Makefile
+#
+# Copyright (c) 2009 Samsung Electronics Co., Ltd.
+#               http://www.samsung.com/
+#
+# Licensed under GPLv2
+
+obj-y                           :=
+obj-m                           :=
+obj-n                           := dummy.o
+obj-                            :=
+
+# Core files
+
+obj-y                           += dev-uart.o
+obj-y                           += cpu.o
+obj-y                           += clock.o
+obj-y                           += irq.o
+obj-y                           += setup-i2c0.o
diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c
new file mode 100644
index 00000000000..aa96e335073
--- /dev/null
+++ b/arch/arm/plat-s5p/clock.c
@@ -0,0 +1,149 @@
+/* linux/arch/arm/plat-s5p/clock.c
+ *
+ * Copyright 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P - Common clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/sysdev.h>
+#include <linux/io.h>
+#include <asm/div64.h>
+
+#include <plat/clock.h>
+#include <plat/clock-clksrc.h>
+#include <plat/s5p-clock.h>
+
+/* fin_apll, fin_mpll and fin_epll are all the same clock, which we call
+ * clk_ext_xtal_mux.
+*/
+struct clk clk_ext_xtal_mux = {
+        .name           = "ext_xtal",
+        .id             = -1,
+};
+
+static struct clk s5p_clk_27m = {
+        .name           = "clk_27m",
+        .id             = -1,
+        .rate           = 27000000,
+};
+
+/* 48MHz USB Phy clock output */
+struct clk clk_48m = {
+        .name           = "clk_48m",
+        .id             = -1,
+        .rate           = 48000000,
+};
+
+/* APLL clock output
+ * No need .ctrlbit, this is always on
+*/
+struct clk clk_fout_apll = {
+        .name           = "fout_apll",
+        .id             = -1,
+};
+
+/* MPLL clock output
+ * No need .ctrlbit, this is always on
+*/
+struct clk clk_fout_mpll = {
+        .name           = "fout_mpll",
+        .id             = -1,
+};
+
+/* EPLL clock output */
+struct clk clk_fout_epll = {
+        .name           = "fout_epll",
+        .id             = -1,
+        .ctrlbit        = (1 << 31),
+};
+
+/* ARM clock */
+struct clk clk_arm = {
+        .name           = "armclk",
+        .id             = -1,
+        .rate           = 0,
+        .ctrlbit        = 0,
+};
+
+/* Possible clock sources for APLL Mux */
+static struct clk *clk_src_apll_list[] = {
+        [0] = &clk_fin_apll,
+        [1] = &clk_fout_apll,
+};
+
+struct clksrc_sources clk_src_apll = {
+        .sources        = clk_src_apll_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_apll_list),
+};
+
+/* Possible clock sources for MPLL Mux */
+static struct clk *clk_src_mpll_list[] = {
+        [0] = &clk_fin_mpll,
+        [1] = &clk_fout_mpll,
+};
+
+struct clksrc_sources clk_src_mpll = {
+        .sources        = clk_src_mpll_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_mpll_list),
+};
+
+/* Possible clock sources for EPLL Mux */
+static struct clk *clk_src_epll_list[] = {
+        [0] = &clk_fin_epll,
+        [1] = &clk_fout_epll,
+};
+
+struct clksrc_sources clk_src_epll = {
+        .sources        = clk_src_epll_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_epll_list),
+};
+
+struct clk clk_vpll = {
+        .name           = "vpll",
+        .id             = -1,
+};
+
+int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable)
+{
+        unsigned int ctrlbit = clk->ctrlbit;
+        u32 con;
+
+        con = __raw_readl(reg);
+        con = enable ? (con | ctrlbit) : (con & ~ctrlbit);
+        __raw_writel(con, reg);
+        return 0;
+}
+
+static struct clk *s5p_clks[] __initdata = {
+        &clk_ext_xtal_mux,
+        &clk_48m,
+        &s5p_clk_27m,
+        &clk_fout_apll,
+        &clk_fout_mpll,
+        &clk_fout_epll,
+        &clk_arm,
+        &clk_vpll,
+};
+
+void __init s5p_register_clocks(unsigned long xtal_freq)
+{
+        int ret;
+
+        clk_ext_xtal_mux.rate = xtal_freq;
+
+        ret = s3c24xx_register_clocks(s5p_clks, ARRAY_SIZE(s5p_clks));
+        if (ret > 0)
+                printk(KERN_ERR "Failed to register s5p clocks\n");
+}
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
new file mode 100644
index 00000000000..f92e5de3a75
--- /dev/null
+++ b/arch/arm/plat-s5p/cpu.c
@@ -0,0 +1,113 @@
+/* linux/arch/arm/plat-s5p/cpu.c
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P CPU Support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <mach/map.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <mach/regs-clock.h>
+#include <plat/cpu.h>
+#include <plat/s5p6440.h>
+#include <plat/s5p6442.h>
+#include <plat/s5pv210.h>
+
+/* table of supported CPUs */
+
+static const char name_s5p6440[] = "S5P6440";
+static const char name_s5p6442[] = "S5P6442";
+static const char name_s5pv210[] = "S5PV210/S5PC110";
+
+static struct cpu_table cpu_ids[] __initdata = {
+        {
+                .idcode         = 0x56440100,
+                .idmask         = 0xffffff00,
+                .map_io         = s5p6440_map_io,
+                .init_clocks    = s5p6440_init_clocks,
+                .init_uarts     = s5p6440_init_uarts,
+                .init           = s5p6440_init,
+                .name           = name_s5p6440,
+        }, {
+                .idcode         = 0x36442000,
+                .idmask         = 0xffffff00,
+                .map_io         = s5p6442_map_io,
+                .init_clocks    = s5p6442_init_clocks,
+                .init_uarts     = s5p6442_init_uarts,
+                .init           = s5p6442_init,
+                .name           = name_s5p6442,
+        }, {
+                .idcode         = 0x43110000,
+                .idmask         = 0xfffff000,
+                .map_io         = s5pv210_map_io,
+                .init_clocks    = s5pv210_init_clocks,
+                .init_uarts     = s5pv210_init_uarts,
+                .init           = s5pv210_init,
+                .name           = name_s5pv210,
+        },
+};
+
+/* minimal IO mapping */
+
+static struct map_desc s5p_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S5P_VA_CHIPID,
+                .pfn            = __phys_to_pfn(S5P_PA_CHIPID),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_SYS,
+                .pfn            = __phys_to_pfn(S5P_PA_SYSCON),
+                .length         = SZ_64K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_UART,
+                .pfn            = __phys_to_pfn(S3C_PA_UART),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)VA_VIC0,
+                .pfn            = __phys_to_pfn(S5P_PA_VIC0),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)VA_VIC1,
+                .pfn            = __phys_to_pfn(S5P_PA_VIC1),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_TIMER,
+                .pfn            = __phys_to_pfn(S5P_PA_TIMER),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_GPIO,
+                .pfn            = __phys_to_pfn(S5P_PA_GPIO),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        },
+};
+
+/* read cpu identification code */
+
+void __init s5p_init_io(struct map_desc *mach_desc,
+                        int size, void __iomem *cpuid_addr)
+{
+        unsigned long idcode;
+
+        /* initialize the io descriptors we need for initialization */
+        iotable_init(s5p_iodesc, ARRAY_SIZE(s5p_iodesc));
+        if (mach_desc)
+                iotable_init(mach_desc, size);
+
+        idcode = __raw_readl(cpuid_addr);
+        s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids));
+}
diff --git a/arch/arm/plat-s5p/dev-uart.c b/arch/arm/plat-s5p/dev-uart.c
new file mode 100644
index 00000000000..a89331ef4ae
--- /dev/null
+++ b/arch/arm/plat-s5p/dev-uart.c
@@ -0,0 +1,139 @@
+/* linux/arch/arm/plat-s5p/dev-uart.c
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Base S5P UART resource and device definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/irq.h>
+#include <mach/hardware.h>
+#include <mach/map.h>
+
+#include <plat/devs.h>
+
+ /* Serial port registrations */
+
+static struct resource s5p_uart0_resource[] = {
+        [0] = {
+                .start  = S5P_PA_UART0,
+                .end    = S5P_PA_UART0 + S5P_SZ_UART,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_S5P_UART_RX0,
+                .end    = IRQ_S5P_UART_RX0,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start  = IRQ_S5P_UART_TX0,
+                .end    = IRQ_S5P_UART_TX0,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [3] = {
+                .start  = IRQ_S5P_UART_ERR0,
+                .end    = IRQ_S5P_UART_ERR0,
+                .flags  = IORESOURCE_IRQ,
+        }
+};
+
+static struct resource s5p_uart1_resource[] = {
+        [0] = {
+                .start  = S5P_PA_UART1,
+                .end    = S5P_PA_UART1 + S5P_SZ_UART,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_S5P_UART_RX1,
+                .end    = IRQ_S5P_UART_RX1,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start  = IRQ_S5P_UART_TX1,
+                .end    = IRQ_S5P_UART_TX1,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [3] = {
+                .start  = IRQ_S5P_UART_ERR1,
+                .end    = IRQ_S5P_UART_ERR1,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct resource s5p_uart2_resource[] = {
+        [0] = {
+                .start  = S5P_PA_UART2,
+                .end    = S5P_PA_UART2 + S5P_SZ_UART,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_S5P_UART_RX2,
+                .end    = IRQ_S5P_UART_RX2,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start  = IRQ_S5P_UART_TX2,
+                .end    = IRQ_S5P_UART_TX2,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [3] = {
+                .start  = IRQ_S5P_UART_ERR2,
+                .end    = IRQ_S5P_UART_ERR2,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct resource s5p_uart3_resource[] = {
+#if CONFIG_SERIAL_SAMSUNG_UARTS > 3
+        [0] = {
+                .start  = S5P_PA_UART3,
+                .end    = S5P_PA_UART3 + S5P_SZ_UART,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_S5P_UART_RX3,
+                .end    = IRQ_S5P_UART_RX3,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start  = IRQ_S5P_UART_TX3,
+                .end    = IRQ_S5P_UART_TX3,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [3] = {
+                .start  = IRQ_S5P_UART_ERR3,
+                .end    = IRQ_S5P_UART_ERR3,
+                .flags  = IORESOURCE_IRQ,
+        },
+#endif
+};
+
+struct s3c24xx_uart_resources s5p_uart_resources[] __initdata = {
+        [0] = {
+                .resources      = s5p_uart0_resource,
+                .nr_resources   = ARRAY_SIZE(s5p_uart0_resource),
+        },
+        [1] = {
+                .resources      = s5p_uart1_resource,
+                .nr_resources   = ARRAY_SIZE(s5p_uart1_resource),
+        },
+        [2] = {
+                .resources      = s5p_uart2_resource,
+                .nr_resources   = ARRAY_SIZE(s5p_uart2_resource),
+        },
+        [3] = {
+                .resources      = s5p_uart3_resource,
+                .nr_resources   = ARRAY_SIZE(s5p_uart3_resource),
+        },
+};
diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h
new file mode 100644
index 00000000000..42e757f2e40
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/irqs.h
@@ -0,0 +1,90 @@
+/* linux/arch/arm/plat-s5p/include/plat/irqs.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P Common IRQ support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_PLAT_S5P_IRQS_H
+#define __ASM_PLAT_S5P_IRQS_H __FILE__
+
+/* we keep the first set of CPU IRQs out of the range of
+ * the ISA space, so that the PC104 has them to itself
+ * and we don't end up having to do horrible things to the
+ * standard ISA drivers....
+ *
+ * note, since we're using the VICs, our start must be a
+ * mulitple of 32 to allow the common code to work
+ */
+
+#define S5P_IRQ_OFFSET          (32)
+
+#define S5P_IRQ(x)              ((x) + S5P_IRQ_OFFSET)
+
+#define S5P_VIC0_BASE           S5P_IRQ(0)
+#define S5P_VIC1_BASE           S5P_IRQ(32)
+#define S5P_VIC2_BASE           S5P_IRQ(64)
+#define S5P_VIC3_BASE           S5P_IRQ(96)
+
+#define VIC_BASE(x)             (S5P_VIC0_BASE + ((x)*32))
+
+#define IRQ_VIC0_BASE           S5P_VIC0_BASE
+#define IRQ_VIC1_BASE           S5P_VIC1_BASE
+#define IRQ_VIC2_BASE           S5P_VIC2_BASE
+
+/* UART interrupts, each UART has 4 intterupts per channel so
+ * use the space between the ISA and S3C main interrupts. Note, these
+ * are not in the same order as the S3C24XX series! */
+
+#define IRQ_S5P_UART_BASE0      (16)
+#define IRQ_S5P_UART_BASE1      (20)
+#define IRQ_S5P_UART_BASE2      (24)
+#define IRQ_S5P_UART_BASE3      (28)
+
+#define UART_IRQ_RXD            (0)
+#define UART_IRQ_ERR            (1)
+#define UART_IRQ_TXD            (2)
+
+#define IRQ_S5P_UART_RX0        (IRQ_S5P_UART_BASE0 + UART_IRQ_RXD)
+#define IRQ_S5P_UART_TX0        (IRQ_S5P_UART_BASE0 + UART_IRQ_TXD)
+#define IRQ_S5P_UART_ERR0       (IRQ_S5P_UART_BASE0 + UART_IRQ_ERR)
+
+#define IRQ_S5P_UART_RX1        (IRQ_S5P_UART_BASE1 + UART_IRQ_RXD)
+#define IRQ_S5P_UART_TX1        (IRQ_S5P_UART_BASE1 + UART_IRQ_TXD)
+#define IRQ_S5P_UART_ERR1       (IRQ_S5P_UART_BASE1 + UART_IRQ_ERR)
+
+#define IRQ_S5P_UART_RX2        (IRQ_S5P_UART_BASE2 + UART_IRQ_RXD)
+#define IRQ_S5P_UART_TX2        (IRQ_S5P_UART_BASE2 + UART_IRQ_TXD)
+#define IRQ_S5P_UART_ERR2       (IRQ_S5P_UART_BASE2 + UART_IRQ_ERR)
+
+#define IRQ_S5P_UART_RX3        (IRQ_S5P_UART_BASE3 + UART_IRQ_RXD)
+#define IRQ_S5P_UART_TX3        (IRQ_S5P_UART_BASE3 + UART_IRQ_TXD)
+#define IRQ_S5P_UART_ERR3       (IRQ_S5P_UART_BASE3 + UART_IRQ_ERR)
+
+/* S3C compatibilty defines */
+#define IRQ_S3CUART_RX0         IRQ_S5P_UART_RX0
+#define IRQ_S3CUART_RX1         IRQ_S5P_UART_RX1
+#define IRQ_S3CUART_RX2         IRQ_S5P_UART_RX2
+#define IRQ_S3CUART_RX3         IRQ_S5P_UART_RX3
+
+/* VIC based IRQs */
+
+#define S5P_IRQ_VIC0(x)         (S5P_VIC0_BASE + (x))
+#define S5P_IRQ_VIC1(x)         (S5P_VIC1_BASE + (x))
+#define S5P_IRQ_VIC2(x)         (S5P_VIC2_BASE + (x))
+#define S5P_IRQ_VIC3(x)         (S5P_VIC3_BASE + (x))
+
+#define S5P_TIMER_IRQ(x)        S5P_IRQ(11 + (x))
+
+#define IRQ_TIMER0              S5P_TIMER_IRQ(0)
+#define IRQ_TIMER1              S5P_TIMER_IRQ(1)
+#define IRQ_TIMER2              S5P_TIMER_IRQ(2)
+#define IRQ_TIMER3              S5P_TIMER_IRQ(3)
+#define IRQ_TIMER4              S5P_TIMER_IRQ(4)
+
+#endif /* __ASM_PLAT_S5P_IRQS_H */
diff --git a/arch/arm/plat-s5p/include/plat/map-s5p.h b/arch/arm/plat-s5p/include/plat/map-s5p.h
new file mode 100644
index 00000000000..14828521f70
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/map-s5p.h
@@ -0,0 +1,34 @@
+/* linux/arch/arm/plat-s5p/include/plat/map-s5p.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P - Memory map definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_PLAT_MAP_S5P_H
+#define __ASM_PLAT_MAP_S5P_H __FILE__
+
+#define S5P_VA_CHIPID           S3C_ADDR(0x00700000)
+#define S5P_VA_GPIO             S3C_ADDR(0x00500000)
+#define S5P_VA_SYSTIMER         S3C_ADDR(0x01200000)
+#define S5P_VA_SROMC            S3C_ADDR(0x01100000)
+
+#define S5P_VA_UART0            (S3C_VA_UART + 0x0)
+#define S5P_VA_UART1            (S3C_VA_UART + 0x400)
+#define S5P_VA_UART2            (S3C_VA_UART + 0x800)
+#define S5P_VA_UART3            (S3C_VA_UART + 0xC00)
+
+#define S3C_UART_OFFSET         (0x400)
+
+#define VA_VIC(x)               (S3C_VA_IRQ + ((x) * 0x10000))
+#define VA_VIC0                 VA_VIC(0)
+#define VA_VIC1                 VA_VIC(1)
+#define VA_VIC2                 VA_VIC(2)
+#define VA_VIC3                 VA_VIC(3)
+
+#endif /* __ASM_PLAT_MAP_S5P_H */
diff --git a/arch/arm/plat-s5p/include/plat/pll.h b/arch/arm/plat-s5p/include/plat/pll.h
new file mode 100644
index 00000000000..d48325bb29e
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/pll.h
@@ -0,0 +1,83 @@
+/* arch/arm/plat-s5p/include/plat/pll.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P PLL code
+ *
+ * Based on arch/arm/plat-s3c64xx/include/plat/pll.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define PLL45XX_MDIV_MASK       (0x3FF)
+#define PLL45XX_PDIV_MASK       (0x3F)
+#define PLL45XX_SDIV_MASK       (0x7)
+#define PLL45XX_MDIV_SHIFT      (16)
+#define PLL45XX_PDIV_SHIFT      (8)
+#define PLL45XX_SDIV_SHIFT      (0)
+
+#include <asm/div64.h>
+
+enum pll45xx_type_t {
+        pll_4500,
+        pll_4502,
+        pll_4508
+};
+
+static inline unsigned long s5p_get_pll45xx(unsigned long baseclk, u32 pll_con,
+                                            enum pll45xx_type_t pll_type)
+{
+        u32 mdiv, pdiv, sdiv;
+        u64 fvco = baseclk;
+
+        mdiv = (pll_con >> PLL45XX_MDIV_SHIFT) & PLL45XX_MDIV_MASK;
+        pdiv = (pll_con >> PLL45XX_PDIV_SHIFT) & PLL45XX_PDIV_MASK;
+        sdiv = (pll_con >> PLL45XX_SDIV_SHIFT) & PLL45XX_SDIV_MASK;
+
+        if (pll_type == pll_4508)
+                sdiv = sdiv - 1;
+
+        fvco *= mdiv;
+        do_div(fvco, (pdiv << sdiv));
+
+        return (unsigned long)fvco;
+}
+
+#define PLL90XX_MDIV_MASK       (0xFF)
+#define PLL90XX_PDIV_MASK       (0x3F)
+#define PLL90XX_SDIV_MASK       (0x7)
+#define PLL90XX_KDIV_MASK       (0xffff)
+#define PLL90XX_MDIV_SHIFT      (16)
+#define PLL90XX_PDIV_SHIFT      (8)
+#define PLL90XX_SDIV_SHIFT      (0)
+#define PLL90XX_KDIV_SHIFT      (0)
+
+static inline unsigned long s5p_get_pll90xx(unsigned long baseclk,
+                                            u32 pll_con, u32 pll_conk)
+{
+        unsigned long result;
+        u32 mdiv, pdiv, sdiv, kdiv;
+        u64 tmp;
+
+        mdiv = (pll_con >> PLL90XX_MDIV_SHIFT) & PLL90XX_MDIV_MASK;
+        pdiv = (pll_con >> PLL90XX_PDIV_SHIFT) & PLL90XX_PDIV_MASK;
+        sdiv = (pll_con >> PLL90XX_SDIV_SHIFT) & PLL90XX_SDIV_MASK;
+        kdiv = pll_conk & PLL90XX_KDIV_MASK;
+
+        /* We need to multiple baseclk by mdiv (the integer part) and kdiv
+         * which is in 2^16ths, so shift mdiv up (does not overflow) and
+         * add kdiv before multiplying. The use of tmp is to avoid any
+         * overflows before shifting bac down into result when multipling
+         * by the mdiv and kdiv pair.
+         */
+
+        tmp = baseclk;
+        tmp *= (mdiv << 16) + kdiv;
+        do_div(tmp, (pdiv << sdiv));
+        result = tmp >> 16;
+
+        return result;
+}
diff --git a/arch/arm/plat-s5p/include/plat/s5p-clock.h b/arch/arm/plat-s5p/include/plat/s5p-clock.h
new file mode 100644
index 00000000000..56fb8b414d4
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/s5p-clock.h
@@ -0,0 +1,40 @@
+/* linux/arch/arm/plat-s5p/include/plat/s5p-clock.h
+ *
+ * Copyright 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Header file for s5p clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_PLAT_S5P_CLOCK_H
+#define __ASM_PLAT_S5P_CLOCK_H __FILE__
+
+#include <linux/clk.h>
+
+#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
+
+#define clk_fin_apll clk_ext_xtal_mux
+#define clk_fin_mpll clk_ext_xtal_mux
+#define clk_fin_epll clk_ext_xtal_mux
+#define clk_fin_vpll clk_ext_xtal_mux
+
+extern struct clk clk_ext_xtal_mux;
+extern struct clk clk_48m;
+extern struct clk clk_fout_apll;
+extern struct clk clk_fout_mpll;
+extern struct clk clk_fout_epll;
+extern struct clk clk_arm;
+extern struct clk clk_vpll;
+
+extern struct clksrc_sources clk_src_apll;
+extern struct clksrc_sources clk_src_mpll;
+extern struct clksrc_sources clk_src_epll;
+
+extern int s5p6440_clk48m_ctrl(struct clk *clk, int enable);
+extern int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable);
+
+#endif /* __ASM_PLAT_S5P_CLOCK_H */
diff --git a/arch/arm/plat-s5p/include/plat/s5p6440.h b/arch/arm/plat-s5p/include/plat/s5p6440.h
new file mode 100644
index 00000000000..a4cd75afeb3
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/s5p6440.h
@@ -0,0 +1,37 @@
+/* arch/arm/plat-s5p/include/plat/s5p6440.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Header file for s5p6440 cpu support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+ /* Common init code for S5P6440 related SoCs */
+
+extern void s5p6440_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+extern void s5p6440_register_clocks(void);
+extern void s5p6440_setup_clocks(void);
+
+#ifdef CONFIG_CPU_S5P6440
+
+extern  int s5p6440_init(void);
+extern void s5p6440_init_irq(void);
+extern void s5p6440_map_io(void);
+extern void s5p6440_init_clocks(int xtal);
+
+#define s5p6440_init_uarts s5p6440_common_init_uarts
+
+#else
+#define s5p6440_init_clocks NULL
+#define s5p6440_init_uarts NULL
+#define s5p6440_map_io NULL
+#define s5p6440_init NULL
+#endif
+
+/* S5P6440 timer */
+
+extern struct sys_timer s5p6440_timer;
diff --git a/arch/arm/plat-s5p/include/plat/s5p6442.h b/arch/arm/plat-s5p/include/plat/s5p6442.h
new file mode 100644
index 00000000000..7b8801349c9
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/s5p6442.h
@@ -0,0 +1,33 @@
+/* arch/arm/plat-s5p/include/plat/s5p6442.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Header file for s5p6442 cpu support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* Common init code for S5P6442 related SoCs */
+
+extern void s5p6442_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+extern void s5p6442_register_clocks(void);
+extern void s5p6442_setup_clocks(void);
+
+#ifdef CONFIG_CPU_S5P6442
+
+extern  int s5p6442_init(void);
+extern void s5p6442_init_irq(void);
+extern void s5p6442_map_io(void);
+extern void s5p6442_init_clocks(int xtal);
+
+#define s5p6442_init_uarts s5p6442_common_init_uarts
+
+#else
+#define s5p6442_init_clocks NULL
+#define s5p6442_init_uarts NULL
+#define s5p6442_map_io NULL
+#define s5p6442_init NULL
+#endif
diff --git a/arch/arm/plat-s5p/include/plat/s5pv210.h b/arch/arm/plat-s5p/include/plat/s5pv210.h
new file mode 100644
index 00000000000..6c93a0c7810
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/s5pv210.h
@@ -0,0 +1,33 @@
+/* linux/arch/arm/plat-s5p/include/plat/s5pv210.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Header file for s5pv210 cpu support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* Common init code for S5PV210 related SoCs */
+
+extern void s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+extern void s5pv210_register_clocks(void);
+extern void s5pv210_setup_clocks(void);
+
+#ifdef CONFIG_CPU_S5PV210
+
+extern  int s5pv210_init(void);
+extern void s5pv210_init_irq(void);
+extern void s5pv210_map_io(void);
+extern void s5pv210_init_clocks(int xtal);
+
+#define s5pv210_init_uarts s5pv210_common_init_uarts
+
+#else
+#define s5pv210_init_clocks NULL
+#define s5pv210_init_uarts NULL
+#define s5pv210_map_io NULL
+#define s5pv210_init NULL
+#endif
diff --git a/arch/arm/plat-s5p/irq.c b/arch/arm/plat-s5p/irq.c
new file mode 100644
index 00000000000..25e1eb6de59
--- /dev/null
+++ b/arch/arm/plat-s5p/irq.c
@@ -0,0 +1,72 @@
+/* arch/arm/plat-s5p/irq.c
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P - Interrupt handling
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+
+#include <asm/hardware/vic.h>
+
+#include <linux/serial_core.h>
+#include <mach/map.h>
+#include <plat/regs-timer.h>
+#include <plat/regs-serial.h>
+#include <plat/cpu.h>
+#include <plat/irq-vic-timer.h>
+#include <plat/irq-uart.h>
+
+/*
+ * Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
+ * are consecutive when looking up the interrupt in the demux routines.
+ */
+static struct s3c_uart_irq uart_irqs[] = {
+        [0] = {
+                .regs           = S5P_VA_UART0,
+                .base_irq       = IRQ_S5P_UART_BASE0,
+                .parent_irq     = IRQ_UART0,
+        },
+        [1] = {
+                .regs           = S5P_VA_UART1,
+                .base_irq       = IRQ_S5P_UART_BASE1,
+                .parent_irq     = IRQ_UART1,
+        },
+        [2] = {
+                .regs           = S5P_VA_UART2,
+                .base_irq       = IRQ_S5P_UART_BASE2,
+                .parent_irq     = IRQ_UART2,
+        },
+#if CONFIG_SERIAL_SAMSUNG_UARTS > 3
+        [3] = {
+                .regs           = S5P_VA_UART3,
+                .base_irq       = IRQ_S5P_UART_BASE3,
+                .parent_irq     = IRQ_UART3,
+        },
+#endif
+};
+
+void __init s5p_init_irq(u32 *vic, u32 num_vic)
+{
+        int irq;
+
+        /* initialize the VICs */
+        for (irq = 0; irq < num_vic; irq++)
+                vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0);
+
+        s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0);
+        s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1);
+        s3c_init_vic_timer_irq(IRQ_TIMER2_VIC, IRQ_TIMER2);
+        s3c_init_vic_timer_irq(IRQ_TIMER3_VIC, IRQ_TIMER3);
+        s3c_init_vic_timer_irq(IRQ_TIMER4_VIC, IRQ_TIMER4);
+
+        s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs));
+}
diff --git a/arch/arm/plat-s5p/setup-i2c0.c b/arch/arm/plat-s5p/setup-i2c0.c
new file mode 100644
index 00000000000..67a66e02a97
--- /dev/null
+++ b/arch/arm/plat-s5p/setup-i2c0.c
@@ -0,0 +1,25 @@
+/* linux/arch/arm/plat-s5p/setup-i2c0.c
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * I2C0 GPIO configuration.
+ *
+ * Based on plat-s3c64xx/setup-i2c0.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+
+struct platform_device; /* don't need the contents */
+
+#include <plat/iic.h>
+
+void s3c_i2c0_cfg_gpio(struct platform_device *dev)
+{
+        /* Will be populated later */
+}
diff --git a/arch/arm/plat-s5pc1xx/Kconfig b/arch/arm/plat-s5pc1xx/Kconfig
index b7b9e91c024..c7ccdf22eef 100644
--- a/arch/arm/plat-s5pc1xx/Kconfig
+++ b/arch/arm/plat-s5pc1xx/Kconfig
@@ -11,6 +11,9 @@ config PLAT_S5PC1XX
         select ARM_VIC
         select NO_IOPORT
         select ARCH_REQUIRE_GPIOLIB
+        select SAMSUNG_CLKSRC
+        select SAMSUNG_IRQ_UART
+        select SAMSUNG_IRQ_VIC_TIMER
         select S3C_GPIO_TRACK
         select S3C_GPIO_PULL_UPDOWN
         select S3C_GPIO_CFG_S3C24XX
diff --git a/arch/arm/plat-s5pc1xx/clock.c b/arch/arm/plat-s5pc1xx/clock.c
index 26c21d84979..387f23190c3 100644
--- a/arch/arm/plat-s5pc1xx/clock.c
+++ b/arch/arm/plat-s5pc1xx/clock.c
@@ -64,25 +64,13 @@ struct clk clk_54m = {
         .rate           = 54000000,
 };
 
-static int clk_default_setrate(struct clk *clk, unsigned long rate)
-{
-        clk->rate = rate;
-        return 0;
-}
-
-static int clk_dummy_enable(struct clk *clk, int enable)
-{
-        return 0;
-}
-
 struct clk clk_hd0 = {
         .name           = "hclkd0",
         .id             = -1,
         .rate           = 0,
         .parent         = NULL,
         .ctrlbit        = 0,
-        .set_rate       = clk_default_setrate,
-        .enable         = clk_dummy_enable,
+        .ops            = &clk_ops_def_setrate,
 };
 
 struct clk clk_pd0 = {
@@ -91,8 +79,7 @@ struct clk clk_pd0 = {
         .rate           = 0,
         .parent         = NULL,
         .ctrlbit        = 0,
-        .set_rate       = clk_default_setrate,
-        .enable         = clk_dummy_enable,
+        .ops            = &clk_ops_def_setrate,
 };
 
 static int s5pc1xx_clk_gate(void __iomem *reg, struct clk *clk, int enable)
@@ -686,6 +673,8 @@ static struct clk s5pc100_init_clocks[] = {
 static struct clk *clks[] __initdata = {
         &clk_ext,
         &clk_epll,
+        &clk_pd0,
+        &clk_hd0,
         &clk_27m,
         &clk_48m,
         &clk_54m,
@@ -700,16 +689,8 @@ void __init s5pc1xx_register_clocks(void)
 
         s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
 
-        clkp = s5pc100_init_clocks;
-        size = ARRAY_SIZE(s5pc100_init_clocks);
-
-        for (ptr = 0; ptr < size; ptr++, clkp++) {
-                ret = s3c24xx_register_clock(clkp);
-                if (ret < 0) {
-                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
-                               clkp->name, ret);
-                }
-        }
+        s3c_register_clocks(s5pc100_init_clocks,
+                            ARRAY_SIZE(s5pc100_init_clocks));
 
         clkp = s5pc100_init_clocks_disable;
         size = ARRAY_SIZE(s5pc100_init_clocks_disable);
diff --git a/arch/arm/plat-s5pc1xx/dev-uart.c b/arch/arm/plat-s5pc1xx/dev-uart.c
index f749bc5407b..586c95c60bf 100644
--- a/arch/arm/plat-s5pc1xx/dev-uart.c
+++ b/arch/arm/plat-s5pc1xx/dev-uart.c
@@ -143,32 +143,3 @@ struct s3c24xx_uart_resources s5pc1xx_uart_resources[] __initdata = {
                 .nr_resources   = ARRAY_SIZE(s5pc1xx_uart3_resource),
         },
 };
-
-/* uart devices */
-
-static struct platform_device s3c24xx_uart_device0 = {
-        .id             = 0,
-};
-
-static struct platform_device s3c24xx_uart_device1 = {
-        .id             = 1,
-};
-
-static struct platform_device s3c24xx_uart_device2 = {
-        .id             = 2,
-};
-
-static struct platform_device s3c24xx_uart_device3 = {
-        .id             = 3,
-};
-
-struct platform_device *s3c24xx_uart_src[4] = {
-        &s3c24xx_uart_device0,
-        &s3c24xx_uart_device1,
-        &s3c24xx_uart_device2,
-        &s3c24xx_uart_device3,
-};
-
-struct platform_device *s3c24xx_uart_devs[4] = {
-};
-
diff --git a/arch/arm/plat-s5pc1xx/gpio-config.c b/arch/arm/plat-s5pc1xx/gpio-config.c
index bba675df9c7..a4f67e80a15 100644
--- a/arch/arm/plat-s5pc1xx/gpio-config.c
+++ b/arch/arm/plat-s5pc1xx/gpio-config.c
@@ -16,7 +16,7 @@
 #include <linux/gpio.h>
 #include <linux/io.h>
 
-#include <mach/gpio-core.h>
+#include <plat/gpio-core.h>
 #include <plat/gpio-cfg-s5pc1xx.h>
 
 s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin, unsigned int off)
diff --git a/arch/arm/plat-s5pc1xx/gpiolib.c b/arch/arm/plat-s5pc1xx/gpiolib.c
index facb410e7a7..1ffc57ac293 100644
--- a/arch/arm/plat-s5pc1xx/gpiolib.c
+++ b/arch/arm/plat-s5pc1xx/gpiolib.c
@@ -17,8 +17,8 @@
 #include <linux/gpio.h>
 
 #include <mach/map.h>
-#include <mach/gpio-core.h>
 
+#include <plat/gpio-core.h>
 #include <plat/gpio-cfg.h>
 #include <plat/gpio-cfg-helpers.h>
 #include <plat/regs-gpio.h>
diff --git a/arch/arm/plat-s5pc1xx/include/plat/irqs.h b/arch/arm/plat-s5pc1xx/include/plat/irqs.h
index ef8736366f0..409c804315e 100644
--- a/arch/arm/plat-s5pc1xx/include/plat/irqs.h
+++ b/arch/arm/plat-s5pc1xx/include/plat/irqs.h
@@ -88,11 +88,11 @@
 #define IRQ_MDMA                S5PC1XX_IRQ_VIC0(18)
 #define IRQ_PDMA0               S5PC1XX_IRQ_VIC0(19)
 #define IRQ_PDMA1               S5PC1XX_IRQ_VIC0(20)
-#define IRQ_TIMER0              S5PC1XX_IRQ_VIC0(21)
-#define IRQ_TIMER1              S5PC1XX_IRQ_VIC0(22)
-#define IRQ_TIMER2              S5PC1XX_IRQ_VIC0(23)
-#define IRQ_TIMER3              S5PC1XX_IRQ_VIC0(24)
-#define IRQ_TIMER4              S5PC1XX_IRQ_VIC0(25)
+#define IRQ_TIMER0_VIC          S5PC1XX_IRQ_VIC0(21)
+#define IRQ_TIMER1_VIC          S5PC1XX_IRQ_VIC0(22)
+#define IRQ_TIMER2_VIC          S5PC1XX_IRQ_VIC0(23)
+#define IRQ_TIMER3_VIC          S5PC1XX_IRQ_VIC0(24)
+#define IRQ_TIMER4_VIC          S5PC1XX_IRQ_VIC0(25)
 #define IRQ_SYSTIMER            S5PC1XX_IRQ_VIC0(26)
 #define IRQ_WDT                 S5PC1XX_IRQ_VIC0(27)
 #define IRQ_RTC_ALARM           S5PC1XX_IRQ_VIC0(28)
@@ -171,8 +171,15 @@
 #define IRQ_SDMIRQ              S5PC1XX_IRQ_VIC2(30)
 #define IRQ_SDMFIQ              S5PC1XX_IRQ_VIC2(31)
 
+#define IRQ_TIMER(x)            (IRQ_SDMFIQ + 1 + (x))
+#define IRQ_TIMER0              IRQ_TIMER(0)
+#define IRQ_TIMER1              IRQ_TIMER(1)
+#define IRQ_TIMER2              IRQ_TIMER(2)
+#define IRQ_TIMER3              IRQ_TIMER(3)
+#define IRQ_TIMER4              IRQ_TIMER(4)
+
 /* External interrupt */
-#define S3C_IRQ_EINT_BASE       (IRQ_SDMFIQ + 1)
+#define S3C_IRQ_EINT_BASE       (IRQ_SDMFIQ + 6)
 
 #define S3C_EINT(x)             (S3C_IRQ_EINT_BASE + (x - 16))
 #define IRQ_EINT(x)             (x < 16 ? IRQ_EINT0 + x : S3C_EINT(x))
diff --git a/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h b/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h
index c5cc86e92d6..24dec4e5253 100644
--- a/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h
+++ b/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h
@@ -61,73 +61,10 @@
 #define S5PC100_EPLL_MASK               0xffffffff
 #define S5PC100_EPLLVAL(_m, _p, _s)     ((_m) << 16 | ((_p) << 8) | ((_s)))
 
-/* CLKSRC0 */
-#define S5PC100_CLKSRC0_APLL_MASK               (0x1<<0)
-#define S5PC100_CLKSRC0_APLL_SHIFT              (0)
-#define S5PC100_CLKSRC0_MPLL_MASK               (0x1<<4)
-#define S5PC100_CLKSRC0_MPLL_SHIFT              (4)
-#define S5PC100_CLKSRC0_EPLL_MASK               (0x1<<8)
-#define S5PC100_CLKSRC0_EPLL_SHIFT              (8)
-#define S5PC100_CLKSRC0_HPLL_MASK               (0x1<<12)
-#define S5PC100_CLKSRC0_HPLL_SHIFT              (12)
-#define S5PC100_CLKSRC0_AMMUX_MASK              (0x1<<16)
-#define S5PC100_CLKSRC0_AMMUX_SHIFT             (16)
-#define S5PC100_CLKSRC0_HREF_MASK               (0x1<<20)
-#define S5PC100_CLKSRC0_HREF_SHIFT              (20)
-#define S5PC100_CLKSRC0_ONENAND_MASK    (0x1<<24)
-#define S5PC100_CLKSRC0_ONENAND_SHIFT   (24)
-
-
-/* CLKSRC1 */
-#define S5PC100_CLKSRC1_UART_MASK               (0x1<<0)
-#define S5PC100_CLKSRC1_UART_SHIFT              (0)
-#define S5PC100_CLKSRC1_SPI0_MASK               (0x3<<4)
-#define S5PC100_CLKSRC1_SPI0_SHIFT              (4)
-#define S5PC100_CLKSRC1_SPI1_MASK               (0x3<<8)
-#define S5PC100_CLKSRC1_SPI1_SHIFT              (8)
-#define S5PC100_CLKSRC1_SPI2_MASK               (0x3<<12)
-#define S5PC100_CLKSRC1_SPI2_SHIFT              (12)
-#define S5PC100_CLKSRC1_IRDA_MASK               (0x3<<16)
-#define S5PC100_CLKSRC1_IRDA_SHIFT              (16)
-#define S5PC100_CLKSRC1_UHOST_MASK              (0x3<<20)
-#define S5PC100_CLKSRC1_UHOST_SHIFT             (20)
-#define S5PC100_CLKSRC1_CLK48M_MASK             (0x1<<24)
+/* CLKSRC0..CLKSRC3 -> mostly removed due to clksrc updates */
+#define S5PC100_CLKSRC1_CLK48M_MASK     (0x1<<24)
 #define S5PC100_CLKSRC1_CLK48M_SHIFT    (24)
 
-/* CLKSRC2 */
-#define S5PC100_CLKSRC2_MMC0_MASK               (0x3<<0)
-#define S5PC100_CLKSRC2_MMC0_SHIFT              (0)
-#define S5PC100_CLKSRC2_MMC1_MASK               (0x3<<4)
-#define S5PC100_CLKSRC2_MMC1_SHIFT              (4)
-#define S5PC100_CLKSRC2_MMC2_MASK               (0x3<<8)
-#define S5PC100_CLKSRC2_MMC2_SHIFT              (8)
-#define S5PC100_CLKSRC2_LCD_MASK                (0x3<<12)
-#define S5PC100_CLKSRC2_LCD_SHIFT               (12)
-#define S5PC100_CLKSRC2_FIMC0_MASK              (0x3<<16)
-#define S5PC100_CLKSRC2_FIMC0_SHIFT             (16)
-#define S5PC100_CLKSRC2_FIMC1_MASK              (0x3<<20)
-#define S5PC100_CLKSRC2_FIMC1_SHIFT             (20)
-#define S5PC100_CLKSRC2_FIMC2_MASK              (0x3<<24)
-#define S5PC100_CLKSRC2_FIMC2_SHIFT             (24)
-#define S5PC100_CLKSRC2_MIXER_MASK              (0x3<<28)
-#define S5PC100_CLKSRC2_MIXER_SHIFT             (28)
-
-/* CLKSRC3 */
-#define S5PC100_CLKSRC3_PWI_MASK                (0x3<<0)
-#define S5PC100_CLKSRC3_PWI_SHIFT               (0)
-#define S5PC100_CLKSRC3_HCLKD2_MASK             (0x1<<4)
-#define S5PC100_CLKSRC3_HCLKD2_SHIFT    (4)
-#define S5PC100_CLKSRC3_I2SD2_MASK              (0x3<<8)
-#define S5PC100_CLKSRC3_I2SD2_SHIFT             (8)
-#define S5PC100_CLKSRC3_AUDIO0_MASK             (0x7<<12)
-#define S5PC100_CLKSRC3_AUDIO0_SHIFT    (12)
-#define S5PC100_CLKSRC3_AUDIO1_MASK             (0x7<<16)
-#define S5PC100_CLKSRC3_AUDIO1_SHIFT    (16)
-#define S5PC100_CLKSRC3_AUDIO2_MASK             (0x7<<20)
-#define S5PC100_CLKSRC3_AUDIO2_SHIFT    (20)
-#define S5PC100_CLKSRC3_SPDIF_MASK              (0x3<<24)
-#define S5PC100_CLKSRC3_SPDIF_SHIFT             (24)
-
 /* CLKDIV0 */
 #define S5PC100_CLKDIV0_APLL_MASK               (0x1<<0)
 #define S5PC100_CLKDIV0_APLL_SHIFT              (0)
@@ -140,7 +77,7 @@
 #define S5PC100_CLKDIV0_SECSS_MASK              (0x7<<16)
 #define S5PC100_CLKDIV0_SECSS_SHIFT             (16)
 
-/* CLKDIV1 */
+/* CLKDIV1 (OneNAND clock only used in one place, removed) */
 #define S5PC100_CLKDIV1_APLL2_MASK              (0x7<<0)
 #define S5PC100_CLKDIV1_APLL2_SHIFT             (0)
 #define S5PC100_CLKDIV1_MPLL_MASK               (0x3<<4)
@@ -151,56 +88,12 @@
 #define S5PC100_CLKDIV1_D1_SHIFT                (12)
 #define S5PC100_CLKDIV1_PCLKD1_MASK             (0x7<<16)
 #define S5PC100_CLKDIV1_PCLKD1_SHIFT    (16)
-#define S5PC100_CLKDIV1_ONENAND_MASK    (0x3<<20)
-#define S5PC100_CLKDIV1_ONENAND_SHIFT   (20)
 #define S5PC100_CLKDIV1_CAM_MASK                (0x1F<<24)
 #define S5PC100_CLKDIV1_CAM_SHIFT               (24)
 
-/* CLKDIV2 */
-#define S5PC100_CLKDIV2_UART_MASK               (0x7<<0)
-#define S5PC100_CLKDIV2_UART_SHIFT              (0)
-#define S5PC100_CLKDIV2_SPI0_MASK               (0xf<<4)
-#define S5PC100_CLKDIV2_SPI0_SHIFT              (4)
-#define S5PC100_CLKDIV2_SPI1_MASK               (0xf<<8)
-#define S5PC100_CLKDIV2_SPI1_SHIFT              (8)
-#define S5PC100_CLKDIV2_SPI2_MASK               (0xf<<12)
-#define S5PC100_CLKDIV2_SPI2_SHIFT              (12)
-#define S5PC100_CLKDIV2_IRDA_MASK               (0xf<<16)
-#define S5PC100_CLKDIV2_IRDA_SHIFT              (16)
-#define S5PC100_CLKDIV2_UHOST_MASK              (0xf<<20)
-#define S5PC100_CLKDIV2_UHOST_SHIFT             (20)
-
-/* CLKDIV3 */
-#define S5PC100_CLKDIV3_MMC0_MASK               (0xf<<0)
-#define S5PC100_CLKDIV3_MMC0_SHIFT              (0)
-#define S5PC100_CLKDIV3_MMC1_MASK               (0xf<<4)
-#define S5PC100_CLKDIV3_MMC1_SHIFT              (4)
-#define S5PC100_CLKDIV3_MMC2_MASK               (0xf<<8)
-#define S5PC100_CLKDIV3_MMC2_SHIFT              (8)
-#define S5PC100_CLKDIV3_LCD_MASK                (0xf<<12)
-#define S5PC100_CLKDIV3_LCD_SHIFT               (12)
-#define S5PC100_CLKDIV3_FIMC0_MASK              (0xf<<16)
-#define S5PC100_CLKDIV3_FIMC0_SHIFT             (16)
-#define S5PC100_CLKDIV3_FIMC1_MASK              (0xf<<20)
-#define S5PC100_CLKDIV3_FIMC1_SHIFT             (20)
-#define S5PC100_CLKDIV3_FIMC2_MASK              (0xf<<24)
-#define S5PC100_CLKDIV3_FIMC2_SHIFT             (24)
-#define S5PC100_CLKDIV3_HDMI_MASK               (0xf<<28)
-#define S5PC100_CLKDIV3_HDMI_SHIFT              (28)
-
-/* CLKDIV4 */
-#define S5PC100_CLKDIV4_PWI_MASK                (0x7<<0)
-#define S5PC100_CLKDIV4_PWI_SHIFT               (0)
-#define S5PC100_CLKDIV4_HCLKD2_MASK             (0x7<<4)
-#define S5PC100_CLKDIV4_HCLKD2_SHIFT    (4)
-#define S5PC100_CLKDIV4_I2SD2_MASK              (0xf<<8)
-#define S5PC100_CLKDIV4_I2SD2_SHIFT             (8)
-#define S5PC100_CLKDIV4_AUDIO0_MASK             (0xf<<12)
-#define S5PC100_CLKDIV4_AUDIO0_SHIFT    (12)
-#define S5PC100_CLKDIV4_AUDIO1_MASK             (0xf<<16)
-#define S5PC100_CLKDIV4_AUDIO1_SHIFT    (16)
-#define S5PC100_CLKDIV4_AUDIO2_MASK             (0xf<<20)
-#define S5PC100_CLKDIV4_AUDIO2_SHIFT    (20)
+/* CLKDIV2 => removed in clksrc update */
+/* CLKDIV3 => removed in clksrc update, or not needed */
+/* CLKDIV4 => removed in clksrc update, or not needed */
 
 /* HCLKD0/PCLKD0 Clock Gate 0 Registers */
 #define S5PC100_CLKGATE_D00_INTC                (1<<0)
diff --git a/arch/arm/plat-s5pc1xx/irq.c b/arch/arm/plat-s5pc1xx/irq.c
index e44fd04ef33..bfc52482781 100644
--- a/arch/arm/plat-s5pc1xx/irq.c
+++ b/arch/arm/plat-s5pc1xx/irq.c
@@ -20,87 +20,14 @@
 #include <asm/hardware/vic.h>
 
 #include <mach/map.h>
-#include <plat/regs-timer.h>
+#include <plat/irq-vic-timer.h>
+#include <plat/irq-uart.h>
 #include <plat/cpu.h>
 
-/* Timer interrupt handling */
-
-static void s3c_irq_demux_timer(unsigned int base_irq, unsigned int sub_irq)
-{
-        generic_handle_irq(sub_irq);
-}
-
-static void s3c_irq_demux_timer0(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_timer(irq, IRQ_TIMER0);
-}
-
-static void s3c_irq_demux_timer1(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_timer(irq, IRQ_TIMER1);
-}
-
-static void s3c_irq_demux_timer2(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_timer(irq, IRQ_TIMER2);
-}
-
-static void s3c_irq_demux_timer3(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_timer(irq, IRQ_TIMER3);
-}
-
-static void s3c_irq_demux_timer4(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_timer(irq, IRQ_TIMER4);
-}
-
-/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
-
-static void s3c_irq_timer_mask(unsigned int irq)
-{
-        u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
-
-        reg &= 0x1f;  /* mask out pending interrupts */
-        reg &= ~(1 << (irq - IRQ_TIMER0));
-        __raw_writel(reg, S3C64XX_TINT_CSTAT);
-}
-
-static void s3c_irq_timer_unmask(unsigned int irq)
-{
-        u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
-
-        reg &= 0x1f;  /* mask out pending interrupts */
-        reg |= 1 << (irq - IRQ_TIMER0);
-        __raw_writel(reg, S3C64XX_TINT_CSTAT);
-}
-
-static void s3c_irq_timer_ack(unsigned int irq)
-{
-        u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
-
-        reg &= 0x1f;  /* mask out pending interrupts */
-        reg |= (1 << 5) << (irq - IRQ_TIMER0);
-        __raw_writel(reg, S3C64XX_TINT_CSTAT);
-}
-
-static struct irq_chip s3c_irq_timer = {
-        .name           = "s3c-timer",
-        .mask           = s3c_irq_timer_mask,
-        .unmask         = s3c_irq_timer_unmask,
-        .ack            = s3c_irq_timer_ack,
-};
-
-struct uart_irq {
-        void __iomem    *regs;
-        unsigned int     base_irq;
-        unsigned int     parent_irq;
-};
-
 /* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
  * are consecutive when looking up the interrupt in the demux routines.
  */
-static struct uart_irq uart_irqs[] = {
+static struct s3c_uart_irq uart_irqs[] = {
         [0] = {
                 .regs           = (void *)S3C_VA_UART0,
                 .base_irq       = IRQ_S3CUART_BASE0,
@@ -123,113 +50,9 @@ static struct uart_irq uart_irqs[] = {
         },
 };
 
-static inline void __iomem *s3c_irq_uart_base(unsigned int irq)
-{
-        struct uart_irq *uirq = get_irq_chip_data(irq);
-        return uirq->regs;
-}
-
-static inline unsigned int s3c_irq_uart_bit(unsigned int irq)
-{
-        return irq & 3;
-}
-
-/* UART interrupt registers, not worth adding to seperate include header */
-#define S3C64XX_UINTP   0x30
-#define S3C64XX_UINTSP  0x34
-#define S3C64XX_UINTM   0x38
-
-static void s3c_irq_uart_mask(unsigned int irq)
-{
-        void __iomem *regs = s3c_irq_uart_base(irq);
-        unsigned int bit = s3c_irq_uart_bit(irq);
-        u32 reg;
-
-        reg = __raw_readl(regs + S3C64XX_UINTM);
-        reg |= (1 << bit);
-        __raw_writel(reg, regs + S3C64XX_UINTM);
-}
-
-static void s3c_irq_uart_maskack(unsigned int irq)
-{
-        void __iomem *regs = s3c_irq_uart_base(irq);
-        unsigned int bit = s3c_irq_uart_bit(irq);
-        u32 reg;
-
-        reg = __raw_readl(regs + S3C64XX_UINTM);
-        reg |= (1 << bit);
-        __raw_writel(reg, regs + S3C64XX_UINTM);
-        __raw_writel(1 << bit, regs + S3C64XX_UINTP);
-}
-
-static void s3c_irq_uart_unmask(unsigned int irq)
-{
-        void __iomem *regs = s3c_irq_uart_base(irq);
-        unsigned int bit = s3c_irq_uart_bit(irq);
-        u32 reg;
-
-        reg = __raw_readl(regs + S3C64XX_UINTM);
-        reg &= ~(1 << bit);
-        __raw_writel(reg, regs + S3C64XX_UINTM);
-}
-
-static void s3c_irq_uart_ack(unsigned int irq)
-{
-        void __iomem *regs = s3c_irq_uart_base(irq);
-        unsigned int bit = s3c_irq_uart_bit(irq);
-
-        __raw_writel(1 << bit, regs + S3C64XX_UINTP);
-}
-
-static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc)
-{
-        struct uart_irq *uirq = &uart_irqs[irq - IRQ_UART0];
-        u32 pend = __raw_readl(uirq->regs + S3C64XX_UINTP);
-        int base = uirq->base_irq;
-
-        if (pend & (1 << 0))
-                generic_handle_irq(base);
-        if (pend & (1 << 1))
-                generic_handle_irq(base + 1);
-        if (pend & (1 << 2))
-                generic_handle_irq(base + 2);
-        if (pend & (1 << 3))
-                generic_handle_irq(base + 3);
-}
-
-static struct irq_chip s3c_irq_uart = {
-        .name           = "s3c-uart",
-        .mask           = s3c_irq_uart_mask,
-        .unmask         = s3c_irq_uart_unmask,
-        .mask_ack       = s3c_irq_uart_maskack,
-        .ack            = s3c_irq_uart_ack,
-};
-
-static void __init s5pc1xx_uart_irq(struct uart_irq *uirq)
-{
-        void __iomem *reg_base = uirq->regs;
-        unsigned int irq;
-        int offs;
-
-        /* mask all interrupts at the start. */
-        __raw_writel(0xf, reg_base + S3C64XX_UINTM);
-
-        for (offs = 0; offs < 3; offs++) {
-                irq = uirq->base_irq + offs;
-
-                set_irq_chip(irq, &s3c_irq_uart);
-                set_irq_chip_data(irq, uirq);
-                set_irq_handler(irq, handle_level_irq);
-                set_irq_flags(irq, IRQF_VALID);
-        }
-
-        set_irq_chained_handler(uirq->parent_irq, s3c_irq_demux_uart);
-}
-
 void __init s5pc1xx_init_irq(u32 *vic_valid, int num)
 {
         int i;
-        int uart, irq;
 
         printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
 
@@ -240,20 +63,13 @@ void __init s5pc1xx_init_irq(u32 *vic_valid, int num)
 
         /* add the timer sub-irqs */
 
-        set_irq_chained_handler(IRQ_TIMER0, s3c_irq_demux_timer0);
-        set_irq_chained_handler(IRQ_TIMER1, s3c_irq_demux_timer1);
-        set_irq_chained_handler(IRQ_TIMER2, s3c_irq_demux_timer2);
-        set_irq_chained_handler(IRQ_TIMER3, s3c_irq_demux_timer3);
-        set_irq_chained_handler(IRQ_TIMER4, s3c_irq_demux_timer4);
-
-        for (irq = IRQ_TIMER0; irq <= IRQ_TIMER4; irq++) {
-                set_irq_chip(irq, &s3c_irq_timer);
-                set_irq_handler(irq, handle_level_irq);
-                set_irq_flags(irq, IRQF_VALID);
-        }
+        s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0);
+        s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1);
+        s3c_init_vic_timer_irq(IRQ_TIMER2_VIC, IRQ_TIMER2);
+        s3c_init_vic_timer_irq(IRQ_TIMER3_VIC, IRQ_TIMER3);
+        s3c_init_vic_timer_irq(IRQ_TIMER4_VIC, IRQ_TIMER4);
 
-        for (uart = 0; uart < ARRAY_SIZE(uart_irqs); uart++)
-                s5pc1xx_uart_irq(&uart_irqs[uart]);
+        s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs));
 }
 
 
diff --git a/arch/arm/plat-s5pc1xx/s5pc100-clock.c b/arch/arm/plat-s5pc1xx/s5pc100-clock.c
index b436d44510c..2bf6c57a96a 100644
--- a/arch/arm/plat-s5pc1xx/s5pc100-clock.c
+++ b/arch/arm/plat-s5pc1xx/s5pc100-clock.c
@@ -29,6 +29,7 @@
 
 #include <plat/regs-clock.h>
 #include <plat/clock.h>
+#include <plat/clock-clksrc.h>
 #include <plat/cpu.h>
 #include <plat/pll.h>
 #include <plat/devs.h>
@@ -51,23 +52,6 @@ static struct clk clk_ext_xtal_mux = {
 #define clk_fout_mpll   clk_mpll
 #define clk_vclk_54m    clk_54m
 
-struct clk_sources {
-        unsigned int    nr_sources;
-        struct clk      **sources;
-};
-
-struct clksrc_clk {
-        struct clk              clk;
-        unsigned int            mask;
-        unsigned int            shift;
-
-        struct clk_sources      *sources;
-
-        unsigned int            divider_shift;
-        void __iomem            *reg_divider;
-        void __iomem            *reg_source;
-};
-
 /* APLL */
 static struct clk clk_fout_apll = {
         .name           = "fout_apll",
@@ -80,7 +64,7 @@ static struct clk *clk_src_apll_list[] = {
         [1] = &clk_fout_apll,
 };
 
-static struct clk_sources clk_src_apll = {
+static struct clksrc_sources clk_src_apll = {
         .sources        = clk_src_apll_list,
         .nr_sources     = ARRAY_SIZE(clk_src_apll_list),
 };
@@ -90,10 +74,8 @@ static struct clksrc_clk clk_mout_apll = {
                 .name           = "mout_apll",
                 .id             = -1,
         },
-        .shift          = S5PC100_CLKSRC0_APLL_SHIFT,
-        .mask           = S5PC100_CLKSRC0_APLL_MASK,
         .sources        = &clk_src_apll,
-        .reg_source     = S5PC100_CLKSRC0,
+        .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 0, .size = 1, },
 };
 
 static unsigned long s5pc100_clk_dout_apll_get_rate(struct clk *clk)
@@ -111,7 +93,9 @@ static struct clk clk_dout_apll = {
         .name           = "dout_apll",
         .id             = -1,
         .parent         = &clk_mout_apll.clk,
-        .get_rate       = s5pc100_clk_dout_apll_get_rate,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s5pc100_clk_dout_apll_get_rate,
+        },
 };
 
 static unsigned long s5pc100_clk_arm_get_rate(struct clk *clk)
@@ -165,9 +149,11 @@ static struct clk clk_arm = {
         .name           = "armclk",
         .id             = -1,
         .parent         = &clk_dout_apll,
-        .get_rate       = s5pc100_clk_arm_get_rate,
-        .set_rate       = s5pc100_clk_arm_set_rate,
-        .round_rate     = s5pc100_clk_arm_round_rate,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s5pc100_clk_arm_get_rate,
+                .set_rate       = s5pc100_clk_arm_set_rate,
+                .round_rate     = s5pc100_clk_arm_round_rate,
+        },
 };
 
 static unsigned long s5pc100_clk_dout_d0_bus_get_rate(struct clk *clk)
@@ -185,7 +171,9 @@ static struct clk clk_dout_d0_bus = {
         .name           = "dout_d0_bus",
         .id             = -1,
         .parent         = &clk_arm,
-        .get_rate       = s5pc100_clk_dout_d0_bus_get_rate,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s5pc100_clk_dout_d0_bus_get_rate,
+        },
 };
 
 static unsigned long s5pc100_clk_dout_pclkd0_get_rate(struct clk *clk)
@@ -203,7 +191,9 @@ static struct clk clk_dout_pclkd0 = {
         .name           = "dout_pclkd0",
         .id             = -1,
         .parent         = &clk_dout_d0_bus,
-        .get_rate       = s5pc100_clk_dout_pclkd0_get_rate,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s5pc100_clk_dout_pclkd0_get_rate,
+        },
 };
 
 static unsigned long s5pc100_clk_dout_apll2_get_rate(struct clk *clk)
@@ -221,7 +211,9 @@ static struct clk clk_dout_apll2 = {
         .name           = "dout_apll2",
         .id             = -1,
         .parent         = &clk_mout_apll.clk,
-        .get_rate       = s5pc100_clk_dout_apll2_get_rate,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s5pc100_clk_dout_apll2_get_rate,
+        },
 };
 
 /* MPLL */
@@ -230,7 +222,7 @@ static struct clk *clk_src_mpll_list[] = {
         [1] = &clk_fout_mpll,
 };
 
-static struct clk_sources clk_src_mpll = {
+static struct clksrc_sources clk_src_mpll = {
         .sources        = clk_src_mpll_list,
         .nr_sources     = ARRAY_SIZE(clk_src_mpll_list),
 };
@@ -240,10 +232,8 @@ static struct clksrc_clk clk_mout_mpll = {
                 .name           = "mout_mpll",
                 .id             = -1,
         },
-        .shift          = S5PC100_CLKSRC0_MPLL_SHIFT,
-        .mask           = S5PC100_CLKSRC0_MPLL_MASK,
         .sources        = &clk_src_mpll,
-        .reg_source     = S5PC100_CLKSRC0,
+        .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 4, .size = 1, },
 };
 
 static struct clk *clkset_am_list[] = {
@@ -251,7 +241,7 @@ static struct clk *clkset_am_list[] = {
         [1] = &clk_dout_apll2,
 };
 
-static struct clk_sources clk_src_am = {
+static struct clksrc_sources clk_src_am = {
         .sources        = clkset_am_list,
         .nr_sources     = ARRAY_SIZE(clkset_am_list),
 };
@@ -261,10 +251,8 @@ static struct clksrc_clk clk_mout_am = {
                 .name           = "mout_am",
                 .id             = -1,
         },
-        .shift          = S5PC100_CLKSRC0_AMMUX_SHIFT,
-        .mask           = S5PC100_CLKSRC0_AMMUX_MASK,
         .sources        = &clk_src_am,
-        .reg_source     = S5PC100_CLKSRC0,
+        .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 16, .size = 1, },
 };
 
 static unsigned long s5pc100_clk_dout_d1_bus_get_rate(struct clk *clk)
@@ -284,7 +272,9 @@ static struct clk clk_dout_d1_bus = {
         .name           = "dout_d1_bus",
         .id             = -1,
         .parent         = &clk_mout_am.clk,
-        .get_rate       = s5pc100_clk_dout_d1_bus_get_rate,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s5pc100_clk_dout_d1_bus_get_rate,
+        },
 };
 
 static struct clk *clkset_onenand_list[] = {
@@ -292,7 +282,7 @@ static struct clk *clkset_onenand_list[] = {
         [1] = &clk_dout_d1_bus,
 };
 
-static struct clk_sources clk_src_onenand = {
+static struct clksrc_sources clk_src_onenand = {
         .sources        = clkset_onenand_list,
         .nr_sources     = ARRAY_SIZE(clkset_onenand_list),
 };
@@ -302,10 +292,8 @@ static struct clksrc_clk clk_mout_onenand = {
                 .name           = "mout_onenand",
                 .id             = -1,
         },
-        .shift          = S5PC100_CLKSRC0_ONENAND_SHIFT,
-        .mask           = S5PC100_CLKSRC0_ONENAND_MASK,
         .sources        = &clk_src_onenand,
-        .reg_source     = S5PC100_CLKSRC0,
+        .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 24, .size = 1, },
 };
 
 static unsigned long s5pc100_clk_dout_pclkd1_get_rate(struct clk *clk)
@@ -325,7 +313,9 @@ static struct clk clk_dout_pclkd1 = {
         .name           = "dout_pclkd1",
         .id             = -1,
         .parent         = &clk_dout_d1_bus,
-        .get_rate       = s5pc100_clk_dout_pclkd1_get_rate,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s5pc100_clk_dout_pclkd1_get_rate,
+        },
 };
 
 static unsigned long s5pc100_clk_dout_mpll2_get_rate(struct clk *clk)
@@ -345,7 +335,9 @@ static struct clk clk_dout_mpll2 = {
         .name           = "dout_mpll2",
         .id             = -1,
         .parent         = &clk_mout_am.clk,
-        .get_rate       = s5pc100_clk_dout_mpll2_get_rate,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s5pc100_clk_dout_mpll2_get_rate,
+        },
 };
 
 static unsigned long s5pc100_clk_dout_cam_get_rate(struct clk *clk)
@@ -365,7 +357,9 @@ static struct clk clk_dout_cam = {
         .name           = "dout_cam",
         .id             = -1,
         .parent         = &clk_dout_mpll2,
-        .get_rate       = s5pc100_clk_dout_cam_get_rate,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s5pc100_clk_dout_cam_get_rate,
+        },
 };
 
 static unsigned long s5pc100_clk_dout_mpll_get_rate(struct clk *clk)
@@ -385,7 +379,9 @@ static struct clk clk_dout_mpll = {
         .name           = "dout_mpll",
         .id             = -1,
         .parent         = &clk_mout_am.clk,
-        .get_rate       = s5pc100_clk_dout_mpll_get_rate,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s5pc100_clk_dout_mpll_get_rate,
+        },
 };
 
 /* EPLL */
@@ -399,7 +395,7 @@ static struct clk *clk_src_epll_list[] = {
         [1] = &clk_fout_epll,
 };
 
-static struct clk_sources clk_src_epll = {
+static struct clksrc_sources clk_src_epll = {
         .sources        = clk_src_epll_list,
         .nr_sources     = ARRAY_SIZE(clk_src_epll_list),
 };
@@ -409,10 +405,8 @@ static struct clksrc_clk clk_mout_epll = {
                 .name           = "mout_epll",
                 .id             = -1,
         },
-        .shift          = S5PC100_CLKSRC0_EPLL_SHIFT,
-        .mask           = S5PC100_CLKSRC0_EPLL_MASK,
-        .sources        = &clk_src_epll,
-        .reg_source     = S5PC100_CLKSRC0,
+        .sources = &clk_src_epll,
+        .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 8, .size = 1, },
 };
 
 /* HPLL */
@@ -426,7 +420,7 @@ static struct clk *clk_src_hpll_list[] = {
         [1] = &clk_fout_hpll,
 };
 
-static struct clk_sources clk_src_hpll = {
+static struct clksrc_sources clk_src_hpll = {
         .sources        = clk_src_hpll_list,
         .nr_sources     = ARRAY_SIZE(clk_src_hpll_list),
 };
@@ -436,10 +430,8 @@ static struct clksrc_clk clk_mout_hpll = {
                 .name           = "mout_hpll",
                 .id             = -1,
         },
-        .shift          = S5PC100_CLKSRC0_HPLL_SHIFT,
-        .mask           = S5PC100_CLKSRC0_HPLL_MASK,
-        .sources        = &clk_src_hpll,
-        .reg_source     = S5PC100_CLKSRC0,
+        .sources = &clk_src_hpll,
+        .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 12, .size = 1, },
 };
 
 /* Peripherals */
@@ -454,190 +446,6 @@ static struct clksrc_clk clk_mout_hpll = {
  * have a common parent divisor so are not included here.
  */
 
-static inline struct clksrc_clk *to_clksrc(struct clk *clk)
-{
-        return container_of(clk, struct clksrc_clk, clk);
-}
-
-static unsigned long s5pc100_getrate_clksrc(struct clk *clk)
-{
-        struct clksrc_clk *sclk = to_clksrc(clk);
-        unsigned long rate = clk_get_rate(clk->parent);
-        u32 clkdiv = __raw_readl(sclk->reg_divider);
-
-        clkdiv >>= sclk->divider_shift;
-        clkdiv &= 0xf;
-        clkdiv++;
-
-        rate /= clkdiv;
-        return rate;
-}
-
-static int s5pc100_setrate_clksrc(struct clk *clk, unsigned long rate)
-{
-        struct clksrc_clk *sclk = to_clksrc(clk);
-        void __iomem *reg = sclk->reg_divider;
-        unsigned int div;
-        u32 val;
-
-        rate = clk_round_rate(clk, rate);
-        div = clk_get_rate(clk->parent) / rate;
-        if (div > 16)
-                return -EINVAL;
-
-        val = __raw_readl(reg);
-        val &= ~(0xf << sclk->divider_shift);
-        val |= (div - 1) << sclk->divider_shift;
-        __raw_writel(val, reg);
-
-        return 0;
-}
-
-static int s5pc100_setparent_clksrc(struct clk *clk, struct clk *parent)
-{
-        struct clksrc_clk *sclk = to_clksrc(clk);
-        struct clk_sources *srcs = sclk->sources;
-        u32 clksrc = __raw_readl(sclk->reg_source);
-        int src_nr = -1;
-        int ptr;
-
-        for (ptr = 0; ptr < srcs->nr_sources; ptr++)
-                if (srcs->sources[ptr] == parent) {
-                        src_nr = ptr;
-                        break;
-                }
-
-        if (src_nr >= 0) {
-                clksrc &= ~sclk->mask;
-                clksrc |= src_nr << sclk->shift;
-
-                __raw_writel(clksrc, sclk->reg_source);
-                return 0;
-        }
-
-        return -EINVAL;
-}
-
-static unsigned long s5pc100_roundrate_clksrc(struct clk *clk,
-                                              unsigned long rate)
-{
-        unsigned long parent_rate = clk_get_rate(clk->parent);
-        int div;
-
-        if (rate > parent_rate)
-                rate = parent_rate;
-        else {
-                div = rate / parent_rate;
-
-                if (div == 0)
-                        div = 1;
-                if (div > 16)
-                        div = 16;
-
-                rate = parent_rate / div;
-        }
-
-        return rate;
-}
-
-static struct clk *clkset_spi_list[] = {
-        &clk_mout_epll.clk,
-        &clk_dout_mpll2,
-        &clk_fin_epll,
-        &clk_mout_hpll.clk,
-};
-
-static struct clk_sources clkset_spi = {
-        .sources        = clkset_spi_list,
-        .nr_sources     = ARRAY_SIZE(clkset_spi_list),
-};
-
-static struct clksrc_clk clk_spi0 = {
-        .clk    = {
-                .name           = "spi_bus",
-                .id             = 0,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK0_SPI0,
-                .enable         = s5pc100_sclk0_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC1_SPI0_SHIFT,
-        .mask           = S5PC100_CLKSRC1_SPI0_MASK,
-        .sources        = &clkset_spi,
-        .divider_shift  = S5PC100_CLKDIV2_SPI0_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV2,
-        .reg_source     = S5PC100_CLKSRC1,
-};
-
-static struct clksrc_clk clk_spi1 = {
-        .clk    = {
-                .name           = "spi_bus",
-                .id             = 1,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK0_SPI1,
-                .enable         = s5pc100_sclk0_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC1_SPI1_SHIFT,
-        .mask           = S5PC100_CLKSRC1_SPI1_MASK,
-        .sources        = &clkset_spi,
-        .divider_shift  = S5PC100_CLKDIV2_SPI1_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV2,
-        .reg_source     = S5PC100_CLKSRC1,
-};
-
-static struct clksrc_clk clk_spi2 = {
-        .clk    = {
-                .name           = "spi_bus",
-                .id             = 2,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK0_SPI2,
-                .enable         = s5pc100_sclk0_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC1_SPI2_SHIFT,
-        .mask           = S5PC100_CLKSRC1_SPI2_MASK,
-        .sources        = &clkset_spi,
-        .divider_shift  = S5PC100_CLKDIV2_SPI2_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV2,
-        .reg_source     = S5PC100_CLKSRC1,
-};
-
-static struct clk *clkset_uart_list[] = {
-        &clk_mout_epll.clk,
-        &clk_dout_mpll,
-};
-
-static struct clk_sources clkset_uart = {
-        .sources        = clkset_uart_list,
-        .nr_sources     = ARRAY_SIZE(clkset_uart_list),
-};
-
-static struct clksrc_clk clk_uart_uclk1 = {
-        .clk    = {
-                .name           = "uclk1",
-                .id             = -1,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK0_UART,
-                .enable         = s5pc100_sclk0_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC1_UART_SHIFT,
-        .mask           = S5PC100_CLKSRC1_UART_MASK,
-        .sources        = &clkset_uart,
-        .divider_shift  = S5PC100_CLKDIV2_UART_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV2,
-        .reg_source     = S5PC100_CLKSRC1,
-};
-
 static struct clk clk_iis_cd0 = {
         .name           = "iis_cdclk0",
         .id             = -1,
@@ -672,28 +480,31 @@ static struct clk *clkset_audio0_list[] = {
         &clk_mout_hpll.clk,
 };
 
-static struct clk_sources clkset_audio0 = {
+static struct clksrc_sources clkset_audio0 = {
         .sources        = clkset_audio0_list,
         .nr_sources     = ARRAY_SIZE(clkset_audio0_list),
 };
 
-static struct clksrc_clk clk_audio0 = {
-        .clk    = {
-                .name           = "audio-bus",
-                .id             = 0,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK1_AUDIO0,
-                .enable         = s5pc100_sclk1_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC3_AUDIO0_SHIFT,
-        .mask           = S5PC100_CLKSRC3_AUDIO0_MASK,
-        .sources        = &clkset_audio0,
-        .divider_shift  = S5PC100_CLKDIV4_AUDIO0_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV4,
-        .reg_source     = S5PC100_CLKSRC3,
+static struct clk *clkset_spi_list[] = {
+        &clk_mout_epll.clk,
+        &clk_dout_mpll2,
+        &clk_fin_epll,
+        &clk_mout_hpll.clk,
+};
+
+static struct clksrc_sources clkset_spi = {
+        .sources        = clkset_spi_list,
+        .nr_sources     = ARRAY_SIZE(clkset_spi_list),
+};
+
+static struct clk *clkset_uart_list[] = {
+        &clk_mout_epll.clk,
+        &clk_dout_mpll,
+};
+
+static struct clksrc_sources clkset_uart = {
+        .sources        = clkset_uart_list,
+        .nr_sources     = ARRAY_SIZE(clkset_uart_list),
 };
 
 static struct clk *clkset_audio1_list[] = {
@@ -705,30 +516,11 @@ static struct clk *clkset_audio1_list[] = {
         &clk_mout_hpll.clk,
 };
 
-static struct clk_sources clkset_audio1 = {
+static struct clksrc_sources clkset_audio1 = {
         .sources        = clkset_audio1_list,
         .nr_sources     = ARRAY_SIZE(clkset_audio1_list),
 };
 
-static struct clksrc_clk clk_audio1 = {
-        .clk    = {
-                .name           = "audio-bus",
-                .id             = 1,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK1_AUDIO1,
-                .enable         = s5pc100_sclk1_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC3_AUDIO1_SHIFT,
-        .mask           = S5PC100_CLKSRC3_AUDIO1_MASK,
-        .sources        = &clkset_audio1,
-        .divider_shift  = S5PC100_CLKDIV4_AUDIO1_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV4,
-        .reg_source     = S5PC100_CLKSRC3,
-};
-
 static struct clk *clkset_audio2_list[] = {
         &clk_mout_epll.clk,
         &clk_dout_mpll,
@@ -737,52 +529,56 @@ static struct clk *clkset_audio2_list[] = {
         &clk_mout_hpll.clk,
 };
 
-static struct clk_sources clkset_audio2 = {
+static struct clksrc_sources clkset_audio2 = {
         .sources        = clkset_audio2_list,
         .nr_sources     = ARRAY_SIZE(clkset_audio2_list),
 };
 
-static struct clksrc_clk clk_audio2 = {
-        .clk    = {
-                .name           = "audio-bus",
-                .id             = 2,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK1_AUDIO2,
-                .enable         = s5pc100_sclk1_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
+static struct clksrc_clk clksrc_audio[] = {
+        {
+                .clk    = {
+                        .name           = "audio-bus",
+                        .id             = 0,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK1_AUDIO0,
+                        .enable         = s5pc100_sclk1_ctrl,
+                },
+                .sources = &clkset_audio0,
+                .reg_div = { .reg = S5PC100_CLKDIV4, .shift = 12, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC3, .shift = 12, .size = 3, },
+        }, {
+                .clk    = {
+                        .name           = "audio-bus",
+                        .id             = 1,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK1_AUDIO1,
+                        .enable         = s5pc100_sclk1_ctrl,
+                },
+                .sources = &clkset_audio1,
+                .reg_div = { .reg = S5PC100_CLKDIV4, .shift = 16, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC3, .shift = 16, .size = 3, },
+        }, {
+                .clk    = {
+                        .name           = "audio-bus",
+                        .id             = 2,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK1_AUDIO2,
+                        .enable         = s5pc100_sclk1_ctrl,
+                },
+                .sources = &clkset_audio2,
+                .reg_div = { .reg = S5PC100_CLKDIV4, .shift = 20, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC3, .shift = 20, .size = 3, },
         },
-        .shift          = S5PC100_CLKSRC3_AUDIO2_SHIFT,
-        .mask           = S5PC100_CLKSRC3_AUDIO2_MASK,
-        .sources        = &clkset_audio2,
-        .divider_shift  = S5PC100_CLKDIV4_AUDIO2_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV4,
-        .reg_source     = S5PC100_CLKSRC3,
 };
 
 static struct clk *clkset_spdif_list[] = {
-        &clk_audio0.clk,
-        &clk_audio1.clk,
-        &clk_audio2.clk,
+        &clksrc_audio[0].clk,
+        &clksrc_audio[1].clk,
+        &clksrc_audio[2].clk,
 };
 
-static struct clk_sources clkset_spdif = {
+static struct clksrc_sources clkset_spdif = {
         .sources        = clkset_spdif_list,
         .nr_sources     = ARRAY_SIZE(clkset_spdif_list),
 };
 
-static struct clksrc_clk clk_spdif = {
-        .clk    = {
-                .name           = "spdif",
-                .id             = -1,
-        },
-        .shift          = S5PC100_CLKSRC3_SPDIF_SHIFT,
-        .mask           = S5PC100_CLKSRC3_SPDIF_MASK,
-        .sources        = &clkset_spdif,
-        .reg_source     = S5PC100_CLKSRC3,
-};
-
 static struct clk *clkset_lcd_fimc_list[] = {
         &clk_mout_epll.clk,
         &clk_dout_mpll,
@@ -790,87 +586,11 @@ static struct clk *clkset_lcd_fimc_list[] = {
         &clk_vclk_54m,
 };
 
-static struct clk_sources clkset_lcd_fimc = {
+static struct clksrc_sources clkset_lcd_fimc = {
         .sources        = clkset_lcd_fimc_list,
         .nr_sources     = ARRAY_SIZE(clkset_lcd_fimc_list),
 };
 
-static struct clksrc_clk clk_lcd = {
-        .clk    = {
-                .name           = "lcd",
-                .id             = -1,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK1_LCD,
-                .enable         = s5pc100_sclk1_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC2_LCD_SHIFT,
-        .mask           = S5PC100_CLKSRC2_LCD_MASK,
-        .sources        = &clkset_lcd_fimc,
-        .divider_shift  = S5PC100_CLKDIV3_LCD_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV3,
-        .reg_source     = S5PC100_CLKSRC2,
-};
-
-static struct clksrc_clk clk_fimc0 = {
-        .clk    = {
-                .name           = "fimc",
-                .id             = 0,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK1_FIMC0,
-                .enable         = s5pc100_sclk1_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC2_FIMC0_SHIFT,
-        .mask           = S5PC100_CLKSRC2_FIMC0_MASK,
-        .sources        = &clkset_lcd_fimc,
-        .divider_shift  = S5PC100_CLKDIV3_FIMC0_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV3,
-        .reg_source     = S5PC100_CLKSRC2,
-};
-
-static struct clksrc_clk clk_fimc1 = {
-        .clk    = {
-                .name           = "fimc",
-                .id             = 1,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK1_FIMC1,
-                .enable         = s5pc100_sclk1_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC2_FIMC1_SHIFT,
-        .mask           = S5PC100_CLKSRC2_FIMC1_MASK,
-        .sources        = &clkset_lcd_fimc,
-        .divider_shift  = S5PC100_CLKDIV3_FIMC1_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV3,
-        .reg_source     = S5PC100_CLKSRC2,
-};
-
-static struct clksrc_clk clk_fimc2 = {
-        .clk    = {
-                .name           = "fimc",
-                .id             = 2,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK1_FIMC2,
-                .enable         = s5pc100_sclk1_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC2_FIMC2_SHIFT,
-        .mask           = S5PC100_CLKSRC2_FIMC2_MASK,
-        .sources        = &clkset_lcd_fimc,
-        .divider_shift  = S5PC100_CLKDIV3_FIMC2_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV3,
-        .reg_source     = S5PC100_CLKSRC2,
-};
-
 static struct clk *clkset_mmc_list[] = {
         &clk_mout_epll.clk,
         &clk_dout_mpll,
@@ -878,69 +598,11 @@ static struct clk *clkset_mmc_list[] = {
         &clk_mout_hpll.clk ,
 };
 
-static struct clk_sources clkset_mmc = {
+static struct clksrc_sources clkset_mmc = {
         .sources        = clkset_mmc_list,
         .nr_sources     = ARRAY_SIZE(clkset_mmc_list),
 };
 
-static struct clksrc_clk clk_mmc0 = {
-        .clk    = {
-                .name           = "mmc_bus",
-                .id             = 0,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK0_MMC0,
-                .enable         = s5pc100_sclk0_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC2_MMC0_SHIFT,
-        .mask           = S5PC100_CLKSRC2_MMC0_MASK,
-        .sources        = &clkset_mmc,
-        .divider_shift  = S5PC100_CLKDIV3_MMC0_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV3,
-        .reg_source     = S5PC100_CLKSRC2,
-};
-
-static struct clksrc_clk clk_mmc1 = {
-        .clk    = {
-                .name           = "mmc_bus",
-                .id             = 1,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK0_MMC1,
-                .enable         = s5pc100_sclk0_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC2_MMC1_SHIFT,
-        .mask           = S5PC100_CLKSRC2_MMC1_MASK,
-        .sources        = &clkset_mmc,
-        .divider_shift  = S5PC100_CLKDIV3_MMC1_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV3,
-        .reg_source     = S5PC100_CLKSRC2,
-};
-
-static struct clksrc_clk clk_mmc2 = {
-        .clk    = {
-                .name           = "mmc_bus",
-                .id             = 2,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK0_MMC2,
-                .enable         = s5pc100_sclk0_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC2_MMC2_SHIFT,
-        .mask           = S5PC100_CLKSRC2_MMC2_MASK,
-        .sources        = &clkset_mmc,
-        .divider_shift  = S5PC100_CLKDIV3_MMC2_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV3,
-        .reg_source     = S5PC100_CLKSRC2,
-};
-
-
 static struct clk *clkset_usbhost_list[] = {
         &clk_mout_epll.clk,
         &clk_dout_mpll,
@@ -948,28 +610,141 @@ static struct clk *clkset_usbhost_list[] = {
         &clk_48m,
 };
 
-static struct clk_sources clkset_usbhost = {
+static struct clksrc_sources clkset_usbhost = {
         .sources        = clkset_usbhost_list,
         .nr_sources     = ARRAY_SIZE(clkset_usbhost_list),
 };
 
-static struct clksrc_clk clk_usbhost = {
-        .clk    = {
-                .name           = "usbhost",
-                .id             = -1,
-                .ctrlbit        = S5PC100_CLKGATE_SCLK0_USBHOST,
-                .enable         = s5pc100_sclk0_ctrl,
-                .set_parent     = s5pc100_setparent_clksrc,
-                .get_rate       = s5pc100_getrate_clksrc,
-                .set_rate       = s5pc100_setrate_clksrc,
-                .round_rate     = s5pc100_roundrate_clksrc,
-        },
-        .shift          = S5PC100_CLKSRC1_UHOST_SHIFT,
-        .mask           = S5PC100_CLKSRC1_UHOST_MASK,
-        .sources        = &clkset_usbhost,
-        .divider_shift  = S5PC100_CLKDIV2_UHOST_SHIFT,
-        .reg_divider    = S5PC100_CLKDIV2,
-        .reg_source     = S5PC100_CLKSRC1,
+static struct clksrc_clk clksrc_clks[] = {
+        {
+                .clk    = {
+                        .name           = "spi_bus",
+                        .id             = 0,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK0_SPI0,
+                        .enable         = s5pc100_sclk0_ctrl,
+
+                },
+                .sources = &clkset_spi,
+                .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 4, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 4, .size = 2, },
+        }, {
+                .clk    = {
+                        .name           = "spi_bus",
+                        .id             = 1,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK0_SPI1,
+                        .enable         = s5pc100_sclk0_ctrl,
+                },
+                .sources = &clkset_spi,
+                .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 8, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 8, .size = 2, },
+        }, {
+                .clk    = {
+                        .name           = "spi_bus",
+                        .id             = 2,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK0_SPI2,
+                        .enable         = s5pc100_sclk0_ctrl,
+                },
+                .sources = &clkset_spi,
+                .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 12, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 12, .size = 2, },
+        }, {
+                .clk    = {
+                        .name           = "uclk1",
+                        .id             = -1,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK0_UART,
+                        .enable         = s5pc100_sclk0_ctrl,
+                },
+                .sources = &clkset_uart,
+                .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 0, .size = 3, },
+                .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 0, .size = 1, },
+        }, {
+                .clk    = {
+                        .name           = "spdif",
+                        .id             = -1,
+                },
+                .sources        = &clkset_spdif,
+                .reg_src = { .reg = S5PC100_CLKSRC3, .shift = 24, .size = 2, },
+        }, {
+                .clk    = {
+                        .name           = "lcd",
+                        .id             = -1,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK1_LCD,
+                        .enable         = s5pc100_sclk1_ctrl,
+                },
+                .sources = &clkset_lcd_fimc,
+                .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 12, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 12, .size = 2, },
+        }, {
+                .clk    = {
+                        .name           = "fimc",
+                        .id             = 0,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK1_FIMC0,
+                        .enable         = s5pc100_sclk1_ctrl,
+                },
+                .sources = &clkset_lcd_fimc,
+                .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 16, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 16, .size = 2, },
+        }, {
+                .clk    = {
+                        .name           = "fimc",
+                        .id             = 1,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK1_FIMC1,
+                        .enable         = s5pc100_sclk1_ctrl,
+                },
+                .sources        = &clkset_lcd_fimc,
+                .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 20, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 20, .size = 2, },
+        }, {
+                .clk    = {
+                        .name           = "fimc",
+                        .id             = 2,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK1_FIMC2,
+                        .enable         = s5pc100_sclk1_ctrl,
+                },
+                .sources = &clkset_lcd_fimc,
+                .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 24, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 24, .size = 2, },
+        }, {
+                .clk    = {
+                        .name           = "mmc_bus",
+                        .id             = 0,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK0_MMC0,
+                        .enable         = s5pc100_sclk0_ctrl,
+                },
+                .sources = &clkset_mmc,
+                .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 0, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 0, .size = 2, },
+        }, {
+                .clk    = {
+                        .name           = "mmc_bus",
+                        .id             = 1,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK0_MMC1,
+                        .enable         = s5pc100_sclk0_ctrl,
+                },
+                .sources = &clkset_mmc,
+                .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 4, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 4, .size = 2, },
+        }, {
+                .clk    = {
+                        .name           = "mmc_bus",
+                        .id             = 2,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK0_MMC2,
+                        .enable         = s5pc100_sclk0_ctrl,
+                },
+                .sources        = &clkset_mmc,
+                .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 8, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 8, .size = 2, },
+        }, {
+                .clk    = {
+                        .name           = "usbhost",
+                        .id             = -1,
+                        .ctrlbit        = S5PC100_CLKGATE_SCLK0_USBHOST,
+                        .enable         = s5pc100_sclk0_ctrl,
+                },
+                .sources = &clkset_usbhost,
+                .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 20, .size = 4, },
+                .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 20, .size = 2, },
+        }
 };
 
 /* Clock initialisation code */
@@ -981,45 +756,8 @@ static struct clksrc_clk *init_parents[] = {
         &clk_mout_onenand,
         &clk_mout_epll,
         &clk_mout_hpll,
-        &clk_spi0,
-        &clk_spi1,
-        &clk_spi2,
-        &clk_uart_uclk1,
-        &clk_audio0,
-        &clk_audio1,
-        &clk_audio2,
-        &clk_spdif,
-        &clk_lcd,
-        &clk_fimc0,
-        &clk_fimc1,
-        &clk_fimc2,
-        &clk_mmc0,
-        &clk_mmc1,
-        &clk_mmc2,
-        &clk_usbhost,
 };
 
-static void __init_or_cpufreq s5pc100_set_clksrc(struct clksrc_clk *clk)
-{
-        struct clk_sources *srcs = clk->sources;
-        u32 clksrc = __raw_readl(clk->reg_source);
-
-        clksrc &= clk->mask;
-        clksrc >>= clk->shift;
-
-        if (clksrc > srcs->nr_sources || !srcs->sources[clksrc]) {
-                printk(KERN_ERR "%s: bad source %d\n",
-                       clk->clk.name, clksrc);
-                return;
-        }
-
-        clk->clk.parent = srcs->sources[clksrc];
-
-        printk(KERN_INFO "%s: source is %s (%d), rate is %ld.%03ld MHz\n",
-                clk->clk.name, clk->clk.parent->name, clksrc,
-                print_mhz(clk_get_rate(&clk->clk)));
-}
-
 #define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
 
 void __init_or_cpufreq s5pc100_setup_clocks(void)
@@ -1083,17 +821,25 @@ void __init_or_cpufreq s5pc100_setup_clocks(void)
         clk_f.rate = armclk;
 
         for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
-                s5pc100_set_clksrc(init_parents[ptr]);
+                s3c_set_clksrc(init_parents[ptr], true);
+
+        for (ptr = 0; ptr < ARRAY_SIZE(clksrc_audio); ptr++)
+                s3c_set_clksrc(clksrc_audio + ptr, true);
+
+        for (ptr = 0; ptr < ARRAY_SIZE(clksrc_clks); ptr++)
+                s3c_set_clksrc(clksrc_clks + ptr, true);
 }
 
 static struct clk *clks[] __initdata = {
         &clk_ext_xtal_mux,
-        &clk_mout_apll.clk,
         &clk_dout_apll,
         &clk_dout_d0_bus,
         &clk_dout_pclkd0,
         &clk_dout_apll2,
+        &clk_mout_apll.clk,
         &clk_mout_mpll.clk,
+        &clk_mout_epll.clk,
+        &clk_mout_hpll.clk,
         &clk_mout_am.clk,
         &clk_dout_d1_bus,
         &clk_mout_onenand.clk,
@@ -1101,29 +847,12 @@ static struct clk *clks[] __initdata = {
         &clk_dout_mpll2,
         &clk_dout_cam,
         &clk_dout_mpll,
-        &clk_mout_epll.clk,
         &clk_fout_epll,
         &clk_iis_cd0,
         &clk_iis_cd1,
         &clk_iis_cd2,
         &clk_pcm_cd0,
         &clk_pcm_cd1,
-        &clk_spi0.clk,
-        &clk_spi1.clk,
-        &clk_spi2.clk,
-        &clk_uart_uclk1.clk,
-        &clk_audio0.clk,
-        &clk_audio1.clk,
-        &clk_audio2.clk,
-        &clk_spdif.clk,
-        &clk_lcd.clk,
-        &clk_fimc0.clk,
-        &clk_fimc1.clk,
-        &clk_fimc2.clk,
-        &clk_mmc0.clk,
-        &clk_mmc1.clk,
-        &clk_mmc2.clk,
-        &clk_usbhost.clk,
         &clk_arm,
 };
 
@@ -1141,4 +870,7 @@ void __init s5pc100_register_clocks(void)
                                clkp->name, ret);
                 }
         }
+
+        s3c_register_clksrc(clksrc_audio, ARRAY_SIZE(clksrc_audio));
+        s3c_register_clksrc(clksrc_clks, ARRAY_SIZE(clksrc_clks));
 }
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 486a0d6301e..d552c65fa1b 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -7,11 +7,240 @@
 config PLAT_SAMSUNG
         bool
         depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX || ARCH_S5PC1XX
+        select NO_IOPORT
         default y
         help
           Base platform code for all Samsung SoC based systems
 
 if PLAT_SAMSUNG
 
+# boot configurations
+
+comment "Boot options"
+
+config S3C_BOOT_WATCHDOG
+        bool "S3C Initialisation watchdog"
+        depends on S3C2410_WATCHDOG
+        help
+          Say y to enable the watchdog during the kernel decompression
+          stage. If the kernel fails to uncompress, then the watchdog
+          will trigger a reset and the system should restart.
+
+config S3C_BOOT_ERROR_RESET
+        bool "S3C Reboot on decompression error"
+        help
+          Say y here to use the watchdog to reset the system if the
+          kernel decompressor detects an error during decompression.
+
+config S3C_BOOT_UART_FORCE_FIFO
+       bool "Force UART FIFO on during boot process"
+       default y
+       help
+         Say Y here to force the UART FIFOs on during the kernel
+         uncompressor
+
+
+config S3C_LOWLEVEL_UART_PORT
+        int "S3C UART to use for low-level messages"
+        default 0
+        help
+          Choice of which UART port to use for the low-level messages,
+          such as the `Uncompressing...` at start time. The value of
+          this configuration should be between zero and two. The port
+          must have been initialised by the boot-loader before use.
+
+# clock options
+
+config SAMSUNG_CLKSRC
+        bool
+        help
+          Select the clock code for the clksrc implementation
+          used by newer systems such as the S3C64XX.
+
+# options for IRQ support
+
+config SAMSUNG_IRQ_VIC_TIMER
+       bool
+       help
+         Internal configuration to build the VIC timer interrupt code.
+
+config SAMSUNG_IRQ_UART
+       bool
+       help
+         Internal configuration to build the IRQ UART demux code.
+
+# options for gpio configuration support
+
+config SAMSUNG_GPIOLIB_4BIT
+        bool
+        help
+          GPIOlib file contains the 4 bit modification functions for gpio
+          configuration. GPIOlib shall be compiled only for S3C64XX and S5P
+          series of processors.
+
+config S3C_GPIO_CFG_S3C24XX
+        bool
+        help
+          Internal configuration to enable S3C24XX style GPIO configuration
+          functions.
+
+config S3C_GPIO_CFG_S3C64XX
+        bool
+        help
+          Internal configuration to enable S3C64XX style GPIO configuration
+          functions.
+
+config S5P_GPIO_CFG_S5PC1XX
+        bool
+        help
+          Internal configuration to enable S5PC1XX style GPIO configuration
+          functions.
+
+config S3C_GPIO_PULL_UPDOWN
+        bool
+        help
+          Internal configuration to enable the correct GPIO pull helper
+
+config S3C_GPIO_PULL_DOWN
+        bool
+        help
+          Internal configuration to enable the correct GPIO pull helper
+
+config S3C_GPIO_PULL_UP
+        bool
+        help
+          Internal configuration to enable the correct GPIO pull helper
+
+config SAMSUNG_GPIO_EXTRA
+        int "Number of additional GPIO pins"
+        default 0
+        help
+          Use additional GPIO space in addition to the GPIO's the SOC
+          provides. This allows expanding the GPIO space for use with
+          GPIO expanders.
+
+config S3C_GPIO_SPACE
+        int "Space between gpio banks"
+        default 0
+        help
+          Add a number of spare GPIO entries between each bank for debugging
+          purposes. This allows any problems where an counter overflows from
+          one bank to another to be caught, at the expense of using a little
+          more memory.
+
+config S3C_GPIO_TRACK
+        bool
+        help
+          Internal configuration option to enable the s3c specific gpio
+          chip tracking if the platform requires it.
+
+# ADC driver
+
+config S3C_ADC
+        bool "ADC common driver support"
+        help
+          Core support for the ADC block found in the Samsung SoC systems
+          for drivers such as the touchscreen and hwmon to use to share
+          this resource.
+
+# device definitions to compile in
+
+config S3C_DEV_HSMMC
+        bool
+        help
+          Compile in platform device definitions for HSMMC code
+
+config S3C_DEV_HSMMC1
+        bool
+        help
+          Compile in platform device definitions for HSMMC channel 1
+
+config S3C_DEV_HSMMC2
+        bool
+        help
+          Compile in platform device definitions for HSMMC channel 2
+
+config S3C_DEV_I2C1
+        bool
+        help
+          Compile in platform device definitions for I2C channel 1
+
+config S3C_DEV_FB
+        bool
+        help
+          Compile in platform device definition for framebuffer
+
+config S3C_DEV_USB_HOST
+        bool
+        help
+          Compile in platform device definition for USB host.
+
+config S3C_DEV_USB_HSOTG
+        bool
+        help
+          Compile in platform device definition for USB high-speed OtG
+
+config S3C_DEV_NAND
+        bool
+        help
+          Compile in platform device definition for NAND controller
+
+config S3C64XX_DEV_SPI
+        bool
+        help
+          Compile in platform device definitions for S3C64XX's type
+          SPI controllers.
+
+# DMA
+
+config S3C_DMA
+        bool
+        help
+          Internal configuration for S3C DMA core
+
+comment "Power management"
+
+config SAMSUNG_PM_DEBUG
+        bool "S3C2410 PM Suspend debug"
+        depends on PM
+        help
+          Say Y here if you want verbose debugging from the PM Suspend and
+          Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
+          for more information.
+
+config S3C_PM_DEBUG_LED_SMDK
+       bool "SMDK LED suspend/resume debugging"
+       depends on PM && (MACH_SMDK6410)
+       help
+         Say Y here to enable the use of the SMDK LEDs on the baseboard
+         for debugging of the state of the suspend and resume process.
+
+         Note, this currently only works for S3C64XX based SMDK boards.
+
+config SAMSUNG_PM_CHECK
+        bool "S3C2410 PM Suspend Memory CRC"
+        depends on PM && CRC32
+        help
+          Enable the PM code's memory area checksum over sleep. This option
+          will generate CRCs of all blocks of memory, and store them before
+          going to sleep. The blocks are then checked on resume for any
+          errors.
+
+          Note, this can take several seconds depending on memory size
+          and CPU speed.
+
+          See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
+
+config SAMSUNG_PM_CHECK_CHUNKSIZE
+        int "S3C2410 PM Suspend CRC Chunksize (KiB)"
+        depends on PM && SAMSUNG_PM_CHECK
+        default 64
+        help
+          Set the chunksize in Kilobytes of the CRC for checking memory
+          corruption over suspend and resume. A smaller value will mean that
+          the CRC data block will take more memory, but wil identify any
+          faults with better precision.
+
+          See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
 
 endif
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 4478b9f7dc3..22c89d08f6e 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -9,3 +9,48 @@ obj-m				:=
 obj-n                           := dummy.o
 obj-                            :=
 
+# Objects we always build independent of SoC choice
+
+obj-y                           += init.o
+obj-y                           += time.o
+obj-y                           += clock.o
+obj-y                           += pwm-clock.o
+obj-y                           += gpio.o
+obj-y                           += gpio-config.o
+
+obj-$(CONFIG_SAMSUNG_GPIOLIB_4BIT)      += gpiolib.o
+obj-$(CONFIG_SAMSUNG_CLKSRC)    += clock-clksrc.o
+
+obj-$(CONFIG_SAMSUNG_IRQ_UART)  += irq-uart.o
+obj-$(CONFIG_SAMSUNG_IRQ_VIC_TIMER) += irq-vic-timer.o
+
+# ADC
+
+obj-$(CONFIG_S3C_ADC)   += adc.o
+
+# devices
+
+obj-$(CONFIG_S3C_DEV_HSMMC)     += dev-hsmmc.o
+obj-$(CONFIG_S3C_DEV_HSMMC1)    += dev-hsmmc1.o
+obj-$(CONFIG_S3C_DEV_HSMMC2)    += dev-hsmmc2.o
+obj-y                           += dev-i2c0.o
+obj-$(CONFIG_S3C_DEV_I2C1)      += dev-i2c1.o
+obj-$(CONFIG_S3C_DEV_FB)        += dev-fb.o
+obj-y                           += dev-uart.o
+obj-$(CONFIG_S3C_DEV_USB_HOST)  += dev-usb.o
+obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o
+obj-$(CONFIG_S3C_DEV_NAND)      += dev-nand.o
+
+# DMA support
+
+obj-$(CONFIG_S3C_DMA)           += dma.o
+
+# PM support
+
+obj-$(CONFIG_PM)                += pm.o
+obj-$(CONFIG_PM)                += pm-gpio.o
+obj-$(CONFIG_SAMSUNG_PM_CHECK)  += pm-check.o
+
+# PWM support
+
+obj-$(CONFIG_HAVE_PWM)          += pwm.o
diff --git a/arch/arm/plat-s3c24xx/adc.c b/arch/arm/plat-samsung/adc.c
index ce47627f336..210030d5cfe 100644
--- a/arch/arm/plat-s3c24xx/adc.c
+++ b/arch/arm/plat-samsung/adc.c
@@ -1,10 +1,10 @@
-/* arch/arm/plat-s3c24xx/adc.c
+/* arch/arm/plat-samsung/adc.c
  *
  * Copyright (c) 2008 Simtec Electronics
  *      http://armlinux.simtec.co.uk/
  *      Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
  *
- * S3C24XX ADC device core
+ * Samsung ADC device core
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -16,6 +16,7 @@
 #include <linux/platform_device.h>
 #include <linux/sched.h>
 #include <linux/list.h>
+#include <linux/slab.h>
 #include <linux/err.h>
 #include <linux/clk.h>
 #include <linux/interrupt.h>
@@ -37,6 +38,11 @@
  * action is required.
  */
 
+enum s3c_cpu_type {
+        TYPE_S3C24XX,
+        TYPE_S3C64XX
+};
+
 struct s3c_adc_client {
         struct platform_device  *pdev;
         struct list_head         pend;
@@ -257,12 +263,13 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw)
 {
         struct adc_device *adc = pw;
         struct s3c_adc_client *client = adc->cur;
+        enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data;
         unsigned long flags;
         unsigned data0, data1;
 
         if (!client) {
                 dev_warn(&adc->pdev->dev, "%s: no adc pending\n", __func__);
-                return IRQ_HANDLED;
+                goto exit;
         }
 
         data0 = readl(adc->regs + S3C2410_ADCDAT0);
@@ -271,9 +278,17 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw)
 
         client->nr_samples--;
 
+        if (cpu == TYPE_S3C64XX) {
+                /* S3C64XX ADC resolution is 12-bit */
+                data0 &= 0xfff;
+                data1 &= 0xfff;
+        } else {
+                data0 &= 0x3ff;
+                data1 &= 0x3ff;
+        }
+
         if (client->convert_cb)
-                (client->convert_cb)(client, data0 & 0x3ff, data1 & 0x3ff,
-                                     &client->nr_samples);
+                (client->convert_cb)(client, data0, data1, &client->nr_samples);
 
         if (client->nr_samples > 0) {
                 /* fire another conversion for this */
@@ -289,6 +304,11 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw)
                 local_irq_restore(flags);
         }
 
+exit:
+        if (cpu == TYPE_S3C64XX) {
+                /* Clear ADC interrupt */
+                writel(0, adc->regs + S3C64XX_ADCCLRINT);
+        }
         return IRQ_HANDLED;
 }
 
@@ -298,6 +318,7 @@ static int s3c_adc_probe(struct platform_device *pdev)
         struct adc_device *adc;
         struct resource *regs;
         int ret;
+        unsigned tmp;
 
         adc = kzalloc(sizeof(struct adc_device), GFP_KERNEL);
         if (adc == NULL) {
@@ -344,8 +365,12 @@ static int s3c_adc_probe(struct platform_device *pdev)
 
         clk_enable(adc->clk);
 
-        writel(adc->prescale | S3C2410_ADCCON_PRSCEN,
-               adc->regs + S3C2410_ADCCON);
+        tmp = adc->prescale | S3C2410_ADCCON_PRSCEN;
+        if (platform_get_device_id(pdev)->driver_data == TYPE_S3C64XX) {
+                /* Enable 12-bit ADC resolution */
+                tmp |= S3C64XX_ADCCON_RESSEL;
+        }
+        writel(tmp, adc->regs + S3C2410_ADCCON);
 
         dev_info(dev, "attached adc driver\n");
 
@@ -388,6 +413,7 @@ static int s3c_adc_suspend(struct platform_device *pdev, pm_message_t state)
         con |= S3C2410_ADCCON_STDBM;
         writel(con, adc->regs + S3C2410_ADCCON);
 
+        disable_irq(adc->irq);
         clk_disable(adc->clk);
 
         return 0;
@@ -398,6 +424,7 @@ static int s3c_adc_resume(struct platform_device *pdev)
         struct adc_device *adc = platform_get_drvdata(pdev);
 
         clk_enable(adc->clk);
+        enable_irq(adc->irq);
 
         writel(adc->prescale | S3C2410_ADCCON_PRSCEN,
                adc->regs + S3C2410_ADCCON);
@@ -410,9 +437,22 @@ static int s3c_adc_resume(struct platform_device *pdev)
 #define s3c_adc_resume NULL
 #endif
 
+static struct platform_device_id s3c_adc_driver_ids[] = {
+        {
+                .name           = "s3c24xx-adc",
+                .driver_data    = TYPE_S3C24XX,
+        }, {
+                .name           = "s3c64xx-adc",
+                .driver_data    = TYPE_S3C64XX,
+        },
+        { }
+};
+MODULE_DEVICE_TABLE(platform, s3c_adc_driver_ids);
+
 static struct platform_driver s3c_adc_driver = {
+        .id_table       = s3c_adc_driver_ids,
         .driver         = {
-                .name   = "s3c24xx-adc",
+                .name   = "s3c-adc",
                 .owner  = THIS_MODULE,
         },
         .probe          = s3c_adc_probe,
diff --git a/arch/arm/plat-samsung/clock-clksrc.c b/arch/arm/plat-samsung/clock-clksrc.c
new file mode 100644
index 00000000000..ae8b8507663
--- /dev/null
+++ b/arch/arm/plat-samsung/clock-clksrc.c
@@ -0,0 +1,212 @@
+/* linux/arch/arm/plat-samsung/clock-clksrc.c
+ *
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/sysdev.h>
+#include <linux/io.h>
+
+#include <plat/clock.h>
+#include <plat/clock-clksrc.h>
+#include <plat/cpu-freq.h>
+
+static inline struct clksrc_clk *to_clksrc(struct clk *clk)
+{
+        return container_of(clk, struct clksrc_clk, clk);
+}
+
+static inline u32 bit_mask(u32 shift, u32 nr_bits)
+{
+        u32 mask = 0xffffffff >> (32 - nr_bits);
+
+        return mask << shift;
+}
+
+static unsigned long s3c_getrate_clksrc(struct clk *clk)
+{
+        struct clksrc_clk *sclk = to_clksrc(clk);
+        unsigned long rate = clk_get_rate(clk->parent);
+        u32 clkdiv = __raw_readl(sclk->reg_div.reg);
+        u32 mask = bit_mask(sclk->reg_div.shift, sclk->reg_div.size);
+
+        clkdiv &= mask;
+        clkdiv >>= sclk->reg_div.shift;
+        clkdiv++;
+
+        rate /= clkdiv;
+        return rate;
+}
+
+static int s3c_setrate_clksrc(struct clk *clk, unsigned long rate)
+{
+        struct clksrc_clk *sclk = to_clksrc(clk);
+        void __iomem *reg = sclk->reg_div.reg;
+        unsigned int div;
+        u32 mask = bit_mask(sclk->reg_div.shift, sclk->reg_div.size);
+        u32 val;
+
+        rate = clk_round_rate(clk, rate);
+        div = clk_get_rate(clk->parent) / rate;
+        if (div > (1 << sclk->reg_div.size))
+                return -EINVAL;
+
+        val = __raw_readl(reg);
+        val &= ~mask;
+        val |= (div - 1) << sclk->reg_div.shift;
+        __raw_writel(val, reg);
+
+        return 0;
+}
+
+static int s3c_setparent_clksrc(struct clk *clk, struct clk *parent)
+{
+        struct clksrc_clk *sclk = to_clksrc(clk);
+        struct clksrc_sources *srcs = sclk->sources;
+        u32 clksrc = __raw_readl(sclk->reg_src.reg);
+        u32 mask = bit_mask(sclk->reg_src.shift, sclk->reg_src.size);
+        int src_nr = -1;
+        int ptr;
+
+        for (ptr = 0; ptr < srcs->nr_sources; ptr++)
+                if (srcs->sources[ptr] == parent) {
+                        src_nr = ptr;
+                        break;
+                }
+
+        if (src_nr >= 0) {
+                clk->parent = parent;
+
+                clksrc &= ~mask;
+                clksrc |= src_nr << sclk->reg_src.shift;
+
+                __raw_writel(clksrc, sclk->reg_src.reg);
+                return 0;
+        }
+
+        return -EINVAL;
+}
+
+static unsigned long s3c_roundrate_clksrc(struct clk *clk,
+                                              unsigned long rate)
+{
+        struct clksrc_clk *sclk = to_clksrc(clk);
+        unsigned long parent_rate = clk_get_rate(clk->parent);
+        int max_div = 1 << sclk->reg_div.size;
+        int div;
+
+        if (rate >= parent_rate)
+                rate = parent_rate;
+        else {
+                div = parent_rate / rate;
+                if (parent_rate % rate)
+                        div++;
+
+                if (div == 0)
+                        div = 1;
+                if (div > max_div)
+                        div = max_div;
+
+                rate = parent_rate / div;
+        }
+
+        return rate;
+}
+
+/* Clock initialisation code */
+
+void __init_or_cpufreq s3c_set_clksrc(struct clksrc_clk *clk, bool announce)
+{
+        struct clksrc_sources *srcs = clk->sources;
+        u32 mask = bit_mask(clk->reg_src.shift, clk->reg_src.size);
+        u32 clksrc;
+
+        if (!clk->reg_src.reg) {
+                if (!clk->clk.parent)
+                        printk(KERN_ERR "%s: no parent clock specified\n",
+                                clk->clk.name);
+                return;
+        }
+
+        clksrc = __raw_readl(clk->reg_src.reg);
+        clksrc &= mask;
+        clksrc >>= clk->reg_src.shift;
+
+        if (clksrc > srcs->nr_sources || !srcs->sources[clksrc]) {
+                printk(KERN_ERR "%s: bad source %d\n",
+                       clk->clk.name, clksrc);
+                return;
+        }
+
+        clk->clk.parent = srcs->sources[clksrc];
+
+        if (announce)
+                printk(KERN_INFO "%s: source is %s (%d), rate is %ld\n",
+                       clk->clk.name, clk->clk.parent->name, clksrc,
+                       clk_get_rate(&clk->clk));
+}
+
+static struct clk_ops clksrc_ops = {
+        .set_parent     = s3c_setparent_clksrc,
+        .get_rate       = s3c_getrate_clksrc,
+        .set_rate       = s3c_setrate_clksrc,
+        .round_rate     = s3c_roundrate_clksrc,
+};
+
+static struct clk_ops clksrc_ops_nodiv = {
+        .set_parent     = s3c_setparent_clksrc,
+};
+
+static struct clk_ops clksrc_ops_nosrc = {
+        .get_rate       = s3c_getrate_clksrc,
+        .set_rate       = s3c_setrate_clksrc,
+        .round_rate     = s3c_roundrate_clksrc,
+};
+
+void __init s3c_register_clksrc(struct clksrc_clk *clksrc, int size)
+{
+        int ret;
+
+        for (; size > 0; size--, clksrc++) {
+                if (!clksrc->reg_div.reg && !clksrc->reg_src.reg)
+                        printk(KERN_ERR "%s: clock %s has no registers set\n",
+                               __func__, clksrc->clk.name);
+
+                /* fill in the default functions */
+
+                if (!clksrc->clk.ops) {
+                        if (!clksrc->reg_div.reg)
+                                clksrc->clk.ops = &clksrc_ops_nodiv;
+                        else if (!clksrc->reg_src.reg)
+                                clksrc->clk.ops = &clksrc_ops_nosrc;
+                        else
+                                clksrc->clk.ops = &clksrc_ops;
+                }
+
+                /* setup the clocksource, but do not announce it
+                 * as it may be re-set by the setup routines
+                 * called after the rest of the clocks have been
+                 * registered
+                 */
+                s3c_set_clksrc(clksrc, false);
+
+                ret = s3c24xx_register_clock(&clksrc->clk);
+
+                if (ret < 0) {
+                        printk(KERN_ERR "%s: failed to register %s (%d)\n",
+                               __func__, clksrc->clk.name, ret);
+                }
+        }
+}
diff --git a/arch/arm/plat-s3c/clock.c b/arch/arm/plat-samsung/clock.c
index 619cfa82dca..1b25c9d8c40 100644
--- a/arch/arm/plat-s3c/clock.c
+++ b/arch/arm/plat-samsung/clock.c
@@ -150,8 +150,8 @@ unsigned long clk_get_rate(struct clk *clk)
         if (clk->rate != 0)
                 return clk->rate;
 
-        if (clk->get_rate != NULL)
-                return (clk->get_rate)(clk);
+        if (clk->ops != NULL && clk->ops->get_rate != NULL)
+                return (clk->ops->get_rate)(clk);
 
         if (clk->parent != NULL)
                 return clk_get_rate(clk->parent);
@@ -161,8 +161,8 @@ unsigned long clk_get_rate(struct clk *clk)
 
 long clk_round_rate(struct clk *clk, unsigned long rate)
 {
-        if (!IS_ERR(clk) && clk->round_rate)
-                return (clk->round_rate)(clk, rate);
+        if (!IS_ERR(clk) && clk->ops && clk->ops->round_rate)
+                return (clk->ops->round_rate)(clk, rate);
 
         return rate;
 }
@@ -178,13 +178,14 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
          * the clock may have been made this way by choice.
          */
 
-        WARN_ON(clk->set_rate == NULL);
+        WARN_ON(clk->ops == NULL);
+        WARN_ON(clk->ops && clk->ops->set_rate == NULL);
 
-        if (clk->set_rate == NULL)
+        if (clk->ops == NULL || clk->ops->set_rate == NULL)
                 return -EINVAL;
 
         spin_lock(&clocks_lock);
-        ret = (clk->set_rate)(clk, rate);
+        ret = (clk->ops->set_rate)(clk, rate);
         spin_unlock(&clocks_lock);
 
         return ret;
@@ -204,8 +205,8 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
 
         spin_lock(&clocks_lock);
 
-        if (clk->set_parent)
-                ret = (clk->set_parent)(clk, parent);
+        if (clk->ops && clk->ops->set_parent)
+                ret = (clk->ops->set_parent)(clk, parent);
 
         spin_unlock(&clocks_lock);
 
@@ -224,12 +225,16 @@ EXPORT_SYMBOL(clk_set_parent);
 
 /* base clocks */
 
-static int clk_default_setrate(struct clk *clk, unsigned long rate)
+int clk_default_setrate(struct clk *clk, unsigned long rate)
 {
         clk->rate = rate;
         return 0;
 }
 
+struct clk_ops clk_ops_def_setrate = {
+        .set_rate       = clk_default_setrate,
+};
+
 struct clk clk_xtal = {
         .name           = "xtal",
         .id             = -1,
@@ -251,7 +256,7 @@ struct clk clk_epll = {
 struct clk clk_mpll = {
         .name           = "mpll",
         .id             = -1,
-        .set_rate       = clk_default_setrate,
+        .ops            = &clk_ops_def_setrate,
 };
 
 struct clk clk_upll = {
@@ -267,7 +272,6 @@ struct clk clk_f = {
         .rate           = 0,
         .parent         = &clk_mpll,
         .ctrlbit        = 0,
-        .set_rate       = clk_default_setrate,
 };
 
 struct clk clk_h = {
@@ -276,7 +280,7 @@ struct clk clk_h = {
         .rate           = 0,
         .parent         = NULL,
         .ctrlbit        = 0,
-        .set_rate       = clk_default_setrate,
+        .ops            = &clk_ops_def_setrate,
 };
 
 struct clk clk_p = {
@@ -285,7 +289,7 @@ struct clk clk_p = {
         .rate           = 0,
         .parent         = NULL,
         .ctrlbit        = 0,
-        .set_rate       = clk_default_setrate,
+        .ops            = &clk_ops_def_setrate,
 };
 
 struct clk clk_usb_bus = {
@@ -296,7 +300,6 @@ struct clk clk_usb_bus = {
 };
 
 
-
 struct clk s3c24xx_uclk = {
         .name           = "uclk",
         .id             = -1,
@@ -304,6 +307,12 @@ struct clk s3c24xx_uclk = {
 
 /* initialise the clock system */
 
+/**
+ * s3c24xx_register_clock() - register a clock
+ * @clk: The clock to register
+ *
+ * Add the specified clock to the list of clocks known by the system.
+ */
 int s3c24xx_register_clock(struct clk *clk)
 {
         if (clk->enable == NULL)
@@ -321,18 +330,52 @@ int s3c24xx_register_clock(struct clk *clk)
         return 0;
 }
 
+/**
+ * s3c24xx_register_clocks() - register an array of clock pointers
+ * @clks: Pointer to an array of struct clk pointers
+ * @nr_clks: The number of clocks in the @clks array.
+ *
+ * Call s3c24xx_register_clock() for all the clock pointers contained
+ * in the @clks list. Returns the number of failures.
+ */
 int s3c24xx_register_clocks(struct clk **clks, int nr_clks)
 {
         int fails = 0;
 
         for (; nr_clks > 0; nr_clks--, clks++) {
-                if (s3c24xx_register_clock(*clks) < 0)
+                if (s3c24xx_register_clock(*clks) < 0) {
+                        struct clk *clk = *clks;
+                        printk(KERN_ERR "%s: failed to register %p: %s\n",
+                               __func__, clk, clk->name);
                         fails++;
+                }
         }
 
         return fails;
 }
 
+/**
+ * s3c_register_clocks() - register an array of clocks
+ * @clkp: Pointer to the first clock in the array.
+ * @nr_clks: Number of clocks to register.
+ *
+ * Call s3c24xx_register_clock() on the @clkp array given, printing an
+ * error if it fails to register the clock (unlikely).
+ */
+void __init s3c_register_clocks(struct clk *clkp, int nr_clks)
+{
+        int ret;
+
+        for (; nr_clks > 0; nr_clks--, clkp++) {
+                ret = s3c24xx_register_clock(clkp);
+
+                if (ret < 0) {
+                        printk(KERN_ERR "Failed to register clock %s (%d)\n",
+                               clkp->name, ret);
+                }
+        }
+}
+
 /* initalise all the clocks */
 
 int __init s3c24xx_register_baseclocks(unsigned long xtal)
diff --git a/arch/arm/plat-s3c/dev-fb.c b/arch/arm/plat-samsung/dev-fb.c
index a90198fc4b0..002a15f313f 100644
--- a/arch/arm/plat-s3c/dev-fb.c
+++ b/arch/arm/plat-samsung/dev-fb.c
@@ -15,6 +15,7 @@
 #include <linux/string.h>
 #include <linux/platform_device.h>
 #include <linux/fb.h>
+#include <linux/gfp.h>
 
 #include <mach/irqs.h>
 #include <mach/map.h>
diff --git a/arch/arm/plat-s3c/dev-hsmmc.c b/arch/arm/plat-samsung/dev-hsmmc.c
index 4c05b39810e..4c05b39810e 100644
--- a/arch/arm/plat-s3c/dev-hsmmc.c
+++ b/arch/arm/plat-samsung/dev-hsmmc.c
diff --git a/arch/arm/plat-s3c/dev-hsmmc1.c b/arch/arm/plat-samsung/dev-hsmmc1.c
index e49bc4cd0ee..e49bc4cd0ee 100644
--- a/arch/arm/plat-s3c/dev-hsmmc1.c
+++ b/arch/arm/plat-samsung/dev-hsmmc1.c
diff --git a/arch/arm/plat-s3c/dev-hsmmc2.c b/arch/arm/plat-samsung/dev-hsmmc2.c
index 824580bc0e0..824580bc0e0 100644
--- a/arch/arm/plat-s3c/dev-hsmmc2.c
+++ b/arch/arm/plat-samsung/dev-hsmmc2.c
diff --git a/arch/arm/plat-s3c/dev-i2c0.c b/arch/arm/plat-samsung/dev-i2c0.c
index 4c761529b94..3a601c16f03 100644
--- a/arch/arm/plat-s3c/dev-i2c0.c
+++ b/arch/arm/plat-samsung/dev-i2c0.c
@@ -11,6 +11,7 @@
  * published by the Free Software Foundation.
 */
 
+#include <linux/gfp.h>
 #include <linux/kernel.h>
 #include <linux/string.h>
 #include <linux/platform_device.h>
diff --git a/arch/arm/plat-s3c/dev-i2c1.c b/arch/arm/plat-samsung/dev-i2c1.c
index d44f7911050..858ee2a0414 100644
--- a/arch/arm/plat-s3c/dev-i2c1.c
+++ b/arch/arm/plat-samsung/dev-i2c1.c
@@ -11,6 +11,7 @@
  * published by the Free Software Foundation.
 */
 
+#include <linux/gfp.h>
 #include <linux/kernel.h>
 #include <linux/string.h>
 #include <linux/platform_device.h>
diff --git a/arch/arm/plat-s3c/dev-nand.c b/arch/arm/plat-samsung/dev-nand.c
index a52fb6cf618..3a7b8891ba4 100644
--- a/arch/arm/plat-s3c/dev-nand.c
+++ b/arch/arm/plat-samsung/dev-nand.c
@@ -6,6 +6,7 @@
  * published by the Free Software Foundation.
 */
 
+#include <linux/gfp.h>
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 
diff --git a/arch/arm/plat-samsung/dev-uart.c b/arch/arm/plat-samsung/dev-uart.c
new file mode 100644
index 00000000000..3776cd95245
--- /dev/null
+++ b/arch/arm/plat-samsung/dev-uart.c
@@ -0,0 +1,44 @@
+/* linux/arch/arm/plat-samsung/dev-uart.c
+ *      originally from arch/arm/plat-s3c24xx/devs.c
+ *x
+ * Copyright (c) 2004 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Base S3C24XX platform device definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+*/
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+
+/* uart devices */
+
+static struct platform_device s3c24xx_uart_device0 = {
+        .id             = 0,
+};
+
+static struct platform_device s3c24xx_uart_device1 = {
+        .id             = 1,
+};
+
+static struct platform_device s3c24xx_uart_device2 = {
+        .id             = 2,
+};
+
+static struct platform_device s3c24xx_uart_device3 = {
+        .id             = 3,
+};
+
+struct platform_device *s3c24xx_uart_src[4] = {
+        &s3c24xx_uart_device0,
+        &s3c24xx_uart_device1,
+        &s3c24xx_uart_device2,
+        &s3c24xx_uart_device3,
+};
+
+struct platform_device *s3c24xx_uart_devs[4] = {
+};
diff --git a/arch/arm/plat-s3c/dev-usb-hsotg.c b/arch/arm/plat-samsung/dev-usb-hsotg.c
index e2f604b51c8..33a844ab691 100644
--- a/arch/arm/plat-s3c/dev-usb-hsotg.c
+++ b/arch/arm/plat-samsung/dev-usb-hsotg.c
@@ -14,6 +14,7 @@
 #include <linux/kernel.h>
 #include <linux/string.h>
 #include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
 
 #include <mach/irqs.h>
 #include <mach/map.h>
@@ -33,9 +34,15 @@ static struct resource s3c_usb_hsotg_resources[] = {
         },
 };
 
+static u64 s3c_hsotg_dmamask = DMA_BIT_MASK(32);
+
 struct platform_device s3c_device_usb_hsotg = {
         .name           = "s3c-hsotg",
         .id             = -1,
         .num_resources  = ARRAY_SIZE(s3c_usb_hsotg_resources),
         .resource       = s3c_usb_hsotg_resources,
+        .dev            = {
+                .dma_mask               = &s3c_hsotg_dmamask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
 };
diff --git a/arch/arm/plat-s3c/dev-usb.c b/arch/arm/plat-samsung/dev-usb.c
index 2ee85abed6d..0e0a3bf5c98 100644
--- a/arch/arm/plat-s3c/dev-usb.c
+++ b/arch/arm/plat-samsung/dev-usb.c
@@ -11,6 +11,7 @@
  * published by the Free Software Foundation.
 */
 
+#include <linux/gfp.h>
 #include <linux/kernel.h>
 #include <linux/string.h>
 #include <linux/platform_device.h>
@@ -19,7 +20,7 @@
 #include <mach/map.h>
 
 #include <plat/devs.h>
-
+#include <plat/usb-control.h>
 
 static struct resource s3c_usb_resource[] = {
         [0] = {
@@ -36,7 +37,7 @@ static struct resource s3c_usb_resource[] = {
 
 static u64 s3c_device_usb_dmamask = 0xffffffffUL;
 
-struct platform_device s3c_device_usb = {
+struct platform_device s3c_device_ohci = {
         .name             = "s3c2410-ohci",
         .id               = -1,
         .num_resources    = ARRAY_SIZE(s3c_usb_resource),
@@ -47,4 +48,23 @@ struct platform_device s3c_device_usb = {
         }
 };
 
-EXPORT_SYMBOL(s3c_device_usb);
+EXPORT_SYMBOL(s3c_device_ohci);
+
+/**
+ * s3c_ohci_set_platdata - initialise OHCI device platform data
+ * @info: The platform data.
+ *
+ * This call copies the @info passed in and sets the device .platform_data
+ * field to that copy. The @info is copied so that the original can be marked
+ * __initdata.
+ */
+void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
+{
+        struct s3c2410_hcd_info *npd;
+
+        npd = kmemdup(info, sizeof(struct s3c2410_hcd_info), GFP_KERNEL);
+        if (!npd)
+                printk(KERN_ERR "%s: no memory for platform data\n", __func__);
+
+        s3c_device_ohci.dev.platform_data = npd;
+}
diff --git a/arch/arm/plat-s3c/dma.c b/arch/arm/plat-samsung/dma.c
index a995850cd9d..cb459dd9545 100644
--- a/arch/arm/plat-s3c/dma.c
+++ b/arch/arm/plat-samsung/dma.c
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c/dma.c
+/* linux/arch/arm/plat-samsung/dma.c
  *
  * Copyright (c) 2003-2009 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
@@ -20,8 +20,6 @@ struct s3c2410_dma_buf;
 #include <mach/dma.h>
 #include <mach/irqs.h>
 
-#include <plat/dma-plat.h>
-
 /* dma channel state information */
 struct s3c2410_dma_chan s3c2410_chans[S3C_DMA_CHANNELS];
 struct s3c2410_dma_chan *s3c_dma_chan_map[DMACH_MAX];
diff --git a/arch/arm/plat-s3c/gpio-config.c b/arch/arm/plat-samsung/gpio-config.c
index 456969b6fa0..44a84e89654 100644
--- a/arch/arm/plat-s3c/gpio-config.c
+++ b/arch/arm/plat-samsung/gpio-config.c
@@ -17,7 +17,7 @@
 #include <linux/gpio.h>
 #include <linux/io.h>
 
-#include <mach/gpio-core.h>
+#include <plat/gpio-core.h>
 #include <plat/gpio-cfg.h>
 #include <plat/gpio-cfg-helpers.h>
 
diff --git a/arch/arm/plat-s3c/gpio.c b/arch/arm/plat-samsung/gpio.c
index 5ff24e0f9f8..28d2ab8a08d 100644
--- a/arch/arm/plat-s3c/gpio.c
+++ b/arch/arm/plat-samsung/gpio.c
@@ -16,7 +16,7 @@
 #include <linux/io.h>
 #include <linux/gpio.h>
 
-#include <mach/gpio-core.h>
+#include <plat/gpio-core.h>
 
 #ifdef CONFIG_S3C_GPIO_TRACK
 struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
diff --git a/arch/arm/plat-samsung/gpiolib.c b/arch/arm/plat-samsung/gpiolib.c
new file mode 100644
index 00000000000..8a8ba8bc1d9
--- /dev/null
+++ b/arch/arm/plat-samsung/gpiolib.c
@@ -0,0 +1,199 @@
+/* arch/arm/plat-samsung/gpiolib.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * SAMSUNG - GPIOlib support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <mach/gpio.h>
+#include <plat/gpio-core.h>
+#include <plat/gpio-cfg.h>
+#include <plat/gpio-cfg-helpers.h>
+
+#ifndef DEBUG_GPIO
+#define gpio_dbg(x...) do { } while (0)
+#else
+#define gpio_dbg(x...) printk(KERN_DEBUG x)
+#endif
+
+/* The samsung_gpiolib_4bit routines are to control the gpio banks where
+ * the gpio configuration register (GPxCON) has 4 bits per GPIO, as the
+ * following example:
+ *
+ * base + 0x00: Control register, 4 bits per gpio
+ *              gpio n: 4 bits starting at (4*n)
+ *              0000 = input, 0001 = output, others mean special-function
+ * base + 0x04: Data register, 1 bit per gpio
+ *              bit n: data bit n
+ *
+ * Note, since the data register is one bit per gpio and is at base + 0x4
+ * we can use s3c_gpiolib_get and s3c_gpiolib_set to change the state of
+ * the output.
+*/
+
+static int samsung_gpiolib_4bit_input(struct gpio_chip *chip,
+                                      unsigned int offset)
+{
+        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
+        void __iomem *base = ourchip->base;
+        unsigned long con;
+
+        con = __raw_readl(base + GPIOCON_OFF);
+        con &= ~(0xf << con_4bit_shift(offset));
+        __raw_writel(con, base + GPIOCON_OFF);
+
+        gpio_dbg("%s: %p: CON now %08lx\n", __func__, base, con);
+
+        return 0;
+}
+
+static int samsung_gpiolib_4bit_output(struct gpio_chip *chip,
+                                       unsigned int offset, int value)
+{
+        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
+        void __iomem *base = ourchip->base;
+        unsigned long con;
+        unsigned long dat;
+
+        con = __raw_readl(base + GPIOCON_OFF);
+        con &= ~(0xf << con_4bit_shift(offset));
+        con |= 0x1 << con_4bit_shift(offset);
+
+        dat = __raw_readl(base + GPIODAT_OFF);
+
+        if (value)
+                dat |= 1 << offset;
+        else
+                dat &= ~(1 << offset);
+
+        __raw_writel(dat, base + GPIODAT_OFF);
+        __raw_writel(con, base + GPIOCON_OFF);
+        __raw_writel(dat, base + GPIODAT_OFF);
+
+        gpio_dbg("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat);
+
+        return 0;
+}
+
+/* The next set of routines are for the case where the GPIO configuration
+ * registers are 4 bits per GPIO but there is more than one register (the
+ * bank has more than 8 GPIOs.
+ *
+ * This case is the similar to the 4 bit case, but the registers are as
+ * follows:
+ *
+ * base + 0x00: Control register, 4 bits per gpio (lower 8 GPIOs)
+ *              gpio n: 4 bits starting at (4*n)
+ *              0000 = input, 0001 = output, others mean special-function
+ * base + 0x04: Control register, 4 bits per gpio (up to 8 additions GPIOs)
+ *              gpio n: 4 bits starting at (4*n)
+ *              0000 = input, 0001 = output, others mean special-function
+ * base + 0x08: Data register, 1 bit per gpio
+ *              bit n: data bit n
+ *
+ * To allow us to use the s3c_gpiolib_get and s3c_gpiolib_set routines we
+ * store the 'base + 0x4' address so that these routines see the data
+ * register at ourchip->base + 0x04.
+ */
+
+static int samsung_gpiolib_4bit2_input(struct gpio_chip *chip,
+                                       unsigned int offset)
+{
+        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
+        void __iomem *base = ourchip->base;
+        void __iomem *regcon = base;
+        unsigned long con;
+
+        if (offset > 7)
+                offset -= 8;
+        else
+                regcon -= 4;
+
+        con = __raw_readl(regcon);
+        con &= ~(0xf << con_4bit_shift(offset));
+        __raw_writel(con, regcon);
+
+        gpio_dbg("%s: %p: CON %08lx\n", __func__, base, con);
+
+        return 0;
+}
+
+static int samsung_gpiolib_4bit2_output(struct gpio_chip *chip,
+                                        unsigned int offset, int value)
+{
+        struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
+        void __iomem *base = ourchip->base;
+        void __iomem *regcon = base;
+        unsigned long con;
+        unsigned long dat;
+        unsigned con_offset = offset;
+
+        if (con_offset > 7)
+                con_offset -= 8;
+        else
+                regcon -= 4;
+
+        con = __raw_readl(regcon);
+        con &= ~(0xf << con_4bit_shift(con_offset));
+        con |= 0x1 << con_4bit_shift(con_offset);
+
+        dat = __raw_readl(base + GPIODAT_OFF);
+
+        if (value)
+                dat |= 1 << offset;
+        else
+                dat &= ~(1 << offset);
+
+        __raw_writel(dat, base + GPIODAT_OFF);
+        __raw_writel(con, regcon);
+        __raw_writel(dat, base + GPIODAT_OFF);
+
+        gpio_dbg("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat);
+
+        return 0;
+}
+
+void __init samsung_gpiolib_add_4bit(struct s3c_gpio_chip *chip)
+{
+        chip->chip.direction_input = samsung_gpiolib_4bit_input;
+        chip->chip.direction_output = samsung_gpiolib_4bit_output;
+        chip->pm = __gpio_pm(&s3c_gpio_pm_4bit);
+}
+
+void __init samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip)
+{
+        chip->chip.direction_input = samsung_gpiolib_4bit2_input;
+        chip->chip.direction_output = samsung_gpiolib_4bit2_output;
+        chip->pm = __gpio_pm(&s3c_gpio_pm_4bit);
+}
+
+void __init samsung_gpiolib_add_4bit_chips(struct s3c_gpio_chip *chip,
+                                           int nr_chips)
+{
+        for (; nr_chips > 0; nr_chips--, chip++) {
+                samsung_gpiolib_add_4bit(chip);
+                s3c_gpiolib_add(chip);
+        }
+}
+
+void __init samsung_gpiolib_add_4bit2_chips(struct s3c_gpio_chip *chip,
+                                            int nr_chips)
+{
+        for (; nr_chips > 0; nr_chips--, chip++) {
+                samsung_gpiolib_add_4bit2(chip);
+                s3c_gpiolib_add(chip);
+        }
+}
diff --git a/arch/arm/plat-s3c/include/plat/adc.h b/arch/arm/plat-samsung/include/plat/adc.h
index 5f3b1cd53b9..e8382c7be10 100644
--- a/arch/arm/plat-s3c/include/plat/adc.h
+++ b/arch/arm/plat-samsung/include/plat/adc.h
@@ -1,10 +1,10 @@
-/* arch/arm/plat-s3c/include/plat/adc.h
+/* arch/arm/plat-samsung/include/plat/adc.h
  *
  * Copyright (c) 2008 Simtec Electronics
  *      http://armlinux.simnte.co.uk/
  *      Ben Dooks <ben@simtec.co.uk>
  *
- * S3C24XX ADC driver information
+ * S3C ADC driver information
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/plat-s3c/include/plat/audio.h b/arch/arm/plat-samsung/include/plat/audio.h
index f22d23bb627..e32f9edfd4b 100644
--- a/arch/arm/plat-s3c/include/plat/audio.h
+++ b/arch/arm/plat-samsung/include/plat/audio.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c/include/plat/audio.h
+/* arch/arm/plat-samsung/include/plat/audio.h
  *
  * Copyright (c) 2009 Samsung Electronics Co. Ltd
  * Author: Jaswinder Singh <jassi.brar@samsung.com>
@@ -8,6 +8,14 @@
  * published by the Free Software Foundation.
  */
 
+/* The machine init code calls s3c*_ac97_setup_gpio with
+ * one of these defines in order to select appropriate bank
+ * of GPIO for AC97 pins
+ */
+#define S3C64XX_AC97_GPD  0
+#define S3C64XX_AC97_GPE  1
+extern void s3c64xx_ac97_setup_gpio(int);
+
 /**
  * struct s3c_audio_pdata - common platform data for audio device drivers
  * @cfg_gpio: Callback function to setup mux'ed pins in I2S/PCM/AC97 mode
diff --git a/arch/arm/plat-samsung/include/plat/clock-clksrc.h b/arch/arm/plat-samsung/include/plat/clock-clksrc.h
new file mode 100644
index 00000000000..50a8ca7c376
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/clock-clksrc.h
@@ -0,0 +1,83 @@
+/* linux/arch/arm/plat-samsung/include/plat/clock-clksrc.h
+ *
+ * Parts taken from arch/arm/plat-s3c64xx/clock.c
+ *      Copyright 2008 Openmoko, Inc.
+ *      Copyright 2008 Simtec Electronics
+ *              Ben Dooks <ben@simtec.co.uk>
+ *              http://armlinux.simtec.co.uk/
+ *
+ * Copyright 2009 Ben Dooks <ben-linux@fluff.org>
+ * Copyright 2009 Harald Welte
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/**
+ * struct clksrc_sources - list of sources for a given clock
+ * @sources: array of pointers to clocks
+ * @nr_sources: The size of @sources
+ */
+struct clksrc_sources {
+        unsigned int    nr_sources;
+        struct clk      **sources;
+};
+
+/**
+ * struct clksrc_reg - register definition for clock control bits
+ * @reg: pointer to the register in virtual memory.
+ * @shift: the shift in bits to where the bitfield is.
+ * @size: the size in bits of the bitfield.
+ *
+ * This specifies the size and position of the bits we are interested
+ * in within the register specified by @reg.
+ */
+struct clksrc_reg {
+        void __iomem            *reg;
+        unsigned short          shift;
+        unsigned short          size;
+};
+
+/**
+ * struct clksrc_clk - class of clock for newer style samsung devices.
+ * @clk: the standard clock representation
+ * @sources: the sources for this clock
+ * @reg_src: the register definition for selecting the clock's source
+ * @reg_div: the register definition for the clock's output divisor
+ *
+ * This clock implements the features required by the newer SoCs where
+ * the standard clock block provides an input mux and a post-mux divisor
+ * to provide the periperhal's clock.
+ *
+ * The array of @sources provides the mapping of mux position to the
+ * clock, and @reg_src shows the code where to modify to change the mux
+ * position. The @reg_div defines how to change the divider settings on
+ * the output.
+ */
+struct clksrc_clk {
+        struct clk              clk;
+        struct clksrc_sources   *sources;
+
+        struct clksrc_reg       reg_src;
+        struct clksrc_reg       reg_div;
+};
+
+/**
+ * s3c_set_clksrc() - setup the clock from the register settings
+ * @clk: The clock to setup.
+ * @announce: true to announce the setting to printk().
+ *
+ * Setup the clock from the current register settings, for when the
+ * kernel boots or if it is resuming from a possibly unknown state.
+ */
+extern void s3c_set_clksrc(struct clksrc_clk *clk, bool announce);
+
+/**
+ * s3c_register_clksrc() register clocks from an array of clksrc clocks
+ * @srcs: The array of clocks to register
+ * @size: The size of the @srcs array.
+ *
+ * Initialise and register the array of clocks described by @srcs.
+ */
+extern void s3c_register_clksrc(struct clksrc_clk *srcs, int size);
diff --git a/arch/arm/plat-s3c/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
index d86af84b5b8..60b62692ac7 100644
--- a/arch/arm/plat-s3c/include/plat/clock.h
+++ b/arch/arm/plat-samsung/include/plat/clock.h
@@ -11,6 +11,30 @@
 
 #include <linux/spinlock.h>
 
+struct clk;
+
+/**
+ * struct clk_ops - standard clock operations
+ * @set_rate: set the clock rate, see clk_set_rate().
+ * @get_rate: get the clock rate, see clk_get_rate().
+ * @round_rate: round a given clock rate, see clk_round_rate().
+ * @set_parent: set the clock's parent, see clk_set_parent().
+ *
+ * Group the common clock implementations together so that we
+ * don't have to keep setting the same fiels again. We leave
+ * enable in struct clk.
+ *
+ * Adding an extra layer of indirection into the process should
+ * not be a problem as it is unlikely these operations are going
+ * to need to be called quickly.
+ */
+struct clk_ops {
+        int                 (*set_rate)(struct clk *c, unsigned long rate);
+        unsigned long       (*get_rate)(struct clk *c);
+        unsigned long       (*round_rate)(struct clk *c, unsigned long rate);
+        int                 (*set_parent)(struct clk *c, struct clk *parent);
+};
+
 struct clk {
         struct list_head      list;
         struct module        *owner;
@@ -21,11 +45,8 @@ struct clk {
         unsigned long         rate;
         unsigned long         ctrlbit;
 
+        struct clk_ops          *ops;
         int                 (*enable)(struct clk *, int enable);
-        int                 (*set_rate)(struct clk *c, unsigned long rate);
-        unsigned long       (*get_rate)(struct clk *c);
-        unsigned long       (*round_rate)(struct clk *c, unsigned long rate);
-        int                 (*set_parent)(struct clk *c, struct clk *parent);
 };
 
 /* other clocks which may be registered by board support */
@@ -54,6 +75,9 @@ extern struct clk clk_h2;
 extern struct clk clk_27m;
 extern struct clk clk_48m;
 
+extern int clk_default_setrate(struct clk *clk, unsigned long rate);
+extern struct clk_ops clk_ops_def_setrate;
+
 /* exports for arch/arm/mach-s3c2410
  *
  * Please DO NOT use these outside of arch/arm/mach-s3c2410
@@ -66,9 +90,11 @@ extern int s3c2410_clkcon_enable(struct clk *clk, int enable);
 extern int s3c24xx_register_clock(struct clk *clk);
 extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks);
 
+extern void s3c_register_clocks(struct clk *clk, int nr_clks);
+
 extern int s3c24xx_register_baseclocks(unsigned long xtal);
 
-extern void s3c64xx_register_clocks(void);
+extern void s5p_register_clocks(unsigned long xtal_freq);
 
 extern void s3c24xx_setup_clocks(unsigned long fclk,
                                  unsigned long hclk,
diff --git a/arch/arm/plat-s3c/include/plat/cpu-freq.h b/arch/arm/plat-samsung/include/plat/cpu-freq.h
index 94eb06a2ea5..80c4a809c72 100644
--- a/arch/arm/plat-s3c/include/plat/cpu-freq.h
+++ b/arch/arm/plat-samsung/include/plat/cpu-freq.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c/include/plat/cpu-freq.h
+/* arch/arm/plat-samsung/include/plat/cpu-freq.h
  *
  * Copyright (c) 2006-2007 Simtec Electronics
  *      http://armlinux.simtec.co.uk/
diff --git a/arch/arm/plat-s3c/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index d1131ca11e9..d316b4a579f 100644
--- a/arch/arm/plat-s3c/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c/include/plat/cpu.h
+/* linux/arch/arm/plat-samsung/include/plat/cpu.h
  *
  * Copyright (c) 2004-2005 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
@@ -48,9 +48,12 @@ extern void s3c_init_cpu(unsigned long idcode,
 
 extern void s3c24xx_init_irq(void);
 extern void s3c64xx_init_irq(u32 vic0, u32 vic1);
+extern void s5p_init_irq(u32 *vic, u32 num_vic);
 
 extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);
 extern void s3c64xx_init_io(struct map_desc *mach_desc, int size);
+extern void s5p_init_io(struct map_desc *mach_desc,
+                        int size, void __iomem *cpuid_addr);
 
 extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 
diff --git a/arch/arm/plat-s3c/include/plat/debug-macro.S b/arch/arm/plat-samsung/include/plat/debug-macro.S
index 3634d4e3708..dc6efd90e8f 100644
--- a/arch/arm/plat-s3c/include/plat/debug-macro.S
+++ b/arch/arm/plat-samsung/include/plat/debug-macro.S
@@ -1,4 +1,4 @@
-/* linux/include/asm-arm/plat-s3c/debug-macro.S
+/* arch/arm/plat-samsung/include/plat/debug-macro.S
  *
  * Copyright 2005, 2007 Simtec Electronics
  *      http://armlinux.simtec.co.uk/
@@ -11,6 +11,18 @@
 
 #include <plat/regs-serial.h>
 
+/* The S5PV210/S5PC110 and S5P6442 implementations are as belows. */
+
+        .macro fifo_level_s5pv210 rd, rx
+                ldr     \rd, [ \rx, # S3C2410_UFSTAT ]
+                and     \rd, \rd, #S5PV210_UFSTAT_TXMASK
+        .endm
+
+        .macro  fifo_full_s5pv210 rd, rx
+                ldr     \rd, [ \rx, # S3C2410_UFSTAT ]
+                tst     \rd, #S5PV210_UFSTAT_TXFULL
+        .endm
+
 /* The S3C2440 implementations are used by default as they are the
  * most widely re-used */
 
diff --git a/arch/arm/plat-s3c/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index c1c20b02391..796d2425831 100644
--- a/arch/arm/plat-s3c/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -1,4 +1,4 @@
-/* linux/include/asm-arm/plat-s3c24xx/devs.h
+/* arch/arm/plat-samsung/include/plat/devs.h
  *
  * Copyright (c) 2004 Simtec Electronics
  * Ben Dooks <ben@simtec.co.uk>
@@ -18,6 +18,7 @@ struct s3c24xx_uart_resources {
 
 extern struct s3c24xx_uart_resources s3c2410_uart_resources[];
 extern struct s3c24xx_uart_resources s3c64xx_uart_resources[];
+extern struct s3c24xx_uart_resources s5p_uart_resources[];
 
 extern struct platform_device *s3c24xx_uart_devs[];
 extern struct platform_device *s3c24xx_uart_src[];
@@ -28,12 +29,18 @@ extern struct platform_device s3c64xx_device_iis0;
 extern struct platform_device s3c64xx_device_iis1;
 extern struct platform_device s3c64xx_device_iisv4;
 
+extern struct platform_device s3c64xx_device_spi0;
+extern struct platform_device s3c64xx_device_spi1;
+
 extern struct platform_device s3c64xx_device_pcm0;
 extern struct platform_device s3c64xx_device_pcm1;
 
+extern struct platform_device s3c64xx_device_ac97;
+
 extern struct platform_device s3c_device_ts;
+
 extern struct platform_device s3c_device_fb;
-extern struct platform_device s3c_device_usb;
+extern struct platform_device s3c_device_ohci;
 extern struct platform_device s3c_device_lcd;
 extern struct platform_device s3c_device_wdt;
 extern struct platform_device s3c_device_i2c0;
diff --git a/arch/arm/plat-s3c/include/plat/dma-core.h b/arch/arm/plat-samsung/include/plat/dma-core.h
index 32ff2a92cb3..32ff2a92cb3 100644
--- a/arch/arm/plat-s3c/include/plat/dma-core.h
+++ b/arch/arm/plat-samsung/include/plat/dma-core.h
diff --git a/arch/arm/plat-s3c24xx/include/plat/dma-plat.h b/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
index 9565ead1bc9..336d5ac0203 100644
--- a/arch/arm/plat-s3c24xx/include/plat/dma-plat.h
+++ b/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
@@ -1,9 +1,9 @@
-/* linux/arch/arm/plat-s3c24xx/include/plat/dma-plat.h
+/* linux/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
  *
  * Copyright (C) 2006 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
  *
- * Samsung S3C24XX DMA support
+ * Samsung S3C24XX DMA support - per SoC functions
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/plat-s3c/include/plat/dma.h b/arch/arm/plat-samsung/include/plat/dma.h
index e429d10be3a..7584d751ed5 100644
--- a/arch/arm/plat-s3c/include/plat/dma.h
+++ b/arch/arm/plat-samsung/include/plat/dma.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c/include/plat/dma.h
+/* arch/arm/plat-samsung/include/plat/dma.h
  *
  * Copyright (C) 2003-2006 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/plat-s3c/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h
index f8db87930f8..ffc01a76b7c 100644
--- a/arch/arm/plat-s3c/include/plat/fb.h
+++ b/arch/arm/plat-samsung/include/plat/fb.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c/include/plat/fb.h
+/* arch/arm/plat-samsung/include/plat/fb.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
index 652e2bbdaa2..dda19da037a 100644
--- a/arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
@@ -78,7 +78,7 @@ extern int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
  *      others = Special functions (dependant on bank)
  *
  * Note, since the code to deal with the case where there are two control
- * registers instead of one, we do not have a seperate set of functions for
+ * registers instead of one, we do not have a separate set of functions for
  * each case.
 */
 extern int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
diff --git a/arch/arm/plat-s3c/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index 29cd6a86cad..29cd6a86cad 100644
--- a/arch/arm/plat-s3c/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
diff --git a/arch/arm/plat-s3c/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h
index 32af612767a..49ff406a706 100644
--- a/arch/arm/plat-s3c/include/plat/gpio-core.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-core.h
@@ -11,6 +11,11 @@
  * published by the Free Software Foundation.
 */
 
+#define GPIOCON_OFF     (0x00)
+#define GPIODAT_OFF     (0x04)
+
+#define con_4bit_shift(__off) ((__off) * 4)
+
 /* Define the core gpiolib support functions that the s3c platforms may
  * need to extend or change depending on the hardware and the s3c chip
  * selected at build or found at run time.
@@ -80,6 +85,29 @@ extern void s3c_gpiolib_add(struct s3c_gpio_chip *chip);
  * and any other necessary functions.
  */
 
+/**
+ * samsung_gpiolib_add_4bit_chips - 4bit single register GPIO config.
+ * @chip: The gpio chip that is being configured.
+ * @nr_chips: The no of chips (gpio ports) for the GPIO being configured.
+ *
+ * This helper deal with the GPIO cases where the control register has 4 bits
+ * of control per GPIO, generally in the form of:
+ * 0000 = Input
+ * 0001 = Output
+ * others = Special functions (dependant on bank)
+ *
+ * Note, since the code to deal with the case where there are two control
+ * registers instead of one, we do not have a seperate set of function
+ * (samsung_gpiolib_add_4bit2_chips)for each case.
+ */
+extern void samsung_gpiolib_add_4bit_chips(struct s3c_gpio_chip *chip,
+                                           int nr_chips);
+extern void samsung_gpiolib_add_4bit2_chips(struct s3c_gpio_chip *chip,
+                                            int nr_chips);
+
+extern void samsung_gpiolib_add_4bit(struct s3c_gpio_chip *chip);
+extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip);
+
 #ifdef CONFIG_S3C_GPIO_TRACK
 extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
 
@@ -90,6 +118,8 @@ static inline struct s3c_gpio_chip *s3c_gpiolib_getchip(unsigned int chip)
 #else
 /* machine specific code should provide s3c_gpiolib_getchip */
 
+#include <mach/gpio-track.h>
+
 static inline void s3c_gpiolib_track(struct s3c_gpio_chip *chip) { }
 #endif
 
diff --git a/arch/arm/plat-s3c/include/plat/hwmon.h b/arch/arm/plat-samsung/include/plat/hwmon.h
index 1ba88ea0aa3..1ba88ea0aa3 100644
--- a/arch/arm/plat-s3c/include/plat/hwmon.h
+++ b/arch/arm/plat-samsung/include/plat/hwmon.h
diff --git a/arch/arm/plat-s3c/include/plat/iic-core.h b/arch/arm/plat-samsung/include/plat/iic-core.h
index 36397ca2096..36397ca2096 100644
--- a/arch/arm/plat-s3c/include/plat/iic-core.h
+++ b/arch/arm/plat-samsung/include/plat/iic-core.h
diff --git a/arch/arm/plat-s3c/include/plat/iic.h b/arch/arm/plat-samsung/include/plat/iic.h
index 3083df00dee..3083df00dee 100644
--- a/arch/arm/plat-s3c/include/plat/iic.h
+++ b/arch/arm/plat-samsung/include/plat/iic.h
diff --git a/arch/arm/plat-samsung/include/plat/irq-uart.h b/arch/arm/plat-samsung/include/plat/irq-uart.h
new file mode 100644
index 00000000000..a9331e49bea
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/irq-uart.h
@@ -0,0 +1,20 @@
+/* arch/arm/plat-samsung/include/plat/irq-uart.h
+ *
+ * Copyright (c) 2010 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Header file for Samsung SoC UART IRQ demux for S3C64XX and later
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+struct s3c_uart_irq {
+        void __iomem    *regs;
+        unsigned int     base_irq;
+        unsigned int     parent_irq;
+};
+
+extern void s3c_init_uart_irqs(struct s3c_uart_irq *irq, unsigned int nr_irqs);
+
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2442.h b/arch/arm/plat-samsung/include/plat/irq-vic-timer.h
index 451a23a2092..a90b53431b5 100644
--- a/arch/arm/plat-s3c24xx/include/plat/s3c2442.h
+++ b/arch/arm/plat-samsung/include/plat/irq-vic-timer.h
@@ -1,17 +1,13 @@
-/* linux/include/asm-arm/plat-s3c24xx/s3c2442.h
+/* arch/arm/plat-samsung/include/plat/irq-vic-timer.h
  *
- * Copyright (c) 2006 Simtec Electronics
+ * Copyright (c) 2010 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
  *
- * Header file for s3c2442 cpu support
+ * Header file for Samsung SoC IRQ VIC timer
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
 */
 
-#ifdef CONFIG_CPU_S3C2442
-extern  int s3c2442_init(void);
-#else
-#define s3c2442_init NULL
-#endif
+extern void s3c_init_vic_timer_irq(unsigned int vic, unsigned int timer);
diff --git a/arch/arm/plat-s3c/include/plat/map-base.h b/arch/arm/plat-samsung/include/plat/map-base.h
index 250be311c85..250be311c85 100644
--- a/arch/arm/plat-s3c/include/plat/map-base.h
+++ b/arch/arm/plat-samsung/include/plat/map-base.h
diff --git a/arch/arm/plat-s3c/include/plat/nand.h b/arch/arm/plat-samsung/include/plat/nand.h
index 226147b7e02..b64115fa93a 100644
--- a/arch/arm/plat-s3c/include/plat/nand.h
+++ b/arch/arm/plat-samsung/include/plat/nand.h
@@ -3,7 +3,7 @@
  * Copyright (c) 2004 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
  *
- * S3C2410 - NAND device controller platfrom_device info
+ * S3C2410 - NAND device controller platform_device info
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/plat-s3c/include/plat/pm.h b/arch/arm/plat-samsung/include/plat/pm.h
index 7a797192fcf..245836d9193 100644
--- a/arch/arm/plat-s3c/include/plat/pm.h
+++ b/arch/arm/plat-samsung/include/plat/pm.h
@@ -1,4 +1,4 @@
-/* linux/include/asm-arm/plat-s3c24xx/pm.h
+/* arch/arm/plat-samsung/include/plat/pm.h
  *
  * Copyright (c) 2004 Simtec Electronics
  *      http://armlinux.simtec.co.uk/
@@ -111,7 +111,7 @@ extern int s3c24xx_irq_resume(struct sys_device *dev);
 
 /* PM debug functions */
 
-#ifdef CONFIG_S3C2410_PM_DEBUG
+#ifdef CONFIG_SAMSUNG_PM_DEBUG
 /**
  * s3c_pm_dbg() - low level debug function for use in suspend/resume.
  * @msg: The message to print.
@@ -141,7 +141,7 @@ static inline void s3c_pm_debug_smdkled(u32 set, u32 clear) { }
 
 /* suspend memory checking */
 
-#ifdef CONFIG_S3C2410_PM_CHECK
+#ifdef CONFIG_SAMSUNG_PM_CHECK
 extern void s3c_pm_check_prepare(void);
 extern void s3c_pm_check_restore(void);
 extern void s3c_pm_check_cleanup(void);
diff --git a/arch/arm/plat-s3c/include/plat/regs-ac97.h b/arch/arm/plat-samsung/include/plat/regs-ac97.h
index c3878f7acb8..c3878f7acb8 100644
--- a/arch/arm/plat-s3c/include/plat/regs-ac97.h
+++ b/arch/arm/plat-samsung/include/plat/regs-ac97.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-adc.h b/arch/arm/plat-samsung/include/plat/regs-adc.h
index 4323cccc86c..7554c4fcddb 100644
--- a/arch/arm/plat-s3c/include/plat/regs-adc.h
+++ b/arch/arm/plat-samsung/include/plat/regs-adc.h
@@ -19,9 +19,13 @@
 #define S3C2410_ADCDLY     S3C2410_ADCREG(0x08)
 #define S3C2410_ADCDAT0    S3C2410_ADCREG(0x0C)
 #define S3C2410_ADCDAT1    S3C2410_ADCREG(0x10)
+#define S3C64XX_ADCUPDN         S3C2410_ADCREG(0x14)
+#define S3C64XX_ADCCLRINT       S3C2410_ADCREG(0x18)
+#define S3C64XX_ADCCLRINTPNDNUP S3C2410_ADCREG(0x20)
 
 
 /* ADCCON Register Bits */
+#define S3C64XX_ADCCON_RESSEL           (1<<16)
 #define S3C2410_ADCCON_ECFLG            (1<<15)
 #define S3C2410_ADCCON_PRSCEN           (1<<14)
 #define S3C2410_ADCCON_PRSCVL(x)        (((x)&0xFF)<<6)
diff --git a/arch/arm/plat-s3c/include/plat/regs-fb-v4.h b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h
index a60ed0d06c9..0f43599248a 100644
--- a/arch/arm/plat-s3c/include/plat/regs-fb-v4.h
+++ b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c/include/plat/regs-fb-v4.h
+/* arch/arm/plat-samsung/include/plat/regs-fb-v4.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c/include/plat/regs-fb.h b/arch/arm/plat-samsung/include/plat/regs-fb.h
index e9ee599d430..0ef806e5034 100644
--- a/arch/arm/plat-s3c/include/plat/regs-fb.h
+++ b/arch/arm/plat-samsung/include/plat/regs-fb.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c/include/plat/regs-fb.h
+/* arch/arm/plat-samsung/include/plat/regs-fb.h
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c/include/plat/regs-iic.h b/arch/arm/plat-samsung/include/plat/regs-iic.h
index 2f7c17de8ac..2f7c17de8ac 100644
--- a/arch/arm/plat-s3c/include/plat/regs-iic.h
+++ b/arch/arm/plat-samsung/include/plat/regs-iic.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-irqtype.h b/arch/arm/plat-samsung/include/plat/regs-irqtype.h
index c63cd3fc5ad..c63cd3fc5ad 100644
--- a/arch/arm/plat-s3c/include/plat/regs-irqtype.h
+++ b/arch/arm/plat-samsung/include/plat/regs-irqtype.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-nand.h b/arch/arm/plat-samsung/include/plat/regs-nand.h
index 238efea7b9e..238efea7b9e 100644
--- a/arch/arm/plat-s3c/include/plat/regs-nand.h
+++ b/arch/arm/plat-samsung/include/plat/regs-nand.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-rtc.h b/arch/arm/plat-samsung/include/plat/regs-rtc.h
index d5837cf8e40..d5837cf8e40 100644
--- a/arch/arm/plat-s3c/include/plat/regs-rtc.h
+++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h b/arch/arm/plat-samsung/include/plat/regs-s3c2412-iis.h
index abf2fbc2eb2..abf2fbc2eb2 100644
--- a/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h
+++ b/arch/arm/plat-samsung/include/plat/regs-s3c2412-iis.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-sdhci.h b/arch/arm/plat-samsung/include/plat/regs-sdhci.h
index e34049ad44c..e34049ad44c 100644
--- a/arch/arm/plat-s3c/include/plat/regs-sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/regs-sdhci.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h
index 85d8904e7f2..a6eba8496b2 100644
--- a/arch/arm/plat-s3c/include/plat/regs-serial.h
+++ b/arch/arm/plat-samsung/include/plat/regs-serial.h
@@ -1,4 +1,4 @@
-/* arch/arm/mach-s3c2410/include/mach/regs-serial.h
+/* arch/arm/plat-samsung/include/plat/regs-serial.h
  *
  *  From linux/include/asm-arm/hardware/serial_s3c2410.h
  *
@@ -194,6 +194,36 @@
 #define S3C64XX_UINTSP          0x34
 #define S3C64XX_UINTM           0x38
 
+/* Following are specific to S5PV210 and S5P6442 */
+#define S5PV210_UCON_CLKMASK    (1<<10)
+#define S5PV210_UCON_PCLK       (0<<10)
+#define S5PV210_UCON_UCLK       (1<<10)
+
+#define S5PV210_UFCON_TXTRIG0   (0<<8)
+#define S5PV210_UFCON_TXTRIG4   (1<<8)
+#define S5PV210_UFCON_TXTRIG8   (2<<8)
+#define S5PV210_UFCON_TXTRIG16  (3<<8)
+#define S5PV210_UFCON_TXTRIG32  (4<<8)
+#define S5PV210_UFCON_TXTRIG64  (5<<8)
+#define S5PV210_UFCON_TXTRIG128 (6<<8)
+#define S5PV210_UFCON_TXTRIG256 (7<<8)
+
+#define S5PV210_UFCON_RXTRIG1   (0<<4)
+#define S5PV210_UFCON_RXTRIG4   (1<<4)
+#define S5PV210_UFCON_RXTRIG8   (2<<4)
+#define S5PV210_UFCON_RXTRIG16  (3<<4)
+#define S5PV210_UFCON_RXTRIG32  (4<<4)
+#define S5PV210_UFCON_RXTRIG64  (5<<4)
+#define S5PV210_UFCON_RXTRIG128 (6<<4)
+#define S5PV210_UFCON_RXTRIG256 (7<<4)
+
+#define S5PV210_UFSTAT_TXFULL   (1<<24)
+#define S5PV210_UFSTAT_RXFULL   (1<<8)
+#define S5PV210_UFSTAT_TXMASK   (255<<16)
+#define S5PV210_UFSTAT_TXSHIFT  (16)
+#define S5PV210_UFSTAT_RXMASK   (255<<0)
+#define S5PV210_UFSTAT_RXSHIFT  (0)
+
 #ifndef __ASSEMBLY__
 
 /* struct s3c24xx_uart_clksrc
diff --git a/arch/arm/plat-s3c/include/plat/regs-timer.h b/arch/arm/plat-samsung/include/plat/regs-timer.h
index d097d92f8cc..d097d92f8cc 100644
--- a/arch/arm/plat-s3c/include/plat/regs-timer.h
+++ b/arch/arm/plat-samsung/include/plat/regs-timer.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-usb-hsotg-phy.h b/arch/arm/plat-samsung/include/plat/regs-usb-hsotg-phy.h
index 36a85f5000c..a111ad87183 100644
--- a/arch/arm/plat-s3c/include/plat/regs-usb-hsotg-phy.h
+++ b/arch/arm/plat-samsung/include/plat/regs-usb-hsotg-phy.h
@@ -12,7 +12,7 @@
  * published by the Free Software Foundation.
 */
 
-/* Note, this is a seperate header file as some of the clock framework
+/* Note, this is a separate header file as some of the clock framework
  * needs to touch this if the clk_48m is used as the USB OHCI or other
  * peripheral source.
 */
diff --git a/arch/arm/plat-s3c/include/plat/regs-usb-hsotg.h b/arch/arm/plat-samsung/include/plat/regs-usb-hsotg.h
index 8d18d9d4d14..8d18d9d4d14 100644
--- a/arch/arm/plat-s3c/include/plat/regs-usb-hsotg.h
+++ b/arch/arm/plat-samsung/include/plat/regs-usb-hsotg.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-watchdog.h b/arch/arm/plat-samsung/include/plat/regs-watchdog.h
index 4938492470f..4938492470f 100644
--- a/arch/arm/plat-s3c/include/plat/regs-watchdog.h
+++ b/arch/arm/plat-samsung/include/plat/regs-watchdog.h
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
new file mode 100644
index 00000000000..d1772414931
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
@@ -0,0 +1,67 @@
+/* linux/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
+ *
+ * Copyright (C) 2009 Samsung Electronics Ltd.
+ *      Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __S3C64XX_PLAT_SPI_H
+#define __S3C64XX_PLAT_SPI_H
+
+/**
+ * struct s3c64xx_spi_csinfo - ChipSelect description
+ * @fb_delay: Slave specific feedback delay.
+ *            Refer to FB_CLK_SEL register definition in SPI chapter.
+ * @line: Custom 'identity' of the CS line.
+ * @set_level: CS line control.
+ *
+ * This is per SPI-Slave Chipselect information.
+ * Allocate and initialize one in machine init code and make the
+ * spi_board_info.controller_data point to it.
+ */
+struct s3c64xx_spi_csinfo {
+        u8 fb_delay;
+        unsigned line;
+        void (*set_level)(unsigned line_id, int lvl);
+};
+
+/**
+ * struct s3c64xx_spi_info - SPI Controller defining structure
+ * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field.
+ * @src_clk_name: Platform name of the corresponding clock.
+ * @num_cs: Number of CS this controller emulates.
+ * @cfg_gpio: Configure pins for this SPI controller.
+ * @fifo_lvl_mask: All tx fifo_lvl fields start at offset-6
+ * @rx_lvl_offset: Depends on tx fifo_lvl field and bus number
+ * @high_speed: If the controller supports HIGH_SPEED_EN bit
+ */
+struct s3c64xx_spi_info {
+        int src_clk_nr;
+        char *src_clk_name;
+
+        int num_cs;
+
+        int (*cfg_gpio)(struct platform_device *pdev);
+
+        /* Following two fields are for future compatibility */
+        int fifo_lvl_mask;
+        int rx_lvl_offset;
+        int high_speed;
+};
+
+/**
+ * s3c64xx_spi_set_info - SPI Controller configure callback by the board
+ *                              initialization code.
+ * @cntrlr: SPI controller number the configuration is for.
+ * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks.
+ * @num_cs: Number of elements in the 'cs' array.
+ *
+ * Call this from machine init code for each SPI Controller that
+ * has some chips attached to it.
+ */
+extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
+
+#endif /* __S3C64XX_PLAT_SPI_H */
diff --git a/arch/arm/plat-s3c/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index 53198673b6b..7d07cd7aa4f 100644
--- a/arch/arm/plat-s3c/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -78,8 +78,8 @@ extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
 
 /* S3C6400 SDHCI setup */
 
-#ifdef CONFIG_S3C6400_SETUP_SDHCI
-extern char *s3c6400_hsmmc_clksrcs[4];
+#ifdef CONFIG_S3C64XX_SETUP_SDHCI
+extern char *s3c64xx_hsmmc_clksrcs[4];
 
 #ifdef CONFIG_S3C_DEV_HSMMC
 extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
@@ -89,7 +89,7 @@ extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
 
 static inline void s3c6400_default_sdhci0(void)
 {
-        s3c_hsmmc0_def_platdata.clocks = s3c6400_hsmmc_clksrcs;
+        s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
         s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
 }
@@ -101,7 +101,7 @@ static inline void s3c6400_default_sdhci0(void) { }
 #ifdef CONFIG_S3C_DEV_HSMMC1
 static inline void s3c6400_default_sdhci1(void)
 {
-        s3c_hsmmc1_def_platdata.clocks = s3c6400_hsmmc_clksrcs;
+        s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
         s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
 }
@@ -112,7 +112,7 @@ static inline void s3c6400_default_sdhci1(void) { }
 #ifdef CONFIG_S3C_DEV_HSMMC2
 static inline void s3c6400_default_sdhci2(void)
 {
-        s3c_hsmmc2_def_platdata.clocks = s3c6400_hsmmc_clksrcs;
+        s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
         s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
 }
@@ -120,27 +120,19 @@ static inline void s3c6400_default_sdhci2(void)
 static inline void s3c6400_default_sdhci2(void) { }
 #endif /* CONFIG_S3C_DEV_HSMMC2 */
 
-#else
-static inline void s3c6400_default_sdhci0(void) { }
-static inline void s3c6400_default_sdhci1(void) { }
-#endif /* CONFIG_S3C6400_SETUP_SDHCI */
-
 /* S3C6410 SDHCI setup */
 
-#ifdef CONFIG_S3C6410_SETUP_SDHCI
-extern char *s3c6410_hsmmc_clksrcs[4];
-
-extern void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev,
-                                           void __iomem *r,
-                                           struct mmc_ios *ios,
-                                           struct mmc_card *card);
+extern void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev,
+                                         void __iomem *r,
+                                         struct mmc_ios *ios,
+                                         struct mmc_card *card);
 
 #ifdef CONFIG_S3C_DEV_HSMMC
 static inline void s3c6410_default_sdhci0(void)
 {
-        s3c_hsmmc0_def_platdata.clocks = s3c6410_hsmmc_clksrcs;
+        s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
-        s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card;
+        s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
 }
 #else
 static inline void s3c6410_default_sdhci0(void) { }
@@ -149,9 +141,9 @@ static inline void s3c6410_default_sdhci0(void) { }
 #ifdef CONFIG_S3C_DEV_HSMMC1
 static inline void s3c6410_default_sdhci1(void)
 {
-        s3c_hsmmc1_def_platdata.clocks = s3c6410_hsmmc_clksrcs;
+        s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
-        s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card;
+        s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
 }
 #else
 static inline void s3c6410_default_sdhci1(void) { }
@@ -160,9 +152,9 @@ static inline void s3c6410_default_sdhci1(void) { }
 #ifdef CONFIG_S3C_DEV_HSMMC2
 static inline void s3c6410_default_sdhci2(void)
 {
-        s3c_hsmmc2_def_platdata.clocks = s3c6410_hsmmc_clksrcs;
+        s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
-        s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card;
+        s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
 }
 #else
 static inline void s3c6410_default_sdhci2(void) { }
@@ -171,7 +163,10 @@ static inline void s3c6410_default_sdhci2(void) { }
 #else
 static inline void s3c6410_default_sdhci0(void) { }
 static inline void s3c6410_default_sdhci1(void) { }
-#endif /* CONFIG_S3C6410_SETUP_SDHCI */
+static inline void s3c6400_default_sdhci0(void) { }
+static inline void s3c6400_default_sdhci1(void) { }
+
+#endif /* CONFIG_S3C64XX_SETUP_SDHCI */
 
 /* S5PC100 SDHCI setup */
 
diff --git a/arch/arm/plat-s3c/include/plat/udc-hs.h b/arch/arm/plat-samsung/include/plat/udc-hs.h
index dd04db04310..a22a4f2eea9 100644
--- a/arch/arm/plat-s3c/include/plat/udc-hs.h
+++ b/arch/arm/plat-samsung/include/plat/udc-hs.h
@@ -12,7 +12,7 @@
  * published by the Free Software Foundation.
 */
 
-enum s3c_hostg_dmamode {
+enum s3c_hsotg_dmamode {
         S3C_HSOTG_DMA_NONE,     /* do not use DMA at-all */
         S3C_HSOTG_DMA_ONLY,     /* always use DMA */
         S3C_HSOTG_DMA_DRV,      /* DMA is chosen by driver */
@@ -24,6 +24,6 @@ enum s3c_hostg_dmamode {
  * @is_osc: The clock source is an oscillator, not a crystal
  */
 struct s3c_hsotg_plat {
-        enum s3c_hostg_dmamode  dma;
+        enum s3c_hsotg_dmamode  dma;
         unsigned int            is_osc : 1;
 };
diff --git a/arch/arm/plat-s3c/include/plat/uncompress.h b/arch/arm/plat-samsung/include/plat/uncompress.h
index dc66a477f62..7d6ed7263d5 100644
--- a/arch/arm/plat-s3c/include/plat/uncompress.h
+++ b/arch/arm/plat-samsung/include/plat/uncompress.h
@@ -1,4 +1,4 @@
-/* linux/include/asm-arm/plat-s3c/uncompress.h
+/* arch/arm/plat-samsung/include/plat/uncompress.h
  *
  * Copyright 2003, 2007 Simtec Electronics
  *      http://armlinux.simtec.co.uk/
@@ -140,8 +140,6 @@ static void arch_decomp_error(const char *x)
 #define arch_error arch_decomp_error
 #endif
 
-static void error(char *err);
-
 #ifdef CONFIG_S3C_BOOT_UART_FORCE_FIFO
 static inline void arch_enable_uart_fifo(void)
 {
diff --git a/arch/arm/plat-s3c/include/plat/usb-control.h b/arch/arm/plat-samsung/include/plat/usb-control.h
index 822c87fe948..7fa1fbefc3f 100644
--- a/arch/arm/plat-s3c/include/plat/usb-control.h
+++ b/arch/arm/plat-samsung/include/plat/usb-control.h
@@ -1,4 +1,4 @@
-/* arch/arm/plat-s3c/include/plat/usb-control.h
+/* arch/arm/plat-samsung/include/plat/usb-control.h
  *
  * Copyright (c) 2004 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
@@ -38,4 +38,6 @@ static void inline s3c2410_usb_report_oc(struct s3c2410_hcd_info *info, int port
         }
 }
 
+extern void s3c_ohci_set_platdata(struct s3c2410_hcd_info *info);
+
 #endif /*__ASM_ARCH_USBCONTROL_H */
diff --git a/arch/arm/plat-s3c/include/plat/watchdog-reset.h b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
index 54b762acb5a..54b762acb5a 100644
--- a/arch/arm/plat-s3c/include/plat/watchdog-reset.h
+++ b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
diff --git a/arch/arm/plat-s3c/init.c b/arch/arm/plat-samsung/init.c
index 6790edfaca6..6790edfaca6 100644
--- a/arch/arm/plat-s3c/init.c
+++ b/arch/arm/plat-samsung/init.c
diff --git a/arch/arm/plat-samsung/irq-uart.c b/arch/arm/plat-samsung/irq-uart.c
new file mode 100644
index 00000000000..4f8c102674a
--- /dev/null
+++ b/arch/arm/plat-samsung/irq-uart.c
@@ -0,0 +1,143 @@
+/* arch/arm/plat-samsung/irq-uart.c
+ *      originally part of arch/arm/plat-s3c64xx/irq.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * Samsung- UART Interrupt handling
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/serial_core.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+
+#include <mach/map.h>
+#include <plat/irq-uart.h>
+#include <plat/regs-serial.h>
+#include <plat/cpu.h>
+
+/* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
+ * are consecutive when looking up the interrupt in the demux routines.
+ */
+
+static inline void __iomem *s3c_irq_uart_base(unsigned int irq)
+{
+        struct s3c_uart_irq *uirq = get_irq_chip_data(irq);
+        return uirq->regs;
+}
+
+static inline unsigned int s3c_irq_uart_bit(unsigned int irq)
+{
+        return irq & 3;
+}
+
+static void s3c_irq_uart_mask(unsigned int irq)
+{
+        void __iomem *regs = s3c_irq_uart_base(irq);
+        unsigned int bit = s3c_irq_uart_bit(irq);
+        u32 reg;
+
+        reg = __raw_readl(regs + S3C64XX_UINTM);
+        reg |= (1 << bit);
+        __raw_writel(reg, regs + S3C64XX_UINTM);
+}
+
+static void s3c_irq_uart_maskack(unsigned int irq)
+{
+        void __iomem *regs = s3c_irq_uart_base(irq);
+        unsigned int bit = s3c_irq_uart_bit(irq);
+        u32 reg;
+
+        reg = __raw_readl(regs + S3C64XX_UINTM);
+        reg |= (1 << bit);
+        __raw_writel(reg, regs + S3C64XX_UINTM);
+        __raw_writel(1 << bit, regs + S3C64XX_UINTP);
+}
+
+static void s3c_irq_uart_unmask(unsigned int irq)
+{
+        void __iomem *regs = s3c_irq_uart_base(irq);
+        unsigned int bit = s3c_irq_uart_bit(irq);
+        u32 reg;
+
+        reg = __raw_readl(regs + S3C64XX_UINTM);
+        reg &= ~(1 << bit);
+        __raw_writel(reg, regs + S3C64XX_UINTM);
+}
+
+static void s3c_irq_uart_ack(unsigned int irq)
+{
+        void __iomem *regs = s3c_irq_uart_base(irq);
+        unsigned int bit = s3c_irq_uart_bit(irq);
+
+        __raw_writel(1 << bit, regs + S3C64XX_UINTP);
+}
+
+static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc)
+{
+        struct s3c_uart_irq *uirq = desc->handler_data;
+        u32 pend = __raw_readl(uirq->regs + S3C64XX_UINTP);
+        int base = uirq->base_irq;
+
+        if (pend & (1 << 0))
+                generic_handle_irq(base);
+        if (pend & (1 << 1))
+                generic_handle_irq(base + 1);
+        if (pend & (1 << 2))
+                generic_handle_irq(base + 2);
+        if (pend & (1 << 3))
+                generic_handle_irq(base + 3);
+}
+
+static struct irq_chip s3c_irq_uart = {
+        .name           = "s3c-uart",
+        .mask           = s3c_irq_uart_mask,
+        .unmask         = s3c_irq_uart_unmask,
+        .mask_ack       = s3c_irq_uart_maskack,
+        .ack            = s3c_irq_uart_ack,
+};
+
+static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq)
+{
+        struct irq_desc *desc = irq_to_desc(uirq->parent_irq);
+        void __iomem *reg_base = uirq->regs;
+        unsigned int irq;
+        int offs;
+
+        /* mask all interrupts at the start. */
+        __raw_writel(0xf, reg_base + S3C64XX_UINTM);
+
+        for (offs = 0; offs < 3; offs++) {
+                irq = uirq->base_irq + offs;
+
+                set_irq_chip(irq, &s3c_irq_uart);
+                set_irq_chip_data(irq, uirq);
+                set_irq_handler(irq, handle_level_irq);
+                set_irq_flags(irq, IRQF_VALID);
+        }
+
+        desc->handler_data = uirq;
+        set_irq_chained_handler(uirq->parent_irq, s3c_irq_demux_uart);
+}
+
+/**
+ * s3c_init_uart_irqs() - initialise UART IRQs and the necessary demuxing
+ * @irq: The interrupt data for registering
+ * @nr_irqs: The number of interrupt descriptions in @irq.
+ *
+ * Register the UART interrupts specified by @irq including the demuxing
+ * routines. This supports the S3C6400 and newer style of devices.
+ */
+void __init s3c_init_uart_irqs(struct s3c_uart_irq *irq, unsigned int nr_irqs)
+{
+        for (; nr_irqs > 0; nr_irqs--, irq++)
+                s3c_init_uart_irq(irq);
+}
diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c
new file mode 100644
index 00000000000..0270519fcab
--- /dev/null
+++ b/arch/arm/plat-samsung/irq-vic-timer.c
@@ -0,0 +1,86 @@
+/* arch/arm/plat-samsung/irq-vic-timer.c
+ *      originally part of arch/arm/plat-s3c64xx/irq.c
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * S3C64XX - Interrupt handling
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+
+#include <mach/map.h>
+#include <plat/irq-vic-timer.h>
+#include <plat/regs-timer.h>
+
+static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc)
+{
+        generic_handle_irq((int)desc->handler_data);
+}
+
+/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
+
+static void s3c_irq_timer_mask(unsigned int irq)
+{
+        u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
+
+        reg &= 0x1f;  /* mask out pending interrupts */
+        reg &= ~(1 << (irq - IRQ_TIMER0));
+        __raw_writel(reg, S3C64XX_TINT_CSTAT);
+}
+
+static void s3c_irq_timer_unmask(unsigned int irq)
+{
+        u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
+
+        reg &= 0x1f;  /* mask out pending interrupts */
+        reg |= 1 << (irq - IRQ_TIMER0);
+        __raw_writel(reg, S3C64XX_TINT_CSTAT);
+}
+
+static void s3c_irq_timer_ack(unsigned int irq)
+{
+        u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
+
+        reg &= 0x1f;
+        reg |= (1 << 5) << (irq - IRQ_TIMER0);
+        __raw_writel(reg, S3C64XX_TINT_CSTAT);
+}
+
+static struct irq_chip s3c_irq_timer = {
+        .name           = "s3c-timer",
+        .mask           = s3c_irq_timer_mask,
+        .unmask         = s3c_irq_timer_unmask,
+        .ack            = s3c_irq_timer_ack,
+};
+
+/**
+ * s3c_init_vic_timer_irq() - initialise timer irq chanined off VIC.\
+ * @parent_irq: The parent IRQ on the VIC for the timer.
+ * @timer_irq: The IRQ to be used for the timer.
+ *
+ * Register the necessary IRQ chaining and support for the timer IRQs
+ * chained of the VIC.
+ */
+void __init s3c_init_vic_timer_irq(unsigned int parent_irq,
+                                   unsigned int timer_irq)
+{
+        struct irq_desc *desc = irq_to_desc(parent_irq);
+
+        set_irq_chained_handler(parent_irq, s3c_irq_demux_vic_timer);
+
+        set_irq_chip(timer_irq, &s3c_irq_timer);
+        set_irq_handler(timer_irq, handle_level_irq);
+        set_irq_flags(timer_irq, IRQF_VALID);
+
+        desc->handler_data = (void *)timer_irq;
+}
diff --git a/arch/arm/plat-s3c/pm-check.c b/arch/arm/plat-samsung/pm-check.c
index 8eb1f439861..e4baf76f374 100644
--- a/arch/arm/plat-s3c/pm-check.c
+++ b/arch/arm/plat-samsung/pm-check.c
@@ -17,11 +17,12 @@
 #include <linux/init.h>
 #include <linux/crc32.h>
 #include <linux/ioport.h>
+#include <linux/slab.h>
 
 #include <plat/pm.h>
 
-#if CONFIG_S3C2410_PM_CHECK_CHUNKSIZE < 1
-#error CONFIG_S3C2410_PM_CHECK_CHUNKSIZE must be a positive non-zero value
+#if CONFIG_SAMSUNG_PM_CHECK_CHUNKSIZE < 1
+#error CONFIG_SAMSUNG_PM_CHECK_CHUNKSIZE must be a positive non-zero value
 #endif
 
 /* suspend checking code...
@@ -29,12 +30,12 @@
  * this next area does a set of crc checks over all the installed
  * memory, so the system can verify if the resume was ok.
  *
- * CONFIG_S3C2410_PM_CHECK_CHUNKSIZE defines the block-size for the CRC,
+ * CONFIG_SAMSUNG_PM_CHECK_CHUNKSIZE defines the block-size for the CRC,
  * increasing it will mean that the area corrupted will be less easy to spot,
  * and reducing the size will cause the CRC save area to grow
 */
 
-#define CHECK_CHUNKSIZE (CONFIG_S3C2410_PM_CHECK_CHUNKSIZE * 1024)
+#define CHECK_CHUNKSIZE (CONFIG_SAMSUNG_PM_CHECK_CHUNKSIZE * 1024)
 
 static u32 crc_size;    /* size needed for the crc block */
 static u32 *crcs;       /* allocated over suspend/resume */
diff --git a/arch/arm/plat-s3c/pm-gpio.c b/arch/arm/plat-samsung/pm-gpio.c
index cfd326a8b69..69a4c7f02e2 100644
--- a/arch/arm/plat-s3c/pm-gpio.c
+++ b/arch/arm/plat-samsung/pm-gpio.c
@@ -19,7 +19,7 @@
 #include <linux/io.h>
 #include <linux/gpio.h>
 
-#include <mach/gpio-core.h>
+#include <plat/gpio-core.h>
 #include <plat/pm.h>
 
 /* PM GPIO helpers */
diff --git a/arch/arm/plat-s3c/pm.c b/arch/arm/plat-samsung/pm.c
index 767470601e5..27cfca59769 100644
--- a/arch/arm/plat-s3c/pm.c
+++ b/arch/arm/plat-samsung/pm.c
@@ -29,7 +29,7 @@
 #include <asm/irq.h>
 
 #include <plat/pm.h>
-#include <plat/pm-core.h>
+#include <mach/pm-core.h>
 
 /* for external use */
 
@@ -41,7 +41,7 @@ unsigned long s3c_pm_flags;
  * resume before the console layer is available.
 */
 
-#ifdef CONFIG_S3C2410_PM_DEBUG
+#ifdef CONFIG_SAMSUNG_PM_DEBUG
 extern void printascii(const char *);
 
 void s3c_pm_dbg(const char *fmt, ...)
@@ -65,13 +65,13 @@ static inline void s3c_pm_debug_init(void)
 #else
 #define s3c_pm_debug_init() do { } while(0)
 
-#endif /* CONFIG_S3C2410_PM_DEBUG */
+#endif /* CONFIG_SAMSUNG_PM_DEBUG */
 
 /* Save the UART configurations if we are configured for debug. */
 
 unsigned char pm_uart_udivslot;
 
-#ifdef CONFIG_S3C2410_PM_DEBUG
+#ifdef CONFIG_SAMSUNG_PM_DEBUG
 
 struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS];
 
diff --git a/arch/arm/plat-s3c/pwm-clock.c b/arch/arm/plat-samsung/pwm-clock.c
index a318215ab53..46c9381e083 100644
--- a/arch/arm/plat-s3c/pwm-clock.c
+++ b/arch/arm/plat-samsung/pwm-clock.c
@@ -130,20 +130,22 @@ static int clk_pwm_scaler_set_rate(struct clk *clk, unsigned long rate)
         return 0;
 }
 
+static struct clk_ops clk_pwm_scaler_ops = {
+        .get_rate       = clk_pwm_scaler_get_rate,
+        .set_rate       = clk_pwm_scaler_set_rate,
+        .round_rate     = clk_pwm_scaler_round_rate,
+};
+
 static struct clk clk_timer_scaler[] = {
         [0]     = {
                 .name           = "pwm-scaler0",
                 .id             = -1,
-                .get_rate       = clk_pwm_scaler_get_rate,
-                .set_rate       = clk_pwm_scaler_set_rate,
-                .round_rate     = clk_pwm_scaler_round_rate,
+                .ops            = &clk_pwm_scaler_ops,
         },
         [1]     = {
                 .name           = "pwm-scaler1",
                 .id             = -1,
-                .get_rate       = clk_pwm_scaler_get_rate,
-                .set_rate       = clk_pwm_scaler_set_rate,
-                .round_rate     = clk_pwm_scaler_round_rate,
+                .ops            = &clk_pwm_scaler_ops,
         },
 };
 
@@ -256,50 +258,46 @@ static int clk_pwm_tdiv_set_rate(struct clk *clk, unsigned long rate)
         return 0;
 }
 
+static struct clk_ops clk_tdiv_ops = {
+        .get_rate       = clk_pwm_tdiv_get_rate,
+        .set_rate       = clk_pwm_tdiv_set_rate,
+        .round_rate     = clk_pwm_tdiv_round_rate,
+};
+
 static struct pwm_tdiv_clk clk_timer_tdiv[] = {
         [0]     = {
                 .clk    = {
-                        .name           = "pwm-tdiv",
-                        .parent         = &clk_timer_scaler[0],
-                        .get_rate       = clk_pwm_tdiv_get_rate,
-                        .set_rate       = clk_pwm_tdiv_set_rate,
-                        .round_rate     = clk_pwm_tdiv_round_rate,
+                        .name   = "pwm-tdiv",
+                        .ops    = &clk_tdiv_ops,
+                        .parent = &clk_timer_scaler[0],
                 },
         },
         [1]     = {
                 .clk    = {
-                        .name           = "pwm-tdiv",
-                        .parent         = &clk_timer_scaler[0],
-                        .get_rate       = clk_pwm_tdiv_get_rate,
-                        .set_rate       = clk_pwm_tdiv_set_rate,
-                        .round_rate     = clk_pwm_tdiv_round_rate,
+                        .name   = "pwm-tdiv",
+                        .ops    = &clk_tdiv_ops,
+                        .parent = &clk_timer_scaler[0],
                 }
         },
         [2]     = {
                 .clk    = {
-                        .name           = "pwm-tdiv",
-                        .parent         = &clk_timer_scaler[1],
-                        .get_rate       = clk_pwm_tdiv_get_rate,
-                        .set_rate       = clk_pwm_tdiv_set_rate,
-                        .round_rate     = clk_pwm_tdiv_round_rate,
+                        .name   = "pwm-tdiv",
+                        .ops    = &clk_tdiv_ops,
+                        .parent = &clk_timer_scaler[1],
                 },
         },
         [3]     = {
                 .clk    = {
-                        .name           = "pwm-tdiv",
-                        .parent         = &clk_timer_scaler[1],
-                        .get_rate       = clk_pwm_tdiv_get_rate,
-                        .set_rate       = clk_pwm_tdiv_set_rate,
-                        .round_rate     = clk_pwm_tdiv_round_rate,
+                        .name   = "pwm-tdiv",
+                        .ops    = &clk_tdiv_ops,
+                        .parent = &clk_timer_scaler[1],
                 },
         },
         [4]     = {
                 .clk    = {
-                        .name           = "pwm-tdiv",
-                        .parent         = &clk_timer_scaler[1],
-                        .get_rate       = clk_pwm_tdiv_get_rate,
-                        .set_rate       = clk_pwm_tdiv_set_rate,
-                        .round_rate     = clk_pwm_tdiv_round_rate,
+                        .name   = "pwm-tdiv",
+                        .ops    = &clk_tdiv_ops,
+                        .parent = &clk_timer_scaler[1],
                 },
         },
 };
@@ -356,31 +354,35 @@ static int clk_pwm_tin_set_parent(struct clk *clk, struct clk *parent)
         return 0;
 }
 
+static struct clk_ops clk_tin_ops = {
+        .set_parent     = clk_pwm_tin_set_parent,
+};
+
 static struct clk clk_tin[] = {
         [0]     = {
-                .name           = "pwm-tin",
-                .id             = 0,
-                .set_parent     = clk_pwm_tin_set_parent,
+                .name   = "pwm-tin",
+                .id     = 0,
+                .ops    = &clk_tin_ops,
         },
         [1]     = {
-                .name           = "pwm-tin",
-                .id             = 1,
-                .set_parent     = clk_pwm_tin_set_parent,
+                .name   = "pwm-tin",
+                .id     = 1,
+                .ops    = &clk_tin_ops,
         },
         [2]     = {
-                .name           = "pwm-tin",
-                .id             = 2,
-                .set_parent     = clk_pwm_tin_set_parent,
+                .name   = "pwm-tin",
+                .id     = 2,
+                .ops    = &clk_tin_ops,
         },
         [3]     = {
-                .name           = "pwm-tin",
-                .id             = 3,
-                .set_parent     = clk_pwm_tin_set_parent,
+                .name   = "pwm-tin",
+                .id     = 3,
+                .ops    = &clk_tin_ops,
         },
         [4]     = {
-                .name           = "pwm-tin",
-                .id             = 4,
-                .set_parent     = clk_pwm_tin_set_parent,
+                .name   = "pwm-tin",
+                .id     = 4,
+                .ops    = &clk_tin_ops,
         },
 };
 
@@ -428,25 +430,15 @@ __init void s3c_pwmclk_init(void)
                 return;
         }
 
-        for (clk = 0; clk < ARRAY_SIZE(clk_timer_scaler); clk++) {
+        for (clk = 0; clk < ARRAY_SIZE(clk_timer_scaler); clk++)
                 clk_timer_scaler[clk].parent = clk_timers;
-                ret = s3c24xx_register_clock(&clk_timer_scaler[clk]);
-                if (ret < 0) {
-                        printk(KERN_ERR "error adding pwm scaler%d clock\n", clk);
-                        return;
-                }
-        }
 
-        for (clk = 0; clk < ARRAY_SIZE(clk_timer_tclk); clk++) {
-                ret = s3c24xx_register_clock(&clk_timer_tclk[clk]);
-                if (ret < 0) {
-                        printk(KERN_ERR "error adding pww tclk%d\n", clk);
-                        return;
-                }
-        }
+        s3c_register_clocks(clk_timer_scaler, ARRAY_SIZE(clk_timer_scaler));
+        s3c_register_clocks(clk_timer_tclk, ARRAY_SIZE(clk_timer_tclk));
 
         for (clk = 0; clk < ARRAY_SIZE(clk_timer_tdiv); clk++) {
                 ret = clk_pwm_tdiv_register(clk);
+
                 if (ret < 0) {
                         printk(KERN_ERR "error adding pwm%d tdiv clock\n", clk);
                         return;
diff --git a/arch/arm/plat-s3c/pwm.c b/arch/arm/plat-samsung/pwm.c
index ef019f27b67..2eeb49fa056 100644
--- a/arch/arm/plat-s3c/pwm.c
+++ b/arch/arm/plat-samsung/pwm.c
@@ -14,6 +14,7 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
+#include <linux/slab.h>
 #include <linux/err.h>
 #include <linux/clk.h>
 #include <linux/io.h>
@@ -379,6 +380,39 @@ static int __devexit s3c_pwm_remove(struct platform_device *pdev)
         return 0;
 }
 
+#ifdef CONFIG_PM
+static int s3c_pwm_suspend(struct platform_device *pdev, pm_message_t state)
+{
+        struct pwm_device *pwm = platform_get_drvdata(pdev);
+
+        /* No one preserve these values during suspend so reset them
+         * Otherwise driver leaves PWM unconfigured if same values
+         * passed to pwm_config
+         */
+        pwm->period_ns = 0;
+        pwm->duty_ns = 0;
+
+        return 0;
+}
+
+static int s3c_pwm_resume(struct platform_device *pdev)
+{
+        struct pwm_device *pwm = platform_get_drvdata(pdev);
+        unsigned long tcon;
+
+        /* Restore invertion */
+        tcon = __raw_readl(S3C2410_TCON);
+        tcon |= pwm_tcon_invert(pwm);
+        __raw_writel(tcon, S3C2410_TCON);
+
+        return 0;
+}
+
+#else
+#define s3c_pwm_suspend NULL
+#define s3c_pwm_resume NULL
+#endif
+
 static struct platform_driver s3c_pwm_driver = {
         .driver         = {
                 .name   = "s3c24xx-pwm",
@@ -386,6 +420,8 @@ static struct platform_driver s3c_pwm_driver = {
         },
         .probe          = s3c_pwm_probe,
         .remove         = __devexit_p(s3c_pwm_remove),
+        .suspend        = s3c_pwm_suspend,
+        .resume         = s3c_pwm_resume,
 };
 
 static int __init pwm_init(void)
diff --git a/arch/arm/plat-s3c/time.c b/arch/arm/plat-samsung/time.c
index 3b27b29da47..2231d80ad81 100644
--- a/arch/arm/plat-s3c/time.c
+++ b/arch/arm/plat-samsung/time.c
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s3c24xx/time.c
+/* linux/arch/arm/plat-samsung/time.c
  *
  * Copyright (C) 2003-2005 Simtec Electronics
  *      Ben Dooks, <ben@simtec.co.uk>
diff --git a/arch/arm/plat-stmp3xxx/dma.c b/arch/arm/plat-stmp3xxx/dma.c
index ef88f25fb87..b4dcf8c0477 100644
--- a/arch/arm/plat-stmp3xxx/dma.c
+++ b/arch/arm/plat-stmp3xxx/dma.c
@@ -15,6 +15,7 @@
  * http://www.opensource.org/licenses/gpl-license.html
  * http://www.gnu.org/copyleft/gpl.html
  */
+#include <linux/gfp.h>
 #include <linux/kernel.h>
 #include <linux/device.h>
 #include <linux/dmapool.h>
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 31c2f4c30a9..1536f1784ca 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
 #
 #   http://www.arm.linux.org.uk/developer/machines/?action=new
 #
-# Last update: Sat Feb 20 14:16:15 2010
+# Last update: Sat Mar 20 15:35:41 2010
 #
 # machine_is_xxx        CONFIG_xxxx             MACH_TYPE_xxx           number
 #
@@ -2663,7 +2663,7 @@ reb01			MACH_REB01		REB01			2675
 aquila                  MACH_AQUILA             AQUILA                  2676
 spark_sls_hw2           MACH_SPARK_SLS_HW2      SPARK_SLS_HW2           2677
 sheeva_esata            MACH_ESATA_SHEEVAPLUG   ESATA_SHEEVAPLUG        2678
-surf7x30                MACH_SURF7X30           SURF7X30                2679
+msm7x30_surf            MACH_MSM7X30_SURF       MSM7X30_SURF            2679
 micro2440               MACH_MICRO2440          MICRO2440               2680
 am2440                  MACH_AM2440             AM2440                  2681
 tq2440                  MACH_TQ2440             TQ2440                  2682
@@ -2678,3 +2678,74 @@ vc088x			MACH_VC088X		VC088X			2690
 mioa702                 MACH_MIOA702            MIOA702                 2691
 hpmin                   MACH_HPMIN              HPMIN                   2692
 ak880xak                MACH_AK880XAK           AK880XAK                2693
+arm926tomap850          MACH_ARM926TOMAP850     ARM926TOMAP850          2694
+lkevm                   MACH_LKEVM              LKEVM                   2695
+mw6410                  MACH_MW6410             MW6410                  2696
+terastation_wxl         MACH_TERASTATION_WXL    TERASTATION_WXL         2697
+cpu8000e                MACH_CPU8000E           CPU8000E                2698
+catania                 MACH_CATANIA            CATANIA                 2699
+tokyo                   MACH_TOKYO              TOKYO                   2700
+msm7201a_surf           MACH_MSM7201A_SURF      MSM7201A_SURF           2701
+msm7201a_ffa            MACH_MSM7201A_FFA       MSM7201A_FFA            2702
+msm7x25_surf            MACH_MSM7X25_SURF       MSM7X25_SURF            2703
+msm7x25_ffa             MACH_MSM7X25_FFA        MSM7X25_FFA             2704
+msm7x27_surf            MACH_MSM7X27_SURF       MSM7X27_SURF            2705
+msm7x27_ffa             MACH_MSM7X27_FFA        MSM7X27_FFA             2706
+msm7x30_ffa             MACH_MSM7X30_FFA        MSM7X30_FFA             2707
+qsd8x50_surf            MACH_QSD8X50_SURF       QSD8X50_SURF            2708
+qsd8x50_comet           MACH_QSD8X50_COMET      QSD8X50_COMET           2709
+qsd8x50_ffa             MACH_QSD8X50_FFA        QSD8X50_FFA             2710
+qsd8x50a_surf           MACH_QSD8X50A_SURF      QSD8X50A_SURF           2711
+qsd8x50a_ffa            MACH_QSD8X50A_FFA       QSD8X50A_FFA            2712
+adx_xgcp10              MACH_ADX_XGCP10         ADX_XGCP10              2713
+mcgwumts2a              MACH_MCGWUMTS2A         MCGWUMTS2A              2714
+mobikt                  MACH_MOBIKT             MOBIKT                  2715
+mx53_evk                MACH_MX53_EVK           MX53_EVK                2716
+igep0030                MACH_IGEP0030           IGEP0030                2717
+axell_h40_h50_ctrl      MACH_AXELL_H40_H50_CTRL AXELL_H40_H50_CTRL      2718
+dtcommod                MACH_DTCOMMOD           DTCOMMOD                2719
+gould                   MACH_GOULD              GOULD                   2720
+siberia                 MACH_SIBERIA            SIBERIA                 2721
+sbc3530                 MACH_SBC3530            SBC3530                 2722
+qarm                    MACH_QARM               QARM                    2723
+mips                    MACH_MIPS               MIPS                    2724
+mx27grb                 MACH_MX27GRB            MX27GRB                 2725
+sbc8100                 MACH_SBC8100            SBC8100                 2726
+saarb                   MACH_SAARB              SAARB                   2727
+omap3mini               MACH_OMAP3MINI          OMAP3MINI               2728
+cnmbook7se              MACH_CNMBOOK7SE         CNMBOOK7SE              2729
+catan                   MACH_CATAN              CATAN                   2730
+harmony                 MACH_HARMONY            HARMONY                 2731
+tonga                   MACH_TONGA              TONGA                   2732
+cybook_orizon           MACH_CYBOOK_ORIZON      CYBOOK_ORIZON           2733
+htcrhodiumcdma          MACH_HTCRHODIUMCDMA     HTCRHODIUMCDMA          2734
+epc_g45                 MACH_EPC_G45            EPC_G45                 2735
+epc_lpc3250             MACH_EPC_LPC3250        EPC_LPC3250             2736
+mxc91341evb             MACH_MXC91341EVB        MXC91341EVB             2737
+rtw1000                 MACH_RTW1000            RTW1000                 2738
+bobcat                  MACH_BOBCAT             BOBCAT                  2739
+trizeps6                MACH_TRIZEPS6           TRIZEPS6                2740
+msm7x30_fluid           MACH_MSM7X30_FLUID      MSM7X30_FLUID           2741
+nedap9263               MACH_NEDAP9263          NEDAP9263               2742
+netgear_ms2110          MACH_NETGEAR_MS2110     NETGEAR_MS2110          2743
+bmx                     MACH_BMX                BMX                     2744
+netstream               MACH_NETSTREAM          NETSTREAM               2745
+vpnext_rcu              MACH_VPNEXT_RCU         VPNEXT_RCU              2746
+vpnext_mpu              MACH_VPNEXT_MPU         VPNEXT_MPU              2747
+bcmring_tablet_v1       MACH_BCMRING_TABLET_V1  BCMRING_TABLET_V1       2748
+sgarm10                 MACH_SGARM10            SGARM10                 2749
+cm_t3517                MACH_CM_T3517           CM_T3517                2750
+omap3_cps               MACH_OMAP3_CPS          OMAP3_CPS               2751
+axar1500_receiver       MACH_AXAR1500_RECEIVER  AXAR1500_RECEIVER       2752
+wbd222                  MACH_WBD222             WBD222                  2753
+mt65xx                  MACH_MT65XX             MT65XX                  2754
+msm8x60_surf            MACH_MSM8X60_SURF       MSM8X60_SURF            2755
+msm8x60_sim             MACH_MSM8X60_SIM        MSM8X60_SIM             2756
+vmc300                  MACH_VMC300             VMC300                  2757
+tcc8000_sdk             MACH_TCC8000_SDK        TCC8000_SDK             2758
+nanos                   MACH_NANOS              NANOS                   2759
+stamp9g10               MACH_STAMP9G10          STAMP9G10               2760
+stamp9g45               MACH_STAMP9G45          STAMP9G45               2761
+h6053                   MACH_H6053              H6053                   2762
+smint01                 MACH_SMINT01            SMINT01                 2763
+prtlvt2                 MACH_PRTLVT2            PRTLVT2                 2764
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index 7f3f59fcaa2..315a540c7ce 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -428,26 +428,6 @@ static void vfp_pm_init(void)
 static inline void vfp_pm_init(void) { }
 #endif /* CONFIG_PM */
 
-/*
- * Synchronise the hardware VFP state of a thread other than current with the
- * saved one. This function is used by the ptrace mechanism.
- */
-#ifdef CONFIG_SMP
-void vfp_sync_hwstate(struct thread_info *thread)
-{
-}
-
-void vfp_flush_hwstate(struct thread_info *thread)
-{
-        /*
-         * On SMP systems, the VFP state is automatically saved at every
-         * context switch. We mark the thread VFP state as belonging to a
-         * non-existent CPU so that the saved one will be reloaded when
-         * needed.
-         */
-        thread->vfpstate.hard.cpu = NR_CPUS;
-}
-#else
 void vfp_sync_hwstate(struct thread_info *thread)
 {
         unsigned int cpu = get_cpu();
@@ -490,9 +470,18 @@ void vfp_flush_hwstate(struct thread_info *thread)
                 last_VFP_context[cpu] = NULL;
         }
 
+#ifdef CONFIG_SMP
+        /*
+         * For SMP we still have to take care of the case where the thread
+         * migrates to another CPU and then back to the original CPU on which
+         * the last VFP user is still the same thread. Mark the thread VFP
+         * state as belonging to a non-existent CPU so that the saved one will
+         * be reloaded in the above case.
+         */
+        thread->vfpstate.hard.cpu = NR_CPUS;
+#endif
         put_cpu();
 }
-#endif
 
 #include <linux/smp.h>
 
@@ -545,7 +534,7 @@ static int __init vfp_init(void)
                  */
                 elf_hwcap |= HWCAP_VFP;
 #ifdef CONFIG_VFPv3
-                if (VFP_arch >= 3) {
+                if (VFP_arch >= 2) {
                         elf_hwcap |= HWCAP_VFPv3;
 
                         /*
diff --git a/arch/avr32/include/asm/ptrace.h b/arch/avr32/include/asm/ptrace.h
index 9e2d44f4e0f..e53dd0d900f 100644
--- a/arch/avr32/include/asm/ptrace.h
+++ b/arch/avr32/include/asm/ptrace.h
@@ -124,6 +124,8 @@ struct pt_regs {
 
 #include <asm/ocd.h>
 
+#define arch_has_single_step()          (1)
+
 #define arch_ptrace_attach(child)       ocd_enable(child)
 
 #define user_mode(regs)                 (((regs)->sr & MODE_MASK) == MODE_USER)
diff --git a/arch/avr32/kernel/process.c b/arch/avr32/kernel/process.c
index 93c0342530a..2d76515745a 100644
--- a/arch/avr32/kernel/process.c
+++ b/arch/avr32/kernel/process.c
@@ -11,6 +11,7 @@
 #include <linux/fs.h>
 #include <linux/pm.h>
 #include <linux/ptrace.h>
+#include <linux/slab.h>
 #include <linux/reboot.h>
 #include <linux/tick.h>
 #include <linux/uaccess.h>
diff --git a/arch/avr32/kernel/ptrace.c b/arch/avr32/kernel/ptrace.c
index 1fed38fcf59..5e73c25f8f8 100644
--- a/arch/avr32/kernel/ptrace.c
+++ b/arch/avr32/kernel/ptrace.c
@@ -28,9 +28,9 @@ static struct pt_regs *get_user_regs(struct task_struct *tsk)
                                   THREAD_SIZE - sizeof(struct pt_regs));
 }
 
-static void ptrace_single_step(struct task_struct *tsk)
+void user_enable_single_step(struct task_struct *tsk)
 {
-        pr_debug("ptrace_single_step: pid=%u, PC=0x%08lx, SR=0x%08lx\n",
+        pr_debug("user_enable_single_step: pid=%u, PC=0x%08lx, SR=0x%08lx\n",
                  tsk->pid, task_pt_regs(tsk)->pc, task_pt_regs(tsk)->sr);
 
         /*
@@ -49,6 +49,11 @@ static void ptrace_single_step(struct task_struct *tsk)
         set_tsk_thread_flag(tsk, TIF_SINGLE_STEP);
 }
 
+void user_disable_single_step(struct task_struct *child)
+{
+        /* XXX(hch): a no-op here seems wrong.. */
+}
+
 /*
  * Called by kernel/ptrace.c when detaching
  *
@@ -167,50 +172,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 ret = ptrace_write_user(child, addr, data);
                 break;
 
-        /* continue and stop at next (return from) syscall */
-        case PTRACE_SYSCALL:
-        /* restart after signal */
-        case PTRACE_CONT:
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                if (request == PTRACE_SYSCALL)
-                        set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                else
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                child->exit_code = data;
-                /* XXX: Are we sure no breakpoints are active here? */
-                wake_up_process(child);
-                ret = 0;
-                break;
-
-        /*
-         * Make the child exit. Best I can do is send it a
-         * SIGKILL. Perhaps it should be put in the status that it
-         * wants to exit.
-         */
-        case PTRACE_KILL:
-                ret = 0;
-                if (child->exit_state == EXIT_ZOMBIE)
-                        break;
-                child->exit_code = SIGKILL;
-                wake_up_process(child);
-                break;
-
-        /*
-         * execute single instruction.
-         */
-        case PTRACE_SINGLESTEP:
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                ptrace_single_step(child);
-                child->exit_code = data;
-                wake_up_process(child);
-                ret = 0;
-                break;
-
         case PTRACE_GETREGS:
                 ret = ptrace_getregs(child, (void __user *)data);
                 break;
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
index 3a4bc1a1843..e67c9994542 100644
--- a/arch/avr32/mach-at32ap/at32ap700x.c
+++ b/arch/avr32/mach-at32ap/at32ap700x.c
@@ -12,6 +12,7 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
+#include <linux/slab.h>
 #include <linux/gpio.h>
 #include <linux/spi/spi.h>
 #include <linux/usb/atmel_usba_udc.h>
diff --git a/arch/avr32/mach-at32ap/extint.c b/arch/avr32/mach-at32ap/extint.c
index 310477ba1bb..e9d12058ffd 100644
--- a/arch/avr32/mach-at32ap/extint.c
+++ b/arch/avr32/mach-at32ap/extint.c
@@ -14,6 +14,7 @@
 #include <linux/irq.h>
 #include <linux/platform_device.h>
 #include <linux/random.h>
+#include <linux/slab.h>
 
 #include <asm/io.h>
 
diff --git a/arch/avr32/mach-at32ap/hsmc.c b/arch/avr32/mach-at32ap/hsmc.c
index 2875c11be95..f7672d3e86b 100644
--- a/arch/avr32/mach-at32ap/hsmc.c
+++ b/arch/avr32/mach-at32ap/hsmc.c
@@ -12,6 +12,7 @@
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
+#include <linux/slab.h>
 
 #include <asm/io.h>
 #include <mach/smc.h>
diff --git a/arch/avr32/mm/dma-coherent.c b/arch/avr32/mm/dma-coherent.c
index 6d8c794c3b8..3c0042247ea 100644
--- a/arch/avr32/mm/dma-coherent.c
+++ b/arch/avr32/mm/dma-coherent.c
@@ -7,6 +7,7 @@
  */
 
 #include <linux/dma-mapping.h>
+#include <linux/gfp.h>
 
 #include <asm/addrspace.h>
 #include <asm/cacheflush.h>
diff --git a/arch/avr32/mm/init.c b/arch/avr32/mm/init.c
index 94925641e53..a7314d44b17 100644
--- a/arch/avr32/mm/init.c
+++ b/arch/avr32/mm/init.c
@@ -7,6 +7,7 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/gfp.h>
 #include <linux/mm.h>
 #include <linux/swap.h>
 #include <linux/init.h>
diff --git a/arch/avr32/mm/ioremap.c b/arch/avr32/mm/ioremap.c
index f03b79f0e0a..7def0d84cec 100644
--- a/arch/avr32/mm/ioremap.c
+++ b/arch/avr32/mm/ioremap.c
@@ -9,6 +9,7 @@
 #include <linux/mm.h>
 #include <linux/module.h>
 #include <linux/io.h>
+#include <linux/slab.h>
 
 #include <asm/pgtable.h>
 #include <asm/addrspace.h>
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 53c1e1d45c6..c078849df7f 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -23,12 +23,15 @@ config RWSEM_XCHGADD_ALGORITHM
 
 config BLACKFIN
         def_bool y
+        select HAVE_ARCH_KGDB
+        select HAVE_ARCH_TRACEHOOK
         select HAVE_FUNCTION_GRAPH_TRACER
         select HAVE_FUNCTION_TRACER
+        select HAVE_FUNCTION_TRACE_MCOUNT_TEST
         select HAVE_IDE
-        select HAVE_KERNEL_GZIP
-        select HAVE_KERNEL_BZIP2
-        select HAVE_KERNEL_LZMA
+        select HAVE_KERNEL_GZIP if RAMKERNEL
+        select HAVE_KERNEL_BZIP2 if RAMKERNEL
+        select HAVE_KERNEL_LZMA if RAMKERNEL
         select HAVE_OPROFILE
         select ARCH_WANT_OPTIONAL_GPIOLIB
 
@@ -45,9 +48,6 @@ config ZONE_DMA
 config GENERIC_FIND_NEXT_BIT
         def_bool y
 
-config GENERIC_HWEIGHT
-        def_bool y
-
 config GENERIC_HARDIRQS
         def_bool y
 
@@ -239,7 +239,7 @@ endchoice
 
 config SMP
         depends on BF561
-        select GENERIC_CLOCKEVENTS
+        select TICKSOURCE_CORETMR
         bool "Symmetric multi-processing support"
         ---help---
           This enables support for systems with more than one CPU,
@@ -253,11 +253,20 @@ config NR_CPUS
         depends on SMP
         default 2 if BF561
 
+config HOTPLUG_CPU
+        bool "Support for hot-pluggable CPUs"
+        depends on SMP && HOTPLUG
+        default y
+
 config IRQ_PER_CPU
         bool
         depends on SMP
         default y
 
+config HAVE_LEGACY_PER_CPU_AREA
+        def_bool y
+        depends on SMP
+
 config BF_REV_MIN
         int
         default 0 if (BF51x || BF52x || (BF54x && !BF54xM))
@@ -349,7 +358,7 @@ config MEM_MT48LC8M32B2B5_7
 
 config MEM_MT48LC32M16A2TG_75
         bool
-        depends on (BFIN527_EZKIT || BFIN532_IP0X || BLACKSTAMP)
+        depends on (BFIN527_EZKIT || BFIN527_EZKIT_V2 || BFIN532_IP0X || BLACKSTAMP)
         default y
 
 config MEM_MT48LC32M8A2_75
@@ -401,10 +410,18 @@ config BOOT_LOAD
 config ROM_BASE
         hex "Kernel ROM Base"
         depends on ROMKERNEL
-        default "0x20040000"
+        default "0x20040040"
         range 0x20000000 0x20400000 if !(BF54x || BF561)
         range 0x20000000 0x30000000 if (BF54x || BF561)
         help
+          Make sure your ROM base does not include any file-header
+          information that is prepended to the kernel.
+
+          For example, the bootable U-Boot format (created with
+          mkimage) has a 64 byte header (0x40).  So while the image
+          you write to flash might start at say 0x20080000, you have
+          to add 0x40 to get the kernel's ROM base as it will come
+          after the header.
 
 comment "Clock/PLL Setup"
 
@@ -448,7 +465,7 @@ config VCO_MULT
         range 1 64
         default "22" if BFIN533_EZKIT
         default "45" if BFIN533_STAMP
-        default "20" if (BFIN537_STAMP || BFIN527_EZKIT || BFIN548_EZKIT || BFIN548_BLUETECHNIX_CM || BFIN538_EZKIT)
+        default "20" if (BFIN537_STAMP || BFIN527_EZKIT || BFIN527_EZKIT_V2 || BFIN548_EZKIT || BFIN548_BLUETECHNIX_CM || BFIN538_EZKIT)
         default "22" if BFIN533_BLUETECHNIX_CM
         default "20" if (BFIN537_BLUETECHNIX_CM_E || BFIN537_BLUETECHNIX_CM_U || BFIN527_BLUETECHNIX_CM || BFIN561_BLUETECHNIX_CM)
         default "20" if BFIN561_EZKIT
@@ -609,23 +626,23 @@ config GENERIC_CLOCKEVENTS
         bool "Generic clock events"
         default y
 
-choice
-        prompt "Kernel Tick Source"
+menu "Clock event device"
         depends on GENERIC_CLOCKEVENTS
-        default TICKSOURCE_CORETMR
-
 config TICKSOURCE_GPTMR0
-        bool "Gptimer0 (SCLK domain)"
+        bool "GPTimer0"
+        depends on !SMP
         select BFIN_GPTIMERS
 
 config TICKSOURCE_CORETMR
-        bool "Core timer (CCLK domain)"
-
-endchoice
+        bool "Core timer"
+        default y
+endmenu
 
-config CYCLES_CLOCKSOURCE
-        bool "Use 'CYCLES' as a clocksource"
+menu "Clock souce"
         depends on GENERIC_CLOCKEVENTS
+config CYCLES_CLOCKSOURCE
+        bool "CYCLES"
+        default y
         depends on !BFIN_SCRATCH_REG_CYCLES
         depends on !SMP
         help
@@ -636,10 +653,10 @@ config CYCLES_CLOCKSOURCE
           writing the registers will most likely crash the kernel.
 
 config GPTMR0_CLOCKSOURCE
-        bool "Use GPTimer0 as a clocksource"
+        bool "GPTimer0"
         select BFIN_GPTIMERS
-        depends on GENERIC_CLOCKEVENTS
         depends on !TICKSOURCE_GPTMR0
+endmenu
 
 config ARCH_USES_GETTIMEOFFSET
         depends on !GENERIC_CLOCKEVENTS
@@ -1116,24 +1133,6 @@ config PCI
 
 source "drivers/pci/Kconfig"
 
-config HOTPLUG
-        bool "Support for hot-pluggable device"
-          help
-          Say Y here if you want to plug devices into your computer while
-          the system is running, and be able to use them quickly.  In many
-          cases, the devices can likewise be unplugged at any time too.
-
-          One well known example of this is PCMCIA- or PC-cards, credit-card
-          size devices such as network cards, modems or hard drives which are
-          plugged into slots found on all modern laptop computers.  Another
-          example, used on modern desktops as well as laptops, is USB.
-
-          Enable HOTPLUG and build a modular kernel.  Get agent software
-          (from <http://linux-hotplug.sourceforge.net/>) and install it.
-          Then your kernel will automatically call out to a user mode "policy
-          agent" (/sbin/hotplug) to load modules and set up software needed
-          to use devices as you hotplug them.
-
 source "drivers/pcmcia/Kconfig"
 
 source "drivers/pci/hotplug/Kconfig"
@@ -1147,7 +1146,6 @@ source "fs/Kconfig.binfmt"
 endmenu
 
 menu "Power management options"
-        depends on !SMP
 
 source "kernel/power/Kconfig"
 
@@ -1240,7 +1238,6 @@ config PM_BFIN_WAKE_GP
 endmenu
 
 menu "CPU Frequency scaling"
-        depends on !SMP
 
 source "drivers/cpufreq/Kconfig"
 
diff --git a/arch/blackfin/Kconfig.debug b/arch/blackfin/Kconfig.debug
index 87f195ee2e0..aec89a5280b 100644
--- a/arch/blackfin/Kconfig.debug
+++ b/arch/blackfin/Kconfig.debug
@@ -18,9 +18,6 @@ config DEBUG_STACK_USAGE
 
           This option will slow down process creation somewhat.
 
-config HAVE_ARCH_KGDB
-        def_bool y
-
 config DEBUG_VERBOSE
         bool "Verbose fault messages"
         default y
@@ -238,6 +235,15 @@ config EARLY_PRINTK
           all of this lives in the init section and is thrown away after the
           kernel boots completely.
 
+config NMI_WATCHDOG
+        bool "Enable NMI watchdog to help debugging lockup on SMP"
+        default n
+        depends on (SMP && !BFIN_SCRATCH_REG_RETN)
+        help
+          If any CPU in the system does not execute the period local timer
+          interrupt for more than 5 seconds, then the NMI handler dumps debug
+          information. This information can be used to debug the lockup.
+
 config CPLB_INFO
         bool "Display the CPLB information"
         help
diff --git a/arch/blackfin/Makefile b/arch/blackfin/Makefile
index d4c7177e765..5a97a31d4bb 100644
--- a/arch/blackfin/Makefile
+++ b/arch/blackfin/Makefile
@@ -14,6 +14,9 @@ OBJCOPYFLAGS     := -O binary -R .note -R .comment -S
 GZFLAGS          := -9
 
 KBUILD_CFLAGS           += $(call cc-option,-mno-fdpic)
+ifeq ($(CONFIG_ROMKERNEL),y)
+KBUILD_CFLAGS           += -mlong-calls
+endif
 KBUILD_AFLAGS           += $(call cc-option,-mno-fdpic)
 CFLAGS_MODULE    += -mlong-calls
 LDFLAGS_MODULE   += -m elf32bfin
@@ -130,7 +133,6 @@ KBUILD_CFLAGS += -Iarch/$(ARCH)/mach-$(MACHINE)/include
 KBUILD_CPPFLAGS += $(patsubst %,-I$(srctree)/%include,$(machdirs))
 
 CLEAN_FILES += \
-        arch/$(ARCH)/include/asm/asm-offsets.h \
         arch/$(ARCH)/kernel/asm-offsets.s \
 
 archclean:
@@ -138,7 +140,7 @@ archclean:
 
 INSTALL_PATH ?= /tftpboot
 boot := arch/$(ARCH)/boot
-BOOT_TARGETS = vmImage vmImage.bin vmImage.bz2 vmImage.gz vmImage.lzma
+BOOT_TARGETS = vmImage vmImage.bin vmImage.bz2 vmImage.gz vmImage.lzma vmImage.xip
 PHONY += $(BOOT_TARGETS) install
 KBUILD_IMAGE := $(boot)/vmImage
 
@@ -156,6 +158,7 @@ define archhelp
   echo  '  vmImage.bz2     - Kernel-only image for U-Boot (arch/$(ARCH)/boot/vmImage.bz2)'
   echo  '* vmImage.gz      - Kernel-only image for U-Boot (arch/$(ARCH)/boot/vmImage.gz)'
   echo  '  vmImage.lzma    - Kernel-only image for U-Boot (arch/$(ARCH)/boot/vmImage.lzma)'
+  echo  '  vmImage.xip     - XIP Kernel-only image for U-Boot (arch/$(ARCH)/boot/vmImage.xip)'
   echo  '  install         - Install kernel using'
   echo  '                     (your) ~/bin/$(INSTALLKERNEL) or'
   echo  '                     (distribution) PATH: $(INSTALLKERNEL) or'
diff --git a/arch/blackfin/boot/Makefile b/arch/blackfin/boot/Makefile
index e9c48c6f8c1..d1b3d6051fd 100644
--- a/arch/blackfin/boot/Makefile
+++ b/arch/blackfin/boot/Makefile
@@ -8,14 +8,18 @@
 
 MKIMAGE := $(srctree)/scripts/mkuboot.sh
 
-targets := vmImage vmImage.bin vmImage.bz2 vmImage.gz vmImage.lzma
-extra-y += vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma
+targets := vmImage vmImage.bin vmImage.bz2 vmImage.gz vmImage.lzma vmImage.xip
+extra-y += vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma vmlinux.bin.xip
+
+UIMAGE_OPTS-y :=
+UIMAGE_OPTS-$(CONFIG_RAMKERNEL) += -a $(CONFIG_BOOT_LOAD)
+UIMAGE_OPTS-$(CONFIG_ROMKERNEL) += -a $(CONFIG_ROM_BASE) -x
 
 quiet_cmd_uimage = UIMAGE  $@
       cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A $(ARCH) -O linux -T kernel \
-                   -C $(2) -n '$(MACHINE)-$(KERNELRELEASE)' -a $(CONFIG_BOOT_LOAD) \
+                   -C $(2) -n '$(MACHINE)-$(KERNELRELEASE)' \
                    -e $(shell $(NM) vmlinux | awk '$$NF == "__start" {print $$1}') \
-                   -d $< $@
+                   $(UIMAGE_OPTS-y) -d $< $@
 
 $(obj)/vmlinux.bin: vmlinux FORCE
         $(call if_changed,objcopy)
@@ -29,6 +33,12 @@ $(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE
 $(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
         $(call if_changed,lzma)
 
+# The mkimage tool wants 64bytes prepended to the image
+quiet_cmd_mk_bin_xip = BIN     $@
+      cmd_mk_bin_xip = ( printf '%64s' | tr ' ' '\377' ; cat $< ) > $@
+$(obj)/vmlinux.bin.xip: $(obj)/vmlinux.bin FORCE
+        $(call if_changed,mk_bin_xip)
+
 $(obj)/vmImage.bin: $(obj)/vmlinux.bin
         $(call if_changed,uimage,none)
 
@@ -41,10 +51,15 @@ $(obj)/vmImage.gz: $(obj)/vmlinux.bin.gz
 $(obj)/vmImage.lzma: $(obj)/vmlinux.bin.lzma
         $(call if_changed,uimage,lzma)
 
+$(obj)/vmImage.xip: $(obj)/vmlinux.bin.xip
+        $(call if_changed,uimage,none)
+
 suffix-y                      := bin
 suffix-$(CONFIG_KERNEL_GZIP)  := gz
 suffix-$(CONFIG_KERNEL_BZIP2) := bz2
 suffix-$(CONFIG_KERNEL_LZMA)  := lzma
+suffix-$(CONFIG_ROMKERNEL)    := xip
+
 $(obj)/vmImage: $(obj)/vmImage.$(suffix-y)
         @ln -sf $(notdir $<) $@
 
diff --git a/arch/blackfin/configs/BF518F-EZBRD_defconfig b/arch/blackfin/configs/BF518F-EZBRD_defconfig
index e3155941981..cf7c9bc94f1 100644
--- a/arch/blackfin/configs/BF518F-EZBRD_defconfig
+++ b/arch/blackfin/configs/BF518F-EZBRD_defconfig
@@ -1,22 +1,27 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28.10
-# Thu May 21 05:50:01 2009
+# Linux kernel version: 2.6.32.2
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 CONFIG_BLACKFIN=y
+CONFIG_GENERIC_CSUM=y
+CONFIG_GENERIC_BUG=y
 CONFIG_ZONE_DMA=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -26,22 +31,41 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CGROUPS is not set
 # CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
 # CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -62,6 +86,10 @@ CONFIG_EPOLL=y
 # CONFIG_TIMERFD is not set
 # CONFIG_EVENTFD is not set
 # CONFIG_AIO is not set
+
+#
+# Kernel Performance Events And Counters
+#
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
@@ -69,11 +97,15 @@ CONFIG_SLAB=y
 # CONFIG_SLOB is not set
 CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_SLOW_WORK is not set
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -81,11 +113,8 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
+# CONFIG_LBDAF is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -101,7 +130,6 @@ CONFIG_IOSCHED_NOOP=y
 # CONFIG_DEFAULT_CFQ is not set
 CONFIG_DEFAULT_NOOP=y
 CONFIG_DEFAULT_IOSCHED="noop"
-CONFIG_CLASSIC_RCU=y
 # CONFIG_PREEMPT_NONE is not set
 CONFIG_PREEMPT_VOLUNTARY=y
 # CONFIG_PREEMPT is not set
@@ -132,15 +160,15 @@ CONFIG_BF518=y
 # CONFIG_BF537 is not set
 # CONFIG_BF538 is not set
 # CONFIG_BF539 is not set
-# CONFIG_BF542 is not set
+# CONFIG_BF542_std is not set
 # CONFIG_BF542M is not set
-# CONFIG_BF544 is not set
+# CONFIG_BF544_std is not set
 # CONFIG_BF544M is not set
-# CONFIG_BF547 is not set
+# CONFIG_BF547_std is not set
 # CONFIG_BF547M is not set
-# CONFIG_BF548 is not set
+# CONFIG_BF548_std is not set
 # CONFIG_BF548M is not set
-# CONFIG_BF549 is not set
+# CONFIG_BF549_std is not set
 # CONFIG_BF549M is not set
 # CONFIG_BF561 is not set
 CONFIG_BF_REV_MIN=0
@@ -154,8 +182,8 @@ CONFIG_BF_REV_0_0=y
 # CONFIG_BF_REV_0_6 is not set
 # CONFIG_BF_REV_ANY is not set
 # CONFIG_BF_REV_NONE is not set
-CONFIG_BF51x=y
 CONFIG_MEM_MT48LC32M8A2_75=y
+CONFIG_BF51x=y
 CONFIG_BFIN518F_EZBRD=y
 
 #
@@ -313,7 +341,6 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
@@ -322,16 +349,18 @@ CONFIG_BFIN_GPTIMERS=m
 # CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
 CONFIG_DMA_UNCACHED_1M=y
+# CONFIG_DMA_UNCACHED_512K is not set
+# CONFIG_DMA_UNCACHED_256K is not set
+# CONFIG_DMA_UNCACHED_128K is not set
 # CONFIG_DMA_UNCACHED_NONE is not set
 
 #
 # Cache Support
 #
 CONFIG_BFIN_ICACHE=y
-# CONFIG_BFIN_ICACHE_LOCK is not set
+CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_DCACHE_BANKA is not set
-CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_EXTMEM_DCACHEABLE=y
 CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
@@ -342,7 +371,7 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_MPU is not set
 
 #
-# Asynchonous Memory Configuration
+# Asynchronous Memory Configuration
 #
 
 #
@@ -398,11 +427,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-# CONFIG_XFRM_SUB_POLICY is not set
-# CONFIG_XFRM_MIGRATE is not set
-# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
@@ -426,7 +450,6 @@ CONFIG_IP_PNP=y
 # CONFIG_INET_XFRM_MODE_BEET is not set
 # CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
-CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_CUBIC=y
 CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -437,6 +460,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -450,7 +474,10 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
 # CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
 
 #
 # Network testing
@@ -461,13 +488,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-# CONFIG_PHONET is not set
-CONFIG_WIRELESS=y
-# CONFIG_CFG80211 is not set
-CONFIG_WIRELESS_OLD_REGULATORY=y
-# CONFIG_WIRELESS_EXT is not set
-# CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
 
@@ -488,6 +510,7 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
@@ -545,6 +568,7 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
 #
 # CONFIG_MTD_DATAFLASH is not set
 # CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SST25L is not set
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
@@ -560,6 +584,11 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
 # CONFIG_MTD_ONENAND is not set
 
 #
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
@@ -576,10 +605,20 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
 # CONFIG_ATA_OVER_ETH is not set
 # CONFIG_BLK_DEV_HD is not set
 CONFIG_MISC_DEVICES=y
-# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_AD525X_DPOT is not set
 # CONFIG_ICS932S401 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_ISL29003 is not set
 # CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
 CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
 
@@ -614,6 +653,9 @@ CONFIG_PHYLIB=y
 # CONFIG_BROADCOM_PHY is not set
 # CONFIG_ICPLUS_PHY is not set
 # CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
 # CONFIG_FIXED_PHY is not set
 # CONFIG_MDIO_BITBANG is not set
 CONFIG_NET_ETHERNET=y
@@ -622,10 +664,14 @@ CONFIG_BFIN_MAC=y
 CONFIG_BFIN_TX_DESC_NUM=10
 CONFIG_BFIN_RX_DESC_NUM=20
 # CONFIG_BFIN_MAC_RMII is not set
+CONFIG_BFIN_MAC_USE_HWSTAMP=y
 # CONFIG_SMC91X is not set
-# CONFIG_SMSC911X is not set
 # CONFIG_DM9000 is not set
 # CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_ADF702X is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -634,15 +680,16 @@ CONFIG_BFIN_RX_DESC_NUM=20
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
 
 #
-# Wireless LAN
+# Enable WiMAX (Networking options) to see the WiMAX drivers
 #
-# CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
-# CONFIG_IWLWIFI_LEDS is not set
 # CONFIG_WAN is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
@@ -677,7 +724,10 @@ CONFIG_INPUT=y
 # CONFIG_INPUT_TOUCHSCREEN is not set
 CONFIG_INPUT_MISC=y
 # CONFIG_INPUT_UINPUT is not set
-# CONFIG_CONFIG_INPUT_PCF8574 is not set
+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
+# CONFIG_INPUT_AD714X is not set
+# CONFIG_INPUT_ADXL34X is not set
+# CONFIG_INPUT_PCF8574 is not set
 
 #
 # Hardware I/O ports
@@ -688,16 +738,13 @@ CONFIG_INPUT_MISC=y
 #
 # Character devices
 #
-# CONFIG_AD9960 is not set
 CONFIG_BFIN_DMA_INTERFACE=m
 # CONFIG_BFIN_PPI is not set
 # CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
 # CONFIG_BFIN_SPI_ADC is not set
 # CONFIG_BFIN_SPORT is not set
-# CONFIG_BFIN_TIMER_LATENCY is not set
 # CONFIG_BFIN_TWI_LCD is not set
-CONFIG_SIMPLE_GPIO=m
 CONFIG_VT=y
 CONFIG_CONSOLE_TRANSLATIONS=y
 CONFIG_VT_CONSOLE=y
@@ -715,6 +762,7 @@ CONFIG_BFIN_JTAG_COMM=m
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_MAX3100 is not set
 CONFIG_SERIAL_BFIN=y
 CONFIG_SERIAL_BFIN_CONSOLE=y
 CONFIG_SERIAL_BFIN_DMA=y
@@ -726,12 +774,10 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_BFIN_SPORT is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
-
-#
-# CAN, the car bus and industrial fieldbus
-#
-# CONFIG_CAN4LINUX is not set
+CONFIG_BFIN_OTP=y
+# CONFIG_BFIN_OTP_WRITE_ENABLE is not set
 # CONFIG_IPMI_HANDLER is not set
 # CONFIG_HW_RANDOM is not set
 # CONFIG_R3964 is not set
@@ -739,6 +785,7 @@ CONFIG_UNIX98_PTYS=y
 # CONFIG_TCG_TPM is not set
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_HELPER_AUTO=y
 
@@ -771,14 +818,6 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_EEPROM_AT24 is not set
-# CONFIG_SENSORS_AD5252 is not set
-# CONFIG_EEPROM_LEGACY is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
@@ -795,13 +834,18 @@ CONFIG_SPI_BFIN=y
 # CONFIG_SPI_BFIN_LOCK is not set
 # CONFIG_SPI_BFIN_SPORT is not set
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
 
 #
 # SPI Protocol Masters
 #
-# CONFIG_SPI_AT25 is not set
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
 CONFIG_GPIOLIB=y
 # CONFIG_DEBUG_GPIO is not set
@@ -817,6 +861,7 @@ CONFIG_GPIO_SYSFS=y
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -827,11 +872,15 @@ CONFIG_GPIO_SYSFS=y
 #
 # CONFIG_GPIO_MAX7301 is not set
 # CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+
+#
+# AC97 GPIO expanders:
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 CONFIG_WATCHDOG=y
 # CONFIG_WATCHDOG_NOWAYOUT is not set
 
@@ -853,28 +902,20 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_EZX_PCAP is not set
 # CONFIG_REGULATOR is not set
-
-#
-# Multimedia devices
-#
-
-#
-# Multimedia core support
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_DVB_CORE is not set
-# CONFIG_VIDEO_MEDIA is not set
-
-#
-# Multimedia drivers
-#
-# CONFIG_DAB is not set
+# CONFIG_MEDIA_SUPPORT is not set
 
 #
 # Graphics support
@@ -912,10 +953,11 @@ CONFIG_MMC_BLOCK_BOUNCE=y
 # MMC/SD/SDIO Host Controller Drivers
 #
 # CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
+# CONFIG_MMC_SPI is not set
 CONFIG_SDH_BFIN=m
 CONFIG_SDH_BFIN_MISSING_CMD_PULLUP_WORKAROUND=y
-# CONFIG_SDH_BFIN_ENABLE_SDIO_IRQ is not set
-# CONFIG_MMC_SPI is not set
 # CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
 # CONFIG_ACCESSIBILITY is not set
@@ -950,6 +992,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
 
 #
 # SPI RTC drivers
@@ -961,6 +1004,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_R9701 is not set
 # CONFIG_RTC_DRV_RS5C348 is not set
 # CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
 
 #
 # Platform RTC drivers
@@ -981,10 +1025,21 @@ CONFIG_RTC_INTF_DEV=y
 #
 CONFIG_RTC_DRV_BFIN=y
 # CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
 # CONFIG_STAGING is not set
 
 #
+# Firmware Drivers
+#
+# CONFIG_FIRMWARE_MEMMAP is not set
+# CONFIG_SIGMA is not set
+
+#
 # File systems
 #
 CONFIG_EXT2_FS=m
@@ -994,9 +1049,13 @@ CONFIG_EXT2_FS=m
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
-CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -1006,6 +1065,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -1027,13 +1091,9 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
 CONFIG_SYSFS=y
-# CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -1042,8 +1102,8 @@ CONFIG_SYSFS=y
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS2_FS is not set
-# CONFIG_YAFFS_FS is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
@@ -1062,7 +1122,6 @@ CONFIG_LOCKD=m
 CONFIG_LOCKD_V4=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=m
-# CONFIG_SUNRPC_REGISTER_V4 is not set
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 CONFIG_SMB_FS=m
@@ -1127,14 +1186,19 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_SECTION_MISMATCH=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
@@ -1142,31 +1206,39 @@ CONFIG_SCHED_DEBUG=y
 # CONFIG_DEBUG_SLAB is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
 # CONFIG_DEBUG_KOBJECT is not set
 CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_NOMMU_REGIONS is not set
 # CONFIG_DEBUG_WRITECOUNT is not set
 # CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_FRAME_POINTER is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
-
-#
-# Tracers
-#
-# CONFIG_SCHED_TRACER is not set
-# CONFIG_CONTEXT_SWITCH_TRACER is not set
-# CONFIG_BOOT_TRACER is not set
-# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_BRANCH_PROFILE_NONE is not set
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_DYNAMIC_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -1191,6 +1263,7 @@ CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
+# CONFIG_BFIN_ISRAM_SELF_TEST is not set
 
 #
 # Security options
@@ -1199,14 +1272,14 @@ CONFIG_ACCESS_CHECK=y
 CONFIG_SECURITY=y
 # CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_NETWORK is not set
+# CONFIG_SECURITY_PATH is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
-CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
+# CONFIG_SECURITY_TOMOYO is not set
 CONFIG_CRYPTO=y
 
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -1238,11 +1311,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1279,6 +1354,7 @@ CONFIG_CRYPTO=y
 # Compression
 #
 # CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
 # CONFIG_CRYPTO_LZO is not set
 
 #
@@ -1286,11 +1362,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_CRC_CCITT=m
 # CONFIG_CRC16 is not set
 # CONFIG_CRC_T10DIF is not set
@@ -1299,6 +1377,8 @@ CONFIG_CRC32=y
 # CONFIG_CRC7 is not set
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
+CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/BF526-EZBRD_defconfig b/arch/blackfin/configs/BF526-EZBRD_defconfig
index 075e0fdcb39..31c2a6db6ec 100644
--- a/arch/blackfin/configs/BF526-EZBRD_defconfig
+++ b/arch/blackfin/configs/BF526-EZBRD_defconfig
@@ -1,22 +1,27 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28.10
-# Thu May 21 05:50:01 2009
+# Linux kernel version: 2.6.32.2
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 CONFIG_BLACKFIN=y
+CONFIG_GENERIC_CSUM=y
+CONFIG_GENERIC_BUG=y
 CONFIG_ZONE_DMA=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -26,22 +31,41 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CGROUPS is not set
 # CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
 # CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -62,6 +86,10 @@ CONFIG_EPOLL=y
 # CONFIG_TIMERFD is not set
 # CONFIG_EVENTFD is not set
 # CONFIG_AIO is not set
+
+#
+# Kernel Performance Events And Counters
+#
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
@@ -69,11 +97,15 @@ CONFIG_SLAB=y
 # CONFIG_SLOB is not set
 CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_SLOW_WORK is not set
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -81,11 +113,8 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
+# CONFIG_LBDAF is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -101,7 +130,6 @@ CONFIG_IOSCHED_NOOP=y
 # CONFIG_DEFAULT_CFQ is not set
 CONFIG_DEFAULT_NOOP=y
 CONFIG_DEFAULT_IOSCHED="noop"
-CONFIG_CLASSIC_RCU=y
 # CONFIG_PREEMPT_NONE is not set
 CONFIG_PREEMPT_VOLUNTARY=y
 # CONFIG_PREEMPT is not set
@@ -132,15 +160,15 @@ CONFIG_BF526=y
 # CONFIG_BF537 is not set
 # CONFIG_BF538 is not set
 # CONFIG_BF539 is not set
-# CONFIG_BF542 is not set
+# CONFIG_BF542_std is not set
 # CONFIG_BF542M is not set
-# CONFIG_BF544 is not set
+# CONFIG_BF544_std is not set
 # CONFIG_BF544M is not set
-# CONFIG_BF547 is not set
+# CONFIG_BF547_std is not set
 # CONFIG_BF547M is not set
-# CONFIG_BF548 is not set
+# CONFIG_BF548_std is not set
 # CONFIG_BF548M is not set
-# CONFIG_BF549 is not set
+# CONFIG_BF549_std is not set
 # CONFIG_BF549M is not set
 # CONFIG_BF561 is not set
 CONFIG_BF_REV_MIN=0
@@ -154,8 +182,7 @@ CONFIG_BF_REV_0_0=y
 # CONFIG_BF_REV_0_6 is not set
 # CONFIG_BF_REV_ANY is not set
 # CONFIG_BF_REV_NONE is not set
-CONFIG_BF52x=y
-CONFIG_MEM_MT48LC32M16A2TG_75=y
+CONFIG_MEM_MT48H32M16LFCJ_75=y
 CONFIG_IRQ_PLL_WAKEUP=7
 CONFIG_IRQ_DMA0_ERROR=7
 CONFIG_IRQ_DMAR0_BLK=7
@@ -200,7 +227,9 @@ CONFIG_IRQ_MEM_DMA1=13
 CONFIG_IRQ_WATCH=13
 CONFIG_IRQ_PORTF_INTA=13
 CONFIG_IRQ_PORTF_INTB=13
+CONFIG_BF52x=y
 # CONFIG_BFIN527_EZKIT is not set
+# CONFIG_BFIN527_EZKIT_V2 is not set
 # CONFIG_BFIN527_BLUETECHNIX_CM is not set
 CONFIG_BFIN526_EZBRD=y
 
@@ -318,7 +347,6 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
@@ -327,16 +355,18 @@ CONFIG_BFIN_GPTIMERS=m
 # CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
 CONFIG_DMA_UNCACHED_1M=y
+# CONFIG_DMA_UNCACHED_512K is not set
+# CONFIG_DMA_UNCACHED_256K is not set
+# CONFIG_DMA_UNCACHED_128K is not set
 # CONFIG_DMA_UNCACHED_NONE is not set
 
 #
 # Cache Support
 #
 CONFIG_BFIN_ICACHE=y
-# CONFIG_BFIN_ICACHE_LOCK is not set
+CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_DCACHE_BANKA is not set
-CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_EXTMEM_DCACHEABLE=y
 CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
@@ -347,6 +377,10 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_MPU is not set
 
 #
+# Asynchronous Memory Configuration
+#
+
+#
 # EBIU_AMGCTL Global Control
 #
 CONFIG_C_AMCKEN=y
@@ -399,11 +433,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-# CONFIG_XFRM_SUB_POLICY is not set
-# CONFIG_XFRM_MIGRATE is not set
-# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
@@ -427,7 +456,6 @@ CONFIG_IP_PNP=y
 # CONFIG_INET_XFRM_MODE_BEET is not set
 # CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
-CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_CUBIC=y
 CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -438,6 +466,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -451,7 +480,10 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
 # CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
 
 #
 # Network testing
@@ -462,13 +494,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-# CONFIG_PHONET is not set
-CONFIG_WIRELESS=y
-# CONFIG_CFG80211 is not set
-CONFIG_WIRELESS_OLD_REGULATORY=y
-# CONFIG_WIRELESS_EXT is not set
-# CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
 
@@ -489,6 +516,7 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
@@ -549,6 +577,7 @@ CONFIG_MTD_PHYSMAP=y
 # CONFIG_MTD_DATAFLASH is not set
 CONFIG_MTD_M25P80=y
 CONFIG_M25PXX_USE_FAST_READ=y
+# CONFIG_MTD_SST25L is not set
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
@@ -564,11 +593,6 @@ CONFIG_MTD_NAND=m
 # CONFIG_MTD_NAND_VERIFY_WRITE is not set
 # CONFIG_MTD_NAND_ECC_SMC is not set
 # CONFIG_MTD_NAND_MUSEUM_IDS is not set
-CONFIG_MTD_NAND_BFIN=m
-CONFIG_BFIN_NAND_BASE=0x20212000
-CONFIG_BFIN_NAND_CLE=2
-CONFIG_BFIN_NAND_ALE=1
-CONFIG_BFIN_NAND_READY=3
 CONFIG_MTD_NAND_IDS=m
 # CONFIG_MTD_NAND_BF5XX is not set
 # CONFIG_MTD_NAND_DISKONCHIP is not set
@@ -578,6 +602,11 @@ CONFIG_MTD_NAND_IDS=m
 # CONFIG_MTD_ONENAND is not set
 
 #
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
@@ -595,10 +624,20 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
 # CONFIG_ATA_OVER_ETH is not set
 # CONFIG_BLK_DEV_HD is not set
 CONFIG_MISC_DEVICES=y
-# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_AD525X_DPOT is not set
 # CONFIG_ICS932S401 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_ISL29003 is not set
 # CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
 CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
 
@@ -622,10 +661,6 @@ CONFIG_BLK_DEV_SR=m
 # CONFIG_BLK_DEV_SR_VENDOR is not set
 # CONFIG_CHR_DEV_SG is not set
 # CONFIG_CHR_DEV_SCH is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
 # CONFIG_SCSI_MULTI_LUN is not set
 # CONFIG_SCSI_CONSTANTS is not set
 # CONFIG_SCSI_LOGGING is not set
@@ -642,6 +677,7 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_SRP_ATTRS is not set
 # CONFIG_SCSI_LOWLEVEL is not set
 # CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
 # CONFIG_ATA is not set
 # CONFIG_MD is not set
 CONFIG_NETDEVICES=y
@@ -666,6 +702,9 @@ CONFIG_PHYLIB=y
 # CONFIG_BROADCOM_PHY is not set
 # CONFIG_ICPLUS_PHY is not set
 # CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
 # CONFIG_FIXED_PHY is not set
 # CONFIG_MDIO_BITBANG is not set
 CONFIG_NET_ETHERNET=y
@@ -675,9 +714,12 @@ CONFIG_BFIN_TX_DESC_NUM=10
 CONFIG_BFIN_RX_DESC_NUM=20
 CONFIG_BFIN_MAC_RMII=y
 # CONFIG_SMC91X is not set
-# CONFIG_SMSC911X is not set
 # CONFIG_DM9000 is not set
 # CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_ADF702X is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -686,15 +728,16 @@ CONFIG_BFIN_MAC_RMII=y
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
 
 #
-# Wireless LAN
+# Enable WiMAX (Networking options) to see the WiMAX drivers
 #
-# CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
-# CONFIG_IWLWIFI_LEDS is not set
 
 #
 # USB Network Adapters
@@ -744,7 +787,11 @@ CONFIG_INPUT_MISC=y
 # CONFIG_INPUT_YEALINK is not set
 # CONFIG_INPUT_CM109 is not set
 # CONFIG_INPUT_UINPUT is not set
-# CONFIG_CONFIG_INPUT_PCF8574 is not set
+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
+# CONFIG_INPUT_BFIN_ROTARY is not set
+# CONFIG_INPUT_AD714X is not set
+# CONFIG_INPUT_ADXL34X is not set
+# CONFIG_INPUT_PCF8574 is not set
 
 #
 # Hardware I/O ports
@@ -755,16 +802,13 @@ CONFIG_INPUT_MISC=y
 #
 # Character devices
 #
-# CONFIG_AD9960 is not set
 CONFIG_BFIN_DMA_INTERFACE=m
 # CONFIG_BFIN_PPI is not set
 # CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
 # CONFIG_BFIN_SPI_ADC is not set
 # CONFIG_BFIN_SPORT is not set
-# CONFIG_BFIN_TIMER_LATENCY is not set
 # CONFIG_BFIN_TWI_LCD is not set
-CONFIG_SIMPLE_GPIO=m
 CONFIG_VT=y
 CONFIG_CONSOLE_TRANSLATIONS=y
 CONFIG_VT_CONSOLE=y
@@ -782,6 +826,7 @@ CONFIG_BFIN_JTAG_COMM=m
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_MAX3100 is not set
 CONFIG_SERIAL_BFIN=y
 CONFIG_SERIAL_BFIN_CONSOLE=y
 CONFIG_SERIAL_BFIN_DMA=y
@@ -793,14 +838,10 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_BFIN_SPORT is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
 CONFIG_BFIN_OTP=y
 # CONFIG_BFIN_OTP_WRITE_ENABLE is not set
-
-#
-# CAN, the car bus and industrial fieldbus
-#
-# CONFIG_CAN4LINUX is not set
 # CONFIG_IPMI_HANDLER is not set
 # CONFIG_HW_RANDOM is not set
 # CONFIG_R3964 is not set
@@ -808,6 +849,7 @@ CONFIG_BFIN_OTP=y
 # CONFIG_TCG_TPM is not set
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 CONFIG_I2C_CHARDEV=m
 CONFIG_I2C_HELPER_AUTO=y
 
@@ -841,14 +883,6 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_EEPROM_AT24 is not set
-# CONFIG_SENSORS_AD5252 is not set
-# CONFIG_EEPROM_LEGACY is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
@@ -865,13 +899,18 @@ CONFIG_SPI_BFIN=y
 # CONFIG_SPI_BFIN_LOCK is not set
 # CONFIG_SPI_BFIN_SPORT is not set
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
 
 #
 # SPI Protocol Masters
 #
-# CONFIG_EEPROM_AT25 is not set
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
 CONFIG_GPIOLIB=y
 # CONFIG_DEBUG_GPIO is not set
@@ -887,6 +926,7 @@ CONFIG_GPIO_SYSFS=y
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -897,11 +937,20 @@ CONFIG_GPIO_SYSFS=y
 #
 # CONFIG_GPIO_MAX7301 is not set
 # CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+
+#
+# AC97 GPIO expanders:
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
-# CONFIG_SENSORS_AD5252 is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
 # CONFIG_SENSORS_AD7414 is not set
 # CONFIG_SENSORS_AD7418 is not set
 # CONFIG_SENSORS_ADCXX is not set
@@ -914,11 +963,13 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
 # CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ADT7475 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_F71805F is not set
 # CONFIG_SENSORS_F71882FG is not set
 # CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_G760A is not set
 # CONFIG_SENSORS_GL518SM is not set
 # CONFIG_SENSORS_GL520SM is not set
 # CONFIG_SENSORS_IT87 is not set
@@ -934,17 +985,24 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_LM90 is not set
 # CONFIG_SENSORS_LM92 is not set
 # CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4215 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LM95241 is not set
 # CONFIG_SENSORS_MAX1111 is not set
 # CONFIG_SENSORS_MAX1619 is not set
 # CONFIG_SENSORS_MAX6650 is not set
 # CONFIG_SENSORS_PC87360 is not set
 # CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_SHT15 is not set
 # CONFIG_SENSORS_DME1737 is not set
 # CONFIG_SENSORS_SMSC47M1 is not set
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
 # CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_TMP401 is not set
+# CONFIG_SENSORS_TMP421 is not set
 # CONFIG_SENSORS_VT1211 is not set
 # CONFIG_SENSORS_W83781D is not set
 # CONFIG_SENSORS_W83791D is not set
@@ -954,9 +1012,8 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_W83L786NG is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_SENSORS_LIS3_SPI is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 CONFIG_WATCHDOG=y
 # CONFIG_WATCHDOG_NOWAYOUT is not set
 
@@ -983,28 +1040,20 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_EZX_PCAP is not set
 # CONFIG_REGULATOR is not set
-
-#
-# Multimedia devices
-#
-
-#
-# Multimedia core support
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_DVB_CORE is not set
-# CONFIG_VIDEO_MEDIA is not set
-
-#
-# Multimedia drivers
-#
-# CONFIG_DAB is not set
+# CONFIG_MEDIA_SUPPORT is not set
 
 #
 # Graphics support
@@ -1026,7 +1075,6 @@ CONFIG_DUMMY_CONSOLE=y
 # CONFIG_SOUND is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 
 #
@@ -1039,30 +1087,35 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
-CONFIG_HID_BRIGHT=y
 CONFIG_HID_CHERRY=y
 CONFIG_HID_CHICONY=y
 CONFIG_HID_CYPRESS=y
-CONFIG_HID_DELL=y
+# CONFIG_HID_DRAGONRISE is not set
 CONFIG_HID_EZKEY=y
+# CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=y
+# CONFIG_HID_TWINHAN is not set
+# CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
 CONFIG_HID_MICROSOFT=y
 CONFIG_HID_MONTEREY=y
+# CONFIG_HID_NTRIG is not set
 CONFIG_HID_PANTHERLORD=y
 # CONFIG_PANTHERLORD_FF is not set
 CONFIG_HID_PETALYNX=y
 CONFIG_HID_SAMSUNG=y
 CONFIG_HID_SONY=y
 CONFIG_HID_SUNPLUS=y
-CONFIG_THRUSTMASTER_FF=m
-CONFIG_ZEROPLUS_FF=m
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_THRUSTMASTER is not set
+# CONFIG_HID_ZEROPLUS is not set
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 # CONFIG_USB_ARCH_HAS_OHCI is not set
@@ -1088,6 +1141,7 @@ CONFIG_USB_MON=y
 # USB Host Controller Drivers
 #
 # CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
 # CONFIG_USB_ISP1362_HCD is not set
@@ -1118,18 +1172,17 @@ CONFIG_USB_INVENTRA_DMA=y
 # CONFIG_USB_TMC is not set
 
 #
-# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
 #
 
 #
-# see USB_STORAGE Help for more information
+# also be needed; see USB_STORAGE Help for more info
 #
 CONFIG_USB_STORAGE=y
 # CONFIG_USB_STORAGE_DEBUG is not set
 # CONFIG_USB_STORAGE_DATAFAB is not set
 # CONFIG_USB_STORAGE_FREECOM is not set
 # CONFIG_USB_STORAGE_ISD200 is not set
-# CONFIG_USB_STORAGE_DPCM is not set
 # CONFIG_USB_STORAGE_USBAT is not set
 # CONFIG_USB_STORAGE_SDDR09 is not set
 # CONFIG_USB_STORAGE_SDDR55 is not set
@@ -1165,7 +1218,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
-# CONFIG_USB_PHIDGET is not set
 # CONFIG_USB_IDMOUSE is not set
 # CONFIG_USB_FTDI_ELAN is not set
 # CONFIG_USB_APPLEDISPLAY is not set
@@ -1177,6 +1229,13 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_ISIGHTFW is not set
 # CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+CONFIG_USB_OTG_UTILS=y
+# CONFIG_USB_GPIO_VBUS is not set
+CONFIG_NOP_USB_XCEIV=y
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
@@ -1212,6 +1271,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
 
 #
 # SPI RTC drivers
@@ -1223,6 +1283,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_R9701 is not set
 # CONFIG_RTC_DRV_RS5C348 is not set
 # CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
 
 #
 # Platform RTC drivers
@@ -1243,10 +1304,21 @@ CONFIG_RTC_INTF_DEV=y
 #
 CONFIG_RTC_DRV_BFIN=y
 # CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
 # CONFIG_STAGING is not set
 
 #
+# Firmware Drivers
+#
+# CONFIG_FIRMWARE_MEMMAP is not set
+# CONFIG_SIGMA is not set
+
+#
 # File systems
 #
 CONFIG_EXT2_FS=m
@@ -1256,9 +1328,13 @@ CONFIG_EXT2_FS=m
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
-CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -1268,6 +1344,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 CONFIG_ISO9660_FS=m
@@ -1291,13 +1372,9 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
 CONFIG_SYSFS=y
-# CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -1316,17 +1393,8 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
-CONFIG_YAFFS_FS=m
-CONFIG_YAFFS_YAFFS1=y
-# CONFIG_YAFFS_9BYTE_TAGS is not set
-# CONFIG_YAFFS_DOES_ECC is not set
-CONFIG_YAFFS_YAFFS2=y
-CONFIG_YAFFS_AUTO_YAFFS2=y
-# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
-# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
-# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
-CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
@@ -1345,7 +1413,6 @@ CONFIG_LOCKD=m
 CONFIG_LOCKD_V4=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=m
-# CONFIG_SUNRPC_REGISTER_V4 is not set
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 CONFIG_SMB_FS=m
@@ -1360,7 +1427,7 @@ CONFIG_SMB_FS=m
 #
 # CONFIG_PARTITION_ADVANCED is not set
 CONFIG_MSDOS_PARTITION=y
-CONFIG_NLS=m
+CONFIG_NLS=y
 CONFIG_NLS_DEFAULT="iso8859-1"
 CONFIG_NLS_CODEPAGE_437=m
 # CONFIG_NLS_CODEPAGE_737 is not set
@@ -1410,14 +1477,19 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_SECTION_MISMATCH=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
@@ -1425,31 +1497,39 @@ CONFIG_SCHED_DEBUG=y
 # CONFIG_DEBUG_SLAB is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
 # CONFIG_DEBUG_KOBJECT is not set
 CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_NOMMU_REGIONS is not set
 # CONFIG_DEBUG_WRITECOUNT is not set
 # CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_FRAME_POINTER is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
-
-#
-# Tracers
-#
-# CONFIG_SCHED_TRACER is not set
-# CONFIG_CONTEXT_SWITCH_TRACER is not set
-# CONFIG_BOOT_TRACER is not set
-# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_BRANCH_PROFILE_NONE is not set
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_DYNAMIC_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -1474,6 +1554,7 @@ CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
+# CONFIG_BFIN_ISRAM_SELF_TEST is not set
 
 #
 # Security options
@@ -1482,15 +1563,15 @@ CONFIG_ACCESS_CHECK=y
 CONFIG_SECURITY=y
 # CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_NETWORK is not set
+# CONFIG_SECURITY_PATH is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
 # CONFIG_SECURITY_ROOTPLUG is not set
-CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
+# CONFIG_SECURITY_TOMOYO is not set
 CONFIG_CRYPTO=y
 
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -1522,11 +1603,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1563,6 +1646,7 @@ CONFIG_CRYPTO=y
 # Compression
 #
 # CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
 # CONFIG_CRYPTO_LZO is not set
 
 #
@@ -1570,11 +1654,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_CRC_CCITT=m
 # CONFIG_CRC16 is not set
 # CONFIG_CRC_T10DIF is not set
@@ -1584,6 +1670,8 @@ CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=m
+CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/BF527-EZKIT-V2_defconfig b/arch/blackfin/configs/BF527-EZKIT-V2_defconfig
new file mode 100644
index 00000000000..d2dfcb0e7ce
--- /dev/null
+++ b/arch/blackfin/configs/BF527-EZKIT-V2_defconfig
@@ -0,0 +1,1811 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.32.2
+#
+# CONFIG_MMU is not set
+# CONFIG_FPU is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+CONFIG_BLACKFIN=y
+CONFIG_GENERIC_CSUM=y
+CONFIG_GENERIC_BUG=y
+CONFIG_ZONE_DMA=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_FORCE_MAX_ZONEORDER=14
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+# CONFIG_ELF_CORE is not set
+CONFIG_BASE_FULL=y
+# CONFIG_FUTEX is not set
+CONFIG_EPOLL=y
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
+# CONFIG_AIO is not set
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_MMAP_ALLOW_UNINITIALIZED=y
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_SLOW_WORK is not set
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_SLABINFO=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+# CONFIG_FREEZER is not set
+
+#
+# Blackfin Processor Options
+#
+
+#
+# Processor and Board Settings
+#
+# CONFIG_BF512 is not set
+# CONFIG_BF514 is not set
+# CONFIG_BF516 is not set
+# CONFIG_BF518 is not set
+# CONFIG_BF522 is not set
+# CONFIG_BF523 is not set
+# CONFIG_BF524 is not set
+# CONFIG_BF525 is not set
+# CONFIG_BF526 is not set
+CONFIG_BF527=y
+# CONFIG_BF531 is not set
+# CONFIG_BF532 is not set
+# CONFIG_BF533 is not set
+# CONFIG_BF534 is not set
+# CONFIG_BF536 is not set
+# CONFIG_BF537 is not set
+# CONFIG_BF538 is not set
+# CONFIG_BF539 is not set
+# CONFIG_BF542_std is not set
+# CONFIG_BF542M is not set
+# CONFIG_BF544_std is not set
+# CONFIG_BF544M is not set
+# CONFIG_BF547_std is not set
+# CONFIG_BF547M is not set
+# CONFIG_BF548_std is not set
+# CONFIG_BF548M is not set
+# CONFIG_BF549_std is not set
+# CONFIG_BF549M is not set
+# CONFIG_BF561 is not set
+CONFIG_BF_REV_MIN=0
+CONFIG_BF_REV_MAX=2
+# CONFIG_BF_REV_0_0 is not set
+# CONFIG_BF_REV_0_1 is not set
+CONFIG_BF_REV_0_2=y
+# CONFIG_BF_REV_0_3 is not set
+# CONFIG_BF_REV_0_4 is not set
+# CONFIG_BF_REV_0_5 is not set
+# CONFIG_BF_REV_0_6 is not set
+# CONFIG_BF_REV_ANY is not set
+# CONFIG_BF_REV_NONE is not set
+CONFIG_MEM_MT48LC32M16A2TG_75=y
+CONFIG_IRQ_PLL_WAKEUP=7
+CONFIG_IRQ_DMA0_ERROR=7
+CONFIG_IRQ_DMAR0_BLK=7
+CONFIG_IRQ_DMAR1_BLK=7
+CONFIG_IRQ_DMAR0_OVR=7
+CONFIG_IRQ_DMAR1_OVR=7
+CONFIG_IRQ_PPI_ERROR=7
+CONFIG_IRQ_MAC_ERROR=7
+CONFIG_IRQ_SPORT0_ERROR=7
+CONFIG_IRQ_SPORT1_ERROR=7
+CONFIG_IRQ_UART0_ERROR=7
+CONFIG_IRQ_UART1_ERROR=7
+CONFIG_IRQ_RTC=8
+CONFIG_IRQ_PPI=8
+CONFIG_IRQ_SPORT0_RX=9
+CONFIG_IRQ_SPORT0_TX=9
+CONFIG_IRQ_SPORT1_RX=9
+CONFIG_IRQ_SPORT1_TX=9
+CONFIG_IRQ_TWI=10
+CONFIG_IRQ_UART0_RX=10
+CONFIG_IRQ_UART0_TX=10
+CONFIG_IRQ_UART1_RX=10
+CONFIG_IRQ_UART1_TX=10
+CONFIG_IRQ_OPTSEC=11
+CONFIG_IRQ_CNT=11
+CONFIG_IRQ_MAC_RX=11
+CONFIG_IRQ_PORTH_INTA=11
+CONFIG_IRQ_MAC_TX=11
+CONFIG_IRQ_PORTH_INTB=11
+CONFIG_IRQ_TIMER0=8
+CONFIG_IRQ_TIMER1=12
+CONFIG_IRQ_TIMER2=12
+CONFIG_IRQ_TIMER3=12
+CONFIG_IRQ_TIMER4=12
+CONFIG_IRQ_TIMER5=12
+CONFIG_IRQ_TIMER6=12
+CONFIG_IRQ_TIMER7=12
+CONFIG_IRQ_PORTG_INTA=12
+CONFIG_IRQ_PORTG_INTB=12
+CONFIG_IRQ_MEM_DMA0=13
+CONFIG_IRQ_MEM_DMA1=13
+CONFIG_IRQ_WATCH=13
+CONFIG_IRQ_PORTF_INTA=13
+CONFIG_IRQ_PORTF_INTB=13
+CONFIG_BF52x=y
+# CONFIG_BFIN527_EZKIT is not set
+CONFIG_BFIN527_EZKIT_V2=y
+# CONFIG_BFIN527_BLUETECHNIX_CM is not set
+# CONFIG_BFIN526_EZBRD is not set
+
+#
+# BF527 Specific Configuration
+#
+
+#
+# Alternative Multiplexing Scheme
+#
+# CONFIG_BF527_SPORT0_PORTF is not set
+CONFIG_BF527_SPORT0_PORTG=y
+CONFIG_BF527_SPORT0_TSCLK_PG10=y
+# CONFIG_BF527_SPORT0_TSCLK_PG14 is not set
+CONFIG_BF527_UART1_PORTF=y
+# CONFIG_BF527_UART1_PORTG is not set
+# CONFIG_BF527_NAND_D_PORTF is not set
+CONFIG_BF527_NAND_D_PORTH=y
+
+#
+# Interrupt Priority Assignment
+#
+
+#
+# Priority
+#
+CONFIG_IRQ_SPI=10
+CONFIG_IRQ_SPI_ERROR=7
+CONFIG_IRQ_NFC_ERROR=7
+CONFIG_IRQ_HDMA_ERROR=7
+CONFIG_IRQ_HDMA=7
+CONFIG_IRQ_USB_EINT=10
+CONFIG_IRQ_USB_INT0=11
+CONFIG_IRQ_USB_INT1=11
+CONFIG_IRQ_USB_INT2=11
+CONFIG_IRQ_USB_DMA=11
+
+#
+# Board customizations
+#
+# CONFIG_CMDLINE_BOOL is not set
+CONFIG_BOOT_LOAD=0x1000
+
+#
+# Clock/PLL Setup
+#
+CONFIG_CLKIN_HZ=25000000
+# CONFIG_BFIN_KERNEL_CLOCK is not set
+CONFIG_MAX_VCO_HZ=600000000
+CONFIG_MIN_VCO_HZ=50000000
+CONFIG_MAX_SCLK_HZ=133333333
+CONFIG_MIN_SCLK_HZ=27000000
+
+#
+# Kernel Timer/Scheduler
+#
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_TICKSOURCE_GPTMR0 is not set
+CONFIG_TICKSOURCE_CORETMR=y
+# CONFIG_CYCLES_CLOCKSOURCE is not set
+# CONFIG_GPTMR0_CLOCKSOURCE is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+
+#
+# Misc
+#
+CONFIG_BFIN_SCRATCH_REG_RETN=y
+# CONFIG_BFIN_SCRATCH_REG_RETE is not set
+# CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
+
+#
+# Blackfin Kernel Optimizations
+#
+
+#
+# Memory Optimizations
+#
+CONFIG_I_ENTRY_L1=y
+CONFIG_EXCPT_IRQ_SYSC_L1=y
+CONFIG_DO_IRQ_L1=y
+CONFIG_CORE_TIMER_IRQ_L1=y
+CONFIG_IDLE_L1=y
+# CONFIG_SCHEDULE_L1 is not set
+CONFIG_ARITHMETIC_OPS_L1=y
+CONFIG_ACCESS_OK_L1=y
+# CONFIG_MEMSET_L1 is not set
+# CONFIG_MEMCPY_L1 is not set
+# CONFIG_SYS_BFIN_SPINLOCK_L1 is not set
+# CONFIG_IP_CHECKSUM_L1 is not set
+CONFIG_CACHELINE_ALIGNED_L1=y
+# CONFIG_SYSCALL_TAB_L1 is not set
+# CONFIG_CPLB_SWITCH_TAB_L1 is not set
+CONFIG_APP_STACK_L1=y
+
+#
+# Speed Optimizations
+#
+CONFIG_BFIN_INS_LOWOVERHEAD=y
+CONFIG_RAMKERNEL=y
+# CONFIG_ROMKERNEL is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_VIRT_TO_BUS=y
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
+CONFIG_BFIN_GPTIMERS=y
+# CONFIG_DMA_UNCACHED_4M is not set
+# CONFIG_DMA_UNCACHED_2M is not set
+CONFIG_DMA_UNCACHED_1M=y
+# CONFIG_DMA_UNCACHED_512K is not set
+# CONFIG_DMA_UNCACHED_256K is not set
+# CONFIG_DMA_UNCACHED_128K is not set
+# CONFIG_DMA_UNCACHED_NONE is not set
+
+#
+# Cache Support
+#
+CONFIG_BFIN_ICACHE=y
+CONFIG_BFIN_EXTMEM_ICACHEABLE=y
+CONFIG_BFIN_DCACHE=y
+# CONFIG_BFIN_DCACHE_BANKA is not set
+CONFIG_BFIN_EXTMEM_DCACHEABLE=y
+CONFIG_BFIN_EXTMEM_WRITEBACK=y
+# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
+
+#
+# Memory Protection Unit
+#
+# CONFIG_MPU is not set
+
+#
+# Asynchronous Memory Configuration
+#
+
+#
+# EBIU_AMGCTL Global Control
+#
+CONFIG_C_AMCKEN=y
+CONFIG_C_CDPRIO=y
+# CONFIG_C_AMBEN is not set
+# CONFIG_C_AMBEN_B0 is not set
+# CONFIG_C_AMBEN_B0_B1 is not set
+# CONFIG_C_AMBEN_B0_B1_B2 is not set
+CONFIG_C_AMBEN_ALL=y
+
+#
+# EBIU_AMBCTL Control
+#
+CONFIG_BANK_0=0x7BB0
+CONFIG_BANK_1=0x7BB0
+CONFIG_BANK_2=0x7BB0
+CONFIG_BANK_3=0x99B2
+
+#
+# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF_FDPIC=y
+CONFIG_BINFMT_FLAT=y
+CONFIG_BINFMT_ZFLAT=y
+# CONFIG_BINFMT_SHARED_FLAT is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETLABEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+CONFIG_IRDA=m
+
+#
+# IrDA protocols
+#
+CONFIG_IRLAN=m
+CONFIG_IRCOMM=m
+# CONFIG_IRDA_ULTRA is not set
+
+#
+# IrDA options
+#
+# CONFIG_IRDA_CACHE_LAST_LSAP is not set
+# CONFIG_IRDA_FAST_RR is not set
+# CONFIG_IRDA_DEBUG is not set
+
+#
+# Infrared-port device drivers
+#
+
+#
+# SIR device drivers
+#
+CONFIG_IRTTY_SIR=m
+CONFIG_BFIN_SIR=m
+CONFIG_BFIN_SIR0=y
+CONFIG_SIR_BFIN_DMA=y
+# CONFIG_SIR_BFIN_PIO is not set
+
+#
+# Dongle support
+#
+# CONFIG_DONGLE is not set
+# CONFIG_KINGSUN_DONGLE is not set
+# CONFIG_KSDAZZLE_DONGLE is not set
+# CONFIG_KS959_DONGLE is not set
+
+#
+# FIR device drivers
+#
+# CONFIG_USB_IRDA is not set
+# CONFIG_SIGMATEL_FIR is not set
+# CONFIG_MCS_FIR is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=m
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+CONFIG_MTD_JEDECPROBE=m
+CONFIG_MTD_GEN_PROBE=m
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_RAM=y
+CONFIG_MTD_ROM=m
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+# CONFIG_MTD_PHYSMAP is not set
+# CONFIG_MTD_GPIO_ADDR is not set
+# CONFIG_MTD_UCLINUX is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+CONFIG_MTD_M25P80=y
+CONFIG_M25PXX_USE_FAST_READ=y
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=m
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=m
+# CONFIG_MTD_NAND_BF5XX is not set
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_AD525X_DPOT is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_SCSI_PROC_FS is not set
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=m
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+CONFIG_BFIN_MAC=y
+CONFIG_BFIN_MAC_USE_L1=y
+CONFIG_BFIN_TX_DESC_NUM=10
+CONFIG_BFIN_RX_DESC_NUM=20
+CONFIG_BFIN_MAC_RMII=y
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_ADF702X is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+CONFIG_INPUT_FF_MEMLESS=m
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ADP5520=y
+# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_LM8323 is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+CONFIG_TOUCHSCREEN_AD7879_I2C=y
+CONFIG_TOUCHSCREEN_AD7879=y
+# CONFIG_TOUCHSCREEN_EETI is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_WM97XX is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_ATI_REMOTE is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+# CONFIG_INPUT_CM109 is not set
+# CONFIG_INPUT_UINPUT is not set
+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
+# CONFIG_INPUT_BFIN_ROTARY is not set
+# CONFIG_INPUT_AD714X is not set
+# CONFIG_INPUT_ADXL34X is not set
+# CONFIG_INPUT_PCF8574 is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_BFIN_DMA_INTERFACE=m
+# CONFIG_BFIN_PPI is not set
+# CONFIG_BFIN_PPIFCD is not set
+# CONFIG_BFIN_SIMPLE_TIMER is not set
+# CONFIG_BFIN_SPI_ADC is not set
+CONFIG_BFIN_SPORT=m
+# CONFIG_BFIN_TWI_LCD is not set
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_DEVKMEM is not set
+CONFIG_BFIN_JTAG_COMM=m
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+CONFIG_SERIAL_BFIN=y
+CONFIG_SERIAL_BFIN_CONSOLE=y
+CONFIG_SERIAL_BFIN_DMA=y
+# CONFIG_SERIAL_BFIN_PIO is not set
+# CONFIG_SERIAL_BFIN_UART0 is not set
+CONFIG_SERIAL_BFIN_UART1=y
+# CONFIG_BFIN_UART1_CTSRTS is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_BFIN_SPORT is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_BFIN_OTP=y
+# CONFIG_BFIN_OTP_WRITE_ENABLE is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+CONFIG_I2C_CHARDEV=m
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+CONFIG_I2C_BLACKFIN_TWI=y
+CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_BFIN=y
+# CONFIG_SPI_BFIN_LOCK is not set
+# CONFIG_SPI_BFIN_SPORT is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5520 is not set
+# CONFIG_GPIO_ADP5588 is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+
+#
+# AC97 GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_BFIN_WDT=y
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_UCB1400_CORE is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+CONFIG_PMIC_ADP5520=y
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_BFIN_T350MCQB is not set
+CONFIG_FB_BFIN_LQ035Q1=y
+# CONFIG_FB_BFIN_7393 is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=m
+# CONFIG_LCD_LMS283GF05 is not set
+# CONFIG_LCD_LTV350QV is not set
+# CONFIG_LCD_ILI9320 is not set
+# CONFIG_LCD_TDO24M is not set
+# CONFIG_LCD_VGG2432A4 is not set
+# CONFIG_LCD_PLATFORM is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=m
+CONFIG_BACKLIGHT_GENERIC=m
+# CONFIG_BACKLIGHT_ADP5520 is not set
+# CONFIG_BACKLIGHT_ADP8870 is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+# CONFIG_LOGO_LINUX_CLUT224 is not set
+# CONFIG_LOGO_BLACKFIN_VGA16 is not set
+CONFIG_LOGO_BLACKFIN_CLUT224=y
+CONFIG_SOUND=m
+# CONFIG_SOUND_OSS_CORE is not set
+CONFIG_SND=m
+CONFIG_SND_TIMER=m
+CONFIG_SND_PCM=m
+CONFIG_SND_JACK=y
+# CONFIG_SND_SEQUENCER is not set
+# CONFIG_SND_MIXER_OSS is not set
+# CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+CONFIG_SND_SPI=y
+
+#
+# ALSA Blackfin devices
+#
+# CONFIG_SND_BFIN_AD73322 is not set
+CONFIG_SND_USB=y
+# CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_CAIAQ is not set
+CONFIG_SND_SOC=m
+CONFIG_SND_SOC_AC97_BUS=y
+CONFIG_SND_BF5XX_I2S=m
+CONFIG_SND_BF5XX_SOC_SSM2602=m
+# CONFIG_SND_BF5XX_SOC_AD73311 is not set
+# CONFIG_SND_BF5XX_SOC_ADAU1371 is not set
+# CONFIG_SND_BF5XX_SOC_ADAU1761 is not set
+# CONFIG_SND_BF5XX_TDM is not set
+CONFIG_SND_BF5XX_AC97=m
+CONFIG_SND_BF5XX_MMAP_SUPPORT=y
+# CONFIG_SND_BF5XX_MULTICHAN_SUPPORT is not set
+# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set
+CONFIG_SND_BF5XX_SOC_AD1980=m
+CONFIG_SND_BF5XX_SOC_SPORT=m
+CONFIG_SND_BF5XX_SOC_I2S=m
+CONFIG_SND_BF5XX_SOC_AC97=m
+CONFIG_SND_BF5XX_SPORT_NUM=0
+CONFIG_SND_SOC_I2C_AND_SPI=m
+# CONFIG_SND_SOC_ALL_CODECS is not set
+CONFIG_SND_SOC_AD1980=m
+CONFIG_SND_SOC_SSM2602=m
+# CONFIG_SOUND_PRIME is not set
+CONFIG_AC97_BUS=m
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+CONFIG_HID_A4TECH=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_BELKIN=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+CONFIG_HID_CYPRESS=y
+# CONFIG_HID_DRAGONRISE is not set
+CONFIG_HID_EZKEY=y
+# CONFIG_HID_KYE is not set
+CONFIG_HID_GYRATION=y
+# CONFIG_HID_TWINHAN is not set
+# CONFIG_HID_KENSINGTON is not set
+CONFIG_HID_LOGITECH=y
+# CONFIG_LOGITECH_FF is not set
+# CONFIG_LOGIRUMBLEPAD2_FF is not set
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+# CONFIG_HID_NTRIG is not set
+CONFIG_HID_PANTHERLORD=y
+# CONFIG_PANTHERLORD_FF is not set
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SUNPLUS=y
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_THRUSTMASTER is not set
+# CONFIG_HID_ZEROPLUS is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_DEVICE_CLASS is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+CONFIG_USB_OTG_BLACKLIST_HUB=y
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+CONFIG_USB_MUSB_HDRC=y
+CONFIG_USB_MUSB_SOC=y
+
+#
+# Blackfin high speed USB Support
+#
+CONFIG_USB_MUSB_HOST=y
+# CONFIG_USB_MUSB_PERIPHERAL is not set
+# CONFIG_USB_MUSB_OTG is not set
+CONFIG_USB_MUSB_HDRC_HCD=y
+# CONFIG_MUSB_PIO_ONLY is not set
+CONFIG_USB_INVENTRA_DMA=y
+# CONFIG_USB_TI_CPPI_DMA is not set
+# CONFIG_USB_MUSB_DEBUG is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+CONFIG_USB_OTG_UTILS=y
+# CONFIG_USB_GPIO_VBUS is not set
+CONFIG_NOP_USB_XCEIV=y
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_PCA9532 is not set
+# CONFIG_LEDS_GPIO is not set
+# CONFIG_LEDS_LP3944 is not set
+# CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_DAC124S085 is not set
+# CONFIG_LEDS_BD2802 is not set
+CONFIG_LEDS_ADP5520=y
+
+#
+# LED Triggers
+#
+# CONFIG_LEDS_TRIGGERS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_BFIN=y
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# Firmware Drivers
+#
+# CONFIG_FIRMWARE_MEMMAP is not set
+# CONFIG_SIGMA is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=m
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+# CONFIG_DNOTIFY is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+# CONFIG_ZISOFS is not set
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=m
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=m
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=m
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=m
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+CONFIG_NLS_CODEPAGE_936=m
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=m
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=m
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_SECTION_MISMATCH=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_SHIRQ=y
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_NOMMU_REGIONS is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_FRAME_POINTER is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_BRANCH_PROFILE_NONE is not set
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_VERBOSE=y
+CONFIG_DEBUG_MMRS=y
+CONFIG_DEBUG_HWERR=y
+CONFIG_EXACT_HWERR=y
+CONFIG_DEBUG_DOUBLEFAULT=y
+CONFIG_DEBUG_DOUBLEFAULT_PRINT=y
+# CONFIG_DEBUG_DOUBLEFAULT_RESET is not set
+# CONFIG_DEBUG_ICACHE_CHECK is not set
+CONFIG_DEBUG_HUNT_FOR_ZERO=y
+CONFIG_DEBUG_BFIN_HWTRACE_ON=y
+# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF is not set
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y
+# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=1
+# CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
+CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_CPLB_INFO=y
+CONFIG_ACCESS_CHECK=y
+# CONFIG_BFIN_ISRAM_SELF_TEST is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+CONFIG_SECURITY=y
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_NETWORK is not set
+# CONFIG_SECURITY_PATH is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_SECURITY_ROOTPLUG is not set
+# CONFIG_SECURITY_TOMOYO is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_MANAGER2 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=m
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CRC_ITU_T=m
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=m
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/BF527-EZKIT_defconfig b/arch/blackfin/configs/BF527-EZKIT_defconfig
index 6d1a623fb14..edbb44d26bb 100644
--- a/arch/blackfin/configs/BF527-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF527-EZKIT_defconfig
@@ -1,22 +1,27 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28.10
-# Thu May 21 05:50:01 2009
+# Linux kernel version: 2.6.32.2
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 CONFIG_BLACKFIN=y
+CONFIG_GENERIC_CSUM=y
+CONFIG_GENERIC_BUG=y
 CONFIG_ZONE_DMA=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -26,22 +31,41 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CGROUPS is not set
 # CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
 # CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -62,6 +86,10 @@ CONFIG_EPOLL=y
 # CONFIG_TIMERFD is not set
 # CONFIG_EVENTFD is not set
 # CONFIG_AIO is not set
+
+#
+# Kernel Performance Events And Counters
+#
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
@@ -69,11 +97,15 @@ CONFIG_SLAB=y
 # CONFIG_SLOB is not set
 CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_SLOW_WORK is not set
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -81,11 +113,8 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
+# CONFIG_LBDAF is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -101,7 +130,6 @@ CONFIG_DEFAULT_AS=y
 # CONFIG_DEFAULT_CFQ is not set
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="anticipatory"
-CONFIG_CLASSIC_RCU=y
 # CONFIG_PREEMPT_NONE is not set
 CONFIG_PREEMPT_VOLUNTARY=y
 # CONFIG_PREEMPT is not set
@@ -132,29 +160,28 @@ CONFIG_BF527=y
 # CONFIG_BF537 is not set
 # CONFIG_BF538 is not set
 # CONFIG_BF539 is not set
-# CONFIG_BF542 is not set
+# CONFIG_BF542_std is not set
 # CONFIG_BF542M is not set
-# CONFIG_BF544 is not set
+# CONFIG_BF544_std is not set
 # CONFIG_BF544M is not set
-# CONFIG_BF547 is not set
+# CONFIG_BF547_std is not set
 # CONFIG_BF547M is not set
-# CONFIG_BF548 is not set
+# CONFIG_BF548_std is not set
 # CONFIG_BF548M is not set
-# CONFIG_BF549 is not set
+# CONFIG_BF549_std is not set
 # CONFIG_BF549M is not set
 # CONFIG_BF561 is not set
 CONFIG_BF_REV_MIN=0
 CONFIG_BF_REV_MAX=2
 # CONFIG_BF_REV_0_0 is not set
-# CONFIG_BF_REV_0_1 is not set
-CONFIG_BF_REV_0_2=y
+CONFIG_BF_REV_0_1=y
+# CONFIG_BF_REV_0_2 is not set
 # CONFIG_BF_REV_0_3 is not set
 # CONFIG_BF_REV_0_4 is not set
 # CONFIG_BF_REV_0_5 is not set
 # CONFIG_BF_REV_0_6 is not set
 # CONFIG_BF_REV_ANY is not set
 # CONFIG_BF_REV_NONE is not set
-CONFIG_BF52x=y
 CONFIG_MEM_MT48LC32M16A2TG_75=y
 CONFIG_IRQ_PLL_WAKEUP=7
 CONFIG_IRQ_DMA0_ERROR=7
@@ -200,7 +227,9 @@ CONFIG_IRQ_MEM_DMA1=13
 CONFIG_IRQ_WATCH=13
 CONFIG_IRQ_PORTF_INTA=13
 CONFIG_IRQ_PORTF_INTB=13
+CONFIG_BF52x=y
 CONFIG_BFIN527_EZKIT=y
+# CONFIG_BFIN527_EZKIT_V2 is not set
 # CONFIG_BFIN527_BLUETECHNIX_CM is not set
 # CONFIG_BFIN526_EZBRD is not set
 
@@ -318,7 +347,6 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
@@ -327,16 +355,18 @@ CONFIG_BFIN_GPTIMERS=y
 # CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
 CONFIG_DMA_UNCACHED_1M=y
+# CONFIG_DMA_UNCACHED_512K is not set
+# CONFIG_DMA_UNCACHED_256K is not set
+# CONFIG_DMA_UNCACHED_128K is not set
 # CONFIG_DMA_UNCACHED_NONE is not set
 
 #
 # Cache Support
 #
 CONFIG_BFIN_ICACHE=y
-# CONFIG_BFIN_ICACHE_LOCK is not set
+CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_DCACHE_BANKA is not set
-CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_EXTMEM_DCACHEABLE=y
 CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
@@ -347,7 +377,7 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_MPU is not set
 
 #
-# Asynchonous Memory Configuration
+# Asynchronous Memory Configuration
 #
 
 #
@@ -403,11 +433,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-# CONFIG_XFRM_SUB_POLICY is not set
-# CONFIG_XFRM_MIGRATE is not set
-# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
@@ -431,7 +456,6 @@ CONFIG_IP_PNP=y
 # CONFIG_INET_XFRM_MODE_BEET is not set
 # CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
-CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_CUBIC=y
 CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -442,6 +466,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -455,7 +480,10 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
 # CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
 
 #
 # Network testing
@@ -508,13 +536,8 @@ CONFIG_SIR_BFIN_DMA=y
 # CONFIG_MCS_FIR is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-# CONFIG_PHONET is not set
-CONFIG_WIRELESS=y
-# CONFIG_CFG80211 is not set
-CONFIG_WIRELESS_OLD_REGULATORY=y
-# CONFIG_WIRELESS_EXT is not set
-# CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
 
@@ -535,6 +558,7 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
@@ -593,6 +617,7 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
 # CONFIG_MTD_DATAFLASH is not set
 CONFIG_MTD_M25P80=y
 CONFIG_M25PXX_USE_FAST_READ=y
+# CONFIG_MTD_SST25L is not set
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
@@ -608,11 +633,6 @@ CONFIG_MTD_NAND=m
 # CONFIG_MTD_NAND_VERIFY_WRITE is not set
 # CONFIG_MTD_NAND_ECC_SMC is not set
 # CONFIG_MTD_NAND_MUSEUM_IDS is not set
-CONFIG_MTD_NAND_BFIN=m
-CONFIG_BFIN_NAND_BASE=0x20212000
-CONFIG_BFIN_NAND_CLE=2
-CONFIG_BFIN_NAND_ALE=1
-CONFIG_BFIN_NAND_READY=3
 CONFIG_MTD_NAND_IDS=m
 # CONFIG_MTD_NAND_BF5XX is not set
 # CONFIG_MTD_NAND_DISKONCHIP is not set
@@ -622,6 +642,11 @@ CONFIG_MTD_NAND_IDS=m
 # CONFIG_MTD_ONENAND is not set
 
 #
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
@@ -639,10 +664,20 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
 # CONFIG_ATA_OVER_ETH is not set
 # CONFIG_BLK_DEV_HD is not set
 CONFIG_MISC_DEVICES=y
-# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_AD525X_DPOT is not set
 # CONFIG_ICS932S401 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_ISL29003 is not set
 # CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
 CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
 
@@ -666,10 +701,6 @@ CONFIG_BLK_DEV_SR=m
 # CONFIG_BLK_DEV_SR_VENDOR is not set
 # CONFIG_CHR_DEV_SG is not set
 # CONFIG_CHR_DEV_SCH is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
 # CONFIG_SCSI_MULTI_LUN is not set
 # CONFIG_SCSI_CONSTANTS is not set
 # CONFIG_SCSI_LOGGING is not set
@@ -686,6 +717,7 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_SRP_ATTRS is not set
 # CONFIG_SCSI_LOWLEVEL is not set
 # CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
 # CONFIG_ATA is not set
 # CONFIG_MD is not set
 CONFIG_NETDEVICES=y
@@ -710,6 +742,9 @@ CONFIG_PHYLIB=y
 # CONFIG_BROADCOM_PHY is not set
 # CONFIG_ICPLUS_PHY is not set
 # CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
 # CONFIG_FIXED_PHY is not set
 # CONFIG_MDIO_BITBANG is not set
 CONFIG_NET_ETHERNET=y
@@ -720,9 +755,12 @@ CONFIG_BFIN_TX_DESC_NUM=10
 CONFIG_BFIN_RX_DESC_NUM=20
 CONFIG_BFIN_MAC_RMII=y
 # CONFIG_SMC91X is not set
-# CONFIG_SMSC911X is not set
 # CONFIG_DM9000 is not set
 # CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_ADF702X is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -731,15 +769,16 @@ CONFIG_BFIN_MAC_RMII=y
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
 
 #
-# Wireless LAN
+# Enable WiMAX (Networking options) to see the WiMAX drivers
 #
-# CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
-# CONFIG_IWLWIFI_LEDS is not set
 
 #
 # USB Network Adapters
@@ -789,7 +828,11 @@ CONFIG_INPUT_MISC=y
 # CONFIG_INPUT_YEALINK is not set
 # CONFIG_INPUT_CM109 is not set
 # CONFIG_INPUT_UINPUT is not set
-# CONFIG_CONFIG_INPUT_PCF8574 is not set
+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
+# CONFIG_INPUT_BFIN_ROTARY is not set
+# CONFIG_INPUT_AD714X is not set
+# CONFIG_INPUT_ADXL34X is not set
+# CONFIG_INPUT_PCF8574 is not set
 
 #
 # Hardware I/O ports
@@ -800,16 +843,13 @@ CONFIG_INPUT_MISC=y
 #
 # Character devices
 #
-# CONFIG_AD9960 is not set
 CONFIG_BFIN_DMA_INTERFACE=m
 # CONFIG_BFIN_PPI is not set
 # CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
 # CONFIG_BFIN_SPI_ADC is not set
 CONFIG_BFIN_SPORT=m
-# CONFIG_BFIN_TIMER_LATENCY is not set
 # CONFIG_BFIN_TWI_LCD is not set
-CONFIG_SIMPLE_GPIO=m
 CONFIG_VT=y
 CONFIG_CONSOLE_TRANSLATIONS=y
 CONFIG_VT_CONSOLE=y
@@ -827,6 +867,7 @@ CONFIG_BFIN_JTAG_COMM=m
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_MAX3100 is not set
 CONFIG_SERIAL_BFIN=y
 CONFIG_SERIAL_BFIN_CONSOLE=y
 CONFIG_SERIAL_BFIN_DMA=y
@@ -838,14 +879,10 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_BFIN_SPORT is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
 CONFIG_BFIN_OTP=y
 # CONFIG_BFIN_OTP_WRITE_ENABLE is not set
-
-#
-# CAN, the car bus and industrial fieldbus
-#
-# CONFIG_CAN4LINUX is not set
 # CONFIG_IPMI_HANDLER is not set
 # CONFIG_HW_RANDOM is not set
 # CONFIG_R3964 is not set
@@ -853,6 +890,7 @@ CONFIG_BFIN_OTP=y
 # CONFIG_TCG_TPM is not set
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 CONFIG_I2C_CHARDEV=m
 CONFIG_I2C_HELPER_AUTO=y
 
@@ -886,14 +924,6 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_EEPROM_AT24 is not set
-# CONFIG_SENSORS_AD5252 is not set
-# CONFIG_EEPROM_LEGACY is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
@@ -910,13 +940,18 @@ CONFIG_SPI_BFIN=y
 # CONFIG_SPI_BFIN_LOCK is not set
 # CONFIG_SPI_BFIN_SPORT is not set
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
 
 #
 # SPI Protocol Masters
 #
-# CONFIG_EEPROM_AT25 is not set
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
 CONFIG_GPIOLIB=y
 # CONFIG_DEBUG_GPIO is not set
@@ -932,6 +967,7 @@ CONFIG_GPIO_SYSFS=y
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -942,11 +978,15 @@ CONFIG_GPIO_SYSFS=y
 #
 # CONFIG_GPIO_MAX7301 is not set
 # CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+
+#
+# AC97 GPIO expanders:
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 CONFIG_WATCHDOG=y
 # CONFIG_WATCHDOG_NOWAYOUT is not set
 
@@ -973,28 +1013,21 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_UCB1400_CORE is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_EZX_PCAP is not set
 # CONFIG_REGULATOR is not set
-
-#
-# Multimedia devices
-#
-
-#
-# Multimedia core support
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_DVB_CORE is not set
-# CONFIG_VIDEO_MEDIA is not set
-
-#
-# Multimedia drivers
-#
-# CONFIG_DAB is not set
+# CONFIG_MEDIA_SUPPORT is not set
 
 #
 # Graphics support
@@ -1030,15 +1063,18 @@ CONFIG_FB_BFIN_T350MCQB=y
 # CONFIG_FB_VIRTUAL is not set
 # CONFIG_FB_METRONOME is not set
 # CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
 CONFIG_BACKLIGHT_LCD_SUPPORT=y
 CONFIG_LCD_CLASS_DEVICE=m
+# CONFIG_LCD_LMS283GF05 is not set
 CONFIG_LCD_LTV350QV=m
 # CONFIG_LCD_ILI9320 is not set
 # CONFIG_LCD_TDO24M is not set
 # CONFIG_LCD_VGG2432A4 is not set
 # CONFIG_LCD_PLATFORM is not set
 CONFIG_BACKLIGHT_CLASS_DEVICE=m
-# CONFIG_BACKLIGHT_CORGI is not set
+CONFIG_BACKLIGHT_GENERIC=m
+# CONFIG_BACKLIGHT_ADP8870 is not set
 
 #
 # Display device support
@@ -1066,6 +1102,7 @@ CONFIG_SOUND=m
 CONFIG_SND=m
 CONFIG_SND_TIMER=m
 CONFIG_SND_PCM=m
+CONFIG_SND_JACK=y
 # CONFIG_SND_SEQUENCER is not set
 # CONFIG_SND_MIXER_OSS is not set
 # CONFIG_SND_PCM_OSS is not set
@@ -1074,6 +1111,11 @@ CONFIG_SND_SUPPORT_OLD_API=y
 CONFIG_SND_VERBOSE_PROCFS=y
 # CONFIG_SND_VERBOSE_PRINTK is not set
 # CONFIG_SND_DEBUG is not set
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
 CONFIG_SND_DRIVERS=y
 # CONFIG_SND_DUMMY is not set
 # CONFIG_SND_MTPAV is not set
@@ -1084,7 +1126,6 @@ CONFIG_SND_SPI=y
 #
 # ALSA Blackfin devices
 #
-# CONFIG_SND_BLACKFIN_AD1836 is not set
 # CONFIG_SND_BFIN_AD73322 is not set
 CONFIG_SND_USB=y
 # CONFIG_SND_USB_AUDIO is not set
@@ -1094,15 +1135,19 @@ CONFIG_SND_SOC_AC97_BUS=y
 CONFIG_SND_BF5XX_I2S=m
 CONFIG_SND_BF5XX_SOC_SSM2602=m
 # CONFIG_SND_BF5XX_SOC_AD73311 is not set
+# CONFIG_SND_BF5XX_SOC_ADAU1371 is not set
+# CONFIG_SND_BF5XX_SOC_ADAU1761 is not set
+# CONFIG_SND_BF5XX_TDM is not set
 CONFIG_SND_BF5XX_AC97=m
 CONFIG_SND_BF5XX_MMAP_SUPPORT=y
 # CONFIG_SND_BF5XX_MULTICHAN_SUPPORT is not set
+# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set
+CONFIG_SND_BF5XX_SOC_AD1980=m
 CONFIG_SND_BF5XX_SOC_SPORT=m
 CONFIG_SND_BF5XX_SOC_I2S=m
 CONFIG_SND_BF5XX_SOC_AC97=m
-CONFIG_SND_BF5XX_SOC_AD1980=m
 CONFIG_SND_BF5XX_SPORT_NUM=0
-# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set
+CONFIG_SND_SOC_I2C_AND_SPI=m
 # CONFIG_SND_SOC_ALL_CODECS is not set
 CONFIG_SND_SOC_AD1980=m
 CONFIG_SND_SOC_SSM2602=m
@@ -1110,7 +1155,6 @@ CONFIG_SND_SOC_SSM2602=m
 CONFIG_AC97_BUS=m
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 
 #
@@ -1123,30 +1167,35 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
-CONFIG_HID_BRIGHT=y
 CONFIG_HID_CHERRY=y
 CONFIG_HID_CHICONY=y
 CONFIG_HID_CYPRESS=y
-CONFIG_HID_DELL=y
+# CONFIG_HID_DRAGONRISE is not set
 CONFIG_HID_EZKEY=y
+# CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=y
+# CONFIG_HID_TWINHAN is not set
+# CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
 CONFIG_HID_MICROSOFT=y
 CONFIG_HID_MONTEREY=y
+# CONFIG_HID_NTRIG is not set
 CONFIG_HID_PANTHERLORD=y
 # CONFIG_PANTHERLORD_FF is not set
 CONFIG_HID_PETALYNX=y
 CONFIG_HID_SAMSUNG=y
 CONFIG_HID_SONY=y
 CONFIG_HID_SUNPLUS=y
-CONFIG_THRUSTMASTER_FF=m
-CONFIG_ZEROPLUS_FF=m
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_THRUSTMASTER is not set
+# CONFIG_HID_ZEROPLUS is not set
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 # CONFIG_USB_ARCH_HAS_OHCI is not set
@@ -1172,6 +1221,7 @@ CONFIG_USB_MON=y
 # USB Host Controller Drivers
 #
 # CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
 # CONFIG_USB_ISP1362_HCD is not set
@@ -1188,9 +1238,7 @@ CONFIG_USB_MUSB_HOST=y
 # CONFIG_USB_MUSB_PERIPHERAL is not set
 # CONFIG_USB_MUSB_OTG is not set
 CONFIG_USB_MUSB_HDRC_HCD=y
-# CONFIG_MUSB_PIO_ONLY is not set
-CONFIG_USB_INVENTRA_DMA=y
-# CONFIG_USB_TI_CPPI_DMA is not set
+CONFIG_MUSB_PIO_ONLY=y
 # CONFIG_USB_MUSB_DEBUG is not set
 
 #
@@ -1202,18 +1250,17 @@ CONFIG_USB_INVENTRA_DMA=y
 # CONFIG_USB_TMC is not set
 
 #
-# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
 #
 
 #
-# see USB_STORAGE Help for more information
+# also be needed; see USB_STORAGE Help for more info
 #
 CONFIG_USB_STORAGE=y
 # CONFIG_USB_STORAGE_DEBUG is not set
 # CONFIG_USB_STORAGE_DATAFAB is not set
 # CONFIG_USB_STORAGE_FREECOM is not set
 # CONFIG_USB_STORAGE_ISD200 is not set
-# CONFIG_USB_STORAGE_DPCM is not set
 # CONFIG_USB_STORAGE_USBAT is not set
 # CONFIG_USB_STORAGE_SDDR09 is not set
 # CONFIG_USB_STORAGE_SDDR55 is not set
@@ -1249,7 +1296,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
-# CONFIG_USB_PHIDGET is not set
 # CONFIG_USB_IDMOUSE is not set
 # CONFIG_USB_FTDI_ELAN is not set
 # CONFIG_USB_APPLEDISPLAY is not set
@@ -1261,6 +1307,13 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_ISIGHTFW is not set
 # CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+CONFIG_USB_OTG_UTILS=y
+# CONFIG_USB_GPIO_VBUS is not set
+CONFIG_NOP_USB_XCEIV=y
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
@@ -1296,6 +1349,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
 
 #
 # SPI RTC drivers
@@ -1307,6 +1361,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_R9701 is not set
 # CONFIG_RTC_DRV_RS5C348 is not set
 # CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
 
 #
 # Platform RTC drivers
@@ -1327,10 +1382,21 @@ CONFIG_RTC_INTF_DEV=y
 #
 CONFIG_RTC_DRV_BFIN=y
 # CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
 # CONFIG_STAGING is not set
 
 #
+# Firmware Drivers
+#
+# CONFIG_FIRMWARE_MEMMAP is not set
+# CONFIG_SIGMA is not set
+
+#
 # File systems
 #
 CONFIG_EXT2_FS=m
@@ -1340,9 +1406,13 @@ CONFIG_EXT2_FS=m
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
-CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -1352,6 +1422,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 CONFIG_ISO9660_FS=m
@@ -1376,13 +1451,9 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
 CONFIG_SYSFS=y
-# CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -1401,17 +1472,8 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
-CONFIG_YAFFS_FS=m
-CONFIG_YAFFS_YAFFS1=y
-# CONFIG_YAFFS_9BYTE_TAGS is not set
-# CONFIG_YAFFS_DOES_ECC is not set
-CONFIG_YAFFS_YAFFS2=y
-CONFIG_YAFFS_AUTO_YAFFS2=y
-# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
-# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
-# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
-CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
@@ -1430,7 +1492,6 @@ CONFIG_LOCKD=m
 CONFIG_LOCKD_V4=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=m
-# CONFIG_SUNRPC_REGISTER_V4 is not set
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 CONFIG_SMB_FS=m
@@ -1445,7 +1506,7 @@ CONFIG_SMB_FS=m
 #
 # CONFIG_PARTITION_ADVANCED is not set
 CONFIG_MSDOS_PARTITION=y
-CONFIG_NLS=m
+CONFIG_NLS=y
 CONFIG_NLS_DEFAULT="iso8859-1"
 CONFIG_NLS_CODEPAGE_437=m
 # CONFIG_NLS_CODEPAGE_737 is not set
@@ -1495,14 +1556,19 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_SECTION_MISMATCH=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
@@ -1510,31 +1576,39 @@ CONFIG_SCHED_DEBUG=y
 # CONFIG_DEBUG_SLAB is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
 # CONFIG_DEBUG_KOBJECT is not set
 CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_NOMMU_REGIONS is not set
 # CONFIG_DEBUG_WRITECOUNT is not set
 # CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_FRAME_POINTER is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
-
-#
-# Tracers
-#
-# CONFIG_SCHED_TRACER is not set
-# CONFIG_CONTEXT_SWITCH_TRACER is not set
-# CONFIG_BOOT_TRACER is not set
-# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_BRANCH_PROFILE_NONE is not set
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_DYNAMIC_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -1559,6 +1633,7 @@ CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
+# CONFIG_BFIN_ISRAM_SELF_TEST is not set
 
 #
 # Security options
@@ -1567,15 +1642,15 @@ CONFIG_ACCESS_CHECK=y
 CONFIG_SECURITY=y
 # CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_NETWORK is not set
+# CONFIG_SECURITY_PATH is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
 # CONFIG_SECURITY_ROOTPLUG is not set
-CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
+# CONFIG_SECURITY_TOMOYO is not set
 CONFIG_CRYPTO=y
 
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -1607,11 +1682,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1648,6 +1725,7 @@ CONFIG_CRYPTO=y
 # Compression
 #
 # CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
 # CONFIG_CRYPTO_LZO is not set
 
 #
@@ -1655,11 +1733,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_CRC_CCITT=m
 # CONFIG_CRC16 is not set
 # CONFIG_CRC_T10DIF is not set
@@ -1669,6 +1749,8 @@ CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=m
+CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/BF533-EZKIT_defconfig b/arch/blackfin/configs/BF533-EZKIT_defconfig
index 50f9a23ccdb..0b13d5836a4 100644
--- a/arch/blackfin/configs/BF533-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF533-EZKIT_defconfig
@@ -1,22 +1,27 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28.10
-# Thu May 21 05:50:01 2009
+# Linux kernel version: 2.6.32.2
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 CONFIG_BLACKFIN=y
+CONFIG_GENERIC_CSUM=y
+CONFIG_GENERIC_BUG=y
 CONFIG_ZONE_DMA=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -26,22 +31,41 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CGROUPS is not set
 # CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
 # CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -62,6 +86,10 @@ CONFIG_EPOLL=y
 # CONFIG_TIMERFD is not set
 # CONFIG_EVENTFD is not set
 # CONFIG_AIO is not set
+
+#
+# Kernel Performance Events And Counters
+#
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
@@ -69,11 +97,15 @@ CONFIG_SLAB=y
 # CONFIG_SLOB is not set
 CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_SLOW_WORK is not set
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -81,11 +113,8 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
+# CONFIG_LBDAF is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -101,7 +130,6 @@ CONFIG_DEFAULT_AS=y
 # CONFIG_DEFAULT_CFQ is not set
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="anticipatory"
-CONFIG_CLASSIC_RCU=y
 # CONFIG_PREEMPT_NONE is not set
 CONFIG_PREEMPT_VOLUNTARY=y
 # CONFIG_PREEMPT is not set
@@ -132,15 +160,15 @@ CONFIG_BF533=y
 # CONFIG_BF537 is not set
 # CONFIG_BF538 is not set
 # CONFIG_BF539 is not set
-# CONFIG_BF542 is not set
+# CONFIG_BF542_std is not set
 # CONFIG_BF542M is not set
-# CONFIG_BF544 is not set
+# CONFIG_BF544_std is not set
 # CONFIG_BF544M is not set
-# CONFIG_BF547 is not set
+# CONFIG_BF547_std is not set
 # CONFIG_BF547M is not set
-# CONFIG_BF548 is not set
+# CONFIG_BF548_std is not set
 # CONFIG_BF548M is not set
-# CONFIG_BF549 is not set
+# CONFIG_BF549_std is not set
 # CONFIG_BF549M is not set
 # CONFIG_BF561 is not set
 CONFIG_BF_REV_MIN=3
@@ -228,7 +256,7 @@ CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 # CONFIG_TICKSOURCE_GPTMR0 is not set
 CONFIG_TICKSOURCE_CORETMR=y
-# CONFIG_CYCLES_CLOCKSOURCE is not set
+CONFIG_CYCLES_CLOCKSOURCE=y
 # CONFIG_GPTMR0_CLOCKSOURCE is not set
 CONFIG_TICK_ONESHOT=y
 # CONFIG_NO_HZ is not set
@@ -280,7 +308,6 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
@@ -289,19 +316,18 @@ CONFIG_BFIN_GPTIMERS=m
 # CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
 CONFIG_DMA_UNCACHED_1M=y
+# CONFIG_DMA_UNCACHED_512K is not set
+# CONFIG_DMA_UNCACHED_256K is not set
+# CONFIG_DMA_UNCACHED_128K is not set
 # CONFIG_DMA_UNCACHED_NONE is not set
 
 #
 # Cache Support
 #
-#
-# Cache Support
-#
 CONFIG_BFIN_ICACHE=y
-# CONFIG_BFIN_ICACHE_LOCK is not set
+CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_DCACHE_BANKA is not set
-CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_EXTMEM_DCACHEABLE=y
 CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
@@ -312,7 +338,7 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_MPU is not set
 
 #
-# Asynchonous Memory Configuration
+# Asynchronous Memory Configuration
 #
 
 #
@@ -358,6 +384,7 @@ CONFIG_PM=y
 CONFIG_PM_SLEEP=y
 CONFIG_SUSPEND=y
 CONFIG_SUSPEND_FREEZER=y
+# CONFIG_PM_RUNTIME is not set
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_PM_BFIN_SLEEP_DEEPER=y
 # CONFIG_PM_BFIN_SLEEP is not set
@@ -379,11 +406,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-# CONFIG_XFRM_SUB_POLICY is not set
-# CONFIG_XFRM_MIGRATE is not set
-# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
@@ -407,7 +429,6 @@ CONFIG_IP_PNP=y
 # CONFIG_INET_XFRM_MODE_BEET is not set
 # CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
-CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_CUBIC=y
 CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -418,6 +439,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -431,7 +453,10 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
 # CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
 
 #
 # Network testing
@@ -475,13 +500,8 @@ CONFIG_IRTTY_SIR=m
 #
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-# CONFIG_PHONET is not set
-CONFIG_WIRELESS=y
-# CONFIG_CFG80211 is not set
-CONFIG_WIRELESS_OLD_REGULATORY=y
-# CONFIG_WIRELESS_EXT is not set
-# CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
 
@@ -502,6 +522,7 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
@@ -559,6 +580,7 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
 #
 # CONFIG_MTD_DATAFLASH is not set
 # CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SST25L is not set
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
@@ -574,6 +596,11 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
 # CONFIG_MTD_ONENAND is not set
 
 #
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
@@ -590,9 +617,14 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
 # CONFIG_ATA_OVER_ETH is not set
 # CONFIG_BLK_DEV_HD is not set
 CONFIG_MISC_DEVICES=y
-# CONFIG_EEPROM_93CX6 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_93CX6 is not set
 CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
 
@@ -616,9 +648,12 @@ CONFIG_NETDEVICES=y
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 CONFIG_SMC91X=y
-# CONFIG_SMSC911X is not set
 # CONFIG_DM9000 is not set
 # CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_ADF702X is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -627,15 +662,16 @@ CONFIG_SMC91X=y
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
 
 #
-# Wireless LAN
+# Enable WiMAX (Networking options) to see the WiMAX drivers
 #
-# CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
-# CONFIG_IWLWIFI_LEDS is not set
 # CONFIG_WAN is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
@@ -679,15 +715,12 @@ CONFIG_INPUT_EVDEV=m
 #
 # Character devices
 #
-# CONFIG_AD9960 is not set
 CONFIG_BFIN_DMA_INTERFACE=m
 # CONFIG_BFIN_PPI is not set
 # CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
 # CONFIG_BFIN_SPI_ADC is not set
 CONFIG_BFIN_SPORT=y
-# CONFIG_BFIN_TIMER_LATENCY is not set
-CONFIG_SIMPLE_GPIO=m
 # CONFIG_VT is not set
 # CONFIG_DEVKMEM is not set
 CONFIG_BFIN_JTAG_COMM=m
@@ -701,6 +734,7 @@ CONFIG_BFIN_JTAG_COMM=m
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_MAX3100 is not set
 CONFIG_SERIAL_BFIN=y
 CONFIG_SERIAL_BFIN_CONSOLE=y
 CONFIG_SERIAL_BFIN_DMA=y
@@ -711,12 +745,8 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_BFIN_SPORT is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
-
-#
-# CAN, the car bus and industrial fieldbus
-#
-# CONFIG_CAN4LINUX is not set
 # CONFIG_IPMI_HANDLER is not set
 # CONFIG_HW_RANDOM is not set
 # CONFIG_R3964 is not set
@@ -734,13 +764,18 @@ CONFIG_SPI_BFIN=y
 # CONFIG_SPI_BFIN_LOCK is not set
 # CONFIG_SPI_BFIN_SPORT is not set
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
 
 #
 # SPI Protocol Masters
 #
-# CONFIG_EEPROM_AT25 is not set
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
 CONFIG_GPIOLIB=y
 # CONFIG_DEBUG_GPIO is not set
@@ -753,9 +788,6 @@ CONFIG_GPIO_SYSFS=y
 #
 # I2C GPIO expanders:
 #
-# CONFIG_GPIO_MAX732X is not set
-# CONFIG_GPIO_PCA953X is not set
-# CONFIG_GPIO_PCF857X is not set
 
 #
 # PCI GPIO expanders:
@@ -766,11 +798,15 @@ CONFIG_GPIO_SYSFS=y
 #
 # CONFIG_GPIO_MAX7301 is not set
 # CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+
+#
+# AC97 GPIO expanders:
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 CONFIG_WATCHDOG=y
 # CONFIG_WATCHDOG_NOWAYOUT is not set
 
@@ -793,23 +829,10 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_EZX_PCAP is not set
 # CONFIG_REGULATOR is not set
-
-#
-# Multimedia devices
-#
-
-#
-# Multimedia core support
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_DVB_CORE is not set
-# CONFIG_VIDEO_MEDIA is not set
-
-#
-# Multimedia drivers
-#
-# CONFIG_DAB is not set
+# CONFIG_MEDIA_SUPPORT is not set
 
 #
 # Graphics support
@@ -826,14 +849,12 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_SOUND is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=m
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 # CONFIG_HID_PID is not set
 
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 # CONFIG_USB_SUPPORT is not set
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
@@ -864,6 +885,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_R9701 is not set
 # CONFIG_RTC_DRV_RS5C348 is not set
 # CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
 
 #
 # Platform RTC drivers
@@ -884,10 +906,20 @@ CONFIG_RTC_INTF_DEV=y
 #
 CONFIG_RTC_DRV_BFIN=y
 # CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
 # CONFIG_STAGING is not set
 
 #
+# Firmware Drivers
+#
+# CONFIG_FIRMWARE_MEMMAP is not set
+
+#
 # File systems
 #
 # CONFIG_EXT2_FS is not set
@@ -896,9 +928,13 @@ CONFIG_RTC_DRV_BFIN=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
-CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -908,6 +944,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -926,13 +967,9 @@ CONFIG_INOTIFY_USER=y
 CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
 CONFIG_SYSFS=y
-# CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -951,17 +988,8 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
-CONFIG_YAFFS_FS=m
-CONFIG_YAFFS_YAFFS1=y
-# CONFIG_YAFFS_9BYTE_TAGS is not set
-# CONFIG_YAFFS_DOES_ECC is not set
-CONFIG_YAFFS_YAFFS2=y
-CONFIG_YAFFS_AUTO_YAFFS2=y
-# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
-# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
-# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
-CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
@@ -980,7 +1008,6 @@ CONFIG_LOCKD=m
 CONFIG_LOCKD_V4=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=m
-# CONFIG_SUNRPC_REGISTER_V4 is not set
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 CONFIG_SMB_FS=m
@@ -1045,14 +1072,19 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_SECTION_MISMATCH=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
@@ -1060,31 +1092,39 @@ CONFIG_SCHED_DEBUG=y
 # CONFIG_DEBUG_SLAB is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
 # CONFIG_DEBUG_KOBJECT is not set
 CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_NOMMU_REGIONS is not set
 # CONFIG_DEBUG_WRITECOUNT is not set
 # CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_FRAME_POINTER is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
-
-#
-# Tracers
-#
-# CONFIG_SCHED_TRACER is not set
-# CONFIG_CONTEXT_SWITCH_TRACER is not set
-# CONFIG_BOOT_TRACER is not set
-# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_BRANCH_PROFILE_NONE is not set
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_DYNAMIC_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -1109,6 +1149,7 @@ CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
+# CONFIG_BFIN_ISRAM_SELF_TEST is not set
 
 #
 # Security options
@@ -1117,14 +1158,14 @@ CONFIG_ACCESS_CHECK=y
 CONFIG_SECURITY=y
 # CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_NETWORK is not set
+# CONFIG_SECURITY_PATH is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
-CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
+# CONFIG_SECURITY_TOMOYO is not set
 CONFIG_CRYPTO=y
 
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -1156,11 +1197,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1197,6 +1240,7 @@ CONFIG_CRYPTO=y
 # Compression
 #
 # CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
 # CONFIG_CRYPTO_LZO is not set
 
 #
@@ -1204,11 +1248,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_CRC_CCITT=m
 # CONFIG_CRC16 is not set
 # CONFIG_CRC_T10DIF is not set
@@ -1218,6 +1264,8 @@ CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=m
+CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/BF533-STAMP_defconfig b/arch/blackfin/configs/BF533-STAMP_defconfig
index 6c60c828631..c3fe6e5b612 100644
--- a/arch/blackfin/configs/BF533-STAMP_defconfig
+++ b/arch/blackfin/configs/BF533-STAMP_defconfig
@@ -1,22 +1,27 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28.10
-# Thu May 21 05:50:01 2009
+# Linux kernel version: 2.6.32.2
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 CONFIG_BLACKFIN=y
+CONFIG_GENERIC_CSUM=y
+CONFIG_GENERIC_BUG=y
 CONFIG_ZONE_DMA=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -26,22 +31,41 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CGROUPS is not set
 # CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
 # CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -62,6 +86,10 @@ CONFIG_EPOLL=y
 # CONFIG_TIMERFD is not set
 # CONFIG_EVENTFD is not set
 # CONFIG_AIO is not set
+
+#
+# Kernel Performance Events And Counters
+#
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
@@ -69,11 +97,15 @@ CONFIG_SLAB=y
 # CONFIG_SLOB is not set
 CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_SLOW_WORK is not set
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -81,11 +113,8 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
+# CONFIG_LBDAF is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -101,7 +130,6 @@ CONFIG_DEFAULT_AS=y
 # CONFIG_DEFAULT_CFQ is not set
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="anticipatory"
-CONFIG_CLASSIC_RCU=y
 # CONFIG_PREEMPT_NONE is not set
 CONFIG_PREEMPT_VOLUNTARY=y
 # CONFIG_PREEMPT is not set
@@ -132,15 +160,15 @@ CONFIG_BF533=y
 # CONFIG_BF537 is not set
 # CONFIG_BF538 is not set
 # CONFIG_BF539 is not set
-# CONFIG_BF542 is not set
+# CONFIG_BF542_std is not set
 # CONFIG_BF542M is not set
-# CONFIG_BF544 is not set
+# CONFIG_BF544_std is not set
 # CONFIG_BF544M is not set
-# CONFIG_BF547 is not set
+# CONFIG_BF547_std is not set
 # CONFIG_BF547M is not set
-# CONFIG_BF548 is not set
+# CONFIG_BF548_std is not set
 # CONFIG_BF548M is not set
-# CONFIG_BF549 is not set
+# CONFIG_BF549_std is not set
 # CONFIG_BF549M is not set
 # CONFIG_BF561 is not set
 CONFIG_BF_REV_MIN=3
@@ -228,7 +256,7 @@ CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 # CONFIG_TICKSOURCE_GPTMR0 is not set
 CONFIG_TICKSOURCE_CORETMR=y
-# CONFIG_CYCLES_CLOCKSOURCE is not set
+CONFIG_CYCLES_CLOCKSOURCE=y
 # CONFIG_GPTMR0_CLOCKSOURCE is not set
 CONFIG_TICK_ONESHOT=y
 # CONFIG_NO_HZ is not set
@@ -280,7 +308,6 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
@@ -289,16 +316,18 @@ CONFIG_BFIN_GPTIMERS=m
 # CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
 CONFIG_DMA_UNCACHED_1M=y
+# CONFIG_DMA_UNCACHED_512K is not set
+# CONFIG_DMA_UNCACHED_256K is not set
+# CONFIG_DMA_UNCACHED_128K is not set
 # CONFIG_DMA_UNCACHED_NONE is not set
 
 #
 # Cache Support
 #
 CONFIG_BFIN_ICACHE=y
-# CONFIG_BFIN_ICACHE_LOCK is not set
+CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_DCACHE_BANKA is not set
-CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_EXTMEM_DCACHEABLE=y
 CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
@@ -309,7 +338,7 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_MPU is not set
 
 #
-# Asynchonous Memory Configuration
+# Asynchronous Memory Configuration
 #
 
 #
@@ -355,6 +384,7 @@ CONFIG_PM=y
 CONFIG_PM_SLEEP=y
 CONFIG_SUSPEND=y
 CONFIG_SUSPEND_FREEZER=y
+# CONFIG_PM_RUNTIME is not set
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_PM_BFIN_SLEEP_DEEPER=y
 # CONFIG_PM_BFIN_SLEEP is not set
@@ -376,11 +406,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-# CONFIG_XFRM_SUB_POLICY is not set
-# CONFIG_XFRM_MIGRATE is not set
-# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
@@ -404,7 +429,6 @@ CONFIG_IP_PNP=y
 # CONFIG_INET_XFRM_MODE_BEET is not set
 # CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
-CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_CUBIC=y
 CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -415,6 +439,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -428,7 +453,10 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
 # CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
 
 #
 # Network testing
@@ -474,13 +502,8 @@ CONFIG_SIR_BFIN_DMA=y
 #
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-# CONFIG_PHONET is not set
-CONFIG_WIRELESS=y
-# CONFIG_CFG80211 is not set
-CONFIG_WIRELESS_OLD_REGULATORY=y
-# CONFIG_WIRELESS_EXT is not set
-# CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
 
@@ -501,6 +524,7 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
@@ -560,6 +584,7 @@ CONFIG_MTD_BFIN_ASYNC=m
 #
 # CONFIG_MTD_DATAFLASH is not set
 # CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SST25L is not set
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
@@ -575,6 +600,11 @@ CONFIG_MTD_BFIN_ASYNC=m
 # CONFIG_MTD_ONENAND is not set
 
 #
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
@@ -591,10 +621,20 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
 # CONFIG_ATA_OVER_ETH is not set
 # CONFIG_BLK_DEV_HD is not set
 CONFIG_MISC_DEVICES=y
-# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_AD525X_DPOT is not set
 # CONFIG_ICS932S401 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_ISL29003 is not set
 # CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
 CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
 
@@ -618,9 +658,12 @@ CONFIG_NETDEVICES=y
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 CONFIG_SMC91X=y
-# CONFIG_SMSC911X is not set
 # CONFIG_DM9000 is not set
 # CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_ADF702X is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -629,15 +672,16 @@ CONFIG_SMC91X=y
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
 
 #
-# Wireless LAN
+# Enable WiMAX (Networking options) to see the WiMAX drivers
 #
-# CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
-# CONFIG_IWLWIFI_LEDS is not set
 # CONFIG_WAN is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
@@ -672,7 +716,10 @@ CONFIG_INPUT_EVDEV=m
 # CONFIG_INPUT_TOUCHSCREEN is not set
 CONFIG_INPUT_MISC=y
 # CONFIG_INPUT_UINPUT is not set
-CONFIG_CONFIG_INPUT_PCF8574=m
+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
+# CONFIG_INPUT_AD714X is not set
+# CONFIG_INPUT_ADXL34X is not set
+# CONFIG_INPUT_PCF8574 is not set
 
 #
 # Hardware I/O ports
@@ -683,16 +730,13 @@ CONFIG_CONFIG_INPUT_PCF8574=m
 #
 # Character devices
 #
-# CONFIG_AD9960 is not set
 CONFIG_BFIN_DMA_INTERFACE=m
 # CONFIG_BFIN_PPI is not set
 # CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
 # CONFIG_BFIN_SPI_ADC is not set
 CONFIG_BFIN_SPORT=m
-# CONFIG_BFIN_TIMER_LATENCY is not set
 # CONFIG_BFIN_TWI_LCD is not set
-CONFIG_SIMPLE_GPIO=m
 # CONFIG_VT is not set
 # CONFIG_DEVKMEM is not set
 CONFIG_BFIN_JTAG_COMM=m
@@ -706,6 +750,7 @@ CONFIG_BFIN_JTAG_COMM=m
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_MAX3100 is not set
 CONFIG_SERIAL_BFIN=y
 CONFIG_SERIAL_BFIN_CONSOLE=y
 CONFIG_SERIAL_BFIN_DMA=y
@@ -716,12 +761,8 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_BFIN_SPORT is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
-
-#
-# CAN, the car bus and industrial fieldbus
-#
-# CONFIG_CAN4LINUX is not set
 # CONFIG_IPMI_HANDLER is not set
 # CONFIG_HW_RANDOM is not set
 # CONFIG_R3964 is not set
@@ -729,6 +770,7 @@ CONFIG_UNIX98_PTYS=y
 # CONFIG_TCG_TPM is not set
 CONFIG_I2C=m
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 CONFIG_I2C_CHARDEV=m
 CONFIG_I2C_HELPER_AUTO=y
 
@@ -759,14 +801,6 @@ CONFIG_I2C_HELPER_AUTO=y
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_EEPROM_AT24 is not set
-# CONFIG_SENSORS_AD5252 is not set
-# CONFIG_EEPROM_LEGACY is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
@@ -783,13 +817,18 @@ CONFIG_SPI_BFIN=y
 # CONFIG_SPI_BFIN_LOCK is not set
 # CONFIG_SPI_BFIN_SPORT is not set
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
 
 #
 # SPI Protocol Masters
 #
-# CONFIG_EEPROM_AT25 is not set
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
 CONFIG_GPIOLIB=y
 # CONFIG_DEBUG_GPIO is not set
@@ -805,6 +844,7 @@ CONFIG_GPIO_SYSFS=y
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -815,11 +855,15 @@ CONFIG_GPIO_SYSFS=y
 #
 # CONFIG_GPIO_MAX7301 is not set
 # CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+
+#
+# AC97 GPIO expanders:
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 CONFIG_WATCHDOG=y
 # CONFIG_WATCHDOG_NOWAYOUT is not set
 
@@ -841,26 +885,18 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_UCB1400_CORE is not set
+# CONFIG_TPS65010 is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_EZX_PCAP is not set
 # CONFIG_REGULATOR is not set
-
-#
-# Multimedia devices
-#
-
-#
-# Multimedia core support
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_DVB_CORE is not set
-# CONFIG_VIDEO_MEDIA is not set
-
-#
-# Multimedia drivers
-#
-# CONFIG_DAB is not set
+# CONFIG_MEDIA_SUPPORT is not set
 
 #
 # Graphics support
@@ -904,6 +940,7 @@ CONFIG_ADV7393_1XMEM=y
 # CONFIG_FB_VIRTUAL is not set
 # CONFIG_FB_METRONOME is not set
 # CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
 # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
 
 #
@@ -913,19 +950,27 @@ CONFIG_ADV7393_1XMEM=y
 # CONFIG_LOGO is not set
 CONFIG_SOUND=m
 CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
 CONFIG_SND=m
 CONFIG_SND_TIMER=m
 CONFIG_SND_PCM=m
+CONFIG_SND_JACK=y
 # CONFIG_SND_SEQUENCER is not set
 CONFIG_SND_OSSEMUL=y
 CONFIG_SND_MIXER_OSS=m
 CONFIG_SND_PCM_OSS=m
 CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_HRTIMER is not set
 # CONFIG_SND_DYNAMIC_MINORS is not set
 CONFIG_SND_SUPPORT_OLD_API=y
 CONFIG_SND_VERBOSE_PROCFS=y
 # CONFIG_SND_VERBOSE_PRINTK is not set
 # CONFIG_SND_DEBUG is not set
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
 CONFIG_SND_DRIVERS=y
 # CONFIG_SND_DUMMY is not set
 # CONFIG_SND_MTPAV is not set
@@ -936,13 +981,6 @@ CONFIG_SND_SPI=y
 #
 # ALSA Blackfin devices
 #
-CONFIG_SND_BLACKFIN_AD1836=m
-CONFIG_SND_BLACKFIN_AD1836_TDM=y
-# CONFIG_SND_BLACKFIN_AD1836_I2S is not set
-CONFIG_SND_BLACKFIN_AD1836_MULSUB=y
-# CONFIG_SND_BLACKFIN_AD1836_5P1 is not set
-CONFIG_SND_BLACKFIN_SPORT=0
-CONFIG_SND_BLACKFIN_SPI_PFBIT=4
 CONFIG_SND_BFIN_SPORT=0
 CONFIG_SND_BFIN_AD73322=m
 CONFIG_SND_BFIN_AD73322_SPORT0_SE=10
@@ -953,16 +991,20 @@ CONFIG_SND_SOC_AC97_BUS=y
 CONFIG_SND_BF5XX_I2S=m
 # CONFIG_SND_BF5XX_SOC_SSM2602 is not set
 CONFIG_SND_BF5XX_SOC_AD73311=m
+# CONFIG_SND_BF5XX_SOC_ADAU1371 is not set
+# CONFIG_SND_BF5XX_SOC_ADAU1761 is not set
 CONFIG_SND_BFIN_AD73311_SE=4
+# CONFIG_SND_BF5XX_TDM is not set
 CONFIG_SND_BF5XX_AC97=m
 CONFIG_SND_BF5XX_MMAP_SUPPORT=y
 # CONFIG_SND_BF5XX_MULTICHAN_SUPPORT is not set
+# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set
+CONFIG_SND_BF5XX_SOC_AD1980=m
 CONFIG_SND_BF5XX_SOC_SPORT=m
 CONFIG_SND_BF5XX_SOC_I2S=m
 CONFIG_SND_BF5XX_SOC_AC97=m
-CONFIG_SND_BF5XX_SOC_AD1980=m
 CONFIG_SND_BF5XX_SPORT_NUM=0
-# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set
+CONFIG_SND_SOC_I2C_AND_SPI=m
 # CONFIG_SND_SOC_ALL_CODECS is not set
 CONFIG_SND_SOC_AD1980=m
 CONFIG_SND_SOC_AD73311=m
@@ -970,14 +1012,12 @@ CONFIG_SND_SOC_AD73311=m
 CONFIG_AC97_BUS=m
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 # CONFIG_HID_PID is not set
 
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 # CONFIG_USB_SUPPORT is not set
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
@@ -1014,6 +1054,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
 
 #
 # SPI RTC drivers
@@ -1025,6 +1066,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_R9701 is not set
 # CONFIG_RTC_DRV_RS5C348 is not set
 # CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
 
 #
 # Platform RTC drivers
@@ -1045,10 +1087,21 @@ CONFIG_RTC_INTF_DEV=y
 #
 CONFIG_RTC_DRV_BFIN=y
 # CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
 # CONFIG_STAGING is not set
 
 #
+# Firmware Drivers
+#
+# CONFIG_FIRMWARE_MEMMAP is not set
+# CONFIG_SIGMA is not set
+
+#
 # File systems
 #
 # CONFIG_EXT2_FS is not set
@@ -1057,9 +1110,13 @@ CONFIG_RTC_DRV_BFIN=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
-CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -1069,6 +1126,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -1087,13 +1149,9 @@ CONFIG_INOTIFY_USER=y
 CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
 CONFIG_SYSFS=y
-# CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -1112,17 +1170,8 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
-CONFIG_YAFFS_FS=m
-CONFIG_YAFFS_YAFFS1=y
-# CONFIG_YAFFS_9BYTE_TAGS is not set
-# CONFIG_YAFFS_DOES_ECC is not set
-CONFIG_YAFFS_YAFFS2=y
-CONFIG_YAFFS_AUTO_YAFFS2=y
-# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
-# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
-# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
-CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
@@ -1141,7 +1190,6 @@ CONFIG_LOCKD=m
 CONFIG_LOCKD_V4=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=m
-# CONFIG_SUNRPC_REGISTER_V4 is not set
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 CONFIG_SMB_FS=m
@@ -1206,14 +1254,19 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_SECTION_MISMATCH=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
@@ -1221,31 +1274,39 @@ CONFIG_SCHED_DEBUG=y
 # CONFIG_DEBUG_SLAB is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
 # CONFIG_DEBUG_KOBJECT is not set
 CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_NOMMU_REGIONS is not set
 # CONFIG_DEBUG_WRITECOUNT is not set
 # CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_FRAME_POINTER is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
-
-#
-# Tracers
-#
-# CONFIG_SCHED_TRACER is not set
-# CONFIG_CONTEXT_SWITCH_TRACER is not set
-# CONFIG_BOOT_TRACER is not set
-# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_BRANCH_PROFILE_NONE is not set
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_DYNAMIC_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -1270,6 +1331,7 @@ CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
+# CONFIG_BFIN_ISRAM_SELF_TEST is not set
 
 #
 # Security options
@@ -1278,14 +1340,14 @@ CONFIG_ACCESS_CHECK=y
 CONFIG_SECURITY=y
 # CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_NETWORK is not set
+# CONFIG_SECURITY_PATH is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
-CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
+# CONFIG_SECURITY_TOMOYO is not set
 CONFIG_CRYPTO=y
 
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -1317,11 +1379,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1358,6 +1422,7 @@ CONFIG_CRYPTO=y
 # Compression
 #
 # CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
 # CONFIG_CRYPTO_LZO is not set
 
 #
@@ -1365,11 +1430,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_CRC_CCITT=m
 # CONFIG_CRC16 is not set
 # CONFIG_CRC_T10DIF is not set
@@ -1379,6 +1446,8 @@ CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=m
+CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/BF537-STAMP_defconfig b/arch/blackfin/configs/BF537-STAMP_defconfig
index 2908595b67c..7596cf7673f 100644
--- a/arch/blackfin/configs/BF537-STAMP_defconfig
+++ b/arch/blackfin/configs/BF537-STAMP_defconfig
@@ -1,22 +1,27 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28.10
-# Thu May 21 05:50:01 2009
+# Linux kernel version: 2.6.32.2
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 CONFIG_BLACKFIN=y
+CONFIG_GENERIC_CSUM=y
+CONFIG_GENERIC_BUG=y
 CONFIG_ZONE_DMA=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -26,22 +31,41 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CGROUPS is not set
 # CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
 # CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -62,6 +86,10 @@ CONFIG_EPOLL=y
 # CONFIG_TIMERFD is not set
 # CONFIG_EVENTFD is not set
 # CONFIG_AIO is not set
+
+#
+# Kernel Performance Events And Counters
+#
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
@@ -69,11 +97,15 @@ CONFIG_SLAB=y
 # CONFIG_SLOB is not set
 CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_SLOW_WORK is not set
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -81,11 +113,8 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
+# CONFIG_LBDAF is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -101,7 +130,6 @@ CONFIG_DEFAULT_AS=y
 # CONFIG_DEFAULT_CFQ is not set
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="anticipatory"
-CONFIG_CLASSIC_RCU=y
 # CONFIG_PREEMPT_NONE is not set
 CONFIG_PREEMPT_VOLUNTARY=y
 # CONFIG_PREEMPT is not set
@@ -132,15 +160,15 @@ CONFIG_FREEZER=y
 CONFIG_BF537=y
 # CONFIG_BF538 is not set
 # CONFIG_BF539 is not set
-# CONFIG_BF542 is not set
+# CONFIG_BF542_std is not set
 # CONFIG_BF542M is not set
-# CONFIG_BF544 is not set
+# CONFIG_BF544_std is not set
 # CONFIG_BF544M is not set
-# CONFIG_BF547 is not set
+# CONFIG_BF547_std is not set
 # CONFIG_BF547M is not set
-# CONFIG_BF548 is not set
+# CONFIG_BF548_std is not set
 # CONFIG_BF548M is not set
-# CONFIG_BF549 is not set
+# CONFIG_BF549_std is not set
 # CONFIG_BF549M is not set
 # CONFIG_BF561 is not set
 CONFIG_BF_REV_MIN=2
@@ -184,7 +212,8 @@ CONFIG_IRQ_MEM_DMA1=13
 CONFIG_IRQ_WATCH=13
 CONFIG_IRQ_SPI=10
 CONFIG_BFIN537_STAMP=y
-# CONFIG_BFIN537_BLUETECHNIX_CM is not set
+# CONFIG_BFIN537_BLUETECHNIX_CM_E is not set
+# CONFIG_BFIN537_BLUETECHNIX_CM_U is not set
 # CONFIG_BFIN537_BLUETECHNIX_TCM is not set
 # CONFIG_PNAV10 is not set
 # CONFIG_CAMSIG_MINOTAUR is not set
@@ -235,7 +264,7 @@ CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 # CONFIG_TICKSOURCE_GPTMR0 is not set
 CONFIG_TICKSOURCE_CORETMR=y
-# CONFIG_CYCLES_CLOCKSOURCE is not set
+CONFIG_CYCLES_CLOCKSOURCE=y
 # CONFIG_GPTMR0_CLOCKSOURCE is not set
 CONFIG_TICK_ONESHOT=y
 # CONFIG_NO_HZ is not set
@@ -287,7 +316,6 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
@@ -296,16 +324,18 @@ CONFIG_BFIN_GPTIMERS=m
 # CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
 CONFIG_DMA_UNCACHED_1M=y
+# CONFIG_DMA_UNCACHED_512K is not set
+# CONFIG_DMA_UNCACHED_256K is not set
+# CONFIG_DMA_UNCACHED_128K is not set
 # CONFIG_DMA_UNCACHED_NONE is not set
 
 #
 # Cache Support
 #
 CONFIG_BFIN_ICACHE=y
-# CONFIG_BFIN_ICACHE_LOCK is not set
+CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_DCACHE_BANKA is not set
-CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_EXTMEM_DCACHEABLE=y
 CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
@@ -316,7 +346,7 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_MPU is not set
 
 #
-# Asynchonous Memory Configuration
+# Asynchronous Memory Configuration
 #
 
 #
@@ -362,6 +392,7 @@ CONFIG_PM=y
 CONFIG_PM_SLEEP=y
 CONFIG_SUSPEND=y
 CONFIG_SUSPEND_FREEZER=y
+# CONFIG_PM_RUNTIME is not set
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_PM_BFIN_SLEEP_DEEPER=y
 # CONFIG_PM_BFIN_SLEEP is not set
@@ -384,11 +415,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-# CONFIG_XFRM_SUB_POLICY is not set
-# CONFIG_XFRM_MIGRATE is not set
-# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
@@ -412,7 +438,6 @@ CONFIG_IP_PNP=y
 # CONFIG_INET_XFRM_MODE_BEET is not set
 # CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
-CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_CUBIC=y
 CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -423,6 +448,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -436,14 +462,34 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
 # CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
 
 #
 # Network testing
 #
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_HAMRADIO is not set
-# CONFIG_CAN is not set
+CONFIG_CAN=m
+CONFIG_CAN_RAW=m
+CONFIG_CAN_BCM=m
+
+#
+# CAN Device Drivers
+#
+# CONFIG_CAN_VCAN is not set
+CONFIG_CAN_DEV=m
+# CONFIG_CAN_CALC_BITTIMING is not set
+CONFIG_CAN_BFIN=m
+# CONFIG_CAN_SJA1000 is not set
+
+#
+# CAN USB interfaces
+#
+# CONFIG_CAN_EMS_USB is not set
+# CONFIG_CAN_DEBUG_DEVICES is not set
 CONFIG_IRDA=m
 
 #
@@ -483,13 +529,8 @@ CONFIG_SIR_BFIN_DMA=y
 #
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-# CONFIG_PHONET is not set
-CONFIG_WIRELESS=y
-# CONFIG_CFG80211 is not set
-CONFIG_WIRELESS_OLD_REGULATORY=y
-# CONFIG_WIRELESS_EXT is not set
-# CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
 
@@ -510,6 +551,7 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
@@ -568,6 +610,7 @@ CONFIG_MTD_PHYSMAP=m
 #
 # CONFIG_MTD_DATAFLASH is not set
 # CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SST25L is not set
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
@@ -583,6 +626,11 @@ CONFIG_MTD_PHYSMAP=m
 # CONFIG_MTD_ONENAND is not set
 
 #
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
@@ -599,10 +647,20 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
 # CONFIG_ATA_OVER_ETH is not set
 # CONFIG_BLK_DEV_HD is not set
 CONFIG_MISC_DEVICES=y
-# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_AD525X_DPOT is not set
 # CONFIG_ICS932S401 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_ISL29003 is not set
 # CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
 CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
 
@@ -637,6 +695,9 @@ CONFIG_SMSC_PHY=y
 # CONFIG_BROADCOM_PHY is not set
 # CONFIG_ICPLUS_PHY is not set
 # CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
 # CONFIG_FIXED_PHY is not set
 # CONFIG_MDIO_BITBANG is not set
 CONFIG_NET_ETHERNET=y
@@ -647,9 +708,12 @@ CONFIG_BFIN_TX_DESC_NUM=10
 CONFIG_BFIN_RX_DESC_NUM=20
 # CONFIG_BFIN_MAC_RMII is not set
 # CONFIG_SMC91X is not set
-# CONFIG_SMSC911X is not set
 # CONFIG_DM9000 is not set
 # CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_ADF702X is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -658,15 +722,16 @@ CONFIG_BFIN_RX_DESC_NUM=20
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
 
 #
-# Wireless LAN
+# Enable WiMAX (Networking options) to see the WiMAX drivers
 #
-# CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
-# CONFIG_IWLWIFI_LEDS is not set
 # CONFIG_WAN is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
@@ -701,7 +766,10 @@ CONFIG_INPUT_EVDEV=m
 # CONFIG_INPUT_TOUCHSCREEN is not set
 CONFIG_INPUT_MISC=y
 # CONFIG_INPUT_UINPUT is not set
-CONFIG_CONFIG_INPUT_PCF8574=m
+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
+# CONFIG_INPUT_AD714X is not set
+# CONFIG_INPUT_ADXL34X is not set
+# CONFIG_INPUT_PCF8574 is not set
 
 #
 # Hardware I/O ports
@@ -712,16 +780,13 @@ CONFIG_CONFIG_INPUT_PCF8574=m
 #
 # Character devices
 #
-# CONFIG_AD9960 is not set
 CONFIG_BFIN_DMA_INTERFACE=m
 # CONFIG_BFIN_PPI is not set
 # CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
 # CONFIG_BFIN_SPI_ADC is not set
 CONFIG_BFIN_SPORT=m
-# CONFIG_BFIN_TIMER_LATENCY is not set
 # CONFIG_BFIN_TWI_LCD is not set
-CONFIG_SIMPLE_GPIO=m
 # CONFIG_VT is not set
 # CONFIG_DEVKMEM is not set
 CONFIG_BFIN_JTAG_COMM=m
@@ -735,6 +800,7 @@ CONFIG_BFIN_JTAG_COMM=m
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_MAX3100 is not set
 CONFIG_SERIAL_BFIN=y
 CONFIG_SERIAL_BFIN_CONSOLE=y
 CONFIG_SERIAL_BFIN_DMA=y
@@ -746,17 +812,8 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_BFIN_SPORT is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
-
-#
-# CAN, the car bus and industrial fieldbus
-#
-CONFIG_CAN4LINUX=y
-
-#
-# linux embedded drivers
-#
-CONFIG_CAN_BLACKFIN=m
 # CONFIG_IPMI_HANDLER is not set
 # CONFIG_HW_RANDOM is not set
 # CONFIG_R3964 is not set
@@ -764,6 +821,7 @@ CONFIG_CAN_BLACKFIN=m
 # CONFIG_TCG_TPM is not set
 CONFIG_I2C=m
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 CONFIG_I2C_CHARDEV=m
 CONFIG_I2C_HELPER_AUTO=y
 
@@ -796,14 +854,6 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_EEPROM_AT24 is not set
-CONFIG_SENSORS_AD5252=m
-# CONFIG_EEPROM_LEGACY is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
@@ -820,13 +870,18 @@ CONFIG_SPI_BFIN=y
 # CONFIG_SPI_BFIN_LOCK is not set
 # CONFIG_SPI_BFIN_SPORT is not set
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
 
 #
 # SPI Protocol Masters
 #
-# CONFIG_EEPROM_AT25 is not set
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
 CONFIG_GPIOLIB=y
 # CONFIG_DEBUG_GPIO is not set
@@ -842,6 +897,7 @@ CONFIG_GPIO_SYSFS=y
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -852,11 +908,15 @@ CONFIG_GPIO_SYSFS=y
 #
 # CONFIG_GPIO_MAX7301 is not set
 # CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+
+#
+# AC97 GPIO expanders:
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 CONFIG_WATCHDOG=y
 # CONFIG_WATCHDOG_NOWAYOUT is not set
 
@@ -878,26 +938,18 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_UCB1400_CORE is not set
+# CONFIG_TPS65010 is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_EZX_PCAP is not set
 # CONFIG_REGULATOR is not set
-
-#
-# Multimedia devices
-#
-
-#
-# Multimedia core support
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_DVB_CORE is not set
-# CONFIG_VIDEO_MEDIA is not set
-
-#
-# Multimedia drivers
-#
-# CONFIG_DAB is not set
+# CONFIG_MEDIA_SUPPORT is not set
 
 #
 # Graphics support
@@ -929,9 +981,6 @@ CONFIG_FB_CFB_IMAGEBLIT=m
 # CONFIG_FB_BFIN_T350MCQB is not set
 # CONFIG_FB_BFIN_LQ035Q1 is not set
 CONFIG_FB_BF537_LQ035=m
-CONFIG_LQ035_SLAVE_ADDR=0x58
-# CONFIG_FB_BFIN_LANDSCAPE is not set
-# CONFIG_FB_BFIN_BGR is not set
 CONFIG_FB_BFIN_7393=m
 CONFIG_NTSC=y
 # CONFIG_PAL is not set
@@ -946,15 +995,18 @@ CONFIG_ADV7393_1XMEM=y
 # CONFIG_FB_VIRTUAL is not set
 # CONFIG_FB_METRONOME is not set
 # CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
 CONFIG_BACKLIGHT_LCD_SUPPORT=y
 CONFIG_LCD_CLASS_DEVICE=m
+# CONFIG_LCD_LMS283GF05 is not set
 # CONFIG_LCD_LTV350QV is not set
 # CONFIG_LCD_ILI9320 is not set
 # CONFIG_LCD_TDO24M is not set
 # CONFIG_LCD_VGG2432A4 is not set
 # CONFIG_LCD_PLATFORM is not set
 CONFIG_BACKLIGHT_CLASS_DEVICE=m
-CONFIG_BACKLIGHT_CORGI=m
+CONFIG_BACKLIGHT_GENERIC=m
+# CONFIG_BACKLIGHT_ADP8870 is not set
 
 #
 # Display device support
@@ -963,19 +1015,27 @@ CONFIG_BACKLIGHT_CORGI=m
 # CONFIG_LOGO is not set
 CONFIG_SOUND=m
 CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
 CONFIG_SND=m
 CONFIG_SND_TIMER=m
 CONFIG_SND_PCM=m
+CONFIG_SND_JACK=y
 # CONFIG_SND_SEQUENCER is not set
 CONFIG_SND_OSSEMUL=y
 CONFIG_SND_MIXER_OSS=m
 CONFIG_SND_PCM_OSS=m
 CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_HRTIMER is not set
 # CONFIG_SND_DYNAMIC_MINORS is not set
 CONFIG_SND_SUPPORT_OLD_API=y
 CONFIG_SND_VERBOSE_PROCFS=y
 # CONFIG_SND_VERBOSE_PRINTK is not set
 # CONFIG_SND_DEBUG is not set
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
 CONFIG_SND_DRIVERS=y
 # CONFIG_SND_DUMMY is not set
 # CONFIG_SND_MTPAV is not set
@@ -986,13 +1046,6 @@ CONFIG_SND_SPI=y
 #
 # ALSA Blackfin devices
 #
-CONFIG_SND_BLACKFIN_AD1836=m
-CONFIG_SND_BLACKFIN_AD1836_TDM=y
-# CONFIG_SND_BLACKFIN_AD1836_I2S is not set
-CONFIG_SND_BLACKFIN_AD1836_MULSUB=y
-# CONFIG_SND_BLACKFIN_AD1836_5P1 is not set
-CONFIG_SND_BLACKFIN_SPORT=0
-CONFIG_SND_BLACKFIN_SPI_PFBIT=4
 CONFIG_SND_BFIN_SPORT=0
 CONFIG_SND_BFIN_AD73322=m
 CONFIG_SND_BFIN_AD73322_SPORT0_SE=10
@@ -1003,16 +1056,20 @@ CONFIG_SND_SOC_AC97_BUS=y
 CONFIG_SND_BF5XX_I2S=m
 # CONFIG_SND_BF5XX_SOC_SSM2602 is not set
 CONFIG_SND_BF5XX_SOC_AD73311=m
+# CONFIG_SND_BF5XX_SOC_ADAU1371 is not set
+# CONFIG_SND_BF5XX_SOC_ADAU1761 is not set
 CONFIG_SND_BFIN_AD73311_SE=4
+# CONFIG_SND_BF5XX_TDM is not set
 CONFIG_SND_BF5XX_AC97=m
 CONFIG_SND_BF5XX_MMAP_SUPPORT=y
 # CONFIG_SND_BF5XX_MULTICHAN_SUPPORT is not set
+# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set
+CONFIG_SND_BF5XX_SOC_AD1980=m
 CONFIG_SND_BF5XX_SOC_SPORT=m
 CONFIG_SND_BF5XX_SOC_I2S=m
 CONFIG_SND_BF5XX_SOC_AC97=m
-CONFIG_SND_BF5XX_SOC_AD1980=m
 CONFIG_SND_BF5XX_SPORT_NUM=0
-# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set
+CONFIG_SND_SOC_I2C_AND_SPI=m
 # CONFIG_SND_SOC_ALL_CODECS is not set
 CONFIG_SND_SOC_AD1980=m
 CONFIG_SND_SOC_AD73311=m
@@ -1020,14 +1077,12 @@ CONFIG_SND_SOC_AD73311=m
 CONFIG_AC97_BUS=m
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 # CONFIG_HID_PID is not set
 
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 # CONFIG_USB_SUPPORT is not set
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
@@ -1064,6 +1119,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
 
 #
 # SPI RTC drivers
@@ -1075,6 +1131,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_R9701 is not set
 # CONFIG_RTC_DRV_RS5C348 is not set
 # CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
 
 #
 # Platform RTC drivers
@@ -1095,10 +1152,21 @@ CONFIG_RTC_INTF_DEV=y
 #
 CONFIG_RTC_DRV_BFIN=y
 # CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
 # CONFIG_STAGING is not set
 
 #
+# Firmware Drivers
+#
+# CONFIG_FIRMWARE_MEMMAP is not set
+# CONFIG_SIGMA is not set
+
+#
 # File systems
 #
 # CONFIG_EXT2_FS is not set
@@ -1107,9 +1175,13 @@ CONFIG_RTC_DRV_BFIN=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
-CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -1119,6 +1191,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -1137,13 +1214,9 @@ CONFIG_INOTIFY_USER=y
 CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
 CONFIG_SYSFS=y
-# CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -1162,17 +1235,8 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
-CONFIG_YAFFS_FS=m
-CONFIG_YAFFS_YAFFS1=y
-# CONFIG_YAFFS_9BYTE_TAGS is not set
-# CONFIG_YAFFS_DOES_ECC is not set
-CONFIG_YAFFS_YAFFS2=y
-CONFIG_YAFFS_AUTO_YAFFS2=y
-# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
-# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
-# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
-CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
@@ -1191,7 +1255,6 @@ CONFIG_LOCKD=m
 CONFIG_LOCKD_V4=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=m
-# CONFIG_SUNRPC_REGISTER_V4 is not set
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 CONFIG_SMB_FS=m
@@ -1256,14 +1319,19 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_SECTION_MISMATCH=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
@@ -1271,31 +1339,39 @@ CONFIG_SCHED_DEBUG=y
 # CONFIG_DEBUG_SLAB is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
 # CONFIG_DEBUG_KOBJECT is not set
 CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_NOMMU_REGIONS is not set
 # CONFIG_DEBUG_WRITECOUNT is not set
 # CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_FRAME_POINTER is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
-
-#
-# Tracers
-#
-# CONFIG_SCHED_TRACER is not set
-# CONFIG_CONTEXT_SWITCH_TRACER is not set
-# CONFIG_BOOT_TRACER is not set
-# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_BRANCH_PROFILE_NONE is not set
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_DYNAMIC_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -1320,6 +1396,7 @@ CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
+# CONFIG_BFIN_ISRAM_SELF_TEST is not set
 
 #
 # Security options
@@ -1328,14 +1405,14 @@ CONFIG_ACCESS_CHECK=y
 CONFIG_SECURITY=y
 # CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_NETWORK is not set
+# CONFIG_SECURITY_PATH is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
-CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
+# CONFIG_SECURITY_TOMOYO is not set
 CONFIG_CRYPTO=y
 
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -1367,11 +1444,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1408,6 +1487,7 @@ CONFIG_CRYPTO=y
 # Compression
 #
 # CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
 # CONFIG_CRYPTO_LZO is not set
 
 #
@@ -1415,11 +1495,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_CRC_CCITT=m
 # CONFIG_CRC16 is not set
 # CONFIG_CRC_T10DIF is not set
@@ -1429,6 +1511,8 @@ CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=m
+CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/BF538-EZKIT_defconfig b/arch/blackfin/configs/BF538-EZKIT_defconfig
index 09ea2499555..bc1871d89fd 100644
--- a/arch/blackfin/configs/BF538-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF538-EZKIT_defconfig
@@ -1,22 +1,27 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28.10
-# Thu May 21 05:50:01 2009
+# Linux kernel version: 2.6.32.2
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 CONFIG_BLACKFIN=y
+CONFIG_GENERIC_CSUM=y
+CONFIG_GENERIC_BUG=y
 CONFIG_ZONE_DMA=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -26,22 +31,41 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CGROUPS is not set
 # CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
 # CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -62,6 +86,10 @@ CONFIG_EPOLL=y
 # CONFIG_TIMERFD is not set
 # CONFIG_EVENTFD is not set
 # CONFIG_AIO is not set
+
+#
+# Kernel Performance Events And Counters
+#
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
@@ -69,11 +97,15 @@ CONFIG_SLAB=y
 # CONFIG_SLOB is not set
 CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_SLOW_WORK is not set
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -81,11 +113,8 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
+# CONFIG_LBDAF is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -101,7 +130,6 @@ CONFIG_DEFAULT_AS=y
 # CONFIG_DEFAULT_CFQ is not set
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="anticipatory"
-CONFIG_CLASSIC_RCU=y
 # CONFIG_PREEMPT_NONE is not set
 CONFIG_PREEMPT_VOLUNTARY=y
 # CONFIG_PREEMPT is not set
@@ -132,15 +160,15 @@ CONFIG_PREEMPT_VOLUNTARY=y
 # CONFIG_BF537 is not set
 CONFIG_BF538=y
 # CONFIG_BF539 is not set
-# CONFIG_BF542 is not set
+# CONFIG_BF542_std is not set
 # CONFIG_BF542M is not set
-# CONFIG_BF544 is not set
+# CONFIG_BF544_std is not set
 # CONFIG_BF544M is not set
-# CONFIG_BF547 is not set
+# CONFIG_BF547_std is not set
 # CONFIG_BF547M is not set
-# CONFIG_BF548 is not set
+# CONFIG_BF548_std is not set
 # CONFIG_BF548M is not set
-# CONFIG_BF549 is not set
+# CONFIG_BF549_std is not set
 # CONFIG_BF549M is not set
 # CONFIG_BF561 is not set
 CONFIG_BF_REV_MIN=4
@@ -246,7 +274,7 @@ CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 # CONFIG_TICKSOURCE_GPTMR0 is not set
 CONFIG_TICKSOURCE_CORETMR=y
-# CONFIG_CYCLES_CLOCKSOURCE is not set
+CONFIG_CYCLES_CLOCKSOURCE=y
 # CONFIG_GPTMR0_CLOCKSOURCE is not set
 CONFIG_TICK_ONESHOT=y
 # CONFIG_NO_HZ is not set
@@ -298,7 +326,6 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
@@ -307,16 +334,18 @@ CONFIG_BFIN_GPTIMERS=m
 # CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
 CONFIG_DMA_UNCACHED_1M=y
+# CONFIG_DMA_UNCACHED_512K is not set
+# CONFIG_DMA_UNCACHED_256K is not set
+# CONFIG_DMA_UNCACHED_128K is not set
 # CONFIG_DMA_UNCACHED_NONE is not set
 
 #
 # Cache Support
 #
 CONFIG_BFIN_ICACHE=y
-# CONFIG_BFIN_ICACHE_LOCK is not set
+CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_DCACHE_BANKA is not set
-CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_EXTMEM_DCACHEABLE=y
 CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
@@ -327,7 +356,7 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_MPU is not set
 
 #
-# Asynchonous Memory Configuration
+# Asynchronous Memory Configuration
 #
 
 #
@@ -383,11 +412,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-# CONFIG_XFRM_SUB_POLICY is not set
-# CONFIG_XFRM_MIGRATE is not set
-# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
@@ -411,7 +435,6 @@ CONFIG_IP_PNP=y
 # CONFIG_INET_XFRM_MODE_BEET is not set
 # CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
-CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_CUBIC=y
 CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -422,6 +445,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -435,14 +459,34 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
 # CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
 
 #
 # Network testing
 #
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_HAMRADIO is not set
-# CONFIG_CAN is not set
+CONFIG_CAN=m
+CONFIG_CAN_RAW=m
+CONFIG_CAN_BCM=m
+
+#
+# CAN Device Drivers
+#
+# CONFIG_CAN_VCAN is not set
+CONFIG_CAN_DEV=m
+# CONFIG_CAN_CALC_BITTIMING is not set
+CONFIG_CAN_BFIN=m
+# CONFIG_CAN_SJA1000 is not set
+
+#
+# CAN USB interfaces
+#
+# CONFIG_CAN_EMS_USB is not set
+# CONFIG_CAN_DEBUG_DEVICES is not set
 CONFIG_IRDA=m
 
 #
@@ -481,13 +525,8 @@ CONFIG_SIR_BFIN_DMA=y
 #
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-# CONFIG_PHONET is not set
-CONFIG_WIRELESS=y
-# CONFIG_CFG80211 is not set
-CONFIG_WIRELESS_OLD_REGULATORY=y
-# CONFIG_WIRELESS_EXT is not set
-# CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
 
@@ -508,6 +547,7 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
@@ -566,6 +606,7 @@ CONFIG_MTD_PHYSMAP=m
 #
 # CONFIG_MTD_DATAFLASH is not set
 # CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SST25L is not set
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
@@ -581,11 +622,6 @@ CONFIG_MTD_NAND=m
 # CONFIG_MTD_NAND_VERIFY_WRITE is not set
 # CONFIG_MTD_NAND_ECC_SMC is not set
 # CONFIG_MTD_NAND_MUSEUM_IDS is not set
-CONFIG_MTD_NAND_BFIN=m
-CONFIG_BFIN_NAND_BASE=0x20212000
-CONFIG_BFIN_NAND_CLE=2
-CONFIG_BFIN_NAND_ALE=1
-CONFIG_BFIN_NAND_READY=3
 CONFIG_MTD_NAND_IDS=m
 # CONFIG_MTD_NAND_DISKONCHIP is not set
 # CONFIG_MTD_NAND_NANDSIM is not set
@@ -593,6 +629,11 @@ CONFIG_MTD_NAND_IDS=m
 # CONFIG_MTD_ONENAND is not set
 
 #
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
@@ -643,14 +684,20 @@ CONFIG_SMSC_PHY=y
 # CONFIG_BROADCOM_PHY is not set
 # CONFIG_ICPLUS_PHY is not set
 # CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
 # CONFIG_FIXED_PHY is not set
 # CONFIG_MDIO_BITBANG is not set
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 CONFIG_SMC91X=y
-# CONFIG_SMSC911X is not set
 # CONFIG_DM9000 is not set
 # CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_ADF702X is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -659,15 +706,16 @@ CONFIG_SMC91X=y
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
 
 #
-# Wireless LAN
+# Enable WiMAX (Networking options) to see the WiMAX drivers
 #
-# CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
-# CONFIG_IWLWIFI_LEDS is not set
 # CONFIG_WAN is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
@@ -700,14 +748,17 @@ CONFIG_INPUT_EVDEV=m
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
 CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
 # CONFIG_TOUCHSCREEN_AD7877 is not set
 # CONFIG_TOUCHSCREEN_AD7879_I2C is not set
 CONFIG_TOUCHSCREEN_AD7879_SPI=y
 CONFIG_TOUCHSCREEN_AD7879=y
-# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_EETI is not set
 # CONFIG_TOUCHSCREEN_FUJITSU is not set
 # CONFIG_TOUCHSCREEN_GUNZE is not set
 # CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
 # CONFIG_TOUCHSCREEN_MTOUCH is not set
 # CONFIG_TOUCHSCREEN_INEXIO is not set
 # CONFIG_TOUCHSCREEN_MK712 is not set
@@ -715,9 +766,13 @@ CONFIG_TOUCHSCREEN_AD7879=y
 # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
 # CONFIG_TOUCHSCREEN_TOUCHWIN is not set
 # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
 CONFIG_INPUT_MISC=y
 # CONFIG_INPUT_UINPUT is not set
-# CONFIG_CONFIG_INPUT_PCF8574 is not set
+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
+# CONFIG_INPUT_AD714X is not set
+# CONFIG_INPUT_ADXL34X is not set
+# CONFIG_INPUT_PCF8574 is not set
 
 #
 # Hardware I/O ports
@@ -728,16 +783,13 @@ CONFIG_INPUT_MISC=y
 #
 # Character devices
 #
-# CONFIG_AD9960 is not set
 CONFIG_BFIN_DMA_INTERFACE=m
 # CONFIG_BFIN_PPI is not set
 # CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
 # CONFIG_BFIN_SPI_ADC is not set
 CONFIG_BFIN_SPORT=m
-# CONFIG_BFIN_TIMER_LATENCY is not set
 # CONFIG_BFIN_TWI_LCD is not set
-CONFIG_SIMPLE_GPIO=m
 # CONFIG_VT is not set
 # CONFIG_DEVKMEM is not set
 CONFIG_BFIN_JTAG_COMM=m
@@ -751,6 +803,7 @@ CONFIG_BFIN_JTAG_COMM=m
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_MAX3100 is not set
 CONFIG_SERIAL_BFIN=y
 CONFIG_SERIAL_BFIN_CONSOLE=y
 CONFIG_SERIAL_BFIN_DMA=y
@@ -765,12 +818,8 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_BFIN_SPORT is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
-
-#
-# CAN, the car bus and industrial fieldbus
-#
-# CONFIG_CAN4LINUX is not set
 # CONFIG_IPMI_HANDLER is not set
 # CONFIG_HW_RANDOM is not set
 # CONFIG_R3964 is not set
@@ -778,6 +827,7 @@ CONFIG_UNIX98_PTYS=y
 # CONFIG_TCG_TPM is not set
 CONFIG_I2C=m
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 # CONFIG_I2C_CHARDEV is not set
 CONFIG_I2C_HELPER_AUTO=y
 
@@ -810,14 +860,6 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_EEPROM_AT24 is not set
-# CONFIG_SENSORS_AD5252 is not set
-# CONFIG_EEPROM_LEGACY is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
@@ -834,13 +876,18 @@ CONFIG_SPI_BFIN=y
 # CONFIG_SPI_BFIN_LOCK is not set
 # CONFIG_SPI_BFIN_SPORT is not set
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
 
 #
 # SPI Protocol Masters
 #
-# CONFIG_EEPROM_AT25 is not set
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
 CONFIG_GPIOLIB=y
 # CONFIG_DEBUG_GPIO is not set
@@ -856,6 +903,7 @@ CONFIG_GPIO_SYSFS=y
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -866,11 +914,15 @@ CONFIG_GPIO_SYSFS=y
 #
 # CONFIG_GPIO_MAX7301 is not set
 # CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+
+#
+# AC97 GPIO expanders:
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 CONFIG_WATCHDOG=y
 # CONFIG_WATCHDOG_NOWAYOUT is not set
 
@@ -892,26 +944,17 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_EZX_PCAP is not set
 # CONFIG_REGULATOR is not set
-
-#
-# Multimedia devices
-#
-
-#
-# Multimedia core support
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_DVB_CORE is not set
-# CONFIG_VIDEO_MEDIA is not set
-
-#
-# Multimedia drivers
-#
-# CONFIG_DAB is not set
+# CONFIG_MEDIA_SUPPORT is not set
 
 #
 # Graphics support
@@ -947,6 +990,7 @@ CONFIG_FB_BFIN_LQ035Q1=m
 # CONFIG_FB_VIRTUAL is not set
 # CONFIG_FB_METRONOME is not set
 # CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
 # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
 
 #
@@ -957,14 +1001,12 @@ CONFIG_FB_BFIN_LQ035Q1=m
 # CONFIG_SOUND is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 # CONFIG_HID_PID is not set
 
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 # CONFIG_USB_SUPPORT is not set
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
@@ -1001,6 +1043,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
 
 #
 # SPI RTC drivers
@@ -1012,6 +1055,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_R9701 is not set
 # CONFIG_RTC_DRV_RS5C348 is not set
 # CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
 
 #
 # Platform RTC drivers
@@ -1032,10 +1076,21 @@ CONFIG_RTC_INTF_DEV=y
 #
 CONFIG_RTC_DRV_BFIN=y
 # CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
 # CONFIG_STAGING is not set
 
 #
+# Firmware Drivers
+#
+# CONFIG_FIRMWARE_MEMMAP is not set
+# CONFIG_SIGMA is not set
+
+#
 # File systems
 #
 # CONFIG_EXT2_FS is not set
@@ -1044,9 +1099,13 @@ CONFIG_RTC_DRV_BFIN=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
-CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -1056,6 +1115,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -1074,13 +1138,9 @@ CONFIG_INOTIFY_USER=y
 CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
 CONFIG_SYSFS=y
-# CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -1099,17 +1159,8 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
-CONFIG_YAFFS_FS=m
-CONFIG_YAFFS_YAFFS1=y
-# CONFIG_YAFFS_9BYTE_TAGS is not set
-# CONFIG_YAFFS_DOES_ECC is not set
-CONFIG_YAFFS_YAFFS2=y
-CONFIG_YAFFS_AUTO_YAFFS2=y
-# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
-# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
-# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
-CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
@@ -1128,7 +1179,6 @@ CONFIG_LOCKD=m
 CONFIG_LOCKD_V4=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=m
-# CONFIG_SUNRPC_REGISTER_V4 is not set
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 CONFIG_SMB_FS=m
@@ -1193,14 +1243,19 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_SECTION_MISMATCH=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
@@ -1208,31 +1263,39 @@ CONFIG_SCHED_DEBUG=y
 # CONFIG_DEBUG_SLAB is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
 # CONFIG_DEBUG_KOBJECT is not set
 CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_NOMMU_REGIONS is not set
 # CONFIG_DEBUG_WRITECOUNT is not set
 # CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_FRAME_POINTER is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
-
-#
-# Tracers
-#
-# CONFIG_SCHED_TRACER is not set
-# CONFIG_CONTEXT_SWITCH_TRACER is not set
-# CONFIG_BOOT_TRACER is not set
-# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_BRANCH_PROFILE_NONE is not set
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_DYNAMIC_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -1257,6 +1320,7 @@ CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
+# CONFIG_BFIN_ISRAM_SELF_TEST is not set
 
 #
 # Security options
@@ -1265,14 +1329,14 @@ CONFIG_ACCESS_CHECK=y
 CONFIG_SECURITY=y
 # CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_NETWORK is not set
+# CONFIG_SECURITY_PATH is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
-CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
+# CONFIG_SECURITY_TOMOYO is not set
 CONFIG_CRYPTO=y
 
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -1304,11 +1368,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1345,6 +1411,7 @@ CONFIG_CRYPTO=y
 # Compression
 #
 # CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
 # CONFIG_CRYPTO_LZO is not set
 
 #
@@ -1352,11 +1419,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_CRC_CCITT=m
 # CONFIG_CRC16 is not set
 # CONFIG_CRC_T10DIF is not set
@@ -1366,6 +1435,8 @@ CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=m
+CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig
index eb3e98b6f3f..ca309cfc6ac 100644
--- a/arch/blackfin/configs/BF548-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF548-EZKIT_defconfig
@@ -1,7 +1,6 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.31.5
-# Mon Nov  2 22:02:56 2009
+# Linux kernel version: 2.6.32.2
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
@@ -12,7 +11,6 @@ CONFIG_GENERIC_CSUM=y
 CONFIG_GENERIC_BUG=y
 CONFIG_ZONE_DMA=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
@@ -49,11 +47,12 @@ CONFIG_SYSVIPC_SYSCTL=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -89,24 +88,23 @@ CONFIG_EPOLL=y
 # CONFIG_AIO is not set
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 
 #
 # GCOV-based kernel profiling
 #
 # CONFIG_GCOV_KERNEL is not set
-# CONFIG_SLOW_WORK is not set
+CONFIG_SLOW_WORK=y
+# CONFIG_SLOW_WORK_DEBUG is not set
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
 CONFIG_BASE_SMALL=0
@@ -163,15 +161,15 @@ CONFIG_PREEMPT_VOLUNTARY=y
 # CONFIG_BF537 is not set
 # CONFIG_BF538 is not set
 # CONFIG_BF539 is not set
-# CONFIG_BF542 is not set
+# CONFIG_BF542_std is not set
 # CONFIG_BF542M is not set
-# CONFIG_BF544 is not set
+# CONFIG_BF544_std is not set
 # CONFIG_BF544M is not set
-# CONFIG_BF547 is not set
+# CONFIG_BF547_std is not set
 # CONFIG_BF547M is not set
 CONFIG_BF548_std=y
 # CONFIG_BF548M is not set
-# CONFIG_BF549 is not set
+# CONFIG_BF549_std is not set
 # CONFIG_BF549M is not set
 # CONFIG_BF561 is not set
 CONFIG_BF_REV_MIN=0
@@ -185,7 +183,6 @@ CONFIG_BF_REV_0_2=y
 # CONFIG_BF_REV_0_6 is not set
 # CONFIG_BF_REV_ANY is not set
 # CONFIG_BF_REV_NONE is not set
-CONFIG_BF54x=y
 CONFIG_IRQ_PLL_WAKEUP=7
 CONFIG_IRQ_RTC=8
 CONFIG_IRQ_SPORT0_RX=9
@@ -221,6 +218,8 @@ CONFIG_IRQ_SPI1=10
 CONFIG_IRQ_SPI2=10
 CONFIG_IRQ_TWI0=11
 CONFIG_IRQ_TWI1=11
+CONFIG_BF548=y
+CONFIG_BF54x=y
 CONFIG_BFIN548_EZKIT=y
 # CONFIG_BFIN548_BLUETECHNIX_CM is not set
 
@@ -387,12 +386,14 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
-CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
 CONFIG_BFIN_GPTIMERS=m
 # CONFIG_DMA_UNCACHED_4M is not set
 CONFIG_DMA_UNCACHED_2M=y
 # CONFIG_DMA_UNCACHED_1M is not set
+# CONFIG_DMA_UNCACHED_512K is not set
+# CONFIG_DMA_UNCACHED_256K is not set
+# CONFIG_DMA_UNCACHED_128K is not set
 # CONFIG_DMA_UNCACHED_NONE is not set
 
 #
@@ -505,6 +506,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -528,7 +530,24 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 #
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_HAMRADIO is not set
-# CONFIG_CAN is not set
+CONFIG_CAN=m
+CONFIG_CAN_RAW=m
+CONFIG_CAN_BCM=m
+
+#
+# CAN Device Drivers
+#
+# CONFIG_CAN_VCAN is not set
+CONFIG_CAN_DEV=m
+# CONFIG_CAN_CALC_BITTIMING is not set
+CONFIG_CAN_BFIN=m
+# CONFIG_CAN_SJA1000 is not set
+
+#
+# CAN USB interfaces
+#
+# CONFIG_CAN_EMS_USB is not set
+# CONFIG_CAN_DEBUG_DEVICES is not set
 CONFIG_IRDA=m
 
 #
@@ -663,6 +682,7 @@ CONFIG_MTD_PHYSMAP=y
 # CONFIG_MTD_DATAFLASH is not set
 CONFIG_MTD_M25P80=y
 CONFIG_M25PXX_USE_FAST_READ=y
+# CONFIG_MTD_SST25L is not set
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
@@ -711,10 +731,10 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
 # CONFIG_ATA_OVER_ETH is not set
 # CONFIG_BLK_DEV_HD is not set
 CONFIG_MISC_DEVICES=y
+# CONFIG_AD525X_DPOT is not set
 # CONFIG_ICS932S401 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_ISL29003 is not set
-# CONFIG_AD525X_DPOT is not set
 # CONFIG_C2PORT is not set
 
 #
@@ -767,7 +787,8 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_OSD_INITIATOR is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
-CONFIG_SATA_PMP=y
+CONFIG_ATA_VERBOSE_ERROR=y
+# CONFIG_SATA_PMP is not set
 CONFIG_ATA_SFF=y
 # CONFIG_SATA_MV is not set
 # CONFIG_PATA_PLATFORM is not set
@@ -808,6 +829,7 @@ CONFIG_MII=y
 # CONFIG_ETHOC is not set
 CONFIG_SMSC911X=y
 # CONFIG_DNET is not set
+# CONFIG_ADF702X is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -818,12 +840,10 @@ CONFIG_SMSC911X=y
 # CONFIG_B44 is not set
 # CONFIG_KS8842 is not set
 # CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 CONFIG_WLAN_80211=y
 CONFIG_LIBERTAS=m
@@ -877,10 +897,12 @@ CONFIG_INPUT_EVBUG=m
 CONFIG_INPUT_KEYBOARD=y
 # CONFIG_KEYBOARD_ADP5588 is not set
 # CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_QT2160 is not set
 CONFIG_KEYBOARD_BFIN=y
 # CONFIG_KEYBOARD_LKKBD is not set
 # CONFIG_KEYBOARD_GPIO is not set
 # CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
 # CONFIG_KEYBOARD_NEWTON is not set
 # CONFIG_KEYBOARD_OPENCORES is not set
 # CONFIG_KEYBOARD_STOWAWAY is not set
@@ -900,6 +922,7 @@ CONFIG_TOUCHSCREEN_AD7877=m
 # CONFIG_TOUCHSCREEN_GUNZE is not set
 # CONFIG_TOUCHSCREEN_ELO is not set
 # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
 # CONFIG_TOUCHSCREEN_MTOUCH is not set
 # CONFIG_TOUCHSCREEN_INEXIO is not set
 # CONFIG_TOUCHSCREEN_MK712 is not set
@@ -910,7 +933,6 @@ CONFIG_TOUCHSCREEN_AD7877=m
 # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
 # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
 # CONFIG_TOUCHSCREEN_TSC2007 is not set
-# CONFIG_TOUCHSCREEN_W90X900 is not set
 CONFIG_INPUT_MISC=y
 # CONFIG_INPUT_ATI_REMOTE is not set
 # CONFIG_INPUT_ATI_REMOTE2 is not set
@@ -976,11 +998,6 @@ CONFIG_UNIX98_PTYS=y
 # CONFIG_LEGACY_PTYS is not set
 CONFIG_BFIN_OTP=y
 # CONFIG_BFIN_OTP_WRITE_ENABLE is not set
-
-#
-# CAN, the car bus and industrial fieldbus
-#
-# CONFIG_CAN4LINUX is not set
 # CONFIG_IPMI_HANDLER is not set
 # CONFIG_HW_RANDOM is not set
 # CONFIG_R3964 is not set
@@ -988,6 +1005,7 @@ CONFIG_BFIN_OTP=y
 # CONFIG_TCG_TPM is not set
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_HELPER_AUTO=y
 
@@ -1021,9 +1039,6 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
@@ -1078,11 +1093,15 @@ CONFIG_GPIO_SYSFS=y
 #
 # CONFIG_GPIO_MAX7301 is not set
 # CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+
+#
+# AC97 GPIO expanders:
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 CONFIG_WATCHDOG=y
 # CONFIG_WATCHDOG_NOWAYOUT is not set
 
@@ -1116,8 +1135,10 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13783 is not set
 # CONFIG_AB3100_CORE is not set
 # CONFIG_EZX_PCAP is not set
 # CONFIG_REGULATOR is not set
@@ -1192,6 +1213,7 @@ CONFIG_LOGO=y
 CONFIG_LOGO_BLACKFIN_CLUT224=y
 CONFIG_SOUND=y
 CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
 CONFIG_SND=y
 CONFIG_SND_TIMER=y
 CONFIG_SND_PCM=y
@@ -1245,7 +1267,6 @@ CONFIG_SND_SOC_AD1980=y
 CONFIG_AC97_BUS=y
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 
 #
@@ -1268,6 +1289,7 @@ CONFIG_HID_CYPRESS=y
 CONFIG_HID_EZKEY=y
 # CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=y
+# CONFIG_HID_TWINHAN is not set
 # CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
@@ -1422,10 +1444,11 @@ CONFIG_MMC_BLOCK_BOUNCE=y
 # MMC/SD/SDIO Host Controller Drivers
 #
 # CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
+# CONFIG_MMC_SPI is not set
 CONFIG_SDH_BFIN=y
 # CONFIG_SDH_BFIN_MISSING_CMD_PULLUP_WORKAROUND is not set
-# CONFIG_SDH_BFIN_ENABLE_SDIO_IRQ is not set
-# CONFIG_MMC_SPI is not set
 # CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
 # CONFIG_ACCESSIBILITY is not set
@@ -1472,6 +1495,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_R9701 is not set
 # CONFIG_RTC_DRV_RS5C348 is not set
 # CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
 
 #
 # Platform RTC drivers
@@ -1522,6 +1546,7 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_XFS_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
@@ -1563,7 +1588,6 @@ CONFIG_NTFS_RW=y
 CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
 CONFIG_SYSFS=y
-# CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
 CONFIG_MISC_FILESYSTEMS=y
@@ -1595,7 +1619,6 @@ CONFIG_JFFS2_RTIME=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=m
 CONFIG_NFS_V3=y
@@ -1680,6 +1703,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -1714,12 +1738,14 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_FRAME_POINTER is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_PAGE_POISONING is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
@@ -1730,7 +1756,6 @@ CONFIG_TRACING_SUPPORT=y
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
-# CONFIG_KMEMCHECK is not set
 # CONFIG_DEBUG_STACKOVERFLOW is not set
 # CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_DEBUG_VERBOSE=y
@@ -1766,7 +1791,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -1798,11 +1822,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
diff --git a/arch/blackfin/configs/BF561-ACVILON_defconfig b/arch/blackfin/configs/BF561-ACVILON_defconfig
index b9b0f93d0bd..6a776ce75e9 100644
--- a/arch/blackfin/configs/BF561-ACVILON_defconfig
+++ b/arch/blackfin/configs/BF561-ACVILON_defconfig
@@ -114,7 +114,7 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-CONFIG_LBDAF=y
+# CONFIG_LBDAF is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -1486,19 +1486,10 @@ CONFIG_DEBUG_INFO=y
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
 CONFIG_TRACING_SUPPORT=y
-CONFIG_FTRACE=y
-# CONFIG_FUNCTION_TRACER is not set
-# CONFIG_IRQSOFF_TRACER is not set
-# CONFIG_SCHED_TRACER is not set
-# CONFIG_ENABLE_DEFAULT_TRACERS is not set
-# CONFIG_BOOT_TRACER is not set
-CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_FTRACE is not set
+# CONFIG_BRANCH_PROFILE_NONE is not set
 # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
 # CONFIG_PROFILE_ALL_BRANCHES is not set
-# CONFIG_STACK_TRACER is not set
-# CONFIG_KMEMTRACE is not set
-# CONFIG_WORKQUEUE_TRACER is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_DYNAMIC_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
diff --git a/arch/blackfin/configs/BF561-EZKIT_defconfig b/arch/blackfin/configs/BF561-EZKIT_defconfig
index e3ecdcc3e76..792ff093883 100644
--- a/arch/blackfin/configs/BF561-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF561-EZKIT_defconfig
@@ -1,7 +1,6 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.31.5
-# Mon Nov  2 21:59:31 2009
+# Linux kernel version: 2.6.32.2
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
@@ -12,7 +11,6 @@ CONFIG_GENERIC_CSUM=y
 CONFIG_GENERIC_BUG=y
 CONFIG_ZONE_DMA=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
@@ -49,11 +47,12 @@ CONFIG_SYSVIPC_SYSCTL=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -89,17 +88,15 @@ CONFIG_EPOLL=y
 # CONFIG_AIO is not set
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 
 #
@@ -163,15 +160,15 @@ CONFIG_PREEMPT_VOLUNTARY=y
 # CONFIG_BF537 is not set
 # CONFIG_BF538 is not set
 # CONFIG_BF539 is not set
-# CONFIG_BF542 is not set
+# CONFIG_BF542_std is not set
 # CONFIG_BF542M is not set
-# CONFIG_BF544 is not set
+# CONFIG_BF544_std is not set
 # CONFIG_BF544M is not set
-# CONFIG_BF547 is not set
+# CONFIG_BF547_std is not set
 # CONFIG_BF547M is not set
-# CONFIG_BF548 is not set
+# CONFIG_BF548_std is not set
 # CONFIG_BF548M is not set
-# CONFIG_BF549 is not set
+# CONFIG_BF549_std is not set
 # CONFIG_BF549M is not set
 CONFIG_BF561=y
 # CONFIG_SMP is not set
@@ -180,9 +177,9 @@ CONFIG_BF_REV_MAX=5
 # CONFIG_BF_REV_0_0 is not set
 # CONFIG_BF_REV_0_1 is not set
 # CONFIG_BF_REV_0_2 is not set
-# CONFIG_BF_REV_0_3 is not set
+CONFIG_BF_REV_0_3=y
 # CONFIG_BF_REV_0_4 is not set
-CONFIG_BF_REV_0_5=y
+# CONFIG_BF_REV_0_5 is not set
 # CONFIG_BF_REV_0_6 is not set
 # CONFIG_BF_REV_ANY is not set
 # CONFIG_BF_REV_NONE is not set
@@ -298,7 +295,7 @@ CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 # CONFIG_TICKSOURCE_GPTMR0 is not set
 CONFIG_TICKSOURCE_CORETMR=y
-# CONFIG_CYCLES_CLOCKSOURCE is not set
+CONFIG_CYCLES_CLOCKSOURCE=y
 # CONFIG_GPTMR0_CLOCKSOURCE is not set
 CONFIG_TICK_ONESHOT=y
 # CONFIG_NO_HZ is not set
@@ -353,12 +350,14 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
-CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
 CONFIG_BFIN_GPTIMERS=m
 # CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
 CONFIG_DMA_UNCACHED_1M=y
+# CONFIG_DMA_UNCACHED_512K is not set
+# CONFIG_DMA_UNCACHED_256K is not set
+# CONFIG_DMA_UNCACHED_128K is not set
 # CONFIG_DMA_UNCACHED_NONE is not set
 
 #
@@ -370,9 +369,11 @@ CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_DCACHE_BANKA is not set
 CONFIG_BFIN_EXTMEM_DCACHEABLE=y
-CONFIG_BFIN_EXTMEM_WRITEBACK=y
-# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
-# CONFIG_BFIN_L2_DCACHEABLE is not set
+# CONFIG_BFIN_EXTMEM_WRITEBACK is not set
+CONFIG_BFIN_EXTMEM_WRITETHROUGH=y
+CONFIG_BFIN_L2_DCACHEABLE=y
+# CONFIG_BFIN_L2_WRITEBACK is not set
+CONFIG_BFIN_L2_WRITETHROUGH=y
 
 #
 # Memory Protection Unit
@@ -472,6 +473,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -613,6 +615,7 @@ CONFIG_MTD_PHYSMAP=m
 #
 # CONFIG_MTD_DATAFLASH is not set
 # CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SST25L is not set
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
@@ -685,6 +688,7 @@ CONFIG_SMC91X=y
 # CONFIG_ETHOC is not set
 # CONFIG_SMSC911X is not set
 # CONFIG_DNET is not set
+# CONFIG_ADF702X is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -695,14 +699,10 @@ CONFIG_SMC91X=y
 # CONFIG_B44 is not set
 # CONFIG_KS8842 is not set
 # CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
-
-#
-# Wireless LAN
-#
-# CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
+# CONFIG_WLAN is not set
 
 #
 # Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -782,11 +782,6 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
-
-#
-# CAN, the car bus and industrial fieldbus
-#
-# CONFIG_CAN4LINUX is not set
 # CONFIG_IPMI_HANDLER is not set
 # CONFIG_HW_RANDOM is not set
 # CONFIG_R3964 is not set
@@ -838,11 +833,15 @@ CONFIG_GPIO_SYSFS=y
 #
 # CONFIG_GPIO_MAX7301 is not set
 # CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+
+#
+# AC97 GPIO expanders:
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 CONFIG_WATCHDOG=y
 # CONFIG_WATCHDOG_NOWAYOUT is not set
 
@@ -865,6 +864,7 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_MC13783 is not set
 # CONFIG_EZX_PCAP is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
@@ -884,7 +884,6 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_SOUND is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=m
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 # CONFIG_HID_PID is not set
 
@@ -923,6 +922,7 @@ CONFIG_HID=m
 # CONFIG_XFS_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
@@ -957,7 +957,6 @@ CONFIG_INOTIFY_USER=y
 CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
 CONFIG_SYSFS=y
-# CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
 CONFIG_MISC_FILESYSTEMS=y
@@ -989,7 +988,6 @@ CONFIG_JFFS2_RTIME=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=m
 CONFIG_NFS_V3=y
@@ -1064,6 +1062,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -1098,26 +1097,24 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_FRAME_POINTER is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_PAGE_POISONING is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
-# CONFIG_BRANCH_PROFILE_NONE is not set
-# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
-# CONFIG_PROFILE_ALL_BRANCHES is not set
 # CONFIG_DYNAMIC_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
-# CONFIG_KMEMCHECK is not set
 # CONFIG_DEBUG_STACKOVERFLOW is not set
 # CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_DEBUG_VERBOSE=y
@@ -1153,7 +1150,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -1185,11 +1181,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
diff --git a/arch/blackfin/configs/H8606_defconfig b/arch/blackfin/configs/H8606_defconfig
index bc7fae3d8b8..ed0a7ebeb85 100644
--- a/arch/blackfin/configs/H8606_defconfig
+++ b/arch/blackfin/configs/H8606_defconfig
@@ -834,13 +834,6 @@ CONFIG_SND_VERBOSE_PROCFS=y
 #
 # ALSA Blackfin devices
 #
-CONFIG_SND_BLACKFIN_AD1836=m
-CONFIG_SND_BLACKFIN_AD1836_TDM=y
-# CONFIG_SND_BLACKFIN_AD1836_I2S is not set
-CONFIG_SND_BLACKFIN_AD1836_MULSUB=y
-# CONFIG_SND_BLACKFIN_AD1836_5P1 is not set
-CONFIG_SND_BLACKFIN_SPORT=0
-CONFIG_SND_BLACKFIN_SPI_PFBIT=4
 # CONFIG_SND_BFIN_AD73311 is not set
 
 #
diff --git a/arch/blackfin/configs/PNAV-10_defconfig b/arch/blackfin/configs/PNAV-10_defconfig
index 67d12768602..ad58fede1f4 100644
--- a/arch/blackfin/configs/PNAV-10_defconfig
+++ b/arch/blackfin/configs/PNAV-10_defconfig
@@ -1,21 +1,27 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28.10
+# Linux kernel version: 2.6.32.2
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 CONFIG_BLACKFIN=y
+CONFIG_GENERIC_CSUM=y
+CONFIG_GENERIC_BUG=y
 CONFIG_ZONE_DMA=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -25,16 +31,32 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CGROUPS is not set
 # CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
 # CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
@@ -58,6 +80,10 @@ CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 # CONFIG_AIO is not set
+
+#
+# Kernel Performance Events And Counters
+#
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
@@ -65,11 +91,14 @@ CONFIG_SLAB=y
 # CONFIG_SLOB is not set
 CONFIG_MMAP_ALLOW_UNINITIALIZED=y
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -77,11 +106,8 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
+# CONFIG_LBDAF is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -97,7 +123,6 @@ CONFIG_DEFAULT_AS=y
 # CONFIG_DEFAULT_CFQ is not set
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="anticipatory"
-CONFIG_CLASSIC_RCU=y
 # CONFIG_PREEMPT_NONE is not set
 CONFIG_PREEMPT_VOLUNTARY=y
 # CONFIG_PREEMPT is not set
@@ -128,15 +153,15 @@ CONFIG_PREEMPT_VOLUNTARY=y
 CONFIG_BF537=y
 # CONFIG_BF538 is not set
 # CONFIG_BF539 is not set
-# CONFIG_BF542 is not set
+# CONFIG_BF542_std is not set
 # CONFIG_BF542M is not set
-# CONFIG_BF544 is not set
+# CONFIG_BF544_std is not set
 # CONFIG_BF544M is not set
-# CONFIG_BF547 is not set
+# CONFIG_BF547_std is not set
 # CONFIG_BF547M is not set
-# CONFIG_BF548 is not set
+# CONFIG_BF548_std is not set
 # CONFIG_BF548M is not set
-# CONFIG_BF549 is not set
+# CONFIG_BF549_std is not set
 # CONFIG_BF549M is not set
 # CONFIG_BF561 is not set
 CONFIG_BF_REV_MIN=2
@@ -180,7 +205,8 @@ CONFIG_IRQ_MEM_DMA1=13
 CONFIG_IRQ_WATCH=13
 CONFIG_IRQ_SPI=10
 # CONFIG_BFIN537_STAMP is not set
-# CONFIG_BFIN537_BLUETECHNIX_CM is not set
+# CONFIG_BFIN537_BLUETECHNIX_CM_E is not set
+# CONFIG_BFIN537_BLUETECHNIX_CM_U is not set
 # CONFIG_BFIN537_BLUETECHNIX_TCM is not set
 CONFIG_PNAV10=y
 # CONFIG_CAMSIG_MINOTAUR is not set
@@ -282,7 +308,6 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
@@ -291,16 +316,18 @@ CONFIG_BFIN_GPTIMERS=y
 # CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
 CONFIG_DMA_UNCACHED_1M=y
+# CONFIG_DMA_UNCACHED_512K is not set
+# CONFIG_DMA_UNCACHED_256K is not set
+# CONFIG_DMA_UNCACHED_128K is not set
 # CONFIG_DMA_UNCACHED_NONE is not set
 
 #
 # Cache Support
 #
 CONFIG_BFIN_ICACHE=y
-# CONFIG_BFIN_ICACHE_LOCK is not set
+CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_DCACHE_BANKA is not set
-CONFIG_BFIN_EXTMEM_ICACHEABLE=y
 CONFIG_BFIN_EXTMEM_DCACHEABLE=y
 CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
@@ -311,7 +338,7 @@ CONFIG_BFIN_EXTMEM_WRITEBACK=y
 # CONFIG_MPU is not set
 
 #
-# Asynchonous Memory Configuration
+# Asynchronous Memory Configuration
 #
 
 #
@@ -367,11 +394,6 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-# CONFIG_XFRM_SUB_POLICY is not set
-# CONFIG_XFRM_MIGRATE is not set
-# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
@@ -395,7 +417,6 @@ CONFIG_IP_PNP=y
 # CONFIG_INET_XFRM_MODE_BEET is not set
 # CONFIG_INET_LRO is not set
 # CONFIG_INET_DIAG is not set
-CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_CUBIC=y
 CONFIG_DEFAULT_TCP_CONG="cubic"
@@ -406,6 +427,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -419,7 +441,10 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
 # CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
 
 #
 # Network testing
@@ -430,13 +455,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-# CONFIG_PHONET is not set
-CONFIG_WIRELESS=y
-# CONFIG_CFG80211 is not set
-CONFIG_WIRELESS_OLD_REGULATORY=y
-# CONFIG_WIRELESS_EXT is not set
-# CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
 
@@ -455,6 +475,7 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
@@ -506,6 +527,7 @@ CONFIG_MTD_UCLINUX=y
 #
 # CONFIG_MTD_DATAFLASH is not set
 # CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SST25L is not set
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
@@ -521,11 +543,6 @@ CONFIG_MTD_NAND=y
 # CONFIG_MTD_NAND_VERIFY_WRITE is not set
 # CONFIG_MTD_NAND_ECC_SMC is not set
 # CONFIG_MTD_NAND_MUSEUM_IDS is not set
-CONFIG_MTD_NAND_BFIN=y
-CONFIG_BFIN_NAND_BASE=0x20100000
-CONFIG_BFIN_NAND_CLE=2
-CONFIG_BFIN_NAND_ALE=1
-CONFIG_BFIN_NAND_READY=44
 CONFIG_MTD_NAND_IDS=y
 # CONFIG_MTD_NAND_DISKONCHIP is not set
 # CONFIG_MTD_NAND_NANDSIM is not set
@@ -533,6 +550,11 @@ CONFIG_MTD_NAND_IDS=y
 # CONFIG_MTD_ONENAND is not set
 
 #
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
@@ -549,10 +571,20 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
 # CONFIG_ATA_OVER_ETH is not set
 # CONFIG_BLK_DEV_HD is not set
 CONFIG_MISC_DEVICES=y
-# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_AD525X_DPOT is not set
 # CONFIG_ICS932S401 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_ISL29003 is not set
 # CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
 CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
 
@@ -587,6 +619,9 @@ CONFIG_PHYLIB=y
 # CONFIG_BROADCOM_PHY is not set
 # CONFIG_ICPLUS_PHY is not set
 # CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
 # CONFIG_FIXED_PHY is not set
 # CONFIG_MDIO_BITBANG is not set
 CONFIG_NET_ETHERNET=y
@@ -597,9 +632,12 @@ CONFIG_BFIN_TX_DESC_NUM=100
 CONFIG_BFIN_RX_DESC_NUM=100
 CONFIG_BFIN_MAC_RMII=y
 # CONFIG_SMC91X is not set
-# CONFIG_SMSC911X is not set
 # CONFIG_DM9000 is not set
 # CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_ADF702X is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -608,15 +646,16 @@ CONFIG_BFIN_MAC_RMII=y
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
 
 #
-# Wireless LAN
+# Enable WiMAX (Networking options) to see the WiMAX drivers
 #
-# CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
-# CONFIG_IWLWIFI_LEDS is not set
 # CONFIG_WAN is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
@@ -649,14 +688,17 @@ CONFIG_INPUT_EVDEV=y
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
 CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
 CONFIG_TOUCHSCREEN_AD7877=y
 # CONFIG_TOUCHSCREEN_AD7879_I2C is not set
 # CONFIG_TOUCHSCREEN_AD7879_SPI is not set
 # CONFIG_TOUCHSCREEN_AD7879 is not set
-# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_EETI is not set
 # CONFIG_TOUCHSCREEN_FUJITSU is not set
 # CONFIG_TOUCHSCREEN_GUNZE is not set
 # CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
 # CONFIG_TOUCHSCREEN_MTOUCH is not set
 # CONFIG_TOUCHSCREEN_INEXIO is not set
 # CONFIG_TOUCHSCREEN_MK712 is not set
@@ -665,6 +707,7 @@ CONFIG_TOUCHSCREEN_AD7877=y
 # CONFIG_TOUCHSCREEN_TOUCHWIN is not set
 # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
 # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
 CONFIG_INPUT_MISC=y
 # CONFIG_INPUT_ATI_REMOTE is not set
 # CONFIG_INPUT_ATI_REMOTE2 is not set
@@ -673,7 +716,9 @@ CONFIG_INPUT_MISC=y
 # CONFIG_INPUT_YEALINK is not set
 # CONFIG_INPUT_CM109 is not set
 CONFIG_INPUT_UINPUT=y
-# CONFIG_CONFIG_INPUT_PCF8574 is not set
+# CONFIG_INPUT_AD714X is not set
+# CONFIG_INPUT_ADXL34X is not set
+# CONFIG_INPUT_PCF8574 is not set
 
 #
 # Hardware I/O ports
@@ -684,16 +729,13 @@ CONFIG_INPUT_UINPUT=y
 #
 # Character devices
 #
-# CONFIG_AD9960 is not set
 CONFIG_BFIN_DMA_INTERFACE=m
 # CONFIG_BFIN_PPI is not set
 # CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
 # CONFIG_BFIN_SPI_ADC is not set
 CONFIG_BFIN_SPORT=y
-# CONFIG_BFIN_TIMER_LATENCY is not set
 # CONFIG_BFIN_TWI_LCD is not set
-# CONFIG_SIMPLE_GPIO is not set
 # CONFIG_VT is not set
 CONFIG_DEVKMEM=y
 # CONFIG_BFIN_JTAG_COMM is not set
@@ -707,6 +749,7 @@ CONFIG_DEVKMEM=y
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_MAX3100 is not set
 CONFIG_SERIAL_BFIN=y
 CONFIG_SERIAL_BFIN_CONSOLE=y
 CONFIG_SERIAL_BFIN_DMA=y
@@ -719,24 +762,17 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_BFIN_SPORT is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
-
-#
-# CAN, the car bus and industrial fieldbus
-#
-CONFIG_CAN4LINUX=y
-
-#
-# linux embedded drivers
-#
-CONFIG_CAN_BLACKFIN=m
 # CONFIG_IPMI_HANDLER is not set
 CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
 # CONFIG_R3964 is not set
 # CONFIG_RAW_DRIVER is not set
 # CONFIG_TCG_TPM is not set
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_HELPER_AUTO=y
 
@@ -769,14 +805,6 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_EEPROM_AT24 is not set
-# CONFIG_SENSORS_AD5252 is not set
-# CONFIG_EEPROM_LEGACY is not set
-CONFIG_SENSORS_PCF8574=m
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
@@ -792,20 +820,29 @@ CONFIG_SPI_BFIN=y
 # CONFIG_SPI_BFIN_LOCK is not set
 # CONFIG_SPI_BFIN_SPORT is not set
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
 
 #
 # SPI Protocol Masters
 #
-# CONFIG_EEPROM_AT25 is not set
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
 # CONFIG_GPIOLIB is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
-# CONFIG_SENSORS_AD5252 is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
 # CONFIG_SENSORS_AD7414 is not set
 # CONFIG_SENSORS_AD7418 is not set
 # CONFIG_SENSORS_ADCXX is not set
@@ -818,11 +855,13 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
 # CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ADT7475 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_F71805F is not set
 # CONFIG_SENSORS_F71882FG is not set
 # CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_G760A is not set
 # CONFIG_SENSORS_GL518SM is not set
 # CONFIG_SENSORS_GL520SM is not set
 # CONFIG_SENSORS_IT87 is not set
@@ -838,17 +877,24 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_LM90 is not set
 # CONFIG_SENSORS_LM92 is not set
 # CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4215 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LM95241 is not set
 # CONFIG_SENSORS_MAX1111 is not set
 # CONFIG_SENSORS_MAX1619 is not set
 # CONFIG_SENSORS_MAX6650 is not set
 # CONFIG_SENSORS_PC87360 is not set
 # CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_SHT15 is not set
 # CONFIG_SENSORS_DME1737 is not set
 # CONFIG_SENSORS_SMSC47M1 is not set
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
 # CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_TMP401 is not set
+# CONFIG_SENSORS_TMP421 is not set
 # CONFIG_SENSORS_VT1211 is not set
 # CONFIG_SENSORS_W83781D is not set
 # CONFIG_SENSORS_W83791D is not set
@@ -858,9 +904,8 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_W83L786NG is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_SENSORS_LIS3_SPI is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -875,28 +920,19 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_EZX_PCAP is not set
 # CONFIG_REGULATOR is not set
-
-#
-# Multimedia devices
-#
-
-#
-# Multimedia core support
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_DVB_CORE is not set
-# CONFIG_VIDEO_MEDIA is not set
-
-#
-# Multimedia drivers
-#
-CONFIG_DAB=y
+# CONFIG_MEDIA_SUPPORT is not set
 
 #
 # Graphics support
@@ -928,24 +964,24 @@ CONFIG_FB_CFB_IMAGEBLIT=y
 # CONFIG_FB_BFIN_T350MCQB is not set
 # CONFIG_FB_BFIN_LQ035Q1 is not set
 CONFIG_FB_BF537_LQ035=y
-CONFIG_LQ035_SLAVE_ADDR=0x58
-CONFIG_FB_BFIN_LANDSCAPE=y
-# CONFIG_FB_BFIN_BGR is not set
 # CONFIG_FB_BFIN_7393 is not set
 # CONFIG_FB_HITACHI_TX09 is not set
 # CONFIG_FB_S1D13XXX is not set
 # CONFIG_FB_VIRTUAL is not set
 # CONFIG_FB_METRONOME is not set
 # CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
 CONFIG_BACKLIGHT_LCD_SUPPORT=y
 CONFIG_LCD_CLASS_DEVICE=y
+# CONFIG_LCD_LMS283GF05 is not set
 # CONFIG_LCD_LTV350QV is not set
 # CONFIG_LCD_ILI9320 is not set
 # CONFIG_LCD_TDO24M is not set
 # CONFIG_LCD_VGG2432A4 is not set
 # CONFIG_LCD_PLATFORM is not set
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_BACKLIGHT_CORGI is not set
+CONFIG_BACKLIGHT_GENERIC=y
+# CONFIG_BACKLIGHT_ADP8870 is not set
 
 #
 # Display device support
@@ -954,6 +990,7 @@ CONFIG_BACKLIGHT_CLASS_DEVICE=y
 # CONFIG_LOGO is not set
 CONFIG_SOUND=y
 CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
 CONFIG_SND=m
 # CONFIG_SND_SEQUENCER is not set
 # CONFIG_SND_MIXER_OSS is not set
@@ -963,6 +1000,11 @@ CONFIG_SND=m
 # CONFIG_SND_VERBOSE_PROCFS is not set
 # CONFIG_SND_VERBOSE_PRINTK is not set
 # CONFIG_SND_DEBUG is not set
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
 CONFIG_SND_DRIVERS=y
 # CONFIG_SND_DUMMY is not set
 # CONFIG_SND_MTPAV is not set
@@ -973,7 +1015,6 @@ CONFIG_SND_SPI=y
 #
 # ALSA Blackfin devices
 #
-# CONFIG_SND_BLACKFIN_AD1836 is not set
 # CONFIG_SND_BFIN_AD73322 is not set
 # CONFIG_SND_SOC is not set
 CONFIG_SOUND_PRIME=y
@@ -993,9 +1034,13 @@ CONFIG_USB_ARCH_HAS_HCD=y
 #
 
 #
-# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
 #
 # CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
@@ -1031,6 +1076,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
 
 #
 # SPI RTC drivers
@@ -1042,6 +1088,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_R9701 is not set
 # CONFIG_RTC_DRV_RS5C348 is not set
 # CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
 
 #
 # Platform RTC drivers
@@ -1062,10 +1109,21 @@ CONFIG_RTC_INTF_DEV=y
 #
 CONFIG_RTC_DRV_BFIN=y
 # CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
 # CONFIG_STAGING is not set
 
 #
+# Firmware Drivers
+#
+# CONFIG_FIRMWARE_MEMMAP is not set
+# CONFIG_SIGMA is not set
+
+#
 # File systems
 #
 CONFIG_EXT2_FS=y
@@ -1078,9 +1136,13 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
-CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -1090,6 +1152,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -1108,13 +1175,9 @@ CONFIG_INOTIFY_USER=y
 CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
 CONFIG_SYSFS=y
-# CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -1123,17 +1186,8 @@ CONFIG_SYSFS=y
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS2_FS is not set
-CONFIG_YAFFS_FS=y
-CONFIG_YAFFS_YAFFS1=y
-# CONFIG_YAFFS_9BYTE_TAGS is not set
-# CONFIG_YAFFS_DOES_ECC is not set
-CONFIG_YAFFS_YAFFS2=y
-CONFIG_YAFFS_AUTO_YAFFS2=y
-# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
-# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
-# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
-CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
@@ -1152,7 +1206,6 @@ CONFIG_LOCKD=m
 CONFIG_LOCKD_V4=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=m
-# CONFIG_SUNRPC_REGISTER_V4 is not set
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 CONFIG_SMB_FS=m
@@ -1217,18 +1270,19 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_SECTION_MISMATCH=y
 # CONFIG_DEBUG_KERNEL is not set
 # CONFIG_DEBUG_BUGVERBOSE is not set
 # CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
-
-#
-# Tracers
-#
-# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_DEBUG_VERBOSE=y
@@ -1245,6 +1299,7 @@ CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
 # CONFIG_EARLY_PRINTK is not set
 # CONFIG_CPLB_INFO is not set
 # CONFIG_ACCESS_CHECK is not set
+# CONFIG_BFIN_ISRAM_SELF_TEST is not set
 
 #
 # Security options
@@ -1253,14 +1308,14 @@ CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
 CONFIG_SECURITY=y
 # CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_NETWORK is not set
+# CONFIG_SECURITY_PATH is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
-CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
+# CONFIG_SECURITY_TOMOYO is not set
 CONFIG_CRYPTO=y
 
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -1292,11 +1347,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1333,6 +1390,7 @@ CONFIG_CRYPTO=y
 # Compression
 #
 # CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
 # CONFIG_CRYPTO_LZO is not set
 
 #
@@ -1340,11 +1398,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_CRC_CCITT=m
 # CONFIG_CRC16 is not set
 # CONFIG_CRC_T10DIF is not set
@@ -1356,3 +1416,4 @@ CONFIG_ZLIB_INFLATE=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/blackfin/configs/TCM-BF518_defconfig b/arch/blackfin/configs/TCM-BF518_defconfig
new file mode 100644
index 00000000000..4d31e2a4ed4
--- /dev/null
+++ b/arch/blackfin/configs/TCM-BF518_defconfig
@@ -0,0 +1,1375 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.32.3
+#
+# CONFIG_MMU is not set
+# CONFIG_FPU is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+CONFIG_BLACKFIN=y
+CONFIG_GENERIC_CSUM=y
+CONFIG_GENERIC_BUG=y
+CONFIG_ZONE_DMA=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_FORCE_MAX_ZONEORDER=14
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+# CONFIG_KERNEL_GZIP is not set
+# CONFIG_KERNEL_BZIP2 is not set
+CONFIG_KERNEL_LZMA=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_RD_GZIP is not set
+# CONFIG_RD_BZIP2 is not set
+CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+# CONFIG_ELF_CORE is not set
+CONFIG_BASE_FULL=y
+# CONFIG_FUTEX is not set
+CONFIG_EPOLL=y
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
+# CONFIG_AIO is not set
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_MMAP_ALLOW_UNINITIALIZED=y
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_SLOW_WORK is not set
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_SLABINFO=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+CONFIG_DEFAULT_NOOP=y
+CONFIG_DEFAULT_IOSCHED="noop"
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+# CONFIG_FREEZER is not set
+
+#
+# Blackfin Processor Options
+#
+
+#
+# Processor and Board Settings
+#
+# CONFIG_BF512 is not set
+# CONFIG_BF514 is not set
+# CONFIG_BF516 is not set
+CONFIG_BF518=y
+# CONFIG_BF522 is not set
+# CONFIG_BF523 is not set
+# CONFIG_BF524 is not set
+# CONFIG_BF525 is not set
+# CONFIG_BF526 is not set
+# CONFIG_BF527 is not set
+# CONFIG_BF531 is not set
+# CONFIG_BF532 is not set
+# CONFIG_BF533 is not set
+# CONFIG_BF534 is not set
+# CONFIG_BF536 is not set
+# CONFIG_BF537 is not set
+# CONFIG_BF538 is not set
+# CONFIG_BF539 is not set
+# CONFIG_BF542_std is not set
+# CONFIG_BF542M is not set
+# CONFIG_BF544_std is not set
+# CONFIG_BF544M is not set
+# CONFIG_BF547_std is not set
+# CONFIG_BF547M is not set
+# CONFIG_BF548_std is not set
+# CONFIG_BF548M is not set
+# CONFIG_BF549_std is not set
+# CONFIG_BF549M is not set
+# CONFIG_BF561 is not set
+CONFIG_BF_REV_MIN=0
+CONFIG_BF_REV_MAX=2
+# CONFIG_BF_REV_0_0 is not set
+CONFIG_BF_REV_0_1=y
+# CONFIG_BF_REV_0_2 is not set
+# CONFIG_BF_REV_0_3 is not set
+# CONFIG_BF_REV_0_4 is not set
+# CONFIG_BF_REV_0_5 is not set
+# CONFIG_BF_REV_0_6 is not set
+# CONFIG_BF_REV_ANY is not set
+# CONFIG_BF_REV_NONE is not set
+CONFIG_BF51x=y
+# CONFIG_BFIN518F_EZBRD is not set
+CONFIG_BFIN518F_TCM=y
+
+#
+# BF518 Specific Configuration
+#
+
+#
+# Alternative Multiplexing Scheme
+#
+# CONFIG_BF518_SPORT0_PORTF is not set
+CONFIG_BF518_SPORT0_PORTG=y
+CONFIG_BF518_SPORT0_TSCLK_PG10=y
+# CONFIG_BF518_SPORT0_TSCLK_PG14 is not set
+CONFIG_BF518_UART1_PORTF=y
+# CONFIG_BF518_UART1_PORTG is not set
+
+#
+# Interrupt Priority Assignment
+#
+
+#
+# Priority
+#
+CONFIG_IRQ_PLL_WAKEUP=7
+CONFIG_IRQ_DMA0_ERROR=7
+CONFIG_IRQ_DMAR0_BLK=7
+CONFIG_IRQ_DMAR1_BLK=7
+CONFIG_IRQ_DMAR0_OVR=7
+CONFIG_IRQ_DMAR1_OVR=7
+CONFIG_IRQ_PPI_ERROR=7
+CONFIG_IRQ_MAC_ERROR=7
+CONFIG_IRQ_SPORT0_ERROR=7
+CONFIG_IRQ_SPORT1_ERROR=7
+CONFIG_IRQ_PTP_ERROR=7
+CONFIG_IRQ_UART0_ERROR=7
+CONFIG_IRQ_UART1_ERROR=7
+CONFIG_IRQ_RTC=8
+CONFIG_IRQ_PPI=8
+CONFIG_IRQ_SPORT0_RX=9
+CONFIG_IRQ_SPORT0_TX=9
+CONFIG_IRQ_SPORT1_RX=9
+CONFIG_IRQ_SPORT1_TX=9
+CONFIG_IRQ_TWI=10
+CONFIG_IRQ_SPI0=10
+CONFIG_IRQ_UART0_RX=10
+CONFIG_IRQ_UART0_TX=10
+CONFIG_IRQ_UART1_RX=10
+CONFIG_IRQ_UART1_TX=10
+CONFIG_IRQ_OPTSEC=11
+CONFIG_IRQ_CNT=11
+CONFIG_IRQ_MAC_RX=11
+CONFIG_IRQ_PORTH_INTA=11
+CONFIG_IRQ_MAC_TX=11
+CONFIG_IRQ_PORTH_INTB=11
+CONFIG_IRQ_TIMER0=12
+CONFIG_IRQ_TIMER1=12
+CONFIG_IRQ_TIMER2=12
+CONFIG_IRQ_TIMER3=12
+CONFIG_IRQ_TIMER4=12
+CONFIG_IRQ_TIMER5=12
+CONFIG_IRQ_TIMER6=12
+CONFIG_IRQ_TIMER7=12
+CONFIG_IRQ_PORTG_INTA=12
+CONFIG_IRQ_PORTG_INTB=12
+CONFIG_IRQ_MEM_DMA0=13
+CONFIG_IRQ_MEM_DMA1=13
+CONFIG_IRQ_WATCH=13
+CONFIG_IRQ_PORTF_INTA=13
+CONFIG_IRQ_PORTF_INTB=13
+CONFIG_IRQ_SPI0_ERROR=7
+CONFIG_IRQ_SPI1_ERROR=7
+CONFIG_IRQ_RSI_INT0=7
+CONFIG_IRQ_RSI_INT1=7
+CONFIG_IRQ_PWM_TRIP=10
+CONFIG_IRQ_PWM_SYNC=10
+CONFIG_IRQ_PTP_STAT=10
+
+#
+# Board customizations
+#
+# CONFIG_CMDLINE_BOOL is not set
+CONFIG_BOOT_LOAD=0x1000
+
+#
+# Clock/PLL Setup
+#
+CONFIG_CLKIN_HZ=25000000
+# CONFIG_BFIN_KERNEL_CLOCK is not set
+CONFIG_MAX_VCO_HZ=400000000
+CONFIG_MIN_VCO_HZ=50000000
+CONFIG_MAX_SCLK_HZ=133333333
+CONFIG_MIN_SCLK_HZ=27000000
+
+#
+# Kernel Timer/Scheduler
+#
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+
+#
+# Clock event device
+#
+# CONFIG_TICKSOURCE_GPTMR0 is not set
+CONFIG_TICKSOURCE_CORETMR=y
+
+#
+# Clock souce
+#
+# CONFIG_CYCLES_CLOCKSOURCE is not set
+# CONFIG_GPTMR0_CLOCKSOURCE is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+
+#
+# Misc
+#
+CONFIG_BFIN_SCRATCH_REG_RETN=y
+# CONFIG_BFIN_SCRATCH_REG_RETE is not set
+# CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
+
+#
+# Blackfin Kernel Optimizations
+#
+
+#
+# Memory Optimizations
+#
+CONFIG_I_ENTRY_L1=y
+CONFIG_EXCPT_IRQ_SYSC_L1=y
+CONFIG_DO_IRQ_L1=y
+CONFIG_CORE_TIMER_IRQ_L1=y
+CONFIG_IDLE_L1=y
+# CONFIG_SCHEDULE_L1 is not set
+CONFIG_ARITHMETIC_OPS_L1=y
+CONFIG_ACCESS_OK_L1=y
+# CONFIG_MEMSET_L1 is not set
+# CONFIG_MEMCPY_L1 is not set
+# CONFIG_SYS_BFIN_SPINLOCK_L1 is not set
+# CONFIG_IP_CHECKSUM_L1 is not set
+CONFIG_CACHELINE_ALIGNED_L1=y
+# CONFIG_SYSCALL_TAB_L1 is not set
+# CONFIG_CPLB_SWITCH_TAB_L1 is not set
+CONFIG_APP_STACK_L1=y
+
+#
+# Speed Optimizations
+#
+CONFIG_BFIN_INS_LOWOVERHEAD=y
+CONFIG_RAMKERNEL=y
+# CONFIG_ROMKERNEL is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_VIRT_TO_BUS=y
+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0
+CONFIG_BFIN_GPTIMERS=m
+# CONFIG_DMA_UNCACHED_4M is not set
+# CONFIG_DMA_UNCACHED_2M is not set
+CONFIG_DMA_UNCACHED_1M=y
+# CONFIG_DMA_UNCACHED_512K is not set
+# CONFIG_DMA_UNCACHED_256K is not set
+# CONFIG_DMA_UNCACHED_128K is not set
+# CONFIG_DMA_UNCACHED_NONE is not set
+
+#
+# Cache Support
+#
+CONFIG_BFIN_ICACHE=y
+CONFIG_BFIN_EXTMEM_ICACHEABLE=y
+CONFIG_BFIN_DCACHE=y
+# CONFIG_BFIN_DCACHE_BANKA is not set
+CONFIG_BFIN_EXTMEM_DCACHEABLE=y
+CONFIG_BFIN_EXTMEM_WRITEBACK=y
+# CONFIG_BFIN_EXTMEM_WRITETHROUGH is not set
+
+#
+# Memory Protection Unit
+#
+# CONFIG_MPU is not set
+
+#
+# Asynchronous Memory Configuration
+#
+
+#
+# EBIU_AMGCTL Global Control
+#
+CONFIG_C_AMCKEN=y
+CONFIG_C_CDPRIO=y
+# CONFIG_C_AMBEN is not set
+# CONFIG_C_AMBEN_B0 is not set
+# CONFIG_C_AMBEN_B0_B1 is not set
+# CONFIG_C_AMBEN_B0_B1_B2 is not set
+CONFIG_C_AMBEN_ALL=y
+
+#
+# EBIU_AMBCTL Control
+#
+CONFIG_BANK_0=0x7BB0
+CONFIG_BANK_1=0x7BB0
+CONFIG_BANK_2=0x7BB0
+CONFIG_BANK_3=0x99B2
+
+#
+# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF_FDPIC=y
+CONFIG_BINFMT_FLAT=y
+CONFIG_BINFMT_ZFLAT=y
+# CONFIG_BINFMT_SHARED_FLAT is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETLABEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+# CONFIG_MTD_CFI_I2 is not set
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+CONFIG_MTD_RAM=y
+CONFIG_MTD_ROM=m
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_UCLINUX is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_AD525X_DPOT is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+CONFIG_BFIN_MAC=y
+CONFIG_BFIN_TX_DESC_NUM=10
+CONFIG_BFIN_RX_DESC_NUM=20
+# CONFIG_BFIN_MAC_RMII is not set
+CONFIG_BFIN_MAC_USE_HWSTAMP=y
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_ADF702X is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_UINPUT is not set
+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
+# CONFIG_INPUT_AD714X is not set
+# CONFIG_INPUT_ADXL34X is not set
+# CONFIG_INPUT_PCF8574 is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_BFIN_DMA_INTERFACE=m
+# CONFIG_BFIN_PPI is not set
+# CONFIG_BFIN_PPIFCD is not set
+# CONFIG_BFIN_SIMPLE_TIMER is not set
+# CONFIG_BFIN_SPI_ADC is not set
+# CONFIG_BFIN_SPORT is not set
+# CONFIG_BFIN_TWI_LCD is not set
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_DEVKMEM is not set
+CONFIG_BFIN_JTAG_COMM=m
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+CONFIG_SERIAL_BFIN=y
+CONFIG_SERIAL_BFIN_CONSOLE=y
+CONFIG_SERIAL_BFIN_DMA=y
+# CONFIG_SERIAL_BFIN_PIO is not set
+CONFIG_SERIAL_BFIN_UART0=y
+# CONFIG_BFIN_UART0_CTSRTS is not set
+# CONFIG_SERIAL_BFIN_UART1 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_BFIN_SPORT is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_BFIN_OTP=y
+# CONFIG_BFIN_OTP_WRITE_ENABLE is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+CONFIG_I2C_BLACKFIN_TWI=y
+CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_BFIN=y
+CONFIG_SPI_BFIN_LOCK=y
+# CONFIG_SPI_BFIN_SPORT is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+
+#
+# AC97 GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_BFIN_WDT=y
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_MMC=y
+CONFIG_MMC_DEBUG=y
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
+CONFIG_MMC_SPI=y
+# CONFIG_SDH_BFIN is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_BFIN=y
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# Firmware Drivers
+#
+# CONFIG_FIRMWARE_MEMMAP is not set
+# CONFIG_SIGMA is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+# CONFIG_DNOTIFY is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+# CONFIG_MISC_FILESYSTEMS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=m
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=m
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_SECTION_MISMATCH=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_SHIRQ=y
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_NOMMU_REGIONS is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_FRAME_POINTER is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_VERBOSE=y
+CONFIG_DEBUG_MMRS=y
+CONFIG_DEBUG_HWERR=y
+CONFIG_EXACT_HWERR=y
+CONFIG_DEBUG_DOUBLEFAULT=y
+CONFIG_DEBUG_DOUBLEFAULT_PRINT=y
+# CONFIG_DEBUG_DOUBLEFAULT_RESET is not set
+# CONFIG_DEBUG_ICACHE_CHECK is not set
+CONFIG_DEBUG_HUNT_FOR_ZERO=y
+CONFIG_DEBUG_BFIN_HWTRACE_ON=y
+# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF is not set
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y
+# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=1
+# CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
+CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_CPLB_INFO=y
+CONFIG_ACCESS_CHECK=y
+# CONFIG_BFIN_ISRAM_SELF_TEST is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+CONFIG_SECURITY=y
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_NETWORK is not set
+# CONFIG_SECURITY_PATH is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_SECURITY_TOMOYO is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_MANAGER2 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=m
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC32=y
+CONFIG_CRC7=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/blackfin/include/asm/bfin-lq035q1.h b/arch/blackfin/include/asm/bfin-lq035q1.h
index 57bc21ac229..836895156b5 100644
--- a/arch/blackfin/include/asm/bfin-lq035q1.h
+++ b/arch/blackfin/include/asm/bfin-lq035q1.h
@@ -8,6 +8,9 @@
 #ifndef BFIN_LQ035Q1_H
 #define BFIN_LQ035Q1_H
 
+/*
+ * LCD Modes
+ */
 #define LQ035_RL        (0 << 8)        /* Right -> Left Scan */
 #define LQ035_LR        (1 << 8)        /* Left -> Right Scan */
 #define LQ035_TB        (1 << 9)        /* Top -> Botton Scan */
@@ -17,9 +20,18 @@
 #define LQ035_NORM      (1 << 13)       /* Reversal */
 #define LQ035_REV       (0 << 13)       /* Reversal */
 
+/*
+ * PPI Modes
+ */
+
+#define USE_RGB565_16_BIT_PPI   1
+#define USE_RGB565_8_BIT_PPI    2
+#define USE_RGB888_8_BIT_PPI    3
+
 struct bfin_lq035q1fb_disp_info {
 
         unsigned        mode;
+        unsigned        ppi_mode;
         /* GPIOs */
         int             use_bl;
         unsigned        gpio_bl;
diff --git a/arch/blackfin/include/asm/bfin_can.h b/arch/blackfin/include/asm/bfin_can.h
new file mode 100644
index 00000000000..eec0076a385
--- /dev/null
+++ b/arch/blackfin/include/asm/bfin_can.h
@@ -0,0 +1,725 @@
+/*
+ * bfin_can.h - interface to Blackfin CANs
+ *
+ * Copyright 2004-2009 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef __ASM_BFIN_CAN_H__
+#define __ASM_BFIN_CAN_H__
+
+/*
+ * transmit and receive channels
+ */
+#define TRANSMIT_CHL            24
+#define RECEIVE_STD_CHL         0
+#define RECEIVE_EXT_CHL         4
+#define RECEIVE_RTR_CHL         8
+#define RECEIVE_EXT_RTR_CHL     12
+#define MAX_CHL_NUMBER          32
+
+/*
+ * All Blackfin system MMRs are padded to 32bits even if the register
+ * itself is only 16bits.  So use a helper macro to streamline this.
+ */
+#define __BFP(m) u16 m; u16 __pad_##m
+
+/*
+ * bfin can registers layout
+ */
+struct bfin_can_mask_regs {
+        __BFP(aml);
+        __BFP(amh);
+};
+
+struct bfin_can_channel_regs {
+        u16 data[8];
+        __BFP(dlc);
+        __BFP(tsv);
+        __BFP(id0);
+        __BFP(id1);
+};
+
+struct bfin_can_regs {
+        /*
+         * global control and status registers
+         */
+        __BFP(mc1);           /* offset 0x00 */
+        __BFP(md1);           /* offset 0x04 */
+        __BFP(trs1);          /* offset 0x08 */
+        __BFP(trr1);          /* offset 0x0c */
+        __BFP(ta1);           /* offset 0x10 */
+        __BFP(aa1);           /* offset 0x14 */
+        __BFP(rmp1);          /* offset 0x18 */
+        __BFP(rml1);          /* offset 0x1c */
+        __BFP(mbtif1);        /* offset 0x20 */
+        __BFP(mbrif1);        /* offset 0x24 */
+        __BFP(mbim1);         /* offset 0x28 */
+        __BFP(rfh1);          /* offset 0x2c */
+        __BFP(opss1);         /* offset 0x30 */
+        u32 __pad1[3];
+        __BFP(mc2);           /* offset 0x40 */
+        __BFP(md2);           /* offset 0x44 */
+        __BFP(trs2);          /* offset 0x48 */
+        __BFP(trr2);          /* offset 0x4c */
+        __BFP(ta2);           /* offset 0x50 */
+        __BFP(aa2);           /* offset 0x54 */
+        __BFP(rmp2);          /* offset 0x58 */
+        __BFP(rml2);          /* offset 0x5c */
+        __BFP(mbtif2);        /* offset 0x60 */
+        __BFP(mbrif2);        /* offset 0x64 */
+        __BFP(mbim2);         /* offset 0x68 */
+        __BFP(rfh2);          /* offset 0x6c */
+        __BFP(opss2);         /* offset 0x70 */
+        u32 __pad2[3];
+        __BFP(clock);         /* offset 0x80 */
+        __BFP(timing);        /* offset 0x84 */
+        __BFP(debug);         /* offset 0x88 */
+        __BFP(status);        /* offset 0x8c */
+        __BFP(cec);           /* offset 0x90 */
+        __BFP(gis);           /* offset 0x94 */
+        __BFP(gim);           /* offset 0x98 */
+        __BFP(gif);           /* offset 0x9c */
+        __BFP(control);       /* offset 0xa0 */
+        __BFP(intr);          /* offset 0xa4 */
+        u32 __pad3[1];
+        __BFP(mbtd);          /* offset 0xac */
+        __BFP(ewr);           /* offset 0xb0 */
+        __BFP(esr);           /* offset 0xb4 */
+        u32 __pad4[2];
+        __BFP(ucreg);         /* offset 0xc0 */
+        __BFP(uccnt);         /* offset 0xc4 */
+        __BFP(ucrc);          /* offset 0xc8 */
+        __BFP(uccnf);         /* offset 0xcc */
+        u32 __pad5[12];
+
+        /*
+         * channel(mailbox) mask and message registers
+         */
+        struct bfin_can_mask_regs msk[MAX_CHL_NUMBER];    /* offset 0x100 */
+        struct bfin_can_channel_regs chl[MAX_CHL_NUMBER]; /* offset 0x200 */
+};
+
+#undef __BFP
+
+/* CAN_CONTROL Masks */
+#define SRS                     0x0001  /* Software Reset */
+#define DNM                     0x0002  /* Device Net Mode */
+#define ABO                     0x0004  /* Auto-Bus On Enable */
+#define TXPRIO          0x0008  /* TX Priority (Priority/Mailbox*) */
+#define WBA                     0x0010  /* Wake-Up On CAN Bus Activity Enable */
+#define SMR                     0x0020  /* Sleep Mode Request */
+#define CSR                     0x0040  /* CAN Suspend Mode Request */
+#define CCR                     0x0080  /* CAN Configuration Mode Request */
+
+/* CAN_STATUS Masks */
+#define WT                      0x0001  /* TX Warning Flag */
+#define WR                      0x0002  /* RX Warning Flag */
+#define EP                      0x0004  /* Error Passive Mode */
+#define EBO                     0x0008  /* Error Bus Off Mode */
+#define SMA                     0x0020  /* Sleep Mode Acknowledge */
+#define CSA                     0x0040  /* Suspend Mode Acknowledge */
+#define CCA                     0x0080  /* Configuration Mode Acknowledge */
+#define MBPTR           0x1F00  /* Mailbox Pointer */
+#define TRM                     0x4000  /* Transmit Mode */
+#define REC                     0x8000  /* Receive Mode */
+
+/* CAN_CLOCK Masks */
+#define BRP                     0x03FF  /* Bit-Rate Pre-Scaler */
+
+/* CAN_TIMING Masks */
+#define TSEG1           0x000F  /* Time Segment 1 */
+#define TSEG2           0x0070  /* Time Segment 2 */
+#define SAM                     0x0080  /* Sampling */
+#define SJW                     0x0300  /* Synchronization Jump Width */
+
+/* CAN_DEBUG Masks */
+#define DEC                     0x0001  /* Disable CAN Error Counters */
+#define DRI                     0x0002  /* Disable CAN RX Input */
+#define DTO                     0x0004  /* Disable CAN TX Output */
+#define DIL                     0x0008  /* Disable CAN Internal Loop */
+#define MAA                     0x0010  /* Mode Auto-Acknowledge Enable */
+#define MRB                     0x0020  /* Mode Read Back Enable */
+#define CDE                     0x8000  /* CAN Debug Enable */
+
+/* CAN_CEC Masks */
+#define RXECNT          0x00FF  /* Receive Error Counter */
+#define TXECNT          0xFF00  /* Transmit Error Counter */
+
+/* CAN_INTR Masks */
+#define MBRIRQ  0x0001  /* Mailbox Receive Interrupt */
+#define MBTIRQ  0x0002  /* Mailbox Transmit Interrupt */
+#define GIRQ            0x0004  /* Global Interrupt */
+#define SMACK           0x0008  /* Sleep Mode Acknowledge */
+#define CANTX           0x0040  /* CAN TX Bus Value */
+#define CANRX           0x0080  /* CAN RX Bus Value */
+
+/* CAN_MBxx_ID1 and CAN_MBxx_ID0 Masks */
+#define DFC                     0xFFFF  /* Data Filtering Code (If Enabled) (ID0) */
+#define EXTID_LO        0xFFFF  /* Lower 16 Bits of Extended Identifier (ID0) */
+#define EXTID_HI        0x0003  /* Upper 2 Bits of Extended Identifier (ID1) */
+#define BASEID          0x1FFC  /* Base Identifier */
+#define IDE                     0x2000  /* Identifier Extension */
+#define RTR                     0x4000  /* Remote Frame Transmission Request */
+#define AME                     0x8000  /* Acceptance Mask Enable */
+
+/* CAN_MBxx_TIMESTAMP Masks */
+#define TSV                     0xFFFF  /* Timestamp */
+
+/* CAN_MBxx_LENGTH Masks */
+#define DLC                     0x000F  /* Data Length Code */
+
+/* CAN_AMxxH and CAN_AMxxL Masks */
+#define DFM                     0xFFFF  /* Data Field Mask (If Enabled) (CAN_AMxxL) */
+#define EXTID_LO        0xFFFF  /* Lower 16 Bits of Extended Identifier (CAN_AMxxL) */
+#define EXTID_HI        0x0003  /* Upper 2 Bits of Extended Identifier (CAN_AMxxH) */
+#define BASEID          0x1FFC  /* Base Identifier */
+#define AMIDE           0x2000  /* Acceptance Mask ID Extension Enable */
+#define FMD                     0x4000  /* Full Mask Data Field Enable */
+#define FDF                     0x8000  /* Filter On Data Field Enable */
+
+/* CAN_MC1 Masks */
+#define MC0                     0x0001  /* Enable Mailbox 0 */
+#define MC1                     0x0002  /* Enable Mailbox 1 */
+#define MC2                     0x0004  /* Enable Mailbox 2 */
+#define MC3                     0x0008  /* Enable Mailbox 3 */
+#define MC4                     0x0010  /* Enable Mailbox 4 */
+#define MC5                     0x0020  /* Enable Mailbox 5 */
+#define MC6                     0x0040  /* Enable Mailbox 6 */
+#define MC7                     0x0080  /* Enable Mailbox 7 */
+#define MC8                     0x0100  /* Enable Mailbox 8 */
+#define MC9                     0x0200  /* Enable Mailbox 9 */
+#define MC10            0x0400  /* Enable Mailbox 10 */
+#define MC11            0x0800  /* Enable Mailbox 11 */
+#define MC12            0x1000  /* Enable Mailbox 12 */
+#define MC13            0x2000  /* Enable Mailbox 13 */
+#define MC14            0x4000  /* Enable Mailbox 14 */
+#define MC15            0x8000  /* Enable Mailbox 15 */
+
+/* CAN_MC2 Masks */
+#define MC16            0x0001  /* Enable Mailbox 16 */
+#define MC17            0x0002  /* Enable Mailbox 17 */
+#define MC18            0x0004  /* Enable Mailbox 18 */
+#define MC19            0x0008  /* Enable Mailbox 19 */
+#define MC20            0x0010  /* Enable Mailbox 20 */
+#define MC21            0x0020  /* Enable Mailbox 21 */
+#define MC22            0x0040  /* Enable Mailbox 22 */
+#define MC23            0x0080  /* Enable Mailbox 23 */
+#define MC24            0x0100  /* Enable Mailbox 24 */
+#define MC25            0x0200  /* Enable Mailbox 25 */
+#define MC26            0x0400  /* Enable Mailbox 26 */
+#define MC27            0x0800  /* Enable Mailbox 27 */
+#define MC28            0x1000  /* Enable Mailbox 28 */
+#define MC29            0x2000  /* Enable Mailbox 29 */
+#define MC30            0x4000  /* Enable Mailbox 30 */
+#define MC31            0x8000  /* Enable Mailbox 31 */
+
+/* CAN_MD1 Masks */
+#define MD0                     0x0001  /* Enable Mailbox 0 For Receive */
+#define MD1                     0x0002  /* Enable Mailbox 1 For Receive */
+#define MD2                     0x0004  /* Enable Mailbox 2 For Receive */
+#define MD3                     0x0008  /* Enable Mailbox 3 For Receive */
+#define MD4                     0x0010  /* Enable Mailbox 4 For Receive */
+#define MD5                     0x0020  /* Enable Mailbox 5 For Receive */
+#define MD6                     0x0040  /* Enable Mailbox 6 For Receive */
+#define MD7                     0x0080  /* Enable Mailbox 7 For Receive */
+#define MD8                     0x0100  /* Enable Mailbox 8 For Receive */
+#define MD9                     0x0200  /* Enable Mailbox 9 For Receive */
+#define MD10            0x0400  /* Enable Mailbox 10 For Receive */
+#define MD11            0x0800  /* Enable Mailbox 11 For Receive */
+#define MD12            0x1000  /* Enable Mailbox 12 For Receive */
+#define MD13            0x2000  /* Enable Mailbox 13 For Receive */
+#define MD14            0x4000  /* Enable Mailbox 14 For Receive */
+#define MD15            0x8000  /* Enable Mailbox 15 For Receive */
+
+/* CAN_MD2 Masks */
+#define MD16            0x0001  /* Enable Mailbox 16 For Receive */
+#define MD17            0x0002  /* Enable Mailbox 17 For Receive */
+#define MD18            0x0004  /* Enable Mailbox 18 For Receive */
+#define MD19            0x0008  /* Enable Mailbox 19 For Receive */
+#define MD20            0x0010  /* Enable Mailbox 20 For Receive */
+#define MD21            0x0020  /* Enable Mailbox 21 For Receive */
+#define MD22            0x0040  /* Enable Mailbox 22 For Receive */
+#define MD23            0x0080  /* Enable Mailbox 23 For Receive */
+#define MD24            0x0100  /* Enable Mailbox 24 For Receive */
+#define MD25            0x0200  /* Enable Mailbox 25 For Receive */
+#define MD26            0x0400  /* Enable Mailbox 26 For Receive */
+#define MD27            0x0800  /* Enable Mailbox 27 For Receive */
+#define MD28            0x1000  /* Enable Mailbox 28 For Receive */
+#define MD29            0x2000  /* Enable Mailbox 29 For Receive */
+#define MD30            0x4000  /* Enable Mailbox 30 For Receive */
+#define MD31            0x8000  /* Enable Mailbox 31 For Receive */
+
+/* CAN_RMP1 Masks */
+#define RMP0            0x0001  /* RX Message Pending In Mailbox 0 */
+#define RMP1            0x0002  /* RX Message Pending In Mailbox 1 */
+#define RMP2            0x0004  /* RX Message Pending In Mailbox 2 */
+#define RMP3            0x0008  /* RX Message Pending In Mailbox 3 */
+#define RMP4            0x0010  /* RX Message Pending In Mailbox 4 */
+#define RMP5            0x0020  /* RX Message Pending In Mailbox 5 */
+#define RMP6            0x0040  /* RX Message Pending In Mailbox 6 */
+#define RMP7            0x0080  /* RX Message Pending In Mailbox 7 */
+#define RMP8            0x0100  /* RX Message Pending In Mailbox 8 */
+#define RMP9            0x0200  /* RX Message Pending In Mailbox 9 */
+#define RMP10           0x0400  /* RX Message Pending In Mailbox 10 */
+#define RMP11           0x0800  /* RX Message Pending In Mailbox 11 */
+#define RMP12           0x1000  /* RX Message Pending In Mailbox 12 */
+#define RMP13           0x2000  /* RX Message Pending In Mailbox 13 */
+#define RMP14           0x4000  /* RX Message Pending In Mailbox 14 */
+#define RMP15           0x8000  /* RX Message Pending In Mailbox 15 */
+
+/* CAN_RMP2 Masks */
+#define RMP16           0x0001  /* RX Message Pending In Mailbox 16 */
+#define RMP17           0x0002  /* RX Message Pending In Mailbox 17 */
+#define RMP18           0x0004  /* RX Message Pending In Mailbox 18 */
+#define RMP19           0x0008  /* RX Message Pending In Mailbox 19 */
+#define RMP20           0x0010  /* RX Message Pending In Mailbox 20 */
+#define RMP21           0x0020  /* RX Message Pending In Mailbox 21 */
+#define RMP22           0x0040  /* RX Message Pending In Mailbox 22 */
+#define RMP23           0x0080  /* RX Message Pending In Mailbox 23 */
+#define RMP24           0x0100  /* RX Message Pending In Mailbox 24 */
+#define RMP25           0x0200  /* RX Message Pending In Mailbox 25 */
+#define RMP26           0x0400  /* RX Message Pending In Mailbox 26 */
+#define RMP27           0x0800  /* RX Message Pending In Mailbox 27 */
+#define RMP28           0x1000  /* RX Message Pending In Mailbox 28 */
+#define RMP29           0x2000  /* RX Message Pending In Mailbox 29 */
+#define RMP30           0x4000  /* RX Message Pending In Mailbox 30 */
+#define RMP31           0x8000  /* RX Message Pending In Mailbox 31 */
+
+/* CAN_RML1 Masks */
+#define RML0            0x0001  /* RX Message Lost In Mailbox 0 */
+#define RML1            0x0002  /* RX Message Lost In Mailbox 1 */
+#define RML2            0x0004  /* RX Message Lost In Mailbox 2 */
+#define RML3            0x0008  /* RX Message Lost In Mailbox 3 */
+#define RML4            0x0010  /* RX Message Lost In Mailbox 4 */
+#define RML5            0x0020  /* RX Message Lost In Mailbox 5 */
+#define RML6            0x0040  /* RX Message Lost In Mailbox 6 */
+#define RML7            0x0080  /* RX Message Lost In Mailbox 7 */
+#define RML8            0x0100  /* RX Message Lost In Mailbox 8 */
+#define RML9            0x0200  /* RX Message Lost In Mailbox 9 */
+#define RML10           0x0400  /* RX Message Lost In Mailbox 10 */
+#define RML11           0x0800  /* RX Message Lost In Mailbox 11 */
+#define RML12           0x1000  /* RX Message Lost In Mailbox 12 */
+#define RML13           0x2000  /* RX Message Lost In Mailbox 13 */
+#define RML14           0x4000  /* RX Message Lost In Mailbox 14 */
+#define RML15           0x8000  /* RX Message Lost In Mailbox 15 */
+
+/* CAN_RML2 Masks */
+#define RML16           0x0001  /* RX Message Lost In Mailbox 16 */
+#define RML17           0x0002  /* RX Message Lost In Mailbox 17 */
+#define RML18           0x0004  /* RX Message Lost In Mailbox 18 */
+#define RML19           0x0008  /* RX Message Lost In Mailbox 19 */
+#define RML20           0x0010  /* RX Message Lost In Mailbox 20 */
+#define RML21           0x0020  /* RX Message Lost In Mailbox 21 */
+#define RML22           0x0040  /* RX Message Lost In Mailbox 22 */
+#define RML23           0x0080  /* RX Message Lost In Mailbox 23 */
+#define RML24           0x0100  /* RX Message Lost In Mailbox 24 */
+#define RML25           0x0200  /* RX Message Lost In Mailbox 25 */
+#define RML26           0x0400  /* RX Message Lost In Mailbox 26 */
+#define RML27           0x0800  /* RX Message Lost In Mailbox 27 */
+#define RML28           0x1000  /* RX Message Lost In Mailbox 28 */
+#define RML29           0x2000  /* RX Message Lost In Mailbox 29 */
+#define RML30           0x4000  /* RX Message Lost In Mailbox 30 */
+#define RML31           0x8000  /* RX Message Lost In Mailbox 31 */
+
+/* CAN_OPSS1 Masks */
+#define OPSS0           0x0001  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 0 */
+#define OPSS1           0x0002  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 1 */
+#define OPSS2           0x0004  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 2 */
+#define OPSS3           0x0008  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 3 */
+#define OPSS4           0x0010  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 4 */
+#define OPSS5           0x0020  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 5 */
+#define OPSS6           0x0040  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 6 */
+#define OPSS7           0x0080  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 7 */
+#define OPSS8           0x0100  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 8 */
+#define OPSS9           0x0200  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 9 */
+#define OPSS10          0x0400  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 10 */
+#define OPSS11          0x0800  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 11 */
+#define OPSS12          0x1000  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 12 */
+#define OPSS13          0x2000  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 13 */
+#define OPSS14          0x4000  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 14 */
+#define OPSS15          0x8000  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 15 */
+
+/* CAN_OPSS2 Masks */
+#define OPSS16          0x0001  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 16 */
+#define OPSS17          0x0002  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 17 */
+#define OPSS18          0x0004  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 18 */
+#define OPSS19          0x0008  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 19 */
+#define OPSS20          0x0010  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 20 */
+#define OPSS21          0x0020  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 21 */
+#define OPSS22          0x0040  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 22 */
+#define OPSS23          0x0080  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 23 */
+#define OPSS24          0x0100  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 24 */
+#define OPSS25          0x0200  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 25 */
+#define OPSS26          0x0400  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 26 */
+#define OPSS27          0x0800  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 27 */
+#define OPSS28          0x1000  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 28 */
+#define OPSS29          0x2000  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 29 */
+#define OPSS30          0x4000  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 30 */
+#define OPSS31          0x8000  /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 31 */
+
+/* CAN_TRR1 Masks */
+#define TRR0            0x0001  /* Deny But Don't Lock Access To Mailbox 0 */
+#define TRR1            0x0002  /* Deny But Don't Lock Access To Mailbox 1 */
+#define TRR2            0x0004  /* Deny But Don't Lock Access To Mailbox 2 */
+#define TRR3            0x0008  /* Deny But Don't Lock Access To Mailbox 3 */
+#define TRR4            0x0010  /* Deny But Don't Lock Access To Mailbox 4 */
+#define TRR5            0x0020  /* Deny But Don't Lock Access To Mailbox 5 */
+#define TRR6            0x0040  /* Deny But Don't Lock Access To Mailbox 6 */
+#define TRR7            0x0080  /* Deny But Don't Lock Access To Mailbox 7 */
+#define TRR8            0x0100  /* Deny But Don't Lock Access To Mailbox 8 */
+#define TRR9            0x0200  /* Deny But Don't Lock Access To Mailbox 9 */
+#define TRR10           0x0400  /* Deny But Don't Lock Access To Mailbox 10 */
+#define TRR11           0x0800  /* Deny But Don't Lock Access To Mailbox 11 */
+#define TRR12           0x1000  /* Deny But Don't Lock Access To Mailbox 12 */
+#define TRR13           0x2000  /* Deny But Don't Lock Access To Mailbox 13 */
+#define TRR14           0x4000  /* Deny But Don't Lock Access To Mailbox 14 */
+#define TRR15           0x8000  /* Deny But Don't Lock Access To Mailbox 15 */
+
+/* CAN_TRR2 Masks */
+#define TRR16           0x0001  /* Deny But Don't Lock Access To Mailbox 16 */
+#define TRR17           0x0002  /* Deny But Don't Lock Access To Mailbox 17 */
+#define TRR18           0x0004  /* Deny But Don't Lock Access To Mailbox 18 */
+#define TRR19           0x0008  /* Deny But Don't Lock Access To Mailbox 19 */
+#define TRR20           0x0010  /* Deny But Don't Lock Access To Mailbox 20 */
+#define TRR21           0x0020  /* Deny But Don't Lock Access To Mailbox 21 */
+#define TRR22           0x0040  /* Deny But Don't Lock Access To Mailbox 22 */
+#define TRR23           0x0080  /* Deny But Don't Lock Access To Mailbox 23 */
+#define TRR24           0x0100  /* Deny But Don't Lock Access To Mailbox 24 */
+#define TRR25           0x0200  /* Deny But Don't Lock Access To Mailbox 25 */
+#define TRR26           0x0400  /* Deny But Don't Lock Access To Mailbox 26 */
+#define TRR27           0x0800  /* Deny But Don't Lock Access To Mailbox 27 */
+#define TRR28           0x1000  /* Deny But Don't Lock Access To Mailbox 28 */
+#define TRR29           0x2000  /* Deny But Don't Lock Access To Mailbox 29 */
+#define TRR30           0x4000  /* Deny But Don't Lock Access To Mailbox 30 */
+#define TRR31           0x8000  /* Deny But Don't Lock Access To Mailbox 31 */
+
+/* CAN_TRS1 Masks */
+#define TRS0            0x0001  /* Remote Frame Request For Mailbox 0 */
+#define TRS1            0x0002  /* Remote Frame Request For Mailbox 1 */
+#define TRS2            0x0004  /* Remote Frame Request For Mailbox 2 */
+#define TRS3            0x0008  /* Remote Frame Request For Mailbox 3 */
+#define TRS4            0x0010  /* Remote Frame Request For Mailbox 4 */
+#define TRS5            0x0020  /* Remote Frame Request For Mailbox 5 */
+#define TRS6            0x0040  /* Remote Frame Request For Mailbox 6 */
+#define TRS7            0x0080  /* Remote Frame Request For Mailbox 7 */
+#define TRS8            0x0100  /* Remote Frame Request For Mailbox 8 */
+#define TRS9            0x0200  /* Remote Frame Request For Mailbox 9 */
+#define TRS10           0x0400  /* Remote Frame Request For Mailbox 10 */
+#define TRS11           0x0800  /* Remote Frame Request For Mailbox 11 */
+#define TRS12           0x1000  /* Remote Frame Request For Mailbox 12 */
+#define TRS13           0x2000  /* Remote Frame Request For Mailbox 13 */
+#define TRS14           0x4000  /* Remote Frame Request For Mailbox 14 */
+#define TRS15           0x8000  /* Remote Frame Request For Mailbox 15 */
+
+/* CAN_TRS2 Masks */
+#define TRS16           0x0001  /* Remote Frame Request For Mailbox 16 */
+#define TRS17           0x0002  /* Remote Frame Request For Mailbox 17 */
+#define TRS18           0x0004  /* Remote Frame Request For Mailbox 18 */
+#define TRS19           0x0008  /* Remote Frame Request For Mailbox 19 */
+#define TRS20           0x0010  /* Remote Frame Request For Mailbox 20 */
+#define TRS21           0x0020  /* Remote Frame Request For Mailbox 21 */
+#define TRS22           0x0040  /* Remote Frame Request For Mailbox 22 */
+#define TRS23           0x0080  /* Remote Frame Request For Mailbox 23 */
+#define TRS24           0x0100  /* Remote Frame Request For Mailbox 24 */
+#define TRS25           0x0200  /* Remote Frame Request For Mailbox 25 */
+#define TRS26           0x0400  /* Remote Frame Request For Mailbox 26 */
+#define TRS27           0x0800  /* Remote Frame Request For Mailbox 27 */
+#define TRS28           0x1000  /* Remote Frame Request For Mailbox 28 */
+#define TRS29           0x2000  /* Remote Frame Request For Mailbox 29 */
+#define TRS30           0x4000  /* Remote Frame Request For Mailbox 30 */
+#define TRS31           0x8000  /* Remote Frame Request For Mailbox 31 */
+
+/* CAN_AA1 Masks */
+#define AA0                     0x0001  /* Aborted Message In Mailbox 0 */
+#define AA1                     0x0002  /* Aborted Message In Mailbox 1 */
+#define AA2                     0x0004  /* Aborted Message In Mailbox 2 */
+#define AA3                     0x0008  /* Aborted Message In Mailbox 3 */
+#define AA4                     0x0010  /* Aborted Message In Mailbox 4 */
+#define AA5                     0x0020  /* Aborted Message In Mailbox 5 */
+#define AA6                     0x0040  /* Aborted Message In Mailbox 6 */
+#define AA7                     0x0080  /* Aborted Message In Mailbox 7 */
+#define AA8                     0x0100  /* Aborted Message In Mailbox 8 */
+#define AA9                     0x0200  /* Aborted Message In Mailbox 9 */
+#define AA10            0x0400  /* Aborted Message In Mailbox 10 */
+#define AA11            0x0800  /* Aborted Message In Mailbox 11 */
+#define AA12            0x1000  /* Aborted Message In Mailbox 12 */
+#define AA13            0x2000  /* Aborted Message In Mailbox 13 */
+#define AA14            0x4000  /* Aborted Message In Mailbox 14 */
+#define AA15            0x8000  /* Aborted Message In Mailbox 15 */
+
+/* CAN_AA2 Masks */
+#define AA16            0x0001  /* Aborted Message In Mailbox 16 */
+#define AA17            0x0002  /* Aborted Message In Mailbox 17 */
+#define AA18            0x0004  /* Aborted Message In Mailbox 18 */
+#define AA19            0x0008  /* Aborted Message In Mailbox 19 */
+#define AA20            0x0010  /* Aborted Message In Mailbox 20 */
+#define AA21            0x0020  /* Aborted Message In Mailbox 21 */
+#define AA22            0x0040  /* Aborted Message In Mailbox 22 */
+#define AA23            0x0080  /* Aborted Message In Mailbox 23 */
+#define AA24            0x0100  /* Aborted Message In Mailbox 24 */
+#define AA25            0x0200  /* Aborted Message In Mailbox 25 */
+#define AA26            0x0400  /* Aborted Message In Mailbox 26 */
+#define AA27            0x0800  /* Aborted Message In Mailbox 27 */
+#define AA28            0x1000  /* Aborted Message In Mailbox 28 */
+#define AA29            0x2000  /* Aborted Message In Mailbox 29 */
+#define AA30            0x4000  /* Aborted Message In Mailbox 30 */
+#define AA31            0x8000  /* Aborted Message In Mailbox 31 */
+
+/* CAN_TA1 Masks */
+#define TA0                     0x0001  /* Transmit Successful From Mailbox 0 */
+#define TA1                     0x0002  /* Transmit Successful From Mailbox 1 */
+#define TA2                     0x0004  /* Transmit Successful From Mailbox 2 */
+#define TA3                     0x0008  /* Transmit Successful From Mailbox 3 */
+#define TA4                     0x0010  /* Transmit Successful From Mailbox 4 */
+#define TA5                     0x0020  /* Transmit Successful From Mailbox 5 */
+#define TA6                     0x0040  /* Transmit Successful From Mailbox 6 */
+#define TA7                     0x0080  /* Transmit Successful From Mailbox 7 */
+#define TA8                     0x0100  /* Transmit Successful From Mailbox 8 */
+#define TA9                     0x0200  /* Transmit Successful From Mailbox 9 */
+#define TA10            0x0400  /* Transmit Successful From Mailbox 10 */
+#define TA11            0x0800  /* Transmit Successful From Mailbox 11 */
+#define TA12            0x1000  /* Transmit Successful From Mailbox 12 */
+#define TA13            0x2000  /* Transmit Successful From Mailbox 13 */
+#define TA14            0x4000  /* Transmit Successful From Mailbox 14 */
+#define TA15            0x8000  /* Transmit Successful From Mailbox 15 */
+
+/* CAN_TA2 Masks */
+#define TA16            0x0001  /* Transmit Successful From Mailbox 16 */
+#define TA17            0x0002  /* Transmit Successful From Mailbox 17 */
+#define TA18            0x0004  /* Transmit Successful From Mailbox 18 */
+#define TA19            0x0008  /* Transmit Successful From Mailbox 19 */
+#define TA20            0x0010  /* Transmit Successful From Mailbox 20 */
+#define TA21            0x0020  /* Transmit Successful From Mailbox 21 */
+#define TA22            0x0040  /* Transmit Successful From Mailbox 22 */
+#define TA23            0x0080  /* Transmit Successful From Mailbox 23 */
+#define TA24            0x0100  /* Transmit Successful From Mailbox 24 */
+#define TA25            0x0200  /* Transmit Successful From Mailbox 25 */
+#define TA26            0x0400  /* Transmit Successful From Mailbox 26 */
+#define TA27            0x0800  /* Transmit Successful From Mailbox 27 */
+#define TA28            0x1000  /* Transmit Successful From Mailbox 28 */
+#define TA29            0x2000  /* Transmit Successful From Mailbox 29 */
+#define TA30            0x4000  /* Transmit Successful From Mailbox 30 */
+#define TA31            0x8000  /* Transmit Successful From Mailbox 31 */
+
+/* CAN_MBTD Masks */
+#define TDPTR           0x001F  /* Mailbox To Temporarily Disable */
+#define TDA                     0x0040  /* Temporary Disable Acknowledge */
+#define TDR                     0x0080  /* Temporary Disable Request */
+
+/* CAN_RFH1 Masks */
+#define RFH0            0x0001  /* Enable Automatic Remote Frame Handling For Mailbox 0 */
+#define RFH1            0x0002  /* Enable Automatic Remote Frame Handling For Mailbox 1 */
+#define RFH2            0x0004  /* Enable Automatic Remote Frame Handling For Mailbox 2 */
+#define RFH3            0x0008  /* Enable Automatic Remote Frame Handling For Mailbox 3 */
+#define RFH4            0x0010  /* Enable Automatic Remote Frame Handling For Mailbox 4 */
+#define RFH5            0x0020  /* Enable Automatic Remote Frame Handling For Mailbox 5 */
+#define RFH6            0x0040  /* Enable Automatic Remote Frame Handling For Mailbox 6 */
+#define RFH7            0x0080  /* Enable Automatic Remote Frame Handling For Mailbox 7 */
+#define RFH8            0x0100  /* Enable Automatic Remote Frame Handling For Mailbox 8 */
+#define RFH9            0x0200  /* Enable Automatic Remote Frame Handling For Mailbox 9 */
+#define RFH10           0x0400  /* Enable Automatic Remote Frame Handling For Mailbox 10 */
+#define RFH11           0x0800  /* Enable Automatic Remote Frame Handling For Mailbox 11 */
+#define RFH12           0x1000  /* Enable Automatic Remote Frame Handling For Mailbox 12 */
+#define RFH13           0x2000  /* Enable Automatic Remote Frame Handling For Mailbox 13 */
+#define RFH14           0x4000  /* Enable Automatic Remote Frame Handling For Mailbox 14 */
+#define RFH15           0x8000  /* Enable Automatic Remote Frame Handling For Mailbox 15 */
+
+/* CAN_RFH2 Masks */
+#define RFH16           0x0001  /* Enable Automatic Remote Frame Handling For Mailbox 16 */
+#define RFH17           0x0002  /* Enable Automatic Remote Frame Handling For Mailbox 17 */
+#define RFH18           0x0004  /* Enable Automatic Remote Frame Handling For Mailbox 18 */
+#define RFH19           0x0008  /* Enable Automatic Remote Frame Handling For Mailbox 19 */
+#define RFH20           0x0010  /* Enable Automatic Remote Frame Handling For Mailbox 20 */
+#define RFH21           0x0020  /* Enable Automatic Remote Frame Handling For Mailbox 21 */
+#define RFH22           0x0040  /* Enable Automatic Remote Frame Handling For Mailbox 22 */
+#define RFH23           0x0080  /* Enable Automatic Remote Frame Handling For Mailbox 23 */
+#define RFH24           0x0100  /* Enable Automatic Remote Frame Handling For Mailbox 24 */
+#define RFH25           0x0200  /* Enable Automatic Remote Frame Handling For Mailbox 25 */
+#define RFH26           0x0400  /* Enable Automatic Remote Frame Handling For Mailbox 26 */
+#define RFH27           0x0800  /* Enable Automatic Remote Frame Handling For Mailbox 27 */
+#define RFH28           0x1000  /* Enable Automatic Remote Frame Handling For Mailbox 28 */
+#define RFH29           0x2000  /* Enable Automatic Remote Frame Handling For Mailbox 29 */
+#define RFH30           0x4000  /* Enable Automatic Remote Frame Handling For Mailbox 30 */
+#define RFH31           0x8000  /* Enable Automatic Remote Frame Handling For Mailbox 31 */
+
+/* CAN_MBTIF1 Masks */
+#define MBTIF0          0x0001  /* TX Interrupt Active In Mailbox 0 */
+#define MBTIF1          0x0002  /* TX Interrupt Active In Mailbox 1 */
+#define MBTIF2          0x0004  /* TX Interrupt Active In Mailbox 2 */
+#define MBTIF3          0x0008  /* TX Interrupt Active In Mailbox 3 */
+#define MBTIF4          0x0010  /* TX Interrupt Active In Mailbox 4 */
+#define MBTIF5          0x0020  /* TX Interrupt Active In Mailbox 5 */
+#define MBTIF6          0x0040  /* TX Interrupt Active In Mailbox 6 */
+#define MBTIF7          0x0080  /* TX Interrupt Active In Mailbox 7 */
+#define MBTIF8          0x0100  /* TX Interrupt Active In Mailbox 8 */
+#define MBTIF9          0x0200  /* TX Interrupt Active In Mailbox 9 */
+#define MBTIF10         0x0400  /* TX Interrupt Active In Mailbox 10 */
+#define MBTIF11         0x0800  /* TX Interrupt Active In Mailbox 11 */
+#define MBTIF12         0x1000  /* TX Interrupt Active In Mailbox 12 */
+#define MBTIF13         0x2000  /* TX Interrupt Active In Mailbox 13 */
+#define MBTIF14         0x4000  /* TX Interrupt Active In Mailbox 14 */
+#define MBTIF15         0x8000  /* TX Interrupt Active In Mailbox 15 */
+
+/* CAN_MBTIF2 Masks */
+#define MBTIF16         0x0001  /* TX Interrupt Active In Mailbox 16 */
+#define MBTIF17         0x0002  /* TX Interrupt Active In Mailbox 17 */
+#define MBTIF18         0x0004  /* TX Interrupt Active In Mailbox 18 */
+#define MBTIF19         0x0008  /* TX Interrupt Active In Mailbox 19 */
+#define MBTIF20         0x0010  /* TX Interrupt Active In Mailbox 20 */
+#define MBTIF21         0x0020  /* TX Interrupt Active In Mailbox 21 */
+#define MBTIF22         0x0040  /* TX Interrupt Active In Mailbox 22 */
+#define MBTIF23         0x0080  /* TX Interrupt Active In Mailbox 23 */
+#define MBTIF24         0x0100  /* TX Interrupt Active In Mailbox 24 */
+#define MBTIF25         0x0200  /* TX Interrupt Active In Mailbox 25 */
+#define MBTIF26         0x0400  /* TX Interrupt Active In Mailbox 26 */
+#define MBTIF27         0x0800  /* TX Interrupt Active In Mailbox 27 */
+#define MBTIF28         0x1000  /* TX Interrupt Active In Mailbox 28 */
+#define MBTIF29         0x2000  /* TX Interrupt Active In Mailbox 29 */
+#define MBTIF30         0x4000  /* TX Interrupt Active In Mailbox 30 */
+#define MBTIF31         0x8000  /* TX Interrupt Active In Mailbox 31 */
+
+/* CAN_MBRIF1 Masks */
+#define MBRIF0          0x0001  /* RX Interrupt Active In Mailbox 0 */
+#define MBRIF1          0x0002  /* RX Interrupt Active In Mailbox 1 */
+#define MBRIF2          0x0004  /* RX Interrupt Active In Mailbox 2 */
+#define MBRIF3          0x0008  /* RX Interrupt Active In Mailbox 3 */
+#define MBRIF4          0x0010  /* RX Interrupt Active In Mailbox 4 */
+#define MBRIF5          0x0020  /* RX Interrupt Active In Mailbox 5 */
+#define MBRIF6          0x0040  /* RX Interrupt Active In Mailbox 6 */
+#define MBRIF7          0x0080  /* RX Interrupt Active In Mailbox 7 */
+#define MBRIF8          0x0100  /* RX Interrupt Active In Mailbox 8 */
+#define MBRIF9          0x0200  /* RX Interrupt Active In Mailbox 9 */
+#define MBRIF10         0x0400  /* RX Interrupt Active In Mailbox 10 */
+#define MBRIF11         0x0800  /* RX Interrupt Active In Mailbox 11 */
+#define MBRIF12         0x1000  /* RX Interrupt Active In Mailbox 12 */
+#define MBRIF13         0x2000  /* RX Interrupt Active In Mailbox 13 */
+#define MBRIF14         0x4000  /* RX Interrupt Active In Mailbox 14 */
+#define MBRIF15         0x8000  /* RX Interrupt Active In Mailbox 15 */
+
+/* CAN_MBRIF2 Masks */
+#define MBRIF16         0x0001  /* RX Interrupt Active In Mailbox 16 */
+#define MBRIF17         0x0002  /* RX Interrupt Active In Mailbox 17 */
+#define MBRIF18         0x0004  /* RX Interrupt Active In Mailbox 18 */
+#define MBRIF19         0x0008  /* RX Interrupt Active In Mailbox 19 */
+#define MBRIF20         0x0010  /* RX Interrupt Active In Mailbox 20 */
+#define MBRIF21         0x0020  /* RX Interrupt Active In Mailbox 21 */
+#define MBRIF22         0x0040  /* RX Interrupt Active In Mailbox 22 */
+#define MBRIF23         0x0080  /* RX Interrupt Active In Mailbox 23 */
+#define MBRIF24         0x0100  /* RX Interrupt Active In Mailbox 24 */
+#define MBRIF25         0x0200  /* RX Interrupt Active In Mailbox 25 */
+#define MBRIF26         0x0400  /* RX Interrupt Active In Mailbox 26 */
+#define MBRIF27         0x0800  /* RX Interrupt Active In Mailbox 27 */
+#define MBRIF28         0x1000  /* RX Interrupt Active In Mailbox 28 */
+#define MBRIF29         0x2000  /* RX Interrupt Active In Mailbox 29 */
+#define MBRIF30         0x4000  /* RX Interrupt Active In Mailbox 30 */
+#define MBRIF31         0x8000  /* RX Interrupt Active In Mailbox 31 */
+
+/* CAN_MBIM1 Masks */
+#define MBIM0           0x0001  /* Enable Interrupt For Mailbox 0 */
+#define MBIM1           0x0002  /* Enable Interrupt For Mailbox 1 */
+#define MBIM2           0x0004  /* Enable Interrupt For Mailbox 2 */
+#define MBIM3           0x0008  /* Enable Interrupt For Mailbox 3 */
+#define MBIM4           0x0010  /* Enable Interrupt For Mailbox 4 */
+#define MBIM5           0x0020  /* Enable Interrupt For Mailbox 5 */
+#define MBIM6           0x0040  /* Enable Interrupt For Mailbox 6 */
+#define MBIM7           0x0080  /* Enable Interrupt For Mailbox 7 */
+#define MBIM8           0x0100  /* Enable Interrupt For Mailbox 8 */
+#define MBIM9           0x0200  /* Enable Interrupt For Mailbox 9 */
+#define MBIM10          0x0400  /* Enable Interrupt For Mailbox 10 */
+#define MBIM11          0x0800  /* Enable Interrupt For Mailbox 11 */
+#define MBIM12          0x1000  /* Enable Interrupt For Mailbox 12 */
+#define MBIM13          0x2000  /* Enable Interrupt For Mailbox 13 */
+#define MBIM14          0x4000  /* Enable Interrupt For Mailbox 14 */
+#define MBIM15          0x8000  /* Enable Interrupt For Mailbox 15 */
+
+/* CAN_MBIM2 Masks */
+#define MBIM16          0x0001  /* Enable Interrupt For Mailbox 16 */
+#define MBIM17          0x0002  /* Enable Interrupt For Mailbox 17 */
+#define MBIM18          0x0004  /* Enable Interrupt For Mailbox 18 */
+#define MBIM19          0x0008  /* Enable Interrupt For Mailbox 19 */
+#define MBIM20          0x0010  /* Enable Interrupt For Mailbox 20 */
+#define MBIM21          0x0020  /* Enable Interrupt For Mailbox 21 */
+#define MBIM22          0x0040  /* Enable Interrupt For Mailbox 22 */
+#define MBIM23          0x0080  /* Enable Interrupt For Mailbox 23 */
+#define MBIM24          0x0100  /* Enable Interrupt For Mailbox 24 */
+#define MBIM25          0x0200  /* Enable Interrupt For Mailbox 25 */
+#define MBIM26          0x0400  /* Enable Interrupt For Mailbox 26 */
+#define MBIM27          0x0800  /* Enable Interrupt For Mailbox 27 */
+#define MBIM28          0x1000  /* Enable Interrupt For Mailbox 28 */
+#define MBIM29          0x2000  /* Enable Interrupt For Mailbox 29 */
+#define MBIM30          0x4000  /* Enable Interrupt For Mailbox 30 */
+#define MBIM31          0x8000  /* Enable Interrupt For Mailbox 31 */
+
+/* CAN_GIM Masks */
+#define EWTIM           0x0001  /* Enable TX Error Count Interrupt */
+#define EWRIM           0x0002  /* Enable RX Error Count Interrupt */
+#define EPIM            0x0004  /* Enable Error-Passive Mode Interrupt */
+#define BOIM            0x0008  /* Enable Bus Off Interrupt */
+#define WUIM            0x0010  /* Enable Wake-Up Interrupt */
+#define UIAIM           0x0020  /* Enable Access To Unimplemented Address Interrupt */
+#define AAIM            0x0040  /* Enable Abort Acknowledge Interrupt */
+#define RMLIM           0x0080  /* Enable RX Message Lost Interrupt */
+#define UCEIM           0x0100  /* Enable Universal Counter Overflow Interrupt */
+#define EXTIM           0x0200  /* Enable External Trigger Output Interrupt */
+#define ADIM            0x0400  /* Enable Access Denied Interrupt */
+
+/* CAN_GIS Masks */
+#define EWTIS           0x0001  /* TX Error Count IRQ Status */
+#define EWRIS           0x0002  /* RX Error Count IRQ Status */
+#define EPIS            0x0004  /* Error-Passive Mode IRQ Status */
+#define BOIS            0x0008  /* Bus Off IRQ Status */
+#define WUIS            0x0010  /* Wake-Up IRQ Status */
+#define UIAIS           0x0020  /* Access To Unimplemented Address IRQ Status */
+#define AAIS            0x0040  /* Abort Acknowledge IRQ Status */
+#define RMLIS           0x0080  /* RX Message Lost IRQ Status */
+#define UCEIS           0x0100  /* Universal Counter Overflow IRQ Status */
+#define EXTIS           0x0200  /* External Trigger Output IRQ Status */
+#define ADIS            0x0400  /* Access Denied IRQ Status */
+
+/* CAN_GIF Masks */
+#define EWTIF           0x0001  /* TX Error Count IRQ Flag */
+#define EWRIF           0x0002  /* RX Error Count IRQ Flag */
+#define EPIF            0x0004  /* Error-Passive Mode IRQ Flag */
+#define BOIF            0x0008  /* Bus Off IRQ Flag */
+#define WUIF            0x0010  /* Wake-Up IRQ Flag */
+#define UIAIF           0x0020  /* Access To Unimplemented Address IRQ Flag */
+#define AAIF            0x0040  /* Abort Acknowledge IRQ Flag */
+#define RMLIF           0x0080  /* RX Message Lost IRQ Flag */
+#define UCEIF           0x0100  /* Universal Counter Overflow IRQ Flag */
+#define EXTIF           0x0200  /* External Trigger Output IRQ Flag */
+#define ADIF            0x0400  /* Access Denied IRQ Flag */
+
+/* CAN_UCCNF Masks */
+#define UCCNF           0x000F  /* Universal Counter Mode */
+#define UC_STAMP        0x0001  /*  Timestamp Mode */
+#define UC_WDOG         0x0002  /*  Watchdog Mode */
+#define UC_AUTOTX       0x0003  /*  Auto-Transmit Mode */
+#define UC_ERROR        0x0006  /*  CAN Error Frame Count */
+#define UC_OVER         0x0007  /*  CAN Overload Frame Count */
+#define UC_LOST         0x0008  /*  Arbitration Lost During TX Count */
+#define UC_AA           0x0009  /*  TX Abort Count */
+#define UC_TA           0x000A  /*  TX Successful Count */
+#define UC_REJECT       0x000B  /*  RX Message Rejected Count */
+#define UC_RML          0x000C  /*  RX Message Lost Count */
+#define UC_RX           0x000D  /*  Total Successful RX Messages Count */
+#define UC_RMP          0x000E  /*  Successful RX W/Matching ID Count */
+#define UC_ALL          0x000F  /*  Correct Message On CAN Bus Line Count */
+#define UCRC            0x0020  /* Universal Counter Reload/Clear */
+#define UCCT            0x0040  /* Universal Counter CAN Trigger */
+#define UCE                     0x0080  /* Universal Counter Enable */
+
+/* CAN_ESR Masks */
+#define ACKE            0x0004  /* Acknowledge Error */
+#define SER                     0x0008  /* Stuff Error */
+#define CRCE            0x0010  /* CRC Error */
+#define SA0                     0x0020  /* Stuck At Dominant Error */
+#define BEF                     0x0040  /* Bit Error Flag */
+#define FER                     0x0080  /* Form Error Flag */
+
+/* CAN_EWR Masks */
+#define EWLREC          0x00FF  /* RX Error Count Limit (For EWRIS) */
+#define EWLTEC          0xFF00  /* TX Error Count Limit (For EWTIS) */
+
+#endif
diff --git a/arch/blackfin/include/asm/bfin_sport.h b/arch/blackfin/include/asm/bfin_sport.h
index b558908e1c7..9626cf7e425 100644
--- a/arch/blackfin/include/asm/bfin_sport.h
+++ b/arch/blackfin/include/asm/bfin_sport.h
@@ -1,7 +1,7 @@
 /*
- * bfin_sport.h - userspace header for bfin sport driver
+ * bfin_sport.h - interface to Blackfin SPORTs
  *
- * Copyright 2004-2008 Analog Devices Inc.
+ * Copyright 2004-2009 Analog Devices Inc.
  *
  * Licensed under the GPL-2 or later.
  */
@@ -9,16 +9,6 @@
 #ifndef __BFIN_SPORT_H__
 #define __BFIN_SPORT_H__
 
-#ifdef __KERNEL__
-#include <linux/cdev.h>
-#include <linux/mutex.h>
-#include <linux/sched.h>
-#include <linux/wait.h>
-#endif
-
-#define SPORT_MAJOR     237
-#define SPORT_NR_DEVS   2
-
 /* Sport mode: it can be set to TDM, i2s or others */
 #define NORM_MODE       0x0
 #define TDM_MODE        0x1
@@ -35,7 +25,7 @@ struct sport_config {
         unsigned int mode:3;
 
         /* if TDM mode is selected, channels must be set */
-        int channels;           /* Must be in 8 units */
+        int channels;   /* Must be in 8 units */
         unsigned int frame_delay:4;     /* Delay between frame sync pulse and first bit */
 
         /* I2S mode */
@@ -69,94 +59,137 @@ struct sport_config {
 
 #ifdef __KERNEL__
 
-struct sport_register {
-        unsigned short tcr1;
-        unsigned short reserved0;
-        unsigned short tcr2;
-        unsigned short reserved1;
-        unsigned short tclkdiv;
-        unsigned short reserved2;
-        unsigned short tfsdiv;
-        unsigned short reserved3;
-        unsigned long tx;
-        unsigned long reserved_l0;
-        unsigned long rx;
-        unsigned long reserved_l1;
-        unsigned short rcr1;
-        unsigned short reserved4;
-        unsigned short rcr2;
-        unsigned short reserved5;
-        unsigned short rclkdiv;
-        unsigned short reserved6;
-        unsigned short rfsdiv;
-        unsigned short reserved7;
-        unsigned short stat;
-        unsigned short reserved8;
-        unsigned short chnl;
-        unsigned short reserved9;
-        unsigned short mcmc1;
-        unsigned short reserved10;
-        unsigned short mcmc2;
-        unsigned short reserved11;
-        unsigned long mtcs0;
-        unsigned long mtcs1;
-        unsigned long mtcs2;
-        unsigned long mtcs3;
-        unsigned long mrcs0;
-        unsigned long mrcs1;
-        unsigned long mrcs2;
-        unsigned long mrcs3;
-};
-
-struct sport_dev {
-        struct cdev cdev;       /* Char device structure */
-
-        int sport_num;
+#include <linux/types.h>
 
-        int dma_rx_chan;
-        int dma_tx_chan;
-
-        int rx_irq;
-        unsigned char *rx_buf;  /* Buffer store the received data */
-        int rx_len;             /* How many bytes will be received */
-        int rx_received;        /* How many bytes has been received */
-
-        int tx_irq;
-        const unsigned char *tx_buf;
-        int tx_len;
-        int tx_sent;
-
-        int err_irq;
-
-        struct mutex mutex;     /* mutual exclusion semaphore */
-        struct task_struct *task;
-
-        wait_queue_head_t waitq;
-        int     wait_con;
-        struct sport_register *regs;
-        struct sport_config config;
+/*
+ * All Blackfin system MMRs are padded to 32bits even if the register
+ * itself is only 16bits.  So use a helper macro to streamline this.
+ */
+#define __BFP(m) u16 m; u16 __pad_##m
+struct sport_register {
+        __BFP(tcr1);
+        __BFP(tcr2);
+        __BFP(tclkdiv);
+        __BFP(tfsdiv);
+        union {
+                u32 tx32;
+                u16 tx16;
+        };
+        u32 __pad_tx;
+        union {
+                u32 rx32;       /* use the anomaly wrapper below */
+                u16 rx16;
+        };
+        u32 __pad_rx;
+        __BFP(rcr1);
+        __BFP(rcr2);
+        __BFP(rclkdiv);
+        __BFP(rfsdiv);
+        __BFP(stat);
+        __BFP(chnl);
+        __BFP(mcmc1);
+        __BFP(mcmc2);
+        u32 mtcs0;
+        u32 mtcs1;
+        u32 mtcs2;
+        u32 mtcs3;
+        u32 mrcs0;
+        u32 mrcs1;
+        u32 mrcs2;
+        u32 mrcs3;
 };
+#undef __BFP
+
+#define bfin_read_sport_rx32(base) \
+({ \
+        struct sport_register *__mmrs = (void *)base; \
+        u32 __ret; \
+        unsigned long flags; \
+        if (ANOMALY_05000473) \
+                local_irq_save(flags); \
+        __ret = __mmrs->rx32; \
+        if (ANOMALY_05000473) \
+                local_irq_restore(flags); \
+        __ret; \
+})
 
 #endif
 
-#define SPORT_TCR1      0
-#define SPORT_TCR2      1
-#define SPORT_TCLKDIV   2
-#define SPORT_TFSDIV    3
-#define SPORT_RCR1      8
-#define SPORT_RCR2      9
-#define SPORT_RCLKDIV   10
-#define SPORT_RFSDIV    11
-#define SPORT_CHANNEL   13
-#define SPORT_MCMC1     14
-#define SPORT_MCMC2     15
-#define SPORT_MTCS0     16
-#define SPORT_MTCS1     17
-#define SPORT_MTCS2     18
-#define SPORT_MTCS3     19
-#define SPORT_MRCS0     20
-#define SPORT_MRCS1     21
-#define SPORT_MRCS2     22
-#define SPORT_MRCS3     23
+/* Workaround defBF*.h SPORT MMRs till they get cleansed */
+#undef DTYPE_NORM
+#undef SLEN
+#undef SP_WOFF
+#undef SP_WSIZE
+
+/* SPORT_TCR1 Masks */
+#define TSPEN           0x0001  /* TX enable */
+#define ITCLK           0x0002  /* Internal TX Clock Select */
+#define TDTYPE          0x000C  /* TX Data Formatting Select */
+#define DTYPE_NORM      0x0000  /* Data Format Normal */
+#define DTYPE_ULAW      0x0008  /* Compand Using u-Law */
+#define DTYPE_ALAW      0x000C  /* Compand Using A-Law */
+#define TLSBIT          0x0010  /* TX Bit Order */
+#define ITFS            0x0200  /* Internal TX Frame Sync Select */
+#define TFSR            0x0400  /* TX Frame Sync Required Select */
+#define DITFS           0x0800  /* Data Independent TX Frame Sync Select */
+#define LTFS            0x1000  /* Low TX Frame Sync Select */
+#define LATFS           0x2000  /* Late TX Frame Sync Select */
+#define TCKFE           0x4000  /* TX Clock Falling Edge Select */
+
+/* SPORT_TCR2 Masks */
+#define SLEN            0x001F  /* SPORT TX Word Length (2 - 31) */
+#define DP_SLEN(x)      BFIN_DEPOSIT(SLEN, x)
+#define EX_SLEN(x)      BFIN_EXTRACT(SLEN, x)
+#define TXSE            0x0100  /* TX Secondary Enable */
+#define TSFSE           0x0200  /* TX Stereo Frame Sync Enable */
+#define TRFST           0x0400  /* TX Right-First Data Order */
+
+/* SPORT_RCR1 Masks */
+#define RSPEN           0x0001  /* RX enable */
+#define IRCLK           0x0002  /* Internal RX Clock Select */
+#define RDTYPE          0x000C  /* RX Data Formatting Select */
+/* DTYPE_* defined above */
+#define RLSBIT          0x0010  /* RX Bit Order */
+#define IRFS            0x0200  /* Internal RX Frame Sync Select */
+#define RFSR            0x0400  /* RX Frame Sync Required Select */
+#define LRFS            0x1000  /* Low RX Frame Sync Select */
+#define LARFS           0x2000  /* Late RX Frame Sync Select */
+#define RCKFE           0x4000  /* RX Clock Falling Edge Select */
+
+/* SPORT_RCR2 Masks */
+/* SLEN defined above */
+#define RXSE            0x0100  /* RX Secondary Enable */
+#define RSFSE           0x0200  /* RX Stereo Frame Sync Enable */
+#define RRFST           0x0400  /* Right-First Data Order */
+
+/* SPORT_STAT Masks */
+#define RXNE            0x0001  /* RX FIFO Not Empty Status */
+#define RUVF            0x0002  /* RX Underflow Status */
+#define ROVF            0x0004  /* RX Overflow Status */
+#define TXF             0x0008  /* TX FIFO Full Status */
+#define TUVF            0x0010  /* TX Underflow Status */
+#define TOVF            0x0020  /* TX Overflow Status */
+#define TXHRE           0x0040  /* TX Hold Register Empty */
+
+/* SPORT_MCMC1 Masks */
+#define SP_WOFF         0x03FF  /* Multichannel Window Offset Field */
+#define DP_SP_WOFF(x)   BFIN_DEPOSIT(SP_WOFF, x)
+#define EX_SP_WOFF(x)   BFIN_EXTRACT(SP_WOFF, x)
+#define SP_WSIZE        0xF000  /* Multichannel Window Size Field */
+#define DP_SP_WSIZE(x)  BFIN_DEPOSIT(SP_WSIZE, x)
+#define EX_SP_WSIZE(x)  BFIN_EXTRACT(SP_WSIZE, x)
+
+/* SPORT_MCMC2 Masks */
+#define MCCRM           0x0003  /* Multichannel Clock Recovery Mode */
+#define REC_BYPASS      0x0000  /* Bypass Mode (No Clock Recovery) */
+#define REC_2FROM4      0x0002  /* Recover 2 MHz Clock from 4 MHz Clock */
+#define REC_8FROM16     0x0003  /* Recover 8 MHz Clock from 16 MHz Clock */
+#define MCDTXPE         0x0004  /* Multichannel DMA Transmit Packing */
+#define MCDRXPE         0x0008  /* Multichannel DMA Receive Packing */
+#define MCMEN           0x0010  /* Multichannel Frame Mode Enable */
+#define FSDR            0x0080  /* Multichannel Frame Sync to Data Relationship */
+#define MFD             0xF000  /* Multichannel Frame Delay */
+#define DP_MFD(x)       BFIN_DEPOSIT(MFD, x)
+#define EX_MFD(x)       BFIN_EXTRACT(MFD, x)
 
 #endif
diff --git a/arch/blackfin/include/asm/bfin_watchdog.h b/arch/blackfin/include/asm/bfin_watchdog.h
new file mode 100644
index 00000000000..dce09829a09
--- /dev/null
+++ b/arch/blackfin/include/asm/bfin_watchdog.h
@@ -0,0 +1,30 @@
+/*
+ * bfin_watchdog.h - Blackfin watchdog definitions
+ *
+ * Copyright 2006-2010 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef _BFIN_WATCHDOG_H
+#define _BFIN_WATCHDOG_H
+
+/* Bit in SWRST that indicates boot caused by watchdog */
+#define SWRST_RESET_WDOG 0x4000
+
+/* Bit in WDOG_CTL that indicates watchdog has expired (WDR0) */
+#define WDOG_EXPIRED 0x8000
+
+/* Masks for WDEV field in WDOG_CTL register */
+#define ICTL_RESET   0x0
+#define ICTL_NMI     0x2
+#define ICTL_GPI     0x4
+#define ICTL_NONE    0x6
+#define ICTL_MASK    0x6
+
+/* Masks for WDEN field in WDOG_CTL register */
+#define WDEN_MASK    0x0FF0
+#define WDEN_ENABLE  0x0000
+#define WDEN_DISABLE 0x0AD0
+
+#endif
diff --git a/arch/blackfin/include/asm/bitops.h b/arch/blackfin/include/asm/bitops.h
index a2ff3fb3568..605ba8e9b2e 100644
--- a/arch/blackfin/include/asm/bitops.h
+++ b/arch/blackfin/include/asm/bitops.h
@@ -7,22 +7,41 @@
 #ifndef _BLACKFIN_BITOPS_H
 #define _BLACKFIN_BITOPS_H
 
-#ifndef CONFIG_SMP
-# include <asm-generic/bitops.h>
-#else
+#include <linux/compiler.h>
+
+#include <asm-generic/bitops/__ffs.h>
+#include <asm-generic/bitops/ffz.h>
+#include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/__fls.h>
+#include <asm-generic/bitops/fls64.h>
+#include <asm-generic/bitops/find.h>
 
 #ifndef _LINUX_BITOPS_H
 #error only <linux/bitops.h> can be included directly
 #endif
 
-#include <linux/compiler.h>
-#include <asm/byteorder.h>      /* swab32 */
-
-#include <asm-generic/bitops/ffs.h>
-#include <asm-generic/bitops/__ffs.h>
 #include <asm-generic/bitops/sched.h>
-#include <asm-generic/bitops/ffz.h>
+#include <asm-generic/bitops/ffs.h>
+#include <asm-generic/bitops/lock.h>
+#include <asm-generic/bitops/ext2-non-atomic.h>
+#include <asm-generic/bitops/ext2-atomic.h>
+#include <asm-generic/bitops/minix.h>
+
+#ifndef CONFIG_SMP
+#include <linux/irqflags.h>
+
+/*
+ * clear_bit may not imply a memory barrier
+ */
+#ifndef smp_mb__before_clear_bit
+#define smp_mb__before_clear_bit()      smp_mb()
+#define smp_mb__after_clear_bit()       smp_mb()
+#endif
+#include <asm-generic/bitops/atomic.h>
+#include <asm-generic/bitops/non-atomic.h>
+#else
 
+#include <asm/byteorder.h>      /* swab32 */
 #include <linux/linkage.h>
 
 asmlinkage int __raw_bit_set_asm(volatile unsigned long *addr, int nr);
@@ -89,19 +108,36 @@ static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
 
 #include <asm-generic/bitops/non-atomic.h>
 
-#include <asm-generic/bitops/find.h>
-#include <asm-generic/bitops/hweight.h>
-#include <asm-generic/bitops/lock.h>
+#endif /* CONFIG_SMP */
 
-#include <asm-generic/bitops/ext2-atomic.h>
-#include <asm-generic/bitops/ext2-non-atomic.h>
+/*
+ * hweightN: returns the hamming weight (i.e. the number
+ * of bits set) of a N-bit word
+ */
 
-#include <asm-generic/bitops/minix.h>
+static inline unsigned int hweight32(unsigned int w)
+{
+        unsigned int res;
 
-#include <asm-generic/bitops/fls.h>
-#include <asm-generic/bitops/__fls.h>
-#include <asm-generic/bitops/fls64.h>
+        __asm__ ("%0.l = ONES %0;"
+                "%0 = %0.l (Z);"
+                : "=d" (res) : "d" (w));
+        return res;
+}
 
-#endif /* CONFIG_SMP */
+static inline unsigned int hweight64(__u64 w)
+{
+        return hweight32((unsigned int)(w >> 32)) + hweight32((unsigned int)w);
+}
+
+static inline unsigned int hweight16(unsigned int w)
+{
+        return hweight32(w & 0xffff);
+}
+
+static inline unsigned int hweight8(unsigned int w)
+{
+        return hweight32(w & 0xff);
+}
 
 #endif                          /* _BLACKFIN_BITOPS_H */
diff --git a/arch/blackfin/include/asm/context.S b/arch/blackfin/include/asm/context.S
index 5dffaf582a2..1f9060395a0 100644
--- a/arch/blackfin/include/asm/context.S
+++ b/arch/blackfin/include/asm/context.S
@@ -73,6 +73,11 @@
 #else
         cli r0;
 #endif
+#ifdef CONFIG_TRACE_IRQFLAGS
+        sp += -12;
+        call _trace_hardirqs_off;
+        sp += 12;
+#endif
         [--sp] = RETI;  /*orig_pc*/
         /* Clear all L registers.  */
         r0 = 0 (x);
@@ -279,6 +284,13 @@
         RETN = [sp++];
         RETX = [sp++];
         RETI = [sp++];
+
+#ifdef CONFIG_TRACE_IRQFLAGS
+        sp += -12;
+        call _trace_hardirqs_on;
+        sp += 12;
+#endif
+
         RETS = [sp++];
 
 #ifdef CONFIG_SMP
@@ -374,3 +386,13 @@
 
         (R7:0, P5:0) = [SP++];
 .endm
+
+.macro pseudo_long_call func:req, scratch:req
+#ifdef CONFIG_ROMKERNEL
+        \scratch\().l = \func;
+        \scratch\().h = \func;
+        call (\scratch);
+#else
+        call \func;
+#endif
+.endm
diff --git a/arch/blackfin/include/asm/cpu.h b/arch/blackfin/include/asm/cpu.h
index b191dc662bd..16883e582e3 100644
--- a/arch/blackfin/include/asm/cpu.h
+++ b/arch/blackfin/include/asm/cpu.h
@@ -17,8 +17,6 @@ struct blackfin_cpudata {
         struct task_struct *idle;
         unsigned int imemctl;
         unsigned int dmemctl;
-        unsigned long dcache_invld_count;
-        unsigned long icache_invld_count;
 };
 
 DECLARE_PER_CPU(struct blackfin_cpudata, cpu_data);
diff --git a/arch/blackfin/include/asm/def_LPBlackfin.h b/arch/blackfin/include/asm/def_LPBlackfin.h
index 25906468622..f342ff0319d 100644
--- a/arch/blackfin/include/asm/def_LPBlackfin.h
+++ b/arch/blackfin/include/asm/def_LPBlackfin.h
@@ -12,6 +12,8 @@
 #include <mach/anomaly.h>
 
 #define MK_BMSK_(x) (1<<x)
+#define BFIN_DEPOSIT(mask, x)   (((x) << __ffs(mask)) & (mask))
+#define BFIN_EXTRACT(mask, x)   (((x) & (mask)) >> __ffs(mask))
 
 #ifndef __ASSEMBLY__
 
@@ -23,62 +25,30 @@
 # define NOP_PAD_ANOMALY_05000198
 #endif
 
-#define bfin_read8(addr) ({ \
-        uint32_t __v; \
+#define _bfin_readX(addr, size, asm_size, asm_ext) ({ \
+        u32 __v; \
         __asm__ __volatile__( \
                 NOP_PAD_ANOMALY_05000198 \
-                "%0 = b[%1] (z);" \
+                "%0 = " #asm_size "[%1]" #asm_ext ";" \
                 : "=d" (__v) \
                 : "a" (addr) \
         ); \
         __v; })
-
-#define bfin_read16(addr) ({ \
-        uint32_t __v; \
-        __asm__ __volatile__( \
-                NOP_PAD_ANOMALY_05000198 \
-                "%0 = w[%1] (z);" \
-                : "=d" (__v) \
-                : "a" (addr) \
-        ); \
-        __v; })
-
-#define bfin_read32(addr) ({ \
-        uint32_t __v; \
-        __asm__ __volatile__( \
-                NOP_PAD_ANOMALY_05000198 \
-                "%0 = [%1];" \
-                : "=d" (__v) \
-                : "a" (addr) \
-        ); \
-        __v; })
-
-#define bfin_write8(addr, val) \
+#define _bfin_writeX(addr, val, size, asm_size) \
         __asm__ __volatile__( \
                 NOP_PAD_ANOMALY_05000198 \
-                "b[%0] = %1;" \
+                #asm_size "[%0] = %1;" \
                 : \
-                : "a" (addr), "d" ((uint8_t)(val)) \
+                : "a" (addr), "d" ((u##size)(val)) \
                 : "memory" \
         )
 
-#define bfin_write16(addr, val) \
-        __asm__ __volatile__( \
-                NOP_PAD_ANOMALY_05000198 \
-                "w[%0] = %1;" \
-                : \
-                : "a" (addr), "d" ((uint16_t)(val)) \
-                : "memory" \
-        )
-
-#define bfin_write32(addr, val) \
-        __asm__ __volatile__( \
-                NOP_PAD_ANOMALY_05000198 \
-                "[%0] = %1;" \
-                : \
-                : "a" (addr), "d" (val) \
-                : "memory" \
-        )
+#define bfin_read8(addr)  _bfin_readX(addr,  8, b, (z))
+#define bfin_read16(addr) _bfin_readX(addr, 16, w, (z))
+#define bfin_read32(addr) _bfin_readX(addr, 32,  ,    )
+#define bfin_write8(addr, val)  _bfin_writeX(addr, val,  8, b)
+#define bfin_write16(addr, val) _bfin_writeX(addr, val, 16, w)
+#define bfin_write32(addr, val) _bfin_writeX(addr, val, 32,  )
 
 #endif /* __ASSEMBLY__ */
 
diff --git a/arch/blackfin/include/asm/delay.h b/arch/blackfin/include/asm/delay.h
index c31f91cc1d5..171d8deb04a 100644
--- a/arch/blackfin/include/asm/delay.h
+++ b/arch/blackfin/include/asm/delay.h
@@ -30,10 +30,22 @@ __asm__ __volatile__ (
 
 #define HZSCALE         (268435456 / (1000000/HZ))
 
-static inline void udelay(unsigned long usecs)
+static inline unsigned long __to_delay(unsigned long scale)
 {
         extern unsigned long loops_per_jiffy;
-        __delay((((usecs * HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6);
+        return (((scale * HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6;
+}
+
+static inline void udelay(unsigned long usecs)
+{
+        __delay(__to_delay(usecs));
 }
 
+static inline void ndelay(unsigned long nsecs)
+{
+        __delay(__to_delay(1) * nsecs / 1000);
+}
+
+#define ndelay ndelay
+
 #endif
diff --git a/arch/blackfin/include/asm/dma-mapping.h b/arch/blackfin/include/asm/dma-mapping.h
index f9172ff30e5..212cb80fd74 100644
--- a/arch/blackfin/include/asm/dma-mapping.h
+++ b/arch/blackfin/include/asm/dma-mapping.h
@@ -44,13 +44,8 @@ dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 extern void
 __dma_sync(dma_addr_t addr, size_t size, enum dma_data_direction dir);
 static inline void
-_dma_sync(dma_addr_t addr, size_t size, enum dma_data_direction dir)
+__dma_sync_inline(dma_addr_t addr, size_t size, enum dma_data_direction dir)
 {
-        if (!__builtin_constant_p(dir)) {
-                __dma_sync(addr, size, dir);
-                return;
-        }
-
         switch (dir) {
         case DMA_NONE:
                 BUG();
@@ -64,14 +59,15 @@ _dma_sync(dma_addr_t addr, size_t size, enum dma_data_direction dir)
                 break;
         }
 }
+static inline void
+_dma_sync(dma_addr_t addr, size_t size, enum dma_data_direction dir)
+{
+        if (__builtin_constant_p(dir))
+                __dma_sync_inline(addr, size, dir);
+        else
+                __dma_sync(addr, size, dir);
+}
 
-/*
- * Map a single buffer of the indicated size for DMA in streaming mode.
- * The 32-bit bus address to use is returned.
- *
- * Once the device is given the dma address, the device owns this memory
- * until either pci_unmap_single or pci_dma_sync_single is performed.
- */
 static inline dma_addr_t
 dma_map_single(struct device *dev, void *ptr, size_t size,
                enum dma_data_direction dir)
@@ -88,14 +84,6 @@ dma_map_page(struct device *dev, struct page *page,
         return dma_map_single(dev, page_address(page) + offset, size, dir);
 }
 
-/*
- * Unmap a single streaming mode DMA translation.  The dma_addr and size
- * must match what was provided for in a previous pci_map_single call.  All
- * other usages are undefined.
- *
- * After this call, reads by the cpu to the buffer are guarenteed to see
- * whatever the device wrote there.
- */
 static inline void
 dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
                  enum dma_data_direction dir)
@@ -110,30 +98,9 @@ dma_unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size,
         dma_unmap_single(dev, dma_addr, size, dir);
 }
 
-/*
- * Map a set of buffers described by scatterlist in streaming
- * mode for DMA.  This is the scather-gather version of the
- * above pci_map_single interface.  Here the scatter gather list
- * elements are each tagged with the appropriate dma address
- * and length.  They are obtained via sg_dma_{address,length}(SG).
- *
- * NOTE: An implementation may be able to use a smaller number of
- *       DMA address/length pairs than there are SG table elements.
- *       (for example via virtual mapping capabilities)
- *       The routine returns the number of addr/length pairs actually
- *       used, at most nents.
- *
- * Device ownership issues as mentioned above for pci_map_single are
- * the same here.
- */
 extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
                       enum dma_data_direction dir);
 
-/*
- * Unmap a set of streaming mode DMA translations.
- * Again, cpu read rules concerning calls here are the same as for
- * pci_unmap_single() above.
- */
 static inline void
 dma_unmap_sg(struct device *dev, struct scatterlist *sg,
              int nhwentries, enum dma_data_direction dir)
diff --git a/arch/blackfin/include/asm/dma.h b/arch/blackfin/include/asm/dma.h
index bd2e62243ab..2c09b1d50ec 100644
--- a/arch/blackfin/include/asm/dma.h
+++ b/arch/blackfin/include/asm/dma.h
@@ -262,6 +262,10 @@ static inline void dma_disable_irq(unsigned int channel)
 {
         disable_irq(dma_ch[channel].irq);
 }
+static inline void dma_disable_irq_nosync(unsigned int channel)
+{
+        disable_irq_nosync(dma_ch[channel].irq);
+}
 static inline void dma_enable_irq(unsigned int channel)
 {
         enable_irq(dma_ch[channel].irq);
diff --git a/arch/blackfin/include/asm/dpmc.h b/arch/blackfin/include/asm/dpmc.h
index 1597ae5041e..efcc3aebeae 100644
--- a/arch/blackfin/include/asm/dpmc.h
+++ b/arch/blackfin/include/asm/dpmc.h
@@ -75,7 +75,7 @@
 
 #define VLEV                    0x00F0  /* Internal Voltage Level */
 #ifdef __ADSPBF52x__
-#define VLEV_085                0x0040  /* VLEV = 0.85 V (-5% - +10% Accuracy) */
+#define VLEV_085                0x0040  /* VLEV = 0.85 V (-5% - +10% Accuracy) */
 #define VLEV_090                0x0050  /* VLEV = 0.90 V (-5% - +10% Accuracy) */
 #define VLEV_095                0x0060  /* VLEV = 0.95 V (-5% - +10% Accuracy) */
 #define VLEV_100                0x0070  /* VLEV = 1.00 V (-5% - +10% Accuracy) */
@@ -84,7 +84,7 @@
 #define VLEV_115                0x00A0  /* VLEV = 1.15 V (-5% - +10% Accuracy) */
 #define VLEV_120                0x00B0  /* VLEV = 1.20 V (-5% - +10% Accuracy) */
 #else
-#define VLEV_085                0x0060  /* VLEV = 0.85 V (-5% - +10% Accuracy) */
+#define VLEV_085                0x0060  /* VLEV = 0.85 V (-5% - +10% Accuracy) */
 #define VLEV_090                0x0070  /* VLEV = 0.90 V (-5% - +10% Accuracy) */
 #define VLEV_095                0x0080  /* VLEV = 0.95 V (-5% - +10% Accuracy) */
 #define VLEV_100                0x0090  /* VLEV = 1.00 V (-5% - +10% Accuracy) */
diff --git a/arch/blackfin/include/asm/elf.h b/arch/blackfin/include/asm/elf.h
index 5b50f0ecacf..117713adea7 100644
--- a/arch/blackfin/include/asm/elf.h
+++ b/arch/blackfin/include/asm/elf.h
@@ -22,12 +22,15 @@
 #define EF_BFIN_CODE_IN_L2      0x00000040      /* --code-in-l2 */
 #define EF_BFIN_DATA_IN_L2      0x00000080      /* --data-in-l2 */
 
+#if 1   /* core dumps not supported, but linux/elfcore.h needs these */
 typedef unsigned long elf_greg_t;
 
-#define ELF_NGREG 40 /* (sizeof(struct user_regs_struct) / sizeof(elf_greg_t)) */
+#define ELF_NGREG (sizeof(struct pt_regs) / sizeof(elf_greg_t))
 typedef elf_greg_t elf_gregset_t[ELF_NGREG];
 
 typedef struct { } elf_fpregset_t;
+#endif
+
 /*
  * This is used to ensure we don't load something for the wrong architecture.
  */
@@ -55,6 +58,9 @@ do {											\
         _regs->p2       = _dynamic_addr;                                \
 } while(0)
 
+#if 0
+#define CORE_DUMP_USE_REGSET
+#endif
 #define ELF_FDPIC_CORE_EFLAGS   EF_BFIN_FDPIC
 #define ELF_EXEC_PAGESIZE       4096
 
diff --git a/arch/blackfin/include/asm/ftrace.h b/arch/blackfin/include/asm/ftrace.h
index 90c9b400ba6..4cfe2d9ba7e 100644
--- a/arch/blackfin/include/asm/ftrace.h
+++ b/arch/blackfin/include/asm/ftrace.h
@@ -10,4 +10,57 @@
 
 #define MCOUNT_INSN_SIZE        6 /* sizeof "[++sp] = rets; call __mcount;" */
 
+#ifndef __ASSEMBLY__
+
+#ifdef CONFIG_FRAME_POINTER
+#include <linux/mm.h>
+
+extern inline void *return_address(unsigned int level)
+{
+        unsigned long *endstack, *fp, *ret_addr;
+        unsigned int current_level = 0;
+
+        if (level == 0)
+                return __builtin_return_address(0);
+
+        fp = (unsigned long *)__builtin_frame_address(0);
+        endstack = (unsigned long *)PAGE_ALIGN((unsigned long)&level);
+
+        while (((unsigned long)fp & 0x3) == 0 && fp &&
+               (fp + 1) < endstack && current_level < level) {
+                fp = (unsigned long *)*fp;
+                current_level++;
+        }
+
+        if (((unsigned long)fp & 0x3) == 0 && fp &&
+            (fp + 1) < endstack)
+                ret_addr = (unsigned long *)*(fp + 1);
+        else
+                ret_addr = NULL;
+
+        return ret_addr;
+}
+
+#else
+
+extern inline void *return_address(unsigned int level)
+{
+        return NULL;
+}
+
+#endif /* CONFIG_FRAME_POINTER */
+
+#define HAVE_ARCH_CALLER_ADDR
+
+/* inline function or macro may lead to unexpected result */
+#define CALLER_ADDR0 ((unsigned long)__builtin_return_address(0))
+#define CALLER_ADDR1 ((unsigned long)return_address(1))
+#define CALLER_ADDR2 ((unsigned long)return_address(2))
+#define CALLER_ADDR3 ((unsigned long)return_address(3))
+#define CALLER_ADDR4 ((unsigned long)return_address(4))
+#define CALLER_ADDR5 ((unsigned long)return_address(5))
+#define CALLER_ADDR6 ((unsigned long)return_address(6))
+
+#endif /* __ASSEMBLY__ */
+
 #endif
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
index 539468a0505..91bd2d7b9d5 100644
--- a/arch/blackfin/include/asm/gpio.h
+++ b/arch/blackfin/include/asm/gpio.h
@@ -70,6 +70,8 @@
 
 #ifndef __ASSEMBLY__
 
+#include <linux/compiler.h>
+
 /***********************************************************
 *
 * FUNCTIONS: Blackfin General Purpose Ports Access Functions
@@ -223,6 +225,9 @@ int bfin_gpio_direction_output(unsigned gpio, int value);
 int bfin_gpio_get_value(unsigned gpio);
 void bfin_gpio_set_value(unsigned gpio, int value);
 
+#include <asm/irq.h>
+#include <asm/errno.h>
+
 #ifdef CONFIG_GPIOLIB
 #include <asm-generic/gpio.h>           /* cansleep wrappers */
 
@@ -247,6 +252,11 @@ static inline int gpio_cansleep(unsigned int gpio)
         return __gpio_cansleep(gpio);
 }
 
+static inline int gpio_to_irq(unsigned gpio)
+{
+        return __gpio_to_irq(gpio);
+}
+
 #else /* !CONFIG_GPIOLIB */
 
 static inline int gpio_request(unsigned gpio, const char *label)
@@ -279,10 +289,6 @@ static inline void gpio_set_value(unsigned gpio, int value)
         return bfin_gpio_set_value(gpio, value);
 }
 
-#include <asm-generic/gpio.h>           /* cansleep wrappers */
-#endif  /* !CONFIG_GPIOLIB */
-#include <asm/irq.h>
-
 static inline int gpio_to_irq(unsigned gpio)
 {
         if (likely(gpio < MAX_BLACKFIN_GPIOS))
@@ -291,6 +297,9 @@ static inline int gpio_to_irq(unsigned gpio)
         return -EINVAL;
 }
 
+#include <asm-generic/gpio.h>           /* cansleep wrappers */
+#endif  /* !CONFIG_GPIOLIB */
+
 static inline int irq_to_gpio(unsigned irq)
 {
         return (irq - GPIO_IRQ_BASE);
diff --git a/arch/blackfin/include/asm/irq.h b/arch/blackfin/include/asm/irq.h
index e7c0623f909..12f4060a31b 100644
--- a/arch/blackfin/include/asm/irq.h
+++ b/arch/blackfin/include/asm/irq.h
@@ -12,6 +12,9 @@
 
 #include <linux/irqflags.h>
 
+/* IRQs that may be used by external irq_chip controllers */
+#define NR_SPARE_IRQS   32
+
 #include <mach/anomaly.h>
 
 /* SYS_IRQS and NR_IRQS are defined in <mach-bf5xx/irq.h> */
@@ -35,4 +38,8 @@
 
 #include <asm-generic/irq.h>
 
+#ifdef CONFIG_NMI_WATCHDOG
+# define ARCH_HAS_NMI_WATCHDOG
+#endif
+
 #endif                          /* _BFIN_IRQ_H_ */
diff --git a/arch/blackfin/include/asm/mmu_context.h b/arch/blackfin/include/asm/mmu_context.h
index ae8ef4ffd80..e1a9b4624f9 100644
--- a/arch/blackfin/include/asm/mmu_context.h
+++ b/arch/blackfin/include/asm/mmu_context.h
@@ -7,12 +7,13 @@
 #ifndef __BLACKFIN_MMU_CONTEXT_H__
 #define __BLACKFIN_MMU_CONTEXT_H__
 
-#include <linux/gfp.h>
+#include <linux/slab.h>
 #include <linux/sched.h>
 #include <asm/setup.h>
 #include <asm/page.h>
 #include <asm/pgalloc.h>
 #include <asm/cplbinit.h>
+#include <asm/sections.h>
 
 /* Note: L1 stacks are CPU-private things, so we bluntly disable this
    feature in SMP mode, and use the per-CPU scratch SRAM bank only to
@@ -117,9 +118,16 @@ static inline void protect_page(struct mm_struct *mm, unsigned long addr,
                                 unsigned long flags)
 {
         unsigned long *mask = mm->context.page_rwx_mask;
-        unsigned long page = addr >> 12;
-        unsigned long idx = page >> 5;
-        unsigned long bit = 1 << (page & 31);
+        unsigned long page;
+        unsigned long idx;
+        unsigned long bit;
+
+        if (unlikely(addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE))
+                page = (addr - (ASYNC_BANK0_BASE - _ramend)) >> 12;
+        else
+                page = addr >> 12;
+        idx = page >> 5;
+        bit = 1 << (page & 31);
 
         if (flags & VM_READ)
                 mask[idx] |= bit;
diff --git a/arch/blackfin/include/asm/nand.h b/arch/blackfin/include/asm/nand.h
index 3ae8b569edf..3a1e79dfc8d 100644
--- a/arch/blackfin/include/asm/nand.h
+++ b/arch/blackfin/include/asm/nand.h
@@ -1,5 +1,5 @@
 /*
- * BF5XX - NAND flash controller platfrom_device info
+ * BF5XX - NAND flash controller platform_device info
  *
  * Copyright 2007-2008 Analog Devices, Inc.
  *
@@ -8,7 +8,7 @@
 
 /* struct bf5xx_nand_platform
  *
- * define a interface between platfrom board specific code and
+ * define a interface between platform board specific code and
  * bf54x NFC driver.
  *
  * nr_partitions = number of partitions pointed to be partitoons (or zero)
diff --git a/arch/blackfin/include/asm/nmi.h b/arch/blackfin/include/asm/nmi.h
new file mode 100644
index 00000000000..b9caac4fcfd
--- /dev/null
+++ b/arch/blackfin/include/asm/nmi.h
@@ -0,0 +1,12 @@
+/*
+ * Copyright 2010 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2
+ */
+
+#ifndef _BFIN_NMI_H_
+#define _BFIN_NMI_H_
+
+#include <linux/nmi.h>
+
+#endif
diff --git a/arch/blackfin/include/asm/page.h b/arch/blackfin/include/asm/page.h
index 1d04e407834..d0ce975bcd4 100644
--- a/arch/blackfin/include/asm/page.h
+++ b/arch/blackfin/include/asm/page.h
@@ -15,4 +15,7 @@
         ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \
                  VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 
+#include <asm-generic/memory_model.h>
+#include <asm-generic/getorder.h>
+
 #endif
diff --git a/arch/blackfin/include/asm/ptrace.h b/arch/blackfin/include/asm/ptrace.h
index b33a4488f49..aaa1c6c2bc1 100644
--- a/arch/blackfin/include/asm/ptrace.h
+++ b/arch/blackfin/include/asm/ptrace.h
@@ -24,6 +24,8 @@
 
 #ifndef __ASSEMBLY__
 
+struct task_struct;
+
 /* this struct defines the way the registers are stored on the
    stack during a system call. */
 
@@ -101,9 +103,30 @@ struct pt_regs {
    master interrupt enable.  */
 #define user_mode(regs) (!(((regs)->ipend & ~0x10) & (((regs)->ipend & ~0x10) - 1)))
 #define instruction_pointer(regs) ((regs)->pc)
+#define user_stack_pointer(regs)  ((regs)->usp)
 #define profile_pc(regs) instruction_pointer(regs)
 extern void show_regs(struct pt_regs *);
 
+#define arch_has_single_step()  (1)
+extern void user_enable_single_step(struct task_struct *child);
+extern void user_disable_single_step(struct task_struct *child);
+/* common code demands this function */
+#define ptrace_disable(child) user_disable_single_step(child)
+
+/*
+ * Get the address of the live pt_regs for the specified task.
+ * These are saved onto the top kernel stack when the process
+ * is not running.
+ *
+ * Note: if a user thread is execve'd from kernel space, the
+ * kernel stack will not be empty on entry to the kernel, so
+ * ptracing these tasks will fail.
+ */
+#define task_pt_regs(task) \
+        (struct pt_regs *) \
+            ((unsigned long)task_stack_page(task) + \
+             (THREAD_SIZE - sizeof(struct pt_regs)))
+
 #endif  /*  __KERNEL__  */
 
 #endif                          /* __ASSEMBLY__ */
@@ -173,4 +196,6 @@ extern void show_regs(struct pt_regs *);
 #define PT_FDPIC_EXEC 232
 #define PT_FDPIC_INTERP 236
 
+#define PT_LAST_PSEUDO PT_FDPIC_INTERP
+
 #endif                          /* _BFIN_PTRACE_H */
diff --git a/arch/blackfin/include/asm/sections.h b/arch/blackfin/include/asm/sections.h
index 42f6c53c59c..14a3e66d916 100644
--- a/arch/blackfin/include/asm/sections.h
+++ b/arch/blackfin/include/asm/sections.h
@@ -21,6 +21,9 @@ extern unsigned long memory_start, memory_end, physical_mem_end;
 extern char _stext_l1[], _etext_l1[], _text_l1_lma[], __weak _text_l1_len[];
 extern char _sdata_l1[], _edata_l1[], _sbss_l1[], _ebss_l1[],
         _data_l1_lma[], __weak _data_l1_len[];
+#ifdef CONFIG_ROMKERNEL
+extern char _data_lma[], _data_len[], _sinitdata[], _einitdata[], _init_data_lma[], _init_data_len[];
+#endif
 extern char _sdata_b_l1[], _edata_b_l1[], _sbss_b_l1[], _ebss_b_l1[],
         _data_b_l1_lma[], __weak _data_b_l1_len[];
 extern char _stext_l2[], _etext_l2[], _sdata_l2[], _edata_l2[],
diff --git a/arch/blackfin/include/asm/smp.h b/arch/blackfin/include/asm/smp.h
index 6a0fe94b84a..f5b53796711 100644
--- a/arch/blackfin/include/asm/smp.h
+++ b/arch/blackfin/include/asm/smp.h
@@ -22,8 +22,23 @@ extern char coreb_trampoline_start, coreb_trampoline_end;
 struct corelock_slot {
         int lock;
 };
+extern struct corelock_slot corelock;
+
+#ifdef __ARCH_SYNC_CORE_ICACHE
+extern unsigned long icache_invld_count[NR_CPUS];
+#endif
+#ifdef __ARCH_SYNC_CORE_DCACHE
+extern unsigned long dcache_invld_count[NR_CPUS];
+#endif
 
 void smp_icache_flush_range_others(unsigned long start,
                                    unsigned long end);
+#ifdef CONFIG_HOTPLUG_CPU
+void coreb_sleep(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2);
+void cpu_die(void);
+void platform_cpu_die(void);
+int __cpu_disable(void);
+int __cpu_die(unsigned int cpu);
+#endif
 
 #endif /* !__ASM_BLACKFIN_SMP_H */
diff --git a/arch/blackfin/include/asm/syscall.h b/arch/blackfin/include/asm/syscall.h
new file mode 100644
index 00000000000..4921a4815cc
--- /dev/null
+++ b/arch/blackfin/include/asm/syscall.h
@@ -0,0 +1,96 @@
+/*
+ * Magic syscall break down functions
+ *
+ * Copyright 2010 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef __ASM_BLACKFIN_SYSCALL_H__
+#define __ASM_BLACKFIN_SYSCALL_H__
+
+/*
+ * Blackfin syscalls are simple:
+ *      enter:
+ *              p0: syscall number
+ *              r{0,1,2,3,4,5}: syscall args 0,1,2,3,4,5
+ *      exit:
+ *              r0: return/error value
+ */
+
+#include <linux/err.h>
+#include <linux/sched.h>
+#include <asm/ptrace.h>
+
+static inline long
+syscall_get_nr(struct task_struct *task, struct pt_regs *regs)
+{
+        return regs->p0;
+}
+
+static inline void
+syscall_rollback(struct task_struct *task, struct pt_regs *regs)
+{
+        regs->p0 = regs->orig_p0;
+}
+
+static inline long
+syscall_get_error(struct task_struct *task, struct pt_regs *regs)
+{
+        return IS_ERR_VALUE(regs->r0) ? regs->r0 : 0;
+}
+
+static inline long
+syscall_get_return_value(struct task_struct *task, struct pt_regs *regs)
+{
+        return regs->r0;
+}
+
+static inline void
+syscall_set_return_value(struct task_struct *task, struct pt_regs *regs,
+                         int error, long val)
+{
+        regs->r0 = error ? -error : val;
+}
+
+/**
+ *      syscall_get_arguments()
+ *      @task:   unused
+ *      @regs:   the register layout to extract syscall arguments from
+ *      @i:      first syscall argument to extract
+ *      @n:      number of syscall arguments to extract
+ *      @args:   array to return the syscall arguments in
+ *
+ * args[0] gets i'th argument, args[n - 1] gets the i+n-1'th argument
+ */
+static inline void
+syscall_get_arguments(struct task_struct *task, struct pt_regs *regs,
+                      unsigned int i, unsigned int n, unsigned long *args)
+{
+        /*
+         * Assume the ptrace layout doesn't change -- r5 is first in memory,
+         * then r4, ..., then r0.  So we simply reverse the ptrace register
+         * array in memory to store into the args array.
+         */
+        long *aregs = &regs->r0 - i;
+
+        BUG_ON(i > 5 || i + n > 6);
+
+        while (n--)
+                *args++ = *aregs--;
+}
+
+/* See syscall_get_arguments() comments */
+static inline void
+syscall_set_arguments(struct task_struct *task, struct pt_regs *regs,
+                      unsigned int i, unsigned int n, const unsigned long *args)
+{
+        long *aregs = &regs->r0 - i;
+
+        BUG_ON(i > 5 || i + n > 6);
+
+        while (n--)
+                *aregs-- = *args++;
+}
+
+#endif
diff --git a/arch/blackfin/include/asm/thread_info.h b/arch/blackfin/include/asm/thread_info.h
index a40d9368c38..e9a5614cdbb 100644
--- a/arch/blackfin/include/asm/thread_info.h
+++ b/arch/blackfin/include/asm/thread_info.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2004-2009 Analog Devices Inc.
+ * Copyright 2004-2010 Analog Devices Inc.
  *
  * Licensed under the GPL-2 or later.
  */
@@ -17,7 +17,7 @@
 /* Thread Align Mask to reach to the top of the stack
  * for any process
  */
-#define ALIGN_PAGE_MASK         0xffffe000
+#define ALIGN_PAGE_MASK         0xffffe000
 
 /*
  * Size of kernel stack for each process. This must be a power of 2...
@@ -57,7 +57,7 @@ struct thread_info {
         .exec_domain    = &default_exec_domain, \
         .flags          = 0,                    \
         .cpu            = 0,                    \
-        .preempt_count  = INIT_PREEMPT_COUNT,   \
+        .preempt_count  = INIT_PREEMPT_COUNT,   \
         .restart_block  = {                     \
                 .fn = do_no_restart_syscall,    \
         },                                      \
@@ -73,8 +73,7 @@ __attribute_const__
 static inline struct thread_info *current_thread_info(void)
 {
         struct thread_info *ti;
-      __asm__("%0 = sp;" : "=da"(ti) :
-        );
+        __asm__("%0 = sp;" : "=da"(ti));
         return (struct thread_info *)((long)ti & ~((long)THREAD_SIZE-1));
 }
 
@@ -99,21 +98,23 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_NEED_RESCHED        2       /* rescheduling necessary */
 #define TIF_POLLING_NRFLAG      3       /* true if poll_idle() is polling
                                            TIF_NEED_RESCHED */
-#define TIF_MEMDIE              4
+#define TIF_MEMDIE              4
 #define TIF_RESTORE_SIGMASK     5       /* restore signal mask in do_signal() */
-#define TIF_FREEZE              6       /* is freezing for suspend */
-#define TIF_IRQ_SYNC            7       /* sync pipeline stage */
-#define TIF_NOTIFY_RESUME       8       /* callback before returning to user */
+#define TIF_FREEZE              6       /* is freezing for suspend */
+#define TIF_IRQ_SYNC            7       /* sync pipeline stage */
+#define TIF_NOTIFY_RESUME       8       /* callback before returning to user */
+#define TIF_SINGLESTEP          9
 
 /* as above, but as bit values */
 #define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
 #define _TIF_SIGPENDING         (1<<TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED       (1<<TIF_NEED_RESCHED)
-#define _TIF_NOTIFY_RESUME      (1<<TIF_NOTIFY_RESUME)
 #define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
 #define _TIF_RESTORE_SIGMASK    (1<<TIF_RESTORE_SIGMASK)
-#define _TIF_FREEZE             (1<<TIF_FREEZE)
-#define _TIF_IRQ_SYNC           (1<<TIF_IRQ_SYNC)
+#define _TIF_FREEZE             (1<<TIF_FREEZE)
+#define _TIF_IRQ_SYNC           (1<<TIF_IRQ_SYNC)
+#define _TIF_NOTIFY_RESUME      (1<<TIF_NOTIFY_RESUME)
+#define _TIF_SINGLESTEP         (1<<TIF_SINGLESTEP)
 
 #define _TIF_WORK_MASK          0x0000FFFE      /* work to do on interrupt/exception return */
 
diff --git a/arch/blackfin/include/asm/time.h b/arch/blackfin/include/asm/time.h
index 589e937ed1e..9ca7db844d1 100644
--- a/arch/blackfin/include/asm/time.h
+++ b/arch/blackfin/include/asm/time.h
@@ -23,9 +23,7 @@
  */
 
 #ifndef CONFIG_CPU_FREQ
-#define TIME_SCALE 1
-#define __bfin_cycles_off (0)
-#define __bfin_cycles_mod (0)
+# define TIME_SCALE 1
 #else
 /*
  * Blackfin CPU frequency scaling supports max Core Clock 1, 1/2 and 1/4 .
@@ -33,9 +31,16 @@
  * adjust the Core Timer Presale Register. This way we don't lose time.
  */
 #define TIME_SCALE 4
+
+# ifdef CONFIG_CYCLES_CLOCKSOURCE
 extern unsigned long long __bfin_cycles_off;
 extern unsigned int __bfin_cycles_mod;
+# endif
+#endif
+
+#if defined(CONFIG_TICKSOURCE_CORETMR)
+extern void bfin_coretmr_init(void);
+extern void bfin_coretmr_clockevent_init(void);
 #endif
 
-extern void __init setup_core_timer(void);
 #endif
diff --git a/arch/blackfin/kernel/Makefile b/arch/blackfin/kernel/Makefile
index a8ddbc8ed5a..346a421f156 100644
--- a/arch/blackfin/kernel/Makefile
+++ b/arch/blackfin/kernel/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_CPLB_INFO)              += cplbinfo.o
 obj-$(CONFIG_MODULES)                += module.o
 obj-$(CONFIG_KGDB)                   += kgdb.o
 obj-$(CONFIG_KGDB_TESTS)             += kgdb_test.o
+obj-$(CONFIG_NMI_WATCHDOG)           += nmi.o
 obj-$(CONFIG_EARLY_PRINTK)           += early_printk.o
 obj-$(CONFIG_EARLY_PRINTK)           += shadow_console.o
 obj-$(CONFIG_STACKTRACE)             += stacktrace.o
diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c
index 924c00286ba..26403d1c9e6 100644
--- a/arch/blackfin/kernel/bfin_dma_5xx.c
+++ b/arch/blackfin/kernel/bfin_dma_5xx.c
@@ -91,7 +91,7 @@ late_initcall(proc_dma_init);
  */
 int request_dma(unsigned int channel, const char *device_id)
 {
-        pr_debug("request_dma() : BEGIN \n");
+        pr_debug("request_dma() : BEGIN\n");
 
         if (device_id == NULL)
                 printk(KERN_WARNING "request_dma(%u): no device_id given\n", channel);
@@ -107,7 +107,7 @@ int request_dma(unsigned int channel, const char *device_id)
 #endif
 
         if (atomic_cmpxchg(&dma_ch[channel].chan_status, 0, 1)) {
-                pr_debug("DMA CHANNEL IN USE  \n");
+                pr_debug("DMA CHANNEL IN USE\n");
                 return -EBUSY;
         }
 
@@ -131,7 +131,7 @@ int request_dma(unsigned int channel, const char *device_id)
          * you have to request DMA, before doing any operations on
          * descriptor/channel
          */
-        pr_debug("request_dma() : END  \n");
+        pr_debug("request_dma() : END\n");
         return 0;
 }
 EXPORT_SYMBOL(request_dma);
@@ -171,7 +171,7 @@ static void clear_dma_buffer(unsigned int channel)
 
 void free_dma(unsigned int channel)
 {
-        pr_debug("freedma() : BEGIN \n");
+        pr_debug("freedma() : BEGIN\n");
         BUG_ON(channel >= MAX_DMA_CHANNELS ||
                         !atomic_read(&dma_ch[channel].chan_status));
 
@@ -185,7 +185,7 @@ void free_dma(unsigned int channel)
         /* Clear the DMA Variable in the Channel */
         atomic_set(&dma_ch[channel].chan_status, 0);
 
-        pr_debug("freedma() : END \n");
+        pr_debug("freedma() : END\n");
 }
 EXPORT_SYMBOL(free_dma);
 
diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c
index a174596cc00..e35e20f00d9 100644
--- a/arch/blackfin/kernel/bfin_gpio.c
+++ b/arch/blackfin/kernel/bfin_gpio.c
@@ -1289,44 +1289,50 @@ __initcall(gpio_register_proc);
 #endif
 
 #ifdef CONFIG_GPIOLIB
-int bfin_gpiolib_direction_input(struct gpio_chip *chip, unsigned gpio)
+static int bfin_gpiolib_direction_input(struct gpio_chip *chip, unsigned gpio)
 {
         return bfin_gpio_direction_input(gpio);
 }
 
-int bfin_gpiolib_direction_output(struct gpio_chip *chip, unsigned gpio, int level)
+static int bfin_gpiolib_direction_output(struct gpio_chip *chip, unsigned gpio, int level)
 {
         return bfin_gpio_direction_output(gpio, level);
 }
 
-int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio)
+static int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio)
 {
         return bfin_gpio_get_value(gpio);
 }
 
-void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value)
+static void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value)
 {
         return bfin_gpio_set_value(gpio, value);
 }
 
-int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio)
+static int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio)
 {
         return bfin_gpio_request(gpio, chip->label);
 }
 
-void bfin_gpiolib_gpio_free(struct gpio_chip *chip, unsigned gpio)
+static void bfin_gpiolib_gpio_free(struct gpio_chip *chip, unsigned gpio)
 {
         return bfin_gpio_free(gpio);
 }
 
+static int bfin_gpiolib_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
+{
+        return gpio + GPIO_IRQ_BASE;
+}
+
 static struct gpio_chip bfin_chip = {
-        .label                  = "Blackfin-GPIOlib",
+        .label                  = "BFIN-GPIO",
         .direction_input        = bfin_gpiolib_direction_input,
         .get                    = bfin_gpiolib_get_value,
         .direction_output       = bfin_gpiolib_direction_output,
         .set                    = bfin_gpiolib_set_value,
         .request                = bfin_gpiolib_gpio_request,
         .free                   = bfin_gpiolib_gpio_free,
+        .to_irq                 = bfin_gpiolib_gpio_to_irq,
         .base                   = 0,
         .ngpio                  = MAX_BLACKFIN_GPIOS,
 };
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinit.c b/arch/blackfin/kernel/cplb-mpu/cplbinit.c
index 8d42b9e50df..30fd6417f06 100644
--- a/arch/blackfin/kernel/cplb-mpu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-mpu/cplbinit.c
@@ -64,6 +64,15 @@ void __init generate_cplb_tables_cpu(unsigned int cpu)
                 icplb_tbl[cpu][i_i++].data = i_data | (addr == 0 ? CPLB_USER_RD : 0);
         }
 
+#ifdef CONFIG_ROMKERNEL
+        /* Cover kernel XIP flash area */
+        addr = CONFIG_ROM_BASE & ~(4 * 1024 * 1024 - 1);
+        dcplb_tbl[cpu][i_d].addr = addr;
+        dcplb_tbl[cpu][i_d++].data = d_data | CPLB_USER_RD;
+        icplb_tbl[cpu][i_i].addr = addr;
+        icplb_tbl[cpu][i_i++].data = i_data | CPLB_USER_RD;
+#endif
+
         /* Cover L1 memory.  One 4M area for code and data each is enough.  */
 #if L1_DATA_A_LENGTH > 0 || L1_DATA_B_LENGTH > 0
         dcplb_tbl[cpu][i_d].addr = get_l1_data_a_start_cpu(cpu);
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
index 930c01c0681..87b25b1b30e 100644
--- a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
+++ b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
@@ -31,6 +31,12 @@ int nr_dcplb_miss[NR_CPUS], nr_icplb_miss[NR_CPUS];
 int nr_icplb_supv_miss[NR_CPUS], nr_dcplb_prot[NR_CPUS];
 int nr_cplb_flush[NR_CPUS];
 
+#ifdef CONFIG_EXCPT_IRQ_SYSC_L1
+#define MGR_ATTR __attribute__((l1_text))
+#else
+#define MGR_ATTR
+#endif
+
 /*
  * Given the contents of the status register, return the index of the
  * CPLB that caused the fault.
@@ -59,7 +65,7 @@ static int icplb_rr_index[NR_CPUS], dcplb_rr_index[NR_CPUS];
 /*
  * Find an ICPLB entry to be evicted and return its index.
  */
-static int evict_one_icplb(unsigned int cpu)
+MGR_ATTR static int evict_one_icplb(unsigned int cpu)
 {
         int i;
         for (i = first_switched_icplb; i < MAX_CPLBS; i++)
@@ -74,7 +80,7 @@ static int evict_one_icplb(unsigned int cpu)
         return i;
 }
 
-static int evict_one_dcplb(unsigned int cpu)
+MGR_ATTR static int evict_one_dcplb(unsigned int cpu)
 {
         int i;
         for (i = first_switched_dcplb; i < MAX_CPLBS; i++)
@@ -89,7 +95,7 @@ static int evict_one_dcplb(unsigned int cpu)
         return i;
 }
 
-static noinline int dcplb_miss(unsigned int cpu)
+MGR_ATTR static noinline int dcplb_miss(unsigned int cpu)
 {
         unsigned long addr = bfin_read_DCPLB_FAULT_ADDR();
         int status = bfin_read_DCPLB_STATUS();
@@ -114,10 +120,15 @@ static noinline int dcplb_miss(unsigned int cpu)
                 d_data = L2_DMEMORY;
         } else if (addr >= physical_mem_end) {
                 if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) {
-                        addr &= ~(4 * 1024 * 1024 - 1);
-                        d_data &= ~PAGE_SIZE_4KB;
-                        d_data |= PAGE_SIZE_4MB;
-                        d_data |= CPLB_USER_RD | CPLB_USER_WR;
+                        mask = current_rwx_mask[cpu];
+                        if (mask) {
+                                int page = (addr - (ASYNC_BANK0_BASE - _ramend)) >> PAGE_SHIFT;
+                                int idx = page >> 5;
+                                int bit = 1 << (page & 31);
+
+                                if (mask[idx] & bit)
+                                        d_data |= CPLB_USER_RD;
+                        }
                 } else if (addr >= BOOT_ROM_START && addr < BOOT_ROM_START + BOOT_ROM_LENGTH
                     && (status & (FAULT_RW | FAULT_USERSUPV)) == FAULT_USERSUPV) {
                         addr &= ~(1 * 1024 * 1024 - 1);
@@ -126,7 +137,9 @@ static noinline int dcplb_miss(unsigned int cpu)
                 } else
                         return CPLB_PROT_VIOL;
         } else if (addr >= _ramend) {
-            d_data |= CPLB_USER_RD | CPLB_USER_WR;
+                d_data |= CPLB_USER_RD | CPLB_USER_WR;
+                if (reserved_mem_dcache_on)
+                        d_data |= CPLB_L1_CHBL;
         } else {
                 mask = current_rwx_mask[cpu];
                 if (mask) {
@@ -156,7 +169,7 @@ static noinline int dcplb_miss(unsigned int cpu)
         return 0;
 }
 
-static noinline int icplb_miss(unsigned int cpu)
+MGR_ATTR static noinline int icplb_miss(unsigned int cpu)
 {
         unsigned long addr = bfin_read_ICPLB_FAULT_ADDR();
         int status = bfin_read_ICPLB_STATUS();
@@ -204,10 +217,19 @@ static noinline int icplb_miss(unsigned int cpu)
                 i_data = L2_IMEMORY;
         } else if (addr >= physical_mem_end) {
                 if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) {
-                        addr &= ~(4 * 1024 * 1024 - 1);
-                        i_data &= ~PAGE_SIZE_4KB;
-                        i_data |= PAGE_SIZE_4MB;
-                        i_data |= CPLB_USER_RD;
+                        if (!(status & FAULT_USERSUPV)) {
+                                unsigned long *mask = current_rwx_mask[cpu];
+
+                                if (mask) {
+                                        int page = (addr - (ASYNC_BANK0_BASE - _ramend)) >> PAGE_SHIFT;
+                                        int idx = page >> 5;
+                                        int bit = 1 << (page & 31);
+
+                                        mask += 2 * page_mask_nelts;
+                                        if (mask[idx] & bit)
+                                                i_data |= CPLB_USER_RD;
+                                }
+                        }
                 } else if (addr >= BOOT_ROM_START && addr < BOOT_ROM_START + BOOT_ROM_LENGTH
                     && (status & FAULT_USERSUPV)) {
                         addr &= ~(1 * 1024 * 1024 - 1);
@@ -217,6 +239,8 @@ static noinline int icplb_miss(unsigned int cpu)
                     return CPLB_PROT_VIOL;
         } else if (addr >= _ramend) {
                 i_data |= CPLB_USER_RD;
+                if (reserved_mem_icache_on)
+                        i_data |= CPLB_L1_CHBL;
         } else {
                 /*
                  * Two cases to distinguish - a supervisor access must
@@ -251,7 +275,7 @@ static noinline int icplb_miss(unsigned int cpu)
         return 0;
 }
 
-static noinline int dcplb_protection_fault(unsigned int cpu)
+MGR_ATTR static noinline int dcplb_protection_fault(unsigned int cpu)
 {
         int status = bfin_read_DCPLB_STATUS();
 
@@ -271,7 +295,7 @@ static noinline int dcplb_protection_fault(unsigned int cpu)
         return CPLB_PROT_VIOL;
 }
 
-int cplb_hdr(int seqstat, struct pt_regs *regs)
+MGR_ATTR int cplb_hdr(int seqstat, struct pt_regs *regs)
 {
         int cause = seqstat & 0x3f;
         unsigned int cpu = raw_smp_processor_id();
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
index 282a7919821..bfe75af4e8b 100644
--- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
@@ -56,6 +56,15 @@ void __init generate_cplb_tables_cpu(unsigned int cpu)
                 i_tbl[i_i++].data = SDRAM_IGENERIC | PAGE_SIZE_4MB;
         }
 
+#ifdef CONFIG_ROMKERNEL
+        /* Cover kernel XIP flash area */
+        addr = CONFIG_ROM_BASE & ~(4 * 1024 * 1024 - 1);
+        d_tbl[i_d].addr = addr;
+        d_tbl[i_d++].data = SDRAM_DGENERIC | PAGE_SIZE_4MB;
+        i_tbl[i_i].addr = addr;
+        i_tbl[i_i++].data = SDRAM_IGENERIC | PAGE_SIZE_4MB;
+#endif
+
         /* Cover L1 memory.  One 4M area for code and data each is enough.  */
         if (cpu == 0) {
                 if (L1_DATA_A_LENGTH || L1_DATA_B_LENGTH) {
diff --git a/arch/blackfin/kernel/dma-mapping.c b/arch/blackfin/kernel/dma-mapping.c
index e937f323d82..04ddcfeb798 100644
--- a/arch/blackfin/kernel/dma-mapping.c
+++ b/arch/blackfin/kernel/dma-mapping.c
@@ -116,7 +116,7 @@ EXPORT_SYMBOL(dma_free_coherent);
 void __dma_sync(dma_addr_t addr, size_t size,
                 enum dma_data_direction dir)
 {
-        _dma_sync(addr, size, dir);
+        __dma_sync_inline(addr, size, dir);
 }
 EXPORT_SYMBOL(__dma_sync);
 
diff --git a/arch/blackfin/kernel/entry.S b/arch/blackfin/kernel/entry.S
index f27dc2292e1..686478f5f66 100644
--- a/arch/blackfin/kernel/entry.S
+++ b/arch/blackfin/kernel/entry.S
@@ -44,7 +44,7 @@ ENTRY(_ret_from_fork)
         sti r4;
 #endif /* CONFIG_IPIPE */
         SP += -12;
-        call _schedule_tail;
+        pseudo_long_call _schedule_tail, p5;
         SP += 12;
         r0 = [sp + PT_IPEND];
         cc = bittst(r0,1);
@@ -79,7 +79,7 @@ ENTRY(_sys_vfork)
         r0 += 24;
         [--sp] = rets;
         SP += -12;
-        call _bfin_vfork;
+        pseudo_long_call _bfin_vfork, p2;
         SP += 12;
         rets = [sp++];
         rts;
@@ -90,7 +90,7 @@ ENTRY(_sys_clone)
         r0 += 24;
         [--sp] = rets;
         SP += -12;
-        call _bfin_clone;
+        pseudo_long_call _bfin_clone, p2;
         SP += 12;
         rets = [sp++];
         rts;
@@ -101,7 +101,7 @@ ENTRY(_sys_rt_sigreturn)
         r0 += 24;
         [--sp] = rets;
         SP += -12;
-        call _do_rt_sigreturn;
+        pseudo_long_call _do_rt_sigreturn, p2;
         SP += 12;
         rets = [sp++];
         rts;
diff --git a/arch/blackfin/kernel/ftrace-entry.S b/arch/blackfin/kernel/ftrace-entry.S
index 76dd4fbcd17..d66446b572c 100644
--- a/arch/blackfin/kernel/ftrace-entry.S
+++ b/arch/blackfin/kernel/ftrace-entry.S
@@ -1,7 +1,7 @@
 /*
  * mcount and friends -- ftrace stuff
  *
- * Copyright (C) 2009 Analog Devices Inc.
+ * Copyright (C) 2009-2010 Analog Devices Inc.
  * Licensed under the GPL-2 or later.
  */
 
@@ -21,6 +21,15 @@
  * function will be waiting there.  mmmm pie.
  */
 ENTRY(__mcount)
+#ifdef CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST
+        /* optional micro optimization: return if stopped */
+        p1.l = _function_trace_stop;
+        p1.h = _function_trace_stop;
+        r3 = [p1];
+        cc = r3 == 0;
+        if ! cc jump _ftrace_stub (bp);
+#endif
+
         /* save third function arg early so we can do testing below */
         [--sp] = r2;
 
@@ -106,9 +115,12 @@ ENTRY(_ftrace_graph_caller)
         [--sp] = r1;
         [--sp] = rets;
 
-        /* prepare_ftrace_return(unsigned long *parent, unsigned long self_addr) */
-        r0 = sp;
-        r1 = rets;
+        /* prepare_ftrace_return(parent, self_addr, frame_pointer) */
+        r0 = sp;        /* unsigned long *parent */
+        r1 = rets;      /* unsigned long self_addr */
+#ifdef CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST
+        r2 = fp;        /* unsigned long frame_pointer */
+#endif
         r0 += 16;       /* skip the 4 local regs on stack */
         r1 += -MCOUNT_INSN_SIZE;
         call _prepare_ftrace_return;
@@ -127,6 +139,9 @@ ENTRY(_return_to_handler)
         [--sp] = r1;
 
         /* get original return address */
+#ifdef CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST
+        r0 = fp;        /* Blackfin is sane, so omit this */
+#endif
         call _ftrace_return_to_handler;
         rets = r0;
 
diff --git a/arch/blackfin/kernel/ftrace.c b/arch/blackfin/kernel/ftrace.c
index f2c85ac6f2d..a61d948ea92 100644
--- a/arch/blackfin/kernel/ftrace.c
+++ b/arch/blackfin/kernel/ftrace.c
@@ -16,7 +16,8 @@
  * Hook the return address and push it in the stack of return addrs
  * in current thread info.
  */
-void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
+void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
+                           unsigned long frame_pointer)
 {
         struct ftrace_graph_ent trace;
         unsigned long return_hooker = (unsigned long)&return_to_handler;
@@ -24,7 +25,8 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
         if (unlikely(atomic_read(&current->tracing_graph_pause)))
                 return;
 
-        if (ftrace_push_return_trace(*parent, self_addr, &trace.depth, 0) == -EBUSY)
+        if (ftrace_push_return_trace(*parent, self_addr, &trace.depth,
+                                     frame_pointer) == -EBUSY)
                 return;
 
         trace.func = self_addr;
diff --git a/arch/blackfin/kernel/init_task.c b/arch/blackfin/kernel/init_task.c
index 118c5b9deda..d3970e8acd1 100644
--- a/arch/blackfin/kernel/init_task.c
+++ b/arch/blackfin/kernel/init_task.c
@@ -28,5 +28,5 @@ EXPORT_SYMBOL(init_task);
  * "init_task" linker map entry.
  */
 union thread_union init_thread_union
-    __attribute__ ((__section__(".init_task.data"))) = {
+    __init_task_data = {
 INIT_THREAD_INFO(init_task)};
diff --git a/arch/blackfin/kernel/ipipe.c b/arch/blackfin/kernel/ipipe.c
index a77307a4473..1a496cd71ba 100644
--- a/arch/blackfin/kernel/ipipe.c
+++ b/arch/blackfin/kernel/ipipe.c
@@ -27,7 +27,6 @@
 #include <linux/interrupt.h>
 #include <linux/percpu.h>
 #include <linux/bitops.h>
-#include <linux/slab.h>
 #include <linux/errno.h>
 #include <linux/kthread.h>
 #include <linux/unistd.h>
diff --git a/arch/blackfin/kernel/kgdb.c b/arch/blackfin/kernel/kgdb.c
index 34c7c3ed2c9..2c501ceb1e5 100644
--- a/arch/blackfin/kernel/kgdb.c
+++ b/arch/blackfin/kernel/kgdb.c
@@ -145,7 +145,7 @@ void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs)
 #endif
 }
 
-struct hw_breakpoint {
+static struct hw_breakpoint {
         unsigned int occupied:1;
         unsigned int skip:1;
         unsigned int enabled:1;
@@ -155,7 +155,7 @@ struct hw_breakpoint {
         unsigned int addr;
 } breakinfo[HW_WATCHPOINT_NUM];
 
-int bfin_set_hw_break(unsigned long addr, int len, enum kgdb_bptype type)
+static int bfin_set_hw_break(unsigned long addr, int len, enum kgdb_bptype type)
 {
         int breakno;
         int bfin_type;
@@ -202,7 +202,7 @@ int bfin_set_hw_break(unsigned long addr, int len, enum kgdb_bptype type)
         return -ENOSPC;
 }
 
-int bfin_remove_hw_break(unsigned long addr, int len, enum kgdb_bptype type)
+static int bfin_remove_hw_break(unsigned long addr, int len, enum kgdb_bptype type)
 {
         int breakno;
         int bfin_type;
@@ -230,7 +230,7 @@ int bfin_remove_hw_break(unsigned long addr, int len, enum kgdb_bptype type)
         return 0;
 }
 
-void bfin_remove_all_hw_break(void)
+static void bfin_remove_all_hw_break(void)
 {
         int breakno;
 
@@ -242,7 +242,7 @@ void bfin_remove_all_hw_break(void)
                 breakinfo[breakno].type = TYPE_DATA_WATCHPOINT;
 }
 
-void bfin_correct_hw_break(void)
+static void bfin_correct_hw_break(void)
 {
         int breakno;
         unsigned int wpiactl = 0;
diff --git a/arch/blackfin/kernel/nmi.c b/arch/blackfin/kernel/nmi.c
new file mode 100644
index 00000000000..0b5f72f17fd
--- /dev/null
+++ b/arch/blackfin/kernel/nmi.c
@@ -0,0 +1,299 @@
+/*
+ * Blackfin nmi_watchdog Driver
+ *
+ * Originally based on bfin_wdt.c
+ * Copyright 2010-2010 Analog Devices Inc.
+ *              Graff Yang <graf.yang@analog.com>
+ *
+ * Enter bugs at http://blackfin.uclinux.org/
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/bitops.h>
+#include <linux/hardirq.h>
+#include <linux/sysdev.h>
+#include <linux/pm.h>
+#include <linux/nmi.h>
+#include <linux/smp.h>
+#include <linux/timer.h>
+#include <asm/blackfin.h>
+#include <asm/atomic.h>
+#include <asm/cacheflush.h>
+#include <asm/bfin_watchdog.h>
+
+#define DRV_NAME "nmi-wdt"
+
+#define NMI_WDT_TIMEOUT 5          /* 5 seconds */
+#define NMI_CHECK_TIMEOUT (4 * HZ) /* 4 seconds in jiffies */
+static int nmi_wdt_cpu = 1;
+
+static unsigned int timeout = NMI_WDT_TIMEOUT;
+static int nmi_active;
+
+static unsigned short wdoga_ctl;
+static unsigned int wdoga_cnt;
+static struct corelock_slot saved_corelock;
+static atomic_t nmi_touched[NR_CPUS];
+static struct timer_list ntimer;
+
+enum {
+        COREA_ENTER_NMI = 0,
+        COREA_EXIT_NMI,
+        COREB_EXIT_NMI,
+
+        NMI_EVENT_NR,
+};
+static unsigned long nmi_event __attribute__ ((__section__(".l2.bss")));
+
+/* we are in nmi, non-atomic bit ops is safe */
+static inline void set_nmi_event(int event)
+{
+        __set_bit(event, &nmi_event);
+}
+
+static inline void wait_nmi_event(int event)
+{
+        while (!test_bit(event, &nmi_event))
+                barrier();
+        __clear_bit(event, &nmi_event);
+}
+
+static inline void send_corea_nmi(void)
+{
+        wdoga_ctl = bfin_read_WDOGA_CTL();
+        wdoga_cnt = bfin_read_WDOGA_CNT();
+
+        bfin_write_WDOGA_CTL(WDEN_DISABLE);
+        bfin_write_WDOGA_CNT(0);
+        bfin_write_WDOGA_CTL(WDEN_ENABLE | ICTL_NMI);
+}
+
+static inline void restore_corea_nmi(void)
+{
+        bfin_write_WDOGA_CTL(WDEN_DISABLE);
+        bfin_write_WDOGA_CTL(WDOG_EXPIRED | WDEN_DISABLE | ICTL_NONE);
+
+        bfin_write_WDOGA_CNT(wdoga_cnt);
+        bfin_write_WDOGA_CTL(wdoga_ctl);
+}
+
+static inline void save_corelock(void)
+{
+        saved_corelock = corelock;
+        corelock.lock = 0;
+}
+
+static inline void restore_corelock(void)
+{
+        corelock = saved_corelock;
+}
+
+
+static inline void nmi_wdt_keepalive(void)
+{
+        bfin_write_WDOGB_STAT(0);
+}
+
+static inline void nmi_wdt_stop(void)
+{
+        bfin_write_WDOGB_CTL(WDEN_DISABLE);
+}
+
+/* before calling this function, you must stop the WDT */
+static inline void nmi_wdt_clear(void)
+{
+        /* clear TRO bit, disable event generation */
+        bfin_write_WDOGB_CTL(WDOG_EXPIRED | WDEN_DISABLE | ICTL_NONE);
+}
+
+static inline void nmi_wdt_start(void)
+{
+        bfin_write_WDOGB_CTL(WDEN_ENABLE | ICTL_NMI);
+}
+
+static inline int nmi_wdt_running(void)
+{
+        return ((bfin_read_WDOGB_CTL() & WDEN_MASK) != WDEN_DISABLE);
+}
+
+static inline int nmi_wdt_set_timeout(unsigned long t)
+{
+        u32 cnt, max_t, sclk;
+        int run;
+
+        sclk = get_sclk();
+        max_t = -1 / sclk;
+        cnt = t * sclk;
+        if (t > max_t) {
+                pr_warning("NMI: timeout value is too large\n");
+                return -EINVAL;
+        }
+
+        run = nmi_wdt_running();
+        nmi_wdt_stop();
+        bfin_write_WDOGB_CNT(cnt);
+        if (run)
+                nmi_wdt_start();
+
+        timeout = t;
+
+        return 0;
+}
+
+int check_nmi_wdt_touched(void)
+{
+        unsigned int this_cpu = smp_processor_id();
+        unsigned int cpu;
+
+        cpumask_t mask = cpu_online_map;
+
+        if (!atomic_read(&nmi_touched[this_cpu]))
+                return 0;
+
+        atomic_set(&nmi_touched[this_cpu], 0);
+
+        cpu_clear(this_cpu, mask);
+        for_each_cpu_mask(cpu, mask) {
+                invalidate_dcache_range((unsigned long)(&nmi_touched[cpu]),
+                                (unsigned long)(&nmi_touched[cpu]));
+                if (!atomic_read(&nmi_touched[cpu]))
+                        return 0;
+                atomic_set(&nmi_touched[cpu], 0);
+        }
+
+        return 1;
+}
+
+static void nmi_wdt_timer(unsigned long data)
+{
+        if (check_nmi_wdt_touched())
+                nmi_wdt_keepalive();
+
+        mod_timer(&ntimer, jiffies + NMI_CHECK_TIMEOUT);
+}
+
+static int __init init_nmi_wdt(void)
+{
+        nmi_wdt_set_timeout(timeout);
+        nmi_wdt_start();
+        nmi_active = true;
+
+        init_timer(&ntimer);
+        ntimer.function = nmi_wdt_timer;
+        ntimer.expires = jiffies + NMI_CHECK_TIMEOUT;
+        add_timer(&ntimer);
+
+        pr_info("nmi_wdt: initialized: timeout=%d sec\n", timeout);
+        return 0;
+}
+device_initcall(init_nmi_wdt);
+
+void touch_nmi_watchdog(void)
+{
+        atomic_set(&nmi_touched[smp_processor_id()], 1);
+}
+
+/* Suspend/resume support */
+#ifdef CONFIG_PM
+static int nmi_wdt_suspend(struct sys_device *dev, pm_message_t state)
+{
+        nmi_wdt_stop();
+        return 0;
+}
+
+static int nmi_wdt_resume(struct sys_device *dev)
+{
+        if (nmi_active)
+                nmi_wdt_start();
+        return 0;
+}
+
+static struct sysdev_class nmi_sysclass = {
+        .name           = DRV_NAME,
+        .resume         = nmi_wdt_resume,
+        .suspend        = nmi_wdt_suspend,
+};
+
+static struct sys_device device_nmi_wdt = {
+        .id     = 0,
+        .cls    = &nmi_sysclass,
+};
+
+static int __init init_nmi_wdt_sysfs(void)
+{
+        int error;
+
+        if (!nmi_active)
+                return 0;
+
+        error = sysdev_class_register(&nmi_sysclass);
+        if (!error)
+                error = sysdev_register(&device_nmi_wdt);
+        return error;
+}
+late_initcall(init_nmi_wdt_sysfs);
+
+#endif  /* CONFIG_PM */
+
+
+asmlinkage notrace void do_nmi(struct pt_regs *fp)
+{
+        unsigned int cpu = smp_processor_id();
+        nmi_enter();
+
+        cpu_pda[cpu].__nmi_count += 1;
+
+        if (cpu == nmi_wdt_cpu) {
+                /* CoreB goes here first */
+
+                /* reload the WDOG_STAT */
+                nmi_wdt_keepalive();
+
+                /* clear nmi interrupt for CoreB */
+                nmi_wdt_stop();
+                nmi_wdt_clear();
+
+                /* trigger NMI interrupt of CoreA */
+                send_corea_nmi();
+
+                /* waiting CoreB to enter NMI */
+                wait_nmi_event(COREA_ENTER_NMI);
+
+                /* recover WDOGA's settings */
+                restore_corea_nmi();
+
+                save_corelock();
+
+                /* corelock is save/cleared, CoreA is dummping messages */
+
+                wait_nmi_event(COREA_EXIT_NMI);
+        } else {
+                /* OK, CoreA entered NMI */
+                set_nmi_event(COREA_ENTER_NMI);
+        }
+
+        pr_emerg("\nNMI Watchdog detected LOCKUP, dump for CPU %d\n", cpu);
+        dump_bfin_process(fp);
+        dump_bfin_mem(fp);
+        show_regs(fp);
+        dump_bfin_trace_buffer();
+        show_stack(current, (unsigned long *)fp);
+
+        if (cpu == nmi_wdt_cpu) {
+                pr_emerg("This fault is not recoverable, sorry!\n");
+
+                /* CoreA dump finished, restore the corelock */
+                restore_corelock();
+
+                set_nmi_event(COREB_EXIT_NMI);
+        } else {
+                /* CoreB dump finished, notice the CoreA we are done */
+                set_nmi_event(COREA_EXIT_NMI);
+
+                /* synchronize with CoreA */
+                wait_nmi_event(COREB_EXIT_NMI);
+        }
+
+        nmi_exit();
+}
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index b56b0e485e0..93ec07da2e5 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -11,6 +11,7 @@
 #include <linux/unistd.h>
 #include <linux/user.h>
 #include <linux/uaccess.h>
+#include <linux/slab.h>
 #include <linux/sched.h>
 #include <linux/tick.h>
 #include <linux/fs.h>
@@ -98,13 +99,6 @@ void cpu_idle(void)
         }
 }
 
-/* Fill in the fpu structure for a core dump.  */
-
-int dump_fpu(struct pt_regs *regs, elf_fpregset_t * fpregs)
-{
-        return 1;
-}
-
 /*
  * This gets run with P1 containing the
  * function to call, and R1 containing
diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c
index 65567dc4b9f..43eb969405d 100644
--- a/arch/blackfin/kernel/ptrace.c
+++ b/arch/blackfin/kernel/ptrace.c
@@ -1,6 +1,6 @@
 /*
  * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
- * these modifications are Copyright 2004-2009 Analog Devices Inc.
+ * these modifications are Copyright 2004-2010 Analog Devices Inc.
  *
  * Licensed under the GPL-2
  */
@@ -9,10 +9,13 @@
 #include <linux/sched.h>
 #include <linux/mm.h>
 #include <linux/smp.h>
+#include <linux/elf.h>
 #include <linux/errno.h>
 #include <linux/ptrace.h>
 #include <linux/user.h>
+#include <linux/regset.h>
 #include <linux/signal.h>
+#include <linux/tracehook.h>
 #include <linux/uaccess.h>
 
 #include <asm/page.h>
@@ -25,90 +28,57 @@
 #include <asm/cacheflush.h>
 #include <asm/mem_map.h>
 
-#define TEXT_OFFSET 0
 /*
  * does not yet catch signals sent when the child dies.
  * in exit.c or in signal.c.
  */
 
-/* determines which bits in the SYSCFG reg the user has access to. */
-/* 1 = access 0 = no access */
-#define SYSCFG_MASK 0x0007      /* SYSCFG reg */
-/* sets the trace bits. */
-#define TRACE_BITS 0x0001
-
-/* Find the stack offset for a register, relative to thread.esp0. */
-#define PT_REG(reg)     ((long)&((struct pt_regs *)0)->reg)
-
-/*
- * Get the address of the live pt_regs for the specified task.
- * These are saved onto the top kernel stack when the process
- * is not running.
- *
- * Note: if a user thread is execve'd from kernel space, the
- * kernel stack will not be empty on entry to the kernel, so
- * ptracing these tasks will fail.
- */
-static inline struct pt_regs *get_user_regs(struct task_struct *task)
-{
-        return (struct pt_regs *)
-            ((unsigned long)task_stack_page(task) +
-             (THREAD_SIZE - sizeof(struct pt_regs)));
-}
-
-/*
- * Get all user integer registers.
- */
-static inline int ptrace_getregs(struct task_struct *tsk, void __user *uregs)
-{
-        struct pt_regs regs;
-        memcpy(&regs, get_user_regs(tsk), sizeof(regs));
-        regs.usp = tsk->thread.usp;
-        return copy_to_user(uregs, &regs, sizeof(struct pt_regs)) ? -EFAULT : 0;
-}
-
-/* Mapping from PT_xxx to the stack offset at which the register is
- * saved.  Notice that usp has no stack-slot and needs to be treated
- * specially (see get_reg/put_reg below).
- */
-
 /*
  * Get contents of register REGNO in task TASK.
  */
-static inline long get_reg(struct task_struct *task, int regno)
+static inline long
+get_reg(struct task_struct *task, long regno, unsigned long __user *datap)
 {
-        unsigned char *reg_ptr;
+        long tmp;
+        struct pt_regs *regs = task_pt_regs(task);
 
-        struct pt_regs *regs =
-            (struct pt_regs *)((unsigned long)task_stack_page(task) +
-                               (THREAD_SIZE - sizeof(struct pt_regs)));
-        reg_ptr = (char *)regs;
+        if (regno & 3 || regno > PT_LAST_PSEUDO || regno < 0)
+                return -EIO;
 
         switch (regno) {
+        case PT_TEXT_ADDR:
+                tmp = task->mm->start_code;
+                break;
+        case PT_TEXT_END_ADDR:
+                tmp = task->mm->end_code;
+                break;
+        case PT_DATA_ADDR:
+                tmp = task->mm->start_data;
+                break;
         case PT_USP:
-                return task->thread.usp;
+                tmp = task->thread.usp;
+                break;
         default:
-                if (regno <= 216)
-                        return *(long *)(reg_ptr + regno);
+                if (regno < sizeof(*regs)) {
+                        void *reg_ptr = regs;
+                        tmp = *(long *)(reg_ptr + regno);
+                } else
+                        return -EIO;
         }
-        /* slight mystery ... never seems to come here but kernel misbehaves without this code! */
 
-        printk(KERN_WARNING "Request to get for unknown register %d\n", regno);
-        return 0;
+        return put_user(tmp, datap);
 }
 
 /*
  * Write contents of register REGNO in task TASK.
  */
 static inline int
-put_reg(struct task_struct *task, int regno, unsigned long data)
+put_reg(struct task_struct *task, long regno, unsigned long data)
 {
-        char *reg_ptr;
+        struct pt_regs *regs = task_pt_regs(task);
 
-        struct pt_regs *regs =
-            (struct pt_regs *)((unsigned long)task_stack_page(task) +
-                               (THREAD_SIZE - sizeof(struct pt_regs)));
-        reg_ptr = (char *)regs;
+        if (regno & 3 || regno > PT_LAST_PSEUDO || regno < 0)
+                return -EIO;
 
         switch (regno) {
         case PT_PC:
@@ -125,10 +95,18 @@ put_reg(struct task_struct *task, int regno, unsigned long data)
                 regs->usp = data;
                 task->thread.usp = data;
                 break;
+        case PT_SYSCFG: /* don't let userspace screw with this */
+                if ((data & ~1) != 0x6)
+                        pr_warning("ptrace: ignore syscfg write of %#lx\n", data);
+                break;          /* regs->syscfg = data; break; */
         default:
-                if (regno <= 216)
-                        *(long *)(reg_ptr + regno) = data;
+                if (regno < sizeof(*regs)) {
+                        void *reg_offset = regs;
+                        *(long *)(reg_offset + regno) = data;
+                }
+                /* Ignore writes to pseudo registers */
         }
+
         return 0;
 }
 
@@ -160,24 +138,98 @@ static inline int is_user_addr_valid(struct task_struct *child,
         return -EIO;
 }
 
-void ptrace_enable(struct task_struct *child)
+/*
+ * retrieve the contents of Blackfin userspace general registers
+ */
+static int genregs_get(struct task_struct *target,
+                       const struct user_regset *regset,
+                       unsigned int pos, unsigned int count,
+                       void *kbuf, void __user *ubuf)
 {
-        unsigned long tmp;
-        tmp = get_reg(child, PT_SYSCFG) | (TRACE_BITS);
-        put_reg(child, PT_SYSCFG, tmp);
+        struct pt_regs *regs = task_pt_regs(target);
+        int ret;
+
+        /* This sucks ... */
+        regs->usp = target->thread.usp;
+
+        ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+                                  regs, 0, sizeof(*regs));
+        if (ret < 0)
+                return ret;
+
+        return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
+                                        sizeof(*regs), -1);
 }
 
 /*
- * Called by kernel/ptrace.c when detaching..
- *
- * Make sure the single step bit is not set.
+ * update the contents of the Blackfin userspace general registers
+ */
+static int genregs_set(struct task_struct *target,
+                       const struct user_regset *regset,
+                       unsigned int pos, unsigned int count,
+                       const void *kbuf, const void __user *ubuf)
+{
+        struct pt_regs *regs = task_pt_regs(target);
+        int ret;
+
+        /* Don't let people set SYSCFG (it's at the end of pt_regs) */
+        ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+                                 regs, 0, PT_SYSCFG);
+        if (ret < 0)
+                return ret;
+
+        /* This sucks ... */
+        target->thread.usp = regs->usp;
+        /* regs->retx = regs->pc; */
+
+        return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
+                                        PT_SYSCFG, -1);
+}
+
+/*
+ * Define the register sets available on the Blackfin under Linux
  */
-void ptrace_disable(struct task_struct *child)
+enum bfin_regset {
+        REGSET_GENERAL,
+};
+
+static const struct user_regset bfin_regsets[] = {
+        [REGSET_GENERAL] = {
+                .core_note_type = NT_PRSTATUS,
+                .n              = sizeof(struct pt_regs) / sizeof(long),
+                .size           = sizeof(long),
+                .align          = sizeof(long),
+                .get            = genregs_get,
+                .set            = genregs_set,
+        },
+};
+
+static const struct user_regset_view user_bfin_native_view = {
+        .name      = "Blackfin",
+        .e_machine = EM_BLACKFIN,
+        .regsets   = bfin_regsets,
+        .n         = ARRAY_SIZE(bfin_regsets),
+};
+
+const struct user_regset_view *task_user_regset_view(struct task_struct *task)
+{
+        return &user_bfin_native_view;
+}
+
+void user_enable_single_step(struct task_struct *child)
+{
+        struct pt_regs *regs = task_pt_regs(child);
+        regs->syscfg |= SYSCFG_SSSTEP;
+
+        set_tsk_thread_flag(child, TIF_SINGLESTEP);
+}
+
+void user_disable_single_step(struct task_struct *child)
 {
-        unsigned long tmp;
-        /* make sure the single step bit is not set. */
-        tmp = get_reg(child, PT_SYSCFG) & ~TRACE_BITS;
-        put_reg(child, PT_SYSCFG, tmp);
+        struct pt_regs *regs = task_pt_regs(child);
+        regs->syscfg &= ~SYSCFG_SSSTEP;
+
+        clear_tsk_thread_flag(child, TIF_SINGLESTEP);
 }
 
 long arch_ptrace(struct task_struct *child, long request, long addr, long data)
@@ -240,40 +292,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                         break;
                 }
 
-                /* read the word at location addr in the USER area. */
-        case PTRACE_PEEKUSR:
-                {
-                        unsigned long tmp;
-                        ret = -EIO;
-                        tmp = 0;
-                        if ((addr & 3) || (addr > (sizeof(struct pt_regs) + 16))) {
-                                printk(KERN_WARNING "ptrace error : PEEKUSR : temporarily returning "
-                                                    "0 - %x sizeof(pt_regs) is %lx\n",
-                                     (int)addr, sizeof(struct pt_regs));
-                                break;
-                        }
-                        if (addr == sizeof(struct pt_regs)) {
-                                /* PT_TEXT_ADDR */
-                                tmp = child->mm->start_code + TEXT_OFFSET;
-                        } else if (addr == (sizeof(struct pt_regs) + 4)) {
-                                /* PT_TEXT_END_ADDR */
-                                tmp = child->mm->end_code;
-                        } else if (addr == (sizeof(struct pt_regs) + 8)) {
-                                /* PT_DATA_ADDR */
-                                tmp = child->mm->start_data;
-#ifdef CONFIG_BINFMT_ELF_FDPIC
-                        } else if (addr == (sizeof(struct pt_regs) + 12)) {
-                                goto case_PTRACE_GETFDPIC_EXEC;
-                        } else if (addr == (sizeof(struct pt_regs) + 16)) {
-                                goto case_PTRACE_GETFDPIC_INTERP;
-#endif
-                        } else {
-                                tmp = get_reg(child, addr);
-                        }
-                        ret = put_user(tmp, datap);
-                        break;
-                }
-
 #ifdef CONFIG_BINFMT_ELF_FDPIC
         case PTRACE_GETFDPIC: {
                 unsigned long tmp = 0;
@@ -336,78 +354,36 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                         break;
                 }
 
-        case PTRACE_POKEUSR:    /* write the word at location addr in the USER area */
-                ret = -EIO;
-                if ((addr & 3) || (addr > (sizeof(struct pt_regs) + 16))) {
-                        printk(KERN_WARNING "ptrace error : POKEUSR: temporarily returning 0\n");
-                        break;
-                }
-
-                if (addr >= (sizeof(struct pt_regs))) {
-                        ret = 0;
-                        break;
-                }
-                if (addr == PT_SYSCFG) {
-                        data &= SYSCFG_MASK;
-                        data |= get_reg(child, PT_SYSCFG);
+        case PTRACE_PEEKUSR:
+                switch (addr) {
+#ifdef CONFIG_BINFMT_ELF_FDPIC  /* backwards compat */
+                case PT_FDPIC_EXEC:   goto case_PTRACE_GETFDPIC_EXEC;
+                case PT_FDPIC_INTERP: goto case_PTRACE_GETFDPIC_INTERP;
+#endif
+                default:
+                        ret = get_reg(child, addr, datap);
                 }
-                ret = put_reg(child, addr, data);
+                pr_debug("ptrace: PEEKUSR reg %li with %#lx = %i\n", addr, data, ret);
                 break;
 
-        case PTRACE_SYSCALL:    /* continue and stop at next (return from) syscall */
-        case PTRACE_CONT:       /* restart after signal. */
-                pr_debug("ptrace: syscall/cont\n");
-
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                if (request == PTRACE_SYSCALL)
-                        set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                else
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                child->exit_code = data;
-                ptrace_disable(child);
-                pr_debug("ptrace: before wake_up_process\n");
-                wake_up_process(child);
-                ret = 0;
-                break;
-
-        /*
-         * make the child exit.  Best I can do is send it a sigkill.
-         * perhaps it should be put in the status that it wants to
-         * exit.
-         */
-        case PTRACE_KILL:
-                ret = 0;
-                if (child->exit_state == EXIT_ZOMBIE)   /* already dead */
-                        break;
-                child->exit_code = SIGKILL;
-                ptrace_disable(child);
-                wake_up_process(child);
-                break;
-
-        case PTRACE_SINGLESTEP: /* set the trap flag. */
-                pr_debug("ptrace: single step\n");
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                ptrace_enable(child);
-                child->exit_code = data;
-                wake_up_process(child);
-                ret = 0;
+        case PTRACE_POKEUSR:
+                ret = put_reg(child, addr, data);
+                pr_debug("ptrace: POKEUSR reg %li with %li = %i\n", addr, data, ret);
                 break;
 
         case PTRACE_GETREGS:
-                /* Get all gp regs from the child. */
-                ret = ptrace_getregs(child, datap);
-                break;
+                pr_debug("ptrace: PTRACE_GETREGS\n");
+                return copy_regset_to_user(child, &user_bfin_native_view,
+                                           REGSET_GENERAL,
+                                           0, sizeof(struct pt_regs),
+                                           (void __user *)data);
 
         case PTRACE_SETREGS:
-                printk(KERN_WARNING "ptrace: SETREGS: **** NOT IMPLEMENTED ***\n");
-                /* Set all gp regs in the child. */
-                ret = 0;
-                break;
+                pr_debug("ptrace: PTRACE_SETREGS\n");
+                return copy_regset_from_user(child, &user_bfin_native_view,
+                                             REGSET_GENERAL,
+                                             0, sizeof(struct pt_regs),
+                                             (const void __user *)data);
 
         default:
                 ret = ptrace_request(child, request, addr, data);
@@ -417,27 +393,21 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
         return ret;
 }
 
-asmlinkage void syscall_trace(void)
+asmlinkage int syscall_trace_enter(struct pt_regs *regs)
 {
-        if (!test_thread_flag(TIF_SYSCALL_TRACE))
-                return;
-
-        if (!(current->ptrace & PT_PTRACED))
-                return;
-
-        /* the 0x80 provides a way for the tracing parent to distinguish
-         * between a syscall stop and SIGTRAP delivery
-         */
-        ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
-                                 ? 0x80 : 0));
-
-        /*
-         * this isn't the same as continuing with a signal, but it will do
-         * for normal use.  strace only continues with a signal if the
-         * stopping signal is not SIGTRAP.  -brl
-         */
-        if (current->exit_code) {
-                send_sig(current->exit_code, current, 1);
-                current->exit_code = 0;
-        }
+        int ret = 0;
+
+        if (test_thread_flag(TIF_SYSCALL_TRACE))
+                ret = tracehook_report_syscall_entry(regs);
+
+        return ret;
+}
+
+asmlinkage void syscall_trace_leave(struct pt_regs *regs)
+{
+        int step;
+
+        step = test_thread_flag(TIF_SINGLESTEP);
+        if (step || test_thread_flag(TIF_SYSCALL_TRACE))
+                tracehook_report_syscall_exit(regs, step);
 }
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index 95448ae9c43..8e2efceb364 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -220,6 +220,16 @@ void __init bfin_relocate_l1_mem(void)
                 memcpy(_stext_l2, _l2_lma, l2_len);
 }
 
+#ifdef CONFIG_ROMKERNEL
+void __init bfin_relocate_xip_data(void)
+{
+        early_shadow_stamp();
+
+        memcpy(_sdata, _data_lma, (unsigned long)_data_len - THREAD_SIZE + sizeof(struct thread_info));
+        memcpy(_sinitdata, _init_data_lma, (unsigned long)_init_data_len);
+}
+#endif
+
 /* add_memory_region to memmap */
 static void __init add_memory_region(unsigned long long start,
                               unsigned long long size, int type)
@@ -504,7 +514,7 @@ static __init void memory_setup(void)
 #endif
         unsigned long max_mem;
 
-        _rambase = (unsigned long)_stext;
+        _rambase = CONFIG_BOOT_LOAD;
         _ramstart = (unsigned long)_end;
 
         if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) {
@@ -597,7 +607,12 @@ static __init void memory_setup(void)
         }
 
 #ifdef CONFIG_MPU
+#if defined(CONFIG_ROMFS_ON_MTD) && defined(CONFIG_MTD_ROM)
+        page_mask_nelts = (((_ramend + ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE -
+                                        ASYNC_BANK0_BASE) >> PAGE_SHIFT) + 31) / 32;
+#else
         page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32;
+#endif
         page_mask_order = get_order(3 * page_mask_nelts * sizeof(long));
 #endif
 
@@ -630,7 +645,7 @@ static __init void memory_setup(void)
                 __bss_start, __bss_stop,
                 _sdata, _edata,
                 (void *)&init_thread_union,
-                (void *)((int)(&init_thread_union) + 0x2000),
+                (void *)((int)(&init_thread_union) + THREAD_SIZE),
                 __init_begin, __init_end,
                 (void *)_ramstart, (void *)memory_end
 #ifdef CONFIG_MTD_UCLINUX
@@ -792,10 +807,17 @@ static inline int __init get_mem_size(void)
         BUG();
 }
 
+__attribute__((weak))
+void __init native_machine_early_platform_add_devices(void)
+{
+}
+
 void __init setup_arch(char **cmdline_p)
 {
         unsigned long sclk, cclk;
 
+        native_machine_early_platform_add_devices();
+
         enable_shadow_console();
 
         /* Check to make sure we are running on the right processor */
@@ -1217,10 +1239,10 @@ static int show_cpuinfo(struct seq_file *m, void *v)
                    dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
                    BFIN_DLINES);
 #ifdef __ARCH_SYNC_CORE_DCACHE
-        seq_printf(m, "SMP Dcache Flushes\t: %lu\n\n", cpudata->dcache_invld_count);
+        seq_printf(m, "SMP Dcache Flushes\t: %lu\n\n", dcache_invld_count[cpu_num]);
 #endif
 #ifdef __ARCH_SYNC_CORE_ICACHE
-        seq_printf(m, "SMP Icache Flushes\t: %lu\n\n", cpudata->icache_invld_count);
+        seq_printf(m, "SMP Icache Flushes\t: %lu\n\n", icache_invld_count[cpu_num]);
 #endif
 
         if (cpu_num != num_possible_cpus() - 1)
@@ -1249,8 +1271,8 @@ static int show_cpuinfo(struct seq_file *m, void *v)
         seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
                  physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
         seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
-                ((int)memory_end - (int)_stext) >> 10,
-                _stext,
+                ((int)memory_end - (int)_rambase) >> 10,
+                (void *)_rambase,
                 (void *)memory_end);
         seq_printf(m, "\n");
 
diff --git a/arch/blackfin/kernel/signal.c b/arch/blackfin/kernel/signal.c
index e0fd63e9e38..d536f35d1f4 100644
--- a/arch/blackfin/kernel/signal.c
+++ b/arch/blackfin/kernel/signal.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2004-2009 Analog Devices Inc.
+ * Copyright 2004-2010 Analog Devices Inc.
  *
  * Licensed under the GPL-2 or later
  */
@@ -17,6 +17,7 @@
 #include <asm/cacheflush.h>
 #include <asm/ucontext.h>
 #include <asm/fixed_code.h>
+#include <asm/syscall.h>
 
 #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
 
@@ -50,6 +51,9 @@ rt_restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc, int *p
         unsigned long usp = 0;
         int err = 0;
 
+        /* Always make any pending restarted system calls return -EINTR */
+        current_thread_info()->restart_block.fn = do_no_restart_syscall;
+
 #define RESTORE(x) err |= __get_user(regs->x, &sc->sc_##x)
 
         /* restore passed registers */
@@ -206,16 +210,6 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t * info,
         regs->r1 = (unsigned long)(&frame->info);
         regs->r2 = (unsigned long)(&frame->uc);
 
-        /*
-         * Clear the trace flag when entering the signal handler, but
-         * notify any tracer that was single-stepping it. The tracer
-         * may want to single-step inside the handler too.
-         */
-        if (regs->syscfg & TRACE_BITS) {
-                regs->syscfg &= ~TRACE_BITS;
-                ptrace_notify(SIGTRAP);
-        }
-
         return 0;
 
  give_sigsegv:
@@ -247,6 +241,11 @@ handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
                 regs->r0 = regs->orig_r0;
                 regs->pc -= 2;
                 break;
+
+        case -ERESTART_RESTARTBLOCK:
+                regs->p0 = __NR_restart_syscall;
+                regs->pc -= 2;
+                break;
         }
 }
 
@@ -315,6 +314,9 @@ asmlinkage void do_signal(struct pt_regs *regs)
                          * clear the TIF_RESTORE_SIGMASK flag */
                         if (test_thread_flag(TIF_RESTORE_SIGMASK))
                                 clear_thread_flag(TIF_RESTORE_SIGMASK);
+
+                        tracehook_signal_handler(signr, &info, &ka, regs,
+                                test_thread_flag(TIF_SINGLESTEP));
                 }
 
                 return;
diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c
index 17c38c5b5b2..cb7a01d4f00 100644
--- a/arch/blackfin/kernel/time-ts.c
+++ b/arch/blackfin/kernel/time-ts.c
@@ -21,6 +21,7 @@
 #include <asm/blackfin.h>
 #include <asm/time.h>
 #include <asm/gptimers.h>
+#include <asm/nmi.h>
 
 /* Accelerators for sched_clock()
  * convert from cycles(64bits) => nanoseconds (64bits)
@@ -50,7 +51,11 @@
 
 static notrace cycle_t bfin_read_cycles(struct clocksource *cs)
 {
+#ifdef CONFIG_CPU_FREQ
         return __bfin_cycles_off + (get_cycles() << __bfin_cycles_mod);
+#else
+        return get_cycles();
+#endif
 }
 
 static struct clocksource bfin_cs_cycles = {
@@ -132,7 +137,6 @@ static int __init bfin_cs_gptimer0_init(void)
 # define bfin_cs_gptimer0_init()
 #endif
 
-
 #if defined(CONFIG_GPTMR0_CLOCKSOURCE) || defined(CONFIG_CYCLES_CLOCKSOURCE)
 /* prefer to use cycles since it has higher rating */
 notrace unsigned long long sched_clock(void)
@@ -145,47 +149,8 @@ notrace unsigned long long sched_clock(void)
 }
 #endif
 
-#ifdef CONFIG_CORE_TIMER_IRQ_L1
-__attribute__((l1_text))
-#endif
-irqreturn_t timer_interrupt(int irq, void *dev_id);
-
-static int bfin_timer_set_next_event(unsigned long, \
-                struct clock_event_device *);
-
-static void bfin_timer_set_mode(enum clock_event_mode, \
-                struct clock_event_device *);
-
-static struct clock_event_device clockevent_bfin = {
-#if defined(CONFIG_TICKSOURCE_GPTMR0)
-        .name           = "bfin_gptimer0",
-        .rating         = 300,
-        .irq            = IRQ_TIMER0,
-#else
-        .name           = "bfin_core_timer",
-        .rating         = 350,
-        .irq            = IRQ_CORETMR,
-#endif
-        .shift          = 32,
-        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-        .set_next_event = bfin_timer_set_next_event,
-        .set_mode       = bfin_timer_set_mode,
-};
-
-static struct irqaction bfin_timer_irq = {
-#if defined(CONFIG_TICKSOURCE_GPTMR0)
-        .name           = "Blackfin GPTimer0",
-#else
-        .name           = "Blackfin CoreTimer",
-#endif
-        .flags          = IRQF_DISABLED | IRQF_TIMER | \
-                          IRQF_IRQPOLL | IRQF_PERCPU,
-        .handler        = timer_interrupt,
-        .dev_id         = &clockevent_bfin,
-};
-
 #if defined(CONFIG_TICKSOURCE_GPTMR0)
-static int bfin_timer_set_next_event(unsigned long cycles,
+static int bfin_gptmr0_set_next_event(unsigned long cycles,
                                      struct clock_event_device *evt)
 {
         disable_gptimers(TIMER0bit);
@@ -196,7 +161,7 @@ static int bfin_timer_set_next_event(unsigned long cycles,
         return 0;
 }
 
-static void bfin_timer_set_mode(enum clock_event_mode mode,
+static void bfin_gptmr0_set_mode(enum clock_event_mode mode,
                                 struct clock_event_device *evt)
 {
         switch (mode) {
@@ -224,25 +189,65 @@ static void bfin_timer_set_mode(enum clock_event_mode mode,
         }
 }
 
-static void bfin_timer_ack(void)
+static void bfin_gptmr0_ack(void)
 {
         set_gptimer_status(TIMER_GROUP1, TIMER_STATUS_TIMIL0);
 }
 
-static void __init bfin_timer_init(void)
+static void __init bfin_gptmr0_init(void)
 {
         disable_gptimers(TIMER0bit);
 }
 
-static unsigned long  __init bfin_clockevent_check(void)
+#ifdef CONFIG_CORE_TIMER_IRQ_L1
+__attribute__((l1_text))
+#endif
+irqreturn_t bfin_gptmr0_interrupt(int irq, void *dev_id)
 {
-        setup_irq(IRQ_TIMER0, &bfin_timer_irq);
-        return get_sclk();
+        struct clock_event_device *evt = dev_id;
+        smp_mb();
+        evt->event_handler(evt);
+        bfin_gptmr0_ack();
+        return IRQ_HANDLED;
 }
 
-#else /* CONFIG_TICKSOURCE_CORETMR */
+static struct irqaction gptmr0_irq = {
+        .name           = "Blackfin GPTimer0",
+        .flags          = IRQF_DISABLED | IRQF_TIMER | \
+                          IRQF_IRQPOLL | IRQF_PERCPU,
+        .handler        = bfin_gptmr0_interrupt,
+};
 
-static int bfin_timer_set_next_event(unsigned long cycles,
+static struct clock_event_device clockevent_gptmr0 = {
+        .name           = "bfin_gptimer0",
+        .rating         = 300,
+        .irq            = IRQ_TIMER0,
+        .shift          = 32,
+        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
+        .set_next_event = bfin_gptmr0_set_next_event,
+        .set_mode       = bfin_gptmr0_set_mode,
+};
+
+static void __init bfin_gptmr0_clockevent_init(struct clock_event_device *evt)
+{
+        unsigned long clock_tick;
+
+        clock_tick = get_sclk();
+        evt->mult = div_sc(clock_tick, NSEC_PER_SEC, evt->shift);
+        evt->max_delta_ns = clockevent_delta2ns(-1, evt);
+        evt->min_delta_ns = clockevent_delta2ns(100, evt);
+
+        evt->cpumask = cpumask_of(0);
+
+        clockevents_register_device(evt);
+}
+#endif /* CONFIG_TICKSOURCE_GPTMR0 */
+
+#if defined(CONFIG_TICKSOURCE_CORETMR)
+/* per-cpu local core timer */
+static DEFINE_PER_CPU(struct clock_event_device, coretmr_events);
+
+static int bfin_coretmr_set_next_event(unsigned long cycles,
                                 struct clock_event_device *evt)
 {
         bfin_write_TCNTL(TMPWR);
@@ -253,7 +258,7 @@ static int bfin_timer_set_next_event(unsigned long cycles,
         return 0;
 }
 
-static void bfin_timer_set_mode(enum clock_event_mode mode,
+static void bfin_coretmr_set_mode(enum clock_event_mode mode,
                                 struct clock_event_device *evt)
 {
         switch (mode) {
@@ -285,19 +290,13 @@ static void bfin_timer_set_mode(enum clock_event_mode mode,
         }
 }
 
-static void bfin_timer_ack(void)
-{
-}
-
-static void __init bfin_timer_init(void)
+void bfin_coretmr_init(void)
 {
         /* power up the timer, but don't enable it just yet */
         bfin_write_TCNTL(TMPWR);
         CSYNC();
 
-        /*
-         * the TSCALE prescaler counter.
-         */
+        /* the TSCALE prescaler counter. */
         bfin_write_TSCALE(TIME_SCALE - 1);
         bfin_write_TPERIOD(0);
         bfin_write_TCOUNT(0);
@@ -305,48 +304,54 @@ static void __init bfin_timer_init(void)
         CSYNC();
 }
 
-static unsigned long  __init bfin_clockevent_check(void)
-{
-        setup_irq(IRQ_CORETMR, &bfin_timer_irq);
-        return get_cclk() / TIME_SCALE;
-}
-
-void __init setup_core_timer(void)
+#ifdef CONFIG_CORE_TIMER_IRQ_L1
+__attribute__((l1_text))
+#endif
+irqreturn_t bfin_coretmr_interrupt(int irq, void *dev_id)
 {
-        bfin_timer_init();
-        bfin_timer_set_mode(CLOCK_EVT_MODE_PERIODIC, NULL);
-}
-#endif /* CONFIG_TICKSOURCE_GPTMR0 */
+        int cpu = smp_processor_id();
+        struct clock_event_device *evt = &per_cpu(coretmr_events, cpu);
 
-/*
- * timer_interrupt() needs to keep up the real-time clock,
- * as well as call the "do_timer()" routine every clocktick
- */
-irqreturn_t timer_interrupt(int irq, void *dev_id)
-{
-        struct clock_event_device *evt = dev_id;
         smp_mb();
         evt->event_handler(evt);
-        bfin_timer_ack();
-        return IRQ_HANDLED;
-}
-
-static int __init bfin_clockevent_init(void)
-{
-        unsigned long timer_clk;
 
-        timer_clk = bfin_clockevent_check();
+        touch_nmi_watchdog();
 
-        bfin_timer_init();
+        return IRQ_HANDLED;
+}
 
-        clockevent_bfin.mult = div_sc(timer_clk, NSEC_PER_SEC, clockevent_bfin.shift);
-        clockevent_bfin.max_delta_ns = clockevent_delta2ns(-1, &clockevent_bfin);
-        clockevent_bfin.min_delta_ns = clockevent_delta2ns(100, &clockevent_bfin);
-        clockevent_bfin.cpumask = cpumask_of(0);
-        clockevents_register_device(&clockevent_bfin);
+static struct irqaction coretmr_irq = {
+        .name           = "Blackfin CoreTimer",
+        .flags          = IRQF_DISABLED | IRQF_TIMER | \
+                          IRQF_IRQPOLL | IRQF_PERCPU,
+        .handler        = bfin_coretmr_interrupt,
+};
 
-        return 0;
+void bfin_coretmr_clockevent_init(void)
+{
+        unsigned long clock_tick;
+        unsigned int cpu = smp_processor_id();
+        struct clock_event_device *evt = &per_cpu(coretmr_events, cpu);
+
+        evt->name = "bfin_core_timer";
+        evt->rating = 350;
+        evt->irq = -1;
+        evt->shift = 32;
+        evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
+        evt->set_next_event = bfin_coretmr_set_next_event;
+        evt->set_mode = bfin_coretmr_set_mode;
+
+        clock_tick = get_cclk() / TIME_SCALE;
+        evt->mult = div_sc(clock_tick, NSEC_PER_SEC, evt->shift);
+        evt->max_delta_ns = clockevent_delta2ns(-1, evt);
+        evt->min_delta_ns = clockevent_delta2ns(100, evt);
+
+        evt->cpumask = cpumask_of(cpu);
+
+        clockevents_register_device(evt);
 }
+#endif /* CONFIG_TICKSOURCE_CORETMR */
+
 
 void __init time_init(void)
 {
@@ -370,5 +375,21 @@ void __init time_init(void)
 
         bfin_cs_cycles_init();
         bfin_cs_gptimer0_init();
-        bfin_clockevent_init();
+
+#if defined(CONFIG_TICKSOURCE_CORETMR)
+        bfin_coretmr_init();
+        setup_irq(IRQ_CORETMR, &coretmr_irq);
+        bfin_coretmr_clockevent_init();
+#endif
+
+#if defined(CONFIG_TICKSOURCE_GPTMR0)
+        bfin_gptmr0_init();
+        setup_irq(IRQ_TIMER0, &gptmr0_irq);
+        gptmr0_irq.dev_id = &clockevent_gptmr0;
+        bfin_gptmr0_clockevent_init(&clockevent_gptmr0);
+#endif
+
+#if !defined(CONFIG_TICKSOURCE_CORETMR) && !defined(CONFIG_TICKSOURCE_GPTMR0)
+# error at least one clock event device is required
+#endif
 }
diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c
index d3cbcd6bd98..ba70c4bc269 100644
--- a/arch/blackfin/kernel/traps.c
+++ b/arch/blackfin/kernel/traps.c
@@ -138,6 +138,12 @@ static void decode_address(char *buf, unsigned long address)
                 if (!mm)
                         continue;
 
+                if (!down_read_trylock(&mm->mmap_sem)) {
+                        if (!in_atomic)
+                                mmput(mm);
+                        continue;
+                }
+
                 for (n = rb_first(&mm->mm_rb); n; n = rb_next(n)) {
                         struct vm_area_struct *vma;
 
@@ -177,6 +183,7 @@ static void decode_address(char *buf, unsigned long address)
                                         sprintf(buf, "[ %s vma:0x%lx-0x%lx]",
                                                 name, vma->vm_start, vma->vm_end);
 
+                                up_read(&mm->mmap_sem);
                                 if (!in_atomic)
                                         mmput(mm);
 
@@ -186,11 +193,16 @@ static void decode_address(char *buf, unsigned long address)
                                 goto done;
                         }
                 }
+
+                up_read(&mm->mmap_sem);
                 if (!in_atomic)
                         mmput(mm);
         }
 
-        /* we were unable to find this address anywhere */
+        /*
+         * we were unable to find this address anywhere,
+         * or some MMs were skipped because they were in use.
+         */
         sprintf(buf, "/* kernel dynamic memory */");
 
 done:
@@ -248,9 +260,7 @@ asmlinkage notrace void trap_c(struct pt_regs *fp)
 #ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON
         int j;
 #endif
-#ifdef CONFIG_DEBUG_HUNT_FOR_ZERO
         unsigned int cpu = raw_smp_processor_id();
-#endif
         const char *strerror = NULL;
         int sig = 0;
         siginfo_t info;
@@ -639,7 +649,17 @@ asmlinkage notrace void trap_c(struct pt_regs *fp)
         {
                 info.si_signo = sig;
                 info.si_errno = 0;
-                info.si_addr = (void __user *)fp->pc;
+                switch (trapnr) {
+                case VEC_CPLB_VL:
+                case VEC_MISALI_D:
+                case VEC_CPLB_M:
+                case VEC_CPLB_MHIT:
+                        info.si_addr = (void __user *)cpu_pda[cpu].dcplb_fault_addr;
+                        break;
+                default:
+                        info.si_addr = (void __user *)fp->pc;
+                        break;
+                }
                 force_sig_info(sig, &info, current);
         }
 
@@ -712,7 +732,7 @@ static void decode_instruction(unsigned short *address)
                         verbose_printk("RTE");
                 else if (opcode == 0x0025)
                         verbose_printk("EMUEXCPT");
-                else if (opcode == 0x0040 && opcode <= 0x0047)
+                else if (opcode >= 0x0040 && opcode <= 0x0047)
                         verbose_printk("STI R%i", opcode & 7);
                 else if (opcode >= 0x0050 && opcode <= 0x0057)
                         verbose_printk("JUMP (P%i)", opcode & 7);
@@ -1096,7 +1116,7 @@ void dump_bfin_mem(struct pt_regs *fp)
                         /* And the last RETI points to the current userspace context */
                         if ((fp + 1)->pc >= current->mm->start_code &&
                             (fp + 1)->pc <= current->mm->end_code) {
-                                verbose_printk(KERN_NOTICE "It might be better to look around here : \n");
+                                verbose_printk(KERN_NOTICE "It might be better to look around here :\n");
                                 verbose_printk(KERN_NOTICE "-------------------------------------------\n");
                                 show_regs(fp + 1);
                                 verbose_printk(KERN_NOTICE "-------------------------------------------\n");
diff --git a/arch/blackfin/kernel/vmlinux.lds.S b/arch/blackfin/kernel/vmlinux.lds.S
index 66799e763dc..984c7817239 100644
--- a/arch/blackfin/kernel/vmlinux.lds.S
+++ b/arch/blackfin/kernel/vmlinux.lds.S
@@ -15,7 +15,12 @@ _jiffies = _jiffies_64;
 
 SECTIONS
 {
+#ifdef CONFIG_RAMKERNEL
         . = CONFIG_BOOT_LOAD;
+#else
+        . = CONFIG_ROM_BASE;
+#endif
+
         /* Neither the text, ro_data or bss section need to be aligned
          * So pack them back to back
          */
@@ -31,6 +36,12 @@ SECTIONS
                 LOCK_TEXT
                 IRQENTRY_TEXT
                 KPROBES_TEXT
+#ifdef CONFIG_ROMKERNEL
+                __sinittext = .;
+                INIT_TEXT
+                __einittext = .;
+                EXIT_TEXT
+#endif
                 *(.text.*)
                 *(.fixup)
 
@@ -50,8 +61,14 @@ SECTIONS
 
         /* Just in case the first read only is a 32-bit access */
         RO_DATA(4)
+        __rodata_end = .;
 
+#ifdef CONFIG_ROMKERNEL
+        . = CONFIG_BOOT_LOAD;
+        .bss : AT(__rodata_end)
+#else
         .bss :
+#endif
         {
                 . = ALIGN(4);
                 ___bss_start = .;
@@ -67,7 +84,11 @@ SECTIONS
                 ___bss_stop = .;
         }
 
+#if defined(CONFIG_ROMKERNEL)
+        .data : AT(LOADADDR(.bss) + SIZEOF(.bss))
+#else
         .data :
+#endif
         {
                 __sdata = .;
                 /* This gets done first, so the glob doesn't suck it in */
@@ -94,6 +115,8 @@ SECTIONS
 
                 __edata = .;
         }
+        __data_lma = LOADADDR(.data);
+        __data_len = SIZEOF(.data);
 
         /* The init section should be last, so when we free it, it goes into
          * the general memory pool, and (hopefully) will decrease fragmentation
@@ -103,25 +126,58 @@ SECTIONS
         . = ALIGN(PAGE_SIZE);
         ___init_begin = .;
 
+#ifdef CONFIG_RAMKERNEL
         INIT_TEXT_SECTION(PAGE_SIZE)
-        . = ALIGN(16);
-        INIT_DATA_SECTION(16)
-        PERCPU(4)
 
-        /* we have to discard exit text and such at runtime, not link time, to
+        /* We have to discard exit text and such at runtime, not link time, to
          * handle embedded cross-section references (alt instructions, bug
-         * table, eh_frame, etc...)
+         * table, eh_frame, etc...).  We need all of our .text up front and
+         * .data after it for PCREL call issues.
          */
         .exit.text :
         {
                 EXIT_TEXT
         }
+
+        . = ALIGN(16);
+        INIT_DATA_SECTION(16)
+        PERCPU(4)
+
         .exit.data :
         {
                 EXIT_DATA
         }
 
         .text_l1 L1_CODE_START : AT(LOADADDR(.exit.data) + SIZEOF(.exit.data))
+#else
+        .init.data : AT(__data_lma + __data_len)
+        {
+                __sinitdata = .;
+                INIT_DATA
+                INIT_SETUP(16)
+                INIT_CALLS
+                CON_INITCALL
+                SECURITY_INITCALL
+                INIT_RAM_FS
+
+                . = ALIGN(4);
+                ___per_cpu_load = .;
+                ___per_cpu_start = .;
+                *(.data.percpu.first)
+                *(.data.percpu.page_aligned)
+                *(.data.percpu)
+                *(.data.percpu.shared_aligned)
+                ___per_cpu_end = .;
+
+                EXIT_DATA
+                __einitdata = .;
+        }
+        __init_data_lma = LOADADDR(.init.data);
+        __init_data_len = SIZEOF(.init.data);
+        __init_data_end = .;
+
+        .text_l1 L1_CODE_START : AT(__init_data_lma + __init_data_len)
+#endif
         {
                 . = ALIGN(4);
                 __stext_l1 = .;
@@ -202,7 +258,11 @@ SECTIONS
         /* Force trailing alignment of our init section so that when we
          * free our init memory, we don't leave behind a partial page.
          */
+#ifdef CONFIG_RAMKERNEL
         . = __l2_lma + __l2_len;
+#else
+        . = __init_data_end;
+#endif
         . = ALIGN(PAGE_SIZE);
         ___init_end = .;
 
diff --git a/arch/blackfin/mach-bf518/boards/Kconfig b/arch/blackfin/mach-bf518/boards/Kconfig
index 96163514ed2..252261ec04c 100644
--- a/arch/blackfin/mach-bf518/boards/Kconfig
+++ b/arch/blackfin/mach-bf518/boards/Kconfig
@@ -9,4 +9,9 @@ config BFIN518F_EZBRD
         help
           BF518-EZBRD board support.
 
+config BFIN518F_TCM
+       bool "Bluetechnix TCM-BF518"
+       help
+         Bluetechnix TCM-BF518 board support.
+
 endchoice
diff --git a/arch/blackfin/mach-bf518/boards/Makefile b/arch/blackfin/mach-bf518/boards/Makefile
index 172e859c3a7..a9ef25c6b30 100644
--- a/arch/blackfin/mach-bf518/boards/Makefile
+++ b/arch/blackfin/mach-bf518/boards/Makefile
@@ -3,3 +3,4 @@
 #
 
 obj-$(CONFIG_BFIN518F_EZBRD)            += ezbrd.o
+obj-$(CONFIG_BFIN518F_TCM)              += tcm-bf518.o
diff --git a/arch/blackfin/mach-bf518/boards/ezbrd.c b/arch/blackfin/mach-bf518/boards/ezbrd.c
index 01975c01711..44d6d529902 100644
--- a/arch/blackfin/mach-bf518/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf518/boards/ezbrd.c
@@ -382,30 +382,93 @@ static struct platform_device bfin_spi1_device = {
 #endif  /* spi master and devices */
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-static struct resource bfin_uart_resources[] = {
 #ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
         {
-                .start = 0xFFC00400,
-                .end = 0xFFC004FF,
+                .start = UART0_THR,
+                .end = UART0_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART0_RX,
+                .end = IRQ_UART0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART0_ERROR,
+                .end = IRQ_UART0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART0_TX,
+                .end = CH_UART0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART0_RX,
+                .end = CH_UART0_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
+};
+
+static struct platform_device bfin_uart0_device = {
+        .name = "bfin-uart",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+        .dev = {
+                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
+        },
+};
 #endif
 #ifdef CONFIG_SERIAL_BFIN_UART1
+static struct resource bfin_uart1_resources[] = {
         {
-                .start = 0xFFC02000,
-                .end = 0xFFC020FF,
+                .start = UART1_THR,
+                .end = UART1_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
-#endif
+        {
+                .start = IRQ_UART1_RX,
+                .end = IRQ_UART1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART1_ERROR,
+                .end = IRQ_UART1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART1_TX,
+                .end = CH_UART1_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART1_RX,
+                .end = CH_UART1_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart1_peripherals[] = {
+        P_UART1_TX, P_UART1_RX, 0
 };
 
-static struct platform_device bfin_uart_device = {
+static struct platform_device bfin_uart1_device = {
         .name = "bfin-uart",
         .id = 1,
-        .num_resources = ARRAY_SIZE(bfin_uart_resources),
-        .resource = bfin_uart_resources,
+        .num_resources = ARRAY_SIZE(bfin_uart1_resources),
+        .resource = bfin_uart1_resources,
+        .dev = {
+                .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
@@ -499,16 +562,75 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 };
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+static struct resource bfin_sport0_uart_resources[] = {
+        {
+                .start = SPORT0_TCR1,
+                .end = SPORT0_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT0_RX,
+                .end = IRQ_SPORT0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT0_ERROR,
+                .end = IRQ_SPORT0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport0_peripherals[] = {
+        P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
+        P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
+};
+
 static struct platform_device bfin_sport0_uart_device = {
         .name = "bfin-sport-uart",
         .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
+        .resource = bfin_sport0_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+static struct resource bfin_sport1_uart_resources[] = {
+        {
+                .start = SPORT1_TCR1,
+                .end = SPORT1_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT1_RX,
+                .end = IRQ_SPORT1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT1_ERROR,
+                .end = IRQ_SPORT1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport1_peripherals[] = {
+        P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
+        P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 };
 
 static struct platform_device bfin_sport1_uart_device = {
         .name = "bfin-sport-uart",
         .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
+        .resource = bfin_sport1_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 #include <linux/input.h>
@@ -593,7 +715,12 @@ static struct platform_device *stamp_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-        &bfin_uart_device,
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
 #endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -610,9 +737,13 @@ static struct platform_device *stamp_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
         &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
         &bfin_sport1_uart_device,
 #endif
+#endif
 
 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
         &bfin_device_gpiokeys,
@@ -644,6 +775,33 @@ static int __init ezbrd_init(void)
 
 arch_initcall(ezbrd_init);
 
+static struct platform_device *ezbrd_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+        &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+        &bfin_sport1_uart_device,
+#endif
+#endif
+};
+
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(ezbrd_early_devices,
+                ARRAY_SIZE(ezbrd_early_devices));
+}
+
 void native_machine_restart(char *cmd)
 {
         /* workaround reboot hang when booting from SPI */
diff --git a/arch/blackfin/mach-bf518/boards/tcm-bf518.c b/arch/blackfin/mach-bf518/boards/tcm-bf518.c
new file mode 100644
index 00000000000..9b72e5cb21f
--- /dev/null
+++ b/arch/blackfin/mach-bf518/boards/tcm-bf518.c
@@ -0,0 +1,753 @@
+/*
+ * Copyright 2004-2009 Analog Devices Inc.
+ *                2005 National ICT Australia (NICTA)
+ *                      Aidan Williams <aidan@nicta.com.au>
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/device.h>
+#include <linux/etherdevice.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
+
+#include <linux/i2c.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <asm/dma.h>
+#include <asm/bfin5xx_spi.h>
+#include <asm/reboot.h>
+#include <asm/portmux.h>
+#include <asm/dpmc.h>
+#include <asm/bfin_sdh.h>
+#include <linux/spi/ad7877.h>
+#include <net/dsa.h>
+
+/*
+ * Name the Board for the /proc/cpuinfo
+ */
+const char bfin_board_name[] = "Bluetechnix TCM-BF518";
+
+/*
+ *  Driver needs to know address, irq and flag pin.
+ */
+
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
+static struct mtd_partition tcm_partitions[] = {
+        {
+                .name       = "bootloader(nor)",
+                .size       = 0x40000,
+                .offset     = 0,
+        },
+        {
+                .name       = "linux(nor)",
+                .size       = 0x1C0000,
+                .offset     = MTDPART_OFS_APPEND,
+        }
+};
+
+static struct physmap_flash_data tcm_flash_data = {
+        .width      = 2,
+        .parts      = tcm_partitions,
+        .nr_parts   = ARRAY_SIZE(tcm_partitions),
+};
+
+static struct resource tcm_flash_resource = {
+        .start = 0x20000000,
+        .end   = 0x201fffff,
+        .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device tcm_flash_device = {
+        .name          = "physmap-flash",
+        .id            = 0,
+        .dev = {
+                .platform_data = &tcm_flash_data,
+        },
+        .num_resources = 1,
+        .resource      = &tcm_flash_resource,
+};
+#endif
+
+#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
+static struct platform_device rtc_device = {
+        .name = "rtc-bfin",
+        .id   = -1,
+};
+#endif
+
+#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+static struct platform_device bfin_mii_bus = {
+        .name = "bfin_mii_bus",
+};
+
+static struct platform_device bfin_mac_device = {
+        .name = "bfin_mac",
+        .dev.platform_data = &bfin_mii_bus,
+};
+#endif
+
+#if defined(CONFIG_MTD_M25P80) \
+        || defined(CONFIG_MTD_M25P80_MODULE)
+static struct mtd_partition bfin_spi_flash_partitions[] = {
+        {
+                .name = "bootloader(spi)",
+                .size = 0x00040000,
+                .offset = 0,
+                .mask_flags = MTD_CAP_ROM
+        }, {
+                .name = "linux kernel(spi)",
+                .size = MTDPART_SIZ_FULL,
+                .offset = MTDPART_OFS_APPEND,
+        }
+};
+
+static struct flash_platform_data bfin_spi_flash_data = {
+        .name = "m25p80",
+        .parts = bfin_spi_flash_partitions,
+        .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
+        .type = "m25p16",
+};
+
+/* SPI flash chip (m25p64) */
+static struct bfin5xx_spi_chip spi_flash_chip_info = {
+        .enable_dma = 0,         /* use dma transfer with this chip*/
+        .bits_per_word = 8,
+};
+#endif
+
+#if defined(CONFIG_BFIN_SPI_ADC) \
+        || defined(CONFIG_BFIN_SPI_ADC_MODULE)
+/* SPI ADC chip */
+static struct bfin5xx_spi_chip spi_adc_chip_info = {
+        .enable_dma = 1,         /* use dma transfer with this chip*/
+        .bits_per_word = 16,
+};
+#endif
+
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+static struct bfin5xx_spi_chip mmc_spi_chip_info = {
+        .enable_dma = 0,
+        .bits_per_word = 8,
+};
+#endif
+
+#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
+static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
+        .enable_dma = 0,
+        .bits_per_word = 16,
+};
+
+static const struct ad7877_platform_data bfin_ad7877_ts_info = {
+        .model                  = 7877,
+        .vref_delay_usecs       = 50,   /* internal, no capacitor */
+        .x_plate_ohms           = 419,
+        .y_plate_ohms           = 486,
+        .pressure_max           = 1000,
+        .pressure_min           = 0,
+        .stopacq_polarity       = 1,
+        .first_conversion_delay = 3,
+        .acquisition_time       = 1,
+        .averaging              = 1,
+        .pen_down_acc_interval  = 1,
+};
+#endif
+
+#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
+         && defined(CONFIG_SND_SOC_WM8731_SPI)
+static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
+        .enable_dma = 0,
+        .bits_per_word = 16,
+};
+#endif
+
+#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
+static struct bfin5xx_spi_chip spidev_chip_info = {
+        .enable_dma = 0,
+        .bits_per_word = 8,
+};
+#endif
+
+static struct spi_board_info bfin_spi_board_info[] __initdata = {
+#if defined(CONFIG_MTD_M25P80) \
+        || defined(CONFIG_MTD_M25P80_MODULE)
+        {
+                /* the modalias must be the same as spi device driver name */
+                .modalias = "m25p80", /* Name of spi_driver for this device */
+                .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num = 0, /* Framework bus number */
+                .chip_select = 2, /* SPI0_SSEL2 */
+                .platform_data = &bfin_spi_flash_data,
+                .controller_data = &spi_flash_chip_info,
+                .mode = SPI_MODE_3,
+        },
+#endif
+
+#if defined(CONFIG_BFIN_SPI_ADC) \
+        || defined(CONFIG_BFIN_SPI_ADC_MODULE)
+        {
+                .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
+                .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num = 0, /* Framework bus number */
+                .chip_select = 1, /* Framework chip select. */
+                .platform_data = NULL, /* No spi_driver specific config */
+                .controller_data = &spi_adc_chip_info,
+        },
+#endif
+
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+        {
+                .modalias = "mmc_spi",
+                .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num = 0,
+                .chip_select = 5,
+                .controller_data = &mmc_spi_chip_info,
+                .mode = SPI_MODE_3,
+        },
+#endif
+#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
+        {
+                .modalias               = "ad7877",
+                .platform_data          = &bfin_ad7877_ts_info,
+                .irq                    = IRQ_PF8,
+                .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num        = 0,
+                .chip_select  = 2,
+                .controller_data = &spi_ad7877_chip_info,
+        },
+#endif
+#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
+         && defined(CONFIG_SND_SOC_WM8731_SPI)
+        {
+                .modalias       = "wm8731",
+                .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num        = 0,
+                .chip_select    = 5,
+                .controller_data = &spi_wm8731_chip_info,
+                .mode = SPI_MODE_0,
+        },
+#endif
+#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
+        {
+                .modalias = "spidev",
+                .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num = 0,
+                .chip_select = 1,
+                .controller_data = &spidev_chip_info,
+        },
+#endif
+#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
+        {
+                .modalias = "bfin-lq035q1-spi",
+                .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num = 0,
+                .chip_select = 1,
+                .controller_data = &lq035q1_spi_chip_info,
+                .mode = SPI_CPHA | SPI_CPOL,
+        },
+#endif
+};
+
+/* SPI controller data */
+#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
+/* SPI (0) */
+static struct bfin5xx_spi_master bfin_spi0_info = {
+        .num_chipselect = 6,
+        .enable_dma = 1,  /* master has the ability to do dma transfer */
+        .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
+};
+
+static struct resource bfin_spi0_resource[] = {
+        [0] = {
+                .start = SPI0_REGBASE,
+                .end   = SPI0_REGBASE + 0xFF,
+                .flags = IORESOURCE_MEM,
+                },
+        [1] = {
+                .start = CH_SPI0,
+                .end   = CH_SPI0,
+                .flags = IORESOURCE_DMA,
+        },
+        [2] = {
+                .start = IRQ_SPI0,
+                .end   = IRQ_SPI0,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device bfin_spi0_device = {
+        .name = "bfin-spi",
+        .id = 0, /* Bus number */
+        .num_resources = ARRAY_SIZE(bfin_spi0_resource),
+        .resource = bfin_spi0_resource,
+        .dev = {
+                .platform_data = &bfin_spi0_info, /* Passed to driver */
+        },
+};
+
+/* SPI (1) */
+static struct bfin5xx_spi_master bfin_spi1_info = {
+        .num_chipselect = 5,
+        .enable_dma = 1,  /* master has the ability to do dma transfer */
+        .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
+};
+
+static struct resource bfin_spi1_resource[] = {
+        [0] = {
+                .start = SPI1_REGBASE,
+                .end   = SPI1_REGBASE + 0xFF,
+                .flags = IORESOURCE_MEM,
+                },
+        [1] = {
+                .start = CH_SPI1,
+                .end   = CH_SPI1,
+                .flags = IORESOURCE_DMA,
+        },
+        [2] = {
+                .start = IRQ_SPI1,
+                .end   = IRQ_SPI1,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device bfin_spi1_device = {
+        .name = "bfin-spi",
+        .id = 1, /* Bus number */
+        .num_resources = ARRAY_SIZE(bfin_spi1_resource),
+        .resource = bfin_spi1_resource,
+        .dev = {
+                .platform_data = &bfin_spi1_info, /* Passed to driver */
+        },
+};
+#endif  /* spi master and devices */
+
+#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
+        {
+                .start = UART0_THR,
+                .end = UART0_GCTL+2,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_UART0_RX,
+                .end = IRQ_UART0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART0_ERROR,
+                .end = IRQ_UART0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART0_TX,
+                .end = CH_UART0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART0_RX,
+                .end = CH_UART0_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
+};
+
+static struct platform_device bfin_uart0_device = {
+        .name = "bfin-uart",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+        .dev = {
+                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+static struct resource bfin_uart1_resources[] = {
+        {
+                .start = UART1_THR,
+                .end = UART1_GCTL+2,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_UART1_RX,
+                .end = IRQ_UART1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART1_ERROR,
+                .end = IRQ_UART1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART1_TX,
+                .end = CH_UART1_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART1_RX,
+                .end = CH_UART1_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart1_peripherals[] = {
+        P_UART1_TX, P_UART1_RX, 0
+};
+
+static struct platform_device bfin_uart1_device = {
+        .name = "bfin-uart",
+        .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_uart1_resources),
+        .resource = bfin_uart1_resources,
+        .dev = {
+                .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#endif
+
+#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
+#ifdef CONFIG_BFIN_SIR0
+static struct resource bfin_sir0_resources[] = {
+        {
+                .start = 0xFFC00400,
+                .end = 0xFFC004FF,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_UART0_RX,
+                .end = IRQ_UART0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART0_RX,
+                .end = CH_UART0_RX+1,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+static struct platform_device bfin_sir0_device = {
+        .name = "bfin_sir",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_sir0_resources),
+        .resource = bfin_sir0_resources,
+};
+#endif
+#ifdef CONFIG_BFIN_SIR1
+static struct resource bfin_sir1_resources[] = {
+        {
+                .start = 0xFFC02000,
+                .end = 0xFFC020FF,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_UART1_RX,
+                .end = IRQ_UART1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART1_RX,
+                .end = CH_UART1_RX+1,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+static struct platform_device bfin_sir1_device = {
+        .name = "bfin_sir",
+        .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_sir1_resources),
+        .resource = bfin_sir1_resources,
+};
+#endif
+#endif
+
+#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
+static struct resource bfin_twi0_resource[] = {
+        [0] = {
+                .start = TWI0_REGBASE,
+                .end   = TWI0_REGBASE,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_TWI,
+                .end   = IRQ_TWI,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device i2c_bfin_twi_device = {
+        .name = "i2c-bfin-twi",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_twi0_resource),
+        .resource = bfin_twi0_resource,
+};
+#endif
+
+static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
+#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
+        {
+                I2C_BOARD_INFO("pcf8574_lcd", 0x22),
+        },
+#endif
+#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
+        {
+                I2C_BOARD_INFO("pcf8574_keypad", 0x27),
+                .irq = IRQ_PF8,
+        },
+#endif
+};
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+static struct resource bfin_sport0_uart_resources[] = {
+        {
+                .start = SPORT0_TCR1,
+                .end = SPORT0_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT0_RX,
+                .end = IRQ_SPORT0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT0_ERROR,
+                .end = IRQ_SPORT0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport0_peripherals[] = {
+        P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
+        P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
+};
+
+static struct platform_device bfin_sport0_uart_device = {
+        .name = "bfin-sport-uart",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
+        .resource = bfin_sport0_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+static struct resource bfin_sport1_uart_resources[] = {
+        {
+                .start = SPORT1_TCR1,
+                .end = SPORT1_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT1_RX,
+                .end = IRQ_SPORT1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT1_ERROR,
+                .end = IRQ_SPORT1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport1_peripherals[] = {
+        P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
+        P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
+};
+
+static struct platform_device bfin_sport1_uart_device = {
+        .name = "bfin-sport-uart",
+        .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
+        .resource = bfin_sport1_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#endif
+
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+#include <linux/input.h>
+#include <linux/gpio_keys.h>
+
+static struct gpio_keys_button bfin_gpio_keys_table[] = {
+        {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
+        {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
+};
+
+static struct gpio_keys_platform_data bfin_gpio_keys_data = {
+        .buttons        = bfin_gpio_keys_table,
+        .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
+};
+
+static struct platform_device bfin_device_gpiokeys = {
+        .name      = "gpio-keys",
+        .dev = {
+                .platform_data = &bfin_gpio_keys_data,
+        },
+};
+#endif
+
+#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
+
+static struct bfin_sd_host bfin_sdh_data = {
+        .dma_chan = CH_RSI,
+        .irq_int0 = IRQ_RSI_INT0,
+        .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
+};
+
+static struct platform_device bf51x_sdh_device = {
+        .name = "bfin-sdh",
+        .id = 0,
+        .dev = {
+                .platform_data = &bfin_sdh_data,
+        },
+};
+#endif
+
+static const unsigned int cclk_vlev_datasheet[] =
+{
+        VRPAIR(VLEV_100, 400000000),
+        VRPAIR(VLEV_105, 426000000),
+        VRPAIR(VLEV_110, 500000000),
+        VRPAIR(VLEV_115, 533000000),
+        VRPAIR(VLEV_120, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+        .tuple_tab = cclk_vlev_datasheet,
+        .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+        .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+        .name = "bfin dpmc",
+        .dev = {
+                .platform_data = &bfin_dmpc_vreg_data,
+        },
+};
+
+static struct platform_device *tcm_devices[] __initdata = {
+
+        &bfin_dpmc,
+
+#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
+        &rtc_device,
+#endif
+
+#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+        &bfin_mii_bus,
+        &bfin_mac_device,
+#endif
+
+#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
+        &bfin_spi0_device,
+        &bfin_spi1_device,
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
+#endif
+
+#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
+#ifdef CONFIG_BFIN_SIR0
+        &bfin_sir0_device,
+#endif
+#ifdef CONFIG_BFIN_SIR1
+        &bfin_sir1_device,
+#endif
+#endif
+
+#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
+        &i2c_bfin_twi_device,
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+        &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+        &bfin_sport1_uart_device,
+#endif
+#endif
+
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+        &bfin_device_gpiokeys,
+#endif
+
+#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
+        &bf51x_sdh_device,
+#endif
+
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
+        &tcm_flash_device,
+#endif
+};
+
+static int __init tcm_init(void)
+{
+        printk(KERN_INFO "%s(): registering device resources\n", __func__);
+        i2c_register_board_info(0, bfin_i2c_board_info,
+                                ARRAY_SIZE(bfin_i2c_board_info));
+        platform_add_devices(tcm_devices, ARRAY_SIZE(tcm_devices));
+        spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
+        return 0;
+}
+
+arch_initcall(tcm_init);
+
+static struct platform_device *tcm_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+        &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+        &bfin_sport1_uart_device,
+#endif
+#endif
+};
+
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(tcm_early_devices,
+                ARRAY_SIZE(tcm_early_devices));
+}
+
+void native_machine_restart(char *cmd)
+{
+        /* workaround reboot hang when booting from SPI */
+        if ((bfin_read_SYSCR() & 0x7) == 0x3)
+                bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
+}
+
+void bfin_get_ether_addr(char *addr)
+{
+        random_ether_addr(addr);
+        printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
+}
+EXPORT_SYMBOL(bfin_get_ether_addr);
diff --git a/arch/blackfin/mach-bf518/include/mach/irq.h b/arch/blackfin/mach-bf518/include/mach/irq.h
index 14e52ec7afa..435e76e31aa 100644
--- a/arch/blackfin/mach-bf518/include/mach/irq.h
+++ b/arch/blackfin/mach-bf518/include/mach/irq.h
@@ -151,7 +151,17 @@
 
 #define GPIO_IRQ_BASE   IRQ_PF0
 
-#define NR_IRQS     (IRQ_PH15 + 1)
+#define IRQ_MAC_PHYINT          119 /* PHY_INT Interrupt */
+#define IRQ_MAC_MMCINT          120 /* MMC Counter Interrupt */
+#define IRQ_MAC_RXFSINT         121 /* RX Frame-Status Interrupt */
+#define IRQ_MAC_TXFSINT         122 /* TX Frame-Status Interrupt */
+#define IRQ_MAC_WAKEDET         123 /* Wake-Up Interrupt */
+#define IRQ_MAC_RXDMAERR        124 /* RX DMA Direction Error Interrupt */
+#define IRQ_MAC_TXDMAERR        125 /* TX DMA Direction Error Interrupt */
+#define IRQ_MAC_STMDONE         126 /* Station Mgt. Transfer Done Interrupt */
+
+#define NR_MACH_IRQS    (IRQ_MAC_STMDONE + 1)
+#define NR_IRQS         (NR_MACH_IRQS + NR_SPARE_IRQS)
 
 #define IVG7            7
 #define IVG8            8
diff --git a/arch/blackfin/mach-bf518/include/mach/mem_map.h b/arch/blackfin/mach-bf518/include/mach/mem_map.h
index 3c6777cb353..073b5d73d39 100644
--- a/arch/blackfin/mach-bf518/include/mach/mem_map.h
+++ b/arch/blackfin/mach-bf518/include/mach/mem_map.h
@@ -41,7 +41,7 @@
 #define L1_DATA_A_START         0xFF800000
 #define L1_DATA_B_START         0xFF900000
 
-#define L1_CODE_LENGTH          0xC000
+#define L1_CODE_LENGTH          0x8000
 
 #ifdef CONFIG_BFIN_DCACHE
 
diff --git a/arch/blackfin/mach-bf527/boards/Kconfig b/arch/blackfin/mach-bf527/boards/Kconfig
index df224d04e16..b14c28810a4 100644
--- a/arch/blackfin/mach-bf527/boards/Kconfig
+++ b/arch/blackfin/mach-bf527/boards/Kconfig
@@ -9,6 +9,11 @@ config BFIN527_EZKIT
         help
           BF527-EZKIT-LITE board support.
 
+config BFIN527_EZKIT_V2
+        bool "BF527-EZKIT-V2"
+        help
+          BF527-EZKIT-LITE V2.1+ board support.
+
 config BFIN527_BLUETECHNIX_CM
         bool "Bluetechnix CM-BF527"
         help
diff --git a/arch/blackfin/mach-bf527/boards/Makefile b/arch/blackfin/mach-bf527/boards/Makefile
index eb6ed3362f9..51a5817c4a9 100644
--- a/arch/blackfin/mach-bf527/boards/Makefile
+++ b/arch/blackfin/mach-bf527/boards/Makefile
@@ -3,5 +3,6 @@
 #
 
 obj-$(CONFIG_BFIN527_EZKIT)            += ezkit.o
+obj-$(CONFIG_BFIN527_EZKIT_V2)         += ezkit.o
 obj-$(CONFIG_BFIN527_BLUETECHNIX_CM)   += cm_bf527.o
 obj-$(CONFIG_BFIN526_EZBRD)            += ezbrd.o
diff --git a/arch/blackfin/mach-bf527/boards/cm_bf527.c b/arch/blackfin/mach-bf527/boards/cm_bf527.c
index 7ab0800e291..ebe76d1e874 100644
--- a/arch/blackfin/mach-bf527/boards/cm_bf527.c
+++ b/arch/blackfin/mach-bf527/boards/cm_bf527.c
@@ -18,7 +18,6 @@
 #include <linux/i2c.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
-#include <linux/usb/sl811.h>
 #include <linux/usb/musb.h>
 #include <asm/dma.h>
 #include <asm/bfin5xx_spi.h>
@@ -270,50 +269,6 @@ static struct platform_device dm9000_device = {
 };
 #endif
 
-#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
-static struct resource sl811_hcd_resources[] = {
-        {
-                .start = 0x20340000,
-                .end = 0x20340000,
-                .flags = IORESOURCE_MEM,
-        }, {
-                .start = 0x20340004,
-                .end = 0x20340004,
-                .flags = IORESOURCE_MEM,
-        }, {
-                .start = CONFIG_USB_SL811_BFIN_IRQ,
-                .end = CONFIG_USB_SL811_BFIN_IRQ,
-                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
-        },
-};
-
-#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
-void sl811_port_power(struct device *dev, int is_on)
-{
-        gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
-        gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
-}
-#endif
-
-static struct sl811_platform_data sl811_priv = {
-        .potpg = 10,
-        .power = 250,       /* == 500mA */
-#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
-        .port_power = &sl811_port_power,
-#endif
-};
-
-static struct platform_device sl811_hcd_device = {
-        .name = "sl811-hcd",
-        .id = 0,
-        .dev = {
-                .platform_data = &sl811_priv,
-        },
-        .num_resources = ARRAY_SIZE(sl811_hcd_resources),
-        .resource = sl811_hcd_resources,
-};
-#endif
-
 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 static struct platform_device bfin_mii_bus = {
         .name = "bfin_mii_bus",
@@ -384,8 +339,8 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) \
-        || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) \
+        || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
         .enable_dma = 0,
         .bits_per_word = 16,
@@ -462,8 +417,8 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) \
-        || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) \
+        || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
         {
                 .modalias = "ad1836",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
@@ -603,30 +558,105 @@ static struct platform_device cm_flash_device = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-static struct resource bfin_uart_resources[] = {
 #ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
         {
-                .start = 0xFFC00400,
-                .end = 0xFFC004FF,
+                .start = UART0_THR,
+                .end = UART0_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART0_RX,
+                .end = IRQ_UART0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART0_ERROR,
+                .end = IRQ_UART0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART0_TX,
+                .end = CH_UART0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART0_RX,
+                .end = CH_UART0_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
+};
+
+static struct platform_device bfin_uart0_device = {
+        .name = "bfin-uart",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+        .dev = {
+                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
+        },
+};
 #endif
 #ifdef CONFIG_SERIAL_BFIN_UART1
+static struct resource bfin_uart1_resources[] = {
         {
-                .start = 0xFFC02000,
-                .end = 0xFFC020FF,
+                .start = UART1_THR,
+                .end = UART1_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART1_RX,
+                .end = IRQ_UART1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART1_ERROR,
+                .end = IRQ_UART1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART1_TX,
+                .end = CH_UART1_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART1_RX,
+                .end = CH_UART1_RX,
+                .flags = IORESOURCE_DMA,
+        },
+#ifdef CONFIG_BFIN_UART1_CTSRTS
+        {       /* CTS pin */
+                .start = GPIO_PF9,
+                .end = GPIO_PF9,
+                .flags = IORESOURCE_IO,
+        },
+        {       /* RTS pin */
+                .start = GPIO_PF10,
+                .end = GPIO_PF10,
+                .flags = IORESOURCE_IO,
+        },
 #endif
 };
 
-static struct platform_device bfin_uart_device = {
+unsigned short bfin_uart1_peripherals[] = {
+        P_UART1_TX, P_UART1_RX, 0
+};
+
+static struct platform_device bfin_uart1_device = {
         .name = "bfin-uart",
         .id = 1,
-        .num_resources = ARRAY_SIZE(bfin_uart_resources),
-        .resource = bfin_uart_resources,
+        .num_resources = ARRAY_SIZE(bfin_uart1_resources),
+        .resource = bfin_uart1_resources,
+        .dev = {
+                .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
@@ -725,16 +755,75 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 };
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+static struct resource bfin_sport0_uart_resources[] = {
+        {
+                .start = SPORT0_TCR1,
+                .end = SPORT0_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT0_RX,
+                .end = IRQ_SPORT0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT0_ERROR,
+                .end = IRQ_SPORT0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport0_peripherals[] = {
+        P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
+        P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
+};
+
 static struct platform_device bfin_sport0_uart_device = {
         .name = "bfin-sport-uart",
         .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
+        .resource = bfin_sport0_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+static struct resource bfin_sport1_uart_resources[] = {
+        {
+                .start = SPORT1_TCR1,
+                .end = SPORT1_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT1_RX,
+                .end = IRQ_SPORT1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT1_ERROR,
+                .end = IRQ_SPORT1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport1_peripherals[] = {
+        P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
+        P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 };
 
 static struct platform_device bfin_sport1_uart_device = {
         .name = "bfin-sport-uart",
         .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
+        .resource = bfin_sport1_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 #include <linux/input.h>
@@ -795,10 +884,6 @@ static struct platform_device *cmbf527_devices[] __initdata = {
         &rtc_device,
 #endif
 
-#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
-        &sl811_hcd_device,
-#endif
-
 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
         &bfin_isp1760_device,
 #endif
@@ -829,7 +914,12 @@ static struct platform_device *cmbf527_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-        &bfin_uart_device,
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
 #endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -846,9 +936,13 @@ static struct platform_device *cmbf527_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
         &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
         &bfin_sport1_uart_device,
 #endif
+#endif
 
 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
         &bfin_device_gpiokeys,
@@ -871,6 +965,33 @@ static int __init cm_init(void)
 
 arch_initcall(cm_init);
 
+static struct platform_device *cmbf527_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+        &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+        &bfin_sport1_uart_device,
+#endif
+#endif
+};
+
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(cmbf527_early_devices,
+                ARRAY_SIZE(cmbf527_early_devices));
+}
+
 void native_machine_restart(char *cmd)
 {
         /* workaround reboot hang when booting from SPI */
diff --git a/arch/blackfin/mach-bf527/boards/ezbrd.c b/arch/blackfin/mach-bf527/boards/ezbrd.c
index cad23b15d83..55069af4f67 100644
--- a/arch/blackfin/mach-bf527/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf527/boards/ezbrd.c
@@ -274,8 +274,8 @@ static const struct ad7879_platform_data bfin_ad7879_ts_info = {
         .median                 = 2,    /* do 8 measurements */
         .averaging              = 1,    /* take the average of 4 middle samples */
         .pen_down_acc_interval  = 255,  /* 9.4 ms */
-        .gpio_output            = 1,    /* configure AUX/VBAT/GPIO as GPIO output */
-        .gpio_default           = 1,    /* During initialization set GPIO = HIGH */
+        .gpio_export            = 1,    /* Export GPIO to gpiolib */
+        .gpio_base              = -1,   /* Dynamic allocation */
 };
 #endif
 
@@ -439,30 +439,105 @@ static struct platform_device bfin_spi0_device = {
 #endif  /* spi master and devices */
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-static struct resource bfin_uart_resources[] = {
 #ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
         {
-                .start = 0xFFC00400,
-                .end = 0xFFC004FF,
+                .start = UART0_THR,
+                .end = UART0_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART0_RX,
+                .end = IRQ_UART0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART0_ERROR,
+                .end = IRQ_UART0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART0_TX,
+                .end = CH_UART0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART0_RX,
+                .end = CH_UART0_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
+};
+
+static struct platform_device bfin_uart0_device = {
+        .name = "bfin-uart",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+        .dev = {
+                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
+        },
+};
 #endif
 #ifdef CONFIG_SERIAL_BFIN_UART1
+static struct resource bfin_uart1_resources[] = {
         {
-                .start = 0xFFC02000,
-                .end = 0xFFC020FF,
+                .start = UART1_THR,
+                .end = UART1_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART1_RX,
+                .end = IRQ_UART1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART1_ERROR,
+                .end = IRQ_UART1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART1_TX,
+                .end = CH_UART1_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART1_RX,
+                .end = CH_UART1_RX,
+                .flags = IORESOURCE_DMA,
+        },
+#ifdef CONFIG_BFIN_UART1_CTSRTS
+        {       /* CTS pin */
+                .start = GPIO_PG0,
+                .end = GPIO_PG0,
+                .flags = IORESOURCE_IO,
+        },
+        {       /* RTS pin */
+                .start = GPIO_PF10,
+                .end = GPIO_PF10,
+                .flags = IORESOURCE_IO,
+        },
 #endif
 };
 
-static struct platform_device bfin_uart_device = {
+unsigned short bfin_uart1_peripherals[] = {
+        P_UART1_TX, P_UART1_RX, 0
+};
+
+static struct platform_device bfin_uart1_device = {
         .name = "bfin-uart",
         .id = 1,
-        .num_resources = ARRAY_SIZE(bfin_uart_resources),
-        .resource = bfin_uart_resources,
+        .num_resources = ARRAY_SIZE(bfin_uart1_resources),
+        .resource = bfin_uart1_resources,
+        .dev = {
+                .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
@@ -556,16 +631,75 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 };
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+static struct resource bfin_sport0_uart_resources[] = {
+        {
+                .start = SPORT0_TCR1,
+                .end = SPORT0_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT0_RX,
+                .end = IRQ_SPORT0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT0_ERROR,
+                .end = IRQ_SPORT0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport0_peripherals[] = {
+        P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
+        P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
+};
+
 static struct platform_device bfin_sport0_uart_device = {
         .name = "bfin-sport-uart",
         .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
+        .resource = bfin_sport0_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+static struct resource bfin_sport1_uart_resources[] = {
+        {
+                .start = SPORT1_TCR1,
+                .end = SPORT1_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT1_RX,
+                .end = IRQ_SPORT1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT1_ERROR,
+                .end = IRQ_SPORT1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport1_peripherals[] = {
+        P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
+        P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 };
 
 static struct platform_device bfin_sport1_uart_device = {
         .name = "bfin-sport-uart",
         .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
+        .resource = bfin_sport1_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 #include <linux/input.h>
@@ -615,9 +749,10 @@ static struct platform_device bfin_dpmc = {
 #include <asm/bfin-lq035q1.h>
 
 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
-        .mode =         LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
-        .use_bl =       1,
-        .gpio_bl =      GPIO_PG12,
+        .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
+        .ppi_mode = USE_RGB565_16_BIT_PPI,
+        .use_bl = 1,
+        .gpio_bl = GPIO_PG12,
 };
 
 static struct resource bfin_lq035q1_resources[] = {
@@ -665,7 +800,12 @@ static struct platform_device *stamp_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-        &bfin_uart_device,
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
 #endif
 
 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
@@ -686,9 +826,13 @@ static struct platform_device *stamp_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
         &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
         &bfin_sport1_uart_device,
 #endif
+#endif
 
 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
         &bfin_device_gpiokeys,
@@ -711,6 +855,33 @@ static int __init ezbrd_init(void)
 
 arch_initcall(ezbrd_init);
 
+static struct platform_device *ezbrd_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+        &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+        &bfin_sport1_uart_device,
+#endif
+#endif
+};
+
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(ezbrd_early_devices,
+                ARRAY_SIZE(ezbrd_early_devices));
+}
+
 void native_machine_restart(char *cmd)
 {
         /* workaround reboot hang when booting from SPI */
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index 5294fdd2073..923383386aa 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -16,8 +16,9 @@
 #include <linux/i2c.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
-#include <linux/usb/sl811.h>
 #include <linux/usb/musb.h>
+#include <linux/leds.h>
+#include <linux/input.h>
 #include <asm/dma.h>
 #include <asm/bfin5xx_spi.h>
 #include <asm/reboot.h>
@@ -29,7 +30,11 @@
 /*
  * Name the Board for the /proc/cpuinfo
  */
+#ifdef CONFIG_BFIN527_EZKIT_V2
+const char bfin_board_name[] = "ADI BF527-EZKIT V2";
+#else
 const char bfin_board_name[] = "ADI BF527-EZKIT";
+#endif
 
 /*
  *  Driver needs to know address, irq and flag pin.
@@ -143,6 +148,33 @@ static struct platform_device bf52x_t350mcqb_device = {
 };
 #endif
 
+#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
+#include <asm/bfin-lq035q1.h>
+
+static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
+        .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
+        .ppi_mode = USE_RGB565_8_BIT_PPI,
+};
+
+static struct resource bfin_lq035q1_resources[] = {
+        {
+                .start = IRQ_PPI_ERROR,
+                .end = IRQ_PPI_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device bfin_lq035q1_device = {
+        .name           = "bfin-lq035q1",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(bfin_lq035q1_resources),
+        .resource       = bfin_lq035q1_resources,
+        .dev            = {
+                .platform_data = &bfin_lq035q1_data,
+        },
+};
+#endif
+
 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 static struct mtd_partition ezkit_partitions[] = {
         {
@@ -326,50 +358,6 @@ static struct platform_device dm9000_device = {
 };
 #endif
 
-#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
-static struct resource sl811_hcd_resources[] = {
-        {
-                .start = 0x20340000,
-                .end = 0x20340000,
-                .flags = IORESOURCE_MEM,
-        }, {
-                .start = 0x20340004,
-                .end = 0x20340004,
-                .flags = IORESOURCE_MEM,
-        }, {
-                .start = CONFIG_USB_SL811_BFIN_IRQ,
-                .end = CONFIG_USB_SL811_BFIN_IRQ,
-                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
-        },
-};
-
-#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
-void sl811_port_power(struct device *dev, int is_on)
-{
-        gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
-        gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
-}
-#endif
-
-static struct sl811_platform_data sl811_priv = {
-        .potpg = 10,
-        .power = 250,       /* == 500mA */
-#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
-        .port_power = &sl811_port_power,
-#endif
-};
-
-static struct platform_device sl811_hcd_device = {
-        .name = "sl811-hcd",
-        .id = 0,
-        .dev = {
-                .platform_data = &sl811_priv,
-        },
-        .num_resources = ARRAY_SIZE(sl811_hcd_resources),
-        .resource = sl811_hcd_resources,
-};
-#endif
-
 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 static struct platform_device bfin_mii_bus = {
         .name = "bfin_mii_bus",
@@ -440,8 +428,8 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) \
-        || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) \
+        || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
         .enable_dma = 0,
         .bits_per_word = 16,
@@ -488,8 +476,7 @@ static const struct ad7879_platform_data bfin_ad7879_ts_info = {
         .median                 = 2,    /* do 8 measurements */
         .averaging              = 1,    /* take the average of 4 middle samples */
         .pen_down_acc_interval  = 255,  /* 9.4 ms */
-        .gpio_output            = 1,    /* configure AUX/VBAT/GPIO as GPIO output */
-        .gpio_default           = 1,    /* During initialization set GPIO = HIGH */
+        .gpio_export            = 0,    /* Export GPIO to gpiolib */
 };
 #endif
 
@@ -500,14 +487,6 @@ static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
-         && defined(CONFIG_SND_SOC_WM8731_SPI)
-static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
-        .enable_dma = 0,
-        .bits_per_word = 16,
-};
-#endif
-
 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 static struct bfin5xx_spi_chip spidev_chip_info = {
         .enable_dma = 0,
@@ -515,6 +494,29 @@ static struct bfin5xx_spi_chip spidev_chip_info = {
 };
 #endif
 
+#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
+static struct platform_device bfin_i2s = {
+        .name = "bfin-i2s",
+        .id = CONFIG_SND_BF5XX_SPORT_NUM,
+        /* TODO: add platform data here */
+};
+#endif
+
+#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
+static struct platform_device bfin_tdm = {
+        .name = "bfin-tdm",
+        .id = CONFIG_SND_BF5XX_SPORT_NUM,
+        /* TODO: add platform data here */
+};
+#endif
+
+#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
+static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
+        .enable_dma     = 0,
+        .bits_per_word  = 8,
+};
+#endif
+
 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 #if defined(CONFIG_MTD_M25P80) \
         || defined(CONFIG_MTD_M25P80_MODULE)
@@ -542,8 +544,8 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) \
-        || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) \
+        || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
         {
                 .modalias = "ad1836",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
@@ -586,17 +588,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
                 .mode = SPI_CPHA | SPI_CPOL,
         },
 #endif
-#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
-         && defined(CONFIG_SND_SOC_WM8731_SPI)
-        {
-                .modalias       = "wm8731",
-                .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
-                .bus_num        = 0,
-                .chip_select    = 5,
-                .controller_data = &spi_wm8731_chip_info,
-                .mode = SPI_MODE_0,
-        },
-#endif
 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
         {
                 .modalias = "spidev",
@@ -606,6 +597,16 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
                 .controller_data = &spidev_chip_info,
         },
 #endif
+#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
+        {
+                .modalias = "bfin-lq035q1-spi",
+                .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num = 0,
+                .chip_select = 7,
+                .controller_data = &lq035q1_spi_chip_info,
+                .mode = SPI_CPHA | SPI_CPOL,
+        },
+#endif
 };
 
 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
@@ -647,30 +648,105 @@ static struct platform_device bfin_spi0_device = {
 #endif  /* spi master and devices */
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-static struct resource bfin_uart_resources[] = {
 #ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
         {
-                .start = 0xFFC00400,
-                .end = 0xFFC004FF,
+                .start = UART0_THR,
+                .end = UART0_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART0_RX,
+                .end = IRQ_UART0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART0_ERROR,
+                .end = IRQ_UART0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART0_TX,
+                .end = CH_UART0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART0_RX,
+                .end = CH_UART0_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
+};
+
+static struct platform_device bfin_uart0_device = {
+        .name = "bfin-uart",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+        .dev = {
+                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
+        },
+};
 #endif
 #ifdef CONFIG_SERIAL_BFIN_UART1
+static struct resource bfin_uart1_resources[] = {
         {
-                .start = 0xFFC02000,
-                .end = 0xFFC020FF,
+                .start = UART1_THR,
+                .end = UART1_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART1_RX,
+                .end = IRQ_UART1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART1_ERROR,
+                .end = IRQ_UART1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART1_TX,
+                .end = CH_UART1_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART1_RX,
+                .end = CH_UART1_RX,
+                .flags = IORESOURCE_DMA,
+        },
+#ifdef CONFIG_BFIN_UART1_CTSRTS
+        {       /* CTS pin */
+                .start = GPIO_PF9,
+                .end = GPIO_PF9,
+                .flags = IORESOURCE_IO,
+        },
+        {       /* RTS pin */
+                .start = GPIO_PF10,
+                .end = GPIO_PF10,
+                .flags = IORESOURCE_IO,
+        },
 #endif
 };
 
-static struct platform_device bfin_uart_device = {
+unsigned short bfin_uart1_peripherals[] = {
+        P_UART1_TX, P_UART1_RX, 0
+};
+
+static struct platform_device bfin_uart1_device = {
         .name = "bfin-uart",
         .id = 1,
-        .num_resources = ARRAY_SIZE(bfin_uart_resources),
-        .resource = bfin_uart_resources,
+        .num_resources = ARRAY_SIZE(bfin_uart1_resources),
+        .resource = bfin_uart1_resources,
+        .dev = {
+                .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
@@ -749,6 +825,71 @@ static struct platform_device i2c_bfin_twi_device = {
 };
 #endif
 
+#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
+#include <linux/mfd/adp5520.h>
+
+        /*
+         *  ADP5520/5501 LEDs Data
+         */
+
+static struct led_info adp5520_leds[] = {
+        {
+                .name = "adp5520-led1",
+                .default_trigger = "none",
+                .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
+        },
+};
+
+static struct adp5520_leds_platform_data adp5520_leds_data = {
+        .num_leds = ARRAY_SIZE(adp5520_leds),
+        .leds = adp5520_leds,
+        .fade_in = ADP5520_FADE_T_600ms,
+        .fade_out = ADP5520_FADE_T_600ms,
+        .led_on_time = ADP5520_LED_ONT_600ms,
+};
+
+        /*
+         *  ADP5520 Keypad Data
+         */
+
+static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
+        [ADP5520_KEY(3, 3)]     = KEY_1,
+        [ADP5520_KEY(2, 3)]     = KEY_2,
+        [ADP5520_KEY(1, 3)]     = KEY_3,
+        [ADP5520_KEY(0, 3)]     = KEY_UP,
+        [ADP5520_KEY(3, 2)]     = KEY_4,
+        [ADP5520_KEY(2, 2)]     = KEY_5,
+        [ADP5520_KEY(1, 2)]     = KEY_6,
+        [ADP5520_KEY(0, 2)]     = KEY_DOWN,
+        [ADP5520_KEY(3, 1)]     = KEY_7,
+        [ADP5520_KEY(2, 1)]     = KEY_8,
+        [ADP5520_KEY(1, 1)]     = KEY_9,
+        [ADP5520_KEY(0, 1)]     = KEY_DOT,
+        [ADP5520_KEY(3, 0)]     = KEY_BACKSPACE,
+        [ADP5520_KEY(2, 0)]     = KEY_0,
+        [ADP5520_KEY(1, 0)]     = KEY_HELP,
+        [ADP5520_KEY(0, 0)]     = KEY_ENTER,
+};
+
+static struct adp5520_keys_platform_data adp5520_keys_data = {
+        .rows_en_mask   = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
+        .cols_en_mask   = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
+        .keymap         = adp5520_keymap,
+        .keymapsize     = ARRAY_SIZE(adp5520_keymap),
+        .repeat         = 0,
+};
+
+        /*
+         *  ADP5520/5501 Multifuction Device Init Data
+         */
+
+static struct adp5520_platform_data adp5520_pdev_data = {
+        .leds = &adp5520_leds_data,
+        .keys = &adp5520_keys_data,
+};
+
+#endif
+
 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
         {
@@ -766,22 +907,99 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
                 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
         },
 #endif
+#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
+        {
+                I2C_BOARD_INFO("ad7879", 0x2C),
+                .irq = IRQ_PF8,
+                .platform_data = (void *)&bfin_ad7879_ts_info,
+        },
+#endif
+#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
+        {
+                I2C_BOARD_INFO("pmic-adp5520", 0x32),
+                .irq = IRQ_PF9,
+                .platform_data = (void *)&adp5520_pdev_data,
+        },
+#endif
+#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
+        {
+                I2C_BOARD_INFO("ssm2602", 0x1b),
+        },
+#endif
 };
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+static struct resource bfin_sport0_uart_resources[] = {
+        {
+                .start = SPORT0_TCR1,
+                .end = SPORT0_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT0_RX,
+                .end = IRQ_SPORT0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT0_ERROR,
+                .end = IRQ_SPORT0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport0_peripherals[] = {
+        P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
+        P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
+};
+
 static struct platform_device bfin_sport0_uart_device = {
         .name = "bfin-sport-uart",
         .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
+        .resource = bfin_sport0_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+static struct resource bfin_sport1_uart_resources[] = {
+        {
+                .start = SPORT1_TCR1,
+                .end = SPORT1_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT1_RX,
+                .end = IRQ_SPORT1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT1_ERROR,
+                .end = IRQ_SPORT1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport1_peripherals[] = {
+        P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
+        P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 };
 
 static struct platform_device bfin_sport1_uart_device = {
         .name = "bfin-sport-uart",
         .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
+        .resource = bfin_sport1_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
-#include <linux/input.h>
 #include <linux/gpio_keys.h>
 
 static struct gpio_keys_button bfin_gpio_keys_table[] = {
@@ -803,7 +1021,6 @@ static struct platform_device bfin_device_gpiokeys = {
 #endif
 
 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
-#include <linux/input.h>
 #include <asm/bfin_rotary.h>
 
 static struct bfin_rotary_platform_data bfin_rotary_data = {
@@ -872,10 +1089,6 @@ static struct platform_device *stamp_devices[] __initdata = {
         &rtc_device,
 #endif
 
-#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
-        &sl811_hcd_device,
-#endif
-
 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
         &bfin_isp1760_device,
 #endif
@@ -909,8 +1122,17 @@ static struct platform_device *stamp_devices[] __initdata = {
         &bf52x_t350mcqb_device,
 #endif
 
+#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
+        &bfin_lq035q1_device,
+#endif
+
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-        &bfin_uart_device,
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
 #endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -927,9 +1149,13 @@ static struct platform_device *stamp_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
         &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
         &bfin_sport1_uart_device,
 #endif
+#endif
 
 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
         &bfin_device_gpiokeys,
@@ -942,6 +1168,14 @@ static struct platform_device *stamp_devices[] __initdata = {
 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
         &ezkit_flash_device,
 #endif
+
+#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
+        &bfin_i2s,
+#endif
+
+#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
+        &bfin_tdm,
+#endif
 };
 
 static int __init ezkit_init(void)
@@ -956,6 +1190,33 @@ static int __init ezkit_init(void)
 
 arch_initcall(ezkit_init);
 
+static struct platform_device *ezkit_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+        &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+        &bfin_sport1_uart_device,
+#endif
+#endif
+};
+
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(ezkit_early_devices,
+                ARRAY_SIZE(ezkit_early_devices));
+}
+
 void native_machine_restart(char *cmd)
 {
         /* workaround reboot hang when booting from SPI */
diff --git a/arch/blackfin/mach-bf527/include/mach/irq.h b/arch/blackfin/mach-bf527/include/mach/irq.h
index aa6579a64a2..704d9253e41 100644
--- a/arch/blackfin/mach-bf527/include/mach/irq.h
+++ b/arch/blackfin/mach-bf527/include/mach/irq.h
@@ -151,7 +151,17 @@
 
 #define GPIO_IRQ_BASE   IRQ_PF0
 
-#define NR_IRQS     (IRQ_PH15+1)
+#define IRQ_MAC_PHYINT          119 /* PHY_INT Interrupt */
+#define IRQ_MAC_MMCINT          120 /* MMC Counter Interrupt */
+#define IRQ_MAC_RXFSINT         121 /* RX Frame-Status Interrupt */
+#define IRQ_MAC_TXFSINT         122 /* TX Frame-Status Interrupt */
+#define IRQ_MAC_WAKEDET         123 /* Wake-Up Interrupt */
+#define IRQ_MAC_RXDMAERR        124 /* RX DMA Direction Error Interrupt */
+#define IRQ_MAC_TXDMAERR        125 /* TX DMA Direction Error Interrupt */
+#define IRQ_MAC_STMDONE         126 /* Station Mgt. Transfer Done Interrupt */
+
+#define NR_MACH_IRQS    (IRQ_MAC_STMDONE + 1)
+#define NR_IRQS         (NR_MACH_IRQS + NR_SPARE_IRQS)
 
 #define IVG7            7
 #define IVG8            8
diff --git a/arch/blackfin/mach-bf533/boards/H8606.c b/arch/blackfin/mach-bf533/boards/H8606.c
index 4adceb0bdb6..175371af069 100644
--- a/arch/blackfin/mach-bf533/boards/H8606.c
+++ b/arch/blackfin/mach-bf533/boards/H8606.c
@@ -171,7 +171,7 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
         .enable_dma = 0,
         .bits_per_word = 16,
@@ -206,7 +206,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
         {
                 .modalias = "ad1836",
                 .max_speed_hz = 16,
@@ -257,21 +257,50 @@ static struct platform_device bfin_spi0_device = {
 #endif  /* spi master and devices */
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-static struct resource bfin_uart_resources[] = {
+#ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
         {
-                .start = 0xFFC00400,
-                .end = 0xFFC004FF,
+                .start = BFIN_UART_THR,
+                .end = BFIN_UART_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART0_RX,
+                .end = IRQ_UART0_RX + 1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART0_ERROR,
+                .end = IRQ_UART0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART0_TX,
+                .end = CH_UART0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART0_RX,
+                .end = CH_UART0_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
 };
 
-static struct platform_device bfin_uart_device = {
+static struct platform_device bfin_uart0_device = {
         .name = "bfin-uart",
-        .id = 1,
-        .num_resources = ARRAY_SIZE(bfin_uart_resources),
-        .resource = bfin_uart_resources,
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+        .dev = {
+                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
@@ -394,7 +423,9 @@ static struct platform_device *h8606_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-        &bfin_uart_device,
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
 #endif
 
 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
@@ -424,3 +455,18 @@ static int __init H8606_init(void)
 }
 
 arch_initcall(H8606_init);
+
+static struct platform_device *H8606_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#endif
+};
+
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(H8606_early_devices,
+                ARRAY_SIZE(H8606_early_devices));
+}
diff --git a/arch/blackfin/mach-bf533/boards/blackstamp.c b/arch/blackfin/mach-bf533/boards/blackstamp.c
index b580884848d..842b4fa76ea 100644
--- a/arch/blackfin/mach-bf533/boards/blackstamp.c
+++ b/arch/blackfin/mach-bf533/boards/blackstamp.c
@@ -195,21 +195,50 @@ static struct platform_device bfin_spi0_device = {
 #endif  /* spi master and devices */
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-static struct resource bfin_uart_resources[] = {
+#ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
         {
-                .start = 0xFFC00400,
-                .end = 0xFFC004FF,
+                .start = BFIN_UART_THR,
+                .end = BFIN_UART_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART0_RX,
+                .end = IRQ_UART0_RX + 1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART0_ERROR,
+                .end = IRQ_UART0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART0_TX,
+                .end = CH_UART0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART0_RX,
+                .end = CH_UART0_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
 };
 
-static struct platform_device bfin_uart_device = {
+static struct platform_device bfin_uart0_device = {
         .name = "bfin-uart",
-        .id = 1,
-        .num_resources = ARRAY_SIZE(bfin_uart_resources),
-        .resource = bfin_uart_resources,
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+        .dev = {
+                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
@@ -241,16 +270,75 @@ static struct platform_device bfin_sir0_device = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+static struct resource bfin_sport0_uart_resources[] = {
+        {
+                .start = SPORT0_TCR1,
+                .end = SPORT0_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT0_RX,
+                .end = IRQ_SPORT0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT0_ERROR,
+                .end = IRQ_SPORT0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport0_peripherals[] = {
+        P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
+        P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
+};
+
 static struct platform_device bfin_sport0_uart_device = {
         .name = "bfin-sport-uart",
         .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
+        .resource = bfin_sport0_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+static struct resource bfin_sport1_uart_resources[] = {
+        {
+                .start = SPORT1_TCR1,
+                .end = SPORT1_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT1_RX,
+                .end = IRQ_SPORT1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT1_ERROR,
+                .end = IRQ_SPORT1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport1_peripherals[] = {
+        P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
+        P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 };
 
 static struct platform_device bfin_sport1_uart_device = {
         .name = "bfin-sport-uart",
         .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
+        .resource = bfin_sport1_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 #include <linux/input.h>
@@ -344,7 +432,9 @@ static struct platform_device *stamp_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-        &bfin_uart_device,
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
 #endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -354,9 +444,13 @@ static struct platform_device *stamp_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
         &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
         &bfin_sport1_uart_device,
 #endif
+#endif
 
 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
         &bfin_device_gpiokeys,
@@ -392,3 +486,27 @@ static int __init blackstamp_init(void)
 }
 
 arch_initcall(blackstamp_init);
+
+static struct platform_device *stamp_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+        &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+        &bfin_sport1_uart_device,
+#endif
+#endif
+};
+
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(stamp_early_devices,
+                ARRAY_SIZE(stamp_early_devices));
+}
diff --git a/arch/blackfin/mach-bf533/boards/cm_bf533.c b/arch/blackfin/mach-bf533/boards/cm_bf533.c
index 7fc3b860d4a..fdcde61906d 100644
--- a/arch/blackfin/mach-bf533/boards/cm_bf533.c
+++ b/arch/blackfin/mach-bf533/boards/cm_bf533.c
@@ -71,7 +71,7 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
         .enable_dma = 0,
         .bits_per_word = 16,
@@ -110,7 +110,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
         {
                 .modalias = "ad1836",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
@@ -242,21 +242,50 @@ static struct platform_device smsc911x_device = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-static struct resource bfin_uart_resources[] = {
+#ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
         {
-                .start = 0xFFC00400,
-                .end = 0xFFC004FF,
+                .start = BFIN_UART_THR,
+                .end = BFIN_UART_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART0_RX,
+                .end = IRQ_UART0_RX + 1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART0_ERROR,
+                .end = IRQ_UART0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART0_TX,
+                .end = CH_UART0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART0_RX,
+                .end = CH_UART0_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
 };
 
-static struct platform_device bfin_uart_device = {
+static struct platform_device bfin_uart0_device = {
         .name = "bfin-uart",
-        .id = 1,
-        .num_resources = ARRAY_SIZE(bfin_uart_resources),
-        .resource = bfin_uart_resources,
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+        .dev = {
+                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
@@ -288,16 +317,75 @@ static struct platform_device bfin_sir0_device = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+static struct resource bfin_sport0_uart_resources[] = {
+        {
+                .start = SPORT0_TCR1,
+                .end = SPORT0_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT0_RX,
+                .end = IRQ_SPORT0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT0_ERROR,
+                .end = IRQ_SPORT0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport0_peripherals[] = {
+        P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
+        P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
+};
+
 static struct platform_device bfin_sport0_uart_device = {
         .name = "bfin-sport-uart",
         .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
+        .resource = bfin_sport0_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+static struct resource bfin_sport1_uart_resources[] = {
+        {
+                .start = SPORT1_TCR1,
+                .end = SPORT1_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT1_RX,
+                .end = IRQ_SPORT1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT1_ERROR,
+                .end = IRQ_SPORT1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport1_peripherals[] = {
+        P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
+        P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 };
 
 static struct platform_device bfin_sport1_uart_device = {
         .name = "bfin-sport-uart",
         .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
+        .resource = bfin_sport1_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 static struct resource isp1362_hcd_resources[] = {
@@ -432,7 +520,9 @@ static struct platform_device *cm_bf533_devices[] __initdata = {
         &bfin_dpmc,
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-        &bfin_uart_device,
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
 #endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -442,9 +532,13 @@ static struct platform_device *cm_bf533_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
         &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
         &bfin_sport1_uart_device,
 #endif
+#endif
 
 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
         &rtc_device,
@@ -486,3 +580,27 @@ static int __init cm_bf533_init(void)
 }
 
 arch_initcall(cm_bf533_init);
+
+static struct platform_device *cm_bf533_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+        &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+        &bfin_sport1_uart_device,
+#endif
+#endif
+};
+
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(cm_bf533_early_devices,
+                ARRAY_SIZE(cm_bf533_early_devices));
+}
diff --git a/arch/blackfin/mach-bf533/boards/ezkit.c b/arch/blackfin/mach-bf533/boards/ezkit.c
index d4689dcc198..739773cb7fc 100644
--- a/arch/blackfin/mach-bf533/boards/ezkit.c
+++ b/arch/blackfin/mach-bf533/boards/ezkit.c
@@ -222,7 +222,7 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
         .enable_dma = 0,
         .bits_per_word = 16,
@@ -261,7 +261,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
         {
                 .modalias = "ad1836",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
@@ -320,21 +320,50 @@ static struct platform_device bfin_spi0_device = {
 #endif  /* spi master and devices */
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-static struct resource bfin_uart_resources[] = {
+#ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
         {
-                .start = 0xFFC00400,
-                .end = 0xFFC004FF,
+                .start = BFIN_UART_THR,
+                .end = BFIN_UART_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART0_RX,
+                .end = IRQ_UART0_RX + 1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART0_ERROR,
+                .end = IRQ_UART0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART0_TX,
+                .end = CH_UART0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART0_RX,
+                .end = CH_UART0_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
 };
 
-static struct platform_device bfin_uart_device = {
+static struct platform_device bfin_uart0_device = {
         .name = "bfin-uart",
-        .id = 1,
-        .num_resources = ARRAY_SIZE(bfin_uart_resources),
-        .resource = bfin_uart_resources,
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+        .dev = {
+                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
@@ -444,6 +473,30 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 #endif
 };
 
+#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
+static struct platform_device bfin_i2s = {
+        .name = "bfin-i2s",
+        .id = CONFIG_SND_BF5XX_SPORT_NUM,
+        /* TODO: add platform data here */
+};
+#endif
+
+#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
+static struct platform_device bfin_tdm = {
+        .name = "bfin-tdm",
+        .id = CONFIG_SND_BF5XX_SPORT_NUM,
+        /* TODO: add platform data here */
+};
+#endif
+
+#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
+static struct platform_device bfin_ac97 = {
+        .name = "bfin-ac97",
+        .id = CONFIG_SND_BF5XX_SPORT_NUM,
+        /* TODO: add platform data here */
+};
+#endif
+
 static struct platform_device *ezkit_devices[] __initdata = {
 
         &bfin_dpmc,
@@ -471,7 +524,9 @@ static struct platform_device *ezkit_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-        &bfin_uart_device,
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
 #endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -487,6 +542,18 @@ static struct platform_device *ezkit_devices[] __initdata = {
 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
         &i2c_gpio_device,
 #endif
+
+#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
+        &bfin_i2s,
+#endif
+
+#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
+        &bfin_tdm,
+#endif
+
+#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
+        &bfin_ac97,
+#endif
 };
 
 static int __init ezkit_init(void)
@@ -500,3 +567,18 @@ static int __init ezkit_init(void)
 }
 
 arch_initcall(ezkit_init);
+
+static struct platform_device *ezkit_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#endif
+};
+
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(ezkit_early_devices,
+                ARRAY_SIZE(ezkit_early_devices));
+}
diff --git a/arch/blackfin/mach-bf533/boards/ip0x.c b/arch/blackfin/mach-bf533/boards/ip0x.c
index 8ec42ba35b9..7349970db97 100644
--- a/arch/blackfin/mach-bf533/boards/ip0x.c
+++ b/arch/blackfin/mach-bf533/boards/ip0x.c
@@ -19,6 +19,7 @@
 #include <linux/usb/isp1362.h>
 #endif
 #include <asm/irq.h>
+#include <asm/dma.h>
 #include <asm/bfin5xx_spi.h>
 #include <asm/portmux.h>
 
@@ -143,21 +144,50 @@ static struct platform_device spi_bfin_master_device = {
 #endif  /* spi master and devices */
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-static struct resource bfin_uart_resources[] = {
+#ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
         {
-                .start = 0xFFC00400,
-                .end = 0xFFC004FF,
+                .start = BFIN_UART_THR,
+                .end = BFIN_UART_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART0_RX,
+                .end = IRQ_UART0_RX + 1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART0_ERROR,
+                .end = IRQ_UART0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART0_TX,
+                .end = CH_UART0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART0_RX,
+                .end = CH_UART0_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
 };
 
-static struct platform_device bfin_uart_device = {
+static struct platform_device bfin_uart0_device = {
         .name = "bfin-uart",
-        .id = 1,
-        .num_resources = ARRAY_SIZE(bfin_uart_resources),
-        .resource = bfin_uart_resources,
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+        .dev = {
+                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
@@ -241,7 +271,9 @@ static struct platform_device *ip0x_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-        &bfin_uart_device,
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
 #endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -276,3 +308,18 @@ static int __init ip0x_init(void)
 }
 
 arch_initcall(ip0x_init);
+
+static struct platform_device *ip0x_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#endif
+};
+
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(ip0x_early_devices,
+                ARRAY_SIZE(ip0x_early_devices));
+}
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c
index 6d68dcfa2da..c457eaa6023 100644
--- a/arch/blackfin/mach-bf533/boards/stamp.c
+++ b/arch/blackfin/mach-bf533/boards/stamp.c
@@ -184,7 +184,7 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
         .enable_dma = 0,
         .bits_per_word = 16,
@@ -251,7 +251,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
         {
                 .modalias = "ad1836",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
@@ -322,21 +322,50 @@ static struct platform_device bfin_spi0_device = {
 #endif  /* spi master and devices */
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-static struct resource bfin_uart_resources[] = {
+#ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
         {
-                .start = 0xFFC00400,
-                .end = 0xFFC004FF,
+                .start = BFIN_UART_THR,
+                .end = BFIN_UART_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART0_RX,
+                .end = IRQ_UART0_RX + 1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART0_ERROR,
+                .end = IRQ_UART0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART0_TX,
+                .end = CH_UART0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART0_RX,
+                .end = CH_UART0_RX,
+                .flags = IORESOURCE_DMA,
+        },
 };
 
-static struct platform_device bfin_uart_device = {
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
+};
+
+static struct platform_device bfin_uart0_device = {
         .name = "bfin-uart",
-        .id = 1,
-        .num_resources = ARRAY_SIZE(bfin_uart_resources),
-        .resource = bfin_uart_resources,
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+        .dev = {
+                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
@@ -368,16 +397,75 @@ static struct platform_device bfin_sir0_device = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+static struct resource bfin_sport0_uart_resources[] = {
+        {
+                .start = SPORT0_TCR1,
+                .end = SPORT0_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT0_RX,
+                .end = IRQ_SPORT0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT0_ERROR,
+                .end = IRQ_SPORT0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport0_peripherals[] = {
+        P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
+        P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
+};
+
 static struct platform_device bfin_sport0_uart_device = {
         .name = "bfin-sport-uart",
         .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
+        .resource = bfin_sport0_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+static struct resource bfin_sport1_uart_resources[] = {
+        {
+                .start = SPORT1_TCR1,
+                .end = SPORT1_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT1_RX,
+                .end = IRQ_SPORT1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT1_ERROR,
+                .end = IRQ_SPORT1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport1_peripherals[] = {
+        P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
+        P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 };
 
 static struct platform_device bfin_sport1_uart_device = {
         .name = "bfin-sport-uart",
         .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
+        .resource = bfin_sport1_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 #include <linux/input.h>
@@ -474,6 +562,30 @@ static struct platform_device bfin_dpmc = {
         },
 };
 
+#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
+static struct platform_device bfin_i2s = {
+        .name = "bfin-i2s",
+        .id = CONFIG_SND_BF5XX_SPORT_NUM,
+        /* TODO: add platform data here */
+};
+#endif
+
+#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
+static struct platform_device bfin_tdm = {
+        .name = "bfin-tdm",
+        .id = CONFIG_SND_BF5XX_SPORT_NUM,
+        /* TODO: add platform data here */
+};
+#endif
+
+#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
+static struct platform_device bfin_ac97 = {
+        .name = "bfin-ac97",
+        .id = CONFIG_SND_BF5XX_SPORT_NUM,
+        /* TODO: add platform data here */
+};
+#endif
+
 static struct platform_device *stamp_devices[] __initdata = {
 
         &bfin_dpmc,
@@ -495,7 +607,9 @@ static struct platform_device *stamp_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-        &bfin_uart_device,
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
 #endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -505,9 +619,13 @@ static struct platform_device *stamp_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
         &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
         &bfin_sport1_uart_device,
 #endif
+#endif
 
 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
         &bfin_device_gpiokeys,
@@ -520,6 +638,18 @@ static struct platform_device *stamp_devices[] __initdata = {
 #if defined(CONFIG_MTD_BFIN_ASYNC) || defined(CONFIG_MTD_BFIN_ASYNC_MODULE)
         &stamp_flash_device,
 #endif
+
+#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
+        &bfin_i2s,
+#endif
+
+#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
+        &bfin_tdm,
+#endif
+
+#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
+        &bfin_ac97,
+#endif
 };
 
 static int __init stamp_init(void)
@@ -548,6 +678,30 @@ static int __init stamp_init(void)
 
 arch_initcall(stamp_init);
 
+static struct platform_device *stamp_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+        &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+        &bfin_sport1_uart_device,
+#endif
+#endif
+};
+
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(stamp_early_devices,
+                ARRAY_SIZE(stamp_early_devices));
+}
+
 void native_machine_restart(char *cmd)
 {
         /* workaround pull up on cpld / flash pin not being strong enough */
diff --git a/arch/blackfin/mach-bf533/include/mach/irq.h b/arch/blackfin/mach-bf533/include/mach/irq.h
index c31498be0bb..1f7e9765d95 100644
--- a/arch/blackfin/mach-bf533/include/mach/irq.h
+++ b/arch/blackfin/mach-bf533/include/mach/irq.h
@@ -104,7 +104,8 @@ Core        Emulation               **
 
 #define GPIO_IRQ_BASE           IRQ_PF0
 
-#define NR_IRQS         (IRQ_PF15+1)
+#define NR_MACH_IRQS            (IRQ_PF15 + 1)
+#define NR_IRQS                 (NR_MACH_IRQS + NR_SPARE_IRQS)
 
 #define IVG7                    7
 #define IVG8                    8
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537e.c b/arch/blackfin/mach-bf537/boards/cm_bf537e.c
index c85f4d77053..d35fc5fe4c2 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537e.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537e.c
@@ -73,7 +73,7 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
         .enable_dma = 0,
         .bits_per_word = 16,
@@ -112,7 +112,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
         {
                 .modalias = "ad1836",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
@@ -329,8 +329,8 @@ static struct platform_device cm_flash_device = {
 #ifdef CONFIG_SERIAL_BFIN_UART0
 static struct resource bfin_uart0_resources[] = {
         {
-                .start = 0xFFC00400,
-                .end = 0xFFC004FF,
+                .start = UART0_THR,
+                .end = UART0_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
         {
@@ -373,18 +373,25 @@ static struct resource bfin_uart0_resources[] = {
 #endif
 };
 
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
+};
+
 static struct platform_device bfin_uart0_device = {
         .name = "bfin-uart",
         .id = 0,
         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
         .resource = bfin_uart0_resources,
+        .dev = {
+                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
+        },
 };
 #endif
 #ifdef CONFIG_SERIAL_BFIN_UART1
 static struct resource bfin_uart1_resources[] = {
         {
-                .start = 0xFFC02000,
-                .end = 0xFFC020FF,
+                .start = UART1_THR,
+                .end = UART1_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
         {
@@ -427,11 +434,18 @@ static struct resource bfin_uart1_resources[] = {
 #endif
 };
 
+unsigned short bfin_uart1_peripherals[] = {
+        P_UART1_TX, P_UART1_RX, 0
+};
+
 static struct platform_device bfin_uart1_device = {
         .name = "bfin-uart",
         .id = 1,
         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
         .resource = bfin_uart1_resources,
+        .dev = {
+                .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
+        },
 };
 #endif
 #endif
@@ -512,16 +526,75 @@ static struct platform_device i2c_bfin_twi_device = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+static struct resource bfin_sport0_uart_resources[] = {
+        {
+                .start = SPORT0_TCR1,
+                .end = SPORT0_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT0_RX,
+                .end = IRQ_SPORT0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT0_ERROR,
+                .end = IRQ_SPORT0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport0_peripherals[] = {
+        P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
+        P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
+};
+
 static struct platform_device bfin_sport0_uart_device = {
         .name = "bfin-sport-uart",
         .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
+        .resource = bfin_sport0_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+static struct resource bfin_sport1_uart_resources[] = {
+        {
+                .start = SPORT1_TCR1,
+                .end = SPORT1_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT1_RX,
+                .end = IRQ_SPORT1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT1_ERROR,
+                .end = IRQ_SPORT1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport1_peripherals[] = {
+        P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
+        P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 };
 
 static struct platform_device bfin_sport1_uart_device = {
         .name = "bfin-sport-uart",
         .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
+        .resource = bfin_sport1_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 static struct platform_device bfin_mii_bus = {
@@ -633,9 +706,13 @@ static struct platform_device *cm_bf537e_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
         &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
         &bfin_sport1_uart_device,
 #endif
+#endif
 
 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
         &isp1362_hcd_device,
@@ -683,6 +760,33 @@ static int __init cm_bf537e_init(void)
 
 arch_initcall(cm_bf537e_init);
 
+static struct platform_device *cm_bf537e_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+        &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+        &bfin_sport1_uart_device,
+#endif
+#endif
+};
+
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(cm_bf537e_early_devices,
+                ARRAY_SIZE(cm_bf537e_early_devices));
+}
+
 void bfin_get_ether_addr(char *addr)
 {
         random_ether_addr(addr);
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537u.c b/arch/blackfin/mach-bf537/boards/cm_bf537u.c
index ea11aa81340..d464ad5b72b 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537u.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537u.c
@@ -74,7 +74,7 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
         .enable_dma = 0,
         .bits_per_word = 16,
@@ -113,7 +113,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
         {
                 .modalias = "ad1836",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
@@ -327,25 +327,93 @@ static struct platform_device cm_flash_device = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-static struct resource bfin_uart_resources[] = {
+#ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
         {
-                .start = 0xFFC00400,
-                .end = 0xFFC004FF,
+                .start = UART0_THR,
+                .end = UART0_GCTL+2,
                 .flags = IORESOURCE_MEM,
-        }, {
-                .start = 0xFFC02000,
-                .end = 0xFFC020FF,
+        },
+        {
+                .start = IRQ_UART0_RX,
+                .end = IRQ_UART0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART0_ERROR,
+                .end = IRQ_UART0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART0_TX,
+                .end = CH_UART0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART0_RX,
+                .end = CH_UART0_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
+};
+
+static struct platform_device bfin_uart0_device = {
+        .name = "bfin-uart",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+        .dev = {
+                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+static struct resource bfin_uart1_resources[] = {
+        {
+                .start = UART1_THR,
+                .end = UART1_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART1_RX,
+                .end = IRQ_UART1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART1_ERROR,
+                .end = IRQ_UART1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART1_TX,
+                .end = CH_UART1_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART1_RX,
+                .end = CH_UART1_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart1_peripherals[] = {
+        P_UART1_TX, P_UART1_RX, 0
 };
 
-static struct platform_device bfin_uart_device = {
+static struct platform_device bfin_uart1_device = {
         .name = "bfin-uart",
         .id = 1,
-        .num_resources = ARRAY_SIZE(bfin_uart_resources),
-        .resource = bfin_uart_resources,
+        .num_resources = ARRAY_SIZE(bfin_uart1_resources),
+        .resource = bfin_uart1_resources,
+        .dev = {
+                .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
@@ -423,16 +491,75 @@ static struct platform_device i2c_bfin_twi_device = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+static struct resource bfin_sport0_uart_resources[] = {
+        {
+                .start = SPORT0_TCR1,
+                .end = SPORT0_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT0_RX,
+                .end = IRQ_SPORT0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT0_ERROR,
+                .end = IRQ_SPORT0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport0_peripherals[] = {
+        P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
+        P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
+};
+
 static struct platform_device bfin_sport0_uart_device = {
         .name = "bfin-sport-uart",
         .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
+        .resource = bfin_sport0_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+static struct resource bfin_sport1_uart_resources[] = {
+        {
+                .start = SPORT1_TCR1,
+                .end = SPORT1_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT1_RX,
+                .end = IRQ_SPORT1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT1_ERROR,
+                .end = IRQ_SPORT1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport1_peripherals[] = {
+        P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
+        P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 };
 
 static struct platform_device bfin_sport1_uart_device = {
         .name = "bfin-sport-uart",
         .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
+        .resource = bfin_sport1_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 static struct platform_device bfin_mii_bus = {
@@ -522,7 +649,12 @@ static struct platform_device *cm_bf537u_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-        &bfin_uart_device,
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
 #endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -539,9 +671,13 @@ static struct platform_device *cm_bf537u_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
         &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
         &bfin_sport1_uart_device,
 #endif
+#endif
 
 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
         &isp1362_hcd_device,
@@ -589,6 +725,33 @@ static int __init cm_bf537u_init(void)
 
 arch_initcall(cm_bf537u_init);
 
+static struct platform_device *cm_bf537u_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+        &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+        &bfin_sport1_uart_device,
+#endif
+#endif
+};
+
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(cm_bf537u_early_devices,
+                ARRAY_SIZE(cm_bf537u_early_devices));
+}
+
 void bfin_get_ether_addr(char *addr)
 {
         random_ether_addr(addr);
diff --git a/arch/blackfin/mach-bf537/boards/minotaur.c b/arch/blackfin/mach-bf537/boards/minotaur.c
index 0da92725270..c489d602c59 100644
--- a/arch/blackfin/mach-bf537/boards/minotaur.c
+++ b/arch/blackfin/mach-bf537/boards/minotaur.c
@@ -211,25 +211,93 @@ static struct platform_device bfin_spi0_device = {
 #endif  /* spi master and devices */
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-static struct resource bfin_uart_resources[] = {
+#ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
         {
-                .start = 0xFFC00400,
-                .end = 0xFFC004FF,
+                .start = UART0_THR,
+                .end = UART0_GCTL+2,
                 .flags = IORESOURCE_MEM,
-        }, {
-                .start = 0xFFC02000,
-                .end = 0xFFC020FF,
+        },
+        {
+                .start = IRQ_UART0_RX,
+                .end = IRQ_UART0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART0_ERROR,
+                .end = IRQ_UART0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART0_TX,
+                .end = CH_UART0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART0_RX,
+                .end = CH_UART0_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
+};
+
+static struct platform_device bfin_uart0_device = {
+        .name = "bfin-uart",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+        .dev = {
+                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+static struct resource bfin_uart1_resources[] = {
+        {
+                .start = UART1_THR,
+                .end = UART1_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART1_RX,
+                .end = IRQ_UART1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART1_ERROR,
+                .end = IRQ_UART1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART1_TX,
+                .end = CH_UART1_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART1_RX,
+                .end = CH_UART1_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart1_peripherals[] = {
+        P_UART1_TX, P_UART1_RX, 0
 };
 
-static struct platform_device bfin_uart_device = {
+static struct platform_device bfin_uart1_device = {
         .name = "bfin-uart",
         .id = 1,
-        .num_resources = ARRAY_SIZE(bfin_uart_resources),
-        .resource = bfin_uart_resources,
+        .num_resources = ARRAY_SIZE(bfin_uart1_resources),
+        .resource = bfin_uart1_resources,
+        .dev = {
+                .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
@@ -309,16 +377,75 @@ static struct platform_device i2c_bfin_twi_device = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+static struct resource bfin_sport0_uart_resources[] = {
+        {
+                .start = SPORT0_TCR1,
+                .end = SPORT0_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT0_RX,
+                .end = IRQ_SPORT0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT0_ERROR,
+                .end = IRQ_SPORT0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport0_peripherals[] = {
+        P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
+        P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
+};
+
 static struct platform_device bfin_sport0_uart_device = {
         .name = "bfin-sport-uart",
         .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
+        .resource = bfin_sport0_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+static struct resource bfin_sport1_uart_resources[] = {
+        {
+                .start = SPORT1_TCR1,
+                .end = SPORT1_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT1_RX,
+                .end = IRQ_SPORT1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT1_ERROR,
+                .end = IRQ_SPORT1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport1_peripherals[] = {
+        P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
+        P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 };
 
 static struct platform_device bfin_sport1_uart_device = {
         .name = "bfin-sport-uart",
         .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
+        .resource = bfin_sport1_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 static struct platform_device *minotaur_devices[] __initdata = {
 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
@@ -343,7 +470,12 @@ static struct platform_device *minotaur_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-        &bfin_uart_device,
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
 #endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -360,9 +492,13 @@ static struct platform_device *minotaur_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
         &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
         &bfin_sport1_uart_device,
 #endif
+#endif
 
 };
 
@@ -380,6 +516,33 @@ static int __init minotaur_init(void)
 
 arch_initcall(minotaur_init);
 
+static struct platform_device *minotaur_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+        &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+        &bfin_sport1_uart_device,
+#endif
+#endif
+};
+
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(minotaur_early_devices,
+                ARRAY_SIZE(minotaur_early_devices));
+}
+
 void native_machine_restart(char *cmd)
 {
         /* workaround reboot hang when booting from SPI */
diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c
index 4e0afda472a..812e8f99160 100644
--- a/arch/blackfin/mach-bf537/boards/pnav10.c
+++ b/arch/blackfin/mach-bf537/boards/pnav10.c
@@ -17,7 +17,6 @@
 #include <asm/dma.h>
 #include <asm/bfin5xx_spi.h>
 #include <asm/portmux.h>
-#include <linux/usb/sl811.h>
 
 #include <linux/spi/ad7877.h>
 
@@ -99,51 +98,6 @@ static struct platform_device smc91x_device = {
 };
 #endif
 
-#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
-static struct resource sl811_hcd_resources[] = {
-        {
-                .start = 0x20340000,
-                .end = 0x20340000,
-                .flags = IORESOURCE_MEM,
-        }, {
-                .start = 0x20340004,
-                .end = 0x20340004,
-                .flags = IORESOURCE_MEM,
-        }, {
-                .start = CONFIG_USB_SL811_BFIN_IRQ,
-                .end = CONFIG_USB_SL811_BFIN_IRQ,
-                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
-        },
-};
-
-#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
-void sl811_port_power(struct device *dev, int is_on)
-{
-        gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
-        gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
-
-}
-#endif
-
-static struct sl811_platform_data sl811_priv = {
-        .potpg = 10,
-        .power = 250,       /* == 500mA */
-#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
-        .port_power = &sl811_port_power,
-#endif
-};
-
-static struct platform_device sl811_hcd_device = {
-        .name = "sl811-hcd",
-        .id = 0,
-        .dev = {
-                .platform_data = &sl811_priv,
-        },
-        .num_resources = ARRAY_SIZE(sl811_hcd_resources),
-        .resource = sl811_hcd_resources,
-};
-#endif
-
 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 static struct platform_device bfin_mii_bus = {
         .name = "bfin_mii_bus",
@@ -221,8 +175,8 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) \
-        || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) \
+        || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
         .enable_dma = 0,
         .bits_per_word = 16,
@@ -284,8 +238,8 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) \
-        || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) \
+        || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
         {
                 .modalias = "ad1836",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
@@ -362,25 +316,93 @@ static struct platform_device bfin_fb_device = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-static struct resource bfin_uart_resources[] = {
+#ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
         {
-                .start = 0xFFC00400,
-                .end = 0xFFC004FF,
+                .start = UART0_THR,
+                .end = UART0_GCTL+2,
                 .flags = IORESOURCE_MEM,
-        }, {
-                .start = 0xFFC02000,
-                .end = 0xFFC020FF,
+        },
+        {
+                .start = IRQ_UART0_RX,
+                .end = IRQ_UART0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART0_ERROR,
+                .end = IRQ_UART0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART0_TX,
+                .end = CH_UART0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART0_RX,
+                .end = CH_UART0_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
+};
+
+static struct platform_device bfin_uart0_device = {
+        .name = "bfin-uart",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+        .dev = {
+                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+static struct resource bfin_uart1_resources[] = {
+        {
+                .start = UART1_THR,
+                .end = UART1_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART1_RX,
+                .end = IRQ_UART1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART1_ERROR,
+                .end = IRQ_UART1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART1_TX,
+                .end = CH_UART1_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART1_RX,
+                .end = CH_UART1_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart1_peripherals[] = {
+        P_UART1_TX, P_UART1_RX, 0
 };
 
-static struct platform_device bfin_uart_device = {
+static struct platform_device bfin_uart1_device = {
         .name = "bfin-uart",
         .id = 1,
-        .num_resources = ARRAY_SIZE(bfin_uart_resources),
-        .resource = bfin_uart_resources,
+        .num_resources = ARRAY_SIZE(bfin_uart1_resources),
+        .resource = bfin_uart1_resources,
+        .dev = {
+                .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
@@ -446,10 +468,6 @@ static struct platform_device *stamp_devices[] __initdata = {
         &rtc_device,
 #endif
 
-#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
-        &sl811_hcd_device,
-#endif
-
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
         &smc91x_device,
 #endif
@@ -472,7 +490,12 @@ static struct platform_device *stamp_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-        &bfin_uart_device,
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
 #endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -498,6 +521,24 @@ static int __init pnav_init(void)
 
 arch_initcall(pnav_init);
 
+static struct platform_device *stamp_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
+#endif
+};
+
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(stamp_early_devices,
+                ARRAY_SIZE(stamp_early_devices));
+}
+
 void bfin_get_ether_addr(char *addr)
 {
         random_ether_addr(addr);
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index ac9b52e0087..9eaf5b05c11 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -20,10 +20,12 @@
 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 #include <linux/usb/isp1362.h>
 #endif
+#include <linux/i2c.h>
+#include <linux/i2c/adp5588.h>
+#include <linux/etherdevice.h>
 #include <linux/ata_platform.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
-#include <linux/i2c.h>
 #include <linux/usb/sl811.h>
 #include <linux/spi/mmc_spi.h>
 #include <linux/leds.h>
@@ -33,6 +35,14 @@
 #include <asm/reboot.h>
 #include <asm/portmux.h>
 #include <asm/dpmc.h>
+#ifdef CONFIG_REGULATOR_ADP_SWITCH
+#include <linux/regulator/adp_switch.h>
+#endif
+#ifdef CONFIG_REGULATOR_AD5398
+#include <linux/regulator/ad5398.h>
+#endif
+#include <linux/regulator/consumer.h>
+#include <linux/regulator/userspace-consumer.h>
 
 /*
  * Name the Board for the /proc/cpuinfo
@@ -208,8 +218,8 @@ static struct resource sl811_hcd_resources[] = {
                 .end = 0x20340004,
                 .flags = IORESOURCE_MEM,
         }, {
-                .start = CONFIG_USB_SL811_BFIN_IRQ,
-                .end = CONFIG_USB_SL811_BFIN_IRQ,
+                .start = IRQ_PF4,
+                .end = IRQ_PF4,
                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
         },
 };
@@ -454,6 +464,9 @@ static struct physmap_flash_data stamp_flash_data = {
         .width      = 2,
         .parts      = stamp_partitions,
         .nr_parts   = ARRAY_SIZE(stamp_partitions),
+#ifdef CONFIG_ROMKERNEL
+        .probe_type = "map_rom",
+#endif
 };
 
 static struct resource stamp_flash_resource = {
@@ -515,20 +528,19 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
-        || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
+#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
+        || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
         .enable_dma = 0,
         .bits_per_word = 16,
 };
 #endif
 
-#if defined(CONFIG_SND_BF5XX_SOC_AD1938) \
-        || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE)
+#if defined(CONFIG_SND_BF5XX_SOC_AD193X) \
+        || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
 static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
         .enable_dma = 0,
         .bits_per_word = 8,
-        .cs_gpio = GPIO_PF5,
 };
 #endif
 
@@ -644,6 +656,42 @@ static struct ad714x_platform_data ad7142_i2c_platform_data = {
 };
 #endif
 
+#if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
+static struct bfin5xx_spi_chip ad2s90_spi_chip_info = {
+        .enable_dma = 0,
+        .bits_per_word = 16,
+};
+#endif
+
+#if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
+unsigned short ad2s120x_platform_data[] = {
+        /* used as SAMPLE and RDVEL */
+        GPIO_PF5, GPIO_PF6, 0
+};
+
+static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = {
+        .enable_dma = 0,
+        .bits_per_word = 16,
+};
+#endif
+
+#if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
+unsigned short ad2s1210_platform_data[] = {
+        /* use as SAMPLE, A0, A1 */
+        GPIO_PF7, GPIO_PF8, GPIO_PF9,
+# if defined(CONFIG_AD2S1210_GPIO_INPUT) || defined(CONFIG_AD2S1210_GPIO_OUTPUT)
+        /* the RES0 and RES1 pins */
+        GPIO_PF4, GPIO_PF5,
+# endif
+        0,
+};
+
+static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = {
+        .enable_dma = 0,
+        .bits_per_word = 8,
+};
+#endif
+
 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 #define MMC_SPI_CARD_DETECT_INT IRQ_PF5
 
@@ -686,11 +734,11 @@ static const struct ad7877_platform_data bfin_ad7877_ts_info = {
         .y_plate_ohms           = 486,
         .pressure_max           = 1000,
         .pressure_min           = 0,
-        .stopacq_polarity       = 1,
-        .first_conversion_delay = 3,
-        .acquisition_time       = 1,
-        .averaging              = 1,
-        .pen_down_acc_interval  = 1,
+        .stopacq_polarity       = 1,
+        .first_conversion_delay = 3,
+        .acquisition_time       = 1,
+        .averaging              = 1,
+        .pen_down_acc_interval  = 1,
 };
 #endif
 
@@ -701,13 +749,13 @@ static const struct ad7879_platform_data bfin_ad7879_ts_info = {
         .x_plate_ohms           = 620,  /* 620 Ohm from the touch datasheet */
         .pressure_max           = 10000,
         .pressure_min           = 0,
-        .first_conversion_delay = 3,    /* wait 512us before do a first conversion */
-        .acquisition_time       = 1,    /* 4us acquisition time per sample */
+        .first_conversion_delay = 3,    /* wait 512us before do a first conversion */
+        .acquisition_time       = 1,    /* 4us acquisition time per sample */
         .median                 = 2,    /* do 8 measurements */
-        .averaging              = 1,    /* take the average of 4 middle samples */
-        .pen_down_acc_interval  = 255,  /* 9.4 ms */
-        .gpio_output            = 1,    /* configure AUX/VBAT/GPIO as GPIO output */
-        .gpio_default           = 1,    /* During initialization set GPIO = HIGH */
+        .averaging              = 1,    /* take the average of 4 middle samples */
+        .pen_down_acc_interval  = 255,  /* 9.4 ms */
+        .gpio_export            = 1,    /* Export GPIO to gpiolib */
+        .gpio_base              = -1,   /* Dynamic allocation */
 };
 #endif
 
@@ -742,6 +790,11 @@ static const struct adxl34x_platform_data adxl34x_info = {
 /*      .ev_code_act_inactivity = KEY_A,*/      /* EV_KEY */
         .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
         .fifo_mode = ADXL_FIFO_STREAM,
+        .orientation_enable = ADXL_EN_ORIENTATION_3D,
+        .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
+        .divisor_length =  ADXL_LP_FILTER_DIVISOR_16,
+        /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
+        .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
 };
 #endif
 
@@ -813,6 +866,35 @@ static struct adf702x_platform_data adf7021_platform_data = {
         .adf702x_regs = adf7021_regs,
         .tx_reg = TXREG,
 };
+static inline void adf702x_mac_init(void)
+{
+        random_ether_addr(adf7021_platform_data.mac_addr);
+}
+#else
+static inline void adf702x_mac_init(void) {}
+#endif
+
+#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
+#include <linux/spi/ads7846.h>
+static struct bfin5xx_spi_chip ad7873_spi_chip_info = {
+        .bits_per_word  = 8,
+};
+
+static int ads7873_get_pendown_state(void)
+{
+        return gpio_get_value(GPIO_PF6);
+}
+
+static struct ads7846_platform_data __initdata ad7873_pdata = {
+        .model          = 7873,         /* AD7873 */
+        .x_max          = 0xfff,
+        .y_max          = 0xfff,
+        .x_plate_ohms   = 620,
+        .debounce_max   = 1,
+        .debounce_rep   = 0,
+        .debounce_tol   = (~0),
+        .get_pendown_state = ads7873_get_pendown_state,
+};
 #endif
 
 #if defined(CONFIG_MTD_DATAFLASH) \
@@ -893,24 +975,25 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
-        || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
+#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
+        || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
         {
-                .modalias = "ad1836",
+                .modalias = "ad183x",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
                 .bus_num = 0,
                 .chip_select = 4,/* CONFIG_SND_BLACKFIN_SPI_PFBIT */
+                .platform_data = "ad1836", /* only includes chip name for the moment */
                 .controller_data = &ad1836_spi_chip_info,
                 .mode = SPI_MODE_3,
         },
 #endif
 
-#if defined(CONFIG_SND_BF5XX_SOC_AD1938) || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE)
+#if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
         {
-                .modalias = "ad1938",
+                .modalias = "ad193x",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
                 .bus_num = 0,
-                .chip_select = 0,/* CONFIG_SND_BLACKFIN_SPI_PFBIT */
+                .chip_select = 5,
                 .controller_data = &ad1938_spi_chip_info,
                 .mode = SPI_MODE_3,
         },
@@ -929,6 +1012,37 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
+#if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
+        {
+                .modalias = "ad2s90",
+                .bus_num = 0,
+                .chip_select = 3,            /* change it for your board */
+                .platform_data = NULL,
+                .controller_data = &ad2s90_spi_chip_info,
+        },
+#endif
+
+#if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
+        {
+                .modalias = "ad2s120x",
+                .bus_num = 0,
+                .chip_select = 4,            /* CS, change it for your board */
+                .platform_data = ad2s120x_platform_data,
+                .controller_data = &ad2s120x_spi_chip_info,
+        },
+#endif
+
+#if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
+        {
+                .modalias = "ad2s1210",
+                .max_speed_hz = 8192000,
+                .bus_num = 0,
+                .chip_select = 4,            /* CS, change it for your board */
+                .platform_data = ad2s1210_platform_data,
+                .controller_data = &ad2s1210_spi_chip_info,
+        },
+#endif
+
 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
         {
                 .modalias = "mmc_spi",
@@ -1016,7 +1130,18 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
                 .mode = SPI_MODE_0,
         },
 #endif
-
+#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
+        {
+                .modalias = "ads7846",
+                .max_speed_hz = 2000000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num = 0,
+                .irq = IRQ_PF6,
+                .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
+                .controller_data = &ad7873_spi_chip_info,
+                .platform_data = &ad7873_pdata,
+                .mode = SPI_MODE_0,
+        },
+#endif
 };
 
 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
@@ -1132,9 +1257,10 @@ static struct platform_device bfin_fb_device = {
 #include <asm/bfin-lq035q1.h>
 
 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
-        .mode =         LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
-        .use_bl =       0,      /* let something else control the LCD Blacklight */
-        .gpio_bl =      GPIO_PF7,
+        .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
+        .ppi_mode = USE_RGB565_16_BIT_PPI,
+        .use_bl = 0,    /* let something else control the LCD Blacklight */
+        .gpio_bl = GPIO_PF7,
 };
 
 static struct resource bfin_lq035q1_resources[] = {
@@ -1148,8 +1274,8 @@ static struct resource bfin_lq035q1_resources[] = {
 static struct platform_device bfin_lq035q1_device = {
         .name           = "bfin-lq035q1",
         .id             = -1,
-        .num_resources  = ARRAY_SIZE(bfin_lq035q1_resources),
-        .resource       = bfin_lq035q1_resources,
+        .num_resources  = ARRAY_SIZE(bfin_lq035q1_resources),
+        .resource       = bfin_lq035q1_resources,
         .dev            = {
                 .platform_data = &bfin_lq035q1_data,
         },
@@ -1157,30 +1283,105 @@ static struct platform_device bfin_lq035q1_device = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-static struct resource bfin_uart_resources[] = {
 #ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
         {
-                .start = 0xFFC00400,
-                .end = 0xFFC004FF,
+                .start = UART0_THR,
+                .end = UART0_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART0_RX,
+                .end = IRQ_UART0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART0_ERROR,
+                .end = IRQ_UART0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART0_TX,
+                .end = CH_UART0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART0_RX,
+                .end = CH_UART0_RX,
+                .flags = IORESOURCE_DMA,
+        },
+#ifdef CONFIG_BFIN_UART0_CTSRTS
+        {       /* CTS pin */
+                .start = GPIO_PG7,
+                .end = GPIO_PG7,
+                .flags = IORESOURCE_IO,
+        },
+        {       /* RTS pin */
+                .start = GPIO_PG6,
+                .end = GPIO_PG6,
+                .flags = IORESOURCE_IO,
+        },
+#endif
+};
+
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
+};
+
+static struct platform_device bfin_uart0_device = {
+        .name = "bfin-uart",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+        .dev = {
+                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
+        },
+};
 #endif
 #ifdef CONFIG_SERIAL_BFIN_UART1
+static struct resource bfin_uart1_resources[] = {
         {
-                .start = 0xFFC02000,
-                .end = 0xFFC020FF,
+                .start = UART1_THR,
+                .end = UART1_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
-#endif
+        {
+                .start = IRQ_UART1_RX,
+                .end = IRQ_UART1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART1_ERROR,
+                .end = IRQ_UART1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART1_TX,
+                .end = CH_UART1_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART1_RX,
+                .end = CH_UART1_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart1_peripherals[] = {
+        P_UART1_TX, P_UART1_RX, 0
 };
 
-static struct platform_device bfin_uart_device = {
+static struct platform_device bfin_uart1_device = {
         .name = "bfin-uart",
         .id = 1,
-        .num_resources = ARRAY_SIZE(bfin_uart_resources),
-        .resource = bfin_uart_resources,
+        .num_resources = ARRAY_SIZE(bfin_uart1_resources),
+        .resource = bfin_uart1_resources,
+        .dev = {
+                .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
@@ -1260,7 +1461,6 @@ static struct platform_device i2c_bfin_twi_device = {
 #endif
 
 #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
-#include <linux/i2c/adp5588.h>
 static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
         [0]      = KEY_GRAVE,
         [1]      = KEY_1,
@@ -1457,7 +1657,6 @@ static struct adp5520_platform_data adp5520_pdev_data = {
 #endif
 
 #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
-#include <linux/i2c/adp5588.h>
 static struct adp5588_gpio_platform_data adp5588_gpio_data = {
         .gpio_start = 50,
         .pullup_dis_mask = 0,
@@ -1516,6 +1715,101 @@ static struct adp8870_backlight_platform_data adp8870_pdata = {
 };
 #endif
 
+#if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
+#include <linux/i2c/adp8860.h>
+static struct led_info adp8860_leds[] = {
+        {
+                .name = "adp8860-led7",
+                .default_trigger = "none",
+                .flags = ADP8860_LED_D7 | ADP8860_LED_OFFT_600ms,
+        },
+};
+
+static struct adp8860_backlight_platform_data adp8860_pdata = {
+        .bl_led_assign = ADP8860_BL_D1 | ADP8860_BL_D2 | ADP8860_BL_D3 |
+                         ADP8860_BL_D4 | ADP8860_BL_D5 | ADP8860_BL_D6, /* 1 = Backlight 0 = Individual LED */
+
+        .bl_fade_in = ADP8860_FADE_T_1200ms,            /* Backlight Fade-In Timer */
+        .bl_fade_out = ADP8860_FADE_T_1200ms,           /* Backlight Fade-Out Timer */
+        .bl_fade_law = ADP8860_FADE_LAW_CUBIC1,         /* fade-on/fade-off transfer characteristic */
+
+        .en_ambl_sens = 1,                              /* 1 = enable ambient light sensor */
+        .abml_filt = ADP8860_BL_AMBL_FILT_320ms,        /* Light sensor filter time */
+
+        .l1_daylight_max = ADP8860_BL_CUR_mA(20),       /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
+        .l1_daylight_dim = ADP8860_BL_CUR_mA(0),        /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
+        .l2_office_max = ADP8860_BL_CUR_mA(6),          /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
+        .l2_office_dim = ADP8860_BL_CUR_mA(0),          /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
+        .l3_dark_max = ADP8860_BL_CUR_mA(2),            /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
+        .l3_dark_dim = ADP8860_BL_CUR_mA(0),            /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
+
+        .l2_trip = ADP8860_L2_COMP_CURR_uA(710),        /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
+        .l2_hyst = ADP8860_L2_COMP_CURR_uA(73),         /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
+        .l3_trip = ADP8860_L3_COMP_CURR_uA(43),         /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
+        .l3_hyst = ADP8860_L3_COMP_CURR_uA(11),         /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
+
+        .leds = adp8860_leds,
+        .num_leds = ARRAY_SIZE(adp8860_leds),
+        .led_fade_law = ADP8860_FADE_LAW_SQUARE,        /* fade-on/fade-off transfer characteristic */
+        .led_fade_in = ADP8860_FADE_T_600ms,
+        .led_fade_out = ADP8860_FADE_T_600ms,
+        .led_on_time = ADP8860_LED_ONT_200ms,
+};
+#endif
+
+#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
+static struct regulator_consumer_supply ad5398_consumer = {
+        .supply = "current",
+};
+
+static struct regulator_init_data ad5398_regulator_data = {
+        .constraints = {
+                .name = "current range",
+                .max_uA = 120000,
+                .valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS,
+        },
+        .num_consumer_supplies = 1,
+        .consumer_supplies     = &ad5398_consumer,
+};
+
+static struct ad5398_platform_data ad5398_i2c_platform_data = {
+        .current_bits = 10,
+        .current_offset = 4,
+        .regulator_data = &ad5398_regulator_data,
+};
+
+#if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
+        defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
+static struct platform_device ad5398_virt_consumer_device = {
+        .name = "reg-virt-consumer",
+        .id = 0,
+        .dev = {
+                .platform_data = "current", /* Passed to driver */
+        },
+};
+#endif
+#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
+        defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
+static struct regulator_bulk_data ad5398_bulk_data = {
+        .supply = "current",
+};
+
+static struct regulator_userspace_consumer_data ad5398_userspace_comsumer_data = {
+        .name = "ad5398",
+        .num_supplies = 1,
+        .supplies = &ad5398_bulk_data,
+};
+
+static struct platform_device ad5398_userspace_consumer_device = {
+        .name = "reg-userspace-consumer",
+        .id = 0,
+        .dev = {
+                .platform_data = &ad5398_userspace_comsumer_data,
+        },
+};
+#endif
+#endif
+
 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
         {
@@ -1524,6 +1818,52 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
                 .platform_data = (void *)&ad7142_i2c_platform_data,
         },
 #endif
+
+#if defined(CONFIG_AD7150) || defined(CONFIG_AD7150_MODULE)
+        {
+                I2C_BOARD_INFO("ad7150", 0x48),
+                .irq = IRQ_PG5, /* fixme: use real interrupt number */
+        },
+#endif
+
+#if defined(CONFIG_AD7152) || defined(CONFIG_AD7152_MODULE)
+        {
+                I2C_BOARD_INFO("ad7152", 0x48),
+        },
+#endif
+
+#if defined(CONFIG_AD774X) || defined(CONFIG_AD774X_MODULE)
+        {
+                I2C_BOARD_INFO("ad774x", 0x48),
+        },
+#endif
+
+#if defined(CONFIG_AD7414) || defined(CONFIG_AD7414_MODULE)
+        {
+                I2C_BOARD_INFO("ad7414", 0x9),
+                .irq = IRQ_PG5,
+                /*
+                 * platform_data pointer is borrwoed by the driver to
+                 * store custimer defined IRQ ALART level mode.
+                 * only IRQF_TRIGGER_HIGH and IRQF_TRIGGER_LOW are valid.
+                 */
+                .platform_data = (void *)IRQF_TRIGGER_LOW,
+        },
+#endif
+
+#if defined(CONFIG_AD7416) || defined(CONFIG_AD7416_MODULE)
+        {
+                I2C_BOARD_INFO("ad7417", 0xb),
+                .irq = IRQ_PG5,
+                /*
+                 * platform_data pointer is borrwoed by the driver to
+                 * store custimer defined IRQ ALART level mode.
+                 * only IRQF_TRIGGER_HIGH and IRQF_TRIGGER_LOW are valid.
+                 */
+                .platform_data = (void *)IRQF_TRIGGER_LOW,
+        },
+#endif
+
 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
         {
                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
@@ -1595,24 +1935,105 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
                 I2C_BOARD_INFO("adau1761", 0x38),
         },
 #endif
+#if defined(CONFIG_SND_SOC_ADAU1361) || defined(CONFIG_SND_SOC_ADAU1361_MODULE)
+        {
+                I2C_BOARD_INFO("adau1361", 0x38),
+        },
+#endif
 #if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
         {
                 I2C_BOARD_INFO("ad5258", 0x18),
         },
 #endif
+#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
+        {
+                I2C_BOARD_INFO("ssm2602", 0x1b),
+        },
+#endif
+#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
+        {
+                I2C_BOARD_INFO("ad5398", 0xC),
+                .platform_data = (void *)&ad5398_i2c_platform_data,
+        },
+#endif
+#if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
+        {
+                I2C_BOARD_INFO("adp8860", 0x2A),
+                .platform_data = (void *)&adp8860_pdata,
+        },
+#endif
 };
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+static struct resource bfin_sport0_uart_resources[] = {
+        {
+                .start = SPORT0_TCR1,
+                .end = SPORT0_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT0_RX,
+                .end = IRQ_SPORT0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT0_ERROR,
+                .end = IRQ_SPORT0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport0_peripherals[] = {
+        P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
+        P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
+};
+
 static struct platform_device bfin_sport0_uart_device = {
         .name = "bfin-sport-uart",
         .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
+        .resource = bfin_sport0_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+static struct resource bfin_sport1_uart_resources[] = {
+        {
+                .start = SPORT1_TCR1,
+                .end = SPORT1_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT1_RX,
+                .end = IRQ_SPORT1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT1_ERROR,
+                .end = IRQ_SPORT1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport1_peripherals[] = {
+        P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
+        P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 };
 
 static struct platform_device bfin_sport1_uart_device = {
         .name = "bfin-sport-uart",
         .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
+        .resource = bfin_sport1_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
 #define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
@@ -1701,13 +2122,121 @@ static struct platform_device bfin_dpmc = {
         },
 };
 
+#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
+static struct platform_device bfin_i2s = {
+        .name = "bfin-i2s",
+        .id = CONFIG_SND_BF5XX_SPORT_NUM,
+        /* TODO: add platform data here */
+};
+#endif
+
 #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
 static struct platform_device bfin_tdm = {
         .name = "bfin-tdm",
+        .id = CONFIG_SND_BF5XX_SPORT_NUM,
         /* TODO: add platform data here */
 };
 #endif
 
+#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
+static struct platform_device bfin_ac97 = {
+        .name = "bfin-ac97",
+        .id = CONFIG_SND_BF5XX_SPORT_NUM,
+        /* TODO: add platform data here */
+};
+#endif
+
+#if defined(CONFIG_REGULATOR_ADP_SWITCH) || defined(CONFIG_REGULATOR_ADP_SWITCH_MODULE)
+#define REGULATOR_ADP122        "adp122"
+#define REGULATOR_ADP150        "adp150"
+
+static struct regulator_consumer_supply adp122_consumers = {
+                .supply = REGULATOR_ADP122,
+};
+
+static struct regulator_consumer_supply adp150_consumers = {
+                .supply = REGULATOR_ADP150,
+};
+
+static struct regulator_init_data adp_switch_regulator_data[] = {
+        {
+                .constraints = {
+                        .name = REGULATOR_ADP122,
+                        .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+                        .min_uA = 0,
+                        .max_uA = 300000,
+                },
+                .num_consumer_supplies = 1,     /* only 1 */
+                .consumer_supplies     = &adp122_consumers,
+                .driver_data           = (void *)GPIO_PF2, /* gpio port only */
+        },
+        {
+                .constraints = {
+                        .name = REGULATOR_ADP150,
+                        .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+                        .min_uA = 0,
+                        .max_uA = 150000,
+                },
+                .num_consumer_supplies = 1,     /* only 1 */
+                .consumer_supplies     = &adp150_consumers,
+                .driver_data           = (void *)GPIO_PF3, /* gpio port only */
+        },
+};
+
+static struct adp_switch_platform_data adp_switch_pdata = {
+        .regulator_num = ARRAY_SIZE(adp_switch_regulator_data),
+        .regulator_data = adp_switch_regulator_data,
+};
+
+static struct platform_device adp_switch_device = {
+        .name = "adp_switch",
+        .id = 0,
+        .dev = {
+                .platform_data = &adp_switch_pdata,
+        },
+};
+
+#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
+        defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
+static struct regulator_bulk_data adp122_bulk_data = {
+        .supply = REGULATOR_ADP122,
+};
+
+static struct regulator_userspace_consumer_data adp122_userspace_comsumer_data = {
+        .name = REGULATOR_ADP122,
+        .num_supplies = 1,
+        .supplies = &adp122_bulk_data,
+};
+
+static struct platform_device adp122_userspace_consumer_device = {
+        .name = "reg-userspace-consumer",
+        .id = 0,
+        .dev = {
+                .platform_data = &adp122_userspace_comsumer_data,
+        },
+};
+
+static struct regulator_bulk_data adp150_bulk_data = {
+        .supply = REGULATOR_ADP150,
+};
+
+static struct regulator_userspace_consumer_data adp150_userspace_comsumer_data = {
+        .name = REGULATOR_ADP150,
+        .num_supplies = 1,
+        .supplies = &adp150_bulk_data,
+};
+
+static struct platform_device adp150_userspace_consumer_device = {
+        .name = "reg-userspace-consumer",
+        .id = 1,
+        .dev = {
+                .platform_data = &adp150_userspace_comsumer_data,
+        },
+};
+#endif
+#endif
+
+
 static struct platform_device *stamp_devices[] __initdata = {
 
         &bfin_dpmc,
@@ -1771,7 +2300,12 @@ static struct platform_device *stamp_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-        &bfin_uart_device,
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
 #endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -1788,9 +2322,13 @@ static struct platform_device *stamp_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
         &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
         &bfin_sport1_uart_device,
 #endif
+#endif
 
 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
         &bfin_pata_device,
@@ -1808,18 +2346,46 @@ static struct platform_device *stamp_devices[] __initdata = {
         &stamp_flash_device,
 #endif
 
+#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
+        &bfin_i2s,
+#endif
+
 #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
         &bfin_tdm,
 #endif
+
+#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
+        &bfin_ac97,
+#endif
+#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
+#if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
+        defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
+        &ad5398_virt_consumer_device,
+#endif
+#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
+        defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
+        &ad5398_userspace_consumer_device,
+#endif
+#endif
+
+#if defined(CONFIG_REGULATOR_ADP_SWITCH) || defined(CONFIG_REGULATOR_ADP_SWITCH_MODULE)
+        &adp_switch_device,
+#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
+        defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
+        &adp122_userspace_consumer_device,
+        &adp150_userspace_consumer_device,
+#endif
+#endif
 };
 
 static int __init stamp_init(void)
 {
         printk(KERN_INFO "%s(): registering device resources\n", __func__);
-        i2c_register_board_info(0, bfin_i2c_board_info,
-                                ARRAY_SIZE(bfin_i2c_board_info));
         bfin_plat_nand_init();
+        adf702x_mac_init();
         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
+        i2c_register_board_info(0, bfin_i2c_board_info,
+                                ARRAY_SIZE(bfin_i2c_board_info));
         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 
         return 0;
@@ -1827,6 +2393,34 @@ static int __init stamp_init(void)
 
 arch_initcall(stamp_init);
 
+
+static struct platform_device *stamp_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+        &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+        &bfin_sport1_uart_device,
+#endif
+#endif
+};
+
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(stamp_early_devices,
+                ARRAY_SIZE(stamp_early_devices));
+}
+
 void native_machine_restart(char *cmd)
 {
         /* workaround reboot hang when booting from SPI */
diff --git a/arch/blackfin/mach-bf537/boards/tcm_bf537.c b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
index 57163b65a4f..4f0a2e72ce4 100644
--- a/arch/blackfin/mach-bf537/boards/tcm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
@@ -74,7 +74,7 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
         .enable_dma = 0,
         .bits_per_word = 16,
@@ -113,7 +113,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
         {
                 .modalias = "ad1836",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
@@ -327,25 +327,93 @@ static struct platform_device cm_flash_device = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-static struct resource bfin_uart_resources[] = {
+#ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
         {
-                .start = 0xFFC00400,
-                .end = 0xFFC004FF,
+                .start = UART0_THR,
+                .end = UART0_GCTL+2,
                 .flags = IORESOURCE_MEM,
-        }, {
-                .start = 0xFFC02000,
-                .end = 0xFFC020FF,
+        },
+        {
+                .start = IRQ_UART0_RX,
+                .end = IRQ_UART0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART0_ERROR,
+                .end = IRQ_UART0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART0_TX,
+                .end = CH_UART0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART0_RX,
+                .end = CH_UART0_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
+};
+
+static struct platform_device bfin_uart0_device = {
+        .name = "bfin-uart",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+        .dev = {
+                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+static struct resource bfin_uart1_resources[] = {
+        {
+                .start = UART1_THR,
+                .end = UART1_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART1_RX,
+                .end = IRQ_UART1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART1_ERROR,
+                .end = IRQ_UART1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART1_TX,
+                .end = CH_UART1_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART1_RX,
+                .end = CH_UART1_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart1_peripherals[] = {
+        P_UART1_TX, P_UART1_RX, 0
 };
 
-static struct platform_device bfin_uart_device = {
+static struct platform_device bfin_uart1_device = {
         .name = "bfin-uart",
         .id = 1,
-        .num_resources = ARRAY_SIZE(bfin_uart_resources),
-        .resource = bfin_uart_resources,
+        .num_resources = ARRAY_SIZE(bfin_uart1_resources),
+        .resource = bfin_uart1_resources,
+        .dev = {
+                .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
@@ -425,16 +493,75 @@ static struct platform_device i2c_bfin_twi_device = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+static struct resource bfin_sport0_uart_resources[] = {
+        {
+                .start = SPORT0_TCR1,
+                .end = SPORT0_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT0_RX,
+                .end = IRQ_SPORT0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT0_ERROR,
+                .end = IRQ_SPORT0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport0_peripherals[] = {
+        P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
+        P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
+};
+
 static struct platform_device bfin_sport0_uart_device = {
         .name = "bfin-sport-uart",
         .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
+        .resource = bfin_sport0_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+static struct resource bfin_sport1_uart_resources[] = {
+        {
+                .start = SPORT1_TCR1,
+                .end = SPORT1_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT1_RX,
+                .end = IRQ_SPORT1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT1_ERROR,
+                .end = IRQ_SPORT1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport1_peripherals[] = {
+        P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
+        P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 };
 
 static struct platform_device bfin_sport1_uart_device = {
         .name = "bfin-sport-uart",
         .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
+        .resource = bfin_sport1_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 static struct platform_device bfin_mii_bus = {
@@ -524,7 +651,12 @@ static struct platform_device *cm_bf537_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-        &bfin_uart_device,
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
 #endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -541,9 +673,13 @@ static struct platform_device *cm_bf537_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
         &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
         &bfin_sport1_uart_device,
 #endif
+#endif
 
 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
         &isp1362_hcd_device,
@@ -591,6 +727,33 @@ static int __init tcm_bf537_init(void)
 
 arch_initcall(tcm_bf537_init);
 
+static struct platform_device *cm_bf537_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+        &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+        &bfin_sport1_uart_device,
+#endif
+#endif
+};
+
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(cm_bf537_early_devices,
+                ARRAY_SIZE(cm_bf537_early_devices));
+}
+
 void bfin_get_ether_addr(char *addr)
 {
         random_ether_addr(addr);
diff --git a/arch/blackfin/mach-bf537/include/mach/irq.h b/arch/blackfin/mach-bf537/include/mach/irq.h
index 0defa9457e7..789a4f226f7 100644
--- a/arch/blackfin/mach-bf537/include/mach/irq.h
+++ b/arch/blackfin/mach-bf537/include/mach/irq.h
@@ -134,7 +134,17 @@
 
 #define GPIO_IRQ_BASE   IRQ_PF0
 
-#define NR_IRQS     (IRQ_PH15+1)
+#define IRQ_MAC_PHYINT          98 /* PHY_INT Interrupt */
+#define IRQ_MAC_MMCINT          99 /* MMC Counter Interrupt */
+#define IRQ_MAC_RXFSINT         100 /* RX Frame-Status Interrupt */
+#define IRQ_MAC_TXFSINT         101 /* TX Frame-Status Interrupt */
+#define IRQ_MAC_WAKEDET         102 /* Wake-Up Interrupt */
+#define IRQ_MAC_RXDMAERR        103 /* RX DMA Direction Error Interrupt */
+#define IRQ_MAC_TXDMAERR        104 /* TX DMA Direction Error Interrupt */
+#define IRQ_MAC_STMDONE         105 /* Station Mgt. Transfer Done Interrupt */
+
+#define NR_MACH_IRQS    (IRQ_MAC_STMDONE + 1)
+#define NR_IRQS         (NR_MACH_IRQS + NR_SPARE_IRQS)
 
 #define IVG7            7
 #define IVG8            8
diff --git a/arch/blackfin/mach-bf538/boards/ezkit.c b/arch/blackfin/mach-bf538/boards/ezkit.c
index c296bb1ed50..1a1f65855b0 100644
--- a/arch/blackfin/mach-bf538/boards/ezkit.c
+++ b/arch/blackfin/mach-bf538/boards/ezkit.c
@@ -41,37 +41,148 @@ static struct platform_device rtc_device = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-static struct resource bfin_uart_resources[] = {
 #ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
         {
-                .start = 0xFFC00400,
-                .end = 0xFFC004FF,
+                .start = UART0_THR,
+                .end = UART0_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART0_RX,
+                .end = IRQ_UART0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART0_ERROR,
+                .end = IRQ_UART0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART0_TX,
+                .end = CH_UART0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART0_RX,
+                .end = CH_UART0_RX,
+                .flags = IORESOURCE_DMA,
+        },
+#ifdef CONFIG_BFIN_UART0_CTSRTS
+        {       /* CTS pin */
+                .start = GPIO_PG7,
+                .end = GPIO_PG7,
+                .flags = IORESOURCE_IO,
+        },
+        {       /* RTS pin */
+                .start = GPIO_PG6,
+                .end = GPIO_PG6,
+                .flags = IORESOURCE_IO,
+        },
+#endif
+};
+
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
+};
+
+static struct platform_device bfin_uart0_device = {
+        .name = "bfin-uart",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+        .dev = {
+                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
+        },
+};
 #endif
 #ifdef CONFIG_SERIAL_BFIN_UART1
+static struct resource bfin_uart1_resources[] = {
         {
-                .start = 0xFFC02000,
-                .end = 0xFFC020FF,
+                .start = UART1_THR,
+                .end = UART1_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART1_RX,
+                .end = IRQ_UART1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART1_ERROR,
+                .end = IRQ_UART1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART1_TX,
+                .end = CH_UART1_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART1_RX,
+                .end = CH_UART1_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart1_peripherals[] = {
+        P_UART1_TX, P_UART1_RX, 0
+};
+
+static struct platform_device bfin_uart1_device = {
+        .name = "bfin-uart",
+        .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_uart1_resources),
+        .resource = bfin_uart1_resources,
+        .dev = {
+                .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
+        },
+};
 #endif
 #ifdef CONFIG_SERIAL_BFIN_UART2
+static struct resource bfin_uart2_resources[] = {
         {
-                .start = 0xFFC02100,
-                .end = 0xFFC021FF,
+                .start = UART2_THR,
+                .end = UART2_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
-#endif
+        {
+                .start = IRQ_UART2_RX,
+                .end = IRQ_UART2_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART2_ERROR,
+                .end = IRQ_UART2_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART2_TX,
+                .end = CH_UART2_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART2_RX,
+                .end = CH_UART2_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart2_peripherals[] = {
+        P_UART2_TX, P_UART2_RX, 0
 };
 
-static struct platform_device bfin_uart_device = {
+static struct platform_device bfin_uart2_device = {
         .name = "bfin-uart",
-        .id = 1,
-        .num_resources = ARRAY_SIZE(bfin_uart_resources),
-        .resource = bfin_uart_resources,
+        .id = 2,
+        .num_resources = ARRAY_SIZE(bfin_uart2_resources),
+        .resource = bfin_uart2_resources,
+        .dev = {
+                .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
@@ -151,6 +262,145 @@ static struct platform_device bfin_sir2_device = {
 #endif
 #endif
 
+#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+static struct resource bfin_sport0_uart_resources[] = {
+        {
+                .start = SPORT0_TCR1,
+                .end = SPORT0_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT0_RX,
+                .end = IRQ_SPORT0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT0_ERROR,
+                .end = IRQ_SPORT0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport0_peripherals[] = {
+        P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
+        P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
+};
+
+static struct platform_device bfin_sport0_uart_device = {
+        .name = "bfin-sport-uart",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
+        .resource = bfin_sport0_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+static struct resource bfin_sport1_uart_resources[] = {
+        {
+                .start = SPORT1_TCR1,
+                .end = SPORT1_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT1_RX,
+                .end = IRQ_SPORT1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT1_ERROR,
+                .end = IRQ_SPORT1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport1_peripherals[] = {
+        P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
+        P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
+};
+
+static struct platform_device bfin_sport1_uart_device = {
+        .name = "bfin-sport-uart",
+        .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
+        .resource = bfin_sport1_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
+static struct resource bfin_sport2_uart_resources[] = {
+        {
+                .start = SPORT2_TCR1,
+                .end = SPORT2_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT2_RX,
+                .end = IRQ_SPORT2_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT2_ERROR,
+                .end = IRQ_SPORT2_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport2_peripherals[] = {
+        P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
+        P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
+};
+
+static struct platform_device bfin_sport2_uart_device = {
+        .name = "bfin-sport-uart",
+        .id = 2,
+        .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
+        .resource = bfin_sport2_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
+static struct resource bfin_sport3_uart_resources[] = {
+        {
+                .start = SPORT3_TCR1,
+                .end = SPORT3_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT3_RX,
+                .end = IRQ_SPORT3_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT3_ERROR,
+                .end = IRQ_SPORT3_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport3_peripherals[] = {
+        P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
+        P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
+};
+
+static struct platform_device bfin_sport3_uart_device = {
+        .name = "bfin-sport-uart",
+        .id = 3,
+        .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
+        .resource = bfin_sport3_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#endif
+
 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
 unsigned short bfin_can_peripherals[] = {
         P_CAN0_RX, P_CAN0_TX, 0
@@ -268,8 +518,8 @@ static const struct ad7879_platform_data bfin_ad7879_ts_info = {
         .median                 = 2,    /* do 8 measurements */
         .averaging              = 1,    /* take the average of 4 middle samples */
         .pen_down_acc_interval  = 255,  /* 9.4 ms */
-        .gpio_output            = 1,    /* configure AUX/VBAT/GPIO as GPIO output */
-        .gpio_default           = 1,    /* During initialization set GPIO = HIGH */
+        .gpio_export            = 1,    /* Export GPIO to gpiolib */
+        .gpio_base              = -1,   /* Dynamic allocation */
 };
 #endif
 
@@ -284,9 +534,10 @@ static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
 #include <asm/bfin-lq035q1.h>
 
 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
-        .mode =         LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
-        .use_bl =       0,      /* let something else control the LCD Blacklight */
-        .gpio_bl =      GPIO_PF7,
+        .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
+        .ppi_mode = USE_RGB565_16_BIT_PPI,
+        .use_bl = 0,    /* let something else control the LCD Blacklight */
+        .gpio_bl = GPIO_PF7,
 };
 
 static struct resource bfin_lq035q1_resources[] = {
@@ -622,7 +873,15 @@ static struct platform_device *cm_bf538_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-        &bfin_uart_device,
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART2
+        &bfin_uart2_device,
+#endif
 #endif
 
 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
@@ -648,6 +907,21 @@ static struct platform_device *cm_bf538_devices[] __initdata = {
 #endif
 #endif
 
+#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+        &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+        &bfin_sport1_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
+        &bfin_sport2_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
+        &bfin_sport3_uart_device,
+#endif
+#endif
+
 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
         &bfin_can_device,
 #endif
@@ -683,3 +957,39 @@ static int __init ezkit_init(void)
 }
 
 arch_initcall(ezkit_init);
+
+static struct platform_device *ezkit_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART2
+        &bfin_uart2_device,
+#endif
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+        &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+        &bfin_sport1_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
+        &bfin_sport2_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
+        &bfin_sport3_uart_device,
+#endif
+#endif
+};
+
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(ezkit_early_devices,
+                ARRAY_SIZE(ezkit_early_devices));
+}
diff --git a/arch/blackfin/mach-bf538/include/mach/irq.h b/arch/blackfin/mach-bf538/include/mach/irq.h
index a4b7fcbc556..7a479d224dc 100644
--- a/arch/blackfin/mach-bf538/include/mach/irq.h
+++ b/arch/blackfin/mach-bf538/include/mach/irq.h
@@ -110,7 +110,8 @@
 
 #define GPIO_IRQ_BASE   IRQ_PF0
 
-#define NR_IRQS     (IRQ_PF15+1)
+#define NR_MACH_IRQS    (IRQ_PF15 + 1)
+#define NR_IRQS         (NR_MACH_IRQS + NR_SPARE_IRQS)
 
 #define IVG7            7
 #define IVG8            8
diff --git a/arch/blackfin/mach-bf548/boards/cm_bf548.c b/arch/blackfin/mach-bf548/boards/cm_bf548.c
index ccdcd6da2e9..f60c333fec6 100644
--- a/arch/blackfin/mach-bf548/boards/cm_bf548.c
+++ b/arch/blackfin/mach-bf548/boards/cm_bf548.c
@@ -127,44 +127,211 @@ static struct platform_device rtc_device = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-static struct resource bfin_uart_resources[] = {
 #ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
         {
-                .start = 0xFFC00400,
-                .end = 0xFFC004FF,
+                .start = UART0_DLL,
+                .end = UART0_RBR+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART0_RX,
+                .end = IRQ_UART0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART0_ERROR,
+                .end = IRQ_UART0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART0_TX,
+                .end = CH_UART0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART0_RX,
+                .end = CH_UART0_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
+};
+
+static struct platform_device bfin_uart0_device = {
+        .name = "bfin-uart",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+        .dev = {
+                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
+        },
+};
 #endif
 #ifdef CONFIG_SERIAL_BFIN_UART1
+static struct resource bfin_uart1_resources[] = {
         {
-                .start = 0xFFC02000,
-                .end = 0xFFC020FF,
+                .start = UART1_DLL,
+                .end = UART1_RBR+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART1_RX,
+                .end = IRQ_UART1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART1_ERROR,
+                .end = IRQ_UART1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART1_TX,
+                .end = CH_UART1_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART1_RX,
+                .end = CH_UART1_RX,
+                .flags = IORESOURCE_DMA,
+        },
+#ifdef CONFIG_BFIN_UART1_CTSRTS
+        {       /* CTS pin -- 0 means not supported */
+                .start = GPIO_PE10,
+                .end = GPIO_PE10,
+                .flags = IORESOURCE_IO,
+        },
+        {       /* RTS pin -- 0 means not supported */
+                .start = GPIO_PE9,
+                .end = GPIO_PE9,
+                .flags = IORESOURCE_IO,
+        },
+#endif
+};
+
+unsigned short bfin_uart1_peripherals[] = {
+        P_UART1_TX, P_UART1_RX,
+#ifdef CONFIG_BFIN_UART1_CTSRTS
+        P_UART1_RTS, P_UART1_CTS,
+#endif
+        0
+};
+
+static struct platform_device bfin_uart1_device = {
+        .name = "bfin-uart",
+        .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_uart1_resources),
+        .resource = bfin_uart1_resources,
+        .dev = {
+                .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
+        },
+};
 #endif
 #ifdef CONFIG_SERIAL_BFIN_UART2
+static struct resource bfin_uart2_resources[] = {
         {
-                .start = 0xFFC02100,
-                .end = 0xFFC021FF,
+                .start = UART2_DLL,
+                .end = UART2_RBR+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART2_RX,
+                .end = IRQ_UART2_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART2_ERROR,
+                .end = IRQ_UART2_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART2_TX,
+                .end = CH_UART2_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART2_RX,
+                .end = CH_UART2_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart2_peripherals[] = {
+        P_UART2_TX, P_UART2_RX, 0
+};
+
+static struct platform_device bfin_uart2_device = {
+        .name = "bfin-uart",
+        .id = 2,
+        .num_resources = ARRAY_SIZE(bfin_uart2_resources),
+        .resource = bfin_uart2_resources,
+        .dev = {
+                .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
+        },
+};
 #endif
 #ifdef CONFIG_SERIAL_BFIN_UART3
+static struct resource bfin_uart3_resources[] = {
         {
-                .start = 0xFFC03100,
-                .end = 0xFFC031FF,
+                .start = UART3_DLL,
+                .end = UART3_RBR+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART3_RX,
+                .end = IRQ_UART3_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART3_ERROR,
+                .end = IRQ_UART3_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART3_TX,
+                .end = CH_UART3_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART3_RX,
+                .end = CH_UART3_RX,
+                .flags = IORESOURCE_DMA,
+        },
+#ifdef CONFIG_BFIN_UART3_CTSRTS
+        {       /* CTS pin -- 0 means not supported */
+                .start = GPIO_PB3,
+                .end = GPIO_PB3,
+                .flags = IORESOURCE_IO,
+        },
+        {       /* RTS pin -- 0 means not supported */
+                .start = GPIO_PB2,
+                .end = GPIO_PB2,
+                .flags = IORESOURCE_IO,
+        },
 #endif
 };
 
-static struct platform_device bfin_uart_device = {
+unsigned short bfin_uart3_peripherals[] = {
+        P_UART3_TX, P_UART3_RX,
+#ifdef CONFIG_BFIN_UART3_CTSRTS
+        P_UART3_RTS, P_UART3_CTS,
+#endif
+        0
+};
+
+static struct platform_device bfin_uart3_device = {
         .name = "bfin-uart",
-        .id = 1,
-        .num_resources = ARRAY_SIZE(bfin_uart_resources),
-        .resource = bfin_uart_resources,
+        .id = 3,
+        .num_resources = ARRAY_SIZE(bfin_uart3_resources),
+        .resource = bfin_uart3_resources,
+        .dev = {
+                .platform_data = &bfin_uart3_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
@@ -359,6 +526,145 @@ static struct platform_device musb_device = {
 };
 #endif
 
+#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+static struct resource bfin_sport0_uart_resources[] = {
+        {
+                .start = SPORT0_TCR1,
+                .end = SPORT0_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT0_RX,
+                .end = IRQ_SPORT0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT0_ERROR,
+                .end = IRQ_SPORT0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport0_peripherals[] = {
+        P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
+        P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
+};
+
+static struct platform_device bfin_sport0_uart_device = {
+        .name = "bfin-sport-uart",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
+        .resource = bfin_sport0_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+static struct resource bfin_sport1_uart_resources[] = {
+        {
+                .start = SPORT1_TCR1,
+                .end = SPORT1_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT1_RX,
+                .end = IRQ_SPORT1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT1_ERROR,
+                .end = IRQ_SPORT1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport1_peripherals[] = {
+        P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
+        P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
+};
+
+static struct platform_device bfin_sport1_uart_device = {
+        .name = "bfin-sport-uart",
+        .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
+        .resource = bfin_sport1_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
+static struct resource bfin_sport2_uart_resources[] = {
+        {
+                .start = SPORT2_TCR1,
+                .end = SPORT2_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT2_RX,
+                .end = IRQ_SPORT2_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT2_ERROR,
+                .end = IRQ_SPORT2_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport2_peripherals[] = {
+        P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
+        P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
+};
+
+static struct platform_device bfin_sport2_uart_device = {
+        .name = "bfin-sport-uart",
+        .id = 2,
+        .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
+        .resource = bfin_sport2_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
+static struct resource bfin_sport3_uart_resources[] = {
+        {
+                .start = SPORT3_TCR1,
+                .end = SPORT3_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT3_RX,
+                .end = IRQ_SPORT3_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT3_ERROR,
+                .end = IRQ_SPORT3_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport3_peripherals[] = {
+        P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
+        P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
+};
+
+static struct platform_device bfin_sport3_uart_device = {
+        .name = "bfin-sport-uart",
+        .id = 3,
+        .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
+        .resource = bfin_sport3_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#endif
+
 #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
 static struct resource bfin_atapi_resources[] = {
         {
@@ -752,7 +1058,18 @@ static struct platform_device *cm_bf548_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-        &bfin_uart_device,
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART2
+        &bfin_uart2_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART3
+        &bfin_uart3_device,
+#endif
 #endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -782,6 +1099,21 @@ static struct platform_device *cm_bf548_devices[] __initdata = {
         &musb_device,
 #endif
 
+#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+        &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+        &bfin_sport1_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
+        &bfin_sport2_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
+        &bfin_sport3_uart_device,
+#endif
+#endif
+
 #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
         &bfin_atapi_device,
 #endif
@@ -833,3 +1165,42 @@ static int __init cm_bf548_init(void)
 }
 
 arch_initcall(cm_bf548_init);
+
+static struct platform_device *cm_bf548_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART2
+        &bfin_uart2_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART3
+        &bfin_uart3_device,
+#endif
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+        &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+        &bfin_sport1_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
+        &bfin_sport2_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
+        &bfin_sport3_uart_device,
+#endif
+#endif
+};
+
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(cm_bf548_early_devices,
+                ARRAY_SIZE(cm_bf548_early_devices));
+}
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index 60193f72777..06919db00a7 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -232,44 +232,211 @@ static struct platform_device rtc_device = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-static struct resource bfin_uart_resources[] = {
 #ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
         {
-                .start = 0xFFC00400,
-                .end = 0xFFC004FF,
+                .start = UART0_DLL,
+                .end = UART0_RBR+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART0_RX,
+                .end = IRQ_UART0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART0_ERROR,
+                .end = IRQ_UART0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART0_TX,
+                .end = CH_UART0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART0_RX,
+                .end = CH_UART0_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
+};
+
+static struct platform_device bfin_uart0_device = {
+        .name = "bfin-uart",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+        .dev = {
+                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
+        },
+};
 #endif
 #ifdef CONFIG_SERIAL_BFIN_UART1
+static struct resource bfin_uart1_resources[] = {
         {
-                .start = 0xFFC02000,
-                .end = 0xFFC020FF,
+                .start = UART1_DLL,
+                .end = UART1_RBR+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART1_RX,
+                .end = IRQ_UART1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART1_ERROR,
+                .end = IRQ_UART1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART1_TX,
+                .end = CH_UART1_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART1_RX,
+                .end = CH_UART1_RX,
+                .flags = IORESOURCE_DMA,
+        },
+#ifdef CONFIG_BFIN_UART1_CTSRTS
+        {       /* CTS pin -- 0 means not supported */
+                .start = GPIO_PE10,
+                .end = GPIO_PE10,
+                .flags = IORESOURCE_IO,
+        },
+        {       /* RTS pin -- 0 means not supported */
+                .start = GPIO_PE9,
+                .end = GPIO_PE9,
+                .flags = IORESOURCE_IO,
+        },
+#endif
+};
+
+unsigned short bfin_uart1_peripherals[] = {
+        P_UART1_TX, P_UART1_RX,
+#ifdef CONFIG_BFIN_UART1_CTSRTS
+        P_UART1_RTS, P_UART1_CTS,
+#endif
+        0
+};
+
+static struct platform_device bfin_uart1_device = {
+        .name = "bfin-uart",
+        .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_uart1_resources),
+        .resource = bfin_uart1_resources,
+        .dev = {
+                .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
+        },
+};
 #endif
 #ifdef CONFIG_SERIAL_BFIN_UART2
+static struct resource bfin_uart2_resources[] = {
         {
-                .start = 0xFFC02100,
-                .end = 0xFFC021FF,
+                .start = UART2_DLL,
+                .end = UART2_RBR+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART2_RX,
+                .end = IRQ_UART2_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART2_ERROR,
+                .end = IRQ_UART2_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART2_TX,
+                .end = CH_UART2_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART2_RX,
+                .end = CH_UART2_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart2_peripherals[] = {
+        P_UART2_TX, P_UART2_RX, 0
+};
+
+static struct platform_device bfin_uart2_device = {
+        .name = "bfin-uart",
+        .id = 2,
+        .num_resources = ARRAY_SIZE(bfin_uart2_resources),
+        .resource = bfin_uart2_resources,
+        .dev = {
+                .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
+        },
+};
 #endif
 #ifdef CONFIG_SERIAL_BFIN_UART3
+static struct resource bfin_uart3_resources[] = {
         {
-                .start = 0xFFC03100,
-                .end = 0xFFC031FF,
+                .start = UART3_DLL,
+                .end = UART3_RBR+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART3_RX,
+                .end = IRQ_UART3_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART3_ERROR,
+                .end = IRQ_UART3_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART3_TX,
+                .end = CH_UART3_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART3_RX,
+                .end = CH_UART3_RX,
+                .flags = IORESOURCE_DMA,
+        },
+#ifdef CONFIG_BFIN_UART3_CTSRTS
+        {       /* CTS pin -- 0 means not supported */
+                .start = GPIO_PB3,
+                .end = GPIO_PB3,
+                .flags = IORESOURCE_IO,
+        },
+        {       /* RTS pin -- 0 means not supported */
+                .start = GPIO_PB2,
+                .end = GPIO_PB2,
+                .flags = IORESOURCE_IO,
+        },
 #endif
 };
 
-static struct platform_device bfin_uart_device = {
+unsigned short bfin_uart3_peripherals[] = {
+        P_UART3_TX, P_UART3_RX,
+#ifdef CONFIG_BFIN_UART3_CTSRTS
+        P_UART3_RTS, P_UART3_CTS,
+#endif
+        0
+};
+
+static struct platform_device bfin_uart3_device = {
         .name = "bfin-uart",
-        .id = 1,
-        .num_resources = ARRAY_SIZE(bfin_uart_resources),
-        .resource = bfin_uart_resources,
+        .id = 3,
+        .num_resources = ARRAY_SIZE(bfin_uart3_resources),
+        .resource = bfin_uart3_resources,
+        .dev = {
+                .platform_data = &bfin_uart3_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
@@ -464,6 +631,145 @@ static struct platform_device musb_device = {
 };
 #endif
 
+#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+static struct resource bfin_sport0_uart_resources[] = {
+        {
+                .start = SPORT0_TCR1,
+                .end = SPORT0_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT0_RX,
+                .end = IRQ_SPORT0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT0_ERROR,
+                .end = IRQ_SPORT0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport0_peripherals[] = {
+        P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
+        P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
+};
+
+static struct platform_device bfin_sport0_uart_device = {
+        .name = "bfin-sport-uart",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
+        .resource = bfin_sport0_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+static struct resource bfin_sport1_uart_resources[] = {
+        {
+                .start = SPORT1_TCR1,
+                .end = SPORT1_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT1_RX,
+                .end = IRQ_SPORT1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT1_ERROR,
+                .end = IRQ_SPORT1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport1_peripherals[] = {
+        P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
+        P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
+};
+
+static struct platform_device bfin_sport1_uart_device = {
+        .name = "bfin-sport-uart",
+        .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
+        .resource = bfin_sport1_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
+static struct resource bfin_sport2_uart_resources[] = {
+        {
+                .start = SPORT2_TCR1,
+                .end = SPORT2_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT2_RX,
+                .end = IRQ_SPORT2_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT2_ERROR,
+                .end = IRQ_SPORT2_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport2_peripherals[] = {
+        P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
+        P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
+};
+
+static struct platform_device bfin_sport2_uart_device = {
+        .name = "bfin-sport-uart",
+        .id = 2,
+        .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
+        .resource = bfin_sport2_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
+static struct resource bfin_sport3_uart_resources[] = {
+        {
+                .start = SPORT3_TCR1,
+                .end = SPORT3_MRCS3+4,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_SPORT3_RX,
+                .end = IRQ_SPORT3_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_SPORT3_ERROR,
+                .end = IRQ_SPORT3_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+unsigned short bfin_sport3_peripherals[] = {
+        P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
+        P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
+};
+
+static struct platform_device bfin_sport3_uart_device = {
+        .name = "bfin-sport-uart",
+        .id = 3,
+        .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
+        .resource = bfin_sport3_uart_resources,
+        .dev = {
+                .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#endif
+
 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
 unsigned short bfin_can_peripherals[] = {
         P_CAN0_RX, P_CAN0_TX, 0
@@ -657,8 +963,8 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) \
-        || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) \
+        || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
         .enable_dma = 0,
         .bits_per_word = 16,
@@ -714,8 +1020,8 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
                 .mode = SPI_MODE_3,
         },
 #endif
-#if defined(CONFIG_SND_BLACKFIN_AD1836) \
-        || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) \
+        || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
         {
                 .modalias = "ad1836",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
@@ -951,6 +1257,30 @@ static struct platform_device bfin_dpmc = {
         },
 };
 
+#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
+static struct platform_device bfin_i2s = {
+        .name = "bfin-i2s",
+        .id = CONFIG_SND_BF5XX_SPORT_NUM,
+        /* TODO: add platform data here */
+};
+#endif
+
+#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
+static struct platform_device bfin_tdm = {
+        .name = "bfin-tdm",
+        .id = CONFIG_SND_BF5XX_SPORT_NUM,
+        /* TODO: add platform data here */
+};
+#endif
+
+#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
+static struct platform_device bfin_ac97 = {
+        .name = "bfin-ac97",
+        .id = CONFIG_SND_BF5XX_SPORT_NUM,
+        /* TODO: add platform data here */
+};
+#endif
+
 static struct platform_device *ezkit_devices[] __initdata = {
 
         &bfin_dpmc,
@@ -960,7 +1290,18 @@ static struct platform_device *ezkit_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-        &bfin_uart_device,
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART2
+        &bfin_uart2_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART3
+        &bfin_uart3_device,
+#endif
 #endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -994,6 +1335,21 @@ static struct platform_device *ezkit_devices[] __initdata = {
         &bfin_isp1760_device,
 #endif
 
+#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+        &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+        &bfin_sport1_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
+        &bfin_sport2_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
+        &bfin_sport3_uart_device,
+#endif
+#endif
+
 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
         &bfin_can_device,
 #endif
@@ -1037,6 +1393,18 @@ static struct platform_device *ezkit_devices[] __initdata = {
 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
         &ezkit_flash_device,
 #endif
+
+#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
+        &bfin_i2s,
+#endif
+
+#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
+        &bfin_tdm,
+#endif
+
+#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
+        &bfin_ac97,
+#endif
 };
 
 static int __init ezkit_init(void)
@@ -1058,3 +1426,42 @@ static int __init ezkit_init(void)
 }
 
 arch_initcall(ezkit_init);
+
+static struct platform_device *ezkit_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART2
+        &bfin_uart2_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART3
+        &bfin_uart3_device,
+#endif
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
+        &bfin_sport0_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
+        &bfin_sport1_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
+        &bfin_sport2_uart_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
+        &bfin_sport3_uart_device,
+#endif
+#endif
+};
+
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(ezkit_early_devices,
+                ARRAY_SIZE(ezkit_early_devices));
+}
diff --git a/arch/blackfin/mach-bf548/include/mach/irq.h b/arch/blackfin/mach-bf548/include/mach/irq.h
index 106db05684a..1f99b51a3d5 100644
--- a/arch/blackfin/mach-bf548/include/mach/irq.h
+++ b/arch/blackfin/mach-bf548/include/mach/irq.h
@@ -317,7 +317,8 @@ Events         (highest priority)  EMU         0
 
 #define GPIO_IRQ_BASE   IRQ_PA0
 
-#define NR_IRQS     (IRQ_PJ15+1)
+#define NR_MACH_IRQS    (IRQ_PJ15 + 1)
+#define NR_IRQS         (NR_MACH_IRQS + NR_SPARE_IRQS)
 
 /* For compatibility reasons with existing code */
 
diff --git a/arch/blackfin/mach-bf561/Makefile b/arch/blackfin/mach-bf561/Makefile
index 59e18afe28c..b3402971831 100644
--- a/arch/blackfin/mach-bf561/Makefile
+++ b/arch/blackfin/mach-bf561/Makefile
@@ -6,3 +6,4 @@ obj-y := ints-priority.o dma.o
 
 obj-$(CONFIG_BF561_COREB) += coreb.o
 obj-$(CONFIG_SMP)  += smp.o secondary.o atomic.o
+obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
diff --git a/arch/blackfin/mach-bf561/boards/acvilon.c b/arch/blackfin/mach-bf561/boards/acvilon.c
index 07e8dc8770d..5163e2c383c 100644
--- a/arch/blackfin/mach-bf561/boards/acvilon.c
+++ b/arch/blackfin/mach-bf561/boards/acvilon.c
@@ -176,7 +176,7 @@ static struct resource smsc911x_resources[] = {
 };
 
 static struct smsc911x_platform_config smsc911x_config = {
-        .flags = SMSC911X_USE_32BIT,
+        .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
         .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
         .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
         .phy_interface = PHY_INTERFACE_MODE_MII,
diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c
index dfc8d5b7798..e127aedc1d7 100644
--- a/arch/blackfin/mach-bf561/boards/cm_bf561.c
+++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c
@@ -72,7 +72,7 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
         .enable_dma = 0,
         .bits_per_word = 16,
@@ -111,7 +111,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
         {
                 .modalias = "ad1836",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
@@ -305,21 +305,50 @@ static struct platform_device isp1362_hcd_device = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-static struct resource bfin_uart_resources[] = {
+#ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
         {
-                .start = 0xFFC00400,
-                .end = 0xFFC004FF,
+                .start = BFIN_UART_THR,
+                .end = BFIN_UART_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART_RX,
+                .end = IRQ_UART_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART_ERROR,
+                .end = IRQ_UART_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART_TX,
+                .end = CH_UART_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART_RX,
+                .end = CH_UART_RX,
+                .flags = IORESOURCE_DMA,
+        },
 };
 
-static struct platform_device bfin_uart_device = {
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
+};
+
+static struct platform_device bfin_uart0_device = {
         .name = "bfin-uart",
-        .id = 1,
-        .num_resources = ARRAY_SIZE(bfin_uart_resources),
-        .resource = bfin_uart_resources,
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+        .dev = {
+                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
@@ -463,7 +492,9 @@ static struct platform_device *cm_bf561_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-        &bfin_uart_device,
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
 #endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -516,3 +547,18 @@ static int __init cm_bf561_init(void)
 }
 
 arch_initcall(cm_bf561_init);
+
+static struct platform_device *cm_bf561_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#endif
+};
+
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(cm_bf561_early_devices,
+                ARRAY_SIZE(cm_bf561_early_devices));
+}
diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c
index ffd3e6a80d1..9b93e2f9579 100644
--- a/arch/blackfin/mach-bf561/boards/ezkit.c
+++ b/arch/blackfin/mach-bf561/boards/ezkit.c
@@ -160,21 +160,50 @@ static struct platform_device smc91x_device = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-static struct resource bfin_uart_resources[] = {
+#ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
         {
-                .start = 0xFFC00400,
-                .end = 0xFFC004FF,
+                .start = BFIN_UART_THR,
+                .end = BFIN_UART_GCTL+2,
                 .flags = IORESOURCE_MEM,
         },
+        {
+                .start = IRQ_UART_RX,
+                .end = IRQ_UART_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART_ERROR,
+                .end = IRQ_UART_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART_TX,
+                .end = CH_UART_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART_RX,
+                .end = CH_UART_RX,
+                .flags = IORESOURCE_DMA,
+        },
 };
 
-static struct platform_device bfin_uart_device = {
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
+};
+
+static struct platform_device bfin_uart0_device = {
         .name = "bfin-uart",
-        .id = 1,
-        .num_resources = ARRAY_SIZE(bfin_uart_resources),
-        .resource = bfin_uart_resources,
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+        .dev = {
+                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
+        },
 };
 #endif
+#endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
@@ -245,8 +274,8 @@ static struct platform_device ezkit_flash_device = {
 };
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) \
-        || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) \
+        || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
         .enable_dma = 0,
         .bits_per_word = 16,
@@ -299,8 +328,8 @@ static struct platform_device bfin_spi0_device = {
 #endif
 
 static struct spi_board_info bfin_spi_board_info[] __initdata = {
-#if defined(CONFIG_SND_BLACKFIN_AD1836) \
-        || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BLACKFIN_AD183X) \
+        || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
         {
                 .modalias = "ad1836",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
@@ -412,7 +441,9 @@ static struct platform_device *ezkit_devices[] __initdata = {
 #endif
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-        &bfin_uart_device,
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
 #endif
 
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
@@ -458,3 +489,18 @@ static int __init ezkit_init(void)
 }
 
 arch_initcall(ezkit_init);
+
+static struct platform_device *ezkit_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#endif
+};
+
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(ezkit_early_devices,
+                ARRAY_SIZE(ezkit_early_devices));
+}
diff --git a/arch/blackfin/mach-bf561/boards/tepla.c b/arch/blackfin/mach-bf561/boards/tepla.c
index 8ba7252455e..d3017e53686 100644
--- a/arch/blackfin/mach-bf561/boards/tepla.c
+++ b/arch/blackfin/mach-bf561/boards/tepla.c
@@ -42,6 +42,52 @@ static struct platform_device smc91x_device = {
         .resource      = smc91x_resources,
 };
 
+#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
+        {
+                .start = BFIN_UART_THR,
+                .end = BFIN_UART_GCTL+2,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_UART_RX,
+                .end = IRQ_UART_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART_ERROR,
+                .end = IRQ_UART_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART_TX,
+                .end = CH_UART_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART_RX,
+                .end = CH_UART_RX,
+                .flags = IORESOURCE_DMA,
+        },
+};
+
+unsigned short bfin_uart0_peripherals[] = {
+        P_UART0_TX, P_UART0_RX, 0
+};
+
+static struct platform_device bfin_uart0_device = {
+        .name = "bfin-uart",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+        .dev = {
+                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
+        },
+};
+#endif
+#endif
+
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
 static struct resource bfin_sir0_resources[] = {
@@ -73,6 +119,13 @@ static struct platform_device bfin_sir0_device = {
 
 static struct platform_device *tepla_devices[] __initdata = {
         &smc91x_device,
+
+#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#endif
+
 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
         &bfin_sir0_device,
@@ -87,3 +140,18 @@ static int __init tepla_init(void)
 }
 
 arch_initcall(tepla_init);
+
+static struct platform_device *tepla_early_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#endif
+};
+
+void __init native_machine_early_platform_add_devices(void)
+{
+        printk(KERN_INFO "register early platform devices\n");
+        early_platform_add_devices(tepla_early_devices,
+                ARRAY_SIZE(tepla_early_devices));
+}
diff --git a/arch/blackfin/mach-bf561/hotplug.c b/arch/blackfin/mach-bf561/hotplug.c
new file mode 100644
index 00000000000..c95169b612d
--- /dev/null
+++ b/arch/blackfin/mach-bf561/hotplug.c
@@ -0,0 +1,32 @@
+/*
+ * Copyright 2007-2009 Analog Devices Inc.
+ *               Graff Yang <graf.yang@analog.com>
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <asm/blackfin.h>
+#include <asm/smp.h>
+#define SIC_SYSIRQ(irq) (irq - (IRQ_CORETMR + 1))
+
+int hotplug_coreb;
+
+void platform_cpu_die(void)
+{
+        unsigned long iwr[2] = {0, 0};
+        unsigned long bank = SIC_SYSIRQ(IRQ_SUPPLE_0) / 32;
+        unsigned long bit = 1 << (SIC_SYSIRQ(IRQ_SUPPLE_0) % 32);
+
+        hotplug_coreb = 1;
+
+        iwr[bank] = bit;
+
+        /* disable core timer */
+        bfin_write_TCNTL(0);
+
+        /* clear ipi interrupt IRQ_SUPPLE_0 */
+        bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (10 + 1)));
+        SSYNC();
+
+        coreb_sleep(iwr[0], iwr[1], 0);
+}
diff --git a/arch/blackfin/mach-bf561/include/mach/irq.h b/arch/blackfin/mach-bf561/include/mach/irq.h
index 7b208db267b..c95566ade51 100644
--- a/arch/blackfin/mach-bf561/include/mach/irq.h
+++ b/arch/blackfin/mach-bf561/include/mach/irq.h
@@ -265,7 +265,8 @@
 
 #define GPIO_IRQ_BASE           IRQ_PF0
 
-#define NR_IRQS                 (IRQ_PF47 + 1)
+#define NR_MACH_IRQS            (IRQ_PF47 + 1)
+#define NR_IRQS                 (NR_MACH_IRQS + NR_SPARE_IRQS)
 
 #define IVG7                    7
 #define IVG8                    8
diff --git a/arch/blackfin/mach-bf561/include/mach/smp.h b/arch/blackfin/mach-bf561/include/mach/smp.h
index 390c7f4ae7b..2c8c514dd38 100644
--- a/arch/blackfin/mach-bf561/include/mach/smp.h
+++ b/arch/blackfin/mach-bf561/include/mach/smp.h
@@ -25,4 +25,6 @@ void platform_send_ipi_cpu(unsigned int cpu);
 
 void platform_clear_ipi(unsigned int cpu);
 
+void bfin_local_timer_setup(void);
+
 #endif /* !_MACH_BF561_SMP */
diff --git a/arch/blackfin/mach-bf561/secondary.S b/arch/blackfin/mach-bf561/secondary.S
index 8e6050369c0..4624eebbf9c 100644
--- a/arch/blackfin/mach-bf561/secondary.S
+++ b/arch/blackfin/mach-bf561/secondary.S
@@ -11,6 +11,7 @@
 #include <linux/init.h>
 #include <asm/blackfin.h>
 #include <asm/asm-offsets.h>
+#include <asm/trace.h>
 
 __INIT
 
@@ -62,6 +63,8 @@ ENTRY(_coreb_trampoline_start)
         M2 = r0;
         M3 = r0;
 
+        trace_buffer_init(p0,r0);
+
         /* Turn off the icache */
         p0.l = LO(IMEM_CONTROL);
         p0.h = HI(IMEM_CONTROL);
@@ -159,6 +162,41 @@ ENTRY(_coreb_trampoline_start)
 ENDPROC(_coreb_trampoline_start)
 ENTRY(_coreb_trampoline_end)
 
+.section ".text"
+ENTRY(_set_sicb_iwr)
+        P0.H = hi(SICB_IWR0);
+        P0.L = lo(SICB_IWR0);
+        P1.H = hi(SICB_IWR1);
+        P1.L = lo(SICB_IWR1);
+        [P0] = R0;
+        [P1] = R1;
+        SSYNC;
+        RTS;
+ENDPROC(_set_sicb_iwr)
+
+ENTRY(_coreb_sleep)
+        sp.l = lo(INITIAL_STACK);
+        sp.h = hi(INITIAL_STACK);
+        fp = sp;
+        usp = sp;
+
+        call _set_sicb_iwr;
+
+        CLI R2;
+        SSYNC;
+        IDLE;
+        STI R2;
+
+        R0 = IWR_DISABLE_ALL;
+        R1 = IWR_DISABLE_ALL;
+        call _set_sicb_iwr;
+
+        p0.h = hi(COREB_L1_CODE_START);
+        p0.l = lo(COREB_L1_CODE_START);
+        jump (p0);
+ENDPROC(_coreb_sleep)
+
+__CPUINIT
 ENTRY(_coreb_start)
         [--sp] = reti;
 
@@ -176,12 +214,20 @@ ENTRY(_coreb_start)
         sp = [p0];
         usp = sp;
         fp = sp;
+#ifdef CONFIG_HOTPLUG_CPU
+        p0.l = _hotplug_coreb;
+        p0.h = _hotplug_coreb;
+        r0 = [p0];
+        cc = BITTST(r0, 0);
+        if cc jump 3f;
+#endif
         sp += -12;
         call _init_pda
         sp += 12;
+#ifdef CONFIG_HOTPLUG_CPU
+3:
+#endif
         call _secondary_start_kernel;
 .L_exit:
         jump.s  .L_exit;
 ENDPROC(_coreb_start)
-
-__FINIT
diff --git a/arch/blackfin/mach-bf561/smp.c b/arch/blackfin/mach-bf561/smp.c
index 0192532e96a..3b9a4bf7dac 100644
--- a/arch/blackfin/mach-bf561/smp.c
+++ b/arch/blackfin/mach-bf561/smp.c
@@ -11,11 +11,10 @@
 #include <linux/delay.h>
 #include <asm/smp.h>
 #include <asm/dma.h>
+#include <asm/time.h>
 
 static DEFINE_SPINLOCK(boot_lock);
 
-static cpumask_t cpu_callin_map;
-
 /*
  * platform_init_cpus() - Tell the world about how many cores we
  * have. This is called while setting up the architecture support
@@ -66,13 +65,15 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
         bfin_write_SICB_IAR5(bfin_read_SICA_IAR5());
         bfin_write_SICB_IAR6(bfin_read_SICA_IAR6());
         bfin_write_SICB_IAR7(bfin_read_SICA_IAR7());
+        bfin_write_SICB_IWR0(IWR_DISABLE_ALL);
+        bfin_write_SICB_IWR1(IWR_DISABLE_ALL);
         SSYNC();
 
         /* Store CPU-private information to the cpu_data array. */
         bfin_setup_cpudata(cpu);
 
         /* We are done with local CPU inits, unblock the boot CPU. */
-        cpu_set(cpu, cpu_callin_map);
+        set_cpu_online(cpu, true);
         spin_lock(&boot_lock);
         spin_unlock(&boot_lock);
 }
@@ -81,28 +82,28 @@ int __cpuinit platform_boot_secondary(unsigned int cpu, struct task_struct *idle
 {
         unsigned long timeout;
 
-        /* CoreB already running?! */
-        BUG_ON((bfin_read_SICA_SYSCR() & COREB_SRAM_INIT) == 0);
-
         printk(KERN_INFO "Booting Core B.\n");
 
         spin_lock(&boot_lock);
 
-        /* Kick CoreB, which should start execution from CORE_SRAM_BASE. */
-        SSYNC();
-        bfin_write_SICA_SYSCR(bfin_read_SICA_SYSCR() & ~COREB_SRAM_INIT);
-        SSYNC();
+        if ((bfin_read_SICA_SYSCR() & COREB_SRAM_INIT) == 0) {
+                /* CoreB already running, sending ipi to wakeup it */
+                platform_send_ipi_cpu(cpu, IRQ_SUPPLE_0);
+        } else {
+                /* Kick CoreB, which should start execution from CORE_SRAM_BASE. */
+                bfin_write_SICA_SYSCR(bfin_read_SICA_SYSCR() & ~COREB_SRAM_INIT);
+                SSYNC();
+        }
 
         timeout = jiffies + 1 * HZ;
         while (time_before(jiffies, timeout)) {
-                if (cpu_isset(cpu, cpu_callin_map))
+                if (cpu_online(cpu))
                         break;
                 udelay(100);
                 barrier();
         }
 
-        if (cpu_isset(cpu, cpu_callin_map)) {
-                cpu_set(cpu, cpu_online_map);
+        if (cpu_online(cpu)) {
                 /* release the lock and let coreb run */
                 spin_unlock(&boot_lock);
                 return 0;
@@ -147,3 +148,20 @@ void platform_clear_ipi(unsigned int cpu)
         bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (10 + cpu)));
         SSYNC();
 }
+
+/*
+ * Setup core B's local core timer.
+ * In SMP, core timer is used for clock event device.
+ */
+void __cpuinit bfin_local_timer_setup(void)
+{
+#if defined(CONFIG_TICKSOURCE_CORETMR)
+        bfin_coretmr_init();
+        bfin_coretmr_clockevent_init();
+        get_irq_chip(IRQ_CORETMR)->unmask(IRQ_CORETMR);
+#else
+        /* Power down the core timer, just to play safe. */
+        bfin_write_TCNTL(0);
+#endif
+
+}
diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c
index 77758289725..4391d03dc84 100644
--- a/arch/blackfin/mach-common/cpufreq.c
+++ b/arch/blackfin/mach-common/cpufreq.c
@@ -11,10 +11,13 @@
 #include <linux/init.h>
 #include <linux/cpufreq.h>
 #include <linux/fs.h>
+#include <linux/delay.h>
 #include <asm/blackfin.h>
 #include <asm/time.h>
 #include <asm/dpmc.h>
 
+#define CPUFREQ_CPU 0
+
 /* this is the table of CCLK frequencies, in Hz */
 /* .index is the entry in the auxillary dpm_state_table[] */
 static struct cpufreq_frequency_table bfin_freq_table[] = {
@@ -41,64 +44,124 @@ static struct bfin_dpm_state {
         unsigned int tscale; /* change the divider on the core timer interrupt */
 } dpm_state_table[3];
 
+#if defined(CONFIG_CYCLES_CLOCKSOURCE)
 /*
-   normalized to maximum frequncy offset for CYCLES,
-   used in time-ts cycles clock source, but could be used
-   somewhere also.
+ * normalized to maximum frequncy offset for CYCLES,
+ * used in time-ts cycles clock source, but could be used
+ * somewhere also.
  */
 unsigned long long __bfin_cycles_off;
 unsigned int __bfin_cycles_mod;
+#endif
 
 /**************************************************************************/
+static void __init bfin_init_tables(unsigned long cclk, unsigned long sclk)
+{
 
-static unsigned int bfin_getfreq_khz(unsigned int cpu)
+        unsigned long csel, min_cclk;
+        int index;
+
+        /* Anomaly 273 seems to still exist on non-BF54x w/dcache turned on */
+#if ANOMALY_05000273 || ANOMALY_05000274 || \
+        (!defined(CONFIG_BF54x) && defined(CONFIG_BFIN_EXTMEM_DCACHEABLE))
+        min_cclk = sclk * 2;
+#else
+        min_cclk = sclk;
+#endif
+        csel = ((bfin_read_PLL_DIV() & CSEL) >> 4);
+
+        for (index = 0;  (cclk >> index) >= min_cclk && csel <= 3; index++, csel++) {
+                bfin_freq_table[index].frequency = cclk >> index;
+                dpm_state_table[index].csel = csel << 4; /* Shift now into PLL_DIV bitpos */
+                dpm_state_table[index].tscale =  (TIME_SCALE / (1 << csel)) - 1;
+
+                pr_debug("cpufreq: freq:%d csel:0x%x tscale:%d\n",
+                                                 bfin_freq_table[index].frequency,
+                                                 dpm_state_table[index].csel,
+                                                 dpm_state_table[index].tscale);
+        }
+        return;
+}
+
+static void bfin_adjust_core_timer(void *info)
 {
-        /* The driver only support single cpu */
-        if (cpu != 0)
-                return -1;
+        unsigned int tscale;
+        unsigned int index = *(unsigned int *)info;
 
-        return get_cclk() / 1000;
+        /* we have to adjust the core timer, because it is using cclk */
+        tscale = dpm_state_table[index].tscale;
+        bfin_write_TSCALE(tscale);
+        return;
 }
 
+static unsigned int bfin_getfreq_khz(unsigned int cpu)
+{
+        /* Both CoreA/B have the same core clock */
+        return get_cclk() / 1000;
+}
 
-static int bfin_target(struct cpufreq_policy *policy,
+static int bfin_target(struct cpufreq_policy *poli,
                         unsigned int target_freq, unsigned int relation)
 {
-        unsigned int index, plldiv, tscale;
+        unsigned int index, plldiv, cpu;
         unsigned long flags, cclk_hz;
         struct cpufreq_freqs freqs;
+        static unsigned long lpj_ref;
+        static unsigned int  lpj_ref_freq;
+
+#if defined(CONFIG_CYCLES_CLOCKSOURCE)
         cycles_t cycles;
+#endif
 
-        if (cpufreq_frequency_table_target(policy, bfin_freq_table,
-                 target_freq, relation, &index))
-                return -EINVAL;
-
-        cclk_hz = bfin_freq_table[index].frequency;
-
-        freqs.old = bfin_getfreq_khz(0);
-        freqs.new = cclk_hz;
-        freqs.cpu = 0;
-
-        pr_debug("cpufreq: changing cclk to %lu; target = %u, oldfreq = %u\n",
-                 cclk_hz, target_freq, freqs.old);
-
-        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-        local_irq_save_hw(flags);
-                plldiv = (bfin_read_PLL_DIV() & SSEL) | dpm_state_table[index].csel;
-                tscale = dpm_state_table[index].tscale;
-                bfin_write_PLL_DIV(plldiv);
-                /* we have to adjust the core timer, because it is using cclk */
-                bfin_write_TSCALE(tscale);
-                cycles = get_cycles();
-                SSYNC();
-        cycles += 10; /* ~10 cycles we lose after get_cycles() */
-        __bfin_cycles_off += (cycles << __bfin_cycles_mod) - (cycles << index);
-        __bfin_cycles_mod = index;
-        local_irq_restore_hw(flags);
-        /* TODO: just test case for cycles clock source, remove later */
-        pr_debug("cpufreq: done\n");
-        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
+        for_each_online_cpu(cpu) {
+                struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
+
+                if (!policy)
+                        continue;
+
+                if (cpufreq_frequency_table_target(policy, bfin_freq_table,
+                                 target_freq, relation, &index))
+                        return -EINVAL;
+
+                cclk_hz = bfin_freq_table[index].frequency;
+
+                freqs.old = bfin_getfreq_khz(0);
+                freqs.new = cclk_hz;
+                freqs.cpu = cpu;
+
+                pr_debug("cpufreq: changing cclk to %lu; target = %u, oldfreq = %u\n",
+                         cclk_hz, target_freq, freqs.old);
+
+                cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
+                if (cpu == CPUFREQ_CPU) {
+                        local_irq_save_hw(flags);
+                        plldiv = (bfin_read_PLL_DIV() & SSEL) |
+                                                dpm_state_table[index].csel;
+                        bfin_write_PLL_DIV(plldiv);
+                        on_each_cpu(bfin_adjust_core_timer, &index, 1);
+#if defined(CONFIG_CYCLES_CLOCKSOURCE)
+                        cycles = get_cycles();
+                        SSYNC();
+                        cycles += 10; /* ~10 cycles we lose after get_cycles() */
+                        __bfin_cycles_off +=
+                            (cycles << __bfin_cycles_mod) - (cycles << index);
+                        __bfin_cycles_mod = index;
+#endif
+                        if (!lpj_ref_freq) {
+                                lpj_ref = loops_per_jiffy;
+                                lpj_ref_freq = freqs.old;
+                        }
+                        if (freqs.new != freqs.old) {
+                                loops_per_jiffy = cpufreq_scale(lpj_ref,
+                                                lpj_ref_freq, freqs.new);
+                        }
+                        local_irq_restore_hw(flags);
+                }
+                /* TODO: just test case for cycles clock source, remove later */
+                cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
+        }
 
+        pr_debug("cpufreq: done\n");
         return 0;
 }
 
@@ -110,37 +173,16 @@ static int bfin_verify_speed(struct cpufreq_policy *policy)
 static int __init __bfin_cpu_init(struct cpufreq_policy *policy)
 {
 
-        unsigned long cclk, sclk, csel, min_cclk;
-        int index;
-
-        if (policy->cpu != 0)
-                return -EINVAL;
+        unsigned long cclk, sclk;
 
         cclk = get_cclk() / 1000;
         sclk = get_sclk() / 1000;
 
-#if ANOMALY_05000273 || ANOMALY_05000274 || \
-        (!defined(CONFIG_BF54x) && defined(CONFIG_BFIN_EXTMEM_DCACHEABLE))
-        min_cclk = sclk * 2;
-#else
-        min_cclk = sclk;
-#endif
-        csel = ((bfin_read_PLL_DIV() & CSEL) >> 4);
-
-        for (index = 0;  (cclk >> index) >= min_cclk && csel <= 3; index++, csel++) {
-                bfin_freq_table[index].frequency = cclk >> index;
-                dpm_state_table[index].csel = csel << 4; /* Shift now into PLL_DIV bitpos */
-                dpm_state_table[index].tscale =  (TIME_SCALE / (1 << csel)) - 1;
-
-                pr_debug("cpufreq: freq:%d csel:0x%x tscale:%d\n",
-                                                 bfin_freq_table[index].frequency,
-                                                 dpm_state_table[index].csel,
-                                                 dpm_state_table[index].tscale);
-        }
+        if (policy->cpu == CPUFREQ_CPU)
+                bfin_init_tables(cclk, sclk);
 
         policy->cpuinfo.transition_latency = 50000; /* 50us assumed */
 
-        /*Now ,only support one cpu */
         policy->cur = cclk;
         cpufreq_frequency_table_get_attr(bfin_freq_table, policy->cpu);
         return cpufreq_frequency_table_cpuinfo(policy, bfin_freq_table);
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index 01b2f58dfb9..a5847f5d67c 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -405,7 +405,7 @@ ENTRY(_double_fault)
 
         r0 = sp;        /* stack frame pt_regs pointer argument ==> r0 */
         SP += -12;
-        call _double_fault_c;
+        pseudo_long_call _double_fault_c, p5;
         SP += 12;
 .L_double_fault_panic:
         JUMP .L_double_fault_panic
@@ -447,7 +447,7 @@ ENTRY(_exception_to_level5)
 
         r0 = sp;        /* stack frame pt_regs pointer argument ==> r0 */
         SP += -12;
-        call _trap_c;
+        pseudo_long_call _trap_c, p4;
         SP += 12;
 
         /* If interrupts were off during the exception (IPEND[4] = 1), turn them off
@@ -482,6 +482,8 @@ ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/
         [--sp] = ASTAT;
         [--sp] = (R7:6,P5:4);
 
+        ANOMALY_283_315_WORKAROUND(p5, r7)
+
 #ifdef CONFIG_EXACT_HWERR
         /* Make sure all pending read/writes complete. This will ensure any
          * accesses which could cause hardware errors completes, and signal
@@ -492,8 +494,6 @@ ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/
         ssync;
 #endif
 
-        ANOMALY_283_315_WORKAROUND(p5, r7)
-
 #ifdef CONFIG_DEBUG_DOUBLEFAULT
         /*
          * Save these registers, as they are only valid in exception context
@@ -551,7 +551,7 @@ ENTRY(_kernel_execve)
         p0 = sp;
         sp += -16;
         [sp + 12] = p0;
-        call _do_execve;
+        pseudo_long_call _do_execve, p5;
         SP += 16;
         cc = r0 == 0;
         if ! cc jump .Lexecve_failed;
@@ -626,13 +626,6 @@ ENTRY(_system_call)
         p0 = [sp + PT_ORIG_P0];
 #endif /* CONFIG_IPIPE */
 
-        /* Check the System Call */
-        r7 = __NR_syscall;
-        /* System call number is passed in P0 */
-        r6 = p0;
-        cc = r6 < r7;
-        if ! cc jump .Lbadsys;
-
         /* are we tracing syscalls?*/
         r7 = sp;
         r6.l = lo(ALIGN_PAGE_MASK);
@@ -642,6 +635,14 @@ ENTRY(_system_call)
         r7 = [p2+TI_FLAGS];
         CC = BITTST(r7,TIF_SYSCALL_TRACE);
         if CC JUMP _sys_trace;
+        CC = BITTST(r7,TIF_SINGLESTEP);
+        if CC JUMP _sys_trace;
+
+        /* Make sure the system call # is valid */
+        p4 = __NR_syscall;
+        /* System call number is passed in P0 */
+        cc = p4 <= p0;
+        if cc jump .Lbadsys;
 
         /* Execute the appropriate system call */
 
@@ -704,7 +705,7 @@ ENTRY(_system_call)
         sp += 4;
 
         SP += -12;
-        call _schedule;
+        pseudo_long_call _schedule, p4;
         SP += 12;
 
         jump .Lresume_userspace_1;
@@ -723,7 +724,7 @@ ENTRY(_system_call)
 
         r0 = sp;
         SP += -12;
-        call _do_notify_resume;
+        pseudo_long_call _do_notify_resume, p5;
         SP += 12;
 
 .Lsyscall_really_exit:
@@ -736,11 +737,17 @@ ENDPROC(_system_call)
  * this symbol need not be global anyways, so ...
  */
 _sys_trace:
-        call _syscall_trace;
-
-        /* Execute the appropriate system call */
+        r0 = sp;
+        pseudo_long_call _syscall_trace_enter, p5;
 
+        /* Make sure the system call # is valid */
         p4 = [SP + PT_P0];
+        p3 = __NR_syscall;
+        cc = p3 <= p4;
+        r0 = -ENOSYS;
+        if cc jump .Lsys_trace_badsys;
+
+        /* Execute the appropriate system call */
         p5.l = _sys_call_table;
         p5.h = _sys_call_table;
         p5 = p5 + (p4 << 2);
@@ -758,9 +765,11 @@ _sys_trace:
         SP += -12;
         call (p5);
         SP += 24;
+.Lsys_trace_badsys:
         [sp + PT_R0] = r0;
 
-        call _syscall_trace;
+        r0 = sp;
+        pseudo_long_call _syscall_trace_leave, p5;
         jump .Lresume_userspace;
 ENDPROC(_sys_trace)
 
@@ -966,6 +975,13 @@ ENTRY(_evt_evt14)
 #else
         cli r0;
 #endif
+#ifdef CONFIG_TRACE_IRQFLAGS
+        [--sp] = rets;
+        sp += -12;
+        call _trace_hardirqs_off;
+        sp += 12;
+        rets = [sp++];
+#endif
         [--sp] = RETI;
         SP += 4;
         rts;
@@ -989,6 +1005,14 @@ ENTRY(_schedule_and_signal_from_int)
         p1 = rets;
         [sp + PT_RESERVED] = p1;
 
+#ifdef CONFIG_TRACE_IRQFLAGS
+        /* trace_hardirqs_on() checks if all irqs are disabled. But here IRQ 15
+         * is turned on, so disable all irqs. */
+        cli r0;
+        sp += -12;
+        call _trace_hardirqs_on;
+        sp += 12;
+#endif
 #ifdef CONFIG_SMP
         GET_PDA(p0, r0);        /* Fetch current PDA (can't migrate to other CPU here) */
         r0 = [p0 + PDA_IRQFLAGS];
@@ -1007,7 +1031,8 @@ ENTRY(_schedule_and_signal_from_int)
 
         r0 = sp;
         sp += -12;
-        call _finish_atomic_sections;
+
+        pseudo_long_call _finish_atomic_sections, p5;
         sp += 12;
         jump.s .Lresume_userspace;
 ENDPROC(_schedule_and_signal_from_int)
@@ -1357,7 +1382,7 @@ ENTRY(_sys_call_table)
         .long _sys_newuname
         .long _sys_ni_syscall   /* old sys_modify_ldt */
         .long _sys_adjtimex
-        .long _sys_ni_syscall   /* 125 */ /* sys_mprotect */
+        .long _sys_mprotect     /* 125 */
         .long _sys_ni_syscall   /* old sys_sigprocmask */
         .long _sys_ni_syscall   /* old "creat_module" */
         .long _sys_init_module
@@ -1376,16 +1401,16 @@ ENTRY(_sys_call_table)
         .long _sys_getdents
         .long _sys_ni_syscall   /* sys_select */
         .long _sys_flock
-        .long _sys_ni_syscall   /* sys_msync */
+        .long _sys_msync
         .long _sys_readv                /* 145 */
         .long _sys_writev
         .long _sys_getsid
         .long _sys_fdatasync
         .long _sys_sysctl
-        .long _sys_ni_syscall   /* 150 */ /* sys_mlock */
-        .long _sys_ni_syscall   /* sys_munlock */
-        .long _sys_ni_syscall   /* sys_mlockall */
-        .long _sys_ni_syscall   /* sys_munlockall */
+        .long _sys_mlock        /* 150 */
+        .long _sys_munlock
+        .long _sys_mlockall
+        .long _sys_munlockall
         .long _sys_sched_setparam
         .long _sys_sched_getparam /* 155 */
         .long _sys_sched_setscheduler
@@ -1450,8 +1475,8 @@ ENTRY(_sys_call_table)
         .long _sys_setfsuid     /* 215 */
         .long _sys_setfsgid
         .long _sys_pivot_root
-        .long _sys_ni_syscall   /* sys_mincore */
-        .long _sys_ni_syscall   /* sys_madvise */
+        .long _sys_mincore
+        .long _sys_madvise
         .long _sys_getdents64   /* 220 */
         .long _sys_fcntl64
         .long _sys_ni_syscall   /* reserved for TUX */
@@ -1507,7 +1532,7 @@ ENTRY(_sys_call_table)
         .long _sys_utimes
         .long _sys_fadvise64_64
         .long _sys_ni_syscall /* vserver */
-        .long _sys_ni_syscall /* 275, mbind */
+        .long _sys_mbind        /* 275 */
         .long _sys_ni_syscall /* get_mempolicy */
         .long _sys_ni_syscall /* set_mempolicy */
         .long _sys_mq_open
diff --git a/arch/blackfin/mach-common/head.S b/arch/blackfin/mach-common/head.S
index cab0a0031ee..4391621d904 100644
--- a/arch/blackfin/mach-common/head.S
+++ b/arch/blackfin/mach-common/head.S
@@ -144,8 +144,8 @@ ENTRY(__start)
 #endif
 
         /* Initialize stack pointer */
-        sp.l = _init_thread_union;
-        sp.h = _init_thread_union;
+        sp.l = _init_thread_union + THREAD_SIZE;
+        sp.h = _init_thread_union + THREAD_SIZE;
         fp = sp;
         usp = sp;
 
@@ -186,6 +186,11 @@ ENTRY(__start)
 
         /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
         call _bfin_relocate_l1_mem;
+
+#ifdef CONFIG_ROMKERNEL
+        call _bfin_relocate_xip_data;
+#endif
+
 #ifdef CONFIG_BFIN_KERNEL_CLOCK
         /* Only use on-chip scratch space for stack when absolutely required
          * to avoid Anomaly 05000227 ... we know the init_clocks() func only
@@ -257,12 +262,7 @@ ENTRY(_real_start)
         R0 = R7;
         call _cmdline_init;
 
-        /* Load the current thread pointer and stack */
-        p1 = THREAD_SIZE + 4 (z);       /* +4 is for reti loading */
-        sp = sp + p1;
-        usp = sp;
-        fp = sp;
-        sp += -12;
+        sp += -12 + 4; /* +4 is for reti loading above */
         call _init_pda
         sp += 12;
         jump.l _start_kernel;
diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S
index 8085ff1cce0..cee62cf4acd 100644
--- a/arch/blackfin/mach-common/interrupt.S
+++ b/arch/blackfin/mach-common/interrupt.S
@@ -88,6 +88,13 @@ __common_int_entry:
 #else
         cli r1;
 #endif
+#ifdef CONFIG_TRACE_IRQFLAGS
+        [--sp] = r0;
+        sp += -12;
+        call _trace_hardirqs_off;
+        sp += 12;
+        r0 = [sp++];
+#endif
         [--sp] = RETI;  /* orig_pc */
         /* Clear all L registers.  */
         r1 = 0 (x);
@@ -109,10 +116,10 @@ __common_int_entry:
         cc = r0 == 0;
         if cc jump .Lcommon_restore_context;
 #else /* CONFIG_IPIPE */
-        call _do_irq;
+        pseudo_long_call _do_irq, p2;
         SP += 12;
 #endif /* CONFIG_IPIPE */
-        call _return_from_int;
+        pseudo_long_call _return_from_int, p2;
 .Lcommon_restore_context:
         RESTORE_CONTEXT
         rti;
@@ -168,7 +175,7 @@ ENTRY(_evt_ivhw)
 
         r0 = sp;        /* stack frame pt_regs pointer argument ==> r0 */
         SP += -12;
-        call _trap_c;
+        pseudo_long_call _trap_c, p5;
         SP += 12;
 
 #ifdef EBIU_ERRMST
@@ -179,7 +186,7 @@ ENTRY(_evt_ivhw)
         w[p0] = r0.l;
 #endif
 
-        call _ret_from_exception;
+        pseudo_long_call _ret_from_exception, p2;
 
 .Lcommon_restore_all_sys:
         RESTORE_ALL_SYS
@@ -187,12 +194,28 @@ ENTRY(_evt_ivhw)
 ENDPROC(_evt_ivhw)
 
 /* Interrupt routine for evt2 (NMI).
- * We don't actually use this, so just return.
  * For inner circle type details, please see:
  * http://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:nmi
  */
 ENTRY(_evt_nmi)
+#ifndef CONFIG_NMI_WATCHDOG
 .weak _evt_nmi
+#else
+        /* Not take account of CPLBs, this handler will not return */
+        SAVE_ALL_SYS
+        r0 = sp;
+        r1 = retn;
+        [sp + PT_PC] = r1;
+        trace_buffer_save(p4,r5);
+
+        ANOMALY_283_315_WORKAROUND(p4, r5)
+
+        SP += -12;
+        call _do_nmi;
+        SP += 12;
+1:
+        jump 1b;
+#endif
         rtn;
 ENDPROC(_evt_nmi)
 
@@ -223,7 +246,7 @@ ENTRY(_evt_system_call)
 #ifdef CONFIG_FRAME_POINTER
         fp = 0;
 #endif
-        call _system_call;
+        pseudo_long_call _system_call, p2;
         jump .Lcommon_restore_context;
 ENDPROC(_evt_system_call)
 
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index 1873b2c1fed..7ad8878bfa1 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -28,6 +28,7 @@
 #include <asm/dpmc.h>
 #include <asm/bfin5xx_spi.h>
 #include <asm/bfin_sport.h>
+#include <asm/bfin_can.h>
 
 #define SIC_SYSIRQ(irq) (irq - (IRQ_CORETMR + 1))
 
@@ -172,7 +173,12 @@ static void bfin_internal_mask_irq(unsigned int irq)
         local_irq_restore_hw(flags);
 }
 
+#ifdef CONFIG_SMP
+static void bfin_internal_unmask_irq_affinity(unsigned int irq,
+                const struct cpumask *affinity)
+#else
 static void bfin_internal_unmask_irq(unsigned int irq)
+#endif
 {
         unsigned long flags;
 
@@ -185,16 +191,38 @@ static void bfin_internal_unmask_irq(unsigned int irq)
         local_irq_save_hw(flags);
         mask_bank = SIC_SYSIRQ(irq) / 32;
         mask_bit = SIC_SYSIRQ(irq) % 32;
-        bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) |
-                             (1 << mask_bit));
 #ifdef CONFIG_SMP
-        bfin_write_SICB_IMASK(mask_bank, bfin_read_SICB_IMASK(mask_bank) |
-                             (1 << mask_bit));
+        if (cpumask_test_cpu(0, affinity))
+#endif
+                bfin_write_SIC_IMASK(mask_bank,
+                        bfin_read_SIC_IMASK(mask_bank) |
+                        (1 << mask_bit));
+#ifdef CONFIG_SMP
+        if (cpumask_test_cpu(1, affinity))
+                bfin_write_SICB_IMASK(mask_bank,
+                        bfin_read_SICB_IMASK(mask_bank) |
+                        (1 << mask_bit));
 #endif
 #endif
         local_irq_restore_hw(flags);
 }
 
+#ifdef CONFIG_SMP
+static void bfin_internal_unmask_irq(unsigned int irq)
+{
+        struct irq_desc *desc = irq_to_desc(irq);
+        bfin_internal_unmask_irq_affinity(irq, desc->affinity);
+}
+
+static int bfin_internal_set_affinity(unsigned int irq, const struct cpumask *mask)
+{
+        bfin_internal_mask_irq(irq);
+        bfin_internal_unmask_irq_affinity(irq, mask);
+
+        return 0;
+}
+#endif
+
 #ifdef CONFIG_PM
 int bfin_internal_set_wake(unsigned int irq, unsigned int state)
 {
@@ -224,11 +252,6 @@ int bfin_internal_set_wake(unsigned int irq, unsigned int state)
         wakeup |= USBWE;
         break;
 #endif
-#ifdef IRQ_KEY
-        case IRQ_KEY:
-        wakeup |= KPADWE;
-        break;
-#endif
 #ifdef CONFIG_BF54x
         case IRQ_CNT:
         wakeup |= ROTWE;
@@ -270,6 +293,9 @@ static struct irq_chip bfin_internal_irqchip = {
         .mask_ack = bfin_internal_mask_irq,
         .disable = bfin_internal_mask_irq,
         .enable = bfin_internal_unmask_irq,
+#ifdef CONFIG_SMP
+        .set_affinity = bfin_internal_set_affinity,
+#endif
 #ifdef CONFIG_PM
         .set_wake = bfin_internal_set_wake,
 #endif
@@ -294,7 +320,6 @@ static int error_int_mask;
 static void bfin_generic_error_mask_irq(unsigned int irq)
 {
         error_int_mask &= ~(1L << (irq - IRQ_PPI_ERROR));
-
         if (!error_int_mask)
                 bfin_internal_mask_irq(IRQ_GENERIC_ERROR);
 }
@@ -385,6 +410,127 @@ static void bfin_demux_error_irq(unsigned int int_err_irq,
 }
 #endif                          /* BF537_GENERIC_ERROR_INT_DEMUX */
 
+#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+static int mac_stat_int_mask;
+
+static void bfin_mac_status_ack_irq(unsigned int irq)
+{
+        switch (irq) {
+        case IRQ_MAC_MMCINT:
+                bfin_write_EMAC_MMC_TIRQS(
+                        bfin_read_EMAC_MMC_TIRQE() &
+                        bfin_read_EMAC_MMC_TIRQS());
+                bfin_write_EMAC_MMC_RIRQS(
+                        bfin_read_EMAC_MMC_RIRQE() &
+                        bfin_read_EMAC_MMC_RIRQS());
+                break;
+        case IRQ_MAC_RXFSINT:
+                bfin_write_EMAC_RX_STKY(
+                        bfin_read_EMAC_RX_IRQE() &
+                        bfin_read_EMAC_RX_STKY());
+                break;
+        case IRQ_MAC_TXFSINT:
+                bfin_write_EMAC_TX_STKY(
+                        bfin_read_EMAC_TX_IRQE() &
+                        bfin_read_EMAC_TX_STKY());
+                break;
+        case IRQ_MAC_WAKEDET:
+                 bfin_write_EMAC_WKUP_CTL(
+                        bfin_read_EMAC_WKUP_CTL() | MPKS | RWKS);
+                break;
+        default:
+                /* These bits are W1C */
+                bfin_write_EMAC_SYSTAT(1L << (irq - IRQ_MAC_PHYINT));
+                break;
+        }
+}
+
+static void bfin_mac_status_mask_irq(unsigned int irq)
+{
+        mac_stat_int_mask &= ~(1L << (irq - IRQ_MAC_PHYINT));
+#ifdef BF537_GENERIC_ERROR_INT_DEMUX
+        switch (irq) {
+        case IRQ_MAC_PHYINT:
+                bfin_write_EMAC_SYSCTL(bfin_read_EMAC_SYSCTL() & ~PHYIE);
+                break;
+        default:
+                break;
+        }
+#else
+        if (!mac_stat_int_mask)
+                bfin_internal_mask_irq(IRQ_MAC_ERROR);
+#endif
+        bfin_mac_status_ack_irq(irq);
+}
+
+static void bfin_mac_status_unmask_irq(unsigned int irq)
+{
+#ifdef BF537_GENERIC_ERROR_INT_DEMUX
+        switch (irq) {
+        case IRQ_MAC_PHYINT:
+                bfin_write_EMAC_SYSCTL(bfin_read_EMAC_SYSCTL() | PHYIE);
+                break;
+        default:
+                break;
+        }
+#else
+        if (!mac_stat_int_mask)
+                bfin_internal_unmask_irq(IRQ_MAC_ERROR);
+#endif
+        mac_stat_int_mask |= 1L << (irq - IRQ_MAC_PHYINT);
+}
+
+#ifdef CONFIG_PM
+int bfin_mac_status_set_wake(unsigned int irq, unsigned int state)
+{
+#ifdef BF537_GENERIC_ERROR_INT_DEMUX
+        return bfin_internal_set_wake(IRQ_GENERIC_ERROR, state);
+#else
+        return bfin_internal_set_wake(IRQ_MAC_ERROR, state);
+#endif
+}
+#endif
+
+static struct irq_chip bfin_mac_status_irqchip = {
+        .name = "MACST",
+        .ack = bfin_ack_noop,
+        .mask_ack = bfin_mac_status_mask_irq,
+        .mask = bfin_mac_status_mask_irq,
+        .unmask = bfin_mac_status_unmask_irq,
+#ifdef CONFIG_PM
+        .set_wake = bfin_mac_status_set_wake,
+#endif
+};
+
+static void bfin_demux_mac_status_irq(unsigned int int_err_irq,
+                                 struct irq_desc *inta_desc)
+{
+        int i, irq = 0;
+        u32 status = bfin_read_EMAC_SYSTAT();
+
+        for (i = 0; i < (IRQ_MAC_STMDONE - IRQ_MAC_PHYINT); i++)
+                if (status & (1L << i)) {
+                        irq = IRQ_MAC_PHYINT + i;
+                        break;
+                }
+
+        if (irq) {
+                if (mac_stat_int_mask & (1L << (irq - IRQ_MAC_PHYINT))) {
+                        bfin_handle_irq(irq);
+                } else {
+                        bfin_mac_status_ack_irq(irq);
+                        pr_debug("IRQ %d:"
+                                 " MASKED MAC ERROR INTERRUPT ASSERTED\n",
+                                 irq);
+                }
+        } else
+                printk(KERN_ERR
+                       "%s : %s : LINE %d :\nIRQ ?: MAC ERROR"
+                       " INTERRUPT ASSERTED BUT NO SOURCE FOUND\n",
+                       __func__, __FILE__, __LINE__);
+}
+#endif
+
 static inline void bfin_set_irq_handler(unsigned irq, irq_flow_handler_t handle)
 {
 #ifdef CONFIG_IPIPE
@@ -1031,7 +1177,6 @@ int __init init_arch_irq(void)
 #elif defined(CONFIG_BF538) || defined(CONFIG_BF539)
                 case IRQ_PORTF_INTA:
 #endif
-
                         set_irq_chained_handler(irq,
                                                 bfin_demux_gpio_irq);
                         break;
@@ -1040,29 +1185,36 @@ int __init init_arch_irq(void)
                         set_irq_chained_handler(irq, bfin_demux_error_irq);
                         break;
 #endif
-
-#ifdef CONFIG_SMP
-#ifdef CONFIG_TICKSOURCE_GPTMR0
-                case IRQ_TIMER0:
-#endif
-#ifdef CONFIG_TICKSOURCE_CORETMR
-                case IRQ_CORETMR:
+#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+                case IRQ_MAC_ERROR:
+                        set_irq_chained_handler(irq, bfin_demux_mac_status_irq);
+                        break;
 #endif
+#ifdef CONFIG_SMP
                 case IRQ_SUPPLE_0:
                 case IRQ_SUPPLE_1:
                         set_irq_handler(irq, handle_percpu_irq);
                         break;
 #endif
 
-#ifdef CONFIG_IPIPE
-#ifndef CONFIG_TICKSOURCE_CORETMR
-                case IRQ_TIMER0:
+#ifdef CONFIG_TICKSOURCE_CORETMR
+                case IRQ_CORETMR:
+# ifdef CONFIG_SMP
+                        set_irq_handler(irq, handle_percpu_irq);
+                        break;
+# else
                         set_irq_handler(irq, handle_simple_irq);
                         break;
+# endif
 #endif
-                case IRQ_CORETMR:
+
+#ifdef CONFIG_TICKSOURCE_GPTMR0
+                case IRQ_TIMER0:
                         set_irq_handler(irq, handle_simple_irq);
                         break;
+#endif
+
+#ifdef CONFIG_IPIPE
                 default:
                         set_irq_handler(irq, handle_level_irq);
                         break;
@@ -1078,14 +1230,22 @@ int __init init_arch_irq(void)
         for (irq = IRQ_PPI_ERROR; irq <= IRQ_UART1_ERROR; irq++)
                 set_irq_chip_and_handler(irq, &bfin_generic_error_irqchip,
                                          handle_level_irq);
+#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+        set_irq_chained_handler(IRQ_MAC_ERROR, bfin_demux_mac_status_irq);
+#endif
 #endif
 
+#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+        for (irq = IRQ_MAC_PHYINT; irq <= IRQ_MAC_STMDONE; irq++)
+                set_irq_chip_and_handler(irq, &bfin_mac_status_irqchip,
+                                         handle_level_irq);
+#endif
         /* if configured as edge, then will be changed to do_edge_IRQ */
-        for (irq = GPIO_IRQ_BASE; irq < NR_IRQS; irq++)
+        for (irq = GPIO_IRQ_BASE;
+                irq < (GPIO_IRQ_BASE + MAX_BLACKFIN_GPIOS); irq++)
                 set_irq_chip_and_handler(irq, &bfin_gpio_irqchip,
                                          handle_level_irq);
 
-
         bfin_write_IMASK(0);
         CSYNC();
         ilat = bfin_read_ILAT();
diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c
index 8837be4edb4..c1f1ccc846f 100644
--- a/arch/blackfin/mach-common/pm.c
+++ b/arch/blackfin/mach-common/pm.c
@@ -11,6 +11,7 @@
 #include <linux/suspend.h>
 #include <linux/sched.h>
 #include <linux/proc_fs.h>
+#include <linux/slab.h>
 #include <linux/io.h>
 #include <linux/irq.h>
 
diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c
index 369e687582b..7cecbaf0358 100644
--- a/arch/blackfin/mach-common/smp.c
+++ b/arch/blackfin/mach-common/smp.c
@@ -21,6 +21,7 @@
 #include <linux/smp.h>
 #include <linux/seq_file.h>
 #include <linux/irq.h>
+#include <linux/slab.h>
 #include <asm/atomic.h>
 #include <asm/cacheflush.h>
 #include <asm/mmu_context.h>
@@ -122,9 +123,17 @@ static void ipi_call_function(unsigned int cpu, struct ipi_message *msg)
         wait = msg->call_struct.wait;
         cpu_clear(cpu, msg->call_struct.pending);
         func(info);
-        if (wait)
+        if (wait) {
+#ifdef __ARCH_SYNC_CORE_DCACHE
+                /*
+                 * 'wait' usually means synchronization between CPUs.
+                 * Invalidate D cache in case shared data was changed
+                 * by func() to ensure cache coherence.
+                 */
+                resync_core_dcache();
+#endif
                 cpu_clear(cpu, msg->call_struct.waitmask);
-        else
+        } else
                 kfree(msg);
 }
 
@@ -219,6 +228,13 @@ int smp_call_function(void (*func)(void *info), void *info, int wait)
                         blackfin_dcache_invalidate_range(
                                 (unsigned long)(&msg->call_struct.waitmask),
                                 (unsigned long)(&msg->call_struct.waitmask));
+#ifdef __ARCH_SYNC_CORE_DCACHE
+                /*
+                 * Invalidate D cache in case shared data was changed by
+                 * other processors to ensure cache coherence.
+                 */
+                resync_core_dcache();
+#endif
                 kfree(msg);
         }
         return 0;
@@ -261,6 +277,13 @@ int smp_call_function_single(int cpuid, void (*func) (void *info), void *info,
                         blackfin_dcache_invalidate_range(
                                 (unsigned long)(&msg->call_struct.waitmask),
                                 (unsigned long)(&msg->call_struct.waitmask));
+#ifdef __ARCH_SYNC_CORE_DCACHE
+                /*
+                 * Invalidate D cache in case shared data was changed by
+                 * other processors to ensure cache coherence.
+                 */
+                resync_core_dcache();
+#endif
                 kfree(msg);
         }
         return 0;
@@ -322,8 +345,11 @@ void smp_send_stop(void)
 
 int __cpuinit __cpu_up(unsigned int cpu)
 {
-        struct task_struct *idle;
         int ret;
+        static struct task_struct *idle;
+
+        if (idle)
+                free_task(idle);
 
         idle = fork_idle(cpu);
         if (IS_ERR(idle)) {
@@ -332,7 +358,6 @@ int __cpuinit __cpu_up(unsigned int cpu)
         }
 
         secondary_stack = task_stack_page(idle) + THREAD_SIZE;
-        smp_wmb();
 
         ret = platform_boot_secondary(cpu, idle);
 
@@ -343,9 +368,6 @@ int __cpuinit __cpu_up(unsigned int cpu)
 
 static void __cpuinit setup_secondary(unsigned int cpu)
 {
-#if !defined(CONFIG_TICKSOURCE_GPTMR0)
-        struct irq_desc *timer_desc;
-#endif
         unsigned long ilat;
 
         bfin_write_IMASK(0);
@@ -360,17 +382,6 @@ static void __cpuinit setup_secondary(unsigned int cpu)
         bfin_irq_flags |= IMASK_IVG15 |
             IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
             IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
-
-#if defined(CONFIG_TICKSOURCE_GPTMR0)
-        /* Power down the core timer, just to play safe. */
-        bfin_write_TCNTL(0);
-
-        /* system timer0 has been setup by CoreA. */
-#else
-        timer_desc = irq_desc + IRQ_CORETMR;
-        setup_core_timer();
-        timer_desc->chip->enable(IRQ_CORETMR);
-#endif
 }
 
 void __cpuinit secondary_start_kernel(void)
@@ -405,7 +416,6 @@ void __cpuinit secondary_start_kernel(void)
         atomic_inc(&mm->mm_users);
         atomic_inc(&mm->mm_count);
         current->active_mm = mm;
-        BUG_ON(current->mm);    /* Can't be, but better be safe than sorry. */
 
         preempt_disable();
 
@@ -413,6 +423,9 @@ void __cpuinit secondary_start_kernel(void)
 
         platform_secondary_init(cpu);
 
+        /* setup local core timer */
+        bfin_local_timer_setup();
+
         local_irq_enable();
 
         /*
@@ -462,25 +475,58 @@ void smp_icache_flush_range_others(unsigned long start, unsigned long end)
 EXPORT_SYMBOL_GPL(smp_icache_flush_range_others);
 
 #ifdef __ARCH_SYNC_CORE_ICACHE
+unsigned long icache_invld_count[NR_CPUS];
 void resync_core_icache(void)
 {
         unsigned int cpu = get_cpu();
         blackfin_invalidate_entire_icache();
-        ++per_cpu(cpu_data, cpu).icache_invld_count;
+        icache_invld_count[cpu]++;
         put_cpu();
 }
 EXPORT_SYMBOL(resync_core_icache);
 #endif
 
 #ifdef __ARCH_SYNC_CORE_DCACHE
+unsigned long dcache_invld_count[NR_CPUS];
 unsigned long barrier_mask __attribute__ ((__section__(".l2.bss")));
 
 void resync_core_dcache(void)
 {
         unsigned int cpu = get_cpu();
         blackfin_invalidate_entire_dcache();
-        ++per_cpu(cpu_data, cpu).dcache_invld_count;
+        dcache_invld_count[cpu]++;
         put_cpu();
 }
 EXPORT_SYMBOL(resync_core_dcache);
 #endif
+
+#ifdef CONFIG_HOTPLUG_CPU
+int __cpuexit __cpu_disable(void)
+{
+        unsigned int cpu = smp_processor_id();
+
+        if (cpu == 0)
+                return -EPERM;
+
+        set_cpu_online(cpu, false);
+        return 0;
+}
+
+static DECLARE_COMPLETION(cpu_killed);
+
+int __cpuexit __cpu_die(unsigned int cpu)
+{
+        return wait_for_completion_timeout(&cpu_killed, 5000);
+}
+
+void cpu_die(void)
+{
+        complete(&cpu_killed);
+
+        atomic_dec(&init_mm.mm_users);
+        atomic_dec(&init_mm.mm_count);
+
+        local_irq_disable();
+        platform_cpu_die();
+}
+#endif
diff --git a/arch/blackfin/mm/init.c b/arch/blackfin/mm/init.c
index bb9c98f9cb5..355b87aa6b9 100644
--- a/arch/blackfin/mm/init.c
+++ b/arch/blackfin/mm/init.c
@@ -4,6 +4,7 @@
  * Licensed under the GPL-2 or later.
  */
 
+#include <linux/gfp.h>
 #include <linux/swap.h>
 #include <linux/bootmem.h>
 #include <linux/uaccess.h>
diff --git a/arch/blackfin/mm/isram-driver.c b/arch/blackfin/mm/isram-driver.c
index 84cdc5a1c13..39b058564f6 100644
--- a/arch/blackfin/mm/isram-driver.c
+++ b/arch/blackfin/mm/isram-driver.c
@@ -11,6 +11,7 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
+#include <linux/slab.h>
 #include <linux/spinlock.h>
 #include <linux/sched.h>
 
@@ -62,7 +63,7 @@ static void isram_write(const void *addr, uint64_t data)
         uint32_t cmd;
         unsigned long flags;
 
-        if (addr >= (void *)(L1_CODE_START + L1_CODE_LENGTH))
+        if (unlikely(addr >= (void *)(L1_CODE_START + L1_CODE_LENGTH)))
                 return;
 
         cmd = IADDR2DTEST(addr) | 2;             /* write */
@@ -93,7 +94,7 @@ static uint64_t isram_read(const void *addr)
         unsigned long flags;
         uint64_t ret;
 
-        if (addr > (void *)(L1_CODE_START + L1_CODE_LENGTH))
+        if (unlikely(addr > (void *)(L1_CODE_START + L1_CODE_LENGTH)))
                 return 0;
 
         cmd = IADDR2DTEST(addr) | 0;              /* read */
@@ -120,7 +121,7 @@ static bool isram_check_addr(const void *addr, size_t n)
 {
         if ((addr >= (void *)L1_CODE_START) &&
             (addr < (void *)(L1_CODE_START + L1_CODE_LENGTH))) {
-                if ((addr + n) > (void *)(L1_CODE_START + L1_CODE_LENGTH)) {
+                if (unlikely((addr + n) > (void *)(L1_CODE_START + L1_CODE_LENGTH))) {
                         show_stack(NULL, NULL);
                         pr_err("copy involving %p length (%zu) too long\n", addr, n);
                 }
diff --git a/arch/blackfin/mm/sram-alloc.c b/arch/blackfin/mm/sram-alloc.c
index f068c11ea98..49b2ff2c8b7 100644
--- a/arch/blackfin/mm/sram-alloc.c
+++ b/arch/blackfin/mm/sram-alloc.c
@@ -17,6 +17,7 @@
 #include <linux/proc_fs.h>
 #include <linux/spinlock.h>
 #include <linux/rtc.h>
+#include <linux/slab.h>
 #include <asm/blackfin.h>
 #include <asm/mem_map.h>
 #include "blackfin_sram.h"
@@ -402,7 +403,7 @@ void *l1_data_A_sram_alloc(size_t size)
         void *addr;
         unsigned int cpu;
 
-        cpu = get_cpu();
+        cpu = smp_processor_id();
         /* add mutex operation */
         spin_lock_irqsave(&per_cpu(l1_data_sram_lock, cpu), flags);
 
@@ -411,7 +412,6 @@ void *l1_data_A_sram_alloc(size_t size)
 
         /* add mutex operation */
         spin_unlock_irqrestore(&per_cpu(l1_data_sram_lock, cpu), flags);
-        put_cpu();
 
         pr_debug("Allocated address in l1_data_A_sram_alloc is 0x%lx+0x%lx\n",
                  (long unsigned int)addr, size);
@@ -430,7 +430,7 @@ int l1_data_A_sram_free(const void *addr)
         int ret;
         unsigned int cpu;
 
-        cpu = get_cpu();
+        cpu = smp_processor_id();
         /* add mutex operation */
         spin_lock_irqsave(&per_cpu(l1_data_sram_lock, cpu), flags);
 
@@ -439,7 +439,6 @@ int l1_data_A_sram_free(const void *addr)
 
         /* add mutex operation */
         spin_unlock_irqrestore(&per_cpu(l1_data_sram_lock, cpu), flags);
-        put_cpu();
 
         return ret;
 #else
@@ -455,7 +454,7 @@ void *l1_data_B_sram_alloc(size_t size)
         void *addr;
         unsigned int cpu;
 
-        cpu = get_cpu();
+        cpu = smp_processor_id();
         /* add mutex operation */
         spin_lock_irqsave(&per_cpu(l1_data_sram_lock, cpu), flags);
 
@@ -464,7 +463,6 @@ void *l1_data_B_sram_alloc(size_t size)
 
         /* add mutex operation */
         spin_unlock_irqrestore(&per_cpu(l1_data_sram_lock, cpu), flags);
-        put_cpu();
 
         pr_debug("Allocated address in l1_data_B_sram_alloc is 0x%lx+0x%lx\n",
                  (long unsigned int)addr, size);
@@ -483,7 +481,7 @@ int l1_data_B_sram_free(const void *addr)
         int ret;
         unsigned int cpu;
 
-        cpu = get_cpu();
+        cpu = smp_processor_id();
         /* add mutex operation */
         spin_lock_irqsave(&per_cpu(l1_data_sram_lock, cpu), flags);
 
@@ -492,7 +490,6 @@ int l1_data_B_sram_free(const void *addr)
 
         /* add mutex operation */
         spin_unlock_irqrestore(&per_cpu(l1_data_sram_lock, cpu), flags);
-        put_cpu();
 
         return ret;
 #else
@@ -540,7 +537,7 @@ void *l1_inst_sram_alloc(size_t size)
         void *addr;
         unsigned int cpu;
 
-        cpu = get_cpu();
+        cpu = smp_processor_id();
         /* add mutex operation */
         spin_lock_irqsave(&per_cpu(l1_inst_sram_lock, cpu), flags);
 
@@ -549,7 +546,6 @@ void *l1_inst_sram_alloc(size_t size)
 
         /* add mutex operation */
         spin_unlock_irqrestore(&per_cpu(l1_inst_sram_lock, cpu), flags);
-        put_cpu();
 
         pr_debug("Allocated address in l1_inst_sram_alloc is 0x%lx+0x%lx\n",
                  (long unsigned int)addr, size);
@@ -568,7 +564,7 @@ int l1_inst_sram_free(const void *addr)
         int ret;
         unsigned int cpu;
 
-        cpu = get_cpu();
+        cpu = smp_processor_id();
         /* add mutex operation */
         spin_lock_irqsave(&per_cpu(l1_inst_sram_lock, cpu), flags);
 
@@ -577,7 +573,6 @@ int l1_inst_sram_free(const void *addr)
 
         /* add mutex operation */
         spin_unlock_irqrestore(&per_cpu(l1_inst_sram_lock, cpu), flags);
-        put_cpu();
 
         return ret;
 #else
@@ -593,7 +588,7 @@ void *l1sram_alloc(size_t size)
         void *addr;
         unsigned int cpu;
 
-        cpu = get_cpu();
+        cpu = smp_processor_id();
         /* add mutex operation */
         spin_lock_irqsave(&per_cpu(l1sram_lock, cpu), flags);
 
@@ -602,7 +597,6 @@ void *l1sram_alloc(size_t size)
 
         /* add mutex operation */
         spin_unlock_irqrestore(&per_cpu(l1sram_lock, cpu), flags);
-        put_cpu();
 
         return addr;
 }
@@ -614,7 +608,7 @@ void *l1sram_alloc_max(size_t *psize)
         void *addr;
         unsigned int cpu;
 
-        cpu = get_cpu();
+        cpu = smp_processor_id();
         /* add mutex operation */
         spin_lock_irqsave(&per_cpu(l1sram_lock, cpu), flags);
 
@@ -623,7 +617,6 @@ void *l1sram_alloc_max(size_t *psize)
 
         /* add mutex operation */
         spin_unlock_irqrestore(&per_cpu(l1sram_lock, cpu), flags);
-        put_cpu();
 
         return addr;
 }
@@ -635,7 +628,7 @@ int l1sram_free(const void *addr)
         int ret;
         unsigned int cpu;
 
-        cpu = get_cpu();
+        cpu = smp_processor_id();
         /* add mutex operation */
         spin_lock_irqsave(&per_cpu(l1sram_lock, cpu), flags);
 
@@ -644,7 +637,6 @@ int l1sram_free(const void *addr)
 
         /* add mutex operation */
         spin_unlock_irqrestore(&per_cpu(l1sram_lock, cpu), flags);
-        put_cpu();
 
         return ret;
 }
diff --git a/arch/cris/Kconfig b/arch/cris/Kconfig
index 7adac388a77..059eac6abda 100644
--- a/arch/cris/Kconfig
+++ b/arch/cris/Kconfig
@@ -20,6 +20,12 @@ config RWSEM_GENERIC_SPINLOCK
 config RWSEM_XCHGADD_ALGORITHM
         bool
 
+config GENERIC_TIME
+        def_bool y
+
+config ARCH_USES_GETTIMEOFFSET
+        def_bool y
+
 config GENERIC_IOMAP
        bool
        default y
diff --git a/arch/cris/arch-v10/drivers/i2c.c b/arch/cris/arch-v10/drivers/i2c.c
index 7f656ae0b21..a8737a8eb22 100644
--- a/arch/cris/arch-v10/drivers/i2c.c
+++ b/arch/cris/arch-v10/drivers/i2c.c
@@ -14,7 +14,6 @@
 
 #include <linux/module.h>
 #include <linux/sched.h>
-#include <linux/slab.h>
 #include <linux/smp_lock.h>
 #include <linux/errno.h>
 #include <linux/kernel.h>
diff --git a/arch/cris/arch-v10/drivers/sync_serial.c b/arch/cris/arch-v10/drivers/sync_serial.c
index 562b9a7feae..109dcd826d1 100644
--- a/arch/cris/arch-v10/drivers/sync_serial.c
+++ b/arch/cris/arch-v10/drivers/sync_serial.c
@@ -17,7 +17,6 @@
 #include <linux/errno.h>
 #include <linux/major.h>
 #include <linux/sched.h>
-#include <linux/slab.h>
 #include <linux/interrupt.h>
 #include <linux/poll.h>
 #include <linux/init.h>
diff --git a/arch/cris/arch-v10/kernel/entry.S b/arch/cris/arch-v10/kernel/entry.S
index c52bef39e25..0d6420d087f 100644
--- a/arch/cris/arch-v10/kernel/entry.S
+++ b/arch/cris/arch-v10/kernel/entry.S
@@ -692,7 +692,7 @@ sys_call_table:
         .long sys_swapon
         .long sys_reboot
         .long sys_old_readdir
-        .long old_mmap          /* 90 */
+        .long sys_old_mmap      /* 90 */
         .long sys_munmap
         .long sys_truncate
         .long sys_ftruncate
diff --git a/arch/cris/arch-v10/kernel/process.c b/arch/cris/arch-v10/kernel/process.c
index c4c69cf721e..93f0f64b132 100644
--- a/arch/cris/arch-v10/kernel/process.c
+++ b/arch/cris/arch-v10/kernel/process.c
@@ -11,9 +11,9 @@
  */
 
 #include <linux/sched.h>
+#include <linux/slab.h>
 #include <linux/err.h>
 #include <linux/fs.h>
-#include <linux/slab.h>
 #include <arch/svinto.h>
 #include <linux/init.h>
 
diff --git a/arch/cris/arch-v10/kernel/ptrace.c b/arch/cris/arch-v10/kernel/ptrace.c
index ee505b2eb4d..e70c804e937 100644
--- a/arch/cris/arch-v10/kernel/ptrace.c
+++ b/arch/cris/arch-v10/kernel/ptrace.c
@@ -127,57 +127,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                         ret = 0;
                         break;
 
-                case PTRACE_SYSCALL:
-                case PTRACE_CONT:
-                        ret = -EIO;
-                        
-                        if (!valid_signal(data))
-                                break;
-                        
-                        if (request == PTRACE_SYSCALL) {
-                                set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        }
-                        else {
-                                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        }
-                        
-                        child->exit_code = data;
-                        
-                        /* TODO: make sure any pending breakpoint is killed */
-                        wake_up_process(child);
-                        ret = 0;
-                        
-                        break;
-                
-                /* Make the child exit by sending it a sigkill. */
-                case PTRACE_KILL:
-                        ret = 0;
-                        
-                        if (child->exit_state == EXIT_ZOMBIE)
-                                break;
-                        
-                        child->exit_code = SIGKILL;
-                        
-                        /* TODO: make sure any pending breakpoint is killed */
-                        wake_up_process(child);
-                        break;
-
-                /* Set the trap flag. */
-                case PTRACE_SINGLESTEP:
-                        ret = -EIO;
-                        
-                        if (!valid_signal(data))
-                                break;
-                        
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-
-                        /* TODO: set some clever breakpoint mechanism... */
-
-                        child->exit_code = data;
-                        wake_up_process(child);
-                        ret = 0;
-                        break;
-
                 /* Get all GP registers from the child. */
                 case PTRACE_GETREGS: {
                         int i;
diff --git a/arch/cris/arch-v10/lib/old_checksum.c b/arch/cris/arch-v10/lib/old_checksum.c
index 1734b467efa..8f79163f139 100644
--- a/arch/cris/arch-v10/lib/old_checksum.c
+++ b/arch/cris/arch-v10/lib/old_checksum.c
@@ -77,7 +77,7 @@ __wsum csum_partial(const void *p, int len, __wsum __sum)
                 sum += *buff++;
 
         if (endMarker > buff)
-                sum += *(const u8 *)buff;       /* add extra byte seperately */
+                sum += *(const u8 *)buff;       /* add extra byte separately */
 
         BITOFF;
         return (__force __wsum)sum;
diff --git a/arch/cris/arch-v32/drivers/cryptocop.c b/arch/cris/arch-v32/drivers/cryptocop.c
index fd529a0ec75..b70fb34939d 100644
--- a/arch/cris/arch-v32/drivers/cryptocop.c
+++ b/arch/cris/arch-v32/drivers/cryptocop.c
@@ -628,9 +628,9 @@ static int create_output_descriptors(struct cryptocop_operation *operation, int
                 cdesc->dma_descr->buf = (char*)virt_to_phys(operation->tfrm_op.indata[*iniov_ix].iov_base + *iniov_offset);
                 cdesc->dma_descr->after = cdesc->dma_descr->buf + dlength;
 
+                assert(desc_len >= dlength);
                 desc_len -= dlength;
                 *iniov_offset += dlength;
-                assert(desc_len >= 0);
                 if (*iniov_offset >= operation->tfrm_op.indata[*iniov_ix].iov_len) {
                         *iniov_offset = 0;
                         ++(*iniov_ix);
diff --git a/arch/cris/arch-v32/drivers/i2c.c b/arch/cris/arch-v32/drivers/i2c.c
index 179e7b80433..506826399ae 100644
--- a/arch/cris/arch-v32/drivers/i2c.c
+++ b/arch/cris/arch-v32/drivers/i2c.c
@@ -27,7 +27,6 @@
 
 #include <linux/module.h>
 #include <linux/sched.h>
-#include <linux/slab.h>
 #include <linux/errno.h>
 #include <linux/kernel.h>
 #include <linux/fs.h>
diff --git a/arch/cris/arch-v32/drivers/pci/bios.c b/arch/cris/arch-v32/drivers/pci/bios.c
index d4b9c36ddc0..bc0cfdad1cb 100644
--- a/arch/cris/arch-v32/drivers/pci/bios.c
+++ b/arch/cris/arch-v32/drivers/pci/bios.c
@@ -50,7 +50,7 @@ pcibios_align_resource(void *data, const struct resource *res,
         if ((res->flags & IORESOURCE_IO) && (start & 0x300))
                 start = (start + 0x3ff) & ~0x3ff;
 
-        return start
+        return start;
 }
 
 int pcibios_enable_resources(struct pci_dev *dev, int mask)
diff --git a/arch/cris/arch-v32/drivers/pci/dma.c b/arch/cris/arch-v32/drivers/pci/dma.c
index fbe65954ee6..ee55578d983 100644
--- a/arch/cris/arch-v32/drivers/pci/dma.c
+++ b/arch/cris/arch-v32/drivers/pci/dma.c
@@ -13,6 +13,7 @@
 #include <linux/mm.h>
 #include <linux/string.h>
 #include <linux/pci.h>
+#include <linux/gfp.h>
 #include <asm/io.h>
 
 void *dma_alloc_coherent(struct device *dev, size_t size,
diff --git a/arch/cris/arch-v32/drivers/sync_serial.c b/arch/cris/arch-v32/drivers/sync_serial.c
index d2a0fbf5341..4889f196ecd 100644
--- a/arch/cris/arch-v32/drivers/sync_serial.c
+++ b/arch/cris/arch-v32/drivers/sync_serial.c
@@ -13,7 +13,6 @@
 #include <linux/errno.h>
 #include <linux/major.h>
 #include <linux/sched.h>
-#include <linux/slab.h>
 #include <linux/smp_lock.h>
 #include <linux/interrupt.h>
 #include <linux/poll.h>
diff --git a/arch/cris/arch-v32/kernel/entry.S b/arch/cris/arch-v32/kernel/entry.S
index 435b9671bd4..1f39861eac8 100644
--- a/arch/cris/arch-v32/kernel/entry.S
+++ b/arch/cris/arch-v32/kernel/entry.S
@@ -615,7 +615,7 @@ sys_call_table:
         .long sys_swapon
         .long sys_reboot
         .long sys_old_readdir
-        .long old_mmap          /* 90 */
+        .long sys_old_mmap      /* 90 */
         .long sys_munmap
         .long sys_truncate
         .long sys_ftruncate
diff --git a/arch/cris/arch-v32/kernel/process.c b/arch/cris/arch-v32/kernel/process.c
index 120e7f796fe..2661a9529d7 100644
--- a/arch/cris/arch-v32/kernel/process.c
+++ b/arch/cris/arch-v32/kernel/process.c
@@ -9,9 +9,9 @@
  */
 
 #include <linux/sched.h>
+#include <linux/slab.h>
 #include <linux/err.h>
 #include <linux/fs.h>
-#include <linux/slab.h>
 #include <hwregs/reg_rdwr.h>
 #include <hwregs/reg_map.h>
 #include <hwregs/timer_defs.h>
diff --git a/arch/cris/arch-v32/kernel/ptrace.c b/arch/cris/arch-v32/kernel/ptrace.c
index dd401473f5b..f4ebd1e7d0f 100644
--- a/arch/cris/arch-v32/kernel/ptrace.c
+++ b/arch/cris/arch-v32/kernel/ptrace.c
@@ -78,6 +78,35 @@ int put_reg(struct task_struct *task, unsigned int regno, unsigned long data)
         return 0;
 }
 
+void user_enable_single_step(struct task_struct *child)
+{
+        unsigned long tmp;
+
+        /*
+         * Set up SPC if not set already (in which case we have no other
+         * choice but to trust it).
+         */
+        if (!get_reg(child, PT_SPC)) {
+                /* In case we're stopped in a delay slot. */
+                tmp = get_reg(child, PT_ERP) & ~1;
+                put_reg(child, PT_SPC, tmp);
+        }
+        tmp = get_reg(child, PT_CCS) | SBIT_USER;
+        put_reg(child, PT_CCS, tmp);
+}
+
+void user_disable_single_step(struct task_struct *child)
+{
+        put_reg(child, PT_SPC, 0);
+
+        if (!get_debugreg(child->pid, PT_BP_CTRL)) {
+                unsigned long tmp;
+                /* If no h/w bp configured, disable S bit. */
+                tmp = get_reg(child, PT_CCS) & ~SBIT_USER;
+                put_reg(child, PT_CCS, tmp);
+        }
+}
+
 /*
  * Called by kernel/ptrace.c when detaching.
  *
@@ -89,8 +118,7 @@ ptrace_disable(struct task_struct *child)
         unsigned long tmp;
 
         /* Deconfigure SPC and S-bit. */
-        tmp = get_reg(child, PT_CCS) & ~SBIT_USER;
-        put_reg(child, PT_CCS, tmp);
+        user_disable_single_step(child);
         put_reg(child, PT_SPC, 0);
 
         /* Deconfigure any watchpoints associated with the child. */
@@ -169,83 +197,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                         ret = 0;
                         break;
 
-                case PTRACE_SYSCALL:
-                case PTRACE_CONT:
-                        ret = -EIO;
-
-                        if (!valid_signal(data))
-                                break;
-
-                        /* Continue means no single-step. */
-                        put_reg(child, PT_SPC, 0);
-
-                        if (!get_debugreg(child->pid, PT_BP_CTRL)) {
-                                unsigned long tmp;
-                                /* If no h/w bp configured, disable S bit. */
-                                tmp = get_reg(child, PT_CCS) & ~SBIT_USER;
-                                put_reg(child, PT_CCS, tmp);
-                        }
-
-                        if (request == PTRACE_SYSCALL) {
-                                set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        }
-                        else {
-                                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        }
-
-                        child->exit_code = data;
-
-                        /* TODO: make sure any pending breakpoint is killed */
-                        wake_up_process(child);
-                        ret = 0;
-
-                        break;
-
-                /* Make the child exit by sending it a sigkill. */
-                case PTRACE_KILL:
-                        ret = 0;
-
-                        if (child->exit_state == EXIT_ZOMBIE)
-                                break;
-
-                        child->exit_code = SIGKILL;
-
-                        /* Deconfigure single-step and h/w bp. */
-                        ptrace_disable(child);
-
-                        /* TODO: make sure any pending breakpoint is killed */
-                        wake_up_process(child);
-                        break;
-
-                /* Set the trap flag. */
-                case PTRACE_SINGLESTEP: {
-                        unsigned long tmp;
-                        ret = -EIO;
-
-                        /* Set up SPC if not set already (in which case we have
-                           no other choice but to trust it). */
-                        if (!get_reg(child, PT_SPC)) {
-                                /* In case we're stopped in a delay slot. */
-                                tmp = get_reg(child, PT_ERP) & ~1;
-                                put_reg(child, PT_SPC, tmp);
-                        }
-                        tmp = get_reg(child, PT_CCS) | SBIT_USER;
-                        put_reg(child, PT_CCS, tmp);
-
-                        if (!valid_signal(data))
-                                break;
-
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-
-                        /* TODO: set some clever breakpoint mechanism... */
-
-                        child->exit_code = data;
-                        wake_up_process(child);
-                        ret = 0;
-                        break;
-
-                }
-
                 /* Get all GP registers from the child. */
                 case PTRACE_GETREGS: {
                         int i;
diff --git a/arch/cris/arch-v32/kernel/signal.c b/arch/cris/arch-v32/kernel/signal.c
index 372d0ca6efb..0b7e3f14328 100644
--- a/arch/cris/arch-v32/kernel/signal.c
+++ b/arch/cris/arch-v32/kernel/signal.c
@@ -4,6 +4,7 @@
 
 #include <linux/sched.h>
 #include <linux/mm.h>
+#include <linux/slab.h>
 #include <linux/kernel.h>
 #include <linux/signal.h>
 #include <linux/errno.h>
diff --git a/arch/cris/arch-v32/mach-fs/arbiter.c b/arch/cris/arch-v32/mach-fs/arbiter.c
index 84d31bd7b69..82ef293c4c8 100644
--- a/arch/cris/arch-v32/mach-fs/arbiter.c
+++ b/arch/cris/arch-v32/mach-fs/arbiter.c
@@ -332,7 +332,7 @@ int crisv32_arbiter_unwatch(int id)
         if (id == 0)
                 intr_mask.bp0 = regk_marb_no;
         else if (id == 1)
-                intr_mask.bp2 = regk_marb_no;
+                intr_mask.bp1 = regk_marb_no;
         else if (id == 2)
                 intr_mask.bp2 = regk_marb_no;
         else if (id == 3)
diff --git a/arch/cris/arch-v32/mm/tlb.c b/arch/cris/arch-v32/mm/tlb.c
index 6779bcb28ab..c030d020660 100644
--- a/arch/cris/arch-v32/mm/tlb.c
+++ b/arch/cris/arch-v32/mm/tlb.c
@@ -189,7 +189,7 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next,
                 spin_unlock(&mmu_context_lock);
 
                 /*
-                 * Remember the pgd for the fault handlers. Keep a seperate
+                 * Remember the pgd for the fault handlers. Keep a separate
                  * copy of it because current and active_mm might be invalid
                  * at points where * there's still a need to derefer the pgd.
                  */
diff --git a/arch/cris/include/arch-v32/arch/ptrace.h b/arch/cris/include/arch-v32/arch/ptrace.h
index 41f4e8662bc..ffca8d0f2e1 100644
--- a/arch/cris/include/arch-v32/arch/ptrace.h
+++ b/arch/cris/include/arch-v32/arch/ptrace.h
@@ -108,6 +108,7 @@ struct switch_stack {
 
 #ifdef __KERNEL__
 
+#define arch_has_single_step() (1)
 #define user_mode(regs) (((regs)->ccs & (1 << (U_CCS_BITNR + CCS_SHIFT))) != 0)
 #define instruction_pointer(regs) ((regs)->erp)
 extern void show_regs(struct pt_regs *);
diff --git a/arch/cris/include/asm/pci.h b/arch/cris/include/asm/pci.h
index 730ce40fdd0..9f1cd56da28 100644
--- a/arch/cris/include/asm/pci.h
+++ b/arch/cris/include/asm/pci.h
@@ -44,14 +44,6 @@ struct pci_dev;
  */
 #define PCI_DMA_BUS_IS_PHYS     (1)
 
-/* pci_unmap_{page,single} is a nop so... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
-#define pci_unmap_addr(PTR, ADDR_NAME)          (0)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
-#define pci_unmap_len(PTR, LEN_NAME)            (0)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)   do { } while (0)
-
 #define HAVE_PCI_MMAP
 extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
                                enum pci_mmap_state mmap_state, int write_combine);
diff --git a/arch/cris/include/asm/unistd.h b/arch/cris/include/asm/unistd.h
index c17079388bb..f6fad83b3a8 100644
--- a/arch/cris/include/asm/unistd.h
+++ b/arch/cris/include/asm/unistd.h
@@ -352,6 +352,7 @@
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_ALARM
 #define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_PAUSE
 #define __ARCH_WANT_SYS_SGETMASK
 #define __ARCH_WANT_SYS_SIGNAL
@@ -364,6 +365,7 @@
 #define __ARCH_WANT_SYS_LLSEEK
 #define __ARCH_WANT_SYS_NICE
 #define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_MMAP
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/cris/kernel/irq.c b/arch/cris/kernel/irq.c
index 6d7b9eda403..469f7f9d62e 100644
--- a/arch/cris/kernel/irq.c
+++ b/arch/cris/kernel/irq.c
@@ -29,7 +29,6 @@
 #include <linux/ioport.h>
 #include <linux/interrupt.h>
 #include <linux/timex.h>
-#include <linux/slab.h>
 #include <linux/random.h>
 #include <linux/init.h>
 #include <linux/seq_file.h>
diff --git a/arch/cris/kernel/module.c b/arch/cris/kernel/module.c
index abc13e368b9..bcd502f74cd 100644
--- a/arch/cris/kernel/module.c
+++ b/arch/cris/kernel/module.c
@@ -21,6 +21,7 @@
 #include <linux/fs.h>
 #include <linux/string.h>
 #include <linux/kernel.h>
+#include <linux/slab.h>
 
 #if 0
 #define DEBUGP printk
diff --git a/arch/cris/kernel/profile.c b/arch/cris/kernel/profile.c
index 9aa571169bc..b917549a7d9 100644
--- a/arch/cris/kernel/profile.c
+++ b/arch/cris/kernel/profile.c
@@ -2,6 +2,7 @@
 #include <linux/errno.h>
 #include <linux/kernel.h>
 #include <linux/proc_fs.h>
+#include <linux/slab.h>
 #include <linux/types.h>
 #include <asm/ptrace.h>
 #include <asm/uaccess.h>
diff --git a/arch/cris/kernel/sys_cris.c b/arch/cris/kernel/sys_cris.c
index c2bbb1ac98a..7aa036ec78f 100644
--- a/arch/cris/kernel/sys_cris.c
+++ b/arch/cris/kernel/sys_cris.c
@@ -26,24 +26,6 @@
 #include <asm/uaccess.h>
 #include <asm/segment.h>
 
-asmlinkage unsigned long old_mmap(unsigned long __user *args)
-{        
-        unsigned long buffer[6];
-        int err = -EFAULT;
-
-        if (copy_from_user(&buffer, args, sizeof(buffer)))
-                goto out;
-
-        err = -EINVAL;
-        if (buffer[5] & ~PAGE_MASK) /* verify that offset is on page boundary */
-                goto out;
-
-        err = sys_mmap_pgoff(buffer[0], buffer[1], buffer[2], buffer[3],
-                       buffer[4], buffer[5] >> PAGE_SHIFT);
-out:
-        return err;
-}
-
 asmlinkage long
 sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
           unsigned long flags, unsigned long fd, unsigned long pgoff)
@@ -51,81 +33,3 @@ sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
         /* bug(?): 8Kb pages here */
         return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
 }
-
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly. (same as arch/i386)
- */
-
-asmlinkage int sys_ipc (uint call, int first, int second,
-                        int third, void __user *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        switch (call) {
-        case SEMOP:
-                return sys_semtimedop (first, (struct sembuf __user *)ptr, second, NULL);
-        case SEMTIMEDOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr, second,
-                                        (const struct timespec __user *)fifth);
-
-        case SEMGET:
-                return sys_semget (first, second, third);
-        case SEMCTL: {
-                union semun fourth;
-                if (!ptr)
-                        return -EINVAL;
-                if (get_user(fourth.__pad, (void * __user *) ptr))
-                        return -EFAULT;
-                return sys_semctl (first, second, third, fourth);
-        }
-
-        case MSGSND:
-                return sys_msgsnd (first, (struct msgbuf __user *) ptr, 
-                                   second, third);
-        case MSGRCV:
-                switch (version) {
-                case 0: {
-                        struct ipc_kludge tmp;
-                        if (!ptr)
-                                return -EINVAL;
-                        
-                        if (copy_from_user(&tmp,
-                                           (struct ipc_kludge __user *) ptr, 
-                                           sizeof (tmp)))
-                                return -EFAULT;
-                        return sys_msgrcv (first, tmp.msgp, second,
-                                           tmp.msgtyp, third);
-                }
-                default:
-                        return sys_msgrcv (first,
-                                           (struct msgbuf __user *) ptr,
-                                           second, fifth, third);
-                }
-        case MSGGET:
-                return sys_msgget ((key_t) first, second);
-        case MSGCTL:
-                return sys_msgctl (first, second, (struct msqid_ds __user *) ptr);
-
-        case SHMAT: {
-                ulong raddr;
-                ret = do_shmat (first, (char __user *) ptr, second, &raddr);
-                if (ret)
-                        return ret;
-                return put_user (raddr, (ulong __user *) third);
-        }
-        case SHMDT: 
-                return sys_shmdt ((char __user *)ptr);
-        case SHMGET:
-                return sys_shmget (first, second, third);
-        case SHMCTL:
-                return sys_shmctl (first, second,
-                                   (struct shmid_ds __user *) ptr);
-        default:
-                return -ENOSYS;
-        }
-}
diff --git a/arch/cris/kernel/time.c b/arch/cris/kernel/time.c
index 074fe7dea96..a05dd31f3ef 100644
--- a/arch/cris/kernel/time.c
+++ b/arch/cris/kernel/time.c
@@ -42,75 +42,11 @@ unsigned long loops_per_usec;
 extern unsigned long do_slow_gettimeoffset(void);
 static unsigned long (*do_gettimeoffset)(void) = do_slow_gettimeoffset;
 
-/*
- * This version of gettimeofday has near microsecond resolution.
- *
- * Note: Division is quite slow on CRIS and do_gettimeofday is called
- *       rather often. Maybe we should do some kind of approximation here
- *       (a naive approximation would be to divide by 1024).
- */
-void do_gettimeofday(struct timeval *tv)
-{
-        unsigned long flags;
-        signed long usec, sec;
-        local_irq_save(flags);
-        usec = do_gettimeoffset();
-
-        /*
-         * If time_adjust is negative then NTP is slowing the clock
-         * so make sure not to go into next possible interval.
-         * Better to lose some accuracy than have time go backwards..
-         */
-        if (unlikely(time_adjust < 0) && usec > tickadj)
-                usec = tickadj;
-
-        sec = xtime.tv_sec;
-        usec += xtime.tv_nsec / 1000;
-        local_irq_restore(flags);
-
-        while (usec >= 1000000) {
-                usec -= 1000000;
-                sec++;
-        }
-
-        tv->tv_sec = sec;
-        tv->tv_usec = usec;
-}
-
-EXPORT_SYMBOL(do_gettimeofday);
-
-int do_settimeofday(struct timespec *tv)
+u32 arch_gettimeoffset(void)
 {
-        time_t wtm_sec, sec = tv->tv_sec;
-        long wtm_nsec, nsec = tv->tv_nsec;
-
-        if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
-                return -EINVAL;
-
-        write_seqlock_irq(&xtime_lock);
-        /*
-         * This is revolting. We need to set "xtime" correctly. However, the
-         * value in this location is the value at the most recent update of
-         * wall time.  Discover what correction gettimeofday() would have
-         * made, and then undo it!
-         */
-        nsec -= do_gettimeoffset() * NSEC_PER_USEC;
-
-        wtm_sec  = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
-        wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
-
-        set_normalized_timespec(&xtime, sec, nsec);
-        set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
-
-        ntp_clear();
-        write_sequnlock_irq(&xtime_lock);
-        clock_was_set();
-        return 0;
+        return do_gettimeoffset() * 1000;
 }
 
-EXPORT_SYMBOL(do_settimeofday);
-
-
 /*
  * BUG: This routine does not handle hour overflow properly; it just
  *      sets the minutes. Usually you'll only notice that after reboot!
diff --git a/arch/cris/mm/init.c b/arch/cris/mm/init.c
index ff68b9f516a..df33ab89d70 100644
--- a/arch/cris/mm/init.c
+++ b/arch/cris/mm/init.c
@@ -8,6 +8,7 @@
  *
  */
 
+#include <linux/gfp.h>
 #include <linux/init.h>
 #include <linux/bootmem.h>
 #include <asm/tlb.h>
diff --git a/arch/frv/include/asm/dma-mapping.h b/arch/frv/include/asm/dma-mapping.h
index b2898877c07..6af5d83e2fb 100644
--- a/arch/frv/include/asm/dma-mapping.h
+++ b/arch/frv/include/asm/dma-mapping.h
@@ -7,6 +7,11 @@
 #include <asm/scatterlist.h>
 #include <asm/io.h>
 
+/*
+ * See Documentation/DMA-API.txt for the description of how the
+ * following DMA API should work.
+ */
+
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
 
@@ -16,24 +21,9 @@ extern unsigned long __nongprelbss dma_coherent_mem_end;
 void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp);
 void dma_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle);
 
-/*
- * Map a single buffer of the indicated size for DMA in streaming mode.
- * The 32-bit bus address to use is returned.
- *
- * Once the device is given the dma address, the device owns this memory
- * until either pci_unmap_single or pci_dma_sync_single is performed.
- */
 extern dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
                                  enum dma_data_direction direction);
 
-/*
- * Unmap a single streaming mode DMA translation.  The dma_addr and size
- * must match what was provided for in a previous pci_map_single call.  All
- * other usages are undefined.
- *
- * After this call, reads by the cpu to the buffer are guarenteed to see
- * whatever the device wrote there.
- */
 static inline
 void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
                       enum dma_data_direction direction)
@@ -41,30 +31,9 @@ void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
         BUG_ON(direction == DMA_NONE);
 }
 
-/*
- * Map a set of buffers described by scatterlist in streaming
- * mode for DMA.  This is the scather-gather version of the
- * above pci_map_single interface.  Here the scatter gather list
- * elements are each tagged with the appropriate dma address
- * and length.  They are obtained via sg_dma_{address,length}(SG).
- *
- * NOTE: An implementation may be able to use a smaller number of
- *       DMA address/length pairs than there are SG table elements.
- *       (for example via virtual mapping capabilities)
- *       The routine returns the number of addr/length pairs actually
- *       used, at most nents.
- *
- * Device ownership issues as mentioned above for pci_map_single are
- * the same here.
- */
 extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
                       enum dma_data_direction direction);
 
-/*
- * Unmap a set of streaming mode DMA translations.
- * Again, cpu read rules concerning calls here are the same as for
- * pci_unmap_single() above.
- */
 static inline
 void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
              enum dma_data_direction direction)
diff --git a/arch/frv/include/asm/pci.h b/arch/frv/include/asm/pci.h
index 492b5c4dfed..0d599790985 100644
--- a/arch/frv/include/asm/pci.h
+++ b/arch/frv/include/asm/pci.h
@@ -43,14 +43,6 @@ extern void pci_free_consistent(struct pci_dev *hwdev, size_t size,
 /* Return the index of the PCI controller for device PDEV. */
 #define pci_controller_num(PDEV)        (0)
 
-/* pci_unmap_{page,single} is a nop so... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
-#define pci_unmap_addr(PTR, ADDR_NAME)          (0)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
-#define pci_unmap_len(PTR, LEN_NAME)            (0)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)   do { } while (0)
-
 #ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                         enum pci_dma_burst_strategy *strat,
@@ -68,41 +60,4 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
 #define PCIBIOS_MIN_IO          0x100
 #define PCIBIOS_MIN_MEM         0x00010000
 
-/* Make physical memory consistent for a single
- * streaming mode DMA translation after a transfer.
- *
- * If you perform a pci_map_single() but wish to interrogate the
- * buffer using the cpu, yet do not wish to teardown the PCI dma
- * mapping, you must call this function before doing so.  At the
- * next point you give the PCI dma address back to the card, the
- * device again owns the buffer.
- */
-static inline void pci_dma_sync_single(struct pci_dev *hwdev,
-                                       dma_addr_t dma_handle,
-                                       size_t size, int direction)
-{
-        BUG_ON(direction == PCI_DMA_NONE);
-
-        frv_cache_wback_inv((unsigned long)bus_to_virt(dma_handle),
-                            (unsigned long)bus_to_virt(dma_handle) + size);
-}
-
-/* Make physical memory consistent for a set of streaming
- * mode DMA translations after a transfer.
- *
- * The same as pci_dma_sync_single but for a scatter-gather list,
- * same rules and usage.
- */
-static inline void pci_dma_sync_sg(struct pci_dev *hwdev,
-                                   struct scatterlist *sg,
-                                   int nelems, int direction)
-{
-        int i;
-        BUG_ON(direction == PCI_DMA_NONE);
-
-        for (i = 0; i < nelems; i++)
-                frv_cache_wback_inv(sg_dma_address(&sg[i]),
-                                    sg_dma_address(&sg[i])+sg_dma_len(&sg[i]));
-}
-
 #endif /* _ASM_FRV_PCI_H */
diff --git a/arch/frv/include/asm/ptrace.h b/arch/frv/include/asm/ptrace.h
index a54b535c9e4..6bfad4cf190 100644
--- a/arch/frv/include/asm/ptrace.h
+++ b/arch/frv/include/asm/ptrace.h
@@ -84,8 +84,6 @@ extern void show_regs(struct pt_regs *);
 #define task_pt_regs(task) ((task)->thread.frame0)
 
 #define arch_has_single_step()  (1)
-extern void user_enable_single_step(struct task_struct *);
-extern void user_disable_single_step(struct task_struct *);
 
 #endif /* !__ASSEMBLY__ */
 #endif /* __KERNEL__ */
diff --git a/arch/frv/include/asm/segment.h b/arch/frv/include/asm/segment.h
index e3616a6f941..a2320a4a004 100644
--- a/arch/frv/include/asm/segment.h
+++ b/arch/frv/include/asm/segment.h
@@ -21,12 +21,12 @@ typedef struct {
 
 #define MAKE_MM_SEG(s)  ((mm_segment_t) { (s) })
 
-#define KERNEL_DS               MAKE_MM_SEG(0xdfffffffUL)
-
 #ifdef CONFIG_MMU
 #define USER_DS                 MAKE_MM_SEG(TASK_SIZE - 1)
+#define KERNEL_DS               MAKE_MM_SEG(0xdfffffffUL)
 #else
-#define USER_DS                 KERNEL_DS
+#define USER_DS                 MAKE_MM_SEG(memory_end)
+#define KERNEL_DS               MAKE_MM_SEG(0xe0000000UL)
 #endif
 
 #define get_ds()                (KERNEL_DS)
diff --git a/arch/frv/include/asm/uaccess.h b/arch/frv/include/asm/uaccess.h
index 53650c958f4..0b67ec5b441 100644
--- a/arch/frv/include/asm/uaccess.h
+++ b/arch/frv/include/asm/uaccess.h
@@ -27,8 +27,6 @@
 #define VERIFY_READ     0
 #define VERIFY_WRITE    1
 
-#define __addr_ok(addr) ((unsigned long)(addr) < get_addr_limit())
-
 /*
  * check that a range of addresses falls within the current address limit
  */
diff --git a/arch/frv/include/asm/unistd.h b/arch/frv/include/asm/unistd.h
index be6ef0f5cd4..b28da499e22 100644
--- a/arch/frv/include/asm/unistd.h
+++ b/arch/frv/include/asm/unistd.h
@@ -354,6 +354,7 @@
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_ALARM
 /* #define __ARCH_WANT_SYS_GETHOSTNAME */
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_PAUSE
 /* #define __ARCH_WANT_SYS_SGETMASK */
 /* #define __ARCH_WANT_SYS_SIGNAL */
diff --git a/arch/frv/kernel/irq.c b/arch/frv/kernel/irq.c
index 62d1aba615d..625136625a7 100644
--- a/arch/frv/kernel/irq.c
+++ b/arch/frv/kernel/irq.c
@@ -16,7 +16,6 @@
 #include <linux/ioport.h>
 #include <linux/interrupt.h>
 #include <linux/timex.h>
-#include <linux/slab.h>
 #include <linux/random.h>
 #include <linux/init.h>
 #include <linux/kernel_stat.h>
diff --git a/arch/frv/kernel/sys_frv.c b/arch/frv/kernel/sys_frv.c
index 1d3d4c9e252..9c4980825bb 100644
--- a/arch/frv/kernel/sys_frv.c
+++ b/arch/frv/kernel/sys_frv.c
@@ -42,92 +42,3 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
         return sys_mmap_pgoff(addr, len, prot, flags, fd,
                               pgoff >> (PAGE_SHIFT - 12));
 }
-
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-asmlinkage long sys_ipc(unsigned long call,
-                        unsigned long first,
-                        unsigned long second,
-                        unsigned long third,
-                        void __user *ptr,
-                        unsigned long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        switch (call) {
-        case SEMOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr, second, NULL);
-        case SEMTIMEDOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr, second,
-                                      (const struct timespec __user *)fifth);
-
-        case SEMGET:
-                return sys_semget (first, second, third);
-        case SEMCTL: {
-                union semun fourth;
-                if (!ptr)
-                        return -EINVAL;
-                if (get_user(fourth.__pad, (void * __user *) ptr))
-                        return -EFAULT;
-                return sys_semctl (first, second, third, fourth);
-        }
-
-        case MSGSND:
-                return sys_msgsnd (first, (struct msgbuf __user *) ptr,
-                                   second, third);
-        case MSGRCV:
-                switch (version) {
-                case 0: {
-                        struct ipc_kludge tmp;
-                        if (!ptr)
-                                return -EINVAL;
-
-                        if (copy_from_user(&tmp,
-                                           (struct ipc_kludge __user *) ptr,
-                                           sizeof (tmp)))
-                                return -EFAULT;
-                        return sys_msgrcv (first, tmp.msgp, second,
-                                           tmp.msgtyp, third);
-                }
-                default:
-                        return sys_msgrcv (first,
-                                           (struct msgbuf __user *) ptr,
-                                           second, fifth, third);
-                }
-        case MSGGET:
-                return sys_msgget ((key_t) first, second);
-        case MSGCTL:
-                return sys_msgctl (first, second, (struct msqid_ds __user *) ptr);
-
-        case SHMAT:
-                switch (version) {
-                default: {
-                        ulong raddr;
-                        ret = do_shmat (first, (char __user *) ptr, second, &raddr);
-                        if (ret)
-                                return ret;
-                        return put_user (raddr, (ulong __user *) third);
-                }
-                case 1: /* iBCS2 emulator entry point */
-                        if (!segment_eq(get_fs(), get_ds()))
-                                return -EINVAL;
-                        /* The "(ulong *) third" is valid _only_ because of the kernel segment thing */
-                        return do_shmat (first, (char __user *) ptr, second, (ulong *) third);
-                }
-        case SHMDT:
-                return sys_shmdt ((char __user *)ptr);
-        case SHMGET:
-                return sys_shmget (first, second, third);
-        case SHMCTL:
-                return sys_shmctl (first, second,
-                                   (struct shmid_ds __user *) ptr);
-        default:
-                return -ENOSYS;
-        }
-}
diff --git a/arch/frv/kernel/sysctl.c b/arch/frv/kernel/sysctl.c
index 035516cb7a9..71abd1510a5 100644
--- a/arch/frv/kernel/sysctl.c
+++ b/arch/frv/kernel/sysctl.c
@@ -9,7 +9,6 @@
  * 2 of the License, or (at your option) any later version.
  */
 
-#include <linux/slab.h>
 #include <linux/sysctl.h>
 #include <linux/proc_fs.h>
 #include <linux/init.h>
diff --git a/arch/frv/mb93090-mb00/pci-dma-nommu.c b/arch/frv/mb93090-mb00/pci-dma-nommu.c
index 4e1ba0b1544..e47857f889b 100644
--- a/arch/frv/mb93090-mb00/pci-dma-nommu.c
+++ b/arch/frv/mb93090-mb00/pci-dma-nommu.c
@@ -106,13 +106,6 @@ void dma_free_coherent(struct device *hwdev, size_t size, void *vaddr, dma_addr_
 
 EXPORT_SYMBOL(dma_free_coherent);
 
-/*
- * Map a single buffer of the indicated size for DMA in streaming mode.
- * The 32-bit bus address to use is returned.
- *
- * Once the device is given the dma address, the device owns this memory
- * until either dma_unmap_single or pci_dma_sync_single is performed.
- */
 dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
                           enum dma_data_direction direction)
 {
@@ -125,22 +118,6 @@ dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
 
 EXPORT_SYMBOL(dma_map_single);
 
-/*
- * Map a set of buffers described by scatterlist in streaming
- * mode for DMA.  This is the scather-gather version of the
- * above dma_map_single interface.  Here the scatter gather list
- * elements are each tagged with the appropriate dma address
- * and length.  They are obtained via sg_dma_{address,length}(SG).
- *
- * NOTE: An implementation may be able to use a smaller number of
- *       DMA address/length pairs than there are SG table elements.
- *       (for example via virtual mapping capabilities)
- *       The routine returns the number of addr/length pairs actually
- *       used, at most nents.
- *
- * Device ownership issues as mentioned above for dma_map_single are
- * the same here.
- */
 int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
                enum dma_data_direction direction)
 {
@@ -157,13 +134,6 @@ int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
 
 EXPORT_SYMBOL(dma_map_sg);
 
-/*
- * Map a single page of the indicated size for DMA in streaming mode.
- * The 32-bit bus address to use is returned.
- *
- * Device ownership issues as mentioned above for dma_map_single are
- * the same here.
- */
 dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long offset,
                         size_t size, enum dma_data_direction direction)
 {
diff --git a/arch/frv/mb93090-mb00/pci-dma.c b/arch/frv/mb93090-mb00/pci-dma.c
index 45954f0813d..85d110b71cf 100644
--- a/arch/frv/mb93090-mb00/pci-dma.c
+++ b/arch/frv/mb93090-mb00/pci-dma.c
@@ -10,7 +10,6 @@
  */
 
 #include <linux/types.h>
-#include <linux/slab.h>
 #include <linux/dma-mapping.h>
 #include <linux/list.h>
 #include <linux/pci.h>
@@ -38,13 +37,6 @@ void dma_free_coherent(struct device *hwdev, size_t size, void *vaddr, dma_addr_
 
 EXPORT_SYMBOL(dma_free_coherent);
 
-/*
- * Map a single buffer of the indicated size for DMA in streaming mode.
- * The 32-bit bus address to use is returned.
- *
- * Once the device is given the dma address, the device owns this memory
- * until either pci_unmap_single or pci_dma_sync_single is performed.
- */
 dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
                           enum dma_data_direction direction)
 {
@@ -57,22 +49,6 @@ dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
 
 EXPORT_SYMBOL(dma_map_single);
 
-/*
- * Map a set of buffers described by scatterlist in streaming
- * mode for DMA.  This is the scather-gather version of the
- * above dma_map_single interface.  Here the scatter gather list
- * elements are each tagged with the appropriate dma address
- * and length.  They are obtained via sg_dma_{address,length}(SG).
- *
- * NOTE: An implementation may be able to use a smaller number of
- *       DMA address/length pairs than there are SG table elements.
- *       (for example via virtual mapping capabilities)
- *       The routine returns the number of addr/length pairs actually
- *       used, at most nents.
- *
- * Device ownership issues as mentioned above for dma_map_single are
- * the same here.
- */
 int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
                enum dma_data_direction direction)
 {
@@ -103,13 +79,6 @@ int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
 
 EXPORT_SYMBOL(dma_map_sg);
 
-/*
- * Map a single page of the indicated size for DMA in streaming mode.
- * The 32-bit bus address to use is returned.
- *
- * Device ownership issues as mentioned above for dma_map_single are
- * the same here.
- */
 dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long offset,
                         size_t size, enum dma_data_direction direction)
 {
diff --git a/arch/frv/mb93090-mb00/pci-frv.c b/arch/frv/mb93090-mb00/pci-frv.c
index 1ed15d7fea2..6b4fb28e9f9 100644
--- a/arch/frv/mb93090-mb00/pci-frv.c
+++ b/arch/frv/mb93090-mb00/pci-frv.c
@@ -41,7 +41,7 @@ pcibios_align_resource(void *data, const struct resource *res,
         if ((res->flags & IORESOURCE_IO) && (start & 0x300))
                 start = (start + 0x3ff) & ~0x3ff;
 
-        return start
+        return start;
 }
 
 
@@ -94,8 +94,7 @@ static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
                                 r = &dev->resource[idx];
                                 if (!r->start)
                                         continue;
-                                if (pci_claim_resource(dev, idx) < 0)
-                                        printk(KERN_ERR "PCI: Cannot allocate resource region %d of bridge %s\n", idx, pci_name(dev));
+                                pci_claim_resource(dev, idx);
                         }
                 }
                 pcibios_allocate_bus_resources(&bus->children);
@@ -125,7 +124,6 @@ static void __init pcibios_allocate_resources(int pass)
                                 DBG("PCI: Resource %08lx-%08lx (f=%lx, d=%d, p=%d)\n",
                                     r->start, r->end, r->flags, disabled, pass);
                                 if (pci_claim_resource(dev, idx) < 0) {
-                                        printk(KERN_ERR "PCI: Cannot allocate resource region %d of device %s\n", idx, pci_name(dev));
                                         /* We'll assign a new address later */
                                         r->end -= r->start;
                                         r->start = 0;
diff --git a/arch/frv/mb93090-mb00/pci-irq.c b/arch/frv/mb93090-mb00/pci-irq.c
index ba587523c01..20f6497b2cd 100644
--- a/arch/frv/mb93090-mb00/pci-irq.c
+++ b/arch/frv/mb93090-mb00/pci-irq.c
@@ -9,7 +9,6 @@
 #include <linux/kernel.h>
 #include <linux/pci.h>
 #include <linux/init.h>
-#include <linux/slab.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 
diff --git a/arch/frv/mb93090-mb00/pci-vdk.c b/arch/frv/mb93090-mb00/pci-vdk.c
index c0dcec65c6b..f8dd37e4953 100644
--- a/arch/frv/mb93090-mb00/pci-vdk.c
+++ b/arch/frv/mb93090-mb00/pci-vdk.c
@@ -16,7 +16,6 @@
 #include <linux/init.h>
 #include <linux/ioport.h>
 #include <linux/delay.h>
-#include <linux/slab.h>
 
 #include <asm/segment.h>
 #include <asm/io.h>
diff --git a/arch/frv/mm/dma-alloc.c b/arch/frv/mm/dma-alloc.c
index 44840e73e90..7a73aaeae3a 100644
--- a/arch/frv/mm/dma-alloc.c
+++ b/arch/frv/mm/dma-alloc.c
@@ -37,6 +37,7 @@
 #include <linux/init.h>
 #include <linux/pci.h>
 #include <linux/hardirq.h>
+#include <linux/gfp.h>
 
 #include <asm/pgalloc.h>
 #include <asm/io.h>
diff --git a/arch/frv/mm/init.c b/arch/frv/mm/init.c
index 0708284f85f..ed64588ac3a 100644
--- a/arch/frv/mm/init.c
+++ b/arch/frv/mm/init.c
@@ -19,6 +19,7 @@
 #include <linux/signal.h>
 #include <linux/sched.h>
 #include <linux/pagemap.h>
+#include <linux/gfp.h>
 #include <linux/swap.h>
 #include <linux/mm.h>
 #include <linux/kernel.h>
diff --git a/arch/frv/mm/pgalloc.c b/arch/frv/mm/pgalloc.c
index 66f616fb486..c42c83d507b 100644
--- a/arch/frv/mm/pgalloc.c
+++ b/arch/frv/mm/pgalloc.c
@@ -10,7 +10,7 @@
  */
 
 #include <linux/sched.h>
-#include <linux/slab.h>
+#include <linux/gfp.h>
 #include <linux/mm.h>
 #include <linux/highmem.h>
 #include <linux/quicklist.h>
diff --git a/arch/h8300/include/asm/io.h b/arch/h8300/include/asm/io.h
index 33e842f3284..c1a8df22080 100644
--- a/arch/h8300/include/asm/io.h
+++ b/arch/h8300/include/asm/io.h
@@ -25,7 +25,7 @@
  * memory location directly.
  */
 /* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
- * two accesses to memory, which may be undesireable for some devices.
+ * two accesses to memory, which may be undesirable for some devices.
  */
 
 /*
diff --git a/arch/h8300/include/asm/ptrace.h b/arch/h8300/include/asm/ptrace.h
index c2e05e4b512..d866c0efba8 100644
--- a/arch/h8300/include/asm/ptrace.h
+++ b/arch/h8300/include/asm/ptrace.h
@@ -55,6 +55,8 @@ struct pt_regs {
 /* Find the stack offset for a register, relative to thread.esp0. */
 #define PT_REG(reg)     ((long)&((struct pt_regs *)0)->reg)
 
+#define arch_has_single_step()  (1)
+
 #define user_mode(regs) (!((regs)->ccr & PS_S))
 #define instruction_pointer(regs) ((regs)->pc)
 #define profile_pc(regs) instruction_pointer(regs)
diff --git a/arch/h8300/include/asm/unistd.h b/arch/h8300/include/asm/unistd.h
index 99f3c3561ec..50f2c5a3659 100644
--- a/arch/h8300/include/asm/unistd.h
+++ b/arch/h8300/include/asm/unistd.h
@@ -336,6 +336,7 @@
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_ALARM
 #define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_PAUSE
 #define __ARCH_WANT_SYS_SGETMASK
 #define __ARCH_WANT_SYS_SIGNAL
@@ -348,6 +349,8 @@
 #define __ARCH_WANT_SYS_LLSEEK
 #define __ARCH_WANT_SYS_NICE
 #define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_MMAP
+#define __ARCH_WANT_SYS_OLD_SELECT
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/h8300/kernel/process.c b/arch/h8300/kernel/process.c
index bd883faa983..8c8b0ffa6ad 100644
--- a/arch/h8300/kernel/process.c
+++ b/arch/h8300/kernel/process.c
@@ -32,11 +32,11 @@
 #include <linux/stddef.h>
 #include <linux/unistd.h>
 #include <linux/ptrace.h>
-#include <linux/slab.h>
 #include <linux/user.h>
 #include <linux/interrupt.h>
 #include <linux/reboot.h>
 #include <linux/fs.h>
+#include <linux/slab.h>
 
 #include <asm/uaccess.h>
 #include <asm/system.h>
diff --git a/arch/h8300/kernel/ptrace.c b/arch/h8300/kernel/ptrace.c
index d32bbf02fc4..df114122ebd 100644
--- a/arch/h8300/kernel/ptrace.c
+++ b/arch/h8300/kernel/ptrace.c
@@ -34,25 +34,20 @@
 /* cpu depend functions */
 extern long h8300_get_reg(struct task_struct *task, int regno);
 extern int  h8300_put_reg(struct task_struct *task, int regno, unsigned long data);
-extern void h8300_disable_trace(struct task_struct *child);
-extern void h8300_enable_trace(struct task_struct *child);
+
+
+void user_disable_single_step(struct task_struct *child)
+{
+}
 
 /*
  * does not yet catch signals sent when the child dies.
  * in exit.c or in signal.c.
  */
 
-inline
-static int read_long(struct task_struct * tsk, unsigned long addr,
-        unsigned long * result)
-{
-        *result = *(unsigned long *)addr;
-        return 0;
-}
-
 void ptrace_disable(struct task_struct *child)
 {
-        h8300_disable_trace(child);
+        user_disable_single_step(child);
 }
 
 long arch_ptrace(struct task_struct *child, long request, long addr, long data)
@@ -60,17 +55,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
         int ret;
 
         switch (request) {
-                case PTRACE_PEEKTEXT: /* read word at location addr. */ 
-                case PTRACE_PEEKDATA: {
-                        unsigned long tmp;
-
-                        ret = read_long(child, addr, &tmp);
-                        if (ret < 0)
-                                break ;
-                        ret = put_user(tmp, (unsigned long *) data);
-                        break ;
-                }
-
         /* read the word at location addr in the USER area. */
                 case PTRACE_PEEKUSR: {
                         unsigned long tmp = 0;
@@ -109,11 +93,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 }
 
       /* when I and D space are separate, this will have to be fixed. */
-                case PTRACE_POKETEXT: /* write the word at location addr. */
-                case PTRACE_POKEDATA:
-                        ret = generic_ptrace_pokedata(child, addr, data);
-                        break;
-
                 case PTRACE_POKEUSR: /* write the word at location addr in the USER area */
                         if ((addr & 3) || addr < 0 || addr >= sizeof(struct user)) {
                                 ret = -EIO;
@@ -131,53 +110,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                         }
                         ret = -EIO;
                         break ;
-                case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
-                case PTRACE_CONT: { /* restart after signal. */
-                        ret = -EIO;
-                        if (!valid_signal(data))
-                                break ;
-                        if (request == PTRACE_SYSCALL)
-                                set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        else
-                                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        child->exit_code = data;
-                        wake_up_process(child);
-                        /* make sure the single step bit is not set. */
-                        h8300_disable_trace(child);
-                        ret = 0;
-                }
-
-/*
- * make the child exit.  Best I can do is send it a sigkill. 
- * perhaps it should be put in the status that it wants to 
- * exit.
- */
-                case PTRACE_KILL: {
-
-                        ret = 0;
-                        if (child->exit_state == EXIT_ZOMBIE) /* already dead */
-                                break;
-                        child->exit_code = SIGKILL;
-                        h8300_disable_trace(child);
-                        wake_up_process(child);
-                        break;
-                }
-
-                case PTRACE_SINGLESTEP: {  /* set the trap flag. */
-                        ret = -EIO;
-                        if (!valid_signal(data))
-                                break;
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        child->exit_code = data;
-                        h8300_enable_trace(child);
-                        wake_up_process(child);
-                        ret = 0;
-                        break;
-                }
-
-                case PTRACE_DETACH:     /* detach a process that was attached. */
-                        ret = ptrace_detach(child, data);
-                        break;
 
                 case PTRACE_GETREGS: { /* Get all gp regs from the child. */
                         int i;
@@ -210,7 +142,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 }
 
                 default:
-                        ret = -EIO;
+                        ret = ptrace_request(child, request, addr, data);
                         break;
         }
         return ret;
diff --git a/arch/h8300/kernel/sys_h8300.c b/arch/h8300/kernel/sys_h8300.c
index b5969db0ca1..f9b3f44da69 100644
--- a/arch/h8300/kernel/sys_h8300.c
+++ b/arch/h8300/kernel/sys_h8300.c
@@ -26,144 +26,6 @@
 #include <asm/traps.h>
 #include <asm/unistd.h>
 
-/*
- * Perform the select(nd, in, out, ex, tv) and mmap() system
- * calls. Linux/m68k cloned Linux/i386, which didn't use to be able to
- * handle more than 4 system call parameters, so these system calls
- * used a memory block for parameter passing..
- */
-
-struct mmap_arg_struct {
-        unsigned long addr;
-        unsigned long len;
-        unsigned long prot;
-        unsigned long flags;
-        unsigned long fd;
-        unsigned long offset;
-};
-
-asmlinkage int old_mmap(struct mmap_arg_struct *arg)
-{
-        struct mmap_arg_struct a;
-        int error = -EFAULT;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                goto out;
-
-        error = -EINVAL;
-        if (a.offset & ~PAGE_MASK)
-                goto out;
-
-        error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
-                               a.offset >> PAGE_SHIFT);
-out:
-        return error;
-}
-
-struct sel_arg_struct {
-        unsigned long n;
-        fd_set *inp, *outp, *exp;
-        struct timeval *tvp;
-};
-
-asmlinkage int old_select(struct sel_arg_struct *arg)
-{
-        struct sel_arg_struct a;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                return -EFAULT;
-        /* sys_select() does the appropriate kernel locking */
-        return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
-}
-
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-asmlinkage int sys_ipc (uint call, int first, int second,
-                        int third, void *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        if (call <= SEMCTL)
-                switch (call) {
-                case SEMOP:
-                        return sys_semop (first, (struct sembuf *)ptr, second);
-                case SEMGET:
-                        return sys_semget (first, second, third);
-                case SEMCTL: {
-                        union semun fourth;
-                        if (!ptr)
-                                return -EINVAL;
-                        if (get_user(fourth.__pad, (void **) ptr))
-                                return -EFAULT;
-                        return sys_semctl (first, second, third, fourth);
-                        }
-                default:
-                        return -EINVAL;
-                }
-        if (call <= MSGCTL) 
-                switch (call) {
-                case MSGSND:
-                        return sys_msgsnd (first, (struct msgbuf *) ptr, 
-                                          second, third);
-                case MSGRCV:
-                        switch (version) {
-                        case 0: {
-                                struct ipc_kludge tmp;
-                                if (!ptr)
-                                        return -EINVAL;
-                                if (copy_from_user (&tmp,
-                                                    (struct ipc_kludge *)ptr,
-                                                    sizeof (tmp)))
-                                        return -EFAULT;
-                                return sys_msgrcv (first, tmp.msgp, second,
-                                                   tmp.msgtyp, third);
-                                }
-                        default:
-                                return sys_msgrcv (first,
-                                                   (struct msgbuf *) ptr,
-                                                   second, fifth, third);
-                        }
-                case MSGGET:
-                        return sys_msgget ((key_t) first, second);
-                case MSGCTL:
-                        return sys_msgctl (first, second,
-                                           (struct msqid_ds *) ptr);
-                default:
-                        return -EINVAL;
-                }
-        if (call <= SHMCTL) 
-                switch (call) {
-                case SHMAT:
-                        switch (version) {
-                        default: {
-                                ulong raddr;
-                                ret = do_shmat (first, (char *) ptr,
-                                                 second, &raddr);
-                                if (ret)
-                                        return ret;
-                                return put_user (raddr, (ulong *) third);
-                        }
-                        }
-                case SHMDT: 
-                        return sys_shmdt ((char *)ptr);
-                case SHMGET:
-                        return sys_shmget (first, second, third);
-                case SHMCTL:
-                        return sys_shmctl (first, second,
-                                           (struct shmid_ds *) ptr);
-                default:
-                        return -EINVAL;
-                }
-
-        return -EINVAL;
-}
-
 /* sys_cacheflush -- no support.  */
 asmlinkage int
 sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len)
diff --git a/arch/h8300/kernel/syscalls.S b/arch/h8300/kernel/syscalls.S
index 2d69881eda6..faefaff7d43 100644
--- a/arch/h8300/kernel/syscalls.S
+++ b/arch/h8300/kernel/syscalls.S
@@ -96,7 +96,7 @@ SYMBOL_NAME_LABEL(sys_call_table)
         .long SYMBOL_NAME(sys_settimeofday)
         .long SYMBOL_NAME(sys_getgroups16)      /* 80 */
         .long SYMBOL_NAME(sys_setgroups16)
-        .long SYMBOL_NAME(old_select)
+        .long SYMBOL_NAME(sys_old_select)
         .long SYMBOL_NAME(sys_symlink)
         .long SYMBOL_NAME(sys_lstat)
         .long SYMBOL_NAME(sys_readlink)         /* 85 */
@@ -104,7 +104,7 @@ SYMBOL_NAME_LABEL(sys_call_table)
         .long SYMBOL_NAME(sys_swapon)
         .long SYMBOL_NAME(sys_reboot)
         .long SYMBOL_NAME(sys_old_readdir)
-        .long SYMBOL_NAME(old_mmap)             /* 90 */
+        .long SYMBOL_NAME(sys_old_mmap)         /* 90 */
         .long SYMBOL_NAME(sys_munmap)
         .long SYMBOL_NAME(sys_truncate)
         .long SYMBOL_NAME(sys_ftruncate)
diff --git a/arch/h8300/mm/init.c b/arch/h8300/mm/init.c
index 9942f24aff9..7cc3380f250 100644
--- a/arch/h8300/mm/init.c
+++ b/arch/h8300/mm/init.c
@@ -30,7 +30,7 @@
 #include <linux/highmem.h>
 #include <linux/pagemap.h>
 #include <linux/bootmem.h>
-#include <linux/slab.h>
+#include <linux/gfp.h>
 
 #include <asm/setup.h>
 #include <asm/segment.h>
diff --git a/arch/h8300/mm/kmap.c b/arch/h8300/mm/kmap.c
index 5c7af09ae8d..944a502c2e5 100644
--- a/arch/h8300/mm/kmap.c
+++ b/arch/h8300/mm/kmap.c
@@ -12,7 +12,6 @@
 #include <linux/kernel.h>
 #include <linux/string.h>
 #include <linux/types.h>
-#include <linux/slab.h>
 #include <linux/vmalloc.h>
 
 #include <asm/setup.h>
diff --git a/arch/h8300/mm/memory.c b/arch/h8300/mm/memory.c
index 40d8aa811e4..5552ddfaab5 100644
--- a/arch/h8300/mm/memory.c
+++ b/arch/h8300/mm/memory.c
@@ -21,7 +21,6 @@
 #include <linux/kernel.h>
 #include <linux/string.h>
 #include <linux/types.h>
-#include <linux/slab.h>
 
 #include <asm/setup.h>
 #include <asm/segment.h>
diff --git a/arch/h8300/platform/h8300h/ptrace_h8300h.c b/arch/h8300/platform/h8300h/ptrace_h8300h.c
index 746b1ae672a..4f1ed027963 100644
--- a/arch/h8300/platform/h8300h/ptrace_h8300h.c
+++ b/arch/h8300/platform/h8300h/ptrace_h8300h.c
@@ -60,7 +60,7 @@ int h8300_put_reg(struct task_struct *task, int regno, unsigned long data)
 }
 
 /* disable singlestep */
-void h8300_disable_trace(struct task_struct *child)
+void user_disable_single_step(struct task_struct *child)
 {
         if((long)child->thread.breakinfo.addr != -1L) {
                 *child->thread.breakinfo.addr = child->thread.breakinfo.inst;
@@ -264,7 +264,7 @@ static unsigned short *getnextpc(struct task_struct *child, unsigned short *pc)
 
 /* Set breakpoint(s) to simulate a single step from the current PC.  */
 
-void h8300_enable_trace(struct task_struct *child)
+void user_enable_single_step(struct task_struct *child)
 {
         unsigned short *nextpc;
         nextpc = getnextpc(child,(unsigned short *)h8300_get_reg(child, PT_PC));
@@ -276,7 +276,7 @@ void h8300_enable_trace(struct task_struct *child)
 asmlinkage void trace_trap(unsigned long bp)
 {
         if ((unsigned long)current->thread.breakinfo.addr == bp) {
-                h8300_disable_trace(current);
+                user_disable_single_step(current);
                 force_sig(SIGTRAP,current);
         } else
                 force_sig(SIGILL,current);
diff --git a/arch/h8300/platform/h8s/ptrace_h8s.c b/arch/h8300/platform/h8s/ptrace_h8s.c
index e8cd46f9255..c058ab1a849 100644
--- a/arch/h8300/platform/h8s/ptrace_h8s.c
+++ b/arch/h8300/platform/h8s/ptrace_h8s.c
@@ -65,13 +65,13 @@ int h8300_put_reg(struct task_struct *task, int regno, unsigned long data)
 }
 
 /* disable singlestep */
-void h8300_disable_trace(struct task_struct *child)
+void user_disable_single_step(struct task_struct *child)
 {
         *(unsigned short *)(child->thread.esp0 + h8300_register_offset[PT_EXR]) &= ~EXR_TRACE;
 }
 
 /* enable singlestep */
-void h8300_enable_trace(struct task_struct *child)
+void user_enable_single_step(struct task_struct *child)
 {
         *(unsigned short *)(child->thread.esp0 + h8300_register_offset[PT_EXR]) |= EXR_TRACE;
 }
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 9a50d7dd2a0..4d4f4188cdf 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -53,6 +53,9 @@ config MMU
         bool
         default y
 
+config NEED_DMA_MAP_STATE
+        def_bool y
+
 config SWIOTLB
        bool
 
diff --git a/arch/ia64/include/asm/compat.h b/arch/ia64/include/asm/compat.h
index dfcf75b8426..f90edc85b50 100644
--- a/arch/ia64/include/asm/compat.h
+++ b/arch/ia64/include/asm/compat.h
@@ -5,7 +5,8 @@
  */
 #include <linux/types.h>
 
-#define COMPAT_USER_HZ  100
+#define COMPAT_USER_HZ          100
+#define COMPAT_UTS_MACHINE      "i686\0\0\0"
 
 typedef u32             compat_size_t;
 typedef s32             compat_ssize_t;
diff --git a/arch/ia64/include/asm/dmi.h b/arch/ia64/include/asm/dmi.h
index 00eb1b130b6..1ed4c8fedb8 100644
--- a/arch/ia64/include/asm/dmi.h
+++ b/arch/ia64/include/asm/dmi.h
@@ -1,6 +1,7 @@
 #ifndef _ASM_DMI_H
 #define _ASM_DMI_H 1
 
+#include <linux/slab.h>
 #include <asm/io.h>
 
 /* Use normal IO mappings for DMI */
diff --git a/arch/ia64/include/asm/elf.h b/arch/ia64/include/asm/elf.h
index 4c41656ede8..b5298eb09ad 100644
--- a/arch/ia64/include/asm/elf.h
+++ b/arch/ia64/include/asm/elf.h
@@ -219,54 +219,6 @@ do {										\
         NEW_AUX_ENT(AT_SYSINFO_EHDR, (unsigned long) GATE_EHDR);                \
 } while (0)
 
-
-/*
- * These macros parameterize elf_core_dump in fs/binfmt_elf.c to write out
- * extra segments containing the gate DSO contents.  Dumping its
- * contents makes post-mortem fully interpretable later without matching up
- * the same kernel and hardware config to see what PC values meant.
- * Dumping its extra ELF program headers includes all the other information
- * a debugger needs to easily find how the gate DSO was being used.
- */
-#define ELF_CORE_EXTRA_PHDRS            (GATE_EHDR->e_phnum)
-#define ELF_CORE_WRITE_EXTRA_PHDRS                                              \
-do {                                                                            \
-        const struct elf_phdr *const gate_phdrs =                             \
-                (const struct elf_phdr *) (GATE_ADDR + GATE_EHDR->e_phoff);   \
-        int i;                                                                  \
-        Elf64_Off ofs = 0;                                                    \
-        for (i = 0; i < GATE_EHDR->e_phnum; ++i) {                              \
-                struct elf_phdr phdr = gate_phdrs[i];                         \
-                if (phdr.p_type == PT_LOAD) {                                   \
-                        phdr.p_memsz = PAGE_ALIGN(phdr.p_memsz);              \
-                        phdr.p_filesz = phdr.p_memsz;                         \
-                        if (ofs == 0) {                                       \
-                                ofs = phdr.p_offset = offset;                 \
-                        offset += phdr.p_filesz;                                \
-                }                                                             \
-                else                                                          \
-                                phdr.p_offset = ofs;                          \
-                }                                                             \
-                else                                                          \
-                        phdr.p_offset += ofs;                                   \
-                phdr.p_paddr = 0; /* match other core phdrs */                  \
-                DUMP_WRITE(&phdr, sizeof(phdr));                                \
-        }                                                                       \
-} while (0)
-#define ELF_CORE_WRITE_EXTRA_DATA                                       \
-do {                                                                    \
-        const struct elf_phdr *const gate_phdrs =                             \
-                (const struct elf_phdr *) (GATE_ADDR + GATE_EHDR->e_phoff);   \
-        int i;                                                          \
-        for (i = 0; i < GATE_EHDR->e_phnum; ++i) {                      \
-                if (gate_phdrs[i].p_type == PT_LOAD) {                        \
-                        DUMP_WRITE((void *) gate_phdrs[i].p_vaddr,            \
-                                   PAGE_ALIGN(gate_phdrs[i].p_memsz));        \
-                        break;                                                \
-                }                                                             \
-        }                                                               \
-} while (0)
-
 /*
  * format for entries in the Global Offset Table
  */
diff --git a/arch/ia64/include/asm/pci.h b/arch/ia64/include/asm/pci.h
index 55281aabe5f..73b5f785e70 100644
--- a/arch/ia64/include/asm/pci.h
+++ b/arch/ia64/include/asm/pci.h
@@ -56,20 +56,6 @@ pcibios_penalize_isa_irq (int irq, int active)
 
 #include <asm-generic/pci-dma-compat.h>
 
-/* pci_unmap_{single,page} is not a nop, thus... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       \
-        dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         \
-        __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME)                  \
-        ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)         \
-        (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME)                    \
-        ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)           \
-        (((PTR)->LEN_NAME) = (VAL))
-
 #ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                         enum pci_dma_burst_strategy *strat,
diff --git a/arch/ia64/include/asm/ptrace.h b/arch/ia64/include/asm/ptrace.h
index 14055c636ad..7ae9c3f15a1 100644
--- a/arch/ia64/include/asm/ptrace.h
+++ b/arch/ia64/include/asm/ptrace.h
@@ -319,11 +319,7 @@ static inline unsigned long user_stack_pointer(struct pt_regs *regs)
         ptrace_attach_sync_user_rbs(child)
 
   #define arch_has_single_step()  (1)
-  extern void user_enable_single_step(struct task_struct *);
-  extern void user_disable_single_step(struct task_struct *);
-
   #define arch_has_block_step()   (1)
-  extern void user_enable_block_step(struct task_struct *);
 
 #endif /* !__KERNEL__ */
 
diff --git a/arch/ia64/kernel/Makefile b/arch/ia64/kernel/Makefile
index 4138282aefa..db10b1e378b 100644
--- a/arch/ia64/kernel/Makefile
+++ b/arch/ia64/kernel/Makefile
@@ -45,6 +45,8 @@ endif
 obj-$(CONFIG_DMAR)              += pci-dma.o
 obj-$(CONFIG_SWIOTLB)           += pci-swiotlb.o
 
+obj-$(CONFIG_BINFMT_ELF)        += elfcore.o
+
 # fp_emulate() expects f2-f5,f16-f31 to contain the user-level state.
 CFLAGS_traps.o  += -mfixed-range=f2-f5,f16-f31
 
diff --git a/arch/ia64/kernel/acpi-ext.c b/arch/ia64/kernel/acpi-ext.c
index b7515bc808a..8b9318d311a 100644
--- a/arch/ia64/kernel/acpi-ext.c
+++ b/arch/ia64/kernel/acpi-ext.c
@@ -10,6 +10,7 @@
 
 #include <linux/module.h>
 #include <linux/types.h>
+#include <linux/slab.h>
 #include <linux/acpi.h>
 
 #include <asm/acpi-ext.h>
diff --git a/arch/ia64/kernel/acpi.c b/arch/ia64/kernel/acpi.c
index a7ca07f3754..4d1a7e9314c 100644
--- a/arch/ia64/kernel/acpi.c
+++ b/arch/ia64/kernel/acpi.c
@@ -44,6 +44,8 @@
 #include <linux/efi.h>
 #include <linux/mmzone.h>
 #include <linux/nodemask.h>
+#include <linux/slab.h>
+#include <acpi/processor.h>
 #include <asm/io.h>
 #include <asm/iosapic.h>
 #include <asm/machvec.h>
@@ -907,6 +909,8 @@ int acpi_map_lsapic(acpi_handle handle, int *pcpu)
         cpu_set(cpu, cpu_present_map);
         ia64_cpu_to_sapicid[cpu] = physid;
 
+        acpi_processor_set_pdc(handle);
+
         *pcpu = cpu;
         return (0);
 }
diff --git a/arch/ia64/kernel/cpufreq/acpi-cpufreq.c b/arch/ia64/kernel/cpufreq/acpi-cpufreq.c
index 7b435451b3d..b0b4e6e710f 100644
--- a/arch/ia64/kernel/cpufreq/acpi-cpufreq.c
+++ b/arch/ia64/kernel/cpufreq/acpi-cpufreq.c
@@ -10,6 +10,7 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/slab.h>
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/cpufreq.h>
diff --git a/arch/ia64/kernel/efi.c b/arch/ia64/kernel/efi.c
index c745d0aeb6e..a0f00192850 100644
--- a/arch/ia64/kernel/efi.c
+++ b/arch/ia64/kernel/efi.c
@@ -26,6 +26,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/types.h>
+#include <linux/slab.h>
 #include <linux/time.h>
 #include <linux/efi.h>
 #include <linux/kexec.h>
diff --git a/arch/ia64/kernel/elfcore.c b/arch/ia64/kernel/elfcore.c
new file mode 100644
index 00000000000..bac1639bc32
--- /dev/null
+++ b/arch/ia64/kernel/elfcore.c
@@ -0,0 +1,80 @@
+#include <linux/elf.h>
+#include <linux/coredump.h>
+#include <linux/fs.h>
+#include <linux/mm.h>
+
+#include <asm/elf.h>
+
+
+Elf64_Half elf_core_extra_phdrs(void)
+{
+        return GATE_EHDR->e_phnum;
+}
+
+int elf_core_write_extra_phdrs(struct file *file, loff_t offset, size_t *size,
+                               unsigned long limit)
+{
+        const struct elf_phdr *const gate_phdrs =
+                (const struct elf_phdr *) (GATE_ADDR + GATE_EHDR->e_phoff);
+        int i;
+        Elf64_Off ofs = 0;
+
+        for (i = 0; i < GATE_EHDR->e_phnum; ++i) {
+                struct elf_phdr phdr = gate_phdrs[i];
+
+                if (phdr.p_type == PT_LOAD) {
+                        phdr.p_memsz = PAGE_ALIGN(phdr.p_memsz);
+                        phdr.p_filesz = phdr.p_memsz;
+                        if (ofs == 0) {
+                                ofs = phdr.p_offset = offset;
+                                offset += phdr.p_filesz;
+                        } else {
+                                phdr.p_offset = ofs;
+                        }
+                } else {
+                        phdr.p_offset += ofs;
+                }
+                phdr.p_paddr = 0; /* match other core phdrs */
+                *size += sizeof(phdr);
+                if (*size > limit || !dump_write(file, &phdr, sizeof(phdr)))
+                        return 0;
+        }
+        return 1;
+}
+
+int elf_core_write_extra_data(struct file *file, size_t *size,
+                              unsigned long limit)
+{
+        const struct elf_phdr *const gate_phdrs =
+                (const struct elf_phdr *) (GATE_ADDR + GATE_EHDR->e_phoff);
+        int i;
+
+        for (i = 0; i < GATE_EHDR->e_phnum; ++i) {
+                if (gate_phdrs[i].p_type == PT_LOAD) {
+                        void *addr = (void *)gate_phdrs[i].p_vaddr;
+                        size_t memsz = PAGE_ALIGN(gate_phdrs[i].p_memsz);
+
+                        *size += memsz;
+                        if (*size > limit || !dump_write(file, addr, memsz))
+                                return 0;
+                        break;
+                }
+        }
+        return 1;
+}
+
+size_t elf_core_extra_data_size(void)
+{
+        const struct elf_phdr *const gate_phdrs =
+                (const struct elf_phdr *) (GATE_ADDR + GATE_EHDR->e_phoff);
+        int i;
+        size_t size = 0;
+
+        for (i = 0; i < GATE_EHDR->e_phnum; ++i) {
+                if (gate_phdrs[i].p_type == PT_LOAD) {
+                        size += PAGE_ALIGN(gate_phdrs[i].p_memsz);
+                        break;
+                }
+        }
+        return size;
+}
diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c
index 95ac77aeae9..7ded76658d2 100644
--- a/arch/ia64/kernel/iosapic.c
+++ b/arch/ia64/kernel/iosapic.c
@@ -86,6 +86,7 @@
 #include <linux/kernel.h>
 #include <linux/list.h>
 #include <linux/pci.h>
+#include <linux/slab.h>
 #include <linux/smp.h>
 #include <linux/string.h>
 #include <linux/bootmem.h>
diff --git a/arch/ia64/kernel/irq_ia64.c b/arch/ia64/kernel/irq_ia64.c
index d4093a173a3..640479304ac 100644
--- a/arch/ia64/kernel/irq_ia64.c
+++ b/arch/ia64/kernel/irq_ia64.c
@@ -22,7 +22,6 @@
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
 #include <linux/kernel_stat.h>
-#include <linux/slab.h>
 #include <linux/ptrace.h>
 #include <linux/random.h>       /* for rand_initialize_irq() */
 #include <linux/signal.h>
diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c
index 378b4833024..a0220dc5ff4 100644
--- a/arch/ia64/kernel/mca.c
+++ b/arch/ia64/kernel/mca.c
@@ -85,6 +85,7 @@
 #include <linux/cpumask.h>
 #include <linux/kdebug.h>
 #include <linux/cpu.h>
+#include <linux/gfp.h>
 
 #include <asm/delay.h>
 #include <asm/machvec.h>
diff --git a/arch/ia64/kernel/mca_drv.c b/arch/ia64/kernel/mca_drv.c
index f94aaa86933..09b4d6828c4 100644
--- a/arch/ia64/kernel/mca_drv.c
+++ b/arch/ia64/kernel/mca_drv.c
@@ -22,6 +22,7 @@
 #include <linux/smp.h>
 #include <linux/workqueue.h>
 #include <linux/mm.h>
+#include <linux/slab.h>
 
 #include <asm/delay.h>
 #include <asm/machvec.h>
diff --git a/arch/ia64/kernel/pci-swiotlb.c b/arch/ia64/kernel/pci-swiotlb.c
index 53292abf846..3095654f9ab 100644
--- a/arch/ia64/kernel/pci-swiotlb.c
+++ b/arch/ia64/kernel/pci-swiotlb.c
@@ -1,6 +1,7 @@
 /* Glue code to lib/swiotlb.c */
 
 #include <linux/pci.h>
+#include <linux/gfp.h>
 #include <linux/cache.h>
 #include <linux/module.h>
 #include <linux/dma-mapping.h>
diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c
index b81e46b1629..ab985f785c1 100644
--- a/arch/ia64/kernel/perfmon.c
+++ b/arch/ia64/kernel/perfmon.c
@@ -41,6 +41,7 @@
 #include <linux/rcupdate.h>
 #include <linux/completion.h>
 #include <linux/tracehook.h>
+#include <linux/slab.h>
 
 #include <asm/errno.h>
 #include <asm/intrinsics.h>
@@ -2315,6 +2316,7 @@ pfm_smpl_buffer_alloc(struct task_struct *task, struct file *filp, pfm_context_t
                 DPRINT(("Cannot allocate vma\n"));
                 goto error_kmem;
         }
+        INIT_LIST_HEAD(&vma->anon_vma_chain);
 
         /*
          * partially initialize the vma for the sampling buffer
diff --git a/arch/ia64/kernel/process.c b/arch/ia64/kernel/process.c
index d92765cae10..53f1648c8b8 100644
--- a/arch/ia64/kernel/process.c
+++ b/arch/ia64/kernel/process.c
@@ -15,11 +15,11 @@
 #include <linux/kallsyms.h>
 #include <linux/kernel.h>
 #include <linux/mm.h>
+#include <linux/slab.h>
 #include <linux/module.h>
 #include <linux/notifier.h>
 #include <linux/personality.h>
 #include <linux/sched.h>
-#include <linux/slab.h>
 #include <linux/stddef.h>
 #include <linux/thread_info.h>
 #include <linux/unistd.h>
diff --git a/arch/ia64/kernel/ptrace.c b/arch/ia64/kernel/ptrace.c
index b61afbbe076..0dec7f70244 100644
--- a/arch/ia64/kernel/ptrace.c
+++ b/arch/ia64/kernel/ptrace.c
@@ -11,7 +11,6 @@
  */
 #include <linux/kernel.h>
 #include <linux/sched.h>
-#include <linux/slab.h>
 #include <linux/mm.h>
 #include <linux/errno.h>
 #include <linux/ptrace.h>
diff --git a/arch/ia64/kernel/topology.c b/arch/ia64/kernel/topology.c
index 8f060352e12..28f299de290 100644
--- a/arch/ia64/kernel/topology.c
+++ b/arch/ia64/kernel/topology.c
@@ -17,6 +17,7 @@
 #include <linux/kernel.h>
 #include <linux/mm.h>
 #include <linux/node.h>
+#include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/bootmem.h>
 #include <linux/nodemask.h>
@@ -282,7 +283,7 @@ static ssize_t cache_show(struct kobject * kobj, struct attribute * attr, char *
         return ret;
 }
 
-static struct sysfs_ops cache_sysfs_ops = {
+static const struct sysfs_ops cache_sysfs_ops = {
         .show   = cache_show
 };
 
diff --git a/arch/ia64/kernel/uncached.c b/arch/ia64/kernel/uncached.c
index a595823582d..c4696d217ce 100644
--- a/arch/ia64/kernel/uncached.c
+++ b/arch/ia64/kernel/uncached.c
@@ -18,9 +18,9 @@
 #include <linux/init.h>
 #include <linux/errno.h>
 #include <linux/string.h>
-#include <linux/slab.h>
 #include <linux/efi.h>
 #include <linux/genalloc.h>
+#include <linux/gfp.h>
 #include <asm/page.h>
 #include <asm/pal.h>
 #include <asm/system.h>
diff --git a/arch/ia64/kvm/Kconfig b/arch/ia64/kvm/Kconfig
index 01c75797119..fa4d1e59deb 100644
--- a/arch/ia64/kvm/Kconfig
+++ b/arch/ia64/kvm/Kconfig
@@ -26,6 +26,7 @@ config KVM
         select ANON_INODES
         select HAVE_KVM_IRQCHIP
         select KVM_APIC_ARCHITECTURE
+        select KVM_MMIO
         ---help---
           Support hosting fully virtualized guest machines using hardware
           virtualization extensions.  You will need a fairly recent
diff --git a/arch/ia64/kvm/kvm-ia64.c b/arch/ia64/kvm/kvm-ia64.c
index 5fdeec5fddc..7f3c0a2e60c 100644
--- a/arch/ia64/kvm/kvm-ia64.c
+++ b/arch/ia64/kvm/kvm-ia64.c
@@ -23,8 +23,8 @@
 #include <linux/module.h>
 #include <linux/errno.h>
 #include <linux/percpu.h>
-#include <linux/gfp.h>
 #include <linux/fs.h>
+#include <linux/slab.h>
 #include <linux/smp.h>
 #include <linux/kvm_host.h>
 #include <linux/kvm.h>
@@ -241,10 +241,10 @@ static int handle_mmio(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         return 0;
 mmio:
         if (p->dir)
-                r = kvm_io_bus_read(&vcpu->kvm->mmio_bus, p->addr,
+                r = kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, p->addr,
                                     p->size, &p->data);
         else
-                r = kvm_io_bus_write(&vcpu->kvm->mmio_bus, p->addr,
+                r = kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, p->addr,
                                      p->size, &p->data);
         if (r)
                 printk(KERN_ERR"kvm: No iodevice found! addr:%lx\n", p->addr);
@@ -636,12 +636,9 @@ static void kvm_vcpu_post_transition(struct kvm_vcpu *vcpu)
 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 {
         union context *host_ctx, *guest_ctx;
-        int r;
+        int r, idx;
 
-        /*
-         * down_read() may sleep and return with interrupts enabled
-         */
-        down_read(&vcpu->kvm->slots_lock);
+        idx = srcu_read_lock(&vcpu->kvm->srcu);
 
 again:
         if (signal_pending(current)) {
@@ -663,7 +660,7 @@ again:
         if (r < 0)
                 goto vcpu_run_fail;
 
-        up_read(&vcpu->kvm->slots_lock);
+        srcu_read_unlock(&vcpu->kvm->srcu, idx);
         kvm_guest_enter();
 
         /*
@@ -687,7 +684,7 @@ again:
         kvm_guest_exit();
         preempt_enable();
 
-        down_read(&vcpu->kvm->slots_lock);
+        idx = srcu_read_lock(&vcpu->kvm->srcu);
 
         r = kvm_handle_exit(kvm_run, vcpu);
 
@@ -697,10 +694,10 @@ again:
         }
 
 out:
-        up_read(&vcpu->kvm->slots_lock);
+        srcu_read_unlock(&vcpu->kvm->srcu, idx);
         if (r > 0) {
                 kvm_resched(vcpu);
-                down_read(&vcpu->kvm->slots_lock);
+                idx = srcu_read_lock(&vcpu->kvm->srcu);
                 goto again;
         }
 
@@ -971,7 +968,7 @@ long kvm_arch_vm_ioctl(struct file *filp,
                         goto out;
                 r = kvm_setup_default_irq_routing(kvm);
                 if (r) {
-                        kfree(kvm->arch.vioapic);
+                        kvm_ioapic_destroy(kvm);
                         goto out;
                 }
                 break;
@@ -1377,12 +1374,14 @@ static void free_kvm(struct kvm *kvm)
 
 static void kvm_release_vm_pages(struct kvm *kvm)
 {
+        struct kvm_memslots *slots;
         struct kvm_memory_slot *memslot;
         int i, j;
         unsigned long base_gfn;
 
-        for (i = 0; i < kvm->nmemslots; i++) {
-                memslot = &kvm->memslots[i];
+        slots = rcu_dereference(kvm->memslots);
+        for (i = 0; i < slots->nmemslots; i++) {
+                memslot = &slots->memslots[i];
                 base_gfn = memslot->base_gfn;
 
                 for (j = 0; j < memslot->npages; j++) {
@@ -1405,6 +1404,7 @@ void kvm_arch_destroy_vm(struct kvm *kvm)
         kfree(kvm->arch.vioapic);
         kvm_release_vm_pages(kvm);
         kvm_free_physmem(kvm);
+        cleanup_srcu_struct(&kvm->srcu);
         free_kvm(kvm);
 }
 
@@ -1576,15 +1576,15 @@ out:
         return r;
 }
 
-int kvm_arch_set_memory_region(struct kvm *kvm,
-                struct kvm_userspace_memory_region *mem,
+int kvm_arch_prepare_memory_region(struct kvm *kvm,
+                struct kvm_memory_slot *memslot,
                 struct kvm_memory_slot old,
+                struct kvm_userspace_memory_region *mem,
                 int user_alloc)
 {
         unsigned long i;
         unsigned long pfn;
-        int npages = mem->memory_size >> PAGE_SHIFT;
-        struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
+        int npages = memslot->npages;
         unsigned long base_gfn = memslot->base_gfn;
 
         if (base_gfn + npages > (KVM_MAX_MEM_SIZE >> PAGE_SHIFT))
@@ -1608,6 +1608,14 @@ int kvm_arch_set_memory_region(struct kvm *kvm,
         return 0;
 }
 
+void kvm_arch_commit_memory_region(struct kvm *kvm,
+                struct kvm_userspace_memory_region *mem,
+                struct kvm_memory_slot old,
+                int user_alloc)
+{
+        return;
+}
+
 void kvm_arch_flush_shadow(struct kvm *kvm)
 {
         kvm_flush_remote_tlbs(kvm);
@@ -1794,7 +1802,8 @@ static int kvm_ia64_sync_dirty_log(struct kvm *kvm,
 {
         struct kvm_memory_slot *memslot;
         int r, i;
-        long n, base;
+        long base;
+        unsigned long n;
         unsigned long *dirty_bitmap = (unsigned long *)(kvm->arch.vm_base +
                         offsetof(struct kvm_vm_data, kvm_mem_dirty_log));
 
@@ -1802,12 +1811,12 @@ static int kvm_ia64_sync_dirty_log(struct kvm *kvm,
         if (log->slot >= KVM_MEMORY_SLOTS)
                 goto out;
 
-        memslot = &kvm->memslots[log->slot];
+        memslot = &kvm->memslots->memslots[log->slot];
         r = -ENOENT;
         if (!memslot->dirty_bitmap)
                 goto out;
 
-        n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
+        n = kvm_dirty_bitmap_bytes(memslot);
         base = memslot->base_gfn / BITS_PER_LONG;
 
         for (i = 0; i < n/sizeof(long); ++i) {
@@ -1823,10 +1832,11 @@ int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
                 struct kvm_dirty_log *log)
 {
         int r;
-        int n;
+        unsigned long n;
         struct kvm_memory_slot *memslot;
         int is_dirty = 0;
 
+        mutex_lock(&kvm->slots_lock);
         spin_lock(&kvm->arch.dirty_log_lock);
 
         r = kvm_ia64_sync_dirty_log(kvm, log);
@@ -1840,12 +1850,13 @@ int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
         /* If nothing is dirty, don't bother messing with page tables. */
         if (is_dirty) {
                 kvm_flush_remote_tlbs(kvm);
-                memslot = &kvm->memslots[log->slot];
-                n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
+                memslot = &kvm->memslots->memslots[log->slot];
+                n = kvm_dirty_bitmap_bytes(memslot);
                 memset(memslot->dirty_bitmap, 0, n);
         }
         r = 0;
 out:
+        mutex_unlock(&kvm->slots_lock);
         spin_unlock(&kvm->arch.dirty_log_lock);
         return r;
 }
diff --git a/arch/ia64/kvm/kvm_fw.c b/arch/ia64/kvm/kvm_fw.c
index e4b82319881..cb548ee9fca 100644
--- a/arch/ia64/kvm/kvm_fw.c
+++ b/arch/ia64/kvm/kvm_fw.c
@@ -75,7 +75,7 @@ static void set_pal_result(struct kvm_vcpu *vcpu,
         struct exit_ctl_data *p;
 
         p = kvm_get_exit_data(vcpu);
-        if (p && p->exit_reason == EXIT_REASON_PAL_CALL) {
+        if (p->exit_reason == EXIT_REASON_PAL_CALL) {
                 p->u.pal_data.ret = result;
                 return ;
         }
@@ -87,7 +87,7 @@ static void set_sal_result(struct kvm_vcpu *vcpu,
         struct exit_ctl_data *p;
 
         p = kvm_get_exit_data(vcpu);
-        if (p && p->exit_reason == EXIT_REASON_SAL_CALL) {
+        if (p->exit_reason == EXIT_REASON_SAL_CALL) {
                 p->u.sal_data.ret = result;
                 return ;
         }
@@ -322,7 +322,7 @@ static  u64 kvm_get_pal_call_index(struct kvm_vcpu *vcpu)
         struct exit_ctl_data *p;
 
         p = kvm_get_exit_data(vcpu);
-        if (p && (p->exit_reason == EXIT_REASON_PAL_CALL))
+        if (p->exit_reason == EXIT_REASON_PAL_CALL)
                 index = p->u.pal_data.gr28;
 
         return index;
@@ -646,18 +646,16 @@ static void kvm_get_sal_call_data(struct kvm_vcpu *vcpu, u64 *in0, u64 *in1,
 
         p = kvm_get_exit_data(vcpu);
 
-        if (p) {
-                if (p->exit_reason == EXIT_REASON_SAL_CALL) {
-                        *in0 = p->u.sal_data.in0;
-                        *in1 = p->u.sal_data.in1;
-                        *in2 = p->u.sal_data.in2;
-                        *in3 = p->u.sal_data.in3;
-                        *in4 = p->u.sal_data.in4;
-                        *in5 = p->u.sal_data.in5;
-                        *in6 = p->u.sal_data.in6;
-                        *in7 = p->u.sal_data.in7;
-                        return ;
-                }
+        if (p->exit_reason == EXIT_REASON_SAL_CALL) {
+                *in0 = p->u.sal_data.in0;
+                *in1 = p->u.sal_data.in1;
+                *in2 = p->u.sal_data.in2;
+                *in3 = p->u.sal_data.in3;
+                *in4 = p->u.sal_data.in4;
+                *in5 = p->u.sal_data.in5;
+                *in6 = p->u.sal_data.in6;
+                *in7 = p->u.sal_data.in7;
+                return ;
         }
         *in0 = 0;
 }
diff --git a/arch/ia64/kvm/mmio.c b/arch/ia64/kvm/mmio.c
index 9bf55afd08d..fb8f9f59a1e 100644
--- a/arch/ia64/kvm/mmio.c
+++ b/arch/ia64/kvm/mmio.c
@@ -316,8 +316,8 @@ void emulate_io_inst(struct kvm_vcpu *vcpu, u64 padr, u64 ma)
                 return;
         } else {
                 inst_type = -1;
-                panic_vm(vcpu, "Unsupported MMIO access instruction! \
-                                Bunld[0]=0x%lx, Bundle[1]=0x%lx\n",
+                panic_vm(vcpu, "Unsupported MMIO access instruction! "
+                                "Bunld[0]=0x%lx, Bundle[1]=0x%lx\n",
                                 bundle.i64[0], bundle.i64[1]);
         }
 
diff --git a/arch/ia64/kvm/vcpu.c b/arch/ia64/kvm/vcpu.c
index dce75b70cdd..958815c9787 100644
--- a/arch/ia64/kvm/vcpu.c
+++ b/arch/ia64/kvm/vcpu.c
@@ -1639,8 +1639,8 @@ void vcpu_set_psr(struct kvm_vcpu *vcpu, unsigned long val)
          * Otherwise panic
          */
         if (val & (IA64_PSR_PK | IA64_PSR_IS | IA64_PSR_VM))
-                panic_vm(vcpu, "Only support guests with vpsr.pk =0 \
-                                & vpsr.is=0\n");
+                panic_vm(vcpu, "Only support guests with vpsr.pk =0 "
+                                "& vpsr.is=0\n");
 
         /*
          * For those IA64_PSR bits: id/da/dd/ss/ed/ia
diff --git a/arch/ia64/mm/discontig.c b/arch/ia64/mm/discontig.c
index 8d586d1e251..61620323bb6 100644
--- a/arch/ia64/mm/discontig.c
+++ b/arch/ia64/mm/discontig.c
@@ -22,6 +22,7 @@
 #include <linux/acpi.h>
 #include <linux/efi.h>
 #include <linux/nodemask.h>
+#include <linux/slab.h>
 #include <asm/pgalloc.h>
 #include <asm/tlb.h>
 #include <asm/meminit.h>
diff --git a/arch/ia64/mm/hugetlbpage.c b/arch/ia64/mm/hugetlbpage.c
index b0f615759e9..1841ee7e65f 100644
--- a/arch/ia64/mm/hugetlbpage.c
+++ b/arch/ia64/mm/hugetlbpage.c
@@ -14,7 +14,6 @@
 #include <linux/hugetlb.h>
 #include <linux/pagemap.h>
 #include <linux/module.h>
-#include <linux/slab.h>
 #include <linux/sysctl.h>
 #include <linux/log2.h>
 #include <asm/mman.h>
diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c
index ca3335ea56c..ed41759efca 100644
--- a/arch/ia64/mm/init.c
+++ b/arch/ia64/mm/init.c
@@ -117,6 +117,7 @@ ia64_init_addr_space (void)
          */
         vma = kmem_cache_zalloc(vm_area_cachep, GFP_KERNEL);
         if (vma) {
+                INIT_LIST_HEAD(&vma->anon_vma_chain);
                 vma->vm_mm = current->mm;
                 vma->vm_start = current->thread.rbs_bot & PAGE_MASK;
                 vma->vm_end = vma->vm_start + PAGE_SIZE;
@@ -135,6 +136,7 @@ ia64_init_addr_space (void)
         if (!(current->personality & MMAP_PAGE_ZERO)) {
                 vma = kmem_cache_zalloc(vm_area_cachep, GFP_KERNEL);
                 if (vma) {
+                        INIT_LIST_HEAD(&vma->anon_vma_chain);
                         vma->vm_mm = current->mm;
                         vma->vm_end = PAGE_SIZE;
                         vma->vm_page_prot = __pgprot(pgprot_val(PAGE_READONLY) | _PAGE_MA_NAT);
diff --git a/arch/ia64/mm/tlb.c b/arch/ia64/mm/tlb.c
index f3de9d7a98b..5dfd916e9ea 100644
--- a/arch/ia64/mm/tlb.c
+++ b/arch/ia64/mm/tlb.c
@@ -22,6 +22,7 @@
 #include <linux/smp.h>
 #include <linux/mm.h>
 #include <linux/bootmem.h>
+#include <linux/slab.h>
 
 #include <asm/delay.h>
 #include <asm/mmu_context.h>
diff --git a/arch/ia64/sn/kernel/bte.c b/arch/ia64/sn/kernel/bte.c
index c6d6b62db66..cad775a1a15 100644
--- a/arch/ia64/sn/kernel/bte.c
+++ b/arch/ia64/sn/kernel/bte.c
@@ -19,6 +19,7 @@
 #include <linux/bootmem.h>
 #include <linux/string.h>
 #include <linux/sched.h>
+#include <linux/slab.h>
 
 #include <asm/sn/bte.h>
 
diff --git a/arch/ia64/sn/kernel/io_acpi_init.c b/arch/ia64/sn/kernel/io_acpi_init.c
index 66f633bff05..8cdcb173a13 100644
--- a/arch/ia64/sn/kernel/io_acpi_init.c
+++ b/arch/ia64/sn/kernel/io_acpi_init.c
@@ -13,6 +13,7 @@
 #include <asm/sn/sn_sal.h>
 #include "xtalk/hubdev.h"
 #include <linux/acpi.h>
+#include <linux/slab.h>
 
 
 /*
diff --git a/arch/ia64/sn/kernel/io_common.c b/arch/ia64/sn/kernel/io_common.c
index 308e6595110..4433dd019d3 100644
--- a/arch/ia64/sn/kernel/io_common.c
+++ b/arch/ia64/sn/kernel/io_common.c
@@ -7,6 +7,7 @@
  */
 
 #include <linux/bootmem.h>
+#include <linux/slab.h>
 #include <asm/sn/types.h>
 #include <asm/sn/addrs.h>
 #include <asm/sn/sn_feature_sets.h>
diff --git a/arch/ia64/sn/kernel/io_init.c b/arch/ia64/sn/kernel/io_init.c
index ee774c366a0..98079f29d9a 100644
--- a/arch/ia64/sn/kernel/io_init.c
+++ b/arch/ia64/sn/kernel/io_init.c
@@ -6,6 +6,7 @@
  * Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved.
  */
 
+#include <linux/slab.h>
 #include <asm/sn/types.h>
 #include <asm/sn/addrs.h>
 #include <asm/sn/io.h>
diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c
index 40d6eeda1c4..13c15d96809 100644
--- a/arch/ia64/sn/kernel/irq.c
+++ b/arch/ia64/sn/kernel/irq.c
@@ -12,6 +12,7 @@
 #include <linux/spinlock.h>
 #include <linux/init.h>
 #include <linux/rculist.h>
+#include <linux/slab.h>
 #include <asm/sn/addrs.h>
 #include <asm/sn/arch.h>
 #include <asm/sn/intr.h>
diff --git a/arch/ia64/sn/kernel/msi_sn.c b/arch/ia64/sn/kernel/msi_sn.c
index fbbfb970120..ebfdd6a9ae1 100644
--- a/arch/ia64/sn/kernel/msi_sn.c
+++ b/arch/ia64/sn/kernel/msi_sn.c
@@ -11,6 +11,7 @@
 #include <linux/pci.h>
 #include <linux/cpumask.h>
 #include <linux/msi.h>
+#include <linux/slab.h>
 
 #include <asm/sn/addrs.h>
 #include <asm/sn/intr.h>
diff --git a/arch/ia64/sn/kernel/setup.c b/arch/ia64/sn/kernel/setup.c
index e456f062f24..d00dfc18002 100644
--- a/arch/ia64/sn/kernel/setup.c
+++ b/arch/ia64/sn/kernel/setup.c
@@ -241,7 +241,7 @@ static void __cpuinit sn_check_for_wars(void)
  * Note:  This stuff is duped here because Altix requires the PCDP to
  * locate a usable VGA device due to lack of proper ACPI support.  Structures
  * could be used from drivers/firmware/pcdp.h, but it was decided that moving
- * this file to a more public location just for Altix use was undesireable.
+ * this file to a more public location just for Altix use was undesirable.
  */
 
 struct hcdp_uart_desc {
diff --git a/arch/ia64/sn/pci/pci_dma.c b/arch/ia64/sn/pci/pci_dma.c
index 98b684928e1..a9d310de57d 100644
--- a/arch/ia64/sn/pci/pci_dma.c
+++ b/arch/ia64/sn/pci/pci_dma.c
@@ -9,6 +9,7 @@
  * a description of how these routines should be used.
  */
 
+#include <linux/gfp.h>
 #include <linux/module.h>
 #include <linux/dma-mapping.h>
 #include <asm/dma.h>
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_provider.c b/arch/ia64/sn/pci/pcibr/pcibr_provider.c
index d13e5a22a55..3cb5cf37764 100644
--- a/arch/ia64/sn/pci/pcibr/pcibr_provider.c
+++ b/arch/ia64/sn/pci/pcibr/pcibr_provider.c
@@ -8,6 +8,7 @@
 
 #include <linux/interrupt.h>
 #include <linux/types.h>
+#include <linux/slab.h>
 #include <linux/pci.h>
 #include <asm/sn/addrs.h>
 #include <asm/sn/geo.h>
diff --git a/arch/ia64/sn/pci/tioca_provider.c b/arch/ia64/sn/pci/tioca_provider.c
index efb454534e5..4d4536e3b6f 100644
--- a/arch/ia64/sn/pci/tioca_provider.c
+++ b/arch/ia64/sn/pci/tioca_provider.c
@@ -10,6 +10,7 @@
 #include <linux/interrupt.h>
 #include <linux/pci.h>
 #include <linux/bitmap.h>
+#include <linux/slab.h>
 #include <asm/sn/sn_sal.h>
 #include <asm/sn/addrs.h>
 #include <asm/sn/io.h>
diff --git a/arch/ia64/sn/pci/tioce_provider.c b/arch/ia64/sn/pci/tioce_provider.c
index 012f3b82ee5..27faba035f3 100644
--- a/arch/ia64/sn/pci/tioce_provider.c
+++ b/arch/ia64/sn/pci/tioce_provider.c
@@ -8,6 +8,7 @@
 
 #include <linux/types.h>
 #include <linux/interrupt.h>
+#include <linux/slab.h>
 #include <linux/pci.h>
 #include <asm/sn/sn_sal.h>
 #include <asm/sn/addrs.h>
diff --git a/arch/ia64/xen/grant-table.c b/arch/ia64/xen/grant-table.c
index 777dd9a9108..48cca37625e 100644
--- a/arch/ia64/xen/grant-table.c
+++ b/arch/ia64/xen/grant-table.c
@@ -22,6 +22,7 @@
 
 #include <linux/module.h>
 #include <linux/vmalloc.h>
+#include <linux/slab.h>
 #include <linux/mm.h>
 
 #include <xen/interface/xen.h>
diff --git a/arch/m32r/include/asm/ptrace.h b/arch/m32r/include/asm/ptrace.h
index a0755b98202..840a1231ede 100644
--- a/arch/m32r/include/asm/ptrace.h
+++ b/arch/m32r/include/asm/ptrace.h
@@ -120,6 +120,8 @@ struct pt_regs {
 
 #include <asm/m32r.h>           /* M32R_PSW_BSM, M32R_PSW_BPM */
 
+#define arch_has_single_step() (1)
+
 struct task_struct;
 extern void init_debug_traps(struct task_struct *);
 #define arch_ptrace_attach(child) \
diff --git a/arch/m32r/include/asm/unistd.h b/arch/m32r/include/asm/unistd.h
index cf701c93324..76125777483 100644
--- a/arch/m32r/include/asm/unistd.h
+++ b/arch/m32r/include/asm/unistd.h
@@ -339,6 +339,7 @@
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_ALARM
 #define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_PAUSE
 #define __ARCH_WANT_SYS_TIME
 #define __ARCH_WANT_SYS_UTIME
diff --git a/arch/m32r/kernel/process.c b/arch/m32r/kernel/process.c
index 67a01e1e428..bc8c8c1511b 100644
--- a/arch/m32r/kernel/process.c
+++ b/arch/m32r/kernel/process.c
@@ -21,10 +21,10 @@
  */
 
 #include <linux/fs.h>
+#include <linux/slab.h>
 #include <linux/module.h>
 #include <linux/ptrace.h>
 #include <linux/unistd.h>
-#include <linux/slab.h>
 #include <linux/hardirq.h>
 
 #include <asm/io.h>
diff --git a/arch/m32r/kernel/ptrace.c b/arch/m32r/kernel/ptrace.c
index 98682bba0ed..e555091eb97 100644
--- a/arch/m32r/kernel/ptrace.c
+++ b/arch/m32r/kernel/ptrace.c
@@ -580,6 +580,35 @@ init_debug_traps(struct task_struct *child)
         }
 }
 
+void user_enable_single_step(struct task_struct *child)
+{
+        unsigned long next_pc;
+        unsigned long pc, insn;
+
+        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
+
+        /* Compute next pc.  */
+        pc = get_stack_long(child, PT_BPC);
+
+        if (access_process_vm(child, pc&~3, &insn, sizeof(insn), 0)
+            != sizeof(insn))
+                break;
+
+        compute_next_pc(insn, pc, &next_pc, child);
+        if (next_pc & 0x80000000)
+                break;
+
+        if (embed_debug_trap(child, next_pc))
+                break;
+
+        invalidate_cache();
+}
+
+void user_disable_single_step(struct task_struct *child)
+{
+        unregister_all_debug_traps(child);
+        invalidate_cache();
+}
 
 /*
  * Called by kernel/ptrace.c when detaching..
@@ -630,74 +659,6 @@ arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 ret = ptrace_write_user(child, addr, data);
                 break;
 
-        /*
-         * continue/restart and stop at next (return from) syscall
-         */
-        case PTRACE_SYSCALL:
-        case PTRACE_CONT:
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                if (request == PTRACE_SYSCALL)
-                        set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                else
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                child->exit_code = data;
-                wake_up_process(child);
-                ret = 0;
-                break;
-
-        /*
-         * make the child exit.  Best I can do is send it a sigkill.
-         * perhaps it should be put in the status that it wants to
-         * exit.
-         */
-        case PTRACE_KILL: {
-                ret = 0;
-                unregister_all_debug_traps(child);
-                invalidate_cache();
-                if (child->exit_state == EXIT_ZOMBIE)   /* already dead */
-                        break;
-                child->exit_code = SIGKILL;
-                wake_up_process(child);
-                break;
-        }
-
-        /*
-         * execute single instruction.
-         */
-        case PTRACE_SINGLESTEP: {
-                unsigned long next_pc;
-                unsigned long pc, insn;
-
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-
-                /* Compute next pc.  */
-                pc = get_stack_long(child, PT_BPC);
-
-                if (access_process_vm(child, pc&~3, &insn, sizeof(insn), 0)
-                    != sizeof(insn))
-                        break;
-
-                compute_next_pc(insn, pc, &next_pc, child);
-                if (next_pc & 0x80000000)
-                        break;
-
-                if (embed_debug_trap(child, next_pc))
-                        break;
-
-                invalidate_cache();
-                child->exit_code = data;
-
-                /* give it a chance to run. */
-                wake_up_process(child);
-                ret = 0;
-                break;
-        }
-
         case PTRACE_GETREGS:
                 ret = ptrace_getregs(child, (void __user *)data);
                 break;
diff --git a/arch/m32r/kernel/sys_m32r.c b/arch/m32r/kernel/sys_m32r.c
index d3c865c5a6b..0a00f467edf 100644
--- a/arch/m32r/kernel/sys_m32r.c
+++ b/arch/m32r/kernel/sys_m32r.c
@@ -76,98 +76,6 @@ asmlinkage int sys_tas(int __user *addr)
         return oldval;
 }
 
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-asmlinkage int sys_ipc(uint call, int first, int second,
-                       int third, void __user *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        switch (call) {
-        case SEMOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr,
-                                      second, NULL);
-        case SEMTIMEDOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr,
-                                      second, (const struct timespec __user *)fifth);
-        case SEMGET:
-                return sys_semget (first, second, third);
-        case SEMCTL: {
-                union semun fourth;
-                if (!ptr)
-                        return -EINVAL;
-                if (get_user(fourth.__pad, (void __user * __user *) ptr))
-                        return -EFAULT;
-                return sys_semctl (first, second, third, fourth);
-                }
-
-        case MSGSND:
-                return sys_msgsnd (first, (struct msgbuf __user *) ptr,
-                                   second, third);
-        case MSGRCV:
-                switch (version) {
-                case 0: {
-                        struct ipc_kludge tmp;
-                        if (!ptr)
-                                return -EINVAL;
-
-                        if (copy_from_user(&tmp,
-                                           (struct ipc_kludge __user *) ptr,
-                                           sizeof (tmp)))
-                                return -EFAULT;
-                        return sys_msgrcv (first, tmp.msgp, second,
-                                           tmp.msgtyp, third);
-                        }
-                default:
-                        return sys_msgrcv (first,
-                                           (struct msgbuf __user *) ptr,
-                                           second, fifth, third);
-                }
-        case MSGGET:
-                return sys_msgget ((key_t) first, second);
-        case MSGCTL:
-                return sys_msgctl (first, second,
-                                   (struct msqid_ds __user *) ptr);
-        case SHMAT: {
-                ulong raddr;
-
-                if (!access_ok(VERIFY_WRITE, (ulong __user *) third,
-                                      sizeof(ulong)))
-                        return -EFAULT;
-                ret = do_shmat (first, (char __user *) ptr, second, &raddr);
-                if (ret)
-                        return ret;
-                return put_user (raddr, (ulong __user *) third);
-                }
-        case SHMDT:
-                return sys_shmdt ((char __user *)ptr);
-        case SHMGET:
-                return sys_shmget (first, second, third);
-        case SHMCTL:
-                return sys_shmctl (first, second,
-                                   (struct shmid_ds __user *) ptr);
-        default:
-                return -ENOSYS;
-        }
-}
-
-asmlinkage int sys_uname(struct old_utsname __user * name)
-{
-        int err;
-        if (!name)
-                return -EFAULT;
-        down_read(&uts_sem);
-        err = copy_to_user(name, utsname(), sizeof (*name));
-        up_read(&uts_sem);
-        return err?-EFAULT:0;
-}
-
 asmlinkage int sys_cacheflush(void *addr, int bytes, int cache)
 {
         /* This should flush more selectively ...  */
diff --git a/arch/m32r/mm/init.c b/arch/m32r/mm/init.c
index 9f581df3952..73e2205ebf5 100644
--- a/arch/m32r/mm/init.c
+++ b/arch/m32r/mm/init.c
@@ -19,6 +19,7 @@
 #include <linux/bitops.h>
 #include <linux/nodemask.h>
 #include <linux/pfn.h>
+#include <linux/gfp.h>
 #include <asm/types.h>
 #include <asm/processor.h>
 #include <asm/page.h>
diff --git a/arch/m68k/atari/atakeyb.c b/arch/m68k/atari/atakeyb.c
index 4add96d13b1..5890897d28b 100644
--- a/arch/m68k/atari/atakeyb.c
+++ b/arch/m68k/atari/atakeyb.c
@@ -121,7 +121,7 @@ KEYBOARD_STATE kb_state;
  * bytes have been lost and in which state of the packet structure we are now.
  * This usually causes keyboards bytes to be interpreted as mouse movements
  * and vice versa, which is very annoying. It seems better to throw away some
- * bytes (that are usually mouse bytes) than to misinterpret them. Therefor I
+ * bytes (that are usually mouse bytes) than to misinterpret them. Therefore I
  * introduced the RESYNC state for IKBD data. In this state, the bytes up to
  * one that really looks like a key event (0x04..0xf2) or the start of a mouse
  * packet (0xf8..0xfb) are thrown away, but at most 2 bytes. This at least
diff --git a/arch/m68k/bvme6000/rtc.c b/arch/m68k/bvme6000/rtc.c
index c50bec8aabb..b46ea1714a8 100644
--- a/arch/m68k/bvme6000/rtc.c
+++ b/arch/m68k/bvme6000/rtc.c
@@ -9,7 +9,6 @@
 #include <linux/types.h>
 #include <linux/errno.h>
 #include <linux/miscdevice.h>
-#include <linux/slab.h>
 #include <linux/smp_lock.h>
 #include <linux/ioport.h>
 #include <linux/capability.h>
diff --git a/arch/m68k/include/asm/atomic_mm.h b/arch/m68k/include/asm/atomic_mm.h
index 88b7af20a99..d9d2ed64743 100644
--- a/arch/m68k/include/asm/atomic_mm.h
+++ b/arch/m68k/include/asm/atomic_mm.h
@@ -148,14 +148,18 @@ static inline int atomic_xchg(atomic_t *v, int new)
 static inline int atomic_sub_and_test(int i, atomic_t *v)
 {
         char c;
-        __asm__ __volatile__("subl %2,%1; seq %0" : "=d" (c), "+m" (*v): "g" (i));
+        __asm__ __volatile__("subl %2,%1; seq %0"
+                             : "=d" (c), "+m" (*v)
+                             : "id" (i));
         return c != 0;
 }
 
 static inline int atomic_add_negative(int i, atomic_t *v)
 {
         char c;
-        __asm__ __volatile__("addl %2,%1; smi %0" : "=d" (c), "+m" (*v): "g" (i));
+        __asm__ __volatile__("addl %2,%1; smi %0"
+                             : "=d" (c), "+m" (*v)
+                             : "id" (i));
         return c != 0;
 }
 
diff --git a/arch/m68k/include/asm/fbio.h b/arch/m68k/include/asm/fbio.h
index b9215a0907d..0a21da87f7d 100644
--- a/arch/m68k/include/asm/fbio.h
+++ b/arch/m68k/include/asm/fbio.h
@@ -173,7 +173,7 @@ struct mdi_cfginfo {
         int     mdi_ncluts;     /* Number of implemented CLUTs in this MDI */
         int     mdi_type;       /* FBTYPE name */
         int     mdi_height;     /* height */
-        int     mdi_width;      /* widht */
+        int     mdi_width;      /* width */
         int     mdi_size;       /* available ram */
         int     mdi_mode;       /* 8bpp, 16bpp or 32bpp */
         int     mdi_pixfreq;    /* pixel clock (from PROM) */
diff --git a/arch/m68k/include/asm/io_no.h b/arch/m68k/include/asm/io_no.h
index 359065d5a9f..6e2413e518c 100644
--- a/arch/m68k/include/asm/io_no.h
+++ b/arch/m68k/include/asm/io_no.h
@@ -16,7 +16,7 @@
  * memory location directly.
  */
 /* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
- * two accesses to memory, which may be undesireable for some devices.
+ * two accesses to memory, which may be undesirable for some devices.
  */
 
 /*
diff --git a/arch/m68k/include/asm/mcfuart.h b/arch/m68k/include/asm/mcfuart.h
index ef229387361..01a8716c5fc 100644
--- a/arch/m68k/include/asm/mcfuart.h
+++ b/arch/m68k/include/asm/mcfuart.h
@@ -212,5 +212,10 @@ struct mcf_platform_uart {
 #define MCFUART_URF_RXS         0xc0            /* Receiver status */
 #endif
 
+#if defined(CONFIG_M5272)
+#define MCFUART_TXFIFOSIZE      25
+#else
+#define MCFUART_TXFIFOSIZE      1
+#endif
 /****************************************************************************/
 #endif  /* mcfuart_h */
diff --git a/arch/m68k/include/asm/ptrace.h b/arch/m68k/include/asm/ptrace.h
index 21605c736f6..6e6e3ac1d91 100644
--- a/arch/m68k/include/asm/ptrace.h
+++ b/arch/m68k/include/asm/ptrace.h
@@ -87,18 +87,10 @@ struct switch_stack {
 #define profile_pc(regs) instruction_pointer(regs)
 extern void show_regs(struct pt_regs *);
 
-/*
- * These are defined as per linux/ptrace.h.
- */
-struct task_struct;
-
 #define arch_has_single_step()  (1)
-extern void user_enable_single_step(struct task_struct *);
-extern void user_disable_single_step(struct task_struct *);
 
 #ifdef CONFIG_MMU
 #define arch_has_block_step()   (1)
-extern void user_enable_block_step(struct task_struct *);
 #endif
 
 #endif /* __KERNEL__ */
diff --git a/arch/m68k/include/asm/sigcontext.h b/arch/m68k/include/asm/sigcontext.h
index 1320eaa4cc2..a29dd74a17c 100644
--- a/arch/m68k/include/asm/sigcontext.h
+++ b/arch/m68k/include/asm/sigcontext.h
@@ -17,13 +17,11 @@ struct sigcontext {
 #ifndef __uClinux__
 # ifdef __mcoldfire__
         unsigned long  sc_fpregs[2][2]; /* room for two fp registers */
-        unsigned long  sc_fpcntl[3];
-        unsigned char  sc_fpstate[16+6*8];
 # else
         unsigned long  sc_fpregs[2*3];  /* room for two fp registers */
+# endif
         unsigned long  sc_fpcntl[3];
         unsigned char  sc_fpstate[216];
-# endif
 #endif
 };
 
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h
index d72a71dabec..60b15d0aa07 100644
--- a/arch/m68k/include/asm/unistd.h
+++ b/arch/m68k/include/asm/unistd.h
@@ -351,6 +351,7 @@
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_ALARM
 #define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_PAUSE
 #define __ARCH_WANT_SYS_SGETMASK
 #define __ARCH_WANT_SYS_SIGNAL
@@ -363,6 +364,8 @@
 #define __ARCH_WANT_SYS_LLSEEK
 #define __ARCH_WANT_SYS_NICE
 #define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_MMAP
+#define __ARCH_WANT_SYS_OLD_SELECT
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/m68k/kernel/dma.c b/arch/m68k/kernel/dma.c
index 2bb4245404d..4bbb3c2a888 100644
--- a/arch/m68k/kernel/dma.c
+++ b/arch/m68k/kernel/dma.c
@@ -10,6 +10,7 @@
 #include <linux/device.h>
 #include <linux/kernel.h>
 #include <linux/scatterlist.h>
+#include <linux/slab.h>
 #include <linux/vmalloc.h>
 
 #include <asm/pgalloc.h>
diff --git a/arch/m68k/kernel/entry.S b/arch/m68k/kernel/entry.S
index e136b8cbe9b..2391bdff099 100644
--- a/arch/m68k/kernel/entry.S
+++ b/arch/m68k/kernel/entry.S
@@ -510,7 +510,7 @@ sys_call_table:
         .long sys_settimeofday
         .long sys_getgroups16   /* 80 */
         .long sys_setgroups16
-        .long old_select
+        .long sys_old_select
         .long sys_symlink
         .long sys_lstat
         .long sys_readlink      /* 85 */
@@ -518,7 +518,7 @@ sys_call_table:
         .long sys_swapon
         .long sys_reboot
         .long sys_old_readdir
-        .long old_mmap          /* 90 */
+        .long sys_old_mmap      /* 90 */
         .long sys_munmap
         .long sys_truncate
         .long sys_ftruncate
diff --git a/arch/m68k/kernel/process.c b/arch/m68k/kernel/process.c
index 17c3f325255..1a6be27cf16 100644
--- a/arch/m68k/kernel/process.c
+++ b/arch/m68k/kernel/process.c
@@ -15,13 +15,13 @@
 #include <linux/sched.h>
 #include <linux/kernel.h>
 #include <linux/mm.h>
+#include <linux/slab.h>
 #include <linux/fs.h>
 #include <linux/smp.h>
 #include <linux/smp_lock.h>
 #include <linux/stddef.h>
 #include <linux/unistd.h>
 #include <linux/ptrace.h>
-#include <linux/slab.h>
 #include <linux/user.h>
 #include <linux/reboot.h>
 #include <linux/init_task.h>
diff --git a/arch/m68k/kernel/sys_m68k.c b/arch/m68k/kernel/sys_m68k.c
index e3ad2d67197..77896692eb0 100644
--- a/arch/m68k/kernel/sys_m68k.c
+++ b/arch/m68k/kernel/sys_m68k.c
@@ -46,137 +46,6 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
         return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
 }
 
-/*
- * Perform the select(nd, in, out, ex, tv) and mmap() system
- * calls. Linux/m68k cloned Linux/i386, which didn't use to be able to
- * handle more than 4 system call parameters, so these system calls
- * used a memory block for parameter passing..
- */
-
-struct mmap_arg_struct {
-        unsigned long addr;
-        unsigned long len;
-        unsigned long prot;
-        unsigned long flags;
-        unsigned long fd;
-        unsigned long offset;
-};
-
-asmlinkage int old_mmap(struct mmap_arg_struct __user *arg)
-{
-        struct mmap_arg_struct a;
-        int error = -EFAULT;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                goto out;
-
-        error = -EINVAL;
-        if (a.offset & ~PAGE_MASK)
-                goto out;
-
-        error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
-                               a.offset >> PAGE_SHIFT);
-out:
-        return error;
-}
-
-struct sel_arg_struct {
-        unsigned long n;
-        fd_set __user *inp, *outp, *exp;
-        struct timeval __user *tvp;
-};
-
-asmlinkage int old_select(struct sel_arg_struct __user *arg)
-{
-        struct sel_arg_struct a;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                return -EFAULT;
-        /* sys_select() does the appropriate kernel locking */
-        return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
-}
-
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-asmlinkage int sys_ipc (uint call, int first, int second,
-                        int third, void __user *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        if (call <= SEMCTL)
-                switch (call) {
-                case SEMOP:
-                        return sys_semop (first, ptr, second);
-                case SEMGET:
-                        return sys_semget (first, second, third);
-                case SEMCTL: {
-                        union semun fourth;
-                        if (!ptr)
-                                return -EINVAL;
-                        if (get_user(fourth.__pad, (void __user *__user *) ptr))
-                                return -EFAULT;
-                        return sys_semctl (first, second, third, fourth);
-                        }
-                default:
-                        return -ENOSYS;
-                }
-        if (call <= MSGCTL)
-                switch (call) {
-                case MSGSND:
-                        return sys_msgsnd (first, ptr, second, third);
-                case MSGRCV:
-                        switch (version) {
-                        case 0: {
-                                struct ipc_kludge tmp;
-                                if (!ptr)
-                                        return -EINVAL;
-                                if (copy_from_user (&tmp, ptr, sizeof (tmp)))
-                                        return -EFAULT;
-                                return sys_msgrcv (first, tmp.msgp, second,
-                                                   tmp.msgtyp, third);
-                                }
-                        default:
-                                return sys_msgrcv (first, ptr,
-                                                   second, fifth, third);
-                        }
-                case MSGGET:
-                        return sys_msgget ((key_t) first, second);
-                case MSGCTL:
-                        return sys_msgctl (first, second, ptr);
-                default:
-                        return -ENOSYS;
-                }
-        if (call <= SHMCTL)
-                switch (call) {
-                case SHMAT:
-                        switch (version) {
-                        default: {
-                                ulong raddr;
-                                ret = do_shmat (first, ptr, second, &raddr);
-                                if (ret)
-                                        return ret;
-                                return put_user (raddr, (ulong __user *) third);
-                        }
-                        }
-                case SHMDT:
-                        return sys_shmdt (ptr);
-                case SHMGET:
-                        return sys_shmget (first, second, third);
-                case SHMCTL:
-                        return sys_shmctl (first, second, ptr);
-                default:
-                        return -ENOSYS;
-                }
-
-        return -EINVAL;
-}
-
 /* Convert virtual (user) address VADDR to physical address PADDR */
 #define virt_to_phys_040(vaddr)                                         \
 ({                                                                      \
diff --git a/arch/m68k/mac/misc.c b/arch/m68k/mac/misc.c
index 5d818568b34..0f118ca156d 100644
--- a/arch/m68k/mac/misc.c
+++ b/arch/m68k/mac/misc.c
@@ -8,7 +8,6 @@
 #include <linux/kernel.h>
 #include <linux/delay.h>
 #include <linux/sched.h>
-#include <linux/slab.h>
 #include <linux/time.h>
 #include <linux/rtc.h>
 #include <linux/mm.h>
diff --git a/arch/m68k/mm/init.c b/arch/m68k/mm/init.c
index 774549accd2..8bc842554e5 100644
--- a/arch/m68k/mm/init.c
+++ b/arch/m68k/mm/init.c
@@ -17,6 +17,7 @@
 #include <linux/types.h>
 #include <linux/init.h>
 #include <linux/bootmem.h>
+#include <linux/gfp.h>
 
 #include <asm/setup.h>
 #include <asm/uaccess.h>
diff --git a/arch/m68k/mm/memory.c b/arch/m68k/mm/memory.c
index b7473525b43..34c77ce24fb 100644
--- a/arch/m68k/mm/memory.c
+++ b/arch/m68k/mm/memory.c
@@ -9,9 +9,9 @@
 #include <linux/kernel.h>
 #include <linux/string.h>
 #include <linux/types.h>
-#include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/pagemap.h>
+#include <linux/gfp.h>
 
 #include <asm/setup.h>
 #include <asm/segment.h>
diff --git a/arch/m68k/mm/motorola.c b/arch/m68k/mm/motorola.c
index 4665fc84b7d..02b7a03e422 100644
--- a/arch/m68k/mm/motorola.c
+++ b/arch/m68k/mm/motorola.c
@@ -18,6 +18,7 @@
 #include <linux/types.h>
 #include <linux/init.h>
 #include <linux/bootmem.h>
+#include <linux/gfp.h>
 
 #include <asm/setup.h>
 #include <asm/uaccess.h>
diff --git a/arch/m68k/mvme16x/rtc.c b/arch/m68k/mvme16x/rtc.c
index cea5e3e4e63..8da9c250d3e 100644
--- a/arch/m68k/mvme16x/rtc.c
+++ b/arch/m68k/mvme16x/rtc.c
@@ -9,7 +9,6 @@
 #include <linux/types.h>
 #include <linux/errno.h>
 #include <linux/miscdevice.h>
-#include <linux/slab.h>
 #include <linux/smp_lock.h>
 #include <linux/ioport.h>
 #include <linux/capability.h>
diff --git a/arch/m68k/sun3/sun3dvma.c b/arch/m68k/sun3/sun3dvma.c
index f9277e8b415..ca0966cac72 100644
--- a/arch/m68k/sun3/sun3dvma.c
+++ b/arch/m68k/sun3/sun3dvma.c
@@ -8,6 +8,7 @@
 
 #include <linux/module.h>
 #include <linux/kernel.h>
+#include <linux/gfp.h>
 #include <linux/mm.h>
 #include <linux/list.h>
 
diff --git a/arch/m68k/sun3x/dvma.c b/arch/m68k/sun3x/dvma.c
index 117481e8630..d5ddcdaa234 100644
--- a/arch/m68k/sun3x/dvma.c
+++ b/arch/m68k/sun3x/dvma.c
@@ -15,7 +15,6 @@
 #include <linux/bitops.h>
 #include <linux/mm.h>
 #include <linux/bootmem.h>
-#include <linux/slab.h>
 #include <linux/vmalloc.h>
 
 #include <asm/sun3x.h>
diff --git a/arch/m68knommu/Makefile b/arch/m68knommu/Makefile
index ce404bc9ccb..14042574ac2 100644
--- a/arch/m68knommu/Makefile
+++ b/arch/m68knommu/Makefile
@@ -94,7 +94,7 @@ cflags-$(CONFIG_M520x)		:= $(call cc-option,-mcpu=5208,-m5200)
 cflags-$(CONFIG_M523x)          := $(call cc-option,-mcpu=523x,-m5307)
 cflags-$(CONFIG_M5249)          := $(call cc-option,-mcpu=5249,-m5200)
 cflags-$(CONFIG_M5271)          := $(call cc-option,-mcpu=5271,-m5307)
-cflags-$(CONFIG_M5272)          := $(call cc-option,-mcpu=5271,-m5200)
+cflags-$(CONFIG_M5272)          := $(call cc-option,-mcpu=5272,-m5307)
 cflags-$(CONFIG_M5275)          := $(call cc-option,-mcpu=5275,-m5307)
 cflags-$(CONFIG_M528x)          := $(call cc-option,-m528x,-m5307)
 cflags-$(CONFIG_M5307)          := $(call cc-option,-m5307,-m5200)
diff --git a/arch/m68knommu/kernel/dma.c b/arch/m68knommu/kernel/dma.c
index aaf38bbbb6c..fc61541aeb7 100644
--- a/arch/m68knommu/kernel/dma.c
+++ b/arch/m68knommu/kernel/dma.c
@@ -6,6 +6,7 @@
  */
 
 #include <linux/types.h>
+#include <linux/gfp.h>
 #include <linux/mm.h>
 #include <linux/device.h>
 #include <linux/dma-mapping.h>
diff --git a/arch/m68knommu/kernel/entry.S b/arch/m68knommu/kernel/entry.S
index 56043ade394..aff6f57ef8b 100644
--- a/arch/m68knommu/kernel/entry.S
+++ b/arch/m68knommu/kernel/entry.S
@@ -145,6 +145,6 @@ ENTRY(ret_from_user_signal)
         trap #0
 
 ENTRY(ret_from_user_rt_signal)
-        move #__NR_rt_sigreturn,%d0
+        movel #__NR_rt_sigreturn,%d0
         trap #0
 
diff --git a/arch/m68knommu/kernel/process.c b/arch/m68knommu/kernel/process.c
index 959cb249c75..6aa66134b43 100644
--- a/arch/m68knommu/kernel/process.c
+++ b/arch/m68knommu/kernel/process.c
@@ -23,11 +23,11 @@
 #include <linux/stddef.h>
 #include <linux/unistd.h>
 #include <linux/ptrace.h>
-#include <linux/slab.h>
 #include <linux/user.h>
 #include <linux/interrupt.h>
 #include <linux/reboot.h>
 #include <linux/fs.h>
+#include <linux/slab.h>
 
 #include <asm/uaccess.h>
 #include <asm/system.h>
diff --git a/arch/m68knommu/kernel/ptrace.c b/arch/m68knommu/kernel/ptrace.c
index 85ed2f988f9..f6be1248d21 100644
--- a/arch/m68knommu/kernel/ptrace.c
+++ b/arch/m68knommu/kernel/ptrace.c
@@ -116,12 +116,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
         int ret;
 
         switch (request) {
-                /* when I and D space are separate, these will need to be fixed. */
-                case PTRACE_PEEKTEXT: /* read word at location addr. */ 
-                case PTRACE_PEEKDATA:
-                        ret = generic_ptrace_peekdata(child, addr, data);
-                        break;
-
                 /* read the word at location addr in the USER area. */
                 case PTRACE_PEEKUSR: {
                         unsigned long tmp;
@@ -160,12 +154,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                         break;
                 }
 
-                /* when I and D space are separate, this will have to be fixed. */
-                case PTRACE_POKETEXT: /* write the word at location addr. */
-                case PTRACE_POKEDATA:
-                        ret = generic_ptrace_pokedata(child, addr, data);
-                        break;
-
                 case PTRACE_POKEUSR: /* write the word at location addr in the USER area */
                         ret = -EIO;
                         if ((addr & 3) || addr < 0 ||
@@ -202,66 +190,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                         }
                         break;
 
-                case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
-                case PTRACE_CONT: { /* restart after signal. */
-                        long tmp;
-
-                        ret = -EIO;
-                        if (!valid_signal(data))
-                                break;
-                        if (request == PTRACE_SYSCALL)
-                                set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        else
-                                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        child->exit_code = data;
-                        /* make sure the single step bit is not set. */
-                        tmp = get_reg(child, PT_SR) & ~(TRACE_BITS << 16);
-                        put_reg(child, PT_SR, tmp);
-                        wake_up_process(child);
-                        ret = 0;
-                        break;
-                }
-
-                /*
-                 * make the child exit.  Best I can do is send it a sigkill. 
-                 * perhaps it should be put in the status that it wants to 
-                 * exit.
-                 */
-                case PTRACE_KILL: {
-                        long tmp;
-
-                        ret = 0;
-                        if (child->exit_state == EXIT_ZOMBIE) /* already dead */
-                                break;
-                        child->exit_code = SIGKILL;
-                        /* make sure the single step bit is not set. */
-                        tmp = get_reg(child, PT_SR) & ~(TRACE_BITS << 16);
-                        put_reg(child, PT_SR, tmp);
-                        wake_up_process(child);
-                        break;
-                }
-
-                case PTRACE_SINGLESTEP: {  /* set the trap flag. */
-                        long tmp;
-
-                        ret = -EIO;
-                        if (!valid_signal(data))
-                                break;
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                        tmp = get_reg(child, PT_SR) | (TRACE_BITS << 16);
-                        put_reg(child, PT_SR, tmp);
-
-                        child->exit_code = data;
-                        /* give it a chance to run. */
-                        wake_up_process(child);
-                        ret = 0;
-                        break;
-                }
-
-                case PTRACE_DETACH:     /* detach a process that was attached. */
-                        ret = ptrace_detach(child, data);
-                        break;
-
                 case PTRACE_GETREGS: { /* Get all gp regs from the child. */
                         int i;
                         unsigned long tmp;
@@ -325,7 +253,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 break;
 
                 default:
-                        ret = -EIO;
+                        ret = ptrace_request(child, request, addr, data);
                         break;
         }
         return ret;
diff --git a/arch/m68knommu/kernel/sys_m68k.c b/arch/m68knommu/kernel/sys_m68k.c
index 923dd4aab87..d65e9c4c930 100644
--- a/arch/m68knommu/kernel/sys_m68k.c
+++ b/arch/m68knommu/kernel/sys_m68k.c
@@ -27,142 +27,6 @@
 #include <asm/cacheflush.h>
 #include <asm/unistd.h>
 
-/*
- * Perform the select(nd, in, out, ex, tv) and mmap() system
- * calls. Linux/m68k cloned Linux/i386, which didn't use to be able to
- * handle more than 4 system call parameters, so these system calls
- * used a memory block for parameter passing..
- */
-
-struct mmap_arg_struct {
-        unsigned long addr;
-        unsigned long len;
-        unsigned long prot;
-        unsigned long flags;
-        unsigned long fd;
-        unsigned long offset;
-};
-
-asmlinkage int old_mmap(struct mmap_arg_struct *arg)
-{
-        struct mmap_arg_struct a;
-        int error = -EFAULT;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                goto out;
-
-        error = -EINVAL;
-        if (a.offset & ~PAGE_MASK)
-                goto out;
-
-        error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
-                                a.offset >> PAGE_SHIFT);
-out:
-        return error;
-}
-
-struct sel_arg_struct {
-        unsigned long n;
-        fd_set *inp, *outp, *exp;
-        struct timeval *tvp;
-};
-
-asmlinkage int old_select(struct sel_arg_struct *arg)
-{
-        struct sel_arg_struct a;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                return -EFAULT;
-        /* sys_select() does the appropriate kernel locking */
-        return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
-}
-
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-asmlinkage int sys_ipc (uint call, int first, int second,
-                        int third, void *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        if (call <= SEMCTL)
-                switch (call) {
-                case SEMOP:
-                        return sys_semop (first, (struct sembuf *)ptr, second);
-                case SEMGET:
-                        return sys_semget (first, second, third);
-                case SEMCTL: {
-                        union semun fourth;
-                        if (!ptr)
-                                return -EINVAL;
-                        if (get_user(fourth.__pad, (void **) ptr))
-                                return -EFAULT;
-                        return sys_semctl (first, second, third, fourth);
-                        }
-                default:
-                        return -EINVAL;
-                }
-        if (call <= MSGCTL) 
-                switch (call) {
-                case MSGSND:
-                        return sys_msgsnd (first, (struct msgbuf *) ptr, 
-                                          second, third);
-                case MSGRCV:
-                        switch (version) {
-                        case 0: {
-                                struct ipc_kludge tmp;
-                                if (!ptr)
-                                        return -EINVAL;
-                                if (copy_from_user (&tmp,
-                                                    (struct ipc_kludge *)ptr,
-                                                    sizeof (tmp)))
-                                        return -EFAULT;
-                                return sys_msgrcv (first, tmp.msgp, second,
-                                                   tmp.msgtyp, third);
-                                }
-                        default:
-                                return sys_msgrcv (first,
-                                                   (struct msgbuf *) ptr,
-                                                   second, fifth, third);
-                        }
-                case MSGGET:
-                        return sys_msgget ((key_t) first, second);
-                case MSGCTL:
-                        return sys_msgctl (first, second,
-                                           (struct msqid_ds *) ptr);
-                default:
-                        return -EINVAL;
-                }
-        if (call <= SHMCTL)
-                switch (call) {
-                case SHMAT:
-                        switch (version) {
-                        default: {
-                                ulong raddr;
-                                ret = do_shmat (first, ptr, second, &raddr);
-                                if (ret)
-                                        return ret;
-                                return put_user (raddr, (ulong __user *) third);
-                        }
-                        }
-                case SHMDT:
-                        return sys_shmdt (ptr);
-                case SHMGET:
-                        return sys_shmget (first, second, third);
-                case SHMCTL:
-                        return sys_shmctl (first, second, ptr);
-                default:
-                        return -ENOSYS;
-                }
-
-        return -EINVAL;
-}
-
 /* sys_cacheflush -- flush (part of) the processor cache.  */
 asmlinkage int
 sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len)
diff --git a/arch/m68knommu/kernel/syscalltable.S b/arch/m68knommu/kernel/syscalltable.S
index 56dd01ded14..b30b3eb197a 100644
--- a/arch/m68knommu/kernel/syscalltable.S
+++ b/arch/m68knommu/kernel/syscalltable.S
@@ -100,7 +100,7 @@ ENTRY(sys_call_table)
         .long sys_settimeofday
         .long sys_getgroups16   /* 80 */
         .long sys_setgroups16
-        .long old_select
+        .long sys_old_select
         .long sys_symlink
         .long sys_lstat
         .long sys_readlink      /* 85 */
@@ -108,7 +108,7 @@ ENTRY(sys_call_table)
         .long sys_ni_syscall    /* sys_swapon */
         .long sys_reboot
         .long sys_old_readdir
-        .long old_mmap          /* 90 */
+        .long sys_old_mmap      /* 90 */
         .long sys_munmap
         .long sys_truncate
         .long sys_ftruncate
diff --git a/arch/m68knommu/mm/init.c b/arch/m68knommu/mm/init.c
index f3236d0b522..8a6653f56bd 100644
--- a/arch/m68knommu/mm/init.c
+++ b/arch/m68knommu/mm/init.c
@@ -29,7 +29,7 @@
 #include <linux/highmem.h>
 #include <linux/pagemap.h>
 #include <linux/bootmem.h>
-#include <linux/slab.h>
+#include <linux/gfp.h>
 
 #include <asm/setup.h>
 #include <asm/segment.h>
diff --git a/arch/m68knommu/mm/kmap.c b/arch/m68knommu/mm/kmap.c
index bc32f38843f..902c1dfda9e 100644
--- a/arch/m68knommu/mm/kmap.c
+++ b/arch/m68knommu/mm/kmap.c
@@ -9,7 +9,6 @@
 #include <linux/kernel.h>
 #include <linux/string.h>
 #include <linux/types.h>
-#include <linux/slab.h>
 #include <linux/vmalloc.h>
 
 #include <asm/setup.h>
diff --git a/arch/m68knommu/mm/memory.c b/arch/m68knommu/mm/memory.c
index d5b9e135780..8f7949e786d 100644
--- a/arch/m68knommu/mm/memory.c
+++ b/arch/m68knommu/mm/memory.c
@@ -15,7 +15,6 @@
 #include <linux/kernel.h>
 #include <linux/string.h>
 #include <linux/types.h>
-#include <linux/slab.h>
 
 #include <asm/segment.h>
 #include <asm/page.h>
diff --git a/arch/m68knommu/platform/68360/ints.c b/arch/m68knommu/platform/68360/ints.c
index 1143f77caca..6f22970d8c2 100644
--- a/arch/m68knommu/platform/68360/ints.c
+++ b/arch/m68knommu/platform/68360/ints.c
@@ -107,7 +107,6 @@ void init_IRQ(void)
         _ramvec[vba+CPMVEC_PIO_PC7]     = inthandler;  /* pio - pc7 */
         _ramvec[vba+CPMVEC_PIO_PC6]     = inthandler;  /* pio - pc6 */
         _ramvec[vba+CPMVEC_TIMER3]      = inthandler;  /* timer 3 */
-        _ramvec[vba+CPMVEC_RISCTIMER]   = inthandler;  /* reserved */
         _ramvec[vba+CPMVEC_PIO_PC5]     = inthandler;  /* pio - pc5 */
         _ramvec[vba+CPMVEC_PIO_PC4]     = inthandler;  /* pio - pc4 */
         _ramvec[vba+CPMVEC_RESERVED2]   = inthandler;  /* reserved */
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index b008168ae94..76818f92653 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -14,6 +14,8 @@ config MICROBLAZE
         select USB_ARCH_HAS_EHCI
         select ARCH_WANT_OPTIONAL_GPIOLIB
         select HAVE_OPROFILE
+        select HAVE_DMA_ATTRS
+        select HAVE_DMA_API_DEBUG
         select TRACING_SUPPORT
 
 config SWAP
@@ -73,12 +75,6 @@ config LOCKDEP_SUPPORT
 config HAVE_LATENCYTOP_SUPPORT
         def_bool y
 
-config PCI
-        def_bool n
-
-config NO_DMA
-        def_bool y
-
 config DTC
         def_bool y
 
@@ -146,7 +142,6 @@ menu "Advanced setup"
 
 config ADVANCED_OPTIONS
         bool "Prompt for advanced kernel configuration options"
-        depends on MMU
         help
           This option will enable prompting for a variety of advanced kernel
           configuration options.  These options can cause the kernel to not
@@ -158,6 +153,15 @@ config ADVANCED_OPTIONS
 comment "Default settings for advanced configuration options are used"
         depends on !ADVANCED_OPTIONS
 
+config XILINX_UNCACHED_SHADOW
+        bool "Are you using uncached shadow for RAM ?"
+        depends on ADVANCED_OPTIONS && !MMU
+        default n
+        help
+          This is needed to be able to allocate uncachable memory regions.
+          The feature requires the design to define the RAM memory controller
+          window to be twice as large as the actual physical memory.
+
 config HIGHMEM_START_BOOL
         bool "Set high memory pool address"
         depends on ADVANCED_OPTIONS && HIGHMEM
@@ -175,7 +179,7 @@ config HIGHMEM_START
 
 config LOWMEM_SIZE_BOOL
         bool "Set maximum low memory"
-        depends on ADVANCED_OPTIONS
+        depends on ADVANCED_OPTIONS && MMU
         help
           This option allows you to set the maximum amount of memory which
           will be used as "low memory", that is, memory which the kernel can
@@ -187,7 +191,6 @@ config LOWMEM_SIZE_BOOL
 
 config LOWMEM_SIZE
         hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL
-        depends on MMU
         default "0x30000000"
 
 config KERNEL_START_BOOL
@@ -208,7 +211,7 @@ config KERNEL_START
 
 config TASK_SIZE_BOOL
         bool "Set custom user task size"
-        depends on ADVANCED_OPTIONS
+        depends on ADVANCED_OPTIONS && MMU
         help
           This option allows you to set the amount of virtual address space
           allocated to user tasks.  This can be useful in optimizing the
@@ -218,42 +221,34 @@ config TASK_SIZE_BOOL
 
 config TASK_SIZE
         hex "Size of user task space" if TASK_SIZE_BOOL
-        depends on MMU
         default "0x80000000"
 
-config CONSISTENT_START_BOOL
-        bool "Set custom consistent memory pool address"
-        depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
-        help
-          This option allows you to set the base virtual address
-          of the the consistent memory pool.  This pool of virtual
-          memory is used to make consistent memory allocations.
+endmenu
 
-config CONSISTENT_START
-        hex "Base virtual address of consistent memory pool" if CONSISTENT_START_BOOL
-        depends on MMU
-        default "0xff100000" if NOT_COHERENT_CACHE
+source "mm/Kconfig"
 
-config CONSISTENT_SIZE_BOOL
-        bool "Set custom consistent memory pool size"
-        depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
-        help
-          This option allows you to set the size of the the
-          consistent memory pool.  This pool of virtual memory
-          is used to make consistent memory allocations.
+menu "Exectuable file formats"
 
-config CONSISTENT_SIZE
-        hex "Size of consistent memory pool" if CONSISTENT_SIZE_BOOL
-        depends on MMU
-        default "0x00200000" if NOT_COHERENT_CACHE
+source "fs/Kconfig.binfmt"
 
 endmenu
 
-source "mm/Kconfig"
+menu "Bus Options"
 
-menu "Exectuable file formats"
+config PCI
+        bool "PCI support"
 
-source "fs/Kconfig.binfmt"
+config PCI_DOMAINS
+        def_bool PCI
+
+config PCI_SYSCALL
+        def_bool PCI
+
+config PCI_XILINX
+        bool "Xilinx PCI host bridge support"
+        depends on PCI
+
+source "drivers/pci/Kconfig"
 
 endmenu
 
diff --git a/arch/microblaze/Makefile b/arch/microblaze/Makefile
index d2d6cfcb1a3..72f6e858374 100644
--- a/arch/microblaze/Makefile
+++ b/arch/microblaze/Makefile
@@ -50,6 +50,7 @@ libs-y += $(LIBGCC)
 core-y += arch/microblaze/kernel/
 core-y += arch/microblaze/mm/
 core-y += arch/microblaze/platform/
+core-$(CONFIG_PCI) += arch/microblaze/pci/
 
 drivers-$(CONFIG_OPROFILE) += arch/microblaze/oprofile/
 
@@ -83,7 +84,7 @@ define archhelp
   echo '* linux.bin    - Create raw binary'
   echo '  linux.bin.gz - Create compressed raw binary'
   echo '  simpleImage.<dt> - ELF image with $(arch)/boot/dts/<dt>.dts linked in'
-  echo '                   - stripped elf with fdt blob
+  echo '                   - stripped elf with fdt blob'
   echo '  simpleImage.<dt>.unstrip - full ELF image with fdt blob'
   echo '  *_defconfig      - Select default config from arch/microblaze/configs'
   echo ''
@@ -93,3 +94,5 @@ define archhelp
   echo '  name of a dts file from the arch/microblaze/boot/dts/ directory'
   echo '  (minus the .dts extension).'
 endef
+
+MRPROPER_FILES += $(boot)/simpleImage.*
diff --git a/arch/microblaze/boot/Makefile b/arch/microblaze/boot/Makefile
index 902cf9846c3..57f50c2371c 100644
--- a/arch/microblaze/boot/Makefile
+++ b/arch/microblaze/boot/Makefile
@@ -23,8 +23,6 @@ $(obj)/system.dtb: $(obj)/$(DTB).dtb
 endif
 
 $(obj)/linux.bin: vmlinux FORCE
-        [ -n $(CONFIG_INITRAMFS_SOURCE) ] && [ ! -e $(CONFIG_INITRAMFS_SOURCE) ] && \
-        touch $(CONFIG_INITRAMFS_SOURCE) || echo "No CPIO image"
         $(call if_changed,objcopy)
         $(call if_changed,uimage)
         @echo 'Kernel: $@ is ready' ' (#'`cat .version`')'
@@ -62,6 +60,4 @@ quiet_cmd_dtc = DTC     $@
 $(obj)/%.dtb: $(dtstree)/%.dts FORCE
         $(call if_changed,dtc)
 
-clean-kernel += linux.bin linux.bin.gz simpleImage.*
-
-clean-files += *.dtb simpleImage.*.unstrip
+clean-files += *.dtb simpleImage.*.unstrip linux.bin.ub
diff --git a/arch/microblaze/include/asm/device.h b/arch/microblaze/include/asm/device.h
index 78a038452c0..402b46e630f 100644
--- a/arch/microblaze/include/asm/device.h
+++ b/arch/microblaze/include/asm/device.h
@@ -14,6 +14,10 @@ struct device_node;
 struct dev_archdata {
         /* Optional pointer to an OF device node */
         struct device_node      *of_node;
+
+        /* DMA operations on that device */
+        struct dma_map_ops      *dma_ops;
+        void                    *dma_data;
 };
 
 struct pdev_archdata {
diff --git a/arch/microblaze/include/asm/dma-mapping.h b/arch/microblaze/include/asm/dma-mapping.h
index d00e4009916..18b3731c850 100644
--- a/arch/microblaze/include/asm/dma-mapping.h
+++ b/arch/microblaze/include/asm/dma-mapping.h
@@ -1 +1,153 @@
-#include <asm-generic/dma-mapping-broken.h>
+/*
+ * Implements the generic device dma API for microblaze and the pci
+ *
+ * Copyright (C) 2009-2010 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2009-2010 PetaLogix
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * This file is base on powerpc and x86 dma-mapping.h versions
+ * Copyright (C) 2004 IBM
+ */
+
+#ifndef _ASM_MICROBLAZE_DMA_MAPPING_H
+#define _ASM_MICROBLAZE_DMA_MAPPING_H
+
+/*
+ * See Documentation/PCI/PCI-DMA-mapping.txt and
+ * Documentation/DMA-API.txt for documentation.
+ */
+
+#include <linux/types.h>
+#include <linux/cache.h>
+#include <linux/mm.h>
+#include <linux/scatterlist.h>
+#include <linux/dma-debug.h>
+#include <linux/dma-attrs.h>
+#include <asm/io.h>
+#include <asm-generic/dma-coherent.h>
+
+#define DMA_ERROR_CODE          (~(dma_addr_t)0x0)
+
+#define __dma_alloc_coherent(dev, gfp, size, handle)    NULL
+#define __dma_free_coherent(size, addr)         ((void)0)
+#define __dma_sync(addr, size, rw)              ((void)0)
+
+static inline unsigned long device_to_mask(struct device *dev)
+{
+        if (dev->dma_mask && *dev->dma_mask)
+                return *dev->dma_mask;
+        /* Assume devices without mask can take 32 bit addresses */
+        return 0xfffffffful;
+}
+
+extern struct dma_map_ops *dma_ops;
+
+/*
+ * Available generic sets of operations
+ */
+extern struct dma_map_ops dma_direct_ops;
+
+static inline struct dma_map_ops *get_dma_ops(struct device *dev)
+{
+        /* We don't handle the NULL dev case for ISA for now. We could
+         * do it via an out of line call but it is not needed for now. The
+         * only ISA DMA device we support is the floppy and we have a hack
+         * in the floppy driver directly to get a device for us.
+         */
+        if (unlikely(!dev) || !dev->archdata.dma_ops)
+                return NULL;
+
+        return dev->archdata.dma_ops;
+}
+
+static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
+{
+        dev->archdata.dma_ops = ops;
+}
+
+static inline int dma_supported(struct device *dev, u64 mask)
+{
+        struct dma_map_ops *ops = get_dma_ops(dev);
+
+        if (unlikely(!ops))
+                return 0;
+        if (!ops->dma_supported)
+                return 1;
+        return ops->dma_supported(dev, mask);
+}
+
+#ifdef CONFIG_PCI
+/* We have our own implementation of pci_set_dma_mask() */
+#define HAVE_ARCH_PCI_SET_DMA_MASK
+
+#endif
+
+static inline int dma_set_mask(struct device *dev, u64 dma_mask)
+{
+        struct dma_map_ops *ops = get_dma_ops(dev);
+
+        if (unlikely(ops == NULL))
+                return -EIO;
+        if (ops->set_dma_mask)
+                return ops->set_dma_mask(dev, dma_mask);
+        if (!dev->dma_mask || !dma_supported(dev, dma_mask))
+                return -EIO;
+        *dev->dma_mask = dma_mask;
+        return 0;
+}
+
+#include <asm-generic/dma-mapping-common.h>
+
+static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
+{
+        struct dma_map_ops *ops = get_dma_ops(dev);
+        if (ops->mapping_error)
+                return ops->mapping_error(dev, dma_addr);
+
+        return (dma_addr == DMA_ERROR_CODE);
+}
+
+#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
+#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
+#define dma_is_consistent(d, h) (1)
+
+static inline void *dma_alloc_coherent(struct device *dev, size_t size,
+                                        dma_addr_t *dma_handle, gfp_t flag)
+{
+        struct dma_map_ops *ops = get_dma_ops(dev);
+        void *memory;
+
+        BUG_ON(!ops);
+
+        memory = ops->alloc_coherent(dev, size, dma_handle, flag);
+
+        debug_dma_alloc_coherent(dev, size, *dma_handle, memory);
+        return memory;
+}
+
+static inline void dma_free_coherent(struct device *dev, size_t size,
+                                     void *cpu_addr, dma_addr_t dma_handle)
+{
+        struct dma_map_ops *ops = get_dma_ops(dev);
+
+        BUG_ON(!ops);
+        debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
+        ops->free_coherent(dev, size, cpu_addr, dma_handle);
+}
+
+static inline int dma_get_cache_alignment(void)
+{
+        return L1_CACHE_BYTES;
+}
+
+static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
+                enum dma_data_direction direction)
+{
+        BUG_ON(direction == DMA_NONE);
+        __dma_sync(vaddr, size, (int)direction);
+}
+
+#endif  /* _ASM_MICROBLAZE_DMA_MAPPING_H */
diff --git a/arch/microblaze/include/asm/futex.h b/arch/microblaze/include/asm/futex.h
index 8dbb6e7a03a..ad3fd61b2fe 100644
--- a/arch/microblaze/include/asm/futex.h
+++ b/arch/microblaze/include/asm/futex.h
@@ -55,7 +55,7 @@ futex_atomic_op_inuser(int encoded_op, int __user *uaddr)
                 __futex_atomic_op("or %1,%0,%4;", ret, oldval, uaddr, oparg);
                 break;
         case FUTEX_OP_ANDN:
-                __futex_atomic_op("and %1,%0,%4;", ret, oldval, uaddr, oparg);
+                __futex_atomic_op("andn %1,%0,%4;", ret, oldval, uaddr, oparg);
                 break;
         case FUTEX_OP_XOR:
                 __futex_atomic_op("xor %1,%0,%4;", ret, oldval, uaddr, oparg);
diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h
index 267c7c779e5..e45a6eea92e 100644
--- a/arch/microblaze/include/asm/io.h
+++ b/arch/microblaze/include/asm/io.h
@@ -15,7 +15,23 @@
 #include <asm/page.h>
 #include <linux/types.h>
 #include <linux/mm.h>          /* Get struct page {...} */
+#include <asm-generic/iomap.h>
 
+#ifndef CONFIG_PCI
+#define _IO_BASE        0
+#define _ISA_MEM_BASE   0
+#define PCI_DRAM_OFFSET 0
+#else
+#define _IO_BASE        isa_io_base
+#define _ISA_MEM_BASE   isa_mem_base
+#define PCI_DRAM_OFFSET pci_dram_offset
+#endif
+
+extern unsigned long isa_io_base;
+extern unsigned long pci_io_base;
+extern unsigned long pci_dram_offset;
+
+extern resource_size_t isa_mem_base;
 
 #define IO_SPACE_LIMIT (0xFFFFFFFF)
 
@@ -92,6 +108,11 @@ static inline void writel(unsigned int v, volatile void __iomem *addr)
 #define iowrite16(v, addr)      __raw_writew((u16)(v), (u16 *)(addr))
 #define iowrite32(v, addr)      __raw_writel((u32)(v), (u32 *)(addr))
 
+#define ioread16be(addr)        __raw_readw((u16 *)(addr))
+#define ioread32be(addr)        __raw_readl((u32 *)(addr))
+#define iowrite16be(v, addr)    __raw_writew((u16)(v), (u16 *)(addr))
+#define iowrite32be(v, addr)    __raw_writel((u32)(v), (u32 *)(addr))
+
 /* These are the definitions for the x86 IO instructions
  * inb/inw/inl/outb/outw/outl, the "string" versions
  * insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions
@@ -124,9 +145,6 @@ static inline void writel(unsigned int v, volatile void __iomem *addr)
 #define virt_to_phys(addr)      ((unsigned long)__virt_to_phys(addr))
 #define virt_to_bus(addr)       ((unsigned long)__virt_to_phys(addr))
 
-#define __page_address(page) \
-                (PAGE_OFFSET + (((page) - mem_map) << PAGE_SHIFT))
-#define page_to_phys(page)      virt_to_phys((void *)__page_address(page))
 #define page_to_bus(page)       (page_to_phys(page))
 #define bus_to_virt(addr)       (phys_to_virt(addr))
 
@@ -227,15 +245,7 @@ static inline void __iomem *__ioremap(phys_addr_t address, unsigned long size,
 #define out_8(a, v) __raw_writeb((v), (a))
 #define in_8(a) __raw_readb(a)
 
-/* FIXME */
-static inline void __iomem *ioport_map(unsigned long port, unsigned int len)
-{
-        return (void __iomem *) (port);
-}
-
-static inline void ioport_unmap(void __iomem *addr)
-{
-        /* Nothing to do */
-}
+#define ioport_map(port, nr)    ((void __iomem *)(port))
+#define ioport_unmap(addr)
 
 #endif /* _ASM_MICROBLAZE_IO_H */
diff --git a/arch/microblaze/include/asm/irq.h b/arch/microblaze/include/asm/irq.h
index 90f050535eb..31a35c33df6 100644
--- a/arch/microblaze/include/asm/irq.h
+++ b/arch/microblaze/include/asm/irq.h
@@ -14,6 +14,12 @@
 
 #include <linux/interrupt.h>
 
+/* This type is the placeholder for a hardware interrupt number. It has to
+ * be big enough to enclose whatever representation is used by a given
+ * platform.
+ */
+typedef unsigned long irq_hw_number_t;
+
 extern unsigned int nr_irq;
 
 #define NO_IRQ (-1)
@@ -21,7 +27,8 @@ extern unsigned int nr_irq;
 struct pt_regs;
 extern void do_IRQ(struct pt_regs *regs);
 
-/* irq_of_parse_and_map - Parse and Map an interrupt into linux virq space
+/**
+ * irq_of_parse_and_map - Parse and Map an interrupt into linux virq space
  * @device: Device node of the device whose interrupt is to be mapped
  * @index: Index of the interrupt to map
  *
@@ -40,4 +47,32 @@ static inline void irq_dispose_mapping(unsigned int virq)
         return;
 }
 
+struct irq_host;
+
+/**
+ * irq_create_mapping - Map a hardware interrupt into linux virq space
+ * @host: host owning this hardware interrupt or NULL for default host
+ * @hwirq: hardware irq number in that host space
+ *
+ * Only one mapping per hardware interrupt is permitted. Returns a linux
+ * virq number.
+ * If the sense/trigger is to be specified, set_irq_type() should be called
+ * on the number returned from that call.
+ */
+extern unsigned int irq_create_mapping(struct irq_host *host,
+                                        irq_hw_number_t hwirq);
+
+/**
+ * irq_create_of_mapping - Map a hardware interrupt into linux virq space
+ * @controller: Device node of the interrupt controller
+ * @inspec: Interrupt specifier from the device-tree
+ * @intsize: Size of the interrupt specifier from the device-tree
+ *
+ * This function is identical to irq_create_mapping except that it takes
+ * as input informations straight from the device-tree (typically the results
+ * of the of_irq_map_*() functions.
+ */
+extern unsigned int irq_create_of_mapping(struct device_node *controller,
+                                        u32 *intspec, unsigned int intsize);
+
 #endif /* _ASM_MICROBLAZE_IRQ_H */
diff --git a/arch/microblaze/include/asm/page.h b/arch/microblaze/include/asm/page.h
index 9b66c0fa9a3..2dd1d04129e 100644
--- a/arch/microblaze/include/asm/page.h
+++ b/arch/microblaze/include/asm/page.h
@@ -62,12 +62,6 @@ extern unsigned int __page_offset;
 #define PAGE_OFFSET     CONFIG_KERNEL_START
 
 /*
- * MAP_NR -- given an address, calculate the index of the page struct which
- * points to the address's page.
- */
-#define MAP_NR(addr) (((unsigned long)(addr) - PAGE_OFFSET) >> PAGE_SHIFT)
-
-/*
  * The basic type of a PTE - 32 bit physical addressing.
  */
 typedef unsigned long pte_basic_t;
@@ -154,7 +148,11 @@ extern int page_is_ram(unsigned long pfn);
 # define pfn_to_virt(pfn)       __va(pfn_to_phys((pfn)))
 
 #  ifdef CONFIG_MMU
-#  define virt_to_page(kaddr)   (mem_map +  MAP_NR(kaddr))
+
+#  define virt_to_page(kaddr)   (pfn_to_page(__pa(kaddr) >> PAGE_SHIFT))
+#  define page_to_virt(page)   __va(page_to_pfn(page) << PAGE_SHIFT)
+#  define page_to_phys(page)     (page_to_pfn(page) << PAGE_SHIFT)
+
 #  else /* CONFIG_MMU */
 #  define virt_to_page(vaddr)   (pfn_to_page(virt_to_pfn(vaddr)))
 #  define page_to_virt(page)    (pfn_to_virt(page_to_pfn(page)))
diff --git a/arch/microblaze/include/asm/pci-bridge.h b/arch/microblaze/include/asm/pci-bridge.h
index 7ad28f6f5f1..0c77cda9f5d 100644
--- a/arch/microblaze/include/asm/pci-bridge.h
+++ b/arch/microblaze/include/asm/pci-bridge.h
@@ -1 +1,196 @@
+#ifndef _ASM_MICROBLAZE_PCI_BRIDGE_H
+#define _ASM_MICROBLAZE_PCI_BRIDGE_H
+#ifdef __KERNEL__
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
 #include <linux/pci.h>
+#include <linux/list.h>
+#include <linux/ioport.h>
+
+struct device_node;
+
+enum {
+        /* Force re-assigning all resources (ignore firmware
+         * setup completely)
+         */
+        PCI_REASSIGN_ALL_RSRC   = 0x00000001,
+
+        /* Re-assign all bus numbers */
+        PCI_REASSIGN_ALL_BUS    = 0x00000002,
+
+        /* Do not try to assign, just use existing setup */
+        PCI_PROBE_ONLY          = 0x00000004,
+
+        /* Don't bother with ISA alignment unless the bridge has
+         * ISA forwarding enabled
+         */
+        PCI_CAN_SKIP_ISA_ALIGN  = 0x00000008,
+
+        /* Enable domain numbers in /proc */
+        PCI_ENABLE_PROC_DOMAINS = 0x00000010,
+        /* ... except for domain 0 */
+        PCI_COMPAT_DOMAIN_0             = 0x00000020,
+};
+
+/*
+ * Structure of a PCI controller (host bridge)
+ */
+struct pci_controller {
+        struct pci_bus *bus;
+        char is_dynamic;
+        struct device_node *dn;
+        struct list_head list_node;
+        struct device *parent;
+
+        int first_busno;
+        int last_busno;
+
+        int self_busno;
+
+        void __iomem *io_base_virt;
+        resource_size_t io_base_phys;
+
+        resource_size_t pci_io_size;
+
+        /* Some machines (PReP) have a non 1:1 mapping of
+         * the PCI memory space in the CPU bus space
+         */
+        resource_size_t pci_mem_offset;
+
+        /* Some machines have a special region to forward the ISA
+         * "memory" cycles such as VGA memory regions. Left to 0
+         * if unsupported
+         */
+        resource_size_t isa_mem_phys;
+        resource_size_t isa_mem_size;
+
+        struct pci_ops *ops;
+        unsigned int __iomem *cfg_addr;
+        void __iomem *cfg_data;
+
+        /*
+         * Used for variants of PCI indirect handling and possible quirks:
+         *  SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
+         *  EXT_REG - provides access to PCI-e extended registers
+         *  SURPRESS_PRIMARY_BUS - we surpress the setting of PCI_PRIMARY_BUS
+         *   on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS
+         *   to determine which bus number to match on when generating type0
+         *   config cycles
+         *  NO_PCIE_LINK - the Freescale PCI-e controllers have issues with
+         *   hanging if we don't have link and try to do config cycles to
+         *   anything but the PHB.  Only allow talking to the PHB if this is
+         *   set.
+         *  BIG_ENDIAN - cfg_addr is a big endian register
+         *  BROKEN_MRM - the 440EPx/GRx chips have an errata that causes hangs
+         *   on the PLB4.  Effectively disable MRM commands by setting this.
+         */
+#define INDIRECT_TYPE_SET_CFG_TYPE              0x00000001
+#define INDIRECT_TYPE_EXT_REG           0x00000002
+#define INDIRECT_TYPE_SURPRESS_PRIMARY_BUS      0x00000004
+#define INDIRECT_TYPE_NO_PCIE_LINK              0x00000008
+#define INDIRECT_TYPE_BIG_ENDIAN                0x00000010
+#define INDIRECT_TYPE_BROKEN_MRM                0x00000020
+        u32 indirect_type;
+
+        /* Currently, we limit ourselves to 1 IO range and 3 mem
+         * ranges since the common pci_bus structure can't handle more
+         */
+        struct resource io_resource;
+        struct resource mem_resources[3];
+        int global_number;      /* PCI domain number */
+};
+
+static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
+{
+        return bus->sysdata;
+}
+
+static inline int isa_vaddr_is_ioport(void __iomem *address)
+{
+        /* No specific ISA handling on ppc32 at this stage, it
+         * all goes through PCI
+         */
+        return 0;
+}
+
+/* These are used for config access before all the PCI probing
+   has been done. */
+extern int early_read_config_byte(struct pci_controller *hose, int bus,
+                        int dev_fn, int where, u8 *val);
+extern int early_read_config_word(struct pci_controller *hose, int bus,
+                        int dev_fn, int where, u16 *val);
+extern int early_read_config_dword(struct pci_controller *hose, int bus,
+                        int dev_fn, int where, u32 *val);
+extern int early_write_config_byte(struct pci_controller *hose, int bus,
+                        int dev_fn, int where, u8 val);
+extern int early_write_config_word(struct pci_controller *hose, int bus,
+                        int dev_fn, int where, u16 val);
+extern int early_write_config_dword(struct pci_controller *hose, int bus,
+                        int dev_fn, int where, u32 val);
+
+extern int early_find_capability(struct pci_controller *hose, int bus,
+                                 int dev_fn, int cap);
+
+extern void setup_indirect_pci(struct pci_controller *hose,
+                               resource_size_t cfg_addr,
+                               resource_size_t cfg_data, u32 flags);
+
+/* Get the PCI host controller for an OF device */
+extern struct pci_controller *pci_find_hose_for_OF_device(
+                        struct device_node *node);
+
+/* Fill up host controller resources from the OF node */
+extern void pci_process_bridge_OF_ranges(struct pci_controller *hose,
+                        struct device_node *dev, int primary);
+
+/* Allocate & free a PCI host bridge structure */
+extern struct pci_controller *pcibios_alloc_controller(struct device_node *dev);
+extern void pcibios_free_controller(struct pci_controller *phb);
+extern void pcibios_setup_phb_resources(struct pci_controller *hose);
+
+#ifdef CONFIG_PCI
+extern unsigned int pci_flags;
+
+static inline void pci_set_flags(int flags)
+{
+        pci_flags = flags;
+}
+
+static inline void pci_add_flags(int flags)
+{
+        pci_flags |= flags;
+}
+
+static inline int pci_has_flag(int flag)
+{
+        return pci_flags & flag;
+}
+
+extern struct list_head hose_list;
+
+extern unsigned long pci_address_to_pio(phys_addr_t address);
+extern int pcibios_vaddr_is_ioport(void __iomem *address);
+#else
+static inline unsigned long pci_address_to_pio(phys_addr_t address)
+{
+        return (unsigned long)-1;
+}
+static inline int pcibios_vaddr_is_ioport(void __iomem *address)
+{
+        return 0;
+}
+
+static inline void pci_set_flags(int flags) { }
+static inline void pci_add_flags(int flags) { }
+static inline int pci_has_flag(int flag)
+{
+        return 0;
+}
+#endif  /* CONFIG_PCI */
+
+#endif  /* __KERNEL__ */
+#endif  /* _ASM_MICROBLAZE_PCI_BRIDGE_H */
diff --git a/arch/microblaze/include/asm/pci.h b/arch/microblaze/include/asm/pci.h
index 9f0df5faf2c..bdd65aaee30 100644
--- a/arch/microblaze/include/asm/pci.h
+++ b/arch/microblaze/include/asm/pci.h
@@ -1 +1,177 @@
-#include <asm-generic/pci.h>
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * Based on powerpc version
+ */
+
+#ifndef __ASM_MICROBLAZE_PCI_H
+#define __ASM_MICROBLAZE_PCI_H
+#ifdef __KERNEL__
+
+#include <linux/types.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+#include <linux/dma-mapping.h>
+#include <linux/pci.h>
+
+#include <asm/scatterlist.h>
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/pci-bridge.h>
+
+#define PCIBIOS_MIN_IO          0x1000
+#define PCIBIOS_MIN_MEM         0x10000000
+
+struct pci_dev;
+
+/* Values for the `which' argument to sys_pciconfig_iobase syscall.  */
+#define IOBASE_BRIDGE_NUMBER    0
+#define IOBASE_MEMORY           1
+#define IOBASE_IO               2
+#define IOBASE_ISA_IO           3
+#define IOBASE_ISA_MEM          4
+
+#define pcibios_scan_all_fns(a, b)      0
+
+/*
+ * Set this to 1 if you want the kernel to re-assign all PCI
+ * bus numbers (don't do that on ppc64 yet !)
+ */
+#define pcibios_assign_all_busses() \
+        (pci_has_flag(PCI_REASSIGN_ALL_BUS))
+
+static inline void pcibios_set_master(struct pci_dev *dev)
+{
+        /* No special bus mastering setup handling */
+}
+
+static inline void pcibios_penalize_isa_irq(int irq, int active)
+{
+        /* We don't do dynamic PCI IRQ allocation */
+}
+
+#ifdef CONFIG_PCI
+extern void set_pci_dma_ops(struct dma_map_ops *dma_ops);
+extern struct dma_map_ops *get_pci_dma_ops(void);
+#else   /* CONFIG_PCI */
+#define set_pci_dma_ops(d)
+#define get_pci_dma_ops()       NULL
+#endif
+
+#ifdef CONFIG_PCI
+static inline void pci_dma_burst_advice(struct pci_dev *pdev,
+                                        enum pci_dma_burst_strategy *strat,
+                                        unsigned long *strategy_parameter)
+{
+        *strat = PCI_DMA_BURST_INFINITY;
+        *strategy_parameter = ~0UL;
+}
+#endif
+
+extern int pci_domain_nr(struct pci_bus *bus);
+
+/* Decide whether to display the domain number in /proc */
+extern int pci_proc_domain(struct pci_bus *bus);
+
+struct vm_area_struct;
+/* Map a range of PCI memory or I/O space for a device into user space */
+int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
+                        enum pci_mmap_state mmap_state, int write_combine);
+
+/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
+#define HAVE_PCI_MMAP   1
+
+extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
+                           size_t count);
+extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
+                           size_t count);
+extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
+                                      struct vm_area_struct *vma,
+                                      enum pci_mmap_state mmap_state);
+
+#define HAVE_PCI_LEGACY 1
+
+/* pci_unmap_{page,single} is a nop so... */
+#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
+#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
+#define pci_unmap_addr(PTR, ADDR_NAME)          (0)
+#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
+#define pci_unmap_len(PTR, LEN_NAME)            (0)
+#define pci_unmap_len_set(PTR, LEN_NAME, VAL)   do { } while (0)
+
+/* The PCI address space does equal the physical memory
+ * address space (no IOMMU).  The IDE and SCSI device layers use
+ * this boolean for bounce buffer decisions.
+ */
+#define PCI_DMA_BUS_IS_PHYS     (1)
+
+extern void pcibios_resource_to_bus(struct pci_dev *dev,
+                        struct pci_bus_region *region,
+                        struct resource *res);
+
+extern void pcibios_bus_to_resource(struct pci_dev *dev,
+                        struct resource *res,
+                        struct pci_bus_region *region);
+
+static inline struct resource *pcibios_select_root(struct pci_dev *pdev,
+                        struct resource *res)
+{
+        struct resource *root = NULL;
+
+        if (res->flags & IORESOURCE_IO)
+                root = &ioport_resource;
+        if (res->flags & IORESOURCE_MEM)
+                root = &iomem_resource;
+
+        return root;
+}
+
+extern void pcibios_claim_one_bus(struct pci_bus *b);
+
+extern void pcibios_finish_adding_to_bus(struct pci_bus *bus);
+
+extern void pcibios_resource_survey(void);
+
+extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
+extern int remove_phb_dynamic(struct pci_controller *phb);
+
+extern struct pci_dev *of_create_pci_dev(struct device_node *node,
+                                        struct pci_bus *bus, int devfn);
+
+extern void of_scan_pci_bridge(struct device_node *node,
+                                struct pci_dev *dev);
+
+extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
+extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus);
+
+extern int pci_read_irq_line(struct pci_dev *dev);
+
+extern int pci_bus_find_capability(struct pci_bus *bus,
+                                                unsigned int devfn, int cap);
+
+struct file;
+extern pgprot_t pci_phys_mem_access_prot(struct file *file,
+                                         unsigned long pfn,
+                                         unsigned long size,
+                                         pgprot_t prot);
+
+#define HAVE_ARCH_PCI_RESOURCE_TO_USER
+extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
+                                 const struct resource *rsrc,
+                                 resource_size_t *start, resource_size_t *end);
+
+extern void pcibios_setup_bus_devices(struct pci_bus *bus);
+extern void pcibios_setup_bus_self(struct pci_bus *bus);
+
+/* This part of code was originaly in xilinx-pci.h */
+#ifdef CONFIG_PCI_XILINX
+extern void __init xilinx_pci_init(void);
+#else
+static inline void __init xilinx_pci_init(void) { return; }
+#endif
+
+#endif  /* __KERNEL__ */
+#endif /* __ASM_MICROBLAZE_PCI_H */
diff --git a/arch/microblaze/include/asm/pgalloc.h b/arch/microblaze/include/asm/pgalloc.h
index 7547f506456..f44b0d696fe 100644
--- a/arch/microblaze/include/asm/pgalloc.h
+++ b/arch/microblaze/include/asm/pgalloc.h
@@ -19,6 +19,7 @@
 #include <asm/io.h>
 #include <asm/page.h>
 #include <asm/cache.h>
+#include <asm/pgtable.h>
 
 #define PGDIR_ORDER     0
 
@@ -111,7 +112,6 @@ static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
                 unsigned long address)
 {
         pte_t *pte;
-        extern int mem_init_done;
         extern void *early_get_page(void);
         if (mem_init_done) {
                 pte = (pte_t *)__get_free_page(GFP_KERNEL |
diff --git a/arch/microblaze/include/asm/pgtable.h b/arch/microblaze/include/asm/pgtable.h
index cc3a4dfc3ea..dd2bb60651c 100644
--- a/arch/microblaze/include/asm/pgtable.h
+++ b/arch/microblaze/include/asm/pgtable.h
@@ -16,6 +16,10 @@
 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot)         \
                 remap_pfn_range(vma, vaddr, pfn, size, prot)
 
+#ifndef __ASSEMBLY__
+extern int mem_init_done;
+#endif
+
 #ifndef CONFIG_MMU
 
 #define pgd_present(pgd)        (1) /* pages are always present on non MMU */
@@ -51,6 +55,8 @@ static inline int pte_file(pte_t pte) { return 0; }
 
 #define arch_enter_lazy_cpu_mode()      do {} while (0)
 
+#define pgprot_noncached_wc(prot)       prot
+
 #else /* CONFIG_MMU */
 
 #include <asm-generic/4level-fixup.h>
@@ -68,7 +74,6 @@ static inline int pte_file(pte_t pte) { return 0; }
 
 extern unsigned long va_to_phys(unsigned long address);
 extern pte_t *va_to_pte(unsigned long address);
-extern unsigned long ioremap_bot, ioremap_base;
 
 /*
  * The following only work if pte_present() is true.
@@ -85,11 +90,25 @@ static inline pte_t pte_mkspecial(pte_t pte)	{ return pte; }
 #define VMALLOC_START   (CONFIG_KERNEL_START + \
                                 max(32 * 1024 * 1024UL, memory_size))
 #define VMALLOC_END     ioremap_bot
-#define VMALLOC_VMADDR(x) ((unsigned long)(x))
 
 #endif /* __ASSEMBLY__ */
 
 /*
+ * Macro to mark a page protection value as "uncacheable".
+ */
+
+#define _PAGE_CACHE_CTL (_PAGE_GUARDED | _PAGE_NO_CACHE | \
+                                                        _PAGE_WRITETHRU)
+
+#define pgprot_noncached(prot) \
+                        (__pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) | \
+                                        _PAGE_NO_CACHE | _PAGE_GUARDED))
+
+#define pgprot_noncached_wc(prot) \
+                         (__pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) | \
+                                                        _PAGE_NO_CACHE))
+
+/*
  * The MicroBlaze MMU is identical to the PPC-40x MMU, and uses a hash
  * table containing PTEs, together with a set of 16 segment registers, to
  * define the virtual to physical address mapping.
@@ -397,7 +416,7 @@ static inline unsigned long pte_update(pte_t *p, unsigned long clr,
         mts     rmsr, %2\n\
         nop"
         : "=&r" (old), "=&r" (tmp), "=&r" (msr), "=m" (*p)
-        : "r" ((unsigned long)(p+1) - 4), "r" (clr), "r" (set), "m" (*p)
+        : "r" ((unsigned long)(p + 1) - 4), "r" (clr), "r" (set), "m" (*p)
         : "cc");
 
         return old;
@@ -566,18 +585,11 @@ void mapin_ram(void);
 int map_page(unsigned long va, phys_addr_t pa, int flags);
 
 extern int mem_init_done;
-extern unsigned long ioremap_base;
-extern unsigned long ioremap_bot;
 
 asmlinkage void __init mmu_init(void);
 
 void __init *early_get_page(void);
 
-void *consistent_alloc(int gfp, size_t size, dma_addr_t *dma_handle);
-void consistent_free(void *vaddr);
-void consistent_sync(void *vaddr, size_t size, int direction);
-void consistent_sync_page(struct page *page, unsigned long offset,
-        size_t size, int direction);
 #endif /* __ASSEMBLY__ */
 #endif /* __KERNEL__ */
 
@@ -586,6 +598,14 @@ void consistent_sync_page(struct page *page, unsigned long offset,
 #ifndef __ASSEMBLY__
 #include <asm-generic/pgtable.h>
 
+extern unsigned long ioremap_bot, ioremap_base;
+
+void *consistent_alloc(int gfp, size_t size, dma_addr_t *dma_handle);
+void consistent_free(void *vaddr);
+void consistent_sync(void *vaddr, size_t size, int direction);
+void consistent_sync_page(struct page *page, unsigned long offset,
+        size_t size, int direction);
+
 void setup_memory(void);
 #endif /* __ASSEMBLY__ */
 
diff --git a/arch/microblaze/include/asm/processor.h b/arch/microblaze/include/asm/processor.h
index 563c6b9453f..8eeb09211ec 100644
--- a/arch/microblaze/include/asm/processor.h
+++ b/arch/microblaze/include/asm/processor.h
@@ -14,7 +14,6 @@
 #include <asm/ptrace.h>
 #include <asm/setup.h>
 #include <asm/registers.h>
-#include <asm/segment.h>
 #include <asm/entry.h>
 #include <asm/current.h>
 
diff --git a/arch/microblaze/include/asm/prom.h b/arch/microblaze/include/asm/prom.h
index 03f45a96320..e7d67a329bd 100644
--- a/arch/microblaze/include/asm/prom.h
+++ b/arch/microblaze/include/asm/prom.h
@@ -31,6 +31,21 @@
 /* Other Prototypes */
 extern int early_uartlite_console(void);
 
+#ifdef CONFIG_PCI
+/*
+ * PCI <-> OF matching functions
+ * (XXX should these be here?)
+ */
+struct pci_bus;
+struct pci_dev;
+extern int pci_device_from_OF_node(struct device_node *node,
+                                        u8 *bus, u8 *devfn);
+extern struct device_node *pci_busdev_to_OF_node(struct pci_bus *bus,
+                                                        int devfn);
+extern struct device_node *pci_device_to_OF_node(struct pci_dev *dev);
+extern void pci_create_OF_bus_map(void);
+#endif
+
 /*
  * OF address retreival & translation
  */
diff --git a/arch/microblaze/include/asm/segment.h b/arch/microblaze/include/asm/segment.h
deleted file mode 100644
index 0e7102c3fb1..00000000000
--- a/arch/microblaze/include/asm/segment.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
- * Copyright (C) 2008-2009 PetaLogix
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#ifndef _ASM_MICROBLAZE_SEGMENT_H
-#define _ASM_MICROBLAZE_SEGMENT_H
-
-# ifndef __ASSEMBLY__
-
-typedef struct {
-        unsigned long seg;
-} mm_segment_t;
-
-/*
- * On Microblaze the fs value is actually the top of the corresponding
- * address space.
- *
- * The fs value determines whether argument validity checking should be
- * performed or not. If get_fs() == USER_DS, checking is performed, with
- * get_fs() == KERNEL_DS, checking is bypassed.
- *
- * For historical reasons, these macros are grossly misnamed.
- *
- * For non-MMU arch like Microblaze, KERNEL_DS and USER_DS is equal.
- */
-# define MAKE_MM_SEG(s)       ((mm_segment_t) { (s) })
-
-#  ifndef CONFIG_MMU
-#  define KERNEL_DS     MAKE_MM_SEG(0)
-#  define USER_DS       KERNEL_DS
-#  else
-#  define KERNEL_DS     MAKE_MM_SEG(0xFFFFFFFF)
-#  define USER_DS       MAKE_MM_SEG(TASK_SIZE - 1)
-#  endif
-
-# define get_ds()       (KERNEL_DS)
-# define get_fs()       (current_thread_info()->addr_limit)
-# define set_fs(val)    (current_thread_info()->addr_limit = (val))
-
-# define segment_eq(a, b)       ((a).seg == (b).seg)
-
-# endif /* __ASSEMBLY__ */
-#endif /* _ASM_MICROBLAZE_SEGMENT_H */
diff --git a/arch/microblaze/include/asm/system.h b/arch/microblaze/include/asm/system.h
index 157970688b2..59efb3fef95 100644
--- a/arch/microblaze/include/asm/system.h
+++ b/arch/microblaze/include/asm/system.h
@@ -87,6 +87,9 @@ void free_initmem(void);
 extern char *klimit;
 extern void ret_from_fork(void);
 
+extern void *alloc_maybe_bootmem(size_t size, gfp_t mask);
+extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);
+
 #ifdef CONFIG_DEBUG_FS
 extern struct dentry *of_debugfs_root;
 #endif
diff --git a/arch/microblaze/include/asm/thread_info.h b/arch/microblaze/include/asm/thread_info.h
index 6e92885d381..b2ca80f6464 100644
--- a/arch/microblaze/include/asm/thread_info.h
+++ b/arch/microblaze/include/asm/thread_info.h
@@ -19,7 +19,6 @@
 #ifndef __ASSEMBLY__
 # include <linux/types.h>
 # include <asm/processor.h>
-# include <asm/segment.h>
 
 /*
  * low level task data that entry.S needs immediate access to
@@ -60,6 +59,10 @@ struct cpu_context {
         __u32   fsr;
 };
 
+typedef struct {
+        unsigned long seg;
+} mm_segment_t;
+
 struct thread_info {
         struct task_struct      *task; /* main task structure */
         struct exec_domain      *exec_domain; /* execution domain */
diff --git a/arch/microblaze/include/asm/tlbflush.h b/arch/microblaze/include/asm/tlbflush.h
index 10ec70cd873..2e1353c2d18 100644
--- a/arch/microblaze/include/asm/tlbflush.h
+++ b/arch/microblaze/include/asm/tlbflush.h
@@ -23,7 +23,8 @@
 extern void _tlbie(unsigned long address);
 extern void _tlbia(void);
 
-#define __tlbia()       _tlbia()
+#define __tlbia()       { preempt_disable(); _tlbia(); preempt_enable(); }
+#define __tlbie(x)      { _tlbie(x); }
 
 static inline void local_flush_tlb_all(void)
         { __tlbia(); }
@@ -31,7 +32,7 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
         { __tlbia(); }
 static inline void local_flush_tlb_page(struct vm_area_struct *vma,
                                 unsigned long vmaddr)
-        { _tlbie(vmaddr); }
+        { __tlbie(vmaddr); }
 static inline void local_flush_tlb_range(struct vm_area_struct *vma,
                 unsigned long start, unsigned long end)
         { __tlbia(); }
diff --git a/arch/microblaze/include/asm/uaccess.h b/arch/microblaze/include/asm/uaccess.h
index 371bd6e56d9..446bec29b14 100644
--- a/arch/microblaze/include/asm/uaccess.h
+++ b/arch/microblaze/include/asm/uaccess.h
@@ -22,101 +22,73 @@
 #include <asm/mmu.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
-#include <asm/segment.h>
 #include <linux/string.h>
 
 #define VERIFY_READ     0
 #define VERIFY_WRITE    1
 
-#define __clear_user(addr, n)   (memset((void *)(addr), 0, (n)), 0)
-
-#ifndef CONFIG_MMU
-
-extern int ___range_ok(unsigned long addr, unsigned long size);
-
-#define __range_ok(addr, size) \
-                ___range_ok((unsigned long)(addr), (unsigned long)(size))
-
-#define access_ok(type, addr, size) (__range_ok((addr), (size)) == 0)
-#define __access_ok(add, size) (__range_ok((addr), (size)) == 0)
-
-/* Undefined function to trigger linker error */
-extern int bad_user_access_length(void);
-
-/* FIXME this is function for optimalization -> memcpy */
-#define __get_user(var, ptr)                            \
-({                                                      \
-        int __gu_err = 0;                               \
-        switch (sizeof(*(ptr))) {                       \
-        case 1:                                         \
-        case 2:                                         \
-        case 4:                                         \
-                (var) = *(ptr);                         \
-                break;                                  \
-        case 8:                                         \
-                memcpy((void *) &(var), (ptr), 8);      \
-                break;                                  \
-        default:                                        \
-                (var) = 0;                              \
-                __gu_err = __get_user_bad();            \
-                break;                                  \
-        }                                               \
-        __gu_err;                                       \
-})
+/*
+ * On Microblaze the fs value is actually the top of the corresponding
+ * address space.
+ *
+ * The fs value determines whether argument validity checking should be
+ * performed or not. If get_fs() == USER_DS, checking is performed, with
+ * get_fs() == KERNEL_DS, checking is bypassed.
+ *
+ * For historical reasons, these macros are grossly misnamed.
+ *
+ * For non-MMU arch like Microblaze, KERNEL_DS and USER_DS is equal.
+ */
+# define MAKE_MM_SEG(s)       ((mm_segment_t) { (s) })
 
-#define __get_user_bad()        (bad_user_access_length(), (-EFAULT))
+#  ifndef CONFIG_MMU
+#  define KERNEL_DS     MAKE_MM_SEG(0)
+#  define USER_DS       KERNEL_DS
+#  else
+#  define KERNEL_DS     MAKE_MM_SEG(0xFFFFFFFF)
+#  define USER_DS       MAKE_MM_SEG(TASK_SIZE - 1)
+#  endif
 
-/* FIXME is not there defined __pu_val */
-#define __put_user(var, ptr)                                    \
-({                                                              \
-        int __pu_err = 0;                                       \
-        switch (sizeof(*(ptr))) {                               \
-        case 1:                                                 \
-        case 2:                                                 \
-        case 4:                                                 \
-                *(ptr) = (var);                                 \
-                break;                                          \
-        case 8: {                                               \
-                typeof(*(ptr)) __pu_val = (var);                \
-                memcpy(ptr, &__pu_val, sizeof(__pu_val));       \
-                }                                               \
-                break;                                          \
-        default:                                                \
-                __pu_err = __put_user_bad();                    \
-                break;                                          \
-        }                                                       \
-        __pu_err;                                               \
-})
+# define get_ds()       (KERNEL_DS)
+# define get_fs()       (current_thread_info()->addr_limit)
+# define set_fs(val)    (current_thread_info()->addr_limit = (val))
 
-#define __put_user_bad()        (bad_user_access_length(), (-EFAULT))
+# define segment_eq(a, b)       ((a).seg == (b).seg)
 
-#define put_user(x, ptr)        __put_user((x), (ptr))
-#define get_user(x, ptr)        __get_user((x), (ptr))
+/*
+ * The exception table consists of pairs of addresses: the first is the
+ * address of an instruction that is allowed to fault, and the second is
+ * the address at which the program should continue. No registers are
+ * modified, so it is entirely up to the continuation code to figure out
+ * what to do.
+ *
+ * All the routines below use bits of fixup code that are out of line
+ * with the main instruction path. This means when everything is well,
+ * we don't even have to jump over them. Further, they do not intrude
+ * on our cache or tlb entries.
+ */
+struct exception_table_entry {
+        unsigned long insn, fixup;
+};
 
-#define copy_to_user(to, from, n)       (memcpy((to), (from), (n)), 0)
-#define copy_from_user(to, from, n)     (memcpy((to), (from), (n)), 0)
+/* Returns 0 if exception not found and fixup otherwise.  */
+extern unsigned long search_exception_table(unsigned long);
 
-#define __copy_to_user(to, from, n)     (copy_to_user((to), (from), (n)))
-#define __copy_from_user(to, from, n)   (copy_from_user((to), (from), (n)))
-#define __copy_to_user_inatomic(to, from, n) \
-                        (__copy_to_user((to), (from), (n)))
-#define __copy_from_user_inatomic(to, from, n) \
-                        (__copy_from_user((to), (from), (n)))
+#ifndef CONFIG_MMU
 
-static inline unsigned long clear_user(void *addr, unsigned long size)
+/* Check against bounds of physical memory */
+static inline int ___range_ok(unsigned long addr, unsigned long size)
 {
-        if (access_ok(VERIFY_WRITE, addr, size))
-                size = __clear_user(addr, size);
-        return size;
+        return ((addr < memory_start) ||
+                ((addr + size) > memory_end));
 }
 
-/* Returns 0 if exception not found and fixup otherwise.  */
-extern unsigned long search_exception_table(unsigned long);
+#define __range_ok(addr, size) \
+                ___range_ok((unsigned long)(addr), (unsigned long)(size))
 
-extern long strncpy_from_user(char *dst, const char *src, long count);
-extern long strnlen_user(const char *src, long count);
+#define access_ok(type, addr, size) (__range_ok((addr), (size)) == 0)
 
-#else /* CONFIG_MMU */
+#else
 
 /*
  * Address is valid if:
@@ -129,24 +101,88 @@ extern long strnlen_user(const char *src, long count);
 /* || printk("access_ok failed for %s at 0x%08lx (size %d), seg 0x%08x\n",
  type?"WRITE":"READ",addr,size,get_fs().seg)) */
 
-/*
- * All the __XXX versions macros/functions below do not perform
- * access checking. It is assumed that the necessary checks have been
- * already performed before the finction (macro) is called.
- */
+#endif
 
-#define get_user(x, ptr)                                                \
-({                                                                      \
-        access_ok(VERIFY_READ, (ptr), sizeof(*(ptr)))                   \
-                ? __get_user((x), (ptr)) : -EFAULT;                     \
-})
+#ifdef CONFIG_MMU
+# define __FIXUP_SECTION        ".section .fixup,\"ax\"\n"
+# define __EX_TABLE_SECTION     ".section __ex_table,\"a\"\n"
+#else
+# define __FIXUP_SECTION        ".section .discard,\"ax\"\n"
+# define __EX_TABLE_SECTION     ".section .discard,\"a\"\n"
+#endif
 
-#define put_user(x, ptr)                                                \
-({                                                                      \
-        access_ok(VERIFY_WRITE, (ptr), sizeof(*(ptr)))                  \
-                ? __put_user((x), (ptr)) : -EFAULT;                     \
+extern unsigned long __copy_tofrom_user(void __user *to,
+                const void __user *from, unsigned long size);
+
+/* Return: number of not copied bytes, i.e. 0 if OK or non-zero if fail. */
+static inline unsigned long __must_check __clear_user(void __user *to,
+                                                        unsigned long n)
+{
+        /* normal memset with two words to __ex_table */
+        __asm__ __volatile__ (                          \
+                        "1:     sb      r0, %2, r0;"    \
+                        "       addik   %0, %0, -1;"    \
+                        "       bneid   %0, 1b;"        \
+                        "       addik   %2, %2, 1;"     \
+                        "2:                     "       \
+                        __EX_TABLE_SECTION              \
+                        ".word  1b,2b;"                 \
+                        ".previous;"                    \
+                : "=r"(n)                               \
+                : "0"(n), "r"(to)
+        );
+        return n;
+}
+
+static inline unsigned long __must_check clear_user(void __user *to,
+                                                        unsigned long n)
+{
+        might_sleep();
+        if (unlikely(!access_ok(VERIFY_WRITE, to, n)))
+                return n;
+
+        return __clear_user(to, n);
+}
+
+/* put_user and get_user macros */
+extern long __user_bad(void);
+
+#define __get_user_asm(insn, __gu_ptr, __gu_val, __gu_err)      \
+({                                                              \
+        __asm__ __volatile__ (                                  \
+                        "1:"    insn    " %1, %2, r0;"          \
+                        "       addk    %0, r0, r0;"            \
+                        "2:                     "               \
+                        __FIXUP_SECTION                         \
+                        "3:     brid    2b;"                    \
+                        "       addik   %0, r0, %3;"            \
+                        ".previous;"                            \
+                        __EX_TABLE_SECTION                      \
+                        ".word  1b,3b;"                         \
+                        ".previous;"                            \
+                : "=&r"(__gu_err), "=r"(__gu_val)               \
+                : "r"(__gu_ptr), "i"(-EFAULT)                   \
+        );                                                      \
 })
 
+/**
+ * get_user: - Get a simple variable from user space.
+ * @x:   Variable to store result.
+ * @ptr: Source address, in user space.
+ *
+ * Context: User context only.  This function may sleep.
+ *
+ * This macro copies a single simple variable from user space to kernel
+ * space.  It supports simple types like char and int, but not larger
+ * data types like structures or arrays.
+ *
+ * @ptr must have pointer-to-simple-variable type, and the result of
+ * dereferencing @ptr must be assignable to @x without a cast.
+ *
+ * Returns zero on success, or -EFAULT on error.
+ * On error, the variable @x is set to zero.
+ */
+
 #define __get_user(x, ptr)                                              \
 ({                                                                      \
         unsigned long __gu_val;                                         \
@@ -163,30 +199,74 @@ extern long strnlen_user(const char *src, long count);
                 __get_user_asm("lw", (ptr), __gu_val, __gu_err);        \
                 break;                                                  \
         default:                                                        \
-                __gu_val = 0; __gu_err = -EINVAL;                       \
+                /* __gu_val = 0; __gu_err = -EINVAL;*/ __gu_err = __user_bad();\
         }                                                               \
         x = (__typeof__(*(ptr))) __gu_val;                              \
         __gu_err;                                                       \
 })
 
-#define __get_user_asm(insn, __gu_ptr, __gu_val, __gu_err)              \
+
+#define get_user(x, ptr)                                                \
 ({                                                                      \
-        __asm__ __volatile__ (                                          \
-                        "1:"    insn    " %1, %2, r0;                   \
-                                addk    %0, r0, r0;                     \
-                        2:                                              \
-                        .section .fixup,\"ax\";                         \
-                        3:      brid    2b;                             \
-                                addik   %0, r0, %3;                     \
-                        .previous;                                      \
-                        .section __ex_table,\"a\";                      \
-                        .word   1b,3b;                                  \
-                        .previous;"                                     \
-                : "=r"(__gu_err), "=r"(__gu_val)                        \
-                : "r"(__gu_ptr), "i"(-EFAULT)                           \
-        );                                                              \
+        access_ok(VERIFY_READ, (ptr), sizeof(*(ptr)))                   \
+                ? __get_user((x), (ptr)) : -EFAULT;                     \
+})
+
+#define __put_user_asm(insn, __gu_ptr, __gu_val, __gu_err)      \
+({                                                              \
+        __asm__ __volatile__ (                                  \
+                        "1:"    insn    " %1, %2, r0;"          \
+                        "       addk    %0, r0, r0;"            \
+                        "2:                     "               \
+                        __FIXUP_SECTION                         \
+                        "3:     brid    2b;"                    \
+                        "       addik   %0, r0, %3;"            \
+                        ".previous;"                            \
+                        __EX_TABLE_SECTION                      \
+                        ".word  1b,3b;"                         \
+                        ".previous;"                            \
+                : "=&r"(__gu_err)                               \
+                : "r"(__gu_val), "r"(__gu_ptr), "i"(-EFAULT)    \
+        );                                                      \
 })
 
+#define __put_user_asm_8(__gu_ptr, __gu_val, __gu_err)          \
+({                                                              \
+        __asm__ __volatile__ (" lwi     %0, %1, 0;"             \
+                        "1:     swi     %0, %2, 0;"             \
+                        "       lwi     %0, %1, 4;"             \
+                        "2:     swi     %0, %2, 4;"             \
+                        "       addk    %0, r0, r0;"            \
+                        "3:                     "               \
+                        __FIXUP_SECTION                         \
+                        "4:     brid    3b;"                    \
+                        "       addik   %0, r0, %3;"            \
+                        ".previous;"                            \
+                        __EX_TABLE_SECTION                      \
+                        ".word  1b,4b,2b,4b;"                   \
+                        ".previous;"                            \
+                : "=&r"(__gu_err)                               \
+                : "r"(&__gu_val), "r"(__gu_ptr), "i"(-EFAULT)   \
+                );                                              \
+})
+
+/**
+ * put_user: - Write a simple value into user space.
+ * @x:   Value to copy to user space.
+ * @ptr: Destination address, in user space.
+ *
+ * Context: User context only.  This function may sleep.
+ *
+ * This macro copies a single simple value from kernel space to user
+ * space.  It supports simple types like char and int, but not larger
+ * data types like structures or arrays.
+ *
+ * @ptr must have pointer-to-simple-variable type, and @x must be assignable
+ * to the result of dereferencing @ptr.
+ *
+ * Returns zero on success, or -EFAULT on error.
+ */
+
 #define __put_user(x, ptr)                                              \
 ({                                                                      \
         __typeof__(*(ptr)) volatile __gu_val = (x);                     \
@@ -195,7 +275,7 @@ extern long strnlen_user(const char *src, long count);
         case 1:                                                         \
                 __put_user_asm("sb", (ptr), __gu_val, __gu_err);        \
                 break;                                                  \
-        case 2:                                                         \
+        case 2:                                                         \
                 __put_user_asm("sh", (ptr), __gu_val, __gu_err);        \
                 break;                                                  \
         case 4:                                                         \
@@ -205,121 +285,82 @@ extern long strnlen_user(const char *src, long count);
                 __put_user_asm_8((ptr), __gu_val, __gu_err);            \
                 break;                                                  \
         default:                                                        \
-                __gu_err = -EINVAL;                                     \
+                /*__gu_err = -EINVAL;*/ __gu_err = __user_bad();        \
         }                                                               \
         __gu_err;                                                       \
 })
 
-#define __put_user_asm_8(__gu_ptr, __gu_val, __gu_err)  \
-({                                                      \
-__asm__ __volatile__ (" lwi     %0, %1, 0;              \
-                1:      swi     %0, %2, 0;              \
-                        lwi     %0, %1, 4;              \
-                2:      swi     %0, %2, 4;              \
-                        addk    %0,r0,r0;               \
-                3:                                      \
-                .section .fixup,\"ax\";                 \
-                4:      brid    3b;                     \
-                        addik   %0, r0, %3;             \
-                .previous;                              \
-                .section __ex_table,\"a\";              \
-                .word   1b,4b,2b,4b;                    \
-                .previous;"                             \
-        : "=&r"(__gu_err)                               \
-        : "r"(&__gu_val),                               \
-        "r"(__gu_ptr), "i"(-EFAULT)                     \
-        );                                              \
-})
+#ifndef CONFIG_MMU
 
-#define __put_user_asm(insn, __gu_ptr, __gu_val, __gu_err)      \
-({                                                              \
-        __asm__ __volatile__ (                                  \
-                        "1:"    insn    " %1, %2, r0;           \
-                                addk    %0, r0, r0;             \
-                        2:                                      \
-                        .section .fixup,\"ax\";                 \
-                        3:      brid    2b;                     \
-                                addik   %0, r0, %3;             \
-                        .previous;                              \
-                        .section __ex_table,\"a\";              \
-                        .word   1b,3b;                          \
-                        .previous;"                             \
-                : "=r"(__gu_err)                                \
-                : "r"(__gu_val), "r"(__gu_ptr), "i"(-EFAULT)    \
-        );                                                      \
-})
+#define put_user(x, ptr)        __put_user((x), (ptr))
 
-/*
- * Return: number of not copied bytes, i.e. 0 if OK or non-zero if fail.
- */
-static inline int clear_user(char *to, int size)
-{
-        if (size && access_ok(VERIFY_WRITE, to, size)) {
-                __asm__ __volatile__ ("                         \
-                                1:                              \
-                                        sb      r0, %2, r0;     \
-                                        addik   %0, %0, -1;     \
-                                        bneid   %0, 1b;         \
-                                        addik   %2, %2, 1;      \
-                                2:                              \
-                                .section __ex_table,\"a\";      \
-                                .word   1b,2b;                  \
-                                .section .text;"                \
-                        : "=r"(size)                            \
-                        : "0"(size), "r"(to)
-                );
-        }
-        return size;
-}
+#else /* CONFIG_MMU */
 
-#define __copy_from_user(to, from, n)   copy_from_user((to), (from), (n))
+#define put_user(x, ptr)                                                \
+({                                                                      \
+        access_ok(VERIFY_WRITE, (ptr), sizeof(*(ptr)))                  \
+                ? __put_user((x), (ptr)) : -EFAULT;                     \
+})
+#endif /* CONFIG_MMU */
+
+/* copy_to_from_user */
+#define __copy_from_user(to, from, n)   \
+        __copy_tofrom_user((__force void __user *)(to), \
+                                (void __user *)(from), (n))
 #define __copy_from_user_inatomic(to, from, n) \
                 copy_from_user((to), (from), (n))
 
-#define copy_to_user(to, from, n)                                       \
-        (access_ok(VERIFY_WRITE, (to), (n)) ?                           \
-                __copy_tofrom_user((void __user *)(to),                 \
-                        (__force const void __user *)(from), (n))       \
-                : -EFAULT)
+static inline long copy_from_user(void *to,
+                const void __user *from, unsigned long n)
+{
+        might_sleep();
+        if (access_ok(VERIFY_READ, from, n))
+                return __copy_from_user(to, from, n);
+        return n;
+}
 
-#define __copy_to_user(to, from, n)     copy_to_user((to), (from), (n))
+#define __copy_to_user(to, from, n)     \
+                __copy_tofrom_user((void __user *)(to), \
+                        (__force const void __user *)(from), (n))
 #define __copy_to_user_inatomic(to, from, n)    copy_to_user((to), (from), (n))
 
-#define copy_from_user(to, from, n)                                     \
-        (access_ok(VERIFY_READ, (from), (n)) ?                          \
-                __copy_tofrom_user((__force void __user *)(to),         \
-                        (void __user *)(from), (n))                     \
-                : -EFAULT)
+static inline long copy_to_user(void __user *to,
+                const void *from, unsigned long n)
+{
+        might_sleep();
+        if (access_ok(VERIFY_WRITE, to, n))
+                return __copy_to_user(to, from, n);
+        return n;
+}
 
+/*
+ * Copy a null terminated string from userspace.
+ */
 extern int __strncpy_user(char *to, const char __user *from, int len);
-extern int __strnlen_user(const char __user *sstr, int len);
 
-#define strncpy_from_user(to, from, len)        \
-                (access_ok(VERIFY_READ, from, 1) ?      \
-                        __strncpy_user(to, from, len) : -EFAULT)
-#define strnlen_user(str, len)  \
-                (access_ok(VERIFY_READ, str, 1) ? __strnlen_user(str, len) : 0)
+#define __strncpy_from_user     __strncpy_user
 
-#endif /* CONFIG_MMU */
-
-extern unsigned long __copy_tofrom_user(void __user *to,
-                const void __user *from, unsigned long size);
+static inline long
+strncpy_from_user(char *dst, const char __user *src, long count)
+{
+        if (!access_ok(VERIFY_READ, src, 1))
+                return -EFAULT;
+        return __strncpy_from_user(dst, src, count);
+}
 
 /*
- * The exception table consists of pairs of addresses: the first is the
- * address of an instruction that is allowed to fault, and the second is
- * the address at which the program should continue. No registers are
- * modified, so it is entirely up to the continuation code to figure out
- * what to do.
+ * Return the size of a string (including the ending 0)
  *
- * All the routines below use bits of fixup code that are out of line
- * with the main instruction path. This means when everything is well,
- * we don't even have to jump over them. Further, they do not intrude
- * on our cache or tlb entries.
+ * Return 0 on exception, a value greater than N if too long
  */
-struct exception_table_entry {
-        unsigned long insn, fixup;
-};
+extern int __strnlen_user(const char __user *sstr, int len);
+
+static inline long strnlen_user(const char __user *src, long n)
+{
+        if (!access_ok(VERIFY_READ, src, 1))
+                return 0;
+        return __strnlen_user(src, n);
+}
 
 #endif  /* __ASSEMBLY__ */
 #endif /* __KERNEL__ */
diff --git a/arch/microblaze/kernel/Makefile b/arch/microblaze/kernel/Makefile
index b07594eccf9..e51bc152082 100644
--- a/arch/microblaze/kernel/Makefile
+++ b/arch/microblaze/kernel/Makefile
@@ -14,7 +14,7 @@ endif
 
 extra-y := head.o vmlinux.lds
 
-obj-y += exceptions.o \
+obj-y += dma.o exceptions.o \
         hw_exception_handler.o init_task.o intc.o irq.o of_device.o \
         of_platform.o process.o prom.o prom_parse.o ptrace.o \
         setup.o signal.o sys_microblaze.o timer.o traps.o reset.o
diff --git a/arch/microblaze/kernel/asm-offsets.c b/arch/microblaze/kernel/asm-offsets.c
index 7bc7b68f97d..0071260a672 100644
--- a/arch/microblaze/kernel/asm-offsets.c
+++ b/arch/microblaze/kernel/asm-offsets.c
@@ -90,6 +90,7 @@ int main(int argc, char *argv[])
         DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
         DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit));
         DEFINE(TI_CPU_CONTEXT, offsetof(struct thread_info, cpu_context));
+        DEFINE(TI_PREEMPT_COUNT, offsetof(struct thread_info, preempt_count));
         BLANK();
 
         /* struct cpu_context */
diff --git a/arch/microblaze/kernel/cpu/cache.c b/arch/microblaze/kernel/cpu/cache.c
index 2a56bccce4e..f04d8a86dea 100644
--- a/arch/microblaze/kernel/cpu/cache.c
+++ b/arch/microblaze/kernel/cpu/cache.c
@@ -15,25 +15,6 @@
 #include <asm/cpuinfo.h>
 #include <asm/pvr.h>
 
-static inline void __invalidate_flush_icache(unsigned int addr)
-{
-        __asm__ __volatile__ ("wic      %0, r0;"        \
-                                        : : "r" (addr));
-}
-
-static inline void __flush_dcache(unsigned int addr)
-{
-        __asm__ __volatile__ ("wdc.flush        %0, r0;"        \
-                                        : : "r" (addr));
-}
-
-static inline void __invalidate_dcache(unsigned int baseaddr,
-                                                unsigned int offset)
-{
-        __asm__ __volatile__ ("wdc.clear        %0, %1;"        \
-                                        : : "r" (baseaddr), "r" (offset));
-}
-
 static inline void __enable_icache_msr(void)
 {
         __asm__ __volatile__ (" msrset  r0, %0;         \
@@ -148,9 +129,9 @@ do {									\
         int step = -line_length;                                        \
         BUG_ON(step >= 0);                                              \
                                                                         \
-        __asm__ __volatile__ (" 1:      " #op " r0, %0;                 \
-                                        bgtid   %0, 1b;                 \
-                                        addk    %0, %0, %1;             \
+        __asm__ __volatile__ (" 1:      " #op " r0, %0;                 \
+                                        bgtid   %0, 1b;                 \
+                                        addk    %0, %0, %1;             \
                                         " : : "r" (len), "r" (step)     \
                                         : "memory");                    \
 } while (0);
@@ -162,9 +143,9 @@ do {									\
         int count = end - start;                                        \
         BUG_ON(count <= 0);                                             \
                                                                         \
-        __asm__ __volatile__ (" 1:      " #op " %0, %1;                 \
-                                        bgtid   %1, 1b;                 \
-                                        addk    %1, %1, %2;             \
+        __asm__ __volatile__ (" 1:      " #op " %0, %1;                 \
+                                        bgtid   %1, 1b;                 \
+                                        addk    %1, %1, %2;             \
                                         " : : "r" (start), "r" (count), \
                                         "r" (step) : "memory");         \
 } while (0);
@@ -175,7 +156,7 @@ do {									\
         int volatile temp;                                              \
         BUG_ON(end - start <= 0);                                       \
                                                                         \
-        __asm__ __volatile__ (" 1:      " #op " %1, r0;                 \
+        __asm__ __volatile__ (" 1:      " #op " %1, r0;                 \
                                         cmpu    %0, %1, %2;             \
                                         bgtid   %0, 1b;                 \
                                         addk    %1, %1, %3;             \
@@ -183,10 +164,14 @@ do {									\
                                         "r" (line_length) : "memory");  \
 } while (0);
 
+#define ASM_LOOP
+
 static void __flush_icache_range_msr_irq(unsigned long start, unsigned long end)
 {
         unsigned long flags;
-
+#ifndef ASM_LOOP
+        int i;
+#endif
         pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
                                 (unsigned int)start, (unsigned int) end);
 
@@ -196,8 +181,13 @@ static void __flush_icache_range_msr_irq(unsigned long start, unsigned long end)
         local_irq_save(flags);
         __disable_icache_msr();
 
+#ifdef ASM_LOOP
         CACHE_RANGE_LOOP_1(start, end, cpuinfo.icache_line_length, wic);
-
+#else
+        for (i = start; i < end; i += cpuinfo.icache_line_length)
+                __asm__ __volatile__ ("wic      %0, r0;"        \
+                                : : "r" (i));
+#endif
         __enable_icache_msr();
         local_irq_restore(flags);
 }
@@ -206,7 +196,9 @@ static void __flush_icache_range_nomsr_irq(unsigned long start,
                                 unsigned long end)
 {
         unsigned long flags;
-
+#ifndef ASM_LOOP
+        int i;
+#endif
         pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
                                 (unsigned int)start, (unsigned int) end);
 
@@ -216,7 +208,13 @@ static void __flush_icache_range_nomsr_irq(unsigned long start,
         local_irq_save(flags);
         __disable_icache_nomsr();
 
+#ifdef ASM_LOOP
         CACHE_RANGE_LOOP_1(start, end, cpuinfo.icache_line_length, wic);
+#else
+        for (i = start; i < end; i += cpuinfo.icache_line_length)
+                __asm__ __volatile__ ("wic      %0, r0;"        \
+                                : : "r" (i));
+#endif
 
         __enable_icache_nomsr();
         local_irq_restore(flags);
@@ -225,25 +223,41 @@ static void __flush_icache_range_nomsr_irq(unsigned long start,
 static void __flush_icache_range_noirq(unsigned long start,
                                 unsigned long end)
 {
+#ifndef ASM_LOOP
+        int i;
+#endif
         pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
                                 (unsigned int)start, (unsigned int) end);
 
         CACHE_LOOP_LIMITS(start, end,
                         cpuinfo.icache_line_length, cpuinfo.icache_size);
+#ifdef ASM_LOOP
         CACHE_RANGE_LOOP_1(start, end, cpuinfo.icache_line_length, wic);
+#else
+        for (i = start; i < end; i += cpuinfo.icache_line_length)
+                __asm__ __volatile__ ("wic      %0, r0;"        \
+                                : : "r" (i));
+#endif
 }
 
 static void __flush_icache_all_msr_irq(void)
 {
         unsigned long flags;
-
+#ifndef ASM_LOOP
+        int i;
+#endif
         pr_debug("%s\n", __func__);
 
         local_irq_save(flags);
         __disable_icache_msr();
-
+#ifdef ASM_LOOP
         CACHE_ALL_LOOP(cpuinfo.icache_size, cpuinfo.icache_line_length, wic);
-
+#else
+        for (i = 0; i < cpuinfo.icache_size;
+                 i += cpuinfo.icache_line_length)
+                        __asm__ __volatile__ ("wic      %0, r0;" \
+                                        : : "r" (i));
+#endif
         __enable_icache_msr();
         local_irq_restore(flags);
 }
@@ -251,35 +265,59 @@ static void __flush_icache_all_msr_irq(void)
 static void __flush_icache_all_nomsr_irq(void)
 {
         unsigned long flags;
-
+#ifndef ASM_LOOP
+        int i;
+#endif
         pr_debug("%s\n", __func__);
 
         local_irq_save(flags);
         __disable_icache_nomsr();
-
+#ifdef ASM_LOOP
         CACHE_ALL_LOOP(cpuinfo.icache_size, cpuinfo.icache_line_length, wic);
-
+#else
+        for (i = 0; i < cpuinfo.icache_size;
+                 i += cpuinfo.icache_line_length)
+                        __asm__ __volatile__ ("wic      %0, r0;" \
+                                        : : "r" (i));
+#endif
         __enable_icache_nomsr();
         local_irq_restore(flags);
 }
 
 static void __flush_icache_all_noirq(void)
 {
+#ifndef ASM_LOOP
+        int i;
+#endif
         pr_debug("%s\n", __func__);
+#ifdef ASM_LOOP
         CACHE_ALL_LOOP(cpuinfo.icache_size, cpuinfo.icache_line_length, wic);
+#else
+        for (i = 0; i < cpuinfo.icache_size;
+                 i += cpuinfo.icache_line_length)
+                        __asm__ __volatile__ ("wic      %0, r0;" \
+                                        : : "r" (i));
+#endif
 }
 
 static void __invalidate_dcache_all_msr_irq(void)
 {
         unsigned long flags;
-
+#ifndef ASM_LOOP
+        int i;
+#endif
         pr_debug("%s\n", __func__);
 
         local_irq_save(flags);
         __disable_dcache_msr();
-
+#ifdef ASM_LOOP
         CACHE_ALL_LOOP(cpuinfo.dcache_size, cpuinfo.dcache_line_length, wdc);
-
+#else
+        for (i = 0; i < cpuinfo.dcache_size;
+                 i += cpuinfo.dcache_line_length)
+                        __asm__ __volatile__ ("wdc      %0, r0;" \
+                                        : : "r" (i));
+#endif
         __enable_dcache_msr();
         local_irq_restore(flags);
 }
@@ -287,60 +325,107 @@ static void __invalidate_dcache_all_msr_irq(void)
 static void __invalidate_dcache_all_nomsr_irq(void)
 {
         unsigned long flags;
-
+#ifndef ASM_LOOP
+        int i;
+#endif
         pr_debug("%s\n", __func__);
 
         local_irq_save(flags);
         __disable_dcache_nomsr();
-
+#ifdef ASM_LOOP
         CACHE_ALL_LOOP(cpuinfo.dcache_size, cpuinfo.dcache_line_length, wdc);
-
+#else
+        for (i = 0; i < cpuinfo.dcache_size;
+                 i += cpuinfo.dcache_line_length)
+                        __asm__ __volatile__ ("wdc      %0, r0;" \
+                                        : : "r" (i));
+#endif
         __enable_dcache_nomsr();
         local_irq_restore(flags);
 }
 
 static void __invalidate_dcache_all_noirq_wt(void)
 {
+#ifndef ASM_LOOP
+        int i;
+#endif
         pr_debug("%s\n", __func__);
+#ifdef ASM_LOOP
         CACHE_ALL_LOOP(cpuinfo.dcache_size, cpuinfo.dcache_line_length, wdc)
+#else
+        for (i = 0; i < cpuinfo.dcache_size;
+                 i += cpuinfo.dcache_line_length)
+                        __asm__ __volatile__ ("wdc      %0, r0;" \
+                                        : : "r" (i));
+#endif
 }
 
 /* FIXME this is weird - should be only wdc but not work
  * MS: I am getting bus errors and other weird things */
 static void __invalidate_dcache_all_wb(void)
 {
+#ifndef ASM_LOOP
+        int i;
+#endif
         pr_debug("%s\n", __func__);
+#ifdef ASM_LOOP
         CACHE_ALL_LOOP2(cpuinfo.dcache_size, cpuinfo.dcache_line_length,
                                         wdc.clear)
+#else
+        for (i = 0; i < cpuinfo.dcache_size;
+                 i += cpuinfo.dcache_line_length)
+                        __asm__ __volatile__ ("wdc.clear        %0, r0;" \
+                                        : : "r" (i));
+#endif
 }
 
 static void __invalidate_dcache_range_wb(unsigned long start,
                                                 unsigned long end)
 {
+#ifndef ASM_LOOP
+        int i;
+#endif
         pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
                                 (unsigned int)start, (unsigned int) end);
 
         CACHE_LOOP_LIMITS(start, end,
                         cpuinfo.dcache_line_length, cpuinfo.dcache_size);
+#ifdef ASM_LOOP
         CACHE_RANGE_LOOP_2(start, end, cpuinfo.dcache_line_length, wdc.clear);
+#else
+        for (i = start; i < end; i += cpuinfo.icache_line_length)
+                __asm__ __volatile__ ("wdc.clear        %0, r0;"        \
+                                : : "r" (i));
+#endif
 }
 
 static void __invalidate_dcache_range_nomsr_wt(unsigned long start,
                                                         unsigned long end)
 {
+#ifndef ASM_LOOP
+        int i;
+#endif
         pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
                                 (unsigned int)start, (unsigned int) end);
         CACHE_LOOP_LIMITS(start, end,
                         cpuinfo.dcache_line_length, cpuinfo.dcache_size);
 
+#ifdef ASM_LOOP
         CACHE_RANGE_LOOP_1(start, end, cpuinfo.dcache_line_length, wdc);
+#else
+        for (i = start; i < end; i += cpuinfo.icache_line_length)
+                __asm__ __volatile__ ("wdc      %0, r0;"        \
+                                : : "r" (i));
+#endif
 }
 
 static void __invalidate_dcache_range_msr_irq_wt(unsigned long start,
                                                         unsigned long end)
 {
         unsigned long flags;
-
+#ifndef ASM_LOOP
+        int i;
+#endif
         pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
                                 (unsigned int)start, (unsigned int) end);
         CACHE_LOOP_LIMITS(start, end,
@@ -349,7 +434,13 @@ static void __invalidate_dcache_range_msr_irq_wt(unsigned long start,
         local_irq_save(flags);
         __disable_dcache_msr();
 
+#ifdef ASM_LOOP
         CACHE_RANGE_LOOP_1(start, end, cpuinfo.dcache_line_length, wdc);
+#else
+        for (i = start; i < end; i += cpuinfo.icache_line_length)
+                __asm__ __volatile__ ("wdc      %0, r0;"        \
+                                : : "r" (i));
+#endif
 
         __enable_dcache_msr();
         local_irq_restore(flags);
@@ -359,7 +450,9 @@ static void __invalidate_dcache_range_nomsr_irq(unsigned long start,
                                                         unsigned long end)
 {
         unsigned long flags;
-
+#ifndef ASM_LOOP
+        int i;
+#endif
         pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
                                 (unsigned int)start, (unsigned int) end);
 
@@ -369,7 +462,13 @@ static void __invalidate_dcache_range_nomsr_irq(unsigned long start,
         local_irq_save(flags);
         __disable_dcache_nomsr();
 
+#ifdef ASM_LOOP
         CACHE_RANGE_LOOP_1(start, end, cpuinfo.dcache_line_length, wdc);
+#else
+        for (i = start; i < end; i += cpuinfo.icache_line_length)
+                __asm__ __volatile__ ("wdc      %0, r0;"        \
+                                : : "r" (i));
+#endif
 
         __enable_dcache_nomsr();
         local_irq_restore(flags);
@@ -377,19 +476,38 @@ static void __invalidate_dcache_range_nomsr_irq(unsigned long start,
 
 static void __flush_dcache_all_wb(void)
 {
+#ifndef ASM_LOOP
+        int i;
+#endif
         pr_debug("%s\n", __func__);
+#ifdef ASM_LOOP
         CACHE_ALL_LOOP(cpuinfo.dcache_size, cpuinfo.dcache_line_length,
                                 wdc.flush);
+#else
+        for (i = 0; i < cpuinfo.dcache_size;
+                 i += cpuinfo.dcache_line_length)
+                        __asm__ __volatile__ ("wdc.flush        %0, r0;" \
+                                        : : "r" (i));
+#endif
 }
 
 static void __flush_dcache_range_wb(unsigned long start, unsigned long end)
 {
+#ifndef ASM_LOOP
+        int i;
+#endif
         pr_debug("%s: start 0x%x, end 0x%x\n", __func__,
                                 (unsigned int)start, (unsigned int) end);
 
         CACHE_LOOP_LIMITS(start, end,
                         cpuinfo.dcache_line_length, cpuinfo.dcache_size);
+#ifdef ASM_LOOP
         CACHE_RANGE_LOOP_2(start, end, cpuinfo.dcache_line_length, wdc.flush);
+#else
+        for (i = start; i < end; i += cpuinfo.icache_line_length)
+                __asm__ __volatile__ ("wdc.flush        %0, r0;"        \
+                                : : "r" (i));
+#endif
 }
 
 /* struct for wb caches and for wt caches */
@@ -493,7 +611,7 @@ const struct scache wt_nomsr_noirq = {
 #define CPUVER_7_20_A   0x0c
 #define CPUVER_7_20_D   0x0f
 
-#define INFO(s) printk(KERN_INFO "cache: " s " \n");
+#define INFO(s) printk(KERN_INFO "cache: " s "\n");
 
 void microblaze_cache_init(void)
 {
@@ -532,4 +650,9 @@ void microblaze_cache_init(void)
                         }
                 }
         }
+        invalidate_dcache();
+        enable_dcache();
+
+        invalidate_icache();
+        enable_icache();
 }
diff --git a/arch/microblaze/kernel/cpu/cpuinfo.c b/arch/microblaze/kernel/cpu/cpuinfo.c
index 991d71311b0..255ef880351 100644
--- a/arch/microblaze/kernel/cpu/cpuinfo.c
+++ b/arch/microblaze/kernel/cpu/cpuinfo.c
@@ -9,7 +9,6 @@
  */
 
 #include <linux/init.h>
-#include <linux/slab.h>
 #include <asm/cpuinfo.h>
 #include <asm/pvr.h>
 
diff --git a/arch/microblaze/kernel/dma.c b/arch/microblaze/kernel/dma.c
new file mode 100644
index 00000000000..ce72dd4967c
--- /dev/null
+++ b/arch/microblaze/kernel/dma.c
@@ -0,0 +1,157 @@
+/*
+ * Copyright (C) 2009-2010 PetaLogix
+ * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corporation
+ *
+ * Provide default implementations of the DMA mapping callbacks for
+ * directly mapped busses.
+ */
+
+#include <linux/device.h>
+#include <linux/dma-mapping.h>
+#include <linux/gfp.h>
+#include <linux/dma-debug.h>
+#include <asm/bug.h>
+#include <asm/cacheflush.h>
+
+/*
+ * Generic direct DMA implementation
+ *
+ * This implementation supports a per-device offset that can be applied if
+ * the address at which memory is visible to devices is not 0. Platform code
+ * can set archdata.dma_data to an unsigned long holding the offset. By
+ * default the offset is PCI_DRAM_OFFSET.
+ */
+static inline void __dma_sync_page(unsigned long paddr, unsigned long offset,
+                                size_t size, enum dma_data_direction direction)
+{
+        switch (direction) {
+        case DMA_TO_DEVICE:
+                flush_dcache_range(paddr + offset, paddr + offset + size);
+                break;
+        case DMA_FROM_DEVICE:
+                invalidate_dcache_range(paddr + offset, paddr + offset + size);
+                break;
+        default:
+                BUG();
+        }
+}
+
+static unsigned long get_dma_direct_offset(struct device *dev)
+{
+        if (likely(dev))
+                return (unsigned long)dev->archdata.dma_data;
+
+        return PCI_DRAM_OFFSET; /* FIXME Not sure if is correct */
+}
+
+#define NOT_COHERENT_CACHE
+
+static void *dma_direct_alloc_coherent(struct device *dev, size_t size,
+                                dma_addr_t *dma_handle, gfp_t flag)
+{
+#ifdef NOT_COHERENT_CACHE
+        return consistent_alloc(flag, size, dma_handle);
+#else
+        void *ret;
+        struct page *page;
+        int node = dev_to_node(dev);
+
+        /* ignore region specifiers */
+        flag  &= ~(__GFP_HIGHMEM);
+
+        page = alloc_pages_node(node, flag, get_order(size));
+        if (page == NULL)
+                return NULL;
+        ret = page_address(page);
+        memset(ret, 0, size);
+        *dma_handle = virt_to_phys(ret) + get_dma_direct_offset(dev);
+
+        return ret;
+#endif
+}
+
+static void dma_direct_free_coherent(struct device *dev, size_t size,
+                              void *vaddr, dma_addr_t dma_handle)
+{
+#ifdef NOT_COHERENT_CACHE
+        consistent_free(vaddr);
+#else
+        free_pages((unsigned long)vaddr, get_order(size));
+#endif
+}
+
+static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl,
+                             int nents, enum dma_data_direction direction,
+                             struct dma_attrs *attrs)
+{
+        struct scatterlist *sg;
+        int i;
+
+        /* FIXME this part of code is untested */
+        for_each_sg(sgl, sg, nents, i) {
+                sg->dma_address = sg_phys(sg) + get_dma_direct_offset(dev);
+                sg->dma_length = sg->length;
+                __dma_sync_page(page_to_phys(sg_page(sg)), sg->offset,
+                                                        sg->length, direction);
+        }
+
+        return nents;
+}
+
+static void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sg,
+                                int nents, enum dma_data_direction direction,
+                                struct dma_attrs *attrs)
+{
+}
+
+static int dma_direct_dma_supported(struct device *dev, u64 mask)
+{
+        return 1;
+}
+
+static inline dma_addr_t dma_direct_map_page(struct device *dev,
+                                             struct page *page,
+                                             unsigned long offset,
+                                             size_t size,
+                                             enum dma_data_direction direction,
+                                             struct dma_attrs *attrs)
+{
+        __dma_sync_page(page_to_phys(page), offset, size, direction);
+        return page_to_phys(page) + offset + get_dma_direct_offset(dev);
+}
+
+static inline void dma_direct_unmap_page(struct device *dev,
+                                         dma_addr_t dma_address,
+                                         size_t size,
+                                         enum dma_data_direction direction,
+                                         struct dma_attrs *attrs)
+{
+/* There is not necessary to do cache cleanup
+ *
+ * phys_to_virt is here because in __dma_sync_page is __virt_to_phys and
+ * dma_address is physical address
+ */
+        __dma_sync_page(dma_address, 0 , size, direction);
+}
+
+struct dma_map_ops dma_direct_ops = {
+        .alloc_coherent = dma_direct_alloc_coherent,
+        .free_coherent  = dma_direct_free_coherent,
+        .map_sg         = dma_direct_map_sg,
+        .unmap_sg       = dma_direct_unmap_sg,
+        .dma_supported  = dma_direct_dma_supported,
+        .map_page       = dma_direct_map_page,
+        .unmap_page     = dma_direct_unmap_page,
+};
+EXPORT_SYMBOL(dma_direct_ops);
+
+/* Number of entries preallocated for DMA-API debugging */
+#define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)
+
+static int __init dma_init(void)
+{
+       dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
+
+       return 0;
+}
+fs_initcall(dma_init);
diff --git a/arch/microblaze/kernel/entry.S b/arch/microblaze/kernel/entry.S
index 3bad4ff4947..c0ede25c5b9 100644
--- a/arch/microblaze/kernel/entry.S
+++ b/arch/microblaze/kernel/entry.S
@@ -305,7 +305,7 @@ C_ENTRY(_user_exception):
         swi     r11, r1, PTO+PT_R1;             /* Store user SP.  */
         addi    r11, r0, 1;
         swi     r11, r0, TOPHYS(PER_CPU(KM));   /* Now we're in kernel-mode.  */
-2:      lwi     r31, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */
+2:      lwi     CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
         /* Save away the syscall number.  */
         swi     r12, r1, PTO+PT_R0;
         tovirt(r1,r1)
@@ -322,8 +322,7 @@ C_ENTRY(_user_exception):
         rtid    r11, 0
         nop
 3:
-        add     r11, r0, CURRENT_TASK    /* Get current task ptr into r11 */
-        lwi     r11, r11, TS_THREAD_INFO /* get thread info */
+        lwi     r11, CURRENT_TASK, TS_THREAD_INFO /* get thread info */
         lwi     r11, r11, TI_FLAGS       /* get flags in thread info */
         andi    r11, r11, _TIF_WORK_SYSCALL_MASK
         beqi    r11, 4f
@@ -382,60 +381,50 @@ C_ENTRY(ret_from_trap):
 /* See if returning to kernel mode, if so, skip resched &c.  */
         bnei    r11, 2f;
 
+        swi     r3, r1, PTO + PT_R3
+        swi     r4, r1, PTO + PT_R4
+
         /* We're returning to user mode, so check for various conditions that
          * trigger rescheduling. */
-        # FIXME: Restructure all these flag checks.
-        add     r11, r0, CURRENT_TASK;  /* Get current task ptr into r11 */
-        lwi     r11, r11, TS_THREAD_INFO;       /* get thread info */
+        /* FIXME: Restructure all these flag checks. */
+        lwi     r11, CURRENT_TASK, TS_THREAD_INFO;      /* get thread info */
         lwi     r11, r11, TI_FLAGS;             /* get flags in thread info */
         andi    r11, r11, _TIF_WORK_SYSCALL_MASK
         beqi    r11, 1f
 
-        swi     r3, r1, PTO + PT_R3
-        swi     r4, r1, PTO + PT_R4
         brlid   r15, do_syscall_trace_leave
         addik   r5, r1, PTO + PT_R0
-        lwi     r3, r1, PTO + PT_R3
-        lwi     r4, r1, PTO + PT_R4
 1:
-
         /* We're returning to user mode, so check for various conditions that
          * trigger rescheduling. */
-        /* Get current task ptr into r11 */
-        add     r11, r0, CURRENT_TASK;  /* Get current task ptr into r11 */
-        lwi     r11, r11, TS_THREAD_INFO;       /* get thread info */
+        /* get thread info from current task */
+        lwi     r11, CURRENT_TASK, TS_THREAD_INFO;
         lwi     r11, r11, TI_FLAGS;             /* get flags in thread info */
         andi    r11, r11, _TIF_NEED_RESCHED;
         beqi    r11, 5f;
 
-        swi     r3, r1, PTO + PT_R3; /* store syscall result */
-        swi     r4, r1, PTO + PT_R4;
         bralid  r15, schedule;  /* Call scheduler */
         nop;                            /* delay slot */
-        lwi     r3, r1, PTO + PT_R3; /* restore syscall result */
-        lwi     r4, r1, PTO + PT_R4;
 
         /* Maybe handle a signal */
-5:      add     r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
-        lwi     r11, r11, TS_THREAD_INFO;       /* get thread info */
+5:      /* get thread info from current task*/
+        lwi     r11, CURRENT_TASK, TS_THREAD_INFO;
         lwi     r11, r11, TI_FLAGS;     /* get flags in thread info */
         andi    r11, r11, _TIF_SIGPENDING;
         beqi    r11, 1f;                /* Signals to handle, handle them */
 
-        swi     r3, r1, PTO + PT_R3; /* store syscall result */
-        swi     r4, r1, PTO + PT_R4;
         la      r5, r1, PTO;            /* Arg 1: struct pt_regs *regs */
-        add     r6, r0, r0;             /* Arg 2: sigset_t *oldset */
         addi    r7, r0, 1;              /* Arg 3: int in_syscall */
         bralid  r15, do_signal; /* Handle any signals */
-        nop;
+        add     r6, r0, r0;             /* Arg 2: sigset_t *oldset */
+
+/* Finally, return to user state.  */
+1:
         lwi     r3, r1, PTO + PT_R3; /* restore syscall result */
         lwi     r4, r1, PTO + PT_R4;
 
-/* Finally, return to user state.  */
-1:      swi     r0, r0, PER_CPU(KM);    /* Now officially in user state. */
-        add     r11, r0, CURRENT_TASK;  /* Get current task ptr into r11 */
-        swi     r11, r0, PER_CPU(CURRENT_SAVE); /* save current */
+        swi     r0, r0, PER_CPU(KM);    /* Now officially in user state. */
+        swi     CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */
         VM_OFF;
         tophys(r1,r1);
         RESTORE_REGS;
@@ -565,7 +554,7 @@ C_ENTRY(sys_rt_sigreturn_wrapper):
         swi     r11, r1, PTO+PT_R1; /* Store user SP.  */               \
         addi    r11, r0, 1;                                             \
         swi     r11, r0, TOPHYS(PER_CPU(KM)); /* Now we're in kernel-mode.*/\
-2:      lwi     r31, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */\
+2:      lwi     CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));        \
         /* Save away the syscall number.  */                            \
         swi     r0, r1, PTO+PT_R0;                                      \
         tovirt(r1,r1)
@@ -673,9 +662,7 @@ C_ENTRY(ret_from_exc):
 
         /* We're returning to user mode, so check for various conditions that
            trigger rescheduling. */
-        /* Get current task ptr into r11 */
-        add     r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
-        lwi     r11, r11, TS_THREAD_INFO;       /* get thread info */
+        lwi     r11, CURRENT_TASK, TS_THREAD_INFO;      /* get thread info */
         lwi     r11, r11, TI_FLAGS;     /* get flags in thread info */
         andi    r11, r11, _TIF_NEED_RESCHED;
         beqi    r11, 5f;
@@ -685,8 +672,7 @@ C_ENTRY(ret_from_exc):
         nop;                            /* delay slot */
 
         /* Maybe handle a signal */
-5:      add     r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
-        lwi     r11, r11, TS_THREAD_INFO;       /* get thread info */
+5:      lwi     r11, CURRENT_TASK, TS_THREAD_INFO;      /* get thread info */
         lwi     r11, r11, TI_FLAGS;     /* get flags in thread info */
         andi    r11, r11, _TIF_SIGPENDING;
         beqi    r11, 1f;                /* Signals to handle, handle them */
@@ -705,15 +691,13 @@ C_ENTRY(ret_from_exc):
          * store return registers separately because this macros is use
          * for others exceptions */
         la      r5, r1, PTO;            /* Arg 1: struct pt_regs *regs */
-        add     r6, r0, r0;             /* Arg 2: sigset_t *oldset */
         addi    r7, r0, 0;              /* Arg 3: int in_syscall */
         bralid  r15, do_signal; /* Handle any signals */
-        nop;
+        add     r6, r0, r0;             /* Arg 2: sigset_t *oldset */
 
 /* Finally, return to user state.  */
 1:      swi     r0, r0, PER_CPU(KM);    /* Now officially in user state. */
-        add     r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
-        swi     r11, r0, PER_CPU(CURRENT_SAVE); /* save current */
+        swi     CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */
         VM_OFF;
         tophys(r1,r1);
 
@@ -802,7 +786,7 @@ C_ENTRY(_interrupt):
         swi     r11, r0, TOPHYS(PER_CPU(KM));
 
 2:
-        lwi     r31, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
+        lwi     CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
         swi     r0, r1, PTO + PT_R0;
         tovirt(r1,r1)
         la      r5, r1, PTO;
@@ -817,8 +801,7 @@ ret_from_irq:
         lwi     r11, r1, PTO + PT_MODE;
         bnei    r11, 2f;
 
-        add     r11, r0, CURRENT_TASK;
-        lwi     r11, r11, TS_THREAD_INFO;
+        lwi     r11, CURRENT_TASK, TS_THREAD_INFO;
         lwi     r11, r11, TI_FLAGS; /* MS: get flags from thread info */
         andi    r11, r11, _TIF_NEED_RESCHED;
         beqi    r11, 5f
@@ -826,8 +809,7 @@ ret_from_irq:
         nop; /* delay slot */
 
     /* Maybe handle a signal */
-5:      add     r11, r0, CURRENT_TASK;
-        lwi     r11, r11, TS_THREAD_INFO; /* MS: get thread info */
+5:      lwi     r11, CURRENT_TASK, TS_THREAD_INFO; /* MS: get thread info */
         lwi     r11, r11, TI_FLAGS; /* get flags in thread info */
         andi    r11, r11, _TIF_SIGPENDING;
         beqid   r11, no_intr_resched
@@ -842,8 +824,7 @@ no_intr_resched:
     /* Disable interrupts, we are now committed to the state restore */
         disable_irq
         swi     r0, r0, PER_CPU(KM); /* MS: Now officially in user state. */
-        add     r11, r0, CURRENT_TASK;
-        swi     r11, r0, PER_CPU(CURRENT_SAVE);
+        swi     CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE);
         VM_OFF;
         tophys(r1,r1);
         lwi     r3, r1, PTO + PT_R3; /* MS: restore saved r3, r4 registers */
@@ -853,7 +834,28 @@ no_intr_resched:
         lwi     r1, r1, PT_R1 - PT_SIZE;
         bri     6f;
 /* MS: Return to kernel state. */
-2:      VM_OFF /* MS: turn off MMU */
+2:
+#ifdef CONFIG_PREEMPT
+        lwi     r11, CURRENT_TASK, TS_THREAD_INFO;
+        /* MS: get preempt_count from thread info */
+        lwi     r5, r11, TI_PREEMPT_COUNT;
+        bgti    r5, restore;
+
+        lwi     r5, r11, TI_FLAGS;              /* get flags in thread info */
+        andi    r5, r5, _TIF_NEED_RESCHED;
+        beqi    r5, restore /* if zero jump over */
+
+preempt:
+        /* interrupts are off that's why I am calling preempt_chedule_irq */
+        bralid  r15, preempt_schedule_irq
+        nop
+        lwi     r11, CURRENT_TASK, TS_THREAD_INFO;      /* get thread info */
+        lwi     r5, r11, TI_FLAGS;              /* get flags in thread info */
+        andi    r5, r5, _TIF_NEED_RESCHED;
+        bnei    r5, preempt /* if non zero jump to resched */
+restore:
+#endif
+        VM_OFF /* MS: turn off MMU */
         tophys(r1,r1)
         lwi     r3, r1, PTO + PT_R3; /* MS: restore saved r3, r4 registers */
         lwi     r4, r1, PTO + PT_R4;
@@ -915,7 +917,7 @@ C_ENTRY(_debug_exception):
         swi     r11, r1, PTO+PT_R1; /* Store user SP.  */
         addi    r11, r0, 1;
         swi     r11, r0, TOPHYS(PER_CPU(KM));   /* Now we're in kernel-mode.  */
-2:      lwi     r31, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */
+2:      lwi     CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
         /* Save away the syscall number.  */
         swi     r0, r1, PTO+PT_R0;
         tovirt(r1,r1)
@@ -935,8 +937,7 @@ dbtrap_call:	rtbd	r11, 0;
         bnei    r11, 2f;
 
         /* Get current task ptr into r11 */
-        add     r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
-        lwi     r11, r11, TS_THREAD_INFO;       /* get thread info */
+        lwi     r11, CURRENT_TASK, TS_THREAD_INFO;      /* get thread info */
         lwi     r11, r11, TI_FLAGS;     /* get flags in thread info */
         andi    r11, r11, _TIF_NEED_RESCHED;
         beqi    r11, 5f;
@@ -949,8 +950,7 @@ dbtrap_call:	rtbd	r11, 0;
         /* XXX m68knommu also checks TASK_STATE & TASK_COUNTER here.  */
 
         /* Maybe handle a signal */
-5:      add     r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
-        lwi     r11, r11, TS_THREAD_INFO;       /* get thread info */
+5:      lwi     r11, CURRENT_TASK, TS_THREAD_INFO;      /* get thread info */
         lwi     r11, r11, TI_FLAGS;     /* get flags in thread info */
         andi    r11, r11, _TIF_SIGPENDING;
         beqi    r11, 1f;                /* Signals to handle, handle them */
@@ -966,16 +966,14 @@ dbtrap_call:	rtbd	r11, 0;
            (in a possibly modified form) after do_signal returns.  */
 
         la      r5, r1, PTO;            /* Arg 1: struct pt_regs *regs */
-        add     r6, r0, r0;             /* Arg 2: sigset_t *oldset */
         addi  r7, r0, 0;        /* Arg 3: int in_syscall */
         bralid  r15, do_signal; /* Handle any signals */
-        nop;
+        add     r6, r0, r0;             /* Arg 2: sigset_t *oldset */
 
 
 /* Finally, return to user state.  */
 1:      swi     r0, r0, PER_CPU(KM);    /* Now officially in user state. */
-        add     r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
-        swi     r11, r0, PER_CPU(CURRENT_SAVE); /* save current */
+        swi     CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */
         VM_OFF;
         tophys(r1,r1);
 
@@ -1007,7 +1005,7 @@ DBTRAP_return:		/* Make global symbol for debugging */
 
 ENTRY(_switch_to)
         /* prepare return value */
-        addk    r3, r0, r31
+        addk    r3, r0, CURRENT_TASK
 
         /* save registers in cpu_context */
         /* use r11 and r12, volatile registers, as temp register */
@@ -1051,10 +1049,10 @@ ENTRY(_switch_to)
         nop
         swi     r12, r11, CC_FSR
 
-        /* update r31, the current */
-        lwi     r31, r6, TI_TASK/* give me pointer to task which will be next */
+        /* update r31, the current-give me pointer to task which will be next */
+        lwi     CURRENT_TASK, r6, TI_TASK
         /* stored it to current_save too */
-        swi     r31, r0, PER_CPU(CURRENT_SAVE)
+        swi     CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE)
 
         /* get new process' cpu context and restore */
         /* give me start where start context of next task */
diff --git a/arch/microblaze/kernel/ftrace.c b/arch/microblaze/kernel/ftrace.c
index 388b31ca65a..515feb40455 100644
--- a/arch/microblaze/kernel/ftrace.c
+++ b/arch/microblaze/kernel/ftrace.c
@@ -151,13 +151,10 @@ int ftrace_make_nop(struct module *mod,
         return ret;
 }
 
-static int ret_addr; /* initialized as 0 by default */
-
 /* I believe that first is called ftrace_make_nop before this function */
 int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
 {
         int ret;
-        ret_addr = addr; /* saving where the barrier jump is */
         pr_debug("%s: addr:0x%x, rec->ip: 0x%x, imm:0x%x\n",
                 __func__, (unsigned int)addr, (unsigned int)rec->ip, imm);
         ret = ftrace_modify_code(rec->ip, imm);
@@ -194,12 +191,9 @@ int ftrace_update_ftrace_func(ftrace_func_t func)
         ret = ftrace_modify_code(ip, upper);
         ret += ftrace_modify_code(ip + 4, lower);
 
-        /* We just need to remove the rtsd r15, 8 by NOP */
-        BUG_ON(!ret_addr);
-        if (ret_addr)
-                ret += ftrace_modify_code(ret_addr, MICROBLAZE_NOP);
-        else
-                ret = 1; /* fault */
+        /* We just need to replace the rtsd r15, 8 with NOP */
+        ret += ftrace_modify_code((unsigned long)&ftrace_caller,
+                                  MICROBLAZE_NOP);
 
         /* All changes are done - lets do caches consistent */
         flush_icache();
diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S
index 30916193fcc..da6a5f5dc76 100644
--- a/arch/microblaze/kernel/head.S
+++ b/arch/microblaze/kernel/head.S
@@ -51,6 +51,12 @@ swapper_pg_dir:
 
         .text
 ENTRY(_start)
+#if CONFIG_KERNEL_BASE_ADDR == 0
+        brai    TOPHYS(real_start)
+        .org    0x100
+real_start:
+#endif
+
         mfs     r1, rmsr
         andi    r1, r1, ~2
         mts     rmsr, r1
@@ -99,8 +105,8 @@ no_fdt_arg:
         tophys(r4,r4)                   /* convert to phys address */
         ori     r3, r0, COMMAND_LINE_SIZE - 1 /* number of loops */
 _copy_command_line:
-        lbu     r7, r5, r6 /* r7=r5+r6 - r5 contain pointer to command line */
-        sb      r7, r4, r6              /* addr[r4+r6]= r7*/
+        lbu     r2, r5, r6 /* r2=r5+r6 - r5 contain pointer to command line */
+        sb      r2, r4, r6              /* addr[r4+r6]= r2*/
         addik   r6, r6, 1               /* increment counting */
         bgtid   r3, _copy_command_line  /* loop for all entries       */
         addik   r3, r3, -1              /* descrement loop */
@@ -128,7 +134,7 @@ _copy_bram:
          * virtual to physical.
          */
         nop
-        addik   r3, r0, 63              /* Invalidate all TLB entries */
+        addik   r3, r0, MICROBLAZE_TLB_SIZE -1  /* Invalidate all TLB entries */
 _invalidate:
         mts     rtlbx, r3
         mts     rtlbhi, r0                      /* flush: ensure V is clear   */
@@ -136,6 +142,11 @@ _invalidate:
         addik   r3, r3, -1
         /* sync */
 
+        /* Setup the kernel PID */
+        mts     rpid,r0                 /* Load the kernel PID */
+        nop
+        bri     4
+
         /*
          * We should still be executing code at physical address area
          * RAM_BASEADDR at this point. However, kernel code is at
@@ -146,10 +157,6 @@ _invalidate:
         addik   r3,r0, CONFIG_KERNEL_START /* Load the kernel virtual address */
         tophys(r4,r3)                   /* Load the kernel physical address */
 
-        mts     rpid,r0                 /* Load the kernel PID */
-        nop
-        bri     4
-
         /*
          * Configure and load two entries into TLB slots 0 and 1.
          * In case we are pinning TLBs, these are reserved in by the
diff --git a/arch/microblaze/kernel/hw_exception_handler.S b/arch/microblaze/kernel/hw_exception_handler.S
index 2b86c03aa84..995a2123635 100644
--- a/arch/microblaze/kernel/hw_exception_handler.S
+++ b/arch/microblaze/kernel/hw_exception_handler.S
@@ -313,13 +313,13 @@ _hw_exception_handler:
         mfs     r5, rmsr;
         nop
         swi     r5, r1, 0;
-        mfs     r3, resr
+        mfs     r4, resr
         nop
-        mfs     r4, rear;
+        mfs     r3, rear;
         nop
 
 #ifndef CONFIG_MMU
-        andi    r5, r3, 0x1000;         /* Check ESR[DS] */
+        andi    r5, r4, 0x1000;         /* Check ESR[DS] */
         beqi    r5, not_in_delay_slot;  /* Branch if ESR[DS] not set */
         mfs     r17, rbtr;      /* ESR[DS] set - return address in BTR */
         nop
@@ -327,13 +327,14 @@ not_in_delay_slot:
         swi     r17, r1, PT_R17
 #endif
 
-        andi    r5, r3, 0x1F;           /* Extract ESR[EXC] */
+        andi    r5, r4, 0x1F;           /* Extract ESR[EXC] */
 
 #ifdef CONFIG_MMU
         /* Calculate exception vector offset = r5 << 2 */
         addk    r6, r5, r5; /* << 1 */
         addk    r6, r6, r6; /* << 2 */
 
+#ifdef DEBUG
 /* counting which exception happen */
         lwi     r5, r0, 0x200 + TOPHYS(r0_ram)
         addi    r5, r5, 1
@@ -341,6 +342,7 @@ not_in_delay_slot:
         lwi     r5, r6, 0x200 + TOPHYS(r0_ram)
         addi    r5, r5, 1
         swi     r5, r6, 0x200 + TOPHYS(r0_ram)
+#endif
 /* end */
         /* Load the HW Exception vector */
         lwi     r6, r6, TOPHYS(_MB_HW_ExceptionVectorTable)
@@ -376,7 +378,7 @@ handle_other_ex: /* Handle Other exceptions here */
         swi     r18, r1, PT_R18
 
         or      r5, r1, r0
-        andi    r6, r3, 0x1F; /* Load ESR[EC] */
+        andi    r6, r4, 0x1F; /* Load ESR[EC] */
         lwi     r7, r0, PER_CPU(KM) /* MS: saving current kernel mode to regs */
         swi     r7, r1, PT_MODE
         mfs     r7, rfsr
@@ -426,11 +428,11 @@ handle_other_ex: /* Handle Other exceptions here */
  */
 handle_unaligned_ex:
         /* Working registers already saved: R3, R4, R5, R6
-         *  R3 = ESR
-         *  R4 = EAR
+         *  R4 = ESR
+         *  R3 = EAR
          */
 #ifdef CONFIG_MMU
-        andi    r6, r3, 0x1000                  /* Check ESR[DS] */
+        andi    r6, r4, 0x1000                  /* Check ESR[DS] */
         beqi    r6, _no_delayslot               /* Branch if ESR[DS] not set */
         mfs     r17, rbtr;      /* ESR[DS] set - return address in BTR */
         nop
@@ -439,7 +441,7 @@ _no_delayslot:
         RESTORE_STATE;
         bri     unaligned_data_trap
 #endif
-        andi    r6, r3, 0x3E0; /* Mask and extract the register operand */
+        andi    r6, r4, 0x3E0; /* Mask and extract the register operand */
         srl     r6, r6; /* r6 >> 5 */
         srl     r6, r6;
         srl     r6, r6;
@@ -448,33 +450,33 @@ _no_delayslot:
         /* Store the register operand in a temporary location */
         sbi     r6, r0, TOPHYS(ex_reg_op);
 
-        andi    r6, r3, 0x400; /* Extract ESR[S] */
+        andi    r6, r4, 0x400; /* Extract ESR[S] */
         bnei    r6, ex_sw;
 ex_lw:
-        andi    r6, r3, 0x800; /* Extract ESR[W] */
+        andi    r6, r4, 0x800; /* Extract ESR[W] */
         beqi    r6, ex_lhw;
-        lbui    r5, r4, 0; /* Exception address in r4 */
+        lbui    r5, r3, 0; /* Exception address in r3 */
         /* Load a word, byte-by-byte from destination address
                 and save it in tmp space */
         sbi     r5, r0, TOPHYS(ex_tmp_data_loc_0);
-        lbui    r5, r4, 1;
+        lbui    r5, r3, 1;
         sbi     r5, r0, TOPHYS(ex_tmp_data_loc_1);
-        lbui    r5, r4, 2;
+        lbui    r5, r3, 2;
         sbi     r5, r0, TOPHYS(ex_tmp_data_loc_2);
-        lbui    r5, r4, 3;
+        lbui    r5, r3, 3;
         sbi     r5, r0, TOPHYS(ex_tmp_data_loc_3);
-        /* Get the destination register value into r3 */
-        lwi     r3, r0, TOPHYS(ex_tmp_data_loc_0);
+        /* Get the destination register value into r4 */
+        lwi     r4, r0, TOPHYS(ex_tmp_data_loc_0);
         bri     ex_lw_tail;
 ex_lhw:
-        lbui    r5, r4, 0; /* Exception address in r4 */
+        lbui    r5, r3, 0; /* Exception address in r3 */
         /* Load a half-word, byte-by-byte from destination
                 address and save it in tmp space */
         sbi     r5, r0, TOPHYS(ex_tmp_data_loc_0);
-        lbui    r5, r4, 1;
+        lbui    r5, r3, 1;
         sbi     r5, r0, TOPHYS(ex_tmp_data_loc_1);
-        /* Get the destination register value into r3 */
-        lhui    r3, r0, TOPHYS(ex_tmp_data_loc_0);
+        /* Get the destination register value into r4 */
+        lhui    r4, r0, TOPHYS(ex_tmp_data_loc_0);
 ex_lw_tail:
         /* Get the destination register number into r5 */
         lbui    r5, r0, TOPHYS(ex_reg_op);
@@ -502,25 +504,25 @@ ex_sw_tail:
         andi    r6, r6, 0x800; /* Extract ESR[W] */
         beqi    r6, ex_shw;
         /* Get the word - delay slot */
-        swi     r3, r0, TOPHYS(ex_tmp_data_loc_0);
+        swi     r4, r0, TOPHYS(ex_tmp_data_loc_0);
         /* Store the word, byte-by-byte into destination address */
-        lbui    r3, r0, TOPHYS(ex_tmp_data_loc_0);
-        sbi     r3, r4, 0;
-        lbui    r3, r0, TOPHYS(ex_tmp_data_loc_1);
-        sbi     r3, r4, 1;
-        lbui    r3, r0, TOPHYS(ex_tmp_data_loc_2);
-        sbi     r3, r4, 2;
-        lbui    r3, r0, TOPHYS(ex_tmp_data_loc_3);
-        sbi     r3, r4, 3;
+        lbui    r4, r0, TOPHYS(ex_tmp_data_loc_0);
+        sbi     r4, r3, 0;
+        lbui    r4, r0, TOPHYS(ex_tmp_data_loc_1);
+        sbi     r4, r3, 1;
+        lbui    r4, r0, TOPHYS(ex_tmp_data_loc_2);
+        sbi     r4, r3, 2;
+        lbui    r4, r0, TOPHYS(ex_tmp_data_loc_3);
+        sbi     r4, r3, 3;
         bri     ex_handler_done;
 
 ex_shw:
         /* Store the lower half-word, byte-by-byte into destination address */
-        swi     r3, r0, TOPHYS(ex_tmp_data_loc_0);
-        lbui    r3, r0, TOPHYS(ex_tmp_data_loc_2);
-        sbi     r3, r4, 0;
-        lbui    r3, r0, TOPHYS(ex_tmp_data_loc_3);
-        sbi     r3, r4, 1;
+        swi     r4, r0, TOPHYS(ex_tmp_data_loc_0);
+        lbui    r4, r0, TOPHYS(ex_tmp_data_loc_2);
+        sbi     r4, r3, 0;
+        lbui    r4, r0, TOPHYS(ex_tmp_data_loc_3);
+        sbi     r4, r3, 1;
 ex_sw_end: /* Exception handling of store word, ends. */
 
 ex_handler_done:
@@ -560,21 +562,16 @@ ex_handler_done:
                  */
                 mfs     r11, rpid
                 nop
-                bri     4
-                mfs     r3, rear                /* Get faulting address */
-                nop
                 /* If we are faulting a kernel address, we have to use the
                  * kernel page tables.
                  */
-                ori     r4, r0, CONFIG_KERNEL_START
-                cmpu    r4, r3, r4
-                bgti    r4, ex3
+                ori     r5, r0, CONFIG_KERNEL_START
+                cmpu    r5, r3, r5
+                bgti    r5, ex3
                 /* First, check if it was a zone fault (which means a user
                  * tried to access a kernel or read-protected page - always
                  * a SEGV). All other faults here must be stores, so no
                  * need to check ESR_S as well. */
-                mfs     r4, resr
-                nop
                 andi    r4, r4, 0x800           /* ESR_Z - zone protection */
                 bnei    r4, ex2
 
@@ -589,8 +586,6 @@ ex_handler_done:
                  * tried to access a kernel or read-protected page - always
                  * a SEGV). All other faults here must be stores, so no
                  * need to check ESR_S as well. */
-                mfs     r4, resr
-                nop
                 andi    r4, r4, 0x800           /* ESR_Z */
                 bnei    r4, ex2
                 /* get current task address */
@@ -665,8 +660,6 @@ ex_handler_done:
                  * R3 = ESR
                  */
 
-                mfs     r3, rear                /* Get faulting address */
-                nop
                 RESTORE_STATE;
                 bri     page_fault_instr_trap
 
@@ -677,18 +670,15 @@ ex_handler_done:
          */
         handle_data_tlb_miss_exception:
                 /* Working registers already saved: R3, R4, R5, R6
-                 * R3 = ESR
+                 * R3 = EAR, R4 = ESR
                  */
                 mfs     r11, rpid
                 nop
-                bri     4
-                mfs     r3, rear                /* Get faulting address */
-                nop
 
                 /* If we are faulting a kernel address, we have to use the
                  * kernel page tables. */
-                ori     r4, r0, CONFIG_KERNEL_START
-                cmpu    r4, r3, r4
+                ori     r6, r0, CONFIG_KERNEL_START
+                cmpu    r4, r3, r6
                 bgti    r4, ex5
                 ori     r4, r0, swapper_pg_dir
                 mts     rpid, r0                /* TLB will have 0 TID */
@@ -731,9 +721,8 @@ ex_handler_done:
                  * Many of these bits are software only. Bits we don't set
                  * here we (properly should) assume have the appropriate value.
                  */
+                brid    finish_tlb_load
                 andni   r4, r4, 0x0ce2          /* Make sure 20, 21 are zero */
-
-                bri     finish_tlb_load
         ex7:
                 /* The bailout. Restore registers to pre-exception conditions
                  * and call the heavyweights to help us out.
@@ -754,9 +743,6 @@ ex_handler_done:
                  */
                 mfs     r11, rpid
                 nop
-                bri     4
-                mfs     r3, rear                /* Get faulting address */
-                nop
 
                 /* If we are faulting a kernel address, we have to use the
                  * kernel page tables.
@@ -792,7 +778,7 @@ ex_handler_done:
                 lwi     r4, r5, 0               /* Get Linux PTE */
 
                 andi    r6, r4, _PAGE_PRESENT
-                beqi    r6, ex7
+                beqi    r6, ex10
 
                 ori     r4, r4, _PAGE_ACCESSED
                 swi     r4, r5, 0
@@ -805,9 +791,8 @@ ex_handler_done:
                  * Many of these bits are software only. Bits we don't set
                  * here we (properly should) assume have the appropriate value.
                  */
+                brid    finish_tlb_load
                 andni   r4, r4, 0x0ce2          /* Make sure 20, 21 are zero */
-
-                bri     finish_tlb_load
         ex10:
                 /* The bailout. Restore registers to pre-exception conditions
                  * and call the heavyweights to help us out.
@@ -837,9 +822,9 @@ ex_handler_done:
                 andi    r5, r5, (MICROBLAZE_TLB_SIZE-1)
                 ori     r6, r0, 1
                 cmp     r31, r5, r6
-                blti    r31, sem
+                blti    r31, ex12
                 addik   r5, r6, 1
-        sem:
+        ex12:
                 /* MS: save back current TLB index */
                 swi     r5, r0, TOPHYS(tlb_index)
 
@@ -859,7 +844,6 @@ ex_handler_done:
                 nop
 
                 /* Done...restore registers and get out of here. */
-        ex12:
                 mts     rpid, r11
                 nop
                 bri 4
diff --git a/arch/microblaze/kernel/irq.c b/arch/microblaze/kernel/irq.c
index 0f06034d1fe..6f39e2c001f 100644
--- a/arch/microblaze/kernel/irq.c
+++ b/arch/microblaze/kernel/irq.c
@@ -93,3 +93,18 @@ skip:
         }
         return 0;
 }
+
+/* MS: There is no any advance mapping mechanism. We are using simple 32bit
+  intc without any cascades or any connection that's why mapping is 1:1 */
+unsigned int irq_create_mapping(struct irq_host *host, irq_hw_number_t hwirq)
+{
+        return hwirq;
+}
+EXPORT_SYMBOL_GPL(irq_create_mapping);
+
+unsigned int irq_create_of_mapping(struct device_node *controller,
+                                        u32 *intspec, unsigned int intsize)
+{
+        return intspec[0];
+}
+EXPORT_SYMBOL_GPL(irq_create_of_mapping);
diff --git a/arch/microblaze/kernel/misc.S b/arch/microblaze/kernel/misc.S
index df16c6287a8..7cf86498326 100644
--- a/arch/microblaze/kernel/misc.S
+++ b/arch/microblaze/kernel/misc.S
@@ -26,9 +26,10 @@
  * We avoid flushing the pinned 0, 1 and possibly 2 entries.
  */
 .globl _tlbia;
+.type  _tlbia, @function
 .align 4;
 _tlbia:
-        addik   r12, r0, 63 /* flush all entries (63 - 3) */
+        addik   r12, r0, MICROBLAZE_TLB_SIZE - 1 /* flush all entries (63 - 3) */
         /* isync */
 _tlbia_1:
         mts     rtlbx, r12
@@ -41,11 +42,13 @@ _tlbia_1:
         /* sync */
         rtsd    r15, 8
         nop
+        .size  _tlbia, . - _tlbia
 
 /*
  * Flush MMU TLB for a particular address (in r5)
  */
 .globl _tlbie;
+.type  _tlbie, @function
 .align 4;
 _tlbie:
         mts     rtlbsx, r5 /* look up the address in TLB */
@@ -59,17 +62,20 @@ _tlbie_1:
         rtsd    r15, 8
         nop
 
+        .size  _tlbie, . - _tlbie
+
 /*
  * Allocate TLB entry for early console
  */
 .globl early_console_reg_tlb_alloc;
+.type  early_console_reg_tlb_alloc, @function
 .align 4;
 early_console_reg_tlb_alloc:
         /*
          * Load a TLB entry for the UART, so that microblaze_progress() can use
          * the UARTs nice and early.  We use a 4k real==virtual mapping.
          */
-        ori     r4, r0, 63
+        ori     r4, r0, MICROBLAZE_TLB_SIZE - 1
         mts     rtlbx, r4 /* TLB slot 2 */
 
         or      r4,r5,r0
@@ -86,6 +92,8 @@ early_console_reg_tlb_alloc:
         rtsd    r15, 8
         nop
 
+        .size  early_console_reg_tlb_alloc, . - early_console_reg_tlb_alloc
+
 /*
  * Copy a whole page (4096 bytes).
  */
@@ -104,6 +112,7 @@ early_console_reg_tlb_alloc:
 #define DCACHE_LINE_BYTES (4 * 4)
 
 .globl copy_page;
+.type  copy_page, @function
 .align 4;
 copy_page:
         ori     r11, r0, (PAGE_SIZE/DCACHE_LINE_BYTES) - 1
@@ -118,3 +127,5 @@ _copy_page_loop:
         addik   r11, r11, -1
         rtsd    r15, 8
         nop
+
+        .size  copy_page, . - copy_page
diff --git a/arch/microblaze/kernel/module.c b/arch/microblaze/kernel/module.c
index 5a45b1adfef..cbecf110dc3 100644
--- a/arch/microblaze/kernel/module.c
+++ b/arch/microblaze/kernel/module.c
@@ -12,7 +12,6 @@
 #include <linux/kernel.h>
 #include <linux/elf.h>
 #include <linux/vmalloc.h>
-#include <linux/slab.h>
 #include <linux/fs.h>
 #include <linux/string.h>
 
diff --git a/arch/microblaze/kernel/of_platform.c b/arch/microblaze/kernel/of_platform.c
index 1c6d684996d..0dc755286d3 100644
--- a/arch/microblaze/kernel/of_platform.c
+++ b/arch/microblaze/kernel/of_platform.c
@@ -17,7 +17,6 @@
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/mod_devicetable.h>
-#include <linux/slab.h>
 #include <linux/pci.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
diff --git a/arch/microblaze/kernel/process.c b/arch/microblaze/kernel/process.c
index 812f1bf06c9..09bed44dfcd 100644
--- a/arch/microblaze/kernel/process.c
+++ b/arch/microblaze/kernel/process.c
@@ -15,6 +15,7 @@
 #include <linux/bitops.h>
 #include <asm/system.h>
 #include <asm/pgalloc.h>
+#include <asm/uaccess.h> /* for USER_DS macros */
 #include <asm/cacheflush.h>
 
 void show_regs(struct pt_regs *regs)
@@ -74,7 +75,10 @@ __setup("hlt", hlt_setup);
 
 void default_idle(void)
 {
-        if (!hlt_counter) {
+        if (likely(hlt_counter)) {
+                while (!need_resched())
+                        cpu_relax();
+        } else {
                 clear_thread_flag(TIF_POLLING_NRFLAG);
                 smp_mb__after_clear_bit();
                 local_irq_disable();
@@ -82,9 +86,7 @@ void default_idle(void)
                         cpu_sleep();
                 local_irq_enable();
                 set_thread_flag(TIF_POLLING_NRFLAG);
-        } else
-                while (!need_resched())
-                        cpu_relax();
+        }
 }
 
 void cpu_idle(void)
diff --git a/arch/microblaze/kernel/ptrace.c b/arch/microblaze/kernel/ptrace.c
index 4b3ac32754d..a4a7770c614 100644
--- a/arch/microblaze/kernel/ptrace.c
+++ b/arch/microblaze/kernel/ptrace.c
@@ -75,29 +75,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
 {
         int rval;
         unsigned long val = 0;
-        unsigned long copied;
 
         switch (request) {
-        case PTRACE_PEEKTEXT: /* read word at location addr. */
-        case PTRACE_PEEKDATA:
-                pr_debug("PEEKTEXT/PEEKDATA at %08lX\n", addr);
-                copied = access_process_vm(child, addr, &val, sizeof(val), 0);
-                rval = -EIO;
-                if (copied != sizeof(val))
-                        break;
-                rval = put_user(val, (unsigned long *)data);
-                break;
-
-        case PTRACE_POKETEXT: /* write the word at location addr. */
-        case PTRACE_POKEDATA:
-                pr_debug("POKETEXT/POKEDATA to %08lX\n", addr);
-                rval = 0;
-                if (access_process_vm(child, addr, &data, sizeof(data), 1)
-                    == sizeof(data))
-                        break;
-                rval = -EIO;
-                break;
-
         /* Read/write the word at location ADDR in the registers. */
         case PTRACE_PEEKUSR:
         case PTRACE_POKEUSR:
@@ -130,50 +109,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 if (rval == 0 && request == PTRACE_PEEKUSR)
                         rval = put_user(val, (unsigned long *)data);
                 break;
-        /* Continue and stop at next (return from) syscall */
-        case PTRACE_SYSCALL:
-                pr_debug("PTRACE_SYSCALL\n");
-        case PTRACE_SINGLESTEP:
-                pr_debug("PTRACE_SINGLESTEP\n");
-        /* Restart after a signal.  */
-        case PTRACE_CONT:
-                pr_debug("PTRACE_CONT\n");
-                rval = -EIO;
-                if (!valid_signal(data))
-                        break;
-
-                if (request == PTRACE_SYSCALL)
-                        set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                else
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-
-                child->exit_code = data;
-                pr_debug("wakeup_process\n");
-                wake_up_process(child);
-                rval = 0;
-                break;
-
-        /*
-         * make the child exit.  Best I can do is send it a sigkill.
-         * perhaps it should be put in the status that it wants to
-         * exit.
-         */
-        case PTRACE_KILL:
-                pr_debug("PTRACE_KILL\n");
-                rval = 0;
-                if (child->exit_state == EXIT_ZOMBIE)   /* already dead */
-                        break;
-                child->exit_code = SIGKILL;
-                wake_up_process(child);
-                break;
-
-        case PTRACE_DETACH: /* detach a process that was attached. */
-                pr_debug("PTRACE_DETACH\n");
-                rval = ptrace_detach(child, data);
-                break;
         default:
-                /* rval = ptrace_request(child, request, addr, data); noMMU */
-                rval = -EIO;
+                rval = ptrace_request(child, request, addr, data);
         }
         return rval;
 }
diff --git a/arch/microblaze/kernel/setup.c b/arch/microblaze/kernel/setup.c
index bb8c4b9ccb8..17c98dbcec8 100644
--- a/arch/microblaze/kernel/setup.c
+++ b/arch/microblaze/kernel/setup.c
@@ -22,7 +22,10 @@
 #include <linux/io.h>
 #include <linux/bug.h>
 #include <linux/param.h>
+#include <linux/pci.h>
 #include <linux/cache.h>
+#include <linux/of_platform.h>
+#include <linux/dma-mapping.h>
 #include <asm/cacheflush.h>
 #include <asm/entry.h>
 #include <asm/cpuinfo.h>
@@ -54,14 +57,10 @@ void __init setup_arch(char **cmdline_p)
 
         microblaze_cache_init();
 
-        invalidate_dcache();
-        enable_dcache();
-
-        invalidate_icache();
-        enable_icache();
-
         setup_memory();
 
+        xilinx_pci_init();
+
 #if defined(CONFIG_SELFMOD_INTC) || defined(CONFIG_SELFMOD_TIMER)
         printk(KERN_NOTICE "Self modified code enable\n");
 #endif
@@ -93,6 +92,12 @@ inline unsigned get_romfs_len(unsigned *addr)
 }
 #endif  /* CONFIG_MTD_UCLINUX_EBSS */
 
+#if defined(CONFIG_EARLY_PRINTK) && defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
+#define eprintk early_printk
+#else
+#define eprintk printk
+#endif
+
 void __init machine_early_init(const char *cmdline, unsigned int ram,
                 unsigned int fdt, unsigned int msr)
 {
@@ -140,32 +145,32 @@ void __init machine_early_init(const char *cmdline, unsigned int ram,
         setup_early_printk(NULL);
 #endif
 
-        early_printk("Ramdisk addr 0x%08x, ", ram);
+        eprintk("Ramdisk addr 0x%08x, ", ram);
         if (fdt)
-                early_printk("FDT at 0x%08x\n", fdt);
+                eprintk("FDT at 0x%08x\n", fdt);
         else
-                early_printk("Compiled-in FDT at 0x%08x\n",
+                eprintk("Compiled-in FDT at 0x%08x\n",
                                         (unsigned int)_fdt_start);
 
 #ifdef CONFIG_MTD_UCLINUX
-        early_printk("Found romfs @ 0x%08x (0x%08x)\n",
+        eprintk("Found romfs @ 0x%08x (0x%08x)\n",
                         romfs_base, romfs_size);
-        early_printk("#### klimit %p ####\n", old_klimit);
+        eprintk("#### klimit %p ####\n", old_klimit);
         BUG_ON(romfs_size < 0); /* What else can we do? */
 
-        early_printk("Moved 0x%08x bytes from 0x%08x to 0x%08x\n",
+        eprintk("Moved 0x%08x bytes from 0x%08x to 0x%08x\n",
                         romfs_size, romfs_base, (unsigned)&_ebss);
 
-        early_printk("New klimit: 0x%08x\n", (unsigned)klimit);
+        eprintk("New klimit: 0x%08x\n", (unsigned)klimit);
 #endif
 
 #if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
         if (msr)
-                early_printk("!!!Your kernel has setup MSR instruction but "
+                eprintk("!!!Your kernel has setup MSR instruction but "
                                 "CPU don't have it %d\n", msr);
 #else
         if (!msr)
-                early_printk("!!!Your kernel not setup MSR instruction but "
+                eprintk("!!!Your kernel not setup MSR instruction but "
                                 "CPU have it %d\n", msr);
 #endif
 
@@ -188,3 +193,37 @@ static int microblaze_debugfs_init(void)
 }
 arch_initcall(microblaze_debugfs_init);
 #endif
+
+static int dflt_bus_notify(struct notifier_block *nb,
+                                unsigned long action, void *data)
+{
+        struct device *dev = data;
+
+        /* We are only intereted in device addition */
+        if (action != BUS_NOTIFY_ADD_DEVICE)
+                return 0;
+
+        set_dma_ops(dev, &dma_direct_ops);
+
+        return NOTIFY_DONE;
+}
+
+static struct notifier_block dflt_plat_bus_notifier = {
+        .notifier_call = dflt_bus_notify,
+        .priority = INT_MAX,
+};
+
+static struct notifier_block dflt_of_bus_notifier = {
+        .notifier_call = dflt_bus_notify,
+        .priority = INT_MAX,
+};
+
+static int __init setup_bus_notifier(void)
+{
+        bus_register_notifier(&platform_bus_type, &dflt_plat_bus_notifier);
+        bus_register_notifier(&of_platform_bus_type, &dflt_of_bus_notifier);
+
+        return 0;
+}
+
+arch_initcall(setup_bus_notifier);
diff --git a/arch/microblaze/kernel/sys_microblaze.c b/arch/microblaze/kernel/sys_microblaze.c
index 9f3c205fb75..f4e00b7f125 100644
--- a/arch/microblaze/kernel/sys_microblaze.c
+++ b/arch/microblaze/kernel/sys_microblaze.c
@@ -30,6 +30,7 @@
 #include <linux/semaphore.h>
 #include <linux/uaccess.h>
 #include <linux/unistd.h>
+#include <linux/slab.h>
 
 #include <asm/syscalls.h>
 
diff --git a/arch/microblaze/kernel/traps.c b/arch/microblaze/kernel/traps.c
index eaaaf805f31..5e4570ef515 100644
--- a/arch/microblaze/kernel/traps.c
+++ b/arch/microblaze/kernel/traps.c
@@ -22,13 +22,11 @@ void trap_init(void)
         __enable_hw_exceptions();
 }
 
-static int kstack_depth_to_print = 24;
+static unsigned long kstack_depth_to_print = 24;
 
 static int __init kstack_setup(char *s)
 {
-        kstack_depth_to_print = strict_strtoul(s, 0, NULL);
-
-        return 1;
+        return !strict_strtoul(s, 0, &kstack_depth_to_print);
 }
 __setup("kstack=", kstack_setup);
 
diff --git a/arch/microblaze/lib/Makefile b/arch/microblaze/lib/Makefile
index b579db068c0..4dfe47d3cd9 100644
--- a/arch/microblaze/lib/Makefile
+++ b/arch/microblaze/lib/Makefile
@@ -10,5 +10,4 @@ else
 lib-y += memcpy.o memmove.o
 endif
 
-lib-$(CONFIG_NO_MMU) += uaccess.o
-lib-$(CONFIG_MMU) += uaccess_old.o
+lib-y += uaccess_old.o
diff --git a/arch/microblaze/lib/fastcopy.S b/arch/microblaze/lib/fastcopy.S
index 02e3ab4eddf..fdc48bb065d 100644
--- a/arch/microblaze/lib/fastcopy.S
+++ b/arch/microblaze/lib/fastcopy.S
@@ -30,8 +30,9 @@
  */
 
 #include <linux/linkage.h>
-
+        .text
         .globl  memcpy
+        .type  memcpy, @function
         .ent    memcpy
 
 memcpy:
@@ -345,9 +346,11 @@ a_done:
         rtsd    r15, 8
         nop
 
+.size  memcpy, . - memcpy
 .end memcpy
 /*----------------------------------------------------------------------------*/
         .globl  memmove
+        .type  memmove, @function
         .ent    memmove
 
 memmove:
@@ -659,4 +662,5 @@ d_done:
         rtsd    r15, 8
         nop
 
+.size  memmove, . - memmove
 .end memmove
diff --git a/arch/microblaze/lib/memcpy.c b/arch/microblaze/lib/memcpy.c
index cc2108b6b26..014bac92bdf 100644
--- a/arch/microblaze/lib/memcpy.c
+++ b/arch/microblaze/lib/memcpy.c
@@ -53,7 +53,7 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
         const uint32_t *i_src;
         uint32_t *i_dst;
 
-        if (c >= 4) {
+        if (likely(c >= 4)) {
                 unsigned  value, buf_hold;
 
                 /* Align the dstination to a word boundry. */
diff --git a/arch/microblaze/lib/memset.c b/arch/microblaze/lib/memset.c
index 4df851d41a2..ecfb663e1fc 100644
--- a/arch/microblaze/lib/memset.c
+++ b/arch/microblaze/lib/memset.c
@@ -33,22 +33,23 @@
 #ifdef __HAVE_ARCH_MEMSET
 void *memset(void *v_src, int c, __kernel_size_t n)
 {
-
         char *src = v_src;
 #ifdef CONFIG_OPT_LIB_FUNCTION
         uint32_t *i_src;
-        uint32_t w32;
+        uint32_t w32 = 0;
 #endif
         /* Truncate c to 8 bits */
         c = (c & 0xFF);
 
 #ifdef CONFIG_OPT_LIB_FUNCTION
-        /* Make a repeating word out of it */
-        w32 = c;
-        w32 |= w32 << 8;
-        w32 |= w32 << 16;
+        if (unlikely(c)) {
+                /* Make a repeating word out of it */
+                w32 = c;
+                w32 |= w32 << 8;
+                w32 |= w32 << 16;
+        }
 
-        if (n >= 4) {
+        if (likely(n >= 4)) {
                 /* Align the destination to a word boundary */
                 /* This is done in an endian independant manner */
                 switch ((unsigned) src & 3) {
diff --git a/arch/microblaze/lib/uaccess.c b/arch/microblaze/lib/uaccess.c
deleted file mode 100644
index a853fe089c4..00000000000
--- a/arch/microblaze/lib/uaccess.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#include <linux/string.h>
-#include <asm/uaccess.h>
-
-#include <asm/bug.h>
-
-long strnlen_user(const char __user *src, long count)
-{
-        return strlen(src) + 1;
-}
-
-#define __do_strncpy_from_user(dst, src, count, res)                    \
-        do {                                                            \
-                char *tmp;                                              \
-                strncpy(dst, src, count);                               \
-                for (tmp = dst; *tmp && count > 0; tmp++, count--)      \
-                        ;                                               \
-                res = (tmp - dst);                                      \
-        } while (0)
-
-long __strncpy_from_user(char *dst, const char __user *src, long count)
-{
-        long res;
-        __do_strncpy_from_user(dst, src, count, res);
-        return res;
-}
-
-long strncpy_from_user(char *dst, const char __user *src, long count)
-{
-        long res = -EFAULT;
-        if (access_ok(VERIFY_READ, src, 1))
-                __do_strncpy_from_user(dst, src, count, res);
-        return res;
-}
-
-unsigned long __copy_tofrom_user(void __user *to,
-                const void __user *from, unsigned long size)
-{
-        memcpy(to, from, size);
-        return 0;
-}
diff --git a/arch/microblaze/lib/uaccess_old.S b/arch/microblaze/lib/uaccess_old.S
index 67f991c14b8..5810cec54a7 100644
--- a/arch/microblaze/lib/uaccess_old.S
+++ b/arch/microblaze/lib/uaccess_old.S
@@ -22,6 +22,7 @@
 
         .text
 .globl __strncpy_user;
+.type  __strncpy_user, @function
 .align 4;
 __strncpy_user:
 
@@ -50,7 +51,7 @@ __strncpy_user:
 3:
         rtsd    r15,8
         nop
-
+        .size   __strncpy_user, . - __strncpy_user
 
         .section        .fixup, "ax"
         .align  2
@@ -72,6 +73,7 @@ __strncpy_user:
 
         .text
 .globl __strnlen_user;
+.type  __strnlen_user, @function
 .align 4;
 __strnlen_user:
         addik   r3,r6,0
@@ -90,7 +92,7 @@ __strnlen_user:
 3:
         rtsd    r15,8
         nop
-
+        .size   __strnlen_user, . - __strnlen_user
 
         .section        .fixup,"ax"
 4:
@@ -108,6 +110,7 @@ __strnlen_user:
  */
         .text
 .globl __copy_tofrom_user;
+.type  __copy_tofrom_user, @function
 .align 4;
 __copy_tofrom_user:
         /*
@@ -116,20 +119,34 @@ __copy_tofrom_user:
          * r7, r3 - count
          * r4 - tempval
          */
-        addik   r3,r7,0
-        beqi    r3,3f
-1:
-        lbu     r4,r6,r0
-        addik   r6,r6,1
-2:
-        sb      r4,r5,r0
-        addik   r3,r3,-1
-        bneid   r3,1b
-        addik   r5,r5,1         /* delay slot */
+        beqid   r7, 3f /* zero size is not likely */
+        andi    r3, r7, 0x3 /* filter add count */
+        bneid   r3, 4f /* if is odd value then byte copying */
+        or      r3, r5, r6 /* find if is any to/from unaligned */
+        andi    r3, r3, 0x3 /* mask unaligned */
+        bneid   r3, 1f /* it is unaligned -> then jump */
+        or      r3, r0, r0
+
+/* at least one 4 byte copy */
+5:      lw      r4, r6, r3
+6:      sw      r4, r5, r3
+        addik   r7, r7, -4
+        bneid   r7, 5b
+        addik   r3, r3, 4
+        addik   r3, r7, 0
+        rtsd    r15, 8
+        nop
+4:      or      r3, r0, r0
+1:      lbu     r4,r6,r3
+2:      sb      r4,r5,r3
+        addik   r7,r7,-1
+        bneid   r7,1b
+        addik   r3,r3,1         /* delay slot */
 3:
+        addik   r3,r7,0
         rtsd    r15,8
         nop
-
+        .size   __copy_tofrom_user, . - __copy_tofrom_user
 
         .section        __ex_table,"a"
-        .word   1b,3b,2b,3b
+        .word   1b,3b,2b,3b,5b,3b,6b,3b
diff --git a/arch/microblaze/mm/Makefile b/arch/microblaze/mm/Makefile
index 6c8a924d9e2..09c49ed8723 100644
--- a/arch/microblaze/mm/Makefile
+++ b/arch/microblaze/mm/Makefile
@@ -2,6 +2,6 @@
 # Makefile
 #
 
-obj-y := init.o
+obj-y := consistent.o init.o
 
 obj-$(CONFIG_MMU) += pgtable.o mmu_context.o fault.o
diff --git a/arch/microblaze/mm/consistent.c b/arch/microblaze/mm/consistent.c
new file mode 100644
index 00000000000..f956e24fe49
--- /dev/null
+++ b/arch/microblaze/mm/consistent.c
@@ -0,0 +1,247 @@
+/*
+ * Microblaze support for cache consistent memory.
+ * Copyright (C) 2010 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2010 PetaLogix
+ * Copyright (C) 2005 John Williams <jwilliams@itee.uq.edu.au>
+ *
+ * Based on PowerPC version derived from arch/arm/mm/consistent.c
+ * Copyright (C) 2001 Dan Malek (dmalek@jlc.net)
+ * Copyright (C) 2000 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/ptrace.h>
+#include <linux/mman.h>
+#include <linux/mm.h>
+#include <linux/swap.h>
+#include <linux/stddef.h>
+#include <linux/vmalloc.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/bootmem.h>
+#include <linux/highmem.h>
+#include <linux/pci.h>
+#include <linux/interrupt.h>
+#include <linux/gfp.h>
+
+#include <asm/pgalloc.h>
+#include <linux/io.h>
+#include <linux/hardirq.h>
+#include <asm/mmu_context.h>
+#include <asm/mmu.h>
+#include <linux/uaccess.h>
+#include <asm/pgtable.h>
+#include <asm/cpuinfo.h>
+
+#ifndef CONFIG_MMU
+
+/* I have to use dcache values because I can't relate on ram size */
+#define UNCACHED_SHADOW_MASK (cpuinfo.dcache_high - cpuinfo.dcache_base + 1)
+
+/*
+ * Consistent memory allocators. Used for DMA devices that want to
+ * share uncached memory with the processor core.
+ * My crufty no-MMU approach is simple. In the HW platform we can optionally
+ * mirror the DDR up above the processor cacheable region.  So, memory accessed
+ * in this mirror region will not be cached.  It's alloced from the same
+ * pool as normal memory, but the handle we return is shifted up into the
+ * uncached region.  This will no doubt cause big problems if memory allocated
+ * here is not also freed properly. -- JW
+ */
+void *consistent_alloc(int gfp, size_t size, dma_addr_t *dma_handle)
+{
+        struct page *page, *end, *free;
+        unsigned long order;
+        void *ret, *virt;
+
+        if (in_interrupt())
+                BUG();
+
+        size = PAGE_ALIGN(size);
+        order = get_order(size);
+
+        page = alloc_pages(gfp, order);
+        if (!page)
+                goto no_page;
+
+        /* We could do with a page_to_phys and page_to_bus here. */
+        virt = page_address(page);
+        ret = ioremap(virt_to_phys(virt), size);
+        if (!ret)
+                goto no_remap;
+
+        /*
+         * Here's the magic!  Note if the uncached shadow is not implemented,
+         * it's up to the calling code to also test that condition and make
+         * other arranegments, such as manually flushing the cache and so on.
+         */
+#ifdef CONFIG_XILINX_UNCACHED_SHADOW
+        ret = (void *)((unsigned) ret | UNCACHED_SHADOW_MASK);
+#endif
+        /* dma_handle is same as physical (shadowed) address */
+        *dma_handle = (dma_addr_t)ret;
+
+        /*
+         * free wasted pages.  We skip the first page since we know
+         * that it will have count = 1 and won't require freeing.
+         * We also mark the pages in use as reserved so that
+         * remap_page_range works.
+         */
+        page = virt_to_page(virt);
+        free = page + (size >> PAGE_SHIFT);
+        end  = page + (1 << order);
+
+        for (; page < end; page++) {
+                init_page_count(page);
+                if (page >= free)
+                        __free_page(page);
+                else
+                        SetPageReserved(page);
+        }
+
+        return ret;
+no_remap:
+        __free_pages(page, order);
+no_page:
+        return NULL;
+}
+
+#else
+
+void *consistent_alloc(int gfp, size_t size, dma_addr_t *dma_handle)
+{
+        int order, err, i;
+        unsigned long page, va, flags;
+        phys_addr_t pa;
+        struct vm_struct *area;
+        void     *ret;
+
+        if (in_interrupt())
+                BUG();
+
+        /* Only allocate page size areas. */
+        size = PAGE_ALIGN(size);
+        order = get_order(size);
+
+        page = __get_free_pages(gfp, order);
+        if (!page) {
+                BUG();
+                return NULL;
+        }
+
+        /*
+         * we need to ensure that there are no cachelines in use,
+         * or worse dirty in this area.
+         */
+        flush_dcache_range(virt_to_phys(page), virt_to_phys(page) + size);
+
+        /* Allocate some common virtual space to map the new pages. */
+        area = get_vm_area(size, VM_ALLOC);
+        if (area == NULL) {
+                free_pages(page, order);
+                return NULL;
+        }
+        va = (unsigned long) area->addr;
+        ret = (void *)va;
+
+        /* This gives us the real physical address of the first page. */
+        *dma_handle = pa = virt_to_bus((void *)page);
+
+        /* MS: This is the whole magic - use cache inhibit pages */
+        flags = _PAGE_KERNEL | _PAGE_NO_CACHE;
+
+        /*
+         * Set refcount=1 on all pages in an order>0
+         * allocation so that vfree() will actually
+         * free all pages that were allocated.
+         */
+        if (order > 0) {
+                struct page *rpage = virt_to_page(page);
+                for (i = 1; i < (1 << order); i++)
+                        init_page_count(rpage+i);
+        }
+
+        err = 0;
+        for (i = 0; i < size && err == 0; i += PAGE_SIZE)
+                err = map_page(va+i, pa+i, flags);
+
+        if (err) {
+                vfree((void *)va);
+                return NULL;
+        }
+
+        return ret;
+}
+#endif /* CONFIG_MMU */
+EXPORT_SYMBOL(consistent_alloc);
+
+/*
+ * free page(s) as defined by the above mapping.
+ */
+void consistent_free(void *vaddr)
+{
+        if (in_interrupt())
+                BUG();
+
+        /* Clear SHADOW_MASK bit in address, and free as per usual */
+#ifdef CONFIG_XILINX_UNCACHED_SHADOW
+        vaddr = (void *)((unsigned)vaddr & ~UNCACHED_SHADOW_MASK);
+#endif
+        vfree(vaddr);
+}
+EXPORT_SYMBOL(consistent_free);
+
+/*
+ * make an area consistent.
+ */
+void consistent_sync(void *vaddr, size_t size, int direction)
+{
+        unsigned long start;
+        unsigned long end;
+
+        start = (unsigned long)vaddr;
+
+        /* Convert start address back down to unshadowed memory region */
+#ifdef CONFIG_XILINX_UNCACHED_SHADOW
+        start &= ~UNCACHED_SHADOW_MASK;
+#endif
+        end = start + size;
+
+        switch (direction) {
+        case PCI_DMA_NONE:
+                BUG();
+        case PCI_DMA_FROMDEVICE:        /* invalidate only */
+                flush_dcache_range(start, end);
+                break;
+        case PCI_DMA_TODEVICE:          /* writeback only */
+                flush_dcache_range(start, end);
+                break;
+        case PCI_DMA_BIDIRECTIONAL:     /* writeback and invalidate */
+                flush_dcache_range(start, end);
+                break;
+        }
+}
+EXPORT_SYMBOL(consistent_sync);
+
+/*
+ * consistent_sync_page makes memory consistent. identical
+ * to consistent_sync, but takes a struct page instead of a
+ * virtual address
+ */
+void consistent_sync_page(struct page *page, unsigned long offset,
+        size_t size, int direction)
+{
+        unsigned long start = (unsigned long)page_address(page) + offset;
+        consistent_sync((void *)start, size, direction);
+}
+EXPORT_SYMBOL(consistent_sync_page);
diff --git a/arch/microblaze/mm/fault.c b/arch/microblaze/mm/fault.c
index d9d249a66ff..7af87f4b2c2 100644
--- a/arch/microblaze/mm/fault.c
+++ b/arch/microblaze/mm/fault.c
@@ -106,7 +106,7 @@ void do_page_fault(struct pt_regs *regs, unsigned long address,
         regs->esr = error_code;
 
         /* On a kernel SLB miss we can only check for a valid exception entry */
-        if (kernel_mode(regs) && (address >= TASK_SIZE)) {
+        if (unlikely(kernel_mode(regs) && (address >= TASK_SIZE))) {
                 printk(KERN_WARNING "kernel task_size exceed");
                 _exception(SIGSEGV, regs, code, address);
         }
@@ -122,7 +122,7 @@ void do_page_fault(struct pt_regs *regs, unsigned long address,
         }
 #endif /* CONFIG_KGDB */
 
-        if (in_atomic() || !mm) {
+        if (unlikely(in_atomic() || !mm)) {
                 if (kernel_mode(regs))
                         goto bad_area_nosemaphore;
 
@@ -150,7 +150,7 @@ void do_page_fault(struct pt_regs *regs, unsigned long address,
          * source.  If this is invalid we can skip the address space check,
          * thus avoiding the deadlock.
          */
-        if (!down_read_trylock(&mm->mmap_sem)) {
+        if (unlikely(!down_read_trylock(&mm->mmap_sem))) {
                 if (kernel_mode(regs) && !search_exception_tables(regs->pc))
                         goto bad_area_nosemaphore;
 
@@ -158,16 +158,16 @@ void do_page_fault(struct pt_regs *regs, unsigned long address,
         }
 
         vma = find_vma(mm, address);
-        if (!vma)
+        if (unlikely(!vma))
                 goto bad_area;
 
         if (vma->vm_start <= address)
                 goto good_area;
 
-        if (!(vma->vm_flags & VM_GROWSDOWN))
+        if (unlikely(!(vma->vm_flags & VM_GROWSDOWN)))
                 goto bad_area;
 
-        if (!is_write)
+        if (unlikely(!is_write))
                 goto bad_area;
 
         /*
@@ -179,7 +179,7 @@ void do_page_fault(struct pt_regs *regs, unsigned long address,
          * before setting the user r1.  Thus we allow the stack to
          * expand to 1MB without further checks.
          */
-        if (address + 0x100000 < vma->vm_end) {
+        if (unlikely(address + 0x100000 < vma->vm_end)) {
 
                 /* get user regs even if this fault is in kernel mode */
                 struct pt_regs *uregs = current->thread.regs;
@@ -209,15 +209,15 @@ good_area:
         code = SEGV_ACCERR;
 
         /* a write */
-        if (is_write) {
-                if (!(vma->vm_flags & VM_WRITE))
+        if (unlikely(is_write)) {
+                if (unlikely(!(vma->vm_flags & VM_WRITE)))
                         goto bad_area;
         /* a read */
         } else {
                 /* protection fault */
-                if (error_code & 0x08000000)
+                if (unlikely(error_code & 0x08000000))
                         goto bad_area;
-                if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
+                if (unlikely(!(vma->vm_flags & (VM_READ | VM_EXEC))))
                         goto bad_area;
         }
 
@@ -235,7 +235,7 @@ survive:
                         goto do_sigbus;
                 BUG();
         }
-        if (fault & VM_FAULT_MAJOR)
+        if (unlikely(fault & VM_FAULT_MAJOR))
                 current->maj_flt++;
         else
                 current->min_flt++;
diff --git a/arch/microblaze/mm/init.c b/arch/microblaze/mm/init.c
index a57cedf3671..f42c2dde8b1 100644
--- a/arch/microblaze/mm/init.c
+++ b/arch/microblaze/mm/init.c
@@ -15,6 +15,7 @@
 #include <linux/initrd.h>
 #include <linux/pagemap.h>
 #include <linux/pfn.h>
+#include <linux/slab.h>
 #include <linux/swap.h>
 
 #include <asm/page.h>
@@ -23,6 +24,9 @@
 #include <asm/sections.h>
 #include <asm/tlb.h>
 
+/* Use for MMU and noMMU because of PCI generic code */
+int mem_init_done;
+
 #ifndef CONFIG_MMU
 unsigned int __page_offset;
 EXPORT_SYMBOL(__page_offset);
@@ -30,7 +34,6 @@ EXPORT_SYMBOL(__page_offset);
 #else
 DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
 
-int mem_init_done;
 static int init_bootmem_done;
 #endif /* CONFIG_MMU */
 
@@ -163,7 +166,6 @@ void free_init_pages(char *what, unsigned long begin, unsigned long end)
         for (addr = begin; addr < end; addr += PAGE_SIZE) {
                 ClearPageReserved(virt_to_page(addr));
                 init_page_count(virt_to_page(addr));
-                memset((void *)addr, 0xcc, PAGE_SIZE);
                 free_page(addr);
                 totalram_pages++;
         }
@@ -193,12 +195,6 @@ void free_initmem(void)
                         (unsigned long)(&__init_end));
 }
 
-/* FIXME from arch/powerpc/mm/mem.c*/
-void show_mem(void)
-{
-        printk(KERN_NOTICE "%s\n", __func__);
-}
-
 void __init mem_init(void)
 {
         high_memory = (void *)__va(memory_end);
@@ -208,20 +204,14 @@ void __init mem_init(void)
         printk(KERN_INFO "Memory: %luk/%luk available\n",
                nr_free_pages() << (PAGE_SHIFT-10),
                num_physpages << (PAGE_SHIFT-10));
-#ifdef CONFIG_MMU
         mem_init_done = 1;
-#endif
 }
 
 #ifndef CONFIG_MMU
-/* Check against bounds of physical memory */
-int ___range_ok(unsigned long addr, unsigned long size)
+int page_is_ram(unsigned long pfn)
 {
-        return ((addr < memory_start) ||
-                ((addr + size) > memory_end));
+        return __range_ok(pfn, 0);
 }
-EXPORT_SYMBOL(___range_ok);
-
 #else
 int page_is_ram(unsigned long pfn)
 {
@@ -349,4 +339,27 @@ void __init *early_get_page(void)
         }
         return p;
 }
+
 #endif /* CONFIG_MMU */
+
+void * __init_refok alloc_maybe_bootmem(size_t size, gfp_t mask)
+{
+        if (mem_init_done)
+                return kmalloc(size, mask);
+        else
+                return alloc_bootmem(size);
+}
+
+void * __init_refok zalloc_maybe_bootmem(size_t size, gfp_t mask)
+{
+        void *p;
+
+        if (mem_init_done)
+                p = kzalloc(size, mask);
+        else {
+                p = alloc_bootmem(size);
+                if (p)
+                        memset(p, 0, size);
+        }
+        return p;
+}
diff --git a/arch/microblaze/mm/pgtable.c b/arch/microblaze/mm/pgtable.c
index 2820081b21a..d31312cde6e 100644
--- a/arch/microblaze/mm/pgtable.c
+++ b/arch/microblaze/mm/pgtable.c
@@ -103,7 +103,7 @@ static void __iomem *__ioremap(phys_addr_t addr, unsigned long size,
                 area = get_vm_area(size, VM_IOREMAP);
                 if (area == NULL)
                         return NULL;
-                v = VMALLOC_VMADDR(area->addr);
+                v = (unsigned long) area->addr;
         } else {
                 v = (ioremap_bot -= size);
         }
@@ -154,7 +154,7 @@ int map_page(unsigned long va, phys_addr_t pa, int flags)
                 err = 0;
                 set_pte_at(&init_mm, va, pg, pfn_pte(pa >> PAGE_SHIFT,
                                 __pgprot(flags)));
-                if (mem_init_done)
+                if (unlikely(mem_init_done))
                         flush_HPTE(0, va, pmd_val(*pd));
                         /* flush_HPTE(0, va, pg); */
         }
diff --git a/arch/microblaze/pci/Makefile b/arch/microblaze/pci/Makefile
new file mode 100644
index 00000000000..9889cc2e129
--- /dev/null
+++ b/arch/microblaze/pci/Makefile
@@ -0,0 +1,6 @@
+#
+# Makefile
+#
+
+obj-$(CONFIG_PCI)               += pci_32.o pci-common.o indirect_pci.o iomap.o
+obj-$(CONFIG_PCI_XILINX)        += xilinx_pci.o
diff --git a/arch/microblaze/pci/indirect_pci.c b/arch/microblaze/pci/indirect_pci.c
new file mode 100644
index 00000000000..25f18f017f2
--- /dev/null
+++ b/arch/microblaze/pci/indirect_pci.c
@@ -0,0 +1,163 @@
+/*
+ * Support for indirect PCI bridges.
+ *
+ * Copyright (C) 1998 Gabriel Paubert.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/delay.h>
+#include <linux/string.h>
+#include <linux/init.h>
+
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/pci-bridge.h>
+
+static int
+indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
+                     int len, u32 *val)
+{
+        struct pci_controller *hose = pci_bus_to_host(bus);
+        volatile void __iomem *cfg_data;
+        u8 cfg_type = 0;
+        u32 bus_no, reg;
+
+        if (hose->indirect_type & INDIRECT_TYPE_NO_PCIE_LINK) {
+                if (bus->number != hose->first_busno)
+                        return PCIBIOS_DEVICE_NOT_FOUND;
+                if (devfn != 0)
+                        return PCIBIOS_DEVICE_NOT_FOUND;
+        }
+
+        if (hose->indirect_type & INDIRECT_TYPE_SET_CFG_TYPE)
+                if (bus->number != hose->first_busno)
+                        cfg_type = 1;
+
+        bus_no = (bus->number == hose->first_busno) ?
+                        hose->self_busno : bus->number;
+
+        if (hose->indirect_type & INDIRECT_TYPE_EXT_REG)
+                reg = ((offset & 0xf00) << 16) | (offset & 0xfc);
+        else
+                reg = offset & 0xfc; /* Only 3 bits for function */
+
+        if (hose->indirect_type & INDIRECT_TYPE_BIG_ENDIAN)
+                out_be32(hose->cfg_addr, (0x80000000 | (bus_no << 16) |
+                         (devfn << 8) | reg | cfg_type));
+        else
+                out_le32(hose->cfg_addr, (0x80000000 | (bus_no << 16) |
+                         (devfn << 8) | reg | cfg_type));
+
+        /*
+         * Note: the caller has already checked that offset is
+         * suitably aligned and that len is 1, 2 or 4.
+         */
+        cfg_data = hose->cfg_data + (offset & 3); /* Only 3 bits for function */
+        switch (len) {
+        case 1:
+                *val = in_8(cfg_data);
+                break;
+        case 2:
+                *val = in_le16(cfg_data);
+                break;
+        default:
+                *val = in_le32(cfg_data);
+                break;
+        }
+        return PCIBIOS_SUCCESSFUL;
+}
+
+static int
+indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
+                      int len, u32 val)
+{
+        struct pci_controller *hose = pci_bus_to_host(bus);
+        volatile void __iomem *cfg_data;
+        u8 cfg_type = 0;
+        u32 bus_no, reg;
+
+        if (hose->indirect_type & INDIRECT_TYPE_NO_PCIE_LINK) {
+                if (bus->number != hose->first_busno)
+                        return PCIBIOS_DEVICE_NOT_FOUND;
+                if (devfn != 0)
+                        return PCIBIOS_DEVICE_NOT_FOUND;
+        }
+
+        if (hose->indirect_type & INDIRECT_TYPE_SET_CFG_TYPE)
+                if (bus->number != hose->first_busno)
+                        cfg_type = 1;
+
+        bus_no = (bus->number == hose->first_busno) ?
+                        hose->self_busno : bus->number;
+
+        if (hose->indirect_type & INDIRECT_TYPE_EXT_REG)
+                reg = ((offset & 0xf00) << 16) | (offset & 0xfc);
+        else
+                reg = offset & 0xfc;
+
+        if (hose->indirect_type & INDIRECT_TYPE_BIG_ENDIAN)
+                out_be32(hose->cfg_addr, (0x80000000 | (bus_no << 16) |
+                         (devfn << 8) | reg | cfg_type));
+        else
+                out_le32(hose->cfg_addr, (0x80000000 | (bus_no << 16) |
+                         (devfn << 8) | reg | cfg_type));
+
+        /* surpress setting of PCI_PRIMARY_BUS */
+        if (hose->indirect_type & INDIRECT_TYPE_SURPRESS_PRIMARY_BUS)
+                if ((offset == PCI_PRIMARY_BUS) &&
+                        (bus->number == hose->first_busno))
+                        val &= 0xffffff00;
+
+        /* Workaround for PCI_28 Errata in 440EPx/GRx */
+        if ((hose->indirect_type & INDIRECT_TYPE_BROKEN_MRM) &&
+                        offset == PCI_CACHE_LINE_SIZE) {
+                val = 0;
+        }
+
+        /*
+         * Note: the caller has already checked that offset is
+         * suitably aligned and that len is 1, 2 or 4.
+         */
+        cfg_data = hose->cfg_data + (offset & 3);
+        switch (len) {
+        case 1:
+                out_8(cfg_data, val);
+                break;
+        case 2:
+                out_le16(cfg_data, val);
+                break;
+        default:
+                out_le32(cfg_data, val);
+                break;
+        }
+
+        return PCIBIOS_SUCCESSFUL;
+}
+
+static struct pci_ops indirect_pci_ops = {
+        .read = indirect_read_config,
+        .write = indirect_write_config,
+};
+
+void __init
+setup_indirect_pci(struct pci_controller *hose,
+                   resource_size_t cfg_addr,
+                   resource_size_t cfg_data, u32 flags)
+{
+        resource_size_t base = cfg_addr & PAGE_MASK;
+        void __iomem *mbase;
+
+        mbase = ioremap(base, PAGE_SIZE);
+        hose->cfg_addr = mbase + (cfg_addr & ~PAGE_MASK);
+        if ((cfg_data & PAGE_MASK) != base)
+                mbase = ioremap(cfg_data & PAGE_MASK, PAGE_SIZE);
+        hose->cfg_data = mbase + (cfg_data & ~PAGE_MASK);
+        hose->ops = &indirect_pci_ops;
+        hose->indirect_type = flags;
+}
diff --git a/arch/microblaze/pci/iomap.c b/arch/microblaze/pci/iomap.c
new file mode 100644
index 00000000000..3fbf16f4e16
--- /dev/null
+++ b/arch/microblaze/pci/iomap.c
@@ -0,0 +1,39 @@
+/*
+ * ppc64 "iomap" interface implementation.
+ *
+ * (C) Copyright 2004 Linus Torvalds
+ */
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/mm.h>
+#include <asm/io.h>
+#include <asm/pci-bridge.h>
+
+void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max)
+{
+        resource_size_t start = pci_resource_start(dev, bar);
+        resource_size_t len = pci_resource_len(dev, bar);
+        unsigned long flags = pci_resource_flags(dev, bar);
+
+        if (!len)
+                return NULL;
+        if (max && len > max)
+                len = max;
+        if (flags & IORESOURCE_IO)
+                return ioport_map(start, len);
+        if (flags & IORESOURCE_MEM)
+                return ioremap(start, len);
+        /* What? */
+        return NULL;
+}
+EXPORT_SYMBOL(pci_iomap);
+
+void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
+{
+        if (isa_vaddr_is_ioport(addr))
+                return;
+        if (pcibios_vaddr_is_ioport(addr))
+                return;
+        iounmap(addr);
+}
+EXPORT_SYMBOL(pci_iounmap);
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
new file mode 100644
index 00000000000..740bb32ec57
--- /dev/null
+++ b/arch/microblaze/pci/pci-common.c
@@ -0,0 +1,1643 @@
+/*
+ * Contains common pci routines for ALL ppc platform
+ * (based on pci_32.c and pci_64.c)
+ *
+ * Port for PPC64 David Engebretsen, IBM Corp.
+ * Contains common pci routines for ppc64 platform, pSeries and iSeries brands.
+ *
+ * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
+ *   Rework, based on alpha PCI code.
+ *
+ * Common pmac/prep/chrp pci routines. -- Cort
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/string.h>
+#include <linux/init.h>
+#include <linux/bootmem.h>
+#include <linux/mm.h>
+#include <linux/list.h>
+#include <linux/syscalls.h>
+#include <linux/irq.h>
+#include <linux/vmalloc.h>
+#include <linux/slab.h>
+
+#include <asm/processor.h>
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/pci-bridge.h>
+#include <asm/byteorder.h>
+
+static DEFINE_SPINLOCK(hose_spinlock);
+LIST_HEAD(hose_list);
+
+/* XXX kill that some day ... */
+static int global_phb_number;           /* Global phb counter */
+
+/* ISA Memory physical address */
+resource_size_t isa_mem_base;
+
+/* Default PCI flags is 0 on ppc32, modified at boot on ppc64 */
+unsigned int pci_flags;
+
+static struct dma_map_ops *pci_dma_ops = &dma_direct_ops;
+
+void set_pci_dma_ops(struct dma_map_ops *dma_ops)
+{
+        pci_dma_ops = dma_ops;
+}
+
+struct dma_map_ops *get_pci_dma_ops(void)
+{
+        return pci_dma_ops;
+}
+EXPORT_SYMBOL(get_pci_dma_ops);
+
+int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
+{
+        return dma_set_mask(&dev->dev, mask);
+}
+
+int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
+{
+        int rc;
+
+        rc = dma_set_mask(&dev->dev, mask);
+        dev->dev.coherent_dma_mask = dev->dma_mask;
+
+        return rc;
+}
+
+struct pci_controller *pcibios_alloc_controller(struct device_node *dev)
+{
+        struct pci_controller *phb;
+
+        phb = zalloc_maybe_bootmem(sizeof(struct pci_controller), GFP_KERNEL);
+        if (!phb)
+                return NULL;
+        spin_lock(&hose_spinlock);
+        phb->global_number = global_phb_number++;
+        list_add_tail(&phb->list_node, &hose_list);
+        spin_unlock(&hose_spinlock);
+        phb->dn = dev;
+        phb->is_dynamic = mem_init_done;
+        return phb;
+}
+
+void pcibios_free_controller(struct pci_controller *phb)
+{
+        spin_lock(&hose_spinlock);
+        list_del(&phb->list_node);
+        spin_unlock(&hose_spinlock);
+
+        if (phb->is_dynamic)
+                kfree(phb);
+}
+
+static resource_size_t pcibios_io_size(const struct pci_controller *hose)
+{
+        return hose->io_resource.end - hose->io_resource.start + 1;
+}
+
+int pcibios_vaddr_is_ioport(void __iomem *address)
+{
+        int ret = 0;
+        struct pci_controller *hose;
+        resource_size_t size;
+
+        spin_lock(&hose_spinlock);
+        list_for_each_entry(hose, &hose_list, list_node) {
+                size = pcibios_io_size(hose);
+                if (address >= hose->io_base_virt &&
+                    address < (hose->io_base_virt + size)) {
+                        ret = 1;
+                        break;
+                }
+        }
+        spin_unlock(&hose_spinlock);
+        return ret;
+}
+
+unsigned long pci_address_to_pio(phys_addr_t address)
+{
+        struct pci_controller *hose;
+        resource_size_t size;
+        unsigned long ret = ~0;
+
+        spin_lock(&hose_spinlock);
+        list_for_each_entry(hose, &hose_list, list_node) {
+                size = pcibios_io_size(hose);
+                if (address >= hose->io_base_phys &&
+                    address < (hose->io_base_phys + size)) {
+                        unsigned long base =
+                                (unsigned long)hose->io_base_virt - _IO_BASE;
+                        ret = base + (address - hose->io_base_phys);
+                        break;
+                }
+        }
+        spin_unlock(&hose_spinlock);
+
+        return ret;
+}
+EXPORT_SYMBOL_GPL(pci_address_to_pio);
+
+/*
+ * Return the domain number for this bus.
+ */
+int pci_domain_nr(struct pci_bus *bus)
+{
+        struct pci_controller *hose = pci_bus_to_host(bus);
+
+        return hose->global_number;
+}
+EXPORT_SYMBOL(pci_domain_nr);
+
+/* This routine is meant to be used early during boot, when the
+ * PCI bus numbers have not yet been assigned, and you need to
+ * issue PCI config cycles to an OF device.
+ * It could also be used to "fix" RTAS config cycles if you want
+ * to set pci_assign_all_buses to 1 and still use RTAS for PCI
+ * config cycles.
+ */
+struct pci_controller *pci_find_hose_for_OF_device(struct device_node *node)
+{
+        while (node) {
+                struct pci_controller *hose, *tmp;
+                list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
+                        if (hose->dn == node)
+                                return hose;
+                node = node->parent;
+        }
+        return NULL;
+}
+
+static ssize_t pci_show_devspec(struct device *dev,
+                struct device_attribute *attr, char *buf)
+{
+        struct pci_dev *pdev;
+        struct device_node *np;
+
+        pdev = to_pci_dev(dev);
+        np = pci_device_to_OF_node(pdev);
+        if (np == NULL || np->full_name == NULL)
+                return 0;
+        return sprintf(buf, "%s", np->full_name);
+}
+static DEVICE_ATTR(devspec, S_IRUGO, pci_show_devspec, NULL);
+
+/* Add sysfs properties */
+int pcibios_add_platform_entries(struct pci_dev *pdev)
+{
+        return device_create_file(&pdev->dev, &dev_attr_devspec);
+}
+
+char __devinit *pcibios_setup(char *str)
+{
+        return str;
+}
+
+/*
+ * Reads the interrupt pin to determine if interrupt is use by card.
+ * If the interrupt is used, then gets the interrupt line from the
+ * openfirmware and sets it in the pci_dev and pci_config line.
+ */
+int pci_read_irq_line(struct pci_dev *pci_dev)
+{
+        struct of_irq oirq;
+        unsigned int virq;
+
+        /* The current device-tree that iSeries generates from the HV
+         * PCI informations doesn't contain proper interrupt routing,
+         * and all the fallback would do is print out crap, so we
+         * don't attempt to resolve the interrupts here at all, some
+         * iSeries specific fixup does it.
+         *
+         * In the long run, we will hopefully fix the generated device-tree
+         * instead.
+         */
+        pr_debug("PCI: Try to map irq for %s...\n", pci_name(pci_dev));
+
+#ifdef DEBUG
+        memset(&oirq, 0xff, sizeof(oirq));
+#endif
+        /* Try to get a mapping from the device-tree */
+        if (of_irq_map_pci(pci_dev, &oirq)) {
+                u8 line, pin;
+
+                /* If that fails, lets fallback to what is in the config
+                 * space and map that through the default controller. We
+                 * also set the type to level low since that's what PCI
+                 * interrupts are. If your platform does differently, then
+                 * either provide a proper interrupt tree or don't use this
+                 * function.
+                 */
+                if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_PIN, &pin))
+                        return -1;
+                if (pin == 0)
+                        return -1;
+                if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_LINE, &line) ||
+                    line == 0xff || line == 0) {
+                        return -1;
+                }
+                pr_debug(" No map ! Using line %d (pin %d) from PCI config\n",
+                         line, pin);
+
+                virq = irq_create_mapping(NULL, line);
+                if (virq != NO_IRQ)
+                        set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
+        } else {
+                pr_debug(" Got one, spec %d cells (0x%08x 0x%08x...) on %s\n",
+                         oirq.size, oirq.specifier[0], oirq.specifier[1],
+                         oirq.controller ? oirq.controller->full_name :
+                         "<default>");
+
+                virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
+                                             oirq.size);
+        }
+        if (virq == NO_IRQ) {
+                pr_debug(" Failed to map !\n");
+                return -1;
+        }
+
+        pr_debug(" Mapped to linux irq %d\n", virq);
+
+        pci_dev->irq = virq;
+
+        return 0;
+}
+EXPORT_SYMBOL(pci_read_irq_line);
+
+/*
+ * Platform support for /proc/bus/pci/X/Y mmap()s,
+ * modelled on the sparc64 implementation by Dave Miller.
+ *  -- paulus.
+ */
+
+/*
+ * Adjust vm_pgoff of VMA such that it is the physical page offset
+ * corresponding to the 32-bit pci bus offset for DEV requested by the user.
+ *
+ * Basically, the user finds the base address for his device which he wishes
+ * to mmap.  They read the 32-bit value from the config space base register,
+ * add whatever PAGE_SIZE multiple offset they wish, and feed this into the
+ * offset parameter of mmap on /proc/bus/pci/XXX for that device.
+ *
+ * Returns negative error code on failure, zero on success.
+ */
+static struct resource *__pci_mmap_make_offset(struct pci_dev *dev,
+                                               resource_size_t *offset,
+                                               enum pci_mmap_state mmap_state)
+{
+        struct pci_controller *hose = pci_bus_to_host(dev->bus);
+        unsigned long io_offset = 0;
+        int i, res_bit;
+
+        if (hose == 0)
+                return NULL;            /* should never happen */
+
+        /* If memory, add on the PCI bridge address offset */
+        if (mmap_state == pci_mmap_mem) {
+#if 0 /* See comment in pci_resource_to_user() for why this is disabled */
+                *offset += hose->pci_mem_offset;
+#endif
+                res_bit = IORESOURCE_MEM;
+        } else {
+                io_offset = (unsigned long)hose->io_base_virt - _IO_BASE;
+                *offset += io_offset;
+                res_bit = IORESOURCE_IO;
+        }
+
+        /*
+         * Check that the offset requested corresponds to one of the
+         * resources of the device.
+         */
+        for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
+                struct resource *rp = &dev->resource[i];
+                int flags = rp->flags;
+
+                /* treat ROM as memory (should be already) */
+                if (i == PCI_ROM_RESOURCE)
+                        flags |= IORESOURCE_MEM;
+
+                /* Active and same type? */
+                if ((flags & res_bit) == 0)
+                        continue;
+
+                /* In the range of this resource? */
+                if (*offset < (rp->start & PAGE_MASK) || *offset > rp->end)
+                        continue;
+
+                /* found it! construct the final physical address */
+                if (mmap_state == pci_mmap_io)
+                        *offset += hose->io_base_phys - io_offset;
+                return rp;
+        }
+
+        return NULL;
+}
+
+/*
+ * Set vm_page_prot of VMA, as appropriate for this architecture, for a pci
+ * device mapping.
+ */
+static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp,
+                                      pgprot_t protection,
+                                      enum pci_mmap_state mmap_state,
+                                      int write_combine)
+{
+        pgprot_t prot = protection;
+
+        /* Write combine is always 0 on non-memory space mappings. On
+         * memory space, if the user didn't pass 1, we check for a
+         * "prefetchable" resource. This is a bit hackish, but we use
+         * this to workaround the inability of /sysfs to provide a write
+         * combine bit
+         */
+        if (mmap_state != pci_mmap_mem)
+                write_combine = 0;
+        else if (write_combine == 0) {
+                if (rp->flags & IORESOURCE_PREFETCH)
+                        write_combine = 1;
+        }
+
+        return pgprot_noncached(prot);
+}
+
+/*
+ * This one is used by /dev/mem and fbdev who have no clue about the
+ * PCI device, it tries to find the PCI device first and calls the
+ * above routine
+ */
+pgprot_t pci_phys_mem_access_prot(struct file *file,
+                                  unsigned long pfn,
+                                  unsigned long size,
+                                  pgprot_t prot)
+{
+        struct pci_dev *pdev = NULL;
+        struct resource *found = NULL;
+        resource_size_t offset = ((resource_size_t)pfn) << PAGE_SHIFT;
+        int i;
+
+        if (page_is_ram(pfn))
+                return prot;
+
+        prot = pgprot_noncached(prot);
+        for_each_pci_dev(pdev) {
+                for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
+                        struct resource *rp = &pdev->resource[i];
+                        int flags = rp->flags;
+
+                        /* Active and same type? */
+                        if ((flags & IORESOURCE_MEM) == 0)
+                                continue;
+                        /* In the range of this resource? */
+                        if (offset < (rp->start & PAGE_MASK) ||
+                            offset > rp->end)
+                                continue;
+                        found = rp;
+                        break;
+                }
+                if (found)
+                        break;
+        }
+        if (found) {
+                if (found->flags & IORESOURCE_PREFETCH)
+                        prot = pgprot_noncached_wc(prot);
+                pci_dev_put(pdev);
+        }
+
+        pr_debug("PCI: Non-PCI map for %llx, prot: %lx\n",
+                 (unsigned long long)offset, pgprot_val(prot));
+
+        return prot;
+}
+
+/*
+ * Perform the actual remap of the pages for a PCI device mapping, as
+ * appropriate for this architecture.  The region in the process to map
+ * is described by vm_start and vm_end members of VMA, the base physical
+ * address is found in vm_pgoff.
+ * The pci device structure is provided so that architectures may make mapping
+ * decisions on a per-device or per-bus basis.
+ *
+ * Returns a negative error code on failure, zero on success.
+ */
+int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
+                        enum pci_mmap_state mmap_state, int write_combine)
+{
+        resource_size_t offset =
+                ((resource_size_t)vma->vm_pgoff) << PAGE_SHIFT;
+        struct resource *rp;
+        int ret;
+
+        rp = __pci_mmap_make_offset(dev, &offset, mmap_state);
+        if (rp == NULL)
+                return -EINVAL;
+
+        vma->vm_pgoff = offset >> PAGE_SHIFT;
+        vma->vm_page_prot = __pci_mmap_set_pgprot(dev, rp,
+                                                  vma->vm_page_prot,
+                                                  mmap_state, write_combine);
+
+        ret = remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
+                               vma->vm_end - vma->vm_start, vma->vm_page_prot);
+
+        return ret;
+}
+
+/* This provides legacy IO read access on a bus */
+int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val, size_t size)
+{
+        unsigned long offset;
+        struct pci_controller *hose = pci_bus_to_host(bus);
+        struct resource *rp = &hose->io_resource;
+        void __iomem *addr;
+
+        /* Check if port can be supported by that bus. We only check
+         * the ranges of the PHB though, not the bus itself as the rules
+         * for forwarding legacy cycles down bridges are not our problem
+         * here. So if the host bridge supports it, we do it.
+         */
+        offset = (unsigned long)hose->io_base_virt - _IO_BASE;
+        offset += port;
+
+        if (!(rp->flags & IORESOURCE_IO))
+                return -ENXIO;
+        if (offset < rp->start || (offset + size) > rp->end)
+                return -ENXIO;
+        addr = hose->io_base_virt + port;
+
+        switch (size) {
+        case 1:
+                *((u8 *)val) = in_8(addr);
+                return 1;
+        case 2:
+                if (port & 1)
+                        return -EINVAL;
+                *((u16 *)val) = in_le16(addr);
+                return 2;
+        case 4:
+                if (port & 3)
+                        return -EINVAL;
+                *((u32 *)val) = in_le32(addr);
+                return 4;
+        }
+        return -EINVAL;
+}
+
+/* This provides legacy IO write access on a bus */
+int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val, size_t size)
+{
+        unsigned long offset;
+        struct pci_controller *hose = pci_bus_to_host(bus);
+        struct resource *rp = &hose->io_resource;
+        void __iomem *addr;
+
+        /* Check if port can be supported by that bus. We only check
+         * the ranges of the PHB though, not the bus itself as the rules
+         * for forwarding legacy cycles down bridges are not our problem
+         * here. So if the host bridge supports it, we do it.
+         */
+        offset = (unsigned long)hose->io_base_virt - _IO_BASE;
+        offset += port;
+
+        if (!(rp->flags & IORESOURCE_IO))
+                return -ENXIO;
+        if (offset < rp->start || (offset + size) > rp->end)
+                return -ENXIO;
+        addr = hose->io_base_virt + port;
+
+        /* WARNING: The generic code is idiotic. It gets passed a pointer
+         * to what can be a 1, 2 or 4 byte quantity and always reads that
+         * as a u32, which means that we have to correct the location of
+         * the data read within those 32 bits for size 1 and 2
+         */
+        switch (size) {
+        case 1:
+                out_8(addr, val >> 24);
+                return 1;
+        case 2:
+                if (port & 1)
+                        return -EINVAL;
+                out_le16(addr, val >> 16);
+                return 2;
+        case 4:
+                if (port & 3)
+                        return -EINVAL;
+                out_le32(addr, val);
+                return 4;
+        }
+        return -EINVAL;
+}
+
+/* This provides legacy IO or memory mmap access on a bus */
+int pci_mmap_legacy_page_range(struct pci_bus *bus,
+                               struct vm_area_struct *vma,
+                               enum pci_mmap_state mmap_state)
+{
+        struct pci_controller *hose = pci_bus_to_host(bus);
+        resource_size_t offset =
+                ((resource_size_t)vma->vm_pgoff) << PAGE_SHIFT;
+        resource_size_t size = vma->vm_end - vma->vm_start;
+        struct resource *rp;
+
+        pr_debug("pci_mmap_legacy_page_range(%04x:%02x, %s @%llx..%llx)\n",
+                 pci_domain_nr(bus), bus->number,
+                 mmap_state == pci_mmap_mem ? "MEM" : "IO",
+                 (unsigned long long)offset,
+                 (unsigned long long)(offset + size - 1));
+
+        if (mmap_state == pci_mmap_mem) {
+                /* Hack alert !
+                 *
+                 * Because X is lame and can fail starting if it gets an error
+                 * trying to mmap legacy_mem (instead of just moving on without
+                 * legacy memory access) we fake it here by giving it anonymous
+                 * memory, effectively behaving just like /dev/zero
+                 */
+                if ((offset + size) > hose->isa_mem_size) {
+#ifdef CONFIG_MMU
+                        printk(KERN_DEBUG
+                                "Process %s (pid:%d) mapped non-existing PCI"
+                                "legacy memory for 0%04x:%02x\n",
+                                current->comm, current->pid, pci_domain_nr(bus),
+                                                                bus->number);
+#endif
+                        if (vma->vm_flags & VM_SHARED)
+                                return shmem_zero_setup(vma);
+                        return 0;
+                }
+                offset += hose->isa_mem_phys;
+        } else {
+                unsigned long io_offset = (unsigned long)hose->io_base_virt - \
+                                                                _IO_BASE;
+                unsigned long roffset = offset + io_offset;
+                rp = &hose->io_resource;
+                if (!(rp->flags & IORESOURCE_IO))
+                        return -ENXIO;
+                if (roffset < rp->start || (roffset + size) > rp->end)
+                        return -ENXIO;
+                offset += hose->io_base_phys;
+        }
+        pr_debug(" -> mapping phys %llx\n", (unsigned long long)offset);
+
+        vma->vm_pgoff = offset >> PAGE_SHIFT;
+        vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+        return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
+                               vma->vm_end - vma->vm_start,
+                               vma->vm_page_prot);
+}
+
+void pci_resource_to_user(const struct pci_dev *dev, int bar,
+                          const struct resource *rsrc,
+                          resource_size_t *start, resource_size_t *end)
+{
+        struct pci_controller *hose = pci_bus_to_host(dev->bus);
+        resource_size_t offset = 0;
+
+        if (hose == NULL)
+                return;
+
+        if (rsrc->flags & IORESOURCE_IO)
+                offset = (unsigned long)hose->io_base_virt - _IO_BASE;
+
+        /* We pass a fully fixed up address to userland for MMIO instead of
+         * a BAR value because X is lame and expects to be able to use that
+         * to pass to /dev/mem !
+         *
+         * That means that we'll have potentially 64 bits values where some
+         * userland apps only expect 32 (like X itself since it thinks only
+         * Sparc has 64 bits MMIO) but if we don't do that, we break it on
+         * 32 bits CHRPs :-(
+         *
+         * Hopefully, the sysfs insterface is immune to that gunk. Once X
+         * has been fixed (and the fix spread enough), we can re-enable the
+         * 2 lines below and pass down a BAR value to userland. In that case
+         * we'll also have to re-enable the matching code in
+         * __pci_mmap_make_offset().
+         *
+         * BenH.
+         */
+#if 0
+        else if (rsrc->flags & IORESOURCE_MEM)
+                offset = hose->pci_mem_offset;
+#endif
+
+        *start = rsrc->start - offset;
+        *end = rsrc->end - offset;
+}
+
+/**
+ * pci_process_bridge_OF_ranges - Parse PCI bridge resources from device tree
+ * @hose: newly allocated pci_controller to be setup
+ * @dev: device node of the host bridge
+ * @primary: set if primary bus (32 bits only, soon to be deprecated)
+ *
+ * This function will parse the "ranges" property of a PCI host bridge device
+ * node and setup the resource mapping of a pci controller based on its
+ * content.
+ *
+ * Life would be boring if it wasn't for a few issues that we have to deal
+ * with here:
+ *
+ *   - We can only cope with one IO space range and up to 3 Memory space
+ *     ranges. However, some machines (thanks Apple !) tend to split their
+ *     space into lots of small contiguous ranges. So we have to coalesce.
+ *
+ *   - We can only cope with all memory ranges having the same offset
+ *     between CPU addresses and PCI addresses. Unfortunately, some bridges
+ *     are setup for a large 1:1 mapping along with a small "window" which
+ *     maps PCI address 0 to some arbitrary high address of the CPU space in
+ *     order to give access to the ISA memory hole.
+ *     The way out of here that I've chosen for now is to always set the
+ *     offset based on the first resource found, then override it if we
+ *     have a different offset and the previous was set by an ISA hole.
+ *
+ *   - Some busses have IO space not starting at 0, which causes trouble with
+ *     the way we do our IO resource renumbering. The code somewhat deals with
+ *     it for 64 bits but I would expect problems on 32 bits.
+ *
+ *   - Some 32 bits platforms such as 4xx can have physical space larger than
+ *     32 bits so we need to use 64 bits values for the parsing
+ */
+void __devinit pci_process_bridge_OF_ranges(struct pci_controller *hose,
+                                            struct device_node *dev,
+                                            int primary)
+{
+        const u32 *ranges;
+        int rlen;
+        int pna = of_n_addr_cells(dev);
+        int np = pna + 5;
+        int memno = 0, isa_hole = -1;
+        u32 pci_space;
+        unsigned long long pci_addr, cpu_addr, pci_next, cpu_next, size;
+        unsigned long long isa_mb = 0;
+        struct resource *res;
+
+        printk(KERN_INFO "PCI host bridge %s %s ranges:\n",
+               dev->full_name, primary ? "(primary)" : "");
+
+        /* Get ranges property */
+        ranges = of_get_property(dev, "ranges", &rlen);
+        if (ranges == NULL)
+                return;
+
+        /* Parse it */
+        pr_debug("Parsing ranges property...\n");
+        while ((rlen -= np * 4) >= 0) {
+                /* Read next ranges element */
+                pci_space = ranges[0];
+                pci_addr = of_read_number(ranges + 1, 2);
+                cpu_addr = of_translate_address(dev, ranges + 3);
+                size = of_read_number(ranges + pna + 3, 2);
+
+                pr_debug("pci_space: 0x%08x pci_addr:0x%016llx "
+                                "cpu_addr:0x%016llx size:0x%016llx\n",
+                                        pci_space, pci_addr, cpu_addr, size);
+
+                ranges += np;
+
+                /* If we failed translation or got a zero-sized region
+                 * (some FW try to feed us with non sensical zero sized regions
+                 * such as power3 which look like some kind of attempt
+                 * at exposing the VGA memory hole)
+                 */
+                if (cpu_addr == OF_BAD_ADDR || size == 0)
+                        continue;
+
+                /* Now consume following elements while they are contiguous */
+                for (; rlen >= np * sizeof(u32);
+                     ranges += np, rlen -= np * 4) {
+                        if (ranges[0] != pci_space)
+                                break;
+                        pci_next = of_read_number(ranges + 1, 2);
+                        cpu_next = of_translate_address(dev, ranges + 3);
+                        if (pci_next != pci_addr + size ||
+                            cpu_next != cpu_addr + size)
+                                break;
+                        size += of_read_number(ranges + pna + 3, 2);
+                }
+
+                /* Act based on address space type */
+                res = NULL;
+                switch ((pci_space >> 24) & 0x3) {
+                case 1:         /* PCI IO space */
+                        printk(KERN_INFO
+                               "  IO 0x%016llx..0x%016llx -> 0x%016llx\n",
+                               cpu_addr, cpu_addr + size - 1, pci_addr);
+
+                        /* We support only one IO range */
+                        if (hose->pci_io_size) {
+                                printk(KERN_INFO
+                                       " \\--> Skipped (too many) !\n");
+                                continue;
+                        }
+                        /* On 32 bits, limit I/O space to 16MB */
+                        if (size > 0x01000000)
+                                size = 0x01000000;
+
+                        /* 32 bits needs to map IOs here */
+                        hose->io_base_virt = ioremap(cpu_addr, size);
+
+                        /* Expect trouble if pci_addr is not 0 */
+                        if (primary)
+                                isa_io_base =
+                                        (unsigned long)hose->io_base_virt;
+                        /* pci_io_size and io_base_phys always represent IO
+                         * space starting at 0 so we factor in pci_addr
+                         */
+                        hose->pci_io_size = pci_addr + size;
+                        hose->io_base_phys = cpu_addr - pci_addr;
+
+                        /* Build resource */
+                        res = &hose->io_resource;
+                        res->flags = IORESOURCE_IO;
+                        res->start = pci_addr;
+                        break;
+                case 2:         /* PCI Memory space */
+                case 3:         /* PCI 64 bits Memory space */
+                        printk(KERN_INFO
+                               " MEM 0x%016llx..0x%016llx -> 0x%016llx %s\n",
+                               cpu_addr, cpu_addr + size - 1, pci_addr,
+                               (pci_space & 0x40000000) ? "Prefetch" : "");
+
+                        /* We support only 3 memory ranges */
+                        if (memno >= 3) {
+                                printk(KERN_INFO
+                                       " \\--> Skipped (too many) !\n");
+                                continue;
+                        }
+                        /* Handles ISA memory hole space here */
+                        if (pci_addr == 0) {
+                                isa_mb = cpu_addr;
+                                isa_hole = memno;
+                                if (primary || isa_mem_base == 0)
+                                        isa_mem_base = cpu_addr;
+                                hose->isa_mem_phys = cpu_addr;
+                                hose->isa_mem_size = size;
+                        }
+
+                        /* We get the PCI/Mem offset from the first range or
+                         * the, current one if the offset came from an ISA
+                         * hole. If they don't match, bugger.
+                         */
+                        if (memno == 0 ||
+                            (isa_hole >= 0 && pci_addr != 0 &&
+                             hose->pci_mem_offset == isa_mb))
+                                hose->pci_mem_offset = cpu_addr - pci_addr;
+                        else if (pci_addr != 0 &&
+                                 hose->pci_mem_offset != cpu_addr - pci_addr) {
+                                printk(KERN_INFO
+                                       " \\--> Skipped (offset mismatch) !\n");
+                                continue;
+                        }
+
+                        /* Build resource */
+                        res = &hose->mem_resources[memno++];
+                        res->flags = IORESOURCE_MEM;
+                        if (pci_space & 0x40000000)
+                                res->flags |= IORESOURCE_PREFETCH;
+                        res->start = cpu_addr;
+                        break;
+                }
+                if (res != NULL) {
+                        res->name = dev->full_name;
+                        res->end = res->start + size - 1;
+                        res->parent = NULL;
+                        res->sibling = NULL;
+                        res->child = NULL;
+                }
+        }
+
+        /* If there's an ISA hole and the pci_mem_offset is -not- matching
+         * the ISA hole offset, then we need to remove the ISA hole from
+         * the resource list for that brige
+         */
+        if (isa_hole >= 0 && hose->pci_mem_offset != isa_mb) {
+                unsigned int next = isa_hole + 1;
+                printk(KERN_INFO " Removing ISA hole at 0x%016llx\n", isa_mb);
+                if (next < memno)
+                        memmove(&hose->mem_resources[isa_hole],
+                                &hose->mem_resources[next],
+                                sizeof(struct resource) * (memno - next));
+                hose->mem_resources[--memno].flags = 0;
+        }
+}
+
+/* Decide whether to display the domain number in /proc */
+int pci_proc_domain(struct pci_bus *bus)
+{
+        struct pci_controller *hose = pci_bus_to_host(bus);
+
+        if (!(pci_flags & PCI_ENABLE_PROC_DOMAINS))
+                return 0;
+        if (pci_flags & PCI_COMPAT_DOMAIN_0)
+                return hose->global_number != 0;
+        return 1;
+}
+
+void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
+                             struct resource *res)
+{
+        resource_size_t offset = 0, mask = (resource_size_t)-1;
+        struct pci_controller *hose = pci_bus_to_host(dev->bus);
+
+        if (!hose)
+                return;
+        if (res->flags & IORESOURCE_IO) {
+                offset = (unsigned long)hose->io_base_virt - _IO_BASE;
+                mask = 0xffffffffu;
+        } else if (res->flags & IORESOURCE_MEM)
+                offset = hose->pci_mem_offset;
+
+        region->start = (res->start - offset) & mask;
+        region->end = (res->end - offset) & mask;
+}
+EXPORT_SYMBOL(pcibios_resource_to_bus);
+
+void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
+                             struct pci_bus_region *region)
+{
+        resource_size_t offset = 0, mask = (resource_size_t)-1;
+        struct pci_controller *hose = pci_bus_to_host(dev->bus);
+
+        if (!hose)
+                return;
+        if (res->flags & IORESOURCE_IO) {
+                offset = (unsigned long)hose->io_base_virt - _IO_BASE;
+                mask = 0xffffffffu;
+        } else if (res->flags & IORESOURCE_MEM)
+                offset = hose->pci_mem_offset;
+        res->start = (region->start + offset) & mask;
+        res->end = (region->end + offset) & mask;
+}
+EXPORT_SYMBOL(pcibios_bus_to_resource);
+
+/* Fixup a bus resource into a linux resource */
+static void __devinit fixup_resource(struct resource *res, struct pci_dev *dev)
+{
+        struct pci_controller *hose = pci_bus_to_host(dev->bus);
+        resource_size_t offset = 0, mask = (resource_size_t)-1;
+
+        if (res->flags & IORESOURCE_IO) {
+                offset = (unsigned long)hose->io_base_virt - _IO_BASE;
+                mask = 0xffffffffu;
+        } else if (res->flags & IORESOURCE_MEM)
+                offset = hose->pci_mem_offset;
+
+        res->start = (res->start + offset) & mask;
+        res->end = (res->end + offset) & mask;
+}
+
+/* This header fixup will do the resource fixup for all devices as they are
+ * probed, but not for bridge ranges
+ */
+static void __devinit pcibios_fixup_resources(struct pci_dev *dev)
+{
+        struct pci_controller *hose = pci_bus_to_host(dev->bus);
+        int i;
+
+        if (!hose) {
+                printk(KERN_ERR "No host bridge for PCI dev %s !\n",
+                       pci_name(dev));
+                return;
+        }
+        for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
+                struct resource *res = dev->resource + i;
+                if (!res->flags)
+                        continue;
+                /* On platforms that have PCI_PROBE_ONLY set, we don't
+                 * consider 0 as an unassigned BAR value. It's technically
+                 * a valid value, but linux doesn't like it... so when we can
+                 * re-assign things, we do so, but if we can't, we keep it
+                 * around and hope for the best...
+                 */
+                if (res->start == 0 && !(pci_flags & PCI_PROBE_ONLY)) {
+                        pr_debug("PCI:%s Resource %d %016llx-%016llx [%x]" \
+                                                        "is unassigned\n",
+                                 pci_name(dev), i,
+                                 (unsigned long long)res->start,
+                                 (unsigned long long)res->end,
+                                 (unsigned int)res->flags);
+                        res->end -= res->start;
+                        res->start = 0;
+                        res->flags |= IORESOURCE_UNSET;
+                        continue;
+                }
+
+                pr_debug("PCI:%s Resource %d %016llx-%016llx [%x] fixup...\n",
+                         pci_name(dev), i,
+                         (unsigned long long)res->start,\
+                         (unsigned long long)res->end,
+                         (unsigned int)res->flags);
+
+                fixup_resource(res, dev);
+
+                pr_debug("PCI:%s            %016llx-%016llx\n",
+                         pci_name(dev),
+                         (unsigned long long)res->start,
+                         (unsigned long long)res->end);
+        }
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_resources);
+
+/* This function tries to figure out if a bridge resource has been initialized
+ * by the firmware or not. It doesn't have to be absolutely bullet proof, but
+ * things go more smoothly when it gets it right. It should covers cases such
+ * as Apple "closed" bridge resources and bare-metal pSeries unassigned bridges
+ */
+static int __devinit pcibios_uninitialized_bridge_resource(struct pci_bus *bus,
+                                                           struct resource *res)
+{
+        struct pci_controller *hose = pci_bus_to_host(bus);
+        struct pci_dev *dev = bus->self;
+        resource_size_t offset;
+        u16 command;
+        int i;
+
+        /* We don't do anything if PCI_PROBE_ONLY is set */
+        if (pci_flags & PCI_PROBE_ONLY)
+                return 0;
+
+        /* Job is a bit different between memory and IO */
+        if (res->flags & IORESOURCE_MEM) {
+                /* If the BAR is non-0 (res != pci_mem_offset) then it's
+                 * probably been initialized by somebody
+                 */
+                if (res->start != hose->pci_mem_offset)
+                        return 0;
+
+                /* The BAR is 0, let's check if memory decoding is enabled on
+                 * the bridge. If not, we consider it unassigned
+                 */
+                pci_read_config_word(dev, PCI_COMMAND, &command);
+                if ((command & PCI_COMMAND_MEMORY) == 0)
+                        return 1;
+
+                /* Memory decoding is enabled and the BAR is 0. If any of
+                 * the bridge resources covers that starting address (0 then
+                 * it's good enough for us for memory
+                 */
+                for (i = 0; i < 3; i++) {
+                        if ((hose->mem_resources[i].flags & IORESOURCE_MEM) &&
+                           hose->mem_resources[i].start == hose->pci_mem_offset)
+                                return 0;
+                }
+
+                /* Well, it starts at 0 and we know it will collide so we may as
+                 * well consider it as unassigned. That covers the Apple case.
+                 */
+                return 1;
+        } else {
+                /* If the BAR is non-0, then we consider it assigned */
+                offset = (unsigned long)hose->io_base_virt - _IO_BASE;
+                if (((res->start - offset) & 0xfffffffful) != 0)
+                        return 0;
+
+                /* Here, we are a bit different than memory as typically IO
+                 * space starting at low addresses -is- valid. What we do
+                 * instead if that we consider as unassigned anything that
+                 * doesn't have IO enabled in the PCI command register,
+                 * and that's it.
+                 */
+                pci_read_config_word(dev, PCI_COMMAND, &command);
+                if (command & PCI_COMMAND_IO)
+                        return 0;
+
+                /* It's starting at 0 and IO is disabled in the bridge, consider
+                 * it unassigned
+                 */
+                return 1;
+        }
+}
+
+/* Fixup resources of a PCI<->PCI bridge */
+static void __devinit pcibios_fixup_bridge(struct pci_bus *bus)
+{
+        struct resource *res;
+        int i;
+
+        struct pci_dev *dev = bus->self;
+
+        for (i = 0; i < PCI_BUS_NUM_RESOURCES; ++i) {
+                res = bus->resource[i];
+                if (!res)
+                        continue;
+                if (!res->flags)
+                        continue;
+                if (i >= 3 && bus->self->transparent)
+                        continue;
+
+                pr_debug("PCI:%s Bus rsrc %d %016llx-%016llx [%x] fixup...\n",
+                         pci_name(dev), i,
+                         (unsigned long long)res->start,\
+                         (unsigned long long)res->end,
+                         (unsigned int)res->flags);
+
+                /* Perform fixup */
+                fixup_resource(res, dev);
+
+                /* Try to detect uninitialized P2P bridge resources,
+                 * and clear them out so they get re-assigned later
+                 */
+                if (pcibios_uninitialized_bridge_resource(bus, res)) {
+                        res->flags = 0;
+                        pr_debug("PCI:%s            (unassigned)\n",
+                                                                pci_name(dev));
+                } else {
+                        pr_debug("PCI:%s            %016llx-%016llx\n",
+                                 pci_name(dev),
+                                 (unsigned long long)res->start,
+                                 (unsigned long long)res->end);
+                }
+        }
+}
+
+void __devinit pcibios_setup_bus_self(struct pci_bus *bus)
+{
+        /* Fix up the bus resources for P2P bridges */
+        if (bus->self != NULL)
+                pcibios_fixup_bridge(bus);
+}
+
+void __devinit pcibios_setup_bus_devices(struct pci_bus *bus)
+{
+        struct pci_dev *dev;
+
+        pr_debug("PCI: Fixup bus devices %d (%s)\n",
+                 bus->number, bus->self ? pci_name(bus->self) : "PHB");
+
+        list_for_each_entry(dev, &bus->devices, bus_list) {
+                struct dev_archdata *sd = &dev->dev.archdata;
+
+                /* Setup OF node pointer in archdata */
+                sd->of_node = pci_device_to_OF_node(dev);
+
+                /* Fixup NUMA node as it may not be setup yet by the generic
+                 * code and is needed by the DMA init
+                 */
+                set_dev_node(&dev->dev, pcibus_to_node(dev->bus));
+
+                /* Hook up default DMA ops */
+                sd->dma_ops = pci_dma_ops;
+                sd->dma_data = (void *)PCI_DRAM_OFFSET;
+
+                /* Read default IRQs and fixup if necessary */
+                pci_read_irq_line(dev);
+        }
+}
+
+void __devinit pcibios_fixup_bus(struct pci_bus *bus)
+{
+        /* When called from the generic PCI probe, read PCI<->PCI bridge
+         * bases. This is -not- called when generating the PCI tree from
+         * the OF device-tree.
+         */
+        if (bus->self != NULL)
+                pci_read_bridge_bases(bus);
+
+        /* Now fixup the bus bus */
+        pcibios_setup_bus_self(bus);
+
+        /* Now fixup devices on that bus */
+        pcibios_setup_bus_devices(bus);
+}
+EXPORT_SYMBOL(pcibios_fixup_bus);
+
+static int skip_isa_ioresource_align(struct pci_dev *dev)
+{
+        if ((pci_flags & PCI_CAN_SKIP_ISA_ALIGN) &&
+            !(dev->bus->bridge_ctl & PCI_BRIDGE_CTL_ISA))
+                return 1;
+        return 0;
+}
+
+/*
+ * We need to avoid collisions with `mirrored' VGA ports
+ * and other strange ISA hardware, so we always want the
+ * addresses to be allocated in the 0x000-0x0ff region
+ * modulo 0x400.
+ *
+ * Why? Because some silly external IO cards only decode
+ * the low 10 bits of the IO address. The 0x00-0xff region
+ * is reserved for motherboard devices that decode all 16
+ * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
+ * but we want to try to avoid allocating at 0x2900-0x2bff
+ * which might have be mirrored at 0x0100-0x03ff..
+ */
+void pcibios_align_resource(void *data, struct resource *res,
+                                resource_size_t size, resource_size_t align)
+{
+        struct pci_dev *dev = data;
+
+        if (res->flags & IORESOURCE_IO) {
+                resource_size_t start = res->start;
+
+                if (skip_isa_ioresource_align(dev))
+                        return;
+                if (start & 0x300) {
+                        start = (start + 0x3ff) & ~0x3ff;
+                        res->start = start;
+                }
+        }
+}
+EXPORT_SYMBOL(pcibios_align_resource);
+
+/*
+ * Reparent resource children of pr that conflict with res
+ * under res, and make res replace those children.
+ */
+static int __init reparent_resources(struct resource *parent,
+                                     struct resource *res)
+{
+        struct resource *p, **pp;
+        struct resource **firstpp = NULL;
+
+        for (pp = &parent->child; (p = *pp) != NULL; pp = &p->sibling) {
+                if (p->end < res->start)
+                        continue;
+                if (res->end < p->start)
+                        break;
+                if (p->start < res->start || p->end > res->end)
+                        return -1;      /* not completely contained */
+                if (firstpp == NULL)
+                        firstpp = pp;
+        }
+        if (firstpp == NULL)
+                return -1;      /* didn't find any conflicting entries? */
+        res->parent = parent;
+        res->child = *firstpp;
+        res->sibling = *pp;
+        *firstpp = res;
+        *pp = NULL;
+        for (p = res->child; p != NULL; p = p->sibling) {
+                p->parent = res;
+                pr_debug("PCI: Reparented %s [%llx..%llx] under %s\n",
+                         p->name,
+                         (unsigned long long)p->start,
+                         (unsigned long long)p->end, res->name);
+        }
+        return 0;
+}
+
+/*
+ *  Handle resources of PCI devices.  If the world were perfect, we could
+ *  just allocate all the resource regions and do nothing more.  It isn't.
+ *  On the other hand, we cannot just re-allocate all devices, as it would
+ *  require us to know lots of host bridge internals.  So we attempt to
+ *  keep as much of the original configuration as possible, but tweak it
+ *  when it's found to be wrong.
+ *
+ *  Known BIOS problems we have to work around:
+ *      - I/O or memory regions not configured
+ *      - regions configured, but not enabled in the command register
+ *      - bogus I/O addresses above 64K used
+ *      - expansion ROMs left enabled (this may sound harmless, but given
+ *        the fact the PCI specs explicitly allow address decoders to be
+ *        shared between expansion ROMs and other resource regions, it's
+ *        at least dangerous)
+ *
+ *  Our solution:
+ *      (1) Allocate resources for all buses behind PCI-to-PCI bridges.
+ *          This gives us fixed barriers on where we can allocate.
+ *      (2) Allocate resources for all enabled devices.  If there is
+ *          a collision, just mark the resource as unallocated. Also
+ *          disable expansion ROMs during this step.
+ *      (3) Try to allocate resources for disabled devices.  If the
+ *          resources were assigned correctly, everything goes well,
+ *          if they weren't, they won't disturb allocation of other
+ *          resources.
+ *      (4) Assign new addresses to resources which were either
+ *          not configured at all or misconfigured.  If explicitly
+ *          requested by the user, configure expansion ROM address
+ *          as well.
+ */
+
+void pcibios_allocate_bus_resources(struct pci_bus *bus)
+{
+        struct pci_bus *b;
+        int i;
+        struct resource *res, *pr;
+
+        pr_debug("PCI: Allocating bus resources for %04x:%02x...\n",
+                 pci_domain_nr(bus), bus->number);
+
+        for (i = 0; i < PCI_BUS_NUM_RESOURCES; ++i) {
+                res = bus->resource[i];
+                if (!res || !res->flags
+                    || res->start > res->end || res->parent)
+                        continue;
+                if (bus->parent == NULL)
+                        pr = (res->flags & IORESOURCE_IO) ?
+                                &ioport_resource : &iomem_resource;
+                else {
+                        /* Don't bother with non-root busses when
+                         * re-assigning all resources. We clear the
+                         * resource flags as if they were colliding
+                         * and as such ensure proper re-allocation
+                         * later.
+                         */
+                        if (pci_flags & PCI_REASSIGN_ALL_RSRC)
+                                goto clear_resource;
+                        pr = pci_find_parent_resource(bus->self, res);
+                        if (pr == res) {
+                                /* this happens when the generic PCI
+                                 * code (wrongly) decides that this
+                                 * bridge is transparent  -- paulus
+                                 */
+                                continue;
+                        }
+                }
+
+                pr_debug("PCI: %s (bus %d) bridge rsrc %d: %016llx-%016llx "
+                         "[0x%x], parent %p (%s)\n",
+                         bus->self ? pci_name(bus->self) : "PHB",
+                         bus->number, i,
+                         (unsigned long long)res->start,
+                         (unsigned long long)res->end,
+                         (unsigned int)res->flags,
+                         pr, (pr && pr->name) ? pr->name : "nil");
+
+                if (pr && !(pr->flags & IORESOURCE_UNSET)) {
+                        if (request_resource(pr, res) == 0)
+                                continue;
+                        /*
+                         * Must be a conflict with an existing entry.
+                         * Move that entry (or entries) under the
+                         * bridge resource and try again.
+                         */
+                        if (reparent_resources(pr, res) == 0)
+                                continue;
+                }
+                printk(KERN_WARNING "PCI: Cannot allocate resource region "
+                       "%d of PCI bridge %d, will remap\n", i, bus->number);
+clear_resource:
+                res->flags = 0;
+        }
+
+        list_for_each_entry(b, &bus->children, node)
+                pcibios_allocate_bus_resources(b);
+}
+
+static inline void __devinit alloc_resource(struct pci_dev *dev, int idx)
+{
+        struct resource *pr, *r = &dev->resource[idx];
+
+        pr_debug("PCI: Allocating %s: Resource %d: %016llx..%016llx [%x]\n",
+                 pci_name(dev), idx,
+                 (unsigned long long)r->start,
+                 (unsigned long long)r->end,
+                 (unsigned int)r->flags);
+
+        pr = pci_find_parent_resource(dev, r);
+        if (!pr || (pr->flags & IORESOURCE_UNSET) ||
+            request_resource(pr, r) < 0) {
+                printk(KERN_WARNING "PCI: Cannot allocate resource region %d"
+                       " of device %s, will remap\n", idx, pci_name(dev));
+                if (pr)
+                        pr_debug("PCI:  parent is %p: %016llx-%016llx [%x]\n",
+                                 pr,
+                                 (unsigned long long)pr->start,
+                                 (unsigned long long)pr->end,
+                                 (unsigned int)pr->flags);
+                /* We'll assign a new address later */
+                r->flags |= IORESOURCE_UNSET;
+                r->end -= r->start;
+                r->start = 0;
+        }
+}
+
+static void __init pcibios_allocate_resources(int pass)
+{
+        struct pci_dev *dev = NULL;
+        int idx, disabled;
+        u16 command;
+        struct resource *r;
+
+        for_each_pci_dev(dev) {
+                pci_read_config_word(dev, PCI_COMMAND, &command);
+                for (idx = 0; idx <= PCI_ROM_RESOURCE; idx++) {
+                        r = &dev->resource[idx];
+                        if (r->parent)          /* Already allocated */
+                                continue;
+                        if (!r->flags || (r->flags & IORESOURCE_UNSET))
+                                continue;       /* Not assigned at all */
+                        /* We only allocate ROMs on pass 1 just in case they
+                         * have been screwed up by firmware
+                         */
+                        if (idx == PCI_ROM_RESOURCE)
+                                disabled = 1;
+                        if (r->flags & IORESOURCE_IO)
+                                disabled = !(command & PCI_COMMAND_IO);
+                        else
+                                disabled = !(command & PCI_COMMAND_MEMORY);
+                        if (pass == disabled)
+                                alloc_resource(dev, idx);
+                }
+                if (pass)
+                        continue;
+                r = &dev->resource[PCI_ROM_RESOURCE];
+                if (r->flags) {
+                        /* Turn the ROM off, leave the resource region,
+                         * but keep it unregistered.
+                         */
+                        u32 reg;
+                        pci_read_config_dword(dev, dev->rom_base_reg, &reg);
+                        if (reg & PCI_ROM_ADDRESS_ENABLE) {
+                                pr_debug("PCI: Switching off ROM of %s\n",
+                                         pci_name(dev));
+                                r->flags &= ~IORESOURCE_ROM_ENABLE;
+                                pci_write_config_dword(dev, dev->rom_base_reg,
+                                                reg & ~PCI_ROM_ADDRESS_ENABLE);
+                        }
+                }
+        }
+}
+
+static void __init pcibios_reserve_legacy_regions(struct pci_bus *bus)
+{
+        struct pci_controller *hose = pci_bus_to_host(bus);
+        resource_size_t offset;
+        struct resource *res, *pres;
+        int i;
+
+        pr_debug("Reserving legacy ranges for domain %04x\n",
+                                                        pci_domain_nr(bus));
+
+        /* Check for IO */
+        if (!(hose->io_resource.flags & IORESOURCE_IO))
+                goto no_io;
+        offset = (unsigned long)hose->io_base_virt - _IO_BASE;
+        res = kzalloc(sizeof(struct resource), GFP_KERNEL);
+        BUG_ON(res == NULL);
+        res->name = "Legacy IO";
+        res->flags = IORESOURCE_IO;
+        res->start = offset;
+        res->end = (offset + 0xfff) & 0xfffffffful;
+        pr_debug("Candidate legacy IO: %pR\n", res);
+        if (request_resource(&hose->io_resource, res)) {
+                printk(KERN_DEBUG
+                       "PCI %04x:%02x Cannot reserve Legacy IO %pR\n",
+                       pci_domain_nr(bus), bus->number, res);
+                kfree(res);
+        }
+
+ no_io:
+        /* Check for memory */
+        offset = hose->pci_mem_offset;
+        pr_debug("hose mem offset: %016llx\n", (unsigned long long)offset);
+        for (i = 0; i < 3; i++) {
+                pres = &hose->mem_resources[i];
+                if (!(pres->flags & IORESOURCE_MEM))
+                        continue;
+                pr_debug("hose mem res: %pR\n", pres);
+                if ((pres->start - offset) <= 0xa0000 &&
+                    (pres->end - offset) >= 0xbffff)
+                        break;
+        }
+        if (i >= 3)
+                return;
+        res = kzalloc(sizeof(struct resource), GFP_KERNEL);
+        BUG_ON(res == NULL);
+        res->name = "Legacy VGA memory";
+        res->flags = IORESOURCE_MEM;
+        res->start = 0xa0000 + offset;
+        res->end = 0xbffff + offset;
+        pr_debug("Candidate VGA memory: %pR\n", res);
+        if (request_resource(pres, res)) {
+                printk(KERN_DEBUG
+                       "PCI %04x:%02x Cannot reserve VGA memory %pR\n",
+                       pci_domain_nr(bus), bus->number, res);
+                kfree(res);
+        }
+}
+
+void __init pcibios_resource_survey(void)
+{
+        struct pci_bus *b;
+
+        /* Allocate and assign resources. If we re-assign everything, then
+         * we skip the allocate phase
+         */
+        list_for_each_entry(b, &pci_root_buses, node)
+                pcibios_allocate_bus_resources(b);
+
+        if (!(pci_flags & PCI_REASSIGN_ALL_RSRC)) {
+                pcibios_allocate_resources(0);
+                pcibios_allocate_resources(1);
+        }
+
+        /* Before we start assigning unassigned resource, we try to reserve
+         * the low IO area and the VGA memory area if they intersect the
+         * bus available resources to avoid allocating things on top of them
+         */
+        if (!(pci_flags & PCI_PROBE_ONLY)) {
+                list_for_each_entry(b, &pci_root_buses, node)
+                        pcibios_reserve_legacy_regions(b);
+        }
+
+        /* Now, if the platform didn't decide to blindly trust the firmware,
+         * we proceed to assigning things that were left unassigned
+         */
+        if (!(pci_flags & PCI_PROBE_ONLY)) {
+                pr_debug("PCI: Assigning unassigned resources...\n");
+                pci_assign_unassigned_resources();
+        }
+}
+
+#ifdef CONFIG_HOTPLUG
+
+/* This is used by the PCI hotplug driver to allocate resource
+ * of newly plugged busses. We can try to consolidate with the
+ * rest of the code later, for now, keep it as-is as our main
+ * resource allocation function doesn't deal with sub-trees yet.
+ */
+void __devinit pcibios_claim_one_bus(struct pci_bus *bus)
+{
+        struct pci_dev *dev;
+        struct pci_bus *child_bus;
+
+        list_for_each_entry(dev, &bus->devices, bus_list) {
+                int i;
+
+                for (i = 0; i < PCI_NUM_RESOURCES; i++) {
+                        struct resource *r = &dev->resource[i];
+
+                        if (r->parent || !r->start || !r->flags)
+                                continue;
+
+                        pr_debug("PCI: Claiming %s: "
+                                 "Resource %d: %016llx..%016llx [%x]\n",
+                                 pci_name(dev), i,
+                                 (unsigned long long)r->start,
+                                 (unsigned long long)r->end,
+                                 (unsigned int)r->flags);
+
+                        pci_claim_resource(dev, i);
+                }
+        }
+
+        list_for_each_entry(child_bus, &bus->children, node)
+                pcibios_claim_one_bus(child_bus);
+}
+EXPORT_SYMBOL_GPL(pcibios_claim_one_bus);
+
+
+/* pcibios_finish_adding_to_bus
+ *
+ * This is to be called by the hotplug code after devices have been
+ * added to a bus, this include calling it for a PHB that is just
+ * being added
+ */
+void pcibios_finish_adding_to_bus(struct pci_bus *bus)
+{
+        pr_debug("PCI: Finishing adding to hotplug bus %04x:%02x\n",
+                 pci_domain_nr(bus), bus->number);
+
+        /* Allocate bus and devices resources */
+        pcibios_allocate_bus_resources(bus);
+        pcibios_claim_one_bus(bus);
+
+        /* Add new devices to global lists.  Register in proc, sysfs. */
+        pci_bus_add_devices(bus);
+
+        /* Fixup EEH */
+        eeh_add_device_tree_late(bus);
+}
+EXPORT_SYMBOL_GPL(pcibios_finish_adding_to_bus);
+
+#endif /* CONFIG_HOTPLUG */
+
+int pcibios_enable_device(struct pci_dev *dev, int mask)
+{
+        return pci_enable_resources(dev, mask);
+}
+
+void __devinit pcibios_setup_phb_resources(struct pci_controller *hose)
+{
+        struct pci_bus *bus = hose->bus;
+        struct resource *res;
+        int i;
+
+        /* Hookup PHB IO resource */
+        bus->resource[0] = res = &hose->io_resource;
+
+        if (!res->flags) {
+                printk(KERN_WARNING "PCI: I/O resource not set for host"
+                       " bridge %s (domain %d)\n",
+                       hose->dn->full_name, hose->global_number);
+                /* Workaround for lack of IO resource only on 32-bit */
+                res->start = (unsigned long)hose->io_base_virt - isa_io_base;
+                res->end = res->start + IO_SPACE_LIMIT;
+                res->flags = IORESOURCE_IO;
+        }
+
+        pr_debug("PCI: PHB IO resource    = %016llx-%016llx [%lx]\n",
+                 (unsigned long long)res->start,
+                 (unsigned long long)res->end,
+                 (unsigned long)res->flags);
+
+        /* Hookup PHB Memory resources */
+        for (i = 0; i < 3; ++i) {
+                res = &hose->mem_resources[i];
+                if (!res->flags) {
+                        if (i > 0)
+                                continue;
+                        printk(KERN_ERR "PCI: Memory resource 0 not set for "
+                               "host bridge %s (domain %d)\n",
+                               hose->dn->full_name, hose->global_number);
+
+                        /* Workaround for lack of MEM resource only on 32-bit */
+                        res->start = hose->pci_mem_offset;
+                        res->end = (resource_size_t)-1LL;
+                        res->flags = IORESOURCE_MEM;
+
+                }
+                bus->resource[i+1] = res;
+
+                pr_debug("PCI: PHB MEM resource %d = %016llx-%016llx [%lx]\n",
+                        i, (unsigned long long)res->start,
+                        (unsigned long long)res->end,
+                        (unsigned long)res->flags);
+        }
+
+        pr_debug("PCI: PHB MEM offset     = %016llx\n",
+                 (unsigned long long)hose->pci_mem_offset);
+        pr_debug("PCI: PHB IO  offset     = %08lx\n",
+                 (unsigned long)hose->io_base_virt - _IO_BASE);
+}
+
+/*
+ * Null PCI config access functions, for the case when we can't
+ * find a hose.
+ */
+#define NULL_PCI_OP(rw, size, type)                                     \
+static int                                                              \
+null_##rw##_config_##size(struct pci_dev *dev, int offset, type val)    \
+{                                                                       \
+        return PCIBIOS_DEVICE_NOT_FOUND;                                \
+}
+
+static int
+null_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
+                 int len, u32 *val)
+{
+        return PCIBIOS_DEVICE_NOT_FOUND;
+}
+
+static int
+null_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
+                  int len, u32 val)
+{
+        return PCIBIOS_DEVICE_NOT_FOUND;
+}
+
+static struct pci_ops null_pci_ops = {
+        .read = null_read_config,
+        .write = null_write_config,
+};
+
+/*
+ * These functions are used early on before PCI scanning is done
+ * and all of the pci_dev and pci_bus structures have been created.
+ */
+static struct pci_bus *
+fake_pci_bus(struct pci_controller *hose, int busnr)
+{
+        static struct pci_bus bus;
+
+        if (!hose)
+                printk(KERN_ERR "Can't find hose for PCI bus %d!\n", busnr);
+
+        bus.number = busnr;
+        bus.sysdata = hose;
+        bus.ops = hose ? hose->ops : &null_pci_ops;
+        return &bus;
+}
+
+#define EARLY_PCI_OP(rw, size, type)                                    \
+int early_##rw##_config_##size(struct pci_controller *hose, int bus,    \
+                               int devfn, int offset, type value)       \
+{                                                                       \
+        return pci_bus_##rw##_config_##size(fake_pci_bus(hose, bus),    \
+                                            devfn, offset, value);      \
+}
+
+EARLY_PCI_OP(read, byte, u8 *)
+EARLY_PCI_OP(read, word, u16 *)
+EARLY_PCI_OP(read, dword, u32 *)
+EARLY_PCI_OP(write, byte, u8)
+EARLY_PCI_OP(write, word, u16)
+EARLY_PCI_OP(write, dword, u32)
+
+int early_find_capability(struct pci_controller *hose, int bus, int devfn,
+                          int cap)
+{
+        return pci_bus_find_capability(fake_pci_bus(hose, bus), devfn, cap);
+}
diff --git a/arch/microblaze/pci/pci_32.c b/arch/microblaze/pci/pci_32.c
new file mode 100644
index 00000000000..3c3d808d7ce
--- /dev/null
+++ b/arch/microblaze/pci/pci_32.c
@@ -0,0 +1,431 @@
+/*
+ * Common pmac/prep/chrp pci routines. -- Cort
+ */
+
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/delay.h>
+#include <linux/string.h>
+#include <linux/init.h>
+#include <linux/capability.h>
+#include <linux/sched.h>
+#include <linux/errno.h>
+#include <linux/bootmem.h>
+#include <linux/irq.h>
+#include <linux/list.h>
+#include <linux/of.h>
+#include <linux/slab.h>
+
+#include <asm/processor.h>
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/sections.h>
+#include <asm/pci-bridge.h>
+#include <asm/byteorder.h>
+#include <asm/uaccess.h>
+
+#undef DEBUG
+
+unsigned long isa_io_base;
+unsigned long pci_dram_offset;
+int pcibios_assign_bus_offset = 1;
+
+static u8 *pci_to_OF_bus_map;
+
+/* By default, we don't re-assign bus numbers. We do this only on
+ * some pmacs
+ */
+static int pci_assign_all_buses;
+
+static int pci_bus_count;
+
+/*
+ * Functions below are used on OpenFirmware machines.
+ */
+static void
+make_one_node_map(struct device_node *node, u8 pci_bus)
+{
+        const int *bus_range;
+        int len;
+
+        if (pci_bus >= pci_bus_count)
+                return;
+        bus_range = of_get_property(node, "bus-range", &len);
+        if (bus_range == NULL || len < 2 * sizeof(int)) {
+                printk(KERN_WARNING "Can't get bus-range for %s, "
+                       "assuming it starts at 0\n", node->full_name);
+                pci_to_OF_bus_map[pci_bus] = 0;
+        } else
+                pci_to_OF_bus_map[pci_bus] = bus_range[0];
+
+        for_each_child_of_node(node, node) {
+                struct pci_dev *dev;
+                const unsigned int *class_code, *reg;
+
+                class_code = of_get_property(node, "class-code", NULL);
+                if (!class_code ||
+                        ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
+                        (*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS))
+                        continue;
+                reg = of_get_property(node, "reg", NULL);
+                if (!reg)
+                        continue;
+                dev = pci_get_bus_and_slot(pci_bus, ((reg[0] >> 8) & 0xff));
+                if (!dev || !dev->subordinate) {
+                        pci_dev_put(dev);
+                        continue;
+                }
+                make_one_node_map(node, dev->subordinate->number);
+                pci_dev_put(dev);
+        }
+}
+
+void
+pcibios_make_OF_bus_map(void)
+{
+        int i;
+        struct pci_controller *hose, *tmp;
+        struct property *map_prop;
+        struct device_node *dn;
+
+        pci_to_OF_bus_map = kmalloc(pci_bus_count, GFP_KERNEL);
+        if (!pci_to_OF_bus_map) {
+                printk(KERN_ERR "Can't allocate OF bus map !\n");
+                return;
+        }
+
+        /* We fill the bus map with invalid values, that helps
+         * debugging.
+         */
+        for (i = 0; i < pci_bus_count; i++)
+                pci_to_OF_bus_map[i] = 0xff;
+
+        /* For each hose, we begin searching bridges */
+        list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
+                struct device_node *node = hose->dn;
+
+                if (!node)
+                        continue;
+                make_one_node_map(node, hose->first_busno);
+        }
+        dn = of_find_node_by_path("/");
+        map_prop = of_find_property(dn, "pci-OF-bus-map", NULL);
+        if (map_prop) {
+                BUG_ON(pci_bus_count > map_prop->length);
+                memcpy(map_prop->value, pci_to_OF_bus_map, pci_bus_count);
+        }
+        of_node_put(dn);
+#ifdef DEBUG
+        printk(KERN_INFO "PCI->OF bus map:\n");
+        for (i = 0; i < pci_bus_count; i++) {
+                if (pci_to_OF_bus_map[i] == 0xff)
+                        continue;
+                printk(KERN_INFO "%d -> %d\n", i, pci_to_OF_bus_map[i]);
+        }
+#endif
+}
+
+typedef int (*pci_OF_scan_iterator)(struct device_node *node, void *data);
+
+static struct device_node *scan_OF_pci_childs(struct device_node *parent,
+                                        pci_OF_scan_iterator filter, void *data)
+{
+        struct device_node *node;
+        struct device_node *sub_node;
+
+        for_each_child_of_node(parent, node) {
+                const unsigned int *class_code;
+
+                if (filter(node, data)) {
+                        of_node_put(node);
+                        return node;
+                }
+
+                /* For PCI<->PCI bridges or CardBus bridges, we go down
+                 * Note: some OFs create a parent node "multifunc-device" as
+                 * a fake root for all functions of a multi-function device,
+                 * we go down them as well.
+                 */
+                class_code = of_get_property(node, "class-code", NULL);
+                if ((!class_code ||
+                        ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
+                        (*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS)) &&
+                        strcmp(node->name, "multifunc-device"))
+                        continue;
+                sub_node = scan_OF_pci_childs(node, filter, data);
+                if (sub_node) {
+                        of_node_put(node);
+                        return sub_node;
+                }
+        }
+        return NULL;
+}
+
+static struct device_node *scan_OF_for_pci_dev(struct device_node *parent,
+                                               unsigned int devfn)
+{
+        struct device_node *np, *cnp;
+        const u32 *reg;
+        unsigned int psize;
+
+        for_each_child_of_node(parent, np) {
+                reg = of_get_property(np, "reg", &psize);
+                if (reg && psize >= 4 && ((reg[0] >> 8) & 0xff) == devfn)
+                        return np;
+
+                /* Note: some OFs create a parent node "multifunc-device" as
+                 * a fake root for all functions of a multi-function device,
+                 * we go down them as well. */
+                if (!strcmp(np->name, "multifunc-device")) {
+                        cnp = scan_OF_for_pci_dev(np, devfn);
+                        if (cnp)
+                                return cnp;
+                }
+        }
+        return NULL;
+}
+
+
+static struct device_node *scan_OF_for_pci_bus(struct pci_bus *bus)
+{
+        struct device_node *parent, *np;
+
+        /* Are we a root bus ? */
+        if (bus->self == NULL || bus->parent == NULL) {
+                struct pci_controller *hose = pci_bus_to_host(bus);
+                if (hose == NULL)
+                        return NULL;
+                return of_node_get(hose->dn);
+        }
+
+        /* not a root bus, we need to get our parent */
+        parent = scan_OF_for_pci_bus(bus->parent);
+        if (parent == NULL)
+                return NULL;
+
+        /* now iterate for children for a match */
+        np = scan_OF_for_pci_dev(parent, bus->self->devfn);
+        of_node_put(parent);
+
+        return np;
+}
+
+/*
+ * Scans the OF tree for a device node matching a PCI device
+ */
+struct device_node *
+pci_busdev_to_OF_node(struct pci_bus *bus, int devfn)
+{
+        struct device_node *parent, *np;
+
+        pr_debug("pci_busdev_to_OF_node(%d,0x%x)\n", bus->number, devfn);
+        parent = scan_OF_for_pci_bus(bus);
+        if (parent == NULL)
+                return NULL;
+        pr_debug(" parent is %s\n", parent ? parent->full_name : "<NULL>");
+        np = scan_OF_for_pci_dev(parent, devfn);
+        of_node_put(parent);
+        pr_debug(" result is %s\n", np ? np->full_name : "<NULL>");
+
+        /* XXX most callers don't release the returned node
+         * mostly because ppc64 doesn't increase the refcount,
+         * we need to fix that.
+         */
+        return np;
+}
+EXPORT_SYMBOL(pci_busdev_to_OF_node);
+
+struct device_node*
+pci_device_to_OF_node(struct pci_dev *dev)
+{
+        return pci_busdev_to_OF_node(dev->bus, dev->devfn);
+}
+EXPORT_SYMBOL(pci_device_to_OF_node);
+
+static int
+find_OF_pci_device_filter(struct device_node *node, void *data)
+{
+        return ((void *)node == data);
+}
+
+/*
+ * Returns the PCI device matching a given OF node
+ */
+int
+pci_device_from_OF_node(struct device_node *node, u8 *bus, u8 *devfn)
+{
+        const unsigned int *reg;
+        struct pci_controller *hose;
+        struct pci_dev *dev = NULL;
+
+        /* Make sure it's really a PCI device */
+        hose = pci_find_hose_for_OF_device(node);
+        if (!hose || !hose->dn)
+                return -ENODEV;
+        if (!scan_OF_pci_childs(hose->dn,
+                        find_OF_pci_device_filter, (void *)node))
+                return -ENODEV;
+        reg = of_get_property(node, "reg", NULL);
+        if (!reg)
+                return -ENODEV;
+        *bus = (reg[0] >> 16) & 0xff;
+        *devfn = ((reg[0] >> 8) & 0xff);
+
+        /* Ok, here we need some tweak. If we have already renumbered
+         * all busses, we can't rely on the OF bus number any more.
+         * the pci_to_OF_bus_map is not enough as several PCI busses
+         * may match the same OF bus number.
+         */
+        if (!pci_to_OF_bus_map)
+                return 0;
+
+        for_each_pci_dev(dev)
+                if (pci_to_OF_bus_map[dev->bus->number] == *bus &&
+                                dev->devfn == *devfn) {
+                        *bus = dev->bus->number;
+                        pci_dev_put(dev);
+                        return 0;
+                }
+
+        return -ENODEV;
+}
+EXPORT_SYMBOL(pci_device_from_OF_node);
+
+/* We create the "pci-OF-bus-map" property now so it appears in the
+ * /proc device tree
+ */
+void __init
+pci_create_OF_bus_map(void)
+{
+        struct property *of_prop;
+        struct device_node *dn;
+
+        of_prop = (struct property *) alloc_bootmem(sizeof(struct property) + \
+                                                                         256);
+        if (!of_prop)
+                return;
+        dn = of_find_node_by_path("/");
+        if (dn) {
+                memset(of_prop, -1, sizeof(struct property) + 256);
+                of_prop->name = "pci-OF-bus-map";
+                of_prop->length = 256;
+                of_prop->value = &of_prop[1];
+                prom_add_property(dn, of_prop);
+                of_node_put(dn);
+        }
+}
+
+static void __devinit pcibios_scan_phb(struct pci_controller *hose)
+{
+        struct pci_bus *bus;
+        struct device_node *node = hose->dn;
+        unsigned long io_offset;
+        struct resource *res = &hose->io_resource;
+
+        pr_debug("PCI: Scanning PHB %s\n",
+                 node ? node->full_name : "<NO NAME>");
+
+        /* Create an empty bus for the toplevel */
+        bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, hose);
+        if (bus == NULL) {
+                printk(KERN_ERR "Failed to create bus for PCI domain %04x\n",
+                       hose->global_number);
+                return;
+        }
+        bus->secondary = hose->first_busno;
+        hose->bus = bus;
+
+        /* Fixup IO space offset */
+        io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
+        res->start = (res->start + io_offset) & 0xffffffffu;
+        res->end = (res->end + io_offset) & 0xffffffffu;
+
+        /* Wire up PHB bus resources */
+        pcibios_setup_phb_resources(hose);
+
+        /* Scan children */
+        hose->last_busno = bus->subordinate = pci_scan_child_bus(bus);
+}
+
+static int __init pcibios_init(void)
+{
+        struct pci_controller *hose, *tmp;
+        int next_busno = 0;
+
+        printk(KERN_INFO "PCI: Probing PCI hardware\n");
+
+        if (pci_flags & PCI_REASSIGN_ALL_BUS) {
+                printk(KERN_INFO "setting pci_asign_all_busses\n");
+                pci_assign_all_buses = 1;
+        }
+
+        /* Scan all of the recorded PCI controllers.  */
+        list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
+                if (pci_assign_all_buses)
+                        hose->first_busno = next_busno;
+                hose->last_busno = 0xff;
+                pcibios_scan_phb(hose);
+                printk(KERN_INFO "calling pci_bus_add_devices()\n");
+                pci_bus_add_devices(hose->bus);
+                if (pci_assign_all_buses || next_busno <= hose->last_busno)
+                        next_busno = hose->last_busno + \
+                                        pcibios_assign_bus_offset;
+        }
+        pci_bus_count = next_busno;
+
+        /* OpenFirmware based machines need a map of OF bus
+         * numbers vs. kernel bus numbers since we may have to
+         * remap them.
+         */
+        if (pci_assign_all_buses)
+                pcibios_make_OF_bus_map();
+
+        /* Call common code to handle resource allocation */
+        pcibios_resource_survey();
+
+        return 0;
+}
+
+subsys_initcall(pcibios_init);
+
+static struct pci_controller*
+pci_bus_to_hose(int bus)
+{
+        struct pci_controller *hose, *tmp;
+
+        list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
+                if (bus >= hose->first_busno && bus <= hose->last_busno)
+                        return hose;
+        return NULL;
+}
+
+/* Provide information on locations of various I/O regions in physical
+ * memory.  Do this on a per-card basis so that we choose the right
+ * root bridge.
+ * Note that the returned IO or memory base is a physical address
+ */
+
+long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn)
+{
+        struct pci_controller *hose;
+        long result = -EOPNOTSUPP;
+
+        hose = pci_bus_to_hose(bus);
+        if (!hose)
+                return -ENODEV;
+
+        switch (which) {
+        case IOBASE_BRIDGE_NUMBER:
+                return (long)hose->first_busno;
+        case IOBASE_MEMORY:
+                return (long)hose->pci_mem_offset;
+        case IOBASE_IO:
+                return (long)hose->io_base_phys;
+        case IOBASE_ISA_IO:
+                return (long)isa_io_base;
+        case IOBASE_ISA_MEM:
+                return (long)isa_mem_base;
+        }
+
+        return result;
+}
diff --git a/arch/microblaze/pci/xilinx_pci.c b/arch/microblaze/pci/xilinx_pci.c
new file mode 100644
index 00000000000..7869a41b0f9
--- /dev/null
+++ b/arch/microblaze/pci/xilinx_pci.c
@@ -0,0 +1,168 @@
+/*
+ * PCI support for Xilinx plbv46_pci soft-core which can be used on
+ * Xilinx Virtex ML410 / ML510 boards.
+ *
+ * Copyright 2009 Roderick Colenbrander
+ * Copyright 2009 Secret Lab Technologies Ltd.
+ *
+ * The pci bridge fixup code was copied from ppc4xx_pci.c and was written
+ * by Benjamin Herrenschmidt.
+ * Copyright 2007 Ben. Herrenschmidt <benh@kernel.crashing.org>, IBM Corp.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include <linux/ioport.h>
+#include <linux/of.h>
+#include <linux/pci.h>
+#include <asm/io.h>
+
+#define XPLB_PCI_ADDR 0x10c
+#define XPLB_PCI_DATA 0x110
+#define XPLB_PCI_BUS  0x114
+
+#define PCI_HOST_ENABLE_CMD (PCI_COMMAND_SERR | PCI_COMMAND_PARITY | \
+                                PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY)
+
+static struct of_device_id xilinx_pci_match[] = {
+        { .compatible = "xlnx,plbv46-pci-1.03.a", },
+        {}
+};
+
+/**
+ * xilinx_pci_fixup_bridge - Block Xilinx PHB configuration.
+ */
+static void xilinx_pci_fixup_bridge(struct pci_dev *dev)
+{
+        struct pci_controller *hose;
+        int i;
+
+        if (dev->devfn || dev->bus->self)
+                return;
+
+        hose = pci_bus_to_host(dev->bus);
+        if (!hose)
+                return;
+
+        if (!of_match_node(xilinx_pci_match, hose->dn))
+                return;
+
+        /* Hide the PCI host BARs from the kernel as their content doesn't
+         * fit well in the resource management
+         */
+        for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
+                dev->resource[i].start = 0;
+                dev->resource[i].end = 0;
+                dev->resource[i].flags = 0;
+        }
+
+        dev_info(&dev->dev, "Hiding Xilinx plb-pci host bridge resources %s\n",
+                 pci_name(dev));
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, xilinx_pci_fixup_bridge);
+
+#ifdef DEBUG
+/**
+ * xilinx_pci_exclude_device - Don't do config access for non-root bus
+ *
+ * This is a hack.  Config access to any bus other than bus 0 does not
+ * currently work on the ML510 so we prevent it here.
+ */
+static int
+xilinx_pci_exclude_device(struct pci_controller *hose, u_char bus, u8 devfn)
+{
+        return (bus != 0);
+}
+
+/**
+ * xilinx_early_pci_scan - List pci config space for available devices
+ *
+ * List pci devices in very early phase.
+ */
+void __init xilinx_early_pci_scan(struct pci_controller *hose)
+{
+        u32 bus = 0;
+        u32 val, dev, func, offset;
+
+        /* Currently we have only 2 device connected - up-to 32 devices */
+        for (dev = 0; dev < 2; dev++) {
+                /* List only first function number - up-to 8 functions */
+                for (func = 0; func < 1; func++) {
+                        printk(KERN_INFO "%02x:%02x:%02x", bus, dev, func);
+                        /* read the first 64 standardized bytes */
+                        /* Up-to 192 bytes can be list of capabilities */
+                        for (offset = 0; offset < 64; offset += 4) {
+                                early_read_config_dword(hose, bus,
+                                        PCI_DEVFN(dev, func), offset, &val);
+                                if (offset == 0 && val == 0xFFFFFFFF) {
+                                        printk(KERN_CONT "\nABSENT");
+                                        break;
+                                }
+                                if (!(offset % 0x10))
+                                        printk(KERN_CONT "\n%04x:    ", offset);
+
+                                printk(KERN_CONT "%08x  ", val);
+                        }
+                        printk(KERN_INFO "\n");
+                }
+        }
+}
+#else
+void __init xilinx_early_pci_scan(struct pci_controller *hose)
+{
+}
+#endif
+
+/**
+ * xilinx_pci_init - Find and register a Xilinx PCI host bridge
+ */
+void __init xilinx_pci_init(void)
+{
+        struct pci_controller *hose;
+        struct resource r;
+        void __iomem *pci_reg;
+        struct device_node *pci_node;
+
+        pci_node = of_find_matching_node(NULL, xilinx_pci_match);
+        if (!pci_node)
+                return;
+
+        if (of_address_to_resource(pci_node, 0, &r)) {
+                pr_err("xilinx-pci: cannot resolve base address\n");
+                return;
+        }
+
+        hose = pcibios_alloc_controller(pci_node);
+        if (!hose) {
+                pr_err("xilinx-pci: pcibios_alloc_controller() failed\n");
+                return;
+        }
+
+        /* Setup config space */
+        setup_indirect_pci(hose, r.start + XPLB_PCI_ADDR,
+                           r.start + XPLB_PCI_DATA,
+                           INDIRECT_TYPE_SET_CFG_TYPE);
+
+        /* According to the xilinx plbv46_pci documentation the soft-core starts
+         * a self-init when the bus master enable bit is set. Without this bit
+         * set the pci bus can't be scanned.
+         */
+        early_write_config_word(hose, 0, 0, PCI_COMMAND, PCI_HOST_ENABLE_CMD);
+
+        /* Set the max latency timer to 255 */
+        early_write_config_byte(hose, 0, 0, PCI_LATENCY_TIMER, 0xff);
+
+        /* Set the max bus number to 255, and bus/subbus no's to 0 */
+        pci_reg = of_iomap(pci_node, 0);
+        out_be32(pci_reg + XPLB_PCI_BUS, 0x000000ff);
+        iounmap(pci_reg);
+
+        /* Register the host bridge with the linux kernel! */
+        pci_process_bridge_OF_ranges(hose, pci_node,
+                                        INDIRECT_TYPE_SET_CFG_TYPE);
+
+        pr_info("xilinx-pci: Registered PCI host bridge\n");
+        xilinx_early_pci_scan(hose);
+}
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 591ca0cd4c2..29e86923d1b 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -812,9 +812,9 @@ config DMA_COHERENT
 
 config DMA_NONCOHERENT
         bool
-        select DMA_NEED_PCI_MAP_STATE
+        select NEED_DMA_MAP_STATE
 
-config DMA_NEED_PCI_MAP_STATE
+config NEED_DMA_MAP_STATE
         bool
 
 config SYS_HAS_EARLY_PRINTK
diff --git a/arch/mips/alchemy/devboards/db1200/setup.c b/arch/mips/alchemy/devboards/db1200/setup.c
index 379536e3abd..be7e92ea01f 100644
--- a/arch/mips/alchemy/devboards/db1200/setup.c
+++ b/arch/mips/alchemy/devboards/db1200/setup.c
@@ -60,43 +60,6 @@ void __init board_setup(void)
         wmb();
 }
 
-/* use the hexleds to count the number of times the cpu has entered
- * wait, the dots to indicate whether the CPU is currently idle or
- * active (dots off = sleeping, dots on = working) for cases where
- * the number doesn't change for a long(er) period of time.
- */
-static void db1200_wait(void)
-{
-        __asm__("       .set    push                    \n"
-                "       .set    mips3                   \n"
-                "       .set    noreorder               \n"
-                "       cache   0x14, 0(%0)             \n"
-                "       cache   0x14, 32(%0)            \n"
-                "       cache   0x14, 64(%0)            \n"
-                /* dots off: we're about to call wait */
-                "       lui     $26, 0xb980             \n"
-                "       ori     $27, $0, 3              \n"
-                "       sb      $27, 0x18($26)          \n"
-                "       sync                            \n"
-                "       nop                             \n"
-                "       wait                            \n"
-                "       nop                             \n"
-                "       nop                             \n"
-                "       nop                             \n"
-                "       nop                             \n"
-                "       nop                             \n"
-                /* dots on: there's work to do, increment cntr */
-                "       lui     $26, 0xb980             \n"
-                "       sb      $0, 0x18($26)           \n"
-                "       lui     $26, 0xb9c0             \n"
-                "       lb      $27, 0($26)             \n"
-                "       addiu   $27, $27, 1             \n"
-                "       sb      $27, 0($26)             \n"
-                "       sync                            \n"
-                "       .set    pop                     \n"
-                : : "r" (db1200_wait));
-}
-
 static int __init db1200_arch_init(void)
 {
         /* GPIO7 is low-level triggered CPLD cascade */
@@ -110,9 +73,6 @@ static int __init db1200_arch_init(void)
         irq_to_desc(DB1200_SD0_INSERT_INT)->status |= IRQ_NOAUTOEN;
         irq_to_desc(DB1200_SD0_EJECT_INT)->status |= IRQ_NOAUTOEN;
 
-        if (cpu_wait)
-                cpu_wait = db1200_wait;
-
         return 0;
 }
 arch_initcall(db1200_arch_init);
diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c
index 246df7aca2e..2fafc78e5ce 100644
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -168,7 +168,7 @@ static struct plat_vlynq_data vlynq_high_data = {
                 .on     = vlynq_on,
                 .off    = vlynq_off,
         },
-        .reset_bit      = 26,
+        .reset_bit      = 16,
         .gpio_bit       = 19,
 };
 
@@ -600,6 +600,7 @@ static int __init ar7_register_devices(void)
         }
 
         if (ar7_has_high_cpmac()) {
+                res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status);
                 if (!res) {
                         cpmac_get_mac(1, cpmac_high_data.dev_addr);
 
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index ea17941168c..8dba8cfb752 100644
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -18,6 +18,7 @@
 #include <asm/addrspace.h>
 #include <bcm63xx_board.h>
 #include <bcm63xx_cpu.h>
+#include <bcm63xx_dev_uart.h>
 #include <bcm63xx_regs.h>
 #include <bcm63xx_io.h>
 #include <bcm63xx_dev_pci.h>
@@ -40,6 +41,7 @@ static struct board_info __initdata board_96338gw = {
         .name                           = "96338GW",
         .expected_cpu_id                = 0x6338,
 
+        .has_uart0                      = 1,
         .has_enet0                      = 1,
         .enet0 = {
                 .force_speed_100        = 1,
@@ -82,6 +84,7 @@ static struct board_info __initdata board_96338w = {
         .name                           = "96338W",
         .expected_cpu_id                = 0x6338,
 
+        .has_uart0                      = 1,
         .has_enet0                      = 1,
         .enet0 = {
                 .force_speed_100        = 1,
@@ -126,6 +129,8 @@ static struct board_info __initdata board_96338w = {
 static struct board_info __initdata board_96345gw2 = {
         .name                           = "96345GW2",
         .expected_cpu_id                = 0x6345,
+
+        .has_uart0                      = 1,
 };
 #endif
 
@@ -137,6 +142,7 @@ static struct board_info __initdata board_96348r = {
         .name                           = "96348R",
         .expected_cpu_id                = 0x6348,
 
+        .has_uart0                      = 1,
         .has_enet0                      = 1,
         .has_pci                        = 1,
 
@@ -180,6 +186,7 @@ static struct board_info __initdata board_96348gw_10 = {
         .name                           = "96348GW-10",
         .expected_cpu_id                = 0x6348,
 
+        .has_uart0                      = 1,
         .has_enet0                      = 1,
         .has_enet1                      = 1,
         .has_pci                        = 1,
@@ -239,6 +246,7 @@ static struct board_info __initdata board_96348gw_11 = {
         .name                           = "96348GW-11",
         .expected_cpu_id                = 0x6348,
 
+        .has_uart0                      = 1,
         .has_enet0                      = 1,
         .has_enet1                      = 1,
         .has_pci                        = 1,
@@ -292,6 +300,7 @@ static struct board_info __initdata board_96348gw = {
         .name                           = "96348GW",
         .expected_cpu_id                = 0x6348,
 
+        .has_uart0                      = 1,
         .has_enet0                      = 1,
         .has_enet1                      = 1,
         .has_pci                        = 1,
@@ -349,9 +358,10 @@ static struct board_info __initdata board_FAST2404 = {
         .name                           = "F@ST2404",
         .expected_cpu_id                = 0x6348,
 
-        .has_enet0                      = 1,
-        .has_enet1                      = 1,
-        .has_pci                        = 1,
+        .has_uart0                      = 1,
+        .has_enet0                      = 1,
+        .has_enet1                      = 1,
+        .has_pci                        = 1,
 
         .enet0 = {
                 .has_phy                = 1,
@@ -368,10 +378,30 @@ static struct board_info __initdata board_FAST2404 = {
         .has_ehci0                      = 1,
 };
 
+static struct board_info __initdata board_rta1025w_16 = {
+        .name                           = "RTA1025W_16",
+        .expected_cpu_id                = 0x6348,
+
+        .has_enet0                      = 1,
+        .has_enet1                      = 1,
+        .has_pci                        = 1,
+
+        .enet0 = {
+                .has_phy                = 1,
+                .use_internal_phy       = 1,
+        },
+        .enet1 = {
+                .force_speed_100        = 1,
+                .force_duplex_full      = 1,
+        },
+};
+
+
 static struct board_info __initdata board_DV201AMR = {
         .name                           = "DV201AMR",
         .expected_cpu_id                = 0x6348,
 
+        .has_uart0                      = 1,
         .has_pci                        = 1,
         .has_ohci0                      = 1,
 
@@ -391,6 +421,7 @@ static struct board_info __initdata board_96348gw_a = {
         .name                           = "96348GW-A",
         .expected_cpu_id                = 0x6348,
 
+        .has_uart0                      = 1,
         .has_enet0                      = 1,
         .has_enet1                      = 1,
         .has_pci                        = 1,
@@ -416,6 +447,7 @@ static struct board_info __initdata board_96358vw = {
         .name                           = "96358VW",
         .expected_cpu_id                = 0x6358,
 
+        .has_uart0                      = 1,
         .has_enet0                      = 1,
         .has_enet1                      = 1,
         .has_pci                        = 1,
@@ -467,6 +499,7 @@ static struct board_info __initdata board_96358vw2 = {
         .name                           = "96358VW2",
         .expected_cpu_id                = 0x6358,
 
+        .has_uart0                      = 1,
         .has_enet0                      = 1,
         .has_enet1                      = 1,
         .has_pci                        = 1,
@@ -514,6 +547,7 @@ static struct board_info __initdata board_AGPFS0 = {
         .name                           = "AGPF-S0",
         .expected_cpu_id                = 0x6358,
 
+        .has_uart0                      = 1,
         .has_enet0                      = 1,
         .has_enet1                      = 1,
         .has_pci                        = 1,
@@ -531,6 +565,27 @@ static struct board_info __initdata board_AGPFS0 = {
         .has_ohci0 = 1,
         .has_ehci0 = 1,
 };
+
+static struct board_info __initdata board_DWVS0 = {
+        .name                           = "DWV-S0",
+        .expected_cpu_id                = 0x6358,
+
+        .has_enet0                      = 1,
+        .has_enet1                      = 1,
+        .has_pci                        = 1,
+
+        .enet0 = {
+                .has_phy                = 1,
+                .use_internal_phy       = 1,
+        },
+
+        .enet1 = {
+                .force_speed_100        = 1,
+                .force_duplex_full      = 1,
+        },
+
+        .has_ohci0                      = 1,
+};
 #endif
 
 /*
@@ -552,16 +607,88 @@ static const struct board_info __initdata *bcm963xx_boards[] = {
         &board_FAST2404,
         &board_DV201AMR,
         &board_96348gw_a,
+        &board_rta1025w_16,
 #endif
 
 #ifdef CONFIG_BCM63XX_CPU_6358
         &board_96358vw,
         &board_96358vw2,
         &board_AGPFS0,
+        &board_DWVS0,
 #endif
 };
 
 /*
+ * Register a sane SPROMv2 to make the on-board
+ * bcm4318 WLAN work
+ */
+#ifdef CONFIG_SSB_PCIHOST
+static struct ssb_sprom bcm63xx_sprom = {
+        .revision               = 0x02,
+        .board_rev              = 0x17,
+        .country_code           = 0x0,
+        .ant_available_bg       = 0x3,
+        .pa0b0                  = 0x15ae,
+        .pa0b1                  = 0xfa85,
+        .pa0b2                  = 0xfe8d,
+        .pa1b0                  = 0xffff,
+        .pa1b1                  = 0xffff,
+        .pa1b2                  = 0xffff,
+        .gpio0                  = 0xff,
+        .gpio1                  = 0xff,
+        .gpio2                  = 0xff,
+        .gpio3                  = 0xff,
+        .maxpwr_bg              = 0x004c,
+        .itssi_bg               = 0x00,
+        .boardflags_lo          = 0x2848,
+        .boardflags_hi          = 0x0000,
+};
+#endif
+
+/*
+ * return board name for /proc/cpuinfo
+ */
+const char *board_get_name(void)
+{
+        return board.name;
+}
+
+/*
+ * register & return a new board mac address
+ */
+static int board_get_mac_address(u8 *mac)
+{
+        u8 *p;
+        int count;
+
+        if (mac_addr_used >= nvram.mac_addr_count) {
+                printk(KERN_ERR PFX "not enough mac address\n");
+                return -ENODEV;
+        }
+
+        memcpy(mac, nvram.mac_addr_base, ETH_ALEN);
+        p = mac + ETH_ALEN - 1;
+        count = mac_addr_used;
+
+        while (count--) {
+                do {
+                        (*p)++;
+                        if (*p != 0)
+                                break;
+                        p--;
+                } while (p != mac);
+        }
+
+        if (p == mac) {
+                printk(KERN_ERR PFX "unable to fetch mac address\n");
+                return -ENODEV;
+        }
+
+        mac_addr_used++;
+        return 0;
+}
+
+/*
  * early init callback, read nvram data from flash and checksum it
  */
 void __init board_prom_init(void)
@@ -659,6 +786,17 @@ void __init board_prom_init(void)
         }
 
         bcm_gpio_writel(val, GPIO_MODE_REG);
+
+        /* Generate MAC address for WLAN and
+         * register our SPROM */
+#ifdef CONFIG_SSB_PCIHOST
+        if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
+                memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+                memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+                if (ssb_arch_set_fallback_sprom(&bcm63xx_sprom) < 0)
+                        printk(KERN_ERR "failed to register fallback SPROM\n");
+        }
+#endif
 }
 
 /*
@@ -676,49 +814,6 @@ void __init board_setup(void)
                 panic("unexpected CPU for bcm963xx board");
 }
 
-/*
- * return board name for /proc/cpuinfo
- */
-const char *board_get_name(void)
-{
-        return board.name;
-}
-
-/*
- * register & return a new board mac address
- */
-static int board_get_mac_address(u8 *mac)
-{
-        u8 *p;
-        int count;
-
-        if (mac_addr_used >= nvram.mac_addr_count) {
-                printk(KERN_ERR PFX "not enough mac address\n");
-                return -ENODEV;
-        }
-
-        memcpy(mac, nvram.mac_addr_base, ETH_ALEN);
-        p = mac + ETH_ALEN - 1;
-        count = mac_addr_used;
-
-        while (count--) {
-                do {
-                        (*p)++;
-                        if (*p != 0)
-                                break;
-                        p--;
-                } while (p != mac);
-        }
-
-        if (p == mac) {
-                printk(KERN_ERR PFX "unable to fetch mac address\n");
-                return -ENODEV;
-        }
-
-        mac_addr_used++;
-        return 0;
-}
-
 static struct mtd_partition mtd_partitions[] = {
         {
                 .name           = "cfe",
@@ -750,33 +845,6 @@ static struct platform_device mtd_dev = {
         },
 };
 
-/*
- * Register a sane SPROMv2 to make the on-board
- * bcm4318 WLAN work
- */
-#ifdef CONFIG_SSB_PCIHOST
-static struct ssb_sprom bcm63xx_sprom = {
-        .revision               = 0x02,
-        .board_rev              = 0x17,
-        .country_code           = 0x0,
-        .ant_available_bg       = 0x3,
-        .pa0b0                  = 0x15ae,
-        .pa0b1                  = 0xfa85,
-        .pa0b2                  = 0xfe8d,
-        .pa1b0                  = 0xffff,
-        .pa1b1                  = 0xffff,
-        .pa1b2                  = 0xffff,
-        .gpio0                  = 0xff,
-        .gpio1                  = 0xff,
-        .gpio2                  = 0xff,
-        .gpio3                  = 0xff,
-        .maxpwr_bg              = 0x004c,
-        .itssi_bg               = 0x00,
-        .boardflags_lo          = 0x2848,
-        .boardflags_hi          = 0x0000,
-};
-#endif
-
 static struct gpio_led_platform_data bcm63xx_led_data;
 
 static struct platform_device bcm63xx_gpio_leds = {
@@ -792,6 +860,12 @@ int __init board_register_devices(void)
 {
         u32 val;
 
+        if (board.has_uart0)
+                bcm63xx_uart_register(0);
+
+        if (board.has_uart1)
+                bcm63xx_uart_register(1);
+
         if (board.has_pccard)
                 bcm63xx_pcmcia_register();
 
@@ -806,17 +880,6 @@ int __init board_register_devices(void)
         if (board.has_dsp)
                 bcm63xx_dsp_register(&board.dsp);
 
-        /* Generate MAC address for WLAN and
-         * register our SPROM */
-#ifdef CONFIG_SSB_PCIHOST
-        if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
-                memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-                memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-                if (ssb_arch_set_fallback_sprom(&bcm63xx_sprom) < 0)
-                        printk(KERN_ERR "failed to register fallback SPROM\n");
-        }
-#endif
-
         /* read base address of boot chip select (0) */
         if (BCMCPU_IS_6345())
                 val = 0x1fc00000;
diff --git a/arch/mips/bcm63xx/cpu.c b/arch/mips/bcm63xx/cpu.c
index 70378bb5e3f..cbb7caf86d7 100644
--- a/arch/mips/bcm63xx/cpu.c
+++ b/arch/mips/bcm63xx/cpu.c
@@ -36,6 +36,7 @@ static const unsigned long bcm96338_regs_base[] = {
         [RSET_TIMER]            = BCM_6338_TIMER_BASE,
         [RSET_WDT]              = BCM_6338_WDT_BASE,
         [RSET_UART0]            = BCM_6338_UART0_BASE,
+        [RSET_UART1]            = BCM_6338_UART1_BASE,
         [RSET_GPIO]             = BCM_6338_GPIO_BASE,
         [RSET_SPI]              = BCM_6338_SPI_BASE,
         [RSET_OHCI0]            = BCM_6338_OHCI0_BASE,
@@ -72,6 +73,7 @@ static const unsigned long bcm96345_regs_base[] = {
         [RSET_TIMER]            = BCM_6345_TIMER_BASE,
         [RSET_WDT]              = BCM_6345_WDT_BASE,
         [RSET_UART0]            = BCM_6345_UART0_BASE,
+        [RSET_UART1]            = BCM_6345_UART1_BASE,
         [RSET_GPIO]             = BCM_6345_GPIO_BASE,
         [RSET_SPI]              = BCM_6345_SPI_BASE,
         [RSET_UDC0]             = BCM_6345_UDC0_BASE,
@@ -109,6 +111,7 @@ static const unsigned long bcm96348_regs_base[] = {
         [RSET_TIMER]            = BCM_6348_TIMER_BASE,
         [RSET_WDT]              = BCM_6348_WDT_BASE,
         [RSET_UART0]            = BCM_6348_UART0_BASE,
+        [RSET_UART1]            = BCM_6348_UART1_BASE,
         [RSET_GPIO]             = BCM_6348_GPIO_BASE,
         [RSET_SPI]              = BCM_6348_SPI_BASE,
         [RSET_OHCI0]            = BCM_6348_OHCI0_BASE,
@@ -150,6 +153,7 @@ static const unsigned long bcm96358_regs_base[] = {
         [RSET_TIMER]            = BCM_6358_TIMER_BASE,
         [RSET_WDT]              = BCM_6358_WDT_BASE,
         [RSET_UART0]            = BCM_6358_UART0_BASE,
+        [RSET_UART1]            = BCM_6358_UART1_BASE,
         [RSET_GPIO]             = BCM_6358_GPIO_BASE,
         [RSET_SPI]              = BCM_6358_SPI_BASE,
         [RSET_OHCI0]            = BCM_6358_OHCI0_BASE,
@@ -170,6 +174,7 @@ static const unsigned long bcm96358_regs_base[] = {
 static const int bcm96358_irqs[] = {
         [IRQ_TIMER]             = BCM_6358_TIMER_IRQ,
         [IRQ_UART0]             = BCM_6358_UART0_IRQ,
+        [IRQ_UART1]             = BCM_6358_UART1_IRQ,
         [IRQ_DSL]               = BCM_6358_DSL_IRQ,
         [IRQ_ENET0]             = BCM_6358_ENET0_IRQ,
         [IRQ_ENET1]             = BCM_6358_ENET1_IRQ,
diff --git a/arch/mips/bcm63xx/dev-uart.c b/arch/mips/bcm63xx/dev-uart.c
index b0519461ad9..c2963da0253 100644
--- a/arch/mips/bcm63xx/dev-uart.c
+++ b/arch/mips/bcm63xx/dev-uart.c
@@ -11,31 +11,65 @@
 #include <linux/platform_device.h>
 #include <bcm63xx_cpu.h>
 
-static struct resource uart_resources[] = {
+static struct resource uart0_resources[] = {
         {
-                .start          = -1, /* filled at runtime */
-                .end            = -1, /* filled at runtime */
+                /* start & end filled at runtime */
                 .flags          = IORESOURCE_MEM,
         },
         {
-                .start          = -1, /* filled at runtime */
+                /* start filled at runtime */
                 .flags          = IORESOURCE_IRQ,
         },
 };
 
-static struct platform_device bcm63xx_uart_device = {
-        .name           = "bcm63xx_uart",
-        .id             = 0,
-        .num_resources  = ARRAY_SIZE(uart_resources),
-        .resource       = uart_resources,
+static struct resource uart1_resources[] = {
+        {
+                /* start & end filled at runtime */
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                /* start filled at runtime */
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device bcm63xx_uart_devices[] = {
+        {
+                .name           = "bcm63xx_uart",
+                .id             = 0,
+                .num_resources  = ARRAY_SIZE(uart0_resources),
+                .resource       = uart0_resources,
+        },
+
+        {
+                .name           = "bcm63xx_uart",
+                .id             = 1,
+                .num_resources  = ARRAY_SIZE(uart1_resources),
+                .resource       = uart1_resources,
+        }
 };
 
-int __init bcm63xx_uart_register(void)
+int __init bcm63xx_uart_register(unsigned int id)
 {
-        uart_resources[0].start = bcm63xx_regset_address(RSET_UART0);
-        uart_resources[0].end = uart_resources[0].start;
-        uart_resources[0].end += RSET_UART_SIZE - 1;
-        uart_resources[1].start = bcm63xx_get_irq_number(IRQ_UART0);
-        return platform_device_register(&bcm63xx_uart_device);
+        if (id >= ARRAY_SIZE(bcm63xx_uart_devices))
+                return -ENODEV;
+
+        if (id == 1 && !BCMCPU_IS_6358())
+                return -ENODEV;
+
+        if (id == 0) {
+                uart0_resources[0].start = bcm63xx_regset_address(RSET_UART0);
+                uart0_resources[0].end = uart0_resources[0].start +
+                        RSET_UART_SIZE - 1;
+                uart0_resources[1].start = bcm63xx_get_irq_number(IRQ_UART0);
+        }
+
+        if (id == 1) {
+                uart1_resources[0].start = bcm63xx_regset_address(RSET_UART1);
+                uart1_resources[0].end = uart1_resources[0].start +
+                        RSET_UART_SIZE - 1;
+                uart1_resources[1].start = bcm63xx_get_irq_number(IRQ_UART1);
+        }
+
+        return platform_device_register(&bcm63xx_uart_devices[id]);
 }
-arch_initcall(bcm63xx_uart_register);
diff --git a/arch/mips/bcm63xx/gpio.c b/arch/mips/bcm63xx/gpio.c
index 87ca3904633..315bc7f79ce 100644
--- a/arch/mips/bcm63xx/gpio.c
+++ b/arch/mips/bcm63xx/gpio.c
@@ -125,10 +125,10 @@ static struct gpio_chip bcm63xx_gpio_chip = {
 
 int __init bcm63xx_gpio_init(void)
 {
+        gpio_out_low = bcm_gpio_readl(GPIO_DATA_LO_REG);
+        gpio_out_high = bcm_gpio_readl(GPIO_DATA_HI_REG);
         bcm63xx_gpio_chip.ngpio = bcm63xx_gpio_count();
         pr_info("registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio);
 
         return gpiochip_add(&bcm63xx_gpio_chip);
 }
-
-arch_initcall(bcm63xx_gpio_init);
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index b321d3b1687..9a06fa9f9f0 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -45,9 +45,6 @@ extern struct plat_smp_ops octeon_smp_ops;
 extern void pci_console_init(const char *arg);
 #endif
 
-#ifdef CONFIG_CAVIUM_RESERVE32
-extern uint64_t octeon_reserve32_memory;
-#endif
 static unsigned long long MAX_MEMORY = 512ull << 20;
 
 struct octeon_boot_descriptor *octeon_boot_desc_ptr;
@@ -186,54 +183,6 @@ void octeon_check_cpu_bist(void)
         write_octeon_c0_dcacheerr(0);
 }
 
-#ifdef CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB
-/**
- * Called on every core to setup the wired tlb entry needed
- * if CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB is set.
- *
- */
-static void octeon_hal_setup_per_cpu_reserved32(void *unused)
-{
-        /*
-         * The config has selected to wire the reserve32 memory for all
-         * userspace applications. We need to put a wired TLB entry in for each
-         * 512MB of reserve32 memory. We only handle double 256MB pages here,
-         * so reserve32 must be multiple of 512MB.
-         */
-        uint32_t size = CONFIG_CAVIUM_RESERVE32;
-        uint32_t entrylo0 =
-                0x7 | ((octeon_reserve32_memory & ((1ul << 40) - 1)) >> 6);
-        uint32_t entrylo1 = entrylo0 + (256 << 14);
-        uint32_t entryhi = (0x80000000UL - (CONFIG_CAVIUM_RESERVE32 << 20));
-        while (size >= 512) {
-#if 0
-                pr_info("CPU%d: Adding double wired TLB entry for 0x%lx\n",
-                        smp_processor_id(), entryhi);
-#endif
-                add_wired_entry(entrylo0, entrylo1, entryhi, PM_256M);
-                entrylo0 += 512 << 14;
-                entrylo1 += 512 << 14;
-                entryhi += 512 << 20;
-                size -= 512;
-        }
-}
-#endif /* CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB */
-
-/**
- * Called to release the named block which was used to made sure
- * that nobody used the memory for something else during
- * init. Now we'll free it so userspace apps can use this
- * memory region with bootmem_alloc.
- *
- * This function is called only once from prom_free_prom_memory().
- */
-void octeon_hal_setup_reserved32(void)
-{
-#ifdef CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB
-        on_each_cpu(octeon_hal_setup_per_cpu_reserved32, NULL, 0, 1);
-#endif
-}
-
 /**
  * Reboot Octeon
  *
@@ -294,18 +243,6 @@ static void octeon_halt(void)
         octeon_kill_core(NULL);
 }
 
-#if 0
-/**
- * Platform time init specifics.
- * Returns
- */
-void __init plat_time_init(void)
-{
-        /* Nothing special here, but we are required to have one */
-}
-
-#endif
-
 /**
  * Handle all the error condition interrupts that might occur.
  *
@@ -502,25 +439,13 @@ void __init prom_init(void)
          * memory when it is getting memory from the
          * bootloader. Later, after the memory allocations are
          * complete, the reserve32 will be freed.
-         */
-#ifdef CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB
-        if (CONFIG_CAVIUM_RESERVE32 & 0x1ff)
-                pr_err("CAVIUM_RESERVE32 isn't a multiple of 512MB. "
-                       "This is required if CAVIUM_RESERVE32_USE_WIRED_TLB "
-                       "is set\n");
-        else
-                addr = cvmx_bootmem_phy_named_block_alloc(CONFIG_CAVIUM_RESERVE32 << 20,
-                                                        0, 0, 512 << 20,
-                                                        "CAVIUM_RESERVE32", 0);
-#else
-        /*
+         *
          * Allocate memory for RESERVED32 aligned on 2MB boundary. This
          * is in case we later use hugetlb entries with it.
          */
         addr = cvmx_bootmem_phy_named_block_alloc(CONFIG_CAVIUM_RESERVE32 << 20,
                                                 0, 0, 2 << 20,
                                                 "CAVIUM_RESERVE32", 0);
-#endif
         if (addr < 0)
                 pr_err("Failed to allocate CAVIUM_RESERVE32 memory area\n");
         else
@@ -817,9 +742,4 @@ void prom_free_prom_memory(void)
                 panic("Unable to request_irq(OCTEON_IRQ_RML)\n");
         }
 #endif
-
-        /* This call is here so that it is performed after any TLB
-           initializations. It needs to be after these in case the
-           CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB option is set */
-        octeon_hal_setup_reserved32();
 }
diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c
index 51e980290ce..6d99b9d8887 100644
--- a/arch/mips/cavium-octeon/smp.c
+++ b/arch/mips/cavium-octeon/smp.c
@@ -279,14 +279,6 @@ static void octeon_cpu_die(unsigned int cpu)
         uint32_t avail_coremask;
         struct cvmx_bootmem_named_block_desc *block_desc;
 
-#ifdef CONFIG_CAVIUM_OCTEON_WATCHDOG
-        /* Disable the watchdog */
-        cvmx_ciu_wdogx_t ciu_wdog;
-        ciu_wdog.u64 = cvmx_read_csr(CVMX_CIU_WDOGX(cpu));
-        ciu_wdog.s.mode = 0;
-        cvmx_write_csr(CVMX_CIU_WDOGX(cpu), ciu_wdog.u64);
-#endif
-
         while (per_cpu(cpu_state, cpu) != CPU_DEAD)
                 cpu_relax();
 
diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig
index c2f06e38c85..0583bb29150 100644
--- a/arch/mips/configs/bigsur_defconfig
+++ b/arch/mips/configs/bigsur_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.26-rc8
-# Wed Jul  2 17:02:55 2008
+# Linux kernel version: 2.6.34-rc3
+# Sat Apr  3 16:32:11 2010
 #
 CONFIG_MIPS=y
 
@@ -9,20 +9,25 @@ CONFIG_MIPS=y
 # Machine selection
 #
 # CONFIG_MACH_ALCHEMY is not set
+# CONFIG_AR7 is not set
 # CONFIG_BCM47XX is not set
+# CONFIG_BCM63XX is not set
 # CONFIG_MIPS_COBALT is not set
 # CONFIG_MACH_DECSTATION is not set
 # CONFIG_MACH_JAZZ is not set
 # CONFIG_LASAT is not set
-# CONFIG_LEMOTE_FULONG is not set
+# CONFIG_MACH_LOONGSON is not set
 # CONFIG_MIPS_MALTA is not set
 # CONFIG_MIPS_SIM is not set
-# CONFIG_MARKEINS is not set
+# CONFIG_NEC_MARKEINS is not set
 # CONFIG_MACH_VR41XX is not set
+# CONFIG_NXP_STB220 is not set
+# CONFIG_NXP_STB225 is not set
 # CONFIG_PNX8550_JBS is not set
 # CONFIG_PNX8550_STB810 is not set
 # CONFIG_PMC_MSP is not set
 # CONFIG_PMC_YOSEMITE is not set
+# CONFIG_POWERTV is not set
 # CONFIG_SGI_IP22 is not set
 # CONFIG_SGI_IP27 is not set
 # CONFIG_SGI_IP28 is not set
@@ -36,10 +41,13 @@ CONFIG_MIPS=y
 # CONFIG_SIBYTE_SENTOSA is not set
 CONFIG_SIBYTE_BIGSUR=y
 # CONFIG_SNI_RM is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_TOSHIBA_RBTX4938 is not set
+# CONFIG_MACH_TX39XX is not set
+# CONFIG_MACH_TX49XX is not set
+# CONFIG_MIKROTIK_RB532 is not set
 # CONFIG_WR_PPMC is not set
+# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
+# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
+# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
 CONFIG_SIBYTE_BCM1x80=y
 CONFIG_SIBYTE_SB1xxx_SOC=y
 # CONFIG_CPU_SB1_PASS_1 is not set
@@ -48,14 +56,13 @@ CONFIG_SIBYTE_SB1xxx_SOC=y
 # CONFIG_CPU_SB1_PASS_4 is not set
 # CONFIG_CPU_SB1_PASS_2_112x is not set
 # CONFIG_CPU_SB1_PASS_3 is not set
-# CONFIG_SIMULATION is not set
 # CONFIG_SB1_CEX_ALWAYS_FATAL is not set
 # CONFIG_SB1_CERR_STALL is not set
-CONFIG_SIBYTE_CFE=y
 # CONFIG_SIBYTE_CFE_CONSOLE is not set
 # CONFIG_SIBYTE_BUS_WATCHER is not set
 # CONFIG_SIBYTE_TBPROF is not set
 CONFIG_SIBYTE_HAS_ZBUS_PROFILING=y
+CONFIG_LOONGSON_UART_BASE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
@@ -66,15 +73,13 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CMOS_UPDATE=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_CEVT_BCM1480=y
 CONFIG_CSRC_BCM1480=y
 CONFIG_CFE=y
 CONFIG_DMA_COHERENT=y
-CONFIG_EARLY_PRINTK=y
 CONFIG_SYS_HAS_EARLY_PRINTK=y
-# CONFIG_HOTPLUG_CPU is not set
 # CONFIG_NO_IOPORT is not set
 CONFIG_CPU_BIG_ENDIAN=y
 # CONFIG_CPU_LITTLE_ENDIAN is not set
@@ -88,7 +93,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
 #
 # CPU selection
 #
-# CONFIG_CPU_LOONGSON2 is not set
+# CONFIG_CPU_LOONGSON2E is not set
+# CONFIG_CPU_LOONGSON2F is not set
 # CONFIG_CPU_MIPS32_R1 is not set
 # CONFIG_CPU_MIPS32_R2 is not set
 # CONFIG_CPU_MIPS64_R1 is not set
@@ -101,6 +107,7 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
 # CONFIG_CPU_TX49XX is not set
 # CONFIG_CPU_R5000 is not set
 # CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R5500 is not set
 # CONFIG_CPU_R6000 is not set
 # CONFIG_CPU_NEVADA is not set
 # CONFIG_CPU_R8000 is not set
@@ -108,6 +115,7 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
 # CONFIG_CPU_RM7000 is not set
 # CONFIG_CPU_RM9000 is not set
 CONFIG_CPU_SB1=y
+# CONFIG_CPU_CAVIUM_OCTEON is not set
 CONFIG_SYS_HAS_CPU_SB1=y
 CONFIG_WEAK_ORDERING=y
 CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
@@ -123,11 +131,13 @@ CONFIG_64BIT=y
 CONFIG_PAGE_SIZE_4KB=y
 # CONFIG_PAGE_SIZE_8KB is not set
 # CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_32KB is not set
 # CONFIG_PAGE_SIZE_64KB is not set
 # CONFIG_SIBYTE_DMA_PAGEOPS is not set
 CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMP is not set
 # CONFIG_MIPS_MT_SMTC is not set
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
@@ -142,18 +152,17 @@ CONFIG_FLATMEM_MANUAL=y
 # CONFIG_SPARSEMEM_MANUAL is not set
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
-CONFIG_RESOURCES_64BIT=y
+CONFIG_PHYS_ADDR_T_64BIT=y
 CONFIG_ZONE_DMA_FLAG=0
 CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 CONFIG_SMP=y
 CONFIG_SYS_SUPPORTS_SMP=y
 CONFIG_NR_CPUS_DEFAULT_4=y
 CONFIG_NR_CPUS=4
-# CONFIG_MIPS_CMP is not set
 CONFIG_TICK_ONESHOT=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
@@ -175,6 +184,7 @@ CONFIG_SECCOMP=y
 CONFIG_LOCKDEP_SUPPORT=y
 CONFIG_STACKTRACE_SUPPORT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -188,6 +198,7 @@ CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_BSD_PROCESS_ACCT_V3=y
 CONFIG_TASKSTATS=y
@@ -195,23 +206,39 @@ CONFIG_TASK_DELAY_ACCT=y
 CONFIG_TASK_XACCT=y
 CONFIG_TASK_IO_ACCOUNTING=y
 CONFIG_AUDIT=y
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=64
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_RCU_FAST_NO_HZ is not set
+# CONFIG_TREE_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=16
 # CONFIG_CGROUPS is not set
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 CONFIG_RELAY=y
-# CONFIG_NAMESPACES is not set
+CONFIG_NAMESPACES=y
+CONFIG_UTS_NS=y
+CONFIG_IPC_NS=y
+CONFIG_USER_NS=y
+CONFIG_PID_NS=y
+CONFIG_NET_NS=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 CONFIG_EMBEDDED=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
@@ -222,29 +249,36 @@ CONFIG_PRINTK=y
 CONFIG_BUG=y
 CONFIG_ELF_CORE=y
 # CONFIG_PCSPKR_PLATFORM is not set
-CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
 CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_PCI_QUIRKS=y
+CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
-# CONFIG_HAVE_KPROBES is not set
-# CONFIG_HAVE_KRETPROBES is not set
-# CONFIG_HAVE_DMA_ATTRS is not set
-CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_HAVE_SYSCALL_WRAPPERS=y
+CONFIG_USE_GENERIC_SMP_HELPERS=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -252,26 +286,52 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 CONFIG_MODVERSIONS=y
 CONFIG_MODULE_SRCVERSION_ALL=y
-CONFIG_KMOD=y
 CONFIG_STOP_MACHINE=y
 CONFIG_BLOCK=y
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
 CONFIG_BLOCK_COMPAT=y
 
 #
 # IO Schedulers
 #
 CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
 CONFIG_IOSCHED_DEADLINE=y
 CONFIG_IOSCHED_CFQ=y
-CONFIG_DEFAULT_AS=y
 # CONFIG_DEFAULT_DEADLINE is not set
-# CONFIG_DEFAULT_CFQ is not set
+CONFIG_DEFAULT_CFQ=y
 # CONFIG_DEFAULT_NOOP is not set
-CONFIG_DEFAULT_IOSCHED="anticipatory"
-CONFIG_CLASSIC_RCU=y
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+CONFIG_INLINE_SPIN_UNLOCK=y
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+CONFIG_INLINE_READ_UNLOCK=y
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+CONFIG_INLINE_WRITE_UNLOCK=y
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+CONFIG_MUTEX_SPIN_ON_OWNER=y
+# CONFIG_FREEZER is not set
 
 #
 # Bus options (PCI, PCMCIA, EISA, ISA, TC)
@@ -280,8 +340,9 @@ CONFIG_HW_HAS_PCI=y
 CONFIG_PCI=y
 CONFIG_PCI_DOMAINS=y
 # CONFIG_ARCH_SUPPORTS_MSI is not set
-CONFIG_PCI_LEGACY=y
 CONFIG_PCI_DEBUG=y
+# CONFIG_PCI_STUB is not set
+# CONFIG_PCI_IOV is not set
 CONFIG_MMU=y
 CONFIG_ZONE_DMA32=y
 # CONFIG_PCCARD is not set
@@ -291,6 +352,8 @@ CONFIG_ZONE_DMA32=y
 # Executable file formats
 #
 CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
 # CONFIG_BINFMT_MISC is not set
 CONFIG_MIPS32_COMPAT=y
 CONFIG_COMPAT=y
@@ -304,23 +367,20 @@ CONFIG_BINFMT_ELF32=y
 #
 CONFIG_PM=y
 # CONFIG_PM_DEBUG is not set
-
-#
-# Networking
-#
+# CONFIG_PM_RUNTIME is not set
 CONFIG_NET=y
 
 #
 # Networking options
 #
 CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=m
 # CONFIG_XFRM_SUB_POLICY is not set
 CONFIG_XFRM_MIGRATE=y
 # CONFIG_XFRM_STATISTICS is not set
+CONFIG_XFRM_IPCOMP=m
 CONFIG_NET_KEY=y
 CONFIG_NET_KEY_MIGRATE=y
 CONFIG_INET=y
@@ -353,36 +413,6 @@ CONFIG_INET_TCP_DIAG=y
 CONFIG_TCP_CONG_CUBIC=y
 CONFIG_DEFAULT_TCP_CONG="cubic"
 CONFIG_TCP_MD5SIG=y
-CONFIG_IP_VS=m
-# CONFIG_IP_VS_DEBUG is not set
-CONFIG_IP_VS_TAB_BITS=12
-
-#
-# IPVS transport protocol load balancing support
-#
-CONFIG_IP_VS_PROTO_TCP=y
-CONFIG_IP_VS_PROTO_UDP=y
-CONFIG_IP_VS_PROTO_ESP=y
-CONFIG_IP_VS_PROTO_AH=y
-
-#
-# IPVS scheduler
-#
-CONFIG_IP_VS_RR=m
-CONFIG_IP_VS_WRR=m
-CONFIG_IP_VS_LC=m
-CONFIG_IP_VS_WLC=m
-CONFIG_IP_VS_LBLC=m
-CONFIG_IP_VS_LBLCR=m
-CONFIG_IP_VS_DH=m
-CONFIG_IP_VS_SH=m
-CONFIG_IP_VS_SED=m
-CONFIG_IP_VS_NQ=m
-
-#
-# IPVS application helper
-#
-CONFIG_IP_VS_FTP=m
 CONFIG_IPV6=m
 CONFIG_IPV6_PRIVACY=y
 CONFIG_IPV6_ROUTER_PREF=y
@@ -399,11 +429,13 @@ CONFIG_INET6_XFRM_MODE_TUNNEL=m
 CONFIG_INET6_XFRM_MODE_BEET=m
 CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
 CONFIG_IPV6_SIT=m
+CONFIG_IPV6_SIT_6RD=y
 CONFIG_IPV6_NDISC_NODETYPE=y
 CONFIG_IPV6_TUNNEL=m
 CONFIG_IPV6_MULTIPLE_TABLES=y
 CONFIG_IPV6_SUBTREES=y
 # CONFIG_IPV6_MROUTE is not set
+CONFIG_NETLABEL=y
 CONFIG_NETWORK_SECMARK=y
 CONFIG_NETFILTER=y
 # CONFIG_NETFILTER_DEBUG is not set
@@ -421,19 +453,53 @@ CONFIG_NF_CONNTRACK_IRC=m
 CONFIG_NF_CONNTRACK_SIP=m
 CONFIG_NF_CT_NETLINK=m
 CONFIG_NETFILTER_XTABLES=m
+CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
 CONFIG_NETFILTER_XT_TARGET_MARK=m
 CONFIG_NETFILTER_XT_TARGET_NFLOG=m
 CONFIG_NETFILTER_XT_TARGET_SECMARK=m
-CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
 CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
 CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
 CONFIG_NETFILTER_XT_MATCH_MARK=m
 CONFIG_NETFILTER_XT_MATCH_POLICY=m
 CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_IP_VS=m
+CONFIG_IP_VS_IPV6=y
+# CONFIG_IP_VS_DEBUG is not set
+CONFIG_IP_VS_TAB_BITS=12
+
+#
+# IPVS transport protocol load balancing support
+#
+CONFIG_IP_VS_PROTO_TCP=y
+CONFIG_IP_VS_PROTO_UDP=y
+CONFIG_IP_VS_PROTO_AH_ESP=y
+CONFIG_IP_VS_PROTO_ESP=y
+CONFIG_IP_VS_PROTO_AH=y
+CONFIG_IP_VS_PROTO_SCTP=y
+
+#
+# IPVS scheduler
+#
+CONFIG_IP_VS_RR=m
+CONFIG_IP_VS_WRR=m
+CONFIG_IP_VS_LC=m
+CONFIG_IP_VS_WLC=m
+CONFIG_IP_VS_LBLC=m
+CONFIG_IP_VS_LBLCR=m
+CONFIG_IP_VS_DH=m
+CONFIG_IP_VS_SH=m
+CONFIG_IP_VS_SED=m
+CONFIG_IP_VS_NQ=m
+
+#
+# IPVS application helper
+#
+CONFIG_IP_VS_FTP=m
 
 #
 # IP: Netfilter Configuration
 #
+CONFIG_NF_DEFRAG_IPV4=m
 CONFIG_NF_CONNTRACK_IPV4=m
 CONFIG_NF_CONNTRACK_PROC_COMPAT=y
 CONFIG_IP_NF_IPTABLES=m
@@ -459,22 +525,44 @@ CONFIG_IP_NF_MANGLE=m
 CONFIG_NF_CONNTRACK_IPV6=m
 CONFIG_IP6_NF_IPTABLES=m
 CONFIG_IP6_NF_MATCH_IPV6HEADER=m
-CONFIG_IP6_NF_FILTER=m
 CONFIG_IP6_NF_TARGET_LOG=m
+CONFIG_IP6_NF_FILTER=m
 CONFIG_IP6_NF_TARGET_REJECT=m
 CONFIG_IP6_NF_MANGLE=m
-# CONFIG_IP_DCCP is not set
+CONFIG_IP_DCCP=m
+CONFIG_INET_DCCP_DIAG=m
+
+#
+# DCCP CCIDs Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP_CCID2_DEBUG is not set
+CONFIG_IP_DCCP_CCID3=y
+# CONFIG_IP_DCCP_CCID3_DEBUG is not set
+CONFIG_IP_DCCP_CCID3_RTO=100
+CONFIG_IP_DCCP_TFRC_LIB=y
+
+#
+# DCCP Kernel Hacking
+#
+# CONFIG_IP_DCCP_DEBUG is not set
 CONFIG_IP_SCTP=m
 # CONFIG_SCTP_DBG_MSG is not set
 # CONFIG_SCTP_DBG_OBJCNT is not set
 # CONFIG_SCTP_HMAC_NONE is not set
-# CONFIG_SCTP_HMAC_SHA1 is not set
-CONFIG_SCTP_HMAC_MD5=y
+CONFIG_SCTP_HMAC_SHA1=y
+# CONFIG_SCTP_HMAC_MD5 is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
+CONFIG_STP=m
+CONFIG_GARP=m
+CONFIG_BRIDGE=m
+CONFIG_BRIDGE_IGMP_SNOOPING=y
+# CONFIG_NET_DSA is not set
+CONFIG_VLAN_8021Q=m
+CONFIG_VLAN_8021Q_GVRP=y
 # CONFIG_DECNET is not set
+CONFIG_LLC=m
 # CONFIG_LLC2 is not set
 # CONFIG_IPX is not set
 # CONFIG_ATALK is not set
@@ -482,26 +570,47 @@ CONFIG_SCTP_HMAC_MD5=y
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
 # CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
 
 #
 # Network testing
 #
 # CONFIG_NET_PKTGEN is not set
-# CONFIG_HAMRADIO is not set
+CONFIG_HAMRADIO=y
+
+#
+# Packet Radio protocols
+#
+CONFIG_AX25=m
+CONFIG_AX25_DAMA_SLAVE=y
+CONFIG_NETROM=m
+CONFIG_ROSE=m
+
+#
+# AX.25 network device drivers
+#
+CONFIG_MKISS=m
+CONFIG_6PACK=m
+CONFIG_BPQETHER=m
+CONFIG_BAYCOM_SER_FDX=m
+CONFIG_BAYCOM_SER_HDX=m
+CONFIG_YAM=m
 # CONFIG_CAN is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
 CONFIG_FIB_RULES=y
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+# CONFIG_LIB80211 is not set
 
 #
-# Wireless
+# CFG80211 needs to be enabled for MAC80211
 #
-# CONFIG_CFG80211 is not set
-# CONFIG_WIRELESS_EXT is not set
-# CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
+# CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
 
@@ -513,9 +622,12 @@ CONFIG_FIB_RULES=y
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=m
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_DEBUG_DRIVER is not set
 # CONFIG_DEBUG_DEVRES is not set
 # CONFIG_SYS_HYPERVISOR is not set
@@ -530,33 +642,53 @@ CONFIG_BLK_DEV=y
 # CONFIG_BLK_DEV_COW_COMMON is not set
 CONFIG_BLK_DEV_LOOP=m
 CONFIG_BLK_DEV_CRYPTOLOOP=m
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
 CONFIG_BLK_DEV_NBD=m
 # CONFIG_BLK_DEV_SX8 is not set
 # CONFIG_BLK_DEV_RAM is not set
 # CONFIG_CDROM_PKTCDVD is not set
 # CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
 CONFIG_MISC_DEVICES=y
+# CONFIG_AD525X_DPOT is not set
 # CONFIG_PHANTOM is not set
-# CONFIG_EEPROM_93CX6 is not set
 CONFIG_SGI_IOC4=m
 # CONFIG_TIFM_CORE is not set
+# CONFIG_ICS932S401 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_HP_ILO is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+CONFIG_EEPROM_LEGACY=y
+CONFIG_EEPROM_MAX6875=y
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_CB710_CORE is not set
 CONFIG_HAVE_IDE=y
 CONFIG_IDE=y
-CONFIG_IDE_MAX_HWIFS=4
-CONFIG_BLK_DEV_IDE=y
 
 #
 # Please see Documentation/ide/ide.txt for help/info on IDE drives
 #
+CONFIG_IDE_XFER_MODE=y
+CONFIG_IDE_TIMINGS=y
+CONFIG_IDE_ATAPI=y
 # CONFIG_BLK_DEV_IDE_SATA is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
+CONFIG_IDE_GD=y
+CONFIG_IDE_GD_ATA=y
+# CONFIG_IDE_GD_ATAPI is not set
 CONFIG_BLK_DEV_IDECD=y
 CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y
 CONFIG_BLK_DEV_IDETAPE=y
-CONFIG_BLK_DEV_IDEFLOPPY=y
-# CONFIG_BLK_DEV_IDESCSI is not set
 # CONFIG_IDE_TASK_IOCTL is not set
 CONFIG_IDE_PROC_FS=y
 
@@ -581,14 +713,13 @@ CONFIG_BLK_DEV_IDEDMA_PCI=y
 # CONFIG_BLK_DEV_AMD74XX is not set
 CONFIG_BLK_DEV_CMD64X=y
 # CONFIG_BLK_DEV_TRIFLEX is not set
-# CONFIG_BLK_DEV_CY82C693 is not set
 # CONFIG_BLK_DEV_CS5520 is not set
 # CONFIG_BLK_DEV_CS5530 is not set
-# CONFIG_BLK_DEV_HPT34X is not set
 # CONFIG_BLK_DEV_HPT366 is not set
 # CONFIG_BLK_DEV_JMICRON is not set
 # CONFIG_BLK_DEV_SC1200 is not set
 # CONFIG_BLK_DEV_PIIX is not set
+# CONFIG_BLK_DEV_IT8172 is not set
 CONFIG_BLK_DEV_IT8213=m
 # CONFIG_BLK_DEV_IT821X is not set
 # CONFIG_BLK_DEV_NS87415 is not set
@@ -600,14 +731,12 @@ CONFIG_BLK_DEV_IT8213=m
 # CONFIG_BLK_DEV_TRM290 is not set
 # CONFIG_BLK_DEV_VIA82CXXX is not set
 CONFIG_BLK_DEV_TC86C001=m
-# CONFIG_BLK_DEV_IDE_SWARM is not set
 CONFIG_BLK_DEV_IDEDMA=y
-# CONFIG_BLK_DEV_HD_ONLY is not set
-# CONFIG_BLK_DEV_HD is not set
 
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -625,10 +754,6 @@ CONFIG_BLK_DEV_SR=m
 CONFIG_BLK_DEV_SR_VENDOR=y
 CONFIG_CHR_DEV_SG=m
 CONFIG_CHR_DEV_SCH=m
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
 # CONFIG_SCSI_MULTI_LUN is not set
 # CONFIG_SCSI_CONSTANTS is not set
 # CONFIG_SCSI_LOGGING is not set
@@ -645,27 +770,36 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_SRP_ATTRS is not set
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_CXGB3_ISCSI is not set
+# CONFIG_SCSI_BNX2_ISCSI is not set
+# CONFIG_BE2ISCSI is not set
 # CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_HPSA is not set
 # CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_3W_SAS is not set
 # CONFIG_SCSI_ACARD is not set
 # CONFIG_SCSI_AACRAID is not set
 # CONFIG_SCSI_AIC7XXX is not set
 # CONFIG_SCSI_AIC7XXX_OLD is not set
 # CONFIG_SCSI_AIC79XX is not set
 # CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_MVSAS is not set
 # CONFIG_SCSI_DPT_I2O is not set
 # CONFIG_SCSI_ADVANSYS is not set
 # CONFIG_SCSI_ARCMSR is not set
 # CONFIG_MEGARAID_NEWGEN is not set
 # CONFIG_MEGARAID_LEGACY is not set
 # CONFIG_MEGARAID_SAS is not set
+# CONFIG_SCSI_MPT2SAS is not set
 # CONFIG_SCSI_HPTIOP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_FCOE is not set
 # CONFIG_SCSI_DMX3191D is not set
 # CONFIG_SCSI_FUTURE_DOMAIN is not set
 # CONFIG_SCSI_IPS is not set
 # CONFIG_SCSI_INITIO is not set
 # CONFIG_SCSI_INIA100 is not set
-# CONFIG_SCSI_MVSAS is not set
 # CONFIG_SCSI_STEX is not set
 # CONFIG_SCSI_SYM53C8XX_2 is not set
 # CONFIG_SCSI_IPR is not set
@@ -676,9 +810,15 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_DC395x is not set
 # CONFIG_SCSI_DC390T is not set
 # CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_PMCRAID is not set
+# CONFIG_SCSI_PM8001 is not set
 # CONFIG_SCSI_SRP is not set
+# CONFIG_SCSI_BFA_FC is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
 CONFIG_SATA_PMP=y
 # CONFIG_SATA_AHCI is not set
 CONFIG_SATA_SIL24=y
@@ -700,6 +840,7 @@ CONFIG_ATA_SFF=y
 # CONFIG_PATA_ALI is not set
 # CONFIG_PATA_AMD is not set
 # CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATP867X is not set
 # CONFIG_PATA_ATIIXP is not set
 # CONFIG_PATA_CMD640_PCI is not set
 # CONFIG_PATA_CMD64X is not set
@@ -715,6 +856,7 @@ CONFIG_ATA_SFF=y
 # CONFIG_PATA_IT821X is not set
 # CONFIG_PATA_IT8213 is not set
 # CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_LEGACY is not set
 # CONFIG_PATA_TRIFLEX is not set
 # CONFIG_PATA_MARVELL is not set
 # CONFIG_PATA_MPIIX is not set
@@ -725,14 +867,16 @@ CONFIG_ATA_SFF=y
 # CONFIG_PATA_NS87415 is not set
 # CONFIG_PATA_OPTI is not set
 # CONFIG_PATA_OPTIDMA is not set
+# CONFIG_PATA_PDC2027X is not set
 # CONFIG_PATA_PDC_OLD is not set
 # CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RDC is not set
 # CONFIG_PATA_RZ1000 is not set
 # CONFIG_PATA_SC1200 is not set
 # CONFIG_PATA_SERVERWORKS is not set
-# CONFIG_PATA_PDC2027X is not set
 CONFIG_PATA_SIL680=y
 # CONFIG_PATA_SIS is not set
+# CONFIG_PATA_TOSHIBA is not set
 # CONFIG_PATA_VIA is not set
 # CONFIG_PATA_WINBOND is not set
 # CONFIG_PATA_PLATFORM is not set
@@ -745,13 +889,16 @@ CONFIG_PATA_SIL680=y
 #
 
 #
-# Enable only one of the two stacks, unless you know what you are doing
+# You can enable one or both FireWire driver stacks.
+#
+
+#
+# The newer stack is recommended.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
 # CONFIG_I2O is not set
 CONFIG_NETDEVICES=y
-# CONFIG_NETDEVICES_MULTIQUEUE is not set
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
 # CONFIG_MACVLAN is not set
@@ -774,6 +921,9 @@ CONFIG_PHYLIB=y
 # CONFIG_BROADCOM_PHY is not set
 # CONFIG_ICPLUS_PHY is not set
 # CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
 # CONFIG_FIXED_PHY is not set
 # CONFIG_MDIO_BITBANG is not set
 CONFIG_NET_ETHERNET=y
@@ -783,23 +933,33 @@ CONFIG_MII=y
 # CONFIG_SUNGEM is not set
 # CONFIG_CASSINI is not set
 # CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_SMC91X is not set
 # CONFIG_DM9000 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
 # CONFIG_NET_TULIP is not set
 # CONFIG_HP100 is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
 # CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_NET_PCI is not set
 # CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851_MLL is not set
+# CONFIG_ATL2 is not set
 CONFIG_NETDEV_1000=y
 # CONFIG_ACENIC is not set
 # CONFIG_DL2K is not set
 # CONFIG_E1000 is not set
 # CONFIG_E1000E is not set
-# CONFIG_E1000E_ENABLED is not set
 # CONFIG_IP1000 is not set
 # CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
 # CONFIG_NS83820 is not set
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
@@ -811,29 +971,42 @@ CONFIG_SB1250_MAC=y
 # CONFIG_VIA_VELOCITY is not set
 # CONFIG_TIGON3 is not set
 # CONFIG_BNX2 is not set
+# CONFIG_CNIC is not set
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
+# CONFIG_ATL1E is not set
+# CONFIG_ATL1C is not set
+# CONFIG_JME is not set
 CONFIG_NETDEV_10000=y
+CONFIG_MDIO=m
 # CONFIG_CHELSIO_T1 is not set
+CONFIG_CHELSIO_T3_DEPENDS=y
 CONFIG_CHELSIO_T3=m
+# CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
+# CONFIG_VXGE is not set
 # CONFIG_MYRI10GE is not set
 CONFIG_NETXEN_NIC=m
 # CONFIG_NIU is not set
+# CONFIG_MLX4_EN is not set
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
+# CONFIG_QLGE is not set
 # CONFIG_SFC is not set
+# CONFIG_BE2NET is not set
 # CONFIG_TR is not set
+CONFIG_WLAN=y
+# CONFIG_ATMEL is not set
+# CONFIG_PRISM54 is not set
+# CONFIG_HOSTAP is not set
 
 #
-# Wireless LAN
+# Enable WiMAX (Networking options) to see the WiMAX drivers
 #
-# CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
-# CONFIG_IWLWIFI_LEDS is not set
 # CONFIG_WAN is not set
 # CONFIG_FDDI is not set
 # CONFIG_HIPPI is not set
@@ -856,6 +1029,7 @@ CONFIG_SLIP_MODE_SLIP6=y
 # CONFIG_NETCONSOLE is not set
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_VMXNET3 is not set
 # CONFIG_ISDN is not set
 # CONFIG_PHONE is not set
 
@@ -873,6 +1047,7 @@ CONFIG_SERIO_SERPORT=y
 # CONFIG_SERIO_PCIPS2 is not set
 # CONFIG_SERIO_LIBPS2 is not set
 CONFIG_SERIO_RAW=m
+# CONFIG_SERIO_ALTERA_PS2 is not set
 # CONFIG_GAMEPORT is not set
 
 #
@@ -893,8 +1068,6 @@ CONFIG_SERIAL_NONSTANDARD=y
 # CONFIG_N_HDLC is not set
 # CONFIG_RISCOM8 is not set
 # CONFIG_SPECIALIX is not set
-# CONFIG_SX is not set
-# CONFIG_RIO is not set
 # CONFIG_STALDRV is not set
 # CONFIG_NOZOMI is not set
 
@@ -911,7 +1084,9 @@ CONFIG_SERIAL_SB1250_DUART_CONSOLE=y
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=256
 # CONFIG_IPMI_HANDLER is not set
@@ -923,89 +1098,99 @@ CONFIG_LEGACY_PTY_COUNT=256
 CONFIG_DEVPORT=y
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
 
 #
 # I2C Hardware Bus support
 #
+
+#
+# PC SMBus host controller drivers
+#
 # CONFIG_I2C_ALI1535 is not set
 # CONFIG_I2C_ALI1563 is not set
 # CONFIG_I2C_ALI15X3 is not set
 # CONFIG_I2C_AMD756 is not set
 # CONFIG_I2C_AMD8111 is not set
 # CONFIG_I2C_I801 is not set
-# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_ISCH is not set
 # CONFIG_I2C_PIIX4 is not set
 # CONFIG_I2C_NFORCE2 is not set
-# CONFIG_I2C_OCORES is not set
-# CONFIG_I2C_PARPORT_LIGHT is not set
-# CONFIG_I2C_PROSAVAGE is not set
-# CONFIG_I2C_SAVAGE4 is not set
-CONFIG_I2C_SIBYTE=y
-# CONFIG_I2C_SIMTEC is not set
 # CONFIG_I2C_SIS5595 is not set
 # CONFIG_I2C_SIS630 is not set
 # CONFIG_I2C_SIS96X is not set
-# CONFIG_I2C_TAOS_EVM is not set
-# CONFIG_I2C_STUB is not set
 # CONFIG_I2C_VIA is not set
 # CONFIG_I2C_VIAPRO is not set
-# CONFIG_I2C_VOODOO3 is not set
-# CONFIG_I2C_PCA_PLATFORM is not set
 
 #
-# Miscellaneous I2C Chip support
+# I2C system bus drivers (mostly embedded / system-on-chip)
 #
-# CONFIG_DS1682 is not set
-CONFIG_EEPROM_LEGACY=y
-CONFIG_SENSORS_PCF8574=y
-# CONFIG_PCF8575 is not set
-CONFIG_SENSORS_PCF8591=y
-CONFIG_EEPROM_MAX6875=y
-# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+CONFIG_I2C_SIBYTE=y
+# CONFIG_I2C_STUB is not set
 CONFIG_I2C_DEBUG_CORE=y
 CONFIG_I2C_DEBUG_ALGO=y
 CONFIG_I2C_DEBUG_BUS=y
-CONFIG_I2C_DEBUG_CHIP=y
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
 
 #
 # Sonics Silicon Backplane
 #
-CONFIG_SSB_POSSIBLE=y
 # CONFIG_SSB is not set
 
 #
 # Multifunction device drivers
 #
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
-
-#
-# Multimedia devices
-#
-
-#
-# Multimedia core support
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_DVB_CORE is not set
-# CONFIG_VIDEO_MEDIA is not set
-
-#
-# Multimedia drivers
-#
-# CONFIG_DAB is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_LPC_SCH is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
 
 #
 # Graphics support
 #
+CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1016,10 +1201,6 @@ CONFIG_SSB_POSSIBLE=y
 # Display device support
 #
 # CONFIG_DISPLAY_SUPPORT is not set
-
-#
-# Sound
-#
 # CONFIG_SOUND is not set
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
@@ -1030,9 +1211,18 @@ CONFIG_USB_ARCH_HAS_EHCI=y
 # CONFIG_USB_OTG_BLACKLIST_HUB is not set
 
 #
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+# Enable Host or Gadget support to see Inventra options
+#
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
 #
 # CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_UWB is not set
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
@@ -1040,41 +1230,66 @@ CONFIG_USB_ARCH_HAS_EHCI=y
 # CONFIG_INFINIBAND is not set
 CONFIG_RTC_LIB=y
 # CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
 
 #
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
 # File systems
 #
 CONFIG_EXT2_FS=m
 CONFIG_EXT2_FS_XATTR=y
-# CONFIG_EXT2_FS_POSIX_ACL is not set
-# CONFIG_EXT2_FS_SECURITY is not set
-# CONFIG_EXT2_FS_XIP is not set
-CONFIG_EXT3_FS=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+CONFIG_EXT2_FS_XIP=y
+CONFIG_EXT3_FS=m
+CONFIG_EXT3_DEFAULTS_TO_ORDERED=y
 CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-# CONFIG_EXT4DEV_FS is not set
-CONFIG_JBD=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_XATTR=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
+# CONFIG_EXT4_DEBUG is not set
+CONFIG_FS_XIP=y
+CONFIG_JBD=m
+CONFIG_JBD2=y
 CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
-# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FS_POSIX_ACL=y
 # CONFIG_XFS_FS is not set
 # CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
 CONFIG_QUOTA=y
 CONFIG_QUOTA_NETLINK_INTERFACE=y
 # CONFIG_PRINT_QUOTA_WARNING is not set
+CONFIG_QUOTA_TREE=m
 # CONFIG_QFMT_V1 is not set
 CONFIG_QFMT_V2=m
 CONFIG_QUOTACTL=y
 CONFIG_AUTOFS_FS=m
 CONFIG_AUTOFS4_FS=m
 CONFIG_FUSE_FS=m
+# CONFIG_CUSE is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
 
 #
 # CD-ROM/DVD Filesystems
@@ -1103,15 +1318,13 @@ CONFIG_NTFS_RW=y
 CONFIG_PROC_FS=y
 CONFIG_PROC_KCORE=y
 CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
 CONFIG_SYSFS=y
 CONFIG_TMPFS=y
 # CONFIG_TMPFS_POSIX_ACL is not set
 # CONFIG_HUGETLB_PAGE is not set
 CONFIG_CONFIGFS_FS=m
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_ECRYPT_FS is not set
@@ -1120,9 +1333,12 @@ CONFIG_CONFIGFS_FS=m
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
 # CONFIG_ROMFS_FS is not set
@@ -1133,16 +1349,17 @@ CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 # CONFIG_NFS_V3_ACL is not set
 # CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
 CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
 CONFIG_LOCKD=y
 CONFIG_LOCKD_V4=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_BIND34 is not set
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SUNRPC_GSS=m
+CONFIG_RPCSEC_GSS_KRB5=m
+CONFIG_RPCSEC_GSS_SPKM3=m
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
@@ -1205,12 +1422,18 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=2048
 CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
 CONFIG_DEBUG_KERNEL=y
 # CONFIG_DEBUG_SHIRQ is not set
 CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
@@ -1219,23 +1442,53 @@ CONFIG_SCHED_DEBUG=y
 # CONFIG_DEBUG_RT_MUTEXES is not set
 # CONFIG_RT_MUTEX_TESTER is not set
 # CONFIG_DEBUG_SPINLOCK is not set
-CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_MUTEXES is not set
 # CONFIG_DEBUG_LOCK_ALLOC is not set
 # CONFIG_PROVE_LOCKING is not set
 # CONFIG_LOCK_STAT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+CONFIG_DEBUG_SPINLOCK_SLEEP=y
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
 # CONFIG_DEBUG_KOBJECT is not set
 # CONFIG_DEBUG_INFO is not set
 # CONFIG_DEBUG_VM is not set
 # CONFIG_DEBUG_WRITECOUNT is not set
-# CONFIG_DEBUG_LIST is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+CONFIG_DEBUG_LIST=y
 # CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
+CONFIG_RCU_CPU_STALL_DETECTOR=y
 # CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_BOOT_TRACER is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_EARLY_PRINTK=y
 # CONFIG_CMDLINE_BOOL is not set
 # CONFIG_DEBUG_STACK_USAGE is not set
 # CONFIG_SB1XXX_CORELIS is not set
@@ -1246,20 +1499,50 @@ CONFIG_DEBUG_MUTEXES=y
 #
 CONFIG_KEYS=y
 CONFIG_KEYS_DEBUG_PROC_KEYS=y
-# CONFIG_SECURITY is not set
-# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_SECURITY=y
+# CONFIG_SECURITYFS is not set
+CONFIG_SECURITY_NETWORK=y
+CONFIG_SECURITY_NETWORK_XFRM=y
+# CONFIG_SECURITY_PATH is not set
+CONFIG_LSM_MMAP_MIN_ADDR=65536
+CONFIG_SECURITY_SELINUX=y
+CONFIG_SECURITY_SELINUX_BOOTPARAM=y
+CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=1
+CONFIG_SECURITY_SELINUX_DISABLE=y
+CONFIG_SECURITY_SELINUX_DEVELOP=y
+CONFIG_SECURITY_SELINUX_AVC_STATS=y
+CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
+# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
+# CONFIG_SECURITY_SMACK is not set
+# CONFIG_SECURITY_TOMOYO is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
 CONFIG_CRYPTO=y
 
 #
 # Crypto core or helper
 #
+# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD=m
+CONFIG_CRYPTO_AEAD2=y
 CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
 CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG=m
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
 CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
 CONFIG_CRYPTO_GF128MUL=m
 CONFIG_CRYPTO_NULL=y
+# CONFIG_CRYPTO_PCRYPT is not set
+CONFIG_CRYPTO_WORKQUEUE=y
 # CONFIG_CRYPTO_CRYPTD is not set
 CONFIG_CRYPTO_AUTHENC=m
 # CONFIG_CRYPTO_TEST is not set
@@ -1276,7 +1559,7 @@ CONFIG_CRYPTO_SEQIV=m
 #
 CONFIG_CRYPTO_CBC=m
 CONFIG_CRYPTO_CTR=m
-# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_CTS=m
 CONFIG_CRYPTO_ECB=m
 CONFIG_CRYPTO_LRW=m
 CONFIG_CRYPTO_PCBC=m
@@ -1287,14 +1570,20 @@ CONFIG_CRYPTO_XTS=m
 #
 CONFIG_CRYPTO_HMAC=y
 CONFIG_CRYPTO_XCBC=m
+CONFIG_CRYPTO_VMAC=m
 
 #
 # Digest
 #
-# CONFIG_CRYPTO_CRC32C is not set
+CONFIG_CRYPTO_CRC32C=m
+CONFIG_CRYPTO_GHASH=m
 CONFIG_CRYPTO_MD4=m
 CONFIG_CRYPTO_MD5=y
 CONFIG_CRYPTO_MICHAEL_MIC=m
+CONFIG_CRYPTO_RMD128=m
+CONFIG_CRYPTO_RMD160=m
+CONFIG_CRYPTO_RMD256=m
+CONFIG_CRYPTO_RMD320=m
 CONFIG_CRYPTO_SHA1=m
 CONFIG_CRYPTO_SHA256=m
 CONFIG_CRYPTO_SHA512=m
@@ -1325,25 +1614,36 @@ CONFIG_CRYPTO_TWOFISH_COMMON=m
 # Compression
 #
 CONFIG_CRYPTO_DEFLATE=m
-# CONFIG_CRYPTO_LZO is not set
+CONFIG_CRYPTO_ZLIB=m
+CONFIG_CRYPTO_LZO=m
+
+#
+# Random Number Generation
+#
+CONFIG_CRYPTO_ANSI_CPRNG=m
 CONFIG_CRYPTO_HW=y
 # CONFIG_CRYPTO_DEV_HIFN_795X is not set
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
-# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_CRC_CCITT=m
-# CONFIG_CRC16 is not set
+CONFIG_CRC16=y
+CONFIG_CRC_T10DIF=m
 CONFIG_CRC_ITU_T=m
 CONFIG_CRC32=y
-# CONFIG_CRC7 is not set
+CONFIG_CRC7=m
 CONFIG_LIBCRC32C=m
 CONFIG_AUDIT_GENERIC=y
-CONFIG_ZLIB_INFLATE=m
+CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=m
-CONFIG_PLIST=y
+CONFIG_LZO_COMPRESS=m
+CONFIG_LZO_DECOMPRESS=m
+CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/mips/include/asm/abi.h b/arch/mips/include/asm/abi.h
index 1dd74fbdc09..9252d9b50e5 100644
--- a/arch/mips/include/asm/abi.h
+++ b/arch/mips/include/asm/abi.h
@@ -13,12 +13,14 @@
 #include <asm/siginfo.h>
 
 struct mips_abi {
-        int (* const setup_frame)(struct k_sigaction * ka,
+        int (* const setup_frame)(void *sig_return, struct k_sigaction *ka,
                                   struct pt_regs *regs, int signr,
                                   sigset_t *set);
-        int (* const setup_rt_frame)(struct k_sigaction * ka,
+        const unsigned long     signal_return_offset;
+        int (* const setup_rt_frame)(void *sig_return, struct k_sigaction *ka,
                                struct pt_regs *regs, int signr,
                                sigset_t *set, siginfo_t *info);
+        const unsigned long     rt_signal_return_offset;
         const unsigned long     restart;
 };
 
diff --git a/arch/mips/include/asm/compat.h b/arch/mips/include/asm/compat.h
index f58aed354bf..613f6912dfc 100644
--- a/arch/mips/include/asm/compat.h
+++ b/arch/mips/include/asm/compat.h
@@ -8,7 +8,8 @@
 #include <asm/page.h>
 #include <asm/ptrace.h>
 
-#define COMPAT_USER_HZ  100
+#define COMPAT_USER_HZ          100
+#define COMPAT_UTS_MACHINE      "mips\0\0\0"
 
 typedef u32             compat_size_t;
 typedef s32             compat_ssize_t;
diff --git a/arch/mips/include/asm/elf.h b/arch/mips/include/asm/elf.h
index e53d7bed5cd..ea77a42c5f8 100644
--- a/arch/mips/include/asm/elf.h
+++ b/arch/mips/include/asm/elf.h
@@ -310,6 +310,7 @@ do {									\
 
 #endif /* CONFIG_64BIT */
 
+struct pt_regs;
 struct task_struct;
 
 extern void elf_dump_regs(elf_greg_t *, struct pt_regs *regs);
@@ -367,4 +368,8 @@ extern const char *__elf_platform;
 #define ELF_ET_DYN_BASE         (TASK_SIZE / 3 * 2)
 #endif
 
+#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
+struct linux_binprm;
+extern int arch_setup_additional_pages(struct linux_binprm *bprm,
+                                       int uses_interp);
 #endif /* _ASM_ELF_H */
diff --git a/arch/mips/include/asm/fpu_emulator.h b/arch/mips/include/asm/fpu_emulator.h
index aecada6f611..3b409270556 100644
--- a/arch/mips/include/asm/fpu_emulator.h
+++ b/arch/mips/include/asm/fpu_emulator.h
@@ -41,7 +41,11 @@ struct mips_fpu_emulator_stats {
 DECLARE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats);
 
 #define MIPS_FPU_EMU_INC_STATS(M)                                       \
-        cpu_local_wrap(__local_inc(&__get_cpu_var(fpuemustats).M))
+do {                                                                    \
+        preempt_disable();                                              \
+        __local_inc(&__get_cpu_var(fpuemustats).M);                     \
+        preempt_enable();                                               \
+} while (0)
 
 #else
 #define MIPS_FPU_EMU_INC_STATS(M) do { } while (0)
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
index b12c4aca2cc..96a2391ad85 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
@@ -85,6 +85,7 @@ enum bcm63xx_regs_set {
         RSET_TIMER,
         RSET_WDT,
         RSET_UART0,
+        RSET_UART1,
         RSET_GPIO,
         RSET_SPI,
         RSET_UDC0,
@@ -123,6 +124,7 @@ enum bcm63xx_regs_set {
 #define BCM_6338_TIMER_BASE             (0xfffe0200)
 #define BCM_6338_WDT_BASE               (0xfffe021c)
 #define BCM_6338_UART0_BASE             (0xfffe0300)
+#define BCM_6338_UART1_BASE             (0xdeadbeef)
 #define BCM_6338_GPIO_BASE              (0xfffe0400)
 #define BCM_6338_SPI_BASE               (0xfffe0c00)
 #define BCM_6338_UDC0_BASE              (0xdeadbeef)
@@ -153,6 +155,7 @@ enum bcm63xx_regs_set {
 #define BCM_6345_TIMER_BASE             (0xfffe0200)
 #define BCM_6345_WDT_BASE               (0xfffe021c)
 #define BCM_6345_UART0_BASE             (0xfffe0300)
+#define BCM_6345_UART1_BASE             (0xdeadbeef)
 #define BCM_6345_GPIO_BASE              (0xfffe0400)
 #define BCM_6345_SPI_BASE               (0xdeadbeef)
 #define BCM_6345_UDC0_BASE              (0xdeadbeef)
@@ -182,6 +185,7 @@ enum bcm63xx_regs_set {
 #define BCM_6348_TIMER_BASE             (0xfffe0200)
 #define BCM_6348_WDT_BASE               (0xfffe021c)
 #define BCM_6348_UART0_BASE             (0xfffe0300)
+#define BCM_6348_UART1_BASE             (0xdeadbeef)
 #define BCM_6348_GPIO_BASE              (0xfffe0400)
 #define BCM_6348_SPI_BASE               (0xfffe0c00)
 #define BCM_6348_UDC0_BASE              (0xfffe1000)
@@ -208,6 +212,7 @@ enum bcm63xx_regs_set {
 #define BCM_6358_TIMER_BASE             (0xfffe0040)
 #define BCM_6358_WDT_BASE               (0xfffe005c)
 #define BCM_6358_UART0_BASE             (0xfffe0100)
+#define BCM_6358_UART1_BASE             (0xfffe0120)
 #define BCM_6358_GPIO_BASE              (0xfffe0080)
 #define BCM_6358_SPI_BASE               (0xdeadbeef)
 #define BCM_6358_UDC0_BASE              (0xfffe0800)
@@ -246,6 +251,8 @@ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
                 return BCM_6338_WDT_BASE;
         case RSET_UART0:
                 return BCM_6338_UART0_BASE;
+        case RSET_UART1:
+                return BCM_6338_UART1_BASE;
         case RSET_GPIO:
                 return BCM_6338_GPIO_BASE;
         case RSET_SPI:
@@ -292,6 +299,8 @@ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
                 return BCM_6345_WDT_BASE;
         case RSET_UART0:
                 return BCM_6345_UART0_BASE;
+        case RSET_UART1:
+                return BCM_6345_UART1_BASE;
         case RSET_GPIO:
                 return BCM_6345_GPIO_BASE;
         case RSET_SPI:
@@ -338,6 +347,8 @@ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
                 return BCM_6348_WDT_BASE;
         case RSET_UART0:
                 return BCM_6348_UART0_BASE;
+        case RSET_UART1:
+                return BCM_6348_UART1_BASE;
         case RSET_GPIO:
                 return BCM_6348_GPIO_BASE;
         case RSET_SPI:
@@ -384,6 +395,8 @@ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
                 return BCM_6358_WDT_BASE;
         case RSET_UART0:
                 return BCM_6358_UART0_BASE;
+        case RSET_UART1:
+                return BCM_6358_UART1_BASE;
         case RSET_GPIO:
                 return BCM_6358_GPIO_BASE;
         case RSET_SPI:
@@ -429,6 +442,7 @@ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
 enum bcm63xx_irq {
         IRQ_TIMER = 0,
         IRQ_UART0,
+        IRQ_UART1,
         IRQ_DSL,
         IRQ_ENET0,
         IRQ_ENET1,
@@ -510,6 +524,7 @@ enum bcm63xx_irq {
  */
 #define BCM_6358_TIMER_IRQ              (IRQ_INTERNAL_BASE + 0)
 #define BCM_6358_UART0_IRQ              (IRQ_INTERNAL_BASE + 2)
+#define BCM_6358_UART1_IRQ              (IRQ_INTERNAL_BASE + 3)
 #define BCM_6358_OHCI0_IRQ              (IRQ_INTERNAL_BASE + 5)
 #define BCM_6358_ENET1_IRQ              (IRQ_INTERNAL_BASE + 6)
 #define BCM_6358_ENET0_IRQ              (IRQ_INTERNAL_BASE + 8)
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_uart.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_uart.h
new file mode 100644
index 00000000000..23c705baf17
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_uart.h
@@ -0,0 +1,6 @@
+#ifndef BCM63XX_DEV_UART_H_
+#define BCM63XX_DEV_UART_H_
+
+int bcm63xx_uart_register(unsigned int id);
+
+#endif /* BCM63XX_DEV_UART_H_ */
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
index 76a0b7216af..43d4da0b1e9 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
@@ -10,6 +10,10 @@ static inline unsigned long bcm63xx_gpio_count(void)
         switch (bcm63xx_get_cpu_id()) {
         case BCM6358_CPU_ID:
                 return 40;
+        case BCM6338_CPU_ID:
+                return 8;
+        case BCM6345_CPU_ID:
+                return 16;
         case BCM6348_CPU_ID:
         default:
                 return 37;
diff --git a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
index 6479090a410..474daaa5349 100644
--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
@@ -45,6 +45,8 @@ struct board_info {
         unsigned int    has_ohci0:1;
         unsigned int    has_ehci0:1;
         unsigned int    has_dsp:1;
+        unsigned int    has_uart0:1;
+        unsigned int    has_uart1:1;
 
         /* ethernet config */
         struct bcm63xx_enet_platform_data enet0;
diff --git a/arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h b/arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h
index 71742bac940..f453c01d067 100644
--- a/arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h
@@ -24,7 +24,7 @@
 #define cpu_has_smartmips               0
 #define cpu_has_vtag_icache             0
 
-#if !defined(BCMCPU_RUNTIME_DETECT) && (defined(CONFIG_BCMCPU_IS_6348) || defined(CONFIG_CPU_IS_6338) || defined(CONFIG_CPU_IS_BCM6345))
+#if !defined(BCMCPU_RUNTIME_DETECT) && (defined(CONFIG_BCM63XX_CPU_6348) || defined(CONFIG_BCM63XX_CPU_6345) || defined(CONFIG_BCM63XX_CPU_6338))
 #define cpu_has_dc_aliases              0
 #endif
 
diff --git a/arch/mips/include/asm/mach-sibyte/war.h b/arch/mips/include/asm/mach-sibyte/war.h
index 7950ef4f032..743385d7b5f 100644
--- a/arch/mips/include/asm/mach-sibyte/war.h
+++ b/arch/mips/include/asm/mach-sibyte/war.h
@@ -16,7 +16,11 @@
 #if defined(CONFIG_SB1_PASS_1_WORKAROUNDS) || \
     defined(CONFIG_SB1_PASS_2_WORKAROUNDS)
 
-#define BCM1250_M3_WAR  1
+#ifndef __ASSEMBLY__
+extern int sb1250_m3_workaround_needed(void);
+#endif
+
+#define BCM1250_M3_WAR  sb1250_m3_workaround_needed()
 #define SIBYTE_1956_WAR 1
 
 #else
diff --git a/arch/mips/include/asm/mmu.h b/arch/mips/include/asm/mmu.h
index 4063edd7962..c436138945a 100644
--- a/arch/mips/include/asm/mmu.h
+++ b/arch/mips/include/asm/mmu.h
@@ -1,6 +1,9 @@
 #ifndef __ASM_MMU_H
 #define __ASM_MMU_H
 
-typedef unsigned long mm_context_t[NR_CPUS];
+typedef struct {
+        unsigned long asid[NR_CPUS];
+        void *vdso;
+} mm_context_t;
 
 #endif /* __ASM_MMU_H */
diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h
index 145bb81ccaa..d9592733a7b 100644
--- a/arch/mips/include/asm/mmu_context.h
+++ b/arch/mips/include/asm/mmu_context.h
@@ -104,7 +104,7 @@ extern unsigned long smtc_asid_mask;
 
 #endif
 
-#define cpu_context(cpu, mm)    ((mm)->context[cpu])
+#define cpu_context(cpu, mm)    ((mm)->context.asid[cpu])
 #define cpu_asid(cpu, mm)       (cpu_context((cpu), (mm)) & ASID_MASK)
 #define asid_cache(cpu)         (cpu_data[cpu].asid_cache)
 
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h
index ac32572430f..a16beafcea9 100644
--- a/arch/mips/include/asm/page.h
+++ b/arch/mips/include/asm/page.h
@@ -188,8 +188,10 @@ typedef struct { unsigned long pgprot; } pgprot_t;
 #define VM_DATA_DEFAULT_FLAGS   (VM_READ | VM_WRITE | VM_EXEC | \
                                  VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 
-#define UNCAC_ADDR(addr)        ((addr) - PAGE_OFFSET + UNCAC_BASE)
-#define CAC_ADDR(addr)          ((addr) - UNCAC_BASE + PAGE_OFFSET)
+#define UNCAC_ADDR(addr)        ((addr) - PAGE_OFFSET + UNCAC_BASE +    \
+                                                                PHYS_OFFSET)
+#define CAC_ADDR(addr)          ((addr) - UNCAC_BASE + PAGE_OFFSET -    \
+                                                                PHYS_OFFSET)
 
 #include <asm-generic/memory_model.h>
 #include <asm-generic/getorder.h>
diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
index 5ebf82572ec..3beea1479b4 100644
--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -102,28 +102,6 @@ struct pci_dev;
  */
 extern unsigned int PCI_DMA_BUS_IS_PHYS;
 
-#ifdef CONFIG_DMA_NEED_PCI_MAP_STATE
-
-/* pci_unmap_{single,page} is not a nop, thus... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME)          ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME)            ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)   (((PTR)->LEN_NAME) = (VAL))
-
-#else /* CONFIG_DMA_NEED_PCI_MAP_STATE  */
-
-/* pci_unmap_{page,single} is a nop so... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
-#define pci_unmap_addr(PTR, ADDR_NAME)          (0)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
-#define pci_unmap_len(PTR, LEN_NAME)            (0)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)   do { } while (0)
-
-#endif /* CONFIG_DMA_NEED_PCI_MAP_STATE  */
-
 #ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                         enum pci_dma_burst_strategy *strat,
diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h
index 087a8884ef0..ab387910009 100644
--- a/arch/mips/include/asm/processor.h
+++ b/arch/mips/include/asm/processor.h
@@ -33,13 +33,19 @@ extern void (*cpu_wait)(void);
 
 extern unsigned int vced_count, vcei_count;
 
+/*
+ * A special page (the vdso) is mapped into all processes at the very
+ * top of the virtual memory space.
+ */
+#define SPECIAL_PAGES_SIZE PAGE_SIZE
+
 #ifdef CONFIG_32BIT
 /*
  * User space process size: 2GB. This is hardcoded into a few places,
  * so don't change it unless you know what you are doing.
  */
 #define TASK_SIZE       0x7fff8000UL
-#define STACK_TOP       TASK_SIZE
+#define STACK_TOP       ((TASK_SIZE & PAGE_MASK) - SPECIAL_PAGES_SIZE)
 
 /*
  * This decides where the kernel will search for a free chunk of vm
@@ -59,7 +65,8 @@ extern unsigned int vced_count, vcei_count;
 #define TASK_SIZE32     0x7fff8000UL
 #define TASK_SIZE       0x10000000000UL
 #define STACK_TOP       \
-      (test_thread_flag(TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE)
+        (((test_thread_flag(TIF_32BIT_ADDR) ?                           \
+           TASK_SIZE32 : TASK_SIZE) & PAGE_MASK) - SPECIAL_PAGES_SIZE)
 
 /*
  * This decides where the kernel will search for a free chunk of vm
diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h
index 3b6da3330e3..c8419129e77 100644
--- a/arch/mips/include/asm/stackframe.h
+++ b/arch/mips/include/asm/stackframe.h
@@ -121,6 +121,25 @@
                 .endm
 #else
                 .macro  get_saved_sp    /* Uniprocessor variation */
+#ifdef CONFIG_CPU_LOONGSON2F
+                /*
+                 * Clear BTB (branch target buffer), forbid RAS (return address
+                 * stack) to workaround the Out-of-order Issue in Loongson2F
+                 * via its diagnostic register.
+                 */
+                move    k0, ra
+                jal     1f
+                 nop
+1:              jal     1f
+                 nop
+1:              jal     1f
+                 nop
+1:              jal     1f
+                 nop
+1:              move    ra, k0
+                li      k0, 3
+                mtc0    k0, $22
+#endif /* CONFIG_CPU_LOONGSON2F */
 #if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
                 lui     k1, %hi(kernelsp)
 #else
diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h
index b99bd07e199..11a8b525254 100644
--- a/arch/mips/include/asm/uasm.h
+++ b/arch/mips/include/asm/uasm.h
@@ -84,6 +84,7 @@ Ip_u2s3u1(_lw);
 Ip_u1u2u3(_mfc0);
 Ip_u1u2u3(_mtc0);
 Ip_u2u1u3(_ori);
+Ip_u3u1u2(_or);
 Ip_u2s3u1(_pref);
 Ip_0(_rfe);
 Ip_u2s3u1(_sc);
@@ -102,6 +103,7 @@ Ip_0(_tlbwr);
 Ip_u3u1u2(_xor);
 Ip_u2u1u3(_xori);
 Ip_u2u1msbu3(_dins);
+Ip_u1(_syscall);
 
 /* Handle labels. */
 struct uasm_label {
diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h
index 65c679ecbe6..1b5a6648eb8 100644
--- a/arch/mips/include/asm/unistd.h
+++ b/arch/mips/include/asm/unistd.h
@@ -1004,6 +1004,7 @@
 #define __ARCH_WANT_OLD_READDIR
 #define __ARCH_WANT_SYS_ALARM
 #define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_PAUSE
 #define __ARCH_WANT_SYS_SGETMASK
 #define __ARCH_WANT_SYS_UTIME
@@ -1013,6 +1014,7 @@
 #define __ARCH_WANT_SYS_LLSEEK
 #define __ARCH_WANT_SYS_NICE
 #define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_UNAME
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/mips/include/asm/vdso.h b/arch/mips/include/asm/vdso.h
new file mode 100644
index 00000000000..cca56aa40ff
--- /dev/null
+++ b/arch/mips/include/asm/vdso.h
@@ -0,0 +1,29 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2009 Cavium Networks
+ */
+
+#ifndef __ASM_VDSO_H
+#define __ASM_VDSO_H
+
+#include <linux/types.h>
+
+
+#ifdef CONFIG_32BIT
+struct mips_vdso {
+        u32 signal_trampoline[2];
+        u32 rt_signal_trampoline[2];
+};
+#else  /* !CONFIG_32BIT */
+struct mips_vdso {
+        u32 o32_signal_trampoline[2];
+        u32 o32_rt_signal_trampoline[2];
+        u32 rt_signal_trampoline[2];
+        u32 n32_rt_signal_trampoline[2];
+};
+#endif /* CONFIG_32BIT */
+
+#endif /* __ASM_VDSO_H */
diff --git a/arch/mips/jazz/jazzdma.c b/arch/mips/jazz/jazzdma.c
index 0d64d0f4641..9ce9f64cb76 100644
--- a/arch/mips/jazz/jazzdma.c
+++ b/arch/mips/jazz/jazzdma.c
@@ -14,6 +14,7 @@
 #include <linux/mm.h>
 #include <linux/bootmem.h>
 #include <linux/spinlock.h>
+#include <linux/gfp.h>
 #include <asm/mipsregs.h>
 #include <asm/jazz.h>
 #include <asm/io.h>
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index ef20957ca14..7a6ac501cbb 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -6,7 +6,7 @@ extra-y		:= head.o init_task.o vmlinux.lds
 
 obj-y           += cpu-probe.o branch.o entry.o genex.o irq.o process.o \
                    ptrace.o reset.o setup.o signal.o syscall.o \
-                   time.o topology.o traps.o unaligned.o watch.o
+                   time.o topology.o traps.o unaligned.o watch.o vdso.o
 
 ifdef CONFIG_FUNCTION_TRACER
 CFLAGS_REMOVE_ftrace.o = -pg
diff --git a/arch/mips/kernel/cpufreq/loongson2_clock.c b/arch/mips/kernel/cpufreq/loongson2_clock.c
index d7ca256e33e..cefc6e259ba 100644
--- a/arch/mips/kernel/cpufreq/loongson2_clock.c
+++ b/arch/mips/kernel/cpufreq/loongson2_clock.c
@@ -164,3 +164,7 @@ void loongson2_cpu_wait(void)
         spin_unlock_irqrestore(&loongson2_wait_lock, flags);
 }
 EXPORT_SYMBOL_GPL(loongson2_cpu_wait);
+
+MODULE_AUTHOR("Yanhua <yanh@lemote.com>");
+MODULE_DESCRIPTION("cpufreq driver for Loongson 2F");
+MODULE_LICENSE("GPL");
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index 981f86c2616..c6345f579a8 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -15,7 +15,6 @@
 #include <linux/kernel_stat.h>
 #include <linux/module.h>
 #include <linux/proc_fs.h>
-#include <linux/slab.h>
 #include <linux/mm.h>
 #include <linux/random.h>
 #include <linux/sched.h>
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index bde79ef602e..c2dab140dc9 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -15,7 +15,6 @@
 #include <linux/time.h>
 #include <linux/times.h>
 #include <linux/poll.h>
-#include <linux/slab.h>
 #include <linux/skbuff.h>
 #include <linux/filter.h>
 #include <linux/shm.h>
@@ -34,6 +33,7 @@
 #include <linux/compat.h>
 #include <linux/vfs.h>
 #include <linux/ipc.h>
+#include <linux/slab.h>
 
 #include <net/sock.h>
 #include <net/scm.h>
@@ -249,22 +249,6 @@ SYSCALL_DEFINE5(n32_msgrcv, int, msqid, u32, msgp, size_t, msgsz,
 }
 #endif
 
-SYSCALL_DEFINE1(32_newuname, struct new_utsname __user *, name)
-{
-        int ret = 0;
-
-        down_read(&uts_sem);
-        if (copy_to_user(name, utsname(), sizeof *name))
-                ret = -EFAULT;
-        up_read(&uts_sem);
-
-        if (current->personality == PER_LINUX32 && !ret)
-                if (copy_to_user(name->machine, "mips\0\0\0", 8))
-                        ret = -EFAULT;
-
-        return ret;
-}
-
 SYSCALL_DEFINE1(32_personality, unsigned long, personality)
 {
         int ret;
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index f3d73e1831c..99960940d4a 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -17,7 +17,6 @@
 #include <linux/stddef.h>
 #include <linux/unistd.h>
 #include <linux/ptrace.h>
-#include <linux/slab.h>
 #include <linux/mman.h>
 #include <linux/personality.h>
 #include <linux/sys.h>
@@ -64,8 +63,13 @@ void __noreturn cpu_idle(void)
 
                         smtc_idle_loop_hook();
 #endif
-                        if (cpu_wait)
+
+                        if (cpu_wait) {
+                                /* Don't trace irqs off for idle */
+                                stop_critical_timings();
                                 (*cpu_wait)();
+                                start_critical_timings();
+                        }
                 }
 #ifdef CONFIG_HOTPLUG_CPU
                 if (!cpu_online(cpu) && !cpu_isset(cpu, cpu_callin_map) &&
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 054861ccb4d..c51b95ff864 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -493,36 +493,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 ret = ptrace_setfpregs(child, (__u32 __user *) data);
                 break;
 
-        case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
-        case PTRACE_CONT: { /* restart after signal. */
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                if (request == PTRACE_SYSCALL) {
-                        set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                }
-                else {
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                }
-                child->exit_code = data;
-                wake_up_process(child);
-                ret = 0;
-                break;
-        }
-
-        /*
-         * make the child exit.  Best I can do is send it a sigkill.
-         * perhaps it should be put in the status that it wants to
-         * exit.
-         */
-        case PTRACE_KILL:
-                ret = 0;
-                if (child->exit_state == EXIT_ZOMBIE)   /* already dead */
-                        break;
-                child->exit_code = SIGKILL;
-                wake_up_process(child);
-                break;
-
         case PTRACE_GET_THREAD_AREA:
                 ret = put_user(task_thread_info(child)->tp_value,
                                 (unsigned long __user *) data);
diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c
index dcaed1bbbfe..26f9b9ab19c 100644
--- a/arch/mips/kernel/rtlx.c
+++ b/arch/mips/kernel/rtlx.c
@@ -23,7 +23,6 @@
 #include <linux/fs.h>
 #include <linux/init.h>
 #include <asm/uaccess.h>
-#include <linux/slab.h>
 #include <linux/list.h>
 #include <linux/vmalloc.h>
 #include <linux/elf.h>
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 66b5a48676d..44337ba0371 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -181,7 +181,7 @@ EXPORT(sysn32_call_table)
         PTR     sys_exit
         PTR     compat_sys_wait4
         PTR     sys_kill                        /* 6060 */
-        PTR     sys_32_newuname
+        PTR     sys_newuname
         PTR     sys_semget
         PTR     sys_semop
         PTR     sys_n32_semctl
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 515f9eab2b2..813689ef238 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -325,7 +325,7 @@ sys_call_table:
         PTR     sys32_sigreturn
         PTR     sys32_clone                     /* 4120 */
         PTR     sys_setdomainname
-        PTR     sys_32_newuname
+        PTR     sys_newuname
         PTR     sys_ni_syscall                  /* sys_modify_ldt */
         PTR     compat_sys_adjtimex
         PTR     sys_mprotect                    /* 4125 */
diff --git a/arch/mips/kernel/signal-common.h b/arch/mips/kernel/signal-common.h
index 6c8e8c4246f..10263b40598 100644
--- a/arch/mips/kernel/signal-common.h
+++ b/arch/mips/kernel/signal-common.h
@@ -26,11 +26,6 @@
  */
 extern void __user *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
                                  size_t frame_size);
-/*
- * install trampoline code to get back from the sig handler
- */
-extern int install_sigtramp(unsigned int __user *tramp, unsigned int syscall);
-
 /* Check and clear pending FPU exceptions in saved CSR */
 extern int fpcsr_pending(unsigned int __user *fpcsr);
 
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c
index d0c68b5d717..2099d5a4c4b 100644
--- a/arch/mips/kernel/signal.c
+++ b/arch/mips/kernel/signal.c
@@ -32,6 +32,7 @@
 #include <asm/ucontext.h>
 #include <asm/cpu-features.h>
 #include <asm/war.h>
+#include <asm/vdso.h>
 
 #include "signal-common.h"
 
@@ -44,47 +45,20 @@ extern asmlinkage int _restore_fp_context(struct sigcontext __user *sc);
 extern asmlinkage int fpu_emulator_save_context(struct sigcontext __user *sc);
 extern asmlinkage int fpu_emulator_restore_context(struct sigcontext __user *sc);
 
-/*
- * Horribly complicated - with the bloody RM9000 workarounds enabled
- * the signal trampolines is moving to the end of the structure so we can
- * increase the alignment without breaking software compatibility.
- */
-#if ICACHE_REFILLS_WORKAROUND_WAR == 0
-
 struct sigframe {
         u32 sf_ass[4];          /* argument save space for o32 */
-        u32 sf_code[2];         /* signal trampoline */
+        u32 sf_pad[2];          /* Was: signal trampoline */
         struct sigcontext sf_sc;
         sigset_t sf_mask;
 };
 
 struct rt_sigframe {
         u32 rs_ass[4];          /* argument save space for o32 */
-        u32 rs_code[2];         /* signal trampoline */
+        u32 rs_pad[2];          /* Was: signal trampoline */
         struct siginfo rs_info;
         struct ucontext rs_uc;
 };
 
-#else
-
-struct sigframe {
-        u32 sf_ass[4];                  /* argument save space for o32 */
-        u32 sf_pad[2];
-        struct sigcontext sf_sc;        /* hw context */
-        sigset_t sf_mask;
-        u32 sf_code[8] ____cacheline_aligned;   /* signal trampoline */
-};
-
-struct rt_sigframe {
-        u32 rs_ass[4];                  /* argument save space for o32 */
-        u32 rs_pad[2];
-        struct siginfo rs_info;
-        struct ucontext rs_uc;
-        u32 rs_code[8] ____cacheline_aligned;   /* signal trampoline */
-};
-
-#endif
-
 /*
  * Helper routines
  */
@@ -266,32 +240,6 @@ void __user *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
         return (void __user *)((sp - frame_size) & (ICACHE_REFILLS_WORKAROUND_WAR ? ~(cpu_icache_line_size()-1) : ALMASK));
 }
 
-int install_sigtramp(unsigned int __user *tramp, unsigned int syscall)
-{
-        int err;
-
-        /*
-         * Set up the return code ...
-         *
-         *         li      v0, __NR__foo_sigreturn
-         *         syscall
-         */
-
-        err = __put_user(0x24020000 + syscall, tramp + 0);
-        err |= __put_user(0x0000000c         , tramp + 1);
-        if (ICACHE_REFILLS_WORKAROUND_WAR) {
-                err |= __put_user(0, tramp + 2);
-                err |= __put_user(0, tramp + 3);
-                err |= __put_user(0, tramp + 4);
-                err |= __put_user(0, tramp + 5);
-                err |= __put_user(0, tramp + 6);
-                err |= __put_user(0, tramp + 7);
-        }
-        flush_cache_sigtramp((unsigned long) tramp);
-
-        return err;
-}
-
 /*
  * Atomically swap in the new signal mask, and wait for a signal.
  */
@@ -484,8 +432,8 @@ badframe:
 }
 
 #ifdef CONFIG_TRAD_SIGNALS
-static int setup_frame(struct k_sigaction * ka, struct pt_regs *regs,
-        int signr, sigset_t *set)
+static int setup_frame(void *sig_return, struct k_sigaction *ka,
+                       struct pt_regs *regs, int signr, sigset_t *set)
 {
         struct sigframe __user *frame;
         int err = 0;
@@ -494,8 +442,6 @@ static int setup_frame(struct k_sigaction * ka, struct pt_regs *regs,
         if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame)))
                 goto give_sigsegv;
 
-        err |= install_sigtramp(frame->sf_code, __NR_sigreturn);
-
         err |= setup_sigcontext(regs, &frame->sf_sc);
         err |= __copy_to_user(&frame->sf_mask, set, sizeof(*set));
         if (err)
@@ -515,7 +461,7 @@ static int setup_frame(struct k_sigaction * ka, struct pt_regs *regs,
         regs->regs[ 5] = 0;
         regs->regs[ 6] = (unsigned long) &frame->sf_sc;
         regs->regs[29] = (unsigned long) frame;
-        regs->regs[31] = (unsigned long) frame->sf_code;
+        regs->regs[31] = (unsigned long) sig_return;
         regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler;
 
         DEBUGP("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%lx\n",
@@ -529,8 +475,9 @@ give_sigsegv:
 }
 #endif
 
-static int setup_rt_frame(struct k_sigaction * ka, struct pt_regs *regs,
-        int signr, sigset_t *set, siginfo_t *info)
+static int setup_rt_frame(void *sig_return, struct k_sigaction *ka,
+                          struct pt_regs *regs, int signr, sigset_t *set,
+                          siginfo_t *info)
 {
         struct rt_sigframe __user *frame;
         int err = 0;
@@ -539,8 +486,6 @@ static int setup_rt_frame(struct k_sigaction * ka, struct pt_regs *regs,
         if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame)))
                 goto give_sigsegv;
 
-        err |= install_sigtramp(frame->rs_code, __NR_rt_sigreturn);
-
         /* Create siginfo.  */
         err |= copy_siginfo_to_user(&frame->rs_info, info);
 
@@ -573,7 +518,7 @@ static int setup_rt_frame(struct k_sigaction * ka, struct pt_regs *regs,
         regs->regs[ 5] = (unsigned long) &frame->rs_info;
         regs->regs[ 6] = (unsigned long) &frame->rs_uc;
         regs->regs[29] = (unsigned long) frame;
-        regs->regs[31] = (unsigned long) frame->rs_code;
+        regs->regs[31] = (unsigned long) sig_return;
         regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler;
 
         DEBUGP("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%lx\n",
@@ -590,8 +535,11 @@ give_sigsegv:
 struct mips_abi mips_abi = {
 #ifdef CONFIG_TRAD_SIGNALS
         .setup_frame    = setup_frame,
+        .signal_return_offset = offsetof(struct mips_vdso, signal_trampoline),
 #endif
         .setup_rt_frame = setup_rt_frame,
+        .rt_signal_return_offset =
+                offsetof(struct mips_vdso, rt_signal_trampoline),
         .restart        = __NR_restart_syscall
 };
 
@@ -599,6 +547,8 @@ static int handle_signal(unsigned long sig, siginfo_t *info,
         struct k_sigaction *ka, sigset_t *oldset, struct pt_regs *regs)
 {
         int ret;
+        struct mips_abi *abi = current->thread.abi;
+        void *vdso = current->mm->context.vdso;
 
         switch(regs->regs[0]) {
         case ERESTART_RESTARTBLOCK:
@@ -619,9 +569,11 @@ static int handle_signal(unsigned long sig, siginfo_t *info,
         regs->regs[0] = 0;              /* Don't deal with this again.  */
 
         if (sig_uses_siginfo(ka))
-                ret = current->thread.abi->setup_rt_frame(ka, regs, sig, oldset, info);
+                ret = abi->setup_rt_frame(vdso + abi->rt_signal_return_offset,
+                                          ka, regs, sig, oldset, info);
         else
-                ret = current->thread.abi->setup_frame(ka, regs, sig, oldset);
+                ret = abi->setup_frame(vdso + abi->signal_return_offset,
+                                       ka, regs, sig, oldset);
 
         spin_lock_irq(&current->sighand->siglock);
         sigorsets(&current->blocked, &current->blocked, &ka->sa.sa_mask);
diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c
index 03abaf048f0..a0ed0e052b2 100644
--- a/arch/mips/kernel/signal32.c
+++ b/arch/mips/kernel/signal32.c
@@ -32,6 +32,7 @@
 #include <asm/system.h>
 #include <asm/fpu.h>
 #include <asm/war.h>
+#include <asm/vdso.h>
 
 #include "signal-common.h"
 
@@ -47,8 +48,6 @@ extern asmlinkage int fpu_emulator_restore_context32(struct sigcontext32 __user
 /*
  * Including <asm/unistd.h> would give use the 64-bit syscall numbers ...
  */
-#define __NR_O32_sigreturn              4119
-#define __NR_O32_rt_sigreturn           4193
 #define __NR_O32_restart_syscall        4253
 
 /* 32-bit compatibility types */
@@ -77,47 +76,20 @@ struct ucontext32 {
         compat_sigset_t     uc_sigmask;   /* mask last for extensibility */
 };
 
-/*
- * Horribly complicated - with the bloody RM9000 workarounds enabled
- * the signal trampolines is moving to the end of the structure so we can
- * increase the alignment without breaking software compatibility.
- */
-#if ICACHE_REFILLS_WORKAROUND_WAR == 0
-
 struct sigframe32 {
         u32 sf_ass[4];          /* argument save space for o32 */
-        u32 sf_code[2];         /* signal trampoline */
+        u32 sf_pad[2];          /* Was: signal trampoline */
         struct sigcontext32 sf_sc;
         compat_sigset_t sf_mask;
 };
 
 struct rt_sigframe32 {
         u32 rs_ass[4];                  /* argument save space for o32 */
-        u32 rs_code[2];                 /* signal trampoline */
+        u32 rs_pad[2];                  /* Was: signal trampoline */
         compat_siginfo_t rs_info;
         struct ucontext32 rs_uc;
 };
 
-#else  /* ICACHE_REFILLS_WORKAROUND_WAR */
-
-struct sigframe32 {
-        u32 sf_ass[4];                  /* argument save space for o32 */
-        u32 sf_pad[2];
-        struct sigcontext32 sf_sc;      /* hw context */
-        compat_sigset_t sf_mask;
-        u32 sf_code[8] ____cacheline_aligned;   /* signal trampoline */
-};
-
-struct rt_sigframe32 {
-        u32 rs_ass[4];                  /* argument save space for o32 */
-        u32 rs_pad[2];
-        compat_siginfo_t rs_info;
-        struct ucontext32 rs_uc;
-        u32 rs_code[8] __attribute__((aligned(32)));    /* signal trampoline */
-};
-
-#endif  /* !ICACHE_REFILLS_WORKAROUND_WAR */
-
 /*
  * sigcontext handlers
  */
@@ -598,8 +570,8 @@ badframe:
         force_sig(SIGSEGV, current);
 }
 
-static int setup_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
-        int signr, sigset_t *set)
+static int setup_frame_32(void *sig_return, struct k_sigaction *ka,
+                          struct pt_regs *regs, int signr, sigset_t *set)
 {
         struct sigframe32 __user *frame;
         int err = 0;
@@ -608,8 +580,6 @@ static int setup_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
         if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame)))
                 goto give_sigsegv;
 
-        err |= install_sigtramp(frame->sf_code, __NR_O32_sigreturn);
-
         err |= setup_sigcontext32(regs, &frame->sf_sc);
         err |= __copy_conv_sigset_to_user(&frame->sf_mask, set);
 
@@ -630,7 +600,7 @@ static int setup_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
         regs->regs[ 5] = 0;
         regs->regs[ 6] = (unsigned long) &frame->sf_sc;
         regs->regs[29] = (unsigned long) frame;
-        regs->regs[31] = (unsigned long) frame->sf_code;
+        regs->regs[31] = (unsigned long) sig_return;
         regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler;
 
         DEBUGP("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%lx\n",
@@ -644,8 +614,9 @@ give_sigsegv:
         return -EFAULT;
 }
 
-static int setup_rt_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
-        int signr, sigset_t *set, siginfo_t *info)
+static int setup_rt_frame_32(void *sig_return, struct k_sigaction *ka,
+                             struct pt_regs *regs, int signr, sigset_t *set,
+                             siginfo_t *info)
 {
         struct rt_sigframe32 __user *frame;
         int err = 0;
@@ -655,8 +626,6 @@ static int setup_rt_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
         if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame)))
                 goto give_sigsegv;
 
-        err |= install_sigtramp(frame->rs_code, __NR_O32_rt_sigreturn);
-
         /* Convert (siginfo_t -> compat_siginfo_t) and copy to user. */
         err |= copy_siginfo_to_user32(&frame->rs_info, info);
 
@@ -690,7 +659,7 @@ static int setup_rt_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
         regs->regs[ 5] = (unsigned long) &frame->rs_info;
         regs->regs[ 6] = (unsigned long) &frame->rs_uc;
         regs->regs[29] = (unsigned long) frame;
-        regs->regs[31] = (unsigned long) frame->rs_code;
+        regs->regs[31] = (unsigned long) sig_return;
         regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler;
 
         DEBUGP("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%lx\n",
@@ -709,7 +678,11 @@ give_sigsegv:
  */
 struct mips_abi mips_abi_32 = {
         .setup_frame    = setup_frame_32,
+        .signal_return_offset =
+                offsetof(struct mips_vdso, o32_signal_trampoline),
         .setup_rt_frame = setup_rt_frame_32,
+        .rt_signal_return_offset =
+                offsetof(struct mips_vdso, o32_rt_signal_trampoline),
         .restart        = __NR_O32_restart_syscall
 };
 
diff --git a/arch/mips/kernel/signal_n32.c b/arch/mips/kernel/signal_n32.c
index bb277e82d42..2c5df818c65 100644
--- a/arch/mips/kernel/signal_n32.c
+++ b/arch/mips/kernel/signal_n32.c
@@ -39,13 +39,13 @@
 #include <asm/fpu.h>
 #include <asm/cpu-features.h>
 #include <asm/war.h>
+#include <asm/vdso.h>
 
 #include "signal-common.h"
 
 /*
  * Including <asm/unistd.h> would give use the 64-bit syscall numbers ...
  */
-#define __NR_N32_rt_sigreturn           6211
 #define __NR_N32_restart_syscall        6214
 
 extern int setup_sigcontext(struct pt_regs *, struct sigcontext __user *);
@@ -67,27 +67,13 @@ struct ucontextn32 {
         compat_sigset_t     uc_sigmask;   /* mask last for extensibility */
 };
 
-#if ICACHE_REFILLS_WORKAROUND_WAR == 0
-
-struct rt_sigframe_n32 {
-        u32 rs_ass[4];                  /* argument save space for o32 */
-        u32 rs_code[2];                 /* signal trampoline */
-        struct compat_siginfo rs_info;
-        struct ucontextn32 rs_uc;
-};
-
-#else  /* ICACHE_REFILLS_WORKAROUND_WAR */
-
 struct rt_sigframe_n32 {
         u32 rs_ass[4];                  /* argument save space for o32 */
-        u32 rs_pad[2];
+        u32 rs_pad[2];                  /* Was: signal trampoline */
         struct compat_siginfo rs_info;
         struct ucontextn32 rs_uc;
-        u32 rs_code[8] ____cacheline_aligned;           /* signal trampoline */
 };
 
-#endif  /* !ICACHE_REFILLS_WORKAROUND_WAR */
-
 extern void sigset_from_compat(sigset_t *set, compat_sigset_t *compat);
 
 asmlinkage int sysn32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
@@ -173,7 +159,7 @@ badframe:
         force_sig(SIGSEGV, current);
 }
 
-static int setup_rt_frame_n32(struct k_sigaction * ka,
+static int setup_rt_frame_n32(void *sig_return, struct k_sigaction *ka,
         struct pt_regs *regs, int signr, sigset_t *set, siginfo_t *info)
 {
         struct rt_sigframe_n32 __user *frame;
@@ -184,8 +170,6 @@ static int setup_rt_frame_n32(struct k_sigaction * ka,
         if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame)))
                 goto give_sigsegv;
 
-        install_sigtramp(frame->rs_code, __NR_N32_rt_sigreturn);
-
         /* Create siginfo.  */
         err |= copy_siginfo_to_user32(&frame->rs_info, info);
 
@@ -219,7 +203,7 @@ static int setup_rt_frame_n32(struct k_sigaction * ka,
         regs->regs[ 5] = (unsigned long) &frame->rs_info;
         regs->regs[ 6] = (unsigned long) &frame->rs_uc;
         regs->regs[29] = (unsigned long) frame;
-        regs->regs[31] = (unsigned long) frame->rs_code;
+        regs->regs[31] = (unsigned long) sig_return;
         regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler;
 
         DEBUGP("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%lx\n",
@@ -235,5 +219,7 @@ give_sigsegv:
 
 struct mips_abi mips_abi_n32 = {
         .setup_rt_frame = setup_rt_frame_n32,
+        .rt_signal_return_offset =
+                offsetof(struct mips_vdso, n32_rt_signal_trampoline),
         .restart        = __NR_N32_restart_syscall
 };
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 23499b5bd9c..a95dea5459c 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -26,6 +26,7 @@
 #include <linux/kernel_stat.h>
 #include <linux/module.h>
 #include <linux/ftrace.h>
+#include <linux/slab.h>
 
 #include <asm/cpu.h>
 #include <asm/processor.h>
@@ -181,7 +182,7 @@ static int vpemask[2][8] = {
         {0, 0, 0, 0, 0, 0, 0, 1}
 };
 int tcnoprog[NR_CPUS];
-static atomic_t idle_hook_initialized = {0};
+static atomic_t idle_hook_initialized = ATOMIC_INIT(0);
 static int clock_hang_reported[NR_CPUS];
 
 #endif /* CONFIG_SMTC_IDLE_HOOK_DEBUG */
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 3f7f466190b..dd81b0f8751 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -19,7 +19,6 @@
 #include <linux/string.h>
 #include <linux/syscalls.h>
 #include <linux/file.h>
-#include <linux/slab.h>
 #include <linux/utsname.h>
 #include <linux/unistd.h>
 #include <linux/sem.h>
@@ -29,6 +28,7 @@
 #include <linux/module.h>
 #include <linux/ipc.h>
 #include <linux/uaccess.h>
+#include <linux/slab.h>
 
 #include <asm/asm.h>
 #include <asm/branch.h>
@@ -79,7 +79,11 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
         int do_color_align;
         unsigned long task_size;
 
-        task_size = STACK_TOP;
+#ifdef CONFIG_32BIT
+        task_size = TASK_SIZE;
+#else /* Must be CONFIG_64BIT*/
+        task_size = test_thread_flag(TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE;
+#endif
 
         if (len > task_size)
                 return -ENOMEM;
@@ -215,48 +219,6 @@ out:
         return error;
 }
 
-/*
- * Compacrapability ...
- */
-SYSCALL_DEFINE1(uname, struct old_utsname __user *, name)
-{
-        if (name && !copy_to_user(name, utsname(), sizeof (*name)))
-                return 0;
-        return -EFAULT;
-}
-
-/*
- * Compacrapability ...
- */
-SYSCALL_DEFINE1(olduname, struct oldold_utsname __user *, name)
-{
-        int error;
-
-        if (!name)
-                return -EFAULT;
-        if (!access_ok(VERIFY_WRITE, name, sizeof(struct oldold_utsname)))
-                return -EFAULT;
-
-        error = __copy_to_user(&name->sysname, &utsname()->sysname,
-                               __OLD_UTS_LEN);
-        error -= __put_user(0, name->sysname + __OLD_UTS_LEN);
-        error -= __copy_to_user(&name->nodename, &utsname()->nodename,
-                                __OLD_UTS_LEN);
-        error -= __put_user(0, name->nodename + __OLD_UTS_LEN);
-        error -= __copy_to_user(&name->release, &utsname()->release,
-                                __OLD_UTS_LEN);
-        error -= __put_user(0, name->release + __OLD_UTS_LEN);
-        error -= __copy_to_user(&name->version, &utsname()->version,
-                                __OLD_UTS_LEN);
-        error -= __put_user(0, name->version + __OLD_UTS_LEN);
-        error -= __copy_to_user(&name->machine, &utsname()->machine,
-                                __OLD_UTS_LEN);
-        error = __put_user(0, name->machine + __OLD_UTS_LEN);
-        error = error ? -EFAULT : 0;
-
-        return error;
-}
-
 SYSCALL_DEFINE1(set_thread_area, unsigned long, addr)
 {
         struct thread_info *ti = task_thread_info(current);
@@ -407,94 +369,6 @@ _sys_sysmips(nabi_no_regargs struct pt_regs regs)
 }
 
 /*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-SYSCALL_DEFINE6(ipc, unsigned int, call, int, first, int, second,
-        unsigned long, third, void __user *, ptr, long, fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        switch (call) {
-        case SEMOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr,
-                                      second, NULL);
-        case SEMTIMEDOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr,
-                                      second,
-                                      (const struct timespec __user *)fifth);
-        case SEMGET:
-                return sys_semget(first, second, third);
-        case SEMCTL: {
-                union semun fourth;
-                if (!ptr)
-                        return -EINVAL;
-                if (get_user(fourth.__pad, (void __user *__user *) ptr))
-                        return -EFAULT;
-                return sys_semctl(first, second, third, fourth);
-        }
-
-        case MSGSND:
-                return sys_msgsnd(first, (struct msgbuf __user *) ptr,
-                                  second, third);
-        case MSGRCV:
-                switch (version) {
-                case 0: {
-                        struct ipc_kludge tmp;
-                        if (!ptr)
-                                return -EINVAL;
-
-                        if (copy_from_user(&tmp,
-                                           (struct ipc_kludge __user *) ptr,
-                                           sizeof(tmp)))
-                                return -EFAULT;
-                        return sys_msgrcv(first, tmp.msgp, second,
-                                          tmp.msgtyp, third);
-                }
-                default:
-                        return sys_msgrcv(first,
-                                          (struct msgbuf __user *) ptr,
-                                          second, fifth, third);
-                }
-        case MSGGET:
-                return sys_msgget((key_t) first, second);
-        case MSGCTL:
-                return sys_msgctl(first, second,
-                                  (struct msqid_ds __user *) ptr);
-
-        case SHMAT:
-                switch (version) {
-                default: {
-                        unsigned long raddr;
-                        ret = do_shmat(first, (char __user *) ptr, second,
-                                       &raddr);
-                        if (ret)
-                                return ret;
-                        return put_user(raddr, (unsigned long __user *) third);
-                }
-                case 1: /* iBCS2 emulator entry point */
-                        if (!segment_eq(get_fs(), get_ds()))
-                                return -EINVAL;
-                        return do_shmat(first, (char __user *) ptr, second,
-                                        (unsigned long *) third);
-                }
-        case SHMDT:
-                return sys_shmdt((char __user *)ptr);
-        case SHMGET:
-                return sys_shmget(first, second, third);
-        case SHMCTL:
-                return sys_shmctl(first, second,
-                                  (struct shmid_ds __user *) ptr);
-        default:
-                return -ENOSYS;
-        }
-}
-
-/*
  * No implemented yet ...
  */
 SYSCALL_DEFINE3(cachectl, char *, addr, int, nbytes, int, op)
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 4e00f9bc23e..1a4dd657ccb 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1599,7 +1599,7 @@ void __init trap_init(void)
                 ebase = (unsigned long)
                         __alloc_bootmem(size, 1 << fls(size), 0);
         } else {
-                ebase = CAC_BASE;
+                ebase = CKSEG0;
                 if (cpu_has_mips_r2)
                         ebase += (read_c0_ebase() & 0x3ffff000);
         }
diff --git a/arch/mips/kernel/vdso.c b/arch/mips/kernel/vdso.c
new file mode 100644
index 00000000000..b773c1112b1
--- /dev/null
+++ b/arch/mips/kernel/vdso.c
@@ -0,0 +1,112 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2009, 2010 Cavium Networks, Inc.
+ */
+
+
+#include <linux/kernel.h>
+#include <linux/err.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/init.h>
+#include <linux/binfmts.h>
+#include <linux/elf.h>
+#include <linux/vmalloc.h>
+#include <linux/unistd.h>
+
+#include <asm/vdso.h>
+#include <asm/uasm.h>
+
+/*
+ * Including <asm/unistd.h> would give use the 64-bit syscall numbers ...
+ */
+#define __NR_O32_sigreturn              4119
+#define __NR_O32_rt_sigreturn           4193
+#define __NR_N32_rt_sigreturn           6211
+
+static struct page *vdso_page;
+
+static void __init install_trampoline(u32 *tramp, unsigned int sigreturn)
+{
+        uasm_i_addiu(&tramp, 2, 0, sigreturn);  /* li v0, sigreturn */
+        uasm_i_syscall(&tramp, 0);
+}
+
+static int __init init_vdso(void)
+{
+        struct mips_vdso *vdso;
+
+        vdso_page = alloc_page(GFP_KERNEL);
+        if (!vdso_page)
+                panic("Cannot allocate vdso");
+
+        vdso = vmap(&vdso_page, 1, 0, PAGE_KERNEL);
+        if (!vdso)
+                panic("Cannot map vdso");
+        clear_page(vdso);
+
+        install_trampoline(vdso->rt_signal_trampoline, __NR_rt_sigreturn);
+#ifdef CONFIG_32BIT
+        install_trampoline(vdso->signal_trampoline, __NR_sigreturn);
+#else
+        install_trampoline(vdso->n32_rt_signal_trampoline,
+                           __NR_N32_rt_sigreturn);
+        install_trampoline(vdso->o32_signal_trampoline, __NR_O32_sigreturn);
+        install_trampoline(vdso->o32_rt_signal_trampoline,
+                           __NR_O32_rt_sigreturn);
+#endif
+
+        vunmap(vdso);
+
+        pr_notice("init_vdso successfull\n");
+
+        return 0;
+}
+device_initcall(init_vdso);
+
+static unsigned long vdso_addr(unsigned long start)
+{
+        return STACK_TOP;
+}
+
+int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
+{
+        int ret;
+        unsigned long addr;
+        struct mm_struct *mm = current->mm;
+
+        down_write(&mm->mmap_sem);
+
+        addr = vdso_addr(mm->start_stack);
+
+        addr = get_unmapped_area(NULL, addr, PAGE_SIZE, 0, 0);
+        if (IS_ERR_VALUE(addr)) {
+                ret = addr;
+                goto up_fail;
+        }
+
+        ret = install_special_mapping(mm, addr, PAGE_SIZE,
+                                      VM_READ|VM_EXEC|
+                                      VM_MAYREAD|VM_MAYWRITE|VM_MAYEXEC|
+                                      VM_ALWAYSDUMP,
+                                      &vdso_page);
+
+        if (ret)
+                goto up_fail;
+
+        mm->context.vdso = (void *)addr;
+
+up_fail:
+        up_write(&mm->mmap_sem);
+        return ret;
+}
+
+const char *arch_vma_name(struct vm_area_struct *vma)
+{
+        if (vma->vm_mm && vma->vm_start == (long)vma->vm_mm->context.vdso)
+                return "[vdso]";
+        return NULL;
+}
diff --git a/arch/mips/lib/delay.c b/arch/mips/lib/delay.c
index 6b3b1de9dca..5995969e8c4 100644
--- a/arch/mips/lib/delay.c
+++ b/arch/mips/lib/delay.c
@@ -41,7 +41,7 @@ EXPORT_SYMBOL(__delay);
 
 void __udelay(unsigned long us)
 {
-        unsigned int lpj = current_cpu_data.udelay_val;
+        unsigned int lpj = raw_current_cpu_data.udelay_val;
 
         __delay((us * 0x000010c7ull * HZ * lpj) >> 32);
 }
@@ -49,7 +49,7 @@ EXPORT_SYMBOL(__udelay);
 
 void __ndelay(unsigned long ns)
 {
-        unsigned int lpj = current_cpu_data.udelay_val;
+        unsigned int lpj = raw_current_cpu_data.udelay_val;
 
         __delay((ns * 0x00000005ull * HZ * lpj) >> 32);
 }
diff --git a/arch/mips/lib/libgcc.h b/arch/mips/lib/libgcc.h
index 3f19d1c5d94..05909d58e2f 100644
--- a/arch/mips/lib/libgcc.h
+++ b/arch/mips/lib/libgcc.h
@@ -17,8 +17,7 @@ struct DWstruct {
 #error I feel sick.
 #endif
 
-typedef union
-{
+typedef union {
         struct DWstruct s;
         long long ll;
 } DWunion;
diff --git a/arch/mips/mipssim/sim_int.c b/arch/mips/mipssim/sim_int.c
index 46067ad542d..5c779be6f08 100644
--- a/arch/mips/mipssim/sim_int.c
+++ b/arch/mips/mipssim/sim_int.c
@@ -17,7 +17,6 @@
  */
 #include <linux/init.h>
 #include <linux/sched.h>
-#include <linux/slab.h>
 #include <linux/interrupt.h>
 #include <linux/kernel_stat.h>
 #include <asm/mips-boards/simint.h>
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index be8627bc5b0..12af739048f 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -133,7 +133,7 @@ void __update_cache(struct vm_area_struct *vma, unsigned long address,
 }
 
 unsigned long _page_cachable_default;
-EXPORT_SYMBOL_GPL(_page_cachable_default);
+EXPORT_SYMBOL(_page_cachable_default);
 
 static inline void setup_protection_map(void)
 {
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index 9367e33fbd1..9547bc0cf18 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -14,6 +14,7 @@
 #include <linux/module.h>
 #include <linux/scatterlist.h>
 #include <linux/string.h>
+#include <linux/gfp.h>
 
 #include <asm/cache.h>
 #include <asm/io.h>
diff --git a/arch/mips/mm/hugetlbpage.c b/arch/mips/mm/hugetlbpage.c
index cd0660c51f2..a7fee0dfb7a 100644
--- a/arch/mips/mm/hugetlbpage.c
+++ b/arch/mips/mm/hugetlbpage.c
@@ -16,7 +16,6 @@
 #include <linux/mm.h>
 #include <linux/hugetlb.h>
 #include <linux/pagemap.h>
-#include <linux/slab.h>
 #include <linux/err.h>
 #include <linux/sysctl.h>
 #include <asm/mman.h>
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 12539af38a9..2efcbd24c82 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -28,6 +28,7 @@
 #include <linux/proc_fs.h>
 #include <linux/pfn.h>
 #include <linux/hardirq.h>
+#include <linux/gfp.h>
 
 #include <asm/asm-offsets.h>
 #include <asm/bootinfo.h>
diff --git a/arch/mips/mm/ioremap.c b/arch/mips/mm/ioremap.c
index 0c43248347b..cacfd31e8ec 100644
--- a/arch/mips/mm/ioremap.c
+++ b/arch/mips/mm/ioremap.c
@@ -10,6 +10,7 @@
 #include <asm/addrspace.h>
 #include <asm/byteorder.h>
 #include <linux/sched.h>
+#include <linux/slab.h>
 #include <linux/vmalloc.h>
 #include <asm/cacheflush.h>
 #include <asm/io.h>
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 0de0e4127d6..d1f68aadbc4 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -788,10 +788,15 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
          * create the plain linear handler
          */
         if (bcm1250_m3_war()) {
-                UASM_i_MFC0(&p, K0, C0_BADVADDR);
-                UASM_i_MFC0(&p, K1, C0_ENTRYHI);
+                unsigned int segbits = 44;
+
+                uasm_i_dmfc0(&p, K0, C0_BADVADDR);
+                uasm_i_dmfc0(&p, K1, C0_ENTRYHI);
                 uasm_i_xor(&p, K0, K0, K1);
-                UASM_i_SRL(&p, K0, K0, PAGE_SHIFT + 1);
+                uasm_i_dsrl32(&p, K1, K0, 62 - 32);
+                uasm_i_dsrl(&p, K0, K0, 12 + 1);
+                uasm_i_dsll32(&p, K0, K0, 64 + 12 + 1 - segbits - 32);
+                uasm_i_or(&p, K0, K0, K1);
                 uasm_il_bnez(&p, &r, K0, label_leave);
                 /* No need for uasm_i_nop */
         }
@@ -1312,10 +1317,15 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
         memset(relocs, 0, sizeof(relocs));
 
         if (bcm1250_m3_war()) {
-                UASM_i_MFC0(&p, K0, C0_BADVADDR);
-                UASM_i_MFC0(&p, K1, C0_ENTRYHI);
+                unsigned int segbits = 44;
+
+                uasm_i_dmfc0(&p, K0, C0_BADVADDR);
+                uasm_i_dmfc0(&p, K1, C0_ENTRYHI);
                 uasm_i_xor(&p, K0, K0, K1);
-                UASM_i_SRL(&p, K0, K0, PAGE_SHIFT + 1);
+                uasm_i_dsrl32(&p, K1, K0, 62 - 32);
+                uasm_i_dsrl(&p, K0, K0, 12 + 1);
+                uasm_i_dsll32(&p, K0, K0, 64 + 12 + 1 - segbits - 32);
+                uasm_i_or(&p, K0, K0, K1);
                 uasm_il_bnez(&p, &r, K0, label_leave);
                 /* No need for uasm_i_nop */
         }
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c
index 1581e985246..611d564fdcf 100644
--- a/arch/mips/mm/uasm.c
+++ b/arch/mips/mm/uasm.c
@@ -31,7 +31,8 @@ enum fields {
         BIMM = 0x040,
         JIMM = 0x080,
         FUNC = 0x100,
-        SET = 0x200
+        SET = 0x200,
+        SCIMM = 0x400
 };
 
 #define OP_MASK         0x3f
@@ -52,6 +53,8 @@ enum fields {
 #define FUNC_SH         0
 #define SET_MASK        0x7
 #define SET_SH          0
+#define SCIMM_MASK      0xfffff
+#define SCIMM_SH        6
 
 enum opcode {
         insn_invalid,
@@ -61,10 +64,10 @@ enum opcode {
         insn_dmtc0, insn_dsll, insn_dsll32, insn_dsra, insn_dsrl,
         insn_dsrl32, insn_drotr, insn_dsubu, insn_eret, insn_j, insn_jal,
         insn_jr, insn_ld, insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0,
-        insn_mtc0, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd,
+        insn_mtc0, insn_or, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd,
         insn_sd, insn_sll, insn_sra, insn_srl, insn_rotr, insn_subu, insn_sw,
         insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori,
-        insn_dins
+        insn_dins, insn_syscall
 };
 
 struct insn {
@@ -117,6 +120,7 @@ static struct insn insn_table[] __cpuinitdata = {
         { insn_lw,  M(lw_op, 0, 0, 0, 0, 0),  RS | RT | SIMM },
         { insn_mfc0,  M(cop0_op, mfc_op, 0, 0, 0, 0),  RT | RD | SET},
         { insn_mtc0,  M(cop0_op, mtc_op, 0, 0, 0, 0),  RT | RD | SET},
+        { insn_or,  M(spec_op, 0, 0, 0, 0, or_op),  RS | RT | RD },
         { insn_ori,  M(ori_op, 0, 0, 0, 0, 0),  RS | RT | UIMM },
         { insn_pref,  M(pref_op, 0, 0, 0, 0, 0),  RS | RT | SIMM },
         { insn_rfe,  M(cop0_op, cop_op, 0, 0, 0, rfe_op),  0 },
@@ -136,6 +140,7 @@ static struct insn insn_table[] __cpuinitdata = {
         { insn_xor,  M(spec_op, 0, 0, 0, 0, xor_op),  RS | RT | RD },
         { insn_xori,  M(xori_op, 0, 0, 0, 0, 0),  RS | RT | UIMM },
         { insn_dins, M(spec3_op, 0, 0, 0, 0, dins_op), RS | RT | RD | RE },
+        { insn_syscall, M(spec_op, 0, 0, 0, 0, syscall_op), SCIMM},
         { insn_invalid, 0, 0 }
 };
 
@@ -208,6 +213,14 @@ static inline __cpuinit u32 build_jimm(u32 arg)
         return (arg >> 2) & JIMM_MASK;
 }
 
+static inline __cpuinit u32 build_scimm(u32 arg)
+{
+        if (arg & ~SCIMM_MASK)
+                printk(KERN_WARNING "Micro-assembler field overflow\n");
+
+        return (arg & SCIMM_MASK) << SCIMM_SH;
+}
+
 static inline __cpuinit u32 build_func(u32 arg)
 {
         if (arg & ~FUNC_MASK)
@@ -266,6 +279,8 @@ static void __cpuinit build_insn(u32 **buf, enum opcode opc, ...)
                 op |= build_func(va_arg(ap, u32));
         if (ip->fields & SET)
                 op |= build_set(va_arg(ap, u32));
+        if (ip->fields & SCIMM)
+                op |= build_scimm(va_arg(ap, u32));
         va_end(ap);
 
         **buf = op;
@@ -373,6 +388,7 @@ I_u2s3u1(_lw)
 I_u1u2u3(_mfc0)
 I_u1u2u3(_mtc0)
 I_u2u1u3(_ori)
+I_u3u1u2(_or)
 I_u2s3u1(_pref)
 I_0(_rfe)
 I_u2s3u1(_sc)
@@ -391,6 +407,7 @@ I_0(_tlbwr)
 I_u3u1u2(_xor)
 I_u2u1u3(_xori)
 I_u2u1msbu3(_dins);
+I_u1(_syscall);
 
 /* Handle labels. */
 void __cpuinit uasm_build_label(struct uasm_label **lab, u32 *addr, int lid)
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c
index 2cb5ae79020..15949b0be81 100644
--- a/arch/mips/mti-malta/malta-int.c
+++ b/arch/mips/mti-malta/malta-int.c
@@ -25,7 +25,6 @@
 #include <linux/irq.h>
 #include <linux/sched.h>
 #include <linux/smp.h>
-#include <linux/slab.h>
 #include <linux/interrupt.h>
 #include <linux/io.h>
 #include <linux/kernel_stat.h>
diff --git a/arch/mips/nxp/pnx833x/common/reset.c b/arch/mips/nxp/pnx833x/common/reset.c
index a9bc9bacad2..e0ea96d29fd 100644
--- a/arch/mips/nxp/pnx833x/common/reset.c
+++ b/arch/mips/nxp/pnx833x/common/reset.c
@@ -22,7 +22,6 @@
  *  along with this program; if not, write to the Free Software
  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
-#include <linux/slab.h>
 #include <linux/reboot.h>
 #include <pnx833x.h>
 
diff --git a/arch/mips/nxp/pnx8550/common/int.c b/arch/mips/nxp/pnx8550/common/int.c
index 7aca7d5375e..cfed5051dc6 100644
--- a/arch/mips/nxp/pnx8550/common/int.c
+++ b/arch/mips/nxp/pnx8550/common/int.c
@@ -27,7 +27,6 @@
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/sched.h>
-#include <linux/slab.h>
 #include <linux/interrupt.h>
 #include <linux/kernel_stat.h>
 #include <linux/random.h>
diff --git a/arch/mips/nxp/pnx8550/common/proc.c b/arch/mips/nxp/pnx8550/common/proc.c
index af094cd1d85..3bba5ec828e 100644
--- a/arch/mips/nxp/pnx8550/common/proc.c
+++ b/arch/mips/nxp/pnx8550/common/proc.c
@@ -16,7 +16,6 @@
 #include <linux/proc_fs.h>
 #include <linux/irq.h>
 #include <linux/sched.h>
-#include <linux/slab.h>
 #include <linux/interrupt.h>
 #include <linux/kernel_stat.h>
 #include <linux/random.h>
diff --git a/arch/mips/nxp/pnx8550/common/reset.c b/arch/mips/nxp/pnx8550/common/reset.c
index 7b2cbc5b2c7..76bc3ec634e 100644
--- a/arch/mips/nxp/pnx8550/common/reset.c
+++ b/arch/mips/nxp/pnx8550/common/reset.c
@@ -20,7 +20,6 @@
  * Reset the PNX8550 board.
  *
  */
-#include <linux/slab.h>
 #include <asm/reboot.h>
 #include <glb.h>
 
diff --git a/arch/mips/pci/ops-loongson2.c b/arch/mips/pci/ops-loongson2.c
index 2bb4057bf6c..d657ee0bc13 100644
--- a/arch/mips/pci/ops-loongson2.c
+++ b/arch/mips/pci/ops-loongson2.c
@@ -180,15 +180,21 @@ struct pci_ops loongson_pci_ops = {
 };
 
 #ifdef CONFIG_CS5536
+DEFINE_RAW_SPINLOCK(msr_lock);
+
 void _rdmsr(u32 msr, u32 *hi, u32 *lo)
 {
         struct pci_bus bus = {
                 .number = PCI_BUS_CS5536
         };
         u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0);
+        unsigned long flags;
+
+        raw_spin_lock_irqsave(&msr_lock, flags);
         loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
         loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_LO, 4, lo);
         loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_HI, 4, hi);
+        raw_spin_unlock_irqrestore(&msr_lock, flags);
 }
 EXPORT_SYMBOL(_rdmsr);
 
@@ -198,9 +204,13 @@ void _wrmsr(u32 msr, u32 hi, u32 lo)
                 .number = PCI_BUS_CS5536
         };
         u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0);
+        unsigned long flags;
+
+        raw_spin_lock_irqsave(&msr_lock, flags);
         loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
         loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_LO, 4, lo);
         loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_HI, 4, hi);
+        raw_spin_unlock_irqrestore(&msr_lock, flags);
 }
 EXPORT_SYMBOL(_wrmsr);
 #endif
diff --git a/arch/mips/pci/ops-titan-ht.c b/arch/mips/pci/ops-titan-ht.c
index 46c636c27e0..749c1922d42 100644
--- a/arch/mips/pci/ops-titan-ht.c
+++ b/arch/mips/pci/ops-titan-ht.c
@@ -26,7 +26,6 @@
 #include <linux/types.h>
 #include <linux/pci.h>
 #include <linux/kernel.h>
-#include <linux/slab.h>
 #include <linux/delay.h>
 #include <asm/io.h>
 
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_prom.c b/arch/mips/pmc-sierra/msp71xx/msp_prom.c
index db98d87a092..db00deb59b9 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_prom.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_prom.c
@@ -40,6 +40,7 @@
 #include <linux/string.h>
 #include <linux/interrupt.h>
 #include <linux/mm.h>
+#include <linux/slab.h>
 
 #include <asm/addrspace.h>
 #include <asm/bootinfo.h>
diff --git a/arch/mips/pmc-sierra/yosemite/ht.c b/arch/mips/pmc-sierra/yosemite/ht.c
index fd22597edb6..63be40e470d 100644
--- a/arch/mips/pmc-sierra/yosemite/ht.c
+++ b/arch/mips/pmc-sierra/yosemite/ht.c
@@ -26,7 +26,6 @@
 #include <linux/types.h>
 #include <linux/pci.h>
 #include <linux/kernel.h>
-#include <linux/slab.h>
 #include <asm/pci.h>
 #include <asm/io.h>
 
diff --git a/arch/mips/pmc-sierra/yosemite/irq.c b/arch/mips/pmc-sierra/yosemite/irq.c
index 5f673eba142..51021cfd04b 100644
--- a/arch/mips/pmc-sierra/yosemite/irq.c
+++ b/arch/mips/pmc-sierra/yosemite/irq.c
@@ -37,7 +37,6 @@
 #include <linux/ioport.h>
 #include <linux/irq.h>
 #include <linux/timex.h>
-#include <linux/slab.h>
 #include <linux/random.h>
 #include <linux/bitops.h>
 #include <asm/bootinfo.h>
diff --git a/arch/mips/powertv/asic/asic_devices.c b/arch/mips/powertv/asic/asic_devices.c
index 217424231eb..8ee77887306 100644
--- a/arch/mips/powertv/asic/asic_devices.c
+++ b/arch/mips/powertv/asic/asic_devices.c
@@ -39,6 +39,7 @@
 #include <linux/mm.h>
 #include <linux/platform_device.h>
 #include <linux/module.h>
+#include <linux/gfp.h>
 #include <asm/page.h>
 #include <linux/swap.h>
 #include <linux/highmem.h>
diff --git a/arch/mips/powertv/asic/asic_int.c b/arch/mips/powertv/asic/asic_int.c
index 325fab9685d..529c44a52d6 100644
--- a/arch/mips/powertv/asic/asic_int.c
+++ b/arch/mips/powertv/asic/asic_int.c
@@ -26,7 +26,6 @@
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/sched.h>
-#include <linux/slab.h>
 #include <linux/interrupt.h>
 #include <linux/kernel_stat.h>
 #include <linux/kernel.h>
diff --git a/arch/mips/rb532/irq.c b/arch/mips/rb532/irq.c
index f07882029a9..ea6cec3c1e0 100644
--- a/arch/mips/rb532/irq.c
+++ b/arch/mips/rb532/irq.c
@@ -36,7 +36,6 @@
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
 #include <linux/timex.h>
-#include <linux/slab.h>
 #include <linux/random.h>
 #include <linux/delay.h>
 
diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c
index c1c8e40d65d..6a123ea72de 100644
--- a/arch/mips/sgi-ip27/ip27-irq.c
+++ b/arch/mips/sgi-ip27/ip27-irq.c
@@ -17,7 +17,6 @@
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
 #include <linux/timex.h>
-#include <linux/slab.h>
 #include <linux/smp.h>
 #include <linux/random.h>
 #include <linux/kernel.h>
diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c
index d8b65204d28..eb40824b172 100644
--- a/arch/mips/sgi-ip32/ip32-irq.c
+++ b/arch/mips/sgi-ip32/ip32-irq.c
@@ -15,7 +15,6 @@
 #include <linux/irq.h>
 #include <linux/bitops.h>
 #include <linux/kernel.h>
-#include <linux/slab.h>
 #include <linux/mm.h>
 #include <linux/random.h>
 #include <linux/sched.h>
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
index 06e25d94976..7a8b0a8b643 100644
--- a/arch/mips/sibyte/bcm1480/irq.c
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -22,7 +22,6 @@
 #include <linux/smp.h>
 #include <linux/spinlock.h>
 #include <linux/mm.h>
-#include <linux/slab.h>
 #include <linux/kernel_stat.h>
 
 #include <asm/errno.h>
diff --git a/arch/mips/sibyte/common/sb_tbprof.c b/arch/mips/sibyte/common/sb_tbprof.c
index ed2453eab5c..d4ed7a9156f 100644
--- a/arch/mips/sibyte/common/sb_tbprof.c
+++ b/arch/mips/sibyte/common/sb_tbprof.c
@@ -27,7 +27,6 @@
 #include <linux/types.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
-#include <linux/slab.h>
 #include <linux/vmalloc.h>
 #include <linux/fs.h>
 #include <linux/errno.h>
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index ab44a2f59ee..62371f77255 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -22,7 +22,6 @@
 #include <linux/spinlock.h>
 #include <linux/smp.h>
 #include <linux/mm.h>
-#include <linux/slab.h>
 #include <linux/kernel_stat.h>
 
 #include <asm/errno.h>
diff --git a/arch/mips/sibyte/sb1250/setup.c b/arch/mips/sibyte/sb1250/setup.c
index 0444da1e23c..92da3155ce0 100644
--- a/arch/mips/sibyte/sb1250/setup.c
+++ b/arch/mips/sibyte/sb1250/setup.c
@@ -87,6 +87,21 @@ static int __init setup_bcm1250(void)
         return ret;
 }
 
+int sb1250_m3_workaround_needed(void)
+{
+        switch (soc_type) {
+        case K_SYS_SOC_TYPE_BCM1250:
+        case K_SYS_SOC_TYPE_BCM1250_ALT:
+        case K_SYS_SOC_TYPE_BCM1250_ALT2:
+        case K_SYS_SOC_TYPE_BCM1125:
+        case K_SYS_SOC_TYPE_BCM1125H:
+                return soc_pass < K_SYS_REVISION_BCM1250_C0;
+
+        default:
+                return 0;
+        }
+}
+
 static int __init setup_bcm112x(void)
 {
         int ret = 0;
diff --git a/arch/mips/txx9/generic/7segled.c b/arch/mips/txx9/generic/7segled.c
index 727ab21b661..7f8416f8622 100644
--- a/arch/mips/txx9/generic/7segled.c
+++ b/arch/mips/txx9/generic/7segled.c
@@ -58,13 +58,16 @@ static ssize_t raw_store(struct sys_device *dev,
 static SYSDEV_ATTR(ascii, 0200, NULL, ascii_store);
 static SYSDEV_ATTR(raw, 0200, NULL, raw_store);
 
-static ssize_t map_seg7_show(struct sysdev_class *class, char *buf)
+static ssize_t map_seg7_show(struct sysdev_class *class,
+                             struct sysdev_class_attribute *attr,
+                             char *buf)
 {
         memcpy(buf, &txx9_seg7map, sizeof(txx9_seg7map));
         return sizeof(txx9_seg7map);
 }
 
 static ssize_t map_seg7_store(struct sysdev_class *class,
+                              struct sysdev_class_attribute *attr,
                               const char *buf, size_t size)
 {
         if (size != sizeof(txx9_seg7map))
diff --git a/arch/mips/txx9/generic/pci.c b/arch/mips/txx9/generic/pci.c
index 707cfa9c547..9a0be810caf 100644
--- a/arch/mips/txx9/generic/pci.c
+++ b/arch/mips/txx9/generic/pci.c
@@ -20,6 +20,7 @@
 #include <asm/txx9/pci.h>
 #ifdef CONFIG_TOSHIBA_FPCIB0
 #include <linux/interrupt.h>
+#include <linux/slab.h>
 #include <asm/i8259.h>
 #include <asm/txx9/smsc_fdc37m81x.h>
 #endif
diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c
index 7174d830dd0..adc69291f9e 100644
--- a/arch/mips/txx9/generic/setup.c
+++ b/arch/mips/txx9/generic/setup.c
@@ -23,6 +23,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/leds.h>
 #include <linux/sysdev.h>
+#include <linux/slab.h>
 #include <asm/bootinfo.h>
 #include <asm/time.h>
 #include <asm/reboot.h>
@@ -956,6 +957,7 @@ void __init txx9_sramc_init(struct resource *r)
         if (!dev->base)
                 goto exit;
         dev->dev.cls = &txx9_sramc_sysdev_class;
+        sysfs_bin_attr_init(&dev->bindata_attr);
         dev->bindata_attr.attr.name = "bindata";
         dev->bindata_attr.attr.mode = S_IRUSR | S_IWUSR;
         dev->bindata_attr.read = txx9_sram_read;
diff --git a/arch/mips/txx9/generic/spi_eeprom.c b/arch/mips/txx9/generic/spi_eeprom.c
index 75c347238f4..103abc13d62 100644
--- a/arch/mips/txx9/generic/spi_eeprom.c
+++ b/arch/mips/txx9/generic/spi_eeprom.c
@@ -10,6 +10,7 @@
  * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
  */
 #include <linux/init.h>
+#include <linux/slab.h>
 #include <linux/device.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/eeprom.h>
diff --git a/arch/mips/txx9/rbtx4939/setup.c b/arch/mips/txx9/rbtx4939/setup.c
index b0c241ecf60..7dc0fafbec8 100644
--- a/arch/mips/txx9/rbtx4939/setup.c
+++ b/arch/mips/txx9/rbtx4939/setup.c
@@ -12,6 +12,7 @@
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
+#include <linux/slab.h>
 #include <linux/platform_device.h>
 #include <linux/leds.h>
 #include <linux/interrupt.h>
diff --git a/arch/mn10300/include/asm/dma-mapping.h b/arch/mn10300/include/asm/dma-mapping.h
index ccae8f6c632..4ed1522b38d 100644
--- a/arch/mn10300/include/asm/dma-mapping.h
+++ b/arch/mn10300/include/asm/dma-mapping.h
@@ -17,6 +17,11 @@
 #include <asm/cache.h>
 #include <asm/io.h>
 
+/*
+ * See Documentation/DMA-API.txt for the description of how the
+ * following DMA API should work.
+ */
+
 extern void *dma_alloc_coherent(struct device *dev, size_t size,
                                 dma_addr_t *dma_handle, int flag);
 
@@ -26,13 +31,6 @@ extern void dma_free_coherent(struct device *dev, size_t size,
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent((d), (s), (h), (f))
 #define dma_free_noncoherent(d, s, v, h)  dma_free_coherent((d), (s), (v), (h))
 
-/*
- * Map a single buffer of the indicated size for DMA in streaming mode.  The
- * 32-bit bus address to use is returned.
- *
- * Once the device is given the dma address, the device owns this memory until
- * either pci_unmap_single or pci_dma_sync_single is performed.
- */
 static inline
 dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
                           enum dma_data_direction direction)
@@ -42,14 +40,6 @@ dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
         return virt_to_bus(ptr);
 }
 
-/*
- * Unmap a single streaming mode DMA translation.  The dma_addr and size must
- * match what was provided for in a previous pci_map_single call.  All other
- * usages are undefined.
- *
- * After this call, reads by the cpu to the buffer are guarenteed to see
- * whatever the device wrote there.
- */
 static inline
 void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
                       enum dma_data_direction direction)
@@ -57,20 +47,6 @@ void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
         BUG_ON(direction == DMA_NONE);
 }
 
-/*
- * Map a set of buffers described by scatterlist in streaming mode for DMA.
- * This is the scather-gather version of the above pci_map_single interface.
- * Here the scatter gather list elements are each tagged with the appropriate
- * dma address and length.  They are obtained via sg_dma_{address,length}(SG).
- *
- * NOTE: An implementation may be able to use a smaller number of DMA
- *       address/length pairs than there are SG table elements.  (for example
- *       via virtual mapping capabilities) The routine returns the number of
- *       addr/length pairs actually used, at most nents.
- *
- * Device ownership issues as mentioned above for pci_map_single are the same
- * here.
- */
 static inline
 int dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
                enum dma_data_direction direction)
@@ -91,11 +67,6 @@ int dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
         return nents;
 }
 
-/*
- * Unmap a set of streaming mode DMA translations.
- * Again, cpu read rules concerning calls here are the same as for
- * pci_unmap_single() above.
- */
 static inline
 void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
                   enum dma_data_direction direction)
@@ -103,10 +74,6 @@ void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
         BUG_ON(!valid_dma_direction(direction));
 }
 
-/*
- * pci_{map,unmap}_single_page maps a kernel page to a dma_addr_t. identical
- * to pci_map_single, but takes a struct page instead of a virtual address
- */
 static inline
 dma_addr_t dma_map_page(struct device *dev, struct page *page,
                         unsigned long offset, size_t size,
@@ -123,15 +90,6 @@ void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
         BUG_ON(direction == DMA_NONE);
 }
 
-/*
- * Make physical memory consistent for a single streaming mode DMA translation
- * after a transfer.
- *
- * If you perform a pci_map_single() but wish to interrogate the buffer using
- * the cpu, yet do not wish to teardown the PCI dma mapping, you must call this
- * function before doing so.  At the next point you give the PCI dma address
- * back to the card, the device again owns the buffer.
- */
 static inline
 void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
                              size_t size, enum dma_data_direction direction)
@@ -161,13 +119,6 @@ dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
 }
 
 
-/*
- * Make physical memory consistent for a set of streaming mode DMA translations
- * after a transfer.
- *
- * The same as pci_dma_sync_single but for a scatter-gather list, same rules
- * and usage.
- */
 static inline
 void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
                          int nelems, enum dma_data_direction direction)
@@ -187,12 +138,6 @@ int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
         return 0;
 }
 
-/*
- * Return whether the given PCI device DMA address mask can be supported
- * properly.  For example, if your device can only drive the low 24-bits during
- * PCI bus mastering, then you would pass 0x00ffffff as the mask to this
- * function.
- */
 static inline
 int dma_supported(struct device *dev, u64 mask)
 {
diff --git a/arch/mn10300/include/asm/ptrace.h b/arch/mn10300/include/asm/ptrace.h
index 1b0ba5e182b..7c2e911052b 100644
--- a/arch/mn10300/include/asm/ptrace.h
+++ b/arch/mn10300/include/asm/ptrace.h
@@ -99,8 +99,6 @@ struct task_struct;
 extern void show_regs(struct pt_regs *);
 
 #define arch_has_single_step()  (1)
-extern void user_enable_single_step(struct task_struct *);
-extern void user_disable_single_step(struct task_struct *);
 
 #endif  /*  !__ASSEMBLY  */
 
diff --git a/arch/mn10300/include/asm/unistd.h b/arch/mn10300/include/asm/unistd.h
index c05acb95c2a..9d056f51592 100644
--- a/arch/mn10300/include/asm/unistd.h
+++ b/arch/mn10300/include/asm/unistd.h
@@ -363,6 +363,7 @@
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_ALARM
 #define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_PAUSE
 #define __ARCH_WANT_SYS_SGETMASK
 #define __ARCH_WANT_SYS_SIGNAL
@@ -375,6 +376,7 @@
 #define __ARCH_WANT_SYS_LLSEEK
 #define __ARCH_WANT_SYS_NICE
 #define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_SELECT
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/mn10300/kernel/entry.S b/arch/mn10300/kernel/entry.S
index 88e3e1c3cc2..d9ed5a15c54 100644
--- a/arch/mn10300/kernel/entry.S
+++ b/arch/mn10300/kernel/entry.S
@@ -468,7 +468,7 @@ ENTRY(sys_call_table)
         .long sys_settimeofday
         .long sys_getgroups16   /* 80 */
         .long sys_setgroups16
-        .long old_select
+        .long sys_old_select
         .long sys_symlink
         .long sys_lstat
         .long sys_readlink      /* 85 */
diff --git a/arch/mn10300/kernel/process.c b/arch/mn10300/kernel/process.c
index ec8a21df114..82b817c7f7b 100644
--- a/arch/mn10300/kernel/process.c
+++ b/arch/mn10300/kernel/process.c
@@ -18,7 +18,6 @@
 #include <linux/stddef.h>
 #include <linux/unistd.h>
 #include <linux/ptrace.h>
-#include <linux/slab.h>
 #include <linux/user.h>
 #include <linux/interrupt.h>
 #include <linux/delay.h>
@@ -26,6 +25,7 @@
 #include <linux/percpu.h>
 #include <linux/err.h>
 #include <linux/fs.h>
+#include <linux/slab.h>
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
 #include <asm/system.h>
diff --git a/arch/mn10300/kernel/setup.c b/arch/mn10300/kernel/setup.c
index 3f24c298a3a..d464affcba0 100644
--- a/arch/mn10300/kernel/setup.c
+++ b/arch/mn10300/kernel/setup.c
@@ -15,7 +15,6 @@
 #include <linux/stddef.h>
 #include <linux/unistd.h>
 #include <linux/ptrace.h>
-#include <linux/slab.h>
 #include <linux/user.h>
 #include <linux/tty.h>
 #include <linux/ioport.h>
diff --git a/arch/mn10300/kernel/sys_mn10300.c b/arch/mn10300/kernel/sys_mn10300.c
index 17cc6ce04e8..815f1355fad 100644
--- a/arch/mn10300/kernel/sys_mn10300.c
+++ b/arch/mn10300/kernel/sys_mn10300.c
@@ -31,109 +31,3 @@ asmlinkage long old_mmap(unsigned long addr, unsigned long len,
                 return -EINVAL;
         return sys_mmap_pgoff(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
 }
-
-struct sel_arg_struct {
-        unsigned long n;
-        fd_set *inp;
-        fd_set *outp;
-        fd_set *exp;
-        struct timeval *tvp;
-};
-
-asmlinkage int old_select(struct sel_arg_struct __user *arg)
-{
-        struct sel_arg_struct a;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                return -EFAULT;
-        /* sys_select() does the appropriate kernel locking */
-        return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
-}
-
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-asmlinkage long sys_ipc(uint call, int first, int second,
-                        int third, void __user *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        switch (call) {
-        case SEMOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr,
-                                      second, NULL);
-        case SEMTIMEDOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr,
-                                      second,
-                                      (const struct timespec __user *)fifth);
-        case SEMGET:
-                return sys_semget(first, second, third);
-        case SEMCTL: {
-                union semun fourth;
-                if (!ptr)
-                        return -EINVAL;
-                if (get_user(fourth.__pad, (void __user * __user *) ptr))
-                        return -EFAULT;
-                return sys_semctl(first, second, third, fourth);
-        }
-
-        case MSGSND:
-                return sys_msgsnd(first, (struct msgbuf __user *) ptr,
-                                  second, third);
-        case MSGRCV:
-                switch (version) {
-                case 0: {
-                        struct ipc_kludge tmp;
-                        if (!ptr)
-                                return -EINVAL;
-
-                        if (copy_from_user(&tmp,
-                                           (struct ipc_kludge __user *) ptr,
-                                           sizeof(tmp)))
-                                return -EFAULT;
-                        return sys_msgrcv(first, tmp.msgp, second,
-                                          tmp.msgtyp, third);
-                }
-                default:
-                        return sys_msgrcv(first,
-                                          (struct msgbuf __user *) ptr,
-                                           second, fifth, third);
-                }
-        case MSGGET:
-                return sys_msgget((key_t) first, second);
-        case MSGCTL:
-                return sys_msgctl(first, second,
-                                   (struct msqid_ds __user *) ptr);
-
-        case SHMAT:
-                switch (version) {
-                default: {
-                        ulong raddr;
-                        ret = do_shmat(first, (char __user *) ptr, second,
-                                       &raddr);
-                        if (ret)
-                                return ret;
-                        return put_user(raddr, (ulong *) third);
-                }
-                case 1: /* iBCS2 emulator entry point */
-                        if (!segment_eq(get_fs(), get_ds()))
-                                return -EINVAL;
-                        return do_shmat(first, (char __user *) ptr, second,
-                                        (ulong *) third);
-                }
-        case SHMDT:
-                return sys_shmdt((char __user *)ptr);
-        case SHMGET:
-                return sys_shmget(first, second, third);
-        case SHMCTL:
-                return sys_shmctl(first, second,
-                                  (struct shmid_ds __user *) ptr);
-        default:
-                return -EINVAL;
-        }
-}
diff --git a/arch/mn10300/mm/dma-alloc.c b/arch/mn10300/mm/dma-alloc.c
index ee82d624b3c..4e34880bea0 100644
--- a/arch/mn10300/mm/dma-alloc.c
+++ b/arch/mn10300/mm/dma-alloc.c
@@ -14,6 +14,7 @@
 #include <linux/mm.h>
 #include <linux/string.h>
 #include <linux/pci.h>
+#include <linux/gfp.h>
 #include <asm/io.h>
 
 static unsigned long pci_sram_allocated = 0xbc000000;
diff --git a/arch/mn10300/mm/init.c b/arch/mn10300/mm/init.c
index dd27a9a3515..6e6bc0e5152 100644
--- a/arch/mn10300/mm/init.c
+++ b/arch/mn10300/mm/init.c
@@ -17,7 +17,6 @@
 #include <linux/types.h>
 #include <linux/ptrace.h>
 #include <linux/mman.h>
-#include <linux/slab.h>
 #include <linux/fs.h>
 #include <linux/mm.h>
 #include <linux/swap.h>
@@ -27,6 +26,7 @@
 #include <linux/highmem.h>
 #include <linux/pagemap.h>
 #include <linux/bootmem.h>
+#include <linux/gfp.h>
 
 #include <asm/processor.h>
 #include <asm/system.h>
diff --git a/arch/mn10300/mm/pgtable.c b/arch/mn10300/mm/pgtable.c
index baffc581e03..9c1624c9e4e 100644
--- a/arch/mn10300/mm/pgtable.c
+++ b/arch/mn10300/mm/pgtable.c
@@ -12,11 +12,11 @@
 #include <linux/sched.h>
 #include <linux/kernel.h>
 #include <linux/errno.h>
+#include <linux/gfp.h>
 #include <linux/mm.h>
 #include <linux/swap.h>
 #include <linux/smp.h>
 #include <linux/highmem.h>
-#include <linux/slab.h>
 #include <linux/pagemap.h>
 #include <linux/spinlock.h>
 #include <linux/quicklist.h>
diff --git a/arch/mn10300/unit-asb2305/pci-irq.c b/arch/mn10300/unit-asb2305/pci-irq.c
index 58cfb44f0ac..91212ea71e6 100644
--- a/arch/mn10300/unit-asb2305/pci-irq.c
+++ b/arch/mn10300/unit-asb2305/pci-irq.c
@@ -14,7 +14,6 @@
 #include <linux/kernel.h>
 #include <linux/pci.h>
 #include <linux/init.h>
-#include <linux/slab.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <asm/io.h>
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index f388dc68f60..9c4da3d63bf 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -95,6 +95,9 @@ config PM
 config STACKTRACE_SUPPORT
         def_bool y
 
+config NEED_DMA_MAP_STATE
+        def_bool y
+
 config ISA_DMA_API
         bool
 
diff --git a/arch/parisc/Kconfig.debug b/arch/parisc/Kconfig.debug
index bc989e522a0..7305ac8f7f5 100644
--- a/arch/parisc/Kconfig.debug
+++ b/arch/parisc/Kconfig.debug
@@ -12,4 +12,18 @@ config DEBUG_RODATA
          portion of the kernel code won't be covered by a TLB anymore.
          If in doubt, say "N".
 
+config DEBUG_STRICT_USER_COPY_CHECKS
+        bool "Strict copy size checks"
+        depends on DEBUG_KERNEL && !TRACE_BRANCH_PROFILING
+        ---help---
+          Enabling this option turns a certain set of sanity checks for user
+          copy operations into compile time failures.
+
+          The copy_from_user() etc checks are there to help test if there
+          are sufficient security checks on the length argument of
+          the copy operation, by having gcc prove that the argument is
+          within bounds.
+
+          If unsure, or if you run an older (pre 4.4) gcc, say N.
+
 endmenu
diff --git a/arch/parisc/hpux/fs.c b/arch/parisc/hpux/fs.c
index 54075360a8f..6935123178e 100644
--- a/arch/parisc/hpux/fs.c
+++ b/arch/parisc/hpux/fs.c
@@ -26,8 +26,8 @@
 #include <linux/fs.h>
 #include <linux/sched.h>
 #include <linux/file.h>
-#include <linux/slab.h>
 #include <linux/ptrace.h>
+#include <linux/slab.h>
 #include <asm/errno.h>
 #include <asm/uaccess.h>
 
diff --git a/arch/parisc/include/asm/compat.h b/arch/parisc/include/asm/compat.h
index 7f32611a7a5..02b77baa5da 100644
--- a/arch/parisc/include/asm/compat.h
+++ b/arch/parisc/include/asm/compat.h
@@ -7,7 +7,8 @@
 #include <linux/sched.h>
 #include <linux/thread_info.h>
 
-#define COMPAT_USER_HZ 100
+#define COMPAT_USER_HZ          100
+#define COMPAT_UTS_MACHINE      "parisc\0\0"
 
 typedef u32     compat_size_t;
 typedef s32     compat_ssize_t;
diff --git a/arch/parisc/include/asm/param.h b/arch/parisc/include/asm/param.h
index 32e03d87785..965d4542797 100644
--- a/arch/parisc/include/asm/param.h
+++ b/arch/parisc/include/asm/param.h
@@ -1,22 +1 @@
-#ifndef _ASMPARISC_PARAM_H
-#define _ASMPARISC_PARAM_H
-
-#ifdef __KERNEL__
-#define HZ              CONFIG_HZ
-#define USER_HZ         100             /* some user API use "ticks" */
-#define CLOCKS_PER_SEC  (USER_HZ)       /* like times() */
-#endif
-
-#ifndef HZ
-#define HZ 100
-#endif
-
-#define EXEC_PAGESIZE   4096
-
-#ifndef NOGROUP
-#define NOGROUP         (-1)
-#endif
-
-#define MAXHOSTNAMELEN  64      /* max length of hostname */
-
-#endif
+#include <asm-generic/param.h>
diff --git a/arch/parisc/include/asm/pci.h b/arch/parisc/include/asm/pci.h
index 64c7aa590ae..2242a5c636c 100644
--- a/arch/parisc/include/asm/pci.h
+++ b/arch/parisc/include/asm/pci.h
@@ -183,20 +183,6 @@ struct pci_bios_ops {
         void (*fixup_bus)(struct pci_bus *bus);
 };
 
-/* pci_unmap_{single,page} is not a nop, thus... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       \
-        dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         \
-        __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME)                  \
-        ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)         \
-        (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME)                    \
-        ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)           \
-        (((PTR)->LEN_NAME) = (VAL))
-
 /*
 ** Stuff declared in arch/parisc/kernel/pci.c
 */
diff --git a/arch/parisc/include/asm/ptrace.h b/arch/parisc/include/asm/ptrace.h
index aead40b16dd..7f09533da77 100644
--- a/arch/parisc/include/asm/ptrace.h
+++ b/arch/parisc/include/asm/ptrace.h
@@ -47,13 +47,8 @@ struct pt_regs {
 
 #define task_regs(task) ((struct pt_regs *) ((char *)(task) + TASK_REGS))
 
-struct task_struct;
 #define arch_has_single_step()  1
-void user_disable_single_step(struct task_struct *task);
-void user_enable_single_step(struct task_struct *task);
-
 #define arch_has_block_step()   1
-void user_enable_block_step(struct task_struct *task);
 
 /* XXX should we use iaoq[1] or iaoq[0] ? */
 #define user_mode(regs)                 (((regs)->iaoq[0] & 3) ? 1 : 0)
diff --git a/arch/parisc/include/asm/system.h b/arch/parisc/include/asm/system.h
index d91357bca5b..4653c77bf9d 100644
--- a/arch/parisc/include/asm/system.h
+++ b/arch/parisc/include/asm/system.h
@@ -160,7 +160,7 @@ static inline void set_eiem(unsigned long val)
    ldcd). */
 
 #define __PA_LDCW_ALIGNMENT     4
-#define __ldcw_align(a) ((volatile unsigned int *)a)
+#define __ldcw_align(a) (&(a)->slock)
 #define __LDCW  "ldcw,co"
 
 #endif /*!CONFIG_PA20*/
diff --git a/arch/parisc/include/asm/uaccess.h b/arch/parisc/include/asm/uaccess.h
index 7cf799d70b4..ff4cf9dab8d 100644
--- a/arch/parisc/include/asm/uaccess.h
+++ b/arch/parisc/include/asm/uaccess.h
@@ -7,6 +7,7 @@
 #include <asm/page.h>
 #include <asm/system.h>
 #include <asm/cache.h>
+#include <asm/errno.h>
 #include <asm-generic/uaccess-unaligned.h>
 
 #define VERIFY_READ 0
@@ -234,13 +235,35 @@ extern long lstrnlen_user(const char __user *,long);
 
 unsigned long copy_to_user(void __user *dst, const void *src, unsigned long len);
 #define __copy_to_user copy_to_user
-unsigned long copy_from_user(void *dst, const void __user *src, unsigned long len);
-#define __copy_from_user copy_from_user
+unsigned long __copy_from_user(void *dst, const void __user *src, unsigned long len);
 unsigned long copy_in_user(void __user *dst, const void __user *src, unsigned long len);
 #define __copy_in_user copy_in_user
 #define __copy_to_user_inatomic __copy_to_user
 #define __copy_from_user_inatomic __copy_from_user
 
+extern void copy_from_user_overflow(void)
+#ifdef CONFIG_DEBUG_STRICT_USER_COPY_CHECKS
+        __compiletime_error("copy_from_user() buffer size is not provably correct")
+#else
+        __compiletime_warning("copy_from_user() buffer size is not provably correct")
+#endif
+;
+
+static inline unsigned long __must_check copy_from_user(void *to,
+                                          const void __user *from,
+                                          unsigned long n)
+{
+        int sz = __compiletime_object_size(to);
+        int ret = -EFAULT;
+
+        if (likely(sz == -1 || !__builtin_constant_p(n) || sz >= n))
+                ret = __copy_from_user(to, from, n);
+        else
+                copy_from_user_overflow();
+
+        return ret;
+}
+
 struct pt_regs;
 int fixup_exception(struct pt_regs *regs);
 
diff --git a/arch/parisc/include/asm/unistd.h b/arch/parisc/include/asm/unistd.h
index cda158318c6..1ce7d2851d9 100644
--- a/arch/parisc/include/asm/unistd.h
+++ b/arch/parisc/include/asm/unistd.h
@@ -811,8 +811,10 @@
 #define __NR_pwritev            (__NR_Linux + 316)
 #define __NR_rt_tgsigqueueinfo  (__NR_Linux + 317)
 #define __NR_perf_event_open    (__NR_Linux + 318)
+#define __NR_recvmmsg           (__NR_Linux + 319)
+#define __NR_accept4            (__NR_Linux + 320)
 
-#define __NR_Linux_syscalls     (__NR_perf_event_open + 1)
+#define __NR_Linux_syscalls     (__NR_accept4 + 1)
 
 
 #define __IGNORE_select         /* newselect */
diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c
index 1054baa2fc6..d054f3da3ff 100644
--- a/arch/parisc/kernel/cache.c
+++ b/arch/parisc/kernel/cache.c
@@ -171,14 +171,14 @@ parisc_cache_init(void)
                 cache_info.ic_conf.cc_cst,
                 cache_info.ic_conf.cc_hv);
 
-        printk("D-TLB conf: sh %d page %d cst %d aid %d pad1 %d \n",
+        printk("D-TLB conf: sh %d page %d cst %d aid %d pad1 %d\n",
                 cache_info.dt_conf.tc_sh,
                 cache_info.dt_conf.tc_page,
                 cache_info.dt_conf.tc_cst,
                 cache_info.dt_conf.tc_aid,
                 cache_info.dt_conf.tc_pad1);
 
-        printk("I-TLB conf: sh %d page %d cst %d aid %d pad1 %d \n",
+        printk("I-TLB conf: sh %d page %d cst %d aid %d pad1 %d\n",
                 cache_info.it_conf.tc_sh,
                 cache_info.it_conf.tc_page,
                 cache_info.it_conf.tc_cst,
diff --git a/arch/parisc/kernel/module.c b/arch/parisc/kernel/module.c
index 212074653df..159a2b81e90 100644
--- a/arch/parisc/kernel/module.c
+++ b/arch/parisc/kernel/module.c
@@ -61,6 +61,7 @@
 #include <linux/string.h>
 #include <linux/kernel.h>
 #include <linux/bug.h>
+#include <linux/slab.h>
 
 #include <asm/unwind.h>
 
diff --git a/arch/parisc/kernel/pci-dma.c b/arch/parisc/kernel/pci-dma.c
index c07f618ff7d..a029f74a3c5 100644
--- a/arch/parisc/kernel/pci-dma.c
+++ b/arch/parisc/kernel/pci-dma.c
@@ -18,11 +18,11 @@
 */
 
 #include <linux/init.h>
+#include <linux/gfp.h>
 #include <linux/mm.h>
 #include <linux/pci.h>
 #include <linux/proc_fs.h>
 #include <linux/seq_file.h>
-#include <linux/slab.h>
 #include <linux/string.h>
 #include <linux/types.h>
 #include <linux/scatterlist.h>
diff --git a/arch/parisc/kernel/pci.c b/arch/parisc/kernel/pci.c
index 38372e7cbb8..9efd9740531 100644
--- a/arch/parisc/kernel/pci.c
+++ b/arch/parisc/kernel/pci.c
@@ -13,7 +13,6 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/pci.h>
-#include <linux/slab.h>
 #include <linux/types.h>
 
 #include <asm/io.h>
diff --git a/arch/parisc/kernel/process.c b/arch/parisc/kernel/process.c
index 1f3aa8db020..76332dadc6e 100644
--- a/arch/parisc/kernel/process.c
+++ b/arch/parisc/kernel/process.c
@@ -43,6 +43,7 @@
 #include <linux/personality.h>
 #include <linux/ptrace.h>
 #include <linux/sched.h>
+#include <linux/slab.h>
 #include <linux/stddef.h>
 #include <linux/unistd.h>
 #include <linux/kallsyms.h>
diff --git a/arch/parisc/kernel/signal32.c b/arch/parisc/kernel/signal32.c
index fb59852006d..e1413243076 100644
--- a/arch/parisc/kernel/signal32.c
+++ b/arch/parisc/kernel/signal32.c
@@ -23,7 +23,6 @@
  */
 
 #include <linux/compat.h>
-#include <linux/slab.h>
 #include <linux/module.h>
 #include <linux/unistd.h>
 #include <linux/init.h>
diff --git a/arch/parisc/kernel/smp.c b/arch/parisc/kernel/smp.c
index 3f2fce8ce6b..69d63d354ef 100644
--- a/arch/parisc/kernel/smp.c
+++ b/arch/parisc/kernel/smp.c
@@ -18,7 +18,6 @@
 */
 #include <linux/types.h>
 #include <linux/spinlock.h>
-#include <linux/slab.h>
 
 #include <linux/kernel.h>
 #include <linux/module.h>
diff --git a/arch/parisc/kernel/sys_parisc.c b/arch/parisc/kernel/sys_parisc.c
index 9147391afb0..c9b932260f4 100644
--- a/arch/parisc/kernel/sys_parisc.c
+++ b/arch/parisc/kernel/sys_parisc.c
@@ -234,18 +234,3 @@ long parisc_personality(unsigned long personality)
 
         return err;
 }
-
-long parisc_newuname(struct new_utsname __user *name)
-{
-        int err = sys_newuname(name);
-
-#ifdef CONFIG_COMPAT
-        if (!err && personality(current->personality) == PER_LINUX32) {
-                if (__put_user(0, name->machine + 6) ||
-                    __put_user(0, name->machine + 7))
-                        err = -EFAULT;
-        }
-#endif
-
-        return err;
-}
diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S
index 01c4fcf8f48..3d52c978738 100644
--- a/arch/parisc/kernel/syscall_table.S
+++ b/arch/parisc/kernel/syscall_table.S
@@ -127,7 +127,7 @@
         ENTRY_SAME(socketpair)
         ENTRY_SAME(setpgid)
         ENTRY_SAME(send)
-        ENTRY_OURS(newuname)
+        ENTRY_SAME(newuname)
         ENTRY_SAME(umask)               /* 60 */
         ENTRY_SAME(chroot)
         ENTRY_COMP(ustat)
@@ -417,6 +417,8 @@
         ENTRY_COMP(pwritev)
         ENTRY_COMP(rt_tgsigqueueinfo)
         ENTRY_SAME(perf_event_open)
+        ENTRY_COMP(recvmmsg)
+        ENTRY_SAME(accept4)             /* 320 */
 
         /* Nothing yet */
 
diff --git a/arch/parisc/kernel/time.c b/arch/parisc/kernel/time.c
index a79c6f9e7e2..05511ccb61d 100644
--- a/arch/parisc/kernel/time.c
+++ b/arch/parisc/kernel/time.c
@@ -250,9 +250,21 @@ static int __init rtc_init(void)
 }
 module_init(rtc_init);
 
-void __init time_init(void)
+void read_persistent_clock(struct timespec *ts)
 {
         static struct pdc_tod tod_data;
+        if (pdc_tod_read(&tod_data) == 0) {
+                ts->tv_sec = tod_data.tod_sec;
+                ts->tv_nsec = tod_data.tod_usec * 1000;
+        } else {
+                printk(KERN_ERR "Error reading tod clock\n");
+                ts->tv_sec = 0;
+                ts->tv_nsec = 0;
+        }
+}
+
+void __init time_init(void)
+{
         unsigned long current_cr16_khz;
 
         clocktick = (100 * PAGE0->mem_10msec) / HZ;
@@ -264,19 +276,4 @@ void __init time_init(void)
         clocksource_cr16.mult = clocksource_khz2mult(current_cr16_khz,
                                                 clocksource_cr16.shift);
         clocksource_register(&clocksource_cr16);
-
-        if (pdc_tod_read(&tod_data) == 0) {
-                unsigned long flags;
-
-                write_seqlock_irqsave(&xtime_lock, flags);
-                xtime.tv_sec = tod_data.tod_sec;
-                xtime.tv_nsec = tod_data.tod_usec * 1000;
-                set_normalized_timespec(&wall_to_monotonic,
-                                        -xtime.tv_sec, -xtime.tv_nsec);
-                write_sequnlock_irqrestore(&xtime_lock, flags);
-        } else {
-                printk(KERN_ERR "Error reading tod clock\n");
-                xtime.tv_sec = 0;
-                xtime.tv_nsec = 0;
-        }
 }
diff --git a/arch/parisc/kernel/unaligned.c b/arch/parisc/kernel/unaligned.c
index e6f4b7a4b7e..92d977bb5ea 100644
--- a/arch/parisc/kernel/unaligned.c
+++ b/arch/parisc/kernel/unaligned.c
@@ -25,6 +25,7 @@
 #include <linux/module.h>
 #include <linux/sched.h>
 #include <linux/signal.h>
+#include <linux/ratelimit.h>
 #include <asm/uaccess.h>
 
 /* #define DEBUG_UNALIGNED 1 */
@@ -446,8 +447,7 @@ static int emulate_std(struct pt_regs *regs, int frreg, int flop)
 
 void handle_unaligned(struct pt_regs *regs)
 {
-        static unsigned long unaligned_count = 0;
-        static unsigned long last_time = 0;
+        static DEFINE_RATELIMIT_STATE(ratelimit, 5 * HZ, 5);
         unsigned long newbase = R1(regs->iir)?regs->gr[R1(regs->iir)]:0;
         int modify = 0;
         int ret = ERR_NOTHANDLED;
@@ -460,14 +460,8 @@ void handle_unaligned(struct pt_regs *regs)
                         goto force_sigbus;
                 }
 
-                if (unaligned_count > 5 &&
-                                time_after(jiffies, last_time + 5 * HZ)) {
-                        unaligned_count = 0;
-                        last_time = jiffies;
-                }
-
-                if (!(current->thread.flags & PARISC_UAC_NOPRINT) 
-                    && ++unaligned_count < 5) {
+                if (!(current->thread.flags & PARISC_UAC_NOPRINT) &&
+                        __ratelimit(&ratelimit)) {
                         char buf[256];
                         sprintf(buf, "%s(%d): unaligned access to 0x" RFMT " at ip=0x" RFMT "\n",
                                 current->comm, task_pid_nr(current), regs->ior, regs->iaoq[0]);
diff --git a/arch/parisc/lib/memcpy.c b/arch/parisc/lib/memcpy.c
index abf41f4632a..1dbca5c31b3 100644
--- a/arch/parisc/lib/memcpy.c
+++ b/arch/parisc/lib/memcpy.c
@@ -475,7 +475,8 @@ unsigned long copy_to_user(void __user *dst, const void *src, unsigned long len)
         return pa_memcpy((void __force *)dst, src, len);
 }
 
-unsigned long copy_from_user(void *dst, const void __user *src, unsigned long len)
+EXPORT_SYMBOL(__copy_from_user);
+unsigned long __copy_from_user(void *dst, const void __user *src, unsigned long len)
 {
         mtsp(get_user_space(), 1);
         mtsp(get_kernel_space(), 2);
diff --git a/arch/parisc/mm/init.c b/arch/parisc/mm/init.c
index 13b6e3e59b9..f4f4d700833 100644
--- a/arch/parisc/mm/init.c
+++ b/arch/parisc/mm/init.c
@@ -14,6 +14,7 @@
 #include <linux/module.h>
 #include <linux/mm.h>
 #include <linux/bootmem.h>
+#include <linux/gfp.h>
 #include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/pci.h>          /* for hppa_dma_ops and pcxl_dma_ops */
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 155d571f5e2..2e19500921f 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -313,19 +313,6 @@ config 8XX_MINIMAL_FPEMU
 
           It is recommended that you build a soft-float userspace instead.
 
-config IOMMU_VMERGE
-        bool "Enable IOMMU virtual merging"
-        depends on PPC64
-        default y
-        help
-          Cause IO segments sent to a device for DMA to be merged virtually
-          by the IOMMU when they happen to have been allocated contiguously.
-          This doesn't add pressure to the IOMMU allocator. However, some
-          drivers don't support getting large merged segments coming back
-          from *_map_sg().
-
-          Most drivers don't have this problem; it is safe to say Y here.
-
 config IOMMU_HELPER
         def_bool PPC64
 
@@ -672,6 +659,9 @@ config ZONE_DMA
         bool
         default y
 
+config NEED_DMA_MAP_STATE
+        def_bool (PPC64 || NOT_COHERENT_CACHE)
+
 config GENERIC_ISA_DMA
         bool
         depends on PPC64 || POWER4 || 6xx && !CPM2
diff --git a/arch/powerpc/boot/dts/gef_ppc9a.dts b/arch/powerpc/boot/dts/gef_ppc9a.dts
index 977f260d5e6..83f4b79dff8 100644
--- a/arch/powerpc/boot/dts/gef_ppc9a.dts
+++ b/arch/powerpc/boot/dts/gef_ppc9a.dts
@@ -1,7 +1,7 @@
 /*
- * GE Fanuc PPC9A Device Tree Source
+ * GE PPC9A Device Tree Source
  *
- * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
diff --git a/arch/powerpc/boot/dts/gef_sbc310.dts b/arch/powerpc/boot/dts/gef_sbc310.dts
index 8e4efff3bda..fc3a331dd39 100644
--- a/arch/powerpc/boot/dts/gef_sbc310.dts
+++ b/arch/powerpc/boot/dts/gef_sbc310.dts
@@ -1,7 +1,7 @@
 /*
- * GE Fanuc SBC310 Device Tree Source
+ * GE SBC310 Device Tree Source
  *
- * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
diff --git a/arch/powerpc/boot/dts/gef_sbc610.dts b/arch/powerpc/boot/dts/gef_sbc610.dts
index bb7060078fb..c0671cc9812 100644
--- a/arch/powerpc/boot/dts/gef_sbc610.dts
+++ b/arch/powerpc/boot/dts/gef_sbc610.dts
@@ -1,7 +1,7 @@
 /*
- * GE Fanuc SBC610 Device Tree Source
+ * GE SBC610 Device Tree Source
  *
- * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
diff --git a/arch/powerpc/boot/dts/kmeter1.dts b/arch/powerpc/boot/dts/kmeter1.dts
index 65b8b4f27ef..d8b5d12fb66 100644
--- a/arch/powerpc/boot/dts/kmeter1.dts
+++ b/arch/powerpc/boot/dts/kmeter1.dts
@@ -490,7 +490,7 @@
                         compatible = "cfi-flash";
                         /*
                          * The Intel P30 chip has 2 non-identical chips on
-                         * one die, so we need to define 2 seperate regions
+                         * one die, so we need to define 2 separate regions
                          * that are scanned by physmap_of independantly.
                          */
                         reg = <0 0x00000000 0x02000000
diff --git a/arch/powerpc/configs/52xx/cm5200_defconfig b/arch/powerpc/configs/52xx/cm5200_defconfig
index ff9bdb28197..218d49b36a0 100644
--- a/arch/powerpc/configs/52xx/cm5200_defconfig
+++ b/arch/powerpc/configs/52xx/cm5200_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc2
-# Wed Dec 30 14:45:07 2009
+# Linux kernel version: 2.6.34-rc1
+# Wed Mar 10 14:34:22 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -94,11 +94,6 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -109,6 +104,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -340,7 +336,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=y
@@ -517,6 +512,8 @@ CONFIG_MTD_PHYSMAP_OF=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_MDIO=y
@@ -684,6 +681,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_SERIAL_MPC52xx=y
 CONFIG_SERIAL_MPC52xx_CONSOLE=y
 CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD=57600
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -714,6 +712,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -754,6 +753,7 @@ CONFIG_WATCHDOG=y
 # Watchdog Device Drivers
 #
 # CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_MAX63XX_WATCHDOG is not set
 # CONFIG_MPC5200_WDT is not set
 
 #
@@ -771,18 +771,20 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -813,7 +815,6 @@ CONFIG_USB=y
 CONFIG_USB_DEVICEFS=y
 # CONFIG_USB_DEVICE_CLASS is not set
 # CONFIG_USB_DYNAMIC_MINORS is not set
-# CONFIG_USB_SUSPEND is not set
 # CONFIG_USB_OTG is not set
 # CONFIG_USB_OTG_WHITELIST is not set
 # CONFIG_USB_OTG_BLACKLIST_HUB is not set
@@ -891,7 +892,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -903,7 +903,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1009,6 +1008,7 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=y
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
diff --git a/arch/powerpc/configs/52xx/lite5200b_defconfig b/arch/powerpc/configs/52xx/lite5200b_defconfig
index 7b3f4d0ed40..90492ff2523 100644
--- a/arch/powerpc/configs/52xx/lite5200b_defconfig
+++ b/arch/powerpc/configs/52xx/lite5200b_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc2
-# Wed Dec 30 14:45:09 2009
+# Linux kernel version: 2.6.34-rc1
+# Wed Mar 10 14:34:24 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -95,11 +95,6 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -110,6 +105,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -317,6 +313,7 @@ CONFIG_SUSPEND=y
 CONFIG_SUSPEND_FREEZER=y
 # CONFIG_HIBERNATION is not set
 # CONFIG_PM_RUNTIME is not set
+CONFIG_PM_OPS=y
 CONFIG_SECCOMP=y
 CONFIG_ISA_DMA_API=y
 
@@ -333,7 +330,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-CONFIG_PCI_LEGACY=y
 # CONFIG_PCI_DEBUG is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
@@ -360,7 +356,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=m
@@ -457,6 +452,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 # CONFIG_MTD is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_MDIO=y
@@ -631,6 +628,7 @@ CONFIG_ATA_SFF=y
 # CONFIG_PATA_IT821X is not set
 # CONFIG_PATA_IT8213 is not set
 # CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_LEGACY is not set
 # CONFIG_PATA_TRIFLEX is not set
 # CONFIG_PATA_MARVELL is not set
 CONFIG_PATA_MPC52xx=y
@@ -668,7 +666,7 @@ CONFIG_PATA_MPC52xx=y
 #
 
 #
-# See the help texts for more information.
+# The newer stack is recommended.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
@@ -768,6 +766,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -828,6 +827,7 @@ CONFIG_SERIAL_MPC52xx=y
 CONFIG_SERIAL_MPC52xx_CONSOLE=y
 CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD=115200
 # CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -879,6 +879,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -924,18 +925,21 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -944,6 +948,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -1062,6 +1067,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
diff --git a/arch/powerpc/configs/52xx/motionpro_defconfig b/arch/powerpc/configs/52xx/motionpro_defconfig
index eaae2d469aa..dffc8cac825 100644
--- a/arch/powerpc/configs/52xx/motionpro_defconfig
+++ b/arch/powerpc/configs/52xx/motionpro_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc2
-# Wed Dec 30 14:45:08 2009
+# Linux kernel version: 2.6.34-rc1
+# Wed Mar 10 14:34:23 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -94,11 +94,6 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -109,6 +104,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -341,7 +337,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=y
@@ -518,6 +513,8 @@ CONFIG_MTD_ROM=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_MDIO=y
@@ -699,6 +696,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_SERIAL_MPC52xx=y
 CONFIG_SERIAL_MPC52xx_CONSOLE=y
 CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD=115200
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -728,6 +726,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -773,10 +772,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_F71805F is not set
@@ -811,6 +811,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -831,6 +832,7 @@ CONFIG_WATCHDOG=y
 # Watchdog Device Drivers
 #
 # CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_MAX63XX_WATCHDOG is not set
 # CONFIG_MPC5200_WDT is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -843,18 +845,20 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1050,6 +1054,7 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=y
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
diff --git a/arch/powerpc/configs/52xx/pcm030_defconfig b/arch/powerpc/configs/52xx/pcm030_defconfig
index 1742c0200b7..3cb2a522046 100644
--- a/arch/powerpc/configs/52xx/pcm030_defconfig
+++ b/arch/powerpc/configs/52xx/pcm030_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc2
-# Wed Dec 30 14:45:10 2009
+# Linux kernel version: 2.6.34-rc1
+# Wed Mar 10 14:34:25 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -97,11 +97,6 @@ CONFIG_RCU_FANOUT=32
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -326,7 +321,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-CONFIG_PCI_LEGACY=y
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_PCCARD is not set
@@ -352,7 +346,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
@@ -525,6 +518,8 @@ CONFIG_MTD_PHYSMAP=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_MDIO=y
@@ -610,6 +605,7 @@ CONFIG_ATA_SFF=y
 # CONFIG_PATA_IT821X is not set
 # CONFIG_PATA_IT8213 is not set
 # CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_LEGACY is not set
 # CONFIG_PATA_TRIFLEX is not set
 # CONFIG_PATA_MARVELL is not set
 CONFIG_PATA_MPC52xx=m
@@ -647,7 +643,7 @@ CONFIG_PATA_MPC52xx=m
 #
 
 #
-# See the help texts for more information.
+# The newer stack is recommended.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
@@ -775,6 +771,7 @@ CONFIG_SERIAL_MPC52xx=y
 CONFIG_SERIAL_MPC52xx_CONSOLE=y
 CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD=9600
 # CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -824,6 +821,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -870,18 +868,21 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -890,6 +891,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -997,7 +999,6 @@ CONFIG_USB_STORAGE=m
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1009,7 +1010,6 @@ CONFIG_USB_STORAGE=m
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1172,6 +1172,7 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
diff --git a/arch/powerpc/configs/52xx/tqm5200_defconfig b/arch/powerpc/configs/52xx/tqm5200_defconfig
index 3972438db71..96181c62abf 100644
--- a/arch/powerpc/configs/52xx/tqm5200_defconfig
+++ b/arch/powerpc/configs/52xx/tqm5200_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc2
-# Wed Dec 30 14:45:09 2009
+# Linux kernel version: 2.6.34-rc1
+# Wed Mar 10 14:34:24 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -94,11 +94,6 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -109,6 +104,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -346,7 +342,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=y
@@ -524,6 +519,8 @@ CONFIG_MTD_PHYSMAP_OF=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_MDIO=y
@@ -704,6 +701,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_SERIAL_MPC52xx=y
 CONFIG_SERIAL_MPC52xx_CONSOLE=y
 CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD=115200
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -733,6 +731,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -780,10 +779,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_F71805F is not set
@@ -818,6 +818,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -838,6 +839,7 @@ CONFIG_WATCHDOG=y
 # Watchdog Device Drivers
 #
 # CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_MAX63XX_WATCHDOG is not set
 # CONFIG_MPC5200_WDT is not set
 
 #
@@ -855,18 +857,20 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -897,7 +901,6 @@ CONFIG_USB=y
 CONFIG_USB_DEVICEFS=y
 # CONFIG_USB_DEVICE_CLASS is not set
 # CONFIG_USB_DYNAMIC_MINORS is not set
-# CONFIG_USB_SUSPEND is not set
 # CONFIG_USB_OTG is not set
 # CONFIG_USB_OTG_WHITELIST is not set
 # CONFIG_USB_OTG_BLACKLIST_HUB is not set
@@ -975,7 +978,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -987,7 +989,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1151,6 +1152,7 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=y
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
diff --git a/arch/powerpc/configs/83xx/asp8347_defconfig b/arch/powerpc/configs/83xx/asp8347_defconfig
index baa2bbb6c09..04f16268e1c 100644
--- a/arch/powerpc/configs/83xx/asp8347_defconfig
+++ b/arch/powerpc/configs/83xx/asp8347_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:14 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:38 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -97,14 +97,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -112,6 +106,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -124,7 +119,7 @@ CONFIG_BUG=y
 CONFIG_ELF_CORE=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
+CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
@@ -325,6 +320,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -336,7 +332,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_PCCARD is not set
@@ -362,7 +357,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=m
@@ -543,6 +537,8 @@ CONFIG_MTD_PHYSMAP_OF=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_MDIO=y
@@ -579,6 +575,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -596,6 +593,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -788,6 +786,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -836,6 +835,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -849,15 +849,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -883,10 +877,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -923,6 +918,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -971,18 +967,21 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -991,6 +990,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -1083,7 +1083,6 @@ CONFIG_USB_EHCI_HCD_PPC_OF=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1096,7 +1095,6 @@ CONFIG_USB_EHCI_HCD_PPC_OF=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1259,6 +1257,7 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1285,6 +1284,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/83xx/kmeter1_defconfig b/arch/powerpc/configs/83xx/kmeter1_defconfig
index 8b1aa806e54..1843ee11823 100644
--- a/arch/powerpc/configs/83xx/kmeter1_defconfig
+++ b/arch/powerpc/configs/83xx/kmeter1_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:14 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:39 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -98,7 +98,6 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_GROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 # CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
@@ -318,6 +317,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_FSL_SOC=y
 CONFIG_PPC_PCI_CHOICE=y
@@ -346,7 +346,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
@@ -387,6 +386,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_ATM is not set
 CONFIG_STP=m
 CONFIG_BRIDGE=m
+CONFIG_BRIDGE_IGMP_SNOOPING=y
 # CONFIG_NET_DSA is not set
 CONFIG_VLAN_8021Q=y
 # CONFIG_VLAN_8021Q_GVRP is not set
@@ -539,6 +539,8 @@ CONFIG_MTD_UBI_DEBUG=y
 # CONFIG_MTD_UBI_DEBUG_MSG_EBA is not set
 # CONFIG_MTD_UBI_DEBUG_MSG_WL is not set
 # CONFIG_MTD_UBI_DEBUG_MSG_IO is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_MDIO=y
@@ -563,6 +565,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -690,6 +693,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_OF_PLATFORM is not set
 # CONFIG_SERIAL_QE is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -720,6 +724,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -732,15 +737,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -765,18 +764,20 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -805,8 +806,6 @@ CONFIG_SSB_POSSIBLE=y
 CONFIG_UIO=y
 # CONFIG_UIO_PDRV is not set
 # CONFIG_UIO_PDRV_GENIRQ is not set
-# CONFIG_UIO_SMX is not set
-# CONFIG_UIO_SERCOS3 is not set
 
 #
 # TI VLYNQ
@@ -887,6 +886,7 @@ CONFIG_JFFS2_ZLIB=y
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
 # CONFIG_UBIFS_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -911,6 +911,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
@@ -976,6 +977,7 @@ CONFIG_DEBUG_FS=y
 CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LKDTM is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_HAVE_FUNCTION_TRACER=y
diff --git a/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig b/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig
index 2f2d98558e4..78ae3bf1e9c 100644
--- a/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig
+++ b/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:15 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:40 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -96,14 +96,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -111,6 +105,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -123,7 +118,7 @@ CONFIG_BUG=y
 CONFIG_ELF_CORE=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
+CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
@@ -324,6 +319,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -335,7 +331,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_DEBUG is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
@@ -362,7 +357,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -556,6 +550,8 @@ CONFIG_MTD_NAND_FSL_ELBC=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_SPI=y
@@ -593,6 +589,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_TI_DAC7512 is not set
 # CONFIG_C2PORT is not set
@@ -612,6 +609,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -772,6 +770,7 @@ CONFIG_NET_PCI=y
 # CONFIG_PCNET32 is not set
 # CONFIG_AMD8111_ETH is not set
 # CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_KSZ884X_PCI is not set
 # CONFIG_B44 is not set
 # CONFIG_FORCEDETH is not set
 CONFIG_E100=y
@@ -824,6 +823,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -836,6 +837,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -931,6 +933,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -980,6 +983,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -993,15 +997,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 CONFIG_SPI=y
 # CONFIG_SPI_DEBUG is not set
 CONFIG_SPI_MASTER=y
@@ -1044,10 +1042,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -1086,6 +1085,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1134,21 +1134,24 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_MFD_MC13783 is not set
 # CONFIG_AB3100_CORE is not set
 # CONFIG_EZX_PCAP is not set
-# CONFIG_MFD_88PM8607 is not set
 # CONFIG_AB4500_CORE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1157,6 +1160,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -1289,7 +1293,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1302,7 +1305,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 CONFIG_USB_GADGET=y
 # CONFIG_USB_GADGET_DEBUG is not set
 # CONFIG_USB_GADGET_DEBUG_FILES is not set
@@ -1341,6 +1343,7 @@ CONFIG_USB_ETH_RNDIS=y
 # CONFIG_USB_MIDI_GADGET is not set
 # CONFIG_USB_G_PRINTER is not set
 # CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_USB_G_NOKIA is not set
 # CONFIG_USB_G_MULTI is not set
 
 #
@@ -1511,6 +1514,7 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1537,6 +1541,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig b/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig
index 633e6119460..cccb71393ac 100644
--- a/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig
+++ b/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:16 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:40 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -96,14 +96,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -111,6 +105,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -123,7 +118,7 @@ CONFIG_BUG=y
 CONFIG_ELF_CORE=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
+CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
@@ -324,6 +319,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -335,7 +331,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_DEBUG is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
@@ -362,7 +357,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -556,6 +550,8 @@ CONFIG_MTD_NAND_IDS=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_SPI=y
@@ -593,6 +589,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_TI_DAC7512 is not set
 # CONFIG_C2PORT is not set
@@ -612,6 +609,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -735,6 +733,7 @@ CONFIG_ATA_SFF=y
 # CONFIG_PATA_IT821X is not set
 # CONFIG_PATA_IT8213 is not set
 # CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_LEGACY is not set
 # CONFIG_PATA_TRIFLEX is not set
 # CONFIG_PATA_MARVELL is not set
 # CONFIG_PATA_MPIIX is not set
@@ -837,6 +836,7 @@ CONFIG_NET_PCI=y
 # CONFIG_PCNET32 is not set
 # CONFIG_AMD8111_ETH is not set
 # CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_KSZ884X_PCI is not set
 # CONFIG_B44 is not set
 # CONFIG_FORCEDETH is not set
 CONFIG_E100=y
@@ -889,6 +889,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -901,6 +903,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -996,6 +999,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -1045,6 +1049,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -1058,15 +1063,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 CONFIG_SPI=y
 # CONFIG_SPI_DEBUG is not set
 CONFIG_SPI_MASTER=y
@@ -1109,10 +1108,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -1151,6 +1151,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1199,21 +1200,24 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_MFD_MC13783 is not set
 # CONFIG_AB3100_CORE is not set
 # CONFIG_EZX_PCAP is not set
-# CONFIG_MFD_88PM8607 is not set
 # CONFIG_AB4500_CORE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1222,6 +1226,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -1354,7 +1359,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1367,7 +1371,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 CONFIG_USB_GADGET=y
 # CONFIG_USB_GADGET_DEBUG is not set
 # CONFIG_USB_GADGET_DEBUG_FILES is not set
@@ -1406,6 +1409,7 @@ CONFIG_USB_ETH_RNDIS=y
 # CONFIG_USB_MIDI_GADGET is not set
 # CONFIG_USB_G_PRINTER is not set
 # CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_USB_G_NOKIA is not set
 # CONFIG_USB_G_MULTI is not set
 
 #
@@ -1576,6 +1580,7 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1602,6 +1607,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/83xx/mpc832x_mds_defconfig b/arch/powerpc/configs/83xx/mpc832x_mds_defconfig
index 0b4262bd491..74cb27aa9d1 100644
--- a/arch/powerpc/configs/83xx/mpc832x_mds_defconfig
+++ b/arch/powerpc/configs/83xx/mpc832x_mds_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:17 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:41 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -96,14 +96,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -111,6 +105,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -123,7 +118,7 @@ CONFIG_BUG=y
 CONFIG_ELF_CORE=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
+CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
@@ -325,6 +320,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -336,7 +332,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_PCCARD is not set
@@ -362,7 +357,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -457,6 +451,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 # CONFIG_MTD is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_MDIO=y
@@ -492,6 +488,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -509,6 +506,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -693,6 +691,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -705,6 +705,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -790,6 +791,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
 # CONFIG_SERIAL_QE is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -839,6 +841,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -851,15 +854,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -885,10 +882,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -925,6 +923,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -967,18 +966,21 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -987,6 +989,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -1171,6 +1174,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1197,6 +1201,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig b/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig
index 155af009f7b..10412a9c7f9 100644
--- a/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig
+++ b/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:18 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:42 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -96,14 +96,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -111,6 +105,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -123,7 +118,7 @@ CONFIG_BUG=y
 CONFIG_ELF_CORE=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
+CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
@@ -325,6 +320,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -336,7 +332,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_PCCARD is not set
@@ -362,7 +357,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -457,6 +451,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 # CONFIG_MTD is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_SPI=y
@@ -494,6 +490,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_TI_DAC7512 is not set
 # CONFIG_C2PORT is not set
@@ -514,6 +511,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -700,6 +698,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -712,6 +712,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -808,6 +809,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
 # CONFIG_SERIAL_QE is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -859,6 +861,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -872,15 +875,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 CONFIG_SPI=y
 CONFIG_SPI_MASTER=y
 
@@ -922,10 +919,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -964,6 +962,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1012,21 +1011,24 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_MFD_MC13783 is not set
 # CONFIG_AB3100_CORE is not set
 # CONFIG_EZX_PCAP is not set
-# CONFIG_MFD_88PM8607 is not set
 # CONFIG_AB4500_CORE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1035,6 +1037,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -1166,7 +1169,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1179,7 +1181,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1204,8 +1205,6 @@ CONFIG_MMC_BLOCK_BOUNCE=y
 #
 # CONFIG_MMC_SDHCI is not set
 # CONFIG_MMC_WBSD is not set
-# CONFIG_MMC_AT91 is not set
-# CONFIG_MMC_ATMELMCI is not set
 # CONFIG_MMC_TIFM_SD is not set
 CONFIG_MMC_SPI=y
 # CONFIG_MMC_CB710 is not set
@@ -1298,6 +1297,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1324,6 +1324,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/83xx/mpc834x_itx_defconfig b/arch/powerpc/configs/83xx/mpc834x_itx_defconfig
index ff45f490448..7b31fc3f354 100644
--- a/arch/powerpc/configs/83xx/mpc834x_itx_defconfig
+++ b/arch/powerpc/configs/83xx/mpc834x_itx_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:19 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:43 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -96,14 +96,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -111,6 +105,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -123,7 +118,7 @@ CONFIG_BUG=y
 CONFIG_ELF_CORE=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
+CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
@@ -324,6 +319,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -335,7 +331,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_PCCARD is not set
@@ -361,7 +356,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -540,6 +534,8 @@ CONFIG_MTD_PHYSMAP=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_SPI=y
@@ -577,6 +573,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_TI_DAC7512 is not set
 # CONFIG_C2PORT is not set
@@ -644,6 +641,7 @@ CONFIG_IDE_PROC_FS=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -767,6 +765,7 @@ CONFIG_SATA_SIL=y
 # CONFIG_PATA_IT821X is not set
 # CONFIG_PATA_IT8213 is not set
 # CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_LEGACY is not set
 # CONFIG_PATA_TRIFLEX is not set
 # CONFIG_PATA_MARVELL is not set
 # CONFIG_PATA_MPIIX is not set
@@ -880,6 +879,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -892,6 +893,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -966,6 +968,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -1015,6 +1018,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -1028,15 +1032,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 CONFIG_SPI=y
 CONFIG_SPI_MASTER=y
 
@@ -1095,21 +1093,24 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_MFD_MC13783 is not set
 # CONFIG_AB3100_CORE is not set
 # CONFIG_EZX_PCAP is not set
-# CONFIG_MFD_88PM8607 is not set
 # CONFIG_AB4500_CORE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1118,6 +1119,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -1222,7 +1224,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1235,7 +1236,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1399,6 +1399,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS2_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1425,6 +1426,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig b/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig
index 28d8ff3e8fc..41401a9b355 100644
--- a/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig
+++ b/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:20 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:44 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -96,14 +96,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -111,6 +105,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -123,7 +118,7 @@ CONFIG_BUG=y
 CONFIG_ELF_CORE=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
+CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
@@ -324,6 +319,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -335,7 +331,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_PCCARD is not set
@@ -361,7 +356,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -540,6 +534,8 @@ CONFIG_MTD_PHYSMAP=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_SPI=y
@@ -577,6 +573,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_TI_DAC7512 is not set
 # CONFIG_C2PORT is not set
@@ -596,6 +593,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -756,6 +754,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -768,6 +768,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -842,6 +843,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -891,6 +893,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -904,15 +907,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 CONFIG_SPI=y
 CONFIG_SPI_MASTER=y
 
@@ -971,21 +968,24 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_MFD_MC13783 is not set
 # CONFIG_AB3100_CORE is not set
 # CONFIG_EZX_PCAP is not set
-# CONFIG_MFD_88PM8607 is not set
 # CONFIG_AB4500_CORE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -994,6 +994,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -1098,7 +1099,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1111,7 +1111,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1275,6 +1274,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS2_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1301,6 +1301,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/83xx/mpc834x_mds_defconfig b/arch/powerpc/configs/83xx/mpc834x_mds_defconfig
index 6252ab5bf18..dc176b676dc 100644
--- a/arch/powerpc/configs/83xx/mpc834x_mds_defconfig
+++ b/arch/powerpc/configs/83xx/mpc834x_mds_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:21 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:45 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -96,14 +96,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -111,6 +105,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -123,7 +118,7 @@ CONFIG_BUG=y
 CONFIG_ELF_CORE=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
+CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
@@ -324,6 +319,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -335,7 +331,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_PCCARD is not set
@@ -361,7 +356,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=m
@@ -456,6 +450,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 # CONFIG_MTD is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_MDIO=y
@@ -491,6 +487,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -508,6 +505,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -580,6 +578,7 @@ CONFIG_NET_PCI=y
 # CONFIG_PCNET32 is not set
 # CONFIG_AMD8111_ETH is not set
 # CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_KSZ884X_PCI is not set
 # CONFIG_B44 is not set
 # CONFIG_FORCEDETH is not set
 CONFIG_E100=y
@@ -631,6 +630,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -643,6 +644,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -726,6 +728,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -774,6 +777,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -786,15 +790,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -820,10 +818,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -860,6 +859,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -902,18 +902,21 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -922,6 +925,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -1106,6 +1110,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1132,6 +1137,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/83xx/mpc836x_mds_defconfig b/arch/powerpc/configs/83xx/mpc836x_mds_defconfig
index 78227378e67..f512972c717 100644
--- a/arch/powerpc/configs/83xx/mpc836x_mds_defconfig
+++ b/arch/powerpc/configs/83xx/mpc836x_mds_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:21 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:46 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -96,14 +96,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -111,6 +105,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -123,7 +118,7 @@ CONFIG_BUG=y
 CONFIG_ELF_CORE=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
+CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
@@ -323,6 +318,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -334,7 +330,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_PCCARD is not set
@@ -360,7 +355,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -538,6 +532,8 @@ CONFIG_MTD_PHYSMAP_OF=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_MDIO=y
@@ -573,6 +569,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -590,6 +587,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -774,6 +772,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -786,6 +786,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -871,6 +872,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
 # CONFIG_SERIAL_QE is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -920,6 +922,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -932,15 +935,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -966,10 +963,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -1006,6 +1004,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1048,18 +1047,21 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1068,6 +1070,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -1253,6 +1256,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS2_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1279,6 +1283,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig b/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig
index 9451d6e5c80..77abfe8ff19 100644
--- a/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig
+++ b/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:23 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:47 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -97,14 +97,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -112,6 +106,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -124,7 +119,7 @@ CONFIG_BUG=y
 CONFIG_ELF_CORE=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
+CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
@@ -323,6 +318,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -336,7 +332,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_PCCARD is not set
@@ -362,7 +357,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -550,6 +544,8 @@ CONFIG_MTD_PHYSMAP_OF=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_I2C=y
@@ -587,6 +583,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_TI_DAC7512 is not set
 # CONFIG_C2PORT is not set
@@ -606,6 +603,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -774,6 +772,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
 CONFIG_SERIAL_QE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -825,6 +824,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -837,15 +837,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 CONFIG_SPI=y
 CONFIG_SPI_MASTER=y
 
@@ -876,14 +870,18 @@ CONFIG_GPIOLIB=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 # CONFIG_GPIO_XILINX is not set
+# CONFIG_GPIO_SCH is not set
 
 #
 # I2C GPIO expanders:
 #
+# CONFIG_GPIO_MAX7300 is not set
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -932,22 +930,27 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
 # CONFIG_TPS65010 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_MFD_MC13783 is not set
 # CONFIG_AB3100_CORE is not set
 # CONFIG_EZX_PCAP is not set
-# CONFIG_MFD_88PM8607 is not set
 # CONFIG_AB4500_CORE is not set
+# CONFIG_MFD_TIMBERDALE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -956,6 +959,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1145,6 +1149,7 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1171,6 +1176,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/83xx/mpc837x_mds_defconfig b/arch/powerpc/configs/83xx/mpc837x_mds_defconfig
index f67b70d0b29..0cdb41418d5 100644
--- a/arch/powerpc/configs/83xx/mpc837x_mds_defconfig
+++ b/arch/powerpc/configs/83xx/mpc837x_mds_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:22 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:47 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -96,14 +96,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -111,6 +105,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -124,7 +119,7 @@ CONFIG_BUG=y
 CONFIG_ELF_CORE=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
+CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
@@ -324,6 +319,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -335,7 +331,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_PCCARD is not set
@@ -361,7 +356,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=m
@@ -456,6 +450,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 # CONFIG_MTD is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_MDIO=y
@@ -491,6 +487,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -508,6 +505,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -631,6 +629,7 @@ CONFIG_ATA_SFF=y
 # CONFIG_PATA_IT821X is not set
 # CONFIG_PATA_IT8213 is not set
 # CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_LEGACY is not set
 # CONFIG_PATA_TRIFLEX is not set
 # CONFIG_PATA_MARVELL is not set
 # CONFIG_PATA_MPIIX is not set
@@ -755,6 +754,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -767,6 +768,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -851,6 +853,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -901,6 +904,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -913,15 +917,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -947,10 +945,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -987,6 +986,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1029,18 +1029,21 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1049,6 +1052,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -1175,6 +1179,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1201,6 +1206,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig b/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig
index a84fd1194e2..e69ed1b6142 100644
--- a/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig
+++ b/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:24 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:48 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -96,14 +96,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -111,6 +105,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -124,7 +119,7 @@ CONFIG_BUG=y
 CONFIG_ELF_CORE=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
+CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
@@ -324,6 +319,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -335,7 +331,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_PCCARD is not set
@@ -361,7 +356,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
@@ -451,6 +445,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 # CONFIG_MTD is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_MDIO=y
@@ -487,6 +483,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -504,6 +501,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -626,6 +624,7 @@ CONFIG_ATA_SFF=y
 # CONFIG_PATA_IT821X is not set
 # CONFIG_PATA_IT8213 is not set
 # CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_LEGACY is not set
 # CONFIG_PATA_TRIFLEX is not set
 # CONFIG_PATA_MARVELL is not set
 # CONFIG_PATA_MPIIX is not set
@@ -850,6 +849,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -900,6 +900,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -913,15 +914,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -947,10 +942,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -987,6 +983,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1034,18 +1031,21 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1054,6 +1054,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -1079,6 +1080,7 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
+# CONFIG_HID_3M_PCT is not set
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
@@ -1094,14 +1096,19 @@ CONFIG_HID_GYRATION=y
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
+# CONFIG_LOGIG940_FF is not set
 CONFIG_HID_MICROSOFT=y
+# CONFIG_HID_MOSART is not set
 CONFIG_HID_MONTEREY=y
 # CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
 CONFIG_HID_PANTHERLORD=y
 # CONFIG_PANTHERLORD_FF is not set
 CONFIG_HID_PETALYNX=y
+# CONFIG_HID_QUANTA is not set
 CONFIG_HID_SAMSUNG=y
 CONFIG_HID_SONY=y
+# CONFIG_HID_STANTUM is not set
 CONFIG_HID_SUNPLUS=y
 # CONFIG_HID_GREENASIA is not set
 # CONFIG_HID_SMARTJOYPLUS is not set
@@ -1190,7 +1197,6 @@ CONFIG_USB_EHCI_HCD_PPC_OF=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1203,7 +1209,6 @@ CONFIG_USB_EHCI_HCD_PPC_OF=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1297,6 +1302,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1323,6 +1329,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/83xx/sbc834x_defconfig b/arch/powerpc/configs/83xx/sbc834x_defconfig
index 72c2067137b..56e3995d898 100644
--- a/arch/powerpc/configs/83xx/sbc834x_defconfig
+++ b/arch/powerpc/configs/83xx/sbc834x_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:25 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:49 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -96,14 +96,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -111,6 +105,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -123,7 +118,7 @@ CONFIG_BUG=y
 CONFIG_ELF_CORE=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
+CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
@@ -322,6 +317,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -333,7 +329,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_PCCARD is not set
@@ -359,7 +354,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=m
@@ -537,6 +531,8 @@ CONFIG_MTD_PHYSMAP_OF=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_MDIO=y
@@ -573,6 +569,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -590,6 +587,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -812,6 +810,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -862,6 +861,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -875,15 +875,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -909,10 +903,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -949,6 +944,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -996,18 +992,21 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1016,6 +1015,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1140,7 +1140,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1153,7 +1152,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1245,6 +1243,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS2_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1271,6 +1270,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/85xx/ksi8560_defconfig b/arch/powerpc/configs/85xx/ksi8560_defconfig
index 21dad38b156..f67a8d1cd0b 100644
--- a/arch/powerpc/configs/85xx/ksi8560_defconfig
+++ b/arch/powerpc/configs/85xx/ksi8560_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:26 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:50 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -68,6 +68,10 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
 # CONFIG_PPC_DCR_NATIVE is not set
 # CONFIG_PPC_DCR_MMIO is not set
 CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_PPC_ADV_DEBUG_REGS=y
+CONFIG_PPC_ADV_DEBUG_IACS=2
+CONFIG_PPC_ADV_DEBUG_DACS=2
+CONFIG_PPC_ADV_DEBUG_DVCS=0
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 CONFIG_CONSTRUCTORS=y
 
@@ -99,10 +103,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_GROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -110,6 +112,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -315,6 +318,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_FSL_SOC=y
 CONFIG_PPC_PCI_CHOICE=y
 # CONFIG_PCI is not set
@@ -345,7 +349,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -522,6 +525,8 @@ CONFIG_MTD_PHYSMAP_OF=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_MDIO=y
@@ -575,6 +580,7 @@ CONFIG_IDE_PROC_FS=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -701,6 +707,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_SERIAL_CPM=y
 CONFIG_SERIAL_CPM_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -732,6 +739,7 @@ CONFIG_GPIOLIB=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 # CONFIG_GPIO_XILINX is not set
 
 #
@@ -915,6 +923,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS2_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -937,6 +946,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
@@ -1036,6 +1046,7 @@ CONFIG_DEBUG_MUTEXES=y
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_LKDTM is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
diff --git a/arch/powerpc/configs/85xx/mpc8540_ads_defconfig b/arch/powerpc/configs/85xx/mpc8540_ads_defconfig
index 5db54cd274c..61b122a25cd 100644
--- a/arch/powerpc/configs/85xx/mpc8540_ads_defconfig
+++ b/arch/powerpc/configs/85xx/mpc8540_ads_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:27 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:51 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -67,6 +67,10 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
 # CONFIG_PPC_DCR_NATIVE is not set
 # CONFIG_PPC_DCR_MMIO is not set
 CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_PPC_ADV_DEBUG_REGS=y
+CONFIG_PPC_ADV_DEBUG_IACS=2
+CONFIG_PPC_ADV_DEBUG_DACS=2
+CONFIG_PPC_ADV_DEBUG_DVCS=0
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 CONFIG_CONSTRUCTORS=y
 
@@ -98,14 +102,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -113,6 +111,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -316,6 +315,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_FSL_SOC=y
 CONFIG_PPC_PCI_CHOICE=y
 # CONFIG_PCI is not set
@@ -346,7 +346,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=y
@@ -443,6 +442,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 # CONFIG_MTD is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_MDIO=y
 # CONFIG_PARPORT is not set
@@ -477,6 +478,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -602,6 +604,7 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -788,6 +791,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -810,6 +814,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/85xx/mpc8560_ads_defconfig b/arch/powerpc/configs/85xx/mpc8560_ads_defconfig
index 76c7018c5cd..a5ceaa4b5e4 100644
--- a/arch/powerpc/configs/85xx/mpc8560_ads_defconfig
+++ b/arch/powerpc/configs/85xx/mpc8560_ads_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:28 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:52 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -68,6 +68,10 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
 # CONFIG_PPC_DCR_NATIVE is not set
 # CONFIG_PPC_DCR_MMIO is not set
 CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_PPC_ADV_DEBUG_REGS=y
+CONFIG_PPC_ADV_DEBUG_IACS=2
+CONFIG_PPC_ADV_DEBUG_DACS=2
+CONFIG_PPC_ADV_DEBUG_DVCS=0
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 CONFIG_CONSTRUCTORS=y
 
@@ -99,14 +103,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -114,6 +112,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -319,6 +318,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
 CONFIG_FSL_PCI=y
@@ -329,7 +329,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 CONFIG_PCI_DEBUG=y
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
@@ -358,7 +357,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -455,6 +453,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 # CONFIG_MTD is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_MDIO=y
@@ -500,6 +500,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -609,6 +610,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -621,6 +624,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -700,6 +704,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_SERIAL_CPM=y
 CONFIG_SERIAL_CPM_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -733,7 +738,9 @@ CONFIG_GPIOLIB=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 # CONFIG_GPIO_XILINX is not set
+# CONFIG_GPIO_SCH is not set
 
 #
 # I2C GPIO expanders:
@@ -793,6 +800,8 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_TIMBERDALE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -801,6 +810,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=y
@@ -927,6 +937,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -949,6 +960,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/85xx/mpc85xx_cds_defconfig b/arch/powerpc/configs/85xx/mpc85xx_cds_defconfig
index fab8adacbf7..4adb4eba2d4 100644
--- a/arch/powerpc/configs/85xx/mpc85xx_cds_defconfig
+++ b/arch/powerpc/configs/85xx/mpc85xx_cds_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:29 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:53 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -67,6 +67,10 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
 # CONFIG_PPC_DCR_NATIVE is not set
 # CONFIG_PPC_DCR_MMIO is not set
 CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_PPC_ADV_DEBUG_REGS=y
+CONFIG_PPC_ADV_DEBUG_IACS=2
+CONFIG_PPC_ADV_DEBUG_DACS=2
+CONFIG_PPC_ADV_DEBUG_DVCS=0
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 CONFIG_CONSTRUCTORS=y
 
@@ -98,14 +102,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -113,6 +111,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -317,6 +316,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
 CONFIG_FSL_PCI=y
@@ -327,7 +327,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_DEBUG is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
@@ -356,7 +355,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=y
@@ -453,6 +451,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 # CONFIG_MTD is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_MDIO=y
 # CONFIG_PARPORT is not set
@@ -552,6 +552,7 @@ CONFIG_BLK_DEV_IDEDMA=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -657,6 +658,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -669,6 +672,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -753,6 +757,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -817,6 +822,7 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -825,6 +831,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=y
@@ -951,6 +958,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -973,6 +981,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/85xx/sbc8548_defconfig b/arch/powerpc/configs/85xx/sbc8548_defconfig
index 8290385e9b9..3de8450cd55 100644
--- a/arch/powerpc/configs/85xx/sbc8548_defconfig
+++ b/arch/powerpc/configs/85xx/sbc8548_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:29 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:54 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -67,6 +67,10 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
 # CONFIG_PPC_DCR_NATIVE is not set
 # CONFIG_PPC_DCR_MMIO is not set
 CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_PPC_ADV_DEBUG_REGS=y
+CONFIG_PPC_ADV_DEBUG_IACS=2
+CONFIG_PPC_ADV_DEBUG_DACS=2
+CONFIG_PPC_ADV_DEBUG_DVCS=0
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 CONFIG_CONSTRUCTORS=y
 
@@ -98,14 +102,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -113,6 +111,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -314,6 +313,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
 CONFIG_FSL_PCI=y
@@ -324,7 +324,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_PCCARD is not set
@@ -352,7 +351,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=y
@@ -447,6 +445,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 # CONFIG_MTD is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_MDIO=y
 # CONFIG_PARPORT is not set
@@ -491,6 +491,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -596,6 +597,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -608,6 +611,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -692,6 +696,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -756,6 +761,7 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -764,6 +770,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=y
@@ -856,6 +863,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -878,6 +886,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/85xx/sbc8560_defconfig b/arch/powerpc/configs/85xx/sbc8560_defconfig
index 2499b5ba714..bd467fe1393 100644
--- a/arch/powerpc/configs/85xx/sbc8560_defconfig
+++ b/arch/powerpc/configs/85xx/sbc8560_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:30 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:54 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -67,6 +67,10 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
 # CONFIG_PPC_DCR_NATIVE is not set
 # CONFIG_PPC_DCR_MMIO is not set
 CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_PPC_ADV_DEBUG_REGS=y
+CONFIG_PPC_ADV_DEBUG_IACS=2
+CONFIG_PPC_ADV_DEBUG_DACS=2
+CONFIG_PPC_ADV_DEBUG_DVCS=0
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 CONFIG_CONSTRUCTORS=y
 
@@ -98,14 +102,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -113,6 +111,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -314,6 +313,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_FSL_SOC=y
 CONFIG_PPC_PCI_CHOICE=y
 # CONFIG_PCI is not set
@@ -344,7 +344,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=y
@@ -441,6 +440,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 # CONFIG_MTD is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_MDIO=y
 # CONFIG_PARPORT is not set
@@ -475,6 +476,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -600,6 +602,7 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -815,6 +818,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -837,6 +841,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/85xx/socrates_defconfig b/arch/powerpc/configs/85xx/socrates_defconfig
index e2edb79cfd1..9803e031165 100644
--- a/arch/powerpc/configs/85xx/socrates_defconfig
+++ b/arch/powerpc/configs/85xx/socrates_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:31 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:55 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -67,6 +67,10 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
 # CONFIG_PPC_DCR_NATIVE is not set
 # CONFIG_PPC_DCR_MMIO is not set
 CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_PPC_ADV_DEBUG_REGS=y
+CONFIG_PPC_ADV_DEBUG_IACS=2
+CONFIG_PPC_ADV_DEBUG_DACS=2
+CONFIG_PPC_ADV_DEBUG_DVCS=0
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 CONFIG_CONSTRUCTORS=y
 
@@ -98,14 +102,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=16
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -113,6 +111,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -319,6 +318,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
 CONFIG_FSL_PCI=y
@@ -329,7 +329,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-CONFIG_PCI_LEGACY=y
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_HAS_RAPIDIO is not set
@@ -355,7 +354,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -554,6 +552,8 @@ CONFIG_MTD_NAND_SOCRATES=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_SPI=y
@@ -591,6 +591,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_TI_DAC7512 is not set
 # CONFIG_C2PORT is not set
@@ -610,6 +611,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -867,6 +869,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -916,6 +919,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -929,15 +933,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 CONFIG_SPI=y
 CONFIG_SPI_MASTER=y
 
@@ -979,10 +977,11 @@ CONFIG_HWMON_DEBUG_CHIP=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -1021,6 +1020,7 @@ CONFIG_SENSORS_LM75=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1050,21 +1050,24 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_MFD_MC13783 is not set
 # CONFIG_AB3100_CORE is not set
 # CONFIG_EZX_PCAP is not set
-# CONFIG_MFD_88PM8607 is not set
 # CONFIG_AB4500_CORE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1073,6 +1076,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1180,6 +1184,7 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
+# CONFIG_HID_3M_PCT is not set
 # CONFIG_HID_A4TECH is not set
 # CONFIG_HID_APPLE is not set
 # CONFIG_HID_BELKIN is not set
@@ -1194,12 +1199,16 @@ CONFIG_USB_HID=y
 # CONFIG_HID_KENSINGTON is not set
 # CONFIG_HID_LOGITECH is not set
 # CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MOSART is not set
 # CONFIG_HID_MONTEREY is not set
 # CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
 # CONFIG_HID_PANTHERLORD is not set
 # CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_QUANTA is not set
 # CONFIG_HID_SAMSUNG is not set
 # CONFIG_HID_SONY is not set
+# CONFIG_HID_STANTUM is not set
 # CONFIG_HID_SUNPLUS is not set
 # CONFIG_HID_GREENASIA is not set
 # CONFIG_HID_SMARTJOYPLUS is not set
@@ -1307,7 +1316,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1320,7 +1328,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1491,6 +1498,7 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=y
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1515,6 +1523,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/85xx/stx_gp3_defconfig b/arch/powerpc/configs/85xx/stx_gp3_defconfig
index ce313259df1..880ab7aaf20 100644
--- a/arch/powerpc/configs/85xx/stx_gp3_defconfig
+++ b/arch/powerpc/configs/85xx/stx_gp3_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:32 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:56 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -68,6 +68,10 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
 # CONFIG_PPC_DCR_NATIVE is not set
 # CONFIG_PPC_DCR_MMIO is not set
 CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_PPC_ADV_DEBUG_REGS=y
+CONFIG_PPC_ADV_DEBUG_IACS=2
+CONFIG_PPC_ADV_DEBUG_DACS=2
+CONFIG_PPC_ADV_DEBUG_DVCS=0
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 CONFIG_CONSTRUCTORS=y
 
@@ -99,14 +103,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -114,6 +112,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -324,6 +323,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
 CONFIG_FSL_PCI=y
@@ -334,7 +334,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_DEBUG is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
@@ -363,7 +362,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -520,6 +518,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 # CONFIG_MTD is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_I2C=m
@@ -563,6 +563,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -630,6 +631,7 @@ CONFIG_IDE_PROC_FS=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=m
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=m
 CONFIG_SCSI_DMA=y
@@ -817,6 +819,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -829,6 +833,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -947,6 +952,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_SERIAL_CPM=y
 CONFIG_SERIAL_CPM_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -1004,6 +1010,7 @@ CONFIG_I2C_ALGOBIT=m
 # CONFIG_I2C_MPC is not set
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -1017,15 +1024,9 @@ CONFIG_I2C_ALGOBIT=m
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -1041,14 +1042,18 @@ CONFIG_GPIOLIB=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 # CONFIG_GPIO_XILINX is not set
+# CONFIG_GPIO_SCH is not set
 
 #
 # I2C GPIO expanders:
 #
+# CONFIG_GPIO_MAX7300 is not set
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -1081,10 +1086,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -1122,6 +1128,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1155,9 +1162,10 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_TPS65010 is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_MFD_WM8400 is not set
-# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
-# CONFIG_AB3100_CORE is not set
+# CONFIG_MFD_TIMBERDALE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1166,6 +1174,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 CONFIG_AGP=m
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 CONFIG_DRM=m
 # CONFIG_DRM_TDFX is not set
 # CONFIG_DRM_R128 is not set
@@ -1308,6 +1317,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=m
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1333,6 +1343,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 CONFIG_SMB_FS=m
 # CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/85xx/tqm8540_defconfig b/arch/powerpc/configs/85xx/tqm8540_defconfig
index 0824b466722..230aa2fc062 100644
--- a/arch/powerpc/configs/85xx/tqm8540_defconfig
+++ b/arch/powerpc/configs/85xx/tqm8540_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:33 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:57 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -67,6 +67,10 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
 # CONFIG_PPC_DCR_NATIVE is not set
 # CONFIG_PPC_DCR_MMIO is not set
 CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_PPC_ADV_DEBUG_REGS=y
+CONFIG_PPC_ADV_DEBUG_IACS=2
+CONFIG_PPC_ADV_DEBUG_DACS=2
+CONFIG_PPC_ADV_DEBUG_DVCS=0
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 CONFIG_CONSTRUCTORS=y
 
@@ -98,14 +102,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -113,6 +111,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -315,6 +314,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
 CONFIG_FSL_PCI=y
@@ -325,7 +325,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_HAS_RAPIDIO is not set
@@ -351,7 +350,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -525,6 +523,8 @@ CONFIG_MTD_CFI_UTIL=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_MDIO=y
@@ -560,6 +560,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -632,6 +633,7 @@ CONFIG_BLK_DEV_IDEDMA=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -704,6 +706,7 @@ CONFIG_NET_PCI=y
 # CONFIG_PCNET32 is not set
 # CONFIG_AMD8111_ETH is not set
 # CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_KSZ884X_PCI is not set
 # CONFIG_B44 is not set
 # CONFIG_FORCEDETH is not set
 CONFIG_E100=y
@@ -755,6 +758,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -767,6 +772,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -851,6 +857,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -902,6 +909,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -913,15 +921,9 @@ CONFIG_I2C_MPC=y
 # Other I2C/SMBus bus drivers
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -947,10 +949,11 @@ CONFIG_HWMON_DEBUG_CHIP=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -987,6 +990,7 @@ CONFIG_SENSORS_LM75=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1015,18 +1019,21 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1035,6 +1042,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1172,6 +1180,7 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=y
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1194,6 +1203,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/85xx/tqm8541_defconfig b/arch/powerpc/configs/85xx/tqm8541_defconfig
index 2137be4100e..dbe04b981b8 100644
--- a/arch/powerpc/configs/85xx/tqm8541_defconfig
+++ b/arch/powerpc/configs/85xx/tqm8541_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:34 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:58 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -68,6 +68,10 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
 # CONFIG_PPC_DCR_NATIVE is not set
 # CONFIG_PPC_DCR_MMIO is not set
 CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_PPC_ADV_DEBUG_REGS=y
+CONFIG_PPC_ADV_DEBUG_IACS=2
+CONFIG_PPC_ADV_DEBUG_DACS=2
+CONFIG_PPC_ADV_DEBUG_DVCS=0
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 CONFIG_CONSTRUCTORS=y
 
@@ -99,14 +103,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -114,6 +112,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -318,6 +317,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
 CONFIG_FSL_PCI=y
@@ -328,7 +328,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_HAS_RAPIDIO is not set
@@ -354,7 +353,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -528,6 +526,8 @@ CONFIG_MTD_CFI_UTIL=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_I2C=y
@@ -564,6 +564,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -636,6 +637,7 @@ CONFIG_BLK_DEV_IDEDMA=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -708,6 +710,7 @@ CONFIG_NET_PCI=y
 # CONFIG_PCNET32 is not set
 # CONFIG_AMD8111_ETH is not set
 # CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_KSZ884X_PCI is not set
 # CONFIG_B44 is not set
 # CONFIG_FORCEDETH is not set
 CONFIG_E100=y
@@ -760,6 +763,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -772,6 +777,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -858,6 +864,7 @@ CONFIG_SERIAL_CPM=y
 CONFIG_SERIAL_CPM_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -912,6 +919,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -923,15 +931,9 @@ CONFIG_I2C_MPC=y
 # Other I2C/SMBus bus drivers
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -946,14 +948,18 @@ CONFIG_GPIOLIB=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 # CONFIG_GPIO_XILINX is not set
+# CONFIG_GPIO_SCH is not set
 
 #
 # I2C GPIO expanders:
 #
+# CONFIG_GPIO_MAX7300 is not set
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -986,10 +992,11 @@ CONFIG_HWMON_DEBUG_CHIP=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -1027,6 +1034,7 @@ CONFIG_SENSORS_LM75=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1055,19 +1063,24 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
 # CONFIG_TPS65010 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_MFD_TIMBERDALE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1076,6 +1089,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1213,6 +1227,7 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=y
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1235,6 +1250,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/85xx/tqm8548_defconfig b/arch/powerpc/configs/85xx/tqm8548_defconfig
index 5cc89aac3fe..845efa79dd2 100644
--- a/arch/powerpc/configs/85xx/tqm8548_defconfig
+++ b/arch/powerpc/configs/85xx/tqm8548_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:35 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:59 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -67,6 +67,10 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
 # CONFIG_PPC_DCR_NATIVE is not set
 # CONFIG_PPC_DCR_MMIO is not set
 CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_PPC_ADV_DEBUG_REGS=y
+CONFIG_PPC_ADV_DEBUG_IACS=2
+CONFIG_PPC_ADV_DEBUG_DACS=2
+CONFIG_PPC_ADV_DEBUG_DVCS=0
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 CONFIG_CONSTRUCTORS=y
 
@@ -98,14 +102,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -113,6 +111,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -324,6 +323,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
 CONFIG_FSL_PCI=y
@@ -339,7 +339,6 @@ CONFIG_PCIEAER=y
 # CONFIG_PCIEASPM is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_DEBUG is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
@@ -368,7 +367,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=y
@@ -559,6 +557,8 @@ CONFIG_MTD_NAND_FSL_UPM=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_MDIO=y
@@ -594,6 +594,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -611,6 +612,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -716,6 +718,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -728,6 +732,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -812,6 +817,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -860,6 +866,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -872,15 +879,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -906,10 +907,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -946,6 +948,7 @@ CONFIG_SENSORS_LM75=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -974,18 +977,21 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -994,6 +1000,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=y
@@ -1162,6 +1169,7 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1184,6 +1192,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/85xx/tqm8555_defconfig b/arch/powerpc/configs/85xx/tqm8555_defconfig
index e7b9148e58c..b958136a12f 100644
--- a/arch/powerpc/configs/85xx/tqm8555_defconfig
+++ b/arch/powerpc/configs/85xx/tqm8555_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:36 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:17:00 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -68,6 +68,10 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
 # CONFIG_PPC_DCR_NATIVE is not set
 # CONFIG_PPC_DCR_MMIO is not set
 CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_PPC_ADV_DEBUG_REGS=y
+CONFIG_PPC_ADV_DEBUG_IACS=2
+CONFIG_PPC_ADV_DEBUG_DACS=2
+CONFIG_PPC_ADV_DEBUG_DVCS=0
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 CONFIG_CONSTRUCTORS=y
 
@@ -99,14 +103,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -114,6 +112,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -318,6 +317,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
 CONFIG_FSL_PCI=y
@@ -328,7 +328,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_HAS_RAPIDIO is not set
@@ -354,7 +353,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -528,6 +526,8 @@ CONFIG_MTD_CFI_UTIL=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_I2C=y
@@ -564,6 +564,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -636,6 +637,7 @@ CONFIG_BLK_DEV_IDEDMA=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -708,6 +710,7 @@ CONFIG_NET_PCI=y
 # CONFIG_PCNET32 is not set
 # CONFIG_AMD8111_ETH is not set
 # CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_KSZ884X_PCI is not set
 # CONFIG_B44 is not set
 # CONFIG_FORCEDETH is not set
 CONFIG_E100=y
@@ -760,6 +763,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -772,6 +777,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -858,6 +864,7 @@ CONFIG_SERIAL_CPM=y
 CONFIG_SERIAL_CPM_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -912,6 +919,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -923,15 +931,9 @@ CONFIG_I2C_MPC=y
 # Other I2C/SMBus bus drivers
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -946,14 +948,18 @@ CONFIG_GPIOLIB=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 # CONFIG_GPIO_XILINX is not set
+# CONFIG_GPIO_SCH is not set
 
 #
 # I2C GPIO expanders:
 #
+# CONFIG_GPIO_MAX7300 is not set
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -986,10 +992,11 @@ CONFIG_HWMON_DEBUG_CHIP=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -1027,6 +1034,7 @@ CONFIG_SENSORS_LM75=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1055,19 +1063,24 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
 # CONFIG_TPS65010 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_MFD_TIMBERDALE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1076,6 +1089,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1213,6 +1227,7 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=y
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1235,6 +1250,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/85xx/tqm8560_defconfig b/arch/powerpc/configs/85xx/tqm8560_defconfig
index a998e401bbf..008bc975492 100644
--- a/arch/powerpc/configs/85xx/tqm8560_defconfig
+++ b/arch/powerpc/configs/85xx/tqm8560_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:36 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:17:01 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -68,6 +68,10 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
 # CONFIG_PPC_DCR_NATIVE is not set
 # CONFIG_PPC_DCR_MMIO is not set
 CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_PPC_ADV_DEBUG_REGS=y
+CONFIG_PPC_ADV_DEBUG_IACS=2
+CONFIG_PPC_ADV_DEBUG_DACS=2
+CONFIG_PPC_ADV_DEBUG_DVCS=0
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 CONFIG_CONSTRUCTORS=y
 
@@ -99,14 +103,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -114,6 +112,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -318,6 +317,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
 CONFIG_FSL_PCI=y
@@ -328,7 +328,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_HAS_RAPIDIO is not set
@@ -354,7 +353,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -528,6 +526,8 @@ CONFIG_MTD_CFI_UTIL=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_I2C=y
@@ -564,6 +564,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -636,6 +637,7 @@ CONFIG_BLK_DEV_IDEDMA=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -708,6 +710,7 @@ CONFIG_NET_PCI=y
 # CONFIG_PCNET32 is not set
 # CONFIG_AMD8111_ETH is not set
 # CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_KSZ884X_PCI is not set
 # CONFIG_B44 is not set
 # CONFIG_FORCEDETH is not set
 CONFIG_E100=y
@@ -760,6 +763,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -772,6 +777,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -858,6 +864,7 @@ CONFIG_SERIAL_CPM=y
 CONFIG_SERIAL_CPM_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -912,6 +919,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -923,15 +931,9 @@ CONFIG_I2C_MPC=y
 # Other I2C/SMBus bus drivers
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -946,14 +948,18 @@ CONFIG_GPIOLIB=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 # CONFIG_GPIO_XILINX is not set
+# CONFIG_GPIO_SCH is not set
 
 #
 # I2C GPIO expanders:
 #
+# CONFIG_GPIO_MAX7300 is not set
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -986,10 +992,11 @@ CONFIG_HWMON_DEBUG_CHIP=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -1027,6 +1034,7 @@ CONFIG_SENSORS_LM75=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1055,19 +1063,24 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
 # CONFIG_TPS65010 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_MFD_TIMBERDALE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1076,6 +1089,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1213,6 +1227,7 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=y
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1235,6 +1250,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig b/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig
index fc656af04ea..2cf80dba028 100644
--- a/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig
+++ b/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:37 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:17:01 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -69,6 +69,10 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
 # CONFIG_PPC_DCR_NATIVE is not set
 # CONFIG_PPC_DCR_MMIO is not set
 CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_PPC_ADV_DEBUG_REGS=y
+CONFIG_PPC_ADV_DEBUG_IACS=2
+CONFIG_PPC_ADV_DEBUG_DACS=2
+CONFIG_PPC_ADV_DEBUG_DVCS=0
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 CONFIG_CONSTRUCTORS=y
 
@@ -104,10 +108,8 @@ CONFIG_RCU_FANOUT=32
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_GROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -115,6 +117,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -328,6 +331,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
 CONFIG_FSL_PCI=y
@@ -343,7 +347,6 @@ CONFIG_PCIEAER=y
 # CONFIG_PCIEASPM is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 CONFIG_PCI_MSI=y
-CONFIG_PCI_LEGACY=y
 # CONFIG_PCI_DEBUG is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
@@ -375,7 +378,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=y
@@ -600,6 +602,8 @@ CONFIG_MTD_NAND_FSL_UPM=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_I2C=y
@@ -637,6 +641,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -654,6 +659,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -777,6 +783,7 @@ CONFIG_PATA_ALI=y
 # CONFIG_PATA_IT821X is not set
 # CONFIG_PATA_IT8213 is not set
 # CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_LEGACY is not set
 # CONFIG_PATA_TRIFLEX is not set
 # CONFIG_PATA_MARVELL is not set
 # CONFIG_PATA_MPIIX is not set
@@ -1004,6 +1011,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -1053,6 +1061,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -1066,15 +1075,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -1090,14 +1093,19 @@ CONFIG_GPIO_SYSFS=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 # CONFIG_GPIO_XILINX is not set
+# CONFIG_GPIO_SCH is not set
 
 #
 # I2C GPIO expanders:
 #
+# CONFIG_GPIO_MAX7300 is not set
 # CONFIG_GPIO_MAX732X is not set
 CONFIG_GPIO_PCA953X=y
+# CONFIG_GPIO_PCA953X_IRQ is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -1130,10 +1138,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 CONFIG_SENSORS_DS1621=y
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -1171,6 +1180,7 @@ CONFIG_SENSORS_LM90=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1218,19 +1228,24 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
 # CONFIG_TPS65010 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_MFD_TIMBERDALE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1239,6 +1254,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=y
@@ -1271,6 +1287,7 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
+# CONFIG_HID_3M_PCT is not set
 # CONFIG_HID_A4TECH is not set
 # CONFIG_HID_APPLE is not set
 # CONFIG_HID_BELKIN is not set
@@ -1285,12 +1302,16 @@ CONFIG_USB_HID=y
 # CONFIG_HID_KENSINGTON is not set
 # CONFIG_HID_LOGITECH is not set
 # CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MOSART is not set
 # CONFIG_HID_MONTEREY is not set
 # CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
 # CONFIG_HID_PANTHERLORD is not set
 # CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_QUANTA is not set
 # CONFIG_HID_SAMSUNG is not set
 # CONFIG_HID_SONY is not set
+# CONFIG_HID_STANTUM is not set
 # CONFIG_HID_SUNPLUS is not set
 # CONFIG_HID_GREENASIA is not set
 # CONFIG_HID_SMARTJOYPLUS is not set
@@ -1386,7 +1407,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1398,7 +1418,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1423,11 +1442,11 @@ CONFIG_LEDS_GPIO_OF=y
 CONFIG_LEDS_PCA955X=y
 # CONFIG_LEDS_BD2802 is not set
 # CONFIG_LEDS_LT3593 is not set
+CONFIG_LEDS_TRIGGERS=y
 
 #
 # LED Triggers
 #
-CONFIG_LEDS_TRIGGERS=y
 CONFIG_LEDS_TRIGGER_TIMER=y
 CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
@@ -1506,6 +1525,7 @@ CONFIG_RTC_DRV_CMOS=y
 #
 # CONFIG_RTC_DRV_GENERIC is not set
 CONFIG_DMADEVICES=y
+# CONFIG_DMADEVICES_DEBUG is not set
 
 #
 # DMA Devices
@@ -1614,6 +1634,7 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1641,6 +1662,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
@@ -1851,6 +1873,7 @@ CONFIG_CRYPTO_MANAGER=y
 CONFIG_CRYPTO_MANAGER2=y
 # CONFIG_CRYPTO_GF128MUL is not set
 # CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_PCRYPT is not set
 CONFIG_CRYPTO_WORKQUEUE=y
 # CONFIG_CRYPTO_CRYPTD is not set
 # CONFIG_CRYPTO_AUTHENC is not set
diff --git a/arch/powerpc/configs/86xx/gef_ppc9a_defconfig b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
index 622d84f48ab..183c59c6d89 100644
--- a/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
+++ b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:43 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:17:07 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -102,11 +102,6 @@ CONFIG_RCU_FANOUT=32
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -117,6 +112,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -325,6 +321,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -340,13 +337,11 @@ CONFIG_PCIEAER=y
 # CONFIG_PCIEASPM is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 CONFIG_PCCARD=y
 CONFIG_PCMCIA=y
 # CONFIG_PCMCIA_LOAD_CIS is not set
-# CONFIG_PCMCIA_IOCTL is not set
 # CONFIG_CARDBUS is not set
 
 #
@@ -382,7 +377,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=m
@@ -592,6 +586,8 @@ CONFIG_MTD_PHYSMAP_OF=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_I2C=y
@@ -629,6 +625,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 CONFIG_DS1682=y
 # CONFIG_C2PORT is not set
 
@@ -695,6 +692,7 @@ CONFIG_IDE_PROC_FS=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -819,6 +817,7 @@ CONFIG_SATA_SIL=y
 # CONFIG_PATA_IT821X is not set
 # CONFIG_PATA_IT8213 is not set
 # CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_LEGACY is not set
 # CONFIG_PATA_TRIFLEX is not set
 # CONFIG_PATA_MARVELL is not set
 # CONFIG_PATA_MPIIX is not set
@@ -1059,6 +1058,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -1116,6 +1116,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -1129,15 +1130,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -1152,14 +1147,18 @@ CONFIG_GPIO_SYSFS=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 # CONFIG_GPIO_XILINX is not set
+# CONFIG_GPIO_SCH is not set
 
 #
 # I2C GPIO expanders:
 #
+# CONFIG_GPIO_MAX7300 is not set
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -1192,10 +1191,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -1233,6 +1233,7 @@ CONFIG_SENSORS_LM92=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1281,19 +1282,24 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
 # CONFIG_TPS65010 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_MFD_TIMBERDALE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1302,6 +1308,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -1334,6 +1341,7 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
+# CONFIG_HID_3M_PCT is not set
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
@@ -1349,14 +1357,19 @@ CONFIG_HID_GYRATION=y
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
+# CONFIG_LOGIG940_FF is not set
 CONFIG_HID_MICROSOFT=y
+# CONFIG_HID_MOSART is not set
 CONFIG_HID_MONTEREY=y
 # CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
 CONFIG_HID_PANTHERLORD=y
 # CONFIG_PANTHERLORD_FF is not set
 CONFIG_HID_PETALYNX=y
+# CONFIG_HID_QUANTA is not set
 CONFIG_HID_SAMSUNG=y
 CONFIG_HID_SONY=y
+# CONFIG_HID_STANTUM is not set
 CONFIG_HID_SUNPLUS=y
 # CONFIG_HID_GREENASIA is not set
 # CONFIG_HID_SMARTJOYPLUS is not set
@@ -1463,7 +1476,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1476,7 +1488,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1560,43 +1571,35 @@ CONFIG_RTC_DRV_RX8581=y
 CONFIG_STAGING=y
 # CONFIG_STAGING_EXCLUDE_BUILD is not set
 # CONFIG_ET131X is not set
-# CONFIG_ME4000 is not set
-# CONFIG_MEILHAUS is not set
 # CONFIG_USB_IP_COMMON is not set
+# CONFIG_PRISM2_USB is not set
 # CONFIG_ECHO is not set
 # CONFIG_COMEDI is not set
 # CONFIG_ASUS_OLED is not set
-# CONFIG_ALTERA_PCIE_CHDMA is not set
-# CONFIG_INPUT_MIMIO is not set
+# CONFIG_R8187SE is not set
+# CONFIG_RTL8192SU is not set
+# CONFIG_RTL8192U is not set
+# CONFIG_RTL8192E is not set
 # CONFIG_TRANZPORT is not set
 
 #
-# Android
-#
-# CONFIG_ANDROID is not set
-# CONFIG_DST is not set
-# CONFIG_POHMELFS is not set
-# CONFIG_B3DFG is not set
-# CONFIG_IDE_PHISON is not set
-# CONFIG_PLAN9AUTH is not set
-# CONFIG_HECI is not set
-# CONFIG_USB_CPC is not set
-
-#
 # Qualcomm MSM Camera And Video
 #
 
 #
 # Camera Sensor Selection
 #
-# CONFIG_HYPERV_STORAGE is not set
-# CONFIG_HYPERV_BLOCK is not set
-# CONFIG_HYPERV_NET is not set
+# CONFIG_INPUT_GPIO is not set
+# CONFIG_POHMELFS is not set
+# CONFIG_IDE_PHISON is not set
+# CONFIG_VT6655 is not set
+# CONFIG_VT6656 is not set
 CONFIG_VME_BUS=y
 
 #
 # VME Bridge Drivers
 #
+# CONFIG_VME_CA91CX42 is not set
 CONFIG_VME_TSI148=y
 
 #
@@ -1605,6 +1608,24 @@ CONFIG_VME_TSI148=y
 # CONFIG_VME_USER is not set
 
 #
+# VME Board Drivers
+#
+# CONFIG_VMIVME_7805 is not set
+
+#
+# RAR Register Driver
+#
+# CONFIG_RAR_REGISTER is not set
+# CONFIG_IIO is not set
+# CONFIG_RAMZSWAP is not set
+# CONFIG_BATMAN_ADV is not set
+# CONFIG_STRIP is not set
+# CONFIG_PCMCIA_WAVELAN is not set
+# CONFIG_PCMCIA_NETWAVE is not set
+# CONFIG_DT3155 is not set
+# CONFIG_CRYSTALHD is not set
+
+#
 # File systems
 #
 CONFIG_EXT2_FS=y
@@ -1693,6 +1714,7 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1719,6 +1741,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 CONFIG_CIFS=m
 # CONFIG_CIFS_STATS is not set
 # CONFIG_CIFS_WEAK_PW_HASH is not set
@@ -1864,6 +1887,7 @@ CONFIG_CRYPTO_MANAGER=y
 CONFIG_CRYPTO_MANAGER2=y
 # CONFIG_CRYPTO_GF128MUL is not set
 # CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_PCRYPT is not set
 CONFIG_CRYPTO_WORKQUEUE=y
 # CONFIG_CRYPTO_CRYPTD is not set
 CONFIG_CRYPTO_AUTHENC=m
diff --git a/arch/powerpc/configs/86xx/gef_sbc310_defconfig b/arch/powerpc/configs/86xx/gef_sbc310_defconfig
index eb58dec11a6..1524d948a2b 100644
--- a/arch/powerpc/configs/86xx/gef_sbc310_defconfig
+++ b/arch/powerpc/configs/86xx/gef_sbc310_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:41 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:17:05 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -102,11 +102,6 @@ CONFIG_RCU_FANOUT=32
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -117,6 +112,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -325,6 +321,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -340,13 +337,11 @@ CONFIG_PCIEAER=y
 # CONFIG_PCIEASPM is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 CONFIG_PCCARD=y
 CONFIG_PCMCIA=y
 # CONFIG_PCMCIA_LOAD_CIS is not set
-# CONFIG_PCMCIA_IOCTL is not set
 # CONFIG_CARDBUS is not set
 
 #
@@ -382,7 +377,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=m
@@ -592,6 +586,8 @@ CONFIG_MTD_PHYSMAP_OF=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_I2C=y
@@ -629,6 +625,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 CONFIG_DS1682=y
 # CONFIG_C2PORT is not set
 
@@ -695,6 +692,7 @@ CONFIG_IDE_PROC_FS=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -1001,6 +999,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -1058,6 +1057,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -1071,15 +1071,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -1094,14 +1088,18 @@ CONFIG_GPIO_SYSFS=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 # CONFIG_GPIO_XILINX is not set
+# CONFIG_GPIO_SCH is not set
 
 #
 # I2C GPIO expanders:
 #
+# CONFIG_GPIO_MAX7300 is not set
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -1134,10 +1132,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -1175,6 +1174,7 @@ CONFIG_SENSORS_LM92=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1223,19 +1223,24 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
 # CONFIG_TPS65010 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_MFD_TIMBERDALE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1244,6 +1249,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -1276,6 +1282,7 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
+# CONFIG_HID_3M_PCT is not set
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
@@ -1291,14 +1298,19 @@ CONFIG_HID_GYRATION=y
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
+# CONFIG_LOGIG940_FF is not set
 CONFIG_HID_MICROSOFT=y
+# CONFIG_HID_MOSART is not set
 CONFIG_HID_MONTEREY=y
 # CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
 CONFIG_HID_PANTHERLORD=y
 # CONFIG_PANTHERLORD_FF is not set
 CONFIG_HID_PETALYNX=y
+# CONFIG_HID_QUANTA is not set
 CONFIG_HID_SAMSUNG=y
 CONFIG_HID_SONY=y
+# CONFIG_HID_STANTUM is not set
 CONFIG_HID_SUNPLUS=y
 # CONFIG_HID_GREENASIA is not set
 # CONFIG_HID_SMARTJOYPLUS is not set
@@ -1405,7 +1417,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1418,7 +1429,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1590,6 +1600,7 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1616,6 +1627,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 CONFIG_CIFS=m
 # CONFIG_CIFS_STATS is not set
 # CONFIG_CIFS_WEAK_PW_HASH is not set
@@ -1761,6 +1773,7 @@ CONFIG_CRYPTO_MANAGER=y
 CONFIG_CRYPTO_MANAGER2=y
 # CONFIG_CRYPTO_GF128MUL is not set
 # CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_PCRYPT is not set
 CONFIG_CRYPTO_WORKQUEUE=y
 # CONFIG_CRYPTO_CRYPTD is not set
 CONFIG_CRYPTO_AUTHENC=m
diff --git a/arch/powerpc/configs/86xx/gef_sbc610_defconfig b/arch/powerpc/configs/86xx/gef_sbc610_defconfig
index 62c2b81a4a8..767c204c060 100644
--- a/arch/powerpc/configs/86xx/gef_sbc610_defconfig
+++ b/arch/powerpc/configs/86xx/gef_sbc610_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:42 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:17:06 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -102,11 +102,6 @@ CONFIG_RCU_FANOUT=32
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -117,6 +112,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -326,6 +322,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -341,7 +338,6 @@ CONFIG_PCIEAER=y
 # CONFIG_PCIEASPM is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 CONFIG_PCI_DEBUG=y
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
@@ -369,7 +365,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=m
@@ -552,6 +547,7 @@ CONFIG_ATM_BR2684=m
 # CONFIG_ATM_BR2684_IPFILTER is not set
 CONFIG_STP=m
 CONFIG_BRIDGE=m
+CONFIG_BRIDGE_IGMP_SNOOPING=y
 # CONFIG_NET_DSA is not set
 CONFIG_VLAN_8021Q=m
 # CONFIG_VLAN_8021Q_GVRP is not set
@@ -728,6 +724,8 @@ CONFIG_MTD_PHYSMAP_OF=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_I2C=y
@@ -765,6 +763,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 CONFIG_DS1682=y
 # CONFIG_C2PORT is not set
 
@@ -782,6 +781,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -905,6 +905,7 @@ CONFIG_SATA_SIL=y
 # CONFIG_PATA_IT821X is not set
 # CONFIG_PATA_IT8213 is not set
 # CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_LEGACY is not set
 # CONFIG_PATA_TRIFLEX is not set
 # CONFIG_PATA_MARVELL is not set
 # CONFIG_PATA_MPIIX is not set
@@ -1155,6 +1156,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -1204,6 +1206,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -1217,15 +1220,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -1241,14 +1238,18 @@ CONFIG_GPIOLIB=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 # CONFIG_GPIO_XILINX is not set
+# CONFIG_GPIO_SCH is not set
 
 #
 # I2C GPIO expanders:
 #
+# CONFIG_GPIO_MAX7300 is not set
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -1281,10 +1282,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -1322,6 +1324,7 @@ CONFIG_SENSORS_LM92=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1370,19 +1373,24 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
 # CONFIG_TPS65010 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_MFD_TIMBERDALE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1391,6 +1399,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -1423,6 +1432,7 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
+# CONFIG_HID_3M_PCT is not set
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
@@ -1438,14 +1448,19 @@ CONFIG_HID_GYRATION=y
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
+# CONFIG_LOGIG940_FF is not set
 CONFIG_HID_MICROSOFT=y
+# CONFIG_HID_MOSART is not set
 CONFIG_HID_MONTEREY=y
 # CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
 CONFIG_HID_PANTHERLORD=y
 # CONFIG_PANTHERLORD_FF is not set
 CONFIG_HID_PETALYNX=y
+# CONFIG_HID_QUANTA is not set
 CONFIG_HID_SAMSUNG=y
 CONFIG_HID_SONY=y
+# CONFIG_HID_STANTUM is not set
 CONFIG_HID_SUNPLUS=y
 # CONFIG_HID_GREENASIA is not set
 # CONFIG_HID_SMARTJOYPLUS is not set
@@ -1552,7 +1567,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1565,7 +1579,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_ATM is not set
 # CONFIG_USB_GADGET is not set
 
@@ -1650,29 +1663,29 @@ CONFIG_RTC_DRV_RX8581=y
 CONFIG_STAGING=y
 # CONFIG_STAGING_EXCLUDE_BUILD is not set
 # CONFIG_ET131X is not set
-# CONFIG_ME4000 is not set
-# CONFIG_MEILHAUS is not set
 # CONFIG_USB_IP_COMMON is not set
+# CONFIG_PRISM2_USB is not set
 # CONFIG_ECHO is not set
 # CONFIG_COMEDI is not set
 # CONFIG_ASUS_OLED is not set
-# CONFIG_ALTERA_PCIE_CHDMA is not set
-# CONFIG_INPUT_MIMIO is not set
+# CONFIG_R8187SE is not set
+# CONFIG_RTL8192SU is not set
+# CONFIG_RTL8192U is not set
+# CONFIG_RTL8192E is not set
 # CONFIG_TRANZPORT is not set
 
 #
-# Android
+# Qualcomm MSM Camera And Video
+#
+
+#
+# Camera Sensor Selection
 #
-# CONFIG_ANDROID is not set
-# CONFIG_DST is not set
+# CONFIG_INPUT_GPIO is not set
 # CONFIG_POHMELFS is not set
-# CONFIG_B3DFG is not set
 # CONFIG_IDE_PHISON is not set
-# CONFIG_PLAN9AUTH is not set
-# CONFIG_HECI is not set
 # CONFIG_VT6655 is not set
-# CONFIG_USB_CPC is not set
-# CONFIG_RDC_17F3101X is not set
+# CONFIG_VT6656 is not set
 CONFIG_VME_BUS=y
 
 #
@@ -1687,6 +1700,22 @@ CONFIG_VME_TSI148=y
 # CONFIG_VME_USER is not set
 
 #
+# VME Board Drivers
+#
+# CONFIG_VMIVME_7805 is not set
+
+#
+# RAR Register Driver
+#
+# CONFIG_RAR_REGISTER is not set
+# CONFIG_IIO is not set
+# CONFIG_RAMZSWAP is not set
+# CONFIG_BATMAN_ADV is not set
+# CONFIG_STRIP is not set
+# CONFIG_DT3155 is not set
+# CONFIG_CRYSTALHD is not set
+
+#
 # File systems
 #
 CONFIG_EXT2_FS=y
@@ -1772,6 +1801,7 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1798,6 +1828,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 CONFIG_CIFS=m
 # CONFIG_CIFS_STATS is not set
 # CONFIG_CIFS_WEAK_PW_HASH is not set
@@ -1870,7 +1901,7 @@ CONFIG_CRC32=y
 # CONFIG_CRC7 is not set
 CONFIG_LIBCRC32C=m
 CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=m
+CONFIG_ZLIB_DEFLATE=y
 CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
@@ -2006,6 +2037,7 @@ CONFIG_CRYPTO_MANAGER=y
 CONFIG_CRYPTO_MANAGER2=y
 # CONFIG_CRYPTO_GF128MUL is not set
 CONFIG_CRYPTO_NULL=m
+# CONFIG_CRYPTO_PCRYPT is not set
 CONFIG_CRYPTO_WORKQUEUE=y
 # CONFIG_CRYPTO_CRYPTD is not set
 CONFIG_CRYPTO_AUTHENC=m
diff --git a/arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig b/arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig
index aab3baebab8..55b9e4e867a 100644
--- a/arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig
+++ b/arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:39 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:17:03 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -97,11 +97,6 @@ CONFIG_RCU_FANOUT=32
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -112,6 +107,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -320,6 +316,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -335,7 +332,6 @@ CONFIG_PCIEAER=y
 # CONFIG_PCIEASPM is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 CONFIG_PCI_DEBUG=y
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
@@ -362,7 +358,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=y
@@ -571,6 +566,8 @@ CONFIG_MTD_NAND_FSL_ELBC=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 # CONFIG_PARPORT is not set
@@ -605,6 +602,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -670,6 +668,7 @@ CONFIG_IDE_PROC_FS=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -792,6 +791,7 @@ CONFIG_PATA_ALI=y
 # CONFIG_PATA_IT821X is not set
 # CONFIG_PATA_IT8213 is not set
 # CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_LEGACY is not set
 # CONFIG_PATA_TRIFLEX is not set
 # CONFIG_PATA_MARVELL is not set
 # CONFIG_PATA_MPIIX is not set
@@ -970,6 +970,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -1017,6 +1018,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -1029,15 +1031,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -1062,18 +1058,21 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1082,6 +1081,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=y
@@ -1434,6 +1434,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS2_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1461,6 +1462,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig b/arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig
index 727a8c8d15b..1be38eb0578 100644
--- a/arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig
+++ b/arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:40 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:17:04 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -97,15 +97,11 @@ CONFIG_TREE_RCU=y
 # CONFIG_RCU_TRACE is not set
 CONFIG_RCU_FANOUT=32
 # CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_RCU_FAST_NO_HZ is not set
 # CONFIG_TREE_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -116,6 +112,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -326,6 +323,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -337,7 +335,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_DEBUG is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
@@ -365,7 +362,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=y
@@ -498,6 +494,8 @@ CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 # CONFIG_MTD is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_MDIO=y
@@ -534,6 +532,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -551,6 +550,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -675,6 +675,7 @@ CONFIG_PATA_ALI=y
 # CONFIG_PATA_IT821X is not set
 # CONFIG_PATA_IT8213 is not set
 # CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_LEGACY is not set
 # CONFIG_PATA_TRIFLEX is not set
 # CONFIG_PATA_MARVELL is not set
 # CONFIG_PATA_MPIIX is not set
@@ -799,6 +800,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -811,6 +814,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -920,6 +924,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -968,6 +973,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -981,15 +987,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -1014,18 +1014,21 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1034,6 +1037,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=y
@@ -1151,6 +1155,7 @@ CONFIG_SND_INTEL8X0=y
 CONFIG_SND_PPC=y
 CONFIG_SND_USB=y
 # CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_UA101 is not set
 # CONFIG_SND_USB_USX2Y is not set
 # CONFIG_SND_USB_CAIAQ is not set
 # CONFIG_SND_SOC is not set
@@ -1170,6 +1175,7 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
+# CONFIG_HID_3M_PCT is not set
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
@@ -1185,14 +1191,19 @@ CONFIG_HID_GYRATION=y
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
+# CONFIG_LOGIG940_FF is not set
 CONFIG_HID_MICROSOFT=y
+# CONFIG_HID_MOSART is not set
 CONFIG_HID_MONTEREY=y
 # CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
 CONFIG_HID_PANTHERLORD=y
 # CONFIG_PANTHERLORD_FF is not set
 CONFIG_HID_PETALYNX=y
+# CONFIG_HID_QUANTA is not set
 CONFIG_HID_SAMSUNG=y
 CONFIG_HID_SONY=y
+# CONFIG_HID_STANTUM is not set
 CONFIG_HID_SUNPLUS=y
 # CONFIG_HID_GREENASIA is not set
 # CONFIG_HID_SMARTJOYPLUS is not set
@@ -1300,7 +1311,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1313,7 +1323,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1475,6 +1484,7 @@ CONFIG_BEFS_FS=m
 # CONFIG_BEFS_DEBUG is not set
 CONFIG_BFS_FS=m
 CONFIG_EFS_FS=m
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=y
 # CONFIG_SQUASHFS is not set
 CONFIG_VXFS_FS=m
@@ -1506,6 +1516,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
@@ -1717,6 +1728,7 @@ CONFIG_CRYPTO_MANAGER=y
 CONFIG_CRYPTO_MANAGER2=y
 # CONFIG_CRYPTO_GF128MUL is not set
 # CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_PCRYPT is not set
 CONFIG_CRYPTO_WORKQUEUE=y
 # CONFIG_CRYPTO_CRYPTD is not set
 # CONFIG_CRYPTO_AUTHENC is not set
diff --git a/arch/powerpc/configs/86xx/sbc8641d_defconfig b/arch/powerpc/configs/86xx/sbc8641d_defconfig
index 4fb04dd2cde..a6300945732 100644
--- a/arch/powerpc/configs/86xx/sbc8641d_defconfig
+++ b/arch/powerpc/configs/86xx/sbc8641d_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:38 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:17:02 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -101,11 +101,6 @@ CONFIG_RCU_FANOUT=32
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -116,6 +111,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -327,6 +323,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -342,7 +339,6 @@ CONFIG_PCIEAER=y
 # CONFIG_PCIEASPM is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_DEBUG is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
@@ -369,7 +365,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=m
@@ -552,6 +547,7 @@ CONFIG_ATM_BR2684=m
 # CONFIG_ATM_BR2684_IPFILTER is not set
 CONFIG_STP=m
 CONFIG_BRIDGE=m
+CONFIG_BRIDGE_IGMP_SNOOPING=y
 # CONFIG_NET_DSA is not set
 CONFIG_VLAN_8021Q=m
 # CONFIG_VLAN_8021Q_GVRP is not set
@@ -733,6 +729,8 @@ CONFIG_MTD_PHYSMAP_OF=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_MDIO=y
@@ -768,6 +766,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -785,6 +784,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -1024,6 +1024,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -1074,6 +1075,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -1086,15 +1088,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -1120,10 +1116,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -1160,6 +1157,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1202,18 +1200,21 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1222,6 +1223,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -1376,6 +1378,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS2_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1408,6 +1411,7 @@ CONFIG_RPCSEC_GSS_KRB5=y
 CONFIG_SMB_FS=m
 CONFIG_SMB_NLS_DEFAULT=y
 CONFIG_SMB_NLS_REMOTE="cp437"
+# CONFIG_CEPH_FS is not set
 CONFIG_CIFS=m
 # CONFIG_CIFS_STATS is not set
 # CONFIG_CIFS_WEAK_PW_HASH is not set
@@ -1540,6 +1544,7 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_LKDTM is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
@@ -1618,6 +1623,7 @@ CONFIG_CRYPTO_MANAGER=y
 CONFIG_CRYPTO_MANAGER2=y
 # CONFIG_CRYPTO_GF128MUL is not set
 CONFIG_CRYPTO_NULL=m
+# CONFIG_CRYPTO_PCRYPT is not set
 CONFIG_CRYPTO_WORKQUEUE=y
 # CONFIG_CRYPTO_CRYPTD is not set
 CONFIG_CRYPTO_AUTHENC=m
diff --git a/arch/powerpc/configs/adder875_defconfig b/arch/powerpc/configs/adder875_defconfig
index 5c1dc768bbd..9f89d5c9c0b 100644
--- a/arch/powerpc/configs/adder875_defconfig
+++ b/arch/powerpc/configs/adder875_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:23:58 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:22 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -91,11 +91,6 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -307,6 +302,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_FSL_SOC=y
 # CONFIG_PCI is not set
 # CONFIG_PCI_DOMAINS is not set
@@ -336,7 +332,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
@@ -505,6 +500,8 @@ CONFIG_MTD_PHYSMAP_OF=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_MDIO=y
 # CONFIG_PARPORT is not set
@@ -516,6 +513,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -664,6 +662,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_SERIAL_CPM=y
 CONFIG_SERIAL_CPM_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -802,6 +801,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS2_FS is not set
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=y
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -826,6 +826,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
@@ -924,6 +925,7 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_LKDTM is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 # CONFIG_SYSCTL_SYSCALL_CHECK is not set
diff --git a/arch/powerpc/configs/c2k_defconfig b/arch/powerpc/configs/c2k_defconfig
index 72137cd881d..4ab6074db3c 100644
--- a/arch/powerpc/configs/c2k_defconfig
+++ b/arch/powerpc/configs/c2k_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:23:59 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:23 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -101,11 +101,6 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=17
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -121,6 +116,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 CONFIG_RD_BZIP2=y
 CONFIG_RD_LZMA=y
+CONFIG_RD_LZO=y
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -147,7 +143,6 @@ CONFIG_HAVE_PERF_EVENTS=y
 # Kernel Performance Events And Counters
 #
 CONFIG_PERF_EVENTS=y
-CONFIG_EVENT_PROFILE=y
 # CONFIG_PERF_COUNTERS is not set
 # CONFIG_DEBUG_PERF_USE_VMALLOC is not set
 CONFIG_VM_EVENT_COUNTERS=y
@@ -158,7 +153,6 @@ CONFIG_COMPAT_BRK=y
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
-CONFIG_TRACEPOINTS=y
 CONFIG_OPROFILE=m
 CONFIG_HAVE_OPROFILE=y
 CONFIG_KPROBES=y
@@ -357,6 +351,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_PCI=y
@@ -365,7 +360,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 CONFIG_PCI_MSI=y
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_DEBUG is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
@@ -396,7 +390,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=y
@@ -527,6 +520,7 @@ CONFIG_IP_VS_PROTO_UDP=y
 CONFIG_IP_VS_PROTO_AH_ESP=y
 CONFIG_IP_VS_PROTO_ESP=y
 CONFIG_IP_VS_PROTO_AH=y
+# CONFIG_IP_VS_PROTO_SCTP is not set
 
 #
 # IPVS scheduler
@@ -630,6 +624,7 @@ CONFIG_ATM_BR2684=m
 # CONFIG_ATM_BR2684_IPFILTER is not set
 CONFIG_STP=m
 CONFIG_BRIDGE=m
+CONFIG_BRIDGE_IGMP_SNOOPING=y
 # CONFIG_NET_DSA is not set
 CONFIG_VLAN_8021Q=m
 # CONFIG_VLAN_8021Q_GVRP is not set
@@ -690,7 +685,6 @@ CONFIG_NET_SCH_FIFO=y
 #
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_NET_TCPPROBE is not set
-# CONFIG_NET_DROP_MONITOR is not set
 # CONFIG_HAMRADIO is not set
 # CONFIG_CAN is not set
 # CONFIG_IRDA is not set
@@ -833,6 +827,8 @@ CONFIG_MTD_PHYSMAP_OF=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=m
 CONFIG_OF_MDIO=y
@@ -867,6 +863,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=m
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=m
 CONFIG_SCSI_DMA=y
@@ -1179,6 +1176,7 @@ CONFIG_SERIAL_MPSC_CONSOLE=y
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -1231,6 +1229,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MV64XXX=m
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -1244,15 +1243,9 @@ CONFIG_I2C_MV64XXX=m
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -1278,10 +1271,11 @@ CONFIG_SENSORS_ADM1026=m
 # CONFIG_SENSORS_ADM1029 is not set
 CONFIG_SENSORS_ADM1031=m
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 CONFIG_SENSORS_DS1621=m
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -1318,6 +1312,7 @@ CONFIG_SENSORS_SMSC47M1=m
 # CONFIG_SENSORS_SMSC47M192 is not set
 CONFIG_SENSORS_SMSC47B397=m
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1369,9 +1364,9 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_MFD_WM8400 is not set
-# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
-# CONFIG_AB3100_CORE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1380,6 +1375,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1413,7 +1409,6 @@ CONFIG_USB=m
 CONFIG_USB_DEVICEFS=y
 # CONFIG_USB_DEVICE_CLASS is not set
 # CONFIG_USB_DYNAMIC_MINORS is not set
-CONFIG_USB_SUSPEND=y
 # CONFIG_USB_OTG is not set
 CONFIG_USB_MON=m
 # CONFIG_USB_WUSB is not set
@@ -1535,6 +1530,7 @@ CONFIG_USB_SERIAL_MCT_U232=m
 # CONFIG_USB_SERIAL_NAVMAN is not set
 CONFIG_USB_SERIAL_PL2303=m
 # CONFIG_USB_SERIAL_OTI6858 is not set
+# CONFIG_USB_SERIAL_QCAUX is not set
 # CONFIG_USB_SERIAL_QUALCOMM is not set
 # CONFIG_USB_SERIAL_SPCP8X5 is not set
 # CONFIG_USB_SERIAL_HP4X is not set
@@ -1549,6 +1545,7 @@ CONFIG_USB_SERIAL_XIRCOM=m
 # CONFIG_USB_SERIAL_OPTION is not set
 CONFIG_USB_SERIAL_OMNINET=m
 # CONFIG_USB_SERIAL_OPTICON is not set
+# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set
 # CONFIG_USB_SERIAL_DEBUG is not set
 
 #
@@ -1561,7 +1558,6 @@ CONFIG_USB_EMI62=m
 CONFIG_USB_RIO500=m
 CONFIG_USB_LEGOTOWER=m
 CONFIG_USB_LCD=m
-# CONFIG_USB_BERRY_CHARGE is not set
 CONFIG_USB_LED=m
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1574,7 +1570,6 @@ CONFIG_USB_LED=m
 # CONFIG_USB_IOWARRIOR is not set
 CONFIG_USB_TEST=m
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 CONFIG_USB_ATM=m
 CONFIG_USB_SPEEDTOUCH=m
 # CONFIG_USB_CXACRU is not set
@@ -1611,6 +1606,7 @@ CONFIG_INFINIBAND_SRP=m
 # CONFIG_EDAC is not set
 # CONFIG_RTC_CLASS is not set
 CONFIG_DMADEVICES=y
+# CONFIG_DMADEVICES_DEBUG is not set
 
 #
 # DMA Devices
@@ -1714,6 +1710,7 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=m
 # CONFIG_SQUASHFS is not set
 CONFIG_VXFS_FS=m
@@ -1742,6 +1739,7 @@ CONFIG_SUNRPC_XPRT_RDMA=m
 CONFIG_RPCSEC_GSS_KRB5=y
 CONFIG_RPCSEC_GSS_SPKM3=m
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 CONFIG_CIFS=m
 # CONFIG_CIFS_STATS is not set
 # CONFIG_CIFS_WEAK_PW_HASH is not set
@@ -1817,7 +1815,7 @@ CONFIG_NLS_KOI8_R=m
 CONFIG_NLS_KOI8_U=m
 CONFIG_NLS_UTF8=m
 # CONFIG_DLM is not set
-CONFIG_BINARY_PRINTF=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
@@ -1833,9 +1831,11 @@ CONFIG_CRC32=y
 CONFIG_LIBCRC32C=m
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_DECOMPRESS=y
 CONFIG_DECOMPRESS_GZIP=y
 CONFIG_DECOMPRESS_BZIP2=y
 CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_LZO=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
@@ -1880,7 +1880,6 @@ CONFIG_DEBUG_SPINLOCK=y
 # CONFIG_LOCK_STAT is not set
 CONFIG_DEBUG_SPINLOCK_SLEEP=y
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
-CONFIG_STACKTRACE=y
 # CONFIG_DEBUG_KOBJECT is not set
 CONFIG_DEBUG_HIGHMEM=y
 CONFIG_DEBUG_BUGVERBOSE=y
@@ -1903,16 +1902,12 @@ CONFIG_DEBUG_MEMORY_INIT=y
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 # CONFIG_DEBUG_PAGEALLOC is not set
-CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_RING_BUFFER=y
-CONFIG_EVENT_TRACING=y
-CONFIG_CONTEXT_SWITCH_TRACER=y
 CONFIG_RING_BUFFER_ALLOW_SWAP=y
-CONFIG_TRACING=y
 CONFIG_TRACING_SUPPORT=y
 CONFIG_FTRACE=y
 # CONFIG_FUNCTION_TRACER is not set
diff --git a/arch/powerpc/configs/ep8248e_defconfig b/arch/powerpc/configs/ep8248e_defconfig
index 79105413884..81e904e9f39 100644
--- a/arch/powerpc/configs/ep8248e_defconfig
+++ b/arch/powerpc/configs/ep8248e_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:23:59 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:24 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -298,6 +298,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
 CONFIG_PPC_PCI_CHOICE=y
@@ -308,7 +309,6 @@ CONFIG_PCI_8260=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_DEBUG is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
@@ -335,7 +335,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -537,6 +536,8 @@ CONFIG_MTD_PHYSMAP_OF=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_MDIO=y
@@ -566,6 +567,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -671,6 +673,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -683,6 +687,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -737,6 +742,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_SERIAL_CPM=y
 CONFIG_SERIAL_CPM_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -765,7 +771,9 @@ CONFIG_GPIOLIB=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 # CONFIG_GPIO_XILINX is not set
+# CONFIG_GPIO_SCH is not set
 
 #
 # I2C GPIO expanders:
@@ -804,6 +812,8 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_TIMBERDALE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -812,6 +822,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -869,6 +880,7 @@ CONFIG_AUTOFS4_FS=y
 #
 # Caches
 #
+# CONFIG_FSCACHE is not set
 
 #
 # CD-ROM/DVD Filesystems
diff --git a/arch/powerpc/configs/ep88xc_defconfig b/arch/powerpc/configs/ep88xc_defconfig
index 58f7ca71a59..c5af46ef5f4 100644
--- a/arch/powerpc/configs/ep88xc_defconfig
+++ b/arch/powerpc/configs/ep88xc_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:00 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:24 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -90,11 +90,6 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -306,6 +301,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_FSL_SOC=y
 # CONFIG_PCI is not set
 # CONFIG_PCI_DOMAINS is not set
@@ -335,7 +331,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
@@ -504,6 +499,8 @@ CONFIG_MTD_PHYSMAP_OF=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_MDIO=y
 # CONFIG_PARPORT is not set
@@ -515,6 +512,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -616,6 +614,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_SERIAL_CPM=y
 CONFIG_SERIAL_CPM_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -753,6 +752,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS2_FS is not set
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=y
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -777,6 +777,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/linkstation_defconfig b/arch/powerpc/configs/linkstation_defconfig
index 9a0c981277e..588a2add393 100644
--- a/arch/powerpc/configs/linkstation_defconfig
+++ b/arch/powerpc/configs/linkstation_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:01 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:25 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -96,11 +96,6 @@ CONFIG_RCU_FANOUT=32
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -116,6 +111,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 CONFIG_RD_BZIP2=y
 CONFIG_RD_LZMA=y
+CONFIG_RD_LZO=y
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -328,6 +324,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -337,7 +334,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_DEBUG is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
@@ -364,7 +360,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -433,6 +428,7 @@ CONFIG_NF_CONNTRACK_TFTP=m
 CONFIG_NETFILTER_XTABLES=m
 # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
 # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
+# CONFIG_NETFILTER_XT_TARGET_CT is not set
 # CONFIG_NETFILTER_XT_TARGET_DSCP is not set
 CONFIG_NETFILTER_XT_TARGET_HL=m
 # CONFIG_NETFILTER_XT_TARGET_MARK is not set
@@ -665,6 +661,8 @@ CONFIG_MTD_PHYSMAP=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 # CONFIG_PARPORT is not set
@@ -700,6 +698,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -717,6 +716,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -840,6 +840,7 @@ CONFIG_ATA_SFF=y
 CONFIG_PATA_IT821X=y
 # CONFIG_PATA_IT8213 is not set
 # CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_LEGACY is not set
 # CONFIG_PATA_TRIFLEX is not set
 # CONFIG_PATA_MARVELL is not set
 # CONFIG_PATA_MPIIX is not set
@@ -954,6 +955,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -966,6 +969,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -1082,6 +1086,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -1131,6 +1136,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -1144,15 +1150,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -1178,10 +1178,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -1218,6 +1219,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1246,18 +1248,21 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1266,6 +1271,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -1417,6 +1423,7 @@ CONFIG_USB_SERIAL_FTDI_SIO=y
 # CONFIG_USB_SERIAL_NAVMAN is not set
 # CONFIG_USB_SERIAL_PL2303 is not set
 # CONFIG_USB_SERIAL_OTI6858 is not set
+# CONFIG_USB_SERIAL_QCAUX is not set
 # CONFIG_USB_SERIAL_QUALCOMM is not set
 # CONFIG_USB_SERIAL_SPCP8X5 is not set
 # CONFIG_USB_SERIAL_HP4X is not set
@@ -1430,6 +1437,7 @@ CONFIG_USB_SERIAL_FTDI_SIO=y
 # CONFIG_USB_SERIAL_OPTION is not set
 # CONFIG_USB_SERIAL_OMNINET is not set
 # CONFIG_USB_SERIAL_OPTICON is not set
+# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set
 # CONFIG_USB_SERIAL_DEBUG is not set
 
 #
@@ -1442,7 +1450,6 @@ CONFIG_USB_SERIAL_FTDI_SIO=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1455,7 +1462,6 @@ CONFIG_USB_SERIAL_FTDI_SIO=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1620,6 +1626,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS2_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1651,6 +1658,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 CONFIG_CIFS=m
 # CONFIG_CIFS_STATS is not set
 # CONFIG_CIFS_WEAK_PW_HASH is not set
@@ -1723,9 +1731,11 @@ CONFIG_CRC32=y
 CONFIG_LIBCRC32C=m
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=m
+CONFIG_LZO_DECOMPRESS=y
 CONFIG_DECOMPRESS_GZIP=y
 CONFIG_DECOMPRESS_BZIP2=y
 CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_LZO=y
 CONFIG_TEXTSEARCH=y
 CONFIG_TEXTSEARCH_KMP=m
 CONFIG_HAS_IOMEM=y
diff --git a/arch/powerpc/configs/mgcoge_defconfig b/arch/powerpc/configs/mgcoge_defconfig
index 4c2c877f936..0cbd56fe2e1 100644
--- a/arch/powerpc/configs/mgcoge_defconfig
+++ b/arch/powerpc/configs/mgcoge_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:02 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:26 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -105,6 +105,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -311,6 +312,7 @@ CONFIG_ISA_DMA_API=y
 #
 # CONFIG_ISA is not set
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
 CONFIG_PPC_PCI_CHOICE=y
@@ -321,7 +323,6 @@ CONFIG_PCI_8260=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_DEBUG is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
@@ -348,7 +349,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -536,6 +536,8 @@ CONFIG_MTD_PHYSMAP_OF=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_I2C=y
@@ -570,6 +572,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -704,6 +707,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_SERIAL_CPM=y
 CONFIG_SERIAL_CPM_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -769,14 +773,9 @@ CONFIG_I2C_CPM=y
 # Other I2C/SMBus bus drivers
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
-
-#
-# Miscellaneous I2C Chip support
-#
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -790,14 +789,18 @@ CONFIG_GPIOLIB=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 # CONFIG_GPIO_XILINX is not set
+# CONFIG_GPIO_SCH is not set
 
 #
 # I2C GPIO expanders:
 #
+# CONFIG_GPIO_MAX7300 is not set
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -829,19 +832,24 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
 # CONFIG_TPS65010 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_MFD_TIMBERDALE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -850,6 +858,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -908,6 +917,7 @@ CONFIG_AUTOFS4_FS=y
 #
 # Caches
 #
+# CONFIG_FSCACHE is not set
 
 #
 # CD-ROM/DVD Filesystems
@@ -1100,6 +1110,7 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_LKDTM is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
diff --git a/arch/powerpc/configs/mgsuvd_defconfig b/arch/powerpc/configs/mgsuvd_defconfig
index 9e090f2c7e3..c1be2615102 100644
--- a/arch/powerpc/configs/mgsuvd_defconfig
+++ b/arch/powerpc/configs/mgsuvd_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:03 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:27 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -89,11 +89,6 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=17
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -104,6 +99,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -309,6 +305,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_FSL_SOC=y
 # CONFIG_PCI is not set
 # CONFIG_PCI_DOMAINS is not set
@@ -337,7 +334,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -515,6 +511,8 @@ CONFIG_MTD_PHYSMAP_OF=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_MDIO=y
 # CONFIG_PARPORT is not set
@@ -542,6 +540,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -643,6 +642,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_SERIAL_CPM=y
 CONFIG_SERIAL_CPM_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -801,6 +801,7 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=y
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -825,6 +826,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
@@ -892,6 +894,7 @@ CONFIG_DEBUG_FS=y
 # CONFIG_DEBUG_KERNEL is not set
 # CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LKDTM is not set
 # CONFIG_LATENCYTOP is not set
 # CONFIG_SYSCTL_SYSCALL_CHECK is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
diff --git a/arch/powerpc/configs/mpc5200_defconfig b/arch/powerpc/configs/mpc5200_defconfig
index 61cf73d0000..7012ac0134f 100644
--- a/arch/powerpc/configs/mpc5200_defconfig
+++ b/arch/powerpc/configs/mpc5200_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc2
-# Wed Dec 30 15:08:52 2009
+# Linux kernel version: 2.6.34-rc1
+# Wed Mar 10 14:38:54 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -96,30 +96,37 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_GROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_RELAY is not set
-# CONFIG_NAMESPACES is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
-# CONFIG_RD_BZIP2 is not set
-# CONFIG_RD_LZMA is not set
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_LZO=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
-CONFIG_EMBEDDED=y
-# CONFIG_SYSCTL_SYSCALL is not set
-# CONFIG_KALLSYMS is not set
+# CONFIG_EMBEDDED is not set
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 CONFIG_ELF_CORE=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
+CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
@@ -141,6 +148,7 @@ CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
 CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
 CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
 CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
@@ -320,6 +328,7 @@ CONFIG_SUSPEND=y
 CONFIG_SUSPEND_FREEZER=y
 # CONFIG_HIBERNATION is not set
 # CONFIG_PM_RUNTIME is not set
+CONFIG_PM_OPS=y
 CONFIG_SECCOMP=y
 CONFIG_ISA_DMA_API=y
 
@@ -336,7 +345,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-CONFIG_PCI_LEGACY=y
 # CONFIG_PCI_DEBUG is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
@@ -363,7 +371,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=m
@@ -454,7 +461,9 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_DEBUG_DRIVER is not set
 # CONFIG_DEBUG_DEVRES is not set
 # CONFIG_SYS_HYPERVISOR is not set
@@ -554,6 +563,8 @@ CONFIG_MTD_UBI_BEB_RESERVE=1
 # UBI debugging options
 #
 # CONFIG_MTD_UBI_DEBUG is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_I2C=y
@@ -732,6 +743,7 @@ CONFIG_ATA_SFF=y
 # CONFIG_PATA_IT821X is not set
 # CONFIG_PATA_IT8213 is not set
 # CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_LEGACY is not set
 # CONFIG_PATA_TRIFLEX is not set
 # CONFIG_PATA_MARVELL is not set
 CONFIG_PATA_MPC52xx=y
@@ -770,7 +782,7 @@ CONFIG_PATA_PLATFORM=y
 #
 
 #
-# See the help texts for more information.
+# The newer stack is recommended.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
@@ -929,6 +941,7 @@ CONFIG_SERIAL_MPC52xx=y
 CONFIG_SERIAL_MPC52xx_CONSOLE=y
 CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD=115200
 # CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -981,6 +994,7 @@ CONFIG_I2C_ALGOBIT=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -1010,9 +1024,9 @@ CONFIG_SPI_MASTER=y
 #
 # SPI Master Controller Drivers
 #
-# CONFIG_SPI_BITBANG is not set
-# CONFIG_SPI_GPIO is not set
-# CONFIG_SPI_MPC52xx is not set
+CONFIG_SPI_BITBANG=m
+CONFIG_SPI_GPIO=m
+CONFIG_SPI_MPC52xx=m
 CONFIG_SPI_MPC52xx_PSC=m
 # CONFIG_SPI_XILINX is not set
 # CONFIG_SPI_DESIGNWARE is not set
@@ -1036,14 +1050,18 @@ CONFIG_GPIOLIB=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 # CONFIG_GPIO_XILINX is not set
+# CONFIG_GPIO_SCH is not set
 
 #
 # I2C GPIO expanders:
 #
+# CONFIG_GPIO_MAX7300 is not set
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -1080,10 +1098,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -1123,6 +1142,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1147,6 +1167,7 @@ CONFIG_WATCHDOG=y
 # Watchdog Device Drivers
 #
 # CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_MAX63XX_WATCHDOG is not set
 # CONFIG_ALIM7101_WDT is not set
 # CONFIG_MPC5200_WDT is not set
 # CONFIG_WATCHDOG_RTAS is not set
@@ -1172,22 +1193,27 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
 # CONFIG_TPS65010 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_MFD_MC13783 is not set
 # CONFIG_AB3100_CORE is not set
 # CONFIG_EZX_PCAP is not set
-# CONFIG_MFD_88PM8607 is not set
 # CONFIG_AB4500_CORE is not set
+# CONFIG_MFD_TIMBERDALE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1196,6 +1222,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 CONFIG_DRM=y
 # CONFIG_DRM_TDFX is not set
 # CONFIG_DRM_R128 is not set
@@ -1309,32 +1336,46 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
+# CONFIG_HID_3M_PCT is not set
 CONFIG_HID_A4TECH=y
-# CONFIG_HID_APPLE is not set
+CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
 CONFIG_HID_CHERRY=y
-# CONFIG_HID_CHICONY is not set
+CONFIG_HID_CHICONY=y
 CONFIG_HID_CYPRESS=y
-# CONFIG_HID_DRAGONRISE is not set
+CONFIG_HID_DRAGONRISE=y
+# CONFIG_DRAGONRISE_FF is not set
 CONFIG_HID_EZKEY=y
-# CONFIG_HID_KYE is not set
-# CONFIG_HID_GYRATION is not set
-# CONFIG_HID_TWINHAN is not set
-# CONFIG_HID_KENSINGTON is not set
-# CONFIG_HID_LOGITECH is not set
-# CONFIG_HID_MICROSOFT is not set
-# CONFIG_HID_MONTEREY is not set
+CONFIG_HID_KYE=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_TWINHAN=y
+CONFIG_HID_KENSINGTON=y
+CONFIG_HID_LOGITECH=y
+# CONFIG_LOGITECH_FF is not set
+# CONFIG_LOGIRUMBLEPAD2_FF is not set
+# CONFIG_LOGIG940_FF is not set
+CONFIG_HID_MICROSOFT=y
+# CONFIG_HID_MOSART is not set
+CONFIG_HID_MONTEREY=y
 # CONFIG_HID_NTRIG is not set
-# CONFIG_HID_PANTHERLORD is not set
-# CONFIG_HID_PETALYNX is not set
-# CONFIG_HID_SAMSUNG is not set
-# CONFIG_HID_SONY is not set
-# CONFIG_HID_SUNPLUS is not set
-# CONFIG_HID_GREENASIA is not set
-# CONFIG_HID_SMARTJOYPLUS is not set
-# CONFIG_HID_TOPSEED is not set
-# CONFIG_HID_THRUSTMASTER is not set
-# CONFIG_HID_ZEROPLUS is not set
+CONFIG_HID_ORTEK=y
+CONFIG_HID_PANTHERLORD=y
+# CONFIG_PANTHERLORD_FF is not set
+CONFIG_HID_PETALYNX=y
+# CONFIG_HID_QUANTA is not set
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+# CONFIG_HID_STANTUM is not set
+CONFIG_HID_SUNPLUS=y
+CONFIG_HID_GREENASIA=y
+# CONFIG_GREENASIA_FF is not set
+CONFIG_HID_SMARTJOYPLUS=y
+# CONFIG_SMARTJOYPLUS_FF is not set
+CONFIG_HID_TOPSEED=y
+CONFIG_HID_THRUSTMASTER=y
+# CONFIG_THRUSTMASTER_FF is not set
+CONFIG_HID_ZEROPLUS=y
+# CONFIG_ZEROPLUS_FF is not set
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB_ARCH_HAS_OHCI=y
@@ -1349,10 +1390,7 @@ CONFIG_USB=y
 CONFIG_USB_DEVICEFS=y
 # CONFIG_USB_DEVICE_CLASS is not set
 # CONFIG_USB_DYNAMIC_MINORS is not set
-# CONFIG_USB_SUSPEND is not set
 # CONFIG_USB_OTG is not set
-# CONFIG_USB_OTG_WHITELIST is not set
-# CONFIG_USB_OTG_BLACKLIST_HUB is not set
 CONFIG_USB_MON=y
 # CONFIG_USB_WUSB is not set
 # CONFIG_USB_WUSB_CBAF is not set
@@ -1433,7 +1471,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1445,7 +1482,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1636,6 +1672,7 @@ CONFIG_UBIFS_FS=m
 CONFIG_UBIFS_FS_LZO=y
 CONFIG_UBIFS_FS_ZLIB=y
 # CONFIG_UBIFS_FS_DEBUG is not set
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=y
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1730,8 +1767,11 @@ CONFIG_CRC32=y
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=y
 CONFIG_LZO_COMPRESS=m
-CONFIG_LZO_DECOMPRESS=m
+CONFIG_LZO_DECOMPRESS=y
 CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_LZO=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
@@ -1776,11 +1816,11 @@ CONFIG_SCHED_DEBUG=y
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
 # CONFIG_DEBUG_KOBJECT is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_VM is not set
 # CONFIG_DEBUG_WRITECOUNT is not set
-# CONFIG_DEBUG_MEMORY_INIT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_NOTIFIERS is not set
diff --git a/arch/powerpc/configs/mpc7448_hpc2_defconfig b/arch/powerpc/configs/mpc7448_hpc2_defconfig
index 1315b775a6d..27c63ceeb45 100644
--- a/arch/powerpc/configs/mpc7448_hpc2_defconfig
+++ b/arch/powerpc/configs/mpc7448_hpc2_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:04 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:28 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -94,11 +94,6 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -109,6 +104,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -311,6 +307,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 # CONFIG_PPC_INDIRECT_PCI is not set
 CONFIG_PCI=y
@@ -319,7 +316,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_PCCARD is not set
@@ -345,7 +341,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=y
@@ -440,6 +435,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 # CONFIG_MTD is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_MDIO=y
 # CONFIG_PARPORT is not set
@@ -484,6 +481,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -605,6 +603,7 @@ CONFIG_SATA_MV=y
 # CONFIG_PATA_IT821X is not set
 # CONFIG_PATA_IT8213 is not set
 # CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_LEGACY is not set
 # CONFIG_PATA_TRIFLEX is not set
 # CONFIG_PATA_MARVELL is not set
 # CONFIG_PATA_MPIIX is not set
@@ -696,6 +695,7 @@ CONFIG_NET_PCI=y
 # CONFIG_PCNET32 is not set
 # CONFIG_AMD8111_ETH is not set
 # CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_KSZ884X_PCI is not set
 # CONFIG_B44 is not set
 # CONFIG_FORCEDETH is not set
 CONFIG_E100=y
@@ -750,6 +750,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -762,6 +764,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -846,6 +849,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -910,6 +914,7 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -918,6 +923,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=y
@@ -1044,6 +1050,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1066,6 +1073,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/mpc8272_ads_defconfig b/arch/powerpc/configs/mpc8272_ads_defconfig
index 9073778d357..6875fb89377 100644
--- a/arch/powerpc/configs/mpc8272_ads_defconfig
+++ b/arch/powerpc/configs/mpc8272_ads_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:05 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:29 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -96,8 +96,7 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 # CONFIG_BLK_DEV_INITRD is not set
@@ -301,6 +300,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
 CONFIG_PPC_PCI_CHOICE=y
@@ -311,7 +311,6 @@ CONFIG_PCI_8260=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_DEBUG is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
@@ -338,7 +337,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -540,6 +538,8 @@ CONFIG_MTD_PHYSMAP_OF=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_MDIO=y
@@ -569,6 +569,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -674,6 +675,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -686,6 +689,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -797,6 +801,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_SERIAL_CPM=y
 CONFIG_SERIAL_CPM_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -825,7 +830,9 @@ CONFIG_GPIOLIB=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 # CONFIG_GPIO_XILINX is not set
+# CONFIG_GPIO_SCH is not set
 
 #
 # I2C GPIO expanders:
@@ -864,6 +871,8 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_TIMBERDALE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -872,6 +881,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -933,6 +943,7 @@ CONFIG_AUTOFS4_FS=y
 #
 # Caches
 #
+# CONFIG_FSCACHE is not set
 
 #
 # CD-ROM/DVD Filesystems
diff --git a/arch/powerpc/configs/mpc83xx_defconfig b/arch/powerpc/configs/mpc83xx_defconfig
index 05bec483568..bbe5ae61d97 100644
--- a/arch/powerpc/configs/mpc83xx_defconfig
+++ b/arch/powerpc/configs/mpc83xx_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:06 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:30 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -98,14 +98,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -113,6 +107,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -126,7 +121,7 @@ CONFIG_BUG=y
 CONFIG_ELF_CORE=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
+CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
@@ -331,6 +326,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -344,7 +340,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_PCCARD is not set
@@ -370,7 +365,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=m
@@ -560,6 +554,8 @@ CONFIG_MTD_NAND_FSL_ELBC=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_I2C=y
@@ -597,6 +593,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -614,6 +611,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -712,7 +710,7 @@ CONFIG_ATA_SFF=y
 # CONFIG_SATA_QSTOR is not set
 # CONFIG_SATA_PROMISE is not set
 # CONFIG_SATA_SX4 is not set
-# CONFIG_SATA_SIL is not set
+CONFIG_SATA_SIL=y
 # CONFIG_SATA_SIS is not set
 # CONFIG_SATA_ULI is not set
 # CONFIG_SATA_VIA is not set
@@ -737,6 +735,7 @@ CONFIG_ATA_SFF=y
 # CONFIG_PATA_IT821X is not set
 # CONFIG_PATA_IT8213 is not set
 # CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_LEGACY is not set
 # CONFIG_PATA_TRIFLEX is not set
 # CONFIG_PATA_MARVELL is not set
 # CONFIG_PATA_MPIIX is not set
@@ -863,6 +862,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -875,6 +876,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -970,6 +972,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
 # CONFIG_SERIAL_QE is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -980,8 +983,6 @@ CONFIG_LEGACY_PTY_COUNT=256
 CONFIG_HW_RANDOM=y
 # CONFIG_HW_RANDOM_TIMERIOMEM is not set
 # CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
 # CONFIG_R3964 is not set
 # CONFIG_APPLICOM is not set
 # CONFIG_RAW_DRIVER is not set
@@ -1022,6 +1023,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -1035,15 +1037,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -1058,14 +1054,18 @@ CONFIG_GPIOLIB=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 # CONFIG_GPIO_XILINX is not set
+# CONFIG_GPIO_SCH is not set
 
 #
 # I2C GPIO expanders:
 #
+# CONFIG_GPIO_MAX7300 is not set
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -1098,10 +1098,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -1139,6 +1140,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1186,19 +1188,24 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
 # CONFIG_TPS65010 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_MFD_TIMBERDALE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1207,6 +1214,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -1232,6 +1240,7 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
+# CONFIG_HID_3M_PCT is not set
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
@@ -1247,14 +1256,19 @@ CONFIG_HID_GYRATION=y
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
+# CONFIG_LOGIG940_FF is not set
 CONFIG_HID_MICROSOFT=y
+# CONFIG_HID_MOSART is not set
 CONFIG_HID_MONTEREY=y
 # CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
 CONFIG_HID_PANTHERLORD=y
 # CONFIG_PANTHERLORD_FF is not set
 CONFIG_HID_PETALYNX=y
+# CONFIG_HID_QUANTA is not set
 CONFIG_HID_SAMSUNG=y
 CONFIG_HID_SONY=y
+# CONFIG_HID_STANTUM is not set
 CONFIG_HID_SUNPLUS=y
 # CONFIG_HID_GREENASIA is not set
 # CONFIG_HID_SMARTJOYPLUS is not set
@@ -1344,7 +1358,6 @@ CONFIG_USB_EHCI_HCD_PPC_OF=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1357,7 +1370,6 @@ CONFIG_USB_EHCI_HCD_PPC_OF=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1372,7 +1384,65 @@ CONFIG_USB_EHCI_HCD_PPC_OF=y
 # CONFIG_ACCESSIBILITY is not set
 # CONFIG_INFINIBAND is not set
 # CONFIG_EDAC is not set
-# CONFIG_RTC_CLASS is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+CONFIG_RTC_DRV_DS1307=y
+CONFIG_RTC_DRV_DS1374=y
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_GENERIC is not set
 # CONFIG_DMADEVICES is not set
 # CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
@@ -1453,6 +1523,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS2_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1479,6 +1550,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig
index 8f35f8049c9..cfebef9f912 100644
--- a/arch/powerpc/configs/mpc85xx_defconfig
+++ b/arch/powerpc/configs/mpc85xx_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:06 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:31 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -68,6 +68,10 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
 # CONFIG_PPC_DCR_NATIVE is not set
 # CONFIG_PPC_DCR_MMIO is not set
 CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_PPC_ADV_DEBUG_REGS=y
+CONFIG_PPC_ADV_DEBUG_IACS=2
+CONFIG_PPC_ADV_DEBUG_DACS=2
+CONFIG_PPC_ADV_DEBUG_DVCS=0
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 CONFIG_CONSTRUCTORS=y
 
@@ -103,14 +107,8 @@ CONFIG_RCU_FANOUT=32
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -118,6 +116,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -334,6 +333,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -345,7 +345,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 CONFIG_PCI_MSI=y
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_DEBUG is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
@@ -376,7 +375,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=y
@@ -509,6 +507,8 @@ CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 # CONFIG_MTD is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_I2C=y
@@ -546,6 +546,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -563,6 +564,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -687,6 +689,7 @@ CONFIG_PATA_ALI=y
 # CONFIG_PATA_IT821X is not set
 # CONFIG_PATA_IT8213 is not set
 # CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_LEGACY is not set
 # CONFIG_PATA_TRIFLEX is not set
 # CONFIG_PATA_MARVELL is not set
 # CONFIG_PATA_MPIIX is not set
@@ -817,8 +820,11 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
+# CONFIG_IXGBEVF is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
 # CONFIG_VXGE is not set
@@ -829,6 +835,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -941,6 +948,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
 CONFIG_SERIAL_QE=m
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -993,6 +1001,7 @@ CONFIG_I2C_CPM=m
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -1006,15 +1015,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -1030,14 +1033,18 @@ CONFIG_GPIOLIB=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 # CONFIG_GPIO_XILINX is not set
+# CONFIG_GPIO_SCH is not set
 
 #
 # I2C GPIO expanders:
 #
+# CONFIG_GPIO_MAX7300 is not set
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -1069,20 +1076,25 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
 # CONFIG_UCB1400_CORE is not set
 # CONFIG_TPS65010 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_MFD_TIMBERDALE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1091,6 +1103,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=y
@@ -1208,6 +1221,7 @@ CONFIG_SND_INTEL8X0=y
 CONFIG_SND_PPC=y
 CONFIG_SND_USB=y
 # CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_UA101 is not set
 # CONFIG_SND_USB_USX2Y is not set
 # CONFIG_SND_USB_CAIAQ is not set
 # CONFIG_SND_SOC is not set
@@ -1227,6 +1241,7 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
+# CONFIG_HID_3M_PCT is not set
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
@@ -1242,14 +1257,19 @@ CONFIG_HID_GYRATION=y
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
+# CONFIG_LOGIG940_FF is not set
 CONFIG_HID_MICROSOFT=y
+# CONFIG_HID_MOSART is not set
 CONFIG_HID_MONTEREY=y
 # CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
 CONFIG_HID_PANTHERLORD=y
 # CONFIG_PANTHERLORD_FF is not set
 CONFIG_HID_PETALYNX=y
+# CONFIG_HID_QUANTA is not set
 CONFIG_HID_SAMSUNG=y
 CONFIG_HID_SONY=y
+# CONFIG_HID_STANTUM is not set
 CONFIG_HID_SUNPLUS=y
 # CONFIG_HID_GREENASIA is not set
 # CONFIG_HID_SMARTJOYPLUS is not set
@@ -1358,7 +1378,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1371,7 +1390,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1452,6 +1470,7 @@ CONFIG_RTC_DRV_CMOS=y
 #
 # CONFIG_RTC_DRV_GENERIC is not set
 CONFIG_DMADEVICES=y
+# CONFIG_DMADEVICES_DEBUG is not set
 
 #
 # DMA Devices
@@ -1554,6 +1573,7 @@ CONFIG_BEFS_FS=m
 # CONFIG_BEFS_DEBUG is not set
 CONFIG_BFS_FS=m
 CONFIG_EFS_FS=m
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=y
 # CONFIG_SQUASHFS is not set
 CONFIG_VXFS_FS=m
@@ -1585,6 +1605,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
@@ -1730,6 +1751,7 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_LKDTM is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
diff --git a/arch/powerpc/configs/mpc85xx_smp_defconfig b/arch/powerpc/configs/mpc85xx_smp_defconfig
index 8755ea3c7f5..f5451d80f19 100644
--- a/arch/powerpc/configs/mpc85xx_smp_defconfig
+++ b/arch/powerpc/configs/mpc85xx_smp_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:07 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:31 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -69,6 +69,10 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
 # CONFIG_PPC_DCR_NATIVE is not set
 # CONFIG_PPC_DCR_MMIO is not set
 CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_PPC_ADV_DEBUG_REGS=y
+CONFIG_PPC_ADV_DEBUG_IACS=2
+CONFIG_PPC_ADV_DEBUG_DACS=2
+CONFIG_PPC_ADV_DEBUG_DVCS=0
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 CONFIG_CONSTRUCTORS=y
 
@@ -100,18 +104,13 @@ CONFIG_TREE_RCU=y
 # CONFIG_RCU_TRACE is not set
 CONFIG_RCU_FANOUT=32
 # CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_RCU_FAST_NO_HZ is not set
 # CONFIG_TREE_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -119,6 +118,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -338,6 +338,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -349,7 +350,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 CONFIG_PCI_MSI=y
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_DEBUG is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
@@ -380,7 +380,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=y
@@ -513,6 +512,8 @@ CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 # CONFIG_MTD is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_I2C=y
@@ -550,6 +551,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -567,6 +569,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -691,6 +694,7 @@ CONFIG_PATA_ALI=y
 # CONFIG_PATA_IT821X is not set
 # CONFIG_PATA_IT8213 is not set
 # CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_LEGACY is not set
 # CONFIG_PATA_TRIFLEX is not set
 # CONFIG_PATA_MARVELL is not set
 # CONFIG_PATA_MPIIX is not set
@@ -821,8 +825,11 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
+# CONFIG_IXGBEVF is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
 # CONFIG_VXGE is not set
@@ -833,6 +840,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -945,6 +953,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
 CONFIG_SERIAL_QE=m
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -997,6 +1006,7 @@ CONFIG_I2C_CPM=m
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -1010,15 +1020,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -1034,14 +1038,18 @@ CONFIG_GPIOLIB=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 # CONFIG_GPIO_XILINX is not set
+# CONFIG_GPIO_SCH is not set
 
 #
 # I2C GPIO expanders:
 #
+# CONFIG_GPIO_MAX7300 is not set
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -1073,20 +1081,25 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
 # CONFIG_UCB1400_CORE is not set
 # CONFIG_TPS65010 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_MFD_TIMBERDALE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1095,6 +1108,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=y
@@ -1212,6 +1226,7 @@ CONFIG_SND_INTEL8X0=y
 CONFIG_SND_PPC=y
 CONFIG_SND_USB=y
 # CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_UA101 is not set
 # CONFIG_SND_USB_USX2Y is not set
 # CONFIG_SND_USB_CAIAQ is not set
 # CONFIG_SND_SOC is not set
@@ -1231,6 +1246,7 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
+# CONFIG_HID_3M_PCT is not set
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
@@ -1246,14 +1262,19 @@ CONFIG_HID_GYRATION=y
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
+# CONFIG_LOGIG940_FF is not set
 CONFIG_HID_MICROSOFT=y
+# CONFIG_HID_MOSART is not set
 CONFIG_HID_MONTEREY=y
 # CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
 CONFIG_HID_PANTHERLORD=y
 # CONFIG_PANTHERLORD_FF is not set
 CONFIG_HID_PETALYNX=y
+# CONFIG_HID_QUANTA is not set
 CONFIG_HID_SAMSUNG=y
 CONFIG_HID_SONY=y
+# CONFIG_HID_STANTUM is not set
 CONFIG_HID_SUNPLUS=y
 # CONFIG_HID_GREENASIA is not set
 # CONFIG_HID_SMARTJOYPLUS is not set
@@ -1362,7 +1383,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1375,7 +1395,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1456,6 +1475,7 @@ CONFIG_RTC_DRV_CMOS=y
 #
 # CONFIG_RTC_DRV_GENERIC is not set
 CONFIG_DMADEVICES=y
+# CONFIG_DMADEVICES_DEBUG is not set
 
 #
 # DMA Devices
@@ -1558,6 +1578,7 @@ CONFIG_BEFS_FS=m
 # CONFIG_BEFS_DEBUG is not set
 CONFIG_BFS_FS=m
 CONFIG_EFS_FS=m
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=y
 # CONFIG_SQUASHFS is not set
 CONFIG_VXFS_FS=m
@@ -1589,6 +1610,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
@@ -1734,6 +1756,7 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_LKDTM is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
@@ -1806,6 +1829,7 @@ CONFIG_CRYPTO_MANAGER=y
 CONFIG_CRYPTO_MANAGER2=y
 # CONFIG_CRYPTO_GF128MUL is not set
 # CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_PCRYPT is not set
 CONFIG_CRYPTO_WORKQUEUE=y
 # CONFIG_CRYPTO_CRYPTD is not set
 CONFIG_CRYPTO_AUTHENC=y
diff --git a/arch/powerpc/configs/mpc866_ads_defconfig b/arch/powerpc/configs/mpc866_ads_defconfig
index 3f6b11b6f4f..d8d3d1d60c8 100644
--- a/arch/powerpc/configs/mpc866_ads_defconfig
+++ b/arch/powerpc/configs/mpc866_ads_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:08 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:32 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -89,14 +89,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 # CONFIG_BLK_DEV_INITRD is not set
@@ -305,6 +299,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_FSL_SOC=y
 # CONFIG_PCI is not set
 # CONFIG_PCI_DOMAINS is not set
@@ -333,7 +328,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -425,6 +419,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 # CONFIG_MTD is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_MDIO=y
 # CONFIG_PARPORT is not set
@@ -456,6 +452,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -607,6 +604,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_SERIAL_CPM=y
 CONFIG_SERIAL_CPM_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -795,6 +793,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=y
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -819,6 +818,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/mpc86xx_defconfig b/arch/powerpc/configs/mpc86xx_defconfig
index 41884c97a4f..624eae9a7e2 100644
--- a/arch/powerpc/configs/mpc86xx_defconfig
+++ b/arch/powerpc/configs/mpc86xx_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:09 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:33 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -98,18 +98,13 @@ CONFIG_TREE_RCU=y
 # CONFIG_RCU_TRACE is not set
 CONFIG_RCU_FANOUT=32
 # CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_RCU_FAST_NO_HZ is not set
 # CONFIG_TREE_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -117,6 +112,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -328,6 +324,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -339,7 +336,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_DEBUG is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
@@ -367,7 +363,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=y
@@ -500,6 +495,8 @@ CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 # CONFIG_MTD is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_I2C=y
@@ -537,6 +534,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -554,6 +552,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -678,6 +677,7 @@ CONFIG_PATA_ALI=y
 # CONFIG_PATA_IT821X is not set
 # CONFIG_PATA_IT8213 is not set
 # CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_LEGACY is not set
 # CONFIG_PATA_TRIFLEX is not set
 # CONFIG_PATA_MARVELL is not set
 # CONFIG_PATA_MPIIX is not set
@@ -802,6 +802,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -814,6 +816,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -923,6 +926,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -972,6 +976,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -985,15 +990,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -1009,14 +1008,18 @@ CONFIG_GPIOLIB=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 # CONFIG_GPIO_XILINX is not set
+# CONFIG_GPIO_SCH is not set
 
 #
 # I2C GPIO expanders:
 #
+# CONFIG_GPIO_MAX7300 is not set
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -1048,20 +1051,25 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
 # CONFIG_UCB1400_CORE is not set
 # CONFIG_TPS65010 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_MFD_TIMBERDALE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1070,6 +1078,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=y
@@ -1187,6 +1196,7 @@ CONFIG_SND_INTEL8X0=y
 CONFIG_SND_PPC=y
 CONFIG_SND_USB=y
 # CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_UA101 is not set
 # CONFIG_SND_USB_USX2Y is not set
 # CONFIG_SND_USB_CAIAQ is not set
 # CONFIG_SND_SOC is not set
@@ -1206,6 +1216,7 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
+# CONFIG_HID_3M_PCT is not set
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
@@ -1221,14 +1232,19 @@ CONFIG_HID_GYRATION=y
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
+# CONFIG_LOGIG940_FF is not set
 CONFIG_HID_MICROSOFT=y
+# CONFIG_HID_MOSART is not set
 CONFIG_HID_MONTEREY=y
 # CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
 CONFIG_HID_PANTHERLORD=y
 # CONFIG_PANTHERLORD_FF is not set
 CONFIG_HID_PETALYNX=y
+# CONFIG_HID_QUANTA is not set
 CONFIG_HID_SAMSUNG=y
 CONFIG_HID_SONY=y
+# CONFIG_HID_STANTUM is not set
 CONFIG_HID_SUNPLUS=y
 # CONFIG_HID_GREENASIA is not set
 # CONFIG_HID_SMARTJOYPLUS is not set
@@ -1336,7 +1352,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1349,7 +1364,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1512,6 +1526,7 @@ CONFIG_BEFS_FS=m
 # CONFIG_BEFS_DEBUG is not set
 CONFIG_BFS_FS=m
 CONFIG_EFS_FS=m
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=y
 # CONFIG_SQUASHFS is not set
 CONFIG_VXFS_FS=m
@@ -1543,6 +1558,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
@@ -1754,6 +1770,7 @@ CONFIG_CRYPTO_MANAGER=y
 CONFIG_CRYPTO_MANAGER2=y
 # CONFIG_CRYPTO_GF128MUL is not set
 # CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_PCRYPT is not set
 CONFIG_CRYPTO_WORKQUEUE=y
 # CONFIG_CRYPTO_CRYPTD is not set
 # CONFIG_CRYPTO_AUTHENC is not set
diff --git a/arch/powerpc/configs/mpc885_ads_defconfig b/arch/powerpc/configs/mpc885_ads_defconfig
index 6b9e6bd2c98..45bd499630d 100644
--- a/arch/powerpc/configs/mpc885_ads_defconfig
+++ b/arch/powerpc/configs/mpc885_ads_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:10 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:34 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -90,14 +90,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 # CONFIG_BLK_DEV_INITRD is not set
@@ -313,6 +307,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_FSL_SOC=y
 # CONFIG_PCI is not set
 # CONFIG_PCI_DOMAINS is not set
@@ -342,7 +337,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
@@ -515,6 +509,8 @@ CONFIG_MTD_PHYSMAP_OF=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_MDIO=y
 # CONFIG_PARPORT is not set
@@ -526,6 +522,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -627,6 +624,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_SERIAL_CPM=y
 CONFIG_SERIAL_CPM_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -764,6 +762,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS2_FS is not set
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=y
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -788,6 +787,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/powerpc/configs/pq2fads_defconfig b/arch/powerpc/configs/pq2fads_defconfig
index 5d06f2cb8e5..68c175ea427 100644
--- a/arch/powerpc/configs/pq2fads_defconfig
+++ b/arch/powerpc/configs/pq2fads_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:11 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:35 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -105,6 +105,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -304,6 +305,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
 CONFIG_PPC_PCI_CHOICE=y
@@ -315,7 +317,6 @@ CONFIG_PCI_8260=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_DEBUG is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
@@ -342,7 +343,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -544,6 +544,8 @@ CONFIG_MTD_PHYSMAP_OF=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_GPIO=y
 CONFIG_OF_MDIO=y
@@ -629,6 +631,7 @@ CONFIG_IDE_PROC_FS=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
@@ -734,6 +737,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -746,6 +751,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -859,6 +865,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_SERIAL_CPM=y
 CONFIG_SERIAL_CPM_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -887,7 +894,9 @@ CONFIG_GPIOLIB=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 # CONFIG_GPIO_XILINX is not set
+# CONFIG_GPIO_SCH is not set
 
 #
 # I2C GPIO expanders:
@@ -926,6 +935,8 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_TIMBERDALE is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -934,6 +945,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=y
@@ -996,6 +1008,7 @@ CONFIG_USB_ETH_RNDIS=y
 # CONFIG_USB_MIDI_GADGET is not set
 # CONFIG_USB_G_PRINTER is not set
 # CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_USB_G_NOKIA is not set
 # CONFIG_USB_G_MULTI is not set
 
 #
@@ -1051,6 +1064,7 @@ CONFIG_AUTOFS4_FS=y
 #
 # Caches
 #
+# CONFIG_FSCACHE is not set
 
 #
 # CD-ROM/DVD Filesystems
diff --git a/arch/powerpc/configs/prpmc2800_defconfig b/arch/powerpc/configs/prpmc2800_defconfig
index 57ab5748a34..93f4505b5ac 100644
--- a/arch/powerpc/configs/prpmc2800_defconfig
+++ b/arch/powerpc/configs/prpmc2800_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:12 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:36 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -97,11 +97,6 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -117,6 +112,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 CONFIG_RD_BZIP2=y
 CONFIG_RD_LZMA=y
+CONFIG_RD_LZO=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -319,6 +315,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_PCI=y
@@ -327,7 +324,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_PCCARD is not set
@@ -354,7 +350,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 CONFIG_XFRM_USER=y
@@ -533,6 +528,8 @@ CONFIG_MTD_PHYSMAP_OF=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 CONFIG_OF_MDIO=y
@@ -569,6 +566,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -640,6 +638,7 @@ CONFIG_BLK_DEV_IDEDMA=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -761,6 +760,7 @@ CONFIG_SATA_MV=y
 # CONFIG_PATA_IT821X is not set
 # CONFIG_PATA_IT8213 is not set
 # CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_LEGACY is not set
 # CONFIG_PATA_TRIFLEX is not set
 # CONFIG_PATA_MARVELL is not set
 # CONFIG_PATA_MPIIX is not set
@@ -854,6 +854,7 @@ CONFIG_NET_PCI=y
 # CONFIG_PCNET32 is not set
 # CONFIG_AMD8111_ETH is not set
 # CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_KSZ884X_PCI is not set
 # CONFIG_B44 is not set
 # CONFIG_FORCEDETH is not set
 CONFIG_E100=y
@@ -907,6 +908,8 @@ CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
 CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
@@ -919,6 +922,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_MLX4_CORE is not set
 # CONFIG_TEHUTI is not set
 # CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
@@ -1016,6 +1020,7 @@ CONFIG_SERIAL_MPSC_CONSOLE=y
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -1065,6 +1070,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MV64XXX=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -1077,15 +1083,9 @@ CONFIG_I2C_MV64XXX=y
 # Other I2C/SMBus bus drivers
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -1111,10 +1111,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -1151,6 +1152,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47M192 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_TMP421 is not set
@@ -1179,18 +1181,21 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1199,6 +1204,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=y
@@ -1231,6 +1237,7 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
+# CONFIG_HID_3M_PCT is not set
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
@@ -1247,14 +1254,19 @@ CONFIG_HID_KENSINGTON=y
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
+# CONFIG_LOGIG940_FF is not set
 CONFIG_HID_MICROSOFT=y
+# CONFIG_HID_MOSART is not set
 CONFIG_HID_MONTEREY=y
 CONFIG_HID_NTRIG=y
+CONFIG_HID_ORTEK=y
 CONFIG_HID_PANTHERLORD=y
 # CONFIG_PANTHERLORD_FF is not set
 CONFIG_HID_PETALYNX=y
+# CONFIG_HID_QUANTA is not set
 CONFIG_HID_SAMSUNG=y
 CONFIG_HID_SONY=y
+# CONFIG_HID_STANTUM is not set
 CONFIG_HID_SUNPLUS=y
 CONFIG_HID_GREENASIA=y
 # CONFIG_GREENASIA_FF is not set
@@ -1350,7 +1362,6 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1363,7 +1374,6 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1516,6 +1526,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS2_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1538,6 +1549,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
@@ -1620,9 +1632,11 @@ CONFIG_CRC32=y
 # CONFIG_CRC7 is not set
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
+CONFIG_LZO_DECOMPRESS=y
 CONFIG_DECOMPRESS_GZIP=y
 CONFIG_DECOMPRESS_BZIP2=y
 CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_LZO=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
diff --git a/arch/powerpc/configs/ps3_defconfig b/arch/powerpc/configs/ps3_defconfig
index 32f7058bb17..3808bc2be86 100644
--- a/arch/powerpc/configs/ps3_defconfig
+++ b/arch/powerpc/configs/ps3_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.31-rc7
-# Mon Aug 24 17:38:50 2009
+# Linux kernel version: 2.6.34-rc4
+# Thu Apr 15 11:32:15 2010
 #
 CONFIG_PPC64=y
 
@@ -9,6 +9,7 @@ CONFIG_PPC64=y
 # Processor support
 #
 CONFIG_PPC_BOOK3S_64=y
+# CONFIG_PPC_BOOK3E_64 is not set
 CONFIG_PPC_BOOK3S=y
 # CONFIG_POWER4_ONLY is not set
 CONFIG_POWER3=y
@@ -35,7 +36,9 @@ CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_HAVE_SETUP_PER_CPU_AREA=y
+CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
 CONFIG_IRQ_PER_CPU=y
+CONFIG_NR_IRQS=512
 CONFIG_STACKTRACE_SUPPORT=y
 CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 CONFIG_TRACE_IRQFLAGS_SUPPORT=y
@@ -60,6 +63,7 @@ CONFIG_AUDIT_ARCH=y
 CONFIG_GENERIC_BUG=y
 CONFIG_DTC=y
 # CONFIG_DEFAULT_UIMAGE is not set
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
 # CONFIG_PPC_DCR_NATIVE is not set
 # CONFIG_PPC_DCR_MMIO is not set
 CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
@@ -86,14 +90,15 @@ CONFIG_POSIX_MQUEUE_SYSCTL=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=64
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=17
-# CONFIG_GROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 # CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
@@ -108,6 +113,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -128,21 +134,19 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
-CONFIG_HAVE_PERF_COUNTERS=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
 # CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_COMPAT_BRK is not set
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
-CONFIG_TRACEPOINTS=y
-CONFIG_MARKERS=y
 CONFIG_OPROFILE=m
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
@@ -154,12 +158,14 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_DMA_ATTRS=y
 CONFIG_USE_GENERIC_SMP_HELPERS=y
+CONFIG_HAVE_DMA_API_DEBUG=y
 
 #
 # GCOV-based kernel profiling
 #
 # CONFIG_GCOV_KERNEL is not set
-# CONFIG_SLOW_WORK is not set
+CONFIG_SLOW_WORK=y
+# CONFIG_SLOW_WORK_DEBUG is not set
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -180,14 +186,41 @@ CONFIG_BLOCK_COMPAT=y
 # IO Schedulers
 #
 CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
 CONFIG_IOSCHED_DEADLINE=y
 CONFIG_IOSCHED_CFQ=y
-CONFIG_DEFAULT_AS=y
 # CONFIG_DEFAULT_DEADLINE is not set
-# CONFIG_DEFAULT_CFQ is not set
+CONFIG_DEFAULT_CFQ=y
 # CONFIG_DEFAULT_NOOP is not set
-CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
 # CONFIG_FREEZER is not set
 
 #
@@ -226,7 +259,6 @@ CONFIG_PPC_CELL=y
 #
 CONFIG_SPU_FS=m
 CONFIG_SPU_FS_64K_LS=y
-# CONFIG_SPU_TRACE is not set
 CONFIG_SPU_BASE=y
 # CONFIG_PQ2ADS is not set
 # CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set
@@ -267,7 +299,6 @@ CONFIG_COMPAT_BINFMT_ELF=y
 # CONFIG_HAVE_AOUT is not set
 CONFIG_BINFMT_MISC=y
 CONFIG_HUGETLB_PAGE_SIZE_VARIABLE=y
-# CONFIG_IOMMU_VMERGE is not set
 CONFIG_IOMMU_HELPER=y
 # CONFIG_SWIOTLB is not set
 CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
@@ -276,12 +307,15 @@ CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
 CONFIG_KEXEC=y
 # CONFIG_CRASH_DUMP is not set
 # CONFIG_IRQ_ALL_CPUS is not set
+CONFIG_SPARSE_IRQ=y
 # CONFIG_NUMA is not set
+CONFIG_MAX_ACTIVE_REGIONS=256
 CONFIG_ARCH_SELECT_MEMORY_MODEL=y
 CONFIG_ARCH_FLATMEM_ENABLE=y
 CONFIG_ARCH_SPARSEMEM_ENABLE=y
 CONFIG_ARCH_SPARSEMEM_DEFAULT=y
 CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SYS_SUPPORTS_HUGETLBFS=y
 CONFIG_SELECT_MEMORY_MODEL=y
 # CONFIG_FLATMEM_MANUAL is not set
 # CONFIG_DISCONTIGMEM_MANUAL is not set
@@ -295,13 +329,12 @@ CONFIG_MEMORY_HOTPLUG=y
 CONFIG_MEMORY_HOTPLUG_SPARSE=y
 # CONFIG_MEMORY_HOTREMOVE is not set
 CONFIG_PAGEFLAGS_EXTENDED=y
-CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_SPLIT_PTLOCK_CPUS=999999
 CONFIG_MIGRATION=y
 CONFIG_PHYS_ADDR_T_64BIT=y
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_BOUNCE=y
-CONFIG_HAVE_MLOCK=y
-CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 CONFIG_ARCH_MEMORY_PROBE=y
 CONFIG_PPC_HAS_HASH_64K=y
@@ -312,11 +345,15 @@ CONFIG_PPC_4K_PAGES=y
 CONFIG_FORCE_MAX_ZONEORDER=13
 CONFIG_SCHED_SMT=y
 CONFIG_PROC_DEVICETREE=y
-# CONFIG_CMDLINE_BOOL is not set
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE=""
 CONFIG_EXTRA_TARGETS=""
 CONFIG_PM=y
 CONFIG_PM_DEBUG=y
+# CONFIG_PM_ADVANCED_DEBUG is not set
 # CONFIG_PM_VERBOSE is not set
+# CONFIG_HIBERNATION is not set
+# CONFIG_PM_RUNTIME is not set
 # CONFIG_SECCOMP is not set
 CONFIG_ISA_DMA_API=y
 
@@ -324,6 +361,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_PCI_CHOICE=y
 # CONFIG_PCI is not set
@@ -337,12 +375,12 @@ CONFIG_PAGE_OFFSET=0xc000000000000000
 CONFIG_KERNEL_START=0xc000000000000000
 CONFIG_PHYSICAL_START=0x00000000
 CONFIG_NET=y
+CONFIG_COMPAT_NETLINK_MESSAGES=y
 
 #
 # Networking options
 #
 CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -392,6 +430,7 @@ CONFIG_INET6_XFRM_MODE_TUNNEL=y
 CONFIG_INET6_XFRM_MODE_BEET=y
 # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
 CONFIG_IPV6_SIT=y
+# CONFIG_IPV6_SIT_6RD is not set
 CONFIG_IPV6_NDISC_NODETYPE=y
 # CONFIG_IPV6_TUNNEL is not set
 # CONFIG_IPV6_MULTIPLE_TABLES is not set
@@ -400,6 +439,7 @@ CONFIG_IPV6_NDISC_NODETYPE=y
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -422,7 +462,6 @@ CONFIG_IPV6_NDISC_NODETYPE=y
 # Network testing
 #
 # CONFIG_NET_PKTGEN is not set
-# CONFIG_NET_DROP_MONITOR is not set
 # CONFIG_HAMRADIO is not set
 # CONFIG_CAN is not set
 # CONFIG_IRDA is not set
@@ -445,27 +484,30 @@ CONFIG_BT_HCIBTUSB=m
 # CONFIG_BT_HCIBPA10X is not set
 # CONFIG_BT_HCIBFUSB is not set
 # CONFIG_BT_HCIVHCI is not set
+# CONFIG_BT_MRVL is not set
+# CONFIG_BT_ATH3K is not set
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WEXT_CORE=y
+CONFIG_WEXT_PROC=y
 CONFIG_CFG80211=m
+# CONFIG_NL80211_TESTMODE is not set
+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
 # CONFIG_CFG80211_REG_DEBUG is not set
+CONFIG_CFG80211_DEFAULT_PS=y
 # CONFIG_CFG80211_DEBUGFS is not set
-# CONFIG_WIRELESS_OLD_REGULATORY is not set
-CONFIG_WIRELESS_EXT=y
+# CONFIG_CFG80211_INTERNAL_REGDB is not set
+CONFIG_CFG80211_WEXT=y
 # CONFIG_WIRELESS_EXT_SYSFS is not set
 # CONFIG_LIB80211 is not set
 CONFIG_MAC80211=m
-CONFIG_MAC80211_DEFAULT_PS=y
-CONFIG_MAC80211_DEFAULT_PS_VALUE=1
-
-#
-# Rate control algorithm selection
-#
 CONFIG_MAC80211_RC_PID=y
 # CONFIG_MAC80211_RC_MINSTREL is not set
 CONFIG_MAC80211_RC_DEFAULT_PID=y
 # CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set
 CONFIG_MAC80211_RC_DEFAULT="pid"
+# CONFIG_MAC80211_MESH is not set
 # CONFIG_MAC80211_LEDS is not set
 # CONFIG_MAC80211_DEBUGFS is not set
 # CONFIG_MAC80211_DEBUG_MENU is not set
@@ -481,6 +523,7 @@ CONFIG_MAC80211_RC_DEFAULT="pid"
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=y
@@ -491,6 +534,8 @@ CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 # CONFIG_MTD is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 # CONFIG_PARPORT is not set
 CONFIG_BLK_DEV=y
@@ -498,6 +543,10 @@ CONFIG_BLK_DEV=y
 # CONFIG_BLK_DEV_COW_COMMON is not set
 CONFIG_BLK_DEV_LOOP=y
 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
 # CONFIG_BLK_DEV_NBD is not set
 # CONFIG_BLK_DEV_UB is not set
 CONFIG_BLK_DEV_RAM=y
@@ -521,6 +570,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -590,30 +640,27 @@ CONFIG_MII=m
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
 # CONFIG_KS8842 is not set
+# CONFIG_KS8851_MLL is not set
 CONFIG_NETDEV_1000=y
 CONFIG_GELIC_NET=y
 CONFIG_GELIC_WIRELESS=y
 # CONFIG_NETDEV_10000 is not set
-
-#
-# Wireless LAN
-#
-# CONFIG_WLAN_PRE80211 is not set
-CONFIG_WLAN_80211=y
-# CONFIG_LIBERTAS is not set
+CONFIG_WLAN=y
 # CONFIG_LIBERTAS_THINFIRM is not set
 # CONFIG_AT76C50X_USB is not set
 # CONFIG_USB_ZD1201 is not set
 # CONFIG_USB_NET_RNDIS_WLAN is not set
 # CONFIG_RTL8187 is not set
 # CONFIG_MAC80211_HWSIM is not set
-# CONFIG_P54_COMMON is not set
-# CONFIG_AR9170_USB is not set
-# CONFIG_HOSTAP is not set
+# CONFIG_ATH_COMMON is not set
 # CONFIG_B43 is not set
 # CONFIG_B43LEGACY is not set
-# CONFIG_ZD1211RW is not set
+# CONFIG_HOSTAP is not set
+# CONFIG_LIBERTAS is not set
+# CONFIG_P54_COMMON is not set
 # CONFIG_RT2X00 is not set
+# CONFIG_WL12XX is not set
+# CONFIG_ZD1211RW is not set
 
 #
 # Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -631,6 +678,7 @@ CONFIG_USB_NET_AX8817X=m
 # CONFIG_USB_NET_CDCETHER is not set
 # CONFIG_USB_NET_CDC_EEM is not set
 # CONFIG_USB_NET_DM9601 is not set
+# CONFIG_USB_NET_SMSC75XX is not set
 # CONFIG_USB_NET_SMSC95XX is not set
 # CONFIG_USB_NET_GL620A is not set
 # CONFIG_USB_NET_NET1080 is not set
@@ -665,6 +713,7 @@ CONFIG_SLHC=m
 CONFIG_INPUT=y
 CONFIG_INPUT_FF_MEMLESS=m
 # CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
 
 #
 # Userland interfaces
@@ -712,6 +761,8 @@ CONFIG_DEVKMEM=y
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_TIMBERDALE is not set
+# CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
@@ -735,7 +786,6 @@ CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -841,13 +891,13 @@ CONFIG_SND_PS3=m
 CONFIG_SND_PS3_DEFAULT_START_DELAY=2000
 CONFIG_SND_USB=y
 CONFIG_SND_USB_AUDIO=m
+# CONFIG_SND_USB_UA101 is not set
 # CONFIG_SND_USB_USX2Y is not set
 # CONFIG_SND_USB_CAIAQ is not set
 # CONFIG_SND_SOC is not set
 # CONFIG_SOUND_PRIME is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 CONFIG_HIDRAW=y
 
 #
@@ -866,6 +916,7 @@ CONFIG_USB_HIDDEV=y
 #
 # Special HID drivers
 #
+# CONFIG_HID_3M_PCT is not set
 # CONFIG_HID_A4TECH is not set
 CONFIG_HID_APPLE=m
 CONFIG_HID_BELKIN=m
@@ -876,17 +927,24 @@ CONFIG_HID_CHERRY=m
 CONFIG_HID_EZKEY=m
 # CONFIG_HID_KYE is not set
 # CONFIG_HID_GYRATION is not set
+CONFIG_HID_TWINHAN=m
 # CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=m
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
+# CONFIG_LOGIG940_FF is not set
+# CONFIG_HID_MAGICMOUSE is not set
 CONFIG_HID_MICROSOFT=m
+# CONFIG_HID_MOSART is not set
 # CONFIG_HID_MONTEREY is not set
 # CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
 # CONFIG_HID_PANTHERLORD is not set
 # CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_QUANTA is not set
 # CONFIG_HID_SAMSUNG is not set
 CONFIG_HID_SONY=m
+# CONFIG_HID_STANTUM is not set
 CONFIG_HID_SUNPLUS=m
 # CONFIG_HID_GREENASIA is not set
 CONFIG_HID_SMARTJOYPLUS=m
@@ -901,7 +959,7 @@ CONFIG_USB_ARCH_HAS_OHCI=y
 CONFIG_USB_ARCH_HAS_EHCI=y
 CONFIG_USB=m
 # CONFIG_USB_DEBUG is not set
-# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
 
 #
 # Miscellaneous USB options
@@ -909,7 +967,6 @@ CONFIG_USB=m
 CONFIG_USB_DEVICEFS=y
 # CONFIG_USB_DEVICE_CLASS is not set
 # CONFIG_USB_DYNAMIC_MINORS is not set
-CONFIG_USB_SUSPEND=y
 # CONFIG_USB_OTG is not set
 # CONFIG_USB_OTG_WHITELIST is not set
 # CONFIG_USB_OTG_BLACKLIST_HUB is not set
@@ -923,12 +980,13 @@ CONFIG_USB_MON=m
 # CONFIG_USB_C67X00_HCD is not set
 CONFIG_USB_EHCI_HCD=m
 # CONFIG_USB_EHCI_ROOT_HUB_TT is not set
-# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+CONFIG_USB_EHCI_TT_NEWSCHED=y
 CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y
 # CONFIG_USB_EHCI_HCD_PPC_OF is not set
 # CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
 CONFIG_USB_OHCI_HCD=m
 # CONFIG_USB_OHCI_HCD_PPC_OF_BE is not set
 # CONFIG_USB_OHCI_HCD_PPC_OF_LE is not set
@@ -995,7 +1053,6 @@ CONFIG_USB_STORAGE=m
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1008,7 +1065,6 @@ CONFIG_USB_STORAGE=m
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1048,7 +1104,9 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_M48T86 is not set
 # CONFIG_RTC_DRV_M48T35 is not set
 # CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
 # CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
 # CONFIG_RTC_DRV_V3020 is not set
 
 #
@@ -1077,10 +1135,10 @@ CONFIG_EXT3_FS_XATTR=y
 # CONFIG_EXT3_FS_POSIX_ACL is not set
 # CONFIG_EXT3_FS_SECURITY is not set
 CONFIG_EXT4_FS=y
-# CONFIG_EXT4DEV_COMPAT is not set
 CONFIG_EXT4_FS_XATTR=y
 # CONFIG_EXT4_FS_POSIX_ACL is not set
 # CONFIG_EXT4_FS_SECURITY is not set
+# CONFIG_EXT4_DEBUG is not set
 CONFIG_JBD=m
 # CONFIG_JBD_DEBUG is not set
 CONFIG_JBD2=y
@@ -1093,6 +1151,7 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -1154,6 +1213,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1164,7 +1224,6 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -1181,6 +1240,7 @@ CONFIG_SUNRPC_GSS=y
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 CONFIG_CIFS=m
 # CONFIG_CIFS_STATS is not set
 # CONFIG_CIFS_WEAK_PW_HASH is not set
@@ -1237,7 +1297,7 @@ CONFIG_NLS_ISO8859_1=y
 # CONFIG_NLS_KOI8_U is not set
 # CONFIG_NLS_UTF8 is not set
 # CONFIG_DLM is not set
-CONFIG_BINARY_PRINTF=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
@@ -1270,6 +1330,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=2048
 CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -1292,6 +1353,7 @@ CONFIG_DEBUG_SPINLOCK=y
 CONFIG_DEBUG_MUTEXES=y
 CONFIG_DEBUG_LOCK_ALLOC=y
 CONFIG_PROVE_LOCKING=y
+# CONFIG_PROVE_RCU is not set
 CONFIG_LOCKDEP=y
 # CONFIG_LOCK_STAT is not set
 CONFIG_DEBUG_LOCKDEP=y
@@ -1308,26 +1370,27 @@ CONFIG_DEBUG_MEMORY_INIT=y
 CONFIG_DEBUG_LIST=y
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_LKDTM is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 # CONFIG_DEBUG_PAGEALLOC is not set
-CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_RING_BUFFER=y
-CONFIG_EVENT_TRACING=y
-CONFIG_CONTEXT_SWITCH_TRACER=y
-CONFIG_TRACING=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -1352,13 +1415,16 @@ CONFIG_IRQSTACKS=y
 # CONFIG_KEYS is not set
 # CONFIG_SECURITY is not set
 # CONFIG_SECURITYFS is not set
-# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
 CONFIG_CRYPTO=y
 
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
 CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD=m
@@ -1374,6 +1440,7 @@ CONFIG_CRYPTO_MANAGER=y
 CONFIG_CRYPTO_MANAGER2=y
 CONFIG_CRYPTO_GF128MUL=m
 # CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_PCRYPT is not set
 CONFIG_CRYPTO_WORKQUEUE=y
 # CONFIG_CRYPTO_CRYPTD is not set
 # CONFIG_CRYPTO_AUTHENC is not set
@@ -1402,11 +1469,13 @@ CONFIG_CRYPTO_PCBC=m
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+CONFIG_CRYPTO_GHASH=m
 # CONFIG_CRYPTO_MD4 is not set
 CONFIG_CRYPTO_MD5=y
 CONFIG_CRYPTO_MICHAEL_MIC=m
diff --git a/arch/powerpc/configs/storcenter_defconfig b/arch/powerpc/configs/storcenter_defconfig
index f2f83216146..b1625801526 100644
--- a/arch/powerpc/configs/storcenter_defconfig
+++ b/arch/powerpc/configs/storcenter_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc3
-# Wed Jan  6 09:24:13 2010
+# Linux kernel version: 2.6.34-rc5
+# Mon Apr 19 23:16:37 2010
 #
 # CONFIG_PPC64 is not set
 
@@ -94,11 +94,6 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -314,6 +309,7 @@ CONFIG_ISA_DMA_API=y
 # Bus options
 #
 CONFIG_ZONE_DMA=y
+# CONFIG_NEED_DMA_MAP_STATE is not set
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_PPC_INDIRECT_PCI=y
 CONFIG_FSL_SOC=y
@@ -323,7 +319,6 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PCIEPORTBUS is not set
 CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
-# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_PCCARD is not set
@@ -349,7 +344,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=m
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
@@ -524,6 +518,8 @@ CONFIG_MTD_PHYSMAP=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_DYNAMIC=y
 CONFIG_OF_DEVICE=y
 CONFIG_OF_I2C=y
 # CONFIG_PARPORT is not set
@@ -555,6 +551,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -626,6 +623,7 @@ CONFIG_BLK_DEV_IDEDMA=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -846,6 +844,7 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -895,6 +894,7 @@ CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_MPC=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -908,15 +908,9 @@ CONFIG_I2C_MPC=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -941,18 +935,21 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -961,6 +958,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_AGP is not set
 CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1071,7 +1069,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1084,7 +1081,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1251,6 +1247,7 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
diff --git a/arch/powerpc/include/asm/asm-compat.h b/arch/powerpc/include/asm/asm-compat.h
index c1b475a941e..a9b91ed3d4b 100644
--- a/arch/powerpc/include/asm/asm-compat.h
+++ b/arch/powerpc/include/asm/asm-compat.h
@@ -28,6 +28,7 @@
 #define PPC_LLARX(t, a, b, eh)  PPC_LDARX(t, a, b, eh)
 #define PPC_STLCX       stringify_in_c(stdcx.)
 #define PPC_CNTLZL      stringify_in_c(cntlzd)
+#define PPC_LR_STKOFF   16
 
 /* Move to CR, single-entry optimized version. Only available
  * on POWER4 and later.
@@ -51,6 +52,7 @@
 #define PPC_STLCX       stringify_in_c(stwcx.)
 #define PPC_CNTLZL      stringify_in_c(cntlzw)
 #define PPC_MTOCRF      stringify_in_c(mtcrf)
+#define PPC_LR_STKOFF   4
 
 #endif
 
diff --git a/arch/powerpc/include/asm/compat.h b/arch/powerpc/include/asm/compat.h
index 4774c2f9223..396d21a8005 100644
--- a/arch/powerpc/include/asm/compat.h
+++ b/arch/powerpc/include/asm/compat.h
@@ -7,7 +7,8 @@
 #include <linux/types.h>
 #include <linux/sched.h>
 
-#define COMPAT_USER_HZ  100
+#define COMPAT_USER_HZ          100
+#define COMPAT_UTS_MACHINE      "ppc\0\0"
 
 typedef u32             compat_size_t;
 typedef s32             compat_ssize_t;
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h
index 80a973bb9e7..c85ef230135 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -127,9 +127,6 @@ static inline int dma_supported(struct device *dev, u64 mask)
         return dma_ops->dma_supported(dev, mask);
 }
 
-/* We have our own implementation of pci_set_dma_mask() */
-#define HAVE_ARCH_PCI_SET_DMA_MASK
-
 static inline int dma_set_mask(struct device *dev, u64 dma_mask)
 {
         struct dma_map_ops *dma_ops = get_dma_ops(dev);
diff --git a/arch/powerpc/include/asm/kvm_asm.h b/arch/powerpc/include/asm/kvm_asm.h
index af2abe74f54..aadf2dd6f84 100644
--- a/arch/powerpc/include/asm/kvm_asm.h
+++ b/arch/powerpc/include/asm/kvm_asm.h
@@ -97,4 +97,10 @@
 #define RESUME_HOST             RESUME_FLAG_HOST
 #define RESUME_HOST_NV          (RESUME_FLAG_HOST|RESUME_FLAG_NV)
 
+#define KVM_GUEST_MODE_NONE     0
+#define KVM_GUEST_MODE_GUEST    1
+#define KVM_GUEST_MODE_SKIP     2
+
+#define KVM_INST_FETCH_FAILED   -1
+
 #endif /* __POWERPC_KVM_ASM_H__ */
diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
index 74b7369770d..db7db0a9696 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -22,7 +22,7 @@
 
 #include <linux/types.h>
 #include <linux/kvm_host.h>
-#include <asm/kvm_ppc.h>
+#include <asm/kvm_book3s_64_asm.h>
 
 struct kvmppc_slb {
         u64 esid;
@@ -33,7 +33,8 @@ struct kvmppc_slb {
         bool Ks;
         bool Kp;
         bool nx;
-        bool large;
+        bool large;     /* PTEs are 16MB */
+        bool tb;        /* 1TB segment */
         bool class;
 };
 
@@ -69,6 +70,7 @@ struct kvmppc_sid_map {
 
 struct kvmppc_vcpu_book3s {
         struct kvm_vcpu vcpu;
+        struct kvmppc_book3s_shadow_vcpu shadow_vcpu;
         struct kvmppc_sid_map sid_map[SID_MAP_NUM];
         struct kvmppc_slb slb[64];
         struct {
@@ -89,6 +91,7 @@ struct kvmppc_vcpu_book3s {
         u64 vsid_next;
         u64 vsid_max;
         int context_id;
+        ulong prog_flags; /* flags to inject when giving a 700 trap */
 };
 
 #define CONTEXT_HOST            0
@@ -119,6 +122,10 @@ extern void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat,
 
 extern u32 kvmppc_trampoline_lowmem;
 extern u32 kvmppc_trampoline_enter;
+extern void kvmppc_rmcall(ulong srr0, ulong srr1);
+extern void kvmppc_load_up_fpu(void);
+extern void kvmppc_load_up_altivec(void);
+extern void kvmppc_load_up_vsx(void);
 
 static inline struct kvmppc_vcpu_book3s *to_book3s(struct kvm_vcpu *vcpu)
 {
diff --git a/arch/powerpc/include/asm/kvm_book3s_64_asm.h b/arch/powerpc/include/asm/kvm_book3s_64_asm.h
index 2e06ee8184e..183461b4840 100644
--- a/arch/powerpc/include/asm/kvm_book3s_64_asm.h
+++ b/arch/powerpc/include/asm/kvm_book3s_64_asm.h
@@ -20,6 +20,8 @@
 #ifndef __ASM_KVM_BOOK3S_ASM_H__
 #define __ASM_KVM_BOOK3S_ASM_H__
 
+#ifdef __ASSEMBLY__
+
 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
 
 #include <asm/kvm_asm.h>
@@ -55,4 +57,20 @@ kvmppc_resume_\intno:
 
 #endif /* CONFIG_KVM_BOOK3S_64_HANDLER */
 
+#else  /*__ASSEMBLY__ */
+
+struct kvmppc_book3s_shadow_vcpu {
+        ulong gpr[14];
+        u32 cr;
+        u32 xer;
+        ulong host_r1;
+        ulong host_r2;
+        ulong handler;
+        ulong scratch0;
+        ulong scratch1;
+        ulong vmhandler;
+};
+
+#endif /*__ASSEMBLY__ */
+
 #endif /* __ASM_KVM_BOOK3S_ASM_H__ */
diff --git a/arch/powerpc/include/asm/kvm_e500.h b/arch/powerpc/include/asm/kvm_e500.h
index 9d497ce4972..7fea26fffb2 100644
--- a/arch/powerpc/include/asm/kvm_e500.h
+++ b/arch/powerpc/include/asm/kvm_e500.h
@@ -52,9 +52,12 @@ struct kvmppc_vcpu_e500 {
         u32 mas5;
         u32 mas6;
         u32 mas7;
+        u32 l1csr0;
         u32 l1csr1;
         u32 hid0;
         u32 hid1;
+        u32 tlb0cfg;
+        u32 tlb1cfg;
 
         struct kvm_vcpu vcpu;
 };
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
index 1201f62d0d7..5e5bae7e152 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -167,23 +167,40 @@ struct kvm_vcpu_arch {
         ulong trampoline_lowmem;
         ulong trampoline_enter;
         ulong highmem_handler;
+        ulong rmcall;
         ulong host_paca_phys;
         struct kvmppc_mmu mmu;
 #endif
 
-        u64 fpr[32];
         ulong gpr[32];
 
+        u64 fpr[32];
+        u32 fpscr;
+
+#ifdef CONFIG_ALTIVEC
+        vector128 vr[32];
+        vector128 vscr;
+#endif
+
+#ifdef CONFIG_VSX
+        u64 vsr[32];
+#endif
+
         ulong pc;
-        u32 cr;
         ulong ctr;
         ulong lr;
+
+#ifdef CONFIG_BOOKE
         ulong xer;
+        u32 cr;
+#endif
 
         ulong msr;
 #ifdef CONFIG_PPC64
         ulong shadow_msr;
+        ulong shadow_srr1;
         ulong hflags;
+        ulong guest_owned_ext;
 #endif
         u32 mmucr;
         ulong sprg0;
@@ -242,6 +259,8 @@ struct kvm_vcpu_arch {
 #endif
         ulong fault_dear;
         ulong fault_esr;
+        ulong queued_dear;
+        ulong queued_esr;
         gpa_t paddr_accessed;
 
         u8 io_gpr; /* GPR used as IO source/target */
diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h
index 269ee46ab02..e2642829e43 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -28,6 +28,9 @@
 #include <linux/types.h>
 #include <linux/kvm_types.h>
 #include <linux/kvm_host.h>
+#ifdef CONFIG_PPC_BOOK3S
+#include <asm/kvm_book3s.h>
+#endif
 
 enum emulation_result {
         EMULATE_DONE,         /* no further processing */
@@ -80,8 +83,9 @@ extern void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu);
 
 extern void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu);
 extern int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu);
-extern void kvmppc_core_queue_program(struct kvm_vcpu *vcpu);
+extern void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags);
 extern void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu);
+extern void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu);
 extern void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
                                        struct kvm_interrupt *irq);
 
@@ -95,4 +99,81 @@ extern void kvmppc_booke_exit(void);
 
 extern void kvmppc_core_destroy_mmu(struct kvm_vcpu *vcpu);
 
+#ifdef CONFIG_PPC_BOOK3S
+
+/* We assume we're always acting on the current vcpu */
+
+static inline void kvmppc_set_gpr(struct kvm_vcpu *vcpu, int num, ulong val)
+{
+        if ( num < 14 ) {
+                get_paca()->shadow_vcpu.gpr[num] = val;
+                to_book3s(vcpu)->shadow_vcpu.gpr[num] = val;
+        } else
+                vcpu->arch.gpr[num] = val;
+}
+
+static inline ulong kvmppc_get_gpr(struct kvm_vcpu *vcpu, int num)
+{
+        if ( num < 14 )
+                return get_paca()->shadow_vcpu.gpr[num];
+        else
+                return vcpu->arch.gpr[num];
+}
+
+static inline void kvmppc_set_cr(struct kvm_vcpu *vcpu, u32 val)
+{
+        get_paca()->shadow_vcpu.cr = val;
+        to_book3s(vcpu)->shadow_vcpu.cr = val;
+}
+
+static inline u32 kvmppc_get_cr(struct kvm_vcpu *vcpu)
+{
+        return get_paca()->shadow_vcpu.cr;
+}
+
+static inline void kvmppc_set_xer(struct kvm_vcpu *vcpu, u32 val)
+{
+        get_paca()->shadow_vcpu.xer = val;
+        to_book3s(vcpu)->shadow_vcpu.xer = val;
+}
+
+static inline u32 kvmppc_get_xer(struct kvm_vcpu *vcpu)
+{
+        return get_paca()->shadow_vcpu.xer;
+}
+
+#else
+
+static inline void kvmppc_set_gpr(struct kvm_vcpu *vcpu, int num, ulong val)
+{
+        vcpu->arch.gpr[num] = val;
+}
+
+static inline ulong kvmppc_get_gpr(struct kvm_vcpu *vcpu, int num)
+{
+        return vcpu->arch.gpr[num];
+}
+
+static inline void kvmppc_set_cr(struct kvm_vcpu *vcpu, u32 val)
+{
+        vcpu->arch.cr = val;
+}
+
+static inline u32 kvmppc_get_cr(struct kvm_vcpu *vcpu)
+{
+        return vcpu->arch.cr;
+}
+
+static inline void kvmppc_set_xer(struct kvm_vcpu *vcpu, u32 val)
+{
+        vcpu->arch.xer = val;
+}
+
+static inline u32 kvmppc_get_xer(struct kvm_vcpu *vcpu)
+{
+        return vcpu->arch.xer;
+}
+
+#endif
+
 #endif /* __POWERPC_KVM_PPC_H__ */
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index 5e9b4ef7141..a011603d407 100644
--- a/arch/powerpc/include/asm/paca.h
+++ b/arch/powerpc/include/asm/paca.h
@@ -14,11 +14,17 @@
 #define _ASM_POWERPC_PACA_H
 #ifdef __KERNEL__
 
+#ifdef CONFIG_PPC64
+
+#include <linux/init.h>
 #include <asm/types.h>
 #include <asm/lppaca.h>
 #include <asm/mmu.h>
 #include <asm/page.h>
 #include <asm/exception-64e.h>
+#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
+#include <asm/kvm_book3s_64_asm.h>
+#endif
 
 register struct paca_struct *local_paca asm("r13");
 
@@ -135,13 +141,26 @@ struct paca_struct {
                 u64     esid;
                 u64     vsid;
         } kvm_slb[64];                  /* guest SLB */
+        /* We use this to store guest state in */
+        struct kvmppc_book3s_shadow_vcpu shadow_vcpu;
         u8 kvm_slb_max;                 /* highest used guest slb entry */
         u8 kvm_in_guest;                /* are we inside the guest? */
 #endif
 };
 
-extern struct paca_struct paca[];
-extern void initialise_pacas(void);
+extern struct paca_struct *paca;
+extern __initdata struct paca_struct boot_paca;
+extern void initialise_paca(struct paca_struct *new_paca, int cpu);
+
+extern void allocate_pacas(void);
+extern void free_unused_pacas(void);
+
+#else /* CONFIG_PPC64 */
+
+static inline void allocate_pacas(void) { };
+static inline void free_unused_pacas(void) { };
+
+#endif /* CONFIG_PPC64 */
 
 #endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_PACA_H */
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index e96d52a516b..53b64be40eb 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -108,8 +108,21 @@ extern phys_addr_t kernstart_addr;
 #define pfn_to_kaddr(pfn)       __va((pfn) << PAGE_SHIFT)
 #define virt_addr_valid(kaddr)  pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
 
-#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - MEMORY_START))
+/*
+ * On Book-E parts we need __va to parse the device tree and we can't
+ * determine MEMORY_START until then.  However we can determine PHYSICAL_START
+ * from information at hand (program counter, TLB lookup).
+ *
+ * On non-Book-E PPC64 PAGE_OFFSET and MEMORY_START are constants so use
+ * the other definitions for __va & __pa.
+ */
+#ifdef CONFIG_BOOKE
+#define __va(x) ((void *)(unsigned long)((phys_addr_t)(x) - PHYSICAL_START + KERNELBASE))
+#define __pa(x) ((unsigned long)(x) + PHYSICAL_START - KERNELBASE)
+#else
+#define __va(x) ((void *)(unsigned long)((phys_addr_t)(x) + PAGE_OFFSET - MEMORY_START))
 #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET + MEMORY_START)
+#endif
 
 /*
  * Unfortunately the PLT is in the BSS in the PPC32 ELF ABI,
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index b5ea626eea2..a20a9ad2258 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -141,38 +141,6 @@ extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
 
 #define HAVE_PCI_LEGACY 1
 
-#if defined(CONFIG_PPC64) || defined(CONFIG_NOT_COHERENT_CACHE)
-/*
- * For 64-bit kernels, pci_unmap_{single,page} is not a nop.
- * For 32-bit non-coherent kernels, pci_dma_sync_single_for_cpu() and
- * so on are not nops.
- * and thus...
- */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       \
-        dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         \
-        __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME)                  \
-        ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)         \
-        (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME)                    \
-        ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)           \
-        (((PTR)->LEN_NAME) = (VAL))
-
-#else /* 32-bit && coherent */
-
-/* pci_unmap_{page,single} is a nop so... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
-#define pci_unmap_addr(PTR, ADDR_NAME)          (0)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
-#define pci_unmap_len(PTR, LEN_NAME)            (0)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)   do { } while (0)
-
-#endif /* CONFIG_PPC64 || CONFIG_NOT_COHERENT_CACHE */
-
 #ifdef CONFIG_PPC64
 
 /* The PCI address space does not equal the physical memory address
diff --git a/arch/powerpc/include/asm/perf_event.h b/arch/powerpc/include/asm/perf_event.h
index 3288ce3997e..e6d4ce69b12 100644
--- a/arch/powerpc/include/asm/perf_event.h
+++ b/arch/powerpc/include/asm/perf_event.h
@@ -1,110 +1,23 @@
 /*
- * Performance event support - PowerPC-specific definitions.
+ * Performance event support - hardware-specific disambiguation
  *
- * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
+ * For now this is a compile-time decision, but eventually it should be
+ * runtime.  This would allow multiplatform perf event support for e300 (fsl
+ * embedded perf counters) plus server/classic, and would accommodate
+ * devices other than the core which provide their own performance counters.
+ *
+ * Copyright 2010 Freescale Semiconductor, Inc.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
  * as published by the Free Software Foundation; either version
  * 2 of the License, or (at your option) any later version.
  */
-#include <linux/types.h>
-
-#include <asm/hw_irq.h>
-
-#define MAX_HWEVENTS            8
-#define MAX_EVENT_ALTERNATIVES  8
-#define MAX_LIMITED_HWCOUNTERS  2
-
-/*
- * This struct provides the constants and functions needed to
- * describe the PMU on a particular POWER-family CPU.
- */
-struct power_pmu {
-        const char      *name;
-        int             n_counter;
-        int             max_alternatives;
-        unsigned long   add_fields;
-        unsigned long   test_adder;
-        int             (*compute_mmcr)(u64 events[], int n_ev,
-                                unsigned int hwc[], unsigned long mmcr[]);
-        int             (*get_constraint)(u64 event_id, unsigned long *mskp,
-                                unsigned long *valp);
-        int             (*get_alternatives)(u64 event_id, unsigned int flags,
-                                u64 alt[]);
-        void            (*disable_pmc)(unsigned int pmc, unsigned long mmcr[]);
-        int             (*limited_pmc_event)(u64 event_id);
-        u32             flags;
-        int             n_generic;
-        int             *generic_events;
-        int             (*cache_events)[PERF_COUNT_HW_CACHE_MAX]
-                               [PERF_COUNT_HW_CACHE_OP_MAX]
-                               [PERF_COUNT_HW_CACHE_RESULT_MAX];
-};
-
-/*
- * Values for power_pmu.flags
- */
-#define PPMU_LIMITED_PMC5_6     1       /* PMC5/6 have limited function */
-#define PPMU_ALT_SIPR           2       /* uses alternate posn for SIPR/HV */
-
-/*
- * Values for flags to get_alternatives()
- */
-#define PPMU_LIMITED_PMC_OK     1       /* can put this on a limited PMC */
-#define PPMU_LIMITED_PMC_REQD   2       /* have to put this on a limited PMC */
-#define PPMU_ONLY_COUNT_RUN     4       /* only counting in run state */
-
-extern int register_power_pmu(struct power_pmu *);
 
-struct pt_regs;
-extern unsigned long perf_misc_flags(struct pt_regs *regs);
-extern unsigned long perf_instruction_pointer(struct pt_regs *regs);
-
-#define PERF_EVENT_INDEX_OFFSET 1
-
-/*
- * Only override the default definitions in include/linux/perf_event.h
- * if we have hardware PMU support.
- */
 #ifdef CONFIG_PPC_PERF_CTRS
-#define perf_misc_flags(regs)   perf_misc_flags(regs)
+#include <asm/perf_event_server.h>
 #endif
 
-/*
- * The power_pmu.get_constraint function returns a 32/64-bit value and
- * a 32/64-bit mask that express the constraints between this event_id and
- * other events.
- *
- * The value and mask are divided up into (non-overlapping) bitfields
- * of three different types:
- *
- * Select field: this expresses the constraint that some set of bits
- * in MMCR* needs to be set to a specific value for this event_id.  For a
- * select field, the mask contains 1s in every bit of the field, and
- * the value contains a unique value for each possible setting of the
- * MMCR* bits.  The constraint checking code will ensure that two events
- * that set the same field in their masks have the same value in their
- * value dwords.
- *
- * Add field: this expresses the constraint that there can be at most
- * N events in a particular class.  A field of k bits can be used for
- * N <= 2^(k-1) - 1.  The mask has the most significant bit of the field
- * set (and the other bits 0), and the value has only the least significant
- * bit of the field set.  In addition, the 'add_fields' and 'test_adder'
- * in the struct power_pmu for this processor come into play.  The
- * add_fields value contains 1 in the LSB of the field, and the
- * test_adder contains 2^(k-1) - 1 - N in the field.
- *
- * NAND field: this expresses the constraint that you may not have events
- * in all of a set of classes.  (For example, on PPC970, you can't select
- * events from the FPU, ISU and IDU simultaneously, although any two are
- * possible.)  For N classes, the field is N+1 bits wide, and each class
- * is assigned one bit from the least-significant N bits.  The mask has
- * only the most-significant bit set, and the value has only the bit
- * for the event_id's class set.  The test_adder has the least significant
- * bit set in the field.
- *
- * If an event_id is not subject to the constraint expressed by a particular
- * field, then it will have 0 in both the mask and value for that field.
- */
+#ifdef CONFIG_FSL_EMB_PERF_EVENT
+#include <asm/perf_event_fsl_emb.h>
+#endif
diff --git a/arch/powerpc/include/asm/perf_event_fsl_emb.h b/arch/powerpc/include/asm/perf_event_fsl_emb.h
new file mode 100644
index 00000000000..718a9fa94e6
--- /dev/null
+++ b/arch/powerpc/include/asm/perf_event_fsl_emb.h
@@ -0,0 +1,50 @@
+/*
+ * Performance event support - Freescale embedded specific definitions.
+ *
+ * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/types.h>
+#include <asm/hw_irq.h>
+
+#define MAX_HWEVENTS 4
+
+/* event flags */
+#define FSL_EMB_EVENT_VALID      1
+#define FSL_EMB_EVENT_RESTRICTED 2
+
+/* upper half of event flags is PMLCb */
+#define FSL_EMB_EVENT_THRESHMUL  0x0000070000000000ULL
+#define FSL_EMB_EVENT_THRESH     0x0000003f00000000ULL
+
+struct fsl_emb_pmu {
+        const char      *name;
+        int             n_counter; /* total number of counters */
+
+        /*
+         * The number of contiguous counters starting at zero that
+         * can hold restricted events, or zero if there are no
+         * restricted events.
+         *
+         * This isn't a very flexible method of expressing constraints,
+         * but it's very simple and is adequate for existing chips.
+         */
+        int             n_restricted;
+
+        /* Returns event flags and PMLCb (FSL_EMB_EVENT_*) */
+        u64             (*xlate_event)(u64 event_id);
+
+        int             n_generic;
+        int             *generic_events;
+        int             (*cache_events)[PERF_COUNT_HW_CACHE_MAX]
+                               [PERF_COUNT_HW_CACHE_OP_MAX]
+                               [PERF_COUNT_HW_CACHE_RESULT_MAX];
+};
+
+int register_fsl_emb_pmu(struct fsl_emb_pmu *);
diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/include/asm/perf_event_server.h
new file mode 100644
index 00000000000..8f1df1208d2
--- /dev/null
+++ b/arch/powerpc/include/asm/perf_event_server.h
@@ -0,0 +1,110 @@
+/*
+ * Performance event support - PowerPC classic/server specific definitions.
+ *
+ * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/types.h>
+#include <asm/hw_irq.h>
+
+#define MAX_HWEVENTS            8
+#define MAX_EVENT_ALTERNATIVES  8
+#define MAX_LIMITED_HWCOUNTERS  2
+
+/*
+ * This struct provides the constants and functions needed to
+ * describe the PMU on a particular POWER-family CPU.
+ */
+struct power_pmu {
+        const char      *name;
+        int             n_counter;
+        int             max_alternatives;
+        unsigned long   add_fields;
+        unsigned long   test_adder;
+        int             (*compute_mmcr)(u64 events[], int n_ev,
+                                unsigned int hwc[], unsigned long mmcr[]);
+        int             (*get_constraint)(u64 event_id, unsigned long *mskp,
+                                unsigned long *valp);
+        int             (*get_alternatives)(u64 event_id, unsigned int flags,
+                                u64 alt[]);
+        void            (*disable_pmc)(unsigned int pmc, unsigned long mmcr[]);
+        int             (*limited_pmc_event)(u64 event_id);
+        u32             flags;
+        int             n_generic;
+        int             *generic_events;
+        int             (*cache_events)[PERF_COUNT_HW_CACHE_MAX]
+                               [PERF_COUNT_HW_CACHE_OP_MAX]
+                               [PERF_COUNT_HW_CACHE_RESULT_MAX];
+};
+
+/*
+ * Values for power_pmu.flags
+ */
+#define PPMU_LIMITED_PMC5_6     1       /* PMC5/6 have limited function */
+#define PPMU_ALT_SIPR           2       /* uses alternate posn for SIPR/HV */
+
+/*
+ * Values for flags to get_alternatives()
+ */
+#define PPMU_LIMITED_PMC_OK     1       /* can put this on a limited PMC */
+#define PPMU_LIMITED_PMC_REQD   2       /* have to put this on a limited PMC */
+#define PPMU_ONLY_COUNT_RUN     4       /* only counting in run state */
+
+extern int register_power_pmu(struct power_pmu *);
+
+struct pt_regs;
+extern unsigned long perf_misc_flags(struct pt_regs *regs);
+extern unsigned long perf_instruction_pointer(struct pt_regs *regs);
+
+#define PERF_EVENT_INDEX_OFFSET 1
+
+/*
+ * Only override the default definitions in include/linux/perf_event.h
+ * if we have hardware PMU support.
+ */
+#ifdef CONFIG_PPC_PERF_CTRS
+#define perf_misc_flags(regs)   perf_misc_flags(regs)
+#endif
+
+/*
+ * The power_pmu.get_constraint function returns a 32/64-bit value and
+ * a 32/64-bit mask that express the constraints between this event_id and
+ * other events.
+ *
+ * The value and mask are divided up into (non-overlapping) bitfields
+ * of three different types:
+ *
+ * Select field: this expresses the constraint that some set of bits
+ * in MMCR* needs to be set to a specific value for this event_id.  For a
+ * select field, the mask contains 1s in every bit of the field, and
+ * the value contains a unique value for each possible setting of the
+ * MMCR* bits.  The constraint checking code will ensure that two events
+ * that set the same field in their masks have the same value in their
+ * value dwords.
+ *
+ * Add field: this expresses the constraint that there can be at most
+ * N events in a particular class.  A field of k bits can be used for
+ * N <= 2^(k-1) - 1.  The mask has the most significant bit of the field
+ * set (and the other bits 0), and the value has only the least significant
+ * bit of the field set.  In addition, the 'add_fields' and 'test_adder'
+ * in the struct power_pmu for this processor come into play.  The
+ * add_fields value contains 1 in the LSB of the field, and the
+ * test_adder contains 2^(k-1) - 1 - N in the field.
+ *
+ * NAND field: this expresses the constraint that you may not have events
+ * in all of a set of classes.  (For example, on PPC970, you can't select
+ * events from the FPU, ISU and IDU simultaneously, although any two are
+ * possible.)  For N classes, the field is N+1 bits wide, and each class
+ * is assigned one bit from the least-significant N bits.  The mask has
+ * only the most-significant bit set, and the value has only the bit
+ * for the event_id's class set.  The test_adder has the least significant
+ * bit set in the field.
+ *
+ * If an event_id is not subject to the constraint expressed by a particular
+ * field, then it will have 0 in both the mask and value for that field.
+ */
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index aea71479759..d553bbeb726 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -25,7 +25,7 @@
 #define PPC_INST_LDARX                  0x7c0000a8
 #define PPC_INST_LSWI                   0x7c0004aa
 #define PPC_INST_LSWX                   0x7c00042a
-#define PPC_INST_LWARX                  0x7c000029
+#define PPC_INST_LWARX                  0x7c000028
 #define PPC_INST_LWSYNC                 0x7c2004ac
 #define PPC_INST_LXVD2X                 0x7c000698
 #define PPC_INST_MCRXR                  0x7c000400
@@ -62,8 +62,8 @@
 #define __PPC_T_TLB(t)  (((t) & 0x3) << 21)
 #define __PPC_WC(w)     (((w) & 0x3) << 21)
 /*
- * Only use the larx hint bit on 64bit CPUs. Once we verify it doesn't have
- * any side effects on all 32bit processors, we can do this all the time.
+ * Only use the larx hint bit on 64bit CPUs. e500v1/v2 based CPUs will treat a
+ * larx with EH set as an illegal instruction.
  */
 #ifdef CONFIG_PPC64
 #define __PPC_EH(eh)    (((eh) & 0x1) << 0)
diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h
index b4510812656..9e2d84c06b7 100644
--- a/arch/powerpc/include/asm/ptrace.h
+++ b/arch/powerpc/include/asm/ptrace.h
@@ -137,15 +137,8 @@ do {									      \
 } while (0)
 #endif /* __powerpc64__ */
 
-/*
- * These are defined as per linux/ptrace.h, which see.
- */
 #define arch_has_single_step()  (1)
 #define arch_has_block_step()   (!cpu_has_feature(CPU_FTR_601))
-extern void user_enable_single_step(struct task_struct *);
-extern void user_enable_block_step(struct task_struct *);
-extern void user_disable_single_step(struct task_struct *);
-
 #define ARCH_HAS_USER_SINGLE_STEP_INFO
 
 #endif /* __ASSEMBLY__ */
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index bc8dd53f718..5572e86223f 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -426,6 +426,10 @@
 #define   SRR1_WAKEMT           0x00280000 /* mtctrl */
 #define   SRR1_WAKEDEC          0x00180000 /* Decrementer interrupt */
 #define   SRR1_WAKETHERM        0x00100000 /* Thermal management interrupt */
+#define   SRR1_PROGFPE          0x00100000 /* Floating Point Enabled */
+#define   SRR1_PROGPRIV         0x00040000 /* Privileged instruction */
+#define   SRR1_PROGTRAP         0x00020000 /* Trap */
+#define   SRR1_PROGADDR         0x00010000 /* SRR0 contains subsequent addr */
 #define SPRN_HSRR0      0x13A   /* Save/Restore Register 0 */
 #define SPRN_HSRR1      0x13B   /* Save/Restore Register 1 */
 
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 8808d307fe7..414d434a66d 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -421,8 +421,8 @@
 /* Bit definitions related to the DBCR2. */
 #define DBCR2_DAC1US    0xC0000000      /* Data Addr Cmp 1 Sup/User   */
 #define DBCR2_DAC1ER    0x30000000      /* Data Addr Cmp 1 Eff/Real */
-#define DBCR2_DAC2US    0x00000000      /* Data Addr Cmp 2 Sup/User   */
-#define DBCR2_DAC2ER    0x00000000      /* Data Addr Cmp 2 Eff/Real */
+#define DBCR2_DAC2US    0x0C000000      /* Data Addr Cmp 2 Sup/User   */
+#define DBCR2_DAC2ER    0x03000000      /* Data Addr Cmp 2 Eff/Real */
 #define DBCR2_DAC12M    0x00800000      /* DAC 1-2 range enable */
 #define DBCR2_DAC12MM   0x00400000      /* DAC 1-2 Mask mode*/
 #define DBCR2_DAC12MX   0x00C00000      /* DAC 1-2 range eXclusive */
diff --git a/arch/powerpc/include/asm/reg_fsl_emb.h b/arch/powerpc/include/asm/reg_fsl_emb.h
index 0de404dfee8..77bb71cfd99 100644
--- a/arch/powerpc/include/asm/reg_fsl_emb.h
+++ b/arch/powerpc/include/asm/reg_fsl_emb.h
@@ -31,7 +31,7 @@
 #define PMLCA_FCM0      0x08000000      /* Freeze when PMM==0 */
 #define PMLCA_CE        0x04000000      /* Condition Enable */
 
-#define PMLCA_EVENT_MASK 0x007f0000     /* Event field */
+#define PMLCA_EVENT_MASK 0x00ff0000     /* Event field */
 #define PMLCA_EVENT_SHIFT       16
 
 #define PMRN_PMLCB0     0x110   /* PM Local Control B0 */
diff --git a/arch/powerpc/include/asm/syscall.h b/arch/powerpc/include/asm/syscall.h
index efa7f0b879f..23913e902fc 100644
--- a/arch/powerpc/include/asm/syscall.h
+++ b/arch/powerpc/include/asm/syscall.h
@@ -30,7 +30,7 @@ static inline void syscall_rollback(struct task_struct *task,
 static inline long syscall_get_error(struct task_struct *task,
                                      struct pt_regs *regs)
 {
-        return (regs->ccr & 0x1000) ? -regs->gpr[3] : 0;
+        return (regs->ccr & 0x10000000) ? -regs->gpr[3] : 0;
 }
 
 static inline long syscall_get_return_value(struct task_struct *task,
@@ -44,10 +44,10 @@ static inline void syscall_set_return_value(struct task_struct *task,
                                             int error, long val)
 {
         if (error) {
-                regs->ccr |= 0x1000L;
+                regs->ccr |= 0x10000000L;
                 regs->gpr[3] = -error;
         } else {
-                regs->ccr &= ~0x1000L;
+                regs->ccr &= ~0x10000000L;
                 regs->gpr[3] = val;
         }
 }
diff --git a/arch/powerpc/include/asm/syscalls.h b/arch/powerpc/include/asm/syscalls.h
index eb8eb400c66..4084e567d28 100644
--- a/arch/powerpc/include/asm/syscalls.h
+++ b/arch/powerpc/include/asm/syscalls.h
@@ -7,7 +7,6 @@
 #include <linux/types.h>
 #include <asm/signal.h>
 
-struct new_utsname;
 struct pt_regs;
 struct rtas_args;
 struct sigaction;
@@ -35,12 +34,9 @@ asmlinkage long sys_pipe2(int __user *fildes, int flags);
 asmlinkage long sys_rt_sigaction(int sig,
                 const struct sigaction __user *act,
                 struct sigaction __user *oact, size_t sigsetsize);
-asmlinkage int sys_ipc(uint call, int first, unsigned long second,
-                long third, void __user *ptr, long fifth);
 asmlinkage long ppc64_personality(unsigned long personality);
 asmlinkage int ppc_rtas(struct rtas_args __user *uargs);
 asmlinkage time_t sys64_time(time_t __user * tloc);
-asmlinkage long ppc_newuname(struct new_utsname __user * name);
 
 asmlinkage long sys_rt_sigsuspend(sigset_t __user *unewset,
                 size_t sigsetsize);
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index 07d2d19ab5e..a5ee345b6a5 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -125,7 +125,7 @@ SYSCALL_SPU(fsync)
 SYS32ONLY(sigreturn)
 PPC_SYS(clone)
 COMPAT_SYS_SPU(setdomainname)
-PPC_SYS_SPU(newuname)
+SYSCALL_SPU(newuname)
 SYSCALL(ni_syscall)
 COMPAT_SYS_SPU(adjtimex)
 SYSCALL_SPU(mprotect)
diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h
index f6ca7617676..f0a10266e7f 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -364,6 +364,7 @@
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_ALARM
 #define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_PAUSE
 #define __ARCH_WANT_SYS_SGETMASK
 #define __ARCH_WANT_SYS_SIGNAL
@@ -376,6 +377,7 @@
 #define __ARCH_WANT_SYS_LLSEEK
 #define __ARCH_WANT_SYS_NICE
 #define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_UNAME
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index c002b041021..877326320e7 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -98,11 +98,16 @@ obj64-$(CONFIG_AUDIT)		+= compat_audit.o
 
 obj-$(CONFIG_DYNAMIC_FTRACE)    += ftrace.o
 obj-$(CONFIG_FUNCTION_GRAPH_TRACER)     += ftrace.o
-obj-$(CONFIG_PPC_PERF_CTRS)     += perf_event.o perf_callchain.o
+obj-$(CONFIG_PERF_EVENTS)       += perf_callchain.o
+
+obj-$(CONFIG_PPC_PERF_CTRS)     += perf_event.o
 obj64-$(CONFIG_PPC_PERF_CTRS)   += power4-pmu.o ppc970-pmu.o power5-pmu.o \
                                    power5+-pmu.o power6-pmu.o power7-pmu.o
 obj32-$(CONFIG_PPC_PERF_CTRS)   += mpc7450-pmu.o
 
+obj-$(CONFIG_FSL_EMB_PERF_EVENT) += perf_event_fsl_emb.o
+obj-$(CONFIG_FSL_EMB_PERF_EVENT_E500) += e500-pmu.o
+
 obj-$(CONFIG_8XX_MINIMAL_FPEMU) += softemu8xx.o
 
 ifneq ($(CONFIG_PPC_INDIRECT_IO),y)
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index a6c2b63227b..957ceb7059c 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -194,6 +194,30 @@ int main(void)
         DEFINE(PACA_KVM_IN_GUEST, offsetof(struct paca_struct, kvm_in_guest));
         DEFINE(PACA_KVM_SLB, offsetof(struct paca_struct, kvm_slb));
         DEFINE(PACA_KVM_SLB_MAX, offsetof(struct paca_struct, kvm_slb_max));
+        DEFINE(PACA_KVM_CR, offsetof(struct paca_struct, shadow_vcpu.cr));
+        DEFINE(PACA_KVM_XER, offsetof(struct paca_struct, shadow_vcpu.xer));
+        DEFINE(PACA_KVM_R0, offsetof(struct paca_struct, shadow_vcpu.gpr[0]));
+        DEFINE(PACA_KVM_R1, offsetof(struct paca_struct, shadow_vcpu.gpr[1]));
+        DEFINE(PACA_KVM_R2, offsetof(struct paca_struct, shadow_vcpu.gpr[2]));
+        DEFINE(PACA_KVM_R3, offsetof(struct paca_struct, shadow_vcpu.gpr[3]));
+        DEFINE(PACA_KVM_R4, offsetof(struct paca_struct, shadow_vcpu.gpr[4]));
+        DEFINE(PACA_KVM_R5, offsetof(struct paca_struct, shadow_vcpu.gpr[5]));
+        DEFINE(PACA_KVM_R6, offsetof(struct paca_struct, shadow_vcpu.gpr[6]));
+        DEFINE(PACA_KVM_R7, offsetof(struct paca_struct, shadow_vcpu.gpr[7]));
+        DEFINE(PACA_KVM_R8, offsetof(struct paca_struct, shadow_vcpu.gpr[8]));
+        DEFINE(PACA_KVM_R9, offsetof(struct paca_struct, shadow_vcpu.gpr[9]));
+        DEFINE(PACA_KVM_R10, offsetof(struct paca_struct, shadow_vcpu.gpr[10]));
+        DEFINE(PACA_KVM_R11, offsetof(struct paca_struct, shadow_vcpu.gpr[11]));
+        DEFINE(PACA_KVM_R12, offsetof(struct paca_struct, shadow_vcpu.gpr[12]));
+        DEFINE(PACA_KVM_R13, offsetof(struct paca_struct, shadow_vcpu.gpr[13]));
+        DEFINE(PACA_KVM_HOST_R1, offsetof(struct paca_struct, shadow_vcpu.host_r1));
+        DEFINE(PACA_KVM_HOST_R2, offsetof(struct paca_struct, shadow_vcpu.host_r2));
+        DEFINE(PACA_KVM_VMHANDLER, offsetof(struct paca_struct,
+                                            shadow_vcpu.vmhandler));
+        DEFINE(PACA_KVM_SCRATCH0, offsetof(struct paca_struct,
+                                           shadow_vcpu.scratch0));
+        DEFINE(PACA_KVM_SCRATCH1, offsetof(struct paca_struct,
+                                           shadow_vcpu.scratch1));
 #endif
 #endif /* CONFIG_PPC64 */
 
@@ -389,8 +413,6 @@ int main(void)
         DEFINE(VCPU_HOST_PID, offsetof(struct kvm_vcpu, arch.host_pid));
         DEFINE(VCPU_GPRS, offsetof(struct kvm_vcpu, arch.gpr));
         DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr));
-        DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
-        DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
         DEFINE(VCPU_CTR, offsetof(struct kvm_vcpu, arch.ctr));
         DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.pc));
         DEFINE(VCPU_MSR, offsetof(struct kvm_vcpu, arch.msr));
@@ -411,11 +433,16 @@ int main(void)
         DEFINE(VCPU_HOST_R2, offsetof(struct kvm_vcpu, arch.host_r2));
         DEFINE(VCPU_HOST_MSR, offsetof(struct kvm_vcpu, arch.host_msr));
         DEFINE(VCPU_SHADOW_MSR, offsetof(struct kvm_vcpu, arch.shadow_msr));
+        DEFINE(VCPU_SHADOW_SRR1, offsetof(struct kvm_vcpu, arch.shadow_srr1));
         DEFINE(VCPU_TRAMPOLINE_LOWMEM, offsetof(struct kvm_vcpu, arch.trampoline_lowmem));
         DEFINE(VCPU_TRAMPOLINE_ENTER, offsetof(struct kvm_vcpu, arch.trampoline_enter));
         DEFINE(VCPU_HIGHMEM_HANDLER, offsetof(struct kvm_vcpu, arch.highmem_handler));
+        DEFINE(VCPU_RMCALL, offsetof(struct kvm_vcpu, arch.rmcall));
         DEFINE(VCPU_HFLAGS, offsetof(struct kvm_vcpu, arch.hflags));
-#endif
+#else
+        DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
+        DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
+#endif /* CONFIG_PPC64 */
 #endif
 #ifdef CONFIG_44x
         DEFINE(PGD_T_LOG2, PGD_T_LOG2);
diff --git a/arch/powerpc/kernel/cacheinfo.c b/arch/powerpc/kernel/cacheinfo.c
index bb37b1d19a5..a3c684b4c86 100644
--- a/arch/powerpc/kernel/cacheinfo.c
+++ b/arch/powerpc/kernel/cacheinfo.c
@@ -19,6 +19,7 @@
 #include <linux/notifier.h>
 #include <linux/of.h>
 #include <linux/percpu.h>
+#include <linux/slab.h>
 #include <asm/prom.h>
 
 #include "cacheinfo.h"
@@ -642,7 +643,7 @@ static struct kobj_attribute *cache_index_opt_attrs[] = {
         &cache_assoc_attr,
 };
 
-static struct sysfs_ops cache_index_ops = {
+static const struct sysfs_ops cache_index_ops = {
         .show = cache_index_show,
 };
 
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 2fc82bac3bb..8af4949434b 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1808,7 +1808,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .icache_bsize           = 64,
                 .dcache_bsize           = 64,
                 .num_pmcs               = 4,
-                .oprofile_cpu_type      = "ppc/e500", /* xxx - galak, e500mc? */
+                .oprofile_cpu_type      = "ppc/e500mc",
                 .oprofile_type          = PPC_OPROFILE_FSL_EMB,
                 .cpu_setup              = __setup_cpu_e500mc,
                 .machine_check          = machine_check_e500,
diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c
index 6215062caf8..6c1df5757cd 100644
--- a/arch/powerpc/kernel/dma.c
+++ b/arch/powerpc/kernel/dma.c
@@ -8,6 +8,7 @@
 #include <linux/device.h>
 #include <linux/dma-mapping.h>
 #include <linux/dma-debug.h>
+#include <linux/gfp.h>
 #include <linux/lmb.h>
 #include <asm/bug.h>
 #include <asm/abs_addr.h>
diff --git a/arch/powerpc/kernel/e500-pmu.c b/arch/powerpc/kernel/e500-pmu.c
new file mode 100644
index 00000000000..7c07de0d894
--- /dev/null
+++ b/arch/powerpc/kernel/e500-pmu.c
@@ -0,0 +1,129 @@
+/*
+ * Performance counter support for e500 family processors.
+ *
+ * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/string.h>
+#include <linux/perf_event.h>
+#include <asm/reg.h>
+#include <asm/cputable.h>
+
+/*
+ * Map of generic hardware event types to hardware events
+ * Zero if unsupported
+ */
+static int e500_generic_events[] = {
+        [PERF_COUNT_HW_CPU_CYCLES] = 1,
+        [PERF_COUNT_HW_INSTRUCTIONS] = 2,
+        [PERF_COUNT_HW_CACHE_MISSES] = 41, /* Data L1 cache reloads */
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 12,
+        [PERF_COUNT_HW_BRANCH_MISSES] = 15,
+};
+
+#define C(x)    PERF_COUNT_HW_CACHE_##x
+
+/*
+ * Table of generalized cache-related events.
+ * 0 means not supported, -1 means nonsensical, other values
+ * are event codes.
+ */
+static int e500_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
+        /*
+         * D-cache misses are not split into read/write/prefetch;
+         * use raw event 41.
+         */
+        [C(L1D)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        27,             0       },
+                [C(OP_WRITE)] = {       28,             0       },
+                [C(OP_PREFETCH)] = {    29,             0       },
+        },
+        [C(L1I)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        2,              60      },
+                [C(OP_WRITE)] = {       -1,             -1      },
+                [C(OP_PREFETCH)] = {    0,              0       },
+        },
+        /*
+         * Assuming LL means L2, it's not a good match for this model.
+         * It allocates only on L1 castout or explicit prefetch, and
+         * does not have separate read/write events (but it does have
+         * separate instruction/data events).
+         */
+        [C(LL)] = {             /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0,              0       },
+                [C(OP_WRITE)] = {       0,              0       },
+                [C(OP_PREFETCH)] = {    0,              0       },
+        },
+        /*
+         * There are data/instruction MMU misses, but that's a miss on
+         * the chip's internal level-one TLB which is probably not
+         * what the user wants.  Instead, unified level-two TLB misses
+         * are reported here.
+         */
+        [C(DTLB)] = {           /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        26,             66      },
+                [C(OP_WRITE)] = {       -1,             -1      },
+                [C(OP_PREFETCH)] = {    -1,             -1      },
+        },
+        [C(BPU)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        12,             15      },
+                [C(OP_WRITE)] = {       -1,             -1      },
+                [C(OP_PREFETCH)] = {    -1,             -1      },
+        },
+};
+
+static int num_events = 128;
+
+/* Upper half of event id is PMLCb, for threshold events */
+static u64 e500_xlate_event(u64 event_id)
+{
+        u32 event_low = (u32)event_id;
+        u64 ret;
+
+        if (event_low >= num_events)
+                return 0;
+
+        ret = FSL_EMB_EVENT_VALID;
+
+        if (event_low >= 76 && event_low <= 81) {
+                ret |= FSL_EMB_EVENT_RESTRICTED;
+                ret |= event_id &
+                       (FSL_EMB_EVENT_THRESHMUL | FSL_EMB_EVENT_THRESH);
+        } else if (event_id &
+                   (FSL_EMB_EVENT_THRESHMUL | FSL_EMB_EVENT_THRESH)) {
+                /* Threshold requested on non-threshold event */
+                return 0;
+        }
+
+        return ret;
+}
+
+static struct fsl_emb_pmu e500_pmu = {
+        .name                   = "e500 family",
+        .n_counter              = 4,
+        .n_restricted           = 2,
+        .xlate_event            = e500_xlate_event,
+        .n_generic              = ARRAY_SIZE(e500_generic_events),
+        .generic_events         = e500_generic_events,
+        .cache_events           = &e500_cache_events,
+};
+
+static int init_e500_pmu(void)
+{
+        if (!cur_cpu_spec->oprofile_cpu_type)
+                return -ENODEV;
+
+        if (!strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc/e500mc"))
+                num_events = 256;
+        else if (strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc/e500"))
+                return -ENODEV;
+
+        return register_fsl_emb_pmu(&e500_pmu);
+}
+
+arch_initcall(init_e500_pmu);
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 92580748802..bed9a29ee38 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -219,7 +219,8 @@ generic_secondary_common_init:
          * physical cpu id in r24, we need to search the pacas to find
          * which logical id maps to our physical one.
          */
-        LOAD_REG_ADDR(r13, paca)        /* Get base vaddr of paca array  */
+        LOAD_REG_ADDR(r13, paca)        /* Load paca pointer             */
+        ld      r13,0(r13)              /* Get base vaddr of paca array  */
         li      r5,0                    /* logical cpu id                */
 1:      lhz     r6,PACAHWCPUID(r13)     /* Load HW procid from paca      */
         cmpw    r6,r24                  /* Compare to our id             */
@@ -536,7 +537,8 @@ _GLOBAL(pmac_secondary_start)
         mtmsrd  r3                      /* RI on */
 
         /* Set up a paca value for this processor. */
-        LOAD_REG_ADDR(r4,paca)          /* Get base vaddr of paca array */
+        LOAD_REG_ADDR(r4,paca)          /* Load paca pointer            */
+        ld      r4,0(r4)                /* Get base vaddr of paca array */
         mulli   r13,r24,PACA_SIZE       /* Calculate vaddr of right paca */
         add     r13,r13,r4              /* for this processor.          */
         mtspr   SPRN_SPRG_PACA,r13      /* Save vaddr of paca in an SPRG*/
@@ -615,6 +617,17 @@ _GLOBAL(start_secondary_prolog)
         std     r3,0(r1)                /* Zero the stack frame pointer */
         bl      .start_secondary
         b       .
+/*
+ * Reset stack pointer and call start_secondary
+ * to continue with online operation when woken up
+ * from cede in cpu offline.
+ */
+_GLOBAL(start_secondary_resume)
+        ld      r1,PACAKSAVE(r13)       /* Reload kernel stack pointer */
+        li      r3,0
+        std     r3,0(r1)                /* Zero the stack frame pointer */
+        bl      .start_secondary
+        b       .
 #endif
 
 /*
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 25793bb0e78..72552654799 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -747,9 +747,6 @@ finish_tlb_load:
 #else
         rlwimi  r12, r11, 26, 27, 31    /* extract WIMGE from pte */
 #endif
-#ifdef CONFIG_SMP
-        ori     r12, r12, MAS2_M
-#endif
         mtspr   SPRN_MAS2, r12
 
 #ifdef CONFIG_PTE_64BIT
@@ -887,13 +884,17 @@ KernelSPE:
         lwz     r3,_MSR(r1)
         oris    r3,r3,MSR_SPE@h
         stw     r3,_MSR(r1)     /* enable use of SPE after return */
+#ifdef CONFIG_PRINTK
         lis     r3,87f@h
         ori     r3,r3,87f@l
         mr      r4,r2           /* current */
         lwz     r5,_NIP(r1)
         bl      printk
+#endif
         b       ret_from_except
+#ifdef CONFIG_PRINTK
 87:     .string "SPE used in kernel  (task=%p, pc=%x)  \n"
+#endif
         .align  4,0
 
 #endif /* CONFIG_SPE */
diff --git a/arch/powerpc/kernel/ibmebus.c b/arch/powerpc/kernel/ibmebus.c
index a4c8b38b0ba..71cf280da18 100644
--- a/arch/powerpc/kernel/ibmebus.c
+++ b/arch/powerpc/kernel/ibmebus.c
@@ -42,6 +42,7 @@
 #include <linux/dma-mapping.h>
 #include <linux/interrupt.h>
 #include <linux/of.h>
+#include <linux/slab.h>
 #include <linux/of_platform.h>
 #include <asm/ibmebus.h>
 #include <asm/abs_addr.h>
diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
index 5547ae6e6b0..ec94f906ea4 100644
--- a/arch/powerpc/kernel/iommu.c
+++ b/arch/powerpc/kernel/iommu.c
@@ -42,12 +42,7 @@
 
 #define DBG(...)
 
-#ifdef CONFIG_IOMMU_VMERGE
-static int novmerge = 0;
-#else
-static int novmerge = 1;
-#endif
-
+static int novmerge;
 static int protect4gb = 1;
 
 static void __iommu_free(struct iommu_table *, dma_addr_t, unsigned int);
diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c
index 3fd1af90211..b36f074524a 100644
--- a/arch/powerpc/kernel/kprobes.c
+++ b/arch/powerpc/kernel/kprobes.c
@@ -31,6 +31,7 @@
 #include <linux/preempt.h>
 #include <linux/module.h>
 #include <linux/kdebug.h>
+#include <linux/slab.h>
 #include <asm/cacheflush.h>
 #include <asm/sstep.h>
 #include <asm/uaccess.h>
diff --git a/arch/powerpc/kernel/legacy_serial.c b/arch/powerpc/kernel/legacy_serial.c
index 9ddfaef1a18..035ada5443e 100644
--- a/arch/powerpc/kernel/legacy_serial.c
+++ b/arch/powerpc/kernel/legacy_serial.c
@@ -469,7 +469,7 @@ static int __init serial_dev_init(void)
                 return -ENODEV;
 
         /*
-         * Before we register the platfrom serial devices, we need
+         * Before we register the platform serial devices, we need
          * to fixup their interrupts and their IO ports.
          */
         DBG("Fixing serial ports interrupts and IO ports ...\n");
diff --git a/arch/powerpc/kernel/lparcfg.c b/arch/powerpc/kernel/lparcfg.c
index d09d1c61515..c2c70e1b32c 100644
--- a/arch/powerpc/kernel/lparcfg.c
+++ b/arch/powerpc/kernel/lparcfg.c
@@ -24,6 +24,7 @@
 #include <linux/proc_fs.h>
 #include <linux/init.h>
 #include <linux/seq_file.h>
+#include <linux/slab.h>
 #include <asm/uaccess.h>
 #include <asm/iseries/hv_lp_config.h>
 #include <asm/lppaca.h>
diff --git a/arch/powerpc/kernel/misc.S b/arch/powerpc/kernel/misc.S
index 2d29752cbe1..22e507c8a55 100644
--- a/arch/powerpc/kernel/misc.S
+++ b/arch/powerpc/kernel/misc.S
@@ -127,3 +127,29 @@ _GLOBAL(__setup_cpu_power7)
 _GLOBAL(__restore_cpu_power7)
         /* place holder */
         blr
+
+/*
+ * Get a minimal set of registers for our caller's nth caller.
+ * r3 = regs pointer, r5 = n.
+ *
+ * We only get R1 (stack pointer), NIP (next instruction pointer)
+ * and LR (link register).  These are all we can get in the
+ * general case without doing complicated stack unwinding, but
+ * fortunately they are enough to do a stack backtrace, which
+ * is all we need them for.
+ */
+_GLOBAL(perf_arch_fetch_caller_regs)
+        mr      r6,r1
+        cmpwi   r5,0
+        mflr    r4
+        ble     2f
+        mtctr   r5
+1:      PPC_LL  r6,0(r6)
+        bdnz    1b
+        PPC_LL  r4,PPC_LR_STKOFF(r6)
+2:      PPC_LL  r7,0(r6)
+        PPC_LL  r7,PPC_LR_STKOFF(r7)
+        PPC_STL r6,GPR1-STACK_FRAME_OVERHEAD(r3)
+        PPC_STL r4,_NIP-STACK_FRAME_OVERHEAD(r3)
+        PPC_STL r7,_LINK-STACK_FRAME_OVERHEAD(r3)
+        blr
diff --git a/arch/powerpc/kernel/of_platform.c b/arch/powerpc/kernel/of_platform.c
index 666d08db319..6c1dfc3ff8b 100644
--- a/arch/powerpc/kernel/of_platform.c
+++ b/arch/powerpc/kernel/of_platform.c
@@ -17,7 +17,6 @@
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/mod_devicetable.h>
-#include <linux/slab.h>
 #include <linux/pci.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c
index d16b1ea55d4..0c40c6f476f 100644
--- a/arch/powerpc/kernel/paca.c
+++ b/arch/powerpc/kernel/paca.c
@@ -9,11 +9,15 @@
 
 #include <linux/threads.h>
 #include <linux/module.h>
+#include <linux/lmb.h>
 
+#include <asm/firmware.h>
 #include <asm/lppaca.h>
 #include <asm/paca.h>
 #include <asm/sections.h>
 #include <asm/pgtable.h>
+#include <asm/iseries/lpar_map.h>
+#include <asm/iseries/hv_types.h>
 
 /* This symbol is provided by the linker - let it fill in the paca
  * field correctly */
@@ -70,37 +74,82 @@ struct slb_shadow slb_shadow[] __cacheline_aligned = {
  * processors.  The processor VPD array needs one entry per physical
  * processor (not thread).
  */
-struct paca_struct paca[NR_CPUS];
+struct paca_struct *paca;
 EXPORT_SYMBOL(paca);
 
-void __init initialise_pacas(void)
-{
-        int cpu;
+struct paca_struct boot_paca;
 
-        /* The TOC register (GPR2) points 32kB into the TOC, so that 64kB
-         * of the TOC can be addressed using a single machine instruction.
-         */
+void __init initialise_paca(struct paca_struct *new_paca, int cpu)
+{
+       /* The TOC register (GPR2) points 32kB into the TOC, so that 64kB
+        * of the TOC can be addressed using a single machine instruction.
+        */
         unsigned long kernel_toc = (unsigned long)(&__toc_start) + 0x8000UL;
 
-        /* Can't use for_each_*_cpu, as they aren't functional yet */
-        for (cpu = 0; cpu < NR_CPUS; cpu++) {
-                struct paca_struct *new_paca = &paca[cpu];
-
 #ifdef CONFIG_PPC_BOOK3S
-                new_paca->lppaca_ptr = &lppaca[cpu];
+        new_paca->lppaca_ptr = &lppaca[cpu];
 #else
-                new_paca->kernel_pgd = swapper_pg_dir;
+        new_paca->kernel_pgd = swapper_pg_dir;
 #endif
-                new_paca->lock_token = 0x8000;
-                new_paca->paca_index = cpu;
-                new_paca->kernel_toc = kernel_toc;
-                new_paca->kernelbase = (unsigned long) _stext;
-                new_paca->kernel_msr = MSR_KERNEL;
-                new_paca->hw_cpu_id = 0xffff;
-                new_paca->__current = &init_task;
+        new_paca->lock_token = 0x8000;
+        new_paca->paca_index = cpu;
+        new_paca->kernel_toc = kernel_toc;
+        new_paca->kernelbase = (unsigned long) _stext;
+        new_paca->kernel_msr = MSR_KERNEL;
+        new_paca->hw_cpu_id = 0xffff;
+        new_paca->__current = &init_task;
 #ifdef CONFIG_PPC_STD_MMU_64
-                new_paca->slb_shadow_ptr = &slb_shadow[cpu];
+        new_paca->slb_shadow_ptr = &slb_shadow[cpu];
 #endif /* CONFIG_PPC_STD_MMU_64 */
+}
+
+static int __initdata paca_size;
+
+void __init allocate_pacas(void)
+{
+        int nr_cpus, cpu, limit;
+
+        /*
+         * We can't take SLB misses on the paca, and we want to access them
+         * in real mode, so allocate them within the RMA and also within
+         * the first segment. On iSeries they must be within the area mapped
+         * by the HV, which is HvPagesToMap * HVPAGESIZE bytes.
+         */
+        limit = min(0x10000000ULL, lmb.rmo_size);
+        if (firmware_has_feature(FW_FEATURE_ISERIES))
+                limit = min(limit, HvPagesToMap * HVPAGESIZE);
+
+        nr_cpus = NR_CPUS;
+        /* On iSeries we know we can never have more than 64 cpus */
+        if (firmware_has_feature(FW_FEATURE_ISERIES))
+                nr_cpus = min(64, nr_cpus);
+
+        paca_size = PAGE_ALIGN(sizeof(struct paca_struct) * nr_cpus);
+
+        paca = __va(lmb_alloc_base(paca_size, PAGE_SIZE, limit));
+        memset(paca, 0, paca_size);
+
+        printk(KERN_DEBUG "Allocated %u bytes for %d pacas at %p\n",
+                paca_size, nr_cpus, paca);
+
+        /* Can't use for_each_*_cpu, as they aren't functional yet */
+        for (cpu = 0; cpu < nr_cpus; cpu++)
+                initialise_paca(&paca[cpu], cpu);
+}
+
+void __init free_unused_pacas(void)
+{
+        int new_size;
+
+        new_size = PAGE_ALIGN(sizeof(struct paca_struct) * num_possible_cpus());
+
+        if (new_size >= paca_size)
+                return;
+
+        lmb_free(__pa(paca) + new_size, paca_size - new_size);
+
+        printk(KERN_DEBUG "Freed %u bytes for unused pacas\n",
+                paca_size - new_size);
 
-        }
+        paca_size = new_size;
 }
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 2597f9545d8..0c0567e5840 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -26,6 +26,7 @@
 #include <linux/syscalls.h>
 #include <linux/irq.h>
 #include <linux/vmalloc.h>
+#include <linux/slab.h>
 
 #include <asm/processor.h>
 #include <asm/io.h>
@@ -63,21 +64,6 @@ struct dma_map_ops *get_pci_dma_ops(void)
 }
 EXPORT_SYMBOL(get_pci_dma_ops);
 
-int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
-{
-        return dma_set_mask(&dev->dev, mask);
-}
-
-int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
-{
-        int rc;
-
-        rc = dma_set_mask(&dev->dev, mask);
-        dev->dev.coherent_dma_mask = dev->dma_mask;
-
-        return rc;
-}
-
 struct pci_controller *pcibios_alloc_controller(struct device_node *dev)
 {
         struct pci_controller *phb;
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index c13668cf36d..e7db5b48004 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -14,6 +14,7 @@
 #include <linux/irq.h>
 #include <linux/list.h>
 #include <linux/of.h>
+#include <linux/slab.h>
 
 #include <asm/processor.h>
 #include <asm/io.h>
diff --git a/arch/powerpc/kernel/pci_dn.c b/arch/powerpc/kernel/pci_dn.c
index d5e36e5dc7c..d56b35ee7f7 100644
--- a/arch/powerpc/kernel/pci_dn.c
+++ b/arch/powerpc/kernel/pci_dn.c
@@ -23,6 +23,7 @@
 #include <linux/pci.h>
 #include <linux/string.h>
 #include <linux/init.h>
+#include <linux/gfp.h>
 
 #include <asm/io.h>
 #include <asm/prom.h>
diff --git a/arch/powerpc/kernel/perf_event.c b/arch/powerpc/kernel/perf_event.c
index b6cf8f1f4d3..08460a2e9f4 100644
--- a/arch/powerpc/kernel/perf_event.c
+++ b/arch/powerpc/kernel/perf_event.c
@@ -1164,10 +1164,10 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
          * Finally record data if requested.
          */
         if (record) {
-                struct perf_sample_data data = {
-                        .addr   = ~0ULL,
-                        .period = event->hw.last_period,
-                };
+                struct perf_sample_data data;
+
+                perf_sample_data_init(&data, ~0ULL);
+                data.period = event->hw.last_period;
 
                 if (event->attr.sample_type & PERF_SAMPLE_ADDR)
                         perf_get_data_addr(regs, &data.addr);
@@ -1287,7 +1287,7 @@ static void perf_event_interrupt(struct pt_regs *regs)
                 irq_exit();
 }
 
-void hw_perf_event_setup(int cpu)
+static void power_pmu_setup(int cpu)
 {
         struct cpu_hw_events *cpuhw = &per_cpu(cpu_hw_events, cpu);
 
@@ -1297,6 +1297,23 @@ void hw_perf_event_setup(int cpu)
         cpuhw->mmcr[0] = MMCR0_FC;
 }
 
+static int __cpuinit
+power_pmu_notifier(struct notifier_block *self, unsigned long action, void *hcpu)
+{
+        unsigned int cpu = (long)hcpu;
+
+        switch (action & ~CPU_TASKS_FROZEN) {
+        case CPU_UP_PREPARE:
+                power_pmu_setup(cpu);
+                break;
+
+        default:
+                break;
+        }
+
+        return NOTIFY_OK;
+}
+
 int register_power_pmu(struct power_pmu *pmu)
 {
         if (ppmu)
@@ -1314,5 +1331,7 @@ int register_power_pmu(struct power_pmu *pmu)
                 freeze_events_kernel = MMCR0_FCHV;
 #endif /* CONFIG_PPC64 */
 
+        perf_cpu_notifier(power_pmu_notifier);
+
         return 0;
 }
diff --git a/arch/powerpc/kernel/perf_event_fsl_emb.c b/arch/powerpc/kernel/perf_event_fsl_emb.c
new file mode 100644
index 00000000000..369872f6cf7
--- /dev/null
+++ b/arch/powerpc/kernel/perf_event_fsl_emb.c
@@ -0,0 +1,654 @@
+/*
+ * Performance event support - Freescale Embedded Performance Monitor
+ *
+ * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/perf_event.h>
+#include <linux/percpu.h>
+#include <linux/hardirq.h>
+#include <asm/reg_fsl_emb.h>
+#include <asm/pmc.h>
+#include <asm/machdep.h>
+#include <asm/firmware.h>
+#include <asm/ptrace.h>
+
+struct cpu_hw_events {
+        int n_events;
+        int disabled;
+        u8  pmcs_enabled;
+        struct perf_event *event[MAX_HWEVENTS];
+};
+static DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events);
+
+static struct fsl_emb_pmu *ppmu;
+
+/* Number of perf_events counting hardware events */
+static atomic_t num_events;
+/* Used to avoid races in calling reserve/release_pmc_hardware */
+static DEFINE_MUTEX(pmc_reserve_mutex);
+
+/*
+ * If interrupts were soft-disabled when a PMU interrupt occurs, treat
+ * it as an NMI.
+ */
+static inline int perf_intr_is_nmi(struct pt_regs *regs)
+{
+#ifdef __powerpc64__
+        return !regs->softe;
+#else
+        return 0;
+#endif
+}
+
+static void perf_event_interrupt(struct pt_regs *regs);
+
+/*
+ * Read one performance monitor counter (PMC).
+ */
+static unsigned long read_pmc(int idx)
+{
+        unsigned long val;
+
+        switch (idx) {
+        case 0:
+                val = mfpmr(PMRN_PMC0);
+                break;
+        case 1:
+                val = mfpmr(PMRN_PMC1);
+                break;
+        case 2:
+                val = mfpmr(PMRN_PMC2);
+                break;
+        case 3:
+                val = mfpmr(PMRN_PMC3);
+                break;
+        default:
+                printk(KERN_ERR "oops trying to read PMC%d\n", idx);
+                val = 0;
+        }
+        return val;
+}
+
+/*
+ * Write one PMC.
+ */
+static void write_pmc(int idx, unsigned long val)
+{
+        switch (idx) {
+        case 0:
+                mtpmr(PMRN_PMC0, val);
+                break;
+        case 1:
+                mtpmr(PMRN_PMC1, val);
+                break;
+        case 2:
+                mtpmr(PMRN_PMC2, val);
+                break;
+        case 3:
+                mtpmr(PMRN_PMC3, val);
+                break;
+        default:
+                printk(KERN_ERR "oops trying to write PMC%d\n", idx);
+        }
+
+        isync();
+}
+
+/*
+ * Write one local control A register
+ */
+static void write_pmlca(int idx, unsigned long val)
+{
+        switch (idx) {
+        case 0:
+                mtpmr(PMRN_PMLCA0, val);
+                break;
+        case 1:
+                mtpmr(PMRN_PMLCA1, val);
+                break;
+        case 2:
+                mtpmr(PMRN_PMLCA2, val);
+                break;
+        case 3:
+                mtpmr(PMRN_PMLCA3, val);
+                break;
+        default:
+                printk(KERN_ERR "oops trying to write PMLCA%d\n", idx);
+        }
+
+        isync();
+}
+
+/*
+ * Write one local control B register
+ */
+static void write_pmlcb(int idx, unsigned long val)
+{
+        switch (idx) {
+        case 0:
+                mtpmr(PMRN_PMLCB0, val);
+                break;
+        case 1:
+                mtpmr(PMRN_PMLCB1, val);
+                break;
+        case 2:
+                mtpmr(PMRN_PMLCB2, val);
+                break;
+        case 3:
+                mtpmr(PMRN_PMLCB3, val);
+                break;
+        default:
+                printk(KERN_ERR "oops trying to write PMLCB%d\n", idx);
+        }
+
+        isync();
+}
+
+static void fsl_emb_pmu_read(struct perf_event *event)
+{
+        s64 val, delta, prev;
+
+        /*
+         * Performance monitor interrupts come even when interrupts
+         * are soft-disabled, as long as interrupts are hard-enabled.
+         * Therefore we treat them like NMIs.
+         */
+        do {
+                prev = atomic64_read(&event->hw.prev_count);
+                barrier();
+                val = read_pmc(event->hw.idx);
+        } while (atomic64_cmpxchg(&event->hw.prev_count, prev, val) != prev);
+
+        /* The counters are only 32 bits wide */
+        delta = (val - prev) & 0xfffffffful;
+        atomic64_add(delta, &event->count);
+        atomic64_sub(delta, &event->hw.period_left);
+}
+
+/*
+ * Disable all events to prevent PMU interrupts and to allow
+ * events to be added or removed.
+ */
+void hw_perf_disable(void)
+{
+        struct cpu_hw_events *cpuhw;
+        unsigned long flags;
+
+        local_irq_save(flags);
+        cpuhw = &__get_cpu_var(cpu_hw_events);
+
+        if (!cpuhw->disabled) {
+                cpuhw->disabled = 1;
+
+                /*
+                 * Check if we ever enabled the PMU on this cpu.
+                 */
+                if (!cpuhw->pmcs_enabled) {
+                        ppc_enable_pmcs();
+                        cpuhw->pmcs_enabled = 1;
+                }
+
+                if (atomic_read(&num_events)) {
+                        /*
+                         * Set the 'freeze all counters' bit, and disable
+                         * interrupts.  The barrier is to make sure the
+                         * mtpmr has been executed and the PMU has frozen
+                         * the events before we return.
+                         */
+
+                        mtpmr(PMRN_PMGC0, PMGC0_FAC);
+                        isync();
+                }
+        }
+        local_irq_restore(flags);
+}
+
+/*
+ * Re-enable all events if disable == 0.
+ * If we were previously disabled and events were added, then
+ * put the new config on the PMU.
+ */
+void hw_perf_enable(void)
+{
+        struct cpu_hw_events *cpuhw;
+        unsigned long flags;
+
+        local_irq_save(flags);
+        cpuhw = &__get_cpu_var(cpu_hw_events);
+        if (!cpuhw->disabled)
+                goto out;
+
+        cpuhw->disabled = 0;
+        ppc_set_pmu_inuse(cpuhw->n_events != 0);
+
+        if (cpuhw->n_events > 0) {
+                mtpmr(PMRN_PMGC0, PMGC0_PMIE | PMGC0_FCECE);
+                isync();
+        }
+
+ out:
+        local_irq_restore(flags);
+}
+
+static int collect_events(struct perf_event *group, int max_count,
+                          struct perf_event *ctrs[])
+{
+        int n = 0;
+        struct perf_event *event;
+
+        if (!is_software_event(group)) {
+                if (n >= max_count)
+                        return -1;
+                ctrs[n] = group;
+                n++;
+        }
+        list_for_each_entry(event, &group->sibling_list, group_entry) {
+                if (!is_software_event(event) &&
+                    event->state != PERF_EVENT_STATE_OFF) {
+                        if (n >= max_count)
+                                return -1;
+                        ctrs[n] = event;
+                        n++;
+                }
+        }
+        return n;
+}
+
+/* perf must be disabled, context locked on entry */
+static int fsl_emb_pmu_enable(struct perf_event *event)
+{
+        struct cpu_hw_events *cpuhw;
+        int ret = -EAGAIN;
+        int num_counters = ppmu->n_counter;
+        u64 val;
+        int i;
+
+        cpuhw = &get_cpu_var(cpu_hw_events);
+
+        if (event->hw.config & FSL_EMB_EVENT_RESTRICTED)
+                num_counters = ppmu->n_restricted;
+
+        /*
+         * Allocate counters from top-down, so that restricted-capable
+         * counters are kept free as long as possible.
+         */
+        for (i = num_counters - 1; i >= 0; i--) {
+                if (cpuhw->event[i])
+                        continue;
+
+                break;
+        }
+
+        if (i < 0)
+                goto out;
+
+        event->hw.idx = i;
+        cpuhw->event[i] = event;
+        ++cpuhw->n_events;
+
+        val = 0;
+        if (event->hw.sample_period) {
+                s64 left = atomic64_read(&event->hw.period_left);
+                if (left < 0x80000000L)
+                        val = 0x80000000L - left;
+        }
+        atomic64_set(&event->hw.prev_count, val);
+        write_pmc(i, val);
+        perf_event_update_userpage(event);
+
+        write_pmlcb(i, event->hw.config >> 32);
+        write_pmlca(i, event->hw.config_base);
+
+        ret = 0;
+ out:
+        put_cpu_var(cpu_hw_events);
+        return ret;
+}
+
+/* perf must be disabled, context locked on entry */
+static void fsl_emb_pmu_disable(struct perf_event *event)
+{
+        struct cpu_hw_events *cpuhw;
+        int i = event->hw.idx;
+
+        if (i < 0)
+                goto out;
+
+        fsl_emb_pmu_read(event);
+
+        cpuhw = &get_cpu_var(cpu_hw_events);
+
+        WARN_ON(event != cpuhw->event[event->hw.idx]);
+
+        write_pmlca(i, 0);
+        write_pmlcb(i, 0);
+        write_pmc(i, 0);
+
+        cpuhw->event[i] = NULL;
+        event->hw.idx = -1;
+
+        /*
+         * TODO: if at least one restricted event exists, and we
+         * just freed up a non-restricted-capable counter, and
+         * there is a restricted-capable counter occupied by
+         * a non-restricted event, migrate that event to the
+         * vacated counter.
+         */
+
+        cpuhw->n_events--;
+
+ out:
+        put_cpu_var(cpu_hw_events);
+}
+
+/*
+ * Re-enable interrupts on a event after they were throttled
+ * because they were coming too fast.
+ *
+ * Context is locked on entry, but perf is not disabled.
+ */
+static void fsl_emb_pmu_unthrottle(struct perf_event *event)
+{
+        s64 val, left;
+        unsigned long flags;
+
+        if (event->hw.idx < 0 || !event->hw.sample_period)
+                return;
+        local_irq_save(flags);
+        perf_disable();
+        fsl_emb_pmu_read(event);
+        left = event->hw.sample_period;
+        event->hw.last_period = left;
+        val = 0;
+        if (left < 0x80000000L)
+                val = 0x80000000L - left;
+        write_pmc(event->hw.idx, val);
+        atomic64_set(&event->hw.prev_count, val);
+        atomic64_set(&event->hw.period_left, left);
+        perf_event_update_userpage(event);
+        perf_enable();
+        local_irq_restore(flags);
+}
+
+static struct pmu fsl_emb_pmu = {
+        .enable         = fsl_emb_pmu_enable,
+        .disable        = fsl_emb_pmu_disable,
+        .read           = fsl_emb_pmu_read,
+        .unthrottle     = fsl_emb_pmu_unthrottle,
+};
+
+/*
+ * Release the PMU if this is the last perf_event.
+ */
+static void hw_perf_event_destroy(struct perf_event *event)
+{
+        if (!atomic_add_unless(&num_events, -1, 1)) {
+                mutex_lock(&pmc_reserve_mutex);
+                if (atomic_dec_return(&num_events) == 0)
+                        release_pmc_hardware();
+                mutex_unlock(&pmc_reserve_mutex);
+        }
+}
+
+/*
+ * Translate a generic cache event_id config to a raw event_id code.
+ */
+static int hw_perf_cache_event(u64 config, u64 *eventp)
+{
+        unsigned long type, op, result;
+        int ev;
+
+        if (!ppmu->cache_events)
+                return -EINVAL;
+
+        /* unpack config */
+        type = config & 0xff;
+        op = (config >> 8) & 0xff;
+        result = (config >> 16) & 0xff;
+
+        if (type >= PERF_COUNT_HW_CACHE_MAX ||
+            op >= PERF_COUNT_HW_CACHE_OP_MAX ||
+            result >= PERF_COUNT_HW_CACHE_RESULT_MAX)
+                return -EINVAL;
+
+        ev = (*ppmu->cache_events)[type][op][result];
+        if (ev == 0)
+                return -EOPNOTSUPP;
+        if (ev == -1)
+                return -EINVAL;
+        *eventp = ev;
+        return 0;
+}
+
+const struct pmu *hw_perf_event_init(struct perf_event *event)
+{
+        u64 ev;
+        struct perf_event *events[MAX_HWEVENTS];
+        int n;
+        int err;
+        int num_restricted;
+        int i;
+
+        switch (event->attr.type) {
+        case PERF_TYPE_HARDWARE:
+                ev = event->attr.config;
+                if (ev >= ppmu->n_generic || ppmu->generic_events[ev] == 0)
+                        return ERR_PTR(-EOPNOTSUPP);
+                ev = ppmu->generic_events[ev];
+                break;
+
+        case PERF_TYPE_HW_CACHE:
+                err = hw_perf_cache_event(event->attr.config, &ev);
+                if (err)
+                        return ERR_PTR(err);
+                break;
+
+        case PERF_TYPE_RAW:
+                ev = event->attr.config;
+                break;
+
+        default:
+                return ERR_PTR(-EINVAL);
+        }
+
+        event->hw.config = ppmu->xlate_event(ev);
+        if (!(event->hw.config & FSL_EMB_EVENT_VALID))
+                return ERR_PTR(-EINVAL);
+
+        /*
+         * If this is in a group, check if it can go on with all the
+         * other hardware events in the group.  We assume the event
+         * hasn't been linked into its leader's sibling list at this point.
+         */
+        n = 0;
+        if (event->group_leader != event) {
+                n = collect_events(event->group_leader,
+                                   ppmu->n_counter - 1, events);
+                if (n < 0)
+                        return ERR_PTR(-EINVAL);
+        }
+
+        if (event->hw.config & FSL_EMB_EVENT_RESTRICTED) {
+                num_restricted = 0;
+                for (i = 0; i < n; i++) {
+                        if (events[i]->hw.config & FSL_EMB_EVENT_RESTRICTED)
+                                num_restricted++;
+                }
+
+                if (num_restricted >= ppmu->n_restricted)
+                        return ERR_PTR(-EINVAL);
+        }
+
+        event->hw.idx = -1;
+
+        event->hw.config_base = PMLCA_CE | PMLCA_FCM1 |
+                                (u32)((ev << 16) & PMLCA_EVENT_MASK);
+
+        if (event->attr.exclude_user)
+                event->hw.config_base |= PMLCA_FCU;
+        if (event->attr.exclude_kernel)
+                event->hw.config_base |= PMLCA_FCS;
+        if (event->attr.exclude_idle)
+                return ERR_PTR(-ENOTSUPP);
+
+        event->hw.last_period = event->hw.sample_period;
+        atomic64_set(&event->hw.period_left, event->hw.last_period);
+
+        /*
+         * See if we need to reserve the PMU.
+         * If no events are currently in use, then we have to take a
+         * mutex to ensure that we don't race with another task doing
+         * reserve_pmc_hardware or release_pmc_hardware.
+         */
+        err = 0;
+        if (!atomic_inc_not_zero(&num_events)) {
+                mutex_lock(&pmc_reserve_mutex);
+                if (atomic_read(&num_events) == 0 &&
+                    reserve_pmc_hardware(perf_event_interrupt))
+                        err = -EBUSY;
+                else
+                        atomic_inc(&num_events);
+                mutex_unlock(&pmc_reserve_mutex);
+
+                mtpmr(PMRN_PMGC0, PMGC0_FAC);
+                isync();
+        }
+        event->destroy = hw_perf_event_destroy;
+
+        if (err)
+                return ERR_PTR(err);
+        return &fsl_emb_pmu;
+}
+
+/*
+ * A counter has overflowed; update its count and record
+ * things if requested.  Note that interrupts are hard-disabled
+ * here so there is no possibility of being interrupted.
+ */
+static void record_and_restart(struct perf_event *event, unsigned long val,
+                               struct pt_regs *regs, int nmi)
+{
+        u64 period = event->hw.sample_period;
+        s64 prev, delta, left;
+        int record = 0;
+
+        /* we don't have to worry about interrupts here */
+        prev = atomic64_read(&event->hw.prev_count);
+        delta = (val - prev) & 0xfffffffful;
+        atomic64_add(delta, &event->count);
+
+        /*
+         * See if the total period for this event has expired,
+         * and update for the next period.
+         */
+        val = 0;
+        left = atomic64_read(&event->hw.period_left) - delta;
+        if (period) {
+                if (left <= 0) {
+                        left += period;
+                        if (left <= 0)
+                                left = period;
+                        record = 1;
+                }
+                if (left < 0x80000000LL)
+                        val = 0x80000000LL - left;
+        }
+
+        /*
+         * Finally record data if requested.
+         */
+        if (record) {
+                struct perf_sample_data data = {
+                        .period = event->hw.last_period,
+                };
+
+                if (perf_event_overflow(event, nmi, &data, regs)) {
+                        /*
+                         * Interrupts are coming too fast - throttle them
+                         * by setting the event to 0, so it will be
+                         * at least 2^30 cycles until the next interrupt
+                         * (assuming each event counts at most 2 counts
+                         * per cycle).
+                         */
+                        val = 0;
+                        left = ~0ULL >> 1;
+                }
+        }
+
+        write_pmc(event->hw.idx, val);
+        atomic64_set(&event->hw.prev_count, val);
+        atomic64_set(&event->hw.period_left, left);
+        perf_event_update_userpage(event);
+}
+
+static void perf_event_interrupt(struct pt_regs *regs)
+{
+        int i;
+        struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
+        struct perf_event *event;
+        unsigned long val;
+        int found = 0;
+        int nmi;
+
+        nmi = perf_intr_is_nmi(regs);
+        if (nmi)
+                nmi_enter();
+        else
+                irq_enter();
+
+        for (i = 0; i < ppmu->n_counter; ++i) {
+                event = cpuhw->event[i];
+
+                val = read_pmc(i);
+                if ((int)val < 0) {
+                        if (event) {
+                                /* event has overflowed */
+                                found = 1;
+                                record_and_restart(event, val, regs, nmi);
+                        } else {
+                                /*
+                                 * Disabled counter is negative,
+                                 * reset it just in case.
+                                 */
+                                write_pmc(i, 0);
+                        }
+                }
+        }
+
+        /* PMM will keep counters frozen until we return from the interrupt. */
+        mtmsr(mfmsr() | MSR_PMM);
+        mtpmr(PMRN_PMGC0, PMGC0_PMIE | PMGC0_FCECE);
+        isync();
+
+        if (nmi)
+                nmi_exit();
+        else
+                irq_exit();
+}
+
+void hw_perf_event_setup(int cpu)
+{
+        struct cpu_hw_events *cpuhw = &per_cpu(cpu_hw_events, cpu);
+
+        memset(cpuhw, 0, sizeof(*cpuhw));
+}
+
+int register_fsl_emb_pmu(struct fsl_emb_pmu *pmu)
+{
+        if (ppmu)
+                return -EBUSY;          /* something's already registered */
+
+        ppmu = pmu;
+        pr_info("%s performance monitor hardware support registered\n",
+                pmu->name);
+
+        return 0;
+}
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index 425451453e9..ab3e392ac63 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -107,6 +107,7 @@ EXPORT_SYMBOL(giveup_altivec);
 #endif /* CONFIG_ALTIVEC */
 #ifdef CONFIG_VSX
 EXPORT_SYMBOL(giveup_vsx);
+EXPORT_SYMBOL_GPL(__giveup_vsx);
 #endif /* CONFIG_VSX */
 #ifdef CONFIG_SPE
 EXPORT_SYMBOL(giveup_spe);
diff --git a/arch/powerpc/kernel/proc_powerpc.c b/arch/powerpc/kernel/proc_powerpc.c
index 1ed3b8d7981..c8ae3714e79 100644
--- a/arch/powerpc/kernel/proc_powerpc.c
+++ b/arch/powerpc/kernel/proc_powerpc.c
@@ -19,7 +19,6 @@
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/proc_fs.h>
-#include <linux/slab.h>
 #include <linux/kernel.h>
 
 #include <asm/machdep.h>
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 43238b2054b..05131d634e7 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -43,6 +43,7 @@
 #include <asm/smp.h>
 #include <asm/system.h>
 #include <asm/mmu.h>
+#include <asm/paca.h>
 #include <asm/pgtable.h>
 #include <asm/pci.h>
 #include <asm/iommu.h>
@@ -721,6 +722,8 @@ void __init early_init_devtree(void *params)
          * FIXME .. and the initrd too? */
         move_device_tree();
 
+        allocate_pacas();
+
         DBG("Scanning CPUs ...\n");
 
         /* Retreive CPU related informations from the flat tree
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 5f306c4946e..97d4bd9442d 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -653,6 +653,7 @@ static void __init early_cmdline_parse(void)
 #else
 #define OV5_CMO                 0x00
 #endif
+#define OV5_TYPE1_AFFINITY      0x80    /* Type 1 NUMA affinity */
 
 /* Option Vector 6: IBM PAPR hints */
 #define OV6_LINUX               0x02    /* Linux is our OS */
@@ -706,7 +707,7 @@ static unsigned char ibm_architecture_vec[] = {
         OV5_DONATE_DEDICATE_CPU | OV5_MSI,
         0,
         OV5_CMO,
-        0,
+        OV5_TYPE1_AFFINITY,
         0,
         0,
         0,
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index d9b05866615..ed2cfe17d25 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -940,7 +940,7 @@ static int del_instruction_bp(struct task_struct *child, int slot)
 {
         switch (slot) {
         case 1:
-                if (child->thread.iac1 == 0)
+                if ((child->thread.dbcr0 & DBCR0_IAC1) == 0)
                         return -ENOENT;
 
                 if (dbcr_iac_range(child) & DBCR_IAC12MODE) {
@@ -952,7 +952,7 @@ static int del_instruction_bp(struct task_struct *child, int slot)
                 child->thread.dbcr0 &= ~DBCR0_IAC1;
                 break;
         case 2:
-                if (child->thread.iac2 == 0)
+                if ((child->thread.dbcr0 & DBCR0_IAC2) == 0)
                         return -ENOENT;
 
                 if (dbcr_iac_range(child) & DBCR_IAC12MODE)
@@ -963,7 +963,7 @@ static int del_instruction_bp(struct task_struct *child, int slot)
                 break;
 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
         case 3:
-                if (child->thread.iac3 == 0)
+                if ((child->thread.dbcr0 & DBCR0_IAC3) == 0)
                         return -ENOENT;
 
                 if (dbcr_iac_range(child) & DBCR_IAC34MODE) {
@@ -975,7 +975,7 @@ static int del_instruction_bp(struct task_struct *child, int slot)
                 child->thread.dbcr0 &= ~DBCR0_IAC3;
                 break;
         case 4:
-                if (child->thread.iac4 == 0)
+                if ((child->thread.dbcr0 & DBCR0_IAC4) == 0)
                         return -ENOENT;
 
                 if (dbcr_iac_range(child) & DBCR_IAC34MODE)
@@ -1054,7 +1054,7 @@ static int set_dac(struct task_struct *child, struct ppc_hw_breakpoint *bp_info)
 static int del_dac(struct task_struct *child, int slot)
 {
         if (slot == 1) {
-                if (child->thread.dac1 == 0)
+                if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0)
                         return -ENOENT;
 
                 child->thread.dac1 = 0;
@@ -1070,7 +1070,7 @@ static int del_dac(struct task_struct *child, int slot)
                 child->thread.dvc1 = 0;
 #endif
         } else if (slot == 2) {
-                if (child->thread.dac1 == 0)
+                if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0)
                         return -ENOENT;
 
 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index fd0d29493fd..74367841615 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -23,6 +23,7 @@
 #include <linux/completion.h>
 #include <linux/cpumask.h>
 #include <linux/lmb.h>
+#include <linux/slab.h>
 
 #include <asm/prom.h>
 #include <asm/rtas.h>
diff --git a/arch/powerpc/kernel/rtas_flash.c b/arch/powerpc/kernel/rtas_flash.c
index a85117d5c9a..bfc2abafac4 100644
--- a/arch/powerpc/kernel/rtas_flash.c
+++ b/arch/powerpc/kernel/rtas_flash.c
@@ -15,6 +15,7 @@
 
 #include <linux/module.h>
 #include <linux/init.h>
+#include <linux/slab.h>
 #include <linux/proc_fs.h>
 #include <asm/delay.h>
 #include <asm/uaccess.h>
diff --git a/arch/powerpc/kernel/rtasd.c b/arch/powerpc/kernel/rtasd.c
index 2e4832ab210..4190eae7850 100644
--- a/arch/powerpc/kernel/rtasd.c
+++ b/arch/powerpc/kernel/rtasd.c
@@ -20,6 +20,7 @@
 #include <linux/spinlock.h>
 #include <linux/cpu.h>
 #include <linux/workqueue.h>
+#include <linux/slab.h>
 
 #include <asm/uaccess.h>
 #include <asm/io.h>
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index 03dd6a24819..48f0a008b20 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -36,6 +36,7 @@
 #include <linux/lmb.h>
 #include <linux/of_platform.h>
 #include <asm/io.h>
+#include <asm/paca.h>
 #include <asm/prom.h>
 #include <asm/processor.h>
 #include <asm/vdso_datapage.h>
@@ -493,6 +494,8 @@ void __init smp_setup_cpu_maps(void)
          * here will have to be reworked
          */
         cpu_init_thread_core_maps(nthreads);
+
+        free_unused_pacas();
 }
 #endif /* CONFIG_SMP */
 
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index b152de3e64d..8f58986c2ad 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -39,7 +39,6 @@
 #include <asm/serial.h>
 #include <asm/udbg.h>
 #include <asm/mmu_context.h>
-#include <asm/swiotlb.h>
 
 #include "setup.h"
 
@@ -343,11 +342,6 @@ void __init setup_arch(char **cmdline_p)
                 ppc_md.setup_arch();
         if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
 
-#ifdef CONFIG_SWIOTLB
-        if (ppc_swiotlb_enable)
-                swiotlb_init(1);
-#endif
-
         paging_init();
 
         /* Initialize the MMU context management stuff */
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 6568406b2a3..914389158a9 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -61,7 +61,6 @@
 #include <asm/xmon.h>
 #include <asm/udbg.h>
 #include <asm/kexec.h>
-#include <asm/swiotlb.h>
 #include <asm/mmu_context.h>
 
 #include "setup.h"
@@ -144,9 +143,9 @@ early_param("smt-enabled", early_smt_enabled);
 #endif /* CONFIG_SMP */
 
 /* Put the paca pointer into r13 and SPRG_PACA */
-void __init setup_paca(int cpu)
+static void __init setup_paca(struct paca_struct *new_paca)
 {
-        local_paca = &paca[cpu];
+        local_paca = new_paca;
         mtspr(SPRN_SPRG_PACA, local_paca);
 #ifdef CONFIG_PPC_BOOK3E
         mtspr(SPRN_SPRG_TLB_EXFRAME, local_paca->extlb);
@@ -176,14 +175,12 @@ void __init early_setup(unsigned long dt_ptr)
 {
         /* -------- printk is _NOT_ safe to use here ! ------- */
 
-        /* Fill in any unititialised pacas */
-        initialise_pacas();
-
         /* Identify CPU type */
         identify_cpu(0, mfspr(SPRN_PVR));
 
         /* Assume we're on cpu 0 for now. Don't write to the paca yet! */
-        setup_paca(0);
+        initialise_paca(&boot_paca, 0);
+        setup_paca(&boot_paca);
 
         /* Initialize lockdep early or else spinlocks will blow */
         lockdep_init();
@@ -203,7 +200,7 @@ void __init early_setup(unsigned long dt_ptr)
         early_init_devtree(__va(dt_ptr));
 
         /* Now we know the logical id of our boot cpu, setup the paca. */
-        setup_paca(boot_cpuid);
+        setup_paca(&paca[boot_cpuid]);
 
         /* Fix up paca fields required for the boot cpu */
         get_paca()->cpu_start = 1;
@@ -543,11 +540,6 @@ void __init setup_arch(char **cmdline_p)
         if (ppc_md.setup_arch)
                 ppc_md.setup_arch();
 
-#ifdef CONFIG_SWIOTLB
-        if (ppc_swiotlb_enable)
-                swiotlb_init(1);
-#endif
-
         paging_init();
 
         /* Initialize the MMU context management stuff */
diff --git a/arch/powerpc/kernel/smp-tbsync.c b/arch/powerpc/kernel/smp-tbsync.c
index a5e54526403..03e45c4a9ef 100644
--- a/arch/powerpc/kernel/smp-tbsync.c
+++ b/arch/powerpc/kernel/smp-tbsync.c
@@ -10,6 +10,7 @@
 #include <linux/smp.h>
 #include <linux/unistd.h>
 #include <linux/init.h>
+#include <linux/slab.h>
 #include <asm/atomic.h>
 #include <asm/smp.h>
 #include <asm/time.h>
diff --git a/arch/powerpc/kernel/softemu8xx.c b/arch/powerpc/kernel/softemu8xx.c
index 23c8c5e7dc4..af0e8290b4f 100644
--- a/arch/powerpc/kernel/softemu8xx.c
+++ b/arch/powerpc/kernel/softemu8xx.c
@@ -21,7 +21,6 @@
 #include <linux/stddef.h>
 #include <linux/unistd.h>
 #include <linux/ptrace.h>
-#include <linux/slab.h>
 #include <linux/user.h>
 #include <linux/interrupt.h>
 
diff --git a/arch/powerpc/kernel/sys_ppc32.c b/arch/powerpc/kernel/sys_ppc32.c
index c5a4732bcc4..19471a1cef1 100644
--- a/arch/powerpc/kernel/sys_ppc32.c
+++ b/arch/powerpc/kernel/sys_ppc32.c
@@ -41,6 +41,7 @@
 #include <linux/ptrace.h>
 #include <linux/elf.h>
 #include <linux/ipc.h>
+#include <linux/slab.h>
 
 #include <asm/ptrace.h>
 #include <asm/types.h>
diff --git a/arch/powerpc/kernel/syscalls.c b/arch/powerpc/kernel/syscalls.c
index 3370e62e43d..f2496f2faec 100644
--- a/arch/powerpc/kernel/syscalls.c
+++ b/arch/powerpc/kernel/syscalls.c
@@ -42,100 +42,6 @@
 #include <asm/time.h>
 #include <asm/unistd.h>
 
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-int sys_ipc(uint call, int first, unsigned long second, long third,
-            void __user *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        ret = -ENOSYS;
-        switch (call) {
-        case SEMOP:
-                ret = sys_semtimedop(first, (struct sembuf __user *)ptr,
-                                      (unsigned)second, NULL);
-                break;
-        case SEMTIMEDOP:
-                ret = sys_semtimedop(first, (struct sembuf __user *)ptr,
-                                      (unsigned)second,
-                                      (const struct timespec __user *) fifth);
-                break;
-        case SEMGET:
-                ret = sys_semget (first, (int)second, third);
-                break;
-        case SEMCTL: {
-                union semun fourth;
-
-                ret = -EINVAL;
-                if (!ptr)
-                        break;
-                if ((ret = get_user(fourth.__pad, (void __user * __user *)ptr)))
-                        break;
-                ret = sys_semctl(first, (int)second, third, fourth);
-                break;
-        }
-        case MSGSND:
-                ret = sys_msgsnd(first, (struct msgbuf __user *)ptr,
-                                 (size_t)second, third);
-                break;
-        case MSGRCV:
-                switch (version) {
-                case 0: {
-                        struct ipc_kludge tmp;
-
-                        ret = -EINVAL;
-                        if (!ptr)
-                                break;
-                        if ((ret = copy_from_user(&tmp,
-                                                (struct ipc_kludge __user *) ptr,
-                                                sizeof (tmp)) ? -EFAULT : 0))
-                                break;
-                        ret = sys_msgrcv(first, tmp.msgp, (size_t) second,
-                                          tmp.msgtyp, third);
-                        break;
-                }
-                default:
-                        ret = sys_msgrcv (first, (struct msgbuf __user *) ptr,
-                                          (size_t)second, fifth, third);
-                        break;
-                }
-                break;
-        case MSGGET:
-                ret = sys_msgget((key_t)first, (int)second);
-                break;
-        case MSGCTL:
-                ret = sys_msgctl(first, (int)second,
-                                  (struct msqid_ds __user *)ptr);
-                break;
-        case SHMAT: {
-                ulong raddr;
-                ret = do_shmat(first, (char __user *)ptr, (int)second, &raddr);
-                if (ret)
-                        break;
-                ret = put_user(raddr, (ulong __user *) third);
-                break;
-        }
-        case SHMDT:
-                ret = sys_shmdt((char __user *)ptr);
-                break;
-        case SHMGET:
-                ret = sys_shmget(first, (size_t)second, third);
-                break;
-        case SHMCTL:
-                ret = sys_shmctl(first, (int)second,
-                                 (struct shmid_ds __user *)ptr);
-                break;
-        }
-
-        return ret;
-}
-
 static inline unsigned long do_mmap2(unsigned long addr, size_t len,
                         unsigned long prot, unsigned long flags,
                         unsigned long fd, unsigned long off, int shift)
@@ -210,76 +116,6 @@ long ppc64_personality(unsigned long personality)
 }
 #endif
 
-#ifdef CONFIG_PPC64
-#define OVERRIDE_MACHINE    (personality(current->personality) == PER_LINUX32)
-#else
-#define OVERRIDE_MACHINE    0
-#endif
-
-static inline int override_machine(char __user *mach)
-{
-        if (OVERRIDE_MACHINE) {
-                /* change ppc64 to ppc */
-                if (__put_user(0, mach+3) || __put_user(0, mach+4))
-                        return -EFAULT;
-        }
-        return 0;
-}
-
-long ppc_newuname(struct new_utsname __user * name)
-{
-        int err = 0;
-
-        down_read(&uts_sem);
-        if (copy_to_user(name, utsname(), sizeof(*name)))
-                err = -EFAULT;
-        up_read(&uts_sem);
-        if (!err)
-                err = override_machine(name->machine);
-        return err;
-}
-
-int sys_uname(struct old_utsname __user *name)
-{
-        int err = 0;
-        
-        down_read(&uts_sem);
-        if (copy_to_user(name, utsname(), sizeof(*name)))
-                err = -EFAULT;
-        up_read(&uts_sem);
-        if (!err)
-                err = override_machine(name->machine);
-        return err;
-}
-
-int sys_olduname(struct oldold_utsname __user *name)
-{
-        int error;
-
-        if (!access_ok(VERIFY_WRITE, name, sizeof(struct oldold_utsname)))
-                return -EFAULT;
-  
-        down_read(&uts_sem);
-        error = __copy_to_user(&name->sysname, &utsname()->sysname,
-                               __OLD_UTS_LEN);
-        error |= __put_user(0, name->sysname + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->nodename, &utsname()->nodename,
-                                __OLD_UTS_LEN);
-        error |= __put_user(0, name->nodename + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->release, &utsname()->release,
-                                __OLD_UTS_LEN);
-        error |= __put_user(0, name->release + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->version, &utsname()->version,
-                                __OLD_UTS_LEN);
-        error |= __put_user(0, name->version + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->machine, &utsname()->machine,
-                                __OLD_UTS_LEN);
-        error |= override_machine(name->machine);
-        up_read(&uts_sem);
-
-        return error? -EFAULT: 0;
-}
-
 long ppc_fadvise64_64(int fd, int advice, u32 offset_high, u32 offset_low,
                       u32 len_high, u32 len_low)
 {
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 696626a2e83..29d128eb6c4 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -21,7 +21,6 @@
 #include <linux/stddef.h>
 #include <linux/unistd.h>
 #include <linux/ptrace.h>
-#include <linux/slab.h>
 #include <linux/user.h>
 #include <linux/interrupt.h>
 #include <linux/init.h>
diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c
index 77f64218abf..82237176a2a 100644
--- a/arch/powerpc/kernel/vio.c
+++ b/arch/powerpc/kernel/vio.c
@@ -17,6 +17,7 @@
 #include <linux/types.h>
 #include <linux/device.h>
 #include <linux/init.h>
+#include <linux/slab.h>
 #include <linux/console.h>
 #include <linux/module.h>
 #include <linux/mm.h>
diff --git a/arch/powerpc/kvm/44x.c b/arch/powerpc/kvm/44x.c
index f4d1b55aa70..689a57c2ac8 100644
--- a/arch/powerpc/kvm/44x.c
+++ b/arch/powerpc/kvm/44x.c
@@ -18,6 +18,7 @@
  */
 
 #include <linux/kvm_host.h>
+#include <linux/slab.h>
 #include <linux/err.h>
 
 #include <asm/reg.h>
diff --git a/arch/powerpc/kvm/44x_emulate.c b/arch/powerpc/kvm/44x_emulate.c
index 61af58fcece..65ea083a5b2 100644
--- a/arch/powerpc/kvm/44x_emulate.c
+++ b/arch/powerpc/kvm/44x_emulate.c
@@ -65,13 +65,14 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
                          */
                         switch (dcrn) {
                         case DCRN_CPR0_CONFIG_ADDR:
-                                vcpu->arch.gpr[rt] = vcpu->arch.cpr0_cfgaddr;
+                                kvmppc_set_gpr(vcpu, rt, vcpu->arch.cpr0_cfgaddr);
                                 break;
                         case DCRN_CPR0_CONFIG_DATA:
                                 local_irq_disable();
                                 mtdcr(DCRN_CPR0_CONFIG_ADDR,
                                           vcpu->arch.cpr0_cfgaddr);
-                                vcpu->arch.gpr[rt] = mfdcr(DCRN_CPR0_CONFIG_DATA);
+                                kvmppc_set_gpr(vcpu, rt,
+                                               mfdcr(DCRN_CPR0_CONFIG_DATA));
                                 local_irq_enable();
                                 break;
                         default:
@@ -93,11 +94,11 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
                         /* emulate some access in kernel */
                         switch (dcrn) {
                         case DCRN_CPR0_CONFIG_ADDR:
-                                vcpu->arch.cpr0_cfgaddr = vcpu->arch.gpr[rs];
+                                vcpu->arch.cpr0_cfgaddr = kvmppc_get_gpr(vcpu, rs);
                                 break;
                         default:
                                 run->dcr.dcrn = dcrn;
-                                run->dcr.data = vcpu->arch.gpr[rs];
+                                run->dcr.data = kvmppc_get_gpr(vcpu, rs);
                                 run->dcr.is_write = 1;
                                 vcpu->arch.dcr_needed = 1;
                                 kvmppc_account_exit(vcpu, DCR_EXITS);
@@ -146,13 +147,13 @@ int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
 
         switch (sprn) {
         case SPRN_PID:
-                kvmppc_set_pid(vcpu, vcpu->arch.gpr[rs]); break;
+                kvmppc_set_pid(vcpu, kvmppc_get_gpr(vcpu, rs)); break;
         case SPRN_MMUCR:
-                vcpu->arch.mmucr = vcpu->arch.gpr[rs]; break;
+                vcpu->arch.mmucr = kvmppc_get_gpr(vcpu, rs); break;
         case SPRN_CCR0:
-                vcpu->arch.ccr0 = vcpu->arch.gpr[rs]; break;
+                vcpu->arch.ccr0 = kvmppc_get_gpr(vcpu, rs); break;
         case SPRN_CCR1:
-                vcpu->arch.ccr1 = vcpu->arch.gpr[rs]; break;
+                vcpu->arch.ccr1 = kvmppc_get_gpr(vcpu, rs); break;
         default:
                 emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, rs);
         }
@@ -167,13 +168,13 @@ int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
 
         switch (sprn) {
         case SPRN_PID:
-                vcpu->arch.gpr[rt] = vcpu->arch.pid; break;
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.pid); break;
         case SPRN_MMUCR:
-                vcpu->arch.gpr[rt] = vcpu->arch.mmucr; break;
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.mmucr); break;
         case SPRN_CCR0:
-                vcpu->arch.gpr[rt] = vcpu->arch.ccr0; break;
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ccr0); break;
         case SPRN_CCR1:
-                vcpu->arch.gpr[rt] = vcpu->arch.ccr1; break;
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ccr1); break;
         default:
                 emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, rt);
         }
diff --git a/arch/powerpc/kvm/44x_tlb.c b/arch/powerpc/kvm/44x_tlb.c
index ff3cb63b811..2570fcc7665 100644
--- a/arch/powerpc/kvm/44x_tlb.c
+++ b/arch/powerpc/kvm/44x_tlb.c
@@ -439,7 +439,7 @@ int kvmppc_44x_emul_tlbwe(struct kvm_vcpu *vcpu, u8 ra, u8 rs, u8 ws)
         struct kvmppc_44x_tlbe *tlbe;
         unsigned int gtlb_index;
 
-        gtlb_index = vcpu->arch.gpr[ra];
+        gtlb_index = kvmppc_get_gpr(vcpu, ra);
         if (gtlb_index > KVM44x_GUEST_TLB_SIZE) {
                 printk("%s: index %d\n", __func__, gtlb_index);
                 kvmppc_dump_vcpu(vcpu);
@@ -455,15 +455,15 @@ int kvmppc_44x_emul_tlbwe(struct kvm_vcpu *vcpu, u8 ra, u8 rs, u8 ws)
         switch (ws) {
         case PPC44x_TLB_PAGEID:
                 tlbe->tid = get_mmucr_stid(vcpu);
-                tlbe->word0 = vcpu->arch.gpr[rs];
+                tlbe->word0 = kvmppc_get_gpr(vcpu, rs);
                 break;
 
         case PPC44x_TLB_XLAT:
-                tlbe->word1 = vcpu->arch.gpr[rs];
+                tlbe->word1 = kvmppc_get_gpr(vcpu, rs);
                 break;
 
         case PPC44x_TLB_ATTRIB:
-                tlbe->word2 = vcpu->arch.gpr[rs];
+                tlbe->word2 = kvmppc_get_gpr(vcpu, rs);
                 break;
 
         default:
@@ -500,18 +500,20 @@ int kvmppc_44x_emul_tlbsx(struct kvm_vcpu *vcpu, u8 rt, u8 ra, u8 rb, u8 rc)
         unsigned int as = get_mmucr_sts(vcpu);
         unsigned int pid = get_mmucr_stid(vcpu);
 
-        ea = vcpu->arch.gpr[rb];
+        ea = kvmppc_get_gpr(vcpu, rb);
         if (ra)
-                ea += vcpu->arch.gpr[ra];
+                ea += kvmppc_get_gpr(vcpu, ra);
 
         gtlb_index = kvmppc_44x_tlb_index(vcpu, ea, pid, as);
         if (rc) {
+                u32 cr = kvmppc_get_cr(vcpu);
+
                 if (gtlb_index < 0)
-                        vcpu->arch.cr &= ~0x20000000;
+                        kvmppc_set_cr(vcpu, cr & ~0x20000000);
                 else
-                        vcpu->arch.cr |= 0x20000000;
+                        kvmppc_set_cr(vcpu, cr | 0x20000000);
         }
-        vcpu->arch.gpr[rt] = gtlb_index;
+        kvmppc_set_gpr(vcpu, rt, gtlb_index);
 
         kvmppc_set_exit_type(vcpu, EMULATED_TLBSX_EXITS);
         return EMULATE_DONE;
diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig
index fe037fdaf1b..60624cc9f4d 100644
--- a/arch/powerpc/kvm/Kconfig
+++ b/arch/powerpc/kvm/Kconfig
@@ -20,6 +20,7 @@ config KVM
         bool
         select PREEMPT_NOTIFIERS
         select ANON_INODES
+        select KVM_MMIO
 
 config KVM_BOOK3S_64_HANDLER
         bool
diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
index 3e294bd9b8c..604af29b71e 100644
--- a/arch/powerpc/kvm/book3s.c
+++ b/arch/powerpc/kvm/book3s.c
@@ -26,6 +26,7 @@
 #include <asm/kvm_ppc.h>
 #include <asm/kvm_book3s.h>
 #include <asm/mmu_context.h>
+#include <linux/gfp.h>
 #include <linux/sched.h>
 #include <linux/vmalloc.h>
 
@@ -33,12 +34,9 @@
 
 /* #define EXIT_DEBUG */
 /* #define EXIT_DEBUG_SIMPLE */
+/* #define DEBUG_EXT */
 
-/* Without AGGRESSIVE_DEC we only fire off a DEC interrupt when DEC turns 0.
- * When set, we retrigger a DEC interrupt after that if DEC <= 0.
- * PPC32 Linux runs faster without AGGRESSIVE_DEC, PPC64 Linux requires it. */
-
-/* #define AGGRESSIVE_DEC */
+static void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr);
 
 struct kvm_stats_debugfs_item debugfs_entries[] = {
         { "exits",       VCPU_STAT(sum_exits) },
@@ -72,16 +70,24 @@ void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu)
 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 {
         memcpy(get_paca()->kvm_slb, to_book3s(vcpu)->slb_shadow, sizeof(get_paca()->kvm_slb));
+        memcpy(&get_paca()->shadow_vcpu, &to_book3s(vcpu)->shadow_vcpu,
+               sizeof(get_paca()->shadow_vcpu));
         get_paca()->kvm_slb_max = to_book3s(vcpu)->slb_shadow_max;
 }
 
 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
 {
         memcpy(to_book3s(vcpu)->slb_shadow, get_paca()->kvm_slb, sizeof(get_paca()->kvm_slb));
+        memcpy(&to_book3s(vcpu)->shadow_vcpu, &get_paca()->shadow_vcpu,
+               sizeof(get_paca()->shadow_vcpu));
         to_book3s(vcpu)->slb_shadow_max = get_paca()->kvm_slb_max;
+
+        kvmppc_giveup_ext(vcpu, MSR_FP);
+        kvmppc_giveup_ext(vcpu, MSR_VEC);
+        kvmppc_giveup_ext(vcpu, MSR_VSX);
 }
 
-#if defined(AGGRESSIVE_DEC) || defined(EXIT_DEBUG)
+#if defined(EXIT_DEBUG)
 static u32 kvmppc_get_dec(struct kvm_vcpu *vcpu)
 {
         u64 jd = mftb() - vcpu->arch.dec_jiffies;
@@ -89,6 +95,23 @@ static u32 kvmppc_get_dec(struct kvm_vcpu *vcpu)
 }
 #endif
 
+static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu)
+{
+        vcpu->arch.shadow_msr = vcpu->arch.msr;
+        /* Guest MSR values */
+        vcpu->arch.shadow_msr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE |
+                                 MSR_BE | MSR_DE;
+        /* Process MSR values */
+        vcpu->arch.shadow_msr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR |
+                                 MSR_EE;
+        /* External providers the guest reserved */
+        vcpu->arch.shadow_msr |= (vcpu->arch.msr & vcpu->arch.guest_owned_ext);
+        /* 64-bit Process MSR values */
+#ifdef CONFIG_PPC_BOOK3S_64
+        vcpu->arch.shadow_msr |= MSR_ISF | MSR_HV;
+#endif
+}
+
 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
 {
         ulong old_msr = vcpu->arch.msr;
@@ -96,12 +119,10 @@ void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
 #ifdef EXIT_DEBUG
         printk(KERN_INFO "KVM: Set MSR to 0x%llx\n", msr);
 #endif
+
         msr &= to_book3s(vcpu)->msr_mask;
         vcpu->arch.msr = msr;
-        vcpu->arch.shadow_msr = msr | MSR_USER32;
-        vcpu->arch.shadow_msr &= ( MSR_VEC | MSR_VSX | MSR_FP | MSR_FE0 |
-                                   MSR_USER64 | MSR_SE | MSR_BE | MSR_DE |
-                                   MSR_FE1);
+        kvmppc_recalc_shadow_msr(vcpu);
 
         if (msr & (MSR_WE|MSR_POW)) {
                 if (!vcpu->arch.pending_exceptions) {
@@ -125,11 +146,10 @@ void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags)
         vcpu->arch.mmu.reset_msr(vcpu);
 }
 
-void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec)
+static int kvmppc_book3s_vec2irqprio(unsigned int vec)
 {
         unsigned int prio;
 
-        vcpu->stat.queue_intr++;
         switch (vec) {
         case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET;         break;
         case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK;        break;
@@ -149,15 +169,31 @@ void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec)
         default:    prio = BOOK3S_IRQPRIO_MAX;                  break;
         }
 
-        set_bit(prio, &vcpu->arch.pending_exceptions);
+        return prio;
+}
+
+static void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu,
+                                          unsigned int vec)
+{
+        clear_bit(kvmppc_book3s_vec2irqprio(vec),
+                  &vcpu->arch.pending_exceptions);
+}
+
+void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec)
+{
+        vcpu->stat.queue_intr++;
+
+        set_bit(kvmppc_book3s_vec2irqprio(vec),
+                &vcpu->arch.pending_exceptions);
 #ifdef EXIT_DEBUG
         printk(KERN_INFO "Queueing interrupt %x\n", vec);
 #endif
 }
 
 
-void kvmppc_core_queue_program(struct kvm_vcpu *vcpu)
+void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags)
 {
+        to_book3s(vcpu)->prog_flags = flags;
         kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_PROGRAM);
 }
 
@@ -171,6 +207,11 @@ int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
         return test_bit(BOOK3S_INTERRUPT_DECREMENTER >> 7, &vcpu->arch.pending_exceptions);
 }
 
+void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
+{
+        kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
+}
+
 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
                                 struct kvm_interrupt *irq)
 {
@@ -181,6 +222,7 @@ int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu, unsigned int priority)
 {
         int deliver = 1;
         int vec = 0;
+        ulong flags = 0ULL;
 
         switch (priority) {
         case BOOK3S_IRQPRIO_DECREMENTER:
@@ -214,6 +256,7 @@ int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu, unsigned int priority)
                 break;
         case BOOK3S_IRQPRIO_PROGRAM:
                 vec = BOOK3S_INTERRUPT_PROGRAM;
+                flags = to_book3s(vcpu)->prog_flags;
                 break;
         case BOOK3S_IRQPRIO_VSX:
                 vec = BOOK3S_INTERRUPT_VSX;
@@ -244,7 +287,7 @@ int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu, unsigned int priority)
 #endif
 
         if (deliver)
-                kvmppc_inject_interrupt(vcpu, vec, 0ULL);
+                kvmppc_inject_interrupt(vcpu, vec, flags);
 
         return deliver;
 }
@@ -254,21 +297,15 @@ void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu)
         unsigned long *pending = &vcpu->arch.pending_exceptions;
         unsigned int priority;
 
-        /* XXX be more clever here - no need to mftb() on every entry */
-        /* Issue DEC again if it's still active */
-#ifdef AGGRESSIVE_DEC
-        if (vcpu->arch.msr & MSR_EE)
-                if (kvmppc_get_dec(vcpu) & 0x80000000)
-                        kvmppc_core_queue_dec(vcpu);
-#endif
-
 #ifdef EXIT_DEBUG
         if (vcpu->arch.pending_exceptions)
                 printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions);
 #endif
         priority = __ffs(*pending);
         while (priority <= (sizeof(unsigned int) * 8)) {
-                if (kvmppc_book3s_irqprio_deliver(vcpu, priority)) {
+                if (kvmppc_book3s_irqprio_deliver(vcpu, priority) &&
+                    (priority != BOOK3S_IRQPRIO_DECREMENTER)) {
+                        /* DEC interrupts get cleared by mtdec */
                         clear_bit(priority, &vcpu->arch.pending_exceptions);
                         break;
                 }
@@ -503,14 +540,14 @@ int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu,
                 /* Page not found in guest PTE entries */
                 vcpu->arch.dear = vcpu->arch.fault_dear;
                 to_book3s(vcpu)->dsisr = vcpu->arch.fault_dsisr;
-                vcpu->arch.msr |= (vcpu->arch.shadow_msr & 0x00000000f8000000ULL);
+                vcpu->arch.msr |= (vcpu->arch.shadow_srr1 & 0x00000000f8000000ULL);
                 kvmppc_book3s_queue_irqprio(vcpu, vec);
         } else if (page_found == -EPERM) {
                 /* Storage protection */
                 vcpu->arch.dear = vcpu->arch.fault_dear;
                 to_book3s(vcpu)->dsisr = vcpu->arch.fault_dsisr & ~DSISR_NOHPTE;
                 to_book3s(vcpu)->dsisr |= DSISR_PROTFAULT;
-                vcpu->arch.msr |= (vcpu->arch.shadow_msr & 0x00000000f8000000ULL);
+                vcpu->arch.msr |= (vcpu->arch.shadow_srr1 & 0x00000000f8000000ULL);
                 kvmppc_book3s_queue_irqprio(vcpu, vec);
         } else if (page_found == -EINVAL) {
                 /* Page not found in guest SLB */
@@ -532,13 +569,122 @@ int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu,
                 r = kvmppc_emulate_mmio(run, vcpu);
                 if ( r == RESUME_HOST_NV )
                         r = RESUME_HOST;
-                if ( r == RESUME_GUEST_NV )
-                        r = RESUME_GUEST;
         }
 
         return r;
 }
 
+static inline int get_fpr_index(int i)
+{
+#ifdef CONFIG_VSX
+        i *= 2;
+#endif
+        return i;
+}
+
+/* Give up external provider (FPU, Altivec, VSX) */
+static void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr)
+{
+        struct thread_struct *t = &current->thread;
+        u64 *vcpu_fpr = vcpu->arch.fpr;
+        u64 *vcpu_vsx = vcpu->arch.vsr;
+        u64 *thread_fpr = (u64*)t->fpr;
+        int i;
+
+        if (!(vcpu->arch.guest_owned_ext & msr))
+                return;
+
+#ifdef DEBUG_EXT
+        printk(KERN_INFO "Giving up ext 0x%lx\n", msr);
+#endif
+
+        switch (msr) {
+        case MSR_FP:
+                giveup_fpu(current);
+                for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++)
+                        vcpu_fpr[i] = thread_fpr[get_fpr_index(i)];
+
+                vcpu->arch.fpscr = t->fpscr.val;
+                break;
+        case MSR_VEC:
+#ifdef CONFIG_ALTIVEC
+                giveup_altivec(current);
+                memcpy(vcpu->arch.vr, t->vr, sizeof(vcpu->arch.vr));
+                vcpu->arch.vscr = t->vscr;
+#endif
+                break;
+        case MSR_VSX:
+#ifdef CONFIG_VSX
+                __giveup_vsx(current);
+                for (i = 0; i < ARRAY_SIZE(vcpu->arch.vsr); i++)
+                        vcpu_vsx[i] = thread_fpr[get_fpr_index(i) + 1];
+#endif
+                break;
+        default:
+                BUG();
+        }
+
+        vcpu->arch.guest_owned_ext &= ~msr;
+        current->thread.regs->msr &= ~msr;
+        kvmppc_recalc_shadow_msr(vcpu);
+}
+
+/* Handle external providers (FPU, Altivec, VSX) */
+static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
+                             ulong msr)
+{
+        struct thread_struct *t = &current->thread;
+        u64 *vcpu_fpr = vcpu->arch.fpr;
+        u64 *vcpu_vsx = vcpu->arch.vsr;
+        u64 *thread_fpr = (u64*)t->fpr;
+        int i;
+
+        if (!(vcpu->arch.msr & msr)) {
+                kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
+                return RESUME_GUEST;
+        }
+
+#ifdef DEBUG_EXT
+        printk(KERN_INFO "Loading up ext 0x%lx\n", msr);
+#endif
+
+        current->thread.regs->msr |= msr;
+
+        switch (msr) {
+        case MSR_FP:
+                for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++)
+                        thread_fpr[get_fpr_index(i)] = vcpu_fpr[i];
+
+                t->fpscr.val = vcpu->arch.fpscr;
+                t->fpexc_mode = 0;
+                kvmppc_load_up_fpu();
+                break;
+        case MSR_VEC:
+#ifdef CONFIG_ALTIVEC
+                memcpy(t->vr, vcpu->arch.vr, sizeof(vcpu->arch.vr));
+                t->vscr = vcpu->arch.vscr;
+                t->vrsave = -1;
+                kvmppc_load_up_altivec();
+#endif
+                break;
+        case MSR_VSX:
+#ifdef CONFIG_VSX
+                for (i = 0; i < ARRAY_SIZE(vcpu->arch.vsr); i++)
+                        thread_fpr[get_fpr_index(i) + 1] = vcpu_vsx[i];
+                kvmppc_load_up_vsx();
+#endif
+                break;
+        default:
+                BUG();
+        }
+
+        vcpu->arch.guest_owned_ext |= msr;
+
+        kvmppc_recalc_shadow_msr(vcpu);
+
+        return RESUME_GUEST;
+}
+
 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                        unsigned int exit_nr)
 {
@@ -563,7 +709,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
         case BOOK3S_INTERRUPT_INST_STORAGE:
                 vcpu->stat.pf_instruc++;
                 /* only care about PTEG not found errors, but leave NX alone */
-                if (vcpu->arch.shadow_msr & 0x40000000) {
+                if (vcpu->arch.shadow_srr1 & 0x40000000) {
                         r = kvmppc_handle_pagefault(run, vcpu, vcpu->arch.pc, exit_nr);
                         vcpu->stat.sp_instruc++;
                 } else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
@@ -575,7 +721,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                          */
                         kvmppc_mmu_pte_flush(vcpu, vcpu->arch.pc, ~0xFFFULL);
                 } else {
-                        vcpu->arch.msr |= (vcpu->arch.shadow_msr & 0x58000000);
+                        vcpu->arch.msr |= vcpu->arch.shadow_srr1 & 0x58000000;
                         kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
                         kvmppc_mmu_pte_flush(vcpu, vcpu->arch.pc, ~0xFFFULL);
                         r = RESUME_GUEST;
@@ -621,6 +767,9 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
         case BOOK3S_INTERRUPT_PROGRAM:
         {
                 enum emulation_result er;
+                ulong flags;
+
+                flags = vcpu->arch.shadow_srr1 & 0x1f0000ull;
 
                 if (vcpu->arch.msr & MSR_PR) {
 #ifdef EXIT_DEBUG
@@ -628,7 +777,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
 #endif
                         if ((vcpu->arch.last_inst & 0xff0007ff) !=
                             (INS_DCBZ & 0xfffffff7)) {
-                                kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
+                                kvmppc_core_queue_program(vcpu, flags);
                                 r = RESUME_GUEST;
                                 break;
                         }
@@ -638,12 +787,12 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                 er = kvmppc_emulate_instruction(run, vcpu);
                 switch (er) {
                 case EMULATE_DONE:
-                        r = RESUME_GUEST;
+                        r = RESUME_GUEST_NV;
                         break;
                 case EMULATE_FAIL:
                         printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
                                __func__, vcpu->arch.pc, vcpu->arch.last_inst);
-                        kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
+                        kvmppc_core_queue_program(vcpu, flags);
                         r = RESUME_GUEST;
                         break;
                 default:
@@ -653,23 +802,30 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
         }
         case BOOK3S_INTERRUPT_SYSCALL:
 #ifdef EXIT_DEBUG
-                printk(KERN_INFO "Syscall Nr %d\n", (int)vcpu->arch.gpr[0]);
+                printk(KERN_INFO "Syscall Nr %d\n", (int)kvmppc_get_gpr(vcpu, 0));
 #endif
                 vcpu->stat.syscall_exits++;
                 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
                 r = RESUME_GUEST;
                 break;
-        case BOOK3S_INTERRUPT_MACHINE_CHECK:
         case BOOK3S_INTERRUPT_FP_UNAVAIL:
-        case BOOK3S_INTERRUPT_TRACE:
+                r = kvmppc_handle_ext(vcpu, exit_nr, MSR_FP);
+                break;
         case BOOK3S_INTERRUPT_ALTIVEC:
+                r = kvmppc_handle_ext(vcpu, exit_nr, MSR_VEC);
+                break;
         case BOOK3S_INTERRUPT_VSX:
+                r = kvmppc_handle_ext(vcpu, exit_nr, MSR_VSX);
+                break;
+        case BOOK3S_INTERRUPT_MACHINE_CHECK:
+        case BOOK3S_INTERRUPT_TRACE:
                 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
                 r = RESUME_GUEST;
                 break;
         default:
                 /* Ugh - bork here! What did we get? */
-                printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | msr=0x%lx\n", exit_nr, vcpu->arch.pc, vcpu->arch.shadow_msr);
+                printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | msr=0x%lx\n",
+                        exit_nr, vcpu->arch.pc, vcpu->arch.shadow_srr1);
                 r = RESUME_HOST;
                 BUG();
                 break;
@@ -712,10 +868,10 @@ int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
         int i;
 
         regs->pc = vcpu->arch.pc;
-        regs->cr = vcpu->arch.cr;
+        regs->cr = kvmppc_get_cr(vcpu);
         regs->ctr = vcpu->arch.ctr;
         regs->lr = vcpu->arch.lr;
-        regs->xer = vcpu->arch.xer;
+        regs->xer = kvmppc_get_xer(vcpu);
         regs->msr = vcpu->arch.msr;
         regs->srr0 = vcpu->arch.srr0;
         regs->srr1 = vcpu->arch.srr1;
@@ -729,7 +885,7 @@ int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
         regs->sprg7 = vcpu->arch.sprg6;
 
         for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
-                regs->gpr[i] = vcpu->arch.gpr[i];
+                regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
 
         return 0;
 }
@@ -739,10 +895,10 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
         int i;
 
         vcpu->arch.pc = regs->pc;
-        vcpu->arch.cr = regs->cr;
+        kvmppc_set_cr(vcpu, regs->cr);
         vcpu->arch.ctr = regs->ctr;
         vcpu->arch.lr = regs->lr;
-        vcpu->arch.xer = regs->xer;
+        kvmppc_set_xer(vcpu, regs->xer);
         kvmppc_set_msr(vcpu, regs->msr);
         vcpu->arch.srr0 = regs->srr0;
         vcpu->arch.srr1 = regs->srr1;
@@ -754,8 +910,8 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
         vcpu->arch.sprg6 = regs->sprg5;
         vcpu->arch.sprg7 = regs->sprg6;
 
-        for (i = 0; i < ARRAY_SIZE(vcpu->arch.gpr); i++)
-                vcpu->arch.gpr[i] = regs->gpr[i];
+        for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
+                kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
 
         return 0;
 }
@@ -848,9 +1004,10 @@ int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
         struct kvm_vcpu *vcpu;
         ulong ga, ga_end;
         int is_dirty = 0;
-        int r, n;
+        int r;
+        unsigned long n;
 
-        down_write(&kvm->slots_lock);
+        mutex_lock(&kvm->slots_lock);
 
         r = kvm_get_dirty_log(kvm, log, &is_dirty);
         if (r)
@@ -858,7 +1015,7 @@ int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
 
         /* If nothing is dirty, don't bother messing with page tables. */
         if (is_dirty) {
-                memslot = &kvm->memslots[log->slot];
+                memslot = &kvm->memslots->memslots[log->slot];
 
                 ga = memslot->base_gfn << PAGE_SHIFT;
                 ga_end = ga + (memslot->npages << PAGE_SHIFT);
@@ -866,13 +1023,13 @@ int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
                 kvm_for_each_vcpu(n, vcpu, kvm)
                         kvmppc_mmu_pte_pflush(vcpu, ga, ga_end);
 
-                n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
+                n = kvm_dirty_bitmap_bytes(memslot);
                 memset(memslot->dirty_bitmap, 0, n);
         }
 
         r = 0;
 out:
-        up_write(&kvm->slots_lock);
+        mutex_unlock(&kvm->slots_lock);
         return r;
 }
 
@@ -910,6 +1067,7 @@ struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
         vcpu->arch.trampoline_lowmem = kvmppc_trampoline_lowmem;
         vcpu->arch.trampoline_enter = kvmppc_trampoline_enter;
         vcpu->arch.highmem_handler = (ulong)kvmppc_handler_highmem;
+        vcpu->arch.rmcall = *(ulong*)kvmppc_rmcall;
 
         vcpu->arch.shadow_msr = MSR_USER64;
 
@@ -943,6 +1101,10 @@ extern int __kvmppc_vcpu_entry(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu);
 int __kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
 {
         int ret;
+        struct thread_struct ext_bkp;
+        bool save_vec = current->thread.used_vr;
+        bool save_vsx = current->thread.used_vsr;
+        ulong ext_msr;
 
         /* No need to go into the guest when all we do is going out */
         if (signal_pending(current)) {
@@ -950,6 +1112,35 @@ int __kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
                 return -EINTR;
         }
 
+        /* Save FPU state in stack */
+        if (current->thread.regs->msr & MSR_FP)
+                giveup_fpu(current);
+        memcpy(ext_bkp.fpr, current->thread.fpr, sizeof(current->thread.fpr));
+        ext_bkp.fpscr = current->thread.fpscr;
+        ext_bkp.fpexc_mode = current->thread.fpexc_mode;
+
+#ifdef CONFIG_ALTIVEC
+        /* Save Altivec state in stack */
+        if (save_vec) {
+                if (current->thread.regs->msr & MSR_VEC)
+                        giveup_altivec(current);
+                memcpy(ext_bkp.vr, current->thread.vr, sizeof(ext_bkp.vr));
+                ext_bkp.vscr = current->thread.vscr;
+                ext_bkp.vrsave = current->thread.vrsave;
+        }
+        ext_bkp.used_vr = current->thread.used_vr;
+#endif
+
+#ifdef CONFIG_VSX
+        /* Save VSX state in stack */
+        if (save_vsx && (current->thread.regs->msr & MSR_VSX))
+                        __giveup_vsx(current);
+        ext_bkp.used_vsr = current->thread.used_vsr;
+#endif
+
+        /* Remember the MSR with disabled extensions */
+        ext_msr = current->thread.regs->msr;
+
         /* XXX we get called with irq disabled - change that! */
         local_irq_enable();
 
@@ -957,6 +1148,32 @@ int __kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
 
         local_irq_disable();
 
+        current->thread.regs->msr = ext_msr;
+
+        /* Make sure we save the guest FPU/Altivec/VSX state */
+        kvmppc_giveup_ext(vcpu, MSR_FP);
+        kvmppc_giveup_ext(vcpu, MSR_VEC);
+        kvmppc_giveup_ext(vcpu, MSR_VSX);
+
+        /* Restore FPU state from stack */
+        memcpy(current->thread.fpr, ext_bkp.fpr, sizeof(ext_bkp.fpr));
+        current->thread.fpscr = ext_bkp.fpscr;
+        current->thread.fpexc_mode = ext_bkp.fpexc_mode;
+
+#ifdef CONFIG_ALTIVEC
+        /* Restore Altivec state from stack */
+        if (save_vec && current->thread.used_vr) {
+                memcpy(current->thread.vr, ext_bkp.vr, sizeof(ext_bkp.vr));
+                current->thread.vscr = ext_bkp.vscr;
+                current->thread.vrsave= ext_bkp.vrsave;
+        }
+        current->thread.used_vr = ext_bkp.used_vr;
+#endif
+
+#ifdef CONFIG_VSX
+        current->thread.used_vsr = ext_bkp.used_vsr;
+#endif
+
         return ret;
 }
 
diff --git a/arch/powerpc/kvm/book3s_64_emulate.c b/arch/powerpc/kvm/book3s_64_emulate.c
index 1027eac6d47..2b0ee7e040c 100644
--- a/arch/powerpc/kvm/book3s_64_emulate.c
+++ b/arch/powerpc/kvm/book3s_64_emulate.c
@@ -65,11 +65,11 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
         case 31:
                 switch (get_xop(inst)) {
                 case OP_31_XOP_MFMSR:
-                        vcpu->arch.gpr[get_rt(inst)] = vcpu->arch.msr;
+                        kvmppc_set_gpr(vcpu, get_rt(inst), vcpu->arch.msr);
                         break;
                 case OP_31_XOP_MTMSRD:
                 {
-                        ulong rs = vcpu->arch.gpr[get_rs(inst)];
+                        ulong rs = kvmppc_get_gpr(vcpu, get_rs(inst));
                         if (inst & 0x10000) {
                                 vcpu->arch.msr &= ~(MSR_RI | MSR_EE);
                                 vcpu->arch.msr |= rs & (MSR_RI | MSR_EE);
@@ -78,30 +78,30 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
                         break;
                 }
                 case OP_31_XOP_MTMSR:
-                        kvmppc_set_msr(vcpu, vcpu->arch.gpr[get_rs(inst)]);
+                        kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, get_rs(inst)));
                         break;
                 case OP_31_XOP_MFSRIN:
                 {
                         int srnum;
 
-                        srnum = (vcpu->arch.gpr[get_rb(inst)] >> 28) & 0xf;
+                        srnum = (kvmppc_get_gpr(vcpu, get_rb(inst)) >> 28) & 0xf;
                         if (vcpu->arch.mmu.mfsrin) {
                                 u32 sr;
                                 sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
-                                vcpu->arch.gpr[get_rt(inst)] = sr;
+                                kvmppc_set_gpr(vcpu, get_rt(inst), sr);
                         }
                         break;
                 }
                 case OP_31_XOP_MTSRIN:
                         vcpu->arch.mmu.mtsrin(vcpu,
-                                (vcpu->arch.gpr[get_rb(inst)] >> 28) & 0xf,
-                                vcpu->arch.gpr[get_rs(inst)]);
+                                (kvmppc_get_gpr(vcpu, get_rb(inst)) >> 28) & 0xf,
+                                kvmppc_get_gpr(vcpu, get_rs(inst)));
                         break;
                 case OP_31_XOP_TLBIE:
                 case OP_31_XOP_TLBIEL:
                 {
                         bool large = (inst & 0x00200000) ? true : false;
-                        ulong addr = vcpu->arch.gpr[get_rb(inst)];
+                        ulong addr = kvmppc_get_gpr(vcpu, get_rb(inst));
                         vcpu->arch.mmu.tlbie(vcpu, addr, large);
                         break;
                 }
@@ -111,14 +111,16 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
                         if (!vcpu->arch.mmu.slbmte)
                                 return EMULATE_FAIL;
 
-                        vcpu->arch.mmu.slbmte(vcpu, vcpu->arch.gpr[get_rs(inst)],
-                                                vcpu->arch.gpr[get_rb(inst)]);
+                        vcpu->arch.mmu.slbmte(vcpu,
+                                        kvmppc_get_gpr(vcpu, get_rs(inst)),
+                                        kvmppc_get_gpr(vcpu, get_rb(inst)));
                         break;
                 case OP_31_XOP_SLBIE:
                         if (!vcpu->arch.mmu.slbie)
                                 return EMULATE_FAIL;
 
-                        vcpu->arch.mmu.slbie(vcpu, vcpu->arch.gpr[get_rb(inst)]);
+                        vcpu->arch.mmu.slbie(vcpu,
+                                        kvmppc_get_gpr(vcpu, get_rb(inst)));
                         break;
                 case OP_31_XOP_SLBIA:
                         if (!vcpu->arch.mmu.slbia)
@@ -132,9 +134,9 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
                         } else {
                                 ulong t, rb;
 
-                                rb = vcpu->arch.gpr[get_rb(inst)];
+                                rb = kvmppc_get_gpr(vcpu, get_rb(inst));
                                 t = vcpu->arch.mmu.slbmfee(vcpu, rb);
-                                vcpu->arch.gpr[get_rt(inst)] = t;
+                                kvmppc_set_gpr(vcpu, get_rt(inst), t);
                         }
                         break;
                 case OP_31_XOP_SLBMFEV:
@@ -143,20 +145,20 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
                         } else {
                                 ulong t, rb;
 
-                                rb = vcpu->arch.gpr[get_rb(inst)];
+                                rb = kvmppc_get_gpr(vcpu, get_rb(inst));
                                 t = vcpu->arch.mmu.slbmfev(vcpu, rb);
-                                vcpu->arch.gpr[get_rt(inst)] = t;
+                                kvmppc_set_gpr(vcpu, get_rt(inst), t);
                         }
                         break;
                 case OP_31_XOP_DCBZ:
                 {
-                        ulong rb =  vcpu->arch.gpr[get_rb(inst)];
+                        ulong rb = kvmppc_get_gpr(vcpu, get_rb(inst));
                         ulong ra = 0;
                         ulong addr;
                         u32 zeros[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
 
                         if (get_ra(inst))
-                                ra = vcpu->arch.gpr[get_ra(inst)];
+                                ra = kvmppc_get_gpr(vcpu, get_ra(inst));
 
                         addr = (ra + rb) & ~31ULL;
                         if (!(vcpu->arch.msr & MSR_SF))
@@ -233,43 +235,44 @@ static void kvmppc_write_bat(struct kvm_vcpu *vcpu, int sprn, u32 val)
 int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
 {
         int emulated = EMULATE_DONE;
+        ulong spr_val = kvmppc_get_gpr(vcpu, rs);
 
         switch (sprn) {
         case SPRN_SDR1:
-                to_book3s(vcpu)->sdr1 = vcpu->arch.gpr[rs];
+                to_book3s(vcpu)->sdr1 = spr_val;
                 break;
         case SPRN_DSISR:
-                to_book3s(vcpu)->dsisr = vcpu->arch.gpr[rs];
+                to_book3s(vcpu)->dsisr = spr_val;
                 break;
         case SPRN_DAR:
-                vcpu->arch.dear = vcpu->arch.gpr[rs];
+                vcpu->arch.dear = spr_val;
                 break;
         case SPRN_HIOR:
-                to_book3s(vcpu)->hior = vcpu->arch.gpr[rs];
+                to_book3s(vcpu)->hior = spr_val;
                 break;
         case SPRN_IBAT0U ... SPRN_IBAT3L:
         case SPRN_IBAT4U ... SPRN_IBAT7L:
         case SPRN_DBAT0U ... SPRN_DBAT3L:
         case SPRN_DBAT4U ... SPRN_DBAT7L:
-                kvmppc_write_bat(vcpu, sprn, (u32)vcpu->arch.gpr[rs]);
+                kvmppc_write_bat(vcpu, sprn, (u32)spr_val);
                 /* BAT writes happen so rarely that we're ok to flush
                  * everything here */
                 kvmppc_mmu_pte_flush(vcpu, 0, 0);
                 break;
         case SPRN_HID0:
-                to_book3s(vcpu)->hid[0] = vcpu->arch.gpr[rs];
+                to_book3s(vcpu)->hid[0] = spr_val;
                 break;
         case SPRN_HID1:
-                to_book3s(vcpu)->hid[1] = vcpu->arch.gpr[rs];
+                to_book3s(vcpu)->hid[1] = spr_val;
                 break;
         case SPRN_HID2:
-                to_book3s(vcpu)->hid[2] = vcpu->arch.gpr[rs];
+                to_book3s(vcpu)->hid[2] = spr_val;
                 break;
         case SPRN_HID4:
-                to_book3s(vcpu)->hid[4] = vcpu->arch.gpr[rs];
+                to_book3s(vcpu)->hid[4] = spr_val;
                 break;
         case SPRN_HID5:
-                to_book3s(vcpu)->hid[5] = vcpu->arch.gpr[rs];
+                to_book3s(vcpu)->hid[5] = spr_val;
                 /* guest HID5 set can change is_dcbz32 */
                 if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
                     (mfmsr() & MSR_HV))
@@ -299,38 +302,38 @@ int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
 
         switch (sprn) {
         case SPRN_SDR1:
-                vcpu->arch.gpr[rt] = to_book3s(vcpu)->sdr1;
+                kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->sdr1);
                 break;
         case SPRN_DSISR:
-                vcpu->arch.gpr[rt] = to_book3s(vcpu)->dsisr;
+                kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->dsisr);
                 break;
         case SPRN_DAR:
-                vcpu->arch.gpr[rt] = vcpu->arch.dear;
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.dear);
                 break;
         case SPRN_HIOR:
-                vcpu->arch.gpr[rt] = to_book3s(vcpu)->hior;
+                kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hior);
                 break;
         case SPRN_HID0:
-                vcpu->arch.gpr[rt] = to_book3s(vcpu)->hid[0];
+                kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[0]);
                 break;
         case SPRN_HID1:
-                vcpu->arch.gpr[rt] = to_book3s(vcpu)->hid[1];
+                kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[1]);
                 break;
         case SPRN_HID2:
-                vcpu->arch.gpr[rt] = to_book3s(vcpu)->hid[2];
+                kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[2]);
                 break;
         case SPRN_HID4:
-                vcpu->arch.gpr[rt] = to_book3s(vcpu)->hid[4];
+                kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[4]);
                 break;
         case SPRN_HID5:
-                vcpu->arch.gpr[rt] = to_book3s(vcpu)->hid[5];
+                kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[5]);
                 break;
         case SPRN_THRM1:
         case SPRN_THRM2:
         case SPRN_THRM3:
         case SPRN_CTRLF:
         case SPRN_CTRLT:
-                vcpu->arch.gpr[rt] = 0;
+                kvmppc_set_gpr(vcpu, rt, 0);
                 break;
         default:
                 printk(KERN_INFO "KVM: invalid SPR read: %d\n", sprn);
diff --git a/arch/powerpc/kvm/book3s_64_exports.c b/arch/powerpc/kvm/book3s_64_exports.c
index 5b2db38ed86..1dd5a1ddfd0 100644
--- a/arch/powerpc/kvm/book3s_64_exports.c
+++ b/arch/powerpc/kvm/book3s_64_exports.c
@@ -22,3 +22,11 @@
 
 EXPORT_SYMBOL_GPL(kvmppc_trampoline_enter);
 EXPORT_SYMBOL_GPL(kvmppc_trampoline_lowmem);
+EXPORT_SYMBOL_GPL(kvmppc_rmcall);
+EXPORT_SYMBOL_GPL(kvmppc_load_up_fpu);
+#ifdef CONFIG_ALTIVEC
+EXPORT_SYMBOL_GPL(kvmppc_load_up_altivec);
+#endif
+#ifdef CONFIG_VSX
+EXPORT_SYMBOL_GPL(kvmppc_load_up_vsx);
+#endif
diff --git a/arch/powerpc/kvm/book3s_64_interrupts.S b/arch/powerpc/kvm/book3s_64_interrupts.S
index 7b55d8094c8..c1584d0cbce 100644
--- a/arch/powerpc/kvm/book3s_64_interrupts.S
+++ b/arch/powerpc/kvm/book3s_64_interrupts.S
@@ -28,11 +28,6 @@
 #define ULONG_SIZE 8
 #define VCPU_GPR(n)     (VCPU_GPRS + (n * ULONG_SIZE))
 
-.macro mfpaca tmp_reg, src_reg, offset, vcpu_reg
-        ld      \tmp_reg, (PACA_EXMC+\offset)(r13)
-        std     \tmp_reg, VCPU_GPR(\src_reg)(\vcpu_reg)
-.endm
-
 .macro DISABLE_INTERRUPTS
        mfmsr   r0
        rldicl  r0,r0,48,1
@@ -40,6 +35,26 @@
        mtmsrd  r0,1
 .endm
 
+#define VCPU_LOAD_NVGPRS(vcpu) \
+        ld      r14, VCPU_GPR(r14)(vcpu); \
+        ld      r15, VCPU_GPR(r15)(vcpu); \
+        ld      r16, VCPU_GPR(r16)(vcpu); \
+        ld      r17, VCPU_GPR(r17)(vcpu); \
+        ld      r18, VCPU_GPR(r18)(vcpu); \
+        ld      r19, VCPU_GPR(r19)(vcpu); \
+        ld      r20, VCPU_GPR(r20)(vcpu); \
+        ld      r21, VCPU_GPR(r21)(vcpu); \
+        ld      r22, VCPU_GPR(r22)(vcpu); \
+        ld      r23, VCPU_GPR(r23)(vcpu); \
+        ld      r24, VCPU_GPR(r24)(vcpu); \
+        ld      r25, VCPU_GPR(r25)(vcpu); \
+        ld      r26, VCPU_GPR(r26)(vcpu); \
+        ld      r27, VCPU_GPR(r27)(vcpu); \
+        ld      r28, VCPU_GPR(r28)(vcpu); \
+        ld      r29, VCPU_GPR(r29)(vcpu); \
+        ld      r30, VCPU_GPR(r30)(vcpu); \
+        ld      r31, VCPU_GPR(r31)(vcpu); \
+
 /*****************************************************************************
  *                                                                           *
  *     Guest entry / exit code that is in kernel module memory (highmem)     *
@@ -67,61 +82,32 @@ kvm_start_entry:
         SAVE_NVGPRS(r1)
 
         /* Save LR */
-        mflr    r14
-        std     r14, _LINK(r1)
-
-/* XXX optimize non-volatile loading away */
-kvm_start_lightweight:
+        std     r0, _LINK(r1)
 
-        DISABLE_INTERRUPTS
+        /* Load non-volatile guest state from the vcpu */
+        VCPU_LOAD_NVGPRS(r4)
 
         /* Save R1/R2 in the PACA */
-        std     r1, PACAR1(r13)
-        std     r2, (PACA_EXMC+EX_SRR0)(r13)
+        std     r1, PACA_KVM_HOST_R1(r13)
+        std     r2, PACA_KVM_HOST_R2(r13)
+
+        /* XXX swap in/out on load? */
         ld      r3, VCPU_HIGHMEM_HANDLER(r4)
-        std     r3, PACASAVEDMSR(r13)
+        std     r3, PACA_KVM_VMHANDLER(r13)
 
-        /* Load non-volatile guest state from the vcpu */
-        ld      r14, VCPU_GPR(r14)(r4)
-        ld      r15, VCPU_GPR(r15)(r4)
-        ld      r16, VCPU_GPR(r16)(r4)
-        ld      r17, VCPU_GPR(r17)(r4)
-        ld      r18, VCPU_GPR(r18)(r4)
-        ld      r19, VCPU_GPR(r19)(r4)
-        ld      r20, VCPU_GPR(r20)(r4)
-        ld      r21, VCPU_GPR(r21)(r4)
-        ld      r22, VCPU_GPR(r22)(r4)
-        ld      r23, VCPU_GPR(r23)(r4)
-        ld      r24, VCPU_GPR(r24)(r4)
-        ld      r25, VCPU_GPR(r25)(r4)
-        ld      r26, VCPU_GPR(r26)(r4)
-        ld      r27, VCPU_GPR(r27)(r4)
-        ld      r28, VCPU_GPR(r28)(r4)
-        ld      r29, VCPU_GPR(r29)(r4)
-        ld      r30, VCPU_GPR(r30)(r4)
-        ld      r31, VCPU_GPR(r31)(r4)
+kvm_start_lightweight:
 
         ld      r9, VCPU_PC(r4)                 /* r9 = vcpu->arch.pc */
         ld      r10, VCPU_SHADOW_MSR(r4)        /* r10 = vcpu->arch.shadow_msr */
 
-        ld      r3, VCPU_TRAMPOLINE_ENTER(r4)
-        mtsrr0  r3
-
-        LOAD_REG_IMMEDIATE(r3, MSR_KERNEL & ~(MSR_IR | MSR_DR))
-        mtsrr1  r3
-
-        /* Load guest state in the respective registers */
-        lwz     r3, VCPU_CR(r4)         /* r3 = vcpu->arch.cr */
-        stw     r3, (PACA_EXMC + EX_CCR)(r13)
-
-        ld      r3, VCPU_CTR(r4)        /* r3 = vcpu->arch.ctr */
-        mtctr   r3                      /* CTR = r3 */
+        /* Load some guest state in the respective registers */
+        ld      r5, VCPU_CTR(r4)        /* r5 = vcpu->arch.ctr */
+                                        /* will be swapped in by rmcall */
 
         ld      r3, VCPU_LR(r4)         /* r3 = vcpu->arch.lr */
         mtlr    r3                      /* LR = r3 */
 
-        ld      r3, VCPU_XER(r4)        /* r3 = vcpu->arch.xer */
-        std     r3, (PACA_EXMC + EX_R3)(r13)
+        DISABLE_INTERRUPTS
 
         /* Some guests may need to have dcbz set to 32 byte length.
          *
@@ -141,36 +127,15 @@ kvm_start_lightweight:
         mtspr   SPRN_HID5,r3
 
 no_dcbz32_on:
-        /*      Load guest GPRs */
-
-        ld      r3, VCPU_GPR(r9)(r4)
-        std     r3, (PACA_EXMC + EX_R9)(r13)
-        ld      r3, VCPU_GPR(r10)(r4)
-        std     r3, (PACA_EXMC + EX_R10)(r13)
-        ld      r3, VCPU_GPR(r11)(r4)
-        std     r3, (PACA_EXMC + EX_R11)(r13)
-        ld      r3, VCPU_GPR(r12)(r4)
-        std     r3, (PACA_EXMC + EX_R12)(r13)
-        ld      r3, VCPU_GPR(r13)(r4)
-        std     r3, (PACA_EXMC + EX_R13)(r13)
-
-        ld      r0, VCPU_GPR(r0)(r4)
-        ld      r1, VCPU_GPR(r1)(r4)
-        ld      r2, VCPU_GPR(r2)(r4)
-        ld      r3, VCPU_GPR(r3)(r4)
-        ld      r5, VCPU_GPR(r5)(r4)
-        ld      r6, VCPU_GPR(r6)(r4)
-        ld      r7, VCPU_GPR(r7)(r4)
-        ld      r8, VCPU_GPR(r8)(r4)
-        ld      r4, VCPU_GPR(r4)(r4)
-
-        /* This sets the Magic value for the trampoline */
-
-        li      r11, 1
-        stb     r11, PACA_KVM_IN_GUEST(r13)
+
+        ld      r6, VCPU_RMCALL(r4)
+        mtctr   r6
+
+        ld      r3, VCPU_TRAMPOLINE_ENTER(r4)
+        LOAD_REG_IMMEDIATE(r4, MSR_KERNEL & ~(MSR_IR | MSR_DR))
 
         /* Jump to SLB patching handlder and into our guest */
-        RFI
+        bctr
 
 /*
  * This is the handler in module memory. It gets jumped at from the
@@ -184,125 +149,70 @@ kvmppc_handler_highmem:
         /*
          * Register usage at this point:
          *
-         * R00   = guest R13
-         * R01   = host R1
-         * R02   = host R2
-         * R10   = guest PC
-         * R11   = guest MSR
-         * R12   = exit handler id
-         * R13   = PACA
-         * PACA.exmc.R9    = guest R1
-         * PACA.exmc.R10   = guest R10
-         * PACA.exmc.R11   = guest R11
-         * PACA.exmc.R12   = guest R12
-         * PACA.exmc.R13   = guest R2
-         * PACA.exmc.DAR   = guest DAR
-         * PACA.exmc.DSISR = guest DSISR
-         * PACA.exmc.LR    = guest instruction
-         * PACA.exmc.CCR   = guest CR
-         * PACA.exmc.SRR0  = guest R0
+         * R0         = guest last inst
+         * R1         = host R1
+         * R2         = host R2
+         * R3         = guest PC
+         * R4         = guest MSR
+         * R5         = guest DAR
+         * R6         = guest DSISR
+         * R13        = PACA
+         * PACA.KVM.* = guest *
          *
          */
 
-        std     r3, (PACA_EXMC+EX_R3)(r13)
+        /* R7 = vcpu */
+        ld      r7, GPR4(r1)
 
-        /* save the exit id in R3 */
-        mr      r3, r12
+        /* Now save the guest state */
 
-        /* R12 = vcpu */
-        ld      r12, GPR4(r1)
+        stw     r0, VCPU_LAST_INST(r7)
 
-        /* Now save the guest state */
+        std     r3, VCPU_PC(r7)
+        std     r4, VCPU_SHADOW_SRR1(r7)
+        std     r5, VCPU_FAULT_DEAR(r7)
+        std     r6, VCPU_FAULT_DSISR(r7)
 
-        std     r0, VCPU_GPR(r13)(r12)
-        std     r4, VCPU_GPR(r4)(r12)
-        std     r5, VCPU_GPR(r5)(r12)
-        std     r6, VCPU_GPR(r6)(r12)
-        std     r7, VCPU_GPR(r7)(r12)
-        std     r8, VCPU_GPR(r8)(r12)
-        std     r9, VCPU_GPR(r9)(r12)
-
-        /* get registers from PACA */
-        mfpaca  r5, r0, EX_SRR0, r12
-        mfpaca  r5, r3, EX_R3, r12
-        mfpaca  r5, r1, EX_R9, r12
-        mfpaca  r5, r10, EX_R10, r12
-        mfpaca  r5, r11, EX_R11, r12
-        mfpaca  r5, r12, EX_R12, r12
-        mfpaca  r5, r2, EX_R13, r12
-
-        lwz     r5, (PACA_EXMC+EX_LR)(r13)
-        stw     r5, VCPU_LAST_INST(r12)
-
-        lwz     r5, (PACA_EXMC+EX_CCR)(r13)
-        stw     r5, VCPU_CR(r12)
-
-        ld      r5, VCPU_HFLAGS(r12)
+        ld      r5, VCPU_HFLAGS(r7)
         rldicl. r5, r5, 0, 63           /* CR = ((r5 & 1) == 0) */
         beq     no_dcbz32_off
 
+        li      r4, 0
         mfspr   r5,SPRN_HID5
-        rldimi  r5,r5,6,56
+        rldimi  r5,r4,6,56
         mtspr   SPRN_HID5,r5
 
 no_dcbz32_off:
 
-        /* XXX maybe skip on lightweight? */
-        std     r14, VCPU_GPR(r14)(r12)
-        std     r15, VCPU_GPR(r15)(r12)
-        std     r16, VCPU_GPR(r16)(r12)
-        std     r17, VCPU_GPR(r17)(r12)
-        std     r18, VCPU_GPR(r18)(r12)
-        std     r19, VCPU_GPR(r19)(r12)
-        std     r20, VCPU_GPR(r20)(r12)
-        std     r21, VCPU_GPR(r21)(r12)
-        std     r22, VCPU_GPR(r22)(r12)
-        std     r23, VCPU_GPR(r23)(r12)
-        std     r24, VCPU_GPR(r24)(r12)
-        std     r25, VCPU_GPR(r25)(r12)
-        std     r26, VCPU_GPR(r26)(r12)
-        std     r27, VCPU_GPR(r27)(r12)
-        std     r28, VCPU_GPR(r28)(r12)
-        std     r29, VCPU_GPR(r29)(r12)
-        std     r30, VCPU_GPR(r30)(r12)
-        std     r31, VCPU_GPR(r31)(r12)
-
-        /* Restore non-volatile host registers (r14 - r31) */
-        REST_NVGPRS(r1)
-
-        /* Save guest PC (R10) */
-        std     r10, VCPU_PC(r12)
-
-        /* Save guest msr (R11) */
-        std     r11, VCPU_SHADOW_MSR(r12)
-
-        /* Save guest CTR (in R12) */
+        std     r14, VCPU_GPR(r14)(r7)
+        std     r15, VCPU_GPR(r15)(r7)
+        std     r16, VCPU_GPR(r16)(r7)
+        std     r17, VCPU_GPR(r17)(r7)
+        std     r18, VCPU_GPR(r18)(r7)
+        std     r19, VCPU_GPR(r19)(r7)
+        std     r20, VCPU_GPR(r20)(r7)
+        std     r21, VCPU_GPR(r21)(r7)
+        std     r22, VCPU_GPR(r22)(r7)
+        std     r23, VCPU_GPR(r23)(r7)
+        std     r24, VCPU_GPR(r24)(r7)
+        std     r25, VCPU_GPR(r25)(r7)
+        std     r26, VCPU_GPR(r26)(r7)
+        std     r27, VCPU_GPR(r27)(r7)
+        std     r28, VCPU_GPR(r28)(r7)
+        std     r29, VCPU_GPR(r29)(r7)
+        std     r30, VCPU_GPR(r30)(r7)
+        std     r31, VCPU_GPR(r31)(r7)
+
+        /* Save guest CTR */
         mfctr   r5
-        std     r5, VCPU_CTR(r12)
+        std     r5, VCPU_CTR(r7)
 
         /* Save guest LR */
         mflr    r5
-        std     r5, VCPU_LR(r12)
-
-        /* Save guest XER */
-        mfxer   r5
-        std     r5, VCPU_XER(r12)
-
-        /* Save guest DAR */
-        ld      r5, (PACA_EXMC+EX_DAR)(r13)
-        std     r5, VCPU_FAULT_DEAR(r12)
-
-        /* Save guest DSISR */
-        lwz     r5, (PACA_EXMC+EX_DSISR)(r13)
-        std     r5, VCPU_FAULT_DSISR(r12)
+        std     r5, VCPU_LR(r7)
 
         /* Restore host msr -> SRR1 */
-        ld      r7, VCPU_HOST_MSR(r12)
-        mtsrr1  r7
-
-        /* Restore host IP -> SRR0 */
-        ld      r6, VCPU_HOST_RETIP(r12)
-        mtsrr0  r6
+        ld      r6, VCPU_HOST_MSR(r7)
 
         /*
          * For some interrupts, we need to call the real Linux
@@ -314,13 +224,14 @@ no_dcbz32_off:
          * r3 = address of interrupt handler (exit reason)
          */
 
-        cmpwi   r3, BOOK3S_INTERRUPT_EXTERNAL
+        cmpwi   r12, BOOK3S_INTERRUPT_EXTERNAL
         beq     call_linux_handler
-        cmpwi   r3, BOOK3S_INTERRUPT_DECREMENTER
+        cmpwi   r12, BOOK3S_INTERRUPT_DECREMENTER
         beq     call_linux_handler
 
-        /* Back to Interruptable Mode! (goto kvm_return_point) */
-        RFI
+        /* Back to EE=1 */
+        mtmsr   r6
+        b       kvm_return_point
 
 call_linux_handler:
 
@@ -333,16 +244,22 @@ call_linux_handler:
          * interrupt handler!
          *
          * R3 still contains the exit code,
-         * R6 VCPU_HOST_RETIP and
-         * R7 VCPU_HOST_MSR
+         * R5 VCPU_HOST_RETIP and
+         * R6 VCPU_HOST_MSR
          */
 
-        mtlr    r3
+        /* Restore host IP -> SRR0 */
+        ld      r5, VCPU_HOST_RETIP(r7)
+
+        /* XXX Better move to a safe function?
+         *     What if we get an HTAB flush in between mtsrr0 and mtsrr1? */
 
-        ld      r5, VCPU_TRAMPOLINE_LOWMEM(r12)
-        mtsrr0  r5
-        LOAD_REG_IMMEDIATE(r5, MSR_KERNEL & ~(MSR_IR | MSR_DR))
-        mtsrr1  r5
+        mtlr    r12
+
+        ld      r4, VCPU_TRAMPOLINE_LOWMEM(r7)
+        mtsrr0  r4
+        LOAD_REG_IMMEDIATE(r3, MSR_KERNEL & ~(MSR_IR | MSR_DR))
+        mtsrr1  r3
 
         RFI
 
@@ -351,42 +268,51 @@ kvm_return_point:
 
         /* Jump back to lightweight entry if we're supposed to */
         /* go back into the guest */
-        mr      r5, r3
+
+        /* Pass the exit number as 3rd argument to kvmppc_handle_exit */
+        mr      r5, r12
+
         /* Restore r3 (kvm_run) and r4 (vcpu) */
         REST_2GPRS(3, r1)
         bl      KVMPPC_HANDLE_EXIT
 
-#if 0 /* XXX get lightweight exits back */
+        /* If RESUME_GUEST, get back in the loop */
         cmpwi   r3, RESUME_GUEST
-        bne     kvm_exit_heavyweight
+        beq     kvm_loop_lightweight
 
-        /* put VCPU and KVM_RUN back into place and roll again! */
-        REST_2GPRS(3, r1)
-        b       kvm_start_lightweight
+        cmpwi   r3, RESUME_GUEST_NV
+        beq     kvm_loop_heavyweight
 
-kvm_exit_heavyweight:
-        /* Restore non-volatile host registers */
-        ld      r14, _LINK(r1)
-        mtlr    r14
-        REST_NVGPRS(r1)
+kvm_exit_loop:
 
-        addi    r1, r1, SWITCH_FRAME_SIZE
-#else
         ld      r4, _LINK(r1)
         mtlr    r4
 
-        cmpwi   r3, RESUME_GUEST
-        bne     kvm_exit_heavyweight
+        /* Restore non-volatile host registers (r14 - r31) */
+        REST_NVGPRS(r1)
+
+        addi    r1, r1, SWITCH_FRAME_SIZE
+        blr
+
+kvm_loop_heavyweight:
+
+        ld      r4, _LINK(r1)
+        std     r4, (16 + SWITCH_FRAME_SIZE)(r1)
 
+        /* Load vcpu and cpu_run */
         REST_2GPRS(3, r1)
 
-        addi    r1, r1, SWITCH_FRAME_SIZE
+        /* Load non-volatile guest state from the vcpu */
+        VCPU_LOAD_NVGPRS(r4)
 
-        b       kvm_start_entry
+        /* Jump back into the beginning of this function */
+        b       kvm_start_lightweight
 
-kvm_exit_heavyweight:
+kvm_loop_lightweight:
 
-        addi    r1, r1, SWITCH_FRAME_SIZE
-#endif
+        /* We'll need the vcpu pointer */
+        REST_GPR(4, r1)
+
+        /* Jump back into the beginning of this function */
+        b       kvm_start_lightweight
 
-        blr
diff --git a/arch/powerpc/kvm/book3s_64_mmu.c b/arch/powerpc/kvm/book3s_64_mmu.c
index e4beeb371a7..512dcff7755 100644
--- a/arch/powerpc/kvm/book3s_64_mmu.c
+++ b/arch/powerpc/kvm/book3s_64_mmu.c
@@ -54,7 +54,7 @@ static struct kvmppc_slb *kvmppc_mmu_book3s_64_find_slbe(
                 if (!vcpu_book3s->slb[i].valid)
                         continue;
 
-                if (vcpu_book3s->slb[i].large)
+                if (vcpu_book3s->slb[i].tb)
                         cmp_esid = esid_1t;
 
                 if (vcpu_book3s->slb[i].esid == cmp_esid)
@@ -65,9 +65,10 @@ static struct kvmppc_slb *kvmppc_mmu_book3s_64_find_slbe(
                 eaddr, esid, esid_1t);
         for (i = 0; i < vcpu_book3s->slb_nr; i++) {
             if (vcpu_book3s->slb[i].vsid)
-                dprintk("  %d: %c%c %llx %llx\n", i,
+                dprintk("  %d: %c%c%c %llx %llx\n", i,
                         vcpu_book3s->slb[i].valid ? 'v' : ' ',
                         vcpu_book3s->slb[i].large ? 'l' : ' ',
+                        vcpu_book3s->slb[i].tb    ? 't' : ' ',
                         vcpu_book3s->slb[i].esid,
                         vcpu_book3s->slb[i].vsid);
         }
@@ -84,7 +85,7 @@ static u64 kvmppc_mmu_book3s_64_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
         if (!slb)
                 return 0;
 
-        if (slb->large)
+        if (slb->tb)
                 return (((u64)eaddr >> 12) & 0xfffffff) |
                        (((u64)slb->vsid) << 28);
 
@@ -309,7 +310,8 @@ static void kvmppc_mmu_book3s_64_slbmte(struct kvm_vcpu *vcpu, u64 rs, u64 rb)
         slbe = &vcpu_book3s->slb[slb_nr];
 
         slbe->large = (rs & SLB_VSID_L) ? 1 : 0;
-        slbe->esid  = slbe->large ? esid_1t : esid;
+        slbe->tb    = (rs & SLB_VSID_B_1T) ? 1 : 0;
+        slbe->esid  = slbe->tb ? esid_1t : esid;
         slbe->vsid  = rs >> 12;
         slbe->valid = (rb & SLB_ESID_V) ? 1 : 0;
         slbe->Ks    = (rs & SLB_VSID_KS) ? 1 : 0;
diff --git a/arch/powerpc/kvm/book3s_64_rmhandlers.S b/arch/powerpc/kvm/book3s_64_rmhandlers.S
index fb7dd2e9ac8..c83c60ad96c 100644
--- a/arch/powerpc/kvm/book3s_64_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_64_rmhandlers.S
@@ -45,36 +45,25 @@ kvmppc_trampoline_\intno:
          * To distinguish, we check a magic byte in the PACA
          */
         mfspr   r13, SPRN_SPRG_PACA             /* r13 = PACA */
-        std     r12, (PACA_EXMC + EX_R12)(r13)
+        std     r12, PACA_KVM_SCRATCH0(r13)
         mfcr    r12
-        stw     r12, (PACA_EXMC + EX_CCR)(r13)
+        stw     r12, PACA_KVM_SCRATCH1(r13)
         lbz     r12, PACA_KVM_IN_GUEST(r13)
-        cmpwi   r12, 0
+        cmpwi   r12, KVM_GUEST_MODE_NONE
         bne     ..kvmppc_handler_hasmagic_\intno
         /* No KVM guest? Then jump back to the Linux handler! */
-        lwz     r12, (PACA_EXMC + EX_CCR)(r13)
+        lwz     r12, PACA_KVM_SCRATCH1(r13)
         mtcr    r12
-        ld      r12, (PACA_EXMC + EX_R12)(r13)
+        ld      r12, PACA_KVM_SCRATCH0(r13)
         mfspr   r13, SPRN_SPRG_SCRATCH0         /* r13 = original r13 */
         b       kvmppc_resume_\intno            /* Get back original handler */
 
         /* Now we know we're handling a KVM guest */
 ..kvmppc_handler_hasmagic_\intno:
-        /* Unset guest state */
-        li      r12, 0
-        stb     r12, PACA_KVM_IN_GUEST(r13)
 
-        std     r1, (PACA_EXMC+EX_R9)(r13)
-        std     r10, (PACA_EXMC+EX_R10)(r13)
-        std     r11, (PACA_EXMC+EX_R11)(r13)
-        std     r2, (PACA_EXMC+EX_R13)(r13)
-
-        mfsrr0  r10
-        mfsrr1  r11
-
-        /* Restore R1/R2 so we can handle faults */
-        ld      r1, PACAR1(r13)
-        ld      r2, (PACA_EXMC+EX_SRR0)(r13)
+        /* Should we just skip the faulting instruction? */
+        cmpwi   r12, KVM_GUEST_MODE_SKIP
+        beq     kvmppc_handler_skip_ins
 
         /* Let's store which interrupt we're handling */
         li      r12, \intno
@@ -102,23 +91,107 @@ INTERRUPT_TRAMPOLINE	BOOK3S_INTERRUPT_ALTIVEC
 INTERRUPT_TRAMPOLINE    BOOK3S_INTERRUPT_VSX
 
 /*
+ * Bring us back to the faulting code, but skip the
+ * faulting instruction.
+ *
+ * This is a generic exit path from the interrupt
+ * trampolines above.
+ *
+ * Input Registers:
+ *
+ * R12               = free
+ * R13               = PACA
+ * PACA.KVM.SCRATCH0 = guest R12
+ * PACA.KVM.SCRATCH1 = guest CR
+ * SPRG_SCRATCH0     = guest R13
+ *
+ */
+kvmppc_handler_skip_ins:
+
+        /* Patch the IP to the next instruction */
+        mfsrr0  r12
+        addi    r12, r12, 4
+        mtsrr0  r12
+
+        /* Clean up all state */
+        lwz     r12, PACA_KVM_SCRATCH1(r13)
+        mtcr    r12
+        ld      r12, PACA_KVM_SCRATCH0(r13)
+        mfspr   r13, SPRN_SPRG_SCRATCH0
+
+        /* And get back into the code */
+        RFI
+
+/*
  * This trampoline brings us back to a real mode handler
  *
  * Input Registers:
  *
- * R6 = SRR0
- * R7 = SRR1
+ * R5 = SRR0
+ * R6 = SRR1
  * LR = real-mode IP
  *
  */
 .global kvmppc_handler_lowmem_trampoline
 kvmppc_handler_lowmem_trampoline:
 
-        mtsrr0  r6
-        mtsrr1  r7
+        mtsrr0  r5
+        mtsrr1  r6
         blr
 kvmppc_handler_lowmem_trampoline_end:
 
+/*
+ * Call a function in real mode
+ *
+ * Input Registers:
+ *
+ * R3 = function
+ * R4 = MSR
+ * R5 = CTR
+ *
+ */
+_GLOBAL(kvmppc_rmcall)
+        mtmsr   r4              /* Disable relocation, so mtsrr
+                                   doesn't get interrupted */
+        mtctr   r5
+        mtsrr0  r3
+        mtsrr1  r4
+        RFI
+
+/*
+ * Activate current's external feature (FPU/Altivec/VSX)
+ */
+#define define_load_up(what)                            \
+                                                        \
+_GLOBAL(kvmppc_load_up_ ## what);                       \
+        subi    r1, r1, INT_FRAME_SIZE;                 \
+        mflr    r3;                                     \
+        std     r3, _LINK(r1);                          \
+        mfmsr   r4;                                     \
+        std     r31, GPR3(r1);                          \
+        mr      r31, r4;                                \
+        li      r5, MSR_DR;                             \
+        oris    r5, r5, MSR_EE@h;                       \
+        andc    r4, r4, r5;                             \
+        mtmsr   r4;                                     \
+                                                        \
+        bl      .load_up_ ## what;                      \
+                                                        \
+        mtmsr   r31;                                    \
+        ld      r3, _LINK(r1);                          \
+        ld      r31, GPR3(r1);                          \
+        addi    r1, r1, INT_FRAME_SIZE;                 \
+        mtlr    r3;                                     \
+        blr
+
+define_load_up(fpu)
+#ifdef CONFIG_ALTIVEC
+define_load_up(altivec)
+#endif
+#ifdef CONFIG_VSX
+define_load_up(vsx)
+#endif
+
 .global kvmppc_trampoline_lowmem
 kvmppc_trampoline_lowmem:
         .long kvmppc_handler_lowmem_trampoline - _stext
diff --git a/arch/powerpc/kvm/book3s_64_slb.S b/arch/powerpc/kvm/book3s_64_slb.S
index ecd237a03fd..35b76272218 100644
--- a/arch/powerpc/kvm/book3s_64_slb.S
+++ b/arch/powerpc/kvm/book3s_64_slb.S
@@ -31,7 +31,7 @@
 #define REBOLT_SLB_ENTRY(num) \
         ld      r10, SHADOW_SLB_ESID(num)(r11); \
         cmpdi   r10, 0; \
-        beq     slb_exit_skip_1; \
+        beq     slb_exit_skip_ ## num; \
         oris    r10, r10, SLB_ESID_V@h; \
         ld      r9, SHADOW_SLB_VSID(num)(r11); \
         slbmte  r9, r10; \
@@ -51,23 +51,21 @@ kvmppc_handler_trampoline_enter:
          *
          * MSR = ~IR|DR
          * R13 = PACA
+         * R1 = host R1
+         * R2 = host R2
          * R9 = guest IP
          * R10 = guest MSR
-         * R11 = free
-         * R12 = free
-         * PACA[PACA_EXMC + EX_R9] = guest R9
-         * PACA[PACA_EXMC + EX_R10] = guest R10
-         * PACA[PACA_EXMC + EX_R11] = guest R11
-         * PACA[PACA_EXMC + EX_R12] = guest R12
-         * PACA[PACA_EXMC + EX_R13] = guest R13
-         * PACA[PACA_EXMC + EX_CCR] = guest CR
-         * PACA[PACA_EXMC + EX_R3] = guest XER
+         * all other GPRS = free
+         * PACA[KVM_CR] = guest CR
+         * PACA[KVM_XER] = guest XER
          */
 
         mtsrr0  r9
         mtsrr1  r10
 
-        mtspr   SPRN_SPRG_SCRATCH0, r0
+        /* Activate guest mode, so faults get handled by KVM */
+        li      r11, KVM_GUEST_MODE_GUEST
+        stb     r11, PACA_KVM_IN_GUEST(r13)
 
         /* Remove LPAR shadow entries */
 
@@ -131,20 +129,27 @@ slb_do_enter:
 
         /* Enter guest */
 
-        mfspr   r0, SPRN_SPRG_SCRATCH0
-
-        ld      r9, (PACA_EXMC+EX_R9)(r13)
-        ld      r10, (PACA_EXMC+EX_R10)(r13)
-        ld      r12, (PACA_EXMC+EX_R12)(r13)
-
-        lwz     r11, (PACA_EXMC+EX_CCR)(r13)
+        ld      r0, (PACA_KVM_R0)(r13)
+        ld      r1, (PACA_KVM_R1)(r13)
+        ld      r2, (PACA_KVM_R2)(r13)
+        ld      r3, (PACA_KVM_R3)(r13)
+        ld      r4, (PACA_KVM_R4)(r13)
+        ld      r5, (PACA_KVM_R5)(r13)
+        ld      r6, (PACA_KVM_R6)(r13)
+        ld      r7, (PACA_KVM_R7)(r13)
+        ld      r8, (PACA_KVM_R8)(r13)
+        ld      r9, (PACA_KVM_R9)(r13)
+        ld      r10, (PACA_KVM_R10)(r13)
+        ld      r12, (PACA_KVM_R12)(r13)
+
+        lwz     r11, (PACA_KVM_CR)(r13)
         mtcr    r11
 
-        ld      r11, (PACA_EXMC+EX_R3)(r13)
+        ld      r11, (PACA_KVM_XER)(r13)
         mtxer   r11
 
-        ld      r11, (PACA_EXMC+EX_R11)(r13)
-        ld      r13, (PACA_EXMC+EX_R13)(r13)
+        ld      r11, (PACA_KVM_R11)(r13)
+        ld      r13, (PACA_KVM_R13)(r13)
 
         RFI
 kvmppc_handler_trampoline_enter_end:
@@ -162,28 +167,54 @@ kvmppc_handler_trampoline_exit:
 
         /* Register usage at this point:
          *
-         * SPRG_SCRATCH0 = guest R13
-         * R01           = host R1
-         * R02           = host R2
-         * R10           = guest PC
-         * R11           = guest MSR
-         * R12           = exit handler id
-         * R13           = PACA
-         * PACA.exmc.CCR  = guest CR
-         * PACA.exmc.R9  = guest R1
-         * PACA.exmc.R10 = guest R10
-         * PACA.exmc.R11 = guest R11
-         * PACA.exmc.R12 = guest R12
-         * PACA.exmc.R13 = guest R2
+         * SPRG_SCRATCH0     = guest R13
+         * R12               = exit handler id
+         * R13               = PACA
+         * PACA.KVM.SCRATCH0 = guest R12
+         * PACA.KVM.SCRATCH1 = guest CR
          *
          */
 
         /* Save registers */
 
-        std     r0, (PACA_EXMC+EX_SRR0)(r13)
-        std     r9, (PACA_EXMC+EX_R3)(r13)
-        std     r10, (PACA_EXMC+EX_LR)(r13)
-        std     r11, (PACA_EXMC+EX_DAR)(r13)
+        std     r0, PACA_KVM_R0(r13)
+        std     r1, PACA_KVM_R1(r13)
+        std     r2, PACA_KVM_R2(r13)
+        std     r3, PACA_KVM_R3(r13)
+        std     r4, PACA_KVM_R4(r13)
+        std     r5, PACA_KVM_R5(r13)
+        std     r6, PACA_KVM_R6(r13)
+        std     r7, PACA_KVM_R7(r13)
+        std     r8, PACA_KVM_R8(r13)
+        std     r9, PACA_KVM_R9(r13)
+        std     r10, PACA_KVM_R10(r13)
+        std     r11, PACA_KVM_R11(r13)
+
+        /* Restore R1/R2 so we can handle faults */
+        ld      r1, PACA_KVM_HOST_R1(r13)
+        ld      r2, PACA_KVM_HOST_R2(r13)
+
+        /* Save guest PC and MSR in GPRs */
+        mfsrr0  r3
+        mfsrr1  r4
+
+        /* Get scratch'ed off registers */
+        mfspr   r9, SPRN_SPRG_SCRATCH0
+        std     r9, PACA_KVM_R13(r13)
+
+        ld      r8, PACA_KVM_SCRATCH0(r13)
+        std     r8, PACA_KVM_R12(r13)
+
+        lwz     r7, PACA_KVM_SCRATCH1(r13)
+        stw     r7, PACA_KVM_CR(r13)
+
+        /* Save more register state  */
+
+        mfxer   r6
+        stw     r6, PACA_KVM_XER(r13)
+
+        mfdar   r5
+        mfdsisr r6
 
         /*
          * In order for us to easily get the last instruction,
@@ -202,17 +233,28 @@ kvmppc_handler_trampoline_exit:
 
 ld_last_inst:
         /* Save off the guest instruction we're at */
+
+        /* Set guest mode to 'jump over instruction' so if lwz faults
+         * we'll just continue at the next IP. */
+        li      r9, KVM_GUEST_MODE_SKIP
+        stb     r9, PACA_KVM_IN_GUEST(r13)
+
         /*    1) enable paging for data */
         mfmsr   r9
         ori     r11, r9, MSR_DR                 /* Enable paging for data */
         mtmsr   r11
         /*    2) fetch the instruction */
-        lwz     r0, 0(r10)
+        li      r0, KVM_INST_FETCH_FAILED       /* In case lwz faults */
+        lwz     r0, 0(r3)
         /*    3) disable paging again */
         mtmsr   r9
 
 no_ld_last_inst:
 
+        /* Unset guest mode */
+        li      r9, KVM_GUEST_MODE_NONE
+        stb     r9, PACA_KVM_IN_GUEST(r13)
+
         /* Restore bolted entries from the shadow and fix it along the way */
 
         /* We don't store anything in entry 0, so we don't need to take care of it */
@@ -233,29 +275,27 @@ no_ld_last_inst:
 
 slb_do_exit:
 
-        /* Restore registers */
-
-        ld      r11, (PACA_EXMC+EX_DAR)(r13)
-        ld      r10, (PACA_EXMC+EX_LR)(r13)
-        ld      r9, (PACA_EXMC+EX_R3)(r13)
-
-        /* Save last inst */
-        stw     r0, (PACA_EXMC+EX_LR)(r13)
-
-        /* Save DAR and DSISR before going to paged mode */
-        mfdar   r0
-        std     r0, (PACA_EXMC+EX_DAR)(r13)
-        mfdsisr r0
-        stw     r0, (PACA_EXMC+EX_DSISR)(r13)
+        /* Register usage at this point:
+         *
+         * R0         = guest last inst
+         * R1         = host R1
+         * R2         = host R2
+         * R3         = guest PC
+         * R4         = guest MSR
+         * R5         = guest DAR
+         * R6         = guest DSISR
+         * R12        = exit handler id
+         * R13        = PACA
+         * PACA.KVM.* = guest *
+         *
+         */
 
         /* RFI into the highmem handler */
-        mfmsr   r0
-        ori     r0, r0, MSR_IR|MSR_DR|MSR_RI    /* Enable paging */
-        mtsrr1  r0
-        ld      r0, PACASAVEDMSR(r13)           /* Highmem handler address */
-        mtsrr0  r0
-
-        mfspr   r0, SPRN_SPRG_SCRATCH0
+        mfmsr   r7
+        ori     r7, r7, MSR_IR|MSR_DR|MSR_RI    /* Enable paging */
+        mtsrr1  r7
+        ld      r8, PACA_KVM_VMHANDLER(r13)     /* Highmem handler address */
+        mtsrr0  r8
 
         RFI
 kvmppc_handler_trampoline_exit_end:
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 06f5a9ecc42..2a3a1953d4b 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -21,6 +21,7 @@
 #include <linux/errno.h>
 #include <linux/err.h>
 #include <linux/kvm_host.h>
+#include <linux/gfp.h>
 #include <linux/module.h>
 #include <linux/vmalloc.h>
 #include <linux/fs.h>
@@ -69,10 +70,10 @@ void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
 
         for (i = 0; i < 32; i += 4) {
                 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
-                       vcpu->arch.gpr[i],
-                       vcpu->arch.gpr[i+1],
-                       vcpu->arch.gpr[i+2],
-                       vcpu->arch.gpr[i+3]);
+                       kvmppc_get_gpr(vcpu, i),
+                       kvmppc_get_gpr(vcpu, i+1),
+                       kvmppc_get_gpr(vcpu, i+2),
+                       kvmppc_get_gpr(vcpu, i+3));
         }
 }
 
@@ -82,8 +83,32 @@ static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
         set_bit(priority, &vcpu->arch.pending_exceptions);
 }
 
-void kvmppc_core_queue_program(struct kvm_vcpu *vcpu)
+static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
+                                        ulong dear_flags, ulong esr_flags)
 {
+        vcpu->arch.queued_dear = dear_flags;
+        vcpu->arch.queued_esr = esr_flags;
+        kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
+}
+
+static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
+                                           ulong dear_flags, ulong esr_flags)
+{
+        vcpu->arch.queued_dear = dear_flags;
+        vcpu->arch.queued_esr = esr_flags;
+        kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
+}
+
+static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu,
+                                           ulong esr_flags)
+{
+        vcpu->arch.queued_esr = esr_flags;
+        kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
+}
+
+void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
+{
+        vcpu->arch.queued_esr = esr_flags;
         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
 }
 
@@ -97,6 +122,11 @@ int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
         return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
 }
 
+void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
+{
+        clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
+}
+
 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
                                 struct kvm_interrupt *irq)
 {
@@ -109,14 +139,19 @@ static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
 {
         int allowed = 0;
         ulong msr_mask;
+        bool update_esr = false, update_dear = false;
 
         switch (priority) {
-        case BOOKE_IRQPRIO_PROGRAM:
         case BOOKE_IRQPRIO_DTLB_MISS:
-        case BOOKE_IRQPRIO_ITLB_MISS:
-        case BOOKE_IRQPRIO_SYSCALL:
         case BOOKE_IRQPRIO_DATA_STORAGE:
+                update_dear = true;
+                /* fall through */
         case BOOKE_IRQPRIO_INST_STORAGE:
+        case BOOKE_IRQPRIO_PROGRAM:
+                update_esr = true;
+                /* fall through */
+        case BOOKE_IRQPRIO_ITLB_MISS:
+        case BOOKE_IRQPRIO_SYSCALL:
         case BOOKE_IRQPRIO_FP_UNAVAIL:
         case BOOKE_IRQPRIO_SPE_UNAVAIL:
         case BOOKE_IRQPRIO_SPE_FP_DATA:
@@ -151,6 +186,10 @@ static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
                 vcpu->arch.srr0 = vcpu->arch.pc;
                 vcpu->arch.srr1 = vcpu->arch.msr;
                 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
+                if (update_esr == true)
+                        vcpu->arch.esr = vcpu->arch.queued_esr;
+                if (update_dear == true)
+                        vcpu->arch.dear = vcpu->arch.queued_dear;
                 kvmppc_set_msr(vcpu, vcpu->arch.msr & msr_mask);
 
                 clear_bit(priority, &vcpu->arch.pending_exceptions);
@@ -223,8 +262,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                 if (vcpu->arch.msr & MSR_PR) {
                         /* Program traps generated by user-level software must be handled
                          * by the guest kernel. */
-                        vcpu->arch.esr = vcpu->arch.fault_esr;
-                        kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
+                        kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
                         r = RESUME_GUEST;
                         kvmppc_account_exit(vcpu, USR_PR_INST);
                         break;
@@ -280,16 +318,14 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                 break;
 
         case BOOKE_INTERRUPT_DATA_STORAGE:
-                vcpu->arch.dear = vcpu->arch.fault_dear;
-                vcpu->arch.esr = vcpu->arch.fault_esr;
-                kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
+                kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
+                                               vcpu->arch.fault_esr);
                 kvmppc_account_exit(vcpu, DSI_EXITS);
                 r = RESUME_GUEST;
                 break;
 
         case BOOKE_INTERRUPT_INST_STORAGE:
-                vcpu->arch.esr = vcpu->arch.fault_esr;
-                kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
+                kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
                 kvmppc_account_exit(vcpu, ISI_EXITS);
                 r = RESUME_GUEST;
                 break;
@@ -310,9 +346,9 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
                 if (gtlb_index < 0) {
                         /* The guest didn't have a mapping for it. */
-                        kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
-                        vcpu->arch.dear = vcpu->arch.fault_dear;
-                        vcpu->arch.esr = vcpu->arch.fault_esr;
+                        kvmppc_core_queue_dtlb_miss(vcpu,
+                                                    vcpu->arch.fault_dear,
+                                                    vcpu->arch.fault_esr);
                         kvmppc_mmu_dtlb_miss(vcpu);
                         kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
                         r = RESUME_GUEST;
@@ -426,7 +462,7 @@ int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
 {
         vcpu->arch.pc = 0;
         vcpu->arch.msr = 0;
-        vcpu->arch.gpr[1] = (16<<20) - 8; /* -8 for the callee-save LR slot */
+        kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
 
         vcpu->arch.shadow_pid = 1;
 
@@ -444,10 +480,10 @@ int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
         int i;
 
         regs->pc = vcpu->arch.pc;
-        regs->cr = vcpu->arch.cr;
+        regs->cr = kvmppc_get_cr(vcpu);
         regs->ctr = vcpu->arch.ctr;
         regs->lr = vcpu->arch.lr;
-        regs->xer = vcpu->arch.xer;
+        regs->xer = kvmppc_get_xer(vcpu);
         regs->msr = vcpu->arch.msr;
         regs->srr0 = vcpu->arch.srr0;
         regs->srr1 = vcpu->arch.srr1;
@@ -461,7 +497,7 @@ int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
         regs->sprg7 = vcpu->arch.sprg6;
 
         for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
-                regs->gpr[i] = vcpu->arch.gpr[i];
+                regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
 
         return 0;
 }
@@ -471,10 +507,10 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
         int i;
 
         vcpu->arch.pc = regs->pc;
-        vcpu->arch.cr = regs->cr;
+        kvmppc_set_cr(vcpu, regs->cr);
         vcpu->arch.ctr = regs->ctr;
         vcpu->arch.lr = regs->lr;
-        vcpu->arch.xer = regs->xer;
+        kvmppc_set_xer(vcpu, regs->xer);
         kvmppc_set_msr(vcpu, regs->msr);
         vcpu->arch.srr0 = regs->srr0;
         vcpu->arch.srr1 = regs->srr1;
@@ -486,8 +522,8 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
         vcpu->arch.sprg6 = regs->sprg5;
         vcpu->arch.sprg7 = regs->sprg6;
 
-        for (i = 0; i < ARRAY_SIZE(vcpu->arch.gpr); i++)
-                vcpu->arch.gpr[i] = regs->gpr[i];
+        for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
+                kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
 
         return 0;
 }
diff --git a/arch/powerpc/kvm/booke_emulate.c b/arch/powerpc/kvm/booke_emulate.c
index aebc65e93f4..cbc790ee192 100644
--- a/arch/powerpc/kvm/booke_emulate.c
+++ b/arch/powerpc/kvm/booke_emulate.c
@@ -62,20 +62,20 @@ int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
 
                 case OP_31_XOP_MFMSR:
                         rt = get_rt(inst);
-                        vcpu->arch.gpr[rt] = vcpu->arch.msr;
+                        kvmppc_set_gpr(vcpu, rt, vcpu->arch.msr);
                         kvmppc_set_exit_type(vcpu, EMULATED_MFMSR_EXITS);
                         break;
 
                 case OP_31_XOP_MTMSR:
                         rs = get_rs(inst);
                         kvmppc_set_exit_type(vcpu, EMULATED_MTMSR_EXITS);
-                        kvmppc_set_msr(vcpu, vcpu->arch.gpr[rs]);
+                        kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, rs));
                         break;
 
                 case OP_31_XOP_WRTEE:
                         rs = get_rs(inst);
                         vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
-                                                         | (vcpu->arch.gpr[rs] & MSR_EE);
+                                        | (kvmppc_get_gpr(vcpu, rs) & MSR_EE);
                         kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
                         break;
 
@@ -101,22 +101,23 @@ int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
 int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
 {
         int emulated = EMULATE_DONE;
+        ulong spr_val = kvmppc_get_gpr(vcpu, rs);
 
         switch (sprn) {
         case SPRN_DEAR:
-                vcpu->arch.dear = vcpu->arch.gpr[rs]; break;
+                vcpu->arch.dear = spr_val; break;
         case SPRN_ESR:
-                vcpu->arch.esr = vcpu->arch.gpr[rs]; break;
+                vcpu->arch.esr = spr_val; break;
         case SPRN_DBCR0:
-                vcpu->arch.dbcr0 = vcpu->arch.gpr[rs]; break;
+                vcpu->arch.dbcr0 = spr_val; break;
         case SPRN_DBCR1:
-                vcpu->arch.dbcr1 = vcpu->arch.gpr[rs]; break;
+                vcpu->arch.dbcr1 = spr_val; break;
         case SPRN_DBSR:
-                vcpu->arch.dbsr &= ~vcpu->arch.gpr[rs]; break;
+                vcpu->arch.dbsr &= ~spr_val; break;
         case SPRN_TSR:
-                vcpu->arch.tsr &= ~vcpu->arch.gpr[rs]; break;
+                vcpu->arch.tsr &= ~spr_val; break;
         case SPRN_TCR:
-                vcpu->arch.tcr = vcpu->arch.gpr[rs];
+                vcpu->arch.tcr = spr_val;
                 kvmppc_emulate_dec(vcpu);
                 break;
 
@@ -124,64 +125,64 @@ int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
          * loaded into the real SPRGs when resuming the
          * guest. */
         case SPRN_SPRG4:
-                vcpu->arch.sprg4 = vcpu->arch.gpr[rs]; break;
+                vcpu->arch.sprg4 = spr_val; break;
         case SPRN_SPRG5:
-                vcpu->arch.sprg5 = vcpu->arch.gpr[rs]; break;
+                vcpu->arch.sprg5 = spr_val; break;
         case SPRN_SPRG6:
-                vcpu->arch.sprg6 = vcpu->arch.gpr[rs]; break;
+                vcpu->arch.sprg6 = spr_val; break;
         case SPRN_SPRG7:
-                vcpu->arch.sprg7 = vcpu->arch.gpr[rs]; break;
+                vcpu->arch.sprg7 = spr_val; break;
 
         case SPRN_IVPR:
-                vcpu->arch.ivpr = vcpu->arch.gpr[rs];
+                vcpu->arch.ivpr = spr_val;
                 break;
         case SPRN_IVOR0:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = vcpu->arch.gpr[rs];
+                vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = spr_val;
                 break;
         case SPRN_IVOR1:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = vcpu->arch.gpr[rs];
+                vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = spr_val;
                 break;
         case SPRN_IVOR2:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = vcpu->arch.gpr[rs];
+                vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = spr_val;
                 break;
         case SPRN_IVOR3:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = vcpu->arch.gpr[rs];
+                vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = spr_val;
                 break;
         case SPRN_IVOR4:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = vcpu->arch.gpr[rs];
+                vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = spr_val;
                 break;
         case SPRN_IVOR5:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = vcpu->arch.gpr[rs];
+                vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = spr_val;
                 break;
         case SPRN_IVOR6:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = vcpu->arch.gpr[rs];
+                vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = spr_val;
                 break;
         case SPRN_IVOR7:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = vcpu->arch.gpr[rs];
+                vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = spr_val;
                 break;
         case SPRN_IVOR8:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = vcpu->arch.gpr[rs];
+                vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = spr_val;
                 break;
         case SPRN_IVOR9:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = vcpu->arch.gpr[rs];
+                vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = spr_val;
                 break;
         case SPRN_IVOR10:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = vcpu->arch.gpr[rs];
+                vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = spr_val;
                 break;
         case SPRN_IVOR11:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = vcpu->arch.gpr[rs];
+                vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = spr_val;
                 break;
         case SPRN_IVOR12:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = vcpu->arch.gpr[rs];
+                vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = spr_val;
                 break;
         case SPRN_IVOR13:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = vcpu->arch.gpr[rs];
+                vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = spr_val;
                 break;
         case SPRN_IVOR14:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = vcpu->arch.gpr[rs];
+                vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = spr_val;
                 break;
         case SPRN_IVOR15:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = vcpu->arch.gpr[rs];
+                vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = spr_val;
                 break;
 
         default:
@@ -197,65 +198,65 @@ int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
 
         switch (sprn) {
         case SPRN_IVPR:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivpr; break;
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivpr); break;
         case SPRN_DEAR:
-                vcpu->arch.gpr[rt] = vcpu->arch.dear; break;
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.dear); break;
         case SPRN_ESR:
-                vcpu->arch.gpr[rt] = vcpu->arch.esr; break;
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.esr); break;
         case SPRN_DBCR0:
-                vcpu->arch.gpr[rt] = vcpu->arch.dbcr0; break;
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.dbcr0); break;
         case SPRN_DBCR1:
-                vcpu->arch.gpr[rt] = vcpu->arch.dbcr1; break;
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.dbcr1); break;
         case SPRN_DBSR:
-                vcpu->arch.gpr[rt] = vcpu->arch.dbsr; break;
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.dbsr); break;
 
         case SPRN_IVOR0:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]);
                 break;
         case SPRN_IVOR1:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]);
                 break;
         case SPRN_IVOR2:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]);
                 break;
         case SPRN_IVOR3:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]);
                 break;
         case SPRN_IVOR4:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]);
                 break;
         case SPRN_IVOR5:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]);
                 break;
         case SPRN_IVOR6:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]);
                 break;
         case SPRN_IVOR7:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]);
                 break;
         case SPRN_IVOR8:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]);
                 break;
         case SPRN_IVOR9:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]);
                 break;
         case SPRN_IVOR10:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]);
                 break;
         case SPRN_IVOR11:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]);
                 break;
         case SPRN_IVOR12:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]);
                 break;
         case SPRN_IVOR13:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]);
                 break;
         case SPRN_IVOR14:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]);
                 break;
         case SPRN_IVOR15:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]);
                 break;
 
         default:
diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e500.c
index 64949eef43f..669a5c5fc7d 100644
--- a/arch/powerpc/kvm/e500.c
+++ b/arch/powerpc/kvm/e500.c
@@ -13,6 +13,7 @@
  */
 
 #include <linux/kvm_host.h>
+#include <linux/slab.h>
 #include <linux/err.h>
 
 #include <asm/reg.h>
@@ -60,6 +61,12 @@ int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu)
 
         kvmppc_e500_tlb_setup(vcpu_e500);
 
+        /* Registers init */
+        vcpu->arch.pvr = mfspr(SPRN_PVR);
+
+        /* Since booke kvm only support one core, update all vcpus' PIR to 0 */
+        vcpu->vcpu_id = 0;
+
         return 0;
 }
 
diff --git a/arch/powerpc/kvm/e500_emulate.c b/arch/powerpc/kvm/e500_emulate.c
index be95b8d8e3b..8e3edfbc963 100644
--- a/arch/powerpc/kvm/e500_emulate.c
+++ b/arch/powerpc/kvm/e500_emulate.c
@@ -74,54 +74,59 @@ int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
 {
         struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
         int emulated = EMULATE_DONE;
+        ulong spr_val = kvmppc_get_gpr(vcpu, rs);
 
         switch (sprn) {
         case SPRN_PID:
                 vcpu_e500->pid[0] = vcpu->arch.shadow_pid =
-                        vcpu->arch.pid = vcpu->arch.gpr[rs];
+                        vcpu->arch.pid = spr_val;
                 break;
         case SPRN_PID1:
-                vcpu_e500->pid[1] = vcpu->arch.gpr[rs]; break;
+                vcpu_e500->pid[1] = spr_val; break;
         case SPRN_PID2:
-                vcpu_e500->pid[2] = vcpu->arch.gpr[rs]; break;
+                vcpu_e500->pid[2] = spr_val; break;
         case SPRN_MAS0:
-                vcpu_e500->mas0 = vcpu->arch.gpr[rs]; break;
+                vcpu_e500->mas0 = spr_val; break;
         case SPRN_MAS1:
-                vcpu_e500->mas1 = vcpu->arch.gpr[rs]; break;
+                vcpu_e500->mas1 = spr_val; break;
         case SPRN_MAS2:
-                vcpu_e500->mas2 = vcpu->arch.gpr[rs]; break;
+                vcpu_e500->mas2 = spr_val; break;
         case SPRN_MAS3:
-                vcpu_e500->mas3 = vcpu->arch.gpr[rs]; break;
+                vcpu_e500->mas3 = spr_val; break;
         case SPRN_MAS4:
-                vcpu_e500->mas4 = vcpu->arch.gpr[rs]; break;
+                vcpu_e500->mas4 = spr_val; break;
         case SPRN_MAS6:
-                vcpu_e500->mas6 = vcpu->arch.gpr[rs]; break;
+                vcpu_e500->mas6 = spr_val; break;
         case SPRN_MAS7:
-                vcpu_e500->mas7 = vcpu->arch.gpr[rs]; break;
+                vcpu_e500->mas7 = spr_val; break;
+        case SPRN_L1CSR0:
+                vcpu_e500->l1csr0 = spr_val;
+                vcpu_e500->l1csr0 &= ~(L1CSR0_DCFI | L1CSR0_CLFC);
+                break;
         case SPRN_L1CSR1:
-                vcpu_e500->l1csr1 = vcpu->arch.gpr[rs]; break;
+                vcpu_e500->l1csr1 = spr_val; break;
         case SPRN_HID0:
-                vcpu_e500->hid0 = vcpu->arch.gpr[rs]; break;
+                vcpu_e500->hid0 = spr_val; break;
         case SPRN_HID1:
-                vcpu_e500->hid1 = vcpu->arch.gpr[rs]; break;
+                vcpu_e500->hid1 = spr_val; break;
 
         case SPRN_MMUCSR0:
                 emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500,
-                                vcpu->arch.gpr[rs]);
+                                spr_val);
                 break;
 
         /* extra exceptions */
         case SPRN_IVOR32:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = vcpu->arch.gpr[rs];
+                vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = spr_val;
                 break;
         case SPRN_IVOR33:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = vcpu->arch.gpr[rs];
+                vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = spr_val;
                 break;
         case SPRN_IVOR34:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = vcpu->arch.gpr[rs];
+                vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = spr_val;
                 break;
         case SPRN_IVOR35:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = vcpu->arch.gpr[rs];
+                vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = spr_val;
                 break;
 
         default:
@@ -138,63 +143,57 @@ int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
 
         switch (sprn) {
         case SPRN_PID:
-                vcpu->arch.gpr[rt] = vcpu_e500->pid[0]; break;
+                kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[0]); break;
         case SPRN_PID1:
-                vcpu->arch.gpr[rt] = vcpu_e500->pid[1]; break;
+                kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[1]); break;
         case SPRN_PID2:
-                vcpu->arch.gpr[rt] = vcpu_e500->pid[2]; break;
+                kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[2]); break;
         case SPRN_MAS0:
-                vcpu->arch.gpr[rt] = vcpu_e500->mas0; break;
+                kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas0); break;
         case SPRN_MAS1:
-                vcpu->arch.gpr[rt] = vcpu_e500->mas1; break;
+                kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas1); break;
         case SPRN_MAS2:
-                vcpu->arch.gpr[rt] = vcpu_e500->mas2; break;
+                kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas2); break;
         case SPRN_MAS3:
-                vcpu->arch.gpr[rt] = vcpu_e500->mas3; break;
+                kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas3); break;
         case SPRN_MAS4:
-                vcpu->arch.gpr[rt] = vcpu_e500->mas4; break;
+                kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas4); break;
         case SPRN_MAS6:
-                vcpu->arch.gpr[rt] = vcpu_e500->mas6; break;
+                kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas6); break;
         case SPRN_MAS7:
-                vcpu->arch.gpr[rt] = vcpu_e500->mas7; break;
+                kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas7); break;
 
         case SPRN_TLB0CFG:
-                vcpu->arch.gpr[rt] = mfspr(SPRN_TLB0CFG);
-                vcpu->arch.gpr[rt] &= ~0xfffUL;
-                vcpu->arch.gpr[rt] |= vcpu_e500->guest_tlb_size[0];
-                break;
-
+                kvmppc_set_gpr(vcpu, rt, vcpu_e500->tlb0cfg); break;
         case SPRN_TLB1CFG:
-                vcpu->arch.gpr[rt] = mfspr(SPRN_TLB1CFG);
-                vcpu->arch.gpr[rt] &= ~0xfffUL;
-                vcpu->arch.gpr[rt] |= vcpu_e500->guest_tlb_size[1];
-                break;
-
+                kvmppc_set_gpr(vcpu, rt, vcpu_e500->tlb1cfg); break;
+        case SPRN_L1CSR0:
+                kvmppc_set_gpr(vcpu, rt, vcpu_e500->l1csr0); break;
         case SPRN_L1CSR1:
-                vcpu->arch.gpr[rt] = vcpu_e500->l1csr1; break;
+                kvmppc_set_gpr(vcpu, rt, vcpu_e500->l1csr1); break;
         case SPRN_HID0:
-                vcpu->arch.gpr[rt] = vcpu_e500->hid0; break;
+                kvmppc_set_gpr(vcpu, rt, vcpu_e500->hid0); break;
         case SPRN_HID1:
-                vcpu->arch.gpr[rt] = vcpu_e500->hid1; break;
+                kvmppc_set_gpr(vcpu, rt, vcpu_e500->hid1); break;
 
         case SPRN_MMUCSR0:
-                vcpu->arch.gpr[rt] = 0; break;
+                kvmppc_set_gpr(vcpu, rt, 0); break;
 
         case SPRN_MMUCFG:
-                vcpu->arch.gpr[rt] = mfspr(SPRN_MMUCFG); break;
+                kvmppc_set_gpr(vcpu, rt, mfspr(SPRN_MMUCFG)); break;
 
         /* extra exceptions */
         case SPRN_IVOR32:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL];
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL]);
                 break;
         case SPRN_IVOR33:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA];
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA]);
                 break;
         case SPRN_IVOR34:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND];
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND]);
                 break;
         case SPRN_IVOR35:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR]);
                 break;
         default:
                 emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, rt);
diff --git a/arch/powerpc/kvm/e500_tlb.c b/arch/powerpc/kvm/e500_tlb.c
index fb1e1dc11ba..21011e12cae 100644
--- a/arch/powerpc/kvm/e500_tlb.c
+++ b/arch/powerpc/kvm/e500_tlb.c
@@ -13,6 +13,7 @@
  */
 
 #include <linux/types.h>
+#include <linux/slab.h>
 #include <linux/string.h>
 #include <linux/kvm.h>
 #include <linux/kvm_host.h>
@@ -417,7 +418,7 @@ int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *vcpu, int ra, int rb)
         int esel, tlbsel;
         gva_t ea;
 
-        ea = ((ra) ? vcpu->arch.gpr[ra] : 0) + vcpu->arch.gpr[rb];
+        ea = ((ra) ? kvmppc_get_gpr(vcpu, ra) : 0) + kvmppc_get_gpr(vcpu, rb);
 
         ia = (ea >> 2) & 0x1;
 
@@ -470,7 +471,7 @@ int kvmppc_e500_emul_tlbsx(struct kvm_vcpu *vcpu, int rb)
         struct tlbe *gtlbe = NULL;
         gva_t ea;
 
-        ea = vcpu->arch.gpr[rb];
+        ea = kvmppc_get_gpr(vcpu, rb);
 
         for (tlbsel = 0; tlbsel < 2; tlbsel++) {
                 esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel, pid, as);
@@ -728,6 +729,12 @@ int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *vcpu_e500)
         if (vcpu_e500->shadow_pages[1] == NULL)
                 goto err_out_page0;
 
+        /* Init TLB configuration register */
+        vcpu_e500->tlb0cfg = mfspr(SPRN_TLB0CFG) & ~0xfffUL;
+        vcpu_e500->tlb0cfg |= vcpu_e500->guest_tlb_size[0];
+        vcpu_e500->tlb1cfg = mfspr(SPRN_TLB1CFG) & ~0xfffUL;
+        vcpu_e500->tlb1cfg |= vcpu_e500->guest_tlb_size[1];
+
         return 0;
 
 err_out_page0:
diff --git a/arch/powerpc/kvm/emulate.c b/arch/powerpc/kvm/emulate.c
index 4a9ac6640fa..cb72a65f4ec 100644
--- a/arch/powerpc/kvm/emulate.c
+++ b/arch/powerpc/kvm/emulate.c
@@ -83,6 +83,9 @@ void kvmppc_emulate_dec(struct kvm_vcpu *vcpu)
 
         pr_debug("mtDEC: %x\n", vcpu->arch.dec);
 #ifdef CONFIG_PPC64
+        /* mtdec lowers the interrupt line when positive. */
+        kvmppc_core_dequeue_dec(vcpu);
+
         /* POWER4+ triggers a dec interrupt if the value is < 0 */
         if (vcpu->arch.dec & 0x80000000) {
                 hrtimer_try_to_cancel(&vcpu->arch.dec_timer);
@@ -140,14 +143,18 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
 
         pr_debug(KERN_INFO "Emulating opcode %d / %d\n", get_op(inst), get_xop(inst));
 
+        /* Try again next time */
+        if (inst == KVM_INST_FETCH_FAILED)
+                return EMULATE_DONE;
+
         switch (get_op(inst)) {
         case OP_TRAP:
 #ifdef CONFIG_PPC64
         case OP_TRAP_64:
+                kvmppc_core_queue_program(vcpu, SRR1_PROGTRAP);
 #else
-                vcpu->arch.esr |= ESR_PTR;
+                kvmppc_core_queue_program(vcpu, vcpu->arch.esr | ESR_PTR);
 #endif
-                kvmppc_core_queue_program(vcpu);
                 advance = 0;
                 break;
 
@@ -167,14 +174,14 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                 case OP_31_XOP_STWX:
                         rs = get_rs(inst);
                         emulated = kvmppc_handle_store(run, vcpu,
-                                                       vcpu->arch.gpr[rs],
+                                                       kvmppc_get_gpr(vcpu, rs),
                                                        4, 1);
                         break;
 
                 case OP_31_XOP_STBX:
                         rs = get_rs(inst);
                         emulated = kvmppc_handle_store(run, vcpu,
-                                                       vcpu->arch.gpr[rs],
+                                                       kvmppc_get_gpr(vcpu, rs),
                                                        1, 1);
                         break;
 
@@ -183,14 +190,14 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         ra = get_ra(inst);
                         rb = get_rb(inst);
 
-                        ea = vcpu->arch.gpr[rb];
+                        ea = kvmppc_get_gpr(vcpu, rb);
                         if (ra)
-                                ea += vcpu->arch.gpr[ra];
+                                ea += kvmppc_get_gpr(vcpu, ra);
 
                         emulated = kvmppc_handle_store(run, vcpu,
-                                                       vcpu->arch.gpr[rs],
+                                                       kvmppc_get_gpr(vcpu, rs),
                                                        1, 1);
-                        vcpu->arch.gpr[rs] = ea;
+                        kvmppc_set_gpr(vcpu, rs, ea);
                         break;
 
                 case OP_31_XOP_LHZX:
@@ -203,12 +210,12 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         ra = get_ra(inst);
                         rb = get_rb(inst);
 
-                        ea = vcpu->arch.gpr[rb];
+                        ea = kvmppc_get_gpr(vcpu, rb);
                         if (ra)
-                                ea += vcpu->arch.gpr[ra];
+                                ea += kvmppc_get_gpr(vcpu, ra);
 
                         emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
-                        vcpu->arch.gpr[ra] = ea;
+                        kvmppc_set_gpr(vcpu, ra, ea);
                         break;
 
                 case OP_31_XOP_MFSPR:
@@ -217,47 +224,49 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
 
                         switch (sprn) {
                         case SPRN_SRR0:
-                                vcpu->arch.gpr[rt] = vcpu->arch.srr0; break;
+                                kvmppc_set_gpr(vcpu, rt, vcpu->arch.srr0); break;
                         case SPRN_SRR1:
-                                vcpu->arch.gpr[rt] = vcpu->arch.srr1; break;
+                                kvmppc_set_gpr(vcpu, rt, vcpu->arch.srr1); break;
                         case SPRN_PVR:
-                                vcpu->arch.gpr[rt] = vcpu->arch.pvr; break;
+                                kvmppc_set_gpr(vcpu, rt, vcpu->arch.pvr); break;
                         case SPRN_PIR:
-                                vcpu->arch.gpr[rt] = vcpu->vcpu_id; break;
+                                kvmppc_set_gpr(vcpu, rt, vcpu->vcpu_id); break;
                         case SPRN_MSSSR0:
-                                vcpu->arch.gpr[rt] = 0; break;
+                                kvmppc_set_gpr(vcpu, rt, 0); break;
 
                         /* Note: mftb and TBRL/TBWL are user-accessible, so
                          * the guest can always access the real TB anyways.
                          * In fact, we probably will never see these traps. */
                         case SPRN_TBWL:
-                                vcpu->arch.gpr[rt] = get_tb() >> 32; break;
+                                kvmppc_set_gpr(vcpu, rt, get_tb() >> 32); break;
                         case SPRN_TBWU:
-                                vcpu->arch.gpr[rt] = get_tb(); break;
+                                kvmppc_set_gpr(vcpu, rt, get_tb()); break;
 
                         case SPRN_SPRG0:
-                                vcpu->arch.gpr[rt] = vcpu->arch.sprg0; break;
+                                kvmppc_set_gpr(vcpu, rt, vcpu->arch.sprg0); break;
                         case SPRN_SPRG1:
-                                vcpu->arch.gpr[rt] = vcpu->arch.sprg1; break;
+                                kvmppc_set_gpr(vcpu, rt, vcpu->arch.sprg1); break;
                         case SPRN_SPRG2:
-                                vcpu->arch.gpr[rt] = vcpu->arch.sprg2; break;
+                                kvmppc_set_gpr(vcpu, rt, vcpu->arch.sprg2); break;
                         case SPRN_SPRG3:
-                                vcpu->arch.gpr[rt] = vcpu->arch.sprg3; break;
+                                kvmppc_set_gpr(vcpu, rt, vcpu->arch.sprg3); break;
                         /* Note: SPRG4-7 are user-readable, so we don't get
                          * a trap. */
 
                         case SPRN_DEC:
                         {
                                 u64 jd = get_tb() - vcpu->arch.dec_jiffies;
-                                vcpu->arch.gpr[rt] = vcpu->arch.dec - jd;
-                                pr_debug(KERN_INFO "mfDEC: %x - %llx = %lx\n", vcpu->arch.dec, jd, vcpu->arch.gpr[rt]);
+                                kvmppc_set_gpr(vcpu, rt, vcpu->arch.dec - jd);
+                                pr_debug(KERN_INFO "mfDEC: %x - %llx = %lx\n",
+                                         vcpu->arch.dec, jd,
+                                         kvmppc_get_gpr(vcpu, rt));
                                 break;
                         }
                         default:
                                 emulated = kvmppc_core_emulate_mfspr(vcpu, sprn, rt);
                                 if (emulated == EMULATE_FAIL) {
                                         printk("mfspr: unknown spr %x\n", sprn);
-                                        vcpu->arch.gpr[rt] = 0;
+                                        kvmppc_set_gpr(vcpu, rt, 0);
                                 }
                                 break;
                         }
@@ -269,7 +278,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         rb = get_rb(inst);
 
                         emulated = kvmppc_handle_store(run, vcpu,
-                                                       vcpu->arch.gpr[rs],
+                                                       kvmppc_get_gpr(vcpu, rs),
                                                        2, 1);
                         break;
 
@@ -278,14 +287,14 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         ra = get_ra(inst);
                         rb = get_rb(inst);
 
-                        ea = vcpu->arch.gpr[rb];
+                        ea = kvmppc_get_gpr(vcpu, rb);
                         if (ra)
-                                ea += vcpu->arch.gpr[ra];
+                                ea += kvmppc_get_gpr(vcpu, ra);
 
                         emulated = kvmppc_handle_store(run, vcpu,
-                                                       vcpu->arch.gpr[rs],
+                                                       kvmppc_get_gpr(vcpu, rs),
                                                        2, 1);
-                        vcpu->arch.gpr[ra] = ea;
+                        kvmppc_set_gpr(vcpu, ra, ea);
                         break;
 
                 case OP_31_XOP_MTSPR:
@@ -293,9 +302,9 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         rs = get_rs(inst);
                         switch (sprn) {
                         case SPRN_SRR0:
-                                vcpu->arch.srr0 = vcpu->arch.gpr[rs]; break;
+                                vcpu->arch.srr0 = kvmppc_get_gpr(vcpu, rs); break;
                         case SPRN_SRR1:
-                                vcpu->arch.srr1 = vcpu->arch.gpr[rs]; break;
+                                vcpu->arch.srr1 = kvmppc_get_gpr(vcpu, rs); break;
 
                         /* XXX We need to context-switch the timebase for
                          * watchdog and FIT. */
@@ -305,18 +314,18 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         case SPRN_MSSSR0: break;
 
                         case SPRN_DEC:
-                                vcpu->arch.dec = vcpu->arch.gpr[rs];
+                                vcpu->arch.dec = kvmppc_get_gpr(vcpu, rs);
                                 kvmppc_emulate_dec(vcpu);
                                 break;
 
                         case SPRN_SPRG0:
-                                vcpu->arch.sprg0 = vcpu->arch.gpr[rs]; break;
+                                vcpu->arch.sprg0 = kvmppc_get_gpr(vcpu, rs); break;
                         case SPRN_SPRG1:
-                                vcpu->arch.sprg1 = vcpu->arch.gpr[rs]; break;
+                                vcpu->arch.sprg1 = kvmppc_get_gpr(vcpu, rs); break;
                         case SPRN_SPRG2:
-                                vcpu->arch.sprg2 = vcpu->arch.gpr[rs]; break;
+                                vcpu->arch.sprg2 = kvmppc_get_gpr(vcpu, rs); break;
                         case SPRN_SPRG3:
-                                vcpu->arch.sprg3 = vcpu->arch.gpr[rs]; break;
+                                vcpu->arch.sprg3 = kvmppc_get_gpr(vcpu, rs); break;
 
                         default:
                                 emulated = kvmppc_core_emulate_mtspr(vcpu, sprn, rs);
@@ -348,7 +357,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         rb = get_rb(inst);
 
                         emulated = kvmppc_handle_store(run, vcpu,
-                                                       vcpu->arch.gpr[rs],
+                                                       kvmppc_get_gpr(vcpu, rs),
                                                        4, 0);
                         break;
 
@@ -363,7 +372,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         rb = get_rb(inst);
 
                         emulated = kvmppc_handle_store(run, vcpu,
-                                                       vcpu->arch.gpr[rs],
+                                                       kvmppc_get_gpr(vcpu, rs),
                                                        2, 0);
                         break;
 
@@ -382,7 +391,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                 ra = get_ra(inst);
                 rt = get_rt(inst);
                 emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);
-                vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed;
+                kvmppc_set_gpr(vcpu, ra, vcpu->arch.paddr_accessed);
                 break;
 
         case OP_LBZ:
@@ -394,35 +403,39 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                 ra = get_ra(inst);
                 rt = get_rt(inst);
                 emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
-                vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed;
+                kvmppc_set_gpr(vcpu, ra, vcpu->arch.paddr_accessed);
                 break;
 
         case OP_STW:
                 rs = get_rs(inst);
-                emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
+                emulated = kvmppc_handle_store(run, vcpu,
+                                               kvmppc_get_gpr(vcpu, rs),
                                                4, 1);
                 break;
 
         case OP_STWU:
                 ra = get_ra(inst);
                 rs = get_rs(inst);
-                emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
+                emulated = kvmppc_handle_store(run, vcpu,
+                                               kvmppc_get_gpr(vcpu, rs),
                                                4, 1);
-                vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed;
+                kvmppc_set_gpr(vcpu, ra, vcpu->arch.paddr_accessed);
                 break;
 
         case OP_STB:
                 rs = get_rs(inst);
-                emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
+                emulated = kvmppc_handle_store(run, vcpu,
+                                               kvmppc_get_gpr(vcpu, rs),
                                                1, 1);
                 break;
 
         case OP_STBU:
                 ra = get_ra(inst);
                 rs = get_rs(inst);
-                emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
+                emulated = kvmppc_handle_store(run, vcpu,
+                                               kvmppc_get_gpr(vcpu, rs),
                                                1, 1);
-                vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed;
+                kvmppc_set_gpr(vcpu, ra, vcpu->arch.paddr_accessed);
                 break;
 
         case OP_LHZ:
@@ -434,21 +447,23 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                 ra = get_ra(inst);
                 rt = get_rt(inst);
                 emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
-                vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed;
+                kvmppc_set_gpr(vcpu, ra, vcpu->arch.paddr_accessed);
                 break;
 
         case OP_STH:
                 rs = get_rs(inst);
-                emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
+                emulated = kvmppc_handle_store(run, vcpu,
+                                               kvmppc_get_gpr(vcpu, rs),
                                                2, 1);
                 break;
 
         case OP_STHU:
                 ra = get_ra(inst);
                 rs = get_rs(inst);
-                emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
+                emulated = kvmppc_handle_store(run, vcpu,
+                                               kvmppc_get_gpr(vcpu, rs),
                                                2, 1);
-                vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed;
+                kvmppc_set_gpr(vcpu, ra, vcpu->arch.paddr_accessed);
                 break;
 
         default:
@@ -461,6 +476,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         advance = 0;
                         printk(KERN_ERR "Couldn't emulate instruction 0x%08x "
                                "(op %d xop %d)\n", inst, get_op(inst), get_xop(inst));
+                        kvmppc_core_queue_program(vcpu, 0);
                 }
         }
 
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
index f06cf93b178..297fcd2ff7d 100644
--- a/arch/powerpc/kvm/powerpc.c
+++ b/arch/powerpc/kvm/powerpc.c
@@ -25,6 +25,7 @@
 #include <linux/vmalloc.h>
 #include <linux/hrtimer.h>
 #include <linux/fs.h>
+#include <linux/slab.h>
 #include <asm/cputable.h>
 #include <asm/uaccess.h>
 #include <asm/kvm_ppc.h>
@@ -137,6 +138,7 @@ void kvm_arch_destroy_vm(struct kvm *kvm)
 {
         kvmppc_free_vcpus(kvm);
         kvm_free_physmem(kvm);
+        cleanup_srcu_struct(&kvm->srcu);
         kfree(kvm);
 }
 
@@ -165,14 +167,24 @@ long kvm_arch_dev_ioctl(struct file *filp,
         return -EINVAL;
 }
 
-int kvm_arch_set_memory_region(struct kvm *kvm,
-                               struct kvm_userspace_memory_region *mem,
-                               struct kvm_memory_slot old,
-                               int user_alloc)
+int kvm_arch_prepare_memory_region(struct kvm *kvm,
+                                   struct kvm_memory_slot *memslot,
+                                   struct kvm_memory_slot old,
+                                   struct kvm_userspace_memory_region *mem,
+                                   int user_alloc)
 {
         return 0;
 }
 
+void kvm_arch_commit_memory_region(struct kvm *kvm,
+               struct kvm_userspace_memory_region *mem,
+               struct kvm_memory_slot old,
+               int user_alloc)
+{
+       return;
+}
+
+
 void kvm_arch_flush_shadow(struct kvm *kvm)
 {
 }
@@ -260,34 +272,35 @@ int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
 static void kvmppc_complete_dcr_load(struct kvm_vcpu *vcpu,
                                      struct kvm_run *run)
 {
-        ulong *gpr = &vcpu->arch.gpr[vcpu->arch.io_gpr];
-        *gpr = run->dcr.data;
+        kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, run->dcr.data);
 }
 
 static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu,
                                       struct kvm_run *run)
 {
-        ulong *gpr = &vcpu->arch.gpr[vcpu->arch.io_gpr];
+        ulong gpr;
 
-        if (run->mmio.len > sizeof(*gpr)) {
+        if (run->mmio.len > sizeof(gpr)) {
                 printk(KERN_ERR "bad MMIO length: %d\n", run->mmio.len);
                 return;
         }
 
         if (vcpu->arch.mmio_is_bigendian) {
                 switch (run->mmio.len) {
-                case 4: *gpr = *(u32 *)run->mmio.data; break;
-                case 2: *gpr = *(u16 *)run->mmio.data; break;
-                case 1: *gpr = *(u8 *)run->mmio.data; break;
+                case 4: gpr = *(u32 *)run->mmio.data; break;
+                case 2: gpr = *(u16 *)run->mmio.data; break;
+                case 1: gpr = *(u8 *)run->mmio.data; break;
                 }
         } else {
                 /* Convert BE data from userland back to LE. */
                 switch (run->mmio.len) {
-                case 4: *gpr = ld_le32((u32 *)run->mmio.data); break;
-                case 2: *gpr = ld_le16((u16 *)run->mmio.data); break;
-                case 1: *gpr = *(u8 *)run->mmio.data; break;
+                case 4: gpr = ld_le32((u32 *)run->mmio.data); break;
+                case 2: gpr = ld_le16((u16 *)run->mmio.data); break;
+                case 1: gpr = *(u8 *)run->mmio.data; break;
                 }
         }
+
+        kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, gpr);
 }
 
 int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
diff --git a/arch/powerpc/lib/devres.c b/arch/powerpc/lib/devres.c
index 292115d98ea..deac4d30daf 100644
--- a/arch/powerpc/lib/devres.c
+++ b/arch/powerpc/lib/devres.c
@@ -8,6 +8,7 @@
  */
 
 #include <linux/device.h>       /* devres_*(), devm_ioremap_release() */
+#include <linux/gfp.h>
 #include <linux/io.h>           /* ioremap_flags() */
 #include <linux/module.h>       /* EXPORT_SYMBOL() */
 
diff --git a/arch/powerpc/mm/dma-noncoherent.c b/arch/powerpc/mm/dma-noncoherent.c
index 36692f5c9a7..757c0bed9a9 100644
--- a/arch/powerpc/mm/dma-noncoherent.c
+++ b/arch/powerpc/mm/dma-noncoherent.c
@@ -23,6 +23,7 @@
  */
 
 #include <linux/sched.h>
+#include <linux/slab.h>
 #include <linux/kernel.h>
 #include <linux/errno.h>
 #include <linux/string.h>
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c
index c5394728bf2..1ed6b52f303 100644
--- a/arch/powerpc/mm/fsl_booke_mmu.c
+++ b/arch/powerpc/mm/fsl_booke_mmu.c
@@ -116,7 +116,7 @@ void loadcam_entry(int idx)
         mtspr(SPRN_MAS2, TLBCAM[idx].MAS2);
         mtspr(SPRN_MAS3, TLBCAM[idx].MAS3);
 
-        if (cur_cpu_spec->cpu_features & MMU_FTR_BIG_PHYS)
+        if (mmu_has_feature(MMU_FTR_BIG_PHYS))
                 mtspr(SPRN_MAS7, TLBCAM[idx].MAS7);
 
         asm volatile("isync;tlbwe;isync" : : : "memory");
@@ -152,18 +152,13 @@ static void settlbcam(int index, unsigned long virt, phys_addr_t phys,
 
         TLBCAM[index].MAS3 = (phys & MAS3_RPN) | MAS3_SX | MAS3_SR;
         TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0);
-        if (cur_cpu_spec->cpu_features & MMU_FTR_BIG_PHYS)
+        if (mmu_has_feature(MMU_FTR_BIG_PHYS))
                 TLBCAM[index].MAS7 = (u64)phys >> 32;
 
-#ifndef CONFIG_KGDB /* want user access for breakpoints */
         if (flags & _PAGE_USER) {
            TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
            TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
         }
-#else
-        TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
-        TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
-#endif
 
         tlbcam_addrs[index].start = virt;
         tlbcam_addrs[index].limit = virt + size - 1;
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index 123f7070238..9bb249c3046 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -9,6 +9,7 @@
 
 #include <linux/mm.h>
 #include <linux/io.h>
+#include <linux/slab.h>
 #include <linux/hugetlb.h>
 #include <asm/pgtable.h>
 #include <asm/pgalloc.h>
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 4ec900af332..767333005eb 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -31,6 +31,7 @@
 #include <linux/initrd.h>
 #include <linux/pagemap.h>
 #include <linux/lmb.h>
+#include <linux/gfp.h>
 
 #include <asm/pgalloc.h>
 #include <asm/prom.h>
@@ -47,7 +48,7 @@
 #include "mmu_decl.h"
 
 #if defined(CONFIG_KERNEL_START_BOOL) || defined(CONFIG_LOWMEM_SIZE_BOOL)
-/* The ammount of lowmem must be within 0xF0000000 - KERNELBASE. */
+/* The amount of lowmem must be within 0xF0000000 - KERNELBASE. */
 #if (CONFIG_LOWMEM_SIZE > (0xF0000000 - PAGE_OFFSET))
 #error "You must adjust CONFIG_LOWMEM_SIZE or CONFIG_START_KERNEL"
 #endif
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index 776f28d02b6..d7fa50b09b4 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -42,6 +42,7 @@
 #include <linux/poison.h>
 #include <linux/lmb.h>
 #include <linux/hugetlb.h>
+#include <linux/slab.h>
 
 #include <asm/pgalloc.h>
 #include <asm/page.h>
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 311224cdb7a..0f594d774bf 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -22,6 +22,7 @@
 #include <linux/kernel.h>
 #include <linux/errno.h>
 #include <linux/string.h>
+#include <linux/gfp.h>
 #include <linux/types.h>
 #include <linux/mm.h>
 #include <linux/stddef.h>
@@ -48,6 +49,7 @@
 #include <asm/sparsemem.h>
 #include <asm/vdso.h>
 #include <asm/fixmap.h>
+#include <asm/swiotlb.h>
 
 #include "mmu_decl.h"
 
@@ -320,6 +322,11 @@ void __init mem_init(void)
         struct page *page;
         unsigned long reservedpages = 0, codesize, initsize, datasize, bsssize;
 
+#ifdef CONFIG_SWIOTLB
+        if (ppc_swiotlb_enable)
+                swiotlb_init(1);
+#endif
+
         num_physpages = lmb.memory.size >> PAGE_SHIFT;
         high_memory = (void *) __va(max_low_pfn * PAGE_SIZE);
 
diff --git a/arch/powerpc/mm/mmu_context_hash64.c b/arch/powerpc/mm/mmu_context_hash64.c
index 51622daae09..2535828aa84 100644
--- a/arch/powerpc/mm/mmu_context_hash64.c
+++ b/arch/powerpc/mm/mmu_context_hash64.c
@@ -19,6 +19,7 @@
 #include <linux/spinlock.h>
 #include <linux/idr.h>
 #include <linux/module.h>
+#include <linux/gfp.h>
 
 #include <asm/mmu_context.h>
 
diff --git a/arch/powerpc/mm/mmu_context_nohash.c b/arch/powerpc/mm/mmu_context_nohash.c
index dbc692145ec..1f2d9ff0989 100644
--- a/arch/powerpc/mm/mmu_context_nohash.c
+++ b/arch/powerpc/mm/mmu_context_nohash.c
@@ -47,6 +47,7 @@
 #include <linux/bootmem.h>
 #include <linux/notifier.h>
 #include <linux/cpu.h>
+#include <linux/slab.h>
 
 #include <asm/mmu_context.h>
 #include <asm/tlbflush.h>
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index b037d95eead..eaa7633515b 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -242,10 +242,11 @@ EXPORT_SYMBOL_GPL(of_node_to_nid);
  */
 static int __init find_min_common_depth(void)
 {
-        int depth;
+        int depth, index;
         const unsigned int *ref_points;
         struct device_node *rtas_root;
         unsigned int len;
+        struct device_node *options;
 
         rtas_root = of_find_node_by_path("/rtas");
 
@@ -258,11 +259,23 @@ static int __init find_min_common_depth(void)
          * configuration (should be all 0's) and the second is for a normal
          * NUMA configuration.
          */
+        index = 1;
         ref_points = of_get_property(rtas_root,
                         "ibm,associativity-reference-points", &len);
 
+        /*
+         * For type 1 affinity information we want the first field
+         */
+        options = of_find_node_by_path("/options");
+        if (options) {
+                const char *str;
+                str = of_get_property(options, "ibm,associativity-form", NULL);
+                if (str && !strcmp(str, "1"))
+                        index = 0;
+        }
+
         if ((len >= 2 * sizeof(unsigned int)) && ref_points) {
-                depth = ref_points[1];
+                depth = ref_points[index];
         } else {
                 dbg("NUMA: ibm,associativity-reference-points not found.\n");
                 depth = -1;
@@ -451,7 +464,7 @@ static int __cpuinit numa_setup_cpu(unsigned long lcpu)
         nid = of_node_to_nid_single(cpu);
 
         if (nid < 0 || !node_online(nid))
-                nid = any_online_node(NODE_MASK_ALL);
+                nid = first_online_node;
 out:
         map_cpu_to_node(lcpu, nid);
 
@@ -1114,7 +1127,7 @@ int hot_add_scn_to_nid(unsigned long scn_addr)
         int nid, found = 0;
 
         if (!numa_enabled || (min_common_depth < 0))
-                return any_online_node(NODE_MASK_ALL);
+                return first_online_node;
 
         memory = of_find_node_by_path("/ibm,dynamic-reconfiguration-memory");
         if (memory) {
@@ -1125,7 +1138,7 @@ int hot_add_scn_to_nid(unsigned long scn_addr)
         }
 
         if (nid < 0 || !node_online(nid))
-                nid = any_online_node(NODE_MASK_ALL);
+                nid = first_online_node;
 
         if (NODE_DATA(nid)->node_spanned_pages)
                 return nid;
diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c
index 99df697c601..ebc2f38eb38 100644
--- a/arch/powerpc/mm/pgtable.c
+++ b/arch/powerpc/mm/pgtable.c
@@ -22,6 +22,7 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/gfp.h>
 #include <linux/mm.h>
 #include <linux/init.h>
 #include <linux/percpu.h>
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index 573b3bd1c45..b9243e7557a 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -27,6 +27,7 @@
 #include <linux/init.h>
 #include <linux/highmem.h>
 #include <linux/lmb.h>
+#include <linux/slab.h>
 
 #include <asm/pgtable.h>
 #include <asm/pgalloc.h>
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index 853d5565eed..d95679a5fb2 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -35,6 +35,7 @@
 #include <linux/init.h>
 #include <linux/bootmem.h>
 #include <linux/lmb.h>
+#include <linux/slab.h>
 
 #include <asm/pgalloc.h>
 #include <asm/page.h>
diff --git a/arch/powerpc/mm/subpage-prot.c b/arch/powerpc/mm/subpage-prot.c
index a040b81e93b..e4f8f1fc81a 100644
--- a/arch/powerpc/mm/subpage-prot.c
+++ b/arch/powerpc/mm/subpage-prot.c
@@ -10,7 +10,6 @@
 #include <linux/errno.h>
 #include <linux/kernel.h>
 #include <linux/gfp.h>
-#include <linux/slab.h>
 #include <linux/types.h>
 #include <linux/mm.h>
 #include <linux/hugetlb.h>
diff --git a/arch/powerpc/oprofile/cell/spu_task_sync.c b/arch/powerpc/oprofile/cell/spu_task_sync.c
index 6b793aeda72..642fca137cc 100644
--- a/arch/powerpc/oprofile/cell/spu_task_sync.c
+++ b/arch/powerpc/oprofile/cell/spu_task_sync.c
@@ -26,6 +26,7 @@
 #include <linux/notifier.h>
 #include <linux/numa.h>
 #include <linux/oprofile.h>
+#include <linux/slab.h>
 #include <linux/spinlock.h>
 #include "pr_util.h"
 
diff --git a/arch/powerpc/oprofile/cell/vma_map.c b/arch/powerpc/oprofile/cell/vma_map.c
index c591339daf5..c579b16845d 100644
--- a/arch/powerpc/oprofile/cell/vma_map.c
+++ b/arch/powerpc/oprofile/cell/vma_map.c
@@ -20,6 +20,7 @@
 #include <linux/string.h>
 #include <linux/uaccess.h>
 #include <linux/elf.h>
+#include <linux/slab.h>
 #include "pr_util.h"
 
 
diff --git a/arch/powerpc/platforms/44x/warp.c b/arch/powerpc/platforms/44x/warp.c
index e5c1b096c3e..8f771395f42 100644
--- a/arch/powerpc/platforms/44x/warp.c
+++ b/arch/powerpc/platforms/44x/warp.c
@@ -17,6 +17,7 @@
 #include <linux/delay.h>
 #include <linux/of_gpio.h>
 #include <linux/of_i2c.h>
+#include <linux/slab.h>
 
 #include <asm/machdep.h>
 #include <asm/prom.h>
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpio.c b/arch/powerpc/platforms/52xx/mpc52xx_gpio.c
index 2b8d8ef32e4..fda7c2a1828 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_gpio.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_gpio.c
@@ -19,6 +19,7 @@
 
 #include <linux/of.h>
 #include <linux/kernel.h>
+#include <linux/slab.h>
 #include <linux/of_gpio.h>
 #include <linux/io.h>
 #include <linux/of_platform.h>
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
index 6f8ebe1085b..a60ee39d3b7 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
@@ -62,6 +62,7 @@
 #include <linux/of_platform.h>
 #include <linux/of_gpio.h>
 #include <linux/kernel.h>
+#include <linux/slab.h>
 #include <linux/watchdog.h>
 #include <linux/miscdevice.h>
 #include <linux/uaccess.h>
@@ -553,7 +554,7 @@ static ssize_t mpc52xx_wdt_write(struct file *file, const char __user *data,
         return 0;
 }
 
-static struct watchdog_info mpc5200_wdt_info = {
+static const struct watchdog_info mpc5200_wdt_info = {
         .options        = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
         .identity       = WDT_IDENTITY,
 };
@@ -711,7 +712,11 @@ static int __devinit mpc52xx_gpt_wdt_init(void)
         return 0;
 }
 
-#define mpc52xx_gpt_wdt_setup(x, y)             (0)
+static inline int mpc52xx_gpt_wdt_setup(struct mpc52xx_gpt_priv *gpt,
+                                        const u32 *period)
+{
+        return 0;
+}
 
 #endif  /*  CONFIG_MPC5200_WDT  */
 
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
index 929d017535a..d4f8be307cd 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
@@ -481,6 +481,8 @@ mpc52xx_lpbfifo_probe(struct of_device *op, const struct of_device_id *match)
         if (rc)
                 goto err_bcom_rx_irq;
 
+        lpbfifo.dma_irqs_enabled = 1;
+
         /* Request the Bestcomm transmit (memory --> fifo) task and IRQ */
         lpbfifo.bcom_tx_task =
                 bcom_gen_bd_tx_init(2, res.start + LPBFIFO_REG_FIFO_DATA,
diff --git a/arch/powerpc/platforms/82xx/ep8248e.c b/arch/powerpc/platforms/82xx/ep8248e.c
index f9aee182e6f..f21555d3395 100644
--- a/arch/powerpc/platforms/82xx/ep8248e.c
+++ b/arch/powerpc/platforms/82xx/ep8248e.c
@@ -15,6 +15,7 @@
 #include <linux/fsl_devices.h>
 #include <linux/mdio-bitbang.h>
 #include <linux/of_mdio.h>
+#include <linux/slab.h>
 #include <linux/of_platform.h>
 
 #include <asm/io.h>
diff --git a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
index 9d962d7c72c..5a55d87d6bd 100644
--- a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
+++ b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
@@ -17,6 +17,7 @@
 #include <linux/irq.h>
 #include <linux/types.h>
 #include <linux/bootmem.h>
+#include <linux/slab.h>
 
 #include <asm/io.h>
 #include <asm/prom.h>
@@ -24,7 +25,7 @@
 
 #include "pq2.h"
 
-static DEFINE_SPINLOCK(pci_pic_lock);
+static DEFINE_RAW_SPINLOCK(pci_pic_lock);
 
 struct pq2ads_pci_pic {
         struct device_node *node;
@@ -45,12 +46,12 @@ static void pq2ads_pci_mask_irq(unsigned int virq)
 
         if (irq != -1) {
                 unsigned long flags;
-                spin_lock_irqsave(&pci_pic_lock, flags);
+                raw_spin_lock_irqsave(&pci_pic_lock, flags);
 
                 setbits32(&priv->regs->mask, 1 << irq);
                 mb();
 
-                spin_unlock_irqrestore(&pci_pic_lock, flags);
+                raw_spin_unlock_irqrestore(&pci_pic_lock, flags);
         }
 }
 
@@ -62,9 +63,9 @@ static void pq2ads_pci_unmask_irq(unsigned int virq)
         if (irq != -1) {
                 unsigned long flags;
 
-                spin_lock_irqsave(&pci_pic_lock, flags);
+                raw_spin_lock_irqsave(&pci_pic_lock, flags);
                 clrbits32(&priv->regs->mask, 1 << irq);
-                spin_unlock_irqrestore(&pci_pic_lock, flags);
+                raw_spin_unlock_irqrestore(&pci_pic_lock, flags);
         }
 }
 
diff --git a/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c b/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c
index 82a9bcb858b..d119a7c1c17 100644
--- a/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c
+++ b/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c
@@ -20,6 +20,7 @@
 #include <linux/gpio.h>
 #include <linux/of.h>
 #include <linux/of_gpio.h>
+#include <linux/slab.h>
 #include <asm/prom.h>
 #include <asm/machdep.h>
 
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index d95121894eb..3a2ade2e443 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -51,7 +51,7 @@ config MPC85xx_DS
         bool "Freescale MPC85xx DS"
         select PPC_I8259
         select DEFAULT_UIMAGE
-        select FSL_ULI1575
+        select FSL_ULI1575 if PCI
         select SWIOTLB
         help
           This option enables support for the MPC85xx DS (MPC8544 DS) board
@@ -60,7 +60,7 @@ config MPC85xx_RDB
         bool "Freescale MPC85xx RDB"
         select PPC_I8259
         select DEFAULT_UIMAGE
-        select FSL_ULI1575
+        select FSL_ULI1575 if PCI
         select SWIOTLB
         help
           This option enables support for the MPC85xx RDB (P2020 RDB) board
diff --git a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
index 42e87f08aa0..d48527ffc42 100644
--- a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
+++ b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
@@ -50,7 +50,7 @@ static struct socrates_fpga_irq_info fpga_irqs[SOCRATES_FPGA_NUM_IRQS] = {
 
 #define socrates_fpga_irq_to_hw(virq)    ((unsigned int)irq_map[virq].hwirq)
 
-static DEFINE_SPINLOCK(socrates_fpga_pic_lock);
+static DEFINE_RAW_SPINLOCK(socrates_fpga_pic_lock);
 
 static void __iomem *socrates_fpga_pic_iobase;
 static struct irq_host *socrates_fpga_pic_irq_host;
@@ -80,9 +80,9 @@ static inline unsigned int socrates_fpga_pic_get_irq(unsigned int irq)
         if (i == 3)
                 return NO_IRQ;
 
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         cause = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(i));
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
         for (i = SOCRATES_FPGA_NUM_IRQS - 1; i >= 0; i--) {
                 if (cause >> (i + 16))
                         break;
@@ -116,12 +116,12 @@ static void socrates_fpga_pic_ack(unsigned int virq)
         hwirq = socrates_fpga_irq_to_hw(virq);
 
         irq_line = fpga_irqs[hwirq].irq_line;
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
                 & SOCRATES_FPGA_IRQ_MASK;
         mask |= (1 << (hwirq + 16));
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
 }
 
 static void socrates_fpga_pic_mask(unsigned int virq)
@@ -134,12 +134,12 @@ static void socrates_fpga_pic_mask(unsigned int virq)
         hwirq = socrates_fpga_irq_to_hw(virq);
 
         irq_line = fpga_irqs[hwirq].irq_line;
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
                 & SOCRATES_FPGA_IRQ_MASK;
         mask &= ~(1 << hwirq);
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
 }
 
 static void socrates_fpga_pic_mask_ack(unsigned int virq)
@@ -152,13 +152,13 @@ static void socrates_fpga_pic_mask_ack(unsigned int virq)
         hwirq = socrates_fpga_irq_to_hw(virq);
 
         irq_line = fpga_irqs[hwirq].irq_line;
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
                 & SOCRATES_FPGA_IRQ_MASK;
         mask &= ~(1 << hwirq);
         mask |= (1 << (hwirq + 16));
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
 }
 
 static void socrates_fpga_pic_unmask(unsigned int virq)
@@ -171,12 +171,12 @@ static void socrates_fpga_pic_unmask(unsigned int virq)
         hwirq = socrates_fpga_irq_to_hw(virq);
 
         irq_line = fpga_irqs[hwirq].irq_line;
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
                 & SOCRATES_FPGA_IRQ_MASK;
         mask |= (1 << hwirq);
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
 }
 
 static void socrates_fpga_pic_eoi(unsigned int virq)
@@ -189,12 +189,12 @@ static void socrates_fpga_pic_eoi(unsigned int virq)
         hwirq = socrates_fpga_irq_to_hw(virq);
 
         irq_line = fpga_irqs[hwirq].irq_line;
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
                 & SOCRATES_FPGA_IRQ_MASK;
         mask |= (1 << (hwirq + 16));
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
 }
 
 static int socrates_fpga_pic_set_type(unsigned int virq,
@@ -220,14 +220,14 @@ static int socrates_fpga_pic_set_type(unsigned int virq,
         default:
                 return -EINVAL;
         }
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         mask = socrates_fpga_pic_read(FPGA_PIC_IRQCFG);
         if (polarity)
                 mask |= (1 << hwirq);
         else
                 mask &= ~(1 << hwirq);
         socrates_fpga_pic_write(FPGA_PIC_IRQCFG, mask);
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
         return 0;
 }
 
@@ -314,14 +314,14 @@ void socrates_fpga_pic_init(struct device_node *pic)
 
         socrates_fpga_pic_iobase = of_iomap(pic, 0);
 
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(0),
                         SOCRATES_FPGA_IRQ_MASK << 16);
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(1),
                         SOCRATES_FPGA_IRQ_MASK << 16);
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(2),
                         SOCRATES_FPGA_IRQ_MASK << 16);
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
 
         pr_info("FPGA PIC: Setting up Socrates FPGA PIC\n");
 }
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index 2bbfd530d6d..a0b5638c5dc 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -13,7 +13,7 @@ config MPC8641_HPCN
         bool "Freescale MPC8641 HPCN"
         select PPC_I8259
         select DEFAULT_UIMAGE
-        select FSL_ULI1575
+        select FSL_ULI1575 if PCI
         select HAS_RAPIDIO
         select SWIOTLB
         help
@@ -28,37 +28,37 @@ config SBC8641D
 config MPC8610_HPCD
         bool "Freescale MPC8610 HPCD"
         select DEFAULT_UIMAGE
-        select FSL_ULI1575
+        select FSL_ULI1575 if PCI
         help
           This option enables support for the MPC8610 HPCD board.
 
 config GEF_PPC9A
-        bool "GE Fanuc PPC9A"
+        bool "GE PPC9A"
         select DEFAULT_UIMAGE
         select MMIO_NVRAM
         select GENERIC_GPIO
         select ARCH_REQUIRE_GPIOLIB
         help
-          This option enables support for GE Fanuc's PPC9A.
+          This option enables support for the GE PPC9A.
 
 config GEF_SBC310
-        bool "GE Fanuc SBC310"
+        bool "GE SBC310"
         select DEFAULT_UIMAGE
         select MMIO_NVRAM
         select GENERIC_GPIO
         select ARCH_REQUIRE_GPIOLIB
         help
-          This option enables support for GE Fanuc's SBC310.
+          This option enables support for the GE SBC310.
 
 config GEF_SBC610
-        bool "GE Fanuc SBC610"
+        bool "GE SBC610"
         select DEFAULT_UIMAGE
         select MMIO_NVRAM
         select GENERIC_GPIO
         select ARCH_REQUIRE_GPIOLIB
         select HAS_RAPIDIO
         help
-          This option enables support for GE Fanuc's SBC610.
+          This option enables support for the GE SBC610.
 
 endif
 
diff --git a/arch/powerpc/platforms/86xx/gef_gpio.c b/arch/powerpc/platforms/86xx/gef_gpio.c
index b2ea8875adb..b8cb08dbd89 100644
--- a/arch/powerpc/platforms/86xx/gef_gpio.c
+++ b/arch/powerpc/platforms/86xx/gef_gpio.c
@@ -1,9 +1,9 @@
 /*
- * Driver for GE Fanuc's FPGA based GPIO pins
+ * Driver for GE FPGA based GPIO
  *
- * Author: Martyn Welch <martyn.welch@gefanuc.com>
+ * Author: Martyn Welch <martyn.welch@ge.com>
  *
- * 2008 (c) GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ * 2008 (c) GE Intelligent Platforms Embedded Systems, Inc.
  *
  * This file is licensed under the terms of the GNU General Public License
  * version 2.  This program is licensed "as is" without any warranty of any
@@ -26,6 +26,7 @@
 #include <linux/of_platform.h>
 #include <linux/of_gpio.h>
 #include <linux/gpio.h>
+#include <linux/slab.h>
 
 #define GEF_GPIO_DIRECT         0x00
 #define GEF_GPIO_IN             0x04
@@ -164,6 +165,6 @@ static int __init gef_gpio_init(void)
 };
 arch_initcall(gef_gpio_init);
 
-MODULE_DESCRIPTION("GE Fanuc I/O FPGA GPIO driver");
-MODULE_AUTHOR("Martyn Welch <martyn.welch@gefanuc.com");
+MODULE_DESCRIPTION("GE I/O FPGA GPIO driver");
+MODULE_AUTHOR("Martyn Welch <martyn.welch@ge.com");
 MODULE_LICENSE("GPL");
diff --git a/arch/powerpc/platforms/86xx/gef_pic.c b/arch/powerpc/platforms/86xx/gef_pic.c
index 0110a8736d3..6df9e2561c0 100644
--- a/arch/powerpc/platforms/86xx/gef_pic.c
+++ b/arch/powerpc/platforms/86xx/gef_pic.c
@@ -1,9 +1,9 @@
 /*
- * Interrupt handling for GE Fanuc's FPGA based PIC
+ * Interrupt handling for GE FPGA based PIC
  *
- * Author: Martyn Welch <martyn.welch@gefanuc.com>
+ * Author: Martyn Welch <martyn.welch@ge.com>
  *
- * 2008 (c) GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ * 2008 (c) GE Intelligent Platforms Embedded Systems, Inc.
  *
  * This file is licensed under the terms of the GNU General Public License
  * version 2.  This program is licensed "as is" without any warranty of any
@@ -49,7 +49,7 @@
 #define gef_irq_to_hw(virq)    ((unsigned int)irq_map[virq].hwirq)
 
 
-static DEFINE_SPINLOCK(gef_pic_lock);
+static DEFINE_RAW_SPINLOCK(gef_pic_lock);
 
 static void __iomem *gef_pic_irq_reg_base;
 static struct irq_host *gef_pic_irq_host;
@@ -118,11 +118,11 @@ static void gef_pic_mask(unsigned int virq)
 
         hwirq = gef_irq_to_hw(virq);
 
-        spin_lock_irqsave(&gef_pic_lock, flags);
+        raw_spin_lock_irqsave(&gef_pic_lock, flags);
         mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0));
         mask &= ~(1 << hwirq);
         out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask);
-        spin_unlock_irqrestore(&gef_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&gef_pic_lock, flags);
 }
 
 static void gef_pic_mask_ack(unsigned int virq)
@@ -141,11 +141,11 @@ static void gef_pic_unmask(unsigned int virq)
 
         hwirq = gef_irq_to_hw(virq);
 
-        spin_lock_irqsave(&gef_pic_lock, flags);
+        raw_spin_lock_irqsave(&gef_pic_lock, flags);
         mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0));
         mask |= (1 << hwirq);
         out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask);
-        spin_unlock_irqrestore(&gef_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&gef_pic_lock, flags);
 }
 
 static struct irq_chip gef_pic_chip = {
@@ -199,7 +199,7 @@ void __init gef_pic_init(struct device_node *np)
         /* Map the devices registers into memory */
         gef_pic_irq_reg_base = of_iomap(np, 0);
 
-        spin_lock_irqsave(&gef_pic_lock, flags);
+        raw_spin_lock_irqsave(&gef_pic_lock, flags);
 
         /* Initialise everything as masked. */
         out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_INTR_MASK, 0);
@@ -208,7 +208,7 @@ void __init gef_pic_init(struct device_node *np)
         out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_MCP_MASK, 0);
         out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU1_MCP_MASK, 0);
 
-        spin_unlock_irqrestore(&gef_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&gef_pic_lock, flags);
 
         /* Map controller */
         gef_pic_cascade_irq = irq_of_parse_and_map(np, 0);
diff --git a/arch/powerpc/platforms/86xx/gef_ppc9a.c b/arch/powerpc/platforms/86xx/gef_ppc9a.c
index a792e5d8581..60ce07e3910 100644
--- a/arch/powerpc/platforms/86xx/gef_ppc9a.c
+++ b/arch/powerpc/platforms/86xx/gef_ppc9a.c
@@ -1,9 +1,9 @@
 /*
- * GE Fanuc PPC9A board support
+ * GE PPC9A board support
  *
- * Author: Martyn Welch <martyn.welch@gefanuc.com>
+ * Author: Martyn Welch <martyn.welch@ge.com>
  *
- * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -82,7 +82,7 @@ static void __init gef_ppc9a_setup_arch(void)
         }
 #endif
 
-        printk(KERN_INFO "GE Fanuc Intelligent Platforms PPC9A 6U VME SBC\n");
+        printk(KERN_INFO "GE Intelligent Platforms PPC9A 6U VME SBC\n");
 
 #ifdef CONFIG_SMP
         mpc86xx_smp_init();
@@ -151,7 +151,7 @@ static void gef_ppc9a_show_cpuinfo(struct seq_file *m)
 {
         uint svid = mfspr(SPRN_SVR);
 
-        seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n");
+        seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");
 
         seq_printf(m, "Revision\t: %u%c\n", gef_ppc9a_get_pcb_rev(),
                 ('A' + gef_ppc9a_get_board_rev()));
@@ -235,7 +235,7 @@ static int __init declare_of_platform_devices(void)
 machine_device_initcall(gef_ppc9a, declare_of_platform_devices);
 
 define_machine(gef_ppc9a) {
-        .name                   = "GE Fanuc PPC9A",
+        .name                   = "GE PPC9A",
         .probe                  = gef_ppc9a_probe,
         .setup_arch             = gef_ppc9a_setup_arch,
         .init_IRQ               = gef_ppc9a_init_irq,
diff --git a/arch/powerpc/platforms/86xx/gef_sbc310.c b/arch/powerpc/platforms/86xx/gef_sbc310.c
index 6a1a613836c..3ecee25bf3e 100644
--- a/arch/powerpc/platforms/86xx/gef_sbc310.c
+++ b/arch/powerpc/platforms/86xx/gef_sbc310.c
@@ -1,9 +1,9 @@
 /*
- * GE Fanuc SBC310 board support
+ * GE SBC310 board support
  *
- * Author: Martyn Welch <martyn.welch@gefanuc.com>
+ * Author: Martyn Welch <martyn.welch@ge.com>
  *
- * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -82,7 +82,7 @@ static void __init gef_sbc310_setup_arch(void)
         }
 #endif
 
-        printk(KERN_INFO "GE Fanuc Intelligent Platforms SBC310 6U VPX SBC\n");
+        printk(KERN_INFO "GE Intelligent Platforms SBC310 6U VPX SBC\n");
 
 #ifdef CONFIG_SMP
         mpc86xx_smp_init();
@@ -142,7 +142,7 @@ static void gef_sbc310_show_cpuinfo(struct seq_file *m)
 {
         uint svid = mfspr(SPRN_SVR);
 
-        seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n");
+        seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");
 
         seq_printf(m, "Board ID\t: 0x%2.2x\n", gef_sbc310_get_board_id());
         seq_printf(m, "Revision\t: %u%c\n", gef_sbc310_get_pcb_rev(),
@@ -223,7 +223,7 @@ static int __init declare_of_platform_devices(void)
 machine_device_initcall(gef_sbc310, declare_of_platform_devices);
 
 define_machine(gef_sbc310) {
-        .name                   = "GE Fanuc SBC310",
+        .name                   = "GE SBC310",
         .probe                  = gef_sbc310_probe,
         .setup_arch             = gef_sbc310_setup_arch,
         .init_IRQ               = gef_sbc310_init_irq,
diff --git a/arch/powerpc/platforms/86xx/gef_sbc610.c b/arch/powerpc/platforms/86xx/gef_sbc610.c
index e10688a0fc4..5090d608d9e 100644
--- a/arch/powerpc/platforms/86xx/gef_sbc610.c
+++ b/arch/powerpc/platforms/86xx/gef_sbc610.c
@@ -1,9 +1,9 @@
 /*
- * GE Fanuc SBC610 board support
+ * GE SBC610 board support
  *
- * Author: Martyn Welch <martyn.welch@gefanuc.com>
+ * Author: Martyn Welch <martyn.welch@ge.com>
  *
- * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -82,7 +82,7 @@ static void __init gef_sbc610_setup_arch(void)
         }
 #endif
 
-        printk(KERN_INFO "GE Fanuc Intelligent Platforms SBC610 6U VPX SBC\n");
+        printk(KERN_INFO "GE Intelligent Platforms SBC610 6U VPX SBC\n");
 
 #ifdef CONFIG_SMP
         mpc86xx_smp_init();
@@ -133,7 +133,7 @@ static void gef_sbc610_show_cpuinfo(struct seq_file *m)
 {
         uint svid = mfspr(SPRN_SVR);
 
-        seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n");
+        seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");
 
         seq_printf(m, "Revision\t: %u%c\n", gef_sbc610_get_pcb_rev(),
                 ('A' + gef_sbc610_get_board_rev() - 1));
@@ -212,7 +212,7 @@ static int __init declare_of_platform_devices(void)
 machine_device_initcall(gef_sbc610, declare_of_platform_devices);
 
 define_machine(gef_sbc610) {
-        .name                   = "GE Fanuc SBC610",
+        .name                   = "GE SBC610",
         .probe                  = gef_sbc610_probe,
         .setup_arch             = gef_sbc610_setup_arch,
         .init_IRQ               = gef_sbc610_init_irq,
diff --git a/arch/powerpc/platforms/8xx/m8xx_setup.c b/arch/powerpc/platforms/8xx/m8xx_setup.c
index 242954c4293..60168c1f98f 100644
--- a/arch/powerpc/platforms/8xx/m8xx_setup.c
+++ b/arch/powerpc/platforms/8xx/m8xx_setup.c
@@ -11,7 +11,6 @@
  */
 
 #include <linux/kernel.h>
-#include <linux/slab.h>
 #include <linux/interrupt.h>
 #include <linux/init.h>
 #include <linux/time.h>
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index fa0f690d386..a8aae0b5457 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -144,6 +144,16 @@ config FSL_EMB_PERFMON
           and some e300 cores (c3 and c4).  Select this only if your
           core supports the Embedded Performance Monitor APU
 
+config FSL_EMB_PERF_EVENT
+        bool
+        depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
+        default y
+
+config FSL_EMB_PERF_EVENT_E500
+        bool
+        depends on FSL_EMB_PERF_EVENT && E500
+        default y
+
 config 4xx
         bool
         depends on 40x || 44x
diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c
index 96fe896f6df..8efe48192f3 100644
--- a/arch/powerpc/platforms/cell/axon_msi.c
+++ b/arch/powerpc/platforms/cell/axon_msi.c
@@ -15,6 +15,7 @@
 #include <linux/msi.h>
 #include <linux/of_platform.h>
 #include <linux/debugfs.h>
+#include <linux/slab.h>
 
 #include <asm/dcr.h>
 #include <asm/machdep.h>
diff --git a/arch/powerpc/platforms/cell/celleb_pci.c b/arch/powerpc/platforms/cell/celleb_pci.c
index 00eaaa71630..404d1fc04d5 100644
--- a/arch/powerpc/platforms/cell/celleb_pci.c
+++ b/arch/powerpc/platforms/cell/celleb_pci.c
@@ -33,6 +33,7 @@
 #include <linux/pci_regs.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
+#include <linux/slab.h>
 
 #include <asm/io.h>
 #include <asm/irq.h>
diff --git a/arch/powerpc/platforms/cell/celleb_scc_pciex.c b/arch/powerpc/platforms/cell/celleb_scc_pciex.c
index 7fca09f990b..a881bbee8de 100644
--- a/arch/powerpc/platforms/cell/celleb_scc_pciex.c
+++ b/arch/powerpc/platforms/cell/celleb_scc_pciex.c
@@ -23,6 +23,7 @@
 #include <linux/kernel.h>
 #include <linux/pci.h>
 #include <linux/string.h>
+#include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/bootmem.h>
 #include <linux/delay.h>
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index ca5bfdfe47f..e3ec4976fae 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -28,6 +28,7 @@
 #include <linux/notifier.h>
 #include <linux/of.h>
 #include <linux/of_platform.h>
+#include <linux/slab.h>
 #include <linux/lmb.h>
 
 #include <asm/prom.h>
diff --git a/arch/powerpc/platforms/cell/ras.c b/arch/powerpc/platforms/cell/ras.c
index 608fd2b584c..1d3c4effea1 100644
--- a/arch/powerpc/platforms/cell/ras.c
+++ b/arch/powerpc/platforms/cell/ras.c
@@ -11,6 +11,7 @@
 
 #include <linux/types.h>
 #include <linux/kernel.h>
+#include <linux/slab.h>
 #include <linux/smp.h>
 #include <linux/reboot.h>
 #include <linux/kexec.h>
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c
index 59305369f6b..50385db586b 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -19,7 +19,6 @@
 #include <linux/mm.h>
 #include <linux/stddef.h>
 #include <linux/unistd.h>
-#include <linux/slab.h>
 #include <linux/user.h>
 #include <linux/reboot.h>
 #include <linux/init.h>
diff --git a/arch/powerpc/platforms/cell/spider-pci.c b/arch/powerpc/platforms/cell/spider-pci.c
index 5122ec14527..ca7731c0b59 100644
--- a/arch/powerpc/platforms/cell/spider-pci.c
+++ b/arch/powerpc/platforms/cell/spider-pci.c
@@ -22,6 +22,7 @@
 
 #include <linux/kernel.h>
 #include <linux/of_platform.h>
+#include <linux/slab.h>
 #include <linux/io.h>
 
 #include <asm/ppc-pci.h>
diff --git a/arch/powerpc/platforms/cell/spu_manage.c b/arch/powerpc/platforms/cell/spu_manage.c
index 891f18e337a..f465d474ad9 100644
--- a/arch/powerpc/platforms/cell/spu_manage.c
+++ b/arch/powerpc/platforms/cell/spu_manage.c
@@ -23,7 +23,6 @@
 #include <linux/list.h>
 #include <linux/module.h>
 #include <linux/ptrace.h>
-#include <linux/slab.h>
 #include <linux/wait.h>
 #include <linux/mm.h>
 #include <linux/io.h>
diff --git a/arch/powerpc/platforms/cell/spu_priv1_mmio.c b/arch/powerpc/platforms/cell/spu_priv1_mmio.c
index 1410443731e..121aec353f2 100644
--- a/arch/powerpc/platforms/cell/spu_priv1_mmio.c
+++ b/arch/powerpc/platforms/cell/spu_priv1_mmio.c
@@ -22,7 +22,6 @@
 #include <linux/list.h>
 #include <linux/module.h>
 #include <linux/ptrace.h>
-#include <linux/slab.h>
 #include <linux/wait.h>
 #include <linux/mm.h>
 #include <linux/io.h>
diff --git a/arch/powerpc/platforms/cell/spufs/coredump.c b/arch/powerpc/platforms/cell/spufs/coredump.c
index eea120229cd..6cf3ec62852 100644
--- a/arch/powerpc/platforms/cell/spufs/coredump.c
+++ b/arch/powerpc/platforms/cell/spufs/coredump.c
@@ -24,6 +24,7 @@
 #include <linux/file.h>
 #include <linux/fdtable.h>
 #include <linux/fs.h>
+#include <linux/gfp.h>
 #include <linux/list.h>
 #include <linux/module.h>
 #include <linux/syscalls.h>
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c
index 64a4c2d85f7..5c280825251 100644
--- a/arch/powerpc/platforms/cell/spufs/file.c
+++ b/arch/powerpc/platforms/cell/spufs/file.c
@@ -29,6 +29,7 @@
 #include <linux/poll.h>
 #include <linux/ptrace.h>
 #include <linux/seq_file.h>
+#include <linux/slab.h>
 
 #include <asm/io.h>
 #include <asm/time.h>
diff --git a/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c b/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c
index 0e9f325c9ff..a101abf1750 100644
--- a/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c
+++ b/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c
@@ -22,6 +22,7 @@
 
 #include <linux/kernel.h>
 #include <linux/mm.h>
+#include <linux/slab.h>
 #include <linux/vmalloc.h>
 
 #include <asm/spu.h>
diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c
index 4678078fede..0b046628493 100644
--- a/arch/powerpc/platforms/cell/spufs/sched.c
+++ b/arch/powerpc/platforms/cell/spufs/sched.c
@@ -27,6 +27,7 @@
 #include <linux/sched.h>
 #include <linux/kernel.h>
 #include <linux/mm.h>
+#include <linux/slab.h>
 #include <linux/completion.h>
 #include <linux/vmalloc.h>
 #include <linux/smp.h>
diff --git a/arch/powerpc/platforms/cell/spufs/syscalls.c b/arch/powerpc/platforms/cell/spufs/syscalls.c
index c23617c6baf..187a7d32f86 100644
--- a/arch/powerpc/platforms/cell/spufs/syscalls.c
+++ b/arch/powerpc/platforms/cell/spufs/syscalls.c
@@ -3,6 +3,7 @@
 #include <linux/module.h>
 #include <linux/mount.h>
 #include <linux/namei.h>
+#include <linux/slab.h>
 
 #include <asm/uaccess.h>
 
diff --git a/arch/powerpc/platforms/chrp/nvram.c b/arch/powerpc/platforms/chrp/nvram.c
index 8efd4244701..ba3588f2d8e 100644
--- a/arch/powerpc/platforms/chrp/nvram.c
+++ b/arch/powerpc/platforms/chrp/nvram.c
@@ -12,7 +12,6 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/slab.h>
 #include <linux/spinlock.h>
 #include <asm/uaccess.h>
 #include <asm/prom.h>
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
index 8f41685d8f4..8553cc49e0d 100644
--- a/arch/powerpc/platforms/chrp/setup.c
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -15,7 +15,6 @@
 #include <linux/stddef.h>
 #include <linux/unistd.h>
 #include <linux/ptrace.h>
-#include <linux/slab.h>
 #include <linux/user.h>
 #include <linux/tty.h>
 #include <linux/major.h>
diff --git a/arch/powerpc/platforms/iseries/exception.S b/arch/powerpc/platforms/iseries/exception.S
index 5369653dcf6..fba5bf91507 100644
--- a/arch/powerpc/platforms/iseries/exception.S
+++ b/arch/powerpc/platforms/iseries/exception.S
@@ -43,17 +43,14 @@ system_reset_iSeries:
         LOAD_REG_ADDR(r23, alpaca)
         li      r0,ALPACA_SIZE
         sub     r23,r13,r23
-        divdu   r23,r23,r0              /* r23 has cpu number */
-        LOAD_REG_ADDR(r13, paca)
-        mulli   r0,r23,PACA_SIZE
-        add     r13,r13,r0
-        mtspr   SPRN_SPRG_PACA,r13      /* Save it away for the future */
-        mfmsr   r24
-        ori     r24,r24,MSR_RI
-        mtmsrd  r24                     /* RI on */
-        mr      r24,r23
+        divdu   r24,r23,r0              /* r24 has cpu number */
         cmpwi   0,r24,0                 /* Are we processor 0? */
         bne     1f
+        LOAD_REG_ADDR(r13, boot_paca)
+        mtspr   SPRN_SPRG_PACA,r13      /* Save it away for the future */
+        mfmsr   r23
+        ori     r23,r23,MSR_RI
+        mtmsrd  r23                     /* RI on */
         b       .__start_initialization_iSeries /* Start up the first processor */
 1:      mfspr   r4,SPRN_CTRLF
         li      r5,CTRL_RUNLATCH        /* Turn off the run light */
@@ -86,6 +83,16 @@ system_reset_iSeries:
 #endif
 
 2:
+        /* Load our paca now that it's been allocated */
+        LOAD_REG_ADDR(r13, paca)
+        ld      r13,0(r13)
+        mulli   r0,r24,PACA_SIZE
+        add     r13,r13,r0
+        mtspr   SPRN_SPRG_PACA,r13      /* Save it away for the future */
+        mfmsr   r23
+        ori     r23,r23,MSR_RI
+        mtmsrd  r23                     /* RI on */
+
         HMT_LOW
 #ifdef CONFIG_SMP
         lbz     r23,PACAPROCSTART(r13)  /* Test if this processor
diff --git a/arch/powerpc/platforms/iseries/iommu.c b/arch/powerpc/platforms/iseries/iommu.c
index 9d53cb481a7..ce61cea0afb 100644
--- a/arch/powerpc/platforms/iseries/iommu.c
+++ b/arch/powerpc/platforms/iseries/iommu.c
@@ -29,6 +29,7 @@
 #include <linux/list.h>
 #include <linux/pci.h>
 #include <linux/module.h>
+#include <linux/slab.h>
 
 #include <asm/iommu.h>
 #include <asm/vio.h>
diff --git a/arch/powerpc/platforms/iseries/mf.c b/arch/powerpc/platforms/iseries/mf.c
index 6617915bcb1..d2c1d497846 100644
--- a/arch/powerpc/platforms/iseries/mf.c
+++ b/arch/powerpc/platforms/iseries/mf.c
@@ -33,6 +33,7 @@
 #include <linux/dma-mapping.h>
 #include <linux/bcd.h>
 #include <linux/rtc.h>
+#include <linux/slab.h>
 
 #include <asm/time.h>
 #include <asm/uaccess.h>
diff --git a/arch/powerpc/platforms/iseries/pci.c b/arch/powerpc/platforms/iseries/pci.c
index 175aac8ca7e..b841c9a9db8 100644
--- a/arch/powerpc/platforms/iseries/pci.c
+++ b/arch/powerpc/platforms/iseries/pci.c
@@ -27,6 +27,7 @@
 #include <linux/kernel.h>
 #include <linux/list.h>
 #include <linux/string.h>
+#include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/pci.h>
diff --git a/arch/powerpc/platforms/iseries/vio.c b/arch/powerpc/platforms/iseries/vio.c
index 2aa8b5631be..00b6730bc48 100644
--- a/arch/powerpc/platforms/iseries/vio.c
+++ b/arch/powerpc/platforms/iseries/vio.c
@@ -22,7 +22,7 @@
  */
 #include <linux/of.h>
 #include <linux/init.h>
-#include <linux/gfp.h>
+#include <linux/slab.h>
 #include <linux/completion.h>
 #include <linux/proc_fs.h>
 #include <linux/module.h>
diff --git a/arch/powerpc/platforms/iseries/viopath.c b/arch/powerpc/platforms/iseries/viopath.c
index 5aea94f3083..b5f05d943a9 100644
--- a/arch/powerpc/platforms/iseries/viopath.c
+++ b/arch/powerpc/platforms/iseries/viopath.c
@@ -29,6 +29,7 @@
  */
 #include <linux/module.h>
 #include <linux/kernel.h>
+#include <linux/slab.h>
 #include <linux/errno.h>
 #include <linux/vmalloc.h>
 #include <linux/string.h>
diff --git a/arch/powerpc/platforms/maple/setup.c b/arch/powerpc/platforms/maple/setup.c
index 0636a3df697..39df70529d2 100644
--- a/arch/powerpc/platforms/maple/setup.c
+++ b/arch/powerpc/platforms/maple/setup.c
@@ -21,7 +21,6 @@
 #include <linux/stddef.h>
 #include <linux/unistd.h>
 #include <linux/ptrace.h>
-#include <linux/slab.h>
 #include <linux/user.h>
 #include <linux/tty.h>
 #include <linux/string.h>
diff --git a/arch/powerpc/platforms/pasemi/dma_lib.c b/arch/powerpc/platforms/pasemi/dma_lib.c
index a6152d92224..09695ae50f9 100644
--- a/arch/powerpc/platforms/pasemi/dma_lib.c
+++ b/arch/powerpc/platforms/pasemi/dma_lib.c
@@ -21,6 +21,7 @@
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/pci.h>
+#include <linux/slab.h>
 #include <linux/of.h>
 
 #include <asm/pasemi_dma.h>
diff --git a/arch/powerpc/platforms/pasemi/gpio_mdio.c b/arch/powerpc/platforms/pasemi/gpio_mdio.c
index 3bf546797cb..0f881f64583 100644
--- a/arch/powerpc/platforms/pasemi/gpio_mdio.c
+++ b/arch/powerpc/platforms/pasemi/gpio_mdio.c
@@ -24,6 +24,7 @@
 #include <linux/io.h>
 #include <linux/module.h>
 #include <linux/types.h>
+#include <linux/slab.h>
 #include <linux/sched.h>
 #include <linux/errno.h>
 #include <linux/ioport.h>
diff --git a/arch/powerpc/platforms/pasemi/setup.c b/arch/powerpc/platforms/pasemi/setup.c
index 242f8095c2d..ac6fdd97329 100644
--- a/arch/powerpc/platforms/pasemi/setup.c
+++ b/arch/powerpc/platforms/pasemi/setup.c
@@ -28,6 +28,7 @@
 #include <linux/console.h>
 #include <linux/pci.h>
 #include <linux/of_platform.h>
+#include <linux/gfp.h>
 
 #include <asm/prom.h>
 #include <asm/system.h>
diff --git a/arch/powerpc/platforms/powermac/cpufreq_32.c b/arch/powerpc/platforms/powermac/cpufreq_32.c
index d4f127d1814..1e9eba175ff 100644
--- a/arch/powerpc/platforms/powermac/cpufreq_32.c
+++ b/arch/powerpc/platforms/powermac/cpufreq_32.c
@@ -21,7 +21,6 @@
 #include <linux/sched.h>
 #include <linux/adb.h>
 #include <linux/pmu.h>
-#include <linux/slab.h>
 #include <linux/cpufreq.h>
 #include <linux/init.h>
 #include <linux/sysdev.h>
diff --git a/arch/powerpc/platforms/powermac/cpufreq_64.c b/arch/powerpc/platforms/powermac/cpufreq_64.c
index 3ed288e68ec..3ca09d3ccce 100644
--- a/arch/powerpc/platforms/powermac/cpufreq_64.c
+++ b/arch/powerpc/platforms/powermac/cpufreq_64.c
@@ -18,7 +18,6 @@
 #include <linux/kernel.h>
 #include <linux/delay.h>
 #include <linux/sched.h>
-#include <linux/slab.h>
 #include <linux/cpufreq.h>
 #include <linux/init.h>
 #include <linux/completion.h>
diff --git a/arch/powerpc/platforms/powermac/low_i2c.c b/arch/powerpc/platforms/powermac/low_i2c.c
index 345e2da5676..f45331ab97c 100644
--- a/arch/powerpc/platforms/powermac/low_i2c.c
+++ b/arch/powerpc/platforms/powermac/low_i2c.c
@@ -43,6 +43,7 @@
 #include <linux/timer.h>
 #include <linux/mutex.h>
 #include <linux/i2c.h>
+#include <linux/slab.h>
 #include <asm/keylargo.h>
 #include <asm/uninorth.h>
 #include <asm/io.h>
diff --git a/arch/powerpc/platforms/powermac/nvram.c b/arch/powerpc/platforms/powermac/nvram.c
index 80a5258d036..b1cdcf94aa8 100644
--- a/arch/powerpc/platforms/powermac/nvram.c
+++ b/arch/powerpc/platforms/powermac/nvram.c
@@ -14,7 +14,6 @@
 #include <linux/string.h>
 #include <linux/nvram.h>
 #include <linux/init.h>
-#include <linux/slab.h>
 #include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/adb.h>
diff --git a/arch/powerpc/platforms/powermac/pfunc_core.c b/arch/powerpc/platforms/powermac/pfunc_core.c
index ede49e78a8d..cec63594265 100644
--- a/arch/powerpc/platforms/powermac/pfunc_core.c
+++ b/arch/powerpc/platforms/powermac/pfunc_core.c
@@ -9,6 +9,7 @@
 #include <linux/delay.h>
 #include <linux/kernel.h>
 #include <linux/spinlock.h>
+#include <linux/slab.h>
 #include <linux/module.h>
 #include <linux/mutex.h>
 
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c
index c2052265636..15c2241f9c7 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -31,7 +31,6 @@
 #include <linux/stddef.h>
 #include <linux/unistd.h>
 #include <linux/ptrace.h>
-#include <linux/slab.h>
 #include <linux/user.h>
 #include <linux/tty.h>
 #include <linux/string.h>
diff --git a/arch/powerpc/platforms/ps3/device-init.c b/arch/powerpc/platforms/ps3/device-init.c
index bb028f165fb..b341018326d 100644
--- a/arch/powerpc/platforms/ps3/device-init.c
+++ b/arch/powerpc/platforms/ps3/device-init.c
@@ -23,6 +23,7 @@
 #include <linux/kernel.h>
 #include <linux/kthread.h>
 #include <linux/init.h>
+#include <linux/slab.h>
 #include <linux/reboot.h>
 
 #include <asm/firmware.h>
diff --git a/arch/powerpc/platforms/ps3/mm.c b/arch/powerpc/platforms/ps3/mm.c
index e81b028a2a4..7925751e464 100644
--- a/arch/powerpc/platforms/ps3/mm.c
+++ b/arch/powerpc/platforms/ps3/mm.c
@@ -22,6 +22,7 @@
 #include <linux/module.h>
 #include <linux/memory_hotplug.h>
 #include <linux/lmb.h>
+#include <linux/slab.h>
 
 #include <asm/cell-regs.h>
 #include <asm/firmware.h>
diff --git a/arch/powerpc/platforms/ps3/os-area.c b/arch/powerpc/platforms/ps3/os-area.c
index d6487a9c801..dd521a181f2 100644
--- a/arch/powerpc/platforms/ps3/os-area.c
+++ b/arch/powerpc/platforms/ps3/os-area.c
@@ -26,6 +26,7 @@
 #include <linux/ctype.h>
 #include <linux/lmb.h>
 #include <linux/of.h>
+#include <linux/slab.h>
 
 #include <asm/prom.h>
 
diff --git a/arch/powerpc/platforms/ps3/spu.c b/arch/powerpc/platforms/ps3/spu.c
index b3c6a993f9f..39a472e9e80 100644
--- a/arch/powerpc/platforms/ps3/spu.c
+++ b/arch/powerpc/platforms/ps3/spu.c
@@ -20,6 +20,7 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/slab.h>
 #include <linux/mmzone.h>
 #include <linux/io.h>
 #include <linux/mm.h>
diff --git a/arch/powerpc/platforms/ps3/system-bus.c b/arch/powerpc/platforms/ps3/system-bus.c
index e34b305a7a5..6d09f5e3e7e 100644
--- a/arch/powerpc/platforms/ps3/system-bus.c
+++ b/arch/powerpc/platforms/ps3/system-bus.c
@@ -23,6 +23,7 @@
 #include <linux/module.h>
 #include <linux/dma-mapping.h>
 #include <linux/err.h>
+#include <linux/slab.h>
 
 #include <asm/udbg.h>
 #include <asm/lv1call.h>
diff --git a/arch/powerpc/platforms/pseries/cmm.c b/arch/powerpc/platforms/pseries/cmm.c
index a277f2e28db..f4803868642 100644
--- a/arch/powerpc/platforms/pseries/cmm.c
+++ b/arch/powerpc/platforms/pseries/cmm.c
@@ -24,6 +24,7 @@
 #include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/fs.h>
+#include <linux/gfp.h>
 #include <linux/init.h>
 #include <linux/kthread.h>
 #include <linux/module.h>
diff --git a/arch/powerpc/platforms/pseries/dlpar.c b/arch/powerpc/platforms/pseries/dlpar.c
index 37bce52526d..e1682bc168a 100644
--- a/arch/powerpc/platforms/pseries/dlpar.c
+++ b/arch/powerpc/platforms/pseries/dlpar.c
@@ -16,6 +16,7 @@
 #include <linux/proc_fs.h>
 #include <linux/spinlock.h>
 #include <linux/cpu.h>
+#include <linux/slab.h>
 #include "offline_states.h"
 
 #include <asm/prom.h>
diff --git a/arch/powerpc/platforms/pseries/dtl.c b/arch/powerpc/platforms/pseries/dtl.c
index c5f3116b6ca..a00addb5594 100644
--- a/arch/powerpc/platforms/pseries/dtl.c
+++ b/arch/powerpc/platforms/pseries/dtl.c
@@ -21,6 +21,7 @@
  */
 
 #include <linux/init.h>
+#include <linux/slab.h>
 #include <linux/debugfs.h>
 #include <asm/smp.h>
 #include <asm/system.h>
diff --git a/arch/powerpc/platforms/pseries/eeh_cache.c b/arch/powerpc/platforms/pseries/eeh_cache.c
index ce37040af87..30b987b73c2 100644
--- a/arch/powerpc/platforms/pseries/eeh_cache.c
+++ b/arch/powerpc/platforms/pseries/eeh_cache.c
@@ -23,6 +23,7 @@
 #include <linux/list.h>
 #include <linux/pci.h>
 #include <linux/rbtree.h>
+#include <linux/slab.h>
 #include <linux/spinlock.h>
 #include <asm/atomic.h>
 #include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/pseries/eeh_event.c b/arch/powerpc/platforms/pseries/eeh_event.c
index ec5df8f519c..2ec500c130b 100644
--- a/arch/powerpc/platforms/pseries/eeh_event.c
+++ b/arch/powerpc/platforms/pseries/eeh_event.c
@@ -22,6 +22,7 @@
 #include <linux/list.h>
 #include <linux/mutex.h>
 #include <linux/pci.h>
+#include <linux/slab.h>
 #include <linux/workqueue.h>
 #include <asm/eeh_event.h>
 #include <asm/ppc-pci.h>
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index d1b124e44d7..a8e1d5d17a2 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -122,44 +122,32 @@ static void pseries_mach_cpu_die(void)
                 if (!get_lppaca()->shared_proc)
                         get_lppaca()->donate_dedicated_cpu = 1;
 
-                printk(KERN_INFO
-                        "cpu %u (hwid %u) ceding for offline with hint %d\n",
-                        cpu, hwcpu, cede_latency_hint);
                 while (get_preferred_offline_state(cpu) == CPU_STATE_INACTIVE) {
                         extended_cede_processor(cede_latency_hint);
-                        printk(KERN_INFO "cpu %u (hwid %u) returned from cede.\n",
-                                cpu, hwcpu);
-                        printk(KERN_INFO
-                        "Decrementer value = %x Timebase value = %llx\n",
-                        get_dec(), get_tb());
                 }
 
-                printk(KERN_INFO "cpu %u (hwid %u) got prodded to go online\n",
-                        cpu, hwcpu);
-
                 if (!get_lppaca()->shared_proc)
                         get_lppaca()->donate_dedicated_cpu = 0;
                 get_lppaca()->idle = 0;
-        }
 
-        if (get_preferred_offline_state(cpu) == CPU_STATE_ONLINE) {
-                unregister_slb_shadow(hwcpu, __pa(get_slb_shadow()));
+                if (get_preferred_offline_state(cpu) == CPU_STATE_ONLINE) {
+                        unregister_slb_shadow(hwcpu, __pa(get_slb_shadow()));
 
-                /*
-                 * NOTE: Calling start_secondary() here for now to
-                 * start new context.
-                 * However, need to do it cleanly by resetting the
-                 * stack pointer.
-                 */
-                start_secondary();
+                        /*
+                         * Call to start_secondary_resume() will not return.
+                         * Kernel stack will be reset and start_secondary()
+                         * will be called to continue the online operation.
+                         */
+                        start_secondary_resume();
+                }
+        }
 
-        } else if (get_preferred_offline_state(cpu) == CPU_STATE_OFFLINE) {
+        /* Requested state is CPU_STATE_OFFLINE at this point */
+        WARN_ON(get_preferred_offline_state(cpu) != CPU_STATE_OFFLINE);
 
-                set_cpu_current_state(cpu, CPU_STATE_OFFLINE);
-                unregister_slb_shadow(hard_smp_processor_id(),
-                                        __pa(get_slb_shadow()));
-                rtas_stop_self();
-        }
+        set_cpu_current_state(cpu, CPU_STATE_OFFLINE);
+        unregister_slb_shadow(hwcpu, __pa(get_slb_shadow()));
+        rtas_stop_self();
 
         /* Should never get here... */
         BUG();
diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c b/arch/powerpc/platforms/pseries/hotplug-memory.c
index 9b21ee68ea5..01e7b5bb3c1 100644
--- a/arch/powerpc/platforms/pseries/hotplug-memory.c
+++ b/arch/powerpc/platforms/pseries/hotplug-memory.c
@@ -11,6 +11,7 @@
 
 #include <linux/of.h>
 #include <linux/lmb.h>
+#include <linux/vmalloc.h>
 #include <asm/firmware.h>
 #include <asm/machdep.h>
 #include <asm/pSeries_reconfig.h>
@@ -54,6 +55,12 @@ static int pseries_remove_lmb(unsigned long base, unsigned int lmb_size)
          */
         start = (unsigned long)__va(base);
         ret = remove_section_mapping(start, start + lmb_size);
+
+        /* Ensure all vmalloc mappings are flushed in case they also
+         * hit that section of memory
+         */
+        vm_unmap_aliases();
+
         return ret;
 }
 
diff --git a/arch/powerpc/platforms/pseries/nvram.c b/arch/powerpc/platforms/pseries/nvram.c
index 42f7e384e6c..bc3c7f2abd7 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -15,7 +15,6 @@
 #include <linux/types.h>
 #include <linux/errno.h>
 #include <linux/init.h>
-#include <linux/slab.h>
 #include <linux/spinlock.h>
 #include <asm/uaccess.h>
 #include <asm/nvram.h>
diff --git a/arch/powerpc/platforms/pseries/offline_states.h b/arch/powerpc/platforms/pseries/offline_states.h
index 22574e0d9d9..75a6f480d93 100644
--- a/arch/powerpc/platforms/pseries/offline_states.h
+++ b/arch/powerpc/platforms/pseries/offline_states.h
@@ -9,10 +9,31 @@ enum cpu_state_vals {
         CPU_MAX_OFFLINE_STATES
 };
 
+#ifdef CONFIG_HOTPLUG_CPU
 extern enum cpu_state_vals get_cpu_current_state(int cpu);
 extern void set_cpu_current_state(int cpu, enum cpu_state_vals state);
-extern enum cpu_state_vals get_preferred_offline_state(int cpu);
 extern void set_preferred_offline_state(int cpu, enum cpu_state_vals state);
 extern void set_default_offline_state(int cpu);
+#else
+static inline enum cpu_state_vals get_cpu_current_state(int cpu)
+{
+        return CPU_STATE_ONLINE;
+}
+
+static inline void set_cpu_current_state(int cpu, enum cpu_state_vals state)
+{
+}
+
+static inline void set_preferred_offline_state(int cpu, enum cpu_state_vals state)
+{
+}
+
+static inline void set_default_offline_state(int cpu)
+{
+}
+#endif
+
+extern enum cpu_state_vals get_preferred_offline_state(int cpu);
 extern int start_secondary(void);
+extern void start_secondary_resume(void);
 #endif
diff --git a/arch/powerpc/platforms/pseries/phyp_dump.c b/arch/powerpc/platforms/pseries/phyp_dump.c
index 225a50ab14b..7ebd9e88d36 100644
--- a/arch/powerpc/platforms/pseries/phyp_dump.c
+++ b/arch/powerpc/platforms/pseries/phyp_dump.c
@@ -11,6 +11,7 @@
  *
  */
 
+#include <linux/gfp.h>
 #include <linux/init.h>
 #include <linux/kobject.h>
 #include <linux/mm.h>
diff --git a/arch/powerpc/platforms/pseries/plpar_wrappers.h b/arch/powerpc/platforms/pseries/plpar_wrappers.h
index 0603c91538a..a05f8d42785 100644
--- a/arch/powerpc/platforms/pseries/plpar_wrappers.h
+++ b/arch/powerpc/platforms/pseries/plpar_wrappers.h
@@ -259,12 +259,12 @@ static inline long plpar_ipi(unsigned long servernum, unsigned long mfrr)
         return plpar_hcall_norets(H_IPI, servernum, mfrr);
 }
 
-static inline long plpar_xirr(unsigned long *xirr_ret)
+static inline long plpar_xirr(unsigned long *xirr_ret, unsigned char cppr)
 {
         long rc;
         unsigned long retbuf[PLPAR_HCALL_BUFSIZE];
 
-        rc = plpar_hcall(H_XIRR, retbuf);
+        rc = plpar_hcall(H_XIRR, retbuf, cppr);
 
         *xirr_ret = retbuf[0];
 
diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c
index d20b96e22c2..db940d2c39a 100644
--- a/arch/powerpc/platforms/pseries/ras.c
+++ b/arch/powerpc/platforms/pseries/ras.c
@@ -30,7 +30,6 @@
 #include <linux/interrupt.h>
 #include <linux/timex.h>
 #include <linux/init.h>
-#include <linux/slab.h>
 #include <linux/delay.h>
 #include <linux/irq.h>
 #include <linux/random.h>
diff --git a/arch/powerpc/platforms/pseries/reconfig.c b/arch/powerpc/platforms/pseries/reconfig.c
index a2305d29bbb..1a58637bcea 100644
--- a/arch/powerpc/platforms/pseries/reconfig.c
+++ b/arch/powerpc/platforms/pseries/reconfig.c
@@ -15,6 +15,7 @@
 #include <linux/kref.h>
 #include <linux/notifier.h>
 #include <linux/proc_fs.h>
+#include <linux/slab.h>
 
 #include <asm/prom.h>
 #include <asm/machdep.h>
diff --git a/arch/powerpc/platforms/pseries/scanlog.c b/arch/powerpc/platforms/pseries/scanlog.c
index 1b45c458f95..80e9e7652a4 100644
--- a/arch/powerpc/platforms/pseries/scanlog.c
+++ b/arch/powerpc/platforms/pseries/scanlog.c
@@ -26,6 +26,7 @@
 #include <linux/proc_fs.h>
 #include <linux/init.h>
 #include <linux/delay.h>
+#include <linux/slab.h>
 #include <asm/uaccess.h>
 #include <asm/rtas.h>
 #include <asm/prom.h>
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index ca5f2e10972..6710761bf60 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -23,7 +23,6 @@
 #include <linux/mm.h>
 #include <linux/stddef.h>
 #include <linux/unistd.h>
-#include <linux/slab.h>
 #include <linux/user.h>
 #include <linux/tty.h>
 #include <linux/major.h>
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index 4ca641042ec..1bcedd8b461 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -120,12 +120,12 @@ static inline void direct_qirr_info(int n_cpu, u8 value)
 
 /* LPAR low level accessors */
 
-static inline unsigned int lpar_xirr_info_get(void)
+static inline unsigned int lpar_xirr_info_get(unsigned char cppr)
 {
         unsigned long lpar_rc;
         unsigned long return_value;
 
-        lpar_rc = plpar_xirr(&return_value);
+        lpar_rc = plpar_xirr(&return_value, cppr);
         if (lpar_rc != H_SUCCESS)
                 panic(" bad return code xirr - rc = %lx\n", lpar_rc);
         return (unsigned int)return_value;
@@ -331,7 +331,8 @@ static unsigned int xics_get_irq_direct(void)
 
 static unsigned int xics_get_irq_lpar(void)
 {
-        unsigned int xirr = lpar_xirr_info_get();
+        struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
+        unsigned int xirr = lpar_xirr_info_get(os_cppr->stack[os_cppr->index]);
         unsigned int vec = xics_xirr_vector(xirr);
         unsigned int irq;
 
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c
index ecad10d4e92..8d103ca6d6a 100644
--- a/arch/powerpc/sysdev/cpm1.c
+++ b/arch/powerpc/sysdev/cpm1.c
@@ -31,6 +31,7 @@
 #include <linux/irq.h>
 #include <linux/module.h>
 #include <linux/spinlock.h>
+#include <linux/slab.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
 #include <asm/8xx_immap.h>
@@ -485,9 +486,6 @@ int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode)
                 return -EINVAL;
         }
 
-        if (reg == &mpc8xx_immr->im_cpm.cp_sicr && mode == CPM_CLK_RX)
-                shift += 3;
-
         for (i = 0; i < ARRAY_SIZE(clk_map); i++) {
                 if (clk_map[i][0] == target && clk_map[i][1] == clock) {
                         bits = clk_map[i][2];
@@ -502,6 +500,17 @@ int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode)
 
         bits <<= shift;
         mask <<= shift;
+
+        if (reg == &mpc8xx_immr->im_cpm.cp_sicr) {
+                if (mode == CPM_CLK_RTX) {
+                        bits |= bits << 3;
+                        mask |= mask << 3;
+                } else if (mode == CPM_CLK_RX) {
+                        bits <<= 3;
+                        mask <<= 3;
+                }
+        }
+
         out_be32(reg, (in_be32(reg) & ~mask) | bits);
 
         return 0;
diff --git a/arch/powerpc/sysdev/cpm2.c b/arch/powerpc/sysdev/cpm2.c
index eb5927212fa..8dc1e24f3c2 100644
--- a/arch/powerpc/sysdev/cpm2.c
+++ b/arch/powerpc/sysdev/cpm2.c
@@ -244,9 +244,6 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode)
                 return -EINVAL;
         }
 
-        if (mode == CPM_CLK_RX)
-                shift += 3;
-
         for (i = 0; i < ARRAY_SIZE(clk_map); i++) {
                 if (clk_map[i][0] == target && clk_map[i][1] == clock) {
                         bits = clk_map[i][2];
@@ -259,6 +256,14 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode)
         bits <<= shift;
         mask <<= shift;
 
+        if (mode == CPM_CLK_RTX) {
+                bits |= bits << 3;
+                mask |= mask << 3;
+        } else if (mode == CPM_CLK_RX) {
+                bits <<= 3;
+                mask <<= 3;
+        }
+
         out_be32(reg, (in_be32(reg) & ~mask) | bits);
 
         cpm2_unmap(im_cpmux);
diff --git a/arch/powerpc/sysdev/cpm2_pic.h b/arch/powerpc/sysdev/cpm2_pic.h
index 30e5828a278..2c5f70c2448 100644
--- a/arch/powerpc/sysdev/cpm2_pic.h
+++ b/arch/powerpc/sysdev/cpm2_pic.h
@@ -3,6 +3,6 @@
 
 extern unsigned int cpm2_get_irq(void);
 
-extern void cpm2_pic_init(struct device_node*);
+extern void cpm2_pic_init(struct device_node *);
 
 #endif /* _PPC_KERNEL_CPM2_H */
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c
index 9de72c96e6d..88b9812c854 100644
--- a/arch/powerpc/sysdev/cpm_common.c
+++ b/arch/powerpc/sysdev/cpm_common.c
@@ -21,6 +21,7 @@
 #include <linux/of_device.h>
 #include <linux/spinlock.h>
 #include <linux/of.h>
+#include <linux/slab.h>
 
 #include <asm/udbg.h>
 #include <asm/io.h>
diff --git a/arch/powerpc/sysdev/dart_iommu.c b/arch/powerpc/sysdev/dart_iommu.c
index bafc3f85360..c8b96ed7c01 100644
--- a/arch/powerpc/sysdev/dart_iommu.c
+++ b/arch/powerpc/sysdev/dart_iommu.c
@@ -29,7 +29,6 @@
 
 #include <linux/init.h>
 #include <linux/types.h>
-#include <linux/slab.h>
 #include <linux/mm.h>
 #include <linux/spinlock.h>
 #include <linux/string.h>
@@ -38,6 +37,7 @@
 #include <linux/vmalloc.h>
 #include <linux/suspend.h>
 #include <linux/lmb.h>
+#include <linux/gfp.h>
 #include <asm/io.h>
 #include <asm/prom.h>
 #include <asm/iommu.h>
diff --git a/arch/powerpc/sysdev/fsl_gtm.c b/arch/powerpc/sysdev/fsl_gtm.c
index 714ec02fed2..eca4545dd52 100644
--- a/arch/powerpc/sysdev/fsl_gtm.c
+++ b/arch/powerpc/sysdev/fsl_gtm.c
@@ -20,6 +20,7 @@
 #include <linux/of.h>
 #include <linux/spinlock.h>
 #include <linux/bitops.h>
+#include <linux/slab.h>
 #include <asm/fsl_gtm.h>
 
 #define GTCFR_STP(x)            ((x) & 1 ? 1 << 5 : 1 << 1)
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index e094367d773..3482e3fd89c 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -16,6 +16,7 @@
 #include <linux/bootmem.h>
 #include <linux/msi.h>
 #include <linux/pci.h>
+#include <linux/slab.h>
 #include <linux/of_platform.h>
 #include <sysdev/fsl_soc.h>
 #include <asm/prom.h>
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index e1a028c1f18..a14760fe513 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -25,6 +25,7 @@
 #include <linux/bootmem.h>
 #include <linux/lmb.h>
 #include <linux/log2.h>
+#include <linux/slab.h>
 
 #include <asm/io.h>
 #include <asm/prom.h>
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index 757a83fe5e5..71fba88f50d 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -23,6 +23,7 @@
 #include <linux/rio_drv.h>
 #include <linux/of_platform.h>
 #include <linux/delay.h>
+#include <linux/slab.h>
 
 #include <asm/io.h>
 
diff --git a/arch/powerpc/sysdev/mpc8xxx_gpio.c b/arch/powerpc/sysdev/mpc8xxx_gpio.c
index ee1c0e1cf4a..6478eb10691 100644
--- a/arch/powerpc/sysdev/mpc8xxx_gpio.c
+++ b/arch/powerpc/sysdev/mpc8xxx_gpio.c
@@ -15,6 +15,7 @@
 #include <linux/of.h>
 #include <linux/of_gpio.h>
 #include <linux/gpio.h>
+#include <linux/slab.h>
 
 #define MPC8XXX_GPIO_PINS       32
 
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 339e8a3e26d..260295b1055 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -26,6 +26,7 @@
 #include <linux/bootmem.h>
 #include <linux/spinlock.h>
 #include <linux/pci.h>
+#include <linux/slab.h>
 
 #include <asm/ptrace.h>
 #include <asm/signal.h>
diff --git a/arch/powerpc/sysdev/msi_bitmap.c b/arch/powerpc/sysdev/msi_bitmap.c
index 5a32cbef9b6..5287e95cec3 100644
--- a/arch/powerpc/sysdev/msi_bitmap.c
+++ b/arch/powerpc/sysdev/msi_bitmap.c
@@ -8,6 +8,7 @@
  *
  */
 
+#include <linux/slab.h>
 #include <linux/kernel.h>
 #include <linux/bitmap.h>
 #include <asm/msi_bitmap.h>
diff --git a/arch/powerpc/sysdev/of_rtc.c b/arch/powerpc/sysdev/of_rtc.c
index 3d54450640c..c9e803f3e26 100644
--- a/arch/powerpc/sysdev/of_rtc.c
+++ b/arch/powerpc/sysdev/of_rtc.c
@@ -12,6 +12,7 @@
 #include <linux/of.h>
 #include <linux/init.h>
 #include <linux/of_platform.h>
+#include <linux/slab.h>
 
 static __initdata struct {
         const char *compatible;
diff --git a/arch/powerpc/sysdev/pmi.c b/arch/powerpc/sysdev/pmi.c
index aaa915998eb..652652db4ce 100644
--- a/arch/powerpc/sysdev/pmi.c
+++ b/arch/powerpc/sysdev/pmi.c
@@ -25,6 +25,7 @@
  */
 
 #include <linux/interrupt.h>
+#include <linux/slab.h>
 #include <linux/completion.h>
 #include <linux/spinlock.h>
 #include <linux/workqueue.h>
diff --git a/arch/powerpc/sysdev/ppc4xx_gpio.c b/arch/powerpc/sysdev/ppc4xx_gpio.c
index 110efe2a54f..3812fc366be 100644
--- a/arch/powerpc/sysdev/ppc4xx_gpio.c
+++ b/arch/powerpc/sysdev/ppc4xx_gpio.c
@@ -29,6 +29,7 @@
 #include <linux/of_gpio.h>
 #include <linux/gpio.h>
 #include <linux/types.h>
+#include <linux/slab.h>
 
 #define GPIO_MASK(gpio)         (0x80000000 >> (gpio))
 #define GPIO_MASK2(gpio)        (0xc0000000 >> ((gpio) * 2))
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index 8aa33021e50..106d767bf65 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -24,6 +24,7 @@
 #include <linux/of.h>
 #include <linux/bootmem.h>
 #include <linux/delay.h>
+#include <linux/slab.h>
 
 #include <asm/io.h>
 #include <asm/pci-bridge.h>
diff --git a/arch/powerpc/sysdev/qe_lib/gpio.c b/arch/powerpc/sysdev/qe_lib/gpio.c
index 8e7a7767dd5..dc8f8d61807 100644
--- a/arch/powerpc/sysdev/qe_lib/gpio.c
+++ b/arch/powerpc/sysdev/qe_lib/gpio.c
@@ -19,6 +19,7 @@
 #include <linux/of.h>
 #include <linux/of_gpio.h>
 #include <linux/gpio.h>
+#include <linux/slab.h>
 #include <asm/qe.h>
 
 struct qe_gpio_chip {
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c
index d927da893ec..541ba986364 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_ic.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c
@@ -33,7 +33,7 @@
 
 #include "qe_ic.h"
 
-static DEFINE_SPINLOCK(qe_ic_lock);
+static DEFINE_RAW_SPINLOCK(qe_ic_lock);
 
 static struct qe_ic_info qe_ic_info[] = {
         [1] = {
@@ -201,13 +201,13 @@ static void qe_ic_unmask_irq(unsigned int virq)
         unsigned long flags;
         u32 temp;
 
-        spin_lock_irqsave(&qe_ic_lock, flags);
+        raw_spin_lock_irqsave(&qe_ic_lock, flags);
 
         temp = qe_ic_read(qe_ic->regs, qe_ic_info[src].mask_reg);
         qe_ic_write(qe_ic->regs, qe_ic_info[src].mask_reg,
                     temp | qe_ic_info[src].mask);
 
-        spin_unlock_irqrestore(&qe_ic_lock, flags);
+        raw_spin_unlock_irqrestore(&qe_ic_lock, flags);
 }
 
 static void qe_ic_mask_irq(unsigned int virq)
@@ -217,7 +217,7 @@ static void qe_ic_mask_irq(unsigned int virq)
         unsigned long flags;
         u32 temp;
 
-        spin_lock_irqsave(&qe_ic_lock, flags);
+        raw_spin_lock_irqsave(&qe_ic_lock, flags);
 
         temp = qe_ic_read(qe_ic->regs, qe_ic_info[src].mask_reg);
         qe_ic_write(qe_ic->regs, qe_ic_info[src].mask_reg,
@@ -233,7 +233,7 @@ static void qe_ic_mask_irq(unsigned int virq)
          */
         mb();
 
-        spin_unlock_irqrestore(&qe_ic_lock, flags);
+        raw_spin_unlock_irqrestore(&qe_ic_lock, flags);
 }
 
 static struct irq_chip qe_ic_irq_chip = {
diff --git a/arch/powerpc/sysdev/qe_lib/ucc.c b/arch/powerpc/sysdev/qe_lib/ucc.c
index ebb442ea191..fa589b21dbc 100644
--- a/arch/powerpc/sysdev/qe_lib/ucc.c
+++ b/arch/powerpc/sysdev/qe_lib/ucc.c
@@ -16,7 +16,6 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/errno.h>
-#include <linux/slab.h>
 #include <linux/stddef.h>
 #include <linux/spinlock.h>
 #include <linux/module.h>
diff --git a/arch/powerpc/sysdev/simple_gpio.c b/arch/powerpc/sysdev/simple_gpio.c
index 43c4569e24b..d5fb173e588 100644
--- a/arch/powerpc/sysdev/simple_gpio.c
+++ b/arch/powerpc/sysdev/simple_gpio.c
@@ -21,6 +21,7 @@
 #include <linux/of.h>
 #include <linux/of_gpio.h>
 #include <linux/gpio.h>
+#include <linux/slab.h>
 #include <asm/prom.h>
 #include "simple_gpio.h"
 
diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c
index 595034cfb85..0ab9281e49a 100644
--- a/arch/powerpc/sysdev/tsi108_pci.c
+++ b/arch/powerpc/sysdev/tsi108_pci.c
@@ -24,7 +24,6 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/pci.h>
-#include <linux/slab.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
 
diff --git a/arch/s390/appldata/appldata_mem.c b/arch/s390/appldata/appldata_mem.c
index 4188cbe63a5..e43fe753703 100644
--- a/arch/s390/appldata/appldata_mem.c
+++ b/arch/s390/appldata/appldata_mem.c
@@ -11,7 +11,6 @@
 
 #include <linux/module.h>
 #include <linux/init.h>
-#include <linux/slab.h>
 #include <linux/errno.h>
 #include <linux/kernel_stat.h>
 #include <linux/pagemap.h>
diff --git a/arch/s390/appldata/appldata_net_sum.c b/arch/s390/appldata/appldata_net_sum.c
index 4ce7fa95880..9a9586f4103 100644
--- a/arch/s390/appldata/appldata_net_sum.c
+++ b/arch/s390/appldata/appldata_net_sum.c
@@ -12,7 +12,6 @@
 
 #include <linux/module.h>
 #include <linux/init.h>
-#include <linux/slab.h>
 #include <linux/errno.h>
 #include <linux/kernel_stat.h>
 #include <linux/netdevice.h>
diff --git a/arch/s390/boot/compressed/misc.c b/arch/s390/boot/compressed/misc.c
index a97d6952582..14e0479d388 100644
--- a/arch/s390/boot/compressed/misc.c
+++ b/arch/s390/boot/compressed/misc.c
@@ -24,8 +24,8 @@
 /* Symbols defined by linker scripts */
 extern char input_data[];
 extern int input_len;
-extern int _text;
-extern int _end;
+extern char _text, _end;
+extern char _bss, _ebss;
 
 static void error(char *m);
 
@@ -129,12 +129,12 @@ unsigned long decompress_kernel(void)
         unsigned long output_addr;
         unsigned char *output;
 
+        check_ipl_parmblock((void *) 0, (unsigned long) output + SZ__bss_start);
+        memset(&_bss, 0, &_ebss - &_bss);
         free_mem_ptr = (unsigned long)&_end;
         free_mem_end_ptr = free_mem_ptr + HEAP_SIZE;
         output = (unsigned char *) ((free_mem_end_ptr + 4095UL) & -4096UL);
 
-        check_ipl_parmblock((void *) 0, (unsigned long) output + SZ__bss_start);
-
 #ifdef CONFIG_BLK_DEV_INITRD
         /*
          * Move the initrd right behind the end of the decompressed
diff --git a/arch/s390/crypto/prng.c b/arch/s390/crypto/prng.c
index a3209906739..aa819dac236 100644
--- a/arch/s390/crypto/prng.c
+++ b/arch/s390/crypto/prng.c
@@ -10,6 +10,7 @@
 #include <linux/module.h>
 #include <linux/moduleparam.h>
 #include <linux/random.h>
+#include <linux/slab.h>
 #include <asm/debug.h>
 #include <asm/uaccess.h>
 
diff --git a/arch/s390/crypto/sha_common.c b/arch/s390/crypto/sha_common.c
index 7903ec47e6b..f42dbabc0d3 100644
--- a/arch/s390/crypto/sha_common.c
+++ b/arch/s390/crypto/sha_common.c
@@ -79,7 +79,7 @@ int s390_sha_final(struct shash_desc *desc, u8 *out)
         memset(ctx->buf + index, 0x00, end - index - 8);
 
         /*
-         * Append message length. Well, SHA-512 wants a 128 bit lenght value,
+         * Append message length. Well, SHA-512 wants a 128 bit length value,
          * nevertheless we use u64, should be enough for now...
          */
         bits = ctx->count * 8;
diff --git a/arch/s390/defconfig b/arch/s390/defconfig
index 7ae71cc5697..bcd6884985a 100644
--- a/arch/s390/defconfig
+++ b/arch/s390/defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc2
-# Mon Jan  4 09:03:07 2010
+# Linux kernel version: 2.6.34-rc3
+# Fri Apr  9 09:57:10 2010
 #
 CONFIG_SCHED_MC=y
 CONFIG_MMU=y
@@ -17,6 +17,7 @@ CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_TIME_VSYSCALL=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
 CONFIG_NO_IOMEM=y
 CONFIG_NO_DMA=y
 CONFIG_GENERIC_LOCKBREAK=y
@@ -62,15 +63,11 @@ CONFIG_TREE_RCU=y
 # CONFIG_RCU_TRACE is not set
 CONFIG_RCU_FANOUT=64
 # CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_RCU_FAST_NO_HZ is not set
 # CONFIG_TREE_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=17
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 CONFIG_CGROUPS=y
 # CONFIG_CGROUP_DEBUG is not set
 CONFIG_CGROUP_NS=y
@@ -79,6 +76,7 @@ CONFIG_CGROUP_NS=y
 # CONFIG_CPUSETS is not set
 # CONFIG_CGROUP_CPUACCT is not set
 # CONFIG_RESOURCE_COUNTERS is not set
+# CONFIG_CGROUP_SCHED is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_RELAY is not set
@@ -93,6 +91,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 CONFIG_RD_BZIP2=y
 CONFIG_RD_LZMA=y
+CONFIG_RD_LZO=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -126,6 +125,7 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+CONFIG_TRACEPOINTS=y
 CONFIG_HAVE_OPROFILE=y
 CONFIG_KPROBES=y
 CONFIG_HAVE_SYSCALL_WRAPPERS=y
@@ -134,6 +134,7 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_USE_GENERIC_SMP_HELPERS=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
 CONFIG_HAVE_DEFAULT_NO_SPIN_MUTEXES=y
 
 #
@@ -246,6 +247,7 @@ CONFIG_64BIT=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=32
 CONFIG_HOTPLUG_CPU=y
+# CONFIG_SCHED_BOOK is not set
 CONFIG_COMPAT=y
 CONFIG_SYSVIPC_COMPAT=y
 CONFIG_AUDIT_ARCH=y
@@ -345,13 +347,13 @@ CONFIG_PM_SLEEP=y
 CONFIG_HIBERNATION=y
 CONFIG_PM_STD_PARTITION=""
 # CONFIG_PM_RUNTIME is not set
+CONFIG_PM_OPS=y
 CONFIG_NET=y
 
 #
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
@@ -529,6 +531,7 @@ CONFIG_NET_SCH_FIFO=y
 #
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_NET_TCPPROBE is not set
+# CONFIG_NET_DROP_MONITOR is not set
 CONFIG_CAN=m
 CONFIG_CAN_RAW=m
 CONFIG_CAN_BCM=m
@@ -605,6 +608,7 @@ CONFIG_MISC_DEVICES=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 # CONFIG_SCSI_DMA is not set
@@ -863,6 +867,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -891,6 +896,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
@@ -952,6 +958,7 @@ CONFIG_DEBUG_MUTEXES=y
 # CONFIG_LOCK_STAT is not set
 CONFIG_DEBUG_SPINLOCK_SLEEP=y
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+CONFIG_STACKTRACE=y
 # CONFIG_DEBUG_KOBJECT is not set
 CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_INFO is not set
@@ -973,12 +980,17 @@ CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 # CONFIG_DEBUG_PAGEALLOC is not set
+CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_RING_BUFFER=y
+CONFIG_EVENT_TRACING=y
+CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_TRACING=y
 CONFIG_TRACING_SUPPORT=y
 CONFIG_FTRACE=y
 # CONFIG_FUNCTION_TRACER is not set
@@ -995,10 +1007,15 @@ CONFIG_BRANCH_PROFILE_NONE=y
 # CONFIG_KMEMTRACE is not set
 # CONFIG_WORKQUEUE_TRACER is not set
 # CONFIG_BLK_DEV_IO_TRACE is not set
+CONFIG_KPROBE_EVENT=y
+# CONFIG_RING_BUFFER_BENCHMARK is not set
 # CONFIG_DYNAMIC_DEBUG is not set
 CONFIG_SAMPLES=y
+# CONFIG_SAMPLE_TRACEPOINTS is not set
+# CONFIG_SAMPLE_TRACE_EVENTS is not set
 # CONFIG_SAMPLE_KOBJECT is not set
 # CONFIG_SAMPLE_KPROBES is not set
+# CONFIG_DEBUG_STRICT_USER_COPY_CHECKS is not set
 
 #
 # Security options
@@ -1032,6 +1049,7 @@ CONFIG_CRYPTO_MANAGER=y
 CONFIG_CRYPTO_MANAGER2=y
 CONFIG_CRYPTO_GF128MUL=m
 # CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_PCRYPT is not set
 CONFIG_CRYPTO_WORKQUEUE=y
 # CONFIG_CRYPTO_CRYPTD is not set
 CONFIG_CRYPTO_AUTHENC=m
@@ -1119,7 +1137,7 @@ CONFIG_CRYPTO_SHA512_S390=m
 # CONFIG_CRYPTO_DES_S390 is not set
 # CONFIG_CRYPTO_AES_S390 is not set
 CONFIG_S390_PRNG=m
-# CONFIG_BINARY_PRINTF is not set
+CONFIG_BINARY_PRINTF=y
 
 #
 # Library routines
@@ -1136,14 +1154,16 @@ CONFIG_LIBCRC32C=m
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=m
 CONFIG_LZO_COMPRESS=m
-CONFIG_LZO_DECOMPRESS=m
+CONFIG_LZO_DECOMPRESS=y
 CONFIG_DECOMPRESS_GZIP=y
 CONFIG_DECOMPRESS_BZIP2=y
 CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_LZO=y
 CONFIG_NLATTR=y
 CONFIG_HAVE_KVM=y
 CONFIG_VIRTUALIZATION=y
 CONFIG_KVM=m
+# CONFIG_VHOST_NET is not set
 CONFIG_VIRTIO=y
 CONFIG_VIRTIO_RING=y
 CONFIG_VIRTIO_BALLOON=m
diff --git a/arch/s390/hypfs/hypfs_diag.c b/arch/s390/hypfs/hypfs_diag.c
index 87cf523192e..5b1acdba649 100644
--- a/arch/s390/hypfs/hypfs_diag.c
+++ b/arch/s390/hypfs/hypfs_diag.c
@@ -12,7 +12,6 @@
 
 #include <linux/types.h>
 #include <linux/errno.h>
-#include <linux/gfp.h>
 #include <linux/slab.h>
 #include <linux/string.h>
 #include <linux/vmalloc.h>
diff --git a/arch/s390/hypfs/inode.c b/arch/s390/hypfs/inode.c
index cd128b07bed..c53f8ac825c 100644
--- a/arch/s390/hypfs/inode.c
+++ b/arch/s390/hypfs/inode.c
@@ -14,8 +14,8 @@
 #include <linux/fs.h>
 #include <linux/namei.h>
 #include <linux/vfs.h>
+#include <linux/slab.h>
 #include <linux/pagemap.h>
-#include <linux/gfp.h>
 #include <linux/time.h>
 #include <linux/parser.h>
 #include <linux/sysfs.h>
diff --git a/arch/s390/include/asm/cio.h b/arch/s390/include/asm/cio.h
index e85679af54d..e34347d567a 100644
--- a/arch/s390/include/asm/cio.h
+++ b/arch/s390/include/asm/cio.h
@@ -20,7 +20,7 @@
 /**
  * struct ccw1 - channel command word
  * @cmd_code: command code
- * @flags: flags, like IDA adressing, etc.
+ * @flags: flags, like IDA addressing, etc.
  * @count: byte count
  * @cda: data address
  *
diff --git a/arch/s390/include/asm/compat.h b/arch/s390/include/asm/compat.h
index 01a08020bc0..104f2007f09 100644
--- a/arch/s390/include/asm/compat.h
+++ b/arch/s390/include/asm/compat.h
@@ -35,7 +35,8 @@
 
 extern long psw32_user_bits;
 
-#define COMPAT_USER_HZ  100
+#define COMPAT_USER_HZ          100
+#define COMPAT_UTS_MACHINE      "s390\0\0\0\0"
 
 typedef u32             compat_size_t;
 typedef s32             compat_ssize_t;
diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
index 9b5b9189c15..89a504c3f12 100644
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -105,7 +105,7 @@ extern char empty_zero_page[PAGE_SIZE];
 #ifndef __ASSEMBLY__
 /*
  * The vmalloc area will always be on the topmost area of the kernel
- * mapping. We reserve 96MB (31bit) / 1GB (64bit) for vmalloc,
+ * mapping. We reserve 96MB (31bit) / 128GB (64bit) for vmalloc,
  * which should be enough for any sane case.
  * By putting vmalloc at the top, we maximise the gap between physical
  * memory and vmalloc to catch misplaced memory accesses. As a side
@@ -120,8 +120,8 @@ extern unsigned long VMALLOC_START;
 #define VMALLOC_END     0x7e000000UL
 #define VMEM_MAP_END    0x80000000UL
 #else /* __s390x__ */
-#define VMALLOC_SIZE    (1UL << 30)
-#define VMALLOC_END     0x3e040000000UL
+#define VMALLOC_SIZE    (128UL << 30)
+#define VMALLOC_END     0x3e000000000UL
 #define VMEM_MAP_END    0x40000000000UL
 #endif /* __s390x__ */
 
diff --git a/arch/s390/include/asm/ptrace.h b/arch/s390/include/asm/ptrace.h
index dd2d913afca..fef9b33cdd5 100644
--- a/arch/s390/include/asm/ptrace.h
+++ b/arch/s390/include/asm/ptrace.h
@@ -489,9 +489,6 @@ struct user_regs_struct
  * These are defined as per linux/ptrace.h, which see.
  */
 #define arch_has_single_step()  (1)
-struct task_struct;
-extern void user_enable_single_step(struct task_struct *);
-extern void user_disable_single_step(struct task_struct *);
 extern void show_regs(struct pt_regs * regs);
 
 #define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
diff --git a/arch/s390/include/asm/qdio.h b/arch/s390/include/asm/qdio.h
index c666bfe5e98..9b04b1102bb 100644
--- a/arch/s390/include/asm/qdio.h
+++ b/arch/s390/include/asm/qdio.h
@@ -321,11 +321,6 @@ typedef void qdio_handler_t(struct ccw_device *, unsigned int, int,
 #define QDIO_ERROR_ACTIVATE_CHECK_CONDITION     0x40
 #define QDIO_ERROR_SLSB_STATE                   0x80
 
-/* for qdio_initialize */
-#define QDIO_INBOUND_0COPY_SBALS                0x01
-#define QDIO_OUTBOUND_0COPY_SBALS               0x02
-#define QDIO_USE_OUTBOUND_PCIS                  0x04
-
 /* for qdio_cleanup */
 #define QDIO_FLAG_CLEANUP_USING_CLEAR           0x01
 #define QDIO_FLAG_CLEANUP_USING_HALT            0x02
@@ -344,7 +339,6 @@ typedef void qdio_handler_t(struct ccw_device *, unsigned int, int,
  * @input_handler: handler to be called for input queues
  * @output_handler: handler to be called for output queues
  * @int_parm: interruption parameter
- * @flags: initialization flags
  * @input_sbal_addr_array:  address of no_input_qs * 128 pointers
  * @output_sbal_addr_array: address of no_output_qs * 128 pointers
  */
@@ -361,7 +355,6 @@ struct qdio_initialize {
         qdio_handler_t *input_handler;
         qdio_handler_t *output_handler;
         unsigned long int_parm;
-        unsigned long flags;
         void **input_sbal_addr_array;
         void **output_sbal_addr_array;
 };
diff --git a/arch/s390/include/asm/system.h b/arch/s390/include/asm/system.h
index 67ee6c3c6bb..1741c1556a4 100644
--- a/arch/s390/include/asm/system.h
+++ b/arch/s390/include/asm/system.h
@@ -110,6 +110,7 @@ extern void pfault_fini(void);
 #endif /* CONFIG_PFAULT */
 
 extern void cmma_init(void);
+extern int memcpy_real(void *, void *, size_t);
 
 #define finish_arch_switch(prev) do {                                        \
         set_fs(current->thread.mm_segment);                                  \
@@ -218,8 +219,8 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
                         "       l       %0,%2\n"
                         "0:     nr      %0,%5\n"
                         "       lr      %1,%0\n"
-                        "       or      %0,%2\n"
-                        "       or      %1,%3\n"
+                        "       or      %0,%3\n"
+                        "       or      %1,%4\n"
                         "       cs      %0,%1,%2\n"
                         "       jnl     1f\n"
                         "       xr      %1,%0\n"
@@ -239,8 +240,8 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
                         "       l       %0,%2\n"
                         "0:     nr      %0,%5\n"
                         "       lr      %1,%0\n"
-                        "       or      %0,%2\n"
-                        "       or      %1,%3\n"
+                        "       or      %0,%3\n"
+                        "       or      %1,%4\n"
                         "       cs      %0,%1,%2\n"
                         "       jnl     1f\n"
                         "       xr      %1,%0\n"
diff --git a/arch/s390/include/asm/unistd.h b/arch/s390/include/asm/unistd.h
index 6e9f049fa82..5f0075150a6 100644
--- a/arch/s390/include/asm/unistd.h
+++ b/arch/s390/include/asm/unistd.h
@@ -392,6 +392,7 @@
 #define __ARCH_WANT_SYS_LLSEEK
 #define __ARCH_WANT_SYS_NICE
 #define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_MMAP
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/s390/include/asm/vdso.h b/arch/s390/include/asm/vdso.h
index 4a76d9480cc..533f35751ae 100644
--- a/arch/s390/include/asm/vdso.h
+++ b/arch/s390/include/asm/vdso.h
@@ -29,6 +29,7 @@ struct vdso_data {
         __u32 tz_minuteswest;           /* Minutes west of Greenwich    0x30 */
         __u32 tz_dsttime;               /* Type of dst correction       0x34 */
         __u32 ectg_available;
+        __u32 ntp_mult;                 /* NTP adjusted multiplier      0x3C */
 };
 
 struct vdso_per_cpu_data {
diff --git a/arch/s390/kernel/asm-offsets.c b/arch/s390/kernel/asm-offsets.c
index 08db736dded..a09408952ed 100644
--- a/arch/s390/kernel/asm-offsets.c
+++ b/arch/s390/kernel/asm-offsets.c
@@ -61,6 +61,7 @@ int main(void)
         DEFINE(__VDSO_WTOM_NSEC, offsetof(struct vdso_data, wtom_clock_nsec));
         DEFINE(__VDSO_TIMEZONE, offsetof(struct vdso_data, tz_minuteswest));
         DEFINE(__VDSO_ECTG_OK, offsetof(struct vdso_data, ectg_available));
+        DEFINE(__VDSO_NTP_MULT, offsetof(struct vdso_data, ntp_mult));
         DEFINE(__VDSO_ECTG_BASE, offsetof(struct vdso_per_cpu_data, ectg_timer_base));
         DEFINE(__VDSO_ECTG_USER, offsetof(struct vdso_per_cpu_data, ectg_user_time));
         /* constants used by the vdso */
diff --git a/arch/s390/kernel/compat_linux.c b/arch/s390/kernel/compat_linux.c
index 11c3aba664e..73b624ed9cd 100644
--- a/arch/s390/kernel/compat_linux.c
+++ b/arch/s390/kernel/compat_linux.c
@@ -29,7 +29,6 @@
 #include <linux/sem.h>
 #include <linux/msg.h>
 #include <linux/shm.h>
-#include <linux/slab.h>
 #include <linux/uio.h>
 #include <linux/quota.h>
 #include <linux/module.h>
@@ -52,6 +51,7 @@
 #include <linux/ptrace.h>
 #include <linux/fadvise.h>
 #include <linux/ipc.h>
+#include <linux/slab.h>
 
 #include <asm/types.h>
 #include <asm/uaccess.h>
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index 30de2d0e52b..672ce52341b 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -547,7 +547,7 @@ sys32_setdomainname_wrapper:
         .globl  sys32_newuname_wrapper
 sys32_newuname_wrapper:
         llgtr   %r2,%r2                 # struct new_utsname *
-        jg      sys_s390_newuname       # branch to system call
+        jg      sys_newuname            # branch to system call
 
         .globl  compat_sys_adjtimex_wrapper
 compat_sys_adjtimex_wrapper:
diff --git a/arch/s390/kernel/early.c b/arch/s390/kernel/early.c
index 31d618a443a..2d92c2cf92d 100644
--- a/arch/s390/kernel/early.c
+++ b/arch/s390/kernel/early.c
@@ -82,7 +82,8 @@ asm(
         "       lm      6,15,24(15)\n"
 #endif
         "       br      14\n"
-        "       .size   savesys_ipl_nss, .-savesys_ipl_nss\n");
+        "       .size   savesys_ipl_nss, .-savesys_ipl_nss\n"
+        "       .previous\n");
 
 static __initdata char upper_command_line[COMMAND_LINE_SIZE];
 
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index 4348f9bc539..6af7045280a 100644
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -964,7 +964,7 @@ cleanup_critical:
         clc     4(4,%r12),BASED(cleanup_table_io_work_loop)
         bl      BASED(0f)
         clc     4(4,%r12),BASED(cleanup_table_io_work_loop+4)
-        bl      BASED(cleanup_io_return)
+        bl      BASED(cleanup_io_work_loop)
 0:
         br      %r14
 
@@ -1039,6 +1039,12 @@ cleanup_sysc_leave_insn:
 
 cleanup_io_return:
         mvc     __LC_RETURN_PSW(4),0(%r12)
+        mvc     __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_return)
+        la      %r12,__LC_RETURN_PSW
+        br      %r14
+
+cleanup_io_work_loop:
+        mvc     __LC_RETURN_PSW(4),0(%r12)
         mvc     __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_work_loop)
         la      %r12,__LC_RETURN_PSW
         br      %r14
diff --git a/arch/s390/kernel/entry.h b/arch/s390/kernel/entry.h
index e1e5e767ab5..eb15c12ec15 100644
--- a/arch/s390/kernel/entry.h
+++ b/arch/s390/kernel/entry.h
@@ -24,17 +24,13 @@ int __cpuinit start_secondary(void *cpuvoid);
 void __init startup_init(void);
 void die(const char * str, struct pt_regs * regs, long err);
 
-struct new_utsname;
-struct mmap_arg_struct;
+struct s390_mmap_arg_struct;
 struct fadvise64_64_args;
 struct old_sigaction;
-struct sel_arg_struct;
 
-long sys_mmap2(struct mmap_arg_struct __user  *arg);
-long sys_s390_old_mmap(struct mmap_arg_struct __user *arg);
-long sys_ipc(uint call, int first, unsigned long second,
+long sys_mmap2(struct s390_mmap_arg_struct __user  *arg);
+long sys_s390_ipc(uint call, int first, unsigned long second,
              unsigned long third, void __user *ptr);
-long sys_s390_newuname(struct new_utsname __user *name);
 long sys_s390_personality(unsigned long personality);
 long sys_s390_fadvise64(int fd, u32 offset_high, u32 offset_low,
                     size_t len, int advice);
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S
index 29fd0f1e6ec..52106d53271 100644
--- a/arch/s390/kernel/entry64.S
+++ b/arch/s390/kernel/entry64.S
@@ -946,7 +946,7 @@ cleanup_critical:
         clc     8(8,%r12),BASED(cleanup_table_io_work_loop)
         jl      0f
         clc     8(8,%r12),BASED(cleanup_table_io_work_loop+8)
-        jl      cleanup_io_return
+        jl      cleanup_io_work_loop
 0:
         br      %r14
 
@@ -1021,6 +1021,12 @@ cleanup_sysc_leave_insn:
 
 cleanup_io_return:
         mvc     __LC_RETURN_PSW(8),0(%r12)
+        mvc     __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_return)
+        la      %r12,__LC_RETURN_PSW
+        br      %r14
+
+cleanup_io_work_loop:
+        mvc     __LC_RETURN_PSW(8),0(%r12)
         mvc     __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_work_loop)
         la      %r12,__LC_RETURN_PSW
         br      %r14
diff --git a/arch/s390/kernel/head.S b/arch/s390/kernel/head.S
index ca4a62bd862..9d1f76702d4 100644
--- a/arch/s390/kernel/head.S
+++ b/arch/s390/kernel/head.S
@@ -517,7 +517,10 @@ startup:
         lhi     %r1,2                   # mode 2 = esame (dump)
         sigp    %r1,%r0,0x12            # switch to esame mode
         sam64                           # switch to 64 bit mode
+        larl    %r13,4f
+        lmh     %r0,%r15,0(%r13)        # clear high-order half
         jg      startup_continue
+4:      .fill   16,4,0x0
 #else
         mvi     __LC_AR_MODE_ID,0       # set ESA flag (mode 0)
         l       %r13,4f-.LPG0(%r13)
diff --git a/arch/s390/kernel/head64.S b/arch/s390/kernel/head64.S
index 39580e76865..1f70970de0a 100644
--- a/arch/s390/kernel/head64.S
+++ b/arch/s390/kernel/head64.S
@@ -21,7 +21,6 @@ startup_continue:
         larl    %r1,sched_clock_base_cc
         mvc     0(8,%r1),__LC_LAST_UPDATE_CLOCK
         larl    %r13,.LPG1              # get base
-        lmh     %r0,%r15,.Lzero64-.LPG1(%r13)   # clear high-order half
         lctlg   %c0,%c15,.Lctl-.LPG1(%r13)      # load control registers
         lg      %r12,.Lparmaddr-.LPG1(%r13)     # pointer to parameter area
                                         # move IPL device to lowcore
@@ -67,7 +66,6 @@ startup_continue:
 .L4malign:.quad 0xffffffffffc00000
 .Lscan2g:.quad  0x80000000 + 0x20000 - 8        # 2GB + 128K - 8
 .Lnop:  .long   0x07000700
-.Lzero64:.fill  16,4,0x0
 .Lparmaddr:
         .quad   PARMAREA
         .align  64
diff --git a/arch/s390/kernel/ipl.c b/arch/s390/kernel/ipl.c
index 7eedbbcb54a..72c8b0d070c 100644
--- a/arch/s390/kernel/ipl.c
+++ b/arch/s390/kernel/ipl.c
@@ -15,6 +15,7 @@
 #include <linux/reboot.h>
 #include <linux/ctype.h>
 #include <linux/fs.h>
+#include <linux/gfp.h>
 #include <asm/ipl.h>
 #include <asm/smp.h>
 #include <asm/setup.h>
diff --git a/arch/s390/kernel/kprobes.c b/arch/s390/kernel/kprobes.c
index 86783efa24e..3d34eef5a2c 100644
--- a/arch/s390/kernel/kprobes.c
+++ b/arch/s390/kernel/kprobes.c
@@ -29,6 +29,7 @@
 #include <asm/cacheflush.h>
 #include <asm/sections.h>
 #include <linux/module.h>
+#include <linux/slab.h>
 
 DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
 DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
diff --git a/arch/s390/kernel/process.c b/arch/s390/kernel/process.c
index 00b6d1d292f..1039fdea15b 100644
--- a/arch/s390/kernel/process.c
+++ b/arch/s390/kernel/process.c
@@ -16,9 +16,9 @@
 #include <linux/fs.h>
 #include <linux/smp.h>
 #include <linux/stddef.h>
+#include <linux/slab.h>
 #include <linux/unistd.h>
 #include <linux/ptrace.h>
-#include <linux/slab.h>
 #include <linux/vmalloc.h>
 #include <linux/user.h>
 #include <linux/interrupt.h>
diff --git a/arch/s390/kernel/sclp.S b/arch/s390/kernel/sclp.S
index 27af3bf3a00..2e82fdd8932 100644
--- a/arch/s390/kernel/sclp.S
+++ b/arch/s390/kernel/sclp.S
@@ -235,7 +235,7 @@ _sclp_print:
         lh      %r9,0(%r8)                      # update sccb length
         ar      %r9,%r6
         sth     %r9,0(%r8)
-        ar      %r7,%r6                         # update current mto adress
+        ar      %r7,%r6                         # update current mto address
         ltr     %r0,%r0                         # more characters?
         jnz     .LinitmtoS4
         l       %r2,.LwritedataS4-.LbaseS4(%r13)# write data
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index 77a63ae419f..91625f759cc 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -25,7 +25,6 @@
 #include <linux/stddef.h>
 #include <linux/unistd.h>
 #include <linux/ptrace.h>
-#include <linux/slab.h>
 #include <linux/user.h>
 #include <linux/tty.h>
 #include <linux/ioport.h>
@@ -401,7 +400,7 @@ setup_lowcore(void)
          * Setup lowcore for boot cpu
          */
         BUILD_BUG_ON(sizeof(struct _lowcore) != LC_PAGES * 4096);
-        lc = __alloc_bootmem(LC_PAGES * PAGE_SIZE, LC_PAGES * PAGE_SIZE, 0);
+        lc = __alloc_bootmem_low(LC_PAGES * PAGE_SIZE, LC_PAGES * PAGE_SIZE, 0);
         lc->restart_psw.mask = PSW_BASE_BITS | PSW_DEFAULT_KEY;
         lc->restart_psw.addr =
                 PSW_ADDR_AMODE | (unsigned long) restart_int_handler;
@@ -433,7 +432,7 @@ setup_lowcore(void)
 #ifndef CONFIG_64BIT
         if (MACHINE_HAS_IEEE) {
                 lc->extended_save_area_addr = (__u32)
-                        __alloc_bootmem(PAGE_SIZE, PAGE_SIZE, 0);
+                        __alloc_bootmem_low(PAGE_SIZE, PAGE_SIZE, 0);
                 /* enable extended save area */
                 __ctl_set_bit(14, 29);
         }
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index 8b10127c00a..e4d98de83dd 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -36,6 +36,7 @@
 #include <linux/cpu.h>
 #include <linux/timex.h>
 #include <linux/bootmem.h>
+#include <linux/slab.h>
 #include <asm/asm-offsets.h>
 #include <asm/ipl.h>
 #include <asm/setup.h>
@@ -292,9 +293,9 @@ static void __init smp_get_save_area(unsigned int cpu, unsigned int phy_cpu)
         zfcpdump_save_areas[cpu] = kmalloc(sizeof(struct save_area), GFP_KERNEL);
         while (raw_sigp(phy_cpu, sigp_stop_and_store_status) == sigp_busy)
                 cpu_relax();
-        memcpy(zfcpdump_save_areas[cpu],
-               (void *)(unsigned long) store_prefix() + SAVE_AREA_BASE,
-               sizeof(struct save_area));
+        memcpy_real(zfcpdump_save_areas[cpu],
+                    (void *)(unsigned long) store_prefix() + SAVE_AREA_BASE,
+                    sizeof(struct save_area));
 }
 
 struct save_area *zfcpdump_save_areas[NR_CPUS + 1];
@@ -1020,7 +1021,9 @@ out:
         return rc;
 }
 
-static ssize_t __ref rescan_store(struct sysdev_class *class, const char *buf,
+static ssize_t __ref rescan_store(struct sysdev_class *class,
+                                  struct sysdev_class_attribute *attr,
+                                  const char *buf,
                                   size_t count)
 {
         int rc;
@@ -1031,7 +1034,9 @@ static ssize_t __ref rescan_store(struct sysdev_class *class, const char *buf,
 static SYSDEV_CLASS_ATTR(rescan, 0200, NULL, rescan_store);
 #endif /* CONFIG_HOTPLUG_CPU */
 
-static ssize_t dispatching_show(struct sysdev_class *class, char *buf)
+static ssize_t dispatching_show(struct sysdev_class *class,
+                                struct sysdev_class_attribute *attr,
+                                char *buf)
 {
         ssize_t count;
 
@@ -1041,7 +1046,9 @@ static ssize_t dispatching_show(struct sysdev_class *class, char *buf)
         return count;
 }
 
-static ssize_t dispatching_store(struct sysdev_class *dev, const char *buf,
+static ssize_t dispatching_store(struct sysdev_class *dev,
+                                 struct sysdev_class_attribute *attr,
+                                 const char *buf,
                                  size_t count)
 {
         int val, rc;
diff --git a/arch/s390/kernel/swsusp_asm64.S b/arch/s390/kernel/swsusp_asm64.S
index b354427e03b..c56d3f56d02 100644
--- a/arch/s390/kernel/swsusp_asm64.S
+++ b/arch/s390/kernel/swsusp_asm64.S
@@ -256,6 +256,9 @@ restore_registers:
         lghi    %r2,0
         brasl   %r14,arch_set_page_states
 
+        /* Reinitialize the channel subsystem */
+        brasl   %r14,channel_subsystem_reinit
+
         /* Return 0 */
         lmg     %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
         lghi    %r2,0
diff --git a/arch/s390/kernel/sys_s390.c b/arch/s390/kernel/sys_s390.c
index 86a74c9c9e6..7b6b0f81a28 100644
--- a/arch/s390/kernel/sys_s390.c
+++ b/arch/s390/kernel/sys_s390.c
@@ -33,13 +33,12 @@
 #include "entry.h"
 
 /*
- * Perform the select(nd, in, out, ex, tv) and mmap() system
- * calls. Linux for S/390 isn't able to handle more than 5
- * system call parameters, so these system calls used a memory
- * block for parameter passing..
+ * Perform the mmap() system call. Linux for S/390 isn't able to handle more
+ * than 5 system call parameters, so this system call uses a memory block
+ * for parameter passing.
  */
 
-struct mmap_arg_struct {
+struct s390_mmap_arg_struct {
         unsigned long addr;
         unsigned long len;
         unsigned long prot;
@@ -48,9 +47,9 @@ struct mmap_arg_struct {
         unsigned long offset;
 };
 
-SYSCALL_DEFINE1(mmap2, struct mmap_arg_struct __user *, arg)
+SYSCALL_DEFINE1(mmap2, struct s390_mmap_arg_struct __user *, arg)
 {
-        struct mmap_arg_struct a;
+        struct s390_mmap_arg_struct a;
         int error = -EFAULT;
 
         if (copy_from_user(&a, arg, sizeof(a)))
@@ -60,29 +59,12 @@ out:
         return error;
 }
 
-SYSCALL_DEFINE1(s390_old_mmap, struct mmap_arg_struct __user *, arg)
-{
-        struct mmap_arg_struct a;
-        long error = -EFAULT;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                goto out;
-
-        error = -EINVAL;
-        if (a.offset & ~PAGE_MASK)
-                goto out;
-
-        error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT);
-out:
-        return error;
-}
-
 /*
  * sys_ipc() is the de-multiplexer for the SysV IPC calls..
  *
  * This is really horribly ugly.
  */
-SYSCALL_DEFINE5(ipc, uint, call, int, first, unsigned long, second,
+SYSCALL_DEFINE5(s390_ipc, uint, call, int, first, unsigned long, second,
                 unsigned long, third, void __user *, ptr)
 {
         struct ipc_kludge tmp;
@@ -149,17 +131,6 @@ SYSCALL_DEFINE5(ipc, uint, call, int, first, unsigned long, second,
 }
 
 #ifdef CONFIG_64BIT
-SYSCALL_DEFINE1(s390_newuname, struct new_utsname __user *, name)
-{
-        int ret = sys_newuname(name);
-
-        if (personality(current->personality) == PER_LINUX32 && !ret) {
-                ret = copy_to_user(name->machine, "s390\0\0\0\0", 8);
-                if (ret) ret = -EFAULT;
-        }
-        return ret;
-}
-
 SYSCALL_DEFINE1(s390_personality, unsigned long, personality)
 {
         int ret;
diff --git a/arch/s390/kernel/syscalls.S b/arch/s390/kernel/syscalls.S
index 30eca070d42..201ce6bed34 100644
--- a/arch/s390/kernel/syscalls.S
+++ b/arch/s390/kernel/syscalls.S
@@ -98,7 +98,7 @@ SYSCALL(sys_uselib,sys_uselib,sys32_uselib_wrapper)
 SYSCALL(sys_swapon,sys_swapon,sys32_swapon_wrapper)
 SYSCALL(sys_reboot,sys_reboot,sys32_reboot_wrapper)
 SYSCALL(sys_ni_syscall,sys_ni_syscall,old32_readdir_wrapper)    /* old readdir syscall */
-SYSCALL(sys_s390_old_mmap,sys_s390_old_mmap,old32_mmap_wrapper) /* 90 */
+SYSCALL(sys_old_mmap,sys_old_mmap,old32_mmap_wrapper)           /* 90 */
 SYSCALL(sys_munmap,sys_munmap,sys32_munmap_wrapper)
 SYSCALL(sys_truncate,sys_truncate,sys32_truncate_wrapper)
 SYSCALL(sys_ftruncate,sys_ftruncate,sys32_ftruncate_wrapper)
@@ -125,12 +125,12 @@ NI_SYSCALL							/* vm86old for i386 */
 SYSCALL(sys_wait4,sys_wait4,compat_sys_wait4_wrapper)
 SYSCALL(sys_swapoff,sys_swapoff,sys32_swapoff_wrapper)          /* 115 */
 SYSCALL(sys_sysinfo,sys_sysinfo,compat_sys_sysinfo_wrapper)
-SYSCALL(sys_ipc,sys_ipc,sys32_ipc_wrapper)
+SYSCALL(sys_s390_ipc,sys_s390_ipc,sys32_ipc_wrapper)
 SYSCALL(sys_fsync,sys_fsync,sys32_fsync_wrapper)
 SYSCALL(sys_sigreturn,sys_sigreturn,sys32_sigreturn)
 SYSCALL(sys_clone,sys_clone,sys_clone_wrapper)                  /* 120 */
 SYSCALL(sys_setdomainname,sys_setdomainname,sys32_setdomainname_wrapper)
-SYSCALL(sys_newuname,sys_s390_newuname,sys32_newuname_wrapper)
+SYSCALL(sys_newuname,sys_newuname,sys32_newuname_wrapper)
 NI_SYSCALL                                                      /* modify_ldt for i386 */
 SYSCALL(sys_adjtimex,sys_adjtimex,compat_sys_adjtimex_wrapper)
 SYSCALL(sys_mprotect,sys_mprotect,sys32_mprotect_wrapper)       /* 125 */
diff --git a/arch/s390/kernel/sysinfo.c b/arch/s390/kernel/sysinfo.c
index b5e75e1061c..a0ffc7717ed 100644
--- a/arch/s390/kernel/sysinfo.c
+++ b/arch/s390/kernel/sysinfo.c
@@ -11,6 +11,7 @@
 #include <linux/init.h>
 #include <linux/delay.h>
 #include <linux/module.h>
+#include <linux/slab.h>
 #include <asm/ebcdic.h>
 #include <asm/sysinfo.h>
 #include <asm/cpcmd.h>
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c
index a8f93f1705a..d906bf19c14 100644
--- a/arch/s390/kernel/time.c
+++ b/arch/s390/kernel/time.c
@@ -36,6 +36,7 @@
 #include <linux/notifier.h>
 #include <linux/clocksource.h>
 #include <linux/clockchips.h>
+#include <linux/gfp.h>
 #include <asm/uaccess.h>
 #include <asm/delay.h>
 #include <asm/s390_ext.h>
@@ -73,15 +74,15 @@ unsigned long long monotonic_clock(void)
 }
 EXPORT_SYMBOL(monotonic_clock);
 
-void tod_to_timeval(__u64 todval, struct timespec *xtime)
+void tod_to_timeval(__u64 todval, struct timespec *xt)
 {
         unsigned long long sec;
 
         sec = todval >> 12;
         do_div(sec, 1000000);
-        xtime->tv_sec = sec;
+        xt->tv_sec = sec;
         todval -= (sec * 1000000) << 12;
-        xtime->tv_nsec = ((todval * 1000) >> 12);
+        xt->tv_nsec = ((todval * 1000) >> 12);
 }
 EXPORT_SYMBOL(tod_to_timeval);
 
@@ -216,10 +217,11 @@ void update_vsyscall(struct timespec *wall_time, struct clocksource *clock,
         ++vdso_data->tb_update_count;
         smp_wmb();
         vdso_data->xtime_tod_stamp = clock->cycle_last;
-        vdso_data->xtime_clock_sec = xtime.tv_sec;
-        vdso_data->xtime_clock_nsec = xtime.tv_nsec;
+        vdso_data->xtime_clock_sec = wall_time->tv_sec;
+        vdso_data->xtime_clock_nsec = wall_time->tv_nsec;
         vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
         vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
+        vdso_data->ntp_mult = mult;
         smp_wmb();
         ++vdso_data->tb_update_count;
 }
@@ -1116,14 +1118,18 @@ static struct sys_device etr_port1_dev = {
 /*
  * ETR class attributes
  */
-static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf)
+static ssize_t etr_stepping_port_show(struct sysdev_class *class,
+                                        struct sysdev_class_attribute *attr,
+                                        char *buf)
 {
         return sprintf(buf, "%i\n", etr_port0.esw.p);
 }
 
 static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
 
-static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf)
+static ssize_t etr_stepping_mode_show(struct sysdev_class *class,
+                                        struct sysdev_class_attribute *attr,
+                                        char *buf)
 {
         char *mode_str;
 
@@ -1584,7 +1590,9 @@ static struct sysdev_class stp_sysclass = {
         .name   = "stp",
 };
 
-static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf)
+static ssize_t stp_ctn_id_show(struct sysdev_class *class,
+                                struct sysdev_class_attribute *attr,
+                                char *buf)
 {
         if (!stp_online)
                 return -ENODATA;
@@ -1594,7 +1602,9 @@ static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf)
 
 static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
 
-static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf)
+static ssize_t stp_ctn_type_show(struct sysdev_class *class,
+                                struct sysdev_class_attribute *attr,
+                                char *buf)
 {
         if (!stp_online)
                 return -ENODATA;
@@ -1603,7 +1613,9 @@ static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf)
 
 static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
 
-static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf)
+static ssize_t stp_dst_offset_show(struct sysdev_class *class,
+                                   struct sysdev_class_attribute *attr,
+                                   char *buf)
 {
         if (!stp_online || !(stp_info.vbits & 0x2000))
                 return -ENODATA;
@@ -1612,7 +1624,9 @@ static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf)
 
 static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
 
-static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf)
+static ssize_t stp_leap_seconds_show(struct sysdev_class *class,
+                                        struct sysdev_class_attribute *attr,
+                                        char *buf)
 {
         if (!stp_online || !(stp_info.vbits & 0x8000))
                 return -ENODATA;
@@ -1621,7 +1635,9 @@ static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf)
 
 static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
 
-static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf)
+static ssize_t stp_stratum_show(struct sysdev_class *class,
+                                struct sysdev_class_attribute *attr,
+                                char *buf)
 {
         if (!stp_online)
                 return -ENODATA;
@@ -1630,7 +1646,9 @@ static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf)
 
 static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
 
-static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf)
+static ssize_t stp_time_offset_show(struct sysdev_class *class,
+                                struct sysdev_class_attribute *attr,
+                                char *buf)
 {
         if (!stp_online || !(stp_info.vbits & 0x0800))
                 return -ENODATA;
@@ -1639,7 +1657,9 @@ static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf)
 
 static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
 
-static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf)
+static ssize_t stp_time_zone_offset_show(struct sysdev_class *class,
+                                struct sysdev_class_attribute *attr,
+                                char *buf)
 {
         if (!stp_online || !(stp_info.vbits & 0x4000))
                 return -ENODATA;
@@ -1649,7 +1669,9 @@ static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf)
 static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
                          stp_time_zone_offset_show, NULL);
 
-static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf)
+static ssize_t stp_timing_mode_show(struct sysdev_class *class,
+                                struct sysdev_class_attribute *attr,
+                                char *buf)
 {
         if (!stp_online)
                 return -ENODATA;
@@ -1658,7 +1680,9 @@ static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf)
 
 static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
 
-static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf)
+static ssize_t stp_timing_state_show(struct sysdev_class *class,
+                                struct sysdev_class_attribute *attr,
+                                char *buf)
 {
         if (!stp_online)
                 return -ENODATA;
@@ -1667,12 +1691,15 @@ static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf)
 
 static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
 
-static ssize_t stp_online_show(struct sysdev_class *class, char *buf)
+static ssize_t stp_online_show(struct sysdev_class *class,
+                                struct sysdev_class_attribute *attr,
+                                char *buf)
 {
         return sprintf(buf, "%i\n", stp_online);
 }
 
 static ssize_t stp_online_store(struct sysdev_class *class,
+                                struct sysdev_class_attribute *attr,
                                 const char *buf, size_t count)
 {
         unsigned int value;
diff --git a/arch/s390/kernel/topology.c b/arch/s390/kernel/topology.c
index 14ef6f05e43..247b4c2d1e5 100644
--- a/arch/s390/kernel/topology.c
+++ b/arch/s390/kernel/topology.c
@@ -165,10 +165,11 @@ static void tl_to_cores(struct tl_info *info)
                 default:
                         clear_cores();
                         machine_has_topology = 0;
-                        return;
+                        goto out;
                 }
                 tle = next_tle(tle);
         }
+out:
         spin_unlock_irq(&topology_lock);
 }
 
diff --git a/arch/s390/kernel/vdso32/clock_gettime.S b/arch/s390/kernel/vdso32/clock_gettime.S
index 4a98909a831..96964395427 100644
--- a/arch/s390/kernel/vdso32/clock_gettime.S
+++ b/arch/s390/kernel/vdso32/clock_gettime.S
@@ -38,13 +38,13 @@ __kernel_clock_gettime:
         sl      %r1,__VDSO_XTIME_STAMP+4(%r5)
         brc     3,2f
         ahi     %r0,-1
-2:      mhi     %r0,1000                        /* cyc2ns(clock,cycle_delta) */
+2:      ms      %r0,__VDSO_NTP_MULT(%r5)        /* cyc2ns(clock,cycle_delta) */
         lr      %r2,%r0
-        lhi     %r0,1000
+        l       %r0,__VDSO_NTP_MULT(%r5)
         ltr     %r1,%r1
         mr      %r0,%r0
         jnm     3f
-        ahi     %r0,1000
+        a       %r0,__VDSO_NTP_MULT(%r5)
 3:      alr     %r0,%r2
         srdl    %r0,12
         al      %r0,__VDSO_XTIME_NSEC(%r5)      /*  + xtime */
@@ -86,13 +86,13 @@ __kernel_clock_gettime:
         sl      %r1,__VDSO_XTIME_STAMP+4(%r5)
         brc     3,12f
         ahi     %r0,-1
-12:     mhi     %r0,1000                        /* cyc2ns(clock,cycle_delta) */
+12:     ms      %r0,__VDSO_NTP_MULT(%r5)        /* cyc2ns(clock,cycle_delta) */
         lr      %r2,%r0
-        lhi     %r0,1000
+        l       %r0,__VDSO_NTP_MULT(%r5)
         ltr     %r1,%r1
         mr      %r0,%r0
         jnm     13f
-        ahi     %r0,1000
+        a       %r0,__VDSO_NTP_MULT(%r5)
 13:     alr     %r0,%r2
         srdl    %r0,12
         al      %r0,__VDSO_XTIME_NSEC(%r5)      /*  + xtime */
diff --git a/arch/s390/kernel/vdso32/gettimeofday.S b/arch/s390/kernel/vdso32/gettimeofday.S
index ad8acfc949f..2d3633175e3 100644
--- a/arch/s390/kernel/vdso32/gettimeofday.S
+++ b/arch/s390/kernel/vdso32/gettimeofday.S
@@ -35,13 +35,13 @@ __kernel_gettimeofday:
         sl      %r1,__VDSO_XTIME_STAMP+4(%r5)
         brc     3,3f
         ahi     %r0,-1
-3:      mhi     %r0,1000                        /* cyc2ns(clock,cycle_delta) */
+3:      ms      %r0,__VDSO_NTP_MULT(%r5)        /* cyc2ns(clock,cycle_delta) */
         st      %r0,24(%r15)
-        lhi     %r0,1000
+        l       %r0,__VDSO_NTP_MULT(%r5)
         ltr     %r1,%r1
         mr      %r0,%r0
         jnm     4f
-        ahi     %r0,1000
+        a       %r0,__VDSO_NTP_MULT(%r5)
 4:      al      %r0,24(%r15)
         srdl    %r0,12
         al      %r0,__VDSO_XTIME_NSEC(%r5)      /*  + xtime */
diff --git a/arch/s390/kernel/vdso64/clock_gettime.S b/arch/s390/kernel/vdso64/clock_gettime.S
index 49106c6e6f8..f40467884a0 100644
--- a/arch/s390/kernel/vdso64/clock_gettime.S
+++ b/arch/s390/kernel/vdso64/clock_gettime.S
@@ -36,7 +36,7 @@ __kernel_clock_gettime:
         stck    48(%r15)                        /* Store TOD clock */
         lg      %r1,48(%r15)
         sg      %r1,__VDSO_XTIME_STAMP(%r5)     /* TOD - cycle_last */
-        mghi    %r1,1000
+        msgf    %r1,__VDSO_NTP_MULT(%r5)        /*  * NTP adjustment */
         srlg    %r1,%r1,12                      /* cyc2ns(clock,cycle_delta) */
         alg     %r1,__VDSO_XTIME_NSEC(%r5)      /*  + xtime */
         lg      %r0,__VDSO_XTIME_SEC(%r5)
@@ -64,7 +64,7 @@ __kernel_clock_gettime:
         stck    48(%r15)                        /* Store TOD clock */
         lg      %r1,48(%r15)
         sg      %r1,__VDSO_XTIME_STAMP(%r5)     /* TOD - cycle_last */
-        mghi    %r1,1000
+        msgf    %r1,__VDSO_NTP_MULT(%r5)        /*  * NTP adjustment */
         srlg    %r1,%r1,12                      /* cyc2ns(clock,cycle_delta) */
         alg     %r1,__VDSO_XTIME_NSEC(%r5)      /*  + xtime */
         lg      %r0,__VDSO_XTIME_SEC(%r5)
diff --git a/arch/s390/kernel/vdso64/gettimeofday.S b/arch/s390/kernel/vdso64/gettimeofday.S
index f873e75634e..36ee674722e 100644
--- a/arch/s390/kernel/vdso64/gettimeofday.S
+++ b/arch/s390/kernel/vdso64/gettimeofday.S
@@ -31,7 +31,7 @@ __kernel_gettimeofday:
         stck    48(%r15)                        /* Store TOD clock */
         lg      %r1,48(%r15)
         sg      %r1,__VDSO_XTIME_STAMP(%r5)     /* TOD - cycle_last */
-        mghi    %r1,1000
+        msgf    %r1,__VDSO_NTP_MULT(%r5)        /*  * NTP adjustment */
         srlg    %r1,%r1,12                      /* cyc2ns(clock,cycle_delta) */
         alg     %r1,__VDSO_XTIME_NSEC(%r5)      /*  + xtime.tv_nsec */
         lg      %r0,__VDSO_XTIME_SEC(%r5)       /* xtime.tv_sec */
diff --git a/arch/s390/kvm/interrupt.c b/arch/s390/kvm/interrupt.c
index 834774d8d5f..35c21bf910c 100644
--- a/arch/s390/kvm/interrupt.c
+++ b/arch/s390/kvm/interrupt.c
@@ -14,6 +14,7 @@
 #include <linux/kvm_host.h>
 #include <linux/hrtimer.h>
 #include <linux/signal.h>
+#include <linux/slab.h>
 #include <asm/asm-offsets.h>
 #include <asm/uaccess.h>
 #include "kvm-s390.h"
diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c
index 3fa0a10e466..49292869a5c 100644
--- a/arch/s390/kvm/kvm-s390.c
+++ b/arch/s390/kvm/kvm-s390.c
@@ -242,6 +242,7 @@ void kvm_arch_destroy_vm(struct kvm *kvm)
         kvm_free_physmem(kvm);
         free_page((unsigned long)(kvm->arch.sca));
         debug_unregister(kvm->arch.dbf);
+        cleanup_srcu_struct(&kvm->srcu);
         kfree(kvm);
 }
 
@@ -690,14 +691,12 @@ long kvm_arch_vcpu_ioctl(struct file *filp,
 }
 
 /* Section: memory related */
-int kvm_arch_set_memory_region(struct kvm *kvm,
-                                struct kvm_userspace_memory_region *mem,
-                                struct kvm_memory_slot old,
-                                int user_alloc)
+int kvm_arch_prepare_memory_region(struct kvm *kvm,
+                                   struct kvm_memory_slot *memslot,
+                                   struct kvm_memory_slot old,
+                                   struct kvm_userspace_memory_region *mem,
+                                   int user_alloc)
 {
-        int i;
-        struct kvm_vcpu *vcpu;
-
         /* A few sanity checks. We can have exactly one memory slot which has
            to start at guest virtual zero and which has to be located at a
            page boundary in userland and which has to end at a page boundary.
@@ -720,14 +719,23 @@ int kvm_arch_set_memory_region(struct kvm *kvm,
         if (!user_alloc)
                 return -EINVAL;
 
+        return 0;
+}
+
+void kvm_arch_commit_memory_region(struct kvm *kvm,
+                                struct kvm_userspace_memory_region *mem,
+                                struct kvm_memory_slot old,
+                                int user_alloc)
+{
+        int i;
+        struct kvm_vcpu *vcpu;
+
         /* request update of sie control block for all available vcpus */
         kvm_for_each_vcpu(i, vcpu, kvm) {
                 if (test_and_set_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
                         continue;
                 kvm_s390_inject_sigp_stop(vcpu, ACTION_RELOADVCPU_ON_STOP);
         }
-
-        return 0;
 }
 
 void kvm_arch_flush_shadow(struct kvm *kvm)
diff --git a/arch/s390/kvm/kvm-s390.h b/arch/s390/kvm/kvm-s390.h
index 06cce8285ba..60f09ab3672 100644
--- a/arch/s390/kvm/kvm-s390.h
+++ b/arch/s390/kvm/kvm-s390.h
@@ -67,10 +67,14 @@ static inline long kvm_s390_vcpu_get_memsize(struct kvm_vcpu *vcpu)
 
 static inline void kvm_s390_vcpu_set_mem(struct kvm_vcpu *vcpu)
 {
+        int idx;
         struct kvm_memory_slot *mem;
+        struct kvm_memslots *memslots;
 
-        down_read(&vcpu->kvm->slots_lock);
-        mem = &vcpu->kvm->memslots[0];
+        idx = srcu_read_lock(&vcpu->kvm->srcu);
+        memslots = rcu_dereference(vcpu->kvm->memslots);
+
+        mem = &memslots->memslots[0];
 
         vcpu->arch.sie_block->gmsor = mem->userspace_addr;
         vcpu->arch.sie_block->gmslm =
@@ -78,7 +82,7 @@ static inline void kvm_s390_vcpu_set_mem(struct kvm_vcpu *vcpu)
                 (mem->npages << PAGE_SHIFT) +
                 VIRTIODESCSPACE - 1ul;
 
-        up_read(&vcpu->kvm->slots_lock);
+        srcu_read_unlock(&vcpu->kvm->srcu, idx);
 }
 
 /* implemented in priv.c */
diff --git a/arch/s390/kvm/priv.c b/arch/s390/kvm/priv.c
index 28c55677eb3..44205507717 100644
--- a/arch/s390/kvm/priv.c
+++ b/arch/s390/kvm/priv.c
@@ -12,6 +12,7 @@
  */
 
 #include <linux/kvm.h>
+#include <linux/gfp.h>
 #include <linux/errno.h>
 #include <asm/current.h>
 #include <asm/debug.h>
diff --git a/arch/s390/kvm/sigp.c b/arch/s390/kvm/sigp.c
index 241a48459b6..eff3c5989b4 100644
--- a/arch/s390/kvm/sigp.c
+++ b/arch/s390/kvm/sigp.c
@@ -14,6 +14,7 @@
 
 #include <linux/kvm.h>
 #include <linux/kvm_host.h>
+#include <linux/slab.h>
 #include "gaccess.h"
 #include "kvm-s390.h"
 
diff --git a/arch/s390/lib/Makefile b/arch/s390/lib/Makefile
index cd54a1c352a..761ab8b56af 100644
--- a/arch/s390/lib/Makefile
+++ b/arch/s390/lib/Makefile
@@ -2,7 +2,8 @@
 # Makefile for s390-specific library files..
 #
 
-lib-y += delay.o string.o uaccess_std.o uaccess_pt.o usercopy.o
+lib-y += delay.o string.o uaccess_std.o uaccess_pt.o
+obj-y += usercopy.o
 obj-$(CONFIG_32BIT) += div64.o qrnnd.o ucmpdi2.o
 lib-$(CONFIG_64BIT) += uaccess_mvcos.o
 lib-$(CONFIG_SMP) += spinlock.o
diff --git a/arch/s390/mm/cmm.c b/arch/s390/mm/cmm.c
index 76a3637b88e..f87b34731e1 100644
--- a/arch/s390/mm/cmm.c
+++ b/arch/s390/mm/cmm.c
@@ -12,6 +12,7 @@
 #include <linux/fs.h>
 #include <linux/init.h>
 #include <linux/module.h>
+#include <linux/gfp.h>
 #include <linux/sched.h>
 #include <linux/sysctl.h>
 #include <linux/ctype.h>
@@ -374,7 +375,7 @@ static struct ctl_table cmm_dir_table[] = {
 #ifdef CONFIG_CMM_IUCV
 #define SMSG_PREFIX "CMM"
 static void
-cmm_smsg_target(char *from, char *msg)
+cmm_smsg_target(const char *from, char *msg)
 {
         long nr, seconds;
 
diff --git a/arch/s390/mm/init.c b/arch/s390/mm/init.c
index d5865e4024c..acc91c75bc9 100644
--- a/arch/s390/mm/init.c
+++ b/arch/s390/mm/init.c
@@ -26,6 +26,7 @@
 #include <linux/pfn.h>
 #include <linux/poison.h>
 #include <linux/initrd.h>
+#include <linux/gfp.h>
 #include <asm/processor.h>
 #include <asm/system.h>
 #include <asm/uaccess.h>
diff --git a/arch/s390/mm/maccess.c b/arch/s390/mm/maccess.c
index 81756271dc4..a8c2af8c650 100644
--- a/arch/s390/mm/maccess.c
+++ b/arch/s390/mm/maccess.c
@@ -59,3 +59,29 @@ long probe_kernel_write(void *dst, void *src, size_t size)
         }
         return copied < 0 ? -EFAULT : 0;
 }
+
+int memcpy_real(void *dest, void *src, size_t count)
+{
+        register unsigned long _dest asm("2") = (unsigned long) dest;
+        register unsigned long _len1 asm("3") = (unsigned long) count;
+        register unsigned long _src  asm("4") = (unsigned long) src;
+        register unsigned long _len2 asm("5") = (unsigned long) count;
+        unsigned long flags;
+        int rc = -EFAULT;
+
+        if (!count)
+                return 0;
+        flags = __raw_local_irq_stnsm(0xf8UL);
+        asm volatile (
+                "0:     mvcle   %1,%2,0x0\n"
+                "1:     jo      0b\n"
+                "       lhi     %0,0x0\n"
+                "2:\n"
+                EX_TABLE(1b,2b)
+                : "+d" (rc), "+d" (_dest), "+d" (_src), "+d" (_len1),
+                  "+d" (_len2), "=m" (*((long *) dest))
+                : "m" (*((long *) src))
+                : "cc", "memory");
+        __raw_local_irq_ssm(flags);
+        return rc;
+}
diff --git a/arch/s390/mm/page-states.c b/arch/s390/mm/page-states.c
index 098923ae458..a90d45e9dfb 100644
--- a/arch/s390/mm/page-states.c
+++ b/arch/s390/mm/page-states.c
@@ -10,6 +10,7 @@
 #include <linux/errno.h>
 #include <linux/types.h>
 #include <linux/mm.h>
+#include <linux/gfp.h>
 #include <linux/init.h>
 
 #define ESSA_SET_STABLE         1
diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c
index ad621e06ada..8d999249d35 100644
--- a/arch/s390/mm/pgtable.c
+++ b/arch/s390/mm/pgtable.c
@@ -6,11 +6,11 @@
 #include <linux/sched.h>
 #include <linux/kernel.h>
 #include <linux/errno.h>
+#include <linux/gfp.h>
 #include <linux/mm.h>
 #include <linux/swap.h>
 #include <linux/smp.h>
 #include <linux/highmem.h>
-#include <linux/slab.h>
 #include <linux/pagemap.h>
 #include <linux/spinlock.h>
 #include <linux/module.h>
diff --git a/arch/s390/mm/vmem.c b/arch/s390/mm/vmem.c
index 300ab012b0f..90165e7ca04 100644
--- a/arch/s390/mm/vmem.c
+++ b/arch/s390/mm/vmem.c
@@ -11,6 +11,7 @@
 #include <linux/module.h>
 #include <linux/list.h>
 #include <linux/hugetlb.h>
+#include <linux/slab.h>
 #include <asm/pgalloc.h>
 #include <asm/pgtable.h>
 #include <asm/setup.h>
@@ -70,12 +71,8 @@ static pte_t __ref *vmem_pte_alloc(void)
                 pte = alloc_bootmem(PTRS_PER_PTE * sizeof(pte_t));
         if (!pte)
                 return NULL;
-        if (MACHINE_HAS_HPAGE)
-                clear_table((unsigned long *) pte, _PAGE_TYPE_EMPTY | _PAGE_CO,
-                            PTRS_PER_PTE * sizeof(pte_t));
-        else
-                clear_table((unsigned long *) pte, _PAGE_TYPE_EMPTY,
-                            PTRS_PER_PTE * sizeof(pte_t));
+        clear_table((unsigned long *) pte, _PAGE_TYPE_EMPTY,
+                    PTRS_PER_PTE * sizeof(pte_t));
         return pte;
 }
 
@@ -116,8 +113,7 @@ static int vmem_add_mem(unsigned long start, unsigned long size, int ro)
                 if (MACHINE_HAS_HPAGE && !(address & ~HPAGE_MASK) &&
                     (address + HPAGE_SIZE <= start + size) &&
                     (address >= HPAGE_SIZE)) {
-                        pte_val(pte) |= _SEGMENT_ENTRY_LARGE |
-                                        _SEGMENT_ENTRY_CO;
+                        pte_val(pte) |= _SEGMENT_ENTRY_LARGE;
                         pmd_val(*pm_dir) = pte_val(pte);
                         address += HPAGE_SIZE - PAGE_SIZE;
                         continue;
diff --git a/arch/score/include/asm/ptrace.h b/arch/score/include/asm/ptrace.h
index d40e691f23e..e89dc9b1ef4 100644
--- a/arch/score/include/asm/ptrace.h
+++ b/arch/score/include/asm/ptrace.h
@@ -90,8 +90,7 @@ extern int read_tsk_short(struct task_struct *, unsigned long,
                          unsigned short *);
 
 #define arch_has_single_step()  (1)
-extern void user_enable_single_step(struct task_struct *);
-extern void user_disable_single_step(struct task_struct *);
+
 #endif /* __KERNEL__ */
 
 #endif /* _ASM_SCORE_PTRACE_H */
diff --git a/arch/score/kernel/sys_score.c b/arch/score/kernel/sys_score.c
index 856ed68a58e..651096ff8db 100644
--- a/arch/score/kernel/sys_score.c
+++ b/arch/score/kernel/sys_score.c
@@ -28,6 +28,7 @@
 #include <linux/mm.h>
 #include <linux/mman.h>
 #include <linux/module.h>
+#include <linux/slab.h>
 #include <linux/unistd.h>
 #include <linux/syscalls.h>
 #include <asm/syscalls.h>
diff --git a/arch/score/mm/init.c b/arch/score/mm/init.c
index 7f001bbedb0..50fdec54c70 100644
--- a/arch/score/mm/init.c
+++ b/arch/score/mm/init.c
@@ -26,6 +26,7 @@
 #include <linux/errno.h>
 #include <linux/bootmem.h>
 #include <linux/kernel.h>
+#include <linux/gfp.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/mman.h>
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 05cef506129..8d90564c2bc 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -183,6 +183,9 @@ config DMA_COHERENT
 config DMA_NONCOHERENT
         def_bool !DMA_COHERENT
 
+config NEED_DMA_MAP_STATE
+        def_bool DMA_NONCOHERENT
+
 source "init/Kconfig"
 
 source "kernel/Kconfig.freezer"
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index 39ed8722d11..6c13b92742e 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -836,6 +836,8 @@ static void __init sh_eth_init(struct sh_eth_plat_data *pd)
                 pd->mac_addr[i] = mac_read(a, 0x10 + i);
                 msleep(10);
         }
+
+        i2c_put_adapter(a);
 }
 #else
 static void __init sh_eth_init(struct sh_eth_plat_data *pd)
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index be300aaca6f..7da0fc94a01 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -419,6 +419,9 @@ static struct i2c_board_info migor_i2c_devices[] = {
                 I2C_BOARD_INFO("migor_ts", 0x51),
                 .irq = 38, /* IRQ6 */
         },
+        {
+                I2C_BOARD_INFO("wm8978", 0x1a),
+        },
 };
 
 static struct i2c_board_info migor_i2c_camera[] = {
@@ -619,6 +622,19 @@ static int __init migor_devices_setup(void)
 
         platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20);
 
+        /* SIU: Port B */
+        gpio_request(GPIO_FN_SIUBOLR, NULL);
+        gpio_request(GPIO_FN_SIUBOBT, NULL);
+        gpio_request(GPIO_FN_SIUBISLD, NULL);
+        gpio_request(GPIO_FN_SIUBOSLD, NULL);
+        gpio_request(GPIO_FN_SIUMCKB, NULL);
+
+        /*
+         * The original driver sets SIUB OLR/OBT, ILR/IBT, and SIUA OLR/OBT to
+         * output. Need only SIUB, set to output for master mode (table 34.2)
+         */
+        __raw_writew(__raw_readw(PORT_MSELCRA) | 1, PORT_MSELCRA);
+
         i2c_register_board_info(0, migor_i2c_devices,
                                 ARRAY_SIZE(migor_i2c_devices));
 
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
index 66cdbc3c7af..ccaa290e9ab 100644
--- a/arch/sh/boards/mach-se/7724/setup.c
+++ b/arch/sh/boards/mach-se/7724/setup.c
@@ -52,6 +52,13 @@
  * and change SW41 to use 720p
  */
 
+/*
+ * about sound
+ *
+ * This setup.c supports FSI slave mode.
+ * Please change J20, J21, J22 pin to 1-2 connection.
+ */
+
 /* Heartbeat */
 static struct resource heartbeat_resource = {
         .start  = PA_LED,
@@ -276,6 +283,7 @@ static struct clk fsimcka_clk = {
         .rate           = 0, /* unknown */
 };
 
+/* change J20, J21, J22 pin to 1-2 connection to use slave mode */
 struct sh_fsi_platform_info fsi_info = {
         .porta_flags = SH_FSI_BRS_INV |
                        SH_FSI_OUT_SLAVE_MODE |
diff --git a/arch/sh/boot/compressed/cache.c b/arch/sh/boot/compressed/cache.c
index e27fc74f228..d0b77b68a4d 100644
--- a/arch/sh/boot/compressed/cache.c
+++ b/arch/sh/boot/compressed/cache.c
@@ -5,7 +5,7 @@ int cache_control(unsigned int command)
 
         for (i = 0; i < (32 * 1024); i += 32) {
                 (void)*p;
-                p += (32 / sizeof (int));
+                p += (32 / sizeof(int));
         }
 
         return 0;
diff --git a/arch/sh/configs/ecovec24_defconfig b/arch/sh/configs/ecovec24_defconfig
index 18e3356406f..6041c66dd10 100644
--- a/arch/sh/configs/ecovec24_defconfig
+++ b/arch/sh/configs/ecovec24_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc2
-# Mon Jan  4 11:20:36 2010
+# Linux kernel version: 2.6.34-rc2
+# Mon Mar 29 02:21:58 2010
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
-CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_IRQ_PER_CPU=y
+CONFIG_SPARSE_IRQ=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -32,6 +32,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
 CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DMA_NONCOHERENT=y
+CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 CONFIG_CONSTRUCTORS=y
 
@@ -47,9 +48,11 @@ CONFIG_LOCALVERSION=""
 CONFIG_HAVE_KERNEL_GZIP=y
 CONFIG_HAVE_KERNEL_BZIP2=y
 CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_LZO=y
 CONFIG_KERNEL_GZIP=y
 # CONFIG_KERNEL_BZIP2 is not set
 # CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -71,14 +74,8 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_GROUP_SCHED=y
-CONFIG_FAIR_GROUP_SCHED=y
-# CONFIG_RT_GROUP_SCHED is not set
-CONFIG_USER_SCHED=y
-# CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 # CONFIG_BLK_DEV_INITRD is not set
@@ -107,7 +104,7 @@ CONFIG_PERF_USE_VMALLOC=y
 #
 # Kernel Performance Events And Counters
 #
-# CONFIG_PERF_EVENTS is not set
+CONFIG_PERF_EVENTS=y
 # CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_COMPAT_BRK=y
@@ -116,13 +113,13 @@ CONFIG_SLAB=y
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
 CONFIG_HAVE_OPROFILE=y
-CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_DMA_ATTRS=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_HW_BREAKPOINT=y
 
 #
 # GCOV-based kernel profiling
@@ -234,12 +231,12 @@ CONFIG_CPU_SUBTYPE_SH7724=y
 CONFIG_QUICKLIST=y
 CONFIG_MMU=y
 CONFIG_PAGE_OFFSET=0x80000000
-CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_FORCE_MAX_ZONEORDER=12
 CONFIG_MEMORY_START=0x08000000
 CONFIG_MEMORY_SIZE=0x10000000
 CONFIG_29BIT=y
-# CONFIG_PMB_ENABLE is not set
-# CONFIG_X2TLB is not set
+# CONFIG_PMB is not set
+CONFIG_X2TLB=y
 CONFIG_VSYSCALL=y
 CONFIG_ARCH_FLATMEM_ENABLE=y
 CONFIG_ARCH_SPARSEMEM_ENABLE=y
@@ -247,6 +244,8 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
 CONFIG_MAX_ACTIVE_REGIONS=1
 CONFIG_ARCH_POPULATES_NODE_MAP=y
 CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_IOREMAP_FIXED=y
+CONFIG_UNCACHED_MAPPING=y
 CONFIG_PAGE_SIZE_4KB=y
 # CONFIG_PAGE_SIZE_8KB is not set
 # CONFIG_PAGE_SIZE_16KB is not set
@@ -262,7 +261,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=0
-CONFIG_NR_QUICK=2
+CONFIG_NR_QUICK=1
 # CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
@@ -337,7 +336,6 @@ CONFIG_SECCOMP=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 CONFIG_PREEMPT=y
 CONFIG_GUSA=y
-# CONFIG_SPARSE_IRQ is not set
 
 #
 # Boot options
@@ -347,7 +345,7 @@ CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
 CONFIG_CMDLINE_OVERWRITE=y
 # CONFIG_CMDLINE_EXTEND is not set
-CONFIG_CMDLINE="console=tty0, console=ttySC0,115200 root=/dev/nfs ip=dhcp mem=120M memchunk.vpu=4m"
+CONFIG_CMDLINE="console=tty0, console=ttySC0,115200 root=/dev/nfs ip=dhcp mem=248M memchunk.vpu=8m memchunk.veu0=4m"
 
 #
 # Bus options
@@ -373,6 +371,7 @@ CONFIG_SUSPEND=y
 CONFIG_SUSPEND_FREEZER=y
 # CONFIG_HIBERNATION is not set
 CONFIG_PM_RUNTIME=y
+CONFIG_PM_OPS=y
 # CONFIG_CPU_IDLE is not set
 CONFIG_NET=y
 
@@ -380,7 +379,6 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
@@ -445,7 +443,45 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_HAMRADIO is not set
 # CONFIG_CAN is not set
-# CONFIG_IRDA is not set
+CONFIG_IRDA=y
+
+#
+# IrDA protocols
+#
+# CONFIG_IRLAN is not set
+# CONFIG_IRCOMM is not set
+# CONFIG_IRDA_ULTRA is not set
+
+#
+# IrDA options
+#
+# CONFIG_IRDA_CACHE_LAST_LSAP is not set
+# CONFIG_IRDA_FAST_RR is not set
+# CONFIG_IRDA_DEBUG is not set
+
+#
+# Infrared-port device drivers
+#
+
+#
+# SIR device drivers
+#
+# CONFIG_IRTTY_SIR is not set
+
+#
+# Dongle support
+#
+CONFIG_SH_SIR=y
+# CONFIG_KINGSUN_DONGLE is not set
+# CONFIG_KSDAZZLE_DONGLE is not set
+# CONFIG_KS959_DONGLE is not set
+
+#
+# FIR device drivers
+#
+# CONFIG_USB_IRDA is not set
+# CONFIG_SIGMATEL_FIR is not set
+# CONFIG_MCS_FIR is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
@@ -556,6 +592,7 @@ CONFIG_MTD_NAND_IDS=y
 # CONFIG_MTD_NAND_NANDSIM is not set
 # CONFIG_MTD_NAND_PLATFORM is not set
 # CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_NAND_SH_FLCTL is not set
 # CONFIG_MTD_ONENAND is not set
 
 #
@@ -597,6 +634,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ICS932S401 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_TI_DAC7512 is not set
 # CONFIG_C2PORT is not set
@@ -616,6 +654,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -768,7 +807,29 @@ CONFIG_KEYBOARD_SH_KEYSC=y
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
+# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_EETI is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+CONFIG_TOUCHSCREEN_TSC2007=y
+# CONFIG_TOUCHSCREEN_W90X900 is not set
 # CONFIG_INPUT_MISC is not set
 
 #
@@ -802,10 +863,10 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=6
 CONFIG_SERIAL_SH_SCI_CONSOLE=y
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_LEGACY_PTYS is not set
 # CONFIG_IPMI_HANDLER is not set
 CONFIG_HW_RANDOM=y
 # CONFIG_HW_RANDOM_TIMERIOMEM is not set
@@ -830,6 +891,7 @@ CONFIG_I2C_HELPER_AUTO=y
 # CONFIG_I2C_OCORES is not set
 CONFIG_I2C_SH_MOBILE=y
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -843,15 +905,9 @@ CONFIG_I2C_SH_MOBILE=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 CONFIG_SPI=y
 CONFIG_SPI_MASTER=y
 
@@ -882,13 +938,16 @@ CONFIG_GPIOLIB=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 
 #
 # I2C GPIO expanders:
 #
+# CONFIG_GPIO_MAX7300 is not set
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
 
 #
 # PCI GPIO expanders:
@@ -919,23 +978,26 @@ CONFIG_SSB_POSSIBLE=y
 #
 # Multifunction device drivers
 #
-# CONFIG_MFD_CORE is not set
+CONFIG_MFD_CORE=y
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
-# CONFIG_MFD_SH_MOBILE_SDHI is not set
+CONFIG_MFD_SH_MOBILE_SDHI=y
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
 # CONFIG_TPS65010 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_MFD_MC13783 is not set
 # CONFIG_AB3100_CORE is not set
 # CONFIG_EZX_PCAP is not set
-# CONFIG_MFD_88PM8607 is not set
 # CONFIG_AB4500_CORE is not set
 # CONFIG_REGULATOR is not set
 CONFIG_MEDIA_SUPPORT=y
@@ -985,10 +1047,10 @@ CONFIG_SOC_CAMERA=y
 # CONFIG_SOC_CAMERA_MT9M001 is not set
 # CONFIG_SOC_CAMERA_MT9M111 is not set
 # CONFIG_SOC_CAMERA_MT9T031 is not set
-# CONFIG_SOC_CAMERA_MT9T112 is not set
+CONFIG_SOC_CAMERA_MT9T112=y
 # CONFIG_SOC_CAMERA_MT9V022 is not set
 # CONFIG_SOC_CAMERA_RJ54N1 is not set
-# CONFIG_SOC_CAMERA_TW9910 is not set
+CONFIG_SOC_CAMERA_TW9910=y
 # CONFIG_SOC_CAMERA_PLATFORM is not set
 # CONFIG_SOC_CAMERA_OV772X is not set
 # CONFIG_SOC_CAMERA_OV9640 is not set
@@ -1001,6 +1063,7 @@ CONFIG_RADIO_ADAPTERS=y
 # CONFIG_RADIO_SI470X is not set
 # CONFIG_USB_MR800 is not set
 # CONFIG_RADIO_TEA5764 is not set
+# CONFIG_RADIO_SAA7706H is not set
 # CONFIG_RADIO_TEF6862 is not set
 # CONFIG_DAB is not set
 
@@ -1034,6 +1097,7 @@ CONFIG_FB_DEFERRED_IO=y
 #
 # CONFIG_FB_S1D13XXX is not set
 CONFIG_FB_SH_MOBILE_LCDC=y
+# CONFIG_FB_TMIO is not set
 # CONFIG_FB_VIRTUAL is not set
 # CONFIG_FB_METRONOME is not set
 # CONFIG_FB_MB862XX is not set
@@ -1062,7 +1126,46 @@ CONFIG_LOGO=y
 # CONFIG_LOGO_SUPERH_MONO is not set
 # CONFIG_LOGO_SUPERH_VGA16 is not set
 CONFIG_LOGO_SUPERH_CLUT224=y
-# CONFIG_SOUND is not set
+CONFIG_SOUND=y
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_JACK=y
+CONFIG_SND_SEQUENCER=y
+CONFIG_SND_SEQ_DUMMY=y
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_SEQUENCER_OSS is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_SPI is not set
+CONFIG_SND_SUPERH=y
+# CONFIG_SND_USB is not set
+CONFIG_SND_SOC=y
+
+#
+# SoC Audio support for SuperH
+#
+CONFIG_SND_SOC_SH4_FSI=y
+# CONFIG_SND_FSI_AK4642 is not set
+CONFIG_SND_FSI_DA7210=y
+CONFIG_SND_SOC_I2C_AND_SPI=y
+# CONFIG_SND_SOC_ALL_CODECS is not set
+CONFIG_SND_SOC_DA7210=y
+# CONFIG_SOUND_PRIME is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
 # CONFIG_HIDRAW is not set
@@ -1077,6 +1180,7 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
+# CONFIG_HID_3M_PCT is not set
 # CONFIG_HID_A4TECH is not set
 # CONFIG_HID_APPLE is not set
 # CONFIG_HID_BELKIN is not set
@@ -1091,12 +1195,16 @@ CONFIG_USB_HID=y
 # CONFIG_HID_KENSINGTON is not set
 # CONFIG_HID_LOGITECH is not set
 # CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MOSART is not set
 # CONFIG_HID_MONTEREY is not set
 # CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
 # CONFIG_HID_PANTHERLORD is not set
 # CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_QUANTA is not set
 # CONFIG_HID_SAMSUNG is not set
 # CONFIG_HID_SONY is not set
+# CONFIG_HID_STANTUM is not set
 # CONFIG_HID_SUNPLUS is not set
 # CONFIG_HID_GREENASIA is not set
 # CONFIG_HID_SMARTJOYPLUS is not set
@@ -1136,6 +1244,7 @@ CONFIG_USB_MON=y
 # CONFIG_USB_SL811_HCD is not set
 CONFIG_USB_R8A66597_HCD=y
 # CONFIG_USB_HWA_HCD is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
 
 #
 # USB Device Class drivers
@@ -1188,7 +1297,6 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1200,8 +1308,45 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
-# CONFIG_USB_GADGET is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+CONFIG_USB_GADGET_R8A66597=y
+CONFIG_USB_R8A66597=y
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C_HSOTG is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LANGWELL is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_GADGETFS is not set
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+# CONFIG_USB_MASS_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_USB_G_NOKIA is not set
+# CONFIG_USB_G_MULTI is not set
 
 #
 # OTG and related infrastructure
@@ -1224,10 +1369,8 @@ CONFIG_MMC_BLOCK_BOUNCE=y
 # MMC/SD/SDIO Host Controller Drivers
 #
 # CONFIG_MMC_SDHCI is not set
-# CONFIG_MMC_AT91 is not set
-# CONFIG_MMC_ATMELMCI is not set
 CONFIG_MMC_SPI=y
-# CONFIG_MMC_TMIO is not set
+CONFIG_MMC_TMIO=y
 # CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
 # CONFIG_ACCESSIBILITY is not set
@@ -1253,10 +1396,10 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_DS1374 is not set
 # CONFIG_RTC_DRV_DS1672 is not set
 # CONFIG_RTC_DRV_MAX6900 is not set
-# CONFIG_RTC_DRV_RS5C372 is not set
+CONFIG_RTC_DRV_RS5C372=y
 # CONFIG_RTC_DRV_ISL1208 is not set
 # CONFIG_RTC_DRV_X1205 is not set
-CONFIG_RTC_DRV_PCF8563=y
+# CONFIG_RTC_DRV_PCF8563 is not set
 # CONFIG_RTC_DRV_PCF8583 is not set
 # CONFIG_RTC_DRV_M41T80 is not set
 # CONFIG_RTC_DRV_BQ32K is not set
@@ -1303,8 +1446,6 @@ CONFIG_RTC_DRV_PCF8563=y
 CONFIG_UIO=y
 # CONFIG_UIO_PDRV is not set
 CONFIG_UIO_PDRV_GENIRQ=y
-# CONFIG_UIO_SMX is not set
-# CONFIG_UIO_SERCOS3 is not set
 
 #
 # TI VLYNQ
@@ -1390,6 +1531,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS2_FS is not set
 # CONFIG_UBIFS_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1418,6 +1560,7 @@ CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
@@ -1487,6 +1630,7 @@ CONFIG_DEBUG_FS=y
 CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LKDTM is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_HAVE_FUNCTION_TRACER=y
@@ -1618,7 +1762,7 @@ CONFIG_CRYPTO_HW=y
 #
 CONFIG_BITREVERSE=y
 CONFIG_GENERIC_FIND_LAST_BIT=y
-# CONFIG_CRC_CCITT is not set
+CONFIG_CRC_CCITT=y
 # CONFIG_CRC16 is not set
 CONFIG_CRC_T10DIF=y
 CONFIG_CRC_ITU_T=y
diff --git a/arch/sh/drivers/dma/dma-api.c b/arch/sh/drivers/dma/dma-api.c
index 727126e907e..4a277224a87 100644
--- a/arch/sh/drivers/dma/dma-api.c
+++ b/arch/sh/drivers/dma/dma-api.c
@@ -17,6 +17,7 @@
 #include <linux/platform_device.h>
 #include <linux/mm.h>
 #include <linux/sched.h>
+#include <linux/slab.h>
 #include <asm/dma.h>
 
 DEFINE_SPINLOCK(dma_spin_lock);
diff --git a/arch/sh/drivers/dma/dmabrg.c b/arch/sh/drivers/dma/dmabrg.c
index 72622e30761..6ab9c4a1543 100644
--- a/arch/sh/drivers/dma/dmabrg.c
+++ b/arch/sh/drivers/dma/dmabrg.c
@@ -8,6 +8,7 @@
 
 #include <linux/interrupt.h>
 #include <linux/kernel.h>
+#include <linux/slab.h>
 #include <asm/dma.h>
 #include <asm/dmabrg.h>
 #include <asm/io.h>
diff --git a/arch/sh/drivers/heartbeat.c b/arch/sh/drivers/heartbeat.c
index 2acbc793032..7efc9c354fc 100644
--- a/arch/sh/drivers/heartbeat.c
+++ b/arch/sh/drivers/heartbeat.c
@@ -24,6 +24,7 @@
 #include <linux/sched.h>
 #include <linux/timer.h>
 #include <linux/io.h>
+#include <linux/slab.h>
 #include <asm/heartbeat.h>
 
 #define DRV_NAME "heartbeat"
diff --git a/arch/sh/drivers/pci/pcie-sh7786.c b/arch/sh/drivers/pci/pcie-sh7786.c
index ae91a2dd918..68cb9b0ac9d 100644
--- a/arch/sh/drivers/pci/pcie-sh7786.c
+++ b/arch/sh/drivers/pci/pcie-sh7786.c
@@ -12,6 +12,7 @@
 #include <linux/kernel.h>
 #include <linux/io.h>
 #include <linux/delay.h>
+#include <linux/slab.h>
 #include "pcie-sh7786.h"
 #include <asm/sizes.h>
 
diff --git a/arch/sh/drivers/push-switch.c b/arch/sh/drivers/push-switch.c
index 725be6de589..7b42c247316 100644
--- a/arch/sh/drivers/push-switch.c
+++ b/arch/sh/drivers/push-switch.c
@@ -8,6 +8,7 @@
  * for more details.
  */
 #include <linux/init.h>
+#include <linux/slab.h>
 #include <linux/module.h>
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
diff --git a/arch/sh/include/asm/cacheflush.h b/arch/sh/include/asm/cacheflush.h
index da3ebec921a..1f4e562c5e8 100644
--- a/arch/sh/include/asm/cacheflush.h
+++ b/arch/sh/include/asm/cacheflush.h
@@ -86,8 +86,8 @@ extern void copy_from_user_page(struct vm_area_struct *vma,
         struct page *page, unsigned long vaddr, void *dst, const void *src,
         unsigned long len);
 
-#define flush_cache_vmap(start, end)            flush_cache_all()
-#define flush_cache_vunmap(start, end)          flush_cache_all()
+#define flush_cache_vmap(start, end)            local_flush_cache_all(NULL)
+#define flush_cache_vunmap(start, end)          local_flush_cache_all(NULL)
 
 #define flush_dcache_mmap_lock(mapping)         do { } while (0)
 #define flush_dcache_mmap_unlock(mapping)       do { } while (0)
diff --git a/arch/sh/include/asm/dma-register.h b/arch/sh/include/asm/dma-register.h
new file mode 100644
index 00000000000..51cd78feacf
--- /dev/null
+++ b/arch/sh/include/asm/dma-register.h
@@ -0,0 +1,51 @@
+/*
+ * Common header for the legacy SH DMA driver and the new dmaengine driver
+ *
+ * extracted from arch/sh/include/asm/dma-sh.h:
+ *
+ * Copyright (C) 2000  Takashi YOSHII
+ * Copyright (C) 2003  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef DMA_REGISTER_H
+#define DMA_REGISTER_H
+
+/* DMA register */
+#define SAR     0x00
+#define DAR     0x04
+#define TCR     0x08
+#define CHCR    0x0C
+#define DMAOR   0x40
+
+/* DMAOR definitions */
+#define DMAOR_AE        0x00000004
+#define DMAOR_NMIF      0x00000002
+#define DMAOR_DME       0x00000001
+
+/* Definitions for the SuperH DMAC */
+#define REQ_L   0x00000000
+#define REQ_E   0x00080000
+#define RACK_H  0x00000000
+#define RACK_L  0x00040000
+#define ACK_R   0x00000000
+#define ACK_W   0x00020000
+#define ACK_H   0x00000000
+#define ACK_L   0x00010000
+#define DM_INC  0x00004000
+#define DM_DEC  0x00008000
+#define DM_FIX  0x0000c000
+#define SM_INC  0x00001000
+#define SM_DEC  0x00002000
+#define SM_FIX  0x00003000
+#define RS_IN   0x00000200
+#define RS_OUT  0x00000300
+#define TS_BLK  0x00000040
+#define TM_BUR  0x00000020
+#define CHCR_DE 0x00000001
+#define CHCR_TE 0x00000002
+#define CHCR_IE 0x00000004
+
+#endif
diff --git a/arch/sh/include/asm/dma-sh.h b/arch/sh/include/asm/dma-sh.h
index e934a2e6665..f3acb8e34c6 100644
--- a/arch/sh/include/asm/dma-sh.h
+++ b/arch/sh/include/asm/dma-sh.h
@@ -11,7 +11,8 @@
 #ifndef __DMA_SH_H
 #define __DMA_SH_H
 
-#include <asm/dma.h>
+#include <asm/dma-register.h>
+#include <cpu/dma-register.h>
 #include <cpu/dma.h>
 
 /* DMAOR contorl: The DMAOR access size is different by CPU.*/
@@ -53,34 +54,6 @@ static int dmte_irq_map[] __maybe_unused = {
 #endif
 };
 
-/* Definitions for the SuperH DMAC */
-#define REQ_L   0x00000000
-#define REQ_E   0x00080000
-#define RACK_H  0x00000000
-#define RACK_L  0x00040000
-#define ACK_R   0x00000000
-#define ACK_W   0x00020000
-#define ACK_H   0x00000000
-#define ACK_L   0x00010000
-#define DM_INC  0x00004000
-#define DM_DEC  0x00008000
-#define DM_FIX  0x0000c000
-#define SM_INC  0x00001000
-#define SM_DEC  0x00002000
-#define SM_FIX  0x00003000
-#define RS_IN   0x00000200
-#define RS_OUT  0x00000300
-#define TS_BLK  0x00000040
-#define TM_BUR  0x00000020
-#define CHCR_DE 0x00000001
-#define CHCR_TE 0x00000002
-#define CHCR_IE 0x00000004
-
-/* DMAOR definitions */
-#define DMAOR_AE        0x00000004
-#define DMAOR_NMIF      0x00000002
-#define DMAOR_DME       0x00000001
-
 /*
  * Define the default configuration for dual address memory-memory transfer.
  * The 0x400 value represents auto-request, external->external.
@@ -111,61 +84,4 @@ static u32 dma_base_addr[] __maybe_unused = {
 #endif
 };
 
-/* DMA register */
-#define SAR     0x00
-#define DAR     0x04
-#define TCR     0x08
-#define CHCR    0x0C
-#define DMAOR   0x40
-
-/*
- * for dma engine
- *
- * SuperH DMA mode
- */
-#define SHDMA_MIX_IRQ   (1 << 1)
-#define SHDMA_DMAOR1    (1 << 2)
-#define SHDMA_DMAE1     (1 << 3)
-
-enum sh_dmae_slave_chan_id {
-        SHDMA_SLAVE_SCIF0_TX,
-        SHDMA_SLAVE_SCIF0_RX,
-        SHDMA_SLAVE_SCIF1_TX,
-        SHDMA_SLAVE_SCIF1_RX,
-        SHDMA_SLAVE_SCIF2_TX,
-        SHDMA_SLAVE_SCIF2_RX,
-        SHDMA_SLAVE_SCIF3_TX,
-        SHDMA_SLAVE_SCIF3_RX,
-        SHDMA_SLAVE_SCIF4_TX,
-        SHDMA_SLAVE_SCIF4_RX,
-        SHDMA_SLAVE_SCIF5_TX,
-        SHDMA_SLAVE_SCIF5_RX,
-        SHDMA_SLAVE_SIUA_TX,
-        SHDMA_SLAVE_SIUA_RX,
-        SHDMA_SLAVE_SIUB_TX,
-        SHDMA_SLAVE_SIUB_RX,
-        SHDMA_SLAVE_NUMBER,     /* Must stay last */
-};
-
-struct sh_dmae_slave_config {
-        enum sh_dmae_slave_chan_id      slave_id;
-        dma_addr_t                      addr;
-        u32                             chcr;
-        char                            mid_rid;
-};
-
-struct sh_dmae_pdata {
-        unsigned int mode;
-        struct sh_dmae_slave_config *config;
-        int config_num;
-};
-
-struct device;
-
-struct sh_dmae_slave {
-        enum sh_dmae_slave_chan_id      slave_id; /* Set by the platform */
-        struct device                   *dma_dev; /* Set by the platform */
-        struct sh_dmae_slave_config     *config;  /* Set by the driver */
-};
-
 #endif /* __DMA_SH_H */
diff --git a/arch/sh/include/asm/dmaengine.h b/arch/sh/include/asm/dmaengine.h
new file mode 100644
index 00000000000..bf2f30cf0a2
--- /dev/null
+++ b/arch/sh/include/asm/dmaengine.h
@@ -0,0 +1,93 @@
+/*
+ * Header for the new SH dmaengine driver
+ *
+ * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef ASM_DMAENGINE_H
+#define ASM_DMAENGINE_H
+
+#include <linux/dmaengine.h>
+#include <linux/list.h>
+
+#include <asm/dma-register.h>
+
+#define SH_DMAC_MAX_CHANNELS    6
+
+enum sh_dmae_slave_chan_id {
+        SHDMA_SLAVE_SCIF0_TX,
+        SHDMA_SLAVE_SCIF0_RX,
+        SHDMA_SLAVE_SCIF1_TX,
+        SHDMA_SLAVE_SCIF1_RX,
+        SHDMA_SLAVE_SCIF2_TX,
+        SHDMA_SLAVE_SCIF2_RX,
+        SHDMA_SLAVE_SCIF3_TX,
+        SHDMA_SLAVE_SCIF3_RX,
+        SHDMA_SLAVE_SCIF4_TX,
+        SHDMA_SLAVE_SCIF4_RX,
+        SHDMA_SLAVE_SCIF5_TX,
+        SHDMA_SLAVE_SCIF5_RX,
+        SHDMA_SLAVE_SIUA_TX,
+        SHDMA_SLAVE_SIUA_RX,
+        SHDMA_SLAVE_SIUB_TX,
+        SHDMA_SLAVE_SIUB_RX,
+        SHDMA_SLAVE_NUMBER,     /* Must stay last */
+};
+
+struct sh_dmae_slave_config {
+        enum sh_dmae_slave_chan_id      slave_id;
+        dma_addr_t                      addr;
+        u32                             chcr;
+        char                            mid_rid;
+};
+
+struct sh_dmae_channel {
+        unsigned int    offset;
+        unsigned int    dmars;
+        unsigned int    dmars_bit;
+};
+
+struct sh_dmae_pdata {
+        struct sh_dmae_slave_config *slave;
+        int slave_num;
+        struct sh_dmae_channel *channel;
+        int channel_num;
+        unsigned int ts_low_shift;
+        unsigned int ts_low_mask;
+        unsigned int ts_high_shift;
+        unsigned int ts_high_mask;
+        unsigned int *ts_shift;
+        int ts_shift_num;
+        u16 dmaor_init;
+};
+
+struct device;
+
+/* Used by slave DMA clients to request DMA to/from a specific peripheral */
+struct sh_dmae_slave {
+        enum sh_dmae_slave_chan_id      slave_id; /* Set by the platform */
+        struct device                   *dma_dev; /* Set by the platform */
+        struct sh_dmae_slave_config     *config;  /* Set by the driver */
+};
+
+struct sh_dmae_regs {
+        u32 sar; /* SAR / source address */
+        u32 dar; /* DAR / destination address */
+        u32 tcr; /* TCR / transfer count */
+};
+
+struct sh_desc {
+        struct sh_dmae_regs hw;
+        struct list_head node;
+        struct dma_async_tx_descriptor async_tx;
+        enum dma_data_direction direction;
+        dma_cookie_t cookie;
+        size_t partial;
+        int chunks;
+        int mark;
+};
+
+#endif
diff --git a/arch/sh/include/asm/elf.h b/arch/sh/include/asm/elf.h
index ac04255022b..ce830faeebb 100644
--- a/arch/sh/include/asm/elf.h
+++ b/arch/sh/include/asm/elf.h
@@ -211,7 +211,9 @@ extern void __kernel_vsyscall;
 
 #define VSYSCALL_AUX_ENT                                        \
         if (vdso_enabled)                                       \
-                NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_BASE);
+                NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_BASE);        \
+        else                                                    \
+                NEW_AUX_ENT(AT_IGNORE, 0);
 #else
 #define VSYSCALL_AUX_ENT
 #endif /* CONFIG_VSYSCALL */
@@ -219,7 +221,7 @@ extern void __kernel_vsyscall;
 #ifdef CONFIG_SH_FPU
 #define FPU_AUX_ENT     NEW_AUX_ENT(AT_FPUCW, FPSCR_INIT)
 #else
-#define FPU_AUX_ENT
+#define FPU_AUX_ENT     NEW_AUX_ENT(AT_IGNORE, 0)
 #endif
 
 extern int l1i_cache_shape, l1d_cache_shape, l2_cache_shape;
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index 7dab7b23a5e..f689554e17c 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -291,21 +291,21 @@ unsigned long long poke_real_address_q(unsigned long long addr,
  * doesn't exist, so everything must go through page tables.
  */
 #ifdef CONFIG_MMU
-void __iomem *__ioremap_caller(unsigned long offset, unsigned long size,
+void __iomem *__ioremap_caller(phys_addr_t offset, unsigned long size,
                                pgprot_t prot, void *caller);
 void __iounmap(void __iomem *addr);
 
 static inline void __iomem *
-__ioremap(unsigned long offset, unsigned long size, pgprot_t prot)
+__ioremap(phys_addr_t offset, unsigned long size, pgprot_t prot)
 {
         return __ioremap_caller(offset, size, prot, __builtin_return_address(0));
 }
 
 static inline void __iomem *
-__ioremap_29bit(unsigned long offset, unsigned long size, pgprot_t prot)
+__ioremap_29bit(phys_addr_t offset, unsigned long size, pgprot_t prot)
 {
 #ifdef CONFIG_29BIT
-        unsigned long last_addr = offset + size - 1;
+        phys_addr_t last_addr = offset + size - 1;
 
         /*
          * For P1 and P2 space this is trivial, as everything is already
@@ -329,7 +329,7 @@ __ioremap_29bit(unsigned long offset, unsigned long size, pgprot_t prot)
 }
 
 static inline void __iomem *
-__ioremap_mode(unsigned long offset, unsigned long size, pgprot_t prot)
+__ioremap_mode(phys_addr_t offset, unsigned long size, pgprot_t prot)
 {
         void __iomem *ret;
 
@@ -349,35 +349,32 @@ __ioremap_mode(unsigned long offset, unsigned long size, pgprot_t prot)
 #define __iounmap(addr)                         do { } while (0)
 #endif /* CONFIG_MMU */
 
-static inline void __iomem *
-ioremap(unsigned long offset, unsigned long size)
+static inline void __iomem *ioremap(phys_addr_t offset, unsigned long size)
 {
         return __ioremap_mode(offset, size, PAGE_KERNEL_NOCACHE);
 }
 
 static inline void __iomem *
-ioremap_cache(unsigned long offset, unsigned long size)
+ioremap_cache(phys_addr_t offset, unsigned long size)
 {
         return __ioremap_mode(offset, size, PAGE_KERNEL);
 }
 
 #ifdef CONFIG_HAVE_IOREMAP_PROT
 static inline void __iomem *
-ioremap_prot(resource_size_t offset, unsigned long size, unsigned long flags)
+ioremap_prot(phys_addr_t offset, unsigned long size, unsigned long flags)
 {
         return __ioremap_mode(offset, size, __pgprot(flags));
 }
 #endif
 
 #ifdef CONFIG_IOREMAP_FIXED
-extern void __iomem *ioremap_fixed(resource_size_t, unsigned long,
-                                   unsigned long, pgprot_t);
+extern void __iomem *ioremap_fixed(phys_addr_t, unsigned long, pgprot_t);
 extern int iounmap_fixed(void __iomem *);
 extern void ioremap_fixed_init(void);
 #else
 static inline void __iomem *
-ioremap_fixed(resource_size_t phys_addr, unsigned long offset,
-              unsigned long size, pgprot_t prot)
+ioremap_fixed(phys_addr_t phys_addr, unsigned long size, pgprot_t prot)
 {
         BUG();
         return NULL;
diff --git a/arch/sh/include/asm/mmu.h b/arch/sh/include/asm/mmu.h
index 15a05b615ba..56e4418c19b 100644
--- a/arch/sh/include/asm/mmu.h
+++ b/arch/sh/include/asm/mmu.h
@@ -55,19 +55,36 @@ typedef struct {
 
 #ifdef CONFIG_PMB
 /* arch/sh/mm/pmb.c */
-long pmb_remap(unsigned long virt, unsigned long phys,
-               unsigned long size, pgprot_t prot);
-void pmb_unmap(unsigned long addr);
-void pmb_init(void);
 bool __in_29bit_mode(void);
+
+void pmb_init(void);
+int pmb_bolt_mapping(unsigned long virt, phys_addr_t phys,
+                     unsigned long size, pgprot_t prot);
+void __iomem *pmb_remap_caller(phys_addr_t phys, unsigned long size,
+                               pgprot_t prot, void *caller);
+int pmb_unmap(void __iomem *addr);
+
 #else
-static inline long pmb_remap(unsigned long virt, unsigned long phys,
-                             unsigned long size, pgprot_t prot)
+
+static inline int
+pmb_bolt_mapping(unsigned long virt, phys_addr_t phys,
+                 unsigned long size, pgprot_t prot)
+{
+        return -EINVAL;
+}
+
+static inline void __iomem *
+pmb_remap_caller(phys_addr_t phys, unsigned long size,
+                 pgprot_t prot, void *caller)
+{
+        return NULL;
+}
+
+static inline int pmb_unmap(void __iomem *addr)
 {
         return -EINVAL;
 }
 
-#define pmb_unmap(addr)         do { } while (0)
 #define pmb_init(addr)          do { } while (0)
 
 #ifdef CONFIG_29BIT
@@ -77,6 +94,13 @@ static inline long pmb_remap(unsigned long virt, unsigned long phys,
 #endif
 
 #endif /* CONFIG_PMB */
+
+static inline void __iomem *
+pmb_remap(phys_addr_t phys, unsigned long size, pgprot_t prot)
+{
+        return pmb_remap_caller(phys, size, prot, __builtin_return_address(0));
+}
+
 #endif /* __ASSEMBLY__ */
 
 #endif /* __MMU_H */
diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h
index 1042f7f0a48..8bd952fcf3b 100644
--- a/arch/sh/include/asm/pci.h
+++ b/arch/sh/include/asm/pci.h
@@ -83,25 +83,6 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
  */
 #define PCI_DMA_BUS_IS_PHYS     (dma_ops->is_phys)
 
-/* pci_unmap_{single,page} being a nop depends upon the
- * configuration.
- */
-#ifdef CONFIG_DMA_NONCOHERENT
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME)          ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME)            ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)   (((PTR)->LEN_NAME) = (VAL))
-#else
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
-#define pci_unmap_addr(PTR, ADDR_NAME)          (0)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
-#define pci_unmap_len(PTR, LEN_NAME)            (0)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)   do { } while (0)
-#endif
-
 #ifdef CONFIG_PCI
 /*
  * None of the SH PCI controllers support MWI, it is always treated as a
diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h
index e11b14ea2c4..2168fde2561 100644
--- a/arch/sh/include/asm/ptrace.h
+++ b/arch/sh/include/asm/ptrace.h
@@ -123,8 +123,6 @@ extern void show_regs(struct pt_regs *);
 struct task_struct;
 
 #define arch_has_single_step()  (1)
-extern void user_enable_single_step(struct task_struct *);
-extern void user_disable_single_step(struct task_struct *);
 
 struct perf_event;
 struct perf_sample_data;
diff --git a/arch/sh/include/asm/siu.h b/arch/sh/include/asm/siu.h
index 57565a3b551..f1b1e6944a5 100644
--- a/arch/sh/include/asm/siu.h
+++ b/arch/sh/include/asm/siu.h
@@ -11,7 +11,7 @@
 #ifndef ASM_SIU_H
 #define ASM_SIU_H
 
-#include <asm/dma-sh.h>
+#include <asm/dmaengine.h>
 
 struct device;
 
diff --git a/arch/sh/include/asm/syscalls.h b/arch/sh/include/asm/syscalls.h
index c1e2b8deb83..507725af2e5 100644
--- a/arch/sh/include/asm/syscalls.h
+++ b/arch/sh/include/asm/syscalls.h
@@ -3,17 +3,12 @@
 
 #ifdef __KERNEL__
 
-struct old_utsname;
-
 asmlinkage int old_mmap(unsigned long addr, unsigned long len,
                         unsigned long prot, unsigned long flags,
                         int fd, unsigned long off);
 asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
                           unsigned long prot, unsigned long flags,
                           unsigned long fd, unsigned long pgoff);
-asmlinkage int sys_ipc(uint call, int first, int second,
-                       int third, void __user *ptr, long fifth);
-asmlinkage int sys_uname(struct old_utsname __user *name);
 
 #ifdef CONFIG_SUPERH32
 # include "syscalls_32.h"
diff --git a/arch/sh/include/asm/topology.h b/arch/sh/include/asm/topology.h
index 37cdadd975a..88e734069fa 100644
--- a/arch/sh/include/asm/topology.h
+++ b/arch/sh/include/asm/topology.h
@@ -35,7 +35,7 @@
 
 #define pcibus_to_node(bus)     ((void)(bus), -1)
 #define cpumask_of_pcibus(bus)  (pcibus_to_node(bus) == -1 ? \
-                                        CPU_MASK_ALL_PTR : \
+                                        cpu_all_mask : \
                                         cpumask_of_node(pcibus_to_node(bus)))
 
 #endif
diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/asm/unistd_32.h
index 365744b0526..0e7f0fc8f08 100644
--- a/arch/sh/include/asm/unistd_32.h
+++ b/arch/sh/include/asm/unistd_32.h
@@ -358,6 +358,7 @@
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_ALARM
 #define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_PAUSE
 #define __ARCH_WANT_SYS_SGETMASK
 #define __ARCH_WANT_SYS_SIGNAL
@@ -370,6 +371,7 @@
 #define __ARCH_WANT_SYS_LLSEEK
 #define __ARCH_WANT_SYS_NICE
 #define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_UNAME
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/sh/include/asm/unistd_64.h b/arch/sh/include/asm/unistd_64.h
index 25de158aac3..0580c33a1e0 100644
--- a/arch/sh/include/asm/unistd_64.h
+++ b/arch/sh/include/asm/unistd_64.h
@@ -398,6 +398,7 @@
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_ALARM
 #define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_PAUSE
 #define __ARCH_WANT_SYS_SGETMASK
 #define __ARCH_WANT_SYS_SIGNAL
@@ -410,6 +411,7 @@
 #define __ARCH_WANT_SYS_LLSEEK
 #define __ARCH_WANT_SYS_NICE
 #define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_UNAME
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/sh/include/cpu-sh3/cpu/dma-register.h b/arch/sh/include/cpu-sh3/cpu/dma-register.h
new file mode 100644
index 00000000000..2349e488c9a
--- /dev/null
+++ b/arch/sh/include/cpu-sh3/cpu/dma-register.h
@@ -0,0 +1,41 @@
+/*
+ * SH3 CPU-specific DMA definitions, used by both DMA drivers
+ *
+ * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef CPU_DMA_REGISTER_H
+#define CPU_DMA_REGISTER_H
+
+#define CHCR_TS_LOW_MASK        0x18
+#define CHCR_TS_LOW_SHIFT       3
+#define CHCR_TS_HIGH_MASK       0
+#define CHCR_TS_HIGH_SHIFT      0
+
+#define DMAOR_INIT      DMAOR_DME
+
+/*
+ * The SuperH DMAC supports a number of transmit sizes, we list them here,
+ * with their respective values as they appear in the CHCR registers.
+ */
+enum {
+        XMIT_SZ_8BIT,
+        XMIT_SZ_16BIT,
+        XMIT_SZ_32BIT,
+        XMIT_SZ_128BIT,
+};
+
+/* log2(size / 8) - used to calculate number of transfers */
+#define TS_SHIFT {                      \
+        [XMIT_SZ_8BIT]          = 0,    \
+        [XMIT_SZ_16BIT]         = 1,    \
+        [XMIT_SZ_32BIT]         = 2,    \
+        [XMIT_SZ_128BIT]        = 4,    \
+}
+
+#define TS_INDEX2VAL(i) (((i) & 3) << CHCR_TS_LOW_SHIFT)
+
+#endif
diff --git a/arch/sh/include/cpu-sh3/cpu/dma.h b/arch/sh/include/cpu-sh3/cpu/dma.h
index 207811a7a65..24e28b91c9d 100644
--- a/arch/sh/include/cpu-sh3/cpu/dma.h
+++ b/arch/sh/include/cpu-sh3/cpu/dma.h
@@ -20,31 +20,4 @@
 #define TS_32           0x00000010
 #define TS_128          0x00000018
 
-#define CHCR_TS_LOW_MASK        0x18
-#define CHCR_TS_LOW_SHIFT       3
-#define CHCR_TS_HIGH_MASK       0
-#define CHCR_TS_HIGH_SHIFT      0
-
-#define DMAOR_INIT      DMAOR_DME
-
-/*
- * The SuperH DMAC supports a number of transmit sizes, we list them here,
- * with their respective values as they appear in the CHCR registers.
- */
-enum {
-        XMIT_SZ_8BIT,
-        XMIT_SZ_16BIT,
-        XMIT_SZ_32BIT,
-        XMIT_SZ_128BIT,
-};
-
-#define TS_SHIFT {                      \
-        [XMIT_SZ_8BIT]          = 0,    \
-        [XMIT_SZ_16BIT]         = 1,    \
-        [XMIT_SZ_32BIT]         = 2,    \
-        [XMIT_SZ_128BIT]        = 4,    \
-}
-
-#define TS_INDEX2VAL(i) (((i) & 3) << CHCR_TS_LOW_SHIFT)
-
 #endif /* __ASM_CPU_SH3_DMA_H */
diff --git a/arch/sh/include/cpu-sh4/cpu/dma-register.h b/arch/sh/include/cpu-sh4/cpu/dma-register.h
new file mode 100644
index 00000000000..55f9fec082d
--- /dev/null
+++ b/arch/sh/include/cpu-sh4/cpu/dma-register.h
@@ -0,0 +1,112 @@
+/*
+ * SH4 CPU-specific DMA definitions, used by both DMA drivers
+ *
+ * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef CPU_DMA_REGISTER_H
+#define CPU_DMA_REGISTER_H
+
+/* SH7751/7760/7780 DMA IRQ sources */
+
+#ifdef CONFIG_CPU_SH4A
+
+#define DMAOR_INIT      DMAOR_DME
+
+#if defined(CONFIG_CPU_SUBTYPE_SH7343) || \
+        defined(CONFIG_CPU_SUBTYPE_SH7730)
+#define CHCR_TS_LOW_MASK        0x00000018
+#define CHCR_TS_LOW_SHIFT       3
+#define CHCR_TS_HIGH_MASK       0
+#define CHCR_TS_HIGH_SHIFT      0
+#elif defined(CONFIG_CPU_SUBTYPE_SH7722) || \
+        defined(CONFIG_CPU_SUBTYPE_SH7724)
+#define CHCR_TS_LOW_MASK        0x00000018
+#define CHCR_TS_LOW_SHIFT       3
+#define CHCR_TS_HIGH_MASK       0x00300000
+#define CHCR_TS_HIGH_SHIFT      (20 - 2)        /* 2 bits for shifted low TS */
+#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
+        defined(CONFIG_CPU_SUBTYPE_SH7764)
+#define CHCR_TS_LOW_MASK        0x00000018
+#define CHCR_TS_LOW_SHIFT       3
+#define CHCR_TS_HIGH_MASK       0
+#define CHCR_TS_HIGH_SHIFT      0
+#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
+#define CHCR_TS_LOW_MASK        0x00000018
+#define CHCR_TS_LOW_SHIFT       3
+#define CHCR_TS_HIGH_MASK       0
+#define CHCR_TS_HIGH_SHIFT      0
+#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
+#define CHCR_TS_LOW_MASK        0x00000018
+#define CHCR_TS_LOW_SHIFT       3
+#define CHCR_TS_HIGH_MASK       0
+#define CHCR_TS_HIGH_SHIFT      0
+#else /* SH7785 */
+#define CHCR_TS_LOW_MASK        0x00000018
+#define CHCR_TS_LOW_SHIFT       3
+#define CHCR_TS_HIGH_MASK       0
+#define CHCR_TS_HIGH_SHIFT      0
+#endif
+
+/* Transmit sizes and respective CHCR register values */
+enum {
+        XMIT_SZ_8BIT            = 0,
+        XMIT_SZ_16BIT           = 1,
+        XMIT_SZ_32BIT           = 2,
+        XMIT_SZ_64BIT           = 7,
+        XMIT_SZ_128BIT          = 3,
+        XMIT_SZ_256BIT          = 4,
+        XMIT_SZ_128BIT_BLK      = 0xb,
+        XMIT_SZ_256BIT_BLK      = 0xc,
+};
+
+/* log2(size / 8) - used to calculate number of transfers */
+#define TS_SHIFT {                      \
+        [XMIT_SZ_8BIT]          = 0,    \
+        [XMIT_SZ_16BIT]         = 1,    \
+        [XMIT_SZ_32BIT]         = 2,    \
+        [XMIT_SZ_64BIT]         = 3,    \
+        [XMIT_SZ_128BIT]        = 4,    \
+        [XMIT_SZ_256BIT]        = 5,    \
+        [XMIT_SZ_128BIT_BLK]    = 4,    \
+        [XMIT_SZ_256BIT_BLK]    = 5,    \
+}
+
+#define TS_INDEX2VAL(i) ((((i) & 3) << CHCR_TS_LOW_SHIFT) | \
+                         ((((i) >> 2) & 3) << CHCR_TS_HIGH_SHIFT))
+
+#else /* CONFIG_CPU_SH4A */
+
+#define DMAOR_INIT      (0x8000 | DMAOR_DME)
+
+#define CHCR_TS_LOW_MASK        0x70
+#define CHCR_TS_LOW_SHIFT       4
+#define CHCR_TS_HIGH_MASK       0
+#define CHCR_TS_HIGH_SHIFT      0
+
+/* Transmit sizes and respective CHCR register values */
+enum {
+        XMIT_SZ_8BIT    = 1,
+        XMIT_SZ_16BIT   = 2,
+        XMIT_SZ_32BIT   = 3,
+        XMIT_SZ_64BIT   = 0,
+        XMIT_SZ_256BIT  = 4,
+};
+
+/* log2(size / 8) - used to calculate number of transfers */
+#define TS_SHIFT {                      \
+        [XMIT_SZ_8BIT]          = 0,    \
+        [XMIT_SZ_16BIT]         = 1,    \
+        [XMIT_SZ_32BIT]         = 2,    \
+        [XMIT_SZ_64BIT]         = 3,    \
+        [XMIT_SZ_256BIT]        = 5,    \
+}
+
+#define TS_INDEX2VAL(i) (((i) & 7) << CHCR_TS_LOW_SHIFT)
+
+#endif /* CONFIG_CPU_SH4A */
+
+#endif
diff --git a/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h b/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h
index e734ea47d8a..9647e681fd2 100644
--- a/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h
+++ b/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h
@@ -8,20 +8,12 @@
 #define DMAE0_IRQ       78      /* DMA Error IRQ*/
 #define SH_DMAC_BASE0   0xFE008020
 #define SH_DMARS_BASE0  0xFE009000
-#define CHCR_TS_LOW_MASK        0x00000018
-#define CHCR_TS_LOW_SHIFT       3
-#define CHCR_TS_HIGH_MASK       0
-#define CHCR_TS_HIGH_SHIFT      0
 #elif defined(CONFIG_CPU_SUBTYPE_SH7722)
 #define DMTE0_IRQ       48
 #define DMTE4_IRQ       76
 #define DMAE0_IRQ       78      /* DMA Error IRQ*/
 #define SH_DMAC_BASE0   0xFE008020
 #define SH_DMARS_BASE0  0xFE009000
-#define CHCR_TS_LOW_MASK        0x00000018
-#define CHCR_TS_LOW_SHIFT       3
-#define CHCR_TS_HIGH_MASK       0x00300000
-#define CHCR_TS_HIGH_SHIFT      20
 #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
         defined(CONFIG_CPU_SUBTYPE_SH7764)
 #define DMTE0_IRQ       34
@@ -29,10 +21,6 @@
 #define DMAE0_IRQ       38
 #define SH_DMAC_BASE0   0xFF608020
 #define SH_DMARS_BASE0  0xFF609000
-#define CHCR_TS_LOW_MASK        0x00000018
-#define CHCR_TS_LOW_SHIFT       3
-#define CHCR_TS_HIGH_MASK       0
-#define CHCR_TS_HIGH_SHIFT      0
 #elif defined(CONFIG_CPU_SUBTYPE_SH7723)
 #define DMTE0_IRQ       48      /* DMAC0A*/
 #define DMTE4_IRQ       76      /* DMAC0B */
@@ -46,10 +34,6 @@
 #define SH_DMAC_BASE0   0xFE008020
 #define SH_DMAC_BASE1   0xFDC08020
 #define SH_DMARS_BASE0  0xFDC09000
-#define CHCR_TS_LOW_MASK        0x00000018
-#define CHCR_TS_LOW_SHIFT       3
-#define CHCR_TS_HIGH_MASK       0
-#define CHCR_TS_HIGH_SHIFT      0
 #elif defined(CONFIG_CPU_SUBTYPE_SH7724)
 #define DMTE0_IRQ       48      /* DMAC0A*/
 #define DMTE4_IRQ       76      /* DMAC0B */
@@ -64,10 +48,6 @@
 #define SH_DMAC_BASE1   0xFDC08020
 #define SH_DMARS_BASE0  0xFE009000
 #define SH_DMARS_BASE1  0xFDC09000
-#define CHCR_TS_LOW_MASK        0x00000018
-#define CHCR_TS_LOW_SHIFT       3
-#define CHCR_TS_HIGH_MASK       0x00600000
-#define CHCR_TS_HIGH_SHIFT      21
 #elif defined(CONFIG_CPU_SUBTYPE_SH7780)
 #define DMTE0_IRQ       34
 #define DMTE4_IRQ       44
@@ -80,10 +60,6 @@
 #define SH_DMAC_BASE0   0xFC808020
 #define SH_DMAC_BASE1   0xFC818020
 #define SH_DMARS_BASE0  0xFC809000
-#define CHCR_TS_LOW_MASK        0x00000018
-#define CHCR_TS_LOW_SHIFT       3
-#define CHCR_TS_HIGH_MASK       0
-#define CHCR_TS_HIGH_SHIFT      0
 #else /* SH7785 */
 #define DMTE0_IRQ       33
 #define DMTE4_IRQ       37
@@ -97,10 +73,6 @@
 #define SH_DMAC_BASE0   0xFC808020
 #define SH_DMAC_BASE1   0xFCC08020
 #define SH_DMARS_BASE0  0xFC809000
-#define CHCR_TS_LOW_MASK        0x00000018
-#define CHCR_TS_LOW_SHIFT       3
-#define CHCR_TS_HIGH_MASK       0
-#define CHCR_TS_HIGH_SHIFT      0
 #endif
 
 #define REQ_HE          0x000000C0
@@ -108,38 +80,4 @@
 #define REQ_LE          0x00000040
 #define TM_BURST        0x00000020
 
-/*
- * The SuperH DMAC supports a number of transmit sizes, we list them here,
- * with their respective values as they appear in the CHCR registers.
- *
- * Defaults to a 64-bit transfer size.
- */
-enum {
-        XMIT_SZ_8BIT            = 0,
-        XMIT_SZ_16BIT           = 1,
-        XMIT_SZ_32BIT           = 2,
-        XMIT_SZ_64BIT           = 7,
-        XMIT_SZ_128BIT          = 3,
-        XMIT_SZ_256BIT          = 4,
-        XMIT_SZ_128BIT_BLK      = 0xb,
-        XMIT_SZ_256BIT_BLK      = 0xc,
-};
-
-/*
- * The DMA count is defined as the number of bytes to transfer.
- */
-#define TS_SHIFT {                      \
-        [XMIT_SZ_8BIT]          = 0,    \
-        [XMIT_SZ_16BIT]         = 1,    \
-        [XMIT_SZ_32BIT]         = 2,    \
-        [XMIT_SZ_64BIT]         = 3,    \
-        [XMIT_SZ_128BIT]        = 4,    \
-        [XMIT_SZ_256BIT]        = 5,    \
-        [XMIT_SZ_128BIT_BLK]    = 4,    \
-        [XMIT_SZ_256BIT_BLK]    = 5,    \
-}
-
-#define TS_INDEX2VAL(i) ((((i) & 3) << CHCR_TS_LOW_SHIFT) | \
-                         ((((i) >> 2) & 3) << CHCR_TS_HIGH_SHIFT))
-
 #endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */
diff --git a/arch/sh/include/cpu-sh4/cpu/dma.h b/arch/sh/include/cpu-sh4/cpu/dma.h
index 114a369705b..ca747e93c2e 100644
--- a/arch/sh/include/cpu-sh4/cpu/dma.h
+++ b/arch/sh/include/cpu-sh4/cpu/dma.h
@@ -5,9 +5,8 @@
 
 #ifdef CONFIG_CPU_SH4A
 
-#define DMAOR_INIT      (DMAOR_DME)
-
 #include <cpu/dma-sh4a.h>
+
 #else /* CONFIG_CPU_SH4A */
 /*
  * SH7750/SH7751/SH7760
@@ -17,7 +16,6 @@
 #define DMTE6_IRQ       46
 #define DMAE0_IRQ       38
 
-#define DMAOR_INIT      (0x8000|DMAOR_DME)
 #define SH_DMAC_BASE0   0xffa00000
 #define SH_DMAC_BASE1   0xffa00070
 /* Definitions for the SuperH DMAC */
@@ -27,40 +25,8 @@
 #define TS_32           0x00000030
 #define TS_64           0x00000000
 
-#define CHCR_TS_LOW_MASK        0x70
-#define CHCR_TS_LOW_SHIFT       4
-#define CHCR_TS_HIGH_MASK       0
-#define CHCR_TS_HIGH_SHIFT      0
-
 #define DMAOR_COD       0x00000008
 
-/*
- * The SuperH DMAC supports a number of transmit sizes, we list them here,
- * with their respective values as they appear in the CHCR registers.
- *
- * Defaults to a 64-bit transfer size.
- */
-enum {
-        XMIT_SZ_8BIT    = 1,
-        XMIT_SZ_16BIT   = 2,
-        XMIT_SZ_32BIT   = 3,
-        XMIT_SZ_64BIT   = 0,
-        XMIT_SZ_256BIT  = 4,
-};
-
-/*
- * The DMA count is defined as the number of bytes to transfer.
- */
-#define TS_SHIFT {                      \
-        [XMIT_SZ_8BIT]          = 0,    \
-        [XMIT_SZ_16BIT]         = 1,    \
-        [XMIT_SZ_32BIT]         = 2,    \
-        [XMIT_SZ_64BIT]         = 3,    \
-        [XMIT_SZ_256BIT]        = 5,    \
-}
-
-#define TS_INDEX2VAL(i) (((i) & 7) << CHCR_TS_LOW_SHIFT)
-
 #endif
 
 #endif /* __ASM_CPU_SH4_DMA_H */
diff --git a/arch/sh/include/cpu-sh4/cpu/mmu_context.h b/arch/sh/include/cpu-sh4/cpu/mmu_context.h
index 03ea75c5315..5963124c1d4 100644
--- a/arch/sh/include/cpu-sh4/cpu/mmu_context.h
+++ b/arch/sh/include/cpu-sh4/cpu/mmu_context.h
@@ -19,6 +19,8 @@
 
 #define MMUCR           0xFF000010      /* MMU Control Register */
 
+#define MMU_ITLB_ADDRESS_ARRAY  0xF2000000
+#define MMU_ITLB_ADDRESS_ARRAY2 0xF2800000
 #define MMU_UTLB_ADDRESS_ARRAY  0xF6000000
 #define MMU_UTLB_ADDRESS_ARRAY2 0xF6800000
 #define MMU_PAGE_ASSOC_BIT      0x80
@@ -28,6 +30,8 @@
 #define MMUCR_URB               0x00FC0000
 #define MMUCR_URB_SHIFT         18
 #define MMUCR_URB_NENTRIES      64
+#define MMUCR_URC               0x0000FC00
+#define MMUCR_URC_SHIFT         10
 
 #if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40)
 #define MMUCR_SE                (1 << 4)
diff --git a/arch/sh/include/cpu-sh4/cpu/watchdog.h b/arch/sh/include/cpu-sh4/cpu/watchdog.h
index 7672301d0c7..7f62b938093 100644
--- a/arch/sh/include/cpu-sh4/cpu/watchdog.h
+++ b/arch/sh/include/cpu-sh4/cpu/watchdog.h
@@ -21,6 +21,12 @@
 #define WTCNT           0xffcc0000 /*WDTST*/
 #define WTST            WTCNT
 #define WTBST           0xffcc0008 /*WDTBST*/
+/* Register definitions */
+#elif   defined(CONFIG_CPU_SUBTYPE_SH7722) || \
+        defined(CONFIG_CPU_SUBTYPE_SH7723) || \
+        defined(CONFIG_CPU_SUBTYPE_SH7724)
+#define WTCNT           0xa4520000
+#define WTCSR           0xa4520004
 #else
 /* Register definitions */
 #define WTCNT           0xffc00008
diff --git a/arch/sh/include/mach-migor/mach/migor.h b/arch/sh/include/mach-migor/mach/migor.h
index cee6cb88e02..42fccf93412 100644
--- a/arch/sh/include/mach-migor/mach/migor.h
+++ b/arch/sh/include/mach-migor/mach/migor.h
@@ -1,6 +1,7 @@
 #ifndef __ASM_SH_MIGOR_H
 #define __ASM_SH_MIGOR_H
 
+#define PORT_MSELCRA 0xa4050180
 #define PORT_MSELCRB 0xa4050182
 #define BSC_CS4BCR 0xfec10010
 #define BSC_CS6ABCR 0xfec1001c
diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c
index 83da5debeed..e9fa1bfed53 100644
--- a/arch/sh/kernel/cpu/clock.c
+++ b/arch/sh/kernel/cpu/clock.c
@@ -404,7 +404,7 @@ EXPORT_SYMBOL_GPL(clk_round_rate);
  *  If an entry has a device ID, it must match
  *  If an entry has a connection ID, it must match
  * Then we take the most specific entry - with the following
- * order of precidence: dev+con > dev only > con only.
+ * order of precedence: dev+con > dev only > con only.
  */
 static struct clk *clk_find(const char *dev_id, const char *con_id)
 {
diff --git a/arch/sh/kernel/cpu/fpu.c b/arch/sh/kernel/cpu/fpu.c
index f059ed62cf5..7f1b70cace3 100644
--- a/arch/sh/kernel/cpu/fpu.c
+++ b/arch/sh/kernel/cpu/fpu.c
@@ -1,4 +1,5 @@
 #include <linux/sched.h>
+#include <linux/slab.h>
 #include <asm/processor.h>
 #include <asm/fpu.h>
 
diff --git a/arch/sh/kernel/cpu/hwblk.c b/arch/sh/kernel/cpu/hwblk.c
index c0ad7d46e78..67a1e811cfe 100644
--- a/arch/sh/kernel/cpu/hwblk.c
+++ b/arch/sh/kernel/cpu/hwblk.c
@@ -1,6 +1,5 @@
 #include <linux/clk.h>
 #include <linux/compiler.h>
-#include <linux/slab.h>
 #include <linux/io.h>
 #include <linux/spinlock.h>
 #include <asm/suspend.h>
diff --git a/arch/sh/kernel/cpu/sh4/sq.c b/arch/sh/kernel/cpu/sh4/sq.c
index fc065f9da6e..14726eef1ce 100644
--- a/arch/sh/kernel/cpu/sh4/sq.c
+++ b/arch/sh/kernel/cpu/sh4/sq.c
@@ -326,7 +326,7 @@ static struct attribute *sq_sysfs_attrs[] = {
         NULL,
 };
 
-static struct sysfs_ops sq_sysfs_ops = {
+static const struct sysfs_ops sq_sysfs_ops = {
         .show   = sq_sysfs_show,
         .store  = sq_sysfs_store,
 };
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index ef3f9782780..fd7e3639e84 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -7,19 +7,167 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  */
-#include <linux/platform_device.h>
 #include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/platform_device.h>
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
-#include <linux/mm.h>
+#include <linux/sh_timer.h>
 #include <linux/uio_driver.h>
 #include <linux/usb/m66592.h>
-#include <linux/sh_timer.h>
+
 #include <asm/clock.h>
+#include <asm/dmaengine.h>
 #include <asm/mmzone.h>
-#include <asm/dma-sh.h>
+#include <asm/siu.h>
+
+#include <cpu/dma-register.h>
 #include <cpu/sh7722.h>
 
+static struct sh_dmae_slave_config sh7722_dmae_slaves[] = {
+        {
+                .slave_id       = SHDMA_SLAVE_SCIF0_TX,
+                .addr           = 0xffe0000c,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x21,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF0_RX,
+                .addr           = 0xffe00014,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x22,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF1_TX,
+                .addr           = 0xffe1000c,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x25,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF1_RX,
+                .addr           = 0xffe10014,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x26,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF2_TX,
+                .addr           = 0xffe2000c,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x29,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF2_RX,
+                .addr           = 0xffe20014,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x2a,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SIUA_TX,
+                .addr           = 0xa454c098,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
+                .mid_rid        = 0xb1,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SIUA_RX,
+                .addr           = 0xa454c090,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
+                .mid_rid        = 0xb2,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SIUB_TX,
+                .addr           = 0xa454c09c,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
+                .mid_rid        = 0xb5,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SIUB_RX,
+                .addr           = 0xa454c094,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
+                .mid_rid        = 0xb6,
+        },
+};
+
+static struct sh_dmae_channel sh7722_dmae_channels[] = {
+        {
+                .offset = 0,
+                .dmars = 0,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x10,
+                .dmars = 0,
+                .dmars_bit = 8,
+        }, {
+                .offset = 0x20,
+                .dmars = 4,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x30,
+                .dmars = 4,
+                .dmars_bit = 8,
+        }, {
+                .offset = 0x50,
+                .dmars = 8,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x60,
+                .dmars = 8,
+                .dmars_bit = 8,
+        }
+};
+
+static unsigned int ts_shift[] = TS_SHIFT;
+
+static struct sh_dmae_pdata dma_platform_data = {
+        .slave          = sh7722_dmae_slaves,
+        .slave_num      = ARRAY_SIZE(sh7722_dmae_slaves),
+        .channel        = sh7722_dmae_channels,
+        .channel_num    = ARRAY_SIZE(sh7722_dmae_channels),
+        .ts_low_shift   = CHCR_TS_LOW_SHIFT,
+        .ts_low_mask    = CHCR_TS_LOW_MASK,
+        .ts_high_shift  = CHCR_TS_HIGH_SHIFT,
+        .ts_high_mask   = CHCR_TS_HIGH_MASK,
+        .ts_shift       = ts_shift,
+        .ts_shift_num   = ARRAY_SIZE(ts_shift),
+        .dmaor_init     = DMAOR_INIT,
+};
+
+static struct resource sh7722_dmae_resources[] = {
+        [0] = {
+                /* Channel registers and DMAOR */
+                .start  = 0xfe008020,
+                .end    = 0xfe00808f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                /* DMARSx */
+                .start  = 0xfe009000,
+                .end    = 0xfe00900b,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* DMA error IRQ */
+                .start  = 78,
+                .end    = 78,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                /* IRQ for channels 0-3 */
+                .start  = 48,
+                .end    = 51,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                /* IRQ for channels 4-5 */
+                .start  = 76,
+                .end    = 77,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device dma_device = {
+        .name           = "sh-dma-engine",
+        .id             = -1,
+        .resource       = sh7722_dmae_resources,
+        .num_resources  = ARRAY_SIZE(sh7722_dmae_resources),
+        .dev            = {
+                .platform_data  = &dma_platform_data,
+        },
+        .archdata = {
+                .hwblk_id = HWBLK_DMAC,
+        },
+};
+
 /* Serial */
 static struct plat_sci_port scif0_platform_data = {
         .mapbase        = 0xffe00000,
@@ -388,15 +536,36 @@ static struct platform_device tmu2_device = {
         },
 };
 
-static struct sh_dmae_pdata dma_platform_data = {
-        .mode = 0,
+static struct siu_platform siu_platform_data = {
+        .dma_dev        = &dma_device.dev,
+        .dma_slave_tx_a = SHDMA_SLAVE_SIUA_TX,
+        .dma_slave_rx_a = SHDMA_SLAVE_SIUA_RX,
+        .dma_slave_tx_b = SHDMA_SLAVE_SIUB_TX,
+        .dma_slave_rx_b = SHDMA_SLAVE_SIUB_RX,
 };
 
-static struct platform_device dma_device = {
-        .name           = "sh-dma-engine",
+static struct resource siu_resources[] = {
+        [0] = {
+                .start  = 0xa4540000,
+                .end    = 0xa454c10f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 108,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device siu_device = {
+        .name           = "sh_siu",
         .id             = -1,
-        .dev            = {
-                .platform_data  = &dma_platform_data,
+        .dev = {
+                .platform_data  = &siu_platform_data,
+        },
+        .resource       = siu_resources,
+        .num_resources  = ARRAY_SIZE(siu_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_SIU,
         },
 };
 
@@ -414,6 +583,7 @@ static struct platform_device *sh7722_devices[] __initdata = {
         &vpu_device,
         &veu_device,
         &jpu_device,
+        &siu_device,
         &dma_device,
 };
 
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index 31e3451f7e3..e7fa2a92fc1 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -21,22 +21,189 @@
 #include <linux/sh_timer.h>
 #include <linux/io.h>
 #include <linux/notifier.h>
+
 #include <asm/suspend.h>
 #include <asm/clock.h>
-#include <asm/dma-sh.h>
+#include <asm/dmaengine.h>
 #include <asm/mmzone.h>
+
+#include <cpu/dma-register.h>
 #include <cpu/sh7724.h>
 
 /* DMA */
-static struct sh_dmae_pdata dma_platform_data = {
-        .mode = SHDMA_DMAOR1,
+static struct sh_dmae_channel sh7724_dmae0_channels[] = {
+        {
+                .offset = 0,
+                .dmars = 0,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x10,
+                .dmars = 0,
+                .dmars_bit = 8,
+        }, {
+                .offset = 0x20,
+                .dmars = 4,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x30,
+                .dmars = 4,
+                .dmars_bit = 8,
+        }, {
+                .offset = 0x50,
+                .dmars = 8,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x60,
+                .dmars = 8,
+                .dmars_bit = 8,
+        }
+};
+
+static struct sh_dmae_channel sh7724_dmae1_channels[] = {
+        {
+                .offset = 0,
+                .dmars = 0,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x10,
+                .dmars = 0,
+                .dmars_bit = 8,
+        }, {
+                .offset = 0x20,
+                .dmars = 4,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x30,
+                .dmars = 4,
+                .dmars_bit = 8,
+        }, {
+                .offset = 0x50,
+                .dmars = 8,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x60,
+                .dmars = 8,
+                .dmars_bit = 8,
+        }
+};
+
+static unsigned int ts_shift[] = TS_SHIFT;
+
+static struct sh_dmae_pdata dma0_platform_data = {
+        .channel        = sh7724_dmae0_channels,
+        .channel_num    = ARRAY_SIZE(sh7724_dmae0_channels),
+        .ts_low_shift   = CHCR_TS_LOW_SHIFT,
+        .ts_low_mask    = CHCR_TS_LOW_MASK,
+        .ts_high_shift  = CHCR_TS_HIGH_SHIFT,
+        .ts_high_mask   = CHCR_TS_HIGH_MASK,
+        .ts_shift       = ts_shift,
+        .ts_shift_num   = ARRAY_SIZE(ts_shift),
+        .dmaor_init     = DMAOR_INIT,
+};
+
+static struct sh_dmae_pdata dma1_platform_data = {
+        .channel        = sh7724_dmae1_channels,
+        .channel_num    = ARRAY_SIZE(sh7724_dmae1_channels),
+        .ts_low_shift   = CHCR_TS_LOW_SHIFT,
+        .ts_low_mask    = CHCR_TS_LOW_MASK,
+        .ts_high_shift  = CHCR_TS_HIGH_SHIFT,
+        .ts_high_mask   = CHCR_TS_HIGH_MASK,
+        .ts_shift       = ts_shift,
+        .ts_shift_num   = ARRAY_SIZE(ts_shift),
+        .dmaor_init     = DMAOR_INIT,
+};
+
+/* Resource order important! */
+static struct resource sh7724_dmae0_resources[] = {
+        {
+                /* Channel registers and DMAOR */
+                .start  = 0xfe008020,
+                .end    = 0xfe00808f,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* DMARSx */
+                .start  = 0xfe009000,
+                .end    = 0xfe00900b,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* DMA error IRQ */
+                .start  = 78,
+                .end    = 78,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                /* IRQ for channels 0-3 */
+                .start  = 48,
+                .end    = 51,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                /* IRQ for channels 4-5 */
+                .start  = 76,
+                .end    = 77,
+                .flags  = IORESOURCE_IRQ,
+        },
 };
 
-static struct platform_device dma_device = {
-        .name   = "sh-dma-engine",
-        .id             = -1,
-        .dev    = {
-                .platform_data  = &dma_platform_data,
+/* Resource order important! */
+static struct resource sh7724_dmae1_resources[] = {
+        {
+                /* Channel registers and DMAOR */
+                .start  = 0xfdc08020,
+                .end    = 0xfdc0808f,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* DMARSx */
+                .start  = 0xfdc09000,
+                .end    = 0xfdc0900b,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* DMA error IRQ */
+                .start  = 74,
+                .end    = 74,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                /* IRQ for channels 0-3 */
+                .start  = 40,
+                .end    = 43,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                /* IRQ for channels 4-5 */
+                .start  = 72,
+                .end    = 73,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device dma0_device = {
+        .name           = "sh-dma-engine",
+        .id             = 0,
+        .resource       = sh7724_dmae0_resources,
+        .num_resources  = ARRAY_SIZE(sh7724_dmae0_resources),
+        .dev            = {
+                .platform_data  = &dma0_platform_data,
+        },
+        .archdata = {
+                .hwblk_id = HWBLK_DMAC0,
+        },
+};
+
+static struct platform_device dma1_device = {
+        .name           = "sh-dma-engine",
+        .id             = 1,
+        .resource       = sh7724_dmae1_resources,
+        .num_resources  = ARRAY_SIZE(sh7724_dmae1_resources),
+        .dev            = {
+                .platform_data  = &dma1_platform_data,
+        },
+        .archdata = {
+                .hwblk_id = HWBLK_DMAC1,
         },
 };
 
@@ -663,7 +830,8 @@ static struct platform_device *sh7724_devices[] __initdata = {
         &tmu3_device,
         &tmu4_device,
         &tmu5_device,
-        &dma_device,
+        &dma0_device,
+        &dma1_device,
         &rtc_device,
         &iic0_device,
         &iic1_device,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index f8f21618d78..02e792c90de 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -13,7 +13,10 @@
 #include <linux/io.h>
 #include <linux/serial_sci.h>
 #include <linux/sh_timer.h>
-#include <asm/dma-sh.h>
+
+#include <asm/dmaengine.h>
+
+#include <cpu/dma-register.h>
 
 static struct plat_sci_port scif0_platform_data = {
         .mapbase        = 0xffe00000,
@@ -247,15 +250,131 @@ static struct platform_device rtc_device = {
         .resource       = rtc_resources,
 };
 
-static struct sh_dmae_pdata dma_platform_data = {
-        .mode = (SHDMA_MIX_IRQ | SHDMA_DMAOR1),
+/* DMA */
+static struct sh_dmae_channel sh7780_dmae0_channels[] = {
+        {
+                .offset = 0,
+                .dmars = 0,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x10,
+                .dmars = 0,
+                .dmars_bit = 8,
+        }, {
+                .offset = 0x20,
+                .dmars = 4,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x30,
+                .dmars = 4,
+                .dmars_bit = 8,
+        }, {
+                .offset = 0x50,
+                .dmars = 8,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x60,
+                .dmars = 8,
+                .dmars_bit = 8,
+        }
+};
+
+static struct sh_dmae_channel sh7780_dmae1_channels[] = {
+        {
+                .offset = 0,
+        }, {
+                .offset = 0x10,
+        }, {
+                .offset = 0x20,
+        }, {
+                .offset = 0x30,
+        }, {
+                .offset = 0x50,
+        }, {
+                .offset = 0x60,
+        }
+};
+
+static unsigned int ts_shift[] = TS_SHIFT;
+
+static struct sh_dmae_pdata dma0_platform_data = {
+        .channel        = sh7780_dmae0_channels,
+        .channel_num    = ARRAY_SIZE(sh7780_dmae0_channels),
+        .ts_low_shift   = CHCR_TS_LOW_SHIFT,
+        .ts_low_mask    = CHCR_TS_LOW_MASK,
+        .ts_high_shift  = CHCR_TS_HIGH_SHIFT,
+        .ts_high_mask   = CHCR_TS_HIGH_MASK,
+        .ts_shift       = ts_shift,
+        .ts_shift_num   = ARRAY_SIZE(ts_shift),
+        .dmaor_init     = DMAOR_INIT,
+};
+
+static struct sh_dmae_pdata dma1_platform_data = {
+        .channel        = sh7780_dmae1_channels,
+        .channel_num    = ARRAY_SIZE(sh7780_dmae1_channels),
+        .ts_low_shift   = CHCR_TS_LOW_SHIFT,
+        .ts_low_mask    = CHCR_TS_LOW_MASK,
+        .ts_high_shift  = CHCR_TS_HIGH_SHIFT,
+        .ts_high_mask   = CHCR_TS_HIGH_MASK,
+        .ts_shift       = ts_shift,
+        .ts_shift_num   = ARRAY_SIZE(ts_shift),
+        .dmaor_init     = DMAOR_INIT,
 };
 
-static struct platform_device dma_device = {
+static struct resource sh7780_dmae0_resources[] = {
+        [0] = {
+                /* Channel registers and DMAOR */
+                .start  = 0xfc808020,
+                .end    = 0xfc80808f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                /* DMARSx */
+                .start  = 0xfc809000,
+                .end    = 0xfc80900b,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* Real DMA error IRQ is 38, and channel IRQs are 34-37, 44-45 */
+                .start  = 34,
+                .end    = 34,
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
+        },
+};
+
+static struct resource sh7780_dmae1_resources[] = {
+        [0] = {
+                /* Channel registers and DMAOR */
+                .start  = 0xfc818020,
+                .end    = 0xfc81808f,
+                .flags  = IORESOURCE_MEM,
+        },
+        /* DMAC1 has no DMARS */
+        {
+                /* Real DMA error IRQ is 38, and channel IRQs are 46-47, 92-95 */
+                .start  = 46,
+                .end    = 46,
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
+        },
+};
+
+static struct platform_device dma0_device = {
         .name           = "sh-dma-engine",
-        .id             = -1,
+        .id             = 0,
+        .resource       = sh7780_dmae0_resources,
+        .num_resources  = ARRAY_SIZE(sh7780_dmae0_resources),
         .dev            = {
-                .platform_data  = &dma_platform_data,
+                .platform_data  = &dma0_platform_data,
+        },
+};
+
+static struct platform_device dma1_device = {
+        .name           = "sh-dma-engine",
+        .id             = 1,
+        .resource       = sh7780_dmae1_resources,
+        .num_resources  = ARRAY_SIZE(sh7780_dmae1_resources),
+        .dev            = {
+                .platform_data  = &dma1_platform_data,
         },
 };
 
@@ -269,7 +388,8 @@ static struct platform_device *sh7780_devices[] __initdata = {
         &tmu4_device,
         &tmu5_device,
         &rtc_device,
-        &dma_device,
+        &dma0_device,
+        &dma1_device,
 };
 
 static int __init sh7780_devices_setup(void)
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index 23448d8c671..1fcd88b1671 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -14,9 +14,12 @@
 #include <linux/io.h>
 #include <linux/mm.h>
 #include <linux/sh_timer.h>
-#include <asm/dma-sh.h>
+
+#include <asm/dmaengine.h>
 #include <asm/mmzone.h>
 
+#include <cpu/dma-register.h>
+
 static struct plat_sci_port scif0_platform_data = {
         .mapbase        = 0xffea0000,
         .flags          = UPF_BOOT_AUTOCONF,
@@ -295,15 +298,131 @@ static struct platform_device tmu5_device = {
         .num_resources  = ARRAY_SIZE(tmu5_resources),
 };
 
-static struct sh_dmae_pdata dma_platform_data = {
-        .mode = (SHDMA_MIX_IRQ | SHDMA_DMAOR1),
+/* DMA */
+static struct sh_dmae_channel sh7785_dmae0_channels[] = {
+        {
+                .offset = 0,
+                .dmars = 0,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x10,
+                .dmars = 0,
+                .dmars_bit = 8,
+        }, {
+                .offset = 0x20,
+                .dmars = 4,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x30,
+                .dmars = 4,
+                .dmars_bit = 8,
+        }, {
+                .offset = 0x50,
+                .dmars = 8,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x60,
+                .dmars = 8,
+                .dmars_bit = 8,
+        }
+};
+
+static struct sh_dmae_channel sh7785_dmae1_channels[] = {
+        {
+                .offset = 0,
+        }, {
+                .offset = 0x10,
+        }, {
+                .offset = 0x20,
+        }, {
+                .offset = 0x30,
+        }, {
+                .offset = 0x50,
+        }, {
+                .offset = 0x60,
+        }
+};
+
+static unsigned int ts_shift[] = TS_SHIFT;
+
+static struct sh_dmae_pdata dma0_platform_data = {
+        .channel        = sh7785_dmae0_channels,
+        .channel_num    = ARRAY_SIZE(sh7785_dmae0_channels),
+        .ts_low_shift   = CHCR_TS_LOW_SHIFT,
+        .ts_low_mask    = CHCR_TS_LOW_MASK,
+        .ts_high_shift  = CHCR_TS_HIGH_SHIFT,
+        .ts_high_mask   = CHCR_TS_HIGH_MASK,
+        .ts_shift       = ts_shift,
+        .ts_shift_num   = ARRAY_SIZE(ts_shift),
+        .dmaor_init     = DMAOR_INIT,
+};
+
+static struct sh_dmae_pdata dma1_platform_data = {
+        .channel        = sh7785_dmae1_channels,
+        .channel_num    = ARRAY_SIZE(sh7785_dmae1_channels),
+        .ts_low_shift   = CHCR_TS_LOW_SHIFT,
+        .ts_low_mask    = CHCR_TS_LOW_MASK,
+        .ts_high_shift  = CHCR_TS_HIGH_SHIFT,
+        .ts_high_mask   = CHCR_TS_HIGH_MASK,
+        .ts_shift       = ts_shift,
+        .ts_shift_num   = ARRAY_SIZE(ts_shift),
+        .dmaor_init     = DMAOR_INIT,
 };
 
-static struct platform_device dma_device = {
+static struct resource sh7785_dmae0_resources[] = {
+        [0] = {
+                /* Channel registers and DMAOR */
+                .start  = 0xfc808020,
+                .end    = 0xfc80808f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                /* DMARSx */
+                .start  = 0xfc809000,
+                .end    = 0xfc80900b,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* Real DMA error IRQ is 39, and channel IRQs are 33-38 */
+                .start  = 33,
+                .end    = 33,
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
+        },
+};
+
+static struct resource sh7785_dmae1_resources[] = {
+        [0] = {
+                /* Channel registers and DMAOR */
+                .start  = 0xfcc08020,
+                .end    = 0xfcc0808f,
+                .flags  = IORESOURCE_MEM,
+        },
+        /* DMAC1 has no DMARS */
+        {
+                /* Real DMA error IRQ is 58, and channel IRQs are 52-57 */
+                .start  = 52,
+                .end    = 52,
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
+        },
+};
+
+static struct platform_device dma0_device = {
         .name           = "sh-dma-engine",
-        .id             = -1,
+        .id             = 0,
+        .resource       = sh7785_dmae0_resources,
+        .num_resources  = ARRAY_SIZE(sh7785_dmae0_resources),
         .dev            = {
-                .platform_data  = &dma_platform_data,
+                .platform_data  = &dma0_platform_data,
+        },
+};
+
+static struct platform_device dma1_device = {
+        .name           = "sh-dma-engine",
+        .id             = 1,
+        .resource       = sh7785_dmae1_resources,
+        .num_resources  = ARRAY_SIZE(sh7785_dmae1_resources),
+        .dev            = {
+                .platform_data  = &dma1_platform_data,
         },
 };
 
@@ -320,7 +439,8 @@ static struct platform_device *sh7785_devices[] __initdata = {
         &tmu3_device,
         &tmu4_device,
         &tmu5_device,
-        &dma_device,
+        &dma0_device,
+        &dma1_device,
 };
 
 static int __init sh7785_devices_setup(void)
diff --git a/arch/sh/kernel/cpufreq.c b/arch/sh/kernel/cpufreq.c
index dce4f3ff093..0fffacea6ed 100644
--- a/arch/sh/kernel/cpufreq.c
+++ b/arch/sh/kernel/cpufreq.c
@@ -48,7 +48,7 @@ static int sh_cpufreq_target(struct cpufreq_policy *policy,
                 return -ENODEV;
 
         cpus_allowed = current->cpus_allowed;
-        set_cpus_allowed(current, cpumask_of_cpu(cpu));
+        set_cpus_allowed_ptr(current, cpumask_of(cpu));
 
         BUG_ON(smp_processor_id() != cpu);
 
@@ -66,7 +66,7 @@ static int sh_cpufreq_target(struct cpufreq_policy *policy,
         freqs.flags     = 0;
 
         cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-        set_cpus_allowed(current, cpus_allowed);
+        set_cpus_allowed_ptr(current, &cpus_allowed);
         clk_set_rate(cpuclk, freq);
         cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 
diff --git a/arch/sh/kernel/dwarf.c b/arch/sh/kernel/dwarf.c
index bd1c497280a..a8234b2010d 100644
--- a/arch/sh/kernel/dwarf.c
+++ b/arch/sh/kernel/dwarf.c
@@ -22,6 +22,7 @@
 #include <linux/mm.h>
 #include <linux/elf.h>
 #include <linux/ftrace.h>
+#include <linux/slab.h>
 #include <asm/dwarf.h>
 #include <asm/unwinder.h>
 #include <asm/sections.h>
@@ -727,7 +728,7 @@ static int dwarf_parse_cie(void *entry, void *p, unsigned long len,
                            unsigned char *end, struct module *mod)
 {
         struct rb_node **rb_node = &cie_root.rb_node;
-        struct rb_node *parent;
+        struct rb_node *parent = *rb_node;
         struct dwarf_cie *cie;
         unsigned long flags;
         int count;
@@ -856,7 +857,7 @@ static int dwarf_parse_fde(void *entry, u32 entry_type,
                            unsigned char *end, struct module *mod)
 {
         struct rb_node **rb_node = &fde_root.rb_node;
-        struct rb_node *parent;
+        struct rb_node *parent = *rb_node;
         struct dwarf_fde *fde;
         struct dwarf_cie *cie;
         unsigned long flags;
diff --git a/arch/sh/kernel/hw_breakpoint.c b/arch/sh/kernel/hw_breakpoint.c
index e2f1753d275..675eea7785d 100644
--- a/arch/sh/kernel/hw_breakpoint.c
+++ b/arch/sh/kernel/hw_breakpoint.c
@@ -143,26 +143,6 @@ static int arch_check_va_in_kernelspace(unsigned long va, u8 hbp_len)
         return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE);
 }
 
-/*
- * Store a breakpoint's encoded address, length, and type.
- */
-static int arch_store_info(struct perf_event *bp)
-{
-        struct arch_hw_breakpoint *info = counter_arch_bp(bp);
-
-        /*
-         * User-space requests will always have the address field populated
-         * For kernel-addresses, either the address or symbol name can be
-         * specified.
-         */
-        if (info->name)
-                info->address = (unsigned long)kallsyms_lookup_name(info->name);
-        if (info->address)
-                return 0;
-
-        return -EINVAL;
-}
-
 int arch_bp_generic_fields(int sh_len, int sh_type,
                            int *gen_len, int *gen_type)
 {
@@ -276,10 +256,12 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp,
                 return ret;
         }
 
-        ret = arch_store_info(bp);
-
-        if (ret < 0)
-                return ret;
+        /*
+         * For kernel-addresses, either the address or symbol name can be
+         * specified.
+         */
+        if (info->name)
+                info->address = (unsigned long)kallsyms_lookup_name(info->name);
 
         /*
          * Check that the low-order bits of the address are appropriate
diff --git a/arch/sh/kernel/idle.c b/arch/sh/kernel/idle.c
index 0fd7b41f0a2..273f890b17a 100644
--- a/arch/sh/kernel/idle.c
+++ b/arch/sh/kernel/idle.c
@@ -112,7 +112,7 @@ void cpu_idle(void)
         }
 }
 
-void __cpuinit select_idle_routine(void)
+void __init select_idle_routine(void)
 {
         /*
          * If a platform has set its own idle routine, leave it alone.
diff --git a/arch/sh/kernel/kprobes.c b/arch/sh/kernel/kprobes.c
index c96850b061f..4049d99f76e 100644
--- a/arch/sh/kernel/kprobes.c
+++ b/arch/sh/kernel/kprobes.c
@@ -13,6 +13,7 @@
 #include <linux/ptrace.h>
 #include <linux/preempt.h>
 #include <linux/kdebug.h>
+#include <linux/slab.h>
 #include <asm/cacheflush.h>
 #include <asm/uaccess.h>
 
diff --git a/arch/sh/kernel/perf_event.c b/arch/sh/kernel/perf_event.c
index 7ff0943e7a0..81b6de41ae5 100644
--- a/arch/sh/kernel/perf_event.c
+++ b/arch/sh/kernel/perf_event.c
@@ -275,13 +275,30 @@ const struct pmu *hw_perf_event_init(struct perf_event *event)
         return &pmu;
 }
 
-void hw_perf_event_setup(int cpu)
+static void sh_pmu_setup(int cpu)
 {
         struct cpu_hw_events *cpuhw = &per_cpu(cpu_hw_events, cpu);
 
         memset(cpuhw, 0, sizeof(struct cpu_hw_events));
 }
 
+static int __cpuinit
+sh_pmu_notifier(struct notifier_block *self, unsigned long action, void *hcpu)
+{
+        unsigned int cpu = (long)hcpu;
+
+        switch (action & ~CPU_TASKS_FROZEN) {
+        case CPU_UP_PREPARE:
+                sh_pmu_setup(cpu);
+                break;
+
+        default:
+                break;
+        }
+
+        return NOTIFY_OK;
+}
+
 void hw_perf_enable(void)
 {
         if (!sh_pmu_initialized())
@@ -298,7 +315,7 @@ void hw_perf_disable(void)
         sh_pmu->disable_all();
 }
 
-int register_sh_pmu(struct sh_pmu *pmu)
+int __cpuinit register_sh_pmu(struct sh_pmu *pmu)
 {
         if (sh_pmu)
                 return -EBUSY;
@@ -308,5 +325,6 @@ int register_sh_pmu(struct sh_pmu *pmu)
 
         WARN_ON(pmu->num_events > MAX_HWEVENTS);
 
+        perf_cpu_notifier(sh_pmu_notifier);
         return 0;
 }
diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c
index 81add9b9ea6..17f89aa4e1b 100644
--- a/arch/sh/kernel/process.c
+++ b/arch/sh/kernel/process.c
@@ -1,5 +1,6 @@
 #include <linux/mm.h>
 #include <linux/kernel.h>
+#include <linux/slab.h>
 #include <linux/sched.h>
 
 struct kmem_cache *task_xstate_cachep = NULL;
diff --git a/arch/sh/kernel/process_32.c b/arch/sh/kernel/process_32.c
index 3cb88f114d7..052981972ae 100644
--- a/arch/sh/kernel/process_32.c
+++ b/arch/sh/kernel/process_32.c
@@ -15,6 +15,7 @@
  */
 #include <linux/module.h>
 #include <linux/mm.h>
+#include <linux/slab.h>
 #include <linux/elfcore.h>
 #include <linux/kallsyms.h>
 #include <linux/fs.h>
diff --git a/arch/sh/kernel/process_64.c b/arch/sh/kernel/process_64.c
index c90957a459a..d4ca6480e35 100644
--- a/arch/sh/kernel/process_64.c
+++ b/arch/sh/kernel/process_64.c
@@ -21,6 +21,7 @@
 #include <linux/fs.h>
 #include <linux/ptrace.h>
 #include <linux/reboot.h>
+#include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/io.h>
@@ -504,13 +505,6 @@ out:
         return error;
 }
 
-/*
- * These bracket the sleeping functions..
- */
-extern void interruptible_sleep_on(wait_queue_head_t *q);
-
-#define mid_sched       ((unsigned long) interruptible_sleep_on)
-
 #ifdef CONFIG_FRAME_POINTER
 static int in_sh64_switch_to(unsigned long pc)
 {
diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c
index c625cdab76d..7759a9a9321 100644
--- a/arch/sh/kernel/ptrace_32.c
+++ b/arch/sh/kernel/ptrace_32.c
@@ -17,7 +17,6 @@
 #include <linux/errno.h>
 #include <linux/ptrace.h>
 #include <linux/user.h>
-#include <linux/slab.h>
 #include <linux/security.h>
 #include <linux/signal.h>
 #include <linux/io.h>
diff --git a/arch/sh/kernel/return_address.c b/arch/sh/kernel/return_address.c
index df3ab581107..cbf1dd5372b 100644
--- a/arch/sh/kernel/return_address.c
+++ b/arch/sh/kernel/return_address.c
@@ -9,6 +9,7 @@
  * for more details.
  */
 #include <linux/kernel.h>
+#include <linux/module.h>
 #include <asm/dwarf.h>
 
 #ifdef CONFIG_DWARF_UNWINDER
@@ -52,3 +53,5 @@ void *return_address(unsigned int depth)
 }
 
 #endif
+
+EXPORT_SYMBOL_GPL(return_address);
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 3459e70eed7..8870d6ba64b 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -443,7 +443,7 @@ void __init setup_arch(char **cmdline_p)
 
         nodes_clear(node_online_map);
 
-        /* Setup bootmem with available RAM */
+        pmb_init();
         lmb_init();
         setup_memory();
         sparse_init();
@@ -452,7 +452,6 @@ void __init setup_arch(char **cmdline_p)
         conswitchp = &dummy_con;
 #endif
         paging_init();
-        pmb_init();
 
         ioremap_fixed_init();
 
diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c
index e124cf7008d..002cc612dee 100644
--- a/arch/sh/kernel/smp.c
+++ b/arch/sh/kernel/smp.c
@@ -69,6 +69,7 @@ asmlinkage void __cpuinit start_secondary(void)
         unsigned int cpu;
         struct mm_struct *mm = &init_mm;
 
+        enable_mmu();
         atomic_inc(&mm->mm_count);
         atomic_inc(&mm->mm_users);
         current->active_mm = mm;
diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c
index 71399cde03b..81f58371613 100644
--- a/arch/sh/kernel/sys_sh.c
+++ b/arch/sh/kernel/sys_sh.c
@@ -53,110 +53,6 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
         return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
 }
 
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-asmlinkage int sys_ipc(uint call, int first, int second,
-                       int third, void __user *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        if (call <= SEMTIMEDOP)
-                switch (call) {
-                case SEMOP:
-                        return sys_semtimedop(first,
-                                              (struct sembuf __user *)ptr,
-                                              second, NULL);
-                case SEMTIMEDOP:
-                        return sys_semtimedop(first,
-                                (struct sembuf __user *)ptr, second,
-                                (const struct timespec __user *)fifth);
-                case SEMGET:
-                        return sys_semget (first, second, third);
-                case SEMCTL: {
-                        union semun fourth;
-                        if (!ptr)
-                                return -EINVAL;
-                        if (get_user(fourth.__pad, (void __user * __user *) ptr))
-                                return -EFAULT;
-                        return sys_semctl (first, second, third, fourth);
-                        }
-                default:
-                        return -EINVAL;
-                }
-
-        if (call <= MSGCTL)
-                switch (call) {
-                case MSGSND:
-                        return sys_msgsnd (first, (struct msgbuf __user *) ptr,
-                                          second, third);
-                case MSGRCV:
-                        switch (version) {
-                        case 0:
-                        {
-                                struct ipc_kludge tmp;
-
-                                if (!ptr)
-                                        return -EINVAL;
-
-                                if (copy_from_user(&tmp,
-                                        (struct ipc_kludge __user *) ptr,
-                                                   sizeof (tmp)))
-                                        return -EFAULT;
-
-                                return sys_msgrcv (first, tmp.msgp, second,
-                                                   tmp.msgtyp, third);
-                        }
-                        default:
-                                return sys_msgrcv (first,
-                                                   (struct msgbuf __user *) ptr,
-                                                   second, fifth, third);
-                        }
-                case MSGGET:
-                        return sys_msgget ((key_t) first, second);
-                case MSGCTL:
-                        return sys_msgctl (first, second,
-                                           (struct msqid_ds __user *) ptr);
-                default:
-                        return -EINVAL;
-                }
-        if (call <= SHMCTL)
-                switch (call) {
-                case SHMAT:
-                        switch (version) {
-                        default: {
-                                ulong raddr;
-                                ret = do_shmat (first, (char __user *) ptr,
-                                                 second, &raddr);
-                                if (ret)
-                                        return ret;
-                                return put_user (raddr, (ulong __user *) third);
-                        }
-                        case 1: /* iBCS2 emulator entry point */
-                                if (!segment_eq(get_fs(), get_ds()))
-                                        return -EINVAL;
-                                return do_shmat (first, (char __user *) ptr,
-                                                  second, (ulong *) third);
-                        }
-                case SHMDT:
-                        return sys_shmdt ((char __user *)ptr);
-                case SHMGET:
-                        return sys_shmget (first, second, third);
-                case SHMCTL:
-                        return sys_shmctl (first, second,
-                                           (struct shmid_ds __user *) ptr);
-                default:
-                        return -EINVAL;
-                }
-
-        return -EINVAL;
-}
-
 /* sys_cacheflush -- flush (part of) the processor cache.  */
 asmlinkage int sys_cacheflush(unsigned long addr, unsigned long len, int op)
 {
@@ -197,14 +93,3 @@ asmlinkage int sys_cacheflush(unsigned long addr, unsigned long len, int op)
         up_read(&current->mm->mmap_sem);
         return 0;
 }
-
-asmlinkage int sys_uname(struct old_utsname __user *name)
-{
-        int err;
-        if (!name)
-                return -EFAULT;
-        down_read(&uts_sem);
-        err = copy_to_user(name, utsname(), sizeof(*name));
-        up_read(&uts_sem);
-        return err?-EFAULT:0;
-}
diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c
index 953fa161331..8a0072de2bc 100644
--- a/arch/sh/kernel/time.c
+++ b/arch/sh/kernel/time.c
@@ -39,12 +39,12 @@ static int null_rtc_set_time(const time_t secs)
 void (*rtc_sh_get_time)(struct timespec *) = null_rtc_get_time;
 int (*rtc_sh_set_time)(const time_t) = null_rtc_set_time;
 
-#ifdef CONFIG_GENERIC_CMOS_UPDATE
 void read_persistent_clock(struct timespec *ts)
 {
         rtc_sh_get_time(ts);
 }
 
+#ifdef CONFIG_GENERIC_CMOS_UPDATE
 int update_persistent_clock(struct timespec now)
 {
         return rtc_sh_set_time(now.tv_sec);
@@ -113,9 +113,5 @@ void __init time_init(void)
         hwblk_init();
         clk_init();
 
-        rtc_sh_get_time(&xtime);
-        set_normalized_timespec(&wall_to_monotonic,
-                                -xtime.tv_sec, -xtime.tv_nsec);
-
         late_time_init = sh_late_time_init;
 }
diff --git a/arch/sh/kernel/vsyscall/vsyscall.c b/arch/sh/kernel/vsyscall/vsyscall.c
index 3f7e415be86..242117cbad6 100644
--- a/arch/sh/kernel/vsyscall/vsyscall.c
+++ b/arch/sh/kernel/vsyscall/vsyscall.c
@@ -11,7 +11,6 @@
  * for more details.
  */
 #include <linux/mm.h>
-#include <linux/slab.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/gfp.h>
diff --git a/arch/sh/lib/libgcc.h b/arch/sh/lib/libgcc.h
index 3f19d1c5d94..05909d58e2f 100644
--- a/arch/sh/lib/libgcc.h
+++ b/arch/sh/lib/libgcc.h
@@ -17,8 +17,7 @@ struct DWstruct {
 #error I feel sick.
 #endif
 
-typedef union
-{
+typedef union {
         struct DWstruct s;
         long long ll;
 } DWunion;
diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c
index 902967e3f84..c86a0854025 100644
--- a/arch/sh/mm/consistent.c
+++ b/arch/sh/mm/consistent.c
@@ -16,6 +16,7 @@
 #include <linux/dma-debug.h>
 #include <linux/io.h>
 #include <linux/module.h>
+#include <linux/gfp.h>
 #include <asm/cacheflush.h>
 #include <asm/addrspace.h>
 
diff --git a/arch/sh/mm/hugetlbpage.c b/arch/sh/mm/hugetlbpage.c
index 9304117039c..9163db3e8d1 100644
--- a/arch/sh/mm/hugetlbpage.c
+++ b/arch/sh/mm/hugetlbpage.c
@@ -13,7 +13,6 @@
 #include <linux/mm.h>
 #include <linux/hugetlb.h>
 #include <linux/pagemap.h>
-#include <linux/slab.h>
 #include <linux/sysctl.h>
 
 #include <asm/mman.h>
diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c
index 68028e8f26c..c505de61a5c 100644
--- a/arch/sh/mm/init.c
+++ b/arch/sh/mm/init.c
@@ -10,6 +10,7 @@
 #include <linux/mm.h>
 #include <linux/swap.h>
 #include <linux/init.h>
+#include <linux/gfp.h>
 #include <linux/bootmem.h>
 #include <linux/proc_fs.h>
 #include <linux/pagemap.h>
diff --git a/arch/sh/mm/ioremap.c b/arch/sh/mm/ioremap.c
index c68d2d7d00a..0c99ec2e7ed 100644
--- a/arch/sh/mm/ioremap.c
+++ b/arch/sh/mm/ioremap.c
@@ -14,6 +14,7 @@
  */
 #include <linux/vmalloc.h>
 #include <linux/module.h>
+#include <linux/slab.h>
 #include <linux/mm.h>
 #include <linux/pci.h>
 #include <linux/io.h>
@@ -34,11 +35,12 @@
  * caller shouldn't need to know that small detail.
  */
 void __iomem * __init_refok
-__ioremap_caller(unsigned long phys_addr, unsigned long size,
+__ioremap_caller(phys_addr_t phys_addr, unsigned long size,
                  pgprot_t pgprot, void *caller)
 {
         struct vm_struct *area;
         unsigned long offset, last_addr, addr, orig_addr;
+        void __iomem *mapped;
 
         /* Don't allow wraparound or zero size */
         last_addr = phys_addr + size - 1;
@@ -46,6 +48,20 @@ __ioremap_caller(unsigned long phys_addr, unsigned long size,
                 return NULL;
 
         /*
+         * If we can't yet use the regular approach, go the fixmap route.
+         */
+        if (!mem_init_done)
+                return ioremap_fixed(phys_addr, size, pgprot);
+
+        /*
+         * First try to remap through the PMB.
+         * PMB entries are all pre-faulted.
+         */
+        mapped = pmb_remap_caller(phys_addr, size, pgprot, caller);
+        if (mapped && !IS_ERR(mapped))
+                return mapped;
+
+        /*
          * Mappings have to be page-aligned
          */
         offset = phys_addr & ~PAGE_MASK;
@@ -53,12 +69,6 @@ __ioremap_caller(unsigned long phys_addr, unsigned long size,
         size = PAGE_ALIGN(last_addr+1) - phys_addr;
 
         /*
-         * If we can't yet use the regular approach, go the fixmap route.
-         */
-        if (!mem_init_done)
-                return ioremap_fixed(phys_addr, offset, size, pgprot);
-
-        /*
          * Ok, go for it..
          */
         area = get_vm_area_caller(size, VM_IOREMAP, caller);
@@ -67,33 +77,10 @@ __ioremap_caller(unsigned long phys_addr, unsigned long size,
         area->phys_addr = phys_addr;
         orig_addr = addr = (unsigned long)area->addr;
 
-#ifdef CONFIG_PMB
-        /*
-         * First try to remap through the PMB once a valid VMA has been
-         * established. Smaller allocations (or the rest of the size
-         * remaining after a PMB mapping due to the size not being
-         * perfectly aligned on a PMB size boundary) are then mapped
-         * through the UTLB using conventional page tables.
-         *
-         * PMB entries are all pre-faulted.
-         */
-        if (unlikely(phys_addr >= P1SEG)) {
-                unsigned long mapped;
-
-                mapped = pmb_remap(addr, phys_addr, size, pgprot);
-                if (likely(mapped)) {
-                        addr            += mapped;
-                        phys_addr       += mapped;
-                        size            -= mapped;
-                }
+        if (ioremap_page_range(addr, addr + size, phys_addr, pgprot)) {
+                vunmap((void *)orig_addr);
+                return NULL;
         }
-#endif
-
-        if (likely(size))
-                if (ioremap_page_range(addr, addr + size, phys_addr, pgprot)) {
-                        vunmap((void *)orig_addr);
-                        return NULL;
-                }
 
         return (void __iomem *)(offset + (char *)orig_addr);
 }
@@ -133,23 +120,11 @@ void __iounmap(void __iomem *addr)
         if (iounmap_fixed(addr) == 0)
                 return;
 
-#ifdef CONFIG_PMB
         /*
-         * Purge any PMB entries that may have been established for this
-         * mapping, then proceed with conventional VMA teardown.
-         *
-         * XXX: Note that due to the way that remove_vm_area() does
-         * matching of the resultant VMA, we aren't able to fast-forward
-         * the address past the PMB space until the end of the VMA where
-         * the page tables reside. As such, unmap_vm_area() will be
-         * forced to linearly scan over the area until it finds the page
-         * tables where PTEs that need to be unmapped actually reside,
-         * which is far from optimal. Perhaps we need to use a separate
-         * VMA for the PMB mappings?
-         *                                      -- PFM.
+         * If the PMB handled it, there's nothing else to do.
          */
-        pmb_unmap(vaddr);
-#endif
+        if (pmb_unmap(addr) == 0)
+                return;
 
         p = remove_vm_area((void *)(vaddr & PAGE_MASK));
         if (!p) {
diff --git a/arch/sh/mm/ioremap_fixed.c b/arch/sh/mm/ioremap_fixed.c
index 0b78b1e20ef..efbe84af998 100644
--- a/arch/sh/mm/ioremap_fixed.c
+++ b/arch/sh/mm/ioremap_fixed.c
@@ -15,7 +15,6 @@
 #include <linux/io.h>
 #include <linux/bootmem.h>
 #include <linux/proc_fs.h>
-#include <linux/slab.h>
 #include <asm/fixmap.h>
 #include <asm/page.h>
 #include <asm/pgalloc.h>
@@ -45,14 +44,21 @@ void __init ioremap_fixed_init(void)
 }
 
 void __init __iomem *
-ioremap_fixed(resource_size_t phys_addr, unsigned long offset,
-              unsigned long size, pgprot_t prot)
+ioremap_fixed(phys_addr_t phys_addr, unsigned long size, pgprot_t prot)
 {
         enum fixed_addresses idx0, idx;
         struct ioremap_map *map;
         unsigned int nrpages;
+        unsigned long offset;
         int i, slot;
 
+        /*
+         * Mappings have to be page-aligned
+         */
+        offset = phys_addr & ~PAGE_MASK;
+        phys_addr &= PAGE_MASK;
+        size = PAGE_ALIGN(phys_addr + size) - phys_addr;
+
         slot = -1;
         for (i = 0; i < FIX_N_IOREMAPS; i++) {
                 map = &ioremap_maps[i];
diff --git a/arch/sh/mm/numa.c b/arch/sh/mm/numa.c
index 422e9272187..961b34085e3 100644
--- a/arch/sh/mm/numa.c
+++ b/arch/sh/mm/numa.c
@@ -74,6 +74,9 @@ void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end)
         start_pfn = start >> PAGE_SHIFT;
         end_pfn = end >> PAGE_SHIFT;
 
+        pmb_bolt_mapping((unsigned long)__va(start), start, end - start,
+                         PAGE_KERNEL);
+
         lmb_add(start, end - start);
 
         __add_active_range(nid, start_pfn, end_pfn);
diff --git a/arch/sh/mm/pgtable.c b/arch/sh/mm/pgtable.c
index 6f21fb1d872..26e03a1f7ca 100644
--- a/arch/sh/mm/pgtable.c
+++ b/arch/sh/mm/pgtable.c
@@ -1,4 +1,5 @@
 #include <linux/mm.h>
+#include <linux/slab.h>
 
 #define PGALLOC_GFP GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO
 
diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c
index 198bcff5e96..e43ec600afc 100644
--- a/arch/sh/mm/pmb.c
+++ b/arch/sh/mm/pmb.c
@@ -15,7 +15,6 @@
 #include <linux/sysdev.h>
 #include <linux/cpu.h>
 #include <linux/module.h>
-#include <linux/slab.h>
 #include <linux/bitops.h>
 #include <linux/debugfs.h>
 #include <linux/fs.h>
@@ -23,7 +22,8 @@
 #include <linux/err.h>
 #include <linux/io.h>
 #include <linux/spinlock.h>
-#include <linux/rwlock.h>
+#include <linux/vmalloc.h>
+#include <asm/cacheflush.h>
 #include <asm/sizes.h>
 #include <asm/system.h>
 #include <asm/uaccess.h>
@@ -52,12 +52,24 @@ struct pmb_entry {
         struct pmb_entry *link;
 };
 
+static struct {
+        unsigned long size;
+        int flag;
+} pmb_sizes[] = {
+        { .size = SZ_512M, .flag = PMB_SZ_512M, },
+        { .size = SZ_128M, .flag = PMB_SZ_128M, },
+        { .size = SZ_64M,  .flag = PMB_SZ_64M,  },
+        { .size = SZ_16M,  .flag = PMB_SZ_16M,  },
+};
+
 static void pmb_unmap_entry(struct pmb_entry *, int depth);
 
 static DEFINE_RWLOCK(pmb_rwlock);
 static struct pmb_entry pmb_entry_list[NR_PMB_ENTRIES];
 static DECLARE_BITMAP(pmb_map, NR_PMB_ENTRIES);
 
+static unsigned int pmb_iomapping_enabled;
+
 static __always_inline unsigned long mk_pmb_entry(unsigned int entry)
 {
         return (entry & PMB_E_MASK) << PMB_E_SHIFT;
@@ -73,6 +85,142 @@ static __always_inline unsigned long mk_pmb_data(unsigned int entry)
         return mk_pmb_entry(entry) | PMB_DATA;
 }
 
+static __always_inline unsigned int pmb_ppn_in_range(unsigned long ppn)
+{
+        return ppn >= __pa(memory_start) && ppn < __pa(memory_end);
+}
+
+/*
+ * Ensure that the PMB entries match our cache configuration.
+ *
+ * When we are in 32-bit address extended mode, CCR.CB becomes
+ * invalid, so care must be taken to manually adjust cacheable
+ * translations.
+ */
+static __always_inline unsigned long pmb_cache_flags(void)
+{
+        unsigned long flags = 0;
+
+#if defined(CONFIG_CACHE_OFF)
+        flags |= PMB_WT | PMB_UB;
+#elif defined(CONFIG_CACHE_WRITETHROUGH)
+        flags |= PMB_C | PMB_WT | PMB_UB;
+#elif defined(CONFIG_CACHE_WRITEBACK)
+        flags |= PMB_C;
+#endif
+
+        return flags;
+}
+
+/*
+ * Convert typical pgprot value to the PMB equivalent
+ */
+static inline unsigned long pgprot_to_pmb_flags(pgprot_t prot)
+{
+        unsigned long pmb_flags = 0;
+        u64 flags = pgprot_val(prot);
+
+        if (flags & _PAGE_CACHABLE)
+                pmb_flags |= PMB_C;
+        if (flags & _PAGE_WT)
+                pmb_flags |= PMB_WT | PMB_UB;
+
+        return pmb_flags;
+}
+
+static inline bool pmb_can_merge(struct pmb_entry *a, struct pmb_entry *b)
+{
+        return (b->vpn == (a->vpn + a->size)) &&
+               (b->ppn == (a->ppn + a->size)) &&
+               (b->flags == a->flags);
+}
+
+static bool pmb_mapping_exists(unsigned long vaddr, phys_addr_t phys,
+                               unsigned long size)
+{
+        int i;
+
+        read_lock(&pmb_rwlock);
+
+        for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
+                struct pmb_entry *pmbe, *iter;
+                unsigned long span;
+
+                if (!test_bit(i, pmb_map))
+                        continue;
+
+                pmbe = &pmb_entry_list[i];
+
+                /*
+                 * See if VPN and PPN are bounded by an existing mapping.
+                 */
+                if ((vaddr < pmbe->vpn) || (vaddr >= (pmbe->vpn + pmbe->size)))
+                        continue;
+                if ((phys < pmbe->ppn) || (phys >= (pmbe->ppn + pmbe->size)))
+                        continue;
+
+                /*
+                 * Now see if we're in range of a simple mapping.
+                 */
+                if (size <= pmbe->size) {
+                        read_unlock(&pmb_rwlock);
+                        return true;
+                }
+
+                span = pmbe->size;
+
+                /*
+                 * Finally for sizes that involve compound mappings, walk
+                 * the chain.
+                 */
+                for (iter = pmbe->link; iter; iter = iter->link)
+                        span += iter->size;
+
+                /*
+                 * Nothing else to do if the range requirements are met.
+                 */
+                if (size <= span) {
+                        read_unlock(&pmb_rwlock);
+                        return true;
+                }
+        }
+
+        read_unlock(&pmb_rwlock);
+        return false;
+}
+
+static bool pmb_size_valid(unsigned long size)
+{
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++)
+                if (pmb_sizes[i].size == size)
+                        return true;
+
+        return false;
+}
+
+static inline bool pmb_addr_valid(unsigned long addr, unsigned long size)
+{
+        return (addr >= P1SEG && (addr + size - 1) < P3SEG);
+}
+
+static inline bool pmb_prot_valid(pgprot_t prot)
+{
+        return (pgprot_val(prot) & _PAGE_USER) == 0;
+}
+
+static int pmb_size_to_flags(unsigned long size)
+{
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++)
+                if (pmb_sizes[i].size == size)
+                        return pmb_sizes[i].flag;
+
+        return 0;
+}
+
 static int pmb_alloc_entry(void)
 {
         int pos;
@@ -140,33 +288,22 @@ static void pmb_free(struct pmb_entry *pmbe)
 }
 
 /*
- * Ensure that the PMB entries match our cache configuration.
- *
- * When we are in 32-bit address extended mode, CCR.CB becomes
- * invalid, so care must be taken to manually adjust cacheable
- * translations.
+ * Must be run uncached.
  */
-static __always_inline unsigned long pmb_cache_flags(void)
+static void __set_pmb_entry(struct pmb_entry *pmbe)
 {
-        unsigned long flags = 0;
+        unsigned long addr, data;
 
-#if defined(CONFIG_CACHE_WRITETHROUGH)
-        flags |= PMB_C | PMB_WT | PMB_UB;
-#elif defined(CONFIG_CACHE_WRITEBACK)
-        flags |= PMB_C;
-#endif
+        addr = mk_pmb_addr(pmbe->entry);
+        data = mk_pmb_data(pmbe->entry);
 
-        return flags;
-}
+        jump_to_uncached();
 
-/*
- * Must be run uncached.
- */
-static void __set_pmb_entry(struct pmb_entry *pmbe)
-{
-        writel_uncached(pmbe->vpn | PMB_V, mk_pmb_addr(pmbe->entry));
-        writel_uncached(pmbe->ppn | pmbe->flags | PMB_V,
-                        mk_pmb_data(pmbe->entry));
+        /* Set V-bit */
+        __raw_writel(pmbe->vpn | PMB_V, addr);
+        __raw_writel(pmbe->ppn | pmbe->flags | PMB_V, data);
+
+        back_to_cached();
 }
 
 static void __clear_pmb_entry(struct pmb_entry *pmbe)
@@ -185,6 +322,7 @@ static void __clear_pmb_entry(struct pmb_entry *pmbe)
         writel_uncached(data_val & ~PMB_V, data);
 }
 
+#ifdef CONFIG_PM
 static void set_pmb_entry(struct pmb_entry *pmbe)
 {
         unsigned long flags;
@@ -193,145 +331,157 @@ static void set_pmb_entry(struct pmb_entry *pmbe)
         __set_pmb_entry(pmbe);
         spin_unlock_irqrestore(&pmbe->lock, flags);
 }
+#endif /* CONFIG_PM */
 
-static struct {
-        unsigned long size;
-        int flag;
-} pmb_sizes[] = {
-        { .size = SZ_512M, .flag = PMB_SZ_512M, },
-        { .size = SZ_128M, .flag = PMB_SZ_128M, },
-        { .size = SZ_64M,  .flag = PMB_SZ_64M,  },
-        { .size = SZ_16M,  .flag = PMB_SZ_16M,  },
-};
-
-long pmb_remap(unsigned long vaddr, unsigned long phys,
-               unsigned long size, pgprot_t prot)
+int pmb_bolt_mapping(unsigned long vaddr, phys_addr_t phys,
+                     unsigned long size, pgprot_t prot)
 {
         struct pmb_entry *pmbp, *pmbe;
-        unsigned long wanted;
-        int pmb_flags, i;
-        long err;
-        u64 flags;
-
-        flags = pgprot_val(prot);
+        unsigned long orig_addr, orig_size;
+        unsigned long flags, pmb_flags;
+        int i, mapped;
 
-        pmb_flags = PMB_WT | PMB_UB;
+        if (!pmb_addr_valid(vaddr, size))
+                return -EFAULT;
+        if (pmb_mapping_exists(vaddr, phys, size))
+                return 0;
 
-        /* Convert typical pgprot value to the PMB equivalent */
-        if (flags & _PAGE_CACHABLE) {
-                pmb_flags |= PMB_C;
+        orig_addr = vaddr;
+        orig_size = size;
 
-                if ((flags & _PAGE_WT) == 0)
-                        pmb_flags &= ~(PMB_WT | PMB_UB);
-        }
+        flush_tlb_kernel_range(vaddr, vaddr + size);
 
+        pmb_flags = pgprot_to_pmb_flags(prot);
         pmbp = NULL;
-        wanted = size;
 
-again:
-        for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++) {
-                unsigned long flags;
+        do {
+                for (i = mapped = 0; i < ARRAY_SIZE(pmb_sizes); i++) {
+                        if (size < pmb_sizes[i].size)
+                                continue;
+
+                        pmbe = pmb_alloc(vaddr, phys, pmb_flags |
+                                         pmb_sizes[i].flag, PMB_NO_ENTRY);
+                        if (IS_ERR(pmbe)) {
+                                pmb_unmap_entry(pmbp, mapped);
+                                return PTR_ERR(pmbe);
+                        }
 
-                if (size < pmb_sizes[i].size)
-                        continue;
+                        spin_lock_irqsave(&pmbe->lock, flags);
 
-                pmbe = pmb_alloc(vaddr, phys, pmb_flags | pmb_sizes[i].flag,
-                                 PMB_NO_ENTRY);
-                if (IS_ERR(pmbe)) {
-                        err = PTR_ERR(pmbe);
-                        goto out;
-                }
+                        pmbe->size = pmb_sizes[i].size;
 
-                spin_lock_irqsave(&pmbe->lock, flags);
+                        __set_pmb_entry(pmbe);
 
-                __set_pmb_entry(pmbe);
+                        phys    += pmbe->size;
+                        vaddr   += pmbe->size;
+                        size    -= pmbe->size;
 
-                phys    += pmb_sizes[i].size;
-                vaddr   += pmb_sizes[i].size;
-                size    -= pmb_sizes[i].size;
+                        /*
+                         * Link adjacent entries that span multiple PMB
+                         * entries for easier tear-down.
+                         */
+                        if (likely(pmbp)) {
+                                spin_lock(&pmbp->lock);
+                                pmbp->link = pmbe;
+                                spin_unlock(&pmbp->lock);
+                        }
 
-                pmbe->size = pmb_sizes[i].size;
+                        pmbp = pmbe;
 
-                /*
-                 * Link adjacent entries that span multiple PMB entries
-                 * for easier tear-down.
-                 */
-                if (likely(pmbp)) {
-                        spin_lock(&pmbp->lock);
-                        pmbp->link = pmbe;
-                        spin_unlock(&pmbp->lock);
+                        /*
+                         * Instead of trying smaller sizes on every
+                         * iteration (even if we succeed in allocating
+                         * space), try using pmb_sizes[i].size again.
+                         */
+                        i--;
+                        mapped++;
+
+                        spin_unlock_irqrestore(&pmbe->lock, flags);
                 }
+        } while (size >= SZ_16M);
 
-                pmbp = pmbe;
+        flush_cache_vmap(orig_addr, orig_addr + orig_size);
 
-                /*
-                 * Instead of trying smaller sizes on every iteration
-                 * (even if we succeed in allocating space), try using
-                 * pmb_sizes[i].size again.
-                 */
-                i--;
+        return 0;
+}
 
-                spin_unlock_irqrestore(&pmbe->lock, flags);
-        }
+void __iomem *pmb_remap_caller(phys_addr_t phys, unsigned long size,
+                               pgprot_t prot, void *caller)
+{
+        unsigned long vaddr;
+        phys_addr_t offset, last_addr;
+        phys_addr_t align_mask;
+        unsigned long aligned;
+        struct vm_struct *area;
+        int i, ret;
 
-        if (size >= SZ_16M)
-                goto again;
+        if (!pmb_iomapping_enabled)
+                return NULL;
 
-        return wanted - size;
+        /*
+         * Small mappings need to go through the TLB.
+         */
+        if (size < SZ_16M)
+                return ERR_PTR(-EINVAL);
+        if (!pmb_prot_valid(prot))
+                return ERR_PTR(-EINVAL);
 
-out:
-        pmb_unmap_entry(pmbp, NR_PMB_ENTRIES);
+        for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++)
+                if (size >= pmb_sizes[i].size)
+                        break;
+
+        last_addr = phys + size;
+        align_mask = ~(pmb_sizes[i].size - 1);
+        offset = phys & ~align_mask;
+        phys &= align_mask;
+        aligned = ALIGN(last_addr, pmb_sizes[i].size) - phys;
+
+        /*
+         * XXX: This should really start from uncached_end, but this
+         * causes the MMU to reset, so for now we restrict it to the
+         * 0xb000...0xc000 range.
+         */
+        area = __get_vm_area_caller(aligned, VM_IOREMAP, 0xb0000000,
+                                    P3SEG, caller);
+        if (!area)
+                return NULL;
+
+        area->phys_addr = phys;
+        vaddr = (unsigned long)area->addr;
 
-        return err;
+        ret = pmb_bolt_mapping(vaddr, phys, size, prot);
+        if (unlikely(ret != 0))
+                return ERR_PTR(ret);
+
+        return (void __iomem *)(offset + (char *)vaddr);
 }
 
-void pmb_unmap(unsigned long addr)
+int pmb_unmap(void __iomem *addr)
 {
         struct pmb_entry *pmbe = NULL;
-        int i;
+        unsigned long vaddr = (unsigned long __force)addr;
+        int i, found = 0;
 
         read_lock(&pmb_rwlock);
 
         for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
                 if (test_bit(i, pmb_map)) {
                         pmbe = &pmb_entry_list[i];
-                        if (pmbe->vpn == addr)
+                        if (pmbe->vpn == vaddr) {
+                                found = 1;
                                 break;
+                        }
                 }
         }
 
         read_unlock(&pmb_rwlock);
 
-        pmb_unmap_entry(pmbe, NR_PMB_ENTRIES);
-}
-
-static bool pmb_can_merge(struct pmb_entry *a, struct pmb_entry *b)
-{
-        return (b->vpn == (a->vpn + a->size)) &&
-               (b->ppn == (a->ppn + a->size)) &&
-               (b->flags == a->flags);
-}
-
-static bool pmb_size_valid(unsigned long size)
-{
-        int i;
-
-        for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++)
-                if (pmb_sizes[i].size == size)
-                        return true;
-
-        return false;
-}
-
-static int pmb_size_to_flags(unsigned long size)
-{
-        int i;
-
-        for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++)
-                if (pmb_sizes[i].size == size)
-                        return pmb_sizes[i].flag;
+        if (found) {
+                pmb_unmap_entry(pmbe, NR_PMB_ENTRIES);
+                return 0;
+        }
 
-        return 0;
+        return -EINVAL;
 }
 
 static void __pmb_unmap_entry(struct pmb_entry *pmbe, int depth)
@@ -351,6 +501,8 @@ static void __pmb_unmap_entry(struct pmb_entry *pmbe, int depth)
                  */
                 __clear_pmb_entry(pmbe);
 
+                flush_cache_vunmap(pmbe->vpn, pmbe->vpn + pmbe->size);
+
                 pmbe = pmblink->link;
 
                 pmb_free(pmblink);
@@ -369,11 +521,6 @@ static void pmb_unmap_entry(struct pmb_entry *pmbe, int depth)
         write_unlock_irqrestore(&pmb_rwlock, flags);
 }
 
-static __always_inline unsigned int pmb_ppn_in_range(unsigned long ppn)
-{
-        return ppn >= __pa(memory_start) && ppn < __pa(memory_end);
-}
-
 static void __init pmb_notify(void)
 {
         int i;
@@ -625,6 +772,18 @@ static void __init pmb_resize(void)
 }
 #endif
 
+static int __init early_pmb(char *p)
+{
+        if (!p)
+                return 0;
+
+        if (strstr(p, "iomap"))
+                pmb_iomapping_enabled = 1;
+
+        return 0;
+}
+early_param("pmb", early_pmb);
+
 void __init pmb_init(void)
 {
         /* Synchronize software state */
@@ -644,7 +803,7 @@ void __init pmb_init(void)
         writel_uncached(0, PMB_IRMCR);
 
         /* Flush out the TLB */
-        __raw_writel(__raw_readl(MMUCR) | MMUCR_TI, MMUCR);
+        local_flush_tlb_all();
         ctrl_barrier();
 }
 
@@ -713,7 +872,7 @@ static int __init pmb_debugfs_init(void)
 
         return 0;
 }
-postcore_initcall(pmb_debugfs_init);
+subsys_initcall(pmb_debugfs_init);
 
 #ifdef CONFIG_PM
 static int pmb_sysdev_suspend(struct sys_device *dev, pm_message_t state)
diff --git a/arch/sh/mm/tlb-pteaex.c b/arch/sh/mm/tlb-pteaex.c
index 32dc674c550..b71db6af806 100644
--- a/arch/sh/mm/tlb-pteaex.c
+++ b/arch/sh/mm/tlb-pteaex.c
@@ -73,5 +73,35 @@ void local_flush_tlb_one(unsigned long asid, unsigned long page)
         jump_to_uncached();
         __raw_writel(page, MMU_UTLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT);
         __raw_writel(asid, MMU_UTLB_ADDRESS_ARRAY2 | MMU_PAGE_ASSOC_BIT);
+        __raw_writel(page, MMU_ITLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT);
+        __raw_writel(asid, MMU_ITLB_ADDRESS_ARRAY2 | MMU_PAGE_ASSOC_BIT);
         back_to_cached();
 }
+
+void local_flush_tlb_all(void)
+{
+        unsigned long flags, status;
+        int i;
+
+        /*
+         * Flush all the TLB.
+         */
+        local_irq_save(flags);
+        jump_to_uncached();
+
+        status = __raw_readl(MMUCR);
+        status = ((status & MMUCR_URB) >> MMUCR_URB_SHIFT);
+
+        if (status == 0)
+                status = MMUCR_URB_NENTRIES;
+
+        for (i = 0; i < status; i++)
+                __raw_writel(0x0, MMU_UTLB_ADDRESS_ARRAY | (i << 8));
+
+        for (i = 0; i < 4; i++)
+                __raw_writel(0x0, MMU_ITLB_ADDRESS_ARRAY | (i << 8));
+
+        back_to_cached();
+        ctrl_barrier();
+        local_irq_restore(flags);
+}
diff --git a/arch/sh/mm/tlb-sh3.c b/arch/sh/mm/tlb-sh3.c
index 4f5f7cbdd50..7a940dbfc2e 100644
--- a/arch/sh/mm/tlb-sh3.c
+++ b/arch/sh/mm/tlb-sh3.c
@@ -77,3 +77,22 @@ void local_flush_tlb_one(unsigned long asid, unsigned long page)
         for (i = 0; i < ways; i++)
                 __raw_writel(data, addr + (i << 8));
 }
+
+void local_flush_tlb_all(void)
+{
+        unsigned long flags, status;
+
+        /*
+         * Flush all the TLB.
+         *
+         * Write to the MMU control register's bit:
+         *      TF-bit for SH-3, TI-bit for SH-4.
+         *      It's same position, bit #2.
+         */
+        local_irq_save(flags);
+        status = __raw_readl(MMUCR);
+        status |= 0x04;
+        __raw_writel(status, MMUCR);
+        ctrl_barrier();
+        local_irq_restore(flags);
+}
diff --git a/arch/sh/mm/tlb-sh4.c b/arch/sh/mm/tlb-sh4.c
index ccac77f504a..cfdf7930d29 100644
--- a/arch/sh/mm/tlb-sh4.c
+++ b/arch/sh/mm/tlb-sh4.c
@@ -80,3 +80,31 @@ void local_flush_tlb_one(unsigned long asid, unsigned long page)
         __raw_writel(data, addr);
         back_to_cached();
 }
+
+void local_flush_tlb_all(void)
+{
+        unsigned long flags, status;
+        int i;
+
+        /*
+         * Flush all the TLB.
+         */
+        local_irq_save(flags);
+        jump_to_uncached();
+
+        status = __raw_readl(MMUCR);
+        status = ((status & MMUCR_URB) >> MMUCR_URB_SHIFT);
+
+        if (status == 0)
+                status = MMUCR_URB_NENTRIES;
+
+        for (i = 0; i < status; i++)
+                __raw_writel(0x0, MMU_UTLB_ADDRESS_ARRAY | (i << 8));
+
+        for (i = 0; i < 4; i++)
+                __raw_writel(0x0, MMU_ITLB_ADDRESS_ARRAY | (i << 8));
+
+        back_to_cached();
+        ctrl_barrier();
+        local_irq_restore(flags);
+}
diff --git a/arch/sh/mm/tlb-urb.c b/arch/sh/mm/tlb-urb.c
index bb5b9098956..c92ce20db39 100644
--- a/arch/sh/mm/tlb-urb.c
+++ b/arch/sh/mm/tlb-urb.c
@@ -24,13 +24,9 @@ void tlb_wire_entry(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
 
         local_irq_save(flags);
 
-        /* Load the entry into the TLB */
-        __update_tlb(vma, addr, pte);
-
-        /* ... and wire it up. */
         status = __raw_readl(MMUCR);
         urb = (status & MMUCR_URB) >> MMUCR_URB_SHIFT;
-        status &= ~MMUCR_URB;
+        status &= ~MMUCR_URC;
 
         /*
          * Make sure we're not trying to wire the last TLB entry slot.
@@ -39,7 +35,23 @@ void tlb_wire_entry(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
 
         urb = urb % MMUCR_URB_NENTRIES;
 
+        /*
+         * Insert this entry into the highest non-wired TLB slot (via
+         * the URC field).
+         */
+        status |= (urb << MMUCR_URC_SHIFT);
+        __raw_writel(status, MMUCR);
+        ctrl_barrier();
+
+        /* Load the entry into the TLB */
+        __update_tlb(vma, addr, pte);
+
+        /* ... and wire it up. */
+        status = __raw_readl(MMUCR);
+
+        status &= ~MMUCR_URB;
         status |= (urb << MMUCR_URB_SHIFT);
+
         __raw_writel(status, MMUCR);
         ctrl_barrier();
 
diff --git a/arch/sh/mm/tlbflush_32.c b/arch/sh/mm/tlbflush_32.c
index 004bb3f25b5..3fbe03ce8fe 100644
--- a/arch/sh/mm/tlbflush_32.c
+++ b/arch/sh/mm/tlbflush_32.c
@@ -119,22 +119,3 @@ void local_flush_tlb_mm(struct mm_struct *mm)
                 local_irq_restore(flags);
         }
 }
-
-void local_flush_tlb_all(void)
-{
-        unsigned long flags, status;
-
-        /*
-         * Flush all the TLB.
-         *
-         * Write to the MMU control register's bit:
-         *      TF-bit for SH-3, TI-bit for SH-4.
-         *      It's same position, bit #2.
-         */
-        local_irq_save(flags);
-        status = __raw_readl(MMUCR);
-        status |= 0x04;
-        __raw_writel(status, MMUCR);
-        ctrl_barrier();
-        local_irq_restore(flags);
-}
diff --git a/arch/sh/mm/uncached.c b/arch/sh/mm/uncached.c
index cf20a5c5136..8a4eca551fc 100644
--- a/arch/sh/mm/uncached.c
+++ b/arch/sh/mm/uncached.c
@@ -1,6 +1,8 @@
 #include <linux/init.h>
+#include <linux/module.h>
 #include <asm/sizes.h>
 #include <asm/page.h>
+#include <asm/addrspace.h>
 
 /*
  * This is the offset of the uncached section from its cached alias.
@@ -15,15 +17,22 @@
 unsigned long cached_to_uncached = SZ_512M;
 unsigned long uncached_size = SZ_512M;
 unsigned long uncached_start, uncached_end;
+EXPORT_SYMBOL(uncached_start);
+EXPORT_SYMBOL(uncached_end);
 
 int virt_addr_uncached(unsigned long kaddr)
 {
         return (kaddr >= uncached_start) && (kaddr < uncached_end);
 }
+EXPORT_SYMBOL(virt_addr_uncached);
 
 void __init uncached_init(void)
 {
+#ifdef CONFIG_29BIT
+        uncached_start = P2SEG;
+#else
         uncached_start = memory_end;
+#endif
         uncached_end = uncached_start + uncached_size;
 }
 
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index 4097f6a1086..9908d477ccd 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -37,6 +37,9 @@ config SPARC64
         def_bool 64BIT
         select ARCH_SUPPORTS_MSI
         select HAVE_FUNCTION_TRACER
+        select HAVE_FUNCTION_GRAPH_TRACER
+        select HAVE_FUNCTION_GRAPH_FP_TEST
+        select HAVE_FUNCTION_TRACE_MCOUNT_TEST
         select HAVE_KRETPROBES
         select HAVE_KPROBES
         select HAVE_LMB
@@ -127,6 +130,9 @@ config ZONE_DMA
         bool
         default y if SPARC32
 
+config NEED_DMA_MAP_STATE
+        def_bool y
+
 config GENERIC_ISA_DMA
         bool
         default y if SPARC32
diff --git a/arch/sparc/Kconfig.debug b/arch/sparc/Kconfig.debug
index 9d3c889718a..1b4a831565f 100644
--- a/arch/sparc/Kconfig.debug
+++ b/arch/sparc/Kconfig.debug
@@ -19,13 +19,10 @@ config DEBUG_DCFLUSH
         bool "D-cache flush debugging"
         depends on SPARC64 && DEBUG_KERNEL
 
-config STACK_DEBUG
-        bool "Stack Overflow Detection Support"
-
 config MCOUNT
         bool
         depends on SPARC64
-        depends on STACK_DEBUG || FUNCTION_TRACER
+        depends on FUNCTION_TRACER
         default y
 
 config FRAME_POINTER
diff --git a/arch/sparc/configs/sparc64_defconfig b/arch/sparc/configs/sparc64_defconfig
index 56e3163673e..259e3fd5099 100644
--- a/arch/sparc/configs/sparc64_defconfig
+++ b/arch/sparc/configs/sparc64_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33
-# Wed Mar  3 02:54:29 2010
+# Linux kernel version: 2.6.34-rc3
+# Sat Apr  3 15:49:56 2010
 #
 CONFIG_64BIT=y
 CONFIG_SPARC=y
@@ -23,6 +23,7 @@ CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
 CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_MMU=y
+CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_OF=y
 CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
@@ -439,6 +440,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
 # CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_DS1682 is not set
 # CONFIG_C2PORT is not set
 
@@ -511,6 +513,7 @@ CONFIG_BLK_DEV_IDEDMA=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 CONFIG_RAID_ATTRS=m
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -888,6 +891,7 @@ CONFIG_SERIAL_SUNHV=y
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
@@ -935,6 +939,7 @@ CONFIG_I2C_ALGOBIT=y
 #
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
 
 #
 # External I2C/SMBus adapter drivers
@@ -948,15 +953,9 @@ CONFIG_I2C_ALGOBIT=y
 #
 # CONFIG_I2C_PCA_PLATFORM is not set
 # CONFIG_I2C_STUB is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 
 #
@@ -982,10 +981,11 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADM1029 is not set
 # CONFIG_SENSORS_ADM1031 is not set
 # CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
 # CONFIG_SENSORS_ADT7462 is not set
 # CONFIG_SENSORS_ADT7470 is not set
-# CONFIG_SENSORS_ADT7473 is not set
 # CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -1052,18 +1052,21 @@ CONFIG_SSB_POSSIBLE=y
 # Multifunction device drivers
 #
 # CONFIG_MFD_CORE is not set
+# CONFIG_MFD_88PM860X is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
 # CONFIG_MFD_PCF50633 is not set
 # CONFIG_AB3100_CORE is not set
-# CONFIG_MFD_88PM8607 is not set
+# CONFIG_LPC_SCH is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -1113,6 +1116,7 @@ CONFIG_FB_FFB=y
 # CONFIG_FB_LEO is not set
 CONFIG_FB_XVR500=y
 CONFIG_FB_XVR2500=y
+CONFIG_FB_XVR1000=y
 # CONFIG_FB_S1D13XXX is not set
 # CONFIG_FB_NVIDIA is not set
 # CONFIG_FB_RIVA is not set
@@ -1430,7 +1434,6 @@ CONFIG_USB_STORAGE=m
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
@@ -1443,7 +1446,6 @@ CONFIG_USB_STORAGE=m
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
-# CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
 
 #
@@ -1610,6 +1612,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -1624,6 +1627,7 @@ CONFIG_NETWORK_FILESYSTEMS=y
 # CONFIG_NFS_FS is not set
 # CONFIG_NFSD is not set
 # CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
diff --git a/arch/sparc/include/asm/compat.h b/arch/sparc/include/asm/compat.h
index 0e706257918..5016f76ea98 100644
--- a/arch/sparc/include/asm/compat.h
+++ b/arch/sparc/include/asm/compat.h
@@ -5,7 +5,8 @@
  */
 #include <linux/types.h>
 
-#define COMPAT_USER_HZ  100
+#define COMPAT_USER_HZ          100
+#define COMPAT_UTS_MACHINE      "sparc\0\0"
 
 typedef u32             compat_size_t;
 typedef s32             compat_ssize_t;
diff --git a/arch/sparc/include/asm/cpudata_64.h b/arch/sparc/include/asm/cpudata_64.h
index 926397d345f..050ef35b9dc 100644
--- a/arch/sparc/include/asm/cpudata_64.h
+++ b/arch/sparc/include/asm/cpudata_64.h
@@ -17,7 +17,7 @@ typedef struct {
         unsigned int    __nmi_count;
         unsigned long   clock_tick;     /* %tick's per second */
         unsigned long   __pad;
-        unsigned int    __pad1;
+        unsigned int    irq0_irqs;
         unsigned int    __pad2;
 
         /* Dcache line 2, rarely used */
diff --git a/arch/sparc/include/asm/dma-mapping.h b/arch/sparc/include/asm/dma-mapping.h
index 5a8c308e2b5..4b4a0c0b0cc 100644
--- a/arch/sparc/include/asm/dma-mapping.h
+++ b/arch/sparc/include/asm/dma-mapping.h
@@ -8,7 +8,6 @@
 #define DMA_ERROR_CODE  (~(dma_addr_t)0x0)
 
 extern int dma_supported(struct device *dev, u64 mask);
-extern int dma_set_mask(struct device *dev, u64 dma_mask);
 
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
@@ -62,4 +61,17 @@ static inline int dma_get_cache_alignment(void)
         return (1 << INTERNODE_CACHE_SHIFT);
 }
 
+static inline int dma_set_mask(struct device *dev, u64 mask)
+{
+#ifdef CONFIG_PCI
+        if (dev->bus == &pci_bus_type) {
+                if (!dev->dma_mask || !dma_supported(dev, mask))
+                        return -EINVAL;
+                *dev->dma_mask = mask;
+                return 0;
+        }
+#endif
+        return -EINVAL;
+}
+
 #endif
diff --git a/arch/sparc/include/asm/fbio.h b/arch/sparc/include/asm/fbio.h
index b9215a0907d..0a21da87f7d 100644
--- a/arch/sparc/include/asm/fbio.h
+++ b/arch/sparc/include/asm/fbio.h
@@ -173,7 +173,7 @@ struct mdi_cfginfo {
         int     mdi_ncluts;     /* Number of implemented CLUTs in this MDI */
         int     mdi_type;       /* FBTYPE name */
         int     mdi_height;     /* height */
-        int     mdi_width;      /* widht */
+        int     mdi_width;      /* width */
         int     mdi_size;       /* available ram */
         int     mdi_mode;       /* 8bpp, 16bpp or 32bpp */
         int     mdi_pixfreq;    /* pixel clock (from PROM) */
diff --git a/arch/sparc/include/asm/irqflags_64.h b/arch/sparc/include/asm/irqflags_64.h
index 8b49bf920df..bfa1ea45b4c 100644
--- a/arch/sparc/include/asm/irqflags_64.h
+++ b/arch/sparc/include/asm/irqflags_64.h
@@ -76,9 +76,26 @@ static inline int raw_irqs_disabled(void)
  */
 static inline unsigned long __raw_local_irq_save(void)
 {
-        unsigned long flags = __raw_local_save_flags();
-
-        raw_local_irq_disable();
+        unsigned long flags, tmp;
+
+        /* Disable interrupts to PIL_NORMAL_MAX unless we already
+         * are using PIL_NMI, in which case PIL_NMI is retained.
+         *
+         * The only values we ever program into the %pil are 0,
+         * PIL_NORMAL_MAX and PIL_NMI.
+         *
+         * Since PIL_NMI is the largest %pil value and all bits are
+         * set in it (0xf), it doesn't matter what PIL_NORMAL_MAX
+         * actually is.
+         */
+        __asm__ __volatile__(
+                "rdpr   %%pil, %0\n\t"
+                "or     %0, %2, %1\n\t"
+                "wrpr   %1, 0x0, %%pil"
+                : "=r" (flags), "=r" (tmp)
+                : "i" (PIL_NORMAL_MAX)
+                : "memory"
+        );
 
         return flags;
 }
diff --git a/arch/sparc/include/asm/pci_32.h b/arch/sparc/include/asm/pci_32.h
index e769f668a4b..332ac9ab36b 100644
--- a/arch/sparc/include/asm/pci_32.h
+++ b/arch/sparc/include/asm/pci_32.h
@@ -32,20 +32,6 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
 
 struct pci_dev;
 
-/* pci_unmap_{single,page} is not a nop, thus... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       \
-        dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         \
-        __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME)                  \
-        ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)         \
-        (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME)                    \
-        ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)           \
-        (((PTR)->LEN_NAME) = (VAL))
-
 #ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                         enum pci_dma_burst_strategy *strat,
diff --git a/arch/sparc/include/asm/pci_64.h b/arch/sparc/include/asm/pci_64.h
index b0576df6ec8..5312782f0b5 100644
--- a/arch/sparc/include/asm/pci_64.h
+++ b/arch/sparc/include/asm/pci_64.h
@@ -32,20 +32,6 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
  */
 #define PCI_DMA_BUS_IS_PHYS     (0)
 
-/* pci_unmap_{single,page} is not a nop, thus... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       \
-        dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         \
-        __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME)                  \
-        ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)         \
-        (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME)                    \
-        ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)           \
-        (((PTR)->LEN_NAME) = (VAL))
-
 /* PCI IOMMU mapping bypass support. */
 
 /* PCI 64-bit addressing works for all slots on all controller
diff --git a/arch/sparc/include/asm/stat.h b/arch/sparc/include/asm/stat.h
index 39327d6a57e..a232e9e1f4e 100644
--- a/arch/sparc/include/asm/stat.h
+++ b/arch/sparc/include/asm/stat.h
@@ -53,8 +53,8 @@ struct stat {
         ino_t           st_ino;
         mode_t          st_mode;
         short           st_nlink;
-        uid16_t         st_uid;
-        gid16_t         st_gid;
+        unsigned short  st_uid;
+        unsigned short  st_gid;
         unsigned short  st_rdev;
         off_t           st_size;
         time_t          st_atime;
diff --git a/arch/sparc/include/asm/thread_info_64.h b/arch/sparc/include/asm/thread_info_64.h
index 9e2d9447f2a..4827a3aeac7 100644
--- a/arch/sparc/include/asm/thread_info_64.h
+++ b/arch/sparc/include/asm/thread_info_64.h
@@ -111,7 +111,7 @@ struct thread_info {
 #define THREAD_SHIFT PAGE_SHIFT
 #endif /* PAGE_SHIFT == 13 */
 
-#define PREEMPT_ACTIVE          0x4000000
+#define PREEMPT_ACTIVE          0x10000000
 
 /*
  * macros/functions for gaining access to the thread information structure
diff --git a/arch/sparc/include/asm/unistd.h b/arch/sparc/include/asm/unistd.h
index cb4b9bfd0d8..d0b3b01ac9d 100644
--- a/arch/sparc/include/asm/unistd.h
+++ b/arch/sparc/include/asm/unistd.h
@@ -432,7 +432,9 @@
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
 #define __ARCH_WANT_SYS_RT_SIGSUSPEND
-#ifndef __32bit_syscall_numbers__
+#ifdef __32bit_syscall_numbers__
+#define __ARCH_WANT_SYS_IPC
+#else
 #define __ARCH_WANT_COMPAT_SYS_TIME
 #define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND
 #endif
diff --git a/arch/sparc/kernel/Makefile b/arch/sparc/kernel/Makefile
index c6316142db4..0c2dc1f24a9 100644
--- a/arch/sparc/kernel/Makefile
+++ b/arch/sparc/kernel/Makefile
@@ -13,6 +13,14 @@ extra-y     += init_task.o
 CPPFLAGS_vmlinux.lds := -Usparc -m$(BITS)
 extra-y              += vmlinux.lds
 
+ifdef CONFIG_FUNCTION_TRACER
+# Do not profile debug and lowlevel utilities
+CFLAGS_REMOVE_ftrace.o := -pg
+CFLAGS_REMOVE_time_$(BITS).o := -pg
+CFLAGS_REMOVE_perf_event.o := -pg
+CFLAGS_REMOVE_pcr.o := -pg
+endif
+
 obj-$(CONFIG_SPARC32)   += entry.o wof.o wuf.o
 obj-$(CONFIG_SPARC32)   += etrap_32.o
 obj-$(CONFIG_SPARC32)   += rtrap_32.o
@@ -85,7 +93,7 @@ obj-$(CONFIG_KGDB)        += kgdb_$(BITS).o
 
 
 obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
-CFLAGS_REMOVE_ftrace.o := -pg
+obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o
 
 obj-$(CONFIG_EARLYFB) += btext.o
 obj-$(CONFIG_STACKTRACE)     += stacktrace.o
diff --git a/arch/sparc/kernel/central.c b/arch/sparc/kernel/central.c
index 4589ca33220..415c86d5a8d 100644
--- a/arch/sparc/kernel/central.c
+++ b/arch/sparc/kernel/central.c
@@ -5,6 +5,7 @@
 
 #include <linux/kernel.h>
 #include <linux/types.h>
+#include <linux/slab.h>
 #include <linux/string.h>
 #include <linux/init.h>
 #include <linux/of_device.h>
diff --git a/arch/sparc/kernel/cpumap.c b/arch/sparc/kernel/cpumap.c
index 7430ed080b2..8de64c8126b 100644
--- a/arch/sparc/kernel/cpumap.c
+++ b/arch/sparc/kernel/cpumap.c
@@ -4,6 +4,7 @@
  */
 
 #include <linux/module.h>
+#include <linux/slab.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/cpumask.h>
diff --git a/arch/sparc/kernel/ftrace.c b/arch/sparc/kernel/ftrace.c
index 9103a56b39e..03ab022e51c 100644
--- a/arch/sparc/kernel/ftrace.c
+++ b/arch/sparc/kernel/ftrace.c
@@ -13,7 +13,7 @@ static const u32 ftrace_nop = 0x01000000;
 
 static u32 ftrace_call_replace(unsigned long ip, unsigned long addr)
 {
-        static u32 call;
+        u32 call;
         s32 off;
 
         off = ((s32)addr - (s32)ip);
@@ -91,3 +91,61 @@ int __init ftrace_dyn_arch_init(void *data)
         return 0;
 }
 #endif
+
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+
+#ifdef CONFIG_DYNAMIC_FTRACE
+extern void ftrace_graph_call(void);
+
+int ftrace_enable_ftrace_graph_caller(void)
+{
+        unsigned long ip = (unsigned long)(&ftrace_graph_call);
+        u32 old, new;
+
+        old = *(u32 *) &ftrace_graph_call;
+        new = ftrace_call_replace(ip, (unsigned long) &ftrace_graph_caller);
+        return ftrace_modify_code(ip, old, new);
+}
+
+int ftrace_disable_ftrace_graph_caller(void)
+{
+        unsigned long ip = (unsigned long)(&ftrace_graph_call);
+        u32 old, new;
+
+        old = *(u32 *) &ftrace_graph_call;
+        new = ftrace_call_replace(ip, (unsigned long) &ftrace_stub);
+
+        return ftrace_modify_code(ip, old, new);
+}
+
+#endif /* !CONFIG_DYNAMIC_FTRACE */
+
+/*
+ * Hook the return address and push it in the stack of return addrs
+ * in current thread info.
+ */
+unsigned long prepare_ftrace_return(unsigned long parent,
+                                    unsigned long self_addr,
+                                    unsigned long frame_pointer)
+{
+        unsigned long return_hooker = (unsigned long) &return_to_handler;
+        struct ftrace_graph_ent trace;
+
+        if (unlikely(atomic_read(&current->tracing_graph_pause)))
+                return parent + 8UL;
+
+        if (ftrace_push_return_trace(parent, self_addr, &trace.depth,
+                                     frame_pointer) == -EBUSY)
+                return parent + 8UL;
+
+        trace.func = self_addr;
+
+        /* Only trace if the calling function expects to */
+        if (!ftrace_graph_entry(&trace)) {
+                current->curr_ret_stack--;
+                return parent + 8UL;
+        }
+
+        return return_hooker;
+}
+#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
diff --git a/arch/sparc/kernel/helpers.S b/arch/sparc/kernel/helpers.S
index 314dd0c9fc5..92090cc9e82 100644
--- a/arch/sparc/kernel/helpers.S
+++ b/arch/sparc/kernel/helpers.S
@@ -46,6 +46,81 @@ stack_trace_flush:
          nop
         .size           stack_trace_flush,.-stack_trace_flush
 
+#ifdef CONFIG_PERF_EVENTS
+        .globl          perf_arch_fetch_caller_regs
+        .type           perf_arch_fetch_caller_regs,#function
+perf_arch_fetch_caller_regs:
+        /* We always read the %pstate into %o5 since we will use
+         * that to construct a fake %tstate to store into the regs.
+         */
+        rdpr            %pstate, %o5
+        brz,pn          %o2, 50f
+         mov            %o2, %g7
+
+        /* Turn off interrupts while we walk around the register
+         * window by hand.
+         */
+        wrpr            %o5, PSTATE_IE, %pstate
+
+        /* The %canrestore tells us how many register windows are
+         * still live in the chip above us, past that we have to
+         * walk the frame as saved on the stack.   We stash away
+         * the %cwp in %g1 so we can return back to the original
+         * register window.
+         */
+        rdpr            %cwp, %g1
+        rdpr            %canrestore, %g2
+        sub             %g1, 1, %g3
+
+        /* We have the skip count in %g7, if it hits zero then
+         * %fp/%i7 are the registers we need.  Otherwise if our
+         * %canrestore count maintained in %g2 hits zero we have
+         * to start traversing the stack.
+         */
+10:     brz,pn          %g2, 4f
+         sub            %g2, 1, %g2
+        wrpr            %g3, %cwp
+        subcc           %g7, 1, %g7
+        bne,pt          %xcc, 10b
+         sub            %g3, 1, %g3
+
+        /* We found the values we need in the cpu's register
+         * windows.
+         */
+        mov             %fp, %g3
+        ba,pt           %xcc, 3f
+         mov            %i7, %g2
+
+50:     mov             %fp, %g3
+        ba,pt           %xcc, 2f
+         mov            %i7, %g2
+
+        /* We hit the end of the valid register windows in the
+         * cpu, start traversing the stack frame.
+         */
+4:      mov             %fp, %g3
+
+20:     ldx             [%g3 + STACK_BIAS + RW_V9_I7], %g2
+        subcc           %g7, 1, %g7
+        bne,pn          %xcc, 20b
+         ldx            [%g3 + STACK_BIAS + RW_V9_I6], %g3
+
+        /* Restore the current register window position and
+         * re-enable interrupts.
+         */
+3:      wrpr            %g1, %cwp
+        wrpr            %o5, %pstate
+
+2:      stx             %g3, [%o0 + PT_V9_FP]
+        sllx            %o5, 8, %o5
+        stx             %o5, [%o0 + PT_V9_TSTATE]
+        stx             %g2, [%o0 + PT_V9_TPC]
+        add             %g2, 4, %g2
+        retl
+         stx            %g2, [%o0 + PT_V9_TNPC]
+        .size           perf_arch_fetch_caller_regs,.-perf_arch_fetch_caller_regs
+#endif /* CONFIG_PERF_EVENTS */
+
 #ifdef CONFIG_SMP
         .globl          hard_smp_processor_id
         .type           hard_smp_processor_id,#function
diff --git a/arch/sparc/kernel/hvapi.c b/arch/sparc/kernel/hvapi.c
index 1d272c3b574..7c60afb835b 100644
--- a/arch/sparc/kernel/hvapi.c
+++ b/arch/sparc/kernel/hvapi.c
@@ -5,7 +5,6 @@
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/init.h>
-#include <linux/slab.h>
 
 #include <asm/hypervisor.h>
 #include <asm/oplib.h>
diff --git a/arch/sparc/kernel/iommu.c b/arch/sparc/kernel/iommu.c
index 5fad94950e7..47977a77f6c 100644
--- a/arch/sparc/kernel/iommu.c
+++ b/arch/sparc/kernel/iommu.c
@@ -6,6 +6,7 @@
 
 #include <linux/kernel.h>
 #include <linux/module.h>
+#include <linux/slab.h>
 #include <linux/delay.h>
 #include <linux/device.h>
 #include <linux/dma-mapping.h>
@@ -862,13 +863,3 @@ int dma_supported(struct device *dev, u64 device_mask)
         return 0;
 }
 EXPORT_SYMBOL(dma_supported);
-
-int dma_set_mask(struct device *dev, u64 dma_mask)
-{
-#ifdef CONFIG_PCI
-        if (dev->bus == &pci_bus_type)
-                return pci_set_dma_mask(to_pci_dev(dev), dma_mask);
-#endif
-        return -EINVAL;
-}
-EXPORT_SYMBOL(dma_set_mask);
diff --git a/arch/sparc/kernel/ioport.c b/arch/sparc/kernel/ioport.c
index 3c8c44f6a41..84e5386714c 100644
--- a/arch/sparc/kernel/ioport.c
+++ b/arch/sparc/kernel/ioport.c
@@ -676,17 +676,6 @@ int dma_supported(struct device *dev, u64 mask)
 }
 EXPORT_SYMBOL(dma_supported);
 
-int dma_set_mask(struct device *dev, u64 dma_mask)
-{
-#ifdef CONFIG_PCI
-        if (dev->bus == &pci_bus_type)
-                return pci_set_dma_mask(to_pci_dev(dev), dma_mask);
-#endif
-        return -EOPNOTSUPP;
-}
-EXPORT_SYMBOL(dma_set_mask);
-
-
 #ifdef CONFIG_PROC_FS
 
 static int sparc_io_proc_show(struct seq_file *m, void *v)
diff --git a/arch/sparc/kernel/irq_64.c b/arch/sparc/kernel/irq_64.c
index e1cbdb94d97..830d70a3e20 100644
--- a/arch/sparc/kernel/irq_64.c
+++ b/arch/sparc/kernel/irq_64.c
@@ -20,7 +20,9 @@
 #include <linux/delay.h>
 #include <linux/proc_fs.h>
 #include <linux/seq_file.h>
+#include <linux/ftrace.h>
 #include <linux/irq.h>
+#include <linux/kmemleak.h>
 
 #include <asm/ptrace.h>
 #include <asm/processor.h>
@@ -45,6 +47,7 @@
 
 #include "entry.h"
 #include "cpumap.h"
+#include "kstack.h"
 
 #define NUM_IVECS       (IMAP_INR + 1)
 
@@ -647,6 +650,14 @@ unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino)
         bucket = kzalloc(sizeof(struct ino_bucket), GFP_ATOMIC);
         if (unlikely(!bucket))
                 return 0;
+
+        /* The only reference we store to the IRQ bucket is
+         * by physical address which kmemleak can't see, tell
+         * it that this object explicitly is not a leak and
+         * should be scanned.
+         */
+        kmemleak_not_leak(bucket);
+
         __flush_dcache_range((unsigned long) bucket,
                              ((unsigned long) bucket +
                               sizeof(struct ino_bucket)));
@@ -703,25 +714,7 @@ void ack_bad_irq(unsigned int virt_irq)
 void *hardirq_stack[NR_CPUS];
 void *softirq_stack[NR_CPUS];
 
-static __attribute__((always_inline)) void *set_hardirq_stack(void)
-{
-        void *orig_sp, *sp = hardirq_stack[smp_processor_id()];
-
-        __asm__ __volatile__("mov %%sp, %0" : "=r" (orig_sp));
-        if (orig_sp < sp ||
-            orig_sp > (sp + THREAD_SIZE)) {
-                sp += THREAD_SIZE - 192 - STACK_BIAS;
-                __asm__ __volatile__("mov %0, %%sp" : : "r" (sp));
-        }
-
-        return orig_sp;
-}
-static __attribute__((always_inline)) void restore_hardirq_stack(void *orig_sp)
-{
-        __asm__ __volatile__("mov %0, %%sp" : : "r" (orig_sp));
-}
-
-void handler_irq(int irq, struct pt_regs *regs)
+void __irq_entry handler_irq(int irq, struct pt_regs *regs)
 {
         unsigned long pstate, bucket_pa;
         struct pt_regs *old_regs;
diff --git a/arch/sparc/kernel/kgdb_64.c b/arch/sparc/kernel/kgdb_64.c
index f5a0fd490b5..0a2bd0f99fc 100644
--- a/arch/sparc/kernel/kgdb_64.c
+++ b/arch/sparc/kernel/kgdb_64.c
@@ -5,6 +5,7 @@
 
 #include <linux/kgdb.h>
 #include <linux/kdebug.h>
+#include <linux/ftrace.h>
 
 #include <asm/kdebug.h>
 #include <asm/ptrace.h>
@@ -108,7 +109,7 @@ void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs)
 }
 
 #ifdef CONFIG_SMP
-void smp_kgdb_capture_client(int irq, struct pt_regs *regs)
+void __irq_entry smp_kgdb_capture_client(int irq, struct pt_regs *regs)
 {
         unsigned long flags;
 
diff --git a/arch/sparc/kernel/kprobes.c b/arch/sparc/kernel/kprobes.c
index 6716584e48a..a39d1ba5a11 100644
--- a/arch/sparc/kernel/kprobes.c
+++ b/arch/sparc/kernel/kprobes.c
@@ -7,6 +7,7 @@
 #include <linux/kprobes.h>
 #include <linux/module.h>
 #include <linux/kdebug.h>
+#include <linux/slab.h>
 #include <asm/signal.h>
 #include <asm/cacheflush.h>
 #include <asm/uaccess.h>
diff --git a/arch/sparc/kernel/kstack.h b/arch/sparc/kernel/kstack.h
index 5247283d1c0..53dfb92e09f 100644
--- a/arch/sparc/kernel/kstack.h
+++ b/arch/sparc/kernel/kstack.h
@@ -61,4 +61,23 @@ check_magic:
 
 }
 
+static inline __attribute__((always_inline)) void *set_hardirq_stack(void)
+{
+        void *orig_sp, *sp = hardirq_stack[smp_processor_id()];
+
+        __asm__ __volatile__("mov %%sp, %0" : "=r" (orig_sp));
+        if (orig_sp < sp ||
+            orig_sp > (sp + THREAD_SIZE)) {
+                sp += THREAD_SIZE - 192 - STACK_BIAS;
+                __asm__ __volatile__("mov %0, %%sp" : : "r" (sp));
+        }
+
+        return orig_sp;
+}
+
+static inline __attribute__((always_inline)) void restore_hardirq_stack(void *orig_sp)
+{
+        __asm__ __volatile__("mov %0, %%sp" : : "r" (orig_sp));
+}
+
 #endif /* _KSTACK_H */
diff --git a/arch/sparc/kernel/led.c b/arch/sparc/kernel/led.c
index 00d034ea216..3ae36f36e75 100644
--- a/arch/sparc/kernel/led.c
+++ b/arch/sparc/kernel/led.c
@@ -3,6 +3,7 @@
 #include <linux/init.h>
 #include <linux/proc_fs.h>
 #include <linux/seq_file.h>
+#include <linux/slab.h>
 #include <linux/string.h>
 #include <linux/jiffies.h>
 #include <linux/timer.h>
diff --git a/arch/sparc/kernel/leon_kernel.c b/arch/sparc/kernel/leon_kernel.c
index 0409d62d8ca..6a7b4dbc8e0 100644
--- a/arch/sparc/kernel/leon_kernel.c
+++ b/arch/sparc/kernel/leon_kernel.c
@@ -7,7 +7,6 @@
 #include <linux/module.h>
 #include <linux/errno.h>
 #include <linux/mutex.h>
-#include <linux/slab.h>
 #include <linux/of.h>
 #include <linux/of_platform.h>
 #include <linux/interrupt.h>
diff --git a/arch/sparc/kernel/leon_smp.c b/arch/sparc/kernel/leon_smp.c
index 85787577f68..e1656fc41cc 100644
--- a/arch/sparc/kernel/leon_smp.c
+++ b/arch/sparc/kernel/leon_smp.c
@@ -22,6 +22,7 @@
 #include <linux/profile.h>
 #include <linux/pm.h>
 #include <linux/delay.h>
+#include <linux/gfp.h>
 
 #include <asm/cacheflush.h>
 #include <asm/tlbflush.h>
diff --git a/arch/sparc/kernel/module.c b/arch/sparc/kernel/module.c
index 0ee642f6323..f848aadf54d 100644
--- a/arch/sparc/kernel/module.c
+++ b/arch/sparc/kernel/module.c
@@ -9,9 +9,9 @@
 #include <linux/elf.h>
 #include <linux/vmalloc.h>
 #include <linux/fs.h>
+#include <linux/gfp.h>
 #include <linux/string.h>
 #include <linux/ctype.h>
-#include <linux/slab.h>
 #include <linux/mm.h>
 
 #include <asm/processor.h>
diff --git a/arch/sparc/kernel/nmi.c b/arch/sparc/kernel/nmi.c
index b287b62c7ea..a4bd7ba74c8 100644
--- a/arch/sparc/kernel/nmi.c
+++ b/arch/sparc/kernel/nmi.c
@@ -23,6 +23,8 @@
 #include <asm/ptrace.h>
 #include <asm/pcr.h>
 
+#include "kstack.h"
+
 /* We don't have a real NMI on sparc64, but we can fake one
  * up using profiling counter overflow interrupts and interrupt
  * levels.
@@ -92,7 +94,7 @@ static void die_nmi(const char *str, struct pt_regs *regs, int do_panic)
 notrace __kprobes void perfctr_irq(int irq, struct pt_regs *regs)
 {
         unsigned int sum, touched = 0;
-        int cpu = smp_processor_id();
+        void *orig_sp;
 
         clear_softint(1 << irq);
 
@@ -100,13 +102,15 @@ notrace __kprobes void perfctr_irq(int irq, struct pt_regs *regs)
 
         nmi_enter();
 
+        orig_sp = set_hardirq_stack();
+
         if (notify_die(DIE_NMI, "nmi", regs, 0,
                        pt_regs_trap_type(regs), SIGINT) == NOTIFY_STOP)
                 touched = 1;
         else
                 pcr_ops->write(PCR_PIC_PRIV);
 
-        sum = kstat_irqs_cpu(0, cpu);
+        sum = local_cpu_data().irq0_irqs;
         if (__get_cpu_var(nmi_touch)) {
                 __get_cpu_var(nmi_touch) = 0;
                 touched = 1;
@@ -125,6 +129,8 @@ notrace __kprobes void perfctr_irq(int irq, struct pt_regs *regs)
                 pcr_ops->write(pcr_enable);
         }
 
+        restore_hardirq_stack(orig_sp);
+
         nmi_exit();
 }
 
diff --git a/arch/sparc/kernel/of_device_common.c b/arch/sparc/kernel/of_device_common.c
index cb8eb799bb6..0247e68210b 100644
--- a/arch/sparc/kernel/of_device_common.c
+++ b/arch/sparc/kernel/of_device_common.c
@@ -4,7 +4,6 @@
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/mod_devicetable.h>
-#include <linux/slab.h>
 #include <linux/errno.h>
 #include <linux/irq.h>
 #include <linux/of_device.h>
diff --git a/arch/sparc/kernel/pci_common.c b/arch/sparc/kernel/pci_common.c
index b775658a927..8a000583b5c 100644
--- a/arch/sparc/kernel/pci_common.c
+++ b/arch/sparc/kernel/pci_common.c
@@ -371,14 +371,19 @@ static void pci_register_iommu_region(struct pci_pbm_info *pbm)
                 struct resource *rp = kzalloc(sizeof(*rp), GFP_KERNEL);
 
                 if (!rp) {
-                        prom_printf("Cannot allocate IOMMU resource.\n");
-                        prom_halt();
+                        pr_info("%s: Cannot allocate IOMMU resource.\n",
+                                pbm->name);
+                        return;
                 }
                 rp->name = "IOMMU";
                 rp->start = pbm->mem_space.start + (unsigned long) vdma[0];
                 rp->end = rp->start + (unsigned long) vdma[1] - 1UL;
                 rp->flags = IORESOURCE_BUSY;
-                request_resource(&pbm->mem_space, rp);
+                if (request_resource(&pbm->mem_space, rp)) {
+                        pr_info("%s: Unable to request IOMMU resource.\n",
+                                pbm->name);
+                        kfree(rp);
+                }
         }
 }
 
diff --git a/arch/sparc/kernel/pci_msi.c b/arch/sparc/kernel/pci_msi.c
index e1b0541feb1..e0ef847219c 100644
--- a/arch/sparc/kernel/pci_msi.c
+++ b/arch/sparc/kernel/pci_msi.c
@@ -4,6 +4,7 @@
  */
 #include <linux/kernel.h>
 #include <linux/interrupt.h>
+#include <linux/slab.h>
 #include <linux/irq.h>
 
 #include "pci_impl.h"
diff --git a/arch/sparc/kernel/pcr.c b/arch/sparc/kernel/pcr.c
index 2d94e7a03af..c4a6a50b484 100644
--- a/arch/sparc/kernel/pcr.c
+++ b/arch/sparc/kernel/pcr.c
@@ -8,6 +8,7 @@
 #include <linux/irq.h>
 
 #include <linux/perf_event.h>
+#include <linux/ftrace.h>
 
 #include <asm/pil.h>
 #include <asm/pcr.h>
@@ -34,7 +35,7 @@ unsigned int picl_shift;
  * Therefore in such situations we defer the work by signalling
  * a lower level cpu IRQ.
  */
-void deferred_pcr_work_irq(int irq, struct pt_regs *regs)
+void __irq_entry deferred_pcr_work_irq(int irq, struct pt_regs *regs)
 {
         struct pt_regs *old_regs;
 
diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c
index 9f2b2bac8b2..e2771939341 100644
--- a/arch/sparc/kernel/perf_event.c
+++ b/arch/sparc/kernel/perf_event.c
@@ -1189,7 +1189,7 @@ static int __kprobes perf_event_nmi_handler(struct notifier_block *self,
 
         regs = args->regs;
 
-        data.addr = 0;
+        perf_sample_data_init(&data, 0);
 
         cpuc = &__get_cpu_var(cpu_hw_events);
 
@@ -1337,7 +1337,7 @@ static void perf_callchain_user_32(struct pt_regs *regs,
         callchain_store(entry, PERF_CONTEXT_USER);
         callchain_store(entry, regs->tpc);
 
-        ufp = regs->u_regs[UREG_I6];
+        ufp = regs->u_regs[UREG_I6] & 0xffffffffUL;
         do {
                 struct sparc_stackf32 *usf, sf;
                 unsigned long pc;
@@ -1353,7 +1353,7 @@ static void perf_callchain_user_32(struct pt_regs *regs,
 }
 
 /* Like powerpc we can't get PMU interrupts within the PMU handler,
- * so no need for seperate NMI and IRQ chains as on x86.
+ * so no need for separate NMI and IRQ chains as on x86.
  */
 static DEFINE_PER_CPU(struct perf_callchain_entry, callchain);
 
diff --git a/arch/sparc/kernel/process_32.c b/arch/sparc/kernel/process_32.c
index c49865b3071..40e29fc8a4d 100644
--- a/arch/sparc/kernel/process_32.c
+++ b/arch/sparc/kernel/process_32.c
@@ -17,13 +17,13 @@
 #include <linux/mm.h>
 #include <linux/stddef.h>
 #include <linux/ptrace.h>
-#include <linux/slab.h>
 #include <linux/user.h>
 #include <linux/smp.h>
 #include <linux/reboot.h>
 #include <linux/delay.h>
 #include <linux/pm.h>
 #include <linux/init.h>
+#include <linux/slab.h>
 
 #include <asm/auxio.h>
 #include <asm/oplib.h>
diff --git a/arch/sparc/kernel/ptrace_32.c b/arch/sparc/kernel/ptrace_32.c
index 7e3dfd9bb97..e608f397e11 100644
--- a/arch/sparc/kernel/ptrace_32.c
+++ b/arch/sparc/kernel/ptrace_32.c
@@ -65,6 +65,7 @@ static int genregs32_get(struct task_struct *target,
                         *k++ = regs->u_regs[pos++];
 
                 reg_window = (unsigned long __user *) regs->u_regs[UREG_I6];
+                reg_window -= 16;
                 for (; count > 0 && pos < 32; count--) {
                         if (get_user(*k++, &reg_window[pos++]))
                                 return -EFAULT;
@@ -76,6 +77,7 @@ static int genregs32_get(struct task_struct *target,
                 }
 
                 reg_window = (unsigned long __user *) regs->u_regs[UREG_I6];
+                reg_window -= 16;
                 for (; count > 0 && pos < 32; count--) {
                         if (get_user(reg, &reg_window[pos++]) ||
                             put_user(reg, u++))
@@ -141,6 +143,7 @@ static int genregs32_set(struct task_struct *target,
                         regs->u_regs[pos++] = *k++;
 
                 reg_window = (unsigned long __user *) regs->u_regs[UREG_I6];
+                reg_window -= 16;
                 for (; count > 0 && pos < 32; count--) {
                         if (put_user(*k++, &reg_window[pos++]))
                                 return -EFAULT;
@@ -153,6 +156,7 @@ static int genregs32_set(struct task_struct *target,
                 }
 
                 reg_window = (unsigned long __user *) regs->u_regs[UREG_I6];
+                reg_window -= 16;
                 for (; count > 0 && pos < 32; count--) {
                         if (get_user(reg, u++) ||
                             put_user(reg, &reg_window[pos++]))
diff --git a/arch/sparc/kernel/ptrace_64.c b/arch/sparc/kernel/ptrace_64.c
index 2f6524d1a81..aa90da08bf6 100644
--- a/arch/sparc/kernel/ptrace_64.c
+++ b/arch/sparc/kernel/ptrace_64.c
@@ -492,6 +492,7 @@ static int genregs32_get(struct task_struct *target,
                         *k++ = regs->u_regs[pos++];
 
                 reg_window = (compat_ulong_t __user *) regs->u_regs[UREG_I6];
+                reg_window -= 16;
                 if (target == current) {
                         for (; count > 0 && pos < 32; count--) {
                                 if (get_user(*k++, &reg_window[pos++]))
@@ -516,6 +517,7 @@ static int genregs32_get(struct task_struct *target,
                 }
 
                 reg_window = (compat_ulong_t __user *) regs->u_regs[UREG_I6];
+                reg_window -= 16;
                 if (target == current) {
                         for (; count > 0 && pos < 32; count--) {
                                 if (get_user(reg, &reg_window[pos++]) ||
@@ -599,6 +601,7 @@ static int genregs32_set(struct task_struct *target,
                         regs->u_regs[pos++] = *k++;
 
                 reg_window = (compat_ulong_t __user *) regs->u_regs[UREG_I6];
+                reg_window -= 16;
                 if (target == current) {
                         for (; count > 0 && pos < 32; count--) {
                                 if (put_user(*k++, &reg_window[pos++]))
@@ -625,6 +628,7 @@ static int genregs32_set(struct task_struct *target,
                 }
 
                 reg_window = (compat_ulong_t __user *) regs->u_regs[UREG_I6];
+                reg_window -= 16;
                 if (target == current) {
                         for (; count > 0 && pos < 32; count--) {
                                 if (get_user(reg, u++) ||
diff --git a/arch/sparc/kernel/rtrap_64.S b/arch/sparc/kernel/rtrap_64.S
index 83f1873c6c1..090b9e9ad5e 100644
--- a/arch/sparc/kernel/rtrap_64.S
+++ b/arch/sparc/kernel/rtrap_64.S
@@ -130,7 +130,17 @@ rtrap_xcall:
                  nop
                 call                    trace_hardirqs_on
                  nop
-                wrpr                    %l4, %pil
+                /* Do not actually set the %pil here.  We will do that
+                 * below after we clear PSTATE_IE in the %pstate register.
+                 * If we re-enable interrupts here, we can recurse down
+                 * the hardirq stack potentially endlessly, causing a
+                 * stack overflow.
+                 *
+                 * It is tempting to put this test and trace_hardirqs_on
+                 * call at the 'rt_continue' label, but that will not work
+                 * as that path hits unconditionally and we do not want to
+                 * execute this in NMI return paths, for example.
+                 */
 #endif
 rtrap_no_irq_enable:
                 andcc                   %l1, TSTATE_PRIV, %l3
diff --git a/arch/sparc/kernel/setup_64.c b/arch/sparc/kernel/setup_64.c
index a2a79e76344..5f72de67588 100644
--- a/arch/sparc/kernel/setup_64.c
+++ b/arch/sparc/kernel/setup_64.c
@@ -12,7 +12,6 @@
 #include <linux/stddef.h>
 #include <linux/unistd.h>
 #include <linux/ptrace.h>
-#include <linux/slab.h>
 #include <asm/smp.h>
 #include <linux/user.h>
 #include <linux/screen_info.h>
diff --git a/arch/sparc/kernel/smp_64.c b/arch/sparc/kernel/smp_64.c
index eb14844a002..b6a2b8f4704 100644
--- a/arch/sparc/kernel/smp_64.c
+++ b/arch/sparc/kernel/smp_64.c
@@ -22,7 +22,9 @@
 #include <linux/profile.h>
 #include <linux/bootmem.h>
 #include <linux/vmalloc.h>
+#include <linux/ftrace.h>
 #include <linux/cpu.h>
+#include <linux/slab.h>
 
 #include <asm/head.h>
 #include <asm/ptrace.h>
@@ -822,13 +824,13 @@ void arch_send_call_function_single_ipi(int cpu)
                       &cpumask_of_cpu(cpu));
 }
 
-void smp_call_function_client(int irq, struct pt_regs *regs)
+void __irq_entry smp_call_function_client(int irq, struct pt_regs *regs)
 {
         clear_softint(1 << irq);
         generic_smp_call_function_interrupt();
 }
 
-void smp_call_function_single_client(int irq, struct pt_regs *regs)
+void __irq_entry smp_call_function_single_client(int irq, struct pt_regs *regs)
 {
         clear_softint(1 << irq);
         generic_smp_call_function_single_interrupt();
@@ -964,7 +966,7 @@ void flush_dcache_page_all(struct mm_struct *mm, struct page *page)
         put_cpu();
 }
 
-void smp_new_mmu_context_version_client(int irq, struct pt_regs *regs)
+void __irq_entry smp_new_mmu_context_version_client(int irq, struct pt_regs *regs)
 {
         struct mm_struct *mm;
         unsigned long flags;
@@ -1148,7 +1150,7 @@ void smp_release(void)
  */
 extern void prom_world(int);
 
-void smp_penguin_jailcell(int irq, struct pt_regs *regs)
+void __irq_entry smp_penguin_jailcell(int irq, struct pt_regs *regs)
 {
         clear_softint(1 << irq);
 
@@ -1364,7 +1366,7 @@ void smp_send_reschedule(int cpu)
                       &cpumask_of_cpu(cpu));
 }
 
-void smp_receive_signal_client(int irq, struct pt_regs *regs)
+void __irq_entry smp_receive_signal_client(int irq, struct pt_regs *regs)
 {
         clear_softint(1 << irq);
 }
diff --git a/arch/sparc/kernel/sun4c_irq.c b/arch/sparc/kernel/sun4c_irq.c
index bc3adbf79c6..892fb884910 100644
--- a/arch/sparc/kernel/sun4c_irq.c
+++ b/arch/sparc/kernel/sun4c_irq.c
@@ -16,7 +16,6 @@
 #include <linux/sched.h>
 #include <linux/ptrace.h>
 #include <linux/interrupt.h>
-#include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c
index 301892e2d71..7f3b97ff62c 100644
--- a/arch/sparc/kernel/sun4m_irq.c
+++ b/arch/sparc/kernel/sun4m_irq.c
@@ -17,7 +17,6 @@
 #include <linux/ptrace.h>
 #include <linux/smp.h>
 #include <linux/interrupt.h>
-#include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/ioport.h>
 #include <linux/of.h>
diff --git a/arch/sparc/kernel/sys_sparc32.c b/arch/sparc/kernel/sys_sparc32.c
index daded3b9639..c0ca87553e1 100644
--- a/arch/sparc/kernel/sys_sparc32.c
+++ b/arch/sparc/kernel/sys_sparc32.c
@@ -21,7 +21,6 @@
 #include <linux/sem.h>
 #include <linux/msg.h>
 #include <linux/shm.h>
-#include <linux/slab.h>
 #include <linux/uio.h>
 #include <linux/nfs_fs.h>
 #include <linux/quota.h>
@@ -44,6 +43,7 @@
 #include <linux/compat.h>
 #include <linux/vfs.h>
 #include <linux/ptrace.h>
+#include <linux/slab.h>
 
 #include <asm/types.h>
 #include <asm/uaccess.h>
diff --git a/arch/sparc/kernel/sys_sparc_32.c b/arch/sparc/kernel/sys_sparc_32.c
index 3a82e65d8db..ee995b7dae7 100644
--- a/arch/sparc/kernel/sys_sparc_32.c
+++ b/arch/sparc/kernel/sys_sparc_32.c
@@ -98,119 +98,6 @@ out:
         return error;
 }
 
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-
-asmlinkage int sys_ipc (uint call, int first, int second, int third, void __user *ptr, long fifth)
-{
-        int version, err;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        if (call <= SEMCTL)
-                switch (call) {
-                case SEMOP:
-                        err = sys_semtimedop (first, (struct sembuf __user *)ptr, second, NULL);
-                        goto out;
-                case SEMTIMEDOP:
-                        err = sys_semtimedop (first, (struct sembuf __user *)ptr, second, (const struct timespec __user *) fifth);
-                        goto out;
-                case SEMGET:
-                        err = sys_semget (first, second, third);
-                        goto out;
-                case SEMCTL: {
-                        union semun fourth;
-                        err = -EINVAL;
-                        if (!ptr)
-                                goto out;
-                        err = -EFAULT;
-                        if (get_user(fourth.__pad,
-                                     (void __user * __user *)ptr))
-                                goto out;
-                        err = sys_semctl (first, second, third, fourth);
-                        goto out;
-                        }
-                default:
-                        err = -ENOSYS;
-                        goto out;
-                }
-        if (call <= MSGCTL) 
-                switch (call) {
-                case MSGSND:
-                        err = sys_msgsnd (first, (struct msgbuf __user *) ptr, 
-                                          second, third);
-                        goto out;
-                case MSGRCV:
-                        switch (version) {
-                        case 0: {
-                                struct ipc_kludge tmp;
-                                err = -EINVAL;
-                                if (!ptr)
-                                        goto out;
-                                err = -EFAULT;
-                                if (copy_from_user(&tmp, (struct ipc_kludge __user *) ptr, sizeof (tmp)))
-                                        goto out;
-                                err = sys_msgrcv (first, tmp.msgp, second, tmp.msgtyp, third);
-                                goto out;
-                                }
-                        case 1: default:
-                                err = sys_msgrcv (first,
-                                                  (struct msgbuf __user *) ptr,
-                                                  second, fifth, third);
-                                goto out;
-                        }
-                case MSGGET:
-                        err = sys_msgget ((key_t) first, second);
-                        goto out;
-                case MSGCTL:
-                        err = sys_msgctl (first, second, (struct msqid_ds __user *) ptr);
-                        goto out;
-                default:
-                        err = -ENOSYS;
-                        goto out;
-                }
-        if (call <= SHMCTL) 
-                switch (call) {
-                case SHMAT:
-                        switch (version) {
-                        case 0: default: {
-                                ulong raddr;
-                                err = do_shmat (first, (char __user *) ptr, second, &raddr);
-                                if (err)
-                                        goto out;
-                                err = -EFAULT;
-                                if (put_user (raddr, (ulong __user *) third))
-                                        goto out;
-                                err = 0;
-                                goto out;
-                                }
-                        case 1: /* iBCS2 emulator entry point */
-                                err = -EINVAL;
-                                goto out;
-                        }
-                case SHMDT: 
-                        err = sys_shmdt ((char __user *)ptr);
-                        goto out;
-                case SHMGET:
-                        err = sys_shmget (first, second, third);
-                        goto out;
-                case SHMCTL:
-                        err = sys_shmctl (first, second, (struct shmid_ds __user *) ptr);
-                        goto out;
-                default:
-                        err = -ENOSYS;
-                        goto out;
-                }
-        else
-                err = -ENOSYS;
-out:
-        return err;
-}
-
 int sparc_mmap_check(unsigned long addr, unsigned long len)
 {
         if (ARCH_SUN4C &&
diff --git a/arch/sparc/kernel/sys_sparc_64.c b/arch/sparc/kernel/sys_sparc_64.c
index cb1bef6f14b..3d435c42e6d 100644
--- a/arch/sparc/kernel/sys_sparc_64.c
+++ b/arch/sparc/kernel/sys_sparc_64.c
@@ -426,7 +426,7 @@ out:
  * This is really horribly ugly.
  */
 
-SYSCALL_DEFINE6(ipc, unsigned int, call, int, first, unsigned long, second,
+SYSCALL_DEFINE6(sparc_ipc, unsigned int, call, int, first, unsigned long, second,
                 unsigned long, third, void __user *, ptr, long, fifth)
 {
         long err;
@@ -510,17 +510,6 @@ out:
         return err;
 }
 
-SYSCALL_DEFINE1(sparc64_newuname, struct new_utsname __user *, name)
-{
-        int ret = sys_newuname(name);
-        
-        if (current->personality == PER_LINUX32 && !ret) {
-                ret = (copy_to_user(name->machine, "sparc\0\0", 8)
-                       ? -EFAULT : 0);
-        }
-        return ret;
-}
-
 SYSCALL_DEFINE1(sparc64_personality, unsigned long, personality)
 {
         int ret;
diff --git a/arch/sparc/kernel/sysfs.c b/arch/sparc/kernel/sysfs.c
index ca39c606fe8..1eb8b00aed7 100644
--- a/arch/sparc/kernel/sysfs.c
+++ b/arch/sparc/kernel/sysfs.c
@@ -107,12 +107,12 @@ static unsigned long run_on_cpu(unsigned long cpu,
         unsigned long ret;
 
         /* should return -EINVAL to userspace */
-        if (set_cpus_allowed(current, cpumask_of_cpu(cpu)))
+        if (set_cpus_allowed_ptr(current, cpumask_of(cpu)))
                 return 0;
 
         ret = func(arg);
 
-        set_cpus_allowed(current, old_affinity);
+        set_cpus_allowed_ptr(current, &old_affinity);
 
         return ret;
 }
diff --git a/arch/sparc/kernel/systbls.h b/arch/sparc/kernel/systbls.h
index 68312fe8da7..118759cd734 100644
--- a/arch/sparc/kernel/systbls.h
+++ b/arch/sparc/kernel/systbls.h
@@ -6,15 +6,12 @@
 #include <asm/utrap.h>
 #include <asm/signal.h>
 
-struct new_utsname;
-
 extern asmlinkage unsigned long sys_getpagesize(void);
 extern asmlinkage long sparc_pipe(struct pt_regs *regs);
-extern asmlinkage long sys_ipc(unsigned int call, int first,
+extern asmlinkage long sys_sparc_ipc(unsigned int call, int first,
                                unsigned long second,
                                unsigned long third,
                                void __user *ptr, long fifth);
-extern asmlinkage long sparc64_newuname(struct new_utsname __user *name);
 extern asmlinkage long sparc64_personality(unsigned long personality);
 extern asmlinkage long sys64_munmap(unsigned long addr, size_t len);
 extern asmlinkage unsigned long sys64_mremap(unsigned long addr,
diff --git a/arch/sparc/kernel/systbls_64.S b/arch/sparc/kernel/systbls_64.S
index 17614251fb6..9db058dd039 100644
--- a/arch/sparc/kernel/systbls_64.S
+++ b/arch/sparc/kernel/systbls_64.S
@@ -55,7 +55,7 @@ sys_call_table32:
 /*170*/ .word sys32_lsetxattr, sys32_fsetxattr, sys_getxattr, sys_lgetxattr, compat_sys_getdents
         .word sys_setsid, sys_fchdir, sys32_fgetxattr, sys_listxattr, sys_llistxattr
 /*180*/ .word sys32_flistxattr, sys_removexattr, sys_lremovexattr, compat_sys_sigpending, sys_ni_syscall
-        .word sys32_setpgid, sys32_fremovexattr, sys32_tkill, sys32_exit_group, sys_sparc64_newuname
+        .word sys32_setpgid, sys32_fremovexattr, sys32_tkill, sys32_exit_group, sys_newuname
 /*190*/ .word sys32_init_module, sys_sparc64_personality, sys_remap_file_pages, sys32_epoll_create, sys32_epoll_ctl
         .word sys32_epoll_wait, sys32_ioprio_set, sys_getppid, sys32_sigaction, sys_sgetmask
 /*200*/ .word sys32_ssetmask, sys_sigsuspend, compat_sys_newlstat, sys_uselib, compat_sys_old_readdir
@@ -130,13 +130,13 @@ sys_call_table:
 /*170*/ .word sys_lsetxattr, sys_fsetxattr, sys_getxattr, sys_lgetxattr, sys_getdents
         .word sys_setsid, sys_fchdir, sys_fgetxattr, sys_listxattr, sys_llistxattr
 /*180*/ .word sys_flistxattr, sys_removexattr, sys_lremovexattr, sys_nis_syscall, sys_ni_syscall
-        .word sys_setpgid, sys_fremovexattr, sys_tkill, sys_exit_group, sys_sparc64_newuname
+        .word sys_setpgid, sys_fremovexattr, sys_tkill, sys_exit_group, sys_newuname
 /*190*/ .word sys_init_module, sys_sparc64_personality, sys_remap_file_pages, sys_epoll_create, sys_epoll_ctl
         .word sys_epoll_wait, sys_ioprio_set, sys_getppid, sys_nis_syscall, sys_sgetmask
 /*200*/ .word sys_ssetmask, sys_nis_syscall, sys_newlstat, sys_uselib, sys_nis_syscall
         .word sys_readahead, sys_socketcall, sys_syslog, sys_lookup_dcookie, sys_fadvise64
 /*210*/ .word sys_fadvise64_64, sys_tgkill, sys_waitpid, sys_swapoff, sys_sysinfo
-        .word sys_ipc, sys_nis_syscall, sys_clone, sys_ioprio_get, sys_adjtimex
+        .word sys_sparc_ipc, sys_nis_syscall, sys_clone, sys_ioprio_get, sys_adjtimex
 /*220*/ .word sys_nis_syscall, sys_ni_syscall, sys_delete_module, sys_ni_syscall, sys_getpgid
         .word sys_bdflush, sys_sysfs, sys_nis_syscall, sys_setfsuid, sys_setfsgid
 /*230*/ .word sys_select, sys_nis_syscall, sys_splice, sys_stime, sys_statfs64
diff --git a/arch/sparc/kernel/time_64.c b/arch/sparc/kernel/time_64.c
index 67e16510288..c7bbe6cf7b8 100644
--- a/arch/sparc/kernel/time_64.c
+++ b/arch/sparc/kernel/time_64.c
@@ -35,6 +35,7 @@
 #include <linux/clocksource.h>
 #include <linux/of_device.h>
 #include <linux/platform_device.h>
+#include <linux/ftrace.h>
 
 #include <asm/oplib.h>
 #include <asm/timer.h>
@@ -717,7 +718,7 @@ static struct clock_event_device sparc64_clockevent = {
 };
 static DEFINE_PER_CPU(struct clock_event_device, sparc64_events);
 
-void timer_interrupt(int irq, struct pt_regs *regs)
+void __irq_entry timer_interrupt(int irq, struct pt_regs *regs)
 {
         struct pt_regs *old_regs = set_irq_regs(regs);
         unsigned long tick_mask = tick_ops->softint_mask;
@@ -728,6 +729,7 @@ void timer_interrupt(int irq, struct pt_regs *regs)
 
         irq_enter();
 
+        local_cpu_data().irq0_irqs++;
         kstat_incr_irqs_this_cpu(0, irq_to_desc(0));
 
         if (unlikely(!evt->event_handler)) {
diff --git a/arch/sparc/kernel/traps_64.c b/arch/sparc/kernel/traps_64.c
index bdc05a21908..9da57f03298 100644
--- a/arch/sparc/kernel/traps_64.c
+++ b/arch/sparc/kernel/traps_64.c
@@ -17,6 +17,7 @@
 #include <linux/mm.h>
 #include <linux/init.h>
 #include <linux/kdebug.h>
+#include <linux/gfp.h>
 
 #include <asm/smp.h>
 #include <asm/delay.h>
@@ -2202,27 +2203,6 @@ void dump_stack(void)
 
 EXPORT_SYMBOL(dump_stack);
 
-static inline int is_kernel_stack(struct task_struct *task,
-                                  struct reg_window *rw)
-{
-        unsigned long rw_addr = (unsigned long) rw;
-        unsigned long thread_base, thread_end;
-
-        if (rw_addr < PAGE_OFFSET) {
-                if (task != &init_task)
-                        return 0;
-        }
-
-        thread_base = (unsigned long) task_stack_page(task);
-        thread_end = thread_base + sizeof(union thread_union);
-        if (rw_addr >= thread_base &&
-            rw_addr < thread_end &&
-            !(rw_addr & 0x7UL))
-                return 1;
-
-        return 0;
-}
-
 static inline struct reg_window *kernel_stack_up(struct reg_window *rw)
 {
         unsigned long fp = rw->ins[6];
@@ -2251,6 +2231,7 @@ void die_if_kernel(char *str, struct pt_regs *regs)
         show_regs(regs);
         add_taint(TAINT_DIE);
         if (regs->tstate & TSTATE_PRIV) {
+                struct thread_info *tp = current_thread_info();
                 struct reg_window *rw = (struct reg_window *)
                         (regs->u_regs[UREG_FP] + STACK_BIAS);
 
@@ -2258,8 +2239,8 @@ void die_if_kernel(char *str, struct pt_regs *regs)
                  * find some badly aligned kernel stack.
                  */
                 while (rw &&
-                       count++ < 30&&
-                       is_kernel_stack(current, rw)) {
+                       count++ < 30 &&
+                       kstack_valid(tp, (unsigned long) rw)) {
                         printk("Caller[%016lx]: %pS\n", rw->ins[7],
                                (void *) rw->ins[7]);
 
diff --git a/arch/sparc/kernel/unaligned_64.c b/arch/sparc/kernel/unaligned_64.c
index ebce43018c4..c752c4c479b 100644
--- a/arch/sparc/kernel/unaligned_64.c
+++ b/arch/sparc/kernel/unaligned_64.c
@@ -50,7 +50,7 @@ static inline enum direction decode_direction(unsigned int insn)
 }
 
 /* 16 = double-word, 8 = extra-word, 4 = word, 2 = half-word */
-static inline int decode_access_size(unsigned int insn)
+static inline int decode_access_size(struct pt_regs *regs, unsigned int insn)
 {
         unsigned int tmp;
 
@@ -66,7 +66,7 @@ static inline int decode_access_size(unsigned int insn)
                 return 2;
         else {
                 printk("Impossible unaligned trap. insn=%08x\n", insn);
-                die_if_kernel("Byte sized unaligned access?!?!", current_thread_info()->kregs);
+                die_if_kernel("Byte sized unaligned access?!?!", regs);
 
                 /* GCC should never warn that control reaches the end
                  * of this function without returning a value because
@@ -286,7 +286,7 @@ static void log_unaligned(struct pt_regs *regs)
 asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn)
 {
         enum direction dir = decode_direction(insn);
-        int size = decode_access_size(insn);
+        int size = decode_access_size(regs, insn);
         int orig_asi, asi;
 
         current_thread_info()->kern_una_regs = regs;
diff --git a/arch/sparc/kernel/us2e_cpufreq.c b/arch/sparc/kernel/us2e_cpufreq.c
index 791c15138f3..8f982b76c71 100644
--- a/arch/sparc/kernel/us2e_cpufreq.c
+++ b/arch/sparc/kernel/us2e_cpufreq.c
@@ -238,12 +238,12 @@ static unsigned int us2e_freq_get(unsigned int cpu)
                 return 0;
 
         cpus_allowed = current->cpus_allowed;
-        set_cpus_allowed(current, cpumask_of_cpu(cpu));
+        set_cpus_allowed_ptr(current, cpumask_of(cpu));
 
         clock_tick = sparc64_get_clock_tick(cpu) / 1000;
         estar = read_hbreg(HBIRD_ESTAR_MODE_ADDR);
 
-        set_cpus_allowed(current, cpus_allowed);
+        set_cpus_allowed_ptr(current, &cpus_allowed);
 
         return clock_tick / estar_to_divisor(estar);
 }
@@ -259,7 +259,7 @@ static void us2e_set_cpu_divider_index(unsigned int cpu, unsigned int index)
                 return;
 
         cpus_allowed = current->cpus_allowed;
-        set_cpus_allowed(current, cpumask_of_cpu(cpu));
+        set_cpus_allowed_ptr(current, cpumask_of(cpu));
 
         new_freq = clock_tick = sparc64_get_clock_tick(cpu) / 1000;
         new_bits = index_to_estar_mode(index);
@@ -281,7 +281,7 @@ static void us2e_set_cpu_divider_index(unsigned int cpu, unsigned int index)
 
         cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 
-        set_cpus_allowed(current, cpus_allowed);
+        set_cpus_allowed_ptr(current, &cpus_allowed);
 }
 
 static int us2e_freq_target(struct cpufreq_policy *policy,
diff --git a/arch/sparc/kernel/us3_cpufreq.c b/arch/sparc/kernel/us3_cpufreq.c
index 365b6464e2c..f35d1e79454 100644
--- a/arch/sparc/kernel/us3_cpufreq.c
+++ b/arch/sparc/kernel/us3_cpufreq.c
@@ -86,12 +86,12 @@ static unsigned int us3_freq_get(unsigned int cpu)
                 return 0;
 
         cpus_allowed = current->cpus_allowed;
-        set_cpus_allowed(current, cpumask_of_cpu(cpu));
+        set_cpus_allowed_ptr(current, cpumask_of(cpu));
 
         reg = read_safari_cfg();
         ret = get_current_freq(cpu, reg);
 
-        set_cpus_allowed(current, cpus_allowed);
+        set_cpus_allowed_ptr(current, &cpus_allowed);
 
         return ret;
 }
@@ -106,7 +106,7 @@ static void us3_set_cpu_divider_index(unsigned int cpu, unsigned int index)
                 return;
 
         cpus_allowed = current->cpus_allowed;
-        set_cpus_allowed(current, cpumask_of_cpu(cpu));
+        set_cpus_allowed_ptr(current, cpumask_of(cpu));
 
         new_freq = sparc64_get_clock_tick(cpu) / 1000;
         switch (index) {
@@ -140,7 +140,7 @@ static void us3_set_cpu_divider_index(unsigned int cpu, unsigned int index)
 
         cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 
-        set_cpus_allowed(current, cpus_allowed);
+        set_cpus_allowed_ptr(current, &cpus_allowed);
 }
 
 static int us3_freq_target(struct cpufreq_policy *policy,
diff --git a/arch/sparc/kernel/vio.c b/arch/sparc/kernel/vio.c
index c28c71449a6..3cb1def9806 100644
--- a/arch/sparc/kernel/vio.c
+++ b/arch/sparc/kernel/vio.c
@@ -10,6 +10,7 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/slab.h>
 #include <linux/irq.h>
 #include <linux/init.h>
 
diff --git a/arch/sparc/kernel/vmlinux.lds.S b/arch/sparc/kernel/vmlinux.lds.S
index 4e599259396..0c1e6783657 100644
--- a/arch/sparc/kernel/vmlinux.lds.S
+++ b/arch/sparc/kernel/vmlinux.lds.S
@@ -46,11 +46,16 @@ SECTIONS
                 SCHED_TEXT
                 LOCK_TEXT
                 KPROBES_TEXT
+                IRQENTRY_TEXT
                 *(.gnu.warning)
         } = 0
         _etext = .;
 
         RO_DATA(PAGE_SIZE)
+
+        /* Start of data section */
+        _sdata = .;
+
         .data1 : {
                 *(.data1)
         }
diff --git a/arch/sparc/lib/mcount.S b/arch/sparc/lib/mcount.S
index 24b8b12deed..3ad6cbdc216 100644
--- a/arch/sparc/lib/mcount.S
+++ b/arch/sparc/lib/mcount.S
@@ -7,26 +7,11 @@
 
 #include <linux/linkage.h>
 
-#include <asm/ptrace.h>
-#include <asm/thread_info.h>
-
 /*
  * This is the main variant and is called by C code.  GCC's -pg option
  * automatically instruments every C function with a call to this.
  */
 
-#ifdef CONFIG_STACK_DEBUG
-
-#define OVSTACKSIZE     4096            /* lets hope this is enough */
-
-        .data
-        .align          8
-panicstring:
-        .asciz          "Stack overflow\n"
-        .align          8
-ovstack:
-        .skip           OVSTACKSIZE
-#endif
         .text
         .align          32
         .globl          _mcount
@@ -35,84 +20,48 @@ ovstack:
         .type           mcount,#function
 _mcount:
 mcount:
-#ifdef CONFIG_STACK_DEBUG
-        /*
-         * Check whether %sp is dangerously low.
-         */
-        ldub            [%g6 + TI_FPDEPTH], %g1
-        srl             %g1, 1, %g3
-        add             %g3, 1, %g3
-        sllx            %g3, 8, %g3                     ! each fpregs frame is 256b
-        add             %g3, 192, %g3
-        add             %g6, %g3, %g3                   ! where does task_struct+frame end?
-        sub             %g3, STACK_BIAS, %g3
-        cmp             %sp, %g3
-        bg,pt           %xcc, 1f
-         nop
-        lduh            [%g6 + TI_CPU], %g1
-        sethi           %hi(hardirq_stack), %g3
-        or              %g3, %lo(hardirq_stack), %g3
-        sllx            %g1, 3, %g1
-        ldx             [%g3 + %g1], %g7
-        sub             %g7, STACK_BIAS, %g7
-        cmp             %sp, %g7
-        bleu,pt         %xcc, 2f
-         sethi          %hi(THREAD_SIZE), %g3
-        add             %g7, %g3, %g7
-        cmp             %sp, %g7
-        blu,pn          %xcc, 1f
-2:       sethi          %hi(softirq_stack), %g3
-        or              %g3, %lo(softirq_stack), %g3
-        ldx             [%g3 + %g1], %g7
-        sub             %g7, STACK_BIAS, %g7
-        cmp             %sp, %g7
-        bleu,pt         %xcc, 3f
-         sethi          %hi(THREAD_SIZE), %g3
-        add             %g7, %g3, %g7
-        cmp             %sp, %g7
-        blu,pn          %xcc, 1f
-         nop
-        /* If we are already on ovstack, don't hop onto it
-         * again, we are already trying to output the stack overflow
-         * message.
-         */
-3:      sethi           %hi(ovstack), %g7               ! cant move to panic stack fast enough
-         or             %g7, %lo(ovstack), %g7
-        add             %g7, OVSTACKSIZE, %g3
-        sub             %g3, STACK_BIAS + 192, %g3
-        sub             %g7, STACK_BIAS, %g7
-        cmp             %sp, %g7
-        blu,pn          %xcc, 2f
-         cmp            %sp, %g3
-        bleu,pn         %xcc, 1f
-         nop
-2:      mov             %g3, %sp
-        sethi           %hi(panicstring), %g3
-        call            prom_printf
-         or             %g3, %lo(panicstring), %o0
-        call            prom_halt
-         nop
-1:
-#endif
 #ifdef CONFIG_FUNCTION_TRACER
 #ifdef CONFIG_DYNAMIC_FTRACE
-        mov             %o7, %o0
-        .globl          mcount_call
-mcount_call:
-        call            ftrace_stub
-         mov            %o0, %o7
+        /* Do nothing, the retl/nop below is all we need.  */
 #else
-        sethi           %hi(ftrace_trace_function), %g1
+        sethi           %hi(function_trace_stop), %g1
+        lduw            [%g1 + %lo(function_trace_stop)], %g2
+        brnz,pn         %g2, 2f
+         sethi          %hi(ftrace_trace_function), %g1
         sethi           %hi(ftrace_stub), %g2
         ldx             [%g1 + %lo(ftrace_trace_function)], %g1
         or              %g2, %lo(ftrace_stub), %g2
         cmp             %g1, %g2
         be,pn           %icc, 1f
-         mov            %i7, %o1
-        jmpl            %g1, %g0
-         mov            %o7, %o0
+         mov            %i7, %g3
+        save            %sp, -176, %sp
+        mov             %g3, %o1
+        jmpl            %g1, %o7
+         mov            %i7, %o0
+        ret
+         restore
         /* not reached */
 1:
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+        sethi           %hi(ftrace_graph_return), %g1
+        ldx             [%g1 + %lo(ftrace_graph_return)], %g3
+        cmp             %g2, %g3
+        bne,pn          %xcc, 5f
+         sethi          %hi(ftrace_graph_entry_stub), %g2
+        sethi           %hi(ftrace_graph_entry), %g1
+        or              %g2, %lo(ftrace_graph_entry_stub), %g2
+        ldx             [%g1 + %lo(ftrace_graph_entry)], %g1
+        cmp             %g1, %g2
+        be,pt           %xcc, 2f
+         nop
+5:      mov             %i7, %g2
+        mov             %fp, %g3
+        save            %sp, -176, %sp
+        mov             %g2, %l0
+        ba,pt           %xcc, ftrace_graph_caller
+         mov            %g3, %l1
+#endif
+2:
 #endif
 #endif
         retl
@@ -131,14 +80,50 @@ ftrace_stub:
         .globl          ftrace_caller
         .type           ftrace_caller,#function
 ftrace_caller:
-        mov             %i7, %o1
-        mov             %o7, %o0
+        sethi           %hi(function_trace_stop), %g1
+        mov             %i7, %g2
+        lduw            [%g1 + %lo(function_trace_stop)], %g1
+        brnz,pn         %g1, ftrace_stub
+         mov            %fp, %g3
+        save            %sp, -176, %sp
+        mov             %g2, %o1
+        mov             %g2, %l0
+        mov             %g3, %l1
         .globl          ftrace_call
 ftrace_call:
         call            ftrace_stub
-         mov            %o0, %o7
-        retl
+         mov            %i7, %o0
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+        .globl          ftrace_graph_call
+ftrace_graph_call:
+        call            ftrace_stub
          nop
+#endif
+        ret
+         restore
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+        .size           ftrace_graph_call,.-ftrace_graph_call
+#endif
+        .size           ftrace_call,.-ftrace_call
         .size           ftrace_caller,.-ftrace_caller
 #endif
 #endif
+
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+ENTRY(ftrace_graph_caller)
+        mov             %l0, %o0
+        mov             %i7, %o1
+        call            prepare_ftrace_return
+         mov            %l1, %o2
+        ret
+         restore        %o0, -8, %i7
+END(ftrace_graph_caller)
+
+ENTRY(return_to_handler)
+        save            %sp, -176, %sp
+        call            ftrace_return_to_handler
+         mov            %fp, %o0
+        jmpl            %o0 + 8, %g0
+         restore
+END(return_to_handler)
+#endif
diff --git a/arch/sparc/mm/hugetlbpage.c b/arch/sparc/mm/hugetlbpage.c
index f27d10369e0..5fdddf134ca 100644
--- a/arch/sparc/mm/hugetlbpage.c
+++ b/arch/sparc/mm/hugetlbpage.c
@@ -10,7 +10,6 @@
 #include <linux/mm.h>
 #include <linux/hugetlb.h>
 #include <linux/pagemap.h>
-#include <linux/slab.h>
 #include <linux/sysctl.h>
 
 #include <asm/mman.h>
diff --git a/arch/sparc/mm/init_32.c b/arch/sparc/mm/init_32.c
index dc7c3b17a15..6d0e02c4fe0 100644
--- a/arch/sparc/mm/init_32.c
+++ b/arch/sparc/mm/init_32.c
@@ -24,6 +24,7 @@
 #include <linux/bootmem.h>
 #include <linux/pagemap.h>
 #include <linux/poison.h>
+#include <linux/gfp.h>
 
 #include <asm/sections.h>
 #include <asm/system.h>
diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c
index 9245a822a2f..b2831dc3c12 100644
--- a/arch/sparc/mm/init_64.c
+++ b/arch/sparc/mm/init_64.c
@@ -13,7 +13,6 @@
 #include <linux/bootmem.h>
 #include <linux/mm.h>
 #include <linux/hugetlb.h>
-#include <linux/slab.h>
 #include <linux/initrd.h>
 #include <linux/swap.h>
 #include <linux/pagemap.h>
@@ -26,6 +25,7 @@
 #include <linux/percpu.h>
 #include <linux/lmb.h>
 #include <linux/mmzone.h>
+#include <linux/gfp.h>
 
 #include <asm/head.h>
 #include <asm/system.h>
@@ -2117,7 +2117,7 @@ int __meminit vmemmap_populate(struct page *start, unsigned long nr, int node)
                                "node=%d entry=%lu/%lu\n", start, block, nr,
                                node,
                                addr >> VMEMMAP_CHUNK_SHIFT,
-                               VMEMMAP_SIZE >> VMEMMAP_CHUNK_SHIFT);
+                               VMEMMAP_SIZE);
                 }
         }
         return 0;
diff --git a/arch/sparc/mm/srmmu.c b/arch/sparc/mm/srmmu.c
index df49b200ca4..f5f75a58e0b 100644
--- a/arch/sparc/mm/srmmu.c
+++ b/arch/sparc/mm/srmmu.c
@@ -10,7 +10,6 @@
 
 #include <linux/kernel.h>
 #include <linux/mm.h>
-#include <linux/slab.h>
 #include <linux/vmalloc.h>
 #include <linux/pagemap.h>
 #include <linux/init.h>
@@ -20,6 +19,7 @@
 #include <linux/seq_file.h>
 #include <linux/kdebug.h>
 #include <linux/log2.h>
+#include <linux/gfp.h>
 
 #include <asm/bitext.h>
 #include <asm/page.h>
diff --git a/arch/sparc/mm/sun4c.c b/arch/sparc/mm/sun4c.c
index 18652534b91..cf38846753d 100644
--- a/arch/sparc/mm/sun4c.c
+++ b/arch/sparc/mm/sun4c.c
@@ -12,6 +12,7 @@
 #include <linux/kernel.h>
 #include <linux/mm.h>
 #include <linux/init.h>
+#include <linux/slab.h>
 #include <linux/bootmem.h>
 #include <linux/highmem.h>
 #include <linux/fs.h>
diff --git a/arch/sparc/mm/tsb.c b/arch/sparc/mm/tsb.c
index 36a0813f951..101d7c82870 100644
--- a/arch/sparc/mm/tsb.c
+++ b/arch/sparc/mm/tsb.c
@@ -5,6 +5,7 @@
 
 #include <linux/kernel.h>
 #include <linux/preempt.h>
+#include <linux/slab.h>
 #include <asm/system.h>
 #include <asm/page.h>
 #include <asm/tlbflush.h>
diff --git a/arch/um/.gitignore b/arch/um/.gitignore
new file mode 100644
index 00000000000..a73d3a1cc74
--- /dev/null
+++ b/arch/um/.gitignore
@@ -0,0 +1,3 @@
+kernel/config.c
+kernel/config.tmp
+kernel/vmlinux.lds
diff --git a/arch/um/drivers/line.c b/arch/um/drivers/line.c
index cf8a97f3451..7a656bd8bd3 100644
--- a/arch/um/drivers/line.c
+++ b/arch/um/drivers/line.c
@@ -6,6 +6,7 @@
 #include "linux/irqreturn.h"
 #include "linux/kd.h"
 #include "linux/sched.h"
+#include "linux/slab.h"
 #include "chan_kern.h"
 #include "irq_kern.h"
 #include "irq_user.h"
@@ -18,10 +19,10 @@ static irqreturn_t line_interrupt(int irq, void *data)
 {
         struct chan *chan = data;
         struct line *line = chan->line;
-        struct tty_struct *tty = line->tty;
+        struct tty_struct *tty;
 
         if (line)
-                chan_interrupt(&line->chan_list, &line->task, tty, irq);
+                chan_interrupt(&line->chan_list, &line->task, line->tty, irq);
         return IRQ_HANDLED;
 }
 
diff --git a/arch/um/drivers/net_kern.c b/arch/um/drivers/net_kern.c
index a74245ae3a8..f0537269423 100644
--- a/arch/um/drivers/net_kern.c
+++ b/arch/um/drivers/net_kern.c
@@ -16,6 +16,7 @@
 #include <linux/platform_device.h>
 #include <linux/rtnetlink.h>
 #include <linux/skbuff.h>
+#include <linux/slab.h>
 #include <linux/spinlock.h>
 #include "init.h"
 #include "irq_kern.h"
diff --git a/arch/um/drivers/port_kern.c b/arch/um/drivers/port_kern.c
index 4ebc8a34738..a11573be096 100644
--- a/arch/um/drivers/port_kern.c
+++ b/arch/um/drivers/port_kern.c
@@ -7,6 +7,7 @@
 #include "linux/interrupt.h"
 #include "linux/list.h"
 #include "linux/mutex.h"
+#include "linux/slab.h"
 #include "linux/workqueue.h"
 #include "asm/atomic.h"
 #include "init.h"
diff --git a/arch/um/drivers/ubd_kern.c b/arch/um/drivers/ubd_kern.c
index c1ff6903b62..da992a3ad6b 100644
--- a/arch/um/drivers/ubd_kern.c
+++ b/arch/um/drivers/ubd_kern.c
@@ -31,6 +31,7 @@
 #include "linux/ctype.h"
 #include "linux/capability.h"
 #include "linux/mm.h"
+#include "linux/slab.h"
 #include "linux/vmalloc.h"
 #include "linux/blkpg.h"
 #include "linux/genhd.h"
diff --git a/arch/um/include/asm/dma-mapping.h b/arch/um/include/asm/dma-mapping.h
index 378de4bbf49..b948c14a786 100644
--- a/arch/um/include/asm/dma-mapping.h
+++ b/arch/um/include/asm/dma-mapping.h
@@ -104,14 +104,6 @@ dma_get_cache_alignment(void)
 }
 
 static inline void
-dma_sync_single_range(struct device *dev, dma_addr_t dma_handle,
-                      unsigned long offset, size_t size,
-                      enum dma_data_direction direction)
-{
-        BUG();
-}
-
-static inline void
 dma_cache_sync(struct device *dev, void *vaddr, size_t size,
                enum dma_data_direction direction)
 {
diff --git a/arch/um/include/asm/ptrace-generic.h b/arch/um/include/asm/ptrace-generic.h
index 6c8899013c9..2cd899f75a3 100644
--- a/arch/um/include/asm/ptrace-generic.h
+++ b/arch/um/include/asm/ptrace-generic.h
@@ -16,6 +16,8 @@ struct pt_regs {
         struct uml_pt_regs regs;
 };
 
+#define arch_has_single_step()  (1)
+
 #define EMPTY_REGS { .regs = EMPTY_UML_PT_REGS }
 
 #define PT_REGS_IP(r) UPT_IP(&(r)->regs)
diff --git a/arch/um/kernel/exec.c b/arch/um/kernel/exec.c
index fda30d21fb9..97974c1bdd1 100644
--- a/arch/um/kernel/exec.c
+++ b/arch/um/kernel/exec.c
@@ -8,6 +8,7 @@
 #include "linux/smp_lock.h"
 #include "linux/ptrace.h"
 #include "linux/sched.h"
+#include "linux/slab.h"
 #include "asm/current.h"
 #include "asm/processor.h"
 #include "asm/uaccess.h"
diff --git a/arch/um/kernel/irq.c b/arch/um/kernel/irq.c
index 89474ba0741..a3f0b04d710 100644
--- a/arch/um/kernel/irq.c
+++ b/arch/um/kernel/irq.c
@@ -12,6 +12,7 @@
 #include "linux/module.h"
 #include "linux/sched.h"
 #include "linux/seq_file.h"
+#include "linux/slab.h"
 #include "as-layout.h"
 #include "kern_util.h"
 #include "os.h"
diff --git a/arch/um/kernel/mem.c b/arch/um/kernel/mem.c
index a5d5e70cf6f..8137ccc9635 100644
--- a/arch/um/kernel/mem.c
+++ b/arch/um/kernel/mem.c
@@ -5,10 +5,10 @@
 
 #include <linux/stddef.h>
 #include <linux/bootmem.h>
-#include <linux/gfp.h>
 #include <linux/highmem.h>
 #include <linux/mm.h>
 #include <linux/swap.h>
+#include <linux/slab.h>
 #include <asm/fixmap.h>
 #include <asm/page.h>
 #include "as-layout.h"
diff --git a/arch/um/kernel/process.c b/arch/um/kernel/process.c
index 2f910a1b745..fab4371184f 100644
--- a/arch/um/kernel/process.c
+++ b/arch/um/kernel/process.c
@@ -7,13 +7,13 @@
 #include <linux/stddef.h>
 #include <linux/err.h>
 #include <linux/hardirq.h>
-#include <linux/gfp.h>
 #include <linux/mm.h>
 #include <linux/module.h>
 #include <linux/personality.h>
 #include <linux/proc_fs.h>
 #include <linux/ptrace.h>
 #include <linux/random.h>
+#include <linux/slab.h>
 #include <linux/sched.h>
 #include <linux/seq_file.h>
 #include <linux/tick.h>
diff --git a/arch/um/kernel/ptrace.c b/arch/um/kernel/ptrace.c
index 8e3d69e4fcb..484509948ee 100644
--- a/arch/um/kernel/ptrace.c
+++ b/arch/um/kernel/ptrace.c
@@ -12,16 +12,25 @@
 #endif
 #include "skas_ptrace.h"
 
-static inline void set_singlestepping(struct task_struct *child, int on)
+
+
+void user_enable_single_step(struct task_struct *child)
 {
-        if (on)
-                child->ptrace |= PT_DTRACE;
-        else
-                child->ptrace &= ~PT_DTRACE;
+        child->ptrace |= PT_DTRACE;
         child->thread.singlestep_syscall = 0;
 
 #ifdef SUBARCH_SET_SINGLESTEPPING
-        SUBARCH_SET_SINGLESTEPPING(child, on);
+        SUBARCH_SET_SINGLESTEPPING(child, 1);
+#endif
+}
+
+void user_disable_single_step(struct task_struct *child)
+{
+        child->ptrace &= ~PT_DTRACE;
+        child->thread.singlestep_syscall = 0;
+
+#ifdef SUBARCH_SET_SINGLESTEPPING
+        SUBARCH_SET_SINGLESTEPPING(child, 0);
 #endif
 }
 
@@ -30,7 +39,7 @@ static inline void set_singlestepping(struct task_struct *child, int on)
  */
 void ptrace_disable(struct task_struct *child)
 {
-        set_singlestepping(child,0);
+        user_disable_single_step(child);
 }
 
 extern int peek_user(struct task_struct * child, long addr, long data);
@@ -69,53 +78,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 ret = -EIO;
                 break;
 
-        /* continue and stop at next (return from) syscall */
-        case PTRACE_SYSCALL:
-        /* restart after signal. */
-        case PTRACE_CONT: {
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-
-                set_singlestepping(child, 0);
-                if (request == PTRACE_SYSCALL)
-                        set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                else clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                child->exit_code = data;
-                wake_up_process(child);
-                ret = 0;
-                break;
-        }
-
-/*
- * make the child exit.  Best I can do is send it a sigkill.
- * perhaps it should be put in the status that it wants to
- * exit.
- */
-        case PTRACE_KILL: {
-                ret = 0;
-                if (child->exit_state == EXIT_ZOMBIE)   /* already dead */
-                        break;
-
-                set_singlestepping(child, 0);
-                child->exit_code = SIGKILL;
-                wake_up_process(child);
-                break;
-        }
-
-        case PTRACE_SINGLESTEP: {  /* set the trap flag. */
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                set_singlestepping(child, 1);
-                child->exit_code = data;
-                /* give it a chance to run. */
-                wake_up_process(child);
-                ret = 0;
-                break;
-        }
-
 #ifdef PTRACE_GETREGS
         case PTRACE_GETREGS: { /* Get all gp regs from the child. */
                 if (!access_ok(VERIFY_WRITE, p, MAX_REG_OFFSET)) {
diff --git a/arch/um/kernel/reboot.c b/arch/um/kernel/reboot.c
index 00197d3d21e..869bec9f251 100644
--- a/arch/um/kernel/reboot.c
+++ b/arch/um/kernel/reboot.c
@@ -4,6 +4,7 @@
  */
 
 #include "linux/sched.h"
+#include "linux/slab.h"
 #include "kern_util.h"
 #include "os.h"
 #include "skas.h"
diff --git a/arch/um/kernel/skas/mmu.c b/arch/um/kernel/skas/mmu.c
index 8bfd1e90581..3d099f97478 100644
--- a/arch/um/kernel/skas/mmu.c
+++ b/arch/um/kernel/skas/mmu.c
@@ -5,6 +5,7 @@
 
 #include "linux/mm.h"
 #include "linux/sched.h"
+#include "linux/slab.h"
 #include "asm/pgalloc.h"
 #include "asm/pgtable.h"
 #include "as-layout.h"
diff --git a/arch/um/kernel/syscall.c b/arch/um/kernel/syscall.c
index cccab850c27..4393173923f 100644
--- a/arch/um/kernel/syscall.c
+++ b/arch/um/kernel/syscall.c
@@ -51,51 +51,6 @@ long old_mmap(unsigned long addr, unsigned long len,
         return err;
 }
 
-long sys_uname(struct old_utsname __user * name)
-{
-        long err;
-        if (!name)
-                return -EFAULT;
-        down_read(&uts_sem);
-        err = copy_to_user(name, utsname(), sizeof (*name));
-        up_read(&uts_sem);
-        return err?-EFAULT:0;
-}
-
-long sys_olduname(struct oldold_utsname __user * name)
-{
-        long error;
-
-        if (!name)
-                return -EFAULT;
-        if (!access_ok(VERIFY_WRITE,name,sizeof(struct oldold_utsname)))
-                return -EFAULT;
-
-        down_read(&uts_sem);
-
-        error = __copy_to_user(&name->sysname, &utsname()->sysname,
-                               __OLD_UTS_LEN);
-        error |= __put_user(0, name->sysname + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->nodename, &utsname()->nodename,
-                                __OLD_UTS_LEN);
-        error |= __put_user(0, name->nodename + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->release, &utsname()->release,
-                                __OLD_UTS_LEN);
-        error |= __put_user(0, name->release + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->version, &utsname()->version,
-                                __OLD_UTS_LEN);
-        error |= __put_user(0, name->version + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->machine, &utsname()->machine,
-                                __OLD_UTS_LEN);
-        error |= __put_user(0, name->machine + __OLD_UTS_LEN);
-
-        up_read(&uts_sem);
-
-        error = error ? -EFAULT : 0;
-
-        return error;
-}
-
 int kernel_execve(const char *filename, char *const argv[], char *const envp[])
 {
         mm_segment_t fs;
diff --git a/arch/um/sys-i386/Makefile b/arch/um/sys-i386/Makefile
index 1b549bca464..804b28dd032 100644
--- a/arch/um/sys-i386/Makefile
+++ b/arch/um/sys-i386/Makefile
@@ -6,6 +6,8 @@ obj-y = bug.o bugs.o checksum.o delay.o fault.o ksyms.o ldt.o ptrace.o \
         ptrace_user.o setjmp.o signal.o stub.o stub_segv.o syscalls.o sysrq.o \
         sys_call_table.o tls.o
 
+obj-$(CONFIG_BINFMT_ELF) += elfcore.o
+
 subarch-obj-y = lib/semaphore_32.o lib/string_32.o
 subarch-obj-$(CONFIG_HIGHMEM) += mm/highmem_32.o
 subarch-obj-$(CONFIG_MODULES) += kernel/module.o
diff --git a/arch/um/sys-i386/asm/elf.h b/arch/um/sys-i386/asm/elf.h
index 770885472ed..e64cd41d7ba 100644
--- a/arch/um/sys-i386/asm/elf.h
+++ b/arch/um/sys-i386/asm/elf.h
@@ -116,47 +116,4 @@ do {								\
         }                                                       \
 } while (0)
 
-/*
- * These macros parameterize elf_core_dump in fs/binfmt_elf.c to write out
- * extra segments containing the vsyscall DSO contents.  Dumping its
- * contents makes post-mortem fully interpretable later without matching up
- * the same kernel and hardware config to see what PC values meant.
- * Dumping its extra ELF program headers includes all the other information
- * a debugger needs to easily find how the vsyscall DSO was being used.
- */
-#define ELF_CORE_EXTRA_PHDRS                                                  \
-        (vsyscall_ehdr ? (((struct elfhdr *)vsyscall_ehdr)->e_phnum) : 0 )
-
-#define ELF_CORE_WRITE_EXTRA_PHDRS                                            \
-if ( vsyscall_ehdr ) {                                                        \
-        const struct elfhdr *const ehdrp = (struct elfhdr *)vsyscall_ehdr;    \
-        const struct elf_phdr *const phdrp =                                  \
-                (const struct elf_phdr *) (vsyscall_ehdr + ehdrp->e_phoff);   \
-        int i;                                                                \
-        Elf32_Off ofs = 0;                                                    \
-        for (i = 0; i < ehdrp->e_phnum; ++i) {                                \
-                struct elf_phdr phdr = phdrp[i];                              \
-                if (phdr.p_type == PT_LOAD) {                                 \
-                        ofs = phdr.p_offset = offset;                         \
-                        offset += phdr.p_filesz;                              \
-                }                                                             \
-                else                                                          \
-                        phdr.p_offset += ofs;                                 \
-                phdr.p_paddr = 0; /* match other core phdrs */                \
-                DUMP_WRITE(&phdr, sizeof(phdr));                              \
-        }                                                                     \
-}
-#define ELF_CORE_WRITE_EXTRA_DATA                                             \
-if ( vsyscall_ehdr ) {                                                        \
-        const struct elfhdr *const ehdrp = (struct elfhdr *)vsyscall_ehdr;    \
-        const struct elf_phdr *const phdrp =                                  \
-                (const struct elf_phdr *) (vsyscall_ehdr + ehdrp->e_phoff);   \
-        int i;                                                                \
-        for (i = 0; i < ehdrp->e_phnum; ++i) {                                \
-                if (phdrp[i].p_type == PT_LOAD)                               \
-                        DUMP_WRITE((void *) phdrp[i].p_vaddr,                 \
-                                   phdrp[i].p_filesz);                        \
-        }                                                                     \
-}
-
 #endif
diff --git a/arch/um/sys-i386/elfcore.c b/arch/um/sys-i386/elfcore.c
new file mode 100644
index 00000000000..6bb49b687c9
--- /dev/null
+++ b/arch/um/sys-i386/elfcore.c
@@ -0,0 +1,83 @@
+#include <linux/elf.h>
+#include <linux/coredump.h>
+#include <linux/fs.h>
+#include <linux/mm.h>
+
+#include <asm/elf.h>
+
+
+Elf32_Half elf_core_extra_phdrs(void)
+{
+        return vsyscall_ehdr ? (((struct elfhdr *)vsyscall_ehdr)->e_phnum) : 0;
+}
+
+int elf_core_write_extra_phdrs(struct file *file, loff_t offset, size_t *size,
+                               unsigned long limit)
+{
+        if ( vsyscall_ehdr ) {
+                const struct elfhdr *const ehdrp =
+                        (struct elfhdr *) vsyscall_ehdr;
+                const struct elf_phdr *const phdrp =
+                        (const struct elf_phdr *) (vsyscall_ehdr + ehdrp->e_phoff);
+                int i;
+                Elf32_Off ofs = 0;
+
+                for (i = 0; i < ehdrp->e_phnum; ++i) {
+                        struct elf_phdr phdr = phdrp[i];
+
+                        if (phdr.p_type == PT_LOAD) {
+                                ofs = phdr.p_offset = offset;
+                                offset += phdr.p_filesz;
+                        } else {
+                                phdr.p_offset += ofs;
+                        }
+                        phdr.p_paddr = 0; /* match other core phdrs */
+                        *size += sizeof(phdr);
+                        if (*size > limit
+                            || !dump_write(file, &phdr, sizeof(phdr)))
+                                return 0;
+                }
+        }
+        return 1;
+}
+
+int elf_core_write_extra_data(struct file *file, size_t *size,
+                              unsigned long limit)
+{
+        if ( vsyscall_ehdr ) {
+                const struct elfhdr *const ehdrp =
+                        (struct elfhdr *) vsyscall_ehdr;
+                const struct elf_phdr *const phdrp =
+                        (const struct elf_phdr *) (vsyscall_ehdr + ehdrp->e_phoff);
+                int i;
+
+                for (i = 0; i < ehdrp->e_phnum; ++i) {
+                        if (phdrp[i].p_type == PT_LOAD) {
+                                void *addr = (void *) phdrp[i].p_vaddr;
+                                size_t filesz = phdrp[i].p_filesz;
+
+                                *size += filesz;
+                                if (*size > limit
+                                    || !dump_write(file, addr, filesz))
+                                        return 0;
+                        }
+                }
+        }
+        return 1;
+}
+
+size_t elf_core_extra_data_size(void)
+{
+        if ( vsyscall_ehdr ) {
+                const struct elfhdr *const ehdrp =
+                        (struct elfhdr *)vsyscall_ehdr;
+                const struct elf_phdr *const phdrp =
+                        (const struct elf_phdr *) (vsyscall_ehdr + ehdrp->e_phoff);
+                int i;
+
+                for (i = 0; i < ehdrp->e_phnum; ++i)
+                        if (phdrp[i].p_type == PT_LOAD)
+                                return (size_t) phdrp[i].p_filesz;
+        }
+        return 0;
+}
diff --git a/arch/um/sys-i386/ldt.c b/arch/um/sys-i386/ldt.c
index a4846a84a7b..3f2bf208d88 100644
--- a/arch/um/sys-i386/ldt.c
+++ b/arch/um/sys-i386/ldt.c
@@ -5,6 +5,7 @@
 
 #include <linux/mm.h>
 #include <linux/sched.h>
+#include <linux/slab.h>
 #include <asm/unistd.h>
 #include "os.h"
 #include "proc_mm.h"
diff --git a/arch/um/sys-i386/shared/sysdep/syscalls.h b/arch/um/sys-i386/shared/sysdep/syscalls.h
index e7787679e31..05cb796aecb 100644
--- a/arch/um/sys-i386/shared/sysdep/syscalls.h
+++ b/arch/um/sys-i386/shared/sysdep/syscalls.h
@@ -13,8 +13,6 @@ typedef long syscall_handler_t(struct pt_regs);
  */
 extern syscall_handler_t sys_rt_sigaction;
 
-extern syscall_handler_t old_mmap_i386;
-
 extern syscall_handler_t *sys_call_table[];
 
 #define EXECUTE_SYSCALL(syscall, regs) \
diff --git a/arch/um/sys-i386/sys_call_table.S b/arch/um/sys-i386/sys_call_table.S
index c6260dd6ebb..de274071455 100644
--- a/arch/um/sys-i386/sys_call_table.S
+++ b/arch/um/sys-i386/sys_call_table.S
@@ -7,7 +7,7 @@
 #define sys_vm86old sys_ni_syscall
 #define sys_vm86 sys_ni_syscall
 
-#define old_mmap old_mmap_i386
+#define old_mmap sys_old_mmap
 
 #define ptregs_fork sys_fork
 #define ptregs_execve sys_execve
diff --git a/arch/um/sys-i386/syscalls.c b/arch/um/sys-i386/syscalls.c
index 857ca0b3bde..70ca357393b 100644
--- a/arch/um/sys-i386/syscalls.c
+++ b/arch/um/sys-i386/syscalls.c
@@ -12,57 +12,6 @@
 #include "asm/unistd.h"
 
 /*
- * Perform the select(nd, in, out, ex, tv) and mmap() system
- * calls. Linux/i386 didn't use to be able to handle more than
- * 4 system call parameters, so these system calls used a memory
- * block for parameter passing..
- */
-
-struct mmap_arg_struct {
-        unsigned long addr;
-        unsigned long len;
-        unsigned long prot;
-        unsigned long flags;
-        unsigned long fd;
-        unsigned long offset;
-};
-
-extern int old_mmap(unsigned long addr, unsigned long len,
-                    unsigned long prot, unsigned long flags,
-                    unsigned long fd, unsigned long offset);
-
-long old_mmap_i386(struct mmap_arg_struct __user *arg)
-{
-        struct mmap_arg_struct a;
-        int err = -EFAULT;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                goto out;
-
-        err = old_mmap(a.addr, a.len, a.prot, a.flags, a.fd, a.offset);
- out:
-        return err;
-}
-
-struct sel_arg_struct {
-        unsigned long n;
-        fd_set __user *inp;
-        fd_set __user *outp;
-        fd_set __user *exp;
-        struct timeval __user *tvp;
-};
-
-long old_select(struct sel_arg_struct __user *arg)
-{
-        struct sel_arg_struct a;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                return -EFAULT;
-        /* sys_select() does the appropriate kernel locking */
-        return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
-}
-
-/*
  * The prototype on i386 is:
  *
  *     int clone(int flags, void * child_stack, int * parent_tidptr, struct user_desc * newtls, int * child_tidptr)
@@ -85,92 +34,6 @@ long sys_clone(unsigned long clone_flags, unsigned long newsp,
         return ret;
 }
 
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-long sys_ipc (uint call, int first, int second,
-             int third, void __user *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        switch (call) {
-        case SEMOP:
-                return sys_semtimedop(first, (struct sembuf __user *) ptr,
-                                      second, NULL);
-        case SEMTIMEDOP:
-                return sys_semtimedop(first, (struct sembuf __user *) ptr,
-                                      second,
-                                      (const struct timespec __user *) fifth);
-        case SEMGET:
-                return sys_semget (first, second, third);
-        case SEMCTL: {
-                union semun fourth;
-                if (!ptr)
-                        return -EINVAL;
-                if (get_user(fourth.__pad, (void __user * __user *) ptr))
-                        return -EFAULT;
-                return sys_semctl (first, second, third, fourth);
-        }
-
-        case MSGSND:
-                return sys_msgsnd (first, (struct msgbuf *) ptr,
-                                   second, third);
-        case MSGRCV:
-                switch (version) {
-                case 0: {
-                        struct ipc_kludge tmp;
-                        if (!ptr)
-                                return -EINVAL;
-
-                        if (copy_from_user(&tmp,
-                                           (struct ipc_kludge *) ptr,
-                                           sizeof (tmp)))
-                                return -EFAULT;
-                        return sys_msgrcv (first, tmp.msgp, second,
-                                           tmp.msgtyp, third);
-                }
-                default:
-                        panic("msgrcv with version != 0");
-                        return sys_msgrcv (first,
-                                           (struct msgbuf *) ptr,
-                                           second, fifth, third);
-                }
-        case MSGGET:
-                return sys_msgget ((key_t) first, second);
-        case MSGCTL:
-                return sys_msgctl (first, second, (struct msqid_ds *) ptr);
-
-        case SHMAT:
-                switch (version) {
-                default: {
-                        ulong raddr;
-                        ret = do_shmat (first, (char *) ptr, second, &raddr);
-                        if (ret)
-                                return ret;
-                        return put_user (raddr, (ulong *) third);
-                }
-                case 1: /* iBCS2 emulator entry point */
-                        if (!segment_eq(get_fs(), get_ds()))
-                                return -EINVAL;
-                        return do_shmat (first, (char *) ptr, second, (ulong *) third);
-                }
-        case SHMDT:
-                return sys_shmdt ((char *)ptr);
-        case SHMGET:
-                return sys_shmget (first, second, third);
-        case SHMCTL:
-                return sys_shmctl (first, second,
-                                   (struct shmid_ds *) ptr);
-        default:
-                return -ENOSYS;
-        }
-}
-
 long sys_sigaction(int sig, const struct old_sigaction __user *act,
                          struct old_sigaction __user *oact)
 {
diff --git a/arch/um/sys-x86_64/syscall_table.c b/arch/um/sys-x86_64/syscall_table.c
index dd21d69715e..47d469e7e7c 100644
--- a/arch/um/sys-x86_64/syscall_table.c
+++ b/arch/um/sys-x86_64/syscall_table.c
@@ -26,11 +26,6 @@
 
 /* On UML we call it this way ("old" means it's not mmap2) */
 #define sys_mmap old_mmap
-/*
- * On x86-64 sys_uname is actually sys_newuname plus a compatibility trick.
- * See arch/x86_64/kernel/sys_x86_64.c
- */
-#define sys_uname sys_uname64
 
 #define stub_clone sys_clone
 #define stub_fork sys_fork
diff --git a/arch/um/sys-x86_64/syscalls.c b/arch/um/sys-x86_64/syscalls.c
index f1199fd34d3..f3d82bb6e15 100644
--- a/arch/um/sys-x86_64/syscalls.c
+++ b/arch/um/sys-x86_64/syscalls.c
@@ -12,20 +12,6 @@
 #include "asm/uaccess.h"
 #include "os.h"
 
-asmlinkage long sys_uname64(struct new_utsname __user * name)
-{
-        int err;
-
-        down_read(&uts_sem);
-        err = copy_to_user(name, utsname(), sizeof (*name));
-        up_read(&uts_sem);
-
-        if (personality(current->personality) == PER_LINUX32)
-                err |= copy_to_user(&name->machine, "i686", 5);
-
-        return err ? -EFAULT : 0;
-}
-
 long arch_prctl(struct task_struct *task, int code, unsigned long __user *addr)
 {
         unsigned long *ptr = addr, tmp;
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 57ccdcec146..9458685902b 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -31,6 +31,7 @@ config X86
         select ARCH_WANT_FRAME_POINTERS
         select HAVE_DMA_ATTRS
         select HAVE_KRETPROBES
+        select HAVE_OPTPROBES
         select HAVE_FTRACE_MCOUNT_RECORD
         select HAVE_DYNAMIC_FTRACE
         select HAVE_FUNCTION_TRACER
@@ -101,6 +102,9 @@ config ZONE_DMA
 config SBUS
         bool
 
+config NEED_DMA_MAP_STATE
+       def_bool (X86_64 || DMAR || DMA_API_DEBUG)
+
 config GENERIC_ISA_DMA
         def_bool y
 
@@ -392,8 +396,12 @@ config X86_ELAN
 
 config X86_MRST
        bool "Moorestown MID platform"
+        depends on PCI
+        depends on PCI_GOANY
         depends on X86_32
         depends on X86_EXTENDED_PLATFORM
+        depends on X86_IO_APIC
+        select APB_TIMER
         ---help---
           Moorestown is Intel's Low Power Intel Architecture (LPIA) based Moblin
           Internet Device(MID) platform. Moorestown consists of two chips:
@@ -428,6 +436,7 @@ config X86_32_NON_STANDARD
 config X86_NUMAQ
         bool "NUMAQ (IBM/Sequent)"
         depends on X86_32_NON_STANDARD
+        depends on PCI
         select NUMA
         select X86_MPPARSE
         ---help---
@@ -628,6 +637,16 @@ config HPET_EMULATE_RTC
         def_bool y
         depends on HPET_TIMER && (RTC=y || RTC=m || RTC_DRV_CMOS=m || RTC_DRV_CMOS=y)
 
+config APB_TIMER
+       def_bool y if MRST
+       prompt "Langwell APB Timer Support" if X86_MRST
+       help
+         APB timer is the replacement for 8254, HPET on X86 MID platforms.
+         The APBT provides a stable time base on SMP
+         systems, unlike the TSC, but it is more expensive to access,
+         as it is off-chip. APB timers are always running regardless of CPU
+         C states, they are used as per CPU clockevent device when possible.
+
 # Mark as embedded because too many people got it wrong.
 # The code disables itself when not needed.
 config DMI
@@ -643,7 +662,7 @@ config GART_IOMMU
         bool "GART IOMMU support" if EMBEDDED
         default y
         select SWIOTLB
-        depends on X86_64 && PCI
+        depends on X86_64 && PCI && K8_NB
         ---help---
           Support for full DMA access of devices with 32bit memory access only
           on systems with more than 3GB. This is usually needed for USB,
@@ -1197,8 +1216,8 @@ config NUMA_EMU
 
 config NODES_SHIFT
         int "Maximum NUMA Nodes (as a power of 2)" if !MAXSMP
-        range 1 9
-        default "9" if MAXSMP
+        range 1 10
+        default "10" if MAXSMP
         default "6" if X86_64
         default "4" if X86_NUMAQ
         default "3"
@@ -2042,7 +2061,7 @@ endif # X86_32
 
 config K8_NB
         def_bool y
-        depends on AGP_AMD64 || (X86_64 && (GART_IOMMU || (PCI && NUMA)))
+        depends on CPU_SUP_AMD && PCI
 
 source "drivers/pcmcia/Kconfig"
 
diff --git a/arch/x86/crypto/fpu.c b/arch/x86/crypto/fpu.c
index daef6cd2b45..1a8f8649c03 100644
--- a/arch/x86/crypto/fpu.c
+++ b/arch/x86/crypto/fpu.c
@@ -16,6 +16,7 @@
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
+#include <linux/slab.h>
 #include <asm/i387.h>
 
 struct crypto_fpu_ctx {
diff --git a/arch/x86/crypto/twofish-i586-asm_32.S b/arch/x86/crypto/twofish-i586-asm_32.S
index 39b98ed2c1b..575331cb2a8 100644
--- a/arch/x86/crypto/twofish-i586-asm_32.S
+++ b/arch/x86/crypto/twofish-i586-asm_32.S
@@ -22,7 +22,7 @@
 
 #include <asm/asm-offsets.h>
 
-/* return adress at 0 */
+/* return address at 0 */
 
 #define in_blk    12  /* input byte array address parameter*/
 #define out_blk   8  /* output byte array address parameter*/
@@ -230,8 +230,8 @@ twofish_enc_blk:
         push    %edi
 
         mov     tfm + 16(%esp), %ebp    /* abuse the base pointer: set new base bointer to the crypto tfm */
-        add     $crypto_tfm_ctx_offset, %ebp    /* ctx adress */
-        mov     in_blk+16(%esp),%edi    /* input adress in edi */
+        add     $crypto_tfm_ctx_offset, %ebp    /* ctx address */
+        mov     in_blk+16(%esp),%edi    /* input address in edi */
 
         mov     (%edi),         %eax
         mov     b_offset(%edi), %ebx
@@ -286,8 +286,8 @@ twofish_dec_blk:
 
 
         mov     tfm + 16(%esp), %ebp    /* abuse the base pointer: set new base bointer to the crypto tfm */
-        add     $crypto_tfm_ctx_offset, %ebp    /* ctx adress */
-        mov     in_blk+16(%esp),%edi    /* input adress in edi */
+        add     $crypto_tfm_ctx_offset, %ebp    /* ctx address */
+        mov     in_blk+16(%esp),%edi    /* input address in edi */
 
         mov     (%edi),         %eax
         mov     b_offset(%edi), %ebx
diff --git a/arch/x86/crypto/twofish-x86_64-asm_64.S b/arch/x86/crypto/twofish-x86_64-asm_64.S
index 35974a58661..573aa102542 100644
--- a/arch/x86/crypto/twofish-x86_64-asm_64.S
+++ b/arch/x86/crypto/twofish-x86_64-asm_64.S
@@ -221,11 +221,11 @@
 twofish_enc_blk:
         pushq    R1
 
-        /* %rdi contains the crypto tfm adress */
-        /* %rsi contains the output adress */
-        /* %rdx contains the input adress */
-        add     $crypto_tfm_ctx_offset, %rdi    /* set ctx adress */
-        /* ctx adress is moved to free one non-rex register
+        /* %rdi contains the crypto tfm address */
+        /* %rsi contains the output address */
+        /* %rdx contains the input address */
+        add     $crypto_tfm_ctx_offset, %rdi    /* set ctx address */
+        /* ctx address is moved to free one non-rex register
         as target for the 8bit high operations */
         mov     %rdi,           %r11
 
@@ -274,11 +274,11 @@ twofish_enc_blk:
 twofish_dec_blk:
         pushq    R1
 
-        /* %rdi contains the crypto tfm adress */
-        /* %rsi contains the output adress */
-        /* %rdx contains the input adress */
-        add     $crypto_tfm_ctx_offset, %rdi    /* set ctx adress */
-        /* ctx adress is moved to free one non-rex register
+        /* %rdi contains the crypto tfm address */
+        /* %rsi contains the output address */
+        /* %rdx contains the input address */
+        add     $crypto_tfm_ctx_offset, %rdi    /* set ctx address */
+        /* ctx address is moved to free one non-rex register
         as target for the 8bit high operations */
         mov     %rdi,           %r11
 
diff --git a/arch/x86/ia32/ia32_aout.c b/arch/x86/ia32/ia32_aout.c
index 280c019cfad..0350311906a 100644
--- a/arch/x86/ia32/ia32_aout.c
+++ b/arch/x86/ia32/ia32_aout.c
@@ -21,7 +21,6 @@
 #include <linux/fcntl.h>
 #include <linux/ptrace.h>
 #include <linux/user.h>
-#include <linux/slab.h>
 #include <linux/binfmts.h>
 #include <linux/personality.h>
 #include <linux/init.h>
diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S
index 53147ad85b9..e790bc1fbfa 100644
--- a/arch/x86/ia32/ia32entry.S
+++ b/arch/x86/ia32/ia32entry.S
@@ -563,7 +563,7 @@ ia32_sys_call_table:
         .quad quiet_ni_syscall                  /* old mpx syscall holder */
         .quad sys_setpgid
         .quad quiet_ni_syscall                  /* old ulimit syscall holder */
-        .quad sys32_olduname
+        .quad sys_olduname
         .quad sys_umask         /* 60 */
         .quad sys_chroot
         .quad compat_sys_ustat
@@ -586,7 +586,7 @@ ia32_sys_call_table:
         .quad compat_sys_settimeofday
         .quad sys_getgroups16   /* 80 */
         .quad sys_setgroups16
-        .quad sys32_old_select
+        .quad compat_sys_old_select
         .quad sys_symlink
         .quad sys_lstat
         .quad sys_readlink              /* 85 */
@@ -613,7 +613,7 @@ ia32_sys_call_table:
         .quad compat_sys_newstat
         .quad compat_sys_newlstat
         .quad compat_sys_newfstat
-        .quad sys32_uname
+        .quad sys_uname
         .quad stub32_iopl               /* 110 */
         .quad sys_vhangup
         .quad quiet_ni_syscall  /* old "idle" system call */
@@ -626,7 +626,7 @@ ia32_sys_call_table:
         .quad stub32_sigreturn
         .quad stub32_clone              /* 120 */
         .quad sys_setdomainname
-        .quad sys_uname
+        .quad sys_newuname
         .quad sys_modify_ldt
         .quad compat_sys_adjtimex
         .quad sys32_mprotect            /* 125 */
diff --git a/arch/x86/ia32/sys_ia32.c b/arch/x86/ia32/sys_ia32.c
index 422572c7792..626be156d88 100644
--- a/arch/x86/ia32/sys_ia32.c
+++ b/arch/x86/ia32/sys_ia32.c
@@ -40,6 +40,7 @@
 #include <linux/ptrace.h>
 #include <linux/highuid.h>
 #include <linux/sysctl.h>
+#include <linux/slab.h>
 #include <asm/mman.h>
 #include <asm/types.h>
 #include <asm/uaccess.h>
@@ -143,7 +144,7 @@ asmlinkage long sys32_fstatat(unsigned int dfd, char __user *filename,
  * block for parameter passing..
  */
 
-struct mmap_arg_struct {
+struct mmap_arg_struct32 {
         unsigned int addr;
         unsigned int len;
         unsigned int prot;
@@ -152,9 +153,9 @@ struct mmap_arg_struct {
         unsigned int offset;
 };
 
-asmlinkage long sys32_mmap(struct mmap_arg_struct __user *arg)
+asmlinkage long sys32_mmap(struct mmap_arg_struct32 __user *arg)
 {
-        struct mmap_arg_struct a;
+        struct mmap_arg_struct32 a;
 
         if (copy_from_user(&a, arg, sizeof(a)))
                 return -EFAULT;
@@ -332,24 +333,6 @@ asmlinkage long sys32_alarm(unsigned int seconds)
         return alarm_setitimer(seconds);
 }
 
-struct sel_arg_struct {
-        unsigned int n;
-        unsigned int inp;
-        unsigned int outp;
-        unsigned int exp;
-        unsigned int tvp;
-};
-
-asmlinkage long sys32_old_select(struct sel_arg_struct __user *arg)
-{
-        struct sel_arg_struct a;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                return -EFAULT;
-        return compat_sys_select(a.n, compat_ptr(a.inp), compat_ptr(a.outp),
-                                 compat_ptr(a.exp), compat_ptr(a.tvp));
-}
-
 asmlinkage long sys32_waitpid(compat_pid_t pid, unsigned int *stat_addr,
                               int options)
 {
@@ -466,58 +449,6 @@ asmlinkage long sys32_sendfile(int out_fd, int in_fd,
         return ret;
 }
 
-asmlinkage long sys32_olduname(struct oldold_utsname __user *name)
-{
-        char *arch = "x86_64";
-        int err;
-
-        if (!name)
-                return -EFAULT;
-        if (!access_ok(VERIFY_WRITE, name, sizeof(struct oldold_utsname)))
-                return -EFAULT;
-
-        down_read(&uts_sem);
-
-        err = __copy_to_user(&name->sysname, &utsname()->sysname,
-                             __OLD_UTS_LEN);
-        err |= __put_user(0, name->sysname+__OLD_UTS_LEN);
-        err |= __copy_to_user(&name->nodename, &utsname()->nodename,
-                              __OLD_UTS_LEN);
-        err |= __put_user(0, name->nodename+__OLD_UTS_LEN);
-        err |= __copy_to_user(&name->release, &utsname()->release,
-                              __OLD_UTS_LEN);
-        err |= __put_user(0, name->release+__OLD_UTS_LEN);
-        err |= __copy_to_user(&name->version, &utsname()->version,
-                              __OLD_UTS_LEN);
-        err |= __put_user(0, name->version+__OLD_UTS_LEN);
-
-        if (personality(current->personality) == PER_LINUX32)
-                arch = "i686";
-
-        err |= __copy_to_user(&name->machine, arch, strlen(arch) + 1);
-
-        up_read(&uts_sem);
-
-        err = err ? -EFAULT : 0;
-
-        return err;
-}
-
-long sys32_uname(struct old_utsname __user *name)
-{
-        int err;
-
-        if (!name)
-                return -EFAULT;
-        down_read(&uts_sem);
-        err = copy_to_user(name, utsname(), sizeof(*name));
-        up_read(&uts_sem);
-        if (personality(current->personality) == PER_LINUX32)
-                err |= copy_to_user(&name->machine, "i686", 5);
-
-        return err ? -EFAULT : 0;
-}
-
 asmlinkage long sys32_execve(char __user *name, compat_uptr_t __user *argv,
                              compat_uptr_t __user *envp, struct pt_regs *regs)
 {
diff --git a/arch/x86/include/asm/Kbuild b/arch/x86/include/asm/Kbuild
index 9f828f87ca3..493092efaa3 100644
--- a/arch/x86/include/asm/Kbuild
+++ b/arch/x86/include/asm/Kbuild
@@ -11,6 +11,7 @@ header-y += sigcontext32.h
 header-y += ucontext.h
 header-y += processor-flags.h
 header-y += hw_breakpoint.h
+header-y += hyperv.h
 
 unifdef-y += e820.h
 unifdef-y += ist.h
diff --git a/arch/x86/include/asm/alternative.h b/arch/x86/include/asm/alternative.h
index f1e253ceba4..b09ec55650b 100644
--- a/arch/x86/include/asm/alternative.h
+++ b/arch/x86/include/asm/alternative.h
@@ -165,10 +165,12 @@ static inline void apply_paravirt(struct paravirt_patch_site *start,
  * invalid instruction possible) or if the instructions are changed from a
  * consistent state to another consistent state atomically.
  * More care must be taken when modifying code in the SMP case because of
- * Intel's errata.
+ * Intel's errata. text_poke_smp() takes care that errata, but still
+ * doesn't support NMI/MCE handler code modifying.
  * On the local CPU you need to be protected again NMI or MCE handlers seeing an
  * inconsistent instruction while you patch.
  */
 extern void *text_poke(void *addr, const void *opcode, size_t len);
+extern void *text_poke_smp(void *addr, const void *opcode, size_t len);
 
 #endif /* _ASM_X86_ALTERNATIVE_H */
diff --git a/arch/x86/include/asm/amd_iommu_types.h b/arch/x86/include/asm/amd_iommu_types.h
index ba19ad4c47d..86a0ff0aeac 100644
--- a/arch/x86/include/asm/amd_iommu_types.h
+++ b/arch/x86/include/asm/amd_iommu_types.h
@@ -21,6 +21,7 @@
 #define _ASM_X86_AMD_IOMMU_TYPES_H
 
 #include <linux/types.h>
+#include <linux/mutex.h>
 #include <linux/list.h>
 #include <linux/spinlock.h>
 
@@ -140,6 +141,7 @@
 
 /* constants to configure the command buffer */
 #define CMD_BUFFER_SIZE    8192
+#define CMD_BUFFER_UNINITIALIZED 1
 #define CMD_BUFFER_ENTRIES 512
 #define MMIO_CMD_SIZE_SHIFT 56
 #define MMIO_CMD_SIZE_512 (0x9ULL << MMIO_CMD_SIZE_SHIFT)
@@ -237,6 +239,7 @@ struct protection_domain {
         struct list_head list;  /* for list of all protection domains */
         struct list_head dev_list; /* List of all devices in this domain */
         spinlock_t lock;        /* mostly used to lock the page table*/
+        struct mutex api_lock;  /* protect page tables in the iommu-api path */
         u16 id;                 /* the domain id written to the device table */
         int mode;               /* paging mode (0-6 levels) */
         u64 *pt_root;           /* page table root pointer */
diff --git a/arch/x86/include/asm/apb_timer.h b/arch/x86/include/asm/apb_timer.h
new file mode 100644
index 00000000000..c74a2eebe57
--- /dev/null
+++ b/arch/x86/include/asm/apb_timer.h
@@ -0,0 +1,70 @@
+/*
+ * apb_timer.h: Driver for Langwell APB timer based on Synopsis DesignWare
+ *
+ * (C) Copyright 2009 Intel Corporation
+ * Author: Jacob Pan (jacob.jun.pan@intel.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2
+ * of the License.
+ *
+ * Note:
+ */
+
+#ifndef ASM_X86_APBT_H
+#define ASM_X86_APBT_H
+#include <linux/sfi.h>
+
+#ifdef CONFIG_APB_TIMER
+
+/* Langwell DW APB timer registers */
+#define APBTMR_N_LOAD_COUNT    0x00
+#define APBTMR_N_CURRENT_VALUE 0x04
+#define APBTMR_N_CONTROL       0x08
+#define APBTMR_N_EOI           0x0c
+#define APBTMR_N_INT_STATUS    0x10
+
+#define APBTMRS_INT_STATUS     0xa0
+#define APBTMRS_EOI            0xa4
+#define APBTMRS_RAW_INT_STATUS 0xa8
+#define APBTMRS_COMP_VERSION   0xac
+#define APBTMRS_REG_SIZE       0x14
+
+/* register bits */
+#define APBTMR_CONTROL_ENABLE  (1<<0)
+#define APBTMR_CONTROL_MODE_PERIODIC   (1<<1) /*1: periodic 0:free running */
+#define APBTMR_CONTROL_INT     (1<<2)
+
+/* default memory mapped register base */
+#define LNW_SCU_ADDR           0xFF100000
+#define LNW_EXT_TIMER_OFFSET   0x1B800
+#define APBT_DEFAULT_BASE      (LNW_SCU_ADDR+LNW_EXT_TIMER_OFFSET)
+#define LNW_EXT_TIMER_PGOFFSET         0x800
+
+/* APBT clock speed range from PCLK to fabric base, 25-100MHz */
+#define APBT_MAX_FREQ          50
+#define APBT_MIN_FREQ          1
+#define APBT_MMAP_SIZE         1024
+
+#define APBT_DEV_USED  1
+
+extern void apbt_time_init(void);
+extern struct clock_event_device *global_clock_event;
+extern unsigned long apbt_quick_calibrate(void);
+extern int arch_setup_apbt_irqs(int irq, int trigger, int mask, int cpu);
+extern void apbt_setup_secondary_clock(void);
+extern unsigned int boot_cpu_id;
+extern int disable_apbt_percpu;
+
+extern struct sfi_timer_table_entry *sfi_get_mtmr(int hint);
+extern void sfi_free_mtmr(struct sfi_timer_table_entry *mtmr);
+extern int sfi_mtimer_num;
+
+#else /* CONFIG_APB_TIMER */
+
+static inline unsigned long apbt_quick_calibrate(void) {return 0; }
+static inline void apbt_time_init(void) {return 0; }
+
+#endif
+#endif /* ASM_X86_APBT_H */
diff --git a/arch/x86/include/asm/compat.h b/arch/x86/include/asm/compat.h
index 9a9c7bdc923..306160e58b4 100644
--- a/arch/x86/include/asm/compat.h
+++ b/arch/x86/include/asm/compat.h
@@ -8,7 +8,8 @@
 #include <linux/sched.h>
 #include <asm/user32.h>
 
-#define COMPAT_USER_HZ  100
+#define COMPAT_USER_HZ          100
+#define COMPAT_UTS_MACHINE      "i686\0\0"
 
 typedef u32             compat_size_t;
 typedef s32             compat_ssize_t;
diff --git a/arch/x86/include/asm/fixmap.h b/arch/x86/include/asm/fixmap.h
index 635f03bb499..d07b44f7d1d 100644
--- a/arch/x86/include/asm/fixmap.h
+++ b/arch/x86/include/asm/fixmap.h
@@ -82,6 +82,9 @@ enum fixed_addresses {
 #endif
         FIX_DBGP_BASE,
         FIX_EARLYCON_MEM_BASE,
+#ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT
+        FIX_OHCI1394_BASE,
+#endif
 #ifdef CONFIG_X86_LOCAL_APIC
         FIX_APIC_BASE,  /* local (CPU) APIC) -- required for SMP or not */
 #endif
@@ -132,9 +135,6 @@ enum fixed_addresses {
            (__end_of_permanent_fixed_addresses & (TOTAL_FIX_BTMAPS - 1))
          : __end_of_permanent_fixed_addresses,
         FIX_BTMAP_BEGIN = FIX_BTMAP_END + TOTAL_FIX_BTMAPS - 1,
-#ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT
-        FIX_OHCI1394_BASE,
-#endif
 #ifdef CONFIG_X86_32
         FIX_WP_TEST,
 #endif
diff --git a/arch/x86/include/asm/hw_breakpoint.h b/arch/x86/include/asm/hw_breakpoint.h
index 0675a7c4c20..2a1bd8f4f23 100644
--- a/arch/x86/include/asm/hw_breakpoint.h
+++ b/arch/x86/include/asm/hw_breakpoint.h
@@ -10,7 +10,6 @@
  * (display/resolving)
  */
 struct arch_hw_breakpoint {
-        char            *name; /* Contains name of the symbol to set bkpt */
         unsigned long   address;
         u8              len;
         u8              type;
diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index eeac829a0f4..46c0fe05f23 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -53,13 +53,6 @@ extern void threshold_interrupt(void);
 extern void call_function_interrupt(void);
 extern void call_function_single_interrupt(void);
 
-/* PIC specific functions */
-extern void disable_8259A_irq(unsigned int irq);
-extern void enable_8259A_irq(unsigned int irq);
-extern int i8259A_irq_pending(unsigned int irq);
-extern void make_8259A_irq(unsigned int irq);
-extern void init_8259A(int aeoi);
-
 /* IOAPIC */
 #define IO_APIC_IRQ(x) (((x) >= NR_IRQS_LEGACY) || ((1<<(x)) & io_apic_irqs))
 extern unsigned long io_apic_irqs;
@@ -140,6 +133,7 @@ extern void (*__initconst interrupt[NR_VECTORS-FIRST_EXTERNAL_VECTOR])(void);
 
 typedef int vector_irq_t[NR_VECTORS];
 DECLARE_PER_CPU(vector_irq_t, vector_irq);
+extern void setup_vector_irq(int cpu);
 
 #ifdef CONFIG_X86_IO_APIC
 extern void lock_vector_lock(void);
diff --git a/arch/x86/include/asm/hyperv.h b/arch/x86/include/asm/hyperv.h
new file mode 100644
index 00000000000..e153a2b3889
--- /dev/null
+++ b/arch/x86/include/asm/hyperv.h
@@ -0,0 +1,186 @@
+#ifndef _ASM_X86_KVM_HYPERV_H
+#define _ASM_X86_KVM_HYPERV_H
+
+#include <linux/types.h>
+
+/*
+ * The below CPUID leaves are present if VersionAndFeatures.HypervisorPresent
+ * is set by CPUID(HvCpuIdFunctionVersionAndFeatures).
+ */
+#define HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS   0x40000000
+#define HYPERV_CPUID_INTERFACE                  0x40000001
+#define HYPERV_CPUID_VERSION                    0x40000002
+#define HYPERV_CPUID_FEATURES                   0x40000003
+#define HYPERV_CPUID_ENLIGHTMENT_INFO           0x40000004
+#define HYPERV_CPUID_IMPLEMENT_LIMITS           0x40000005
+
+/*
+ * Feature identification. EAX indicates which features are available
+ * to the partition based upon the current partition privileges.
+ */
+
+/* VP Runtime (HV_X64_MSR_VP_RUNTIME) available */
+#define HV_X64_MSR_VP_RUNTIME_AVAILABLE         (1 << 0)
+/* Partition Reference Counter (HV_X64_MSR_TIME_REF_COUNT) available*/
+#define HV_X64_MSR_TIME_REF_COUNT_AVAILABLE     (1 << 1)
+/*
+ * Basic SynIC MSRs (HV_X64_MSR_SCONTROL through HV_X64_MSR_EOM
+ * and HV_X64_MSR_SINT0 through HV_X64_MSR_SINT15) available
+ */
+#define HV_X64_MSR_SYNIC_AVAILABLE              (1 << 2)
+/*
+ * Synthetic Timer MSRs (HV_X64_MSR_STIMER0_CONFIG through
+ * HV_X64_MSR_STIMER3_COUNT) available
+ */
+#define HV_X64_MSR_SYNTIMER_AVAILABLE           (1 << 3)
+/*
+ * APIC access MSRs (HV_X64_MSR_EOI, HV_X64_MSR_ICR and HV_X64_MSR_TPR)
+ * are available
+ */
+#define HV_X64_MSR_APIC_ACCESS_AVAILABLE        (1 << 4)
+/* Hypercall MSRs (HV_X64_MSR_GUEST_OS_ID and HV_X64_MSR_HYPERCALL) available*/
+#define HV_X64_MSR_HYPERCALL_AVAILABLE          (1 << 5)
+/* Access virtual processor index MSR (HV_X64_MSR_VP_INDEX) available*/
+#define HV_X64_MSR_VP_INDEX_AVAILABLE           (1 << 6)
+/* Virtual system reset MSR (HV_X64_MSR_RESET) is available*/
+#define HV_X64_MSR_RESET_AVAILABLE              (1 << 7)
+ /*
+  * Access statistics pages MSRs (HV_X64_MSR_STATS_PARTITION_RETAIL_PAGE,
+  * HV_X64_MSR_STATS_PARTITION_INTERNAL_PAGE, HV_X64_MSR_STATS_VP_RETAIL_PAGE,
+  * HV_X64_MSR_STATS_VP_INTERNAL_PAGE) available
+  */
+#define HV_X64_MSR_STAT_PAGES_AVAILABLE         (1 << 8)
+
+/*
+ * Feature identification: EBX indicates which flags were specified at
+ * partition creation. The format is the same as the partition creation
+ * flag structure defined in section Partition Creation Flags.
+ */
+#define HV_X64_CREATE_PARTITIONS                (1 << 0)
+#define HV_X64_ACCESS_PARTITION_ID              (1 << 1)
+#define HV_X64_ACCESS_MEMORY_POOL               (1 << 2)
+#define HV_X64_ADJUST_MESSAGE_BUFFERS           (1 << 3)
+#define HV_X64_POST_MESSAGES                    (1 << 4)
+#define HV_X64_SIGNAL_EVENTS                    (1 << 5)
+#define HV_X64_CREATE_PORT                      (1 << 6)
+#define HV_X64_CONNECT_PORT                     (1 << 7)
+#define HV_X64_ACCESS_STATS                     (1 << 8)
+#define HV_X64_DEBUGGING                        (1 << 11)
+#define HV_X64_CPU_POWER_MANAGEMENT             (1 << 12)
+#define HV_X64_CONFIGURE_PROFILER               (1 << 13)
+
+/*
+ * Feature identification. EDX indicates which miscellaneous features
+ * are available to the partition.
+ */
+/* The MWAIT instruction is available (per section MONITOR / MWAIT) */
+#define HV_X64_MWAIT_AVAILABLE                          (1 << 0)
+/* Guest debugging support is available */
+#define HV_X64_GUEST_DEBUGGING_AVAILABLE                (1 << 1)
+/* Performance Monitor support is available*/
+#define HV_X64_PERF_MONITOR_AVAILABLE                   (1 << 2)
+/* Support for physical CPU dynamic partitioning events is available*/
+#define HV_X64_CPU_DYNAMIC_PARTITIONING_AVAILABLE       (1 << 3)
+/*
+ * Support for passing hypercall input parameter block via XMM
+ * registers is available
+ */
+#define HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE           (1 << 4)
+/* Support for a virtual guest idle state is available */
+#define HV_X64_GUEST_IDLE_STATE_AVAILABLE               (1 << 5)
+
+/*
+ * Implementation recommendations. Indicates which behaviors the hypervisor
+ * recommends the OS implement for optimal performance.
+ */
+ /*
+  * Recommend using hypercall for address space switches rather
+  * than MOV to CR3 instruction
+  */
+#define HV_X64_MWAIT_RECOMMENDED                (1 << 0)
+/* Recommend using hypercall for local TLB flushes rather
+ * than INVLPG or MOV to CR3 instructions */
+#define HV_X64_LOCAL_TLB_FLUSH_RECOMMENDED      (1 << 1)
+/*
+ * Recommend using hypercall for remote TLB flushes rather
+ * than inter-processor interrupts
+ */
+#define HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED     (1 << 2)
+/*
+ * Recommend using MSRs for accessing APIC registers
+ * EOI, ICR and TPR rather than their memory-mapped counterparts
+ */
+#define HV_X64_APIC_ACCESS_RECOMMENDED          (1 << 3)
+/* Recommend using the hypervisor-provided MSR to initiate a system RESET */
+#define HV_X64_SYSTEM_RESET_RECOMMENDED         (1 << 4)
+/*
+ * Recommend using relaxed timing for this partition. If used,
+ * the VM should disable any watchdog timeouts that rely on the
+ * timely delivery of external interrupts
+ */
+#define HV_X64_RELAXED_TIMING_RECOMMENDED       (1 << 5)
+
+/* MSR used to identify the guest OS. */
+#define HV_X64_MSR_GUEST_OS_ID                  0x40000000
+
+/* MSR used to setup pages used to communicate with the hypervisor. */
+#define HV_X64_MSR_HYPERCALL                    0x40000001
+
+/* MSR used to provide vcpu index */
+#define HV_X64_MSR_VP_INDEX                     0x40000002
+
+/* Define the virtual APIC registers */
+#define HV_X64_MSR_EOI                          0x40000070
+#define HV_X64_MSR_ICR                          0x40000071
+#define HV_X64_MSR_TPR                          0x40000072
+#define HV_X64_MSR_APIC_ASSIST_PAGE             0x40000073
+
+/* Define synthetic interrupt controller model specific registers. */
+#define HV_X64_MSR_SCONTROL                     0x40000080
+#define HV_X64_MSR_SVERSION                     0x40000081
+#define HV_X64_MSR_SIEFP                        0x40000082
+#define HV_X64_MSR_SIMP                         0x40000083
+#define HV_X64_MSR_EOM                          0x40000084
+#define HV_X64_MSR_SINT0                        0x40000090
+#define HV_X64_MSR_SINT1                        0x40000091
+#define HV_X64_MSR_SINT2                        0x40000092
+#define HV_X64_MSR_SINT3                        0x40000093
+#define HV_X64_MSR_SINT4                        0x40000094
+#define HV_X64_MSR_SINT5                        0x40000095
+#define HV_X64_MSR_SINT6                        0x40000096
+#define HV_X64_MSR_SINT7                        0x40000097
+#define HV_X64_MSR_SINT8                        0x40000098
+#define HV_X64_MSR_SINT9                        0x40000099
+#define HV_X64_MSR_SINT10                       0x4000009A
+#define HV_X64_MSR_SINT11                       0x4000009B
+#define HV_X64_MSR_SINT12                       0x4000009C
+#define HV_X64_MSR_SINT13                       0x4000009D
+#define HV_X64_MSR_SINT14                       0x4000009E
+#define HV_X64_MSR_SINT15                       0x4000009F
+
+
+#define HV_X64_MSR_HYPERCALL_ENABLE             0x00000001
+#define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT 12
+#define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_MASK  \
+                (~((1ull << HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT) - 1))
+
+/* Declare the various hypercall operations. */
+#define HV_X64_HV_NOTIFY_LONG_SPIN_WAIT         0x0008
+
+#define HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE              0x00000001
+#define HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT       12
+#define HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_MASK        \
+                (~((1ull << HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT) - 1))
+
+#define HV_PROCESSOR_POWER_STATE_C0             0
+#define HV_PROCESSOR_POWER_STATE_C1             1
+#define HV_PROCESSOR_POWER_STATE_C2             2
+#define HV_PROCESSOR_POWER_STATE_C3             3
+
+/* hypercall status code */
+#define HV_STATUS_SUCCESS                       0
+#define HV_STATUS_INVALID_HYPERCALL_CODE        2
+#define HV_STATUS_INVALID_HYPERCALL_INPUT       3
+#define HV_STATUS_INVALID_ALIGNMENT             4
+
+#endif
diff --git a/arch/x86/include/asm/i8259.h b/arch/x86/include/asm/i8259.h
index 7ec65b18085..1655147646a 100644
--- a/arch/x86/include/asm/i8259.h
+++ b/arch/x86/include/asm/i8259.h
@@ -26,11 +26,6 @@ extern unsigned int cached_irq_mask;
 
 extern raw_spinlock_t i8259A_lock;
 
-extern void init_8259A(int auto_eoi);
-extern void enable_8259A_irq(unsigned int irq);
-extern void disable_8259A_irq(unsigned int irq);
-extern unsigned int startup_8259A_irq(unsigned int irq);
-
 /* the PIC may need a careful delay on some platforms, hence specific calls */
 static inline unsigned char inb_pic(unsigned int port)
 {
@@ -57,7 +52,17 @@ static inline void outb_pic(unsigned char value, unsigned int port)
 
 extern struct irq_chip i8259A_chip;
 
-extern void mask_8259A(void);
-extern void unmask_8259A(void);
+struct legacy_pic {
+        int nr_legacy_irqs;
+        struct irq_chip *chip;
+        void (*mask_all)(void);
+        void (*restore_mask)(void);
+        void (*init)(int auto_eoi);
+        int (*irq_pending)(unsigned int irq);
+        void (*make_irq)(unsigned int irq);
+};
+
+extern struct legacy_pic *legacy_pic;
+extern struct legacy_pic null_legacy_pic;
 
 #endif /* _ASM_X86_I8259_H */
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 5f61f6e0ffd..35832a03a51 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -143,8 +143,6 @@ extern int noioapicreroute;
 /* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */
 extern int timer_through_8259;
 
-extern void io_apic_disable_legacy(void);
-
 /*
  * If we use the IO-APIC for IRQ routing, disable automatic
  * assignment of PCI IRQ's.
@@ -189,6 +187,7 @@ extern struct mp_ioapic_gsi  mp_gsi_routing[];
 int mp_find_ioapic(int gsi);
 int mp_find_ioapic_pin(int ioapic, int gsi);
 void __init mp_register_ioapic(int id, u32 address, u32 gsi_base);
+extern void __init pre_init_apic_IRQ0(void);
 
 #else  /* !CONFIG_X86_IO_APIC */
 
@@ -198,7 +197,11 @@ static const int timer_through_8259 = 0;
 static inline void ioapic_init_mappings(void)   { }
 static inline void ioapic_insert_resources(void) { }
 static inline void probe_nr_irqs_gsi(void)      { }
+static inline int mp_find_ioapic(int gsi) { return 0; }
 
+struct io_apic_irq_attr;
+static inline int io_apic_set_pci_routing(struct device *dev, int irq,
+                 struct io_apic_irq_attr *irq_attr) { return 0; }
 #endif
 
 #endif /* _ASM_X86_IO_APIC_H */
diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h
index 262292729fc..5458380b6ef 100644
--- a/arch/x86/include/asm/irq.h
+++ b/arch/x86/include/asm/irq.h
@@ -48,6 +48,5 @@ extern DECLARE_BITMAP(used_vectors, NR_VECTORS);
 extern int vector_used_by_percpu_irq(unsigned int vector);
 
 extern void init_ISA_irqs(void);
-extern int nr_legacy_irqs;
 
 #endif /* _ASM_X86_IRQ_H */
diff --git a/arch/x86/include/asm/kprobes.h b/arch/x86/include/asm/kprobes.h
index 4fe681de1e7..4ffa345a8cc 100644
--- a/arch/x86/include/asm/kprobes.h
+++ b/arch/x86/include/asm/kprobes.h
@@ -32,7 +32,10 @@ struct kprobe;
 
 typedef u8 kprobe_opcode_t;
 #define BREAKPOINT_INSTRUCTION  0xcc
-#define RELATIVEJUMP_INSTRUCTION 0xe9
+#define RELATIVEJUMP_OPCODE 0xe9
+#define RELATIVEJUMP_SIZE 5
+#define RELATIVECALL_OPCODE 0xe8
+#define RELATIVE_ADDR_SIZE 4
 #define MAX_INSN_SIZE 16
 #define MAX_STACK_SIZE 64
 #define MIN_STACK_SIZE(ADDR)                                           \
@@ -44,6 +47,17 @@ typedef u8 kprobe_opcode_t;
 
 #define flush_insn_slot(p)      do { } while (0)
 
+/* optinsn template addresses */
+extern kprobe_opcode_t optprobe_template_entry;
+extern kprobe_opcode_t optprobe_template_val;
+extern kprobe_opcode_t optprobe_template_call;
+extern kprobe_opcode_t optprobe_template_end;
+#define MAX_OPTIMIZED_LENGTH (MAX_INSN_SIZE + RELATIVE_ADDR_SIZE)
+#define MAX_OPTINSN_SIZE                                \
+        (((unsigned long)&optprobe_template_end -       \
+          (unsigned long)&optprobe_template_entry) +    \
+         MAX_OPTIMIZED_LENGTH + RELATIVEJUMP_SIZE)
+
 extern const int kretprobe_blacklist_size;
 
 void arch_remove_kprobe(struct kprobe *p);
@@ -64,6 +78,21 @@ struct arch_specific_insn {
         int boostable;
 };
 
+struct arch_optimized_insn {
+        /* copy of the original instructions */
+        kprobe_opcode_t copied_insn[RELATIVE_ADDR_SIZE];
+        /* detour code buffer */
+        kprobe_opcode_t *insn;
+        /* the size of instructions copied to detour code buffer */
+        size_t size;
+};
+
+/* Return true (!0) if optinsn is prepared for optimization. */
+static inline int arch_prepared_optinsn(struct arch_optimized_insn *optinsn)
+{
+        return optinsn->size;
+}
+
 struct prev_kprobe {
         struct kprobe *kp;
         unsigned long status;
diff --git a/arch/x86/include/asm/kvm_emulate.h b/arch/x86/include/asm/kvm_emulate.h
index 7c18e1230f5..7a6f54fa13b 100644
--- a/arch/x86/include/asm/kvm_emulate.h
+++ b/arch/x86/include/asm/kvm_emulate.h
@@ -54,13 +54,23 @@ struct x86_emulate_ctxt;
 struct x86_emulate_ops {
         /*
          * read_std: Read bytes of standard (non-emulated/special) memory.
-         *           Used for instruction fetch, stack operations, and others.
+         *           Used for descriptor reading.
          *  @addr:  [IN ] Linear address from which to read.
          *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
          *  @bytes: [IN ] Number of bytes to read from memory.
          */
         int (*read_std)(unsigned long addr, void *val,
-                        unsigned int bytes, struct kvm_vcpu *vcpu);
+                        unsigned int bytes, struct kvm_vcpu *vcpu, u32 *error);
+
+        /*
+         * fetch: Read bytes of standard (non-emulated/special) memory.
+         *        Used for instruction fetch.
+         *  @addr:  [IN ] Linear address from which to read.
+         *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
+         *  @bytes: [IN ] Number of bytes to read from memory.
+         */
+        int (*fetch)(unsigned long addr, void *val,
+                        unsigned int bytes, struct kvm_vcpu *vcpu, u32 *error);
 
         /*
          * read_emulated: Read bytes from emulated/special memory area.
@@ -74,7 +84,7 @@ struct x86_emulate_ops {
                              struct kvm_vcpu *vcpu);
 
         /*
-         * write_emulated: Read bytes from emulated/special memory area.
+         * write_emulated: Write bytes to emulated/special memory area.
          *  @addr:  [IN ] Linear address to which to write.
          *  @val:   [IN ] Value to write to memory (low-order bytes used as
          *                required).
@@ -168,6 +178,7 @@ struct x86_emulate_ctxt {
 
 /* Execution mode, passed to the emulator. */
 #define X86EMUL_MODE_REAL     0 /* Real mode.             */
+#define X86EMUL_MODE_VM86     1 /* Virtual 8086 mode.     */
 #define X86EMUL_MODE_PROT16   2 /* 16-bit protected mode. */
 #define X86EMUL_MODE_PROT32   4 /* 32-bit protected mode. */
 #define X86EMUL_MODE_PROT64   8 /* 64-bit (long) mode.    */
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 4f865e8b854..06d9e79ca37 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -25,7 +25,7 @@
 #include <asm/mtrr.h>
 #include <asm/msr-index.h>
 
-#define KVM_MAX_VCPUS 16
+#define KVM_MAX_VCPUS 64
 #define KVM_MEMORY_SLOTS 32
 /* memory slots that does not exposed to userspace */
 #define KVM_PRIVATE_MEM_SLOTS 4
@@ -38,19 +38,6 @@
 #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS |    \
                                   0xFFFFFF0000000000ULL)
 
-#define KVM_GUEST_CR0_MASK_UNRESTRICTED_GUEST                           \
-        (X86_CR0_WP | X86_CR0_NE | X86_CR0_NW | X86_CR0_CD)
-#define KVM_GUEST_CR0_MASK                                              \
-        (KVM_GUEST_CR0_MASK_UNRESTRICTED_GUEST | X86_CR0_PG | X86_CR0_PE)
-#define KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST                         \
-        (X86_CR0_WP | X86_CR0_NE | X86_CR0_TS | X86_CR0_MP)
-#define KVM_VM_CR0_ALWAYS_ON                                            \
-        (KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST | X86_CR0_PG | X86_CR0_PE)
-#define KVM_GUEST_CR4_MASK                                              \
-        (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE)
-#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
-#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)
-
 #define INVALID_PAGE (~(hpa_t)0)
 #define UNMAPPED_GVA (~(gpa_t)0)
 
@@ -256,7 +243,8 @@ struct kvm_mmu {
         void (*new_cr3)(struct kvm_vcpu *vcpu);
         int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
         void (*free)(struct kvm_vcpu *vcpu);
-        gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
+        gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
+                            u32 *error);
         void (*prefetch_page)(struct kvm_vcpu *vcpu,
                               struct kvm_mmu_page *page);
         int (*sync_page)(struct kvm_vcpu *vcpu,
@@ -282,13 +270,15 @@ struct kvm_vcpu_arch {
         u32 regs_dirty;
 
         unsigned long cr0;
+        unsigned long cr0_guest_owned_bits;
         unsigned long cr2;
         unsigned long cr3;
         unsigned long cr4;
+        unsigned long cr4_guest_owned_bits;
         unsigned long cr8;
         u32 hflags;
         u64 pdptrs[4]; /* pae */
-        u64 shadow_efer;
+        u64 efer;
         u64 apic_base;
         struct kvm_lapic *apic;    /* kernel irqchip context */
         int32_t apic_arb_prio;
@@ -374,17 +364,27 @@ struct kvm_vcpu_arch {
         /* used for guest single stepping over the given code position */
         u16 singlestep_cs;
         unsigned long singlestep_rip;
+        /* fields used by HYPER-V emulation */
+        u64 hv_vapic;
 };
 
 struct kvm_mem_alias {
         gfn_t base_gfn;
         unsigned long npages;
         gfn_t target_gfn;
+#define KVM_ALIAS_INVALID     1UL
+        unsigned long flags;
 };
 
-struct kvm_arch{
-        int naliases;
+#define KVM_ARCH_HAS_UNALIAS_INSTANTIATION
+
+struct kvm_mem_aliases {
         struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
+        int naliases;
+};
+
+struct kvm_arch {
+        struct kvm_mem_aliases *aliases;
 
         unsigned int n_free_mmu_pages;
         unsigned int n_requested_mmu_pages;
@@ -416,6 +416,10 @@ struct kvm_arch{
         s64 kvmclock_offset;
 
         struct kvm_xen_hvm_config xen_hvm_config;
+
+        /* fields used by HYPER-V emulation */
+        u64 hv_guest_os_id;
+        u64 hv_hypercall;
 };
 
 struct kvm_vm_stat {
@@ -471,6 +475,7 @@ struct kvm_x86_ops {
         int (*hardware_setup)(void);               /* __init */
         void (*hardware_unsetup)(void);            /* __exit */
         bool (*cpu_has_accelerated_tpr)(void);
+        void (*cpuid_update)(struct kvm_vcpu *vcpu);
 
         /* Create, but do not attach this VCPU */
         struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
@@ -492,6 +497,7 @@ struct kvm_x86_ops {
         void (*set_segment)(struct kvm_vcpu *vcpu,
                             struct kvm_segment *var, int seg);
         void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
+        void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
         void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
         void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
         void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
@@ -501,12 +507,13 @@ struct kvm_x86_ops {
         void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
         void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
         void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
-        unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
-        void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
-                       int *exception);
+        int (*get_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long *dest);
+        int (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value);
         void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
         unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
         void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
+        void (*fpu_activate)(struct kvm_vcpu *vcpu);
+        void (*fpu_deactivate)(struct kvm_vcpu *vcpu);
 
         void (*tlb_flush)(struct kvm_vcpu *vcpu);
 
@@ -531,7 +538,8 @@ struct kvm_x86_ops {
         int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
         int (*get_tdp_level)(void);
         u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
-        bool (*gb_page_enable)(void);
+        int (*get_lpage_level)(void);
+        bool (*rdtscp_supported)(void);
 
         const struct trace_print_flags *exit_reasons_str;
 };
@@ -606,8 +614,7 @@ int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
                     unsigned long value);
 
 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
-int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
-                                int type_bits, int seg);
+int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
 
 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason);
 
@@ -653,6 +660,10 @@ void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
 int kvm_mmu_load(struct kvm_vcpu *vcpu);
 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
+gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error);
+gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error);
+gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error);
+gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error);
 
 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
 
@@ -666,6 +677,7 @@ void kvm_disable_tdp(void);
 
 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
 int complete_pio(struct kvm_vcpu *vcpu);
+bool kvm_check_iopl(struct kvm_vcpu *vcpu);
 
 struct kvm_memory_slot *gfn_to_memslot_unaliased(struct kvm *kvm, gfn_t gfn);
 
diff --git a/arch/x86/include/asm/kvm_para.h b/arch/x86/include/asm/kvm_para.h
index c584076a47f..ffae1420e7d 100644
--- a/arch/x86/include/asm/kvm_para.h
+++ b/arch/x86/include/asm/kvm_para.h
@@ -2,6 +2,7 @@
 #define _ASM_X86_KVM_PARA_H
 
 #include <linux/types.h>
+#include <asm/hyperv.h>
 
 /* This CPUID returns the signature 'KVMKVMKVM' in ebx, ecx, and edx.  It
  * should be used to determine that a VM is running under KVM.
diff --git a/arch/x86/include/asm/lguest_hcall.h b/arch/x86/include/asm/lguest_hcall.h
index ba0eed8aa1a..b60f2924c41 100644
--- a/arch/x86/include/asm/lguest_hcall.h
+++ b/arch/x86/include/asm/lguest_hcall.h
@@ -28,22 +28,39 @@
 
 #ifndef __ASSEMBLY__
 #include <asm/hw_irq.h>
-#include <asm/kvm_para.h>
 
 /*G:030
  * But first, how does our Guest contact the Host to ask for privileged
  * operations?  There are two ways: the direct way is to make a "hypercall",
  * to make requests of the Host Itself.
  *
- * We use the KVM hypercall mechanism, though completely different hypercall
- * numbers. Seventeen hypercalls are available: the hypercall number is put in
- * the %eax register, and the arguments (when required) are placed in %ebx,
- * %ecx, %edx and %esi.  If a return value makes sense, it's returned in %eax.
+ * Our hypercall mechanism uses the highest unused trap code (traps 32 and
+ * above are used by real hardware interrupts).  Seventeen hypercalls are
+ * available: the hypercall number is put in the %eax register, and the
+ * arguments (when required) are placed in %ebx, %ecx, %edx and %esi.
+ * If a return value makes sense, it's returned in %eax.
  *
  * Grossly invalid calls result in Sudden Death at the hands of the vengeful
  * Host, rather than returning failure.  This reflects Winston Churchill's
  * definition of a gentleman: "someone who is only rude intentionally".
-:*/
+ */
+static inline unsigned long
+hcall(unsigned long call,
+      unsigned long arg1, unsigned long arg2, unsigned long arg3,
+      unsigned long arg4)
+{
+        /* "int" is the Intel instruction to trigger a trap. */
+        asm volatile("int $" __stringify(LGUEST_TRAP_ENTRY)
+                     /* The call in %eax (aka "a") might be overwritten */
+                     : "=a"(call)
+                       /* The arguments are in %eax, %ebx, %ecx, %edx & %esi */
+                     : "a"(call), "b"(arg1), "c"(arg2), "d"(arg3), "S"(arg4)
+                       /* "memory" means this might write somewhere in memory.
+                        * This isn't true for all calls, but it's safe to tell
+                        * gcc that it might happen so it doesn't get clever. */
+                     : "memory");
+        return call;
+}
 
 /* Can't use our min() macro here: needs to be a constant */
 #define LGUEST_IRQS (NR_IRQS < 32 ? NR_IRQS: 32)
diff --git a/arch/x86/include/asm/mrst.h b/arch/x86/include/asm/mrst.h
new file mode 100644
index 00000000000..451d30e7f62
--- /dev/null
+++ b/arch/x86/include/asm/mrst.h
@@ -0,0 +1,19 @@
+/*
+ * mrst.h: Intel Moorestown platform specific setup code
+ *
+ * (C) Copyright 2009 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2
+ * of the License.
+ */
+#ifndef _ASM_X86_MRST_H
+#define _ASM_X86_MRST_H
+extern int pci_mrst_init(void);
+int __init sfi_parse_mrtc(struct sfi_table_header *table);
+
+#define SFI_MTMR_MAX_NUM 8
+#define SFI_MRTC_MAX    8
+
+#endif /* _ASM_X86_MRST_H */
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 1cd58cdbc03..4604e6a54d3 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -105,6 +105,8 @@
 #define MSR_AMD64_PATCH_LEVEL           0x0000008b
 #define MSR_AMD64_NB_CFG                0xc001001f
 #define MSR_AMD64_PATCH_LOADER          0xc0010020
+#define MSR_AMD64_OSVW_ID_LENGTH        0xc0010140
+#define MSR_AMD64_OSVW_STATUS           0xc0010141
 #define MSR_AMD64_IBSFETCHCTL           0xc0011030
 #define MSR_AMD64_IBSFETCHLINAD         0xc0011031
 #define MSR_AMD64_IBSFETCHPHYSAD        0xc0011032
diff --git a/arch/x86/include/asm/numaq.h b/arch/x86/include/asm/numaq.h
index 13370b95ea9..37c516545ec 100644
--- a/arch/x86/include/asm/numaq.h
+++ b/arch/x86/include/asm/numaq.h
@@ -30,6 +30,7 @@
 
 extern int found_numaq;
 extern int get_memcfg_numaq(void);
+extern int pci_numaq_init(void);
 
 extern void *xquad_portio;
 
diff --git a/arch/x86/include/asm/olpc.h b/arch/x86/include/asm/olpc.h
index 3a57385d9fa..101229b0d8e 100644
--- a/arch/x86/include/asm/olpc.h
+++ b/arch/x86/include/asm/olpc.h
@@ -13,7 +13,6 @@ struct olpc_platform_t {
 
 #define OLPC_F_PRESENT          0x01
 #define OLPC_F_DCON             0x02
-#define OLPC_F_VSA              0x04
 
 #ifdef CONFIG_OLPC
 
@@ -51,18 +50,6 @@ static inline int olpc_has_dcon(void)
 }
 
 /*
- * The VSA is software from AMD that typical Geode bioses will include.
- * It is used to emulate the PCI bus, VGA, etc.  OLPC's Open Firmware does
- * not include the VSA; instead, PCI is emulated by the kernel.
- *
- * The VSA is described further in arch/x86/pci/olpc.c.
- */
-static inline int olpc_has_vsa(void)
-{
-        return (olpc_platform_info.flags & OLPC_F_VSA) ? 1 : 0;
-}
-
-/*
  * The "Mass Production" version of OLPC's XO is identified as being model
  * C2.  During the prototype phase, the following models (in chronological
  * order) were created: A1, B1, B2, B3, B4, C1.  The A1 through B2 models
@@ -87,13 +74,10 @@ static inline int olpc_has_dcon(void)
         return 0;
 }
 
-static inline int olpc_has_vsa(void)
-{
-        return 0;
-}
-
 #endif
 
+extern int pci_olpc_init(void);
+
 /* EC related functions */
 
 extern int olpc_ec_cmd(unsigned char cmd, unsigned char *inbuf, size_t inlen,
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index b4a00dd4eed..404a880ea32 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -45,8 +45,15 @@ static inline int pci_proc_domain(struct pci_bus *bus)
 
 #ifdef CONFIG_PCI
 extern unsigned int pcibios_assign_all_busses(void);
+extern int pci_legacy_init(void);
+# ifdef CONFIG_ACPI
+#  define x86_default_pci_init pci_acpi_init
+# else
+#  define x86_default_pci_init pci_legacy_init
+# endif
 #else
-#define pcibios_assign_all_busses()     0
+# define pcibios_assign_all_busses()    0
+# define x86_default_pci_init           NULL
 #endif
 
 extern unsigned long pci_mem_start;
@@ -90,34 +97,6 @@ extern void pci_iommu_alloc(void);
 
 #define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
 
-#if defined(CONFIG_X86_64) || defined(CONFIG_DMAR) || defined(CONFIG_DMA_API_DEBUG)
-
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       \
-                dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         \
-                __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME)                  \
-                ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)         \
-                (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME)                    \
-                ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)           \
-                (((PTR)->LEN_NAME) = (VAL))
-
-#else
-
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       dma_addr_t ADDR_NAME[0];
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) unsigned LEN_NAME[0];
-#define pci_unmap_addr(PTR, ADDR_NAME)  sizeof((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
-                do { break; } while (pci_unmap_addr(PTR, ADDR_NAME))
-#define pci_unmap_len(PTR, LEN_NAME)            sizeof((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
-                do { break; } while (pci_unmap_len(PTR, LEN_NAME))
-
-#endif
-
 #endif  /* __KERNEL__ */
 
 #ifdef CONFIG_X86_64
diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h
index 05b58ccb2e8..1a0422348d6 100644
--- a/arch/x86/include/asm/pci_x86.h
+++ b/arch/x86/include/asm/pci_x86.h
@@ -83,7 +83,6 @@ struct irq_routing_table {
 
 extern unsigned int pcibios_irq_mask;
 
-extern int pcibios_scanned;
 extern spinlock_t pci_config_lock;
 
 extern int (*pcibios_enable_irq)(struct pci_dev *dev);
@@ -106,16 +105,15 @@ extern bool port_cf9_safe;
 extern int pci_direct_probe(void);
 extern void pci_direct_init(int type);
 extern void pci_pcbios_init(void);
-extern int pci_olpc_init(void);
 extern void __init dmi_check_pciprobe(void);
 extern void __init dmi_check_skip_isa_align(void);
 
 /* some common used subsys_initcalls */
 extern int __init pci_acpi_init(void);
-extern int __init pcibios_irq_init(void);
-extern int __init pci_visws_init(void);
-extern int __init pci_numaq_init(void);
+extern void __init pcibios_irq_init(void);
 extern int __init pcibios_init(void);
+extern int pci_legacy_init(void);
+extern void pcibios_fixup_irqs(void);
 
 /* pci-mmconfig.c */
 
@@ -183,3 +181,17 @@ static inline void mmio_config_writel(void __iomem *pos, u32 val)
 {
         asm volatile("movl %%eax,(%1)" : : "a" (val), "r" (pos) : "memory");
 }
+
+#ifdef CONFIG_PCI
+# ifdef CONFIG_ACPI
+#  define x86_default_pci_init          pci_acpi_init
+# else
+#  define x86_default_pci_init          pci_legacy_init
+# endif
+# define x86_default_pci_init_irq       pcibios_irq_init
+# define x86_default_pci_fixup_irqs     pcibios_fixup_irqs
+#else
+# define x86_default_pci_init           NULL
+# define x86_default_pci_init_irq       NULL
+# define x86_default_pci_fixup_irqs     NULL
+#endif
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
index befd172c82a..db6109a885a 100644
--- a/arch/x86/include/asm/perf_event.h
+++ b/arch/x86/include/asm/perf_event.h
@@ -18,7 +18,7 @@
 #define MSR_ARCH_PERFMON_EVENTSEL0                           0x186
 #define MSR_ARCH_PERFMON_EVENTSEL1                           0x187
 
-#define ARCH_PERFMON_EVENTSEL0_ENABLE                     (1 << 22)
+#define ARCH_PERFMON_EVENTSEL_ENABLE                      (1 << 22)
 #define ARCH_PERFMON_EVENTSEL_ANY                         (1 << 21)
 #define ARCH_PERFMON_EVENTSEL_INT                         (1 << 20)
 #define ARCH_PERFMON_EVENTSEL_OS                          (1 << 17)
@@ -50,7 +50,7 @@
          INTEL_ARCH_INV_MASK| \
          INTEL_ARCH_EDGE_MASK|\
          INTEL_ARCH_UNIT_MASK|\
-         INTEL_ARCH_EVTSEL_MASK)
+         INTEL_ARCH_EVENT_MASK)
 
 #define ARCH_PERFMON_UNHALTED_CORE_CYCLES_SEL                 0x3c
 #define ARCH_PERFMON_UNHALTED_CORE_CYCLES_UMASK         (0x00 << 8)
@@ -117,6 +117,18 @@ union cpuid10_edx {
  */
 #define X86_PMC_IDX_FIXED_BTS                           (X86_PMC_IDX_FIXED + 16)
 
+/* IbsFetchCtl bits/masks */
+#define IBS_FETCH_RAND_EN               (1ULL<<57)
+#define IBS_FETCH_VAL                   (1ULL<<49)
+#define IBS_FETCH_ENABLE                (1ULL<<48)
+#define IBS_FETCH_CNT                   0xFFFF0000ULL
+#define IBS_FETCH_MAX_CNT               0x0000FFFFULL
+
+/* IbsOpCtl bits */
+#define IBS_OP_CNT_CTL                  (1ULL<<19)
+#define IBS_OP_VAL                      (1ULL<<18)
+#define IBS_OP_ENABLE                   (1ULL<<17)
+#define IBS_OP_MAX_CNT                  0x0000FFFFULL
 
 #ifdef CONFIG_PERF_EVENTS
 extern void init_hw_perf_events(void);
diff --git a/arch/x86/include/asm/pgtable_32.h b/arch/x86/include/asm/pgtable_32.h
index 47339a1ac7b..2984a25ff38 100644
--- a/arch/x86/include/asm/pgtable_32.h
+++ b/arch/x86/include/asm/pgtable_32.h
@@ -19,7 +19,6 @@
 #include <asm/paravirt.h>
 
 #include <linux/bitops.h>
-#include <linux/slab.h>
 #include <linux/list.h>
 #include <linux/spinlock.h>
 
diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h
index 20102808b19..69a686a7dff 100644
--- a/arch/x86/include/asm/ptrace.h
+++ b/arch/x86/include/asm/ptrace.h
@@ -274,14 +274,7 @@ static inline unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
                 return 0;
 }
 
-/*
- * These are defined as per linux/ptrace.h, which see.
- */
 #define arch_has_single_step()  (1)
-extern void user_enable_single_step(struct task_struct *);
-extern void user_disable_single_step(struct task_struct *);
-
-extern void user_enable_block_step(struct task_struct *);
 #ifdef CONFIG_X86_DEBUGCTLMSR
 #define arch_has_block_step()   (1)
 #else
diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h
index 18e496c98ff..86b1506f417 100644
--- a/arch/x86/include/asm/setup.h
+++ b/arch/x86/include/asm/setup.h
@@ -37,10 +37,8 @@ void setup_bios_corruption_check(void);
 
 #ifdef CONFIG_X86_VISWS
 extern void visws_early_detect(void);
-extern int is_visws_box(void);
 #else
 static inline void visws_early_detect(void) { }
-static inline int is_visws_box(void) { return 0; }
 #endif
 
 extern unsigned long saved_video_mode;
diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h
index 1fecb7e6113..38638cd2fa4 100644
--- a/arch/x86/include/asm/svm.h
+++ b/arch/x86/include/asm/svm.h
@@ -313,7 +313,7 @@ struct __attribute__ ((__packed__)) vmcb {
 
 #define SVM_EXIT_ERR            -1
 
-#define SVM_CR0_SELECTIVE_MASK (1 << 3 | 1) /* TS and MP */
+#define SVM_CR0_SELECTIVE_MASK (X86_CR0_TS | X86_CR0_MP)
 
 #define SVM_VMLOAD ".byte 0x0f, 0x01, 0xda"
 #define SVM_VMRUN  ".byte 0x0f, 0x01, 0xd8"
diff --git a/arch/x86/include/asm/sys_ia32.h b/arch/x86/include/asm/sys_ia32.h
index d5f69045c10..3ad421784ae 100644
--- a/arch/x86/include/asm/sys_ia32.h
+++ b/arch/x86/include/asm/sys_ia32.h
@@ -26,8 +26,8 @@ asmlinkage long sys32_lstat64(char __user *, struct stat64 __user *);
 asmlinkage long sys32_fstat64(unsigned int, struct stat64 __user *);
 asmlinkage long sys32_fstatat(unsigned int, char __user *,
                               struct stat64 __user *, int);
-struct mmap_arg_struct;
-asmlinkage long sys32_mmap(struct mmap_arg_struct __user *);
+struct mmap_arg_struct32;
+asmlinkage long sys32_mmap(struct mmap_arg_struct32 __user *);
 asmlinkage long sys32_mprotect(unsigned long, size_t, unsigned long);
 
 struct sigaction32;
@@ -40,8 +40,6 @@ asmlinkage long sys32_rt_sigprocmask(int, compat_sigset_t __user *,
                                      compat_sigset_t __user *, unsigned int);
 asmlinkage long sys32_alarm(unsigned int);
 
-struct sel_arg_struct;
-asmlinkage long sys32_old_select(struct sel_arg_struct __user *);
 asmlinkage long sys32_waitpid(compat_pid_t, unsigned int *, int);
 asmlinkage long sys32_sysfs(int, u32, u32);
 
@@ -56,11 +54,6 @@ asmlinkage long sys32_pwrite(unsigned int, char __user *, u32, u32, u32);
 asmlinkage long sys32_personality(unsigned long);
 asmlinkage long sys32_sendfile(int, int, compat_off_t __user *, s32);
 
-struct oldold_utsname;
-struct old_utsname;
-asmlinkage long sys32_olduname(struct oldold_utsname __user *);
-long sys32_uname(struct old_utsname __user *);
-
 asmlinkage long sys32_execve(char __user *, compat_uptr_t __user *,
                              compat_uptr_t __user *, struct pt_regs *);
 asmlinkage long sys32_clone(unsigned int, unsigned int, struct pt_regs *);
diff --git a/arch/x86/include/asm/syscalls.h b/arch/x86/include/asm/syscalls.h
index 8868b9420b0..5c044b43e9a 100644
--- a/arch/x86/include/asm/syscalls.h
+++ b/arch/x86/include/asm/syscalls.h
@@ -50,18 +50,6 @@ asmlinkage int sys_sigaction(int, const struct old_sigaction __user *,
                              struct old_sigaction __user *);
 unsigned long sys_sigreturn(struct pt_regs *);
 
-/* kernel/sys_i386_32.c */
-struct mmap_arg_struct;
-struct sel_arg_struct;
-struct oldold_utsname;
-struct old_utsname;
-
-asmlinkage int old_mmap(struct mmap_arg_struct __user *);
-asmlinkage int old_select(struct sel_arg_struct __user *);
-asmlinkage int sys_ipc(uint, int, int, int, void __user *, long);
-asmlinkage int sys_uname(struct old_utsname __user *);
-asmlinkage int sys_olduname(struct oldold_utsname __user *);
-
 /* kernel/vm86_32.c */
 int sys_vm86old(struct vm86_struct __user *, struct pt_regs *);
 int sys_vm86(unsigned long, unsigned long, struct pt_regs *);
@@ -73,11 +61,8 @@ int sys_vm86(unsigned long, unsigned long, struct pt_regs *);
 long sys_arch_prctl(int, unsigned long);
 
 /* kernel/sys_x86_64.c */
-struct new_utsname;
-
 asmlinkage long sys_mmap(unsigned long, unsigned long, unsigned long,
                          unsigned long, unsigned long, unsigned long);
-asmlinkage long sys_uname(struct new_utsname __user *);
 
 #endif /* CONFIG_X86_32 */
 #endif /* _ASM_X86_SYSCALLS_H */
diff --git a/arch/x86/include/asm/unistd_32.h b/arch/x86/include/asm/unistd_32.h
index 3baf379fa84..beb9b5f8f8a 100644
--- a/arch/x86/include/asm/unistd_32.h
+++ b/arch/x86/include/asm/unistd_32.h
@@ -354,6 +354,7 @@
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_ALARM
 #define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_IPC
 #define __ARCH_WANT_SYS_PAUSE
 #define __ARCH_WANT_SYS_SGETMASK
 #define __ARCH_WANT_SYS_SIGNAL
@@ -366,6 +367,9 @@
 #define __ARCH_WANT_SYS_LLSEEK
 #define __ARCH_WANT_SYS_NICE
 #define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_UNAME
+#define __ARCH_WANT_SYS_OLD_MMAP
+#define __ARCH_WANT_SYS_OLD_SELECT
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/x86/include/asm/unistd_64.h b/arch/x86/include/asm/unistd_64.h
index 4843f7ba754..ff4307b0e81 100644
--- a/arch/x86/include/asm/unistd_64.h
+++ b/arch/x86/include/asm/unistd_64.h
@@ -146,7 +146,7 @@ __SYSCALL(__NR_wait4, sys_wait4)
 #define __NR_kill                               62
 __SYSCALL(__NR_kill, sys_kill)
 #define __NR_uname                              63
-__SYSCALL(__NR_uname, sys_uname)
+__SYSCALL(__NR_uname, sys_newuname)
 
 #define __NR_semget                             64
 __SYSCALL(__NR_semget, sys_semget)
@@ -680,6 +680,7 @@ __SYSCALL(__NR_recvmmsg, sys_recvmmsg)
 #define __ARCH_WANT_SYS_LLSEEK
 #define __ARCH_WANT_SYS_NICE
 #define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLD_UNAME
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/x86/include/asm/visws/cobalt.h b/arch/x86/include/asm/visws/cobalt.h
index 166adf61e77..2edb37637ea 100644
--- a/arch/x86/include/asm/visws/cobalt.h
+++ b/arch/x86/include/asm/visws/cobalt.h
@@ -122,4 +122,6 @@ extern char visws_board_type;
 
 extern char visws_board_rev;
 
+extern int pci_visws_init(void);
+
 #endif /* _ASM_X86_VISWS_COBALT_H */
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
index 2b4945419a8..fb9a080740e 100644
--- a/arch/x86/include/asm/vmx.h
+++ b/arch/x86/include/asm/vmx.h
@@ -53,6 +53,7 @@
  */
 #define SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES 0x00000001
 #define SECONDARY_EXEC_ENABLE_EPT               0x00000002
+#define SECONDARY_EXEC_RDTSCP                   0x00000008
 #define SECONDARY_EXEC_ENABLE_VPID              0x00000020
 #define SECONDARY_EXEC_WBINVD_EXITING           0x00000040
 #define SECONDARY_EXEC_UNRESTRICTED_GUEST       0x00000080
@@ -251,6 +252,7 @@ enum vmcs_field {
 #define EXIT_REASON_MSR_READ            31
 #define EXIT_REASON_MSR_WRITE           32
 #define EXIT_REASON_MWAIT_INSTRUCTION   36
+#define EXIT_REASON_MONITOR_INSTRUCTION 39
 #define EXIT_REASON_PAUSE_INSTRUCTION   40
 #define EXIT_REASON_MCE_DURING_VMENTRY   41
 #define EXIT_REASON_TPR_BELOW_THRESHOLD 43
@@ -362,6 +364,7 @@ enum vmcs_field {
 #define VMX_EPTP_UC_BIT                         (1ull << 8)
 #define VMX_EPTP_WB_BIT                         (1ull << 14)
 #define VMX_EPT_2MB_PAGE_BIT                    (1ull << 16)
+#define VMX_EPT_1GB_PAGE_BIT                    (1ull << 17)
 #define VMX_EPT_EXTENT_INDIVIDUAL_BIT           (1ull << 24)
 #define VMX_EPT_EXTENT_CONTEXT_BIT              (1ull << 25)
 #define VMX_EPT_EXTENT_GLOBAL_BIT               (1ull << 26)
@@ -374,7 +377,7 @@ enum vmcs_field {
 #define VMX_EPT_READABLE_MASK                   0x1ull
 #define VMX_EPT_WRITABLE_MASK                   0x2ull
 #define VMX_EPT_EXECUTABLE_MASK                 0x4ull
-#define VMX_EPT_IGMT_BIT                        (1ull << 6)
+#define VMX_EPT_IPAT_BIT                        (1ull << 6)
 
 #define VMX_EPT_IDENTITY_PAGETABLE_ADDR         0xfffbc000ul
 
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index 60cc3526908..519b54327d7 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -99,6 +99,20 @@ struct x86_init_iommu {
 };
 
 /**
+ * struct x86_init_pci - platform specific pci init functions
+ * @arch_init:                  platform specific pci arch init call
+ * @init:                       platform specific pci subsystem init
+ * @init_irq:                   platform specific pci irq init
+ * @fixup_irqs:                 platform specific pci irq fixup
+ */
+struct x86_init_pci {
+        int (*arch_init)(void);
+        int (*init)(void);
+        void (*init_irq)(void);
+        void (*fixup_irqs)(void);
+};
+
+/**
  * struct x86_init_ops - functions for platform specific setup
  *
  */
@@ -110,6 +124,7 @@ struct x86_init_ops {
         struct x86_init_paging          paging;
         struct x86_init_timers          timers;
         struct x86_init_iommu           iommu;
+        struct x86_init_pci             pci;
 };
 
 /**
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index d87f09bc5a5..4c58352209e 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -87,6 +87,7 @@ obj-$(CONFIG_VM86)		+= vm86_32.o
 obj-$(CONFIG_EARLY_PRINTK)      += early_printk.o
 
 obj-$(CONFIG_HPET_TIMER)        += hpet.o
+obj-$(CONFIG_APB_TIMER)         += apb_timer.o
 
 obj-$(CONFIG_K8_NB)             += k8.o
 obj-$(CONFIG_DEBUG_RODATA_TEST) += test_rodata.o
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 738fcb60e70..cd40aba6aa9 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -31,10 +31,12 @@
 #include <linux/module.h>
 #include <linux/dmi.h>
 #include <linux/irq.h>
+#include <linux/slab.h>
 #include <linux/bootmem.h>
 #include <linux/ioport.h>
 #include <linux/pci.h>
 
+#include <asm/pci_x86.h>
 #include <asm/pgtable.h>
 #include <asm/io_apic.h>
 #include <asm/apic.h>
@@ -489,6 +491,7 @@ int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
  *  ACPI based hotplug support for CPU
  */
 #ifdef CONFIG_ACPI_HOTPLUG_CPU
+#include <acpi/processor.h>
 
 static void acpi_map_cpu2node(acpi_handle handle, int cpu, int physid)
 {
@@ -566,6 +569,8 @@ static int __cpuinit _acpi_map_lsapic(acpi_handle handle, int *pcpu)
                 goto free_new_map;
         }
 
+        acpi_processor_set_pdc(handle);
+
         cpu = cpumask_first(new_map);
         acpi_map_cpu2node(handle, cpu, physid);
 
@@ -1292,23 +1297,6 @@ static int __init dmi_disable_acpi(const struct dmi_system_id *d)
 }
 
 /*
- * Limit ACPI to CPU enumeration for HT
- */
-static int __init force_acpi_ht(const struct dmi_system_id *d)
-{
-        if (!acpi_force) {
-                printk(KERN_NOTICE "%s detected: force use of acpi=ht\n",
-                       d->ident);
-                disable_acpi();
-                acpi_ht = 1;
-        } else {
-                printk(KERN_NOTICE
-                       "Warning: acpi=force overrules DMI blacklist: acpi=ht\n");
-        }
-        return 0;
-}
-
-/*
  * Force ignoring BIOS IRQ0 pin2 override
  */
 static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d)
@@ -1344,82 +1332,6 @@ static struct dmi_system_id __initdata acpi_dmi_table[] = {
          },
 
         /*
-         * Boxes that need acpi=ht
-         */
-        {
-         .callback = force_acpi_ht,
-         .ident = "FSC Primergy T850",
-         .matches = {
-                     DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
-                     DMI_MATCH(DMI_PRODUCT_NAME, "PRIMERGY T850"),
-                     },
-         },
-        {
-         .callback = force_acpi_ht,
-         .ident = "HP VISUALIZE NT Workstation",
-         .matches = {
-                     DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
-                     DMI_MATCH(DMI_PRODUCT_NAME, "HP VISUALIZE NT Workstation"),
-                     },
-         },
-        {
-         .callback = force_acpi_ht,
-         .ident = "Compaq Workstation W8000",
-         .matches = {
-                     DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
-                     DMI_MATCH(DMI_PRODUCT_NAME, "Workstation W8000"),
-                     },
-         },
-        {
-         .callback = force_acpi_ht,
-         .ident = "ASUS CUR-DLS",
-         .matches = {
-                     DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
-                     DMI_MATCH(DMI_BOARD_NAME, "CUR-DLS"),
-                     },
-         },
-        {
-         .callback = force_acpi_ht,
-         .ident = "ABIT i440BX-W83977",
-         .matches = {
-                     DMI_MATCH(DMI_BOARD_VENDOR, "ABIT <http://www.abit.com>"),
-                     DMI_MATCH(DMI_BOARD_NAME, "i440BX-W83977 (BP6)"),
-                     },
-         },
-        {
-         .callback = force_acpi_ht,
-         .ident = "IBM Bladecenter",
-         .matches = {
-                     DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
-                     DMI_MATCH(DMI_BOARD_NAME, "IBM eServer BladeCenter HS20"),
-                     },
-         },
-        {
-         .callback = force_acpi_ht,
-         .ident = "IBM eServer xSeries 360",
-         .matches = {
-                     DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
-                     DMI_MATCH(DMI_BOARD_NAME, "eServer xSeries 360"),
-                     },
-         },
-        {
-         .callback = force_acpi_ht,
-         .ident = "IBM eserver xSeries 330",
-         .matches = {
-                     DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
-                     DMI_MATCH(DMI_BOARD_NAME, "eserver xSeries 330"),
-                     },
-         },
-        {
-         .callback = force_acpi_ht,
-         .ident = "IBM eserver xSeries 440",
-         .matches = {
-                     DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
-                     DMI_MATCH(DMI_PRODUCT_NAME, "eserver xSeries 440"),
-                     },
-         },
-
-        /*
          * Boxes that need ACPI PCI IRQ routing disabled
          */
         {
@@ -1624,6 +1536,9 @@ int __init acpi_boot_init(void)
 
         acpi_table_parse(ACPI_SIG_HPET, acpi_parse_hpet);
 
+        if (!acpi_noirq)
+                x86_init.pci.init = pci_acpi_init;
+
         return 0;
 }
 
@@ -1648,8 +1563,10 @@ static int __init parse_acpi(char *arg)
         }
         /* Limit ACPI just to boot-time to enable HT */
         else if (strcmp(arg, "ht") == 0) {
-                if (!acpi_force)
+                if (!acpi_force) {
+                        printk(KERN_WARNING "acpi=ht will be removed in Linux-2.6.35\n");
                         disable_acpi();
+                }
                 acpi_ht = 1;
         }
         /* acpi=rsdt use RSDT instead of XSDT */
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index e6ea0342c8f..1a160d5d44d 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -7,6 +7,8 @@
 #include <linux/mm.h>
 #include <linux/vmalloc.h>
 #include <linux/memory.h>
+#include <linux/stop_machine.h>
+#include <linux/slab.h>
 #include <asm/alternative.h>
 #include <asm/sections.h>
 #include <asm/pgtable.h>
@@ -572,3 +574,62 @@ void *__kprobes text_poke(void *addr, const void *opcode, size_t len)
         local_irq_restore(flags);
         return addr;
 }
+
+/*
+ * Cross-modifying kernel text with stop_machine().
+ * This code originally comes from immediate value.
+ */
+static atomic_t stop_machine_first;
+static int wrote_text;
+
+struct text_poke_params {
+        void *addr;
+        const void *opcode;
+        size_t len;
+};
+
+static int __kprobes stop_machine_text_poke(void *data)
+{
+        struct text_poke_params *tpp = data;
+
+        if (atomic_dec_and_test(&stop_machine_first)) {
+                text_poke(tpp->addr, tpp->opcode, tpp->len);
+                smp_wmb();      /* Make sure other cpus see that this has run */
+                wrote_text = 1;
+        } else {
+                while (!wrote_text)
+                        cpu_relax();
+                smp_mb();       /* Load wrote_text before following execution */
+        }
+
+        flush_icache_range((unsigned long)tpp->addr,
+                           (unsigned long)tpp->addr + tpp->len);
+        return 0;
+}
+
+/**
+ * text_poke_smp - Update instructions on a live kernel on SMP
+ * @addr: address to modify
+ * @opcode: source of the copy
+ * @len: length to copy
+ *
+ * Modify multi-byte instruction by using stop_machine() on SMP. This allows
+ * user to poke/set multi-byte text on SMP. Only non-NMI/MCE code modifying
+ * should be allowed, since stop_machine() does _not_ protect code against
+ * NMI and MCE.
+ *
+ * Note: Must be called under get_online_cpus() and text_mutex.
+ */
+void *__kprobes text_poke_smp(void *addr, const void *opcode, size_t len)
+{
+        struct text_poke_params tpp;
+
+        tpp.addr = addr;
+        tpp.opcode = opcode;
+        tpp.len = len;
+        atomic_set(&stop_machine_first, 1);
+        wrote_text = 0;
+        stop_machine(stop_machine_text_poke, (void *)&tpp, NULL);
+        return addr;
+}
+
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index adb0ba02570..f854d89b7ed 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -18,8 +18,8 @@
  */
 
 #include <linux/pci.h>
-#include <linux/gfp.h>
 #include <linux/bitmap.h>
+#include <linux/slab.h>
 #include <linux/debugfs.h>
 #include <linux/scatterlist.h>
 #include <linux/dma-mapping.h>
@@ -118,7 +118,7 @@ static bool check_device(struct device *dev)
                 return false;
 
         /* No device or no PCI device */
-        if (!dev || dev->bus != &pci_bus_type)
+        if (dev->bus != &pci_bus_type)
                 return false;
 
         devid = get_device_id(dev);
@@ -392,6 +392,7 @@ static int __iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd)
         u32 tail, head;
         u8 *target;
 
+        WARN_ON(iommu->cmd_buf_size & CMD_BUFFER_UNINITIALIZED);
         tail = readl(iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
         target = iommu->cmd_buf + tail;
         memcpy_toio(target, cmd, sizeof(*cmd));
@@ -2186,7 +2187,7 @@ static void prealloc_protection_domains(void)
         struct dma_ops_domain *dma_dom;
         u16 devid;
 
-        while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
+        for_each_pci_dev(dev) {
 
                 /* Do we handle this device? */
                 if (!check_device(&dev->dev))
@@ -2298,7 +2299,7 @@ static void cleanup_domain(struct protection_domain *domain)
         list_for_each_entry_safe(dev_data, next, &domain->dev_list, list) {
                 struct device *dev = dev_data->dev;
 
-                do_detach(dev);
+                __detach_device(dev);
                 atomic_set(&dev_data->bind, 0);
         }
 
@@ -2327,6 +2328,7 @@ static struct protection_domain *protection_domain_alloc(void)
                 return NULL;
 
         spin_lock_init(&domain->lock);
+        mutex_init(&domain->api_lock);
         domain->id = domain_id_alloc();
         if (!domain->id)
                 goto out_err;
@@ -2379,9 +2381,7 @@ static void amd_iommu_domain_destroy(struct iommu_domain *dom)
 
         free_pagetable(domain);
 
-        domain_id_free(domain->id);
-
-        kfree(domain);
+        protection_domain_free(domain);
 
         dom->priv = NULL;
 }
@@ -2456,6 +2456,8 @@ static int amd_iommu_map_range(struct iommu_domain *dom,
         iova  &= PAGE_MASK;
         paddr &= PAGE_MASK;
 
+        mutex_lock(&domain->api_lock);
+
         for (i = 0; i < npages; ++i) {
                 ret = iommu_map_page(domain, iova, paddr, prot, PM_MAP_4k);
                 if (ret)
@@ -2465,6 +2467,8 @@ static int amd_iommu_map_range(struct iommu_domain *dom,
                 paddr += PAGE_SIZE;
         }
 
+        mutex_unlock(&domain->api_lock);
+
         return 0;
 }
 
@@ -2477,12 +2481,16 @@ static void amd_iommu_unmap_range(struct iommu_domain *dom,
 
         iova  &= PAGE_MASK;
 
+        mutex_lock(&domain->api_lock);
+
         for (i = 0; i < npages; ++i) {
                 iommu_unmap_page(domain, iova, PM_MAP_4k);
                 iova  += PAGE_SIZE;
         }
 
         iommu_flush_tlb_pde(domain);
+
+        mutex_unlock(&domain->api_lock);
 }
 
 static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom,
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
index 9dc91b43147..6360abf993d 100644
--- a/arch/x86/kernel/amd_iommu_init.c
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -19,8 +19,8 @@
 
 #include <linux/pci.h>
 #include <linux/acpi.h>
-#include <linux/gfp.h>
 #include <linux/list.h>
+#include <linux/slab.h>
 #include <linux/sysdev.h>
 #include <linux/interrupt.h>
 #include <linux/msi.h>
@@ -138,9 +138,9 @@ int amd_iommus_present;
 bool amd_iommu_np_cache __read_mostly;
 
 /*
- * Set to true if ACPI table parsing and hardware intialization went properly
+ * The ACPI table parsing functions set this variable on an error
  */
-static bool amd_iommu_initialized;
+static int __initdata amd_iommu_init_err;
 
 /*
  * List of protection domains - used during resume
@@ -391,9 +391,11 @@ static int __init find_last_devid_acpi(struct acpi_table_header *table)
          */
         for (i = 0; i < table->length; ++i)
                 checksum += p[i];
-        if (checksum != 0)
+        if (checksum != 0) {
                 /* ACPI table corrupt */
-                return -ENODEV;
+                amd_iommu_init_err = -ENODEV;
+                return 0;
+        }
 
         p += IVRS_HEADER_LENGTH;
 
@@ -436,7 +438,7 @@ static u8 * __init alloc_command_buffer(struct amd_iommu *iommu)
         if (cmd_buf == NULL)
                 return NULL;
 
-        iommu->cmd_buf_size = CMD_BUFFER_SIZE;
+        iommu->cmd_buf_size = CMD_BUFFER_SIZE | CMD_BUFFER_UNINITIALIZED;
 
         return cmd_buf;
 }
@@ -472,12 +474,13 @@ static void iommu_enable_command_buffer(struct amd_iommu *iommu)
                     &entry, sizeof(entry));
 
         amd_iommu_reset_cmd_buffer(iommu);
+        iommu->cmd_buf_size &= ~(CMD_BUFFER_UNINITIALIZED);
 }
 
 static void __init free_command_buffer(struct amd_iommu *iommu)
 {
         free_pages((unsigned long)iommu->cmd_buf,
-                   get_order(iommu->cmd_buf_size));
+                   get_order(iommu->cmd_buf_size & ~(CMD_BUFFER_UNINITIALIZED)));
 }
 
 /* allocates the memory where the IOMMU will log its events to */
@@ -920,11 +923,16 @@ static int __init init_iommu_all(struct acpi_table_header *table)
                                     h->mmio_phys);
 
                         iommu = kzalloc(sizeof(struct amd_iommu), GFP_KERNEL);
-                        if (iommu == NULL)
-                                return -ENOMEM;
+                        if (iommu == NULL) {
+                                amd_iommu_init_err = -ENOMEM;
+                                return 0;
+                        }
+
                         ret = init_iommu_one(iommu, h);
-                        if (ret)
-                                return ret;
+                        if (ret) {
+                                amd_iommu_init_err = ret;
+                                return 0;
+                        }
                         break;
                 default:
                         break;
@@ -934,8 +942,6 @@ static int __init init_iommu_all(struct acpi_table_header *table)
         }
         WARN_ON(p != end);
 
-        amd_iommu_initialized = true;
-
         return 0;
 }
 
@@ -1211,6 +1217,10 @@ static int __init amd_iommu_init(void)
         if (acpi_table_parse("IVRS", find_last_devid_acpi) != 0)
                 return -ENODEV;
 
+        ret = amd_iommu_init_err;
+        if (ret)
+                goto out;
+
         dev_table_size     = tbl_size(DEV_TABLE_ENTRY_SIZE);
         alias_table_size   = tbl_size(ALIAS_TABLE_ENTRY_SIZE);
         rlookup_table_size = tbl_size(RLOOKUP_TABLE_ENTRY_SIZE);
@@ -1270,12 +1280,19 @@ static int __init amd_iommu_init(void)
         if (acpi_table_parse("IVRS", init_iommu_all) != 0)
                 goto free;
 
-        if (!amd_iommu_initialized)
+        if (amd_iommu_init_err) {
+                ret = amd_iommu_init_err;
                 goto free;
+        }
 
         if (acpi_table_parse("IVRS", init_memory_definitions) != 0)
                 goto free;
 
+        if (amd_iommu_init_err) {
+                ret = amd_iommu_init_err;
+                goto free;
+        }
+
         ret = sysdev_class_register(&amd_iommu_sysdev_class);
         if (ret)
                 goto free;
@@ -1288,6 +1305,8 @@ static int __init amd_iommu_init(void)
         if (ret)
                 goto free;
 
+        enable_iommus();
+
         if (iommu_pass_through)
                 ret = amd_iommu_init_passthrough();
         else
@@ -1300,8 +1319,6 @@ static int __init amd_iommu_init(void)
 
         amd_iommu_init_notifier();
 
-        enable_iommus();
-
         if (iommu_pass_through)
                 goto out;
 
@@ -1315,6 +1332,7 @@ out:
         return ret;
 
 free:
+        disable_iommus();
 
         amd_iommu_uninit_devices();
 
diff --git a/arch/x86/kernel/apb_timer.c b/arch/x86/kernel/apb_timer.c
new file mode 100644
index 00000000000..a35347501d3
--- /dev/null
+++ b/arch/x86/kernel/apb_timer.c
@@ -0,0 +1,785 @@
+/*
+ * apb_timer.c: Driver for Langwell APB timers
+ *
+ * (C) Copyright 2009 Intel Corporation
+ * Author: Jacob Pan (jacob.jun.pan@intel.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2
+ * of the License.
+ *
+ * Note:
+ * Langwell is the south complex of Intel Moorestown MID platform. There are
+ * eight external timers in total that can be used by the operating system.
+ * The timer information, such as frequency and addresses, is provided to the
+ * OS via SFI tables.
+ * Timer interrupts are routed via FW/HW emulated IOAPIC independently via
+ * individual redirection table entries (RTE).
+ * Unlike HPET, there is no master counter, therefore one of the timers are
+ * used as clocksource. The overall allocation looks like:
+ *  - timer 0 - NR_CPUs for per cpu timer
+ *  - one timer for clocksource
+ *  - one timer for watchdog driver.
+ * It is also worth notice that APB timer does not support true one-shot mode,
+ * free-running mode will be used here to emulate one-shot mode.
+ * APB timer can also be used as broadcast timer along with per cpu local APIC
+ * timer, but by default APB timer has higher rating than local APIC timers.
+ */
+
+#include <linux/clocksource.h>
+#include <linux/clockchips.h>
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/sysdev.h>
+#include <linux/slab.h>
+#include <linux/pm.h>
+#include <linux/pci.h>
+#include <linux/sfi.h>
+#include <linux/interrupt.h>
+#include <linux/cpu.h>
+#include <linux/irq.h>
+
+#include <asm/fixmap.h>
+#include <asm/apb_timer.h>
+
+#define APBT_MASK                       CLOCKSOURCE_MASK(32)
+#define APBT_SHIFT                      22
+#define APBT_CLOCKEVENT_RATING          150
+#define APBT_CLOCKSOURCE_RATING         250
+#define APBT_MIN_DELTA_USEC             200
+
+#define EVT_TO_APBT_DEV(evt) container_of(evt, struct apbt_dev, evt)
+#define APBT_CLOCKEVENT0_NUM   (0)
+#define APBT_CLOCKEVENT1_NUM   (1)
+#define APBT_CLOCKSOURCE_NUM   (2)
+
+static unsigned long apbt_address;
+static int apb_timer_block_enabled;
+static void __iomem *apbt_virt_address;
+static int phy_cs_timer_id;
+
+/*
+ * Common DW APB timer info
+ */
+static uint64_t apbt_freq;
+
+static void apbt_set_mode(enum clock_event_mode mode,
+                          struct clock_event_device *evt);
+static int apbt_next_event(unsigned long delta,
+                           struct clock_event_device *evt);
+static cycle_t apbt_read_clocksource(struct clocksource *cs);
+static void apbt_restart_clocksource(struct clocksource *cs);
+
+struct apbt_dev {
+        struct clock_event_device evt;
+        unsigned int num;
+        int cpu;
+        unsigned int irq;
+        unsigned int tick;
+        unsigned int count;
+        unsigned int flags;
+        char name[10];
+};
+
+int disable_apbt_percpu __cpuinitdata;
+
+static DEFINE_PER_CPU(struct apbt_dev, cpu_apbt_dev);
+
+#ifdef CONFIG_SMP
+static unsigned int apbt_num_timers_used;
+static struct apbt_dev *apbt_devs;
+#endif
+
+static  inline unsigned long apbt_readl_reg(unsigned long a)
+{
+        return readl(apbt_virt_address + a);
+}
+
+static inline void apbt_writel_reg(unsigned long d, unsigned long a)
+{
+        writel(d, apbt_virt_address + a);
+}
+
+static inline unsigned long apbt_readl(int n, unsigned long a)
+{
+        return readl(apbt_virt_address + a + n * APBTMRS_REG_SIZE);
+}
+
+static inline void apbt_writel(int n, unsigned long d, unsigned long a)
+{
+        writel(d, apbt_virt_address + a + n * APBTMRS_REG_SIZE);
+}
+
+static inline void apbt_set_mapping(void)
+{
+        struct sfi_timer_table_entry *mtmr;
+
+        if (apbt_virt_address) {
+                pr_debug("APBT base already mapped\n");
+                return;
+        }
+        mtmr = sfi_get_mtmr(APBT_CLOCKEVENT0_NUM);
+        if (mtmr == NULL) {
+                printk(KERN_ERR "Failed to get MTMR %d from SFI\n",
+                       APBT_CLOCKEVENT0_NUM);
+                return;
+        }
+        apbt_address = (unsigned long)mtmr->phys_addr;
+        if (!apbt_address) {
+                printk(KERN_WARNING "No timer base from SFI, use default\n");
+                apbt_address = APBT_DEFAULT_BASE;
+        }
+        apbt_virt_address = ioremap_nocache(apbt_address, APBT_MMAP_SIZE);
+        if (apbt_virt_address) {
+                pr_debug("Mapped APBT physical addr %p at virtual addr %p\n",\
+                         (void *)apbt_address, (void *)apbt_virt_address);
+        } else {
+                pr_debug("Failed mapping APBT phy address at %p\n",\
+                         (void *)apbt_address);
+                goto panic_noapbt;
+        }
+        apbt_freq = mtmr->freq_hz / USEC_PER_SEC;
+        sfi_free_mtmr(mtmr);
+
+        /* Now figure out the physical timer id for clocksource device */
+        mtmr = sfi_get_mtmr(APBT_CLOCKSOURCE_NUM);
+        if (mtmr == NULL)
+                goto panic_noapbt;
+
+        /* Now figure out the physical timer id */
+        phy_cs_timer_id = (unsigned int)(mtmr->phys_addr & 0xff)
+                / APBTMRS_REG_SIZE;
+        pr_debug("Use timer %d for clocksource\n", phy_cs_timer_id);
+        return;
+
+panic_noapbt:
+        panic("Failed to setup APB system timer\n");
+
+}
+
+static inline void apbt_clear_mapping(void)
+{
+        iounmap(apbt_virt_address);
+        apbt_virt_address = NULL;
+}
+
+/*
+ * APBT timer interrupt enable / disable
+ */
+static inline int is_apbt_capable(void)
+{
+        return apbt_virt_address ? 1 : 0;
+}
+
+static struct clocksource clocksource_apbt = {
+        .name           = "apbt",
+        .rating         = APBT_CLOCKSOURCE_RATING,
+        .read           = apbt_read_clocksource,
+        .mask           = APBT_MASK,
+        .shift          = APBT_SHIFT,
+        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
+        .resume         = apbt_restart_clocksource,
+};
+
+/* boot APB clock event device */
+static struct clock_event_device apbt_clockevent = {
+        .name           = "apbt0",
+        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
+        .set_mode       = apbt_set_mode,
+        .set_next_event = apbt_next_event,
+        .shift          = APBT_SHIFT,
+        .irq            = 0,
+        .rating         = APBT_CLOCKEVENT_RATING,
+};
+
+/*
+ * if user does not want to use per CPU apb timer, just give it a lower rating
+ * than local apic timer and skip the late per cpu timer init.
+ */
+static inline int __init setup_x86_mrst_timer(char *arg)
+{
+        if (!arg)
+                return -EINVAL;
+
+        if (strcmp("apbt_only", arg) == 0)
+                disable_apbt_percpu = 0;
+        else if (strcmp("lapic_and_apbt", arg) == 0)
+                disable_apbt_percpu = 1;
+        else {
+                pr_warning("X86 MRST timer option %s not recognised"
+                           " use x86_mrst_timer=apbt_only or lapic_and_apbt\n",
+                           arg);
+                return -EINVAL;
+        }
+        return 0;
+}
+__setup("x86_mrst_timer=", setup_x86_mrst_timer);
+
+/*
+ * start count down from 0xffff_ffff. this is done by toggling the enable bit
+ * then load initial load count to ~0.
+ */
+static void apbt_start_counter(int n)
+{
+        unsigned long ctrl = apbt_readl(n, APBTMR_N_CONTROL);
+
+        ctrl &= ~APBTMR_CONTROL_ENABLE;
+        apbt_writel(n, ctrl, APBTMR_N_CONTROL);
+        apbt_writel(n, ~0, APBTMR_N_LOAD_COUNT);
+        /* enable, mask interrupt */
+        ctrl &= ~APBTMR_CONTROL_MODE_PERIODIC;
+        ctrl |= (APBTMR_CONTROL_ENABLE | APBTMR_CONTROL_INT);
+        apbt_writel(n, ctrl, APBTMR_N_CONTROL);
+        /* read it once to get cached counter value initialized */
+        apbt_read_clocksource(&clocksource_apbt);
+}
+
+static irqreturn_t apbt_interrupt_handler(int irq, void *data)
+{
+        struct apbt_dev *dev = (struct apbt_dev *)data;
+        struct clock_event_device *aevt = &dev->evt;
+
+        if (!aevt->event_handler) {
+                printk(KERN_INFO "Spurious APBT timer interrupt on %d\n",
+                       dev->num);
+                return IRQ_NONE;
+        }
+        aevt->event_handler(aevt);
+        return IRQ_HANDLED;
+}
+
+static void apbt_restart_clocksource(struct clocksource *cs)
+{
+        apbt_start_counter(phy_cs_timer_id);
+}
+
+/* Setup IRQ routing via IOAPIC */
+#ifdef CONFIG_SMP
+static void apbt_setup_irq(struct apbt_dev *adev)
+{
+        struct irq_chip *chip;
+        struct irq_desc *desc;
+
+        /* timer0 irq has been setup early */
+        if (adev->irq == 0)
+                return;
+        desc = irq_to_desc(adev->irq);
+        chip = get_irq_chip(adev->irq);
+        disable_irq(adev->irq);
+        desc->status |= IRQ_MOVE_PCNTXT;
+        irq_set_affinity(adev->irq, cpumask_of(adev->cpu));
+        /* APB timer irqs are set up as mp_irqs, timer is edge triggerred */
+        set_irq_chip_and_handler_name(adev->irq, chip, handle_edge_irq, "edge");
+        enable_irq(adev->irq);
+        if (system_state == SYSTEM_BOOTING)
+                if (request_irq(adev->irq, apbt_interrupt_handler,
+                                IRQF_TIMER | IRQF_DISABLED | IRQF_NOBALANCING,
+                                adev->name, adev)) {
+                        printk(KERN_ERR "Failed request IRQ for APBT%d\n",
+                               adev->num);
+                }
+}
+#endif
+
+static void apbt_enable_int(int n)
+{
+        unsigned long ctrl = apbt_readl(n, APBTMR_N_CONTROL);
+        /* clear pending intr */
+        apbt_readl(n, APBTMR_N_EOI);
+        ctrl &= ~APBTMR_CONTROL_INT;
+        apbt_writel(n, ctrl, APBTMR_N_CONTROL);
+}
+
+static void apbt_disable_int(int n)
+{
+        unsigned long ctrl = apbt_readl(n, APBTMR_N_CONTROL);
+
+        ctrl |= APBTMR_CONTROL_INT;
+        apbt_writel(n, ctrl, APBTMR_N_CONTROL);
+}
+
+
+static int __init apbt_clockevent_register(void)
+{
+        struct sfi_timer_table_entry *mtmr;
+        struct apbt_dev *adev = &__get_cpu_var(cpu_apbt_dev);
+
+        mtmr = sfi_get_mtmr(APBT_CLOCKEVENT0_NUM);
+        if (mtmr == NULL) {
+                printk(KERN_ERR "Failed to get MTMR %d from SFI\n",
+                       APBT_CLOCKEVENT0_NUM);
+                return -ENODEV;
+        }
+
+        /*
+         * We need to calculate the scaled math multiplication factor for
+         * nanosecond to apbt tick conversion.
+         * mult = (nsec/cycle)*2^APBT_SHIFT
+         */
+        apbt_clockevent.mult = div_sc((unsigned long) mtmr->freq_hz
+                                      , NSEC_PER_SEC, APBT_SHIFT);
+
+        /* Calculate the min / max delta */
+        apbt_clockevent.max_delta_ns = clockevent_delta2ns(0x7FFFFFFF,
+                                                           &apbt_clockevent);
+        apbt_clockevent.min_delta_ns = clockevent_delta2ns(
+                APBT_MIN_DELTA_USEC*apbt_freq,
+                &apbt_clockevent);
+        /*
+         * Start apbt with the boot cpu mask and make it
+         * global if not used for per cpu timer.
+         */
+        apbt_clockevent.cpumask = cpumask_of(smp_processor_id());
+        adev->num = smp_processor_id();
+        memcpy(&adev->evt, &apbt_clockevent, sizeof(struct clock_event_device));
+
+        if (disable_apbt_percpu) {
+                apbt_clockevent.rating = APBT_CLOCKEVENT_RATING - 100;
+                global_clock_event = &adev->evt;
+                printk(KERN_DEBUG "%s clockevent registered as global\n",
+                       global_clock_event->name);
+        }
+
+        if (request_irq(apbt_clockevent.irq, apbt_interrupt_handler,
+                        IRQF_TIMER | IRQF_DISABLED | IRQF_NOBALANCING,
+                        apbt_clockevent.name, adev)) {
+                printk(KERN_ERR "Failed request IRQ for APBT%d\n",
+                       apbt_clockevent.irq);
+        }
+
+        clockevents_register_device(&adev->evt);
+        /* Start APBT 0 interrupts */
+        apbt_enable_int(APBT_CLOCKEVENT0_NUM);
+
+        sfi_free_mtmr(mtmr);
+        return 0;
+}
+
+#ifdef CONFIG_SMP
+/* Should be called with per cpu */
+void apbt_setup_secondary_clock(void)
+{
+        struct apbt_dev *adev;
+        struct clock_event_device *aevt;
+        int cpu;
+
+        /* Don't register boot CPU clockevent */
+        cpu = smp_processor_id();
+        if (cpu == boot_cpu_id)
+                return;
+        /*
+         * We need to calculate the scaled math multiplication factor for
+         * nanosecond to apbt tick conversion.
+         * mult = (nsec/cycle)*2^APBT_SHIFT
+         */
+        printk(KERN_INFO "Init per CPU clockevent %d\n", cpu);
+        adev = &per_cpu(cpu_apbt_dev, cpu);
+        aevt = &adev->evt;
+
+        memcpy(aevt, &apbt_clockevent, sizeof(*aevt));
+        aevt->cpumask = cpumask_of(cpu);
+        aevt->name = adev->name;
+        aevt->mode = CLOCK_EVT_MODE_UNUSED;
+
+        printk(KERN_INFO "Registering CPU %d clockevent device %s, mask %08x\n",
+               cpu, aevt->name, *(u32 *)aevt->cpumask);
+
+        apbt_setup_irq(adev);
+
+        clockevents_register_device(aevt);
+
+        apbt_enable_int(cpu);
+
+        return;
+}
+
+/*
+ * this notify handler process CPU hotplug events. in case of S0i3, nonboot
+ * cpus are disabled/enabled frequently, for performance reasons, we keep the
+ * per cpu timer irq registered so that we do need to do free_irq/request_irq.
+ *
+ * TODO: it might be more reliable to directly disable percpu clockevent device
+ * without the notifier chain. currently, cpu 0 may get interrupts from other
+ * cpu timers during the offline process due to the ordering of notification.
+ * the extra interrupt is harmless.
+ */
+static int apbt_cpuhp_notify(struct notifier_block *n,
+                             unsigned long action, void *hcpu)
+{
+        unsigned long cpu = (unsigned long)hcpu;
+        struct apbt_dev *adev = &per_cpu(cpu_apbt_dev, cpu);
+
+        switch (action & 0xf) {
+        case CPU_DEAD:
+                apbt_disable_int(cpu);
+                if (system_state == SYSTEM_RUNNING)
+                        pr_debug("skipping APBT CPU %lu offline\n", cpu);
+                else if (adev) {
+                        pr_debug("APBT clockevent for cpu %lu offline\n", cpu);
+                        free_irq(adev->irq, adev);
+                }
+                break;
+        default:
+                pr_debug(KERN_INFO "APBT notified %lu, no action\n", action);
+        }
+        return NOTIFY_OK;
+}
+
+static __init int apbt_late_init(void)
+{
+        if (disable_apbt_percpu || !apb_timer_block_enabled)
+                return 0;
+        /* This notifier should be called after workqueue is ready */
+        hotcpu_notifier(apbt_cpuhp_notify, -20);
+        return 0;
+}
+fs_initcall(apbt_late_init);
+#else
+
+void apbt_setup_secondary_clock(void) {}
+
+#endif /* CONFIG_SMP */
+
+static void apbt_set_mode(enum clock_event_mode mode,
+                          struct clock_event_device *evt)
+{
+        unsigned long ctrl;
+        uint64_t delta;
+        int timer_num;
+        struct apbt_dev *adev = EVT_TO_APBT_DEV(evt);
+
+        timer_num = adev->num;
+        pr_debug("%s CPU %d timer %d mode=%d\n",
+                 __func__, first_cpu(*evt->cpumask), timer_num, mode);
+
+        switch (mode) {
+        case CLOCK_EVT_MODE_PERIODIC:
+                delta = ((uint64_t)(NSEC_PER_SEC/HZ)) * apbt_clockevent.mult;
+                delta >>= apbt_clockevent.shift;
+                ctrl = apbt_readl(timer_num, APBTMR_N_CONTROL);
+                ctrl |= APBTMR_CONTROL_MODE_PERIODIC;
+                apbt_writel(timer_num, ctrl, APBTMR_N_CONTROL);
+                /*
+                 * DW APB p. 46, have to disable timer before load counter,
+                 * may cause sync problem.
+                 */
+                ctrl &= ~APBTMR_CONTROL_ENABLE;
+                apbt_writel(timer_num, ctrl, APBTMR_N_CONTROL);
+                udelay(1);
+                pr_debug("Setting clock period %d for HZ %d\n", (int)delta, HZ);
+                apbt_writel(timer_num, delta, APBTMR_N_LOAD_COUNT);
+                ctrl |= APBTMR_CONTROL_ENABLE;
+                apbt_writel(timer_num, ctrl, APBTMR_N_CONTROL);
+                break;
+                /* APB timer does not have one-shot mode, use free running mode */
+        case CLOCK_EVT_MODE_ONESHOT:
+                ctrl = apbt_readl(timer_num, APBTMR_N_CONTROL);
+                /*
+                 * set free running mode, this mode will let timer reload max
+                 * timeout which will give time (3min on 25MHz clock) to rearm
+                 * the next event, therefore emulate the one-shot mode.
+                 */
+                ctrl &= ~APBTMR_CONTROL_ENABLE;
+                ctrl &= ~APBTMR_CONTROL_MODE_PERIODIC;
+
+                apbt_writel(timer_num, ctrl, APBTMR_N_CONTROL);
+                /* write again to set free running mode */
+                apbt_writel(timer_num, ctrl, APBTMR_N_CONTROL);
+
+                /*
+                 * DW APB p. 46, load counter with all 1s before starting free
+                 * running mode.
+                 */
+                apbt_writel(timer_num, ~0, APBTMR_N_LOAD_COUNT);
+                ctrl &= ~APBTMR_CONTROL_INT;
+                ctrl |= APBTMR_CONTROL_ENABLE;
+                apbt_writel(timer_num, ctrl, APBTMR_N_CONTROL);
+                break;
+
+        case CLOCK_EVT_MODE_UNUSED:
+        case CLOCK_EVT_MODE_SHUTDOWN:
+                apbt_disable_int(timer_num);
+                ctrl = apbt_readl(timer_num, APBTMR_N_CONTROL);
+                ctrl &= ~APBTMR_CONTROL_ENABLE;
+                apbt_writel(timer_num, ctrl, APBTMR_N_CONTROL);
+                break;
+
+        case CLOCK_EVT_MODE_RESUME:
+                apbt_enable_int(timer_num);
+                break;
+        }
+}
+
+static int apbt_next_event(unsigned long delta,
+                           struct clock_event_device *evt)
+{
+        unsigned long ctrl;
+        int timer_num;
+
+        struct apbt_dev *adev = EVT_TO_APBT_DEV(evt);
+
+        timer_num = adev->num;
+        /* Disable timer */
+        ctrl = apbt_readl(timer_num, APBTMR_N_CONTROL);
+        ctrl &= ~APBTMR_CONTROL_ENABLE;
+        apbt_writel(timer_num, ctrl, APBTMR_N_CONTROL);
+        /* write new count */
+        apbt_writel(timer_num, delta, APBTMR_N_LOAD_COUNT);
+        ctrl |= APBTMR_CONTROL_ENABLE;
+        apbt_writel(timer_num, ctrl, APBTMR_N_CONTROL);
+        return 0;
+}
+
+/*
+ * APB timer clock is not in sync with pclk on Langwell, which translates to
+ * unreliable read value caused by sampling error. the error does not add up
+ * overtime and only happens when sampling a 0 as a 1 by mistake. so the time
+ * would go backwards. the following code is trying to prevent time traveling
+ * backwards. little bit paranoid.
+ */
+static cycle_t apbt_read_clocksource(struct clocksource *cs)
+{
+        unsigned long t0, t1, t2;
+        static unsigned long last_read;
+
+bad_count:
+        t1 = apbt_readl(phy_cs_timer_id,
+                        APBTMR_N_CURRENT_VALUE);
+        t2 = apbt_readl(phy_cs_timer_id,
+                        APBTMR_N_CURRENT_VALUE);
+        if (unlikely(t1 < t2)) {
+                pr_debug("APBT: read current count error %lx:%lx:%lx\n",
+                         t1, t2, t2 - t1);
+                goto bad_count;
+        }
+        /*
+         * check against cached last read, makes sure time does not go back.
+         * it could be a normal rollover but we will do tripple check anyway
+         */
+        if (unlikely(t2 > last_read)) {
+                /* check if we have a normal rollover */
+                unsigned long raw_intr_status =
+                        apbt_readl_reg(APBTMRS_RAW_INT_STATUS);
+                /*
+                 * cs timer interrupt is masked but raw intr bit is set if
+                 * rollover occurs. then we read EOI reg to clear it.
+                 */
+                if (raw_intr_status & (1 << phy_cs_timer_id)) {
+                        apbt_readl(phy_cs_timer_id, APBTMR_N_EOI);
+                        goto out;
+                }
+                pr_debug("APB CS going back %lx:%lx:%lx ",
+                         t2, last_read, t2 - last_read);
+bad_count_x3:
+                pr_debug(KERN_INFO "tripple check enforced\n");
+                t0 = apbt_readl(phy_cs_timer_id,
+                                APBTMR_N_CURRENT_VALUE);
+                udelay(1);
+                t1 = apbt_readl(phy_cs_timer_id,
+                                APBTMR_N_CURRENT_VALUE);
+                udelay(1);
+                t2 = apbt_readl(phy_cs_timer_id,
+                                APBTMR_N_CURRENT_VALUE);
+                if ((t2 > t1) || (t1 > t0)) {
+                        printk(KERN_ERR "Error: APB CS tripple check failed\n");
+                        goto bad_count_x3;
+                }
+        }
+out:
+        last_read = t2;
+        return (cycle_t)~t2;
+}
+
+static int apbt_clocksource_register(void)
+{
+        u64 start, now;
+        cycle_t t1;
+
+        /* Start the counter, use timer 2 as source, timer 0/1 for event */
+        apbt_start_counter(phy_cs_timer_id);
+
+        /* Verify whether apbt counter works */
+        t1 = apbt_read_clocksource(&clocksource_apbt);
+        rdtscll(start);
+
+        /*
+         * We don't know the TSC frequency yet, but waiting for
+         * 200000 TSC cycles is safe:
+         * 4 GHz == 50us
+         * 1 GHz == 200us
+         */
+        do {
+                rep_nop();
+                rdtscll(now);
+        } while ((now - start) < 200000UL);
+
+        /* APBT is the only always on clocksource, it has to work! */
+        if (t1 == apbt_read_clocksource(&clocksource_apbt))
+                panic("APBT counter not counting. APBT disabled\n");
+
+        /*
+         * initialize and register APBT clocksource
+         * convert that to ns/clock cycle
+         * mult = (ns/c) * 2^APBT_SHIFT
+         */
+        clocksource_apbt.mult = div_sc(MSEC_PER_SEC,
+                                       (unsigned long) apbt_freq, APBT_SHIFT);
+        clocksource_register(&clocksource_apbt);
+
+        return 0;
+}
+
+/*
+ * Early setup the APBT timer, only use timer 0 for booting then switch to
+ * per CPU timer if possible.
+ * returns 1 if per cpu apbt is setup
+ * returns 0 if no per cpu apbt is chosen
+ * panic if set up failed, this is the only platform timer on Moorestown.
+ */
+void __init apbt_time_init(void)
+{
+#ifdef CONFIG_SMP
+        int i;
+        struct sfi_timer_table_entry *p_mtmr;
+        unsigned int percpu_timer;
+        struct apbt_dev *adev;
+#endif
+
+        if (apb_timer_block_enabled)
+                return;
+        apbt_set_mapping();
+        if (apbt_virt_address) {
+                pr_debug("Found APBT version 0x%lx\n",\
+                         apbt_readl_reg(APBTMRS_COMP_VERSION));
+        } else
+                goto out_noapbt;
+        /*
+         * Read the frequency and check for a sane value, for ESL model
+         * we extend the possible clock range to allow time scaling.
+         */
+
+        if (apbt_freq < APBT_MIN_FREQ || apbt_freq > APBT_MAX_FREQ) {
+                pr_debug("APBT has invalid freq 0x%llx\n", apbt_freq);
+                goto out_noapbt;
+        }
+        if (apbt_clocksource_register()) {
+                pr_debug("APBT has failed to register clocksource\n");
+                goto out_noapbt;
+        }
+        if (!apbt_clockevent_register())
+                apb_timer_block_enabled = 1;
+        else {
+                pr_debug("APBT has failed to register clockevent\n");
+                goto out_noapbt;
+        }
+#ifdef CONFIG_SMP
+        /* kernel cmdline disable apb timer, so we will use lapic timers */
+        if (disable_apbt_percpu) {
+                printk(KERN_INFO "apbt: disabled per cpu timer\n");
+                return;
+        }
+        pr_debug("%s: %d CPUs online\n", __func__, num_online_cpus());
+        if (num_possible_cpus() <= sfi_mtimer_num) {
+                percpu_timer = 1;
+                apbt_num_timers_used = num_possible_cpus();
+        } else {
+                percpu_timer = 0;
+                apbt_num_timers_used = 1;
+                adev = &per_cpu(cpu_apbt_dev, 0);
+                adev->flags &= ~APBT_DEV_USED;
+        }
+        pr_debug("%s: %d APB timers used\n", __func__, apbt_num_timers_used);
+
+        /* here we set up per CPU timer data structure */
+        apbt_devs = kzalloc(sizeof(struct apbt_dev) * apbt_num_timers_used,
+                            GFP_KERNEL);
+        if (!apbt_devs) {
+                printk(KERN_ERR "Failed to allocate APB timer devices\n");
+                return;
+        }
+        for (i = 0; i < apbt_num_timers_used; i++) {
+                adev = &per_cpu(cpu_apbt_dev, i);
+                adev->num = i;
+                adev->cpu = i;
+                p_mtmr = sfi_get_mtmr(i);
+                if (p_mtmr) {
+                        adev->tick = p_mtmr->freq_hz;
+                        adev->irq = p_mtmr->irq;
+                } else
+                        printk(KERN_ERR "Failed to get timer for cpu %d\n", i);
+                adev->count = 0;
+                sprintf(adev->name, "apbt%d", i);
+        }
+#endif
+
+        return;
+
+out_noapbt:
+        apbt_clear_mapping();
+        apb_timer_block_enabled = 0;
+        panic("failed to enable APB timer\n");
+}
+
+static inline void apbt_disable(int n)
+{
+        if (is_apbt_capable()) {
+                unsigned long ctrl =  apbt_readl(n, APBTMR_N_CONTROL);
+                ctrl &= ~APBTMR_CONTROL_ENABLE;
+                apbt_writel(n, ctrl, APBTMR_N_CONTROL);
+        }
+}
+
+/* called before apb_timer_enable, use early map */
+unsigned long apbt_quick_calibrate()
+{
+        int i, scale;
+        u64 old, new;
+        cycle_t t1, t2;
+        unsigned long khz = 0;
+        u32 loop, shift;
+
+        apbt_set_mapping();
+        apbt_start_counter(phy_cs_timer_id);
+
+        /* check if the timer can count down, otherwise return */
+        old = apbt_read_clocksource(&clocksource_apbt);
+        i = 10000;
+        while (--i) {
+                if (old != apbt_read_clocksource(&clocksource_apbt))
+                        break;
+        }
+        if (!i)
+                goto failed;
+
+        /* count 16 ms */
+        loop = (apbt_freq * 1000) << 4;
+
+        /* restart the timer to ensure it won't get to 0 in the calibration */
+        apbt_start_counter(phy_cs_timer_id);
+
+        old = apbt_read_clocksource(&clocksource_apbt);
+        old += loop;
+
+        t1 = __native_read_tsc();
+
+        do {
+                new = apbt_read_clocksource(&clocksource_apbt);
+        } while (new < old);
+
+        t2 = __native_read_tsc();
+
+        shift = 5;
+        if (unlikely(loop >> shift == 0)) {
+                printk(KERN_INFO
+                       "APBT TSC calibration failed, not enough resolution\n");
+                return 0;
+        }
+        scale = (int)div_u64((t2 - t1), loop >> shift);
+        khz = (scale * apbt_freq * 1000) >> shift;
+        printk(KERN_INFO "TSC freq calculated by APB timer is %lu khz\n", khz);
+        return khz;
+failed:
+        return 0;
+}
diff --git a/arch/x86/kernel/aperture_64.c b/arch/x86/kernel/aperture_64.c
index f147a95fd84..b5d8b0bcf23 100644
--- a/arch/x86/kernel/aperture_64.c
+++ b/arch/x86/kernel/aperture_64.c
@@ -31,7 +31,6 @@
 #include <asm/x86_init.h>
 
 int gart_iommu_aperture;
-EXPORT_SYMBOL_GPL(gart_iommu_aperture);
 int gart_iommu_aperture_disabled __initdata;
 int gart_iommu_aperture_allowed __initdata;
 
@@ -394,6 +393,7 @@ void __init gart_iommu_hole_init(void)
         for (i = 0; i < ARRAY_SIZE(bus_dev_ranges); i++) {
                 int bus;
                 int dev_base, dev_limit;
+                u32 ctl;
 
                 bus = bus_dev_ranges[i].bus;
                 dev_base = bus_dev_ranges[i].dev_base;
@@ -407,7 +407,19 @@ void __init gart_iommu_hole_init(void)
                         gart_iommu_aperture = 1;
                         x86_init.iommu.iommu_init = gart_iommu_init;
 
-                        aper_order = (read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL) >> 1) & 7;
+                        ctl = read_pci_config(bus, slot, 3,
+                                              AMD64_GARTAPERTURECTL);
+
+                        /*
+                         * Before we do anything else disable the GART. It may
+                         * still be enabled if we boot into a crash-kernel here.
+                         * Reconfiguring the GART while it is enabled could have
+                         * unknown side-effects.
+                         */
+                        ctl &= ~GARTEN;
+                        write_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL, ctl);
+
+                        aper_order = (ctl >> 1) & 7;
                         aper_size = (32 * 1024 * 1024) << aper_order;
                         aper_base = read_pci_config(bus, slot, 3, AMD64_GARTAPERTUREBASE) & 0x7fff;
                         aper_base <<= 25;
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 6e29b2a77aa..e5a4a1e0161 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1390,7 +1390,7 @@ void __init enable_IR_x2apic(void)
         }
 
         local_irq_save(flags);
-        mask_8259A();
+        legacy_pic->mask_all();
         mask_IO_APIC_setup(ioapic_entries);
 
         if (dmar_table_init_ret)
@@ -1422,7 +1422,7 @@ void __init enable_IR_x2apic(void)
 nox2apic:
         if (!ret) /* IR enabling failed */
                 restore_IO_APIC_setup(ioapic_entries);
-        unmask_8259A();
+        legacy_pic->restore_mask();
         local_irq_restore(flags);
 
 out:
@@ -1640,8 +1640,10 @@ int __init APIC_init_uniprocessor(void)
         }
 #endif
 
+#ifndef CONFIG_SMP
         enable_IR_x2apic();
         default_setup_apic_routing();
+#endif
 
         verify_local_APIC();
         connect_bsp_APIC();
@@ -2018,7 +2020,7 @@ static int lapic_resume(struct sys_device *dev)
                 }
 
                 mask_IO_APIC_setup(ioapic_entries);
-                mask_8259A();
+                legacy_pic->mask_all();
         }
 
         if (x2apic_mode)
@@ -2062,7 +2064,7 @@ static int lapic_resume(struct sys_device *dev)
 
         if (intr_remapping_enabled) {
                 reenable_intr_remapping(x2apic_mode);
-                unmask_8259A();
+                legacy_pic->restore_mask();
                 restore_IO_APIC_setup(ioapic_entries);
                 free_ioapic_entries(ioapic_entries);
         }
diff --git a/arch/x86/kernel/apic/apic_flat_64.c b/arch/x86/kernel/apic/apic_flat_64.c
index e3c3d820c32..09d3b17ce0c 100644
--- a/arch/x86/kernel/apic/apic_flat_64.c
+++ b/arch/x86/kernel/apic/apic_flat_64.c
@@ -223,7 +223,7 @@ struct apic apic_flat =  {
 };
 
 /*
- * Physflat mode is used when there are more than 8 CPUs on a AMD system.
+ * Physflat mode is used when there are more than 8 CPUs on a system.
  * We cannot use logical delivery in this case because the mask
  * overflows, so use physical mode.
  */
diff --git a/arch/x86/kernel/apic/es7000_32.c b/arch/x86/kernel/apic/es7000_32.c
index dd2b5f26464..03ba1b895f5 100644
--- a/arch/x86/kernel/apic/es7000_32.c
+++ b/arch/x86/kernel/apic/es7000_32.c
@@ -42,6 +42,7 @@
 #include <linux/errno.h>
 #include <linux/acpi.h>
 #include <linux/init.h>
+#include <linux/gfp.h>
 #include <linux/nmi.h>
 #include <linux/smp.h>
 #include <linux/io.h>
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 14862f11cc4..127b8718abf 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -36,6 +36,7 @@
 #include <linux/freezer.h>
 #include <linux/kthread.h>
 #include <linux/jiffies.h>      /* time_after() */
+#include <linux/slab.h>
 #ifdef CONFIG_ACPI
 #include <acpi/acpi_bus.h>
 #endif
@@ -143,12 +144,6 @@ static struct irq_cfg irq_cfgx[NR_IRQS_LEGACY];
 static struct irq_cfg irq_cfgx[NR_IRQS];
 #endif
 
-void __init io_apic_disable_legacy(void)
-{
-        nr_legacy_irqs = 0;
-        nr_irqs_gsi = 0;
-}
-
 int __init arch_early_irq_init(void)
 {
         struct irq_cfg *cfg;
@@ -157,6 +152,11 @@ int __init arch_early_irq_init(void)
         int node;
         int i;
 
+        if (!legacy_pic->nr_legacy_irqs) {
+                nr_irqs_gsi = 0;
+                io_apic_irqs = ~0UL;
+        }
+
         cfg = irq_cfgx;
         count = ARRAY_SIZE(irq_cfgx);
         node= cpu_to_node(boot_cpu_id);
@@ -170,7 +170,7 @@ int __init arch_early_irq_init(void)
                  * For legacy IRQ's, start with assigning irq0 to irq15 to
                  * IRQ0_VECTOR to IRQ15_VECTOR on cpu 0.
                  */
-                if (i < nr_legacy_irqs) {
+                if (i < legacy_pic->nr_legacy_irqs) {
                         cfg[i].vector = IRQ0_VECTOR + i;
                         cpumask_set_cpu(0, cfg[i].domain);
                 }
@@ -852,7 +852,7 @@ static int __init find_isa_irq_apic(int irq, int type)
  */
 static int EISA_ELCR(unsigned int irq)
 {
-        if (irq < nr_legacy_irqs) {
+        if (irq < legacy_pic->nr_legacy_irqs) {
                 unsigned int port = 0x4d0 + (irq >> 3);
                 return (inb(port) >> (irq & 7)) & 1;
         }
@@ -1269,6 +1269,14 @@ void __setup_vector_irq(int cpu)
         /* Mark the inuse vectors */
         for_each_irq_desc(irq, desc) {
                 cfg = desc->chip_data;
+
+                /*
+                 * If it is a legacy IRQ handled by the legacy PIC, this cpu
+                 * will be part of the irq_cfg's domain.
+                 */
+                if (irq < legacy_pic->nr_legacy_irqs && !IO_APIC_IRQ(irq))
+                        cpumask_set_cpu(cpu, cfg->domain);
+
                 if (!cpumask_test_cpu(cpu, cfg->domain))
                         continue;
                 vector = cfg->vector;
@@ -1439,7 +1447,7 @@ static void setup_IO_APIC_irq(int apic_id, int pin, unsigned int irq, struct irq
          * controllers like 8259. Now that IO-APIC can handle this irq, update
          * the cfg->domain.
          */
-        if (irq < nr_legacy_irqs && cpumask_test_cpu(0, cfg->domain))
+        if (irq < legacy_pic->nr_legacy_irqs && cpumask_test_cpu(0, cfg->domain))
                 apic->vector_allocation_domain(0, cfg->domain);
 
         if (assign_irq_vector(irq, cfg, apic->target_cpus()))
@@ -1463,8 +1471,8 @@ static void setup_IO_APIC_irq(int apic_id, int pin, unsigned int irq, struct irq
         }
 
         ioapic_register_intr(irq, desc, trigger);
-        if (irq < nr_legacy_irqs)
-                disable_8259A_irq(irq);
+        if (irq < legacy_pic->nr_legacy_irqs)
+                legacy_pic->chip->mask(irq);
 
         ioapic_write_entry(apic_id, pin, entry);
 }
@@ -1873,7 +1881,7 @@ __apicdebuginit(void) print_PIC(void)
         unsigned int v;
         unsigned long flags;
 
-        if (!nr_legacy_irqs)
+        if (!legacy_pic->nr_legacy_irqs)
                 return;
 
         printk(KERN_DEBUG "\nprinting PIC contents\n");
@@ -1957,7 +1965,7 @@ void __init enable_IO_APIC(void)
                 nr_ioapic_registers[apic] = reg_01.bits.entries+1;
         }
 
-        if (!nr_legacy_irqs)
+        if (!legacy_pic->nr_legacy_irqs)
                 return;
 
         for(apic = 0; apic < nr_ioapics; apic++) {
@@ -2014,7 +2022,7 @@ void disable_IO_APIC(void)
          */
         clear_IO_APIC();
 
-        if (!nr_legacy_irqs)
+        if (!legacy_pic->nr_legacy_irqs)
                 return;
 
         /*
@@ -2247,9 +2255,9 @@ static unsigned int startup_ioapic_irq(unsigned int irq)
         struct irq_cfg *cfg;
 
         raw_spin_lock_irqsave(&ioapic_lock, flags);
-        if (irq < nr_legacy_irqs) {
-                disable_8259A_irq(irq);
-                if (i8259A_irq_pending(irq))
+        if (irq < legacy_pic->nr_legacy_irqs) {
+                legacy_pic->chip->mask(irq);
+                if (legacy_pic->irq_pending(irq))
                         was_pending = 1;
         }
         cfg = irq_cfg(irq);
@@ -2782,8 +2790,8 @@ static inline void init_IO_APIC_traps(void)
                          * so default to an old-fashioned 8259
                          * interrupt if we can..
                          */
-                        if (irq < nr_legacy_irqs)
-                                make_8259A_irq(irq);
+                        if (irq < legacy_pic->nr_legacy_irqs)
+                                legacy_pic->make_irq(irq);
                         else
                                 /* Strange. Oh, well.. */
                                 desc->chip = &no_irq_chip;
@@ -2940,7 +2948,7 @@ static inline void __init check_timer(void)
         /*
          * get/set the timer IRQ vector:
          */
-        disable_8259A_irq(0);
+        legacy_pic->chip->mask(0);
         assign_irq_vector(0, cfg, apic->target_cpus());
 
         /*
@@ -2953,7 +2961,7 @@ static inline void __init check_timer(void)
          * automatically.
          */
         apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT);
-        init_8259A(1);
+        legacy_pic->init(1);
 #ifdef CONFIG_X86_32
         {
                 unsigned int ver;
@@ -3012,7 +3020,7 @@ static inline void __init check_timer(void)
                 if (timer_irq_works()) {
                         if (nmi_watchdog == NMI_IO_APIC) {
                                 setup_nmi();
-                                enable_8259A_irq(0);
+                                legacy_pic->chip->unmask(0);
                         }
                         if (disable_timer_pin_1 > 0)
                                 clear_IO_APIC_pin(0, pin1);
@@ -3035,14 +3043,14 @@ static inline void __init check_timer(void)
                  */
                 replace_pin_at_irq_node(cfg, node, apic1, pin1, apic2, pin2);
                 setup_timer_IRQ0_pin(apic2, pin2, cfg->vector);
-                enable_8259A_irq(0);
+                legacy_pic->chip->unmask(0);
                 if (timer_irq_works()) {
                         apic_printk(APIC_QUIET, KERN_INFO "....... works.\n");
                         timer_through_8259 = 1;
                         if (nmi_watchdog == NMI_IO_APIC) {
-                                disable_8259A_irq(0);
+                                legacy_pic->chip->mask(0);
                                 setup_nmi();
-                                enable_8259A_irq(0);
+                                legacy_pic->chip->unmask(0);
                         }
                         goto out;
                 }
@@ -3050,7 +3058,7 @@ static inline void __init check_timer(void)
                  * Cleanup, just in case ...
                  */
                 local_irq_disable();
-                disable_8259A_irq(0);
+                legacy_pic->chip->mask(0);
                 clear_IO_APIC_pin(apic2, pin2);
                 apic_printk(APIC_QUIET, KERN_INFO "....... failed.\n");
         }
@@ -3069,22 +3077,22 @@ static inline void __init check_timer(void)
 
         lapic_register_intr(0, desc);
         apic_write(APIC_LVT0, APIC_DM_FIXED | cfg->vector);     /* Fixed mode */
-        enable_8259A_irq(0);
+        legacy_pic->chip->unmask(0);
 
         if (timer_irq_works()) {
                 apic_printk(APIC_QUIET, KERN_INFO "..... works.\n");
                 goto out;
         }
         local_irq_disable();
-        disable_8259A_irq(0);
+        legacy_pic->chip->mask(0);
         apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector);
         apic_printk(APIC_QUIET, KERN_INFO "..... failed.\n");
 
         apic_printk(APIC_QUIET, KERN_INFO
                     "...trying to set up timer as ExtINT IRQ...\n");
 
-        init_8259A(0);
-        make_8259A_irq(0);
+        legacy_pic->init(0);
+        legacy_pic->make_irq(0);
         apic_write(APIC_LVT0, APIC_DM_EXTINT);
 
         unlock_ExtINT_logic();
@@ -3126,7 +3134,7 @@ void __init setup_IO_APIC(void)
         /*
          * calling enable_IO_APIC() is moved to setup_local_APIC for BP
          */
-        io_apic_irqs = nr_legacy_irqs ? ~PIC_IRQS : ~0UL;
+        io_apic_irqs = legacy_pic->nr_legacy_irqs ? ~PIC_IRQS : ~0UL;
 
         apic_printk(APIC_VERBOSE, "ENABLING IO-APIC IRQs\n");
         /*
@@ -3137,7 +3145,7 @@ void __init setup_IO_APIC(void)
         sync_Arb_IDs();
         setup_IO_APIC_irqs();
         init_IO_APIC_traps();
-        if (nr_legacy_irqs)
+        if (legacy_pic->nr_legacy_irqs)
                 check_timer();
 }
 
@@ -3928,7 +3936,7 @@ static int __io_apic_set_pci_routing(struct device *dev, int irq,
         /*
          * IRQs < 16 are already in the irq_2_pin[] map
          */
-        if (irq >= nr_legacy_irqs) {
+        if (irq >= legacy_pic->nr_legacy_irqs) {
                 cfg = desc->chip_data;
                 if (add_pin_to_irq_node_nopanic(cfg, node, ioapic, pin)) {
                         printk(KERN_INFO "can not add pin %d for irq %d\n",
@@ -4302,3 +4310,24 @@ void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
 
         nr_ioapics++;
 }
+
+/* Enable IOAPIC early just for system timer */
+void __init pre_init_apic_IRQ0(void)
+{
+        struct irq_cfg *cfg;
+        struct irq_desc *desc;
+
+        printk(KERN_INFO "Early APIC setup for system timer0\n");
+#ifndef CONFIG_SMP
+        phys_cpu_present_map = physid_mask_of_physid(boot_cpu_physical_apicid);
+#endif
+        desc = irq_to_desc_alloc_node(0, 0);
+
+        setup_local_APIC();
+
+        cfg = irq_cfg(0);
+        add_pin_to_irq_node(cfg, 0, 0, 0);
+        set_irq_chip_and_handler_name(0, &ioapic_chip, handle_edge_irq, "edge");
+
+        setup_IO_APIC_irq(0, 0, 0, desc, 0, 0);
+}
diff --git a/arch/x86/kernel/apic/nmi.c b/arch/x86/kernel/apic/nmi.c
index bd7c96b5e8d..1edaf15c0b8 100644
--- a/arch/x86/kernel/apic/nmi.c
+++ b/arch/x86/kernel/apic/nmi.c
@@ -18,6 +18,7 @@
 #include <linux/delay.h>
 #include <linux/interrupt.h>
 #include <linux/module.h>
+#include <linux/slab.h>
 #include <linux/sysdev.h>
 #include <linux/sysctl.h>
 #include <linux/percpu.h>
@@ -177,7 +178,7 @@ int __init check_nmi_watchdog(void)
 error:
         if (nmi_watchdog == NMI_IO_APIC) {
                 if (!timer_through_8259)
-                        disable_8259A_irq(0);
+                        legacy_pic->chip->mask(0);
                 on_each_cpu(__acpi_nmi_disable, NULL, 1);
         }
 
diff --git a/arch/x86/kernel/apic/numaq_32.c b/arch/x86/kernel/apic/numaq_32.c
index 47dd856708e..3e28401f161 100644
--- a/arch/x86/kernel/apic/numaq_32.c
+++ b/arch/x86/kernel/apic/numaq_32.c
@@ -277,6 +277,7 @@ static __init void early_check_numaq(void)
                 x86_init.mpparse.mpc_oem_pci_bus = mpc_oem_pci_bus;
                 x86_init.mpparse.mpc_oem_bus_info = mpc_oem_bus_info;
                 x86_init.timers.tsc_pre_init = numaq_tsc_init;
+                x86_init.pci.init = pci_numaq_init;
         }
 }
 
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 3740c8a4eae..c085d52dbaf 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -17,6 +17,7 @@
 #include <linux/ctype.h>
 #include <linux/sched.h>
 #include <linux/timer.h>
+#include <linux/slab.h>
 #include <linux/cpu.h>
 #include <linux/init.h>
 #include <linux/io.h>
@@ -120,11 +121,9 @@ EXPORT_SYMBOL_GPL(uv_possible_blades);
 unsigned long sn_rtc_cycles_per_second;
 EXPORT_SYMBOL(sn_rtc_cycles_per_second);
 
-/* Start with all IRQs pointing to boot CPU.  IRQ balancing will shift them. */
-
 static const struct cpumask *uv_target_cpus(void)
 {
-        return cpumask_of(0);
+        return cpu_online_mask;
 }
 
 static void uv_vector_allocation_domain(int cpu, struct cpumask *retmask)
diff --git a/arch/x86/kernel/bootflag.c b/arch/x86/kernel/bootflag.c
index 30f25a75fe2..5de7f4c5697 100644
--- a/arch/x86/kernel/bootflag.c
+++ b/arch/x86/kernel/bootflag.c
@@ -5,7 +5,6 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/string.h>
-#include <linux/slab.h>
 #include <linux/spinlock.h>
 #include <linux/acpi.h>
 #include <asm/io.h>
diff --git a/arch/x86/kernel/cpu/cpufreq/Kconfig b/arch/x86/kernel/cpu/cpufreq/Kconfig
index f138c6c389b..870e6cc6ad2 100644
--- a/arch/x86/kernel/cpu/cpufreq/Kconfig
+++ b/arch/x86/kernel/cpu/cpufreq/Kconfig
@@ -10,6 +10,20 @@ if CPU_FREQ
 
 comment "CPUFreq processor drivers"
 
+config X86_PCC_CPUFREQ
+        tristate "Processor Clocking Control interface driver"
+        depends on ACPI && ACPI_PROCESSOR
+        help
+          This driver adds support for the PCC interface.
+
+          For details, take a look at:
+          <file:Documentation/cpu-freq/pcc-cpufreq.txt>.
+
+          To compile this driver as a module, choose M here: the
+          module will be called pcc-cpufreq.
+
+          If in doubt, say N.
+
 config X86_ACPI_CPUFREQ
         tristate "ACPI Processor P-States driver"
         select CPU_FREQ_TABLE
diff --git a/arch/x86/kernel/cpu/cpufreq/Makefile b/arch/x86/kernel/cpu/cpufreq/Makefile
index 509296df294..1840c0a5170 100644
--- a/arch/x86/kernel/cpu/cpufreq/Makefile
+++ b/arch/x86/kernel/cpu/cpufreq/Makefile
@@ -4,6 +4,7 @@
 
 obj-$(CONFIG_X86_POWERNOW_K8)           += powernow-k8.o
 obj-$(CONFIG_X86_ACPI_CPUFREQ)          += acpi-cpufreq.o
+obj-$(CONFIG_X86_PCC_CPUFREQ)           += pcc-cpufreq.o
 obj-$(CONFIG_X86_POWERNOW_K6)           += powernow-k6.o
 obj-$(CONFIG_X86_POWERNOW_K7)           += powernow-k7.o
 obj-$(CONFIG_X86_LONGHAUL)              += longhaul.o
diff --git a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
index 1b1920fa7c8..459168083b7 100644
--- a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -33,6 +33,7 @@
 #include <linux/cpufreq.h>
 #include <linux/compiler.h>
 #include <linux/dmi.h>
+#include <linux/slab.h>
 #include <trace/events/power.h>
 
 #include <linux/acpi.h>
diff --git a/arch/x86/kernel/cpu/cpufreq/elanfreq.c b/arch/x86/kernel/cpu/cpufreq/elanfreq.c
index 006b278b0d5..c587db472a7 100644
--- a/arch/x86/kernel/cpu/cpufreq/elanfreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/elanfreq.c
@@ -20,7 +20,6 @@
 #include <linux/module.h>
 #include <linux/init.h>
 
-#include <linux/slab.h>
 #include <linux/delay.h>
 #include <linux/cpufreq.h>
 
diff --git a/arch/x86/kernel/cpu/cpufreq/gx-suspmod.c b/arch/x86/kernel/cpu/cpufreq/gx-suspmod.c
index ac27ec2264d..16e3483be9e 100644
--- a/arch/x86/kernel/cpu/cpufreq/gx-suspmod.c
+++ b/arch/x86/kernel/cpu/cpufreq/gx-suspmod.c
@@ -80,6 +80,7 @@
 #include <linux/cpufreq.h>
 #include <linux/pci.h>
 #include <linux/errno.h>
+#include <linux/slab.h>
 
 #include <asm/processor-cyrix.h>
 
diff --git a/arch/x86/kernel/cpu/cpufreq/longrun.c b/arch/x86/kernel/cpu/cpufreq/longrun.c
index da5f70fcb76..e7b559d74c5 100644
--- a/arch/x86/kernel/cpu/cpufreq/longrun.c
+++ b/arch/x86/kernel/cpu/cpufreq/longrun.c
@@ -9,7 +9,6 @@
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/init.h>
-#include <linux/slab.h>
 #include <linux/cpufreq.h>
 #include <linux/timex.h>
 
diff --git a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
index 86961519372..7b8a8ba67b0 100644
--- a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
+++ b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
@@ -25,7 +25,6 @@
 #include <linux/init.h>
 #include <linux/smp.h>
 #include <linux/cpufreq.h>
-#include <linux/slab.h>
 #include <linux/cpumask.h>
 #include <linux/timex.h>
 
diff --git a/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c
new file mode 100644
index 00000000000..ce7cde713e7
--- /dev/null
+++ b/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c
@@ -0,0 +1,621 @@
+/*
+ *  pcc-cpufreq.c - Processor Clocking Control firmware cpufreq interface
+ *
+ *  Copyright (C) 2009 Red Hat, Matthew Garrett <mjg@redhat.com>
+ *  Copyright (C) 2009 Hewlett-Packard Development Company, L.P.
+ *      Nagananda Chumbalkar <nagananda.chumbalkar@hp.com>
+ *
+ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; version 2 of the License.
+ *
+ *  This program is distributed in the hope that it will be useful, but
+ *  WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or NON
+ *  INFRINGEMENT. See the GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/smp.h>
+#include <linux/sched.h>
+#include <linux/cpufreq.h>
+#include <linux/compiler.h>
+#include <linux/slab.h>
+
+#include <linux/acpi.h>
+#include <linux/io.h>
+#include <linux/spinlock.h>
+#include <linux/uaccess.h>
+
+#include <acpi/processor.h>
+
+#define PCC_VERSION     "1.00.00"
+#define POLL_LOOPS      300
+
+#define CMD_COMPLETE    0x1
+#define CMD_GET_FREQ    0x0
+#define CMD_SET_FREQ    0x1
+
+#define BUF_SZ          4
+
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER,      \
+                                             "pcc-cpufreq", msg)
+
+struct pcc_register_resource {
+        u8 descriptor;
+        u16 length;
+        u8 space_id;
+        u8 bit_width;
+        u8 bit_offset;
+        u8 access_size;
+        u64 address;
+} __attribute__ ((packed));
+
+struct pcc_memory_resource {
+        u8 descriptor;
+        u16 length;
+        u8 space_id;
+        u8 resource_usage;
+        u8 type_specific;
+        u64 granularity;
+        u64 minimum;
+        u64 maximum;
+        u64 translation_offset;
+        u64 address_length;
+} __attribute__ ((packed));
+
+static struct cpufreq_driver pcc_cpufreq_driver;
+
+struct pcc_header {
+        u32 signature;
+        u16 length;
+        u8 major;
+        u8 minor;
+        u32 features;
+        u16 command;
+        u16 status;
+        u32 latency;
+        u32 minimum_time;
+        u32 maximum_time;
+        u32 nominal;
+        u32 throttled_frequency;
+        u32 minimum_frequency;
+};
+
+static void __iomem *pcch_virt_addr;
+static struct pcc_header __iomem *pcch_hdr;
+
+static DEFINE_SPINLOCK(pcc_lock);
+
+static struct acpi_generic_address doorbell;
+
+static u64 doorbell_preserve;
+static u64 doorbell_write;
+
+static u8 OSC_UUID[16] = {0x63, 0x9B, 0x2C, 0x9F, 0x70, 0x91, 0x49, 0x1f,
+                          0xBB, 0x4F, 0xA5, 0x98, 0x2F, 0xA1, 0xB5, 0x46};
+
+struct pcc_cpu {
+        u32 input_offset;
+        u32 output_offset;
+};
+
+static struct pcc_cpu *pcc_cpu_info;
+
+static int pcc_cpufreq_verify(struct cpufreq_policy *policy)
+{
+        cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
+                                     policy->cpuinfo.max_freq);
+        return 0;
+}
+
+static inline void pcc_cmd(void)
+{
+        u64 doorbell_value;
+        int i;
+
+        acpi_read(&doorbell_value, &doorbell);
+        acpi_write((doorbell_value & doorbell_preserve) | doorbell_write,
+                   &doorbell);
+
+        for (i = 0; i < POLL_LOOPS; i++) {
+                if (ioread16(&pcch_hdr->status) & CMD_COMPLETE)
+                        break;
+        }
+}
+
+static inline void pcc_clear_mapping(void)
+{
+        if (pcch_virt_addr)
+                iounmap(pcch_virt_addr);
+        pcch_virt_addr = NULL;
+}
+
+static unsigned int pcc_get_freq(unsigned int cpu)
+{
+        struct pcc_cpu *pcc_cpu_data;
+        unsigned int curr_freq;
+        unsigned int freq_limit;
+        u16 status;
+        u32 input_buffer;
+        u32 output_buffer;
+
+        spin_lock(&pcc_lock);
+
+        dprintk("get: get_freq for CPU %d\n", cpu);
+        pcc_cpu_data = per_cpu_ptr(pcc_cpu_info, cpu);
+
+        input_buffer = 0x1;
+        iowrite32(input_buffer,
+                        (pcch_virt_addr + pcc_cpu_data->input_offset));
+        iowrite16(CMD_GET_FREQ, &pcch_hdr->command);
+
+        pcc_cmd();
+
+        output_buffer =
+                ioread32(pcch_virt_addr + pcc_cpu_data->output_offset);
+
+        /* Clear the input buffer - we are done with the current command */
+        memset_io((pcch_virt_addr + pcc_cpu_data->input_offset), 0, BUF_SZ);
+
+        status = ioread16(&pcch_hdr->status);
+        if (status != CMD_COMPLETE) {
+                dprintk("get: FAILED: for CPU %d, status is %d\n",
+                        cpu, status);
+                goto cmd_incomplete;
+        }
+        iowrite16(0, &pcch_hdr->status);
+        curr_freq = (((ioread32(&pcch_hdr->nominal) * (output_buffer & 0xff))
+                        / 100) * 1000);
+
+        dprintk("get: SUCCESS: (virtual) output_offset for cpu %d is "
+                "0x%x, contains a value of: 0x%x. Speed is: %d MHz\n",
+                cpu, (pcch_virt_addr + pcc_cpu_data->output_offset),
+                output_buffer, curr_freq);
+
+        freq_limit = (output_buffer >> 8) & 0xff;
+        if (freq_limit != 0xff) {
+                dprintk("get: frequency for cpu %d is being temporarily"
+                        " capped at %d\n", cpu, curr_freq);
+        }
+
+        spin_unlock(&pcc_lock);
+        return curr_freq;
+
+cmd_incomplete:
+        iowrite16(0, &pcch_hdr->status);
+        spin_unlock(&pcc_lock);
+        return -EINVAL;
+}
+
+static int pcc_cpufreq_target(struct cpufreq_policy *policy,
+                              unsigned int target_freq,
+                              unsigned int relation)
+{
+        struct pcc_cpu *pcc_cpu_data;
+        struct cpufreq_freqs freqs;
+        u16 status;
+        u32 input_buffer;
+        int cpu;
+
+        spin_lock(&pcc_lock);
+        cpu = policy->cpu;
+        pcc_cpu_data = per_cpu_ptr(pcc_cpu_info, cpu);
+
+        dprintk("target: CPU %d should go to target freq: %d "
+                "(virtual) input_offset is 0x%x\n",
+                cpu, target_freq,
+                (pcch_virt_addr + pcc_cpu_data->input_offset));
+
+        freqs.new = target_freq;
+        freqs.cpu = cpu;
+        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
+
+        input_buffer = 0x1 | (((target_freq * 100)
+                               / (ioread32(&pcch_hdr->nominal) * 1000)) << 8);
+        iowrite32(input_buffer,
+                        (pcch_virt_addr + pcc_cpu_data->input_offset));
+        iowrite16(CMD_SET_FREQ, &pcch_hdr->command);
+
+        pcc_cmd();
+
+        /* Clear the input buffer - we are done with the current command */
+        memset_io((pcch_virt_addr + pcc_cpu_data->input_offset), 0, BUF_SZ);
+
+        status = ioread16(&pcch_hdr->status);
+        if (status != CMD_COMPLETE) {
+                dprintk("target: FAILED for cpu %d, with status: 0x%x\n",
+                        cpu, status);
+                goto cmd_incomplete;
+        }
+        iowrite16(0, &pcch_hdr->status);
+
+        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
+        dprintk("target: was SUCCESSFUL for cpu %d\n", cpu);
+        spin_unlock(&pcc_lock);
+
+        return 0;
+
+cmd_incomplete:
+        iowrite16(0, &pcch_hdr->status);
+        spin_unlock(&pcc_lock);
+        return -EINVAL;
+}
+
+static int pcc_get_offset(int cpu)
+{
+        acpi_status status;
+        struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL};
+        union acpi_object *pccp, *offset;
+        struct pcc_cpu *pcc_cpu_data;
+        struct acpi_processor *pr;
+        int ret = 0;
+
+        pr = per_cpu(processors, cpu);
+        pcc_cpu_data = per_cpu_ptr(pcc_cpu_info, cpu);
+
+        status = acpi_evaluate_object(pr->handle, "PCCP", NULL, &buffer);
+        if (ACPI_FAILURE(status))
+                return -ENODEV;
+
+        pccp = buffer.pointer;
+        if (!pccp || pccp->type != ACPI_TYPE_PACKAGE) {
+                ret = -ENODEV;
+                goto out_free;
+        };
+
+        offset = &(pccp->package.elements[0]);
+        if (!offset || offset->type != ACPI_TYPE_INTEGER) {
+                ret = -ENODEV;
+                goto out_free;
+        }
+
+        pcc_cpu_data->input_offset = offset->integer.value;
+
+        offset = &(pccp->package.elements[1]);
+        if (!offset || offset->type != ACPI_TYPE_INTEGER) {
+                ret = -ENODEV;
+                goto out_free;
+        }
+
+        pcc_cpu_data->output_offset = offset->integer.value;
+
+        memset_io((pcch_virt_addr + pcc_cpu_data->input_offset), 0, BUF_SZ);
+        memset_io((pcch_virt_addr + pcc_cpu_data->output_offset), 0, BUF_SZ);
+
+        dprintk("pcc_get_offset: for CPU %d: pcc_cpu_data "
+                "input_offset: 0x%x, pcc_cpu_data output_offset: 0x%x\n",
+                cpu, pcc_cpu_data->input_offset, pcc_cpu_data->output_offset);
+out_free:
+        kfree(buffer.pointer);
+        return ret;
+}
+
+static int __init pcc_cpufreq_do_osc(acpi_handle *handle)
+{
+        acpi_status status;
+        struct acpi_object_list input;
+        struct acpi_buffer output = {ACPI_ALLOCATE_BUFFER, NULL};
+        union acpi_object in_params[4];
+        union acpi_object *out_obj;
+        u32 capabilities[2];
+        u32 errors;
+        u32 supported;
+        int ret = 0;
+
+        input.count = 4;
+        input.pointer = in_params;
+        input.count = 4;
+        input.pointer = in_params;
+        in_params[0].type               = ACPI_TYPE_BUFFER;
+        in_params[0].buffer.length      = 16;
+        in_params[0].buffer.pointer     = OSC_UUID;
+        in_params[1].type               = ACPI_TYPE_INTEGER;
+        in_params[1].integer.value      = 1;
+        in_params[2].type               = ACPI_TYPE_INTEGER;
+        in_params[2].integer.value      = 2;
+        in_params[3].type               = ACPI_TYPE_BUFFER;
+        in_params[3].buffer.length      = 8;
+        in_params[3].buffer.pointer     = (u8 *)&capabilities;
+
+        capabilities[0] = OSC_QUERY_ENABLE;
+        capabilities[1] = 0x1;
+
+        status = acpi_evaluate_object(*handle, "_OSC", &input, &output);
+        if (ACPI_FAILURE(status))
+                return -ENODEV;
+
+        if (!output.length)
+                return -ENODEV;
+
+        out_obj = output.pointer;
+        if (out_obj->type != ACPI_TYPE_BUFFER) {
+                ret = -ENODEV;
+                goto out_free;
+        }
+
+        errors = *((u32 *)out_obj->buffer.pointer) & ~(1 << 0);
+        if (errors) {
+                ret = -ENODEV;
+                goto out_free;
+        }
+
+        supported = *((u32 *)(out_obj->buffer.pointer + 4));
+        if (!(supported & 0x1)) {
+                ret = -ENODEV;
+                goto out_free;
+        }
+
+        kfree(output.pointer);
+        capabilities[0] = 0x0;
+        capabilities[1] = 0x1;
+
+        status = acpi_evaluate_object(*handle, "_OSC", &input, &output);
+        if (ACPI_FAILURE(status))
+                return -ENODEV;
+
+        if (!output.length)
+                return -ENODEV;
+
+        out_obj = output.pointer;
+        if (out_obj->type != ACPI_TYPE_BUFFER) {
+                ret = -ENODEV;
+                goto out_free;
+        }
+
+        errors = *((u32 *)out_obj->buffer.pointer) & ~(1 << 0);
+        if (errors) {
+                ret = -ENODEV;
+                goto out_free;
+        }
+
+        supported = *((u32 *)(out_obj->buffer.pointer + 4));
+        if (!(supported & 0x1)) {
+                ret = -ENODEV;
+                goto out_free;
+        }
+
+out_free:
+        kfree(output.pointer);
+        return ret;
+}
+
+static int __init pcc_cpufreq_probe(void)
+{
+        acpi_status status;
+        struct acpi_buffer output = {ACPI_ALLOCATE_BUFFER, NULL};
+        struct pcc_memory_resource *mem_resource;
+        struct pcc_register_resource *reg_resource;
+        union acpi_object *out_obj, *member;
+        acpi_handle handle, osc_handle;
+        int ret = 0;
+
+        status = acpi_get_handle(NULL, "\\_SB", &handle);
+        if (ACPI_FAILURE(status))
+                return -ENODEV;
+
+        status = acpi_get_handle(handle, "_OSC", &osc_handle);
+        if (ACPI_SUCCESS(status)) {
+                ret = pcc_cpufreq_do_osc(&osc_handle);
+                if (ret)
+                        dprintk("probe: _OSC evaluation did not succeed\n");
+                /* Firmware's use of _OSC is optional */
+                ret = 0;
+        }
+
+        status = acpi_evaluate_object(handle, "PCCH", NULL, &output);
+        if (ACPI_FAILURE(status))
+                return -ENODEV;
+
+        out_obj = output.pointer;
+        if (out_obj->type != ACPI_TYPE_PACKAGE) {
+                ret = -ENODEV;
+                goto out_free;
+        }
+
+        member = &out_obj->package.elements[0];
+        if (member->type != ACPI_TYPE_BUFFER) {
+                ret = -ENODEV;
+                goto out_free;
+        }
+
+        mem_resource = (struct pcc_memory_resource *)member->buffer.pointer;
+
+        dprintk("probe: mem_resource descriptor: 0x%x,"
+                " length: %d, space_id: %d, resource_usage: %d,"
+                " type_specific: %d, granularity: 0x%llx,"
+                " minimum: 0x%llx, maximum: 0x%llx,"
+                " translation_offset: 0x%llx, address_length: 0x%llx\n",
+                mem_resource->descriptor, mem_resource->length,
+                mem_resource->space_id, mem_resource->resource_usage,
+                mem_resource->type_specific, mem_resource->granularity,
+                mem_resource->minimum, mem_resource->maximum,
+                mem_resource->translation_offset,
+                mem_resource->address_length);
+
+        if (mem_resource->space_id != ACPI_ADR_SPACE_SYSTEM_MEMORY) {
+                ret = -ENODEV;
+                goto out_free;
+        }
+
+        pcch_virt_addr = ioremap_nocache(mem_resource->minimum,
+                                        mem_resource->address_length);
+        if (pcch_virt_addr == NULL) {
+                dprintk("probe: could not map shared mem region\n");
+                goto out_free;
+        }
+        pcch_hdr = pcch_virt_addr;
+
+        dprintk("probe: PCCH header (virtual) addr: 0x%p\n", pcch_hdr);
+        dprintk("probe: PCCH header is at physical address: 0x%llx,"
+                " signature: 0x%x, length: %d bytes, major: %d, minor: %d,"
+                " supported features: 0x%x, command field: 0x%x,"
+                " status field: 0x%x, nominal latency: %d us\n",
+                mem_resource->minimum, ioread32(&pcch_hdr->signature),
+                ioread16(&pcch_hdr->length), ioread8(&pcch_hdr->major),
+                ioread8(&pcch_hdr->minor), ioread32(&pcch_hdr->features),
+                ioread16(&pcch_hdr->command), ioread16(&pcch_hdr->status),
+                ioread32(&pcch_hdr->latency));
+
+        dprintk("probe: min time between commands: %d us,"
+                " max time between commands: %d us,"
+                " nominal CPU frequency: %d MHz,"
+                " minimum CPU frequency: %d MHz,"
+                " minimum CPU frequency without throttling: %d MHz\n",
+                ioread32(&pcch_hdr->minimum_time),
+                ioread32(&pcch_hdr->maximum_time),
+                ioread32(&pcch_hdr->nominal),
+                ioread32(&pcch_hdr->throttled_frequency),
+                ioread32(&pcch_hdr->minimum_frequency));
+
+        member = &out_obj->package.elements[1];
+        if (member->type != ACPI_TYPE_BUFFER) {
+                ret = -ENODEV;
+                goto pcch_free;
+        }
+
+        reg_resource = (struct pcc_register_resource *)member->buffer.pointer;
+
+        doorbell.space_id = reg_resource->space_id;
+        doorbell.bit_width = reg_resource->bit_width;
+        doorbell.bit_offset = reg_resource->bit_offset;
+        doorbell.access_width = 64;
+        doorbell.address = reg_resource->address;
+
+        dprintk("probe: doorbell: space_id is %d, bit_width is %d, "
+                "bit_offset is %d, access_width is %d, address is 0x%llx\n",
+                doorbell.space_id, doorbell.bit_width, doorbell.bit_offset,
+                doorbell.access_width, reg_resource->address);
+
+        member = &out_obj->package.elements[2];
+        if (member->type != ACPI_TYPE_INTEGER) {
+                ret = -ENODEV;
+                goto pcch_free;
+        }
+
+        doorbell_preserve = member->integer.value;
+
+        member = &out_obj->package.elements[3];
+        if (member->type != ACPI_TYPE_INTEGER) {
+                ret = -ENODEV;
+                goto pcch_free;
+        }
+
+        doorbell_write = member->integer.value;
+
+        dprintk("probe: doorbell_preserve: 0x%llx,"
+                " doorbell_write: 0x%llx\n",
+                doorbell_preserve, doorbell_write);
+
+        pcc_cpu_info = alloc_percpu(struct pcc_cpu);
+        if (!pcc_cpu_info) {
+                ret = -ENOMEM;
+                goto pcch_free;
+        }
+
+        printk(KERN_DEBUG "pcc-cpufreq: (v%s) driver loaded with frequency"
+               " limits: %d MHz, %d MHz\n", PCC_VERSION,
+               ioread32(&pcch_hdr->minimum_frequency),
+               ioread32(&pcch_hdr->nominal));
+        kfree(output.pointer);
+        return ret;
+pcch_free:
+        pcc_clear_mapping();
+out_free:
+        kfree(output.pointer);
+        return ret;
+}
+
+static int pcc_cpufreq_cpu_init(struct cpufreq_policy *policy)
+{
+        unsigned int cpu = policy->cpu;
+        unsigned int result = 0;
+
+        if (!pcch_virt_addr) {
+                result = -1;
+                goto pcch_null;
+        }
+
+        result = pcc_get_offset(cpu);
+        if (result) {
+                dprintk("init: PCCP evaluation failed\n");
+                goto free;
+        }
+
+        policy->max = policy->cpuinfo.max_freq =
+                ioread32(&pcch_hdr->nominal) * 1000;
+        policy->min = policy->cpuinfo.min_freq =
+                ioread32(&pcch_hdr->minimum_frequency) * 1000;
+        policy->cur = pcc_get_freq(cpu);
+
+        dprintk("init: policy->max is %d, policy->min is %d\n",
+                policy->max, policy->min);
+
+        return 0;
+free:
+        pcc_clear_mapping();
+        free_percpu(pcc_cpu_info);
+pcch_null:
+        return result;
+}
+
+static int pcc_cpufreq_cpu_exit(struct cpufreq_policy *policy)
+{
+        return 0;
+}
+
+static struct cpufreq_driver pcc_cpufreq_driver = {
+        .flags = CPUFREQ_CONST_LOOPS,
+        .get = pcc_get_freq,
+        .verify = pcc_cpufreq_verify,
+        .target = pcc_cpufreq_target,
+        .init = pcc_cpufreq_cpu_init,
+        .exit = pcc_cpufreq_cpu_exit,
+        .name = "pcc-cpufreq",
+        .owner = THIS_MODULE,
+};
+
+static int __init pcc_cpufreq_init(void)
+{
+        int ret;
+
+        if (acpi_disabled)
+                return 0;
+
+        ret = pcc_cpufreq_probe();
+        if (ret) {
+                dprintk("pcc_cpufreq_init: PCCH evaluation failed\n");
+                return ret;
+        }
+
+        ret = cpufreq_register_driver(&pcc_cpufreq_driver);
+
+        return ret;
+}
+
+static void __exit pcc_cpufreq_exit(void)
+{
+        cpufreq_unregister_driver(&pcc_cpufreq_driver);
+
+        pcc_clear_mapping();
+
+        free_percpu(pcc_cpu_info);
+}
+
+MODULE_AUTHOR("Matthew Garrett, Naga Chumbalkar");
+MODULE_VERSION(PCC_VERSION);
+MODULE_DESCRIPTION("Processor Clocking Control interface driver");
+MODULE_LICENSE("GPL");
+
+late_initcall(pcc_cpufreq_init);
+module_exit(pcc_cpufreq_exit);
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k6.c b/arch/x86/kernel/cpu/cpufreq/powernow-k6.c
index cb01dac267d..b3379d6a5c5 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k6.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k6.c
@@ -13,7 +13,6 @@
 #include <linux/init.h>
 #include <linux/cpufreq.h>
 #include <linux/ioport.h>
-#include <linux/slab.h>
 #include <linux/timex.h>
 #include <linux/io.h>
 
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c b/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
index 8d672ef162c..9b1ff37de46 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
@@ -20,6 +20,7 @@
 #include <linux/sched.h>        /* current */
 #include <linux/delay.h>
 #include <linux/compiler.h>
+#include <linux/gfp.h>
 
 #include <asm/msr.h>
 #include <asm/processor.h>
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c b/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c
index 2ce8e0b5cc5..561758e9518 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c
@@ -23,7 +23,6 @@
 #include <linux/init.h>
 #include <linux/cpufreq.h>
 #include <linux/pci.h>
-#include <linux/slab.h>
 #include <linux/sched.h>
 
 #include "speedstep-lib.h"
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c
index ad0083abfa2..a94ec6be69f 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c
@@ -13,7 +13,6 @@
 #include <linux/moduleparam.h>
 #include <linux/init.h>
 #include <linux/cpufreq.h>
-#include <linux/slab.h>
 
 #include <asm/msr.h>
 #include <asm/tsc.h>
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c b/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c
index 04d73c114e4..8abd869baab 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c
@@ -17,7 +17,6 @@
 #include <linux/moduleparam.h>
 #include <linux/init.h>
 #include <linux/cpufreq.h>
-#include <linux/slab.h>
 #include <linux/delay.h>
 #include <linux/io.h>
 #include <asm/ist.h>
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 879666f4d87..1366c7cfd48 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -47,6 +47,27 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
                 (c->x86 == 0x6 && c->x86_model >= 0x0e))
                 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
 
+        /*
+         * Atom erratum AAE44/AAF40/AAG38/AAH41:
+         *
+         * A race condition between speculative fetches and invalidating
+         * a large page.  This is worked around in microcode, but we
+         * need the microcode to have already been loaded... so if it is
+         * not, recommend a BIOS update and disable large pages.
+         */
+        if (c->x86 == 6 && c->x86_model == 0x1c && c->x86_mask <= 2) {
+                u32 ucode, junk;
+
+                wrmsr(MSR_IA32_UCODE_REV, 0, 0);
+                sync_core();
+                rdmsr(MSR_IA32_UCODE_REV, junk, ucode);
+
+                if (ucode < 0x20e) {
+                        printk(KERN_WARNING "Atom PSE erratum detected, BIOS microcode update recommended\n");
+                        clear_cpu_cap(c, X86_FEATURE_PSE);
+                }
+        }
+
 #ifdef CONFIG_X86_64
         set_cpu_cap(c, X86_FEATURE_SYSENTER32);
 #else
@@ -70,7 +91,8 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
         if (c->x86_power & (1 << 8)) {
                 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
                 set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC);
-                sched_clock_stable = 1;
+                if (!check_tsc_unstable())
+                        sched_clock_stable = 1;
         }
 
         /*
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index eddb1bdd1b8..b3eeb66c0a5 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -903,7 +903,7 @@ static ssize_t store(struct kobject *kobj, struct attribute *attr,
         return ret;
 }
 
-static struct sysfs_ops sysfs_ops = {
+static const struct sysfs_ops sysfs_ops = {
         .show   = show,
         .store  = store,
 };
diff --git a/arch/x86/kernel/cpu/mcheck/mce-inject.c b/arch/x86/kernel/cpu/mcheck/mce-inject.c
index 73734baa50f..e7dbde7bfed 100644
--- a/arch/x86/kernel/cpu/mcheck/mce-inject.c
+++ b/arch/x86/kernel/cpu/mcheck/mce-inject.c
@@ -22,6 +22,7 @@
 #include <linux/kdebug.h>
 #include <linux/cpu.h>
 #include <linux/sched.h>
+#include <linux/gfp.h>
 #include <asm/mce.h>
 #include <asm/apic.h>
 
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index a8aacd4b513..8a6f0afa767 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -26,6 +26,7 @@
 #include <linux/sched.h>
 #include <linux/sysfs.h>
 #include <linux/types.h>
+#include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/kmod.h>
 #include <linux/poll.h>
@@ -46,6 +47,13 @@
 
 #include "mce-internal.h"
 
+static DEFINE_MUTEX(mce_read_mutex);
+
+#define rcu_dereference_check_mce(p) \
+        rcu_dereference_check((p), \
+                              rcu_read_lock_sched_held() || \
+                              lockdep_is_held(&mce_read_mutex))
+
 #define CREATE_TRACE_POINTS
 #include <trace/events/mce.h>
 
@@ -158,7 +166,7 @@ void mce_log(struct mce *mce)
         mce->finished = 0;
         wmb();
         for (;;) {
-                entry = rcu_dereference(mcelog.next);
+                entry = rcu_dereference_check_mce(mcelog.next);
                 for (;;) {
                         /*
                          * When the buffer fills up discard new entries.
@@ -1485,8 +1493,6 @@ static void collect_tscs(void *data)
         rdtscll(cpu_tsc[smp_processor_id()]);
 }
 
-static DEFINE_MUTEX(mce_read_mutex);
-
 static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize,
                         loff_t *off)
 {
@@ -1500,7 +1506,7 @@ static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize,
                 return -ENOMEM;
 
         mutex_lock(&mce_read_mutex);
-        next = rcu_dereference(mcelog.next);
+        next = rcu_dereference_check_mce(mcelog.next);
 
         /* Only supports full reads right now */
         if (*off != 0 || usize < MCE_LOG_LEN*sizeof(struct mce)) {
@@ -1565,7 +1571,7 @@ timeout:
 static unsigned int mce_poll(struct file *file, poll_table *wait)
 {
         poll_wait(file, &mce_wait, wait);
-        if (rcu_dereference(mcelog.next))
+        if (rcu_dereference_check_mce(mcelog.next))
                 return POLLIN | POLLRDNORM;
         return 0;
 }
@@ -2044,6 +2050,7 @@ static __init void mce_init_banks(void)
                 struct mce_bank *b = &mce_banks[i];
                 struct sysdev_attribute *a = &b->attr;
 
+                sysfs_attr_init(&a->attr);
                 a->attr.name    = b->attrname;
                 snprintf(b->attrname, ATTR_LEN, "bank%d", i);
 
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 83a3d1f4efc..224392d8fe8 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -21,6 +21,7 @@
 #include <linux/errno.h>
 #include <linux/sched.h>
 #include <linux/sysfs.h>
+#include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/cpu.h>
 #include <linux/smp.h>
@@ -388,7 +389,7 @@ static ssize_t store(struct kobject *kobj, struct attribute *attr,
         return ret;
 }
 
-static struct sysfs_ops threshold_ops = {
+static const struct sysfs_ops threshold_ops = {
         .show                   = show,
         .store                  = store,
 };
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel.c b/arch/x86/kernel/cpu/mcheck/mce_intel.c
index 7c785634af2..62b48e40920 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel.c
@@ -5,6 +5,7 @@
  * Author: Andi Kleen
  */
 
+#include <linux/gfp.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <linux/percpu.h>
@@ -95,7 +96,7 @@ static void cmci_discover(int banks, int boot)
 
                 /* Already owned by someone else? */
                 if (val & CMCI_EN) {
-                        if (test_and_clear_bit(i, owned) || boot)
+                        if (test_and_clear_bit(i, owned) && !boot)
                                 print_update("SHD", &hdr, i);
                         __clear_bit(i, __get_cpu_var(mce_poll_banks));
                         continue;
@@ -107,7 +108,7 @@ static void cmci_discover(int banks, int boot)
 
                 /* Did the enable bit stick? -- the bank supports CMCI */
                 if (val & CMCI_EN) {
-                        if (!test_and_set_bit(i, owned) || boot)
+                        if (!test_and_set_bit(i, owned) && !boot)
                                 print_update("CMCI", &hdr, i);
                         __clear_bit(i, __get_cpu_var(mce_poll_banks));
                 } else {
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c
index 9aa5dc76ff4..fd31a441c61 100644
--- a/arch/x86/kernel/cpu/mtrr/generic.c
+++ b/arch/x86/kernel/cpu/mtrr/generic.c
@@ -6,7 +6,6 @@
 
 #include <linux/module.h>
 #include <linux/init.h>
-#include <linux/slab.h>
 #include <linux/io.h>
 #include <linux/mm.h>
 
diff --git a/arch/x86/kernel/cpu/mtrr/if.c b/arch/x86/kernel/cpu/mtrr/if.c
index e006e56f699..79289632cb2 100644
--- a/arch/x86/kernel/cpu/mtrr/if.c
+++ b/arch/x86/kernel/cpu/mtrr/if.c
@@ -5,6 +5,7 @@
 #include <linux/module.h>
 #include <linux/ctype.h>
 #include <linux/string.h>
+#include <linux/slab.h>
 #include <linux/init.h>
 
 #define LINE_SIZE 80
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c
index fe4622e8c83..79556bd9b60 100644
--- a/arch/x86/kernel/cpu/mtrr/main.c
+++ b/arch/x86/kernel/cpu/mtrr/main.c
@@ -145,6 +145,7 @@ struct set_mtrr_data {
 
 /**
  * ipi_handler - Synchronisation handler. Executed by "other" CPUs.
+ * @info: pointer to mtrr configuration data
  *
  * Returns nothing.
  */
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 641ccb9dddb..db5bdc8addf 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -21,6 +21,7 @@
 #include <linux/kdebug.h>
 #include <linux/sched.h>
 #include <linux/uaccess.h>
+#include <linux/slab.h>
 #include <linux/highmem.h>
 #include <linux/cpu.h>
 #include <linux/bitops.h>
@@ -28,6 +29,7 @@
 #include <asm/apic.h>
 #include <asm/stacktrace.h>
 #include <asm/nmi.h>
+#include <asm/compat.h>
 
 static u64 perf_event_mask __read_mostly;
 
@@ -73,10 +75,10 @@ struct debug_store {
 struct event_constraint {
         union {
                 unsigned long   idxmsk[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
-                u64             idxmsk64[1];
+                u64             idxmsk64;
         };
-        int     code;
-        int     cmask;
+        u64     code;
+        u64     cmask;
         int     weight;
 };
 
@@ -103,7 +105,7 @@ struct cpu_hw_events {
 };
 
 #define __EVENT_CONSTRAINT(c, n, m, w) {\
-        { .idxmsk64[0] = (n) },         \
+        { .idxmsk64 = (n) },            \
         .code = (c),                    \
         .cmask = (m),                   \
         .weight = (w),                  \
@@ -116,7 +118,7 @@ struct cpu_hw_events {
         EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVTSEL_MASK)
 
 #define FIXED_EVENT_CONSTRAINT(c, n)    \
-        EVENT_CONSTRAINT(c, n, INTEL_ARCH_FIXED_MASK)
+        EVENT_CONSTRAINT(c, (1ULL << (32+n)), INTEL_ARCH_FIXED_MASK)
 
 #define EVENT_CONSTRAINT_END            \
         EVENT_CONSTRAINT(0, 0, 0)
@@ -133,8 +135,8 @@ struct x86_pmu {
         int             (*handle_irq)(struct pt_regs *);
         void            (*disable_all)(void);
         void            (*enable_all)(void);
-        void            (*enable)(struct hw_perf_event *, int);
-        void            (*disable)(struct hw_perf_event *, int);
+        void            (*enable)(struct perf_event *);
+        void            (*disable)(struct perf_event *);
         unsigned        eventsel;
         unsigned        perfctr;
         u64             (*event_map)(int);
@@ -157,6 +159,11 @@ struct x86_pmu {
         void            (*put_event_constraints)(struct cpu_hw_events *cpuc,
                                                  struct perf_event *event);
         struct event_constraint *event_constraints;
+
+        int             (*cpu_prepare)(int cpu);
+        void            (*cpu_starting)(int cpu);
+        void            (*cpu_dying)(int cpu);
+        void            (*cpu_dead)(int cpu);
 };
 
 static struct x86_pmu x86_pmu __read_mostly;
@@ -165,8 +172,7 @@ static DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events) = {
         .enabled = 1,
 };
 
-static int x86_perf_event_set_period(struct perf_event *event,
-                             struct hw_perf_event *hwc, int idx);
+static int x86_perf_event_set_period(struct perf_event *event);
 
 /*
  * Generalized hw caching related hw_event table, filled
@@ -189,11 +195,12 @@ static u64 __read_mostly hw_cache_event_ids
  * Returns the delta events processed.
  */
 static u64
-x86_perf_event_update(struct perf_event *event,
-                        struct hw_perf_event *hwc, int idx)
+x86_perf_event_update(struct perf_event *event)
 {
+        struct hw_perf_event *hwc = &event->hw;
         int shift = 64 - x86_pmu.event_bits;
         u64 prev_raw_count, new_raw_count;
+        int idx = hwc->idx;
         s64 delta;
 
         if (idx == X86_PMC_IDX_FIXED_BTS)
@@ -293,7 +300,7 @@ static inline bool bts_available(void)
         return x86_pmu.enable_bts != NULL;
 }
 
-static inline void init_debug_store_on_cpu(int cpu)
+static void init_debug_store_on_cpu(int cpu)
 {
         struct debug_store *ds = per_cpu(cpu_hw_events, cpu).ds;
 
@@ -305,7 +312,7 @@ static inline void init_debug_store_on_cpu(int cpu)
                      (u32)((u64)(unsigned long)ds >> 32));
 }
 
-static inline void fini_debug_store_on_cpu(int cpu)
+static void fini_debug_store_on_cpu(int cpu)
 {
         if (!per_cpu(cpu_hw_events, cpu).ds)
                 return;
@@ -503,6 +510,9 @@ static int __hw_perf_event_init(struct perf_event *event)
          */
         if (attr->type == PERF_TYPE_RAW) {
                 hwc->config |= x86_pmu.raw_event(attr->config);
+                if ((hwc->config & ARCH_PERFMON_EVENTSEL_ANY) &&
+                    perf_paranoid_cpu() && !capable(CAP_SYS_ADMIN))
+                        return -EACCES;
                 return 0;
         }
 
@@ -553,9 +563,9 @@ static void x86_pmu_disable_all(void)
                 if (!test_bit(idx, cpuc->active_mask))
                         continue;
                 rdmsrl(x86_pmu.eventsel + idx, val);
-                if (!(val & ARCH_PERFMON_EVENTSEL0_ENABLE))
+                if (!(val & ARCH_PERFMON_EVENTSEL_ENABLE))
                         continue;
-                val &= ~ARCH_PERFMON_EVENTSEL0_ENABLE;
+                val &= ~ARCH_PERFMON_EVENTSEL_ENABLE;
                 wrmsrl(x86_pmu.eventsel + idx, val);
         }
 }
@@ -590,7 +600,7 @@ static void x86_pmu_enable_all(void)
                         continue;
 
                 val = event->hw.config;
-                val |= ARCH_PERFMON_EVENTSEL0_ENABLE;
+                val |= ARCH_PERFMON_EVENTSEL_ENABLE;
                 wrmsrl(x86_pmu.eventsel + idx, val);
         }
 }
@@ -612,8 +622,8 @@ static int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
         bitmap_zero(used_mask, X86_PMC_IDX_MAX);
 
         for (i = 0; i < n; i++) {
-                constraints[i] =
-                  x86_pmu.get_event_constraints(cpuc, cpuc->event_list[i]);
+                c = x86_pmu.get_event_constraints(cpuc, cpuc->event_list[i]);
+                constraints[i] = c;
         }
 
         /*
@@ -635,7 +645,7 @@ static int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
                 if (test_bit(hwc->idx, used_mask))
                         break;
 
-                set_bit(hwc->idx, used_mask);
+                __set_bit(hwc->idx, used_mask);
                 if (assign)
                         assign[i] = hwc->idx;
         }
@@ -676,7 +686,7 @@ static int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
                         if (c->weight != w)
                                 continue;
 
-                        for_each_bit(j, c->idxmsk, X86_PMC_IDX_MAX) {
+                        for_each_set_bit(j, c->idxmsk, X86_PMC_IDX_MAX) {
                                 if (!test_bit(j, used_mask))
                                         break;
                         }
@@ -684,7 +694,7 @@ static int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
                         if (j == X86_PMC_IDX_MAX)
                                 break;
 
-                        set_bit(j, used_mask);
+                        __set_bit(j, used_mask);
 
                         if (assign)
                                 assign[i] = j;
@@ -777,6 +787,7 @@ static inline int match_prev_assignment(struct hw_perf_event *hwc,
                 hwc->last_tag == cpuc->tags[i];
 }
 
+static int x86_pmu_start(struct perf_event *event);
 static void x86_pmu_stop(struct perf_event *event);
 
 void hw_perf_enable(void)
@@ -793,6 +804,7 @@ void hw_perf_enable(void)
                 return;
 
         if (cpuc->n_added) {
+                int n_running = cpuc->n_events - cpuc->n_added;
                 /*
                  * apply assignment obtained either from
                  * hw_perf_group_sched_in() or x86_pmu_enable()
@@ -800,8 +812,7 @@ void hw_perf_enable(void)
                  * step1: save events moving to new counters
                  * step2: reprogram moved events into new counters
                  */
-                for (i = 0; i < cpuc->n_events; i++) {
-
+                for (i = 0; i < n_running; i++) {
                         event = cpuc->event_list[i];
                         hwc = &event->hw;
 
@@ -816,29 +827,18 @@ void hw_perf_enable(void)
                                 continue;
 
                         x86_pmu_stop(event);
-
-                        hwc->idx = -1;
                 }
 
                 for (i = 0; i < cpuc->n_events; i++) {
-
                         event = cpuc->event_list[i];
                         hwc = &event->hw;
 
-                        if (hwc->idx == -1) {
+                        if (!match_prev_assignment(hwc, cpuc, i))
                                 x86_assign_hw_event(event, cpuc, i);
-                                x86_perf_event_set_period(event, hwc, hwc->idx);
-                        }
-                        /*
-                         * need to mark as active because x86_pmu_disable()
-                         * clear active_mask and events[] yet it preserves
-                         * idx
-                         */
-                        set_bit(hwc->idx, cpuc->active_mask);
-                        cpuc->events[hwc->idx] = event;
+                        else if (i < n_running)
+                                continue;
 
-                        x86_pmu.enable(hwc, hwc->idx);
-                        perf_event_update_userpage(event);
+                        x86_pmu_start(event);
                 }
                 cpuc->n_added = 0;
                 perf_events_lapic_init();
@@ -850,15 +850,16 @@ void hw_perf_enable(void)
         x86_pmu.enable_all();
 }
 
-static inline void __x86_pmu_enable_event(struct hw_perf_event *hwc, int idx)
+static inline void __x86_pmu_enable_event(struct hw_perf_event *hwc)
 {
-        (void)checking_wrmsrl(hwc->config_base + idx,
-                              hwc->config | ARCH_PERFMON_EVENTSEL0_ENABLE);
+        (void)checking_wrmsrl(hwc->config_base + hwc->idx,
+                              hwc->config | ARCH_PERFMON_EVENTSEL_ENABLE);
 }
 
-static inline void x86_pmu_disable_event(struct hw_perf_event *hwc, int idx)
+static inline void x86_pmu_disable_event(struct perf_event *event)
 {
-        (void)checking_wrmsrl(hwc->config_base + idx, hwc->config);
+        struct hw_perf_event *hwc = &event->hw;
+        (void)checking_wrmsrl(hwc->config_base + hwc->idx, hwc->config);
 }
 
 static DEFINE_PER_CPU(u64 [X86_PMC_IDX_MAX], pmc_prev_left);
@@ -868,12 +869,12 @@ static DEFINE_PER_CPU(u64 [X86_PMC_IDX_MAX], pmc_prev_left);
  * To be called with the event disabled in hw:
  */
 static int
-x86_perf_event_set_period(struct perf_event *event,
-                             struct hw_perf_event *hwc, int idx)
+x86_perf_event_set_period(struct perf_event *event)
 {
+        struct hw_perf_event *hwc = &event->hw;
         s64 left = atomic64_read(&hwc->period_left);
         s64 period = hwc->sample_period;
-        int err, ret = 0;
+        int err, ret = 0, idx = hwc->idx;
 
         if (idx == X86_PMC_IDX_FIXED_BTS)
                 return 0;
@@ -919,11 +920,11 @@ x86_perf_event_set_period(struct perf_event *event,
         return ret;
 }
 
-static void x86_pmu_enable_event(struct hw_perf_event *hwc, int idx)
+static void x86_pmu_enable_event(struct perf_event *event)
 {
         struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
         if (cpuc->enabled)
-                __x86_pmu_enable_event(hwc, idx);
+                __x86_pmu_enable_event(&event->hw);
 }
 
 /*
@@ -959,34 +960,32 @@ static int x86_pmu_enable(struct perf_event *event)
         memcpy(cpuc->assign, assign, n*sizeof(int));
 
         cpuc->n_events = n;
-        cpuc->n_added  = n - n0;
+        cpuc->n_added += n - n0;
 
         return 0;
 }
 
 static int x86_pmu_start(struct perf_event *event)
 {
-        struct hw_perf_event *hwc = &event->hw;
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+        int idx = event->hw.idx;
 
-        if (hwc->idx == -1)
+        if (idx == -1)
                 return -EAGAIN;
 
-        x86_perf_event_set_period(event, hwc, hwc->idx);
-        x86_pmu.enable(hwc, hwc->idx);
+        x86_perf_event_set_period(event);
+        cpuc->events[idx] = event;
+        __set_bit(idx, cpuc->active_mask);
+        x86_pmu.enable(event);
+        perf_event_update_userpage(event);
 
         return 0;
 }
 
 static void x86_pmu_unthrottle(struct perf_event *event)
 {
-        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
-        struct hw_perf_event *hwc = &event->hw;
-
-        if (WARN_ON_ONCE(hwc->idx >= X86_PMC_IDX_MAX ||
-                                cpuc->events[hwc->idx] != event))
-                return;
-
-        x86_pmu.enable(hwc, hwc->idx);
+        int ret = x86_pmu_start(event);
+        WARN_ON_ONCE(ret);
 }
 
 void perf_event_print_debug(void)
@@ -1046,18 +1045,16 @@ static void x86_pmu_stop(struct perf_event *event)
         struct hw_perf_event *hwc = &event->hw;
         int idx = hwc->idx;
 
-        /*
-         * Must be done before we disable, otherwise the nmi handler
-         * could reenable again:
-         */
-        clear_bit(idx, cpuc->active_mask);
-        x86_pmu.disable(hwc, idx);
+        if (!__test_and_clear_bit(idx, cpuc->active_mask))
+                return;
+
+        x86_pmu.disable(event);
 
         /*
          * Drain the remaining delta count out of a event
          * that we are disabling:
          */
-        x86_perf_event_update(event, hwc, idx);
+        x86_perf_event_update(event);
 
         cpuc->events[idx] = NULL;
 }
@@ -1094,8 +1091,7 @@ static int x86_pmu_handle_irq(struct pt_regs *regs)
         int idx, handled = 0;
         u64 val;
 
-        data.addr = 0;
-        data.raw = NULL;
+        perf_sample_data_init(&data, 0);
 
         cpuc = &__get_cpu_var(cpu_hw_events);
 
@@ -1106,7 +1102,7 @@ static int x86_pmu_handle_irq(struct pt_regs *regs)
                 event = cpuc->events[idx];
                 hwc = &event->hw;
 
-                val = x86_perf_event_update(event, hwc, idx);
+                val = x86_perf_event_update(event);
                 if (val & (1ULL << (x86_pmu.event_bits - 1)))
                         continue;
 
@@ -1116,11 +1112,11 @@ static int x86_pmu_handle_irq(struct pt_regs *regs)
                 handled         = 1;
                 data.period     = event->hw.last_period;
 
-                if (!x86_perf_event_set_period(event, hwc, idx))
+                if (!x86_perf_event_set_period(event))
                         continue;
 
                 if (perf_event_overflow(event, 1, &data, regs))
-                        x86_pmu.disable(hwc, idx);
+                        x86_pmu_stop(event);
         }
 
         if (handled)
@@ -1307,7 +1303,7 @@ int hw_perf_group_sched_in(struct perf_event *leader,
         memcpy(cpuc->assign, assign, n0*sizeof(int));
 
         cpuc->n_events  = n0;
-        cpuc->n_added   = n1;
+        cpuc->n_added  += n1;
         ctx->nr_active += n1;
 
         /*
@@ -1335,6 +1331,41 @@ undo:
 #include "perf_event_p6.c"
 #include "perf_event_intel.c"
 
+static int __cpuinit
+x86_pmu_notifier(struct notifier_block *self, unsigned long action, void *hcpu)
+{
+        unsigned int cpu = (long)hcpu;
+        int ret = NOTIFY_OK;
+
+        switch (action & ~CPU_TASKS_FROZEN) {
+        case CPU_UP_PREPARE:
+                if (x86_pmu.cpu_prepare)
+                        ret = x86_pmu.cpu_prepare(cpu);
+                break;
+
+        case CPU_STARTING:
+                if (x86_pmu.cpu_starting)
+                        x86_pmu.cpu_starting(cpu);
+                break;
+
+        case CPU_DYING:
+                if (x86_pmu.cpu_dying)
+                        x86_pmu.cpu_dying(cpu);
+                break;
+
+        case CPU_UP_CANCELED:
+        case CPU_DEAD:
+                if (x86_pmu.cpu_dead)
+                        x86_pmu.cpu_dead(cpu);
+                break;
+
+        default:
+                break;
+        }
+
+        return ret;
+}
+
 static void __init pmu_check_apic(void)
 {
         if (cpu_has_apic)
@@ -1347,6 +1378,7 @@ static void __init pmu_check_apic(void)
 
 void __init init_hw_perf_events(void)
 {
+        struct event_constraint *c;
         int err;
 
         pr_info("Performance Events: ");
@@ -1395,6 +1427,16 @@ void __init init_hw_perf_events(void)
                 __EVENT_CONSTRAINT(0, (1ULL << x86_pmu.num_events) - 1,
                                    0, x86_pmu.num_events);
 
+        if (x86_pmu.event_constraints) {
+                for_each_event_constraint(c, x86_pmu.event_constraints) {
+                        if (c->cmask != INTEL_ARCH_FIXED_MASK)
+                                continue;
+
+                        c->idxmsk64 |= (1ULL << x86_pmu.num_events) - 1;
+                        c->weight += x86_pmu.num_events;
+                }
+        }
+
         pr_info("... version:                %d\n",     x86_pmu.version);
         pr_info("... bit width:              %d\n",     x86_pmu.event_bits);
         pr_info("... generic registers:      %d\n",     x86_pmu.num_events);
@@ -1402,11 +1444,13 @@ void __init init_hw_perf_events(void)
         pr_info("... max period:             %016Lx\n", x86_pmu.max_period);
         pr_info("... fixed-purpose events:   %d\n",     x86_pmu.num_events_fixed);
         pr_info("... event mask:             %016Lx\n", perf_event_mask);
+
+        perf_cpu_notifier(x86_pmu_notifier);
 }
 
 static inline void x86_pmu_read(struct perf_event *event)
 {
-        x86_perf_event_update(event, &event->hw, event->hw.idx);
+        x86_perf_event_update(event);
 }
 
 static const struct pmu pmu = {
@@ -1588,14 +1632,42 @@ copy_from_user_nmi(void *to, const void __user *from, unsigned long n)
         return len;
 }
 
-static int copy_stack_frame(const void __user *fp, struct stack_frame *frame)
+#ifdef CONFIG_COMPAT
+static inline int
+perf_callchain_user32(struct pt_regs *regs, struct perf_callchain_entry *entry)
 {
-        unsigned long bytes;
+        /* 32-bit process in 64-bit kernel. */
+        struct stack_frame_ia32 frame;
+        const void __user *fp;
 
-        bytes = copy_from_user_nmi(frame, fp, sizeof(*frame));
+        if (!test_thread_flag(TIF_IA32))
+                return 0;
 
-        return bytes == sizeof(*frame);
+        fp = compat_ptr(regs->bp);
+        while (entry->nr < PERF_MAX_STACK_DEPTH) {
+                unsigned long bytes;
+                frame.next_frame     = 0;
+                frame.return_address = 0;
+
+                bytes = copy_from_user_nmi(&frame, fp, sizeof(frame));
+                if (bytes != sizeof(frame))
+                        break;
+
+                if (fp < compat_ptr(regs->sp))
+                        break;
+
+                callchain_store(entry, frame.return_address);
+                fp = compat_ptr(frame.next_frame);
+        }
+        return 1;
+}
+#else
+static inline int
+perf_callchain_user32(struct pt_regs *regs, struct perf_callchain_entry *entry)
+{
+    return 0;
 }
+#endif
 
 static void
 perf_callchain_user(struct pt_regs *regs, struct perf_callchain_entry *entry)
@@ -1611,11 +1683,16 @@ perf_callchain_user(struct pt_regs *regs, struct perf_callchain_entry *entry)
         callchain_store(entry, PERF_CONTEXT_USER);
         callchain_store(entry, regs->ip);
 
+        if (perf_callchain_user32(regs, entry))
+                return;
+
         while (entry->nr < PERF_MAX_STACK_DEPTH) {
+                unsigned long bytes;
                 frame.next_frame             = NULL;
                 frame.return_address = 0;
 
-                if (!copy_stack_frame(fp, &frame))
+                bytes = copy_from_user_nmi(&frame, fp, sizeof(frame));
+                if (bytes != sizeof(frame))
                         break;
 
                 if ((unsigned long)fp < regs->sp)
@@ -1662,28 +1739,14 @@ struct perf_callchain_entry *perf_callchain(struct pt_regs *regs)
         return entry;
 }
 
-void hw_perf_event_setup_online(int cpu)
-{
-        init_debug_store_on_cpu(cpu);
-
-        switch (boot_cpu_data.x86_vendor) {
-        case X86_VENDOR_AMD:
-                amd_pmu_cpu_online(cpu);
-                break;
-        default:
-                return;
-        }
-}
-
-void hw_perf_event_setup_offline(int cpu)
+void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip, int skip)
 {
-        init_debug_store_on_cpu(cpu);
-
-        switch (boot_cpu_data.x86_vendor) {
-        case X86_VENDOR_AMD:
-                amd_pmu_cpu_offline(cpu);
-                break;
-        default:
-                return;
-        }
+        regs->ip = ip;
+        /*
+         * perf_arch_fetch_caller_regs adds another call, we need to increment
+         * the skip level
+         */
+        regs->bp = rewind_frame_pointer(skip + 1);
+        regs->cs = __KERNEL_CS;
+        local_save_flags(regs->flags);
 }
diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c
index 8f3dbfda3c4..db6f7d4056e 100644
--- a/arch/x86/kernel/cpu/perf_event_amd.c
+++ b/arch/x86/kernel/cpu/perf_event_amd.c
@@ -137,6 +137,13 @@ static inline int amd_is_nb_event(struct hw_perf_event *hwc)
         return (hwc->config & 0xe0) == 0xe0;
 }
 
+static inline int amd_has_nb(struct cpu_hw_events *cpuc)
+{
+        struct amd_nb *nb = cpuc->amd_nb;
+
+        return nb && nb->nb_id != -1;
+}
+
 static void amd_put_event_constraints(struct cpu_hw_events *cpuc,
                                       struct perf_event *event)
 {
@@ -147,7 +154,7 @@ static void amd_put_event_constraints(struct cpu_hw_events *cpuc,
         /*
          * only care about NB events
          */
-        if (!(nb && amd_is_nb_event(hwc)))
+        if (!(amd_has_nb(cpuc) && amd_is_nb_event(hwc)))
                 return;
 
         /*
@@ -214,7 +221,7 @@ amd_get_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event)
         /*
          * if not NB event or no NB, then no constraints
          */
-        if (!(nb && amd_is_nb_event(hwc)))
+        if (!(amd_has_nb(cpuc) && amd_is_nb_event(hwc)))
                 return &unconstrained;
 
         /*
@@ -271,28 +278,6 @@ done:
         return &emptyconstraint;
 }
 
-static __initconst struct x86_pmu amd_pmu = {
-        .name                   = "AMD",
-        .handle_irq             = x86_pmu_handle_irq,
-        .disable_all            = x86_pmu_disable_all,
-        .enable_all             = x86_pmu_enable_all,
-        .enable                 = x86_pmu_enable_event,
-        .disable                = x86_pmu_disable_event,
-        .eventsel               = MSR_K7_EVNTSEL0,
-        .perfctr                = MSR_K7_PERFCTR0,
-        .event_map              = amd_pmu_event_map,
-        .raw_event              = amd_pmu_raw_event,
-        .max_events             = ARRAY_SIZE(amd_perfmon_event_map),
-        .num_events             = 4,
-        .event_bits             = 48,
-        .event_mask             = (1ULL << 48) - 1,
-        .apic                   = 1,
-        /* use highest bit to detect overflow */
-        .max_period             = (1ULL << 47) - 1,
-        .get_event_constraints  = amd_get_event_constraints,
-        .put_event_constraints  = amd_put_event_constraints
-};
-
 static struct amd_nb *amd_alloc_nb(int cpu, int nb_id)
 {
         struct amd_nb *nb;
@@ -309,57 +294,61 @@ static struct amd_nb *amd_alloc_nb(int cpu, int nb_id)
          * initialize all possible NB constraints
          */
         for (i = 0; i < x86_pmu.num_events; i++) {
-                set_bit(i, nb->event_constraints[i].idxmsk);
+                __set_bit(i, nb->event_constraints[i].idxmsk);
                 nb->event_constraints[i].weight = 1;
         }
         return nb;
 }
 
-static void amd_pmu_cpu_online(int cpu)
+static int amd_pmu_cpu_prepare(int cpu)
 {
-        struct cpu_hw_events *cpu1, *cpu2;
-        struct amd_nb *nb = NULL;
+        struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);
+
+        WARN_ON_ONCE(cpuc->amd_nb);
+
+        if (boot_cpu_data.x86_max_cores < 2)
+                return NOTIFY_OK;
+
+        cpuc->amd_nb = amd_alloc_nb(cpu, -1);
+        if (!cpuc->amd_nb)
+                return NOTIFY_BAD;
+
+        return NOTIFY_OK;
+}
+
+static void amd_pmu_cpu_starting(int cpu)
+{
+        struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);
+        struct amd_nb *nb;
         int i, nb_id;
 
         if (boot_cpu_data.x86_max_cores < 2)
                 return;
 
-        /*
-         * function may be called too early in the
-         * boot process, in which case nb_id is bogus
-         */
         nb_id = amd_get_nb_id(cpu);
-        if (nb_id == BAD_APICID)
-                return;
-
-        cpu1 = &per_cpu(cpu_hw_events, cpu);
-        cpu1->amd_nb = NULL;
+        WARN_ON_ONCE(nb_id == BAD_APICID);
 
         raw_spin_lock(&amd_nb_lock);
 
         for_each_online_cpu(i) {
-                cpu2 = &per_cpu(cpu_hw_events, i);
-                nb = cpu2->amd_nb;
-                if (!nb)
+                nb = per_cpu(cpu_hw_events, i).amd_nb;
+                if (WARN_ON_ONCE(!nb))
                         continue;
-                if (nb->nb_id == nb_id)
-                        goto found;
-        }
 
-        nb = amd_alloc_nb(cpu, nb_id);
-        if (!nb) {
-                pr_err("perf_events: failed NB allocation for CPU%d\n", cpu);
-                raw_spin_unlock(&amd_nb_lock);
-                return;
+                if (nb->nb_id == nb_id) {
+                        kfree(cpuc->amd_nb);
+                        cpuc->amd_nb = nb;
+                        break;
+                }
         }
-found:
-        nb->refcnt++;
-        cpu1->amd_nb = nb;
+
+        cpuc->amd_nb->nb_id = nb_id;
+        cpuc->amd_nb->refcnt++;
 
         raw_spin_unlock(&amd_nb_lock);
 }
 
-static void amd_pmu_cpu_offline(int cpu)
+static void amd_pmu_cpu_dead(int cpu)
 {
         struct cpu_hw_events *cpuhw;
 
@@ -370,14 +359,44 @@ static void amd_pmu_cpu_offline(int cpu)
 
         raw_spin_lock(&amd_nb_lock);
 
-        if (--cpuhw->amd_nb->refcnt == 0)
-                kfree(cpuhw->amd_nb);
+        if (cpuhw->amd_nb) {
+                struct amd_nb *nb = cpuhw->amd_nb;
+
+                if (nb->nb_id == -1 || --nb->refcnt == 0)
+                        kfree(nb);
 
-        cpuhw->amd_nb = NULL;
+                cpuhw->amd_nb = NULL;
+        }
 
         raw_spin_unlock(&amd_nb_lock);
 }
 
+static __initconst struct x86_pmu amd_pmu = {
+        .name                   = "AMD",
+        .handle_irq             = x86_pmu_handle_irq,
+        .disable_all            = x86_pmu_disable_all,
+        .enable_all             = x86_pmu_enable_all,
+        .enable                 = x86_pmu_enable_event,
+        .disable                = x86_pmu_disable_event,
+        .eventsel               = MSR_K7_EVNTSEL0,
+        .perfctr                = MSR_K7_PERFCTR0,
+        .event_map              = amd_pmu_event_map,
+        .raw_event              = amd_pmu_raw_event,
+        .max_events             = ARRAY_SIZE(amd_perfmon_event_map),
+        .num_events             = 4,
+        .event_bits             = 48,
+        .event_mask             = (1ULL << 48) - 1,
+        .apic                   = 1,
+        /* use highest bit to detect overflow */
+        .max_period             = (1ULL << 47) - 1,
+        .get_event_constraints  = amd_get_event_constraints,
+        .put_event_constraints  = amd_put_event_constraints,
+
+        .cpu_prepare            = amd_pmu_cpu_prepare,
+        .cpu_starting           = amd_pmu_cpu_starting,
+        .cpu_dead               = amd_pmu_cpu_dead,
+};
+
 static __init int amd_pmu_init(void)
 {
         /* Performance-monitoring supported from K7 and later: */
@@ -390,11 +409,6 @@ static __init int amd_pmu_init(void)
         memcpy(hw_cache_event_ids, amd_hw_cache_event_ids,
                sizeof(hw_cache_event_ids));
 
-        /*
-         * explicitly initialize the boot cpu, other cpus will get
-         * the cpu hotplug callbacks from smp_init()
-         */
-        amd_pmu_cpu_online(smp_processor_id());
         return 0;
 }
 
@@ -405,12 +419,4 @@ static int amd_pmu_init(void)
         return 0;
 }
 
-static void amd_pmu_cpu_online(int cpu)
-{
-}
-
-static void amd_pmu_cpu_offline(int cpu)
-{
-}
-
 #endif
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index cf6590cf4a5..9c794ac8783 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1,7 +1,7 @@
 #ifdef CONFIG_CPU_SUP_INTEL
 
 /*
- * Intel PerfMon v3. Used on Core2 and later.
+ * Intel PerfMon, used on Core and later.
  */
 static const u64 intel_perfmon_event_map[] =
 {
@@ -27,8 +27,14 @@ static struct event_constraint intel_core_event_constraints[] =
 
 static struct event_constraint intel_core2_event_constraints[] =
 {
-        FIXED_EVENT_CONSTRAINT(0xc0, (0x3|(1ULL<<32))), /* INSTRUCTIONS_RETIRED */
-        FIXED_EVENT_CONSTRAINT(0x3c, (0x3|(1ULL<<33))), /* UNHALTED_CORE_CYCLES */
+        FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
+        FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
+        /*
+         * Core2 has Fixed Counter 2 listed as CPU_CLK_UNHALTED.REF and event
+         * 0x013c as CPU_CLK_UNHALTED.BUS and specifies there is a fixed
+         * ratio between these counters.
+         */
+        /* FIXED_EVENT_CONSTRAINT(0x013c, 2),  CPU_CLK_UNHALTED.REF */
         INTEL_EVENT_CONSTRAINT(0x10, 0x1), /* FP_COMP_OPS_EXE */
         INTEL_EVENT_CONSTRAINT(0x11, 0x2), /* FP_ASSIST */
         INTEL_EVENT_CONSTRAINT(0x12, 0x2), /* MUL */
@@ -37,14 +43,16 @@ static struct event_constraint intel_core2_event_constraints[] =
         INTEL_EVENT_CONSTRAINT(0x18, 0x1), /* IDLE_DURING_DIV */
         INTEL_EVENT_CONSTRAINT(0x19, 0x2), /* DELAYED_BYPASS */
         INTEL_EVENT_CONSTRAINT(0xa1, 0x1), /* RS_UOPS_DISPATCH_CYCLES */
+        INTEL_EVENT_CONSTRAINT(0xc9, 0x1), /* ITLB_MISS_RETIRED (T30-9) */
         INTEL_EVENT_CONSTRAINT(0xcb, 0x1), /* MEM_LOAD_RETIRED */
         EVENT_CONSTRAINT_END
 };
 
 static struct event_constraint intel_nehalem_event_constraints[] =
 {
-        FIXED_EVENT_CONSTRAINT(0xc0, (0xf|(1ULL<<32))), /* INSTRUCTIONS_RETIRED */
-        FIXED_EVENT_CONSTRAINT(0x3c, (0xf|(1ULL<<33))), /* UNHALTED_CORE_CYCLES */
+        FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
+        FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
+        /* FIXED_EVENT_CONSTRAINT(0x013c, 2), CPU_CLK_UNHALTED.REF */
         INTEL_EVENT_CONSTRAINT(0x40, 0x3), /* L1D_CACHE_LD */
         INTEL_EVENT_CONSTRAINT(0x41, 0x3), /* L1D_CACHE_ST */
         INTEL_EVENT_CONSTRAINT(0x42, 0x3), /* L1D_CACHE_LOCK */
@@ -58,8 +66,9 @@ static struct event_constraint intel_nehalem_event_constraints[] =
 
 static struct event_constraint intel_westmere_event_constraints[] =
 {
-        FIXED_EVENT_CONSTRAINT(0xc0, (0xf|(1ULL<<32))), /* INSTRUCTIONS_RETIRED */
-        FIXED_EVENT_CONSTRAINT(0x3c, (0xf|(1ULL<<33))), /* UNHALTED_CORE_CYCLES */
+        FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
+        FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
+        /* FIXED_EVENT_CONSTRAINT(0x013c, 2), CPU_CLK_UNHALTED.REF */
         INTEL_EVENT_CONSTRAINT(0x51, 0x3), /* L1D */
         INTEL_EVENT_CONSTRAINT(0x60, 0x1), /* OFFCORE_REQUESTS_OUTSTANDING */
         INTEL_EVENT_CONSTRAINT(0x63, 0x3), /* CACHE_LOCK_CYCLES */
@@ -68,8 +77,9 @@ static struct event_constraint intel_westmere_event_constraints[] =
 
 static struct event_constraint intel_gen_event_constraints[] =
 {
-        FIXED_EVENT_CONSTRAINT(0xc0, (0x3|(1ULL<<32))), /* INSTRUCTIONS_RETIRED */
-        FIXED_EVENT_CONSTRAINT(0x3c, (0x3|(1ULL<<33))), /* UNHALTED_CORE_CYCLES */
+        FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
+        FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
+        /* FIXED_EVENT_CONSTRAINT(0x013c, 2), CPU_CLK_UNHALTED.REF */
         EVENT_CONSTRAINT_END
 };
 
@@ -538,9 +548,9 @@ static inline void intel_pmu_ack_status(u64 ack)
 }
 
 static inline void
-intel_pmu_disable_fixed(struct hw_perf_event *hwc, int __idx)
+intel_pmu_disable_fixed(struct hw_perf_event *hwc)
 {
-        int idx = __idx - X86_PMC_IDX_FIXED;
+        int idx = hwc->idx - X86_PMC_IDX_FIXED;
         u64 ctrl_val, mask;
 
         mask = 0xfULL << (idx * 4);
@@ -580,10 +590,9 @@ static void intel_pmu_drain_bts_buffer(void)
 
         ds->bts_index = ds->bts_buffer_base;
 
+        perf_sample_data_init(&data, 0);
 
         data.period     = event->hw.last_period;
-        data.addr       = 0;
-        data.raw        = NULL;
         regs.ip         = 0;
 
         /*
@@ -612,26 +621,28 @@ static void intel_pmu_drain_bts_buffer(void)
 }
 
 static inline void
-intel_pmu_disable_event(struct hw_perf_event *hwc, int idx)
+intel_pmu_disable_event(struct perf_event *event)
 {
-        if (unlikely(idx == X86_PMC_IDX_FIXED_BTS)) {
+        struct hw_perf_event *hwc = &event->hw;
+
+        if (unlikely(hwc->idx == X86_PMC_IDX_FIXED_BTS)) {
                 intel_pmu_disable_bts();
                 intel_pmu_drain_bts_buffer();
                 return;
         }
 
         if (unlikely(hwc->config_base == MSR_ARCH_PERFMON_FIXED_CTR_CTRL)) {
-                intel_pmu_disable_fixed(hwc, idx);
+                intel_pmu_disable_fixed(hwc);
                 return;
         }
 
-        x86_pmu_disable_event(hwc, idx);
+        x86_pmu_disable_event(event);
 }
 
 static inline void
-intel_pmu_enable_fixed(struct hw_perf_event *hwc, int __idx)
+intel_pmu_enable_fixed(struct hw_perf_event *hwc)
 {
-        int idx = __idx - X86_PMC_IDX_FIXED;
+        int idx = hwc->idx - X86_PMC_IDX_FIXED;
         u64 ctrl_val, bits, mask;
         int err;
 
@@ -661,9 +672,11 @@ intel_pmu_enable_fixed(struct hw_perf_event *hwc, int __idx)
         err = checking_wrmsrl(hwc->config_base, ctrl_val);
 }
 
-static void intel_pmu_enable_event(struct hw_perf_event *hwc, int idx)
+static void intel_pmu_enable_event(struct perf_event *event)
 {
-        if (unlikely(idx == X86_PMC_IDX_FIXED_BTS)) {
+        struct hw_perf_event *hwc = &event->hw;
+
+        if (unlikely(hwc->idx == X86_PMC_IDX_FIXED_BTS)) {
                 if (!__get_cpu_var(cpu_hw_events).enabled)
                         return;
 
@@ -672,11 +685,11 @@ static void intel_pmu_enable_event(struct hw_perf_event *hwc, int idx)
         }
 
         if (unlikely(hwc->config_base == MSR_ARCH_PERFMON_FIXED_CTR_CTRL)) {
-                intel_pmu_enable_fixed(hwc, idx);
+                intel_pmu_enable_fixed(hwc);
                 return;
         }
 
-        __x86_pmu_enable_event(hwc, idx);
+        __x86_pmu_enable_event(hwc);
 }
 
 /*
@@ -685,14 +698,8 @@ static void intel_pmu_enable_event(struct hw_perf_event *hwc, int idx)
  */
 static int intel_pmu_save_and_restart(struct perf_event *event)
 {
-        struct hw_perf_event *hwc = &event->hw;
-        int idx = hwc->idx;
-        int ret;
-
-        x86_perf_event_update(event, hwc, idx);
-        ret = x86_perf_event_set_period(event, hwc, idx);
-
-        return ret;
+        x86_perf_event_update(event);
+        return x86_perf_event_set_period(event);
 }
 
 static void intel_pmu_reset(void)
@@ -732,16 +739,15 @@ static int intel_pmu_handle_irq(struct pt_regs *regs)
         int bit, loops;
         u64 ack, status;
 
-        data.addr = 0;
-        data.raw = NULL;
+        perf_sample_data_init(&data, 0);
 
         cpuc = &__get_cpu_var(cpu_hw_events);
 
-        perf_disable();
+        intel_pmu_disable_all();
         intel_pmu_drain_bts_buffer();
         status = intel_pmu_get_status();
         if (!status) {
-                perf_enable();
+                intel_pmu_enable_all();
                 return 0;
         }
 
@@ -751,16 +757,14 @@ again:
                 WARN_ONCE(1, "perfevents: irq loop stuck!\n");
                 perf_event_print_debug();
                 intel_pmu_reset();
-                perf_enable();
-                return 1;
+                goto done;
         }
 
         inc_irq_stat(apic_perf_irqs);
         ack = status;
-        for_each_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) {
+        for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) {
                 struct perf_event *event = cpuc->events[bit];
 
-                clear_bit(bit, (unsigned long *) &status);
                 if (!test_bit(bit, cpuc->active_mask))
                         continue;
 
@@ -770,7 +774,7 @@ again:
                 data.period = event->hw.last_period;
 
                 if (perf_event_overflow(event, 1, &data, regs))
-                        intel_pmu_disable_event(&event->hw, bit);
+                        x86_pmu_stop(event);
         }
 
         intel_pmu_ack_status(ack);
@@ -782,8 +786,8 @@ again:
         if (status)
                 goto again;
 
-        perf_enable();
-
+done:
+        intel_pmu_enable_all();
         return 1;
 }
 
@@ -862,7 +866,10 @@ static __initconst struct x86_pmu intel_pmu = {
         .max_period             = (1ULL << 31) - 1,
         .enable_bts             = intel_pmu_enable_bts,
         .disable_bts            = intel_pmu_disable_bts,
-        .get_event_constraints  = intel_get_event_constraints
+        .get_event_constraints  = intel_get_event_constraints,
+
+        .cpu_starting           = init_debug_store_on_cpu,
+        .cpu_dying              = fini_debug_store_on_cpu,
 };
 
 static __init int intel_pmu_init(void)
@@ -929,13 +936,14 @@ static __init int intel_pmu_init(void)
 
         case 26: /* 45 nm nehalem, "Bloomfield" */
         case 30: /* 45 nm nehalem, "Lynnfield" */
+        case 46: /* 45 nm nehalem-ex, "Beckton" */
                 memcpy(hw_cache_event_ids, nehalem_hw_cache_event_ids,
                        sizeof(hw_cache_event_ids));
 
                 x86_pmu.event_constraints = intel_nehalem_event_constraints;
                 pr_cont("Nehalem/Corei7 events, ");
                 break;
-        case 28:
+        case 28: /* Atom */
                 memcpy(hw_cache_event_ids, atom_hw_cache_event_ids,
                        sizeof(hw_cache_event_ids));
 
@@ -951,6 +959,7 @@ static __init int intel_pmu_init(void)
                 x86_pmu.event_constraints = intel_westmere_event_constraints;
                 pr_cont("Westmere events, ");
                 break;
+
         default:
                 /*
                  * default constraints for v2 and up
diff --git a/arch/x86/kernel/cpu/perf_event_p6.c b/arch/x86/kernel/cpu/perf_event_p6.c
index 1ca5ba078af..a330485d14d 100644
--- a/arch/x86/kernel/cpu/perf_event_p6.c
+++ b/arch/x86/kernel/cpu/perf_event_p6.c
@@ -62,7 +62,7 @@ static void p6_pmu_disable_all(void)
 
         /* p6 only has one enable register */
         rdmsrl(MSR_P6_EVNTSEL0, val);
-        val &= ~ARCH_PERFMON_EVENTSEL0_ENABLE;
+        val &= ~ARCH_PERFMON_EVENTSEL_ENABLE;
         wrmsrl(MSR_P6_EVNTSEL0, val);
 }
 
@@ -72,32 +72,34 @@ static void p6_pmu_enable_all(void)
 
         /* p6 only has one enable register */
         rdmsrl(MSR_P6_EVNTSEL0, val);
-        val |= ARCH_PERFMON_EVENTSEL0_ENABLE;
+        val |= ARCH_PERFMON_EVENTSEL_ENABLE;
         wrmsrl(MSR_P6_EVNTSEL0, val);
 }
 
 static inline void
-p6_pmu_disable_event(struct hw_perf_event *hwc, int idx)
+p6_pmu_disable_event(struct perf_event *event)
 {
         struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+        struct hw_perf_event *hwc = &event->hw;
         u64 val = P6_NOP_EVENT;
 
         if (cpuc->enabled)
-                val |= ARCH_PERFMON_EVENTSEL0_ENABLE;
+                val |= ARCH_PERFMON_EVENTSEL_ENABLE;
 
-        (void)checking_wrmsrl(hwc->config_base + idx, val);
+        (void)checking_wrmsrl(hwc->config_base + hwc->idx, val);
 }
 
-static void p6_pmu_enable_event(struct hw_perf_event *hwc, int idx)
+static void p6_pmu_enable_event(struct perf_event *event)
 {
         struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+        struct hw_perf_event *hwc = &event->hw;
         u64 val;
 
         val = hwc->config;
         if (cpuc->enabled)
-                val |= ARCH_PERFMON_EVENTSEL0_ENABLE;
+                val |= ARCH_PERFMON_EVENTSEL_ENABLE;
 
-        (void)checking_wrmsrl(hwc->config_base + idx, val);
+        (void)checking_wrmsrl(hwc->config_base + hwc->idx, val);
 }
 
 static __initconst struct x86_pmu p6_pmu = {
diff --git a/arch/x86/kernel/cpu/perfctr-watchdog.c b/arch/x86/kernel/cpu/perfctr-watchdog.c
index 74f4e85a572..fb329e9f849 100644
--- a/arch/x86/kernel/cpu/perfctr-watchdog.c
+++ b/arch/x86/kernel/cpu/perfctr-watchdog.c
@@ -680,7 +680,7 @@ static int setup_intel_arch_watchdog(unsigned nmi_hz)
         cpu_nmi_set_wd_enabled();
 
         apic_write(APIC_LVTPC, APIC_DM_NMI);
-        evntsel |= ARCH_PERFMON_EVENTSEL0_ENABLE;
+        evntsel |= ARCH_PERFMON_EVENTSEL_ENABLE;
         wrmsr(evntsel_msr, evntsel, 0);
         intel_arch_wd_ops.checkbit = 1ULL << (eax.split.bit_width - 1);
         return 1;
diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c
index 1cbed97b59c..dfdb4dba232 100644
--- a/arch/x86/kernel/cpu/vmware.c
+++ b/arch/x86/kernel/cpu/vmware.c
@@ -22,6 +22,7 @@
  */
 
 #include <linux/dmi.h>
+#include <linux/module.h>
 #include <asm/div64.h>
 #include <asm/vmware.h>
 #include <asm/x86_init.h>
@@ -101,6 +102,7 @@ int vmware_platform(void)
 
         return 0;
 }
+EXPORT_SYMBOL(vmware_platform);
 
 /*
  * VMware hypervisor takes care of exporting a reliable TSC to the guest.
diff --git a/arch/x86/kernel/cpuid.c b/arch/x86/kernel/cpuid.c
index 83e5e628de7..8b862d5900f 100644
--- a/arch/x86/kernel/cpuid.c
+++ b/arch/x86/kernel/cpuid.c
@@ -40,6 +40,7 @@
 #include <linux/cpu.h>
 #include <linux/notifier.h>
 #include <linux/uaccess.h>
+#include <linux/gfp.h>
 
 #include <asm/processor.h>
 #include <asm/msr.h>
diff --git a/arch/x86/kernel/crash.c b/arch/x86/kernel/crash.c
index a4849c10a77..ebd4c51d096 100644
--- a/arch/x86/kernel/crash.c
+++ b/arch/x86/kernel/crash.c
@@ -27,7 +27,6 @@
 #include <asm/cpu.h>
 #include <asm/reboot.h>
 #include <asm/virtext.h>
-#include <asm/x86_init.h>
 
 #if defined(CONFIG_SMP) && defined(CONFIG_X86_LOCAL_APIC)
 
@@ -103,10 +102,5 @@ void native_machine_crash_shutdown(struct pt_regs *regs)
 #ifdef CONFIG_HPET_TIMER
         hpet_disable();
 #endif
-
-#ifdef CONFIG_X86_64
-        x86_platform.iommu_shutdown();
-#endif
-
         crash_save_cpu(regs, safe_smp_processor_id());
 }
diff --git a/arch/x86/kernel/crash_dump_32.c b/arch/x86/kernel/crash_dump_32.c
index cd97ce18c29..67414550c3c 100644
--- a/arch/x86/kernel/crash_dump_32.c
+++ b/arch/x86/kernel/crash_dump_32.c
@@ -5,6 +5,7 @@
  *      Copyright (C) IBM Corporation, 2004. All rights reserved
  */
 
+#include <linux/slab.h>
 #include <linux/errno.h>
 #include <linux/highmem.h>
 #include <linux/crash_dump.h>
diff --git a/arch/x86/kernel/dumpstack.h b/arch/x86/kernel/dumpstack.h
index 4fd1420faff..e1a93be4fd4 100644
--- a/arch/x86/kernel/dumpstack.h
+++ b/arch/x86/kernel/dumpstack.h
@@ -14,6 +14,8 @@
 #define get_bp(bp) asm("movq %%rbp, %0" : "=r" (bp) :)
 #endif
 
+#include <linux/uaccess.h>
+
 extern void
 show_trace_log_lvl(struct task_struct *task, struct pt_regs *regs,
                 unsigned long *stack, unsigned long bp, char *log_lvl);
@@ -29,4 +31,26 @@ struct stack_frame {
         struct stack_frame *next_frame;
         unsigned long return_address;
 };
+
+struct stack_frame_ia32 {
+    u32 next_frame;
+    u32 return_address;
+};
+
+static inline unsigned long rewind_frame_pointer(int n)
+{
+        struct stack_frame *frame;
+
+        get_bp(frame);
+
+#ifdef CONFIG_FRAME_POINTER
+        while (n--) {
+                if (probe_kernel_address(&frame->next_frame, frame))
+                        break;
+        }
 #endif
+
+        return (unsigned long)frame;
+}
+
+#endif /* DUMPSTACK_H */
diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c
index dce99abb449..272c9f1f05f 100644
--- a/arch/x86/kernel/dumpstack_64.c
+++ b/arch/x86/kernel/dumpstack_64.c
@@ -120,9 +120,15 @@ fixup_bp_irq_link(unsigned long bp, unsigned long *stack,
 {
 #ifdef CONFIG_FRAME_POINTER
         struct stack_frame *frame = (struct stack_frame *)bp;
+        unsigned long next;
 
-        if (!in_irq_stack(stack, irq_stack, irq_stack_end))
-                return (unsigned long)frame->next_frame;
+        if (!in_irq_stack(stack, irq_stack, irq_stack_end)) {
+                if (!probe_kernel_address(&frame->next_frame, next))
+                        return next;
+                else
+                        WARN_ONCE(1, "Perf: bad frame pointer = %p in "
+                                  "callchain\n", &frame->next_frame);
+        }
 #endif
         return bp;
 }
@@ -202,7 +208,7 @@ void dump_trace(struct task_struct *task, struct pt_regs *regs,
                         if (in_irq_stack(stack, irq_stack, irq_stack_end)) {
                                 if (ops->stack(data, "IRQ") < 0)
                                         break;
-                                bp = print_context_stack(tinfo, stack, bp,
+                                bp = ops->walk_stack(tinfo, stack, bp,
                                         ops, data, irq_stack_end, &graph);
                                 /*
                                  * We link to the next stack (which would be
@@ -223,7 +229,7 @@ void dump_trace(struct task_struct *task, struct pt_regs *regs,
         /*
          * This handles the process stack:
          */
-        bp = print_context_stack(tinfo, stack, bp, ops, data, NULL, &graph);
+        bp = ops->walk_stack(tinfo, stack, bp, ops, data, NULL, &graph);
         put_cpu();
 }
 EXPORT_SYMBOL(dump_trace);
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c
index 740b440fbd7..7bca3c6a02f 100644
--- a/arch/x86/kernel/e820.c
+++ b/arch/x86/kernel/e820.c
@@ -519,29 +519,45 @@ u64 __init e820_remove_range(u64 start, u64 size, unsigned old_type,
         printk(KERN_DEBUG "e820 remove range: %016Lx - %016Lx ",
                        (unsigned long long) start,
                        (unsigned long long) end);
-        e820_print_type(old_type);
+        if (checktype)
+                e820_print_type(old_type);
         printk(KERN_CONT "\n");
 
         for (i = 0; i < e820.nr_map; i++) {
                 struct e820entry *ei = &e820.map[i];
                 u64 final_start, final_end;
+                u64 ei_end;
 
                 if (checktype && ei->type != old_type)
                         continue;
+
+                ei_end = ei->addr + ei->size;
                 /* totally covered? */
-                if (ei->addr >= start &&
-                    (ei->addr + ei->size) <= (start + size)) {
+                if (ei->addr >= start && ei_end <= end) {
                         real_removed_size += ei->size;
                         memset(ei, 0, sizeof(struct e820entry));
                         continue;
                 }
+
+                /* new range is totally covered? */
+                if (ei->addr < start && ei_end > end) {
+                        e820_add_region(end, ei_end - end, ei->type);
+                        ei->size = start - ei->addr;
+                        real_removed_size += size;
+                        continue;
+                }
+
                 /* partially covered */
                 final_start = max(start, ei->addr);
-                final_end = min(start + size, ei->addr + ei->size);
+                final_end = min(end, ei_end);
                 if (final_start >= final_end)
                         continue;
                 real_removed_size += final_end - final_start;
 
+                /*
+                 * left range could be head or tail, so need to update
+                 * size at first.
+                 */
                 ei->size -= final_end - final_start;
                 if (ei->addr < final_start)
                         continue;
diff --git a/arch/x86/kernel/head32.c b/arch/x86/kernel/head32.c
index adedeef1ded..b2e24603739 100644
--- a/arch/x86/kernel/head32.c
+++ b/arch/x86/kernel/head32.c
@@ -7,6 +7,7 @@
 
 #include <linux/init.h>
 #include <linux/start_kernel.h>
+#include <linux/mm.h>
 
 #include <asm/setup.h>
 #include <asm/sections.h>
@@ -44,9 +45,10 @@ void __init i386_start_kernel(void)
 #ifdef CONFIG_BLK_DEV_INITRD
         /* Reserve INITRD */
         if (boot_params.hdr.type_of_loader && boot_params.hdr.ramdisk_image) {
+                /* Assume only end is not page aligned */
                 u64 ramdisk_image = boot_params.hdr.ramdisk_image;
                 u64 ramdisk_size  = boot_params.hdr.ramdisk_size;
-                u64 ramdisk_end   = ramdisk_image + ramdisk_size;
+                u64 ramdisk_end   = PAGE_ALIGN(ramdisk_image + ramdisk_size);
                 reserve_early(ramdisk_image, ramdisk_end, "RAMDISK");
         }
 #endif
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index b5a9896ca1e..7147143fd61 100644
--- a/arch/x86/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
@@ -103,9 +103,10 @@ void __init x86_64_start_reservations(char *real_mode_data)
 #ifdef CONFIG_BLK_DEV_INITRD
         /* Reserve INITRD */
         if (boot_params.hdr.type_of_loader && boot_params.hdr.ramdisk_image) {
+                /* Assume only end is not page aligned */
                 unsigned long ramdisk_image = boot_params.hdr.ramdisk_image;
                 unsigned long ramdisk_size  = boot_params.hdr.ramdisk_size;
-                unsigned long ramdisk_end   = ramdisk_image + ramdisk_size;
+                unsigned long ramdisk_end   = PAGE_ALIGN(ramdisk_image + ramdisk_size);
                 reserve_early(ramdisk_image, ramdisk_end, "RAMDISK");
         }
 #endif
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 2d8b5035371..3d1e6f16b7a 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -27,7 +27,7 @@
 #define GET_CR2_INTO_RCX movq %cr2, %rcx
 #endif
 
-/* we are not able to switch in one step to the final KERNEL ADRESS SPACE
+/* we are not able to switch in one step to the final KERNEL ADDRESS SPACE
  * because we need identity-mapped pages.
  *
  */
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index ee4fa1bfcb3..23b4ecdffa9 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -4,6 +4,7 @@
 #include <linux/sysdev.h>
 #include <linux/delay.h>
 #include <linux/errno.h>
+#include <linux/slab.h>
 #include <linux/hpet.h>
 #include <linux/init.h>
 #include <linux/cpu.h>
@@ -399,9 +400,15 @@ static int hpet_next_event(unsigned long delta,
          * then we might have a real hardware problem. We can not do
          * much about it here, but at least alert the user/admin with
          * a prominent warning.
+         * An erratum on some chipsets (ICH9,..), results in comparator read
+         * immediately following a write returning old value. Workaround
+         * for this is to read this value second time, when first
+         * read returns old value.
          */
-        WARN_ONCE(hpet_readl(HPET_Tn_CMP(timer)) != cnt,
+        if (unlikely((u32)hpet_readl(HPET_Tn_CMP(timer)) != cnt)) {
+                WARN_ONCE(hpet_readl(HPET_Tn_CMP(timer)) != cnt,
                   KERN_WARNING "hpet: compare register read back failed.\n");
+        }
 
         return (s32)(hpet_readl(HPET_COUNTER) - cnt) >= 0 ? -ETIME : 0;
 }
@@ -1143,6 +1150,7 @@ int hpet_set_periodic_freq(unsigned long freq)
                 do_div(clc, freq);
                 clc >>= hpet_clockevent.shift;
                 hpet_pie_delta = clc;
+                hpet_pie_limit = 0;
         }
         return 1;
 }
diff --git a/arch/x86/kernel/hw_breakpoint.c b/arch/x86/kernel/hw_breakpoint.c
index dca2802c666..d6cc065f519 100644
--- a/arch/x86/kernel/hw_breakpoint.c
+++ b/arch/x86/kernel/hw_breakpoint.c
@@ -344,13 +344,6 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp,
         }
 
         /*
-         * For kernel-addresses, either the address or symbol name can be
-         * specified.
-         */
-        if (info->name)
-                info->address = (unsigned long)
-                                kallsyms_lookup_name(info->name);
-        /*
          * Check that the low-order bits of the address are appropriate
          * for the alignment implied by len.
          */
@@ -535,8 +528,3 @@ void hw_breakpoint_pmu_read(struct perf_event *bp)
 {
         /* TODO */
 }
-
-void hw_breakpoint_pmu_unthrottle(struct perf_event *bp)
-{
-        /* TODO */
-}
diff --git a/arch/x86/kernel/i387.c b/arch/x86/kernel/i387.c
index c01a2b846d4..54c31c28548 100644
--- a/arch/x86/kernel/i387.c
+++ b/arch/x86/kernel/i387.c
@@ -8,6 +8,7 @@
 #include <linux/module.h>
 #include <linux/regset.h>
 #include <linux/sched.h>
+#include <linux/slab.h>
 
 #include <asm/sigcontext.h>
 #include <asm/processor.h>
diff --git a/arch/x86/kernel/i8259.c b/arch/x86/kernel/i8259.c
index 8c93a84bb62..7c9f02c130f 100644
--- a/arch/x86/kernel/i8259.c
+++ b/arch/x86/kernel/i8259.c
@@ -5,7 +5,6 @@
 #include <linux/ioport.h>
 #include <linux/interrupt.h>
 #include <linux/timex.h>
-#include <linux/slab.h>
 #include <linux/random.h>
 #include <linux/init.h>
 #include <linux/kernel_stat.h>
@@ -34,6 +33,12 @@
 static int i8259A_auto_eoi;
 DEFINE_RAW_SPINLOCK(i8259A_lock);
 static void mask_and_ack_8259A(unsigned int);
+static void mask_8259A(void);
+static void unmask_8259A(void);
+static void disable_8259A_irq(unsigned int irq);
+static void enable_8259A_irq(unsigned int irq);
+static void init_8259A(int auto_eoi);
+static int i8259A_irq_pending(unsigned int irq);
 
 struct irq_chip i8259A_chip = {
         .name           = "XT-PIC",
@@ -63,7 +68,7 @@ unsigned int cached_irq_mask = 0xffff;
  */
 unsigned long io_apic_irqs;
 
-void disable_8259A_irq(unsigned int irq)
+static void disable_8259A_irq(unsigned int irq)
 {
         unsigned int mask = 1 << irq;
         unsigned long flags;
@@ -77,7 +82,7 @@ void disable_8259A_irq(unsigned int irq)
         raw_spin_unlock_irqrestore(&i8259A_lock, flags);
 }
 
-void enable_8259A_irq(unsigned int irq)
+static void enable_8259A_irq(unsigned int irq)
 {
         unsigned int mask = ~(1 << irq);
         unsigned long flags;
@@ -91,7 +96,7 @@ void enable_8259A_irq(unsigned int irq)
         raw_spin_unlock_irqrestore(&i8259A_lock, flags);
 }
 
-int i8259A_irq_pending(unsigned int irq)
+static int i8259A_irq_pending(unsigned int irq)
 {
         unsigned int mask = 1<<irq;
         unsigned long flags;
@@ -107,7 +112,7 @@ int i8259A_irq_pending(unsigned int irq)
         return ret;
 }
 
-void make_8259A_irq(unsigned int irq)
+static void make_8259A_irq(unsigned int irq)
 {
         disable_irq_nosync(irq);
         io_apic_irqs &= ~(1<<irq);
@@ -281,7 +286,7 @@ static int __init i8259A_init_sysfs(void)
 
 device_initcall(i8259A_init_sysfs);
 
-void mask_8259A(void)
+static void mask_8259A(void)
 {
         unsigned long flags;
 
@@ -293,7 +298,7 @@ void mask_8259A(void)
         raw_spin_unlock_irqrestore(&i8259A_lock, flags);
 }
 
-void unmask_8259A(void)
+static void unmask_8259A(void)
 {
         unsigned long flags;
 
@@ -305,7 +310,7 @@ void unmask_8259A(void)
         raw_spin_unlock_irqrestore(&i8259A_lock, flags);
 }
 
-void init_8259A(int auto_eoi)
+static void init_8259A(int auto_eoi)
 {
         unsigned long flags;
 
@@ -358,3 +363,47 @@ void init_8259A(int auto_eoi)
 
         raw_spin_unlock_irqrestore(&i8259A_lock, flags);
 }
+
+/*
+ * make i8259 a driver so that we can select pic functions at run time. the goal
+ * is to make x86 binary compatible among pc compatible and non-pc compatible
+ * platforms, such as x86 MID.
+ */
+
+static void legacy_pic_noop(void) { };
+static void legacy_pic_uint_noop(unsigned int unused) { };
+static void legacy_pic_int_noop(int unused) { };
+
+static struct irq_chip dummy_pic_chip  = {
+        .name = "dummy pic",
+        .mask = legacy_pic_uint_noop,
+        .unmask = legacy_pic_uint_noop,
+        .disable = legacy_pic_uint_noop,
+        .mask_ack = legacy_pic_uint_noop,
+};
+static int legacy_pic_irq_pending_noop(unsigned int irq)
+{
+        return 0;
+}
+
+struct legacy_pic null_legacy_pic = {
+        .nr_legacy_irqs = 0,
+        .chip = &dummy_pic_chip,
+        .mask_all = legacy_pic_noop,
+        .restore_mask = legacy_pic_noop,
+        .init = legacy_pic_int_noop,
+        .irq_pending = legacy_pic_irq_pending_noop,
+        .make_irq = legacy_pic_uint_noop,
+};
+
+struct legacy_pic default_legacy_pic = {
+        .nr_legacy_irqs = NR_IRQS_LEGACY,
+        .chip  = &i8259A_chip,
+        .mask_all  = mask_8259A,
+        .restore_mask = unmask_8259A,
+        .init = init_8259A,
+        .irq_pending = i8259A_irq_pending,
+        .make_irq = make_8259A_irq,
+};
+
+struct legacy_pic *legacy_pic = &default_legacy_pic;
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
index fce55d53263..0ed2d300cd4 100644
--- a/arch/x86/kernel/irqinit.c
+++ b/arch/x86/kernel/irqinit.c
@@ -5,7 +5,6 @@
 #include <linux/ioport.h>
 #include <linux/interrupt.h>
 #include <linux/timex.h>
-#include <linux/slab.h>
 #include <linux/random.h>
 #include <linux/kprobes.h>
 #include <linux/init.h>
@@ -99,9 +98,6 @@ int vector_used_by_percpu_irq(unsigned int vector)
         return 0;
 }
 
-/* Number of legacy interrupts */
-int nr_legacy_irqs __read_mostly = NR_IRQS_LEGACY;
-
 void __init init_ISA_irqs(void)
 {
         int i;
@@ -109,12 +105,12 @@ void __init init_ISA_irqs(void)
 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC)
         init_bsp_APIC();
 #endif
-        init_8259A(0);
+        legacy_pic->init(0);
 
         /*
          * 16 old-style INTA-cycle interrupts:
          */
-        for (i = 0; i < NR_IRQS_LEGACY; i++) {
+        for (i = 0; i < legacy_pic->nr_legacy_irqs; i++) {
                 struct irq_desc *desc = irq_to_desc(i);
 
                 desc->status = IRQ_DISABLED;
@@ -138,12 +134,34 @@ void __init init_IRQ(void)
          * then this vector space can be freed and re-used dynamically as the
          * irq's migrate etc.
          */
-        for (i = 0; i < nr_legacy_irqs; i++)
+        for (i = 0; i < legacy_pic->nr_legacy_irqs; i++)
                 per_cpu(vector_irq, 0)[IRQ0_VECTOR + i] = i;
 
         x86_init.irqs.intr_init();
 }
 
+/*
+ * Setup the vector to irq mappings.
+ */
+void setup_vector_irq(int cpu)
+{
+#ifndef CONFIG_X86_IO_APIC
+        int irq;
+
+        /*
+         * On most of the platforms, legacy PIC delivers the interrupts on the
+         * boot cpu. But there are certain platforms where PIC interrupts are
+         * delivered to multiple cpu's. If the legacy IRQ is handled by the
+         * legacy PIC, for the new cpu that is coming online, setup the static
+         * legacy vector to irq mapping:
+         */
+        for (irq = 0; irq < legacy_pic->nr_legacy_irqs; irq++)
+                per_cpu(vector_irq, cpu)[IRQ0_VECTOR + irq] = irq;
+#endif
+
+        __setup_vector_irq(cpu);
+}
+
 static void __init smp_intr_init(void)
 {
 #ifdef CONFIG_SMP
diff --git a/arch/x86/kernel/k8.c b/arch/x86/kernel/k8.c
index cbc4332a77b..0f7bc20cfcd 100644
--- a/arch/x86/kernel/k8.c
+++ b/arch/x86/kernel/k8.c
@@ -2,8 +2,8 @@
  * Shared support code for AMD K8 northbridges and derivates.
  * Copyright 2006 Andi Kleen, SUSE Labs. Subject to GPLv2.
  */
-#include <linux/gfp.h>
 #include <linux/types.h>
+#include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/errno.h>
 #include <linux/module.h>
@@ -121,3 +121,17 @@ void k8_flush_garts(void)
 }
 EXPORT_SYMBOL_GPL(k8_flush_garts);
 
+static __init int init_k8_nbs(void)
+{
+        int err = 0;
+
+        err = cache_k8_northbridges();
+
+        if (err < 0)
+                printk(KERN_NOTICE "K8 NB: Cannot enumerate AMD northbridges.\n");
+
+        return err;
+}
+
+/* This has to go after the PCI subsystem */
+fs_initcall(init_k8_nbs);
diff --git a/arch/x86/kernel/kdebugfs.c b/arch/x86/kernel/kdebugfs.c
index e444357375c..8afd9f321f1 100644
--- a/arch/x86/kernel/kdebugfs.c
+++ b/arch/x86/kernel/kdebugfs.c
@@ -9,6 +9,7 @@
 #include <linux/debugfs.h>
 #include <linux/uaccess.h>
 #include <linux/module.h>
+#include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/stat.h>
 #include <linux/io.h>
diff --git a/arch/x86/kernel/kgdb.c b/arch/x86/kernel/kgdb.c
index bfba6019d76..b2258ca9100 100644
--- a/arch/x86/kernel/kgdb.c
+++ b/arch/x86/kernel/kgdb.c
@@ -618,8 +618,8 @@ int kgdb_arch_init(void)
          * portion of kgdb because this operation requires mutexs to
          * complete.
          */
+        hw_breakpoint_init(&attr);
         attr.bp_addr = (unsigned long)kgdb_arch_init;
-        attr.type = PERF_TYPE_BREAKPOINT;
         attr.bp_len = HW_BREAKPOINT_LEN_1;
         attr.bp_type = HW_BREAKPOINT_W;
         attr.disabled = 1;
diff --git a/arch/x86/kernel/kprobes.c b/arch/x86/kernel/kprobes.c
index 5de9f4a9c3f..b43bbaebe2c 100644
--- a/arch/x86/kernel/kprobes.c
+++ b/arch/x86/kernel/kprobes.c
@@ -49,6 +49,7 @@
 #include <linux/module.h>
 #include <linux/kdebug.h>
 #include <linux/kallsyms.h>
+#include <linux/ftrace.h>
 
 #include <asm/cacheflush.h>
 #include <asm/desc.h>
@@ -106,16 +107,22 @@ struct kretprobe_blackpoint kretprobe_blacklist[] = {
 };
 const int kretprobe_blacklist_size = ARRAY_SIZE(kretprobe_blacklist);
 
-/* Insert a jump instruction at address 'from', which jumps to address 'to'.*/
-static void __kprobes set_jmp_op(void *from, void *to)
+static void __kprobes __synthesize_relative_insn(void *from, void *to, u8 op)
 {
-        struct __arch_jmp_op {
-                char op;
+        struct __arch_relative_insn {
+                u8 op;
                 s32 raddr;
-        } __attribute__((packed)) * jop;
-        jop = (struct __arch_jmp_op *)from;
-        jop->raddr = (s32)((long)(to) - ((long)(from) + 5));
-        jop->op = RELATIVEJUMP_INSTRUCTION;
+        } __attribute__((packed)) *insn;
+
+        insn = (struct __arch_relative_insn *)from;
+        insn->raddr = (s32)((long)(to) - ((long)(from) + 5));
+        insn->op = op;
+}
+
+/* Insert a jump instruction at address 'from', which jumps to address 'to'.*/
+static void __kprobes synthesize_reljump(void *from, void *to)
+{
+        __synthesize_relative_insn(from, to, RELATIVEJUMP_OPCODE);
 }
 
 /*
@@ -202,7 +209,7 @@ static int recover_probed_instruction(kprobe_opcode_t *buf, unsigned long addr)
         /*
          *  Basically, kp->ainsn.insn has an original instruction.
          *  However, RIP-relative instruction can not do single-stepping
-         *  at different place, fix_riprel() tweaks the displacement of
+         *  at different place, __copy_instruction() tweaks the displacement of
          *  that instruction. In that case, we can't recover the instruction
          *  from the kp->ainsn.insn.
          *
@@ -284,21 +291,37 @@ static int __kprobes is_IF_modifier(kprobe_opcode_t *insn)
 }
 
 /*
- * Adjust the displacement if the instruction uses the %rip-relative
- * addressing mode.
+ * Copy an instruction and adjust the displacement if the instruction
+ * uses the %rip-relative addressing mode.
  * If it does, Return the address of the 32-bit displacement word.
  * If not, return null.
  * Only applicable to 64-bit x86.
  */
-static void __kprobes fix_riprel(struct kprobe *p)
+static int __kprobes __copy_instruction(u8 *dest, u8 *src, int recover)
 {
-#ifdef CONFIG_X86_64
         struct insn insn;
-        kernel_insn_init(&insn, p->ainsn.insn);
+        int ret;
+        kprobe_opcode_t buf[MAX_INSN_SIZE];
 
+        kernel_insn_init(&insn, src);
+        if (recover) {
+                insn_get_opcode(&insn);
+                if (insn.opcode.bytes[0] == BREAKPOINT_INSTRUCTION) {
+                        ret = recover_probed_instruction(buf,
+                                                         (unsigned long)src);
+                        if (ret)
+                                return 0;
+                        kernel_insn_init(&insn, buf);
+                }
+        }
+        insn_get_length(&insn);
+        memcpy(dest, insn.kaddr, insn.length);
+
+#ifdef CONFIG_X86_64
         if (insn_rip_relative(&insn)) {
                 s64 newdisp;
                 u8 *disp;
+                kernel_insn_init(&insn, dest);
                 insn_get_displacement(&insn);
                 /*
                  * The copied instruction uses the %rip-relative addressing
@@ -312,20 +335,23 @@ static void __kprobes fix_riprel(struct kprobe *p)
                  * extension of the original signed 32-bit displacement would
                  * have given.
                  */
-                newdisp = (u8 *) p->addr + (s64) insn.displacement.value -
-                          (u8 *) p->ainsn.insn;
+                newdisp = (u8 *) src + (s64) insn.displacement.value -
+                          (u8 *) dest;
                 BUG_ON((s64) (s32) newdisp != newdisp); /* Sanity check.  */
-                disp = (u8 *) p->ainsn.insn + insn_offset_displacement(&insn);
+                disp = (u8 *) dest + insn_offset_displacement(&insn);
                 *(s32 *) disp = (s32) newdisp;
         }
 #endif
+        return insn.length;
 }
 
 static void __kprobes arch_copy_kprobe(struct kprobe *p)
 {
-        memcpy(p->ainsn.insn, p->addr, MAX_INSN_SIZE * sizeof(kprobe_opcode_t));
-
-        fix_riprel(p);
+        /*
+         * Copy an instruction without recovering int3, because it will be
+         * put by another subsystem.
+         */
+        __copy_instruction(p->ainsn.insn, p->addr, 0);
 
         if (can_boost(p->addr))
                 p->ainsn.boostable = 0;
@@ -406,18 +432,6 @@ static void __kprobes restore_btf(void)
                 update_debugctlmsr(current->thread.debugctlmsr);
 }
 
-static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs)
-{
-        clear_btf();
-        regs->flags |= X86_EFLAGS_TF;
-        regs->flags &= ~X86_EFLAGS_IF;
-        /* single step inline if the instruction is an int3 */
-        if (p->opcode == BREAKPOINT_INSTRUCTION)
-                regs->ip = (unsigned long)p->addr;
-        else
-                regs->ip = (unsigned long)p->ainsn.insn;
-}
-
 void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri,
                                       struct pt_regs *regs)
 {
@@ -429,20 +443,50 @@ void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri,
         *sara = (unsigned long) &kretprobe_trampoline;
 }
 
+#ifdef CONFIG_OPTPROBES
+static int  __kprobes setup_detour_execution(struct kprobe *p,
+                                             struct pt_regs *regs,
+                                             int reenter);
+#else
+#define setup_detour_execution(p, regs, reenter) (0)
+#endif
+
 static void __kprobes setup_singlestep(struct kprobe *p, struct pt_regs *regs,
-                                       struct kprobe_ctlblk *kcb)
+                                       struct kprobe_ctlblk *kcb, int reenter)
 {
+        if (setup_detour_execution(p, regs, reenter))
+                return;
+
 #if !defined(CONFIG_PREEMPT)
         if (p->ainsn.boostable == 1 && !p->post_handler) {
                 /* Boost up -- we can execute copied instructions directly */
-                reset_current_kprobe();
+                if (!reenter)
+                        reset_current_kprobe();
+                /*
+                 * Reentering boosted probe doesn't reset current_kprobe,
+                 * nor set current_kprobe, because it doesn't use single
+                 * stepping.
+                 */
                 regs->ip = (unsigned long)p->ainsn.insn;
                 preempt_enable_no_resched();
                 return;
         }
 #endif
-        prepare_singlestep(p, regs);
-        kcb->kprobe_status = KPROBE_HIT_SS;
+        if (reenter) {
+                save_previous_kprobe(kcb);
+                set_current_kprobe(p, regs, kcb);
+                kcb->kprobe_status = KPROBE_REENTER;
+        } else
+                kcb->kprobe_status = KPROBE_HIT_SS;
+        /* Prepare real single stepping */
+        clear_btf();
+        regs->flags |= X86_EFLAGS_TF;
+        regs->flags &= ~X86_EFLAGS_IF;
+        /* single step inline if the instruction is an int3 */
+        if (p->opcode == BREAKPOINT_INSTRUCTION)
+                regs->ip = (unsigned long)p->addr;
+        else
+                regs->ip = (unsigned long)p->ainsn.insn;
 }
 
 /*
@@ -456,11 +500,8 @@ static int __kprobes reenter_kprobe(struct kprobe *p, struct pt_regs *regs,
         switch (kcb->kprobe_status) {
         case KPROBE_HIT_SSDONE:
         case KPROBE_HIT_ACTIVE:
-                save_previous_kprobe(kcb);
-                set_current_kprobe(p, regs, kcb);
                 kprobes_inc_nmissed_count(p);
-                prepare_singlestep(p, regs);
-                kcb->kprobe_status = KPROBE_REENTER;
+                setup_singlestep(p, regs, kcb, 1);
                 break;
         case KPROBE_HIT_SS:
                 /* A probe has been hit in the codepath leading up to, or just
@@ -535,13 +576,13 @@ static int __kprobes kprobe_handler(struct pt_regs *regs)
                          * more here.
                          */
                         if (!p->pre_handler || !p->pre_handler(p, regs))
-                                setup_singlestep(p, regs, kcb);
+                                setup_singlestep(p, regs, kcb, 0);
                         return 1;
                 }
         } else if (kprobe_running()) {
                 p = __get_cpu_var(current_kprobe);
                 if (p->break_handler && p->break_handler(p, regs)) {
-                        setup_singlestep(p, regs, kcb);
+                        setup_singlestep(p, regs, kcb, 0);
                         return 1;
                 }
         } /* else: not a kprobe fault; let the kernel handle it */
@@ -550,6 +591,69 @@ static int __kprobes kprobe_handler(struct pt_regs *regs)
         return 0;
 }
 
+#ifdef CONFIG_X86_64
+#define SAVE_REGS_STRING                \
+        /* Skip cs, ip, orig_ax. */     \
+        "       subq $24, %rsp\n"       \
+        "       pushq %rdi\n"           \
+        "       pushq %rsi\n"           \
+        "       pushq %rdx\n"           \
+        "       pushq %rcx\n"           \
+        "       pushq %rax\n"           \
+        "       pushq %r8\n"            \
+        "       pushq %r9\n"            \
+        "       pushq %r10\n"           \
+        "       pushq %r11\n"           \
+        "       pushq %rbx\n"           \
+        "       pushq %rbp\n"           \
+        "       pushq %r12\n"           \
+        "       pushq %r13\n"           \
+        "       pushq %r14\n"           \
+        "       pushq %r15\n"
+#define RESTORE_REGS_STRING             \
+        "       popq %r15\n"            \
+        "       popq %r14\n"            \
+        "       popq %r13\n"            \
+        "       popq %r12\n"            \
+        "       popq %rbp\n"            \
+        "       popq %rbx\n"            \
+        "       popq %r11\n"            \
+        "       popq %r10\n"            \
+        "       popq %r9\n"             \
+        "       popq %r8\n"             \
+        "       popq %rax\n"            \
+        "       popq %rcx\n"            \
+        "       popq %rdx\n"            \
+        "       popq %rsi\n"            \
+        "       popq %rdi\n"            \
+        /* Skip orig_ax, ip, cs */      \
+        "       addq $24, %rsp\n"
+#else
+#define SAVE_REGS_STRING                \
+        /* Skip cs, ip, orig_ax and gs. */      \
+        "       subl $16, %esp\n"       \
+        "       pushl %fs\n"            \
+        "       pushl %ds\n"            \
+        "       pushl %es\n"            \
+        "       pushl %eax\n"           \
+        "       pushl %ebp\n"           \
+        "       pushl %edi\n"           \
+        "       pushl %esi\n"           \
+        "       pushl %edx\n"           \
+        "       pushl %ecx\n"           \
+        "       pushl %ebx\n"
+#define RESTORE_REGS_STRING             \
+        "       popl %ebx\n"            \
+        "       popl %ecx\n"            \
+        "       popl %edx\n"            \
+        "       popl %esi\n"            \
+        "       popl %edi\n"            \
+        "       popl %ebp\n"            \
+        "       popl %eax\n"            \
+        /* Skip ds, es, fs, gs, orig_ax, and ip. Note: don't pop cs here*/\
+        "       addl $24, %esp\n"
+#endif
+
 /*
  * When a retprobed function returns, this code saves registers and
  * calls trampoline_handler() runs, which calls the kretprobe's handler.
@@ -563,65 +667,16 @@ static void __used __kprobes kretprobe_trampoline_holder(void)
                         /* We don't bother saving the ss register */
                         "       pushq %rsp\n"
                         "       pushfq\n"
-                        /*
-                         * Skip cs, ip, orig_ax.
-                         * trampoline_handler() will plug in these values
-                         */
-                        "       subq $24, %rsp\n"
-                        "       pushq %rdi\n"
-                        "       pushq %rsi\n"
-                        "       pushq %rdx\n"
-                        "       pushq %rcx\n"
-                        "       pushq %rax\n"
-                        "       pushq %r8\n"
-                        "       pushq %r9\n"
-                        "       pushq %r10\n"
-                        "       pushq %r11\n"
-                        "       pushq %rbx\n"
-                        "       pushq %rbp\n"
-                        "       pushq %r12\n"
-                        "       pushq %r13\n"
-                        "       pushq %r14\n"
-                        "       pushq %r15\n"
+                        SAVE_REGS_STRING
                         "       movq %rsp, %rdi\n"
                         "       call trampoline_handler\n"
                         /* Replace saved sp with true return address. */
                         "       movq %rax, 152(%rsp)\n"
-                        "       popq %r15\n"
-                        "       popq %r14\n"
-                        "       popq %r13\n"
-                        "       popq %r12\n"
-                        "       popq %rbp\n"
-                        "       popq %rbx\n"
-                        "       popq %r11\n"
-                        "       popq %r10\n"
-                        "       popq %r9\n"
-                        "       popq %r8\n"
-                        "       popq %rax\n"
-                        "       popq %rcx\n"
-                        "       popq %rdx\n"
-                        "       popq %rsi\n"
-                        "       popq %rdi\n"
-                        /* Skip orig_ax, ip, cs */
-                        "       addq $24, %rsp\n"
+                        RESTORE_REGS_STRING
                         "       popfq\n"
 #else
                         "       pushf\n"
-                        /*
-                         * Skip cs, ip, orig_ax and gs.
-                         * trampoline_handler() will plug in these values
-                         */
-                        "       subl $16, %esp\n"
-                        "       pushl %fs\n"
-                        "       pushl %es\n"
-                        "       pushl %ds\n"
-                        "       pushl %eax\n"
-                        "       pushl %ebp\n"
-                        "       pushl %edi\n"
-                        "       pushl %esi\n"
-                        "       pushl %edx\n"
-                        "       pushl %ecx\n"
-                        "       pushl %ebx\n"
+                        SAVE_REGS_STRING
                         "       movl %esp, %eax\n"
                         "       call trampoline_handler\n"
                         /* Move flags to cs */
@@ -629,15 +684,7 @@ static void __used __kprobes kretprobe_trampoline_holder(void)
                         "       movl %edx, 52(%esp)\n"
                         /* Replace saved flags with true return address. */
                         "       movl %eax, 56(%esp)\n"
-                        "       popl %ebx\n"
-                        "       popl %ecx\n"
-                        "       popl %edx\n"
-                        "       popl %esi\n"
-                        "       popl %edi\n"
-                        "       popl %ebp\n"
-                        "       popl %eax\n"
-                        /* Skip ds, es, fs, gs, orig_ax and ip */
-                        "       addl $24, %esp\n"
+                        RESTORE_REGS_STRING
                         "       popf\n"
 #endif
                         "       ret\n");
@@ -805,8 +852,8 @@ static void __kprobes resume_execution(struct kprobe *p,
                          * These instructions can be executed directly if it
                          * jumps back to correct address.
                          */
-                        set_jmp_op((void *)regs->ip,
-                                   (void *)orig_ip + (regs->ip - copy_ip));
+                        synthesize_reljump((void *)regs->ip,
+                                (void *)orig_ip + (regs->ip - copy_ip));
                         p->ainsn.boostable = 1;
                 } else {
                         p->ainsn.boostable = -1;
@@ -1033,6 +1080,358 @@ int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
         return 0;
 }
 
+
+#ifdef CONFIG_OPTPROBES
+
+/* Insert a call instruction at address 'from', which calls address 'to'.*/
+static void __kprobes synthesize_relcall(void *from, void *to)
+{
+        __synthesize_relative_insn(from, to, RELATIVECALL_OPCODE);
+}
+
+/* Insert a move instruction which sets a pointer to eax/rdi (1st arg). */
+static void __kprobes synthesize_set_arg1(kprobe_opcode_t *addr,
+                                          unsigned long val)
+{
+#ifdef CONFIG_X86_64
+        *addr++ = 0x48;
+        *addr++ = 0xbf;
+#else
+        *addr++ = 0xb8;
+#endif
+        *(unsigned long *)addr = val;
+}
+
+void __kprobes kprobes_optinsn_template_holder(void)
+{
+        asm volatile (
+                        ".global optprobe_template_entry\n"
+                        "optprobe_template_entry: \n"
+#ifdef CONFIG_X86_64
+                        /* We don't bother saving the ss register */
+                        "       pushq %rsp\n"
+                        "       pushfq\n"
+                        SAVE_REGS_STRING
+                        "       movq %rsp, %rsi\n"
+                        ".global optprobe_template_val\n"
+                        "optprobe_template_val: \n"
+                        ASM_NOP5
+                        ASM_NOP5
+                        ".global optprobe_template_call\n"
+                        "optprobe_template_call: \n"
+                        ASM_NOP5
+                        /* Move flags to rsp */
+                        "       movq 144(%rsp), %rdx\n"
+                        "       movq %rdx, 152(%rsp)\n"
+                        RESTORE_REGS_STRING
+                        /* Skip flags entry */
+                        "       addq $8, %rsp\n"
+                        "       popfq\n"
+#else /* CONFIG_X86_32 */
+                        "       pushf\n"
+                        SAVE_REGS_STRING
+                        "       movl %esp, %edx\n"
+                        ".global optprobe_template_val\n"
+                        "optprobe_template_val: \n"
+                        ASM_NOP5
+                        ".global optprobe_template_call\n"
+                        "optprobe_template_call: \n"
+                        ASM_NOP5
+                        RESTORE_REGS_STRING
+                        "       addl $4, %esp\n"        /* skip cs */
+                        "       popf\n"
+#endif
+                        ".global optprobe_template_end\n"
+                        "optprobe_template_end: \n");
+}
+
+#define TMPL_MOVE_IDX \
+        ((long)&optprobe_template_val - (long)&optprobe_template_entry)
+#define TMPL_CALL_IDX \
+        ((long)&optprobe_template_call - (long)&optprobe_template_entry)
+#define TMPL_END_IDX \
+        ((long)&optprobe_template_end - (long)&optprobe_template_entry)
+
+#define INT3_SIZE sizeof(kprobe_opcode_t)
+
+/* Optimized kprobe call back function: called from optinsn */
+static void __kprobes optimized_callback(struct optimized_kprobe *op,
+                                         struct pt_regs *regs)
+{
+        struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
+
+        preempt_disable();
+        if (kprobe_running()) {
+                kprobes_inc_nmissed_count(&op->kp);
+        } else {
+                /* Save skipped registers */
+#ifdef CONFIG_X86_64
+                regs->cs = __KERNEL_CS;
+#else
+                regs->cs = __KERNEL_CS | get_kernel_rpl();
+                regs->gs = 0;
+#endif
+                regs->ip = (unsigned long)op->kp.addr + INT3_SIZE;
+                regs->orig_ax = ~0UL;
+
+                __get_cpu_var(current_kprobe) = &op->kp;
+                kcb->kprobe_status = KPROBE_HIT_ACTIVE;
+                opt_pre_handler(&op->kp, regs);
+                __get_cpu_var(current_kprobe) = NULL;
+        }
+        preempt_enable_no_resched();
+}
+
+static int __kprobes copy_optimized_instructions(u8 *dest, u8 *src)
+{
+        int len = 0, ret;
+
+        while (len < RELATIVEJUMP_SIZE) {
+                ret = __copy_instruction(dest + len, src + len, 1);
+                if (!ret || !can_boost(dest + len))
+                        return -EINVAL;
+                len += ret;
+        }
+        /* Check whether the address range is reserved */
+        if (ftrace_text_reserved(src, src + len - 1) ||
+            alternatives_text_reserved(src, src + len - 1))
+                return -EBUSY;
+
+        return len;
+}
+
+/* Check whether insn is indirect jump */
+static int __kprobes insn_is_indirect_jump(struct insn *insn)
+{
+        return ((insn->opcode.bytes[0] == 0xff &&
+                (X86_MODRM_REG(insn->modrm.value) & 6) == 4) || /* Jump */
+                insn->opcode.bytes[0] == 0xea); /* Segment based jump */
+}
+
+/* Check whether insn jumps into specified address range */
+static int insn_jump_into_range(struct insn *insn, unsigned long start, int len)
+{
+        unsigned long target = 0;
+
+        switch (insn->opcode.bytes[0]) {
+        case 0xe0:      /* loopne */
+        case 0xe1:      /* loope */
+        case 0xe2:      /* loop */
+        case 0xe3:      /* jcxz */
+        case 0xe9:      /* near relative jump */
+        case 0xeb:      /* short relative jump */
+                break;
+        case 0x0f:
+                if ((insn->opcode.bytes[1] & 0xf0) == 0x80) /* jcc near */
+                        break;
+                return 0;
+        default:
+                if ((insn->opcode.bytes[0] & 0xf0) == 0x70) /* jcc short */
+                        break;
+                return 0;
+        }
+        target = (unsigned long)insn->next_byte + insn->immediate.value;
+
+        return (start <= target && target <= start + len);
+}
+
+/* Decode whole function to ensure any instructions don't jump into target */
+static int __kprobes can_optimize(unsigned long paddr)
+{
+        int ret;
+        unsigned long addr, size = 0, offset = 0;
+        struct insn insn;
+        kprobe_opcode_t buf[MAX_INSN_SIZE];
+        /* Dummy buffers for lookup_symbol_attrs */
+        static char __dummy_buf[KSYM_NAME_LEN];
+
+        /* Lookup symbol including addr */
+        if (!kallsyms_lookup(paddr, &size, &offset, NULL, __dummy_buf))
+                return 0;
+
+        /* Check there is enough space for a relative jump. */
+        if (size - offset < RELATIVEJUMP_SIZE)
+                return 0;
+
+        /* Decode instructions */
+        addr = paddr - offset;
+        while (addr < paddr - offset + size) { /* Decode until function end */
+                if (search_exception_tables(addr))
+                        /*
+                         * Since some fixup code will jumps into this function,
+                         * we can't optimize kprobe in this function.
+                         */
+                        return 0;
+                kernel_insn_init(&insn, (void *)addr);
+                insn_get_opcode(&insn);
+                if (insn.opcode.bytes[0] == BREAKPOINT_INSTRUCTION) {
+                        ret = recover_probed_instruction(buf, addr);
+                        if (ret)
+                                return 0;
+                        kernel_insn_init(&insn, buf);
+                }
+                insn_get_length(&insn);
+                /* Recover address */
+                insn.kaddr = (void *)addr;
+                insn.next_byte = (void *)(addr + insn.length);
+                /* Check any instructions don't jump into target */
+                if (insn_is_indirect_jump(&insn) ||
+                    insn_jump_into_range(&insn, paddr + INT3_SIZE,
+                                         RELATIVE_ADDR_SIZE))
+                        return 0;
+                addr += insn.length;
+        }
+
+        return 1;
+}
+
+/* Check optimized_kprobe can actually be optimized. */
+int __kprobes arch_check_optimized_kprobe(struct optimized_kprobe *op)
+{
+        int i;
+        struct kprobe *p;
+
+        for (i = 1; i < op->optinsn.size; i++) {
+                p = get_kprobe(op->kp.addr + i);
+                if (p && !kprobe_disabled(p))
+                        return -EEXIST;
+        }
+
+        return 0;
+}
+
+/* Check the addr is within the optimized instructions. */
+int __kprobes arch_within_optimized_kprobe(struct optimized_kprobe *op,
+                                           unsigned long addr)
+{
+        return ((unsigned long)op->kp.addr <= addr &&
+                (unsigned long)op->kp.addr + op->optinsn.size > addr);
+}
+
+/* Free optimized instruction slot */
+static __kprobes
+void __arch_remove_optimized_kprobe(struct optimized_kprobe *op, int dirty)
+{
+        if (op->optinsn.insn) {
+                free_optinsn_slot(op->optinsn.insn, dirty);
+                op->optinsn.insn = NULL;
+                op->optinsn.size = 0;
+        }
+}
+
+void __kprobes arch_remove_optimized_kprobe(struct optimized_kprobe *op)
+{
+        __arch_remove_optimized_kprobe(op, 1);
+}
+
+/*
+ * Copy replacing target instructions
+ * Target instructions MUST be relocatable (checked inside)
+ */
+int __kprobes arch_prepare_optimized_kprobe(struct optimized_kprobe *op)
+{
+        u8 *buf;
+        int ret;
+        long rel;
+
+        if (!can_optimize((unsigned long)op->kp.addr))
+                return -EILSEQ;
+
+        op->optinsn.insn = get_optinsn_slot();
+        if (!op->optinsn.insn)
+                return -ENOMEM;
+
+        /*
+         * Verify if the address gap is in 2GB range, because this uses
+         * a relative jump.
+         */
+        rel = (long)op->optinsn.insn - (long)op->kp.addr + RELATIVEJUMP_SIZE;
+        if (abs(rel) > 0x7fffffff)
+                return -ERANGE;
+
+        buf = (u8 *)op->optinsn.insn;
+
+        /* Copy instructions into the out-of-line buffer */
+        ret = copy_optimized_instructions(buf + TMPL_END_IDX, op->kp.addr);
+        if (ret < 0) {
+                __arch_remove_optimized_kprobe(op, 0);
+                return ret;
+        }
+        op->optinsn.size = ret;
+
+        /* Copy arch-dep-instance from template */
+        memcpy(buf, &optprobe_template_entry, TMPL_END_IDX);
+
+        /* Set probe information */
+        synthesize_set_arg1(buf + TMPL_MOVE_IDX, (unsigned long)op);
+
+        /* Set probe function call */
+        synthesize_relcall(buf + TMPL_CALL_IDX, optimized_callback);
+
+        /* Set returning jmp instruction at the tail of out-of-line buffer */
+        synthesize_reljump(buf + TMPL_END_IDX + op->optinsn.size,
+                           (u8 *)op->kp.addr + op->optinsn.size);
+
+        flush_icache_range((unsigned long) buf,
+                           (unsigned long) buf + TMPL_END_IDX +
+                           op->optinsn.size + RELATIVEJUMP_SIZE);
+        return 0;
+}
+
+/* Replace a breakpoint (int3) with a relative jump.  */
+int __kprobes arch_optimize_kprobe(struct optimized_kprobe *op)
+{
+        unsigned char jmp_code[RELATIVEJUMP_SIZE];
+        s32 rel = (s32)((long)op->optinsn.insn -
+                        ((long)op->kp.addr + RELATIVEJUMP_SIZE));
+
+        /* Backup instructions which will be replaced by jump address */
+        memcpy(op->optinsn.copied_insn, op->kp.addr + INT3_SIZE,
+               RELATIVE_ADDR_SIZE);
+
+        jmp_code[0] = RELATIVEJUMP_OPCODE;
+        *(s32 *)(&jmp_code[1]) = rel;
+
+        /*
+         * text_poke_smp doesn't support NMI/MCE code modifying.
+         * However, since kprobes itself also doesn't support NMI/MCE
+         * code probing, it's not a problem.
+         */
+        text_poke_smp(op->kp.addr, jmp_code, RELATIVEJUMP_SIZE);
+        return 0;
+}
+
+/* Replace a relative jump with a breakpoint (int3).  */
+void __kprobes arch_unoptimize_kprobe(struct optimized_kprobe *op)
+{
+        u8 buf[RELATIVEJUMP_SIZE];
+
+        /* Set int3 to first byte for kprobes */
+        buf[0] = BREAKPOINT_INSTRUCTION;
+        memcpy(buf + 1, op->optinsn.copied_insn, RELATIVE_ADDR_SIZE);
+        text_poke_smp(op->kp.addr, buf, RELATIVEJUMP_SIZE);
+}
+
+static int  __kprobes setup_detour_execution(struct kprobe *p,
+                                             struct pt_regs *regs,
+                                             int reenter)
+{
+        struct optimized_kprobe *op;
+
+        if (p->flags & KPROBE_FLAG_OPTIMIZED) {
+                /* This kprobe is really able to run optimized path. */
+                op = container_of(p, struct optimized_kprobe, kp);
+                /* Detour through copied instructions */
+                regs->ip = (unsigned long)op->optinsn.insn + TMPL_END_IDX;
+                if (!reenter)
+                        reset_current_kprobe();
+                preempt_enable_no_resched();
+                return 1;
+        }
+        return 0;
+}
+#endif
+
 int __init arch_init_kprobes(void)
 {
         return 0;
diff --git a/arch/x86/kernel/ldt.c b/arch/x86/kernel/ldt.c
index ec6ef60cbd1..ea697263b37 100644
--- a/arch/x86/kernel/ldt.c
+++ b/arch/x86/kernel/ldt.c
@@ -7,6 +7,7 @@
  */
 
 #include <linux/errno.h>
+#include <linux/gfp.h>
 #include <linux/sched.h>
 #include <linux/string.h>
 #include <linux/mm.h>
diff --git a/arch/x86/kernel/machine_kexec_64.c b/arch/x86/kernel/machine_kexec_64.c
index 4a8bb82248a..035c8c52918 100644
--- a/arch/x86/kernel/machine_kexec_64.c
+++ b/arch/x86/kernel/machine_kexec_64.c
@@ -9,6 +9,7 @@
 #include <linux/mm.h>
 #include <linux/kexec.h>
 #include <linux/string.h>
+#include <linux/gfp.h>
 #include <linux/reboot.h>
 #include <linux/numa.h>
 #include <linux/ftrace.h>
diff --git a/arch/x86/kernel/mca_32.c b/arch/x86/kernel/mca_32.c
index 845d80ce1ef..63eaf659623 100644
--- a/arch/x86/kernel/mca_32.c
+++ b/arch/x86/kernel/mca_32.c
@@ -42,6 +42,7 @@
 #include <linux/kernel.h>
 #include <linux/mca.h>
 #include <linux/kprobes.h>
+#include <linux/slab.h>
 #include <asm/system.h>
 #include <asm/io.h>
 #include <linux/proc_fs.h>
diff --git a/arch/x86/kernel/module.c b/arch/x86/kernel/module.c
index 89f386f044e..e0bc186d750 100644
--- a/arch/x86/kernel/module.c
+++ b/arch/x86/kernel/module.c
@@ -23,6 +23,7 @@
 #include <linux/kernel.h>
 #include <linux/bug.h>
 #include <linux/mm.h>
+#include <linux/gfp.h>
 
 #include <asm/system.h>
 #include <asm/page.h>
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c
index a2c1edd2d3a..e81030f71a8 100644
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -664,7 +664,7 @@ static void __init smp_reserve_memory(struct mpf_intel *mpf)
 {
         unsigned long size = get_mpc_size(mpf->physptr);
 
-        reserve_early(mpf->physptr, mpf->physptr+size, "MP-table mpc");
+        reserve_early_overlap_ok(mpf->physptr, mpf->physptr+size, "MP-table mpc");
 }
 
 static int __init smp_scan_config(unsigned long base, unsigned long length)
@@ -693,7 +693,7 @@ static int __init smp_scan_config(unsigned long base, unsigned long length)
                                mpf, (u64)virt_to_phys(mpf));
 
                         mem = virt_to_phys(mpf);
-                        reserve_early(mem, mem + sizeof(*mpf), "MP-table mpf");
+                        reserve_early_overlap_ok(mem, mem + sizeof(*mpf), "MP-table mpf");
                         if (mpf->physptr)
                                 smp_reserve_memory(mpf);
 
diff --git a/arch/x86/kernel/mrst.c b/arch/x86/kernel/mrst.c
index 3b7078abc87..0aad8670858 100644
--- a/arch/x86/kernel/mrst.c
+++ b/arch/x86/kernel/mrst.c
@@ -10,8 +10,211 @@
  * of the License.
  */
 #include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/sfi.h>
+#include <linux/irq.h>
+#include <linux/module.h>
 
 #include <asm/setup.h>
+#include <asm/mpspec_def.h>
+#include <asm/hw_irq.h>
+#include <asm/apic.h>
+#include <asm/io_apic.h>
+#include <asm/mrst.h>
+#include <asm/io.h>
+#include <asm/i8259.h>
+#include <asm/apb_timer.h>
+
+static u32 sfi_mtimer_usage[SFI_MTMR_MAX_NUM];
+static struct sfi_timer_table_entry sfi_mtimer_array[SFI_MTMR_MAX_NUM];
+int sfi_mtimer_num;
+
+struct sfi_rtc_table_entry sfi_mrtc_array[SFI_MRTC_MAX];
+EXPORT_SYMBOL_GPL(sfi_mrtc_array);
+int sfi_mrtc_num;
+
+static inline void assign_to_mp_irq(struct mpc_intsrc *m,
+                                    struct mpc_intsrc *mp_irq)
+{
+        memcpy(mp_irq, m, sizeof(struct mpc_intsrc));
+}
+
+static inline int mp_irq_cmp(struct mpc_intsrc *mp_irq,
+                                struct mpc_intsrc *m)
+{
+        return memcmp(mp_irq, m, sizeof(struct mpc_intsrc));
+}
+
+static void save_mp_irq(struct mpc_intsrc *m)
+{
+        int i;
+
+        for (i = 0; i < mp_irq_entries; i++) {
+                if (!mp_irq_cmp(&mp_irqs[i], m))
+                        return;
+        }
+
+        assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
+        if (++mp_irq_entries == MAX_IRQ_SOURCES)
+                panic("Max # of irq sources exceeded!!\n");
+}
+
+/* parse all the mtimer info to a static mtimer array */
+static int __init sfi_parse_mtmr(struct sfi_table_header *table)
+{
+        struct sfi_table_simple *sb;
+        struct sfi_timer_table_entry *pentry;
+        struct mpc_intsrc mp_irq;
+        int totallen;
+
+        sb = (struct sfi_table_simple *)table;
+        if (!sfi_mtimer_num) {
+                sfi_mtimer_num = SFI_GET_NUM_ENTRIES(sb,
+                                        struct sfi_timer_table_entry);
+                pentry = (struct sfi_timer_table_entry *) sb->pentry;
+                totallen = sfi_mtimer_num * sizeof(*pentry);
+                memcpy(sfi_mtimer_array, pentry, totallen);
+        }
+
+        printk(KERN_INFO "SFI: MTIMER info (num = %d):\n", sfi_mtimer_num);
+        pentry = sfi_mtimer_array;
+        for (totallen = 0; totallen < sfi_mtimer_num; totallen++, pentry++) {
+                printk(KERN_INFO "timer[%d]: paddr = 0x%08x, freq = %dHz,"
+                        " irq = %d\n", totallen, (u32)pentry->phys_addr,
+                        pentry->freq_hz, pentry->irq);
+                        if (!pentry->irq)
+                                continue;
+                        mp_irq.type = MP_IOAPIC;
+                        mp_irq.irqtype = mp_INT;
+/* triggering mode edge bit 2-3, active high polarity bit 0-1 */
+                        mp_irq.irqflag = 5;
+                        mp_irq.srcbus = 0;
+                        mp_irq.srcbusirq = pentry->irq; /* IRQ */
+                        mp_irq.dstapic = MP_APIC_ALL;
+                        mp_irq.dstirq = pentry->irq;
+                        save_mp_irq(&mp_irq);
+        }
+
+        return 0;
+}
+
+struct sfi_timer_table_entry *sfi_get_mtmr(int hint)
+{
+        int i;
+        if (hint < sfi_mtimer_num) {
+                if (!sfi_mtimer_usage[hint]) {
+                        pr_debug("hint taken for timer %d irq %d\n",\
+                                hint, sfi_mtimer_array[hint].irq);
+                        sfi_mtimer_usage[hint] = 1;
+                        return &sfi_mtimer_array[hint];
+                }
+        }
+        /* take the first timer available */
+        for (i = 0; i < sfi_mtimer_num;) {
+                if (!sfi_mtimer_usage[i]) {
+                        sfi_mtimer_usage[i] = 1;
+                        return &sfi_mtimer_array[i];
+                }
+                i++;
+        }
+        return NULL;
+}
+
+void sfi_free_mtmr(struct sfi_timer_table_entry *mtmr)
+{
+        int i;
+        for (i = 0; i < sfi_mtimer_num;) {
+                if (mtmr->irq == sfi_mtimer_array[i].irq) {
+                        sfi_mtimer_usage[i] = 0;
+                        return;
+                }
+                i++;
+        }
+}
+
+/* parse all the mrtc info to a global mrtc array */
+int __init sfi_parse_mrtc(struct sfi_table_header *table)
+{
+        struct sfi_table_simple *sb;
+        struct sfi_rtc_table_entry *pentry;
+        struct mpc_intsrc mp_irq;
+
+        int totallen;
+
+        sb = (struct sfi_table_simple *)table;
+        if (!sfi_mrtc_num) {
+                sfi_mrtc_num = SFI_GET_NUM_ENTRIES(sb,
+                                                struct sfi_rtc_table_entry);
+                pentry = (struct sfi_rtc_table_entry *)sb->pentry;
+                totallen = sfi_mrtc_num * sizeof(*pentry);
+                memcpy(sfi_mrtc_array, pentry, totallen);
+        }
+
+        printk(KERN_INFO "SFI: RTC info (num = %d):\n", sfi_mrtc_num);
+        pentry = sfi_mrtc_array;
+        for (totallen = 0; totallen < sfi_mrtc_num; totallen++, pentry++) {
+                printk(KERN_INFO "RTC[%d]: paddr = 0x%08x, irq = %d\n",
+                        totallen, (u32)pentry->phys_addr, pentry->irq);
+                mp_irq.type = MP_IOAPIC;
+                mp_irq.irqtype = mp_INT;
+                mp_irq.irqflag = 0;
+                mp_irq.srcbus = 0;
+                mp_irq.srcbusirq = pentry->irq; /* IRQ */
+                mp_irq.dstapic = MP_APIC_ALL;
+                mp_irq.dstirq = pentry->irq;
+                save_mp_irq(&mp_irq);
+        }
+        return 0;
+}
+
+/*
+ * the secondary clock in Moorestown can be APBT or LAPIC clock, default to
+ * APBT but cmdline option can also override it.
+ */
+static void __cpuinit mrst_setup_secondary_clock(void)
+{
+        /* restore default lapic clock if disabled by cmdline */
+        if (disable_apbt_percpu)
+                return setup_secondary_APIC_clock();
+        apbt_setup_secondary_clock();
+}
+
+static unsigned long __init mrst_calibrate_tsc(void)
+{
+        unsigned long flags, fast_calibrate;
+
+        local_irq_save(flags);
+        fast_calibrate = apbt_quick_calibrate();
+        local_irq_restore(flags);
+
+        if (fast_calibrate)
+                return fast_calibrate;
+
+        return 0;
+}
+
+void __init mrst_time_init(void)
+{
+        sfi_table_parse(SFI_SIG_MTMR, NULL, NULL, sfi_parse_mtmr);
+        pre_init_apic_IRQ0();
+        apbt_time_init();
+}
+
+void __init mrst_rtc_init(void)
+{
+        sfi_table_parse(SFI_SIG_MRTC, NULL, NULL, sfi_parse_mrtc);
+}
+
+/*
+ * if we use per cpu apb timer, the bootclock already setup. if we use lapic
+ * timer and one apbt timer for broadcast, we need to set up lapic boot clock.
+ */
+static void __init mrst_setup_boot_clock(void)
+{
+        pr_info("%s: per cpu apbt flag %d \n", __func__, disable_apbt_percpu);
+        if (disable_apbt_percpu)
+                setup_boot_APIC_clock();
+};
 
 /*
  * Moorestown specific x86_init function overrides and early setup
@@ -21,4 +224,17 @@ void __init x86_mrst_early_setup(void)
 {
         x86_init.resources.probe_roms = x86_init_noop;
         x86_init.resources.reserve_resources = x86_init_noop;
+
+        x86_init.timers.timer_init = mrst_time_init;
+        x86_init.timers.setup_percpu_clockev = mrst_setup_boot_clock;
+
+        x86_init.irqs.pre_vector_init = x86_init_noop;
+
+        x86_cpuinit.setup_percpu_clockev = mrst_setup_secondary_clock;
+
+        x86_platform.calibrate_tsc = mrst_calibrate_tsc;
+        x86_init.pci.init = pci_mrst_init;
+        x86_init.pci.fixup_irqs = x86_init_noop;
+
+        legacy_pic = &null_legacy_pic;
 }
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c
index 206735ac8cb..4d4468e9f47 100644
--- a/arch/x86/kernel/msr.c
+++ b/arch/x86/kernel/msr.c
@@ -37,6 +37,7 @@
 #include <linux/cpu.h>
 #include <linux/notifier.h>
 #include <linux/uaccess.h>
+#include <linux/gfp.h>
 
 #include <asm/processor.h>
 #include <asm/msr.h>
diff --git a/arch/x86/kernel/olpc.c b/arch/x86/kernel/olpc.c
index 9d1d263f786..8297160c41b 100644
--- a/arch/x86/kernel/olpc.c
+++ b/arch/x86/kernel/olpc.c
@@ -17,7 +17,9 @@
 #include <linux/spinlock.h>
 #include <linux/io.h>
 #include <linux/string.h>
+
 #include <asm/geode.h>
+#include <asm/setup.h>
 #include <asm/olpc.h>
 
 #ifdef CONFIG_OPEN_FIRMWARE
@@ -243,9 +245,11 @@ static int __init olpc_init(void)
         olpc_ec_cmd(EC_FIRMWARE_REV, NULL, 0,
                         (unsigned char *) &olpc_platform_info.ecver, 1);
 
-        /* check to see if the VSA exists */
-        if (cs5535_has_vsa2())
-                olpc_platform_info.flags |= OLPC_F_VSA;
+#ifdef CONFIG_PCI_OLPC
+        /* If the VSA exists let it emulate PCI, if not emulate in kernel */
+        if (!cs5535_has_vsa2())
+                x86_init.pci.arch_init = pci_olpc_init;
+#endif
 
         printk(KERN_INFO "OLPC board revision %s%X (EC=%x)\n",
                         ((olpc_platform_info.boardrev & 0xf) < 8) ? "pre" : "",
diff --git a/arch/x86/kernel/pci-calgary_64.c b/arch/x86/kernel/pci-calgary_64.c
index 2bbde607814..fb99f7edb34 100644
--- a/arch/x86/kernel/pci-calgary_64.c
+++ b/arch/x86/kernel/pci-calgary_64.c
@@ -1309,7 +1309,7 @@ static void calgary_init_bitmap_from_tce_table(struct iommu_table *tbl)
 /*
  * get_tce_space_from_tar():
  * Function for kdump case. Get the tce tables from first kernel
- * by reading the contents of the base adress register of calgary iommu
+ * by reading the contents of the base address register of calgary iommu
  */
 static void __init get_tce_space_from_tar(void)
 {
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index 1aa966c565f..4b7e3d8b01d 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -2,6 +2,7 @@
 #include <linux/dma-debug.h>
 #include <linux/dmar.h>
 #include <linux/bootmem.h>
+#include <linux/gfp.h>
 #include <linux/pci.h>
 #include <linux/kmemleak.h>
 
@@ -38,7 +39,7 @@ int iommu_detected __read_mostly = 0;
  * This variable becomes 1 if iommu=pt is passed on the kernel command line.
  * If this variable is 1, IOMMU implementations do no DMA translation for
  * devices and allow every device to access to whole physical memory. This is
- * useful if a user want to use an IOMMU only for KVM device assignment to
+ * useful if a user wants to use an IOMMU only for KVM device assignment to
  * guests and not for driver dma translation.
  */
 int iommu_pass_through __read_mostly;
diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c
index 34de53b46f8..0f7f130caa6 100644
--- a/arch/x86/kernel/pci-gart_64.c
+++ b/arch/x86/kernel/pci-gart_64.c
@@ -29,6 +29,7 @@
 #include <linux/iommu-helper.h>
 #include <linux/sysdev.h>
 #include <linux/io.h>
+#include <linux/gfp.h>
 #include <asm/atomic.h>
 #include <asm/mtrr.h>
 #include <asm/pgtable.h>
@@ -564,6 +565,9 @@ static void enable_gart_translations(void)
 
                 enable_gart_translation(dev, __pa(agp_gatt_table));
         }
+
+        /* Flush the GART-TLB to remove stale entries */
+        k8_flush_garts();
 }
 
 /*
@@ -735,7 +739,7 @@ int __init gart_iommu_init(void)
         unsigned long scratch;
         long i;
 
-        if (cache_k8_northbridges() < 0 || num_k8_northbridges == 0)
+        if (num_k8_northbridges == 0)
                 return 0;
 
 #ifndef CONFIG_AGP_AMD64
diff --git a/arch/x86/kernel/pci-nommu.c b/arch/x86/kernel/pci-nommu.c
index 22be12b60a8..3af4af810c0 100644
--- a/arch/x86/kernel/pci-nommu.c
+++ b/arch/x86/kernel/pci-nommu.c
@@ -4,6 +4,7 @@
 #include <linux/scatterlist.h>
 #include <linux/string.h>
 #include <linux/init.h>
+#include <linux/gfp.h>
 #include <linux/pci.h>
 #include <linux/mm.h>
 
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 02d678065d7..28ad9f4d8b9 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -526,21 +526,37 @@ static int __cpuinit mwait_usable(const struct cpuinfo_x86 *c)
 }
 
 /*
- * Check for AMD CPUs, which have potentially C1E support
+ * Check for AMD CPUs, where APIC timer interrupt does not wake up CPU from C1e.
+ * For more information see
+ * - Erratum #400 for NPT family 0xf and family 0x10 CPUs
+ * - Erratum #365 for family 0x11 (not affected because C1e not in use)
  */
 static int __cpuinit check_c1e_idle(const struct cpuinfo_x86 *c)
 {
+        u64 val;
         if (c->x86_vendor != X86_VENDOR_AMD)
-                return 0;
-
-        if (c->x86 < 0x0F)
-                return 0;
+                goto no_c1e_idle;
 
         /* Family 0x0f models < rev F do not have C1E */
-        if (c->x86 == 0x0f && c->x86_model < 0x40)
-                return 0;
+        if (c->x86 == 0x0F && c->x86_model >= 0x40)
+                return 1;
 
-        return 1;
+        if (c->x86 == 0x10) {
+                /*
+                 * check OSVW bit for CPUs that are not affected
+                 * by erratum #400
+                 */
+                rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, val);
+                if (val >= 2) {
+                        rdmsrl(MSR_AMD64_OSVW_STATUS, val);
+                        if (!(val & BIT(1)))
+                                goto no_c1e_idle;
+                }
+                return 1;
+        }
+
+no_c1e_idle:
+        return 0;
 }
 
 static cpumask_var_t c1e_mask;
@@ -607,7 +623,7 @@ void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
 {
 #ifdef CONFIG_SMP
         if (pm_idle == poll_idle && smp_num_siblings > 1) {
-                printk(KERN_WARNING "WARNING: polling idle and HT enabled,"
+                printk_once(KERN_WARNING "WARNING: polling idle and HT enabled,"
                         " performance may degrade.\n");
         }
 #endif
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index dc9690b4c4c..17cb3295cbf 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -276,12 +276,12 @@ int copy_thread(unsigned long clone_flags, unsigned long sp,
 
         set_tsk_thread_flag(p, TIF_FORK);
 
-        p->thread.fs = me->thread.fs;
-        p->thread.gs = me->thread.gs;
         p->thread.io_bitmap_ptr = NULL;
 
         savesegment(gs, p->thread.gsindex);
+        p->thread.gs = p->thread.gsindex ? 0 : me->thread.gs;
         savesegment(fs, p->thread.fsindex);
+        p->thread.fs = p->thread.fsindex ? 0 : me->thread.fs;
         savesegment(es, p->thread.es);
         savesegment(ds, p->thread.ds);
 
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index 2d96aab82a4..2e9b55027b7 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -12,6 +12,7 @@
 #include <linux/mm.h>
 #include <linux/smp.h>
 #include <linux/errno.h>
+#include <linux/slab.h>
 #include <linux/ptrace.h>
 #include <linux/regset.h>
 #include <linux/tracehook.h>
@@ -581,7 +582,7 @@ ptrace_modify_breakpoint(struct perf_event *bp, int len, int type,
         struct perf_event_attr attr;
 
         /*
-         * We shoud have at least an inactive breakpoint at this
+         * We should have at least an inactive breakpoint at this
          * slot. It means the user is writing dr7 without having
          * written the address register first
          */
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 5d7ba1a449b..c4851eff57b 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -55,7 +55,6 @@
 #include <linux/stddef.h>
 #include <linux/unistd.h>
 #include <linux/ptrace.h>
-#include <linux/slab.h>
 #include <linux/user.h>
 #include <linux/delay.h>
 
@@ -314,16 +313,17 @@ static void __init reserve_brk(void)
 #define MAX_MAP_CHUNK   (NR_FIX_BTMAPS << PAGE_SHIFT)
 static void __init relocate_initrd(void)
 {
-
+        /* Assume only end is not page aligned */
         u64 ramdisk_image = boot_params.hdr.ramdisk_image;
         u64 ramdisk_size  = boot_params.hdr.ramdisk_size;
+        u64 area_size     = PAGE_ALIGN(ramdisk_size);
         u64 end_of_lowmem = max_low_pfn_mapped << PAGE_SHIFT;
         u64 ramdisk_here;
         unsigned long slop, clen, mapaddr;
         char *p, *q;
 
         /* We need to move the initrd down into lowmem */
-        ramdisk_here = find_e820_area(0, end_of_lowmem, ramdisk_size,
+        ramdisk_here = find_e820_area(0, end_of_lowmem, area_size,
                                          PAGE_SIZE);
 
         if (ramdisk_here == -1ULL)
@@ -332,7 +332,7 @@ static void __init relocate_initrd(void)
 
         /* Note: this includes all the lowmem currently occupied by
            the initrd, we rely on that fact to keep the data intact. */
-        reserve_early(ramdisk_here, ramdisk_here + ramdisk_size,
+        reserve_early(ramdisk_here, ramdisk_here + area_size,
                          "NEW RAMDISK");
         initrd_start = ramdisk_here + PAGE_OFFSET;
         initrd_end   = initrd_start + ramdisk_size;
@@ -376,9 +376,10 @@ static void __init relocate_initrd(void)
 
 static void __init reserve_initrd(void)
 {
+        /* Assume only end is not page aligned */
         u64 ramdisk_image = boot_params.hdr.ramdisk_image;
         u64 ramdisk_size  = boot_params.hdr.ramdisk_size;
-        u64 ramdisk_end   = ramdisk_image + ramdisk_size;
+        u64 ramdisk_end   = PAGE_ALIGN(ramdisk_image + ramdisk_size);
         u64 end_of_lowmem = max_low_pfn_mapped << PAGE_SHIFT;
 
         if (!boot_params.hdr.type_of_loader ||
@@ -606,6 +607,16 @@ static int __init setup_elfcorehdr(char *arg)
 early_param("elfcorehdr", setup_elfcorehdr);
 #endif
 
+static __init void reserve_ibft_region(void)
+{
+        unsigned long addr, size = 0;
+
+        addr = find_ibft_region(&size);
+
+        if (size)
+                reserve_early_overlap_ok(addr, addr + size, "ibft");
+}
+
 #ifdef CONFIG_X86_RESERVE_LOW_64K
 static int __init dmi_low_memory_corruption(const struct dmi_system_id *d)
 {
@@ -908,6 +919,8 @@ void __init setup_arch(char **cmdline_p)
          */
         find_smp_config();
 
+        reserve_ibft_region();
+
         reserve_trampoline_memory();
 
 #ifdef CONFIG_ACPI_SLEEP
@@ -975,8 +988,6 @@ void __init setup_arch(char **cmdline_p)
 
         dma32_reserve_bootmem();
 
-        reserve_ibft_region();
-
 #ifdef CONFIG_KVM_CLOCK
         kvmclock_init();
 #endif
diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c
index ec1de97600e..d801210945d 100644
--- a/arch/x86/kernel/smp.c
+++ b/arch/x86/kernel/smp.c
@@ -21,6 +21,7 @@
 #include <linux/cache.h>
 #include <linux/interrupt.h>
 #include <linux/cpu.h>
+#include <linux/gfp.h>
 
 #include <asm/mtrr.h>
 #include <asm/tlbflush.h>
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index a435c76d714..763d815e27a 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -48,6 +48,8 @@
 #include <linux/err.h>
 #include <linux/nmi.h>
 #include <linux/tboot.h>
+#include <linux/stackprotector.h>
+#include <linux/gfp.h>
 
 #include <asm/acpi.h>
 #include <asm/desc.h>
@@ -67,6 +69,7 @@
 #include <linux/mc146818rtc.h>
 
 #include <asm/smpboot_hooks.h>
+#include <asm/i8259.h>
 
 #ifdef CONFIG_X86_32
 u8 apicid_2_node[MAX_APICID];
@@ -240,12 +243,10 @@ static void __cpuinit smp_callin(void)
         end_local_APIC_setup();
         map_cpu_to_logical_apicid();
 
-        notify_cpu_starting(cpuid);
-
         /*
          * Need to setup vector mappings before we enable interrupts.
          */
-        __setup_vector_irq(smp_processor_id());
+        setup_vector_irq(smp_processor_id());
         /*
          * Get our bogomips.
          *
@@ -262,6 +263,8 @@ static void __cpuinit smp_callin(void)
          */
         smp_store_cpu_info(cpuid);
 
+        notify_cpu_starting(cpuid);
+
         /*
          * Allow the master to continue.
          */
@@ -291,9 +294,9 @@ notrace static void __cpuinit start_secondary(void *unused)
         check_tsc_sync_target();
 
         if (nmi_watchdog == NMI_IO_APIC) {
-                disable_8259A_irq(0);
+                legacy_pic->chip->mask(0);
                 enable_NMI_through_LVT0();
-                enable_8259A_irq(0);
+                legacy_pic->chip->unmask(0);
         }
 
 #ifdef CONFIG_X86_32
@@ -329,6 +332,9 @@ notrace static void __cpuinit start_secondary(void *unused)
         /* enable local interrupts */
         local_irq_enable();
 
+        /* to prevent fake stack check failure in clock setup */
+        boot_init_stack_canary();
+
         x86_cpuinit.setup_percpu_clockev();
 
         wmb();
diff --git a/arch/x86/kernel/sys_i386_32.c b/arch/x86/kernel/sys_i386_32.c
index dee1ff7cba5..196552bb412 100644
--- a/arch/x86/kernel/sys_i386_32.c
+++ b/arch/x86/kernel/sys_i386_32.c
@@ -25,191 +25,6 @@
 #include <asm/syscalls.h>
 
 /*
- * Perform the select(nd, in, out, ex, tv) and mmap() system
- * calls. Linux/i386 didn't use to be able to handle more than
- * 4 system call parameters, so these system calls used a memory
- * block for parameter passing..
- */
-
-struct mmap_arg_struct {
-        unsigned long addr;
-        unsigned long len;
-        unsigned long prot;
-        unsigned long flags;
-        unsigned long fd;
-        unsigned long offset;
-};
-
-asmlinkage int old_mmap(struct mmap_arg_struct __user *arg)
-{
-        struct mmap_arg_struct a;
-        int err = -EFAULT;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                goto out;
-
-        err = -EINVAL;
-        if (a.offset & ~PAGE_MASK)
-                goto out;
-
-        err = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags,
-                        a.fd, a.offset >> PAGE_SHIFT);
-out:
-        return err;
-}
-
-
-struct sel_arg_struct {
-        unsigned long n;
-        fd_set __user *inp, *outp, *exp;
-        struct timeval __user *tvp;
-};
-
-asmlinkage int old_select(struct sel_arg_struct __user *arg)
-{
-        struct sel_arg_struct a;
-
-        if (copy_from_user(&a, arg, sizeof(a)))
-                return -EFAULT;
-        /* sys_select() does the appropriate kernel locking */
-        return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
-}
-
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-asmlinkage int sys_ipc(uint call, int first, int second,
-                        int third, void __user *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        switch (call) {
-        case SEMOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr, second, NULL);
-        case SEMTIMEDOP:
-                return sys_semtimedop(first, (struct sembuf __user *)ptr, second,
-                                        (const struct timespec __user *)fifth);
-
-        case SEMGET:
-                return sys_semget(first, second, third);
-        case SEMCTL: {
-                union semun fourth;
-                if (!ptr)
-                        return -EINVAL;
-                if (get_user(fourth.__pad, (void __user * __user *) ptr))
-                        return -EFAULT;
-                return sys_semctl(first, second, third, fourth);
-        }
-
-        case MSGSND:
-                return sys_msgsnd(first, (struct msgbuf __user *) ptr,
-                                   second, third);
-        case MSGRCV:
-                switch (version) {
-                case 0: {
-                        struct ipc_kludge tmp;
-                        if (!ptr)
-                                return -EINVAL;
-
-                        if (copy_from_user(&tmp,
-                                           (struct ipc_kludge __user *) ptr,
-                                           sizeof(tmp)))
-                                return -EFAULT;
-                        return sys_msgrcv(first, tmp.msgp, second,
-                                           tmp.msgtyp, third);
-                }
-                default:
-                        return sys_msgrcv(first,
-                                           (struct msgbuf __user *) ptr,
-                                           second, fifth, third);
-                }
-        case MSGGET:
-                return sys_msgget((key_t) first, second);
-        case MSGCTL:
-                return sys_msgctl(first, second, (struct msqid_ds __user *) ptr);
-
-        case SHMAT:
-                switch (version) {
-                default: {
-                        ulong raddr;
-                        ret = do_shmat(first, (char __user *) ptr, second, &raddr);
-                        if (ret)
-                                return ret;
-                        return put_user(raddr, (ulong __user *) third);
-                }
-                case 1: /* iBCS2 emulator entry point */
-                        if (!segment_eq(get_fs(), get_ds()))
-                                return -EINVAL;
-                        /* The "(ulong *) third" is valid _only_ because of the kernel segment thing */
-                        return do_shmat(first, (char __user *) ptr, second, (ulong *) third);
-                }
-        case SHMDT:
-                return sys_shmdt((char __user *)ptr);
-        case SHMGET:
-                return sys_shmget(first, second, third);
-        case SHMCTL:
-                return sys_shmctl(first, second,
-                                   (struct shmid_ds __user *) ptr);
-        default:
-                return -ENOSYS;
-        }
-}
-
-/*
- * Old cruft
- */
-asmlinkage int sys_uname(struct old_utsname __user *name)
-{
-        int err;
-        if (!name)
-                return -EFAULT;
-        down_read(&uts_sem);
-        err = copy_to_user(name, utsname(), sizeof(*name));
-        up_read(&uts_sem);
-        return err? -EFAULT:0;
-}
-
-asmlinkage int sys_olduname(struct oldold_utsname __user *name)
-{
-        int error;
-
-        if (!name)
-                return -EFAULT;
-        if (!access_ok(VERIFY_WRITE, name, sizeof(struct oldold_utsname)))
-                return -EFAULT;
-
-        down_read(&uts_sem);
-
-        error = __copy_to_user(&name->sysname, &utsname()->sysname,
-                               __OLD_UTS_LEN);
-        error |= __put_user(0, name->sysname + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->nodename, &utsname()->nodename,
-                                __OLD_UTS_LEN);
-        error |= __put_user(0, name->nodename + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->release, &utsname()->release,
-                                __OLD_UTS_LEN);
-        error |= __put_user(0, name->release + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->version, &utsname()->version,
-                                __OLD_UTS_LEN);
-        error |= __put_user(0, name->version + __OLD_UTS_LEN);
-        error |= __copy_to_user(&name->machine, &utsname()->machine,
-                                __OLD_UTS_LEN);
-        error |= __put_user(0, name->machine + __OLD_UTS_LEN);
-
-        up_read(&uts_sem);
-
-        error = error ? -EFAULT : 0;
-
-        return error;
-}
-
-
-/*
  * Do a system call from kernel instead of calling sys_execve so we
  * end up with proper pt_regs.
  */
diff --git a/arch/x86/kernel/sys_x86_64.c b/arch/x86/kernel/sys_x86_64.c
index 8aa2057efd1..ff14a5044ce 100644
--- a/arch/x86/kernel/sys_x86_64.c
+++ b/arch/x86/kernel/sys_x86_64.c
@@ -209,15 +209,3 @@ bottomup:
 
         return addr;
 }
-
-
-SYSCALL_DEFINE1(uname, struct new_utsname __user *, name)
-{
-        int err;
-        down_read(&uts_sem);
-        err = copy_to_user(name, utsname(), sizeof(*name));
-        up_read(&uts_sem);
-        if (personality(current->personality) == PER_LINUX32)
-                err |= copy_to_user(&name->machine, "i686", 5);
-        return err ? -EFAULT : 0;
-}
diff --git a/arch/x86/kernel/syscall_table_32.S b/arch/x86/kernel/syscall_table_32.S
index 15228b5d3eb..8b372934121 100644
--- a/arch/x86/kernel/syscall_table_32.S
+++ b/arch/x86/kernel/syscall_table_32.S
@@ -81,7 +81,7 @@ ENTRY(sys_call_table)
         .long sys_settimeofday
         .long sys_getgroups16   /* 80 */
         .long sys_setgroups16
-        .long old_select
+        .long sys_old_select
         .long sys_symlink
         .long sys_lstat
         .long sys_readlink      /* 85 */
@@ -89,7 +89,7 @@ ENTRY(sys_call_table)
         .long sys_swapon
         .long sys_reboot
         .long sys_old_readdir
-        .long old_mmap          /* 90 */
+        .long sys_old_mmap      /* 90 */
         .long sys_munmap
         .long sys_truncate
         .long sys_ftruncate
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c
index 364d015efeb..17b03dd3a6b 100644
--- a/arch/x86/kernel/tlb_uv.c
+++ b/arch/x86/kernel/tlb_uv.c
@@ -9,6 +9,7 @@
 #include <linux/seq_file.h>
 #include <linux/proc_fs.h>
 #include <linux/kernel.h>
+#include <linux/slab.h>
 
 #include <asm/mmu_context.h>
 #include <asm/uv/uv.h>
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 208a857c679..9faf91ae184 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -50,7 +50,7 @@ u64 native_sched_clock(void)
          *   unstable. We do this because unlike Time Of Day,
          *   the scheduler clock tolerates small errors and it's
          *   very important for it to be as fast as the platform
-         *   can achive it. )
+         *   can achieve it. )
          */
         if (unlikely(tsc_disabled)) {
                 /* No locking but a rare wrong value is not a big deal: */
diff --git a/arch/x86/kernel/uv_irq.c b/arch/x86/kernel/uv_irq.c
index ece73d8e324..1d40336b030 100644
--- a/arch/x86/kernel/uv_irq.c
+++ b/arch/x86/kernel/uv_irq.c
@@ -10,6 +10,7 @@
 
 #include <linux/module.h>
 #include <linux/rbtree.h>
+#include <linux/slab.h>
 #include <linux/irq.h>
 
 #include <asm/apic.h>
diff --git a/arch/x86/kernel/uv_time.c b/arch/x86/kernel/uv_time.c
index 2b75ef638db..56e421bc379 100644
--- a/arch/x86/kernel/uv_time.c
+++ b/arch/x86/kernel/uv_time.c
@@ -19,6 +19,7 @@
  *  Copyright (c) Dimitri Sivanich
  */
 #include <linux/clockchips.h>
+#include <linux/slab.h>
 
 #include <asm/uv/uv_mmrs.h>
 #include <asm/uv/uv_hub.h>
diff --git a/arch/x86/kernel/visws_quirks.c b/arch/x86/kernel/visws_quirks.c
index ab38ce0984f..e680ea52db9 100644
--- a/arch/x86/kernel/visws_quirks.c
+++ b/arch/x86/kernel/visws_quirks.c
@@ -49,11 +49,6 @@ extern int no_broadcast;
 char visws_board_type   = -1;
 char visws_board_rev    = -1;
 
-int is_visws_box(void)
-{
-        return visws_board_type >= 0;
-}
-
 static void __init visws_time_init(void)
 {
         printk(KERN_INFO "Starting Cobalt Timer system clock\n");
@@ -242,6 +237,8 @@ void __init visws_early_detect(void)
         x86_init.irqs.pre_vector_init = visws_pre_intr_init;
         x86_init.irqs.trap_init = visws_trap_init;
         x86_init.timers.timer_init = visws_time_init;
+        x86_init.pci.init = pci_visws_init;
+        x86_init.pci.init_irq = x86_init_noop;
 
         /*
          * Install reboot quirks:
@@ -508,7 +505,7 @@ static struct irq_chip cobalt_irq_type = {
  */
 static unsigned int startup_piix4_master_irq(unsigned int irq)
 {
-        init_8259A(0);
+        legacy_pic->init(0);
 
         return startup_cobalt_irq(irq);
 }
@@ -532,9 +529,6 @@ static struct irq_chip piix4_master_irq_type = {
 
 static struct irq_chip piix4_virtual_irq_type = {
         .name =         "PIIX4-virtual",
-        .shutdown =     disable_8259A_irq,
-        .enable =       enable_8259A_irq,
-        .disable =      disable_8259A_irq,
 };
 
 
@@ -609,7 +603,7 @@ static irqreturn_t piix4_master_intr(int irq, void *dev_id)
                 handle_IRQ_event(realirq, desc->action);
 
         if (!(desc->status & IRQ_DISABLED))
-                enable_8259A_irq(realirq);
+                legacy_pic->chip->unmask(realirq);
 
         return IRQ_HANDLED;
 
@@ -628,6 +622,12 @@ static struct irqaction cascade_action = {
         .name =         "cascade",
 };
 
+static inline void set_piix4_virtual_irq_type(void)
+{
+        piix4_virtual_irq_type.shutdown = i8259A_chip.mask;
+        piix4_virtual_irq_type.enable = i8259A_chip.unmask;
+        piix4_virtual_irq_type.disable = i8259A_chip.mask;
+}
 
 void init_VISWS_APIC_irqs(void)
 {
@@ -653,6 +653,7 @@ void init_VISWS_APIC_irqs(void)
                         desc->chip = &piix4_master_irq_type;
                 }
                 else if (i < CO_IRQ_APIC0) {
+                        set_piix4_virtual_irq_type();
                         desc->chip = &piix4_virtual_irq_type;
                 }
                 else if (IS_CO_APIC(i)) {
diff --git a/arch/x86/kernel/vmi_32.c b/arch/x86/kernel/vmi_32.c
index 7dd599deca4..ce9fbacb752 100644
--- a/arch/x86/kernel/vmi_32.c
+++ b/arch/x86/kernel/vmi_32.c
@@ -28,6 +28,7 @@
 #include <linux/mm.h>
 #include <linux/highmem.h>
 #include <linux/sched.h>
+#include <linux/gfp.h>
 #include <asm/vmi.h>
 #include <asm/io.h>
 #include <asm/fixmap.h>
diff --git a/arch/x86/kernel/vmiclock_32.c b/arch/x86/kernel/vmiclock_32.c
index 2f1ca561429..5e1ff66ecd7 100644
--- a/arch/x86/kernel/vmiclock_32.c
+++ b/arch/x86/kernel/vmiclock_32.c
@@ -167,7 +167,7 @@ static int vmi_timer_next_event(unsigned long delta,
 {
         /* Unfortunately, set_next_event interface only passes relative
          * expiry, but we want absolute expiry.  It'd be better if were
-         * were passed an aboslute expiry, since a bunch of time may
+         * were passed an absolute expiry, since a bunch of time may
          * have been stolen between the time the delta is computed and
          * when we set the alarm below. */
         cycle_t now = vmi_timer_ops.get_cycle_counter(vmi_counter(VMI_ONESHOT));
diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S
index 44879df5569..2cc249718c4 100644
--- a/arch/x86/kernel/vmlinux.lds.S
+++ b/arch/x86/kernel/vmlinux.lds.S
@@ -291,8 +291,8 @@ SECTIONS
         .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) {
                 __smp_locks = .;
                 *(.smp_locks)
-                __smp_locks_end = .;
                 . = ALIGN(PAGE_SIZE);
+                __smp_locks_end = .;
         }
 
 #ifdef CONFIG_X86_64
diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/kernel/vsyscall_64.c
index 9055e5872ff..1c0c6ab9c60 100644
--- a/arch/x86/kernel/vsyscall_64.c
+++ b/arch/x86/kernel/vsyscall_64.c
@@ -301,7 +301,8 @@ static int __init vsyscall_init(void)
         register_sysctl_table(kernel_root_table2);
 #endif
         on_each_cpu(cpu_vsyscall_init, NULL, 1);
-        hotcpu_notifier(cpu_vsyscall_notifier, 0);
+        /* notifier priority > KVM */
+        hotcpu_notifier(cpu_vsyscall_notifier, 30);
         return 0;
 }
 
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index ee5746c9462..61a1e8c7e19 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -4,9 +4,11 @@
  *  For licencing details see kernel-base/COPYING
  */
 #include <linux/init.h>
+#include <linux/ioport.h>
 
 #include <asm/bios_ebda.h>
 #include <asm/paravirt.h>
+#include <asm/pci_x86.h>
 #include <asm/mpspec.h>
 #include <asm/setup.h>
 #include <asm/apic.h>
@@ -70,6 +72,12 @@ struct x86_init_ops x86_init __initdata = {
         .iommu = {
                 .iommu_init             = iommu_init_noop,
         },
+
+        .pci = {
+                .init                   = x86_default_pci_init,
+                .init_irq               = x86_default_pci_init_irq,
+                .fixup_irqs             = x86_default_pci_fixup_irqs,
+        },
 };
 
 struct x86_cpuinit_ops x86_cpuinit __cpuinitdata = {
diff --git a/arch/x86/kvm/Kconfig b/arch/x86/kvm/Kconfig
index 3c4d0109ad2..970bbd47951 100644
--- a/arch/x86/kvm/Kconfig
+++ b/arch/x86/kvm/Kconfig
@@ -29,6 +29,7 @@ config KVM
         select HAVE_KVM_EVENTFD
         select KVM_APIC_ARCHITECTURE
         select USER_RETURN_NOTIFIER
+        select KVM_MMIO
         ---help---
           Support hosting fully virtualized guest machines using hardware
           virtualization extensions.  You will need a fairly recent
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 7e8faea4651..4dade6ac082 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -32,7 +32,7 @@
 #include <linux/module.h>
 #include <asm/kvm_emulate.h>
 
-#include "mmu.h"                /* for is_long_mode() */
+#include "x86.h"
 
 /*
  * Opcode effective-address decode tables.
@@ -76,6 +76,8 @@
 #define GroupDual   (1<<15)     /* Alternate decoding of mod == 3 */
 #define GroupMask   0xff        /* Group number stored in bits 0:7 */
 /* Misc flags */
+#define Lock        (1<<26) /* lock prefix is allowed for the instruction */
+#define Priv        (1<<27) /* instruction generates #GP if current CPL != 0 */
 #define No64        (1<<28)
 /* Source 2 operand type */
 #define Src2None    (0<<29)
@@ -88,39 +90,40 @@
 enum {
         Group1_80, Group1_81, Group1_82, Group1_83,
         Group1A, Group3_Byte, Group3, Group4, Group5, Group7,
+        Group8, Group9,
 };
 
 static u32 opcode_table[256] = {
         /* 0x00 - 0x07 */
-        ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
+        ByteOp | DstMem | SrcReg | ModRM | Lock, DstMem | SrcReg | ModRM | Lock,
         ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
         ByteOp | DstAcc | SrcImm, DstAcc | SrcImm,
         ImplicitOps | Stack | No64, ImplicitOps | Stack | No64,
         /* 0x08 - 0x0F */
-        ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
+        ByteOp | DstMem | SrcReg | ModRM | Lock, DstMem | SrcReg | ModRM | Lock,
         ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
         ByteOp | DstAcc | SrcImm, DstAcc | SrcImm,
         ImplicitOps | Stack | No64, 0,
         /* 0x10 - 0x17 */
-        ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
+        ByteOp | DstMem | SrcReg | ModRM | Lock, DstMem | SrcReg | ModRM | Lock,
         ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
         ByteOp | DstAcc | SrcImm, DstAcc | SrcImm,
         ImplicitOps | Stack | No64, ImplicitOps | Stack | No64,
         /* 0x18 - 0x1F */
-        ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
+        ByteOp | DstMem | SrcReg | ModRM | Lock, DstMem | SrcReg | ModRM | Lock,
         ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
         ByteOp | DstAcc | SrcImm, DstAcc | SrcImm,
         ImplicitOps | Stack | No64, ImplicitOps | Stack | No64,
         /* 0x20 - 0x27 */
-        ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
+        ByteOp | DstMem | SrcReg | ModRM | Lock, DstMem | SrcReg | ModRM | Lock,
         ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
         DstAcc | SrcImmByte, DstAcc | SrcImm, 0, 0,
         /* 0x28 - 0x2F */
-        ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
+        ByteOp | DstMem | SrcReg | ModRM | Lock, DstMem | SrcReg | ModRM | Lock,
         ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
         0, 0, 0, 0,
         /* 0x30 - 0x37 */
-        ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
+        ByteOp | DstMem | SrcReg | ModRM | Lock, DstMem | SrcReg | ModRM | Lock,
         ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
         0, 0, 0, 0,
         /* 0x38 - 0x3F */
@@ -156,7 +159,7 @@ static u32 opcode_table[256] = {
         Group | Group1_80, Group | Group1_81,
         Group | Group1_82, Group | Group1_83,
         ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
-        ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
+        ByteOp | DstMem | SrcReg | ModRM | Lock, DstMem | SrcReg | ModRM | Lock,
         /* 0x88 - 0x8F */
         ByteOp | DstMem | SrcReg | ModRM | Mov, DstMem | SrcReg | ModRM | Mov,
         ByteOp | DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
@@ -210,7 +213,7 @@ static u32 opcode_table[256] = {
         SrcNone | ByteOp | ImplicitOps, SrcNone | ImplicitOps,
         /* 0xF0 - 0xF7 */
         0, 0, 0, 0,
-        ImplicitOps, ImplicitOps, Group | Group3_Byte, Group | Group3,
+        ImplicitOps | Priv, ImplicitOps, Group | Group3_Byte, Group | Group3,
         /* 0xF8 - 0xFF */
         ImplicitOps, 0, ImplicitOps, ImplicitOps,
         ImplicitOps, ImplicitOps, Group | Group4, Group | Group5,
@@ -218,16 +221,20 @@ static u32 opcode_table[256] = {
 
 static u32 twobyte_table[256] = {
         /* 0x00 - 0x0F */
-        0, Group | GroupDual | Group7, 0, 0, 0, ImplicitOps, ImplicitOps, 0,
-        ImplicitOps, ImplicitOps, 0, 0, 0, ImplicitOps | ModRM, 0, 0,
+        0, Group | GroupDual | Group7, 0, 0,
+        0, ImplicitOps, ImplicitOps | Priv, 0,
+        ImplicitOps | Priv, ImplicitOps | Priv, 0, 0,
+        0, ImplicitOps | ModRM, 0, 0,
         /* 0x10 - 0x1F */
         0, 0, 0, 0, 0, 0, 0, 0, ImplicitOps | ModRM, 0, 0, 0, 0, 0, 0, 0,
         /* 0x20 - 0x2F */
-        ModRM | ImplicitOps, ModRM, ModRM | ImplicitOps, ModRM, 0, 0, 0, 0,
+        ModRM | ImplicitOps | Priv, ModRM | Priv,
+        ModRM | ImplicitOps | Priv, ModRM | Priv,
+        0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0,
         /* 0x30 - 0x3F */
-        ImplicitOps, 0, ImplicitOps, 0,
-        ImplicitOps, ImplicitOps, 0, 0,
+        ImplicitOps | Priv, 0, ImplicitOps | Priv, 0,
+        ImplicitOps, ImplicitOps | Priv, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0,
         /* 0x40 - 0x47 */
         DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
@@ -257,21 +264,23 @@ static u32 twobyte_table[256] = {
         DstMem | SrcReg | Src2CL | ModRM, 0, 0,
         /* 0xA8 - 0xAF */
         ImplicitOps | Stack, ImplicitOps | Stack,
-        0, DstMem | SrcReg | ModRM | BitOp,
+        0, DstMem | SrcReg | ModRM | BitOp | Lock,
         DstMem | SrcReg | Src2ImmByte | ModRM,
         DstMem | SrcReg | Src2CL | ModRM,
         ModRM, 0,
         /* 0xB0 - 0xB7 */
-        ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM, 0,
-            DstMem | SrcReg | ModRM | BitOp,
+        ByteOp | DstMem | SrcReg | ModRM | Lock, DstMem | SrcReg | ModRM | Lock,
+        0, DstMem | SrcReg | ModRM | BitOp | Lock,
         0, 0, ByteOp | DstReg | SrcMem | ModRM | Mov,
             DstReg | SrcMem16 | ModRM | Mov,
         /* 0xB8 - 0xBF */
-        0, 0, DstMem | SrcImmByte | ModRM, DstMem | SrcReg | ModRM | BitOp,
+        0, 0,
+        Group | Group8, DstMem | SrcReg | ModRM | BitOp | Lock,
         0, 0, ByteOp | DstReg | SrcMem | ModRM | Mov,
             DstReg | SrcMem16 | ModRM | Mov,
         /* 0xC0 - 0xCF */
-        0, 0, 0, DstMem | SrcReg | ModRM | Mov, 0, 0, 0, ImplicitOps | ModRM,
+        0, 0, 0, DstMem | SrcReg | ModRM | Mov,
+        0, 0, 0, Group | GroupDual | Group9,
         0, 0, 0, 0, 0, 0, 0, 0,
         /* 0xD0 - 0xDF */
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -283,25 +292,41 @@ static u32 twobyte_table[256] = {
 
 static u32 group_table[] = {
         [Group1_80*8] =
-        ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
-        ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
-        ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
-        ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
+        ByteOp | DstMem | SrcImm | ModRM | Lock,
+        ByteOp | DstMem | SrcImm | ModRM | Lock,
+        ByteOp | DstMem | SrcImm | ModRM | Lock,
+        ByteOp | DstMem | SrcImm | ModRM | Lock,
+        ByteOp | DstMem | SrcImm | ModRM | Lock,
+        ByteOp | DstMem | SrcImm | ModRM | Lock,
+        ByteOp | DstMem | SrcImm | ModRM | Lock,
+        ByteOp | DstMem | SrcImm | ModRM,
         [Group1_81*8] =
-        DstMem | SrcImm | ModRM, DstMem | SrcImm | ModRM,
-        DstMem | SrcImm | ModRM, DstMem | SrcImm | ModRM,
-        DstMem | SrcImm | ModRM, DstMem | SrcImm | ModRM,
-        DstMem | SrcImm | ModRM, DstMem | SrcImm | ModRM,
+        DstMem | SrcImm | ModRM | Lock,
+        DstMem | SrcImm | ModRM | Lock,
+        DstMem | SrcImm | ModRM | Lock,
+        DstMem | SrcImm | ModRM | Lock,
+        DstMem | SrcImm | ModRM | Lock,
+        DstMem | SrcImm | ModRM | Lock,
+        DstMem | SrcImm | ModRM | Lock,
+        DstMem | SrcImm | ModRM,
         [Group1_82*8] =
-        ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
-        ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
-        ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
-        ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
+        ByteOp | DstMem | SrcImm | ModRM | No64 | Lock,
+        ByteOp | DstMem | SrcImm | ModRM | No64 | Lock,
+        ByteOp | DstMem | SrcImm | ModRM | No64 | Lock,
+        ByteOp | DstMem | SrcImm | ModRM | No64 | Lock,
+        ByteOp | DstMem | SrcImm | ModRM | No64 | Lock,
+        ByteOp | DstMem | SrcImm | ModRM | No64 | Lock,
+        ByteOp | DstMem | SrcImm | ModRM | No64 | Lock,
+        ByteOp | DstMem | SrcImm | ModRM | No64,
         [Group1_83*8] =
-        DstMem | SrcImmByte | ModRM, DstMem | SrcImmByte | ModRM,
-        DstMem | SrcImmByte | ModRM, DstMem | SrcImmByte | ModRM,
-        DstMem | SrcImmByte | ModRM, DstMem | SrcImmByte | ModRM,
-        DstMem | SrcImmByte | ModRM, DstMem | SrcImmByte | ModRM,
+        DstMem | SrcImmByte | ModRM | Lock,
+        DstMem | SrcImmByte | ModRM | Lock,
+        DstMem | SrcImmByte | ModRM | Lock,
+        DstMem | SrcImmByte | ModRM | Lock,
+        DstMem | SrcImmByte | ModRM | Lock,
+        DstMem | SrcImmByte | ModRM | Lock,
+        DstMem | SrcImmByte | ModRM | Lock,
+        DstMem | SrcImmByte | ModRM,
         [Group1A*8] =
         DstMem | SrcNone | ModRM | Mov | Stack, 0, 0, 0, 0, 0, 0, 0,
         [Group3_Byte*8] =
@@ -320,24 +345,39 @@ static u32 group_table[] = {
         SrcMem | ModRM | Stack, 0,
         SrcMem | ModRM | Stack, 0, SrcMem | ModRM | Stack, 0,
         [Group7*8] =
-        0, 0, ModRM | SrcMem, ModRM | SrcMem,
+        0, 0, ModRM | SrcMem | Priv, ModRM | SrcMem | Priv,
         SrcNone | ModRM | DstMem | Mov, 0,
-        SrcMem16 | ModRM | Mov, SrcMem | ModRM | ByteOp,
+        SrcMem16 | ModRM | Mov | Priv, SrcMem | ModRM | ByteOp | Priv,
+        [Group8*8] =
+        0, 0, 0, 0,
+        DstMem | SrcImmByte | ModRM, DstMem | SrcImmByte | ModRM | Lock,
+        DstMem | SrcImmByte | ModRM | Lock, DstMem | SrcImmByte | ModRM | Lock,
+        [Group9*8] =
+        0, ImplicitOps | ModRM | Lock, 0, 0, 0, 0, 0, 0,
 };
 
 static u32 group2_table[] = {
         [Group7*8] =
-        SrcNone | ModRM, 0, 0, SrcNone | ModRM,
+        SrcNone | ModRM | Priv, 0, 0, SrcNone | ModRM,
         SrcNone | ModRM | DstMem | Mov, 0,
         SrcMem16 | ModRM | Mov, 0,
+        [Group9*8] =
+        0, 0, 0, 0, 0, 0, 0, 0,
 };
 
 /* EFLAGS bit definitions. */
+#define EFLG_ID (1<<21)
+#define EFLG_VIP (1<<20)
+#define EFLG_VIF (1<<19)
+#define EFLG_AC (1<<18)
 #define EFLG_VM (1<<17)
 #define EFLG_RF (1<<16)
+#define EFLG_IOPL (3<<12)
+#define EFLG_NT (1<<14)
 #define EFLG_OF (1<<11)
 #define EFLG_DF (1<<10)
 #define EFLG_IF (1<<9)
+#define EFLG_TF (1<<8)
 #define EFLG_SF (1<<7)
 #define EFLG_ZF (1<<6)
 #define EFLG_AF (1<<4)
@@ -606,7 +646,7 @@ static int do_fetch_insn_byte(struct x86_emulate_ctxt *ctxt,
 
         if (linear < fc->start || linear >= fc->end) {
                 size = min(15UL, PAGE_SIZE - offset_in_page(linear));
-                rc = ops->read_std(linear, fc->data, size, ctxt->vcpu);
+                rc = ops->fetch(linear, fc->data, size, ctxt->vcpu, NULL);
                 if (rc)
                         return rc;
                 fc->start = linear;
@@ -661,11 +701,11 @@ static int read_descriptor(struct x86_emulate_ctxt *ctxt,
                 op_bytes = 3;
         *address = 0;
         rc = ops->read_std((unsigned long)ptr, (unsigned long *)size, 2,
-                           ctxt->vcpu);
+                           ctxt->vcpu, NULL);
         if (rc)
                 return rc;
         rc = ops->read_std((unsigned long)ptr + 2, address, op_bytes,
-                           ctxt->vcpu);
+                           ctxt->vcpu, NULL);
         return rc;
 }
 
@@ -889,6 +929,7 @@ x86_decode_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
 
         switch (mode) {
         case X86EMUL_MODE_REAL:
+        case X86EMUL_MODE_VM86:
         case X86EMUL_MODE_PROT16:
                 def_op_bytes = def_ad_bytes = 2;
                 break;
@@ -975,7 +1016,7 @@ done_prefixes:
         }
 
         if (mode == X86EMUL_MODE_PROT64 && (c->d & No64)) {
-                kvm_report_emulation_failure(ctxt->vcpu, "invalid x86/64 instruction");;
+                kvm_report_emulation_failure(ctxt->vcpu, "invalid x86/64 instruction");
                 return -1;
         }
 
@@ -1196,13 +1237,56 @@ static int emulate_pop(struct x86_emulate_ctxt *ctxt,
         rc = ops->read_emulated(register_address(c, ss_base(ctxt),
                                                  c->regs[VCPU_REGS_RSP]),
                                 dest, len, ctxt->vcpu);
-        if (rc != 0)
+        if (rc != X86EMUL_CONTINUE)
                 return rc;
 
         register_address_increment(c, &c->regs[VCPU_REGS_RSP], len);
         return rc;
 }
 
+static int emulate_popf(struct x86_emulate_ctxt *ctxt,
+                       struct x86_emulate_ops *ops,
+                       void *dest, int len)
+{
+        int rc;
+        unsigned long val, change_mask;
+        int iopl = (ctxt->eflags & X86_EFLAGS_IOPL) >> IOPL_SHIFT;
+        int cpl = kvm_x86_ops->get_cpl(ctxt->vcpu);
+
+        rc = emulate_pop(ctxt, ops, &val, len);
+        if (rc != X86EMUL_CONTINUE)
+                return rc;
+
+        change_mask = EFLG_CF | EFLG_PF | EFLG_AF | EFLG_ZF | EFLG_SF | EFLG_OF
+                | EFLG_TF | EFLG_DF | EFLG_NT | EFLG_RF | EFLG_AC | EFLG_ID;
+
+        switch(ctxt->mode) {
+        case X86EMUL_MODE_PROT64:
+        case X86EMUL_MODE_PROT32:
+        case X86EMUL_MODE_PROT16:
+                if (cpl == 0)
+                        change_mask |= EFLG_IOPL;
+                if (cpl <= iopl)
+                        change_mask |= EFLG_IF;
+                break;
+        case X86EMUL_MODE_VM86:
+                if (iopl < 3) {
+                        kvm_inject_gp(ctxt->vcpu, 0);
+                        return X86EMUL_PROPAGATE_FAULT;
+                }
+                change_mask |= EFLG_IF;
+                break;
+        default: /* real mode */
+                change_mask |= (EFLG_IOPL | EFLG_IF);
+                break;
+        }
+
+        *(unsigned long *)dest =
+                (ctxt->eflags & ~change_mask) | (val & change_mask);
+
+        return rc;
+}
+
 static void emulate_push_sreg(struct x86_emulate_ctxt *ctxt, int seg)
 {
         struct decode_cache *c = &ctxt->decode;
@@ -1225,7 +1309,7 @@ static int emulate_pop_sreg(struct x86_emulate_ctxt *ctxt,
         if (rc != 0)
                 return rc;
 
-        rc = kvm_load_segment_descriptor(ctxt->vcpu, (u16)selector, 1, seg);
+        rc = kvm_load_segment_descriptor(ctxt->vcpu, (u16)selector, seg);
         return rc;
 }
 
@@ -1370,7 +1454,7 @@ static inline int emulate_grp9(struct x86_emulate_ctxt *ctxt,
         int rc;
 
         rc = ops->read_emulated(memop, &old, 8, ctxt->vcpu);
-        if (rc != 0)
+        if (rc != X86EMUL_CONTINUE)
                 return rc;
 
         if (((u32) (old >> 0) != (u32) c->regs[VCPU_REGS_RAX]) ||
@@ -1385,7 +1469,7 @@ static inline int emulate_grp9(struct x86_emulate_ctxt *ctxt,
                        (u32) c->regs[VCPU_REGS_RBX];
 
                 rc = ops->cmpxchg_emulated(memop, &old, &new, 8, ctxt->vcpu);
-                if (rc != 0)
+                if (rc != X86EMUL_CONTINUE)
                         return rc;
                 ctxt->eflags |= EFLG_ZF;
         }
@@ -1407,7 +1491,7 @@ static int emulate_ret_far(struct x86_emulate_ctxt *ctxt,
         rc = emulate_pop(ctxt, ops, &cs, c->op_bytes);
         if (rc)
                 return rc;
-        rc = kvm_load_segment_descriptor(ctxt->vcpu, (u16)cs, 1, VCPU_SREG_CS);
+        rc = kvm_load_segment_descriptor(ctxt->vcpu, (u16)cs, VCPU_SREG_CS);
         return rc;
 }
 
@@ -1451,7 +1535,7 @@ static inline int writeback(struct x86_emulate_ctxt *ctxt,
                                         &c->dst.val,
                                         c->dst.bytes,
                                         ctxt->vcpu);
-                if (rc != 0)
+                if (rc != X86EMUL_CONTINUE)
                         return rc;
                 break;
         case OP_NONE:
@@ -1514,9 +1598,8 @@ emulate_syscall(struct x86_emulate_ctxt *ctxt)
         u64 msr_data;
 
         /* syscall is not available in real mode */
-        if (c->lock_prefix || ctxt->mode == X86EMUL_MODE_REAL
-                || !(ctxt->vcpu->arch.cr0 & X86_CR0_PE))
-                return -1;
+        if (ctxt->mode == X86EMUL_MODE_REAL || ctxt->mode == X86EMUL_MODE_VM86)
+                return X86EMUL_UNHANDLEABLE;
 
         setup_syscalls_segments(ctxt, &cs, &ss);
 
@@ -1553,7 +1636,7 @@ emulate_syscall(struct x86_emulate_ctxt *ctxt)
                 ctxt->eflags &= ~(EFLG_VM | EFLG_IF | EFLG_RF);
         }
 
-        return 0;
+        return X86EMUL_CONTINUE;
 }
 
 static int
@@ -1563,22 +1646,17 @@ emulate_sysenter(struct x86_emulate_ctxt *ctxt)
         struct kvm_segment cs, ss;
         u64 msr_data;
 
-        /* inject #UD if LOCK prefix is used */
-        if (c->lock_prefix)
-                return -1;
-
-        /* inject #GP if in real mode or paging is disabled */
-        if (ctxt->mode == X86EMUL_MODE_REAL ||
-                !(ctxt->vcpu->arch.cr0 & X86_CR0_PE)) {
+        /* inject #GP if in real mode */
+        if (ctxt->mode == X86EMUL_MODE_REAL) {
                 kvm_inject_gp(ctxt->vcpu, 0);
-                return -1;
+                return X86EMUL_UNHANDLEABLE;
         }
 
         /* XXX sysenter/sysexit have not been tested in 64bit mode.
         * Therefore, we inject an #UD.
         */
         if (ctxt->mode == X86EMUL_MODE_PROT64)
-                return -1;
+                return X86EMUL_UNHANDLEABLE;
 
         setup_syscalls_segments(ctxt, &cs, &ss);
 
@@ -1587,13 +1665,13 @@ emulate_sysenter(struct x86_emulate_ctxt *ctxt)
         case X86EMUL_MODE_PROT32:
                 if ((msr_data & 0xfffc) == 0x0) {
                         kvm_inject_gp(ctxt->vcpu, 0);
-                        return -1;
+                        return X86EMUL_PROPAGATE_FAULT;
                 }
                 break;
         case X86EMUL_MODE_PROT64:
                 if (msr_data == 0x0) {
                         kvm_inject_gp(ctxt->vcpu, 0);
-                        return -1;
+                        return X86EMUL_PROPAGATE_FAULT;
                 }
                 break;
         }
@@ -1618,7 +1696,7 @@ emulate_sysenter(struct x86_emulate_ctxt *ctxt)
         kvm_x86_ops->get_msr(ctxt->vcpu, MSR_IA32_SYSENTER_ESP, &msr_data);
         c->regs[VCPU_REGS_RSP] = msr_data;
 
-        return 0;
+        return X86EMUL_CONTINUE;
 }
 
 static int
@@ -1629,21 +1707,11 @@ emulate_sysexit(struct x86_emulate_ctxt *ctxt)
         u64 msr_data;
         int usermode;
 
-        /* inject #UD if LOCK prefix is used */
-        if (c->lock_prefix)
-                return -1;
-
-        /* inject #GP if in real mode or paging is disabled */
-        if (ctxt->mode == X86EMUL_MODE_REAL
-                || !(ctxt->vcpu->arch.cr0 & X86_CR0_PE)) {
-                kvm_inject_gp(ctxt->vcpu, 0);
-                return -1;
-        }
-
-        /* sysexit must be called from CPL 0 */
-        if (kvm_x86_ops->get_cpl(ctxt->vcpu) != 0) {
+        /* inject #GP if in real mode or Virtual 8086 mode */
+        if (ctxt->mode == X86EMUL_MODE_REAL ||
+            ctxt->mode == X86EMUL_MODE_VM86) {
                 kvm_inject_gp(ctxt->vcpu, 0);
-                return -1;
+                return X86EMUL_UNHANDLEABLE;
         }
 
         setup_syscalls_segments(ctxt, &cs, &ss);
@@ -1661,7 +1729,7 @@ emulate_sysexit(struct x86_emulate_ctxt *ctxt)
                 cs.selector = (u16)(msr_data + 16);
                 if ((msr_data & 0xfffc) == 0x0) {
                         kvm_inject_gp(ctxt->vcpu, 0);
-                        return -1;
+                        return X86EMUL_PROPAGATE_FAULT;
                 }
                 ss.selector = (u16)(msr_data + 24);
                 break;
@@ -1669,7 +1737,7 @@ emulate_sysexit(struct x86_emulate_ctxt *ctxt)
                 cs.selector = (u16)(msr_data + 32);
                 if (msr_data == 0x0) {
                         kvm_inject_gp(ctxt->vcpu, 0);
-                        return -1;
+                        return X86EMUL_PROPAGATE_FAULT;
                 }
                 ss.selector = cs.selector + 8;
                 cs.db = 0;
@@ -1685,7 +1753,58 @@ emulate_sysexit(struct x86_emulate_ctxt *ctxt)
         c->eip = ctxt->vcpu->arch.regs[VCPU_REGS_RDX];
         c->regs[VCPU_REGS_RSP] = ctxt->vcpu->arch.regs[VCPU_REGS_RCX];
 
-        return 0;
+        return X86EMUL_CONTINUE;
+}
+
+static bool emulator_bad_iopl(struct x86_emulate_ctxt *ctxt)
+{
+        int iopl;
+        if (ctxt->mode == X86EMUL_MODE_REAL)
+                return false;
+        if (ctxt->mode == X86EMUL_MODE_VM86)
+                return true;
+        iopl = (ctxt->eflags & X86_EFLAGS_IOPL) >> IOPL_SHIFT;
+        return kvm_x86_ops->get_cpl(ctxt->vcpu) > iopl;
+}
+
+static bool emulator_io_port_access_allowed(struct x86_emulate_ctxt *ctxt,
+                                            struct x86_emulate_ops *ops,
+                                            u16 port, u16 len)
+{
+        struct kvm_segment tr_seg;
+        int r;
+        u16 io_bitmap_ptr;
+        u8 perm, bit_idx = port & 0x7;
+        unsigned mask = (1 << len) - 1;
+
+        kvm_get_segment(ctxt->vcpu, &tr_seg, VCPU_SREG_TR);
+        if (tr_seg.unusable)
+                return false;
+        if (tr_seg.limit < 103)
+                return false;
+        r = ops->read_std(tr_seg.base + 102, &io_bitmap_ptr, 2, ctxt->vcpu,
+                          NULL);
+        if (r != X86EMUL_CONTINUE)
+                return false;
+        if (io_bitmap_ptr + port/8 > tr_seg.limit)
+                return false;
+        r = ops->read_std(tr_seg.base + io_bitmap_ptr + port/8, &perm, 1,
+                          ctxt->vcpu, NULL);
+        if (r != X86EMUL_CONTINUE)
+                return false;
+        if ((perm >> bit_idx) & mask)
+                return false;
+        return true;
+}
+
+static bool emulator_io_permited(struct x86_emulate_ctxt *ctxt,
+                                 struct x86_emulate_ops *ops,
+                                 u16 port, u16 len)
+{
+        if (emulator_bad_iopl(ctxt))
+                if (!emulator_io_port_access_allowed(ctxt, ops, port, len))
+                        return false;
+        return true;
 }
 
 int
@@ -1709,6 +1828,18 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
         memcpy(c->regs, ctxt->vcpu->arch.regs, sizeof c->regs);
         saved_eip = c->eip;
 
+        /* LOCK prefix is allowed only with some instructions */
+        if (c->lock_prefix && !(c->d & Lock)) {
+                kvm_queue_exception(ctxt->vcpu, UD_VECTOR);
+                goto done;
+        }
+
+        /* Privileged instruction can be executed only in CPL=0 */
+        if ((c->d & Priv) && kvm_x86_ops->get_cpl(ctxt->vcpu)) {
+                kvm_inject_gp(ctxt->vcpu, 0);
+                goto done;
+        }
+
         if (((c->d & ModRM) && (c->modrm_mod != 3)) || (c->d & MemAbs))
                 memop = c->modrm_ea;
 
@@ -1749,7 +1880,7 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
                                         &c->src.val,
                                         c->src.bytes,
                                         ctxt->vcpu);
-                if (rc != 0)
+                if (rc != X86EMUL_CONTINUE)
                         goto done;
                 c->src.orig_val = c->src.val;
         }
@@ -1768,12 +1899,15 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
                         c->dst.ptr = (void *)c->dst.ptr +
                                                    (c->src.val & mask) / 8;
                 }
-                if (!(c->d & Mov) &&
-                                   /* optimisation - avoid slow emulated read */
-                    ((rc = ops->read_emulated((unsigned long)c->dst.ptr,
-                                           &c->dst.val,
-                                          c->dst.bytes, ctxt->vcpu)) != 0))
-                        goto done;
+                if (!(c->d & Mov)) {
+                        /* optimisation - avoid slow emulated read */
+                        rc = ops->read_emulated((unsigned long)c->dst.ptr,
+                                                &c->dst.val,
+                                                c->dst.bytes,
+                                                ctxt->vcpu);
+                        if (rc != X86EMUL_CONTINUE)
+                                goto done;
+                }
         }
         c->dst.orig_val = c->dst.val;
 
@@ -1876,7 +2010,12 @@ special_insn:
                 break;
         case 0x6c:              /* insb */
         case 0x6d:              /* insw/insd */
-                 if (kvm_emulate_pio_string(ctxt->vcpu,
+                if (!emulator_io_permited(ctxt, ops, c->regs[VCPU_REGS_RDX],
+                                          (c->d & ByteOp) ? 1 : c->op_bytes)) {
+                        kvm_inject_gp(ctxt->vcpu, 0);
+                        goto done;
+                }
+                if (kvm_emulate_pio_string(ctxt->vcpu,
                                 1,
                                 (c->d & ByteOp) ? 1 : c->op_bytes,
                                 c->rep_prefix ?
@@ -1892,6 +2031,11 @@ special_insn:
                 return 0;
         case 0x6e:              /* outsb */
         case 0x6f:              /* outsw/outsd */
+                if (!emulator_io_permited(ctxt, ops, c->regs[VCPU_REGS_RDX],
+                                          (c->d & ByteOp) ? 1 : c->op_bytes)) {
+                        kvm_inject_gp(ctxt->vcpu, 0);
+                        goto done;
+                }
                 if (kvm_emulate_pio_string(ctxt->vcpu,
                                 0,
                                 (c->d & ByteOp) ? 1 : c->op_bytes,
@@ -1978,25 +2122,19 @@ special_insn:
                 break;
         case 0x8e: { /* mov seg, r/m16 */
                 uint16_t sel;
-                int type_bits;
-                int err;
 
                 sel = c->src.val;
-                if (c->modrm_reg == VCPU_SREG_SS)
-                        toggle_interruptibility(ctxt, X86_SHADOW_INT_MOV_SS);
 
-                if (c->modrm_reg <= 5) {
-                        type_bits = (c->modrm_reg == 1) ? 9 : 1;
-                        err = kvm_load_segment_descriptor(ctxt->vcpu, sel,
-                                                          type_bits, c->modrm_reg);
-                } else {
-                        printk(KERN_INFO "Invalid segreg in modrm byte 0x%02x\n",
-                                        c->modrm);
-                        goto cannot_emulate;
+                if (c->modrm_reg == VCPU_SREG_CS ||
+                    c->modrm_reg > VCPU_SREG_GS) {
+                        kvm_queue_exception(ctxt->vcpu, UD_VECTOR);
+                        goto done;
                 }
 
-                if (err < 0)
-                        goto cannot_emulate;
+                if (c->modrm_reg == VCPU_SREG_SS)
+                        toggle_interruptibility(ctxt, X86_SHADOW_INT_MOV_SS);
+
+                rc = kvm_load_segment_descriptor(ctxt->vcpu, sel, c->modrm_reg);
 
                 c->dst.type = OP_NONE;  /* Disable writeback. */
                 break;
@@ -2025,7 +2163,10 @@ special_insn:
                 c->dst.type = OP_REG;
                 c->dst.ptr = (unsigned long *) &ctxt->eflags;
                 c->dst.bytes = c->op_bytes;
-                goto pop_instruction;
+                rc = emulate_popf(ctxt, ops, &c->dst.val, c->op_bytes);
+                if (rc != X86EMUL_CONTINUE)
+                        goto done;
+                break;
         case 0xa0 ... 0xa1:     /* mov */
                 c->dst.ptr = (unsigned long *)&c->regs[VCPU_REGS_RAX];
                 c->dst.val = c->src.val;
@@ -2039,11 +2180,12 @@ special_insn:
                 c->dst.ptr = (unsigned long *)register_address(c,
                                                    es_base(ctxt),
                                                    c->regs[VCPU_REGS_RDI]);
-                if ((rc = ops->read_emulated(register_address(c,
-                                           seg_override_base(ctxt, c),
-                                        c->regs[VCPU_REGS_RSI]),
+                rc = ops->read_emulated(register_address(c,
+                                                seg_override_base(ctxt, c),
+                                                c->regs[VCPU_REGS_RSI]),
                                         &c->dst.val,
-                                        c->dst.bytes, ctxt->vcpu)) != 0)
+                                        c->dst.bytes, ctxt->vcpu);
+                if (rc != X86EMUL_CONTINUE)
                         goto done;
                 register_address_increment(c, &c->regs[VCPU_REGS_RSI],
                                        (ctxt->eflags & EFLG_DF) ? -c->dst.bytes
@@ -2058,10 +2200,11 @@ special_insn:
                 c->src.ptr = (unsigned long *)register_address(c,
                                        seg_override_base(ctxt, c),
                                                    c->regs[VCPU_REGS_RSI]);
-                if ((rc = ops->read_emulated((unsigned long)c->src.ptr,
-                                                &c->src.val,
-                                                c->src.bytes,
-                                                ctxt->vcpu)) != 0)
+                rc = ops->read_emulated((unsigned long)c->src.ptr,
+                                        &c->src.val,
+                                        c->src.bytes,
+                                        ctxt->vcpu);
+                if (rc != X86EMUL_CONTINUE)
                         goto done;
 
                 c->dst.type = OP_NONE; /* Disable writeback. */
@@ -2069,10 +2212,11 @@ special_insn:
                 c->dst.ptr = (unsigned long *)register_address(c,
                                                    es_base(ctxt),
                                                    c->regs[VCPU_REGS_RDI]);
-                if ((rc = ops->read_emulated((unsigned long)c->dst.ptr,
-                                                &c->dst.val,
-                                                c->dst.bytes,
-                                                ctxt->vcpu)) != 0)
+                rc = ops->read_emulated((unsigned long)c->dst.ptr,
+                                        &c->dst.val,
+                                        c->dst.bytes,
+                                        ctxt->vcpu);
+                if (rc != X86EMUL_CONTINUE)
                         goto done;
 
                 DPRINTF("cmps: mem1=0x%p mem2=0x%p\n", c->src.ptr, c->dst.ptr);
@@ -2102,12 +2246,13 @@ special_insn:
                 c->dst.type = OP_REG;
                 c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
                 c->dst.ptr = (unsigned long *)&c->regs[VCPU_REGS_RAX];
-                if ((rc = ops->read_emulated(register_address(c,
-                                                 seg_override_base(ctxt, c),
-                                                 c->regs[VCPU_REGS_RSI]),
-                                                 &c->dst.val,
-                                                 c->dst.bytes,
-                                                 ctxt->vcpu)) != 0)
+                rc = ops->read_emulated(register_address(c,
+                                                seg_override_base(ctxt, c),
+                                                c->regs[VCPU_REGS_RSI]),
+                                        &c->dst.val,
+                                        c->dst.bytes,
+                                        ctxt->vcpu);
+                if (rc != X86EMUL_CONTINUE)
                         goto done;
                 register_address_increment(c, &c->regs[VCPU_REGS_RSI],
                                        (ctxt->eflags & EFLG_DF) ? -c->dst.bytes
@@ -2163,11 +2308,9 @@ special_insn:
         case 0xe9: /* jmp rel */
                 goto jmp;
         case 0xea: /* jmp far */
-                if (kvm_load_segment_descriptor(ctxt->vcpu, c->src2.val, 9,
-                                        VCPU_SREG_CS) < 0) {
-                        DPRINTF("jmp far: Failed to load CS descriptor\n");
-                        goto cannot_emulate;
-                }
+                if (kvm_load_segment_descriptor(ctxt->vcpu, c->src2.val,
+                                                VCPU_SREG_CS))
+                        goto done;
 
                 c->eip = c->src.val;
                 break;
@@ -2185,7 +2328,13 @@ special_insn:
         case 0xef: /* out (e/r)ax,dx */
                 port = c->regs[VCPU_REGS_RDX];
                 io_dir_in = 0;
-        do_io:  if (kvm_emulate_pio(ctxt->vcpu, io_dir_in,
+        do_io:
+                if (!emulator_io_permited(ctxt, ops, port,
+                                          (c->d & ByteOp) ? 1 : c->op_bytes)) {
+                        kvm_inject_gp(ctxt->vcpu, 0);
+                        goto done;
+                }
+                if (kvm_emulate_pio(ctxt->vcpu, io_dir_in,
                                    (c->d & ByteOp) ? 1 : c->op_bytes,
                                    port) != 0) {
                         c->eip = saved_eip;
@@ -2210,13 +2359,21 @@ special_insn:
                 c->dst.type = OP_NONE;  /* Disable writeback. */
                 break;
         case 0xfa: /* cli */
-                ctxt->eflags &= ~X86_EFLAGS_IF;
-                c->dst.type = OP_NONE;  /* Disable writeback. */
+                if (emulator_bad_iopl(ctxt))
+                        kvm_inject_gp(ctxt->vcpu, 0);
+                else {
+                        ctxt->eflags &= ~X86_EFLAGS_IF;
+                        c->dst.type = OP_NONE;  /* Disable writeback. */
+                }
                 break;
         case 0xfb: /* sti */
-                toggle_interruptibility(ctxt, X86_SHADOW_INT_STI);
-                ctxt->eflags |= X86_EFLAGS_IF;
-                c->dst.type = OP_NONE;  /* Disable writeback. */
+                if (emulator_bad_iopl(ctxt))
+                        kvm_inject_gp(ctxt->vcpu, 0);
+                else {
+                        toggle_interruptibility(ctxt, X86_SHADOW_INT_STI);
+                        ctxt->eflags |= X86_EFLAGS_IF;
+                        c->dst.type = OP_NONE;  /* Disable writeback. */
+                }
                 break;
         case 0xfc: /* cld */
                 ctxt->eflags &= ~EFLG_DF;
@@ -2319,8 +2476,9 @@ twobyte_insn:
                 }
                 break;
         case 0x05:              /* syscall */
-                if (emulate_syscall(ctxt) == -1)
-                        goto cannot_emulate;
+                rc = emulate_syscall(ctxt);
+                if (rc != X86EMUL_CONTINUE)
+                        goto done;
                 else
                         goto writeback;
                 break;
@@ -2391,14 +2549,16 @@ twobyte_insn:
                 c->dst.type = OP_NONE;
                 break;
         case 0x34:              /* sysenter */
-                if (emulate_sysenter(ctxt) == -1)
-                        goto cannot_emulate;
+                rc = emulate_sysenter(ctxt);
+                if (rc != X86EMUL_CONTINUE)
+                        goto done;
                 else
                         goto writeback;
                 break;
         case 0x35:              /* sysexit */
-                if (emulate_sysexit(ctxt) == -1)
-                        goto cannot_emulate;
+                rc = emulate_sysexit(ctxt);
+                if (rc != X86EMUL_CONTINUE)
+                        goto done;
                 else
                         goto writeback;
                 break;
diff --git a/arch/x86/kvm/i8254.c b/arch/x86/kvm/i8254.c
index 15578f180e5..0150affad25 100644
--- a/arch/x86/kvm/i8254.c
+++ b/arch/x86/kvm/i8254.c
@@ -32,6 +32,7 @@
 #define pr_fmt(fmt) "pit: " fmt
 
 #include <linux/kvm_host.h>
+#include <linux/slab.h>
 
 #include "irq.h"
 #include "i8254.h"
@@ -242,11 +243,11 @@ static void kvm_pit_ack_irq(struct kvm_irq_ack_notifier *kian)
 {
         struct kvm_kpit_state *ps = container_of(kian, struct kvm_kpit_state,
                                                  irq_ack_notifier);
-        spin_lock(&ps->inject_lock);
+        raw_spin_lock(&ps->inject_lock);
         if (atomic_dec_return(&ps->pit_timer.pending) < 0)
                 atomic_inc(&ps->pit_timer.pending);
         ps->irq_ack = 1;
-        spin_unlock(&ps->inject_lock);
+        raw_spin_unlock(&ps->inject_lock);
 }
 
 void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu)
@@ -605,7 +606,7 @@ static const struct kvm_io_device_ops speaker_dev_ops = {
         .write    = speaker_ioport_write,
 };
 
-/* Caller must have writers lock on slots_lock */
+/* Caller must hold slots_lock */
 struct kvm_pit *kvm_create_pit(struct kvm *kvm, u32 flags)
 {
         struct kvm_pit *pit;
@@ -624,7 +625,7 @@ struct kvm_pit *kvm_create_pit(struct kvm *kvm, u32 flags)
 
         mutex_init(&pit->pit_state.lock);
         mutex_lock(&pit->pit_state.lock);
-        spin_lock_init(&pit->pit_state.inject_lock);
+        raw_spin_lock_init(&pit->pit_state.inject_lock);
 
         kvm->arch.vpit = pit;
         pit->kvm = kvm;
@@ -645,13 +646,13 @@ struct kvm_pit *kvm_create_pit(struct kvm *kvm, u32 flags)
         kvm_register_irq_mask_notifier(kvm, 0, &pit->mask_notifier);
 
         kvm_iodevice_init(&pit->dev, &pit_dev_ops);
-        ret = __kvm_io_bus_register_dev(&kvm->pio_bus, &pit->dev);
+        ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, &pit->dev);
         if (ret < 0)
                 goto fail;
 
         if (flags & KVM_PIT_SPEAKER_DUMMY) {
                 kvm_iodevice_init(&pit->speaker_dev, &speaker_dev_ops);
-                ret = __kvm_io_bus_register_dev(&kvm->pio_bus,
+                ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS,
                                                 &pit->speaker_dev);
                 if (ret < 0)
                         goto fail_unregister;
@@ -660,11 +661,12 @@ struct kvm_pit *kvm_create_pit(struct kvm *kvm, u32 flags)
         return pit;
 
 fail_unregister:
-        __kvm_io_bus_unregister_dev(&kvm->pio_bus, &pit->dev);
+        kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &pit->dev);
 
 fail:
-        if (pit->irq_source_id >= 0)
-                kvm_free_irq_source_id(kvm, pit->irq_source_id);
+        kvm_unregister_irq_mask_notifier(kvm, 0, &pit->mask_notifier);
+        kvm_unregister_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier);
+        kvm_free_irq_source_id(kvm, pit->irq_source_id);
 
         kfree(pit);
         return NULL;
@@ -723,12 +725,12 @@ void kvm_inject_pit_timer_irqs(struct kvm_vcpu *vcpu)
                 /* Try to inject pending interrupts when
                  * last one has been acked.
                  */
-                spin_lock(&ps->inject_lock);
+                raw_spin_lock(&ps->inject_lock);
                 if (atomic_read(&ps->pit_timer.pending) && ps->irq_ack) {
                         ps->irq_ack = 0;
                         inject = 1;
                 }
-                spin_unlock(&ps->inject_lock);
+                raw_spin_unlock(&ps->inject_lock);
                 if (inject)
                         __inject_pit_timer_intr(kvm);
         }
diff --git a/arch/x86/kvm/i8254.h b/arch/x86/kvm/i8254.h
index d4c1c7ffdc0..900d6b0ba7c 100644
--- a/arch/x86/kvm/i8254.h
+++ b/arch/x86/kvm/i8254.h
@@ -27,7 +27,7 @@ struct kvm_kpit_state {
         u32    speaker_data_on;
         struct mutex lock;
         struct kvm_pit *pit;
-        spinlock_t inject_lock;
+        raw_spinlock_t inject_lock;
         unsigned long irq_ack;
         struct kvm_irq_ack_notifier irq_ack_notifier;
 };
diff --git a/arch/x86/kvm/i8259.c b/arch/x86/kvm/i8259.c
index d057c0cbd24..a790fa128a9 100644
--- a/arch/x86/kvm/i8259.c
+++ b/arch/x86/kvm/i8259.c
@@ -26,6 +26,7 @@
  *   Port from Qemu.
  */
 #include <linux/mm.h>
+#include <linux/slab.h>
 #include <linux/bitops.h>
 #include "irq.h"
 
@@ -44,18 +45,19 @@ static void pic_clear_isr(struct kvm_kpic_state *s, int irq)
          * Other interrupt may be delivered to PIC while lock is dropped but
          * it should be safe since PIC state is already updated at this stage.
          */
-        spin_unlock(&s->pics_state->lock);
+        raw_spin_unlock(&s->pics_state->lock);
         kvm_notify_acked_irq(s->pics_state->kvm, SELECT_PIC(irq), irq);
-        spin_lock(&s->pics_state->lock);
+        raw_spin_lock(&s->pics_state->lock);
 }
 
 void kvm_pic_clear_isr_ack(struct kvm *kvm)
 {
         struct kvm_pic *s = pic_irqchip(kvm);
-        spin_lock(&s->lock);
+
+        raw_spin_lock(&s->lock);
         s->pics[0].isr_ack = 0xff;
         s->pics[1].isr_ack = 0xff;
-        spin_unlock(&s->lock);
+        raw_spin_unlock(&s->lock);
 }
 
 /*
@@ -156,9 +158,9 @@ static void pic_update_irq(struct kvm_pic *s)
 
 void kvm_pic_update_irq(struct kvm_pic *s)
 {
-        spin_lock(&s->lock);
+        raw_spin_lock(&s->lock);
         pic_update_irq(s);
-        spin_unlock(&s->lock);
+        raw_spin_unlock(&s->lock);
 }
 
 int kvm_pic_set_irq(void *opaque, int irq, int level)
@@ -166,14 +168,14 @@ int kvm_pic_set_irq(void *opaque, int irq, int level)
         struct kvm_pic *s = opaque;
         int ret = -1;
 
-        spin_lock(&s->lock);
+        raw_spin_lock(&s->lock);
         if (irq >= 0 && irq < PIC_NUM_PINS) {
                 ret = pic_set_irq1(&s->pics[irq >> 3], irq & 7, level);
                 pic_update_irq(s);
                 trace_kvm_pic_set_irq(irq >> 3, irq & 7, s->pics[irq >> 3].elcr,
                                       s->pics[irq >> 3].imr, ret == 0);
         }
-        spin_unlock(&s->lock);
+        raw_spin_unlock(&s->lock);
 
         return ret;
 }
@@ -203,7 +205,7 @@ int kvm_pic_read_irq(struct kvm *kvm)
         int irq, irq2, intno;
         struct kvm_pic *s = pic_irqchip(kvm);
 
-        spin_lock(&s->lock);
+        raw_spin_lock(&s->lock);
         irq = pic_get_irq(&s->pics[0]);
         if (irq >= 0) {
                 pic_intack(&s->pics[0], irq);
@@ -228,7 +230,7 @@ int kvm_pic_read_irq(struct kvm *kvm)
                 intno = s->pics[0].irq_base + irq;
         }
         pic_update_irq(s);
-        spin_unlock(&s->lock);
+        raw_spin_unlock(&s->lock);
 
         return intno;
 }
@@ -442,7 +444,7 @@ static int picdev_write(struct kvm_io_device *this,
                         printk(KERN_ERR "PIC: non byte write\n");
                 return 0;
         }
-        spin_lock(&s->lock);
+        raw_spin_lock(&s->lock);
         switch (addr) {
         case 0x20:
         case 0x21:
@@ -455,7 +457,7 @@ static int picdev_write(struct kvm_io_device *this,
                 elcr_ioport_write(&s->pics[addr & 1], addr, data);
                 break;
         }
-        spin_unlock(&s->lock);
+        raw_spin_unlock(&s->lock);
         return 0;
 }
 
@@ -472,7 +474,7 @@ static int picdev_read(struct kvm_io_device *this,
                         printk(KERN_ERR "PIC: non byte read\n");
                 return 0;
         }
-        spin_lock(&s->lock);
+        raw_spin_lock(&s->lock);
         switch (addr) {
         case 0x20:
         case 0x21:
@@ -486,7 +488,7 @@ static int picdev_read(struct kvm_io_device *this,
                 break;
         }
         *(unsigned char *)val = data;
-        spin_unlock(&s->lock);
+        raw_spin_unlock(&s->lock);
         return 0;
 }
 
@@ -520,7 +522,7 @@ struct kvm_pic *kvm_create_pic(struct kvm *kvm)
         s = kzalloc(sizeof(struct kvm_pic), GFP_KERNEL);
         if (!s)
                 return NULL;
-        spin_lock_init(&s->lock);
+        raw_spin_lock_init(&s->lock);
         s->kvm = kvm;
         s->pics[0].elcr_mask = 0xf8;
         s->pics[1].elcr_mask = 0xde;
@@ -533,7 +535,9 @@ struct kvm_pic *kvm_create_pic(struct kvm *kvm)
          * Initialize PIO device
          */
         kvm_iodevice_init(&s->dev, &picdev_ops);
-        ret = kvm_io_bus_register_dev(kvm, &kvm->pio_bus, &s->dev);
+        mutex_lock(&kvm->slots_lock);
+        ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, &s->dev);
+        mutex_unlock(&kvm->slots_lock);
         if (ret < 0) {
                 kfree(s);
                 return NULL;
@@ -541,3 +545,14 @@ struct kvm_pic *kvm_create_pic(struct kvm *kvm)
 
         return s;
 }
+
+void kvm_destroy_pic(struct kvm *kvm)
+{
+        struct kvm_pic *vpic = kvm->arch.vpic;
+
+        if (vpic) {
+                kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &vpic->dev);
+                kvm->arch.vpic = NULL;
+                kfree(vpic);
+        }
+}
diff --git a/arch/x86/kvm/irq.h b/arch/x86/kvm/irq.h
index be399e207d5..34b15915754 100644
--- a/arch/x86/kvm/irq.h
+++ b/arch/x86/kvm/irq.h
@@ -62,7 +62,7 @@ struct kvm_kpic_state {
 };
 
 struct kvm_pic {
-        spinlock_t lock;
+        raw_spinlock_t lock;
         unsigned pending_acks;
         struct kvm *kvm;
         struct kvm_kpic_state pics[2]; /* 0 is master pic, 1 is slave pic */
@@ -75,6 +75,7 @@ struct kvm_pic {
 };
 
 struct kvm_pic *kvm_create_pic(struct kvm *kvm);
+void kvm_destroy_pic(struct kvm *kvm);
 int kvm_pic_read_irq(struct kvm *kvm);
 void kvm_pic_update_irq(struct kvm_pic *s);
 void kvm_pic_clear_isr_ack(struct kvm *kvm);
diff --git a/arch/x86/kvm/kvm_cache_regs.h b/arch/x86/kvm/kvm_cache_regs.h
index 7bcc5b6a440..cff851cf532 100644
--- a/arch/x86/kvm/kvm_cache_regs.h
+++ b/arch/x86/kvm/kvm_cache_regs.h
@@ -1,6 +1,11 @@
 #ifndef ASM_KVM_CACHE_REGS_H
 #define ASM_KVM_CACHE_REGS_H
 
+#define KVM_POSSIBLE_CR0_GUEST_BITS X86_CR0_TS
+#define KVM_POSSIBLE_CR4_GUEST_BITS                               \
+        (X86_CR4_PVI | X86_CR4_DE | X86_CR4_PCE | X86_CR4_OSFXSR  \
+         | X86_CR4_OSXMMEXCPT | X86_CR4_PGE)
+
 static inline unsigned long kvm_register_read(struct kvm_vcpu *vcpu,
                                               enum kvm_reg reg)
 {
@@ -38,4 +43,30 @@ static inline u64 kvm_pdptr_read(struct kvm_vcpu *vcpu, int index)
         return vcpu->arch.pdptrs[index];
 }
 
+static inline ulong kvm_read_cr0_bits(struct kvm_vcpu *vcpu, ulong mask)
+{
+        ulong tmask = mask & KVM_POSSIBLE_CR0_GUEST_BITS;
+        if (tmask & vcpu->arch.cr0_guest_owned_bits)
+                kvm_x86_ops->decache_cr0_guest_bits(vcpu);
+        return vcpu->arch.cr0 & mask;
+}
+
+static inline ulong kvm_read_cr0(struct kvm_vcpu *vcpu)
+{
+        return kvm_read_cr0_bits(vcpu, ~0UL);
+}
+
+static inline ulong kvm_read_cr4_bits(struct kvm_vcpu *vcpu, ulong mask)
+{
+        ulong tmask = mask & KVM_POSSIBLE_CR4_GUEST_BITS;
+        if (tmask & vcpu->arch.cr4_guest_owned_bits)
+                kvm_x86_ops->decache_cr4_guest_bits(vcpu);
+        return vcpu->arch.cr4 & mask;
+}
+
+static inline ulong kvm_read_cr4(struct kvm_vcpu *vcpu)
+{
+        return kvm_read_cr4_bits(vcpu, ~0UL);
+}
+
 #endif
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index ba8c045da78..1eb7a4ae0c9 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -26,6 +26,7 @@
 #include <linux/io.h>
 #include <linux/module.h>
 #include <linux/math64.h>
+#include <linux/slab.h>
 #include <asm/processor.h>
 #include <asm/msr.h>
 #include <asm/page.h>
@@ -1246,3 +1247,34 @@ int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data)
 
         return 0;
 }
+
+int kvm_hv_vapic_msr_write(struct kvm_vcpu *vcpu, u32 reg, u64 data)
+{
+        struct kvm_lapic *apic = vcpu->arch.apic;
+
+        if (!irqchip_in_kernel(vcpu->kvm))
+                return 1;
+
+        /* if this is ICR write vector before command */
+        if (reg == APIC_ICR)
+                apic_reg_write(apic, APIC_ICR2, (u32)(data >> 32));
+        return apic_reg_write(apic, reg, (u32)data);
+}
+
+int kvm_hv_vapic_msr_read(struct kvm_vcpu *vcpu, u32 reg, u64 *data)
+{
+        struct kvm_lapic *apic = vcpu->arch.apic;
+        u32 low, high = 0;
+
+        if (!irqchip_in_kernel(vcpu->kvm))
+                return 1;
+
+        if (apic_reg_read(apic, reg, 4, &low))
+                return 1;
+        if (reg == APIC_ICR)
+                apic_reg_read(apic, APIC_ICR2, 4, &high);
+
+        *data = (((u64)high) << 32) | low;
+
+        return 0;
+}
diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h
index 40010b09c4a..f5fe32c5eda 100644
--- a/arch/x86/kvm/lapic.h
+++ b/arch/x86/kvm/lapic.h
@@ -48,4 +48,12 @@ void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu);
 
 int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
 int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
+
+int kvm_hv_vapic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
+int kvm_hv_vapic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
+
+static inline bool kvm_hv_vapic_assist_page_enabled(struct kvm_vcpu *vcpu)
+{
+        return vcpu->arch.hv_vapic & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE;
+}
 #endif
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index 89a49fb46a2..19a8906bcaa 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -18,6 +18,7 @@
  */
 
 #include "mmu.h"
+#include "x86.h"
 #include "kvm_cache_regs.h"
 
 #include <linux/kvm_host.h>
@@ -29,6 +30,8 @@
 #include <linux/swap.h>
 #include <linux/hugetlb.h>
 #include <linux/compiler.h>
+#include <linux/srcu.h>
+#include <linux/slab.h>
 
 #include <asm/page.h>
 #include <asm/cmpxchg.h>
@@ -136,16 +139,6 @@ module_param(oos_shadow, bool, 0644);
 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
                         | PT64_NX_MASK)
 
-#define PFERR_PRESENT_MASK (1U << 0)
-#define PFERR_WRITE_MASK (1U << 1)
-#define PFERR_USER_MASK (1U << 2)
-#define PFERR_RSVD_MASK (1U << 3)
-#define PFERR_FETCH_MASK (1U << 4)
-
-#define PT_PDPE_LEVEL 3
-#define PT_DIRECTORY_LEVEL 2
-#define PT_PAGE_TABLE_LEVEL 1
-
 #define RMAP_EXT 4
 
 #define ACC_EXEC_MASK    1
@@ -153,6 +146,9 @@ module_param(oos_shadow, bool, 0644);
 #define ACC_USER_MASK    PT_USER_MASK
 #define ACC_ALL          (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
 
+#include <trace/events/kvm.h>
+
+#undef TRACE_INCLUDE_FILE
 #define CREATE_TRACE_POINTS
 #include "mmutrace.h"
 
@@ -229,7 +225,7 @@ EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
 
 static int is_write_protection(struct kvm_vcpu *vcpu)
 {
-        return vcpu->arch.cr0 & X86_CR0_WP;
+        return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
 }
 
 static int is_cpuid_PSE36(void)
@@ -239,7 +235,7 @@ static int is_cpuid_PSE36(void)
 
 static int is_nx(struct kvm_vcpu *vcpu)
 {
-        return vcpu->arch.shadow_efer & EFER_NX;
+        return vcpu->arch.efer & EFER_NX;
 }
 
 static int is_shadow_present_pte(u64 pte)
@@ -253,7 +249,7 @@ static int is_large_pte(u64 pte)
         return pte & PT_PAGE_SIZE_MASK;
 }
 
-static int is_writeble_pte(unsigned long pte)
+static int is_writable_pte(unsigned long pte)
 {
         return pte & PT_WRITABLE_MASK;
 }
@@ -470,24 +466,10 @@ static int has_wrprotected_page(struct kvm *kvm,
 
 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
 {
-        unsigned long page_size = PAGE_SIZE;
-        struct vm_area_struct *vma;
-        unsigned long addr;
+        unsigned long page_size;
         int i, ret = 0;
 
-        addr = gfn_to_hva(kvm, gfn);
-        if (kvm_is_error_hva(addr))
-                return PT_PAGE_TABLE_LEVEL;
-
-        down_read(&current->mm->mmap_sem);
-        vma = find_vma(current->mm, addr);
-        if (!vma)
-                goto out;
-
-        page_size = vma_kernel_pagesize(vma);
-
-out:
-        up_read(&current->mm->mmap_sem);
+        page_size = kvm_host_page_size(kvm, gfn);
 
         for (i = PT_PAGE_TABLE_LEVEL;
              i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
@@ -503,8 +485,7 @@ out:
 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
 {
         struct kvm_memory_slot *slot;
-        int host_level;
-        int level = PT_PAGE_TABLE_LEVEL;
+        int host_level, level, max_level;
 
         slot = gfn_to_memslot(vcpu->kvm, large_gfn);
         if (slot && slot->dirty_bitmap)
@@ -515,7 +496,10 @@ static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
         if (host_level == PT_PAGE_TABLE_LEVEL)
                 return host_level;
 
-        for (level = PT_DIRECTORY_LEVEL; level <= host_level; ++level)
+        max_level = kvm_x86_ops->get_lpage_level() < host_level ?
+                kvm_x86_ops->get_lpage_level() : host_level;
+
+        for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
                 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
                         break;
 
@@ -633,7 +617,7 @@ static void rmap_remove(struct kvm *kvm, u64 *spte)
         pfn = spte_to_pfn(*spte);
         if (*spte & shadow_accessed_mask)
                 kvm_set_pfn_accessed(pfn);
-        if (is_writeble_pte(*spte))
+        if (is_writable_pte(*spte))
                 kvm_set_pfn_dirty(pfn);
         rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
         if (!*rmapp) {
@@ -662,6 +646,7 @@ static void rmap_remove(struct kvm *kvm, u64 *spte)
                         prev_desc = desc;
                         desc = desc->more;
                 }
+                pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
                 BUG();
         }
 }
@@ -708,7 +693,7 @@ static int rmap_write_protect(struct kvm *kvm, u64 gfn)
                 BUG_ON(!spte);
                 BUG_ON(!(*spte & PT_PRESENT_MASK));
                 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
-                if (is_writeble_pte(*spte)) {
+                if (is_writable_pte(*spte)) {
                         __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
                         write_protected = 1;
                 }
@@ -732,7 +717,7 @@ static int rmap_write_protect(struct kvm *kvm, u64 gfn)
                         BUG_ON(!(*spte & PT_PRESENT_MASK));
                         BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
                         pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
-                        if (is_writeble_pte(*spte)) {
+                        if (is_writable_pte(*spte)) {
                                 rmap_remove(kvm, spte);
                                 --kvm->stat.lpages;
                                 __set_spte(spte, shadow_trap_nonpresent_pte);
@@ -787,7 +772,7 @@ static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
 
                         new_spte &= ~PT_WRITABLE_MASK;
                         new_spte &= ~SPTE_HOST_WRITEABLE;
-                        if (is_writeble_pte(*spte))
+                        if (is_writable_pte(*spte))
                                 kvm_set_pfn_dirty(spte_to_pfn(*spte));
                         __set_spte(spte, new_spte);
                         spte = rmap_next(kvm, rmapp, spte);
@@ -805,35 +790,32 @@ static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
                                          unsigned long data))
 {
         int i, j;
+        int ret;
         int retval = 0;
+        struct kvm_memslots *slots;
 
-        /*
-         * If mmap_sem isn't taken, we can look the memslots with only
-         * the mmu_lock by skipping over the slots with userspace_addr == 0.
-         */
-        for (i = 0; i < kvm->nmemslots; i++) {
-                struct kvm_memory_slot *memslot = &kvm->memslots[i];
+        slots = rcu_dereference(kvm->memslots);
+
+        for (i = 0; i < slots->nmemslots; i++) {
+                struct kvm_memory_slot *memslot = &slots->memslots[i];
                 unsigned long start = memslot->userspace_addr;
                 unsigned long end;
 
-                /* mmu_lock protects userspace_addr */
-                if (!start)
-                        continue;
-
                 end = start + (memslot->npages << PAGE_SHIFT);
                 if (hva >= start && hva < end) {
                         gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
 
-                        retval |= handler(kvm, &memslot->rmap[gfn_offset],
-                                          data);
+                        ret = handler(kvm, &memslot->rmap[gfn_offset], data);
 
                         for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
                                 int idx = gfn_offset;
                                 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
-                                retval |= handler(kvm,
+                                ret |= handler(kvm,
                                         &memslot->lpage_info[j][idx].rmap_pde,
                                         data);
                         }
+                        trace_kvm_age_page(hva, memslot, ret);
+                        retval |= ret;
                 }
         }
 
@@ -856,9 +838,15 @@ static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
         u64 *spte;
         int young = 0;
 
-        /* always return old for EPT */
+        /*
+         * Emulate the accessed bit for EPT, by checking if this page has
+         * an EPT mapping, and clearing it if it does. On the next access,
+         * a new EPT mapping will be established.
+         * This has some overhead, but not as much as the cost of swapping
+         * out actively used pages or breaking up actively used hugepages.
+         */
         if (!shadow_accessed_mask)
-                return 0;
+                return kvm_unmap_rmapp(kvm, rmapp, data);
 
         spte = rmap_next(kvm, rmapp, NULL);
         while (spte) {
@@ -1502,8 +1490,8 @@ static int mmu_zap_unsync_children(struct kvm *kvm,
                 for_each_sp(pages, sp, parents, i) {
                         kvm_mmu_zap_page(kvm, sp);
                         mmu_pages_clear_parents(&parents);
+                        zapped++;
                 }
-                zapped += pages.nr;
                 kvm_mmu_pages_init(parent, &parents, &pages);
         }
 
@@ -1554,14 +1542,16 @@ void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
          */
 
         if (used_pages > kvm_nr_mmu_pages) {
-                while (used_pages > kvm_nr_mmu_pages) {
+                while (used_pages > kvm_nr_mmu_pages &&
+                        !list_empty(&kvm->arch.active_mmu_pages)) {
                         struct kvm_mmu_page *page;
 
                         page = container_of(kvm->arch.active_mmu_pages.prev,
                                             struct kvm_mmu_page, link);
-                        kvm_mmu_zap_page(kvm, page);
+                        used_pages -= kvm_mmu_zap_page(kvm, page);
                         used_pages--;
                 }
+                kvm_nr_mmu_pages = used_pages;
                 kvm->arch.n_free_mmu_pages = 0;
         }
         else
@@ -1608,14 +1598,15 @@ static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
                     && !sp->role.invalid) {
                         pgprintk("%s: zap %lx %x\n",
                                  __func__, gfn, sp->role.word);
-                        kvm_mmu_zap_page(kvm, sp);
+                        if (kvm_mmu_zap_page(kvm, sp))
+                                nn = bucket->first;
                 }
         }
 }
 
 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
 {
-        int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
+        int slot = memslot_id(kvm, gfn);
         struct kvm_mmu_page *sp = page_header(__pa(pte));
 
         __set_bit(slot, sp->slot_bitmap);
@@ -1639,7 +1630,7 @@ struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
 {
         struct page *page;
 
-        gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
+        gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
 
         if (gpa == UNMAPPED_GVA)
                 return NULL;
@@ -1852,7 +1843,7 @@ static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
                  * is responsibility of mmu_get_page / kvm_sync_page.
                  * Same reasoning can be applied to dirty page accounting.
                  */
-                if (!can_unsync && is_writeble_pte(*sptep))
+                if (!can_unsync && is_writable_pte(*sptep))
                         goto set_pte;
 
                 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
@@ -1860,7 +1851,7 @@ static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
                                  __func__, gfn);
                         ret = 1;
                         pte_access &= ~ACC_WRITE_MASK;
-                        if (is_writeble_pte(spte))
+                        if (is_writable_pte(spte))
                                 spte &= ~PT_WRITABLE_MASK;
                 }
         }
@@ -1881,7 +1872,7 @@ static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
                          bool reset_host_protection)
 {
         int was_rmapped = 0;
-        int was_writeble = is_writeble_pte(*sptep);
+        int was_writable = is_writable_pte(*sptep);
         int rmap_count;
 
         pgprintk("%s: spte %llx access %x write_fault %d"
@@ -1932,7 +1923,7 @@ static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
                 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
                         rmap_recycle(vcpu, sptep, gfn);
         } else {
-                if (was_writeble)
+                if (was_writable)
                         kvm_release_pfn_dirty(pfn);
                 else
                         kvm_release_pfn_clean(pfn);
@@ -2162,8 +2153,11 @@ void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
         spin_unlock(&vcpu->kvm->mmu_lock);
 }
 
-static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
+static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
+                                  u32 access, u32 *error)
 {
+        if (error)
+                *error = 0;
         return vaddr;
 }
 
@@ -2747,7 +2741,7 @@ int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
         if (tdp_enabled)
                 return 0;
 
-        gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
+        gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
 
         spin_lock(&vcpu->kvm->mmu_lock);
         r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
@@ -2847,16 +2841,13 @@ static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
          */
         page = alloc_page(GFP_KERNEL | __GFP_DMA32);
         if (!page)
-                goto error_1;
+                return -ENOMEM;
+
         vcpu->arch.mmu.pae_root = page_address(page);
         for (i = 0; i < 4; ++i)
                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
 
         return 0;
-
-error_1:
-        free_mmu_pages(vcpu);
-        return -ENOMEM;
 }
 
 int kvm_mmu_create(struct kvm_vcpu *vcpu)
@@ -2936,10 +2927,9 @@ static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
         spin_lock(&kvm_lock);
 
         list_for_each_entry(kvm, &vm_list, vm_list) {
-                int npages;
+                int npages, idx;
 
-                if (!down_read_trylock(&kvm->slots_lock))
-                        continue;
+                idx = srcu_read_lock(&kvm->srcu);
                 spin_lock(&kvm->mmu_lock);
                 npages = kvm->arch.n_alloc_mmu_pages -
                          kvm->arch.n_free_mmu_pages;
@@ -2952,7 +2942,7 @@ static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
                 nr_to_scan--;
 
                 spin_unlock(&kvm->mmu_lock);
-                up_read(&kvm->slots_lock);
+                srcu_read_unlock(&kvm->srcu, idx);
         }
         if (kvm_freed)
                 list_move_tail(&kvm_freed->vm_list, &vm_list);
@@ -3019,9 +3009,11 @@ unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
         int i;
         unsigned int nr_mmu_pages;
         unsigned int  nr_pages = 0;
+        struct kvm_memslots *slots;
 
-        for (i = 0; i < kvm->nmemslots; i++)
-                nr_pages += kvm->memslots[i].npages;
+        slots = rcu_dereference(kvm->memslots);
+        for (i = 0; i < slots->nmemslots; i++)
+                nr_pages += slots->memslots[i].npages;
 
         nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
         nr_mmu_pages = max(nr_mmu_pages,
@@ -3246,7 +3238,7 @@ static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
                 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
                         audit_mappings_page(vcpu, ent, va, level - 1);
                 else {
-                        gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
+                        gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
                         gfn_t gfn = gpa >> PAGE_SHIFT;
                         pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
                         hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
@@ -3291,10 +3283,12 @@ static void audit_mappings(struct kvm_vcpu *vcpu)
 static int count_rmaps(struct kvm_vcpu *vcpu)
 {
         int nmaps = 0;
-        int i, j, k;
+        int i, j, k, idx;
 
+        idx = srcu_read_lock(&kvm->srcu);
+        slots = rcu_dereference(kvm->memslots);
         for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
-                struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
+                struct kvm_memory_slot *m = &slots->memslots[i];
                 struct kvm_rmap_desc *d;
 
                 for (j = 0; j < m->npages; ++j) {
@@ -3317,6 +3311,7 @@ static int count_rmaps(struct kvm_vcpu *vcpu)
                         }
                 }
         }
+        srcu_read_unlock(&kvm->srcu, idx);
         return nmaps;
 }
 
diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h
index 61a1b3884b4..be66759321a 100644
--- a/arch/x86/kvm/mmu.h
+++ b/arch/x86/kvm/mmu.h
@@ -2,6 +2,7 @@
 #define __KVM_X86_MMU_H
 
 #include <linux/kvm_host.h>
+#include "kvm_cache_regs.h"
 
 #define PT64_PT_BITS 9
 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
@@ -37,6 +38,16 @@
 #define PT32_ROOT_LEVEL 2
 #define PT32E_ROOT_LEVEL 3
 
+#define PT_PDPE_LEVEL 3
+#define PT_DIRECTORY_LEVEL 2
+#define PT_PAGE_TABLE_LEVEL 1
+
+#define PFERR_PRESENT_MASK (1U << 0)
+#define PFERR_WRITE_MASK (1U << 1)
+#define PFERR_USER_MASK (1U << 2)
+#define PFERR_RSVD_MASK (1U << 3)
+#define PFERR_FETCH_MASK (1U << 4)
+
 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4]);
 
 static inline void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
@@ -53,30 +64,6 @@ static inline int kvm_mmu_reload(struct kvm_vcpu *vcpu)
         return kvm_mmu_load(vcpu);
 }
 
-static inline int is_long_mode(struct kvm_vcpu *vcpu)
-{
-#ifdef CONFIG_X86_64
-        return vcpu->arch.shadow_efer & EFER_LMA;
-#else
-        return 0;
-#endif
-}
-
-static inline int is_pae(struct kvm_vcpu *vcpu)
-{
-        return vcpu->arch.cr4 & X86_CR4_PAE;
-}
-
-static inline int is_pse(struct kvm_vcpu *vcpu)
-{
-        return vcpu->arch.cr4 & X86_CR4_PSE;
-}
-
-static inline int is_paging(struct kvm_vcpu *vcpu)
-{
-        return vcpu->arch.cr0 & X86_CR0_PG;
-}
-
 static inline int is_present_gpte(unsigned long pte)
 {
         return pte & PT_PRESENT_MASK;
diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h
index ede2131a922..81eab9a50e6 100644
--- a/arch/x86/kvm/paging_tmpl.h
+++ b/arch/x86/kvm/paging_tmpl.h
@@ -162,7 +162,7 @@ walk:
                 if (rsvd_fault)
                         goto access_error;
 
-                if (write_fault && !is_writeble_pte(pte))
+                if (write_fault && !is_writable_pte(pte))
                         if (user_fault || is_write_protection(vcpu))
                                 goto access_error;
 
@@ -490,18 +490,23 @@ static void FNAME(invlpg)(struct kvm_vcpu *vcpu, gva_t gva)
         spin_unlock(&vcpu->kvm->mmu_lock);
 }
 
-static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr)
+static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr, u32 access,
+                               u32 *error)
 {
         struct guest_walker walker;
         gpa_t gpa = UNMAPPED_GVA;
         int r;
 
-        r = FNAME(walk_addr)(&walker, vcpu, vaddr, 0, 0, 0);
+        r = FNAME(walk_addr)(&walker, vcpu, vaddr,
+                             !!(access & PFERR_WRITE_MASK),
+                             !!(access & PFERR_USER_MASK),
+                             !!(access & PFERR_FETCH_MASK));
 
         if (r) {
                 gpa = gfn_to_gpa(walker.gfn);
                 gpa |= vaddr & ~PAGE_MASK;
-        }
+        } else if (error)
+                *error = walker.error_code;
 
         return gpa;
 }
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 1d9b33843c8..2ba58206812 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -26,6 +26,7 @@
 #include <linux/highmem.h>
 #include <linux/sched.h>
 #include <linux/ftrace_event.h>
+#include <linux/slab.h>
 
 #include <asm/desc.h>
 
@@ -231,7 +232,7 @@ static void svm_set_efer(struct kvm_vcpu *vcpu, u64 efer)
                 efer &= ~EFER_LME;
 
         to_svm(vcpu)->vmcb->save.efer = efer | EFER_SVME;
-        vcpu->arch.shadow_efer = efer;
+        vcpu->arch.efer = efer;
 }
 
 static void svm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr,
@@ -540,6 +541,8 @@ static void init_vmcb(struct vcpu_svm *svm)
         struct vmcb_control_area *control = &svm->vmcb->control;
         struct vmcb_save_area *save = &svm->vmcb->save;
 
+        svm->vcpu.fpu_active = 1;
+
         control->intercept_cr_read =    INTERCEPT_CR0_MASK |
                                         INTERCEPT_CR3_MASK |
                                         INTERCEPT_CR4_MASK;
@@ -552,13 +555,19 @@ static void init_vmcb(struct vcpu_svm *svm)
         control->intercept_dr_read =    INTERCEPT_DR0_MASK |
                                         INTERCEPT_DR1_MASK |
                                         INTERCEPT_DR2_MASK |
-                                        INTERCEPT_DR3_MASK;
+                                        INTERCEPT_DR3_MASK |
+                                        INTERCEPT_DR4_MASK |
+                                        INTERCEPT_DR5_MASK |
+                                        INTERCEPT_DR6_MASK |
+                                        INTERCEPT_DR7_MASK;
 
         control->intercept_dr_write =   INTERCEPT_DR0_MASK |
                                         INTERCEPT_DR1_MASK |
                                         INTERCEPT_DR2_MASK |
                                         INTERCEPT_DR3_MASK |
+                                        INTERCEPT_DR4_MASK |
                                         INTERCEPT_DR5_MASK |
+                                        INTERCEPT_DR6_MASK |
                                         INTERCEPT_DR7_MASK;
 
         control->intercept_exceptions = (1 << PF_VECTOR) |
@@ -569,6 +578,7 @@ static void init_vmcb(struct vcpu_svm *svm)
         control->intercept =    (1ULL << INTERCEPT_INTR) |
                                 (1ULL << INTERCEPT_NMI) |
                                 (1ULL << INTERCEPT_SMI) |
+                                (1ULL << INTERCEPT_SELECTIVE_CR0) |
                                 (1ULL << INTERCEPT_CPUID) |
                                 (1ULL << INTERCEPT_INVD) |
                                 (1ULL << INTERCEPT_HLT) |
@@ -641,10 +651,8 @@ static void init_vmcb(struct vcpu_svm *svm)
                 control->intercept &= ~((1ULL << INTERCEPT_TASK_SWITCH) |
                                         (1ULL << INTERCEPT_INVLPG));
                 control->intercept_exceptions &= ~(1 << PF_VECTOR);
-                control->intercept_cr_read &= ~(INTERCEPT_CR0_MASK|
-                                                INTERCEPT_CR3_MASK);
-                control->intercept_cr_write &= ~(INTERCEPT_CR0_MASK|
-                                                 INTERCEPT_CR3_MASK);
+                control->intercept_cr_read &= ~INTERCEPT_CR3_MASK;
+                control->intercept_cr_write &= ~INTERCEPT_CR3_MASK;
                 save->g_pat = 0x0007040600070406ULL;
                 save->cr3 = 0;
                 save->cr4 = 0;
@@ -698,29 +706,28 @@ static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id)
         if (err)
                 goto free_svm;
 
+        err = -ENOMEM;
         page = alloc_page(GFP_KERNEL);
-        if (!page) {
-                err = -ENOMEM;
+        if (!page)
                 goto uninit;
-        }
 
-        err = -ENOMEM;
         msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
         if (!msrpm_pages)
-                goto uninit;
+                goto free_page1;
 
         nested_msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
         if (!nested_msrpm_pages)
-                goto uninit;
-
-        svm->msrpm = page_address(msrpm_pages);
-        svm_vcpu_init_msrpm(svm->msrpm);
+                goto free_page2;
 
         hsave_page = alloc_page(GFP_KERNEL);
         if (!hsave_page)
-                goto uninit;
+                goto free_page3;
+
         svm->nested.hsave = page_address(hsave_page);
 
+        svm->msrpm = page_address(msrpm_pages);
+        svm_vcpu_init_msrpm(svm->msrpm);
+
         svm->nested.msrpm = page_address(nested_msrpm_pages);
 
         svm->vmcb = page_address(page);
@@ -730,13 +737,18 @@ static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id)
         init_vmcb(svm);
 
         fx_init(&svm->vcpu);
-        svm->vcpu.fpu_active = 1;
         svm->vcpu.arch.apic_base = 0xfee00000 | MSR_IA32_APICBASE_ENABLE;
         if (kvm_vcpu_is_bsp(&svm->vcpu))
                 svm->vcpu.arch.apic_base |= MSR_IA32_APICBASE_BSP;
 
         return &svm->vcpu;
 
+free_page3:
+        __free_pages(nested_msrpm_pages, MSRPM_ALLOC_ORDER);
+free_page2:
+        __free_pages(msrpm_pages, MSRPM_ALLOC_ORDER);
+free_page1:
+        __free_page(page);
 uninit:
         kvm_vcpu_uninit(&svm->vcpu);
 free_svm:
@@ -765,14 +777,16 @@ static void svm_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
         if (unlikely(cpu != vcpu->cpu)) {
                 u64 delta;
 
-                /*
-                 * Make sure that the guest sees a monotonically
-                 * increasing TSC.
-                 */
-                delta = vcpu->arch.host_tsc - native_read_tsc();
-                svm->vmcb->control.tsc_offset += delta;
-                if (is_nested(svm))
-                        svm->nested.hsave->control.tsc_offset += delta;
+                if (check_tsc_unstable()) {
+                        /*
+                         * Make sure that the guest sees a monotonically
+                         * increasing TSC.
+                         */
+                        delta = vcpu->arch.host_tsc - native_read_tsc();
+                        svm->vmcb->control.tsc_offset += delta;
+                        if (is_nested(svm))
+                                svm->nested.hsave->control.tsc_offset += delta;
+                }
                 vcpu->cpu = cpu;
                 kvm_migrate_timers(vcpu);
                 svm->asid_generation = 0;
@@ -954,42 +968,59 @@ static void svm_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
         svm->vmcb->save.gdtr.base = dt->base ;
 }
 
+static void svm_decache_cr0_guest_bits(struct kvm_vcpu *vcpu)
+{
+}
+
 static void svm_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
 {
 }
 
+static void update_cr0_intercept(struct vcpu_svm *svm)
+{
+        ulong gcr0 = svm->vcpu.arch.cr0;
+        u64 *hcr0 = &svm->vmcb->save.cr0;
+
+        if (!svm->vcpu.fpu_active)
+                *hcr0 |= SVM_CR0_SELECTIVE_MASK;
+        else
+                *hcr0 = (*hcr0 & ~SVM_CR0_SELECTIVE_MASK)
+                        | (gcr0 & SVM_CR0_SELECTIVE_MASK);
+
+
+        if (gcr0 == *hcr0 && svm->vcpu.fpu_active) {
+                svm->vmcb->control.intercept_cr_read &= ~INTERCEPT_CR0_MASK;
+                svm->vmcb->control.intercept_cr_write &= ~INTERCEPT_CR0_MASK;
+        } else {
+                svm->vmcb->control.intercept_cr_read |= INTERCEPT_CR0_MASK;
+                svm->vmcb->control.intercept_cr_write |= INTERCEPT_CR0_MASK;
+        }
+}
+
 static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 {
         struct vcpu_svm *svm = to_svm(vcpu);
 
 #ifdef CONFIG_X86_64
-        if (vcpu->arch.shadow_efer & EFER_LME) {
+        if (vcpu->arch.efer & EFER_LME) {
                 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
-                        vcpu->arch.shadow_efer |= EFER_LMA;
+                        vcpu->arch.efer |= EFER_LMA;
                         svm->vmcb->save.efer |= EFER_LMA | EFER_LME;
                 }
 
                 if (is_paging(vcpu) && !(cr0 & X86_CR0_PG)) {
-                        vcpu->arch.shadow_efer &= ~EFER_LMA;
+                        vcpu->arch.efer &= ~EFER_LMA;
                         svm->vmcb->save.efer &= ~(EFER_LMA | EFER_LME);
                 }
         }
 #endif
-        if (npt_enabled)
-                goto set;
+        vcpu->arch.cr0 = cr0;
 
-        if ((vcpu->arch.cr0 & X86_CR0_TS) && !(cr0 & X86_CR0_TS)) {
-                svm->vmcb->control.intercept_exceptions &= ~(1 << NM_VECTOR);
-                vcpu->fpu_active = 1;
-        }
+        if (!npt_enabled)
+                cr0 |= X86_CR0_PG | X86_CR0_WP;
 
-        vcpu->arch.cr0 = cr0;
-        cr0 |= X86_CR0_PG | X86_CR0_WP;
-        if (!vcpu->fpu_active) {
-                svm->vmcb->control.intercept_exceptions |= (1 << NM_VECTOR);
+        if (!vcpu->fpu_active)
                 cr0 |= X86_CR0_TS;
-        }
-set:
         /*
          * re-enable caching here because the QEMU bios
          * does not do it - this results in some delay at
@@ -997,6 +1028,7 @@ set:
          */
         cr0 &= ~(X86_CR0_CD | X86_CR0_NW);
         svm->vmcb->save.cr0 = cr0;
+        update_cr0_intercept(svm);
 }
 
 static void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
@@ -1102,76 +1134,70 @@ static void new_asid(struct vcpu_svm *svm, struct svm_cpu_data *sd)
         svm->vmcb->control.asid = sd->next_asid++;
 }
 
-static unsigned long svm_get_dr(struct kvm_vcpu *vcpu, int dr)
+static int svm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *dest)
 {
         struct vcpu_svm *svm = to_svm(vcpu);
-        unsigned long val;
 
         switch (dr) {
         case 0 ... 3:
-                val = vcpu->arch.db[dr];
+                *dest = vcpu->arch.db[dr];
                 break;
+        case 4:
+                if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
+                        return EMULATE_FAIL; /* will re-inject UD */
+                /* fall through */
         case 6:
                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
-                        val = vcpu->arch.dr6;
+                        *dest = vcpu->arch.dr6;
                 else
-                        val = svm->vmcb->save.dr6;
+                        *dest = svm->vmcb->save.dr6;
                 break;
+        case 5:
+                if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
+                        return EMULATE_FAIL; /* will re-inject UD */
+                /* fall through */
         case 7:
                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
-                        val = vcpu->arch.dr7;
+                        *dest = vcpu->arch.dr7;
                 else
-                        val = svm->vmcb->save.dr7;
+                        *dest = svm->vmcb->save.dr7;
                 break;
-        default:
-                val = 0;
         }
 
-        return val;
+        return EMULATE_DONE;
 }
 
-static void svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value,
-                       int *exception)
+static int svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value)
 {
         struct vcpu_svm *svm = to_svm(vcpu);
 
-        *exception = 0;
-
         switch (dr) {
         case 0 ... 3:
                 vcpu->arch.db[dr] = value;
                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
                         vcpu->arch.eff_db[dr] = value;
-                return;
-        case 4 ... 5:
-                if (vcpu->arch.cr4 & X86_CR4_DE)
-                        *exception = UD_VECTOR;
-                return;
+                break;
+        case 4:
+                if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
+                        return EMULATE_FAIL; /* will re-inject UD */
+                /* fall through */
         case 6:
-                if (value & 0xffffffff00000000ULL) {
-                        *exception = GP_VECTOR;
-                        return;
-                }
                 vcpu->arch.dr6 = (value & DR6_VOLATILE) | DR6_FIXED_1;
-                return;
+                break;
+        case 5:
+                if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
+                        return EMULATE_FAIL; /* will re-inject UD */
+                /* fall through */
         case 7:
-                if (value & 0xffffffff00000000ULL) {
-                        *exception = GP_VECTOR;
-                        return;
-                }
                 vcpu->arch.dr7 = (value & DR7_VOLATILE) | DR7_FIXED_1;
                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
                         svm->vmcb->save.dr7 = vcpu->arch.dr7;
                         vcpu->arch.switch_db_regs = (value & DR7_BP_EN_MASK);
                 }
-                return;
-        default:
-                /* FIXME: Possible case? */
-                printk(KERN_DEBUG "%s: unexpected dr %u\n",
-                       __func__, dr);
-                *exception = UD_VECTOR;
-                return;
+                break;
         }
+
+        return EMULATE_DONE;
 }
 
 static int pf_interception(struct vcpu_svm *svm)
@@ -1239,13 +1265,17 @@ static int ud_interception(struct vcpu_svm *svm)
         return 1;
 }
 
-static int nm_interception(struct vcpu_svm *svm)
+static void svm_fpu_activate(struct kvm_vcpu *vcpu)
 {
+        struct vcpu_svm *svm = to_svm(vcpu);
         svm->vmcb->control.intercept_exceptions &= ~(1 << NM_VECTOR);
-        if (!(svm->vcpu.arch.cr0 & X86_CR0_TS))
-                svm->vmcb->save.cr0 &= ~X86_CR0_TS;
         svm->vcpu.fpu_active = 1;
+        update_cr0_intercept(svm);
+}
 
+static int nm_interception(struct vcpu_svm *svm)
+{
+        svm_fpu_activate(&svm->vcpu);
         return 1;
 }
 
@@ -1337,7 +1367,7 @@ static int vmmcall_interception(struct vcpu_svm *svm)
 
 static int nested_svm_check_permissions(struct vcpu_svm *svm)
 {
-        if (!(svm->vcpu.arch.shadow_efer & EFER_SVME)
+        if (!(svm->vcpu.arch.efer & EFER_SVME)
             || !is_paging(&svm->vcpu)) {
                 kvm_queue_exception(&svm->vcpu, UD_VECTOR);
                 return 1;
@@ -1740,8 +1770,8 @@ static bool nested_svm_vmrun(struct vcpu_svm *svm)
         hsave->save.ds     = vmcb->save.ds;
         hsave->save.gdtr   = vmcb->save.gdtr;
         hsave->save.idtr   = vmcb->save.idtr;
-        hsave->save.efer   = svm->vcpu.arch.shadow_efer;
-        hsave->save.cr0    = svm->vcpu.arch.cr0;
+        hsave->save.efer   = svm->vcpu.arch.efer;
+        hsave->save.cr0    = kvm_read_cr0(&svm->vcpu);
         hsave->save.cr4    = svm->vcpu.arch.cr4;
         hsave->save.rflags = vmcb->save.rflags;
         hsave->save.rip    = svm->next_rip;
@@ -2153,9 +2183,10 @@ static int rdmsr_interception(struct vcpu_svm *svm)
         u32 ecx = svm->vcpu.arch.regs[VCPU_REGS_RCX];
         u64 data;
 
-        if (svm_get_msr(&svm->vcpu, ecx, &data))
+        if (svm_get_msr(&svm->vcpu, ecx, &data)) {
+                trace_kvm_msr_read_ex(ecx);
                 kvm_inject_gp(&svm->vcpu, 0);
-        else {
+        } else {
                 trace_kvm_msr_read(ecx, data);
 
                 svm->vcpu.arch.regs[VCPU_REGS_RAX] = data & 0xffffffff;
@@ -2247,13 +2278,15 @@ static int wrmsr_interception(struct vcpu_svm *svm)
         u64 data = (svm->vcpu.arch.regs[VCPU_REGS_RAX] & -1u)
                 | ((u64)(svm->vcpu.arch.regs[VCPU_REGS_RDX] & -1u) << 32);
 
-        trace_kvm_msr_write(ecx, data);
 
         svm->next_rip = kvm_rip_read(&svm->vcpu) + 2;
-        if (svm_set_msr(&svm->vcpu, ecx, data))
+        if (svm_set_msr(&svm->vcpu, ecx, data)) {
+                trace_kvm_msr_write_ex(ecx, data);
                 kvm_inject_gp(&svm->vcpu, 0);
-        else
+        } else {
+                trace_kvm_msr_write(ecx, data);
                 skip_emulated_instruction(&svm->vcpu);
+        }
         return 1;
 }
 
@@ -2297,7 +2330,7 @@ static int (*svm_exit_handlers[])(struct vcpu_svm *svm) = {
         [SVM_EXIT_READ_CR3]                     = emulate_on_interception,
         [SVM_EXIT_READ_CR4]                     = emulate_on_interception,
         [SVM_EXIT_READ_CR8]                     = emulate_on_interception,
-        /* for now: */
+        [SVM_EXIT_CR0_SEL_WRITE]                = emulate_on_interception,
         [SVM_EXIT_WRITE_CR0]                    = emulate_on_interception,
         [SVM_EXIT_WRITE_CR3]                    = emulate_on_interception,
         [SVM_EXIT_WRITE_CR4]                    = emulate_on_interception,
@@ -2306,11 +2339,17 @@ static int (*svm_exit_handlers[])(struct vcpu_svm *svm) = {
         [SVM_EXIT_READ_DR1]                     = emulate_on_interception,
         [SVM_EXIT_READ_DR2]                     = emulate_on_interception,
         [SVM_EXIT_READ_DR3]                     = emulate_on_interception,
+        [SVM_EXIT_READ_DR4]                     = emulate_on_interception,
+        [SVM_EXIT_READ_DR5]                     = emulate_on_interception,
+        [SVM_EXIT_READ_DR6]                     = emulate_on_interception,
+        [SVM_EXIT_READ_DR7]                     = emulate_on_interception,
         [SVM_EXIT_WRITE_DR0]                    = emulate_on_interception,
         [SVM_EXIT_WRITE_DR1]                    = emulate_on_interception,
         [SVM_EXIT_WRITE_DR2]                    = emulate_on_interception,
         [SVM_EXIT_WRITE_DR3]                    = emulate_on_interception,
+        [SVM_EXIT_WRITE_DR4]                    = emulate_on_interception,
         [SVM_EXIT_WRITE_DR5]                    = emulate_on_interception,
+        [SVM_EXIT_WRITE_DR6]                    = emulate_on_interception,
         [SVM_EXIT_WRITE_DR7]                    = emulate_on_interception,
         [SVM_EXIT_EXCP_BASE + DB_VECTOR]        = db_interception,
         [SVM_EXIT_EXCP_BASE + BP_VECTOR]        = bp_interception,
@@ -2383,20 +2422,10 @@ static int handle_exit(struct kvm_vcpu *vcpu)
 
         svm_complete_interrupts(svm);
 
-        if (npt_enabled) {
-                int mmu_reload = 0;
-                if ((vcpu->arch.cr0 ^ svm->vmcb->save.cr0) & X86_CR0_PG) {
-                        svm_set_cr0(vcpu, svm->vmcb->save.cr0);
-                        mmu_reload = 1;
-                }
+        if (!(svm->vmcb->control.intercept_cr_write & INTERCEPT_CR0_MASK))
                 vcpu->arch.cr0 = svm->vmcb->save.cr0;
+        if (npt_enabled)
                 vcpu->arch.cr3 = svm->vmcb->save.cr3;
-                if (mmu_reload) {
-                        kvm_mmu_reset_context(vcpu);
-                        kvm_mmu_load(vcpu);
-                }
-        }
-
 
         if (svm->vmcb->control.exit_code == SVM_EXIT_ERR) {
                 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
@@ -2798,12 +2827,6 @@ static void svm_set_cr3(struct kvm_vcpu *vcpu, unsigned long root)
 
         svm->vmcb->save.cr3 = root;
         force_new_asid(vcpu);
-
-        if (vcpu->fpu_active) {
-                svm->vmcb->control.intercept_exceptions |= (1 << NM_VECTOR);
-                svm->vmcb->save.cr0 |= X86_CR0_TS;
-                vcpu->fpu_active = 0;
-        }
 }
 
 static int is_disabled(void)
@@ -2852,6 +2875,10 @@ static u64 svm_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio)
         return 0;
 }
 
+static void svm_cpuid_update(struct kvm_vcpu *vcpu)
+{
+}
+
 static const struct trace_print_flags svm_exit_reasons_str[] = {
         { SVM_EXIT_READ_CR0,                    "read_cr0" },
         { SVM_EXIT_READ_CR3,                    "read_cr3" },
@@ -2905,9 +2932,22 @@ static const struct trace_print_flags svm_exit_reasons_str[] = {
         { -1, NULL }
 };
 
-static bool svm_gb_page_enable(void)
+static int svm_get_lpage_level(void)
 {
-        return true;
+        return PT_PDPE_LEVEL;
+}
+
+static bool svm_rdtscp_supported(void)
+{
+        return false;
+}
+
+static void svm_fpu_deactivate(struct kvm_vcpu *vcpu)
+{
+        struct vcpu_svm *svm = to_svm(vcpu);
+
+        update_cr0_intercept(svm);
+        svm->vmcb->control.intercept_exceptions |= 1 << NM_VECTOR;
 }
 
 static struct kvm_x86_ops svm_x86_ops = {
@@ -2936,6 +2976,7 @@ static struct kvm_x86_ops svm_x86_ops = {
         .set_segment = svm_set_segment,
         .get_cpl = svm_get_cpl,
         .get_cs_db_l_bits = kvm_get_cs_db_l_bits,
+        .decache_cr0_guest_bits = svm_decache_cr0_guest_bits,
         .decache_cr4_guest_bits = svm_decache_cr4_guest_bits,
         .set_cr0 = svm_set_cr0,
         .set_cr3 = svm_set_cr3,
@@ -2950,6 +2991,8 @@ static struct kvm_x86_ops svm_x86_ops = {
         .cache_reg = svm_cache_reg,
         .get_rflags = svm_get_rflags,
         .set_rflags = svm_set_rflags,
+        .fpu_activate = svm_fpu_activate,
+        .fpu_deactivate = svm_fpu_deactivate,
 
         .tlb_flush = svm_flush_tlb,
 
@@ -2975,7 +3018,11 @@ static struct kvm_x86_ops svm_x86_ops = {
         .get_mt_mask = svm_get_mt_mask,
 
         .exit_reasons_str = svm_exit_reasons_str,
-        .gb_page_enable = svm_gb_page_enable,
+        .get_lpage_level = svm_get_lpage_level,
+
+        .cpuid_update = svm_cpuid_update,
+
+        .rdtscp_supported = svm_rdtscp_supported,
 };
 
 static int __init svm_init(void)
diff --git a/arch/x86/kvm/trace.h b/arch/x86/kvm/trace.h
index 816e0449db0..6ad30a29f04 100644
--- a/arch/x86/kvm/trace.h
+++ b/arch/x86/kvm/trace.h
@@ -56,6 +56,38 @@ TRACE_EVENT(kvm_hypercall,
 );
 
 /*
+ * Tracepoint for hypercall.
+ */
+TRACE_EVENT(kvm_hv_hypercall,
+        TP_PROTO(__u16 code, bool fast, __u16 rep_cnt, __u16 rep_idx,
+                 __u64 ingpa, __u64 outgpa),
+        TP_ARGS(code, fast, rep_cnt, rep_idx, ingpa, outgpa),
+
+        TP_STRUCT__entry(
+                __field(        __u16,          code            )
+                __field(        bool,           fast            )
+                __field(        __u16,          rep_cnt         )
+                __field(        __u16,          rep_idx         )
+                __field(        __u64,          ingpa           )
+                __field(        __u64,          outgpa          )
+        ),
+
+        TP_fast_assign(
+                __entry->code           = code;
+                __entry->fast           = fast;
+                __entry->rep_cnt        = rep_cnt;
+                __entry->rep_idx        = rep_idx;
+                __entry->ingpa          = ingpa;
+                __entry->outgpa         = outgpa;
+        ),
+
+        TP_printk("code 0x%x %s cnt 0x%x idx 0x%x in 0x%llx out 0x%llx",
+                  __entry->code, __entry->fast ? "fast" : "slow",
+                  __entry->rep_cnt, __entry->rep_idx,  __entry->ingpa,
+                  __entry->outgpa)
+);
+
+/*
  * Tracepoint for PIO.
  */
 TRACE_EVENT(kvm_pio,
@@ -214,28 +246,33 @@ TRACE_EVENT(kvm_page_fault,
  * Tracepoint for guest MSR access.
  */
 TRACE_EVENT(kvm_msr,
-        TP_PROTO(unsigned int rw, unsigned int ecx, unsigned long data),
-        TP_ARGS(rw, ecx, data),
+        TP_PROTO(unsigned write, u32 ecx, u64 data, bool exception),
+        TP_ARGS(write, ecx, data, exception),
 
         TP_STRUCT__entry(
-                __field(        unsigned int,   rw              )
-                __field(        unsigned int,   ecx             )
-                __field(        unsigned long,  data            )
+                __field(        unsigned,       write           )
+                __field(        u32,            ecx             )
+                __field(        u64,            data            )
+                __field(        u8,             exception       )
         ),
 
         TP_fast_assign(
-                __entry->rw             = rw;
+                __entry->write          = write;
                 __entry->ecx            = ecx;
                 __entry->data           = data;
+                __entry->exception      = exception;
         ),
 
-        TP_printk("msr_%s %x = 0x%lx",
-                  __entry->rw ? "write" : "read",
-                  __entry->ecx, __entry->data)
+        TP_printk("msr_%s %x = 0x%llx%s",
+                  __entry->write ? "write" : "read",
+                  __entry->ecx, __entry->data,
+                  __entry->exception ? " (#GP)" : "")
 );
 
-#define trace_kvm_msr_read(ecx, data)           trace_kvm_msr(0, ecx, data)
-#define trace_kvm_msr_write(ecx, data)          trace_kvm_msr(1, ecx, data)
+#define trace_kvm_msr_read(ecx, data)      trace_kvm_msr(0, ecx, data, false)
+#define trace_kvm_msr_write(ecx, data)     trace_kvm_msr(1, ecx, data, false)
+#define trace_kvm_msr_read_ex(ecx)         trace_kvm_msr(0, ecx, 0, true)
+#define trace_kvm_msr_write_ex(ecx, data)  trace_kvm_msr(1, ecx, data, true)
 
 /*
  * Tracepoint for guest CR access.
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index d4918d6fc92..bc933cfb4e6 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -26,6 +26,7 @@
 #include <linux/sched.h>
 #include <linux/moduleparam.h>
 #include <linux/ftrace_event.h>
+#include <linux/slab.h>
 #include "kvm_cache_regs.h"
 #include "x86.h"
 
@@ -61,6 +62,23 @@ module_param_named(unrestricted_guest,
 static int __read_mostly emulate_invalid_guest_state = 0;
 module_param(emulate_invalid_guest_state, bool, S_IRUGO);
 
+#define KVM_GUEST_CR0_MASK_UNRESTRICTED_GUEST                           \
+        (X86_CR0_WP | X86_CR0_NE | X86_CR0_NW | X86_CR0_CD)
+#define KVM_GUEST_CR0_MASK                                              \
+        (KVM_GUEST_CR0_MASK_UNRESTRICTED_GUEST | X86_CR0_PG | X86_CR0_PE)
+#define KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST                         \
+        (X86_CR0_WP | X86_CR0_NE)
+#define KVM_VM_CR0_ALWAYS_ON                                            \
+        (KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST | X86_CR0_PG | X86_CR0_PE)
+#define KVM_CR4_GUEST_OWNED_BITS                                      \
+        (X86_CR4_PVI | X86_CR4_DE | X86_CR4_PCE | X86_CR4_OSFXSR      \
+         | X86_CR4_OSXMMEXCPT)
+
+#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
+#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)
+
+#define RMODE_GUEST_OWNED_EFLAGS_BITS (~(X86_EFLAGS_IOPL | X86_EFLAGS_VM))
+
 /*
  * These 2 parameters are used to config the controls for Pause-Loop Exiting:
  * ple_gap:    upper bound on the amount of time between two successive
@@ -115,7 +133,7 @@ struct vcpu_vmx {
         } host_state;
         struct {
                 int vm86_active;
-                u8 save_iopl;
+                ulong save_rflags;
                 struct kvm_save_segment {
                         u16 selector;
                         unsigned long base;
@@ -136,6 +154,8 @@ struct vcpu_vmx {
         ktime_t entry_time;
         s64 vnmi_blocked_time;
         u32 exit_reason;
+
+        bool rdtscp_enabled;
 };
 
 static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu)
@@ -210,7 +230,7 @@ static const u32 vmx_msr_index[] = {
 #ifdef CONFIG_X86_64
         MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR,
 #endif
-        MSR_EFER, MSR_K6_STAR,
+        MSR_EFER, MSR_TSC_AUX, MSR_K6_STAR,
 };
 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
 
@@ -301,6 +321,11 @@ static inline bool cpu_has_vmx_ept_2m_page(void)
         return !!(vmx_capability.ept & VMX_EPT_2MB_PAGE_BIT);
 }
 
+static inline bool cpu_has_vmx_ept_1g_page(void)
+{
+        return !!(vmx_capability.ept & VMX_EPT_1GB_PAGE_BIT);
+}
+
 static inline int cpu_has_vmx_invept_individual_addr(void)
 {
         return !!(vmx_capability.ept & VMX_EPT_EXTENT_INDIVIDUAL_BIT);
@@ -336,9 +361,7 @@ static inline int cpu_has_vmx_ple(void)
 
 static inline int vm_need_virtualize_apic_accesses(struct kvm *kvm)
 {
-        return flexpriority_enabled &&
-                (cpu_has_vmx_virtualize_apic_accesses()) &&
-                (irqchip_in_kernel(kvm));
+        return flexpriority_enabled && irqchip_in_kernel(kvm);
 }
 
 static inline int cpu_has_vmx_vpid(void)
@@ -347,6 +370,12 @@ static inline int cpu_has_vmx_vpid(void)
                 SECONDARY_EXEC_ENABLE_VPID;
 }
 
+static inline int cpu_has_vmx_rdtscp(void)
+{
+        return vmcs_config.cpu_based_2nd_exec_ctrl &
+                SECONDARY_EXEC_RDTSCP;
+}
+
 static inline int cpu_has_virtual_nmis(void)
 {
         return vmcs_config.pin_based_exec_ctrl & PIN_BASED_VIRTUAL_NMIS;
@@ -551,22 +580,18 @@ static void update_exception_bitmap(struct kvm_vcpu *vcpu)
 {
         u32 eb;
 
-        eb = (1u << PF_VECTOR) | (1u << UD_VECTOR) | (1u << MC_VECTOR);
-        if (!vcpu->fpu_active)
-                eb |= 1u << NM_VECTOR;
-        /*
-         * Unconditionally intercept #DB so we can maintain dr6 without
-         * reading it every exit.
-         */
-        eb |= 1u << DB_VECTOR;
-        if (vcpu->guest_debug & KVM_GUESTDBG_ENABLE) {
-                if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
-                        eb |= 1u << BP_VECTOR;
-        }
+        eb = (1u << PF_VECTOR) | (1u << UD_VECTOR) | (1u << MC_VECTOR) |
+             (1u << NM_VECTOR) | (1u << DB_VECTOR);
+        if ((vcpu->guest_debug &
+             (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP)) ==
+            (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP))
+                eb |= 1u << BP_VECTOR;
         if (to_vmx(vcpu)->rmode.vm86_active)
                 eb = ~0;
         if (enable_ept)
                 eb &= ~(1u << PF_VECTOR); /* bypass_guest_pf = 0 */
+        if (vcpu->fpu_active)
+                eb &= ~(1u << NM_VECTOR);
         vmcs_write32(EXCEPTION_BITMAP, eb);
 }
 
@@ -589,7 +614,7 @@ static bool update_transition_efer(struct vcpu_vmx *vmx, int efer_offset)
         u64 guest_efer;
         u64 ignore_bits;
 
-        guest_efer = vmx->vcpu.arch.shadow_efer;
+        guest_efer = vmx->vcpu.arch.efer;
 
         /*
          * NX is emulated; LMA and LME handled by hardware; SCE meaninless
@@ -767,38 +792,51 @@ static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
 
 static void vmx_fpu_activate(struct kvm_vcpu *vcpu)
 {
+        ulong cr0;
+
         if (vcpu->fpu_active)
                 return;
         vcpu->fpu_active = 1;
-        vmcs_clear_bits(GUEST_CR0, X86_CR0_TS);
-        if (vcpu->arch.cr0 & X86_CR0_TS)
-                vmcs_set_bits(GUEST_CR0, X86_CR0_TS);
+        cr0 = vmcs_readl(GUEST_CR0);
+        cr0 &= ~(X86_CR0_TS | X86_CR0_MP);
+        cr0 |= kvm_read_cr0_bits(vcpu, X86_CR0_TS | X86_CR0_MP);
+        vmcs_writel(GUEST_CR0, cr0);
         update_exception_bitmap(vcpu);
+        vcpu->arch.cr0_guest_owned_bits = X86_CR0_TS;
+        vmcs_writel(CR0_GUEST_HOST_MASK, ~vcpu->arch.cr0_guest_owned_bits);
 }
 
+static void vmx_decache_cr0_guest_bits(struct kvm_vcpu *vcpu);
+
 static void vmx_fpu_deactivate(struct kvm_vcpu *vcpu)
 {
-        if (!vcpu->fpu_active)
-                return;
-        vcpu->fpu_active = 0;
-        vmcs_set_bits(GUEST_CR0, X86_CR0_TS);
+        vmx_decache_cr0_guest_bits(vcpu);
+        vmcs_set_bits(GUEST_CR0, X86_CR0_TS | X86_CR0_MP);
         update_exception_bitmap(vcpu);
+        vcpu->arch.cr0_guest_owned_bits = 0;
+        vmcs_writel(CR0_GUEST_HOST_MASK, ~vcpu->arch.cr0_guest_owned_bits);
+        vmcs_writel(CR0_READ_SHADOW, vcpu->arch.cr0);
 }
 
 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
 {
-        unsigned long rflags;
+        unsigned long rflags, save_rflags;
 
         rflags = vmcs_readl(GUEST_RFLAGS);
-        if (to_vmx(vcpu)->rmode.vm86_active)
-                rflags &= ~(unsigned long)(X86_EFLAGS_IOPL | X86_EFLAGS_VM);
+        if (to_vmx(vcpu)->rmode.vm86_active) {
+                rflags &= RMODE_GUEST_OWNED_EFLAGS_BITS;
+                save_rflags = to_vmx(vcpu)->rmode.save_rflags;
+                rflags |= save_rflags & ~RMODE_GUEST_OWNED_EFLAGS_BITS;
+        }
         return rflags;
 }
 
 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 {
-        if (to_vmx(vcpu)->rmode.vm86_active)
+        if (to_vmx(vcpu)->rmode.vm86_active) {
+                to_vmx(vcpu)->rmode.save_rflags = rflags;
                 rflags |= X86_EFLAGS_IOPL | X86_EFLAGS_VM;
+        }
         vmcs_writel(GUEST_RFLAGS, rflags);
 }
 
@@ -878,6 +916,11 @@ static void vmx_queue_exception(struct kvm_vcpu *vcpu, unsigned nr,
         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, intr_info);
 }
 
+static bool vmx_rdtscp_supported(void)
+{
+        return cpu_has_vmx_rdtscp();
+}
+
 /*
  * Swap MSR entry in host/guest MSR entry array.
  */
@@ -913,12 +956,15 @@ static void setup_msrs(struct vcpu_vmx *vmx)
                 index = __find_msr_index(vmx, MSR_CSTAR);
                 if (index >= 0)
                         move_msr_up(vmx, index, save_nmsrs++);
+                index = __find_msr_index(vmx, MSR_TSC_AUX);
+                if (index >= 0 && vmx->rdtscp_enabled)
+                        move_msr_up(vmx, index, save_nmsrs++);
                 /*
                  * MSR_K6_STAR is only needed on long mode guests, and only
                  * if efer.sce is enabled.
                  */
                 index = __find_msr_index(vmx, MSR_K6_STAR);
-                if ((index >= 0) && (vmx->vcpu.arch.shadow_efer & EFER_SCE))
+                if ((index >= 0) && (vmx->vcpu.arch.efer & EFER_SCE))
                         move_msr_up(vmx, index, save_nmsrs++);
         }
 #endif
@@ -1002,6 +1048,10 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
         case MSR_IA32_SYSENTER_ESP:
                 data = vmcs_readl(GUEST_SYSENTER_ESP);
                 break;
+        case MSR_TSC_AUX:
+                if (!to_vmx(vcpu)->rdtscp_enabled)
+                        return 1;
+                /* Otherwise falls through */
         default:
                 vmx_load_host_state(to_vmx(vcpu));
                 msr = find_msr_entry(to_vmx(vcpu), msr_index);
@@ -1065,7 +1115,15 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
                         vcpu->arch.pat = data;
                         break;
                 }
-                /* Otherwise falls through to kvm_set_msr_common */
+                ret = kvm_set_msr_common(vcpu, msr_index, data);
+                break;
+        case MSR_TSC_AUX:
+                if (!vmx->rdtscp_enabled)
+                        return 1;
+                /* Check reserved bit, higher 32 bits should be zero */
+                if ((data >> 32) != 0)
+                        return 1;
+                /* Otherwise falls through */
         default:
                 msr = find_msr_entry(vmx, msr_index);
                 if (msr) {
@@ -1224,6 +1282,8 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf)
               CPU_BASED_USE_IO_BITMAPS |
               CPU_BASED_MOV_DR_EXITING |
               CPU_BASED_USE_TSC_OFFSETING |
+              CPU_BASED_MWAIT_EXITING |
+              CPU_BASED_MONITOR_EXITING |
               CPU_BASED_INVLPG_EXITING;
         opt = CPU_BASED_TPR_SHADOW |
               CPU_BASED_USE_MSR_BITMAPS |
@@ -1243,7 +1303,8 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf)
                         SECONDARY_EXEC_ENABLE_VPID |
                         SECONDARY_EXEC_ENABLE_EPT |
                         SECONDARY_EXEC_UNRESTRICTED_GUEST |
-                        SECONDARY_EXEC_PAUSE_LOOP_EXITING;
+                        SECONDARY_EXEC_PAUSE_LOOP_EXITING |
+                        SECONDARY_EXEC_RDTSCP;
                 if (adjust_vmx_controls(min2, opt2,
                                         MSR_IA32_VMX_PROCBASED_CTLS2,
                                         &_cpu_based_2nd_exec_control) < 0)
@@ -1429,8 +1490,8 @@ static void enter_pmode(struct kvm_vcpu *vcpu)
         vmcs_write32(GUEST_TR_AR_BYTES, vmx->rmode.tr.ar);
 
         flags = vmcs_readl(GUEST_RFLAGS);
-        flags &= ~(X86_EFLAGS_IOPL | X86_EFLAGS_VM);
-        flags |= (vmx->rmode.save_iopl << IOPL_SHIFT);
+        flags &= RMODE_GUEST_OWNED_EFLAGS_BITS;
+        flags |= vmx->rmode.save_rflags & ~RMODE_GUEST_OWNED_EFLAGS_BITS;
         vmcs_writel(GUEST_RFLAGS, flags);
 
         vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~X86_CR4_VME) |
@@ -1457,8 +1518,12 @@ static void enter_pmode(struct kvm_vcpu *vcpu)
 static gva_t rmode_tss_base(struct kvm *kvm)
 {
         if (!kvm->arch.tss_addr) {
-                gfn_t base_gfn = kvm->memslots[0].base_gfn +
-                                 kvm->memslots[0].npages - 3;
+                struct kvm_memslots *slots;
+                gfn_t base_gfn;
+
+                slots = rcu_dereference(kvm->memslots);
+                base_gfn = kvm->memslots->memslots[0].base_gfn +
+                                 kvm->memslots->memslots[0].npages - 3;
                 return base_gfn << PAGE_SHIFT;
         }
         return kvm->arch.tss_addr;
@@ -1499,8 +1564,7 @@ static void enter_rmode(struct kvm_vcpu *vcpu)
         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
 
         flags = vmcs_readl(GUEST_RFLAGS);
-        vmx->rmode.save_iopl
-                = (flags & X86_EFLAGS_IOPL) >> IOPL_SHIFT;
+        vmx->rmode.save_rflags = flags;
 
         flags |= X86_EFLAGS_IOPL | X86_EFLAGS_VM;
 
@@ -1544,9 +1608,7 @@ static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
          * of this msr depends on is_long_mode().
          */
         vmx_load_host_state(to_vmx(vcpu));
-        vcpu->arch.shadow_efer = efer;
-        if (!msr)
-                return;
+        vcpu->arch.efer = efer;
         if (efer & EFER_LMA) {
                 vmcs_write32(VM_ENTRY_CONTROLS,
                              vmcs_read32(VM_ENTRY_CONTROLS) |
@@ -1576,13 +1638,13 @@ static void enter_lmode(struct kvm_vcpu *vcpu)
                              (guest_tr_ar & ~AR_TYPE_MASK)
                              | AR_TYPE_BUSY_64_TSS);
         }
-        vcpu->arch.shadow_efer |= EFER_LMA;
-        vmx_set_efer(vcpu, vcpu->arch.shadow_efer);
+        vcpu->arch.efer |= EFER_LMA;
+        vmx_set_efer(vcpu, vcpu->arch.efer);
 }
 
 static void exit_lmode(struct kvm_vcpu *vcpu)
 {
-        vcpu->arch.shadow_efer &= ~EFER_LMA;
+        vcpu->arch.efer &= ~EFER_LMA;
 
         vmcs_write32(VM_ENTRY_CONTROLS,
                      vmcs_read32(VM_ENTRY_CONTROLS)
@@ -1598,10 +1660,20 @@ static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
                 ept_sync_context(construct_eptp(vcpu->arch.mmu.root_hpa));
 }
 
+static void vmx_decache_cr0_guest_bits(struct kvm_vcpu *vcpu)
+{
+        ulong cr0_guest_owned_bits = vcpu->arch.cr0_guest_owned_bits;
+
+        vcpu->arch.cr0 &= ~cr0_guest_owned_bits;
+        vcpu->arch.cr0 |= vmcs_readl(GUEST_CR0) & cr0_guest_owned_bits;
+}
+
 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
 {
-        vcpu->arch.cr4 &= KVM_GUEST_CR4_MASK;
-        vcpu->arch.cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
+        ulong cr4_guest_owned_bits = vcpu->arch.cr4_guest_owned_bits;
+
+        vcpu->arch.cr4 &= ~cr4_guest_owned_bits;
+        vcpu->arch.cr4 |= vmcs_readl(GUEST_CR4) & cr4_guest_owned_bits;
 }
 
 static void ept_load_pdptrs(struct kvm_vcpu *vcpu)
@@ -1646,7 +1718,7 @@ static void ept_update_paging_mode_cr0(unsigned long *hw_cr0,
                              (CPU_BASED_CR3_LOAD_EXITING |
                               CPU_BASED_CR3_STORE_EXITING));
                 vcpu->arch.cr0 = cr0;
-                vmx_set_cr4(vcpu, vcpu->arch.cr4);
+                vmx_set_cr4(vcpu, kvm_read_cr4(vcpu));
         } else if (!is_paging(vcpu)) {
                 /* From nonpaging to paging */
                 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL,
@@ -1654,23 +1726,13 @@ static void ept_update_paging_mode_cr0(unsigned long *hw_cr0,
                              ~(CPU_BASED_CR3_LOAD_EXITING |
                                CPU_BASED_CR3_STORE_EXITING));
                 vcpu->arch.cr0 = cr0;
-                vmx_set_cr4(vcpu, vcpu->arch.cr4);
+                vmx_set_cr4(vcpu, kvm_read_cr4(vcpu));
         }
 
         if (!(cr0 & X86_CR0_WP))
                 *hw_cr0 &= ~X86_CR0_WP;
 }
 
-static void ept_update_paging_mode_cr4(unsigned long *hw_cr4,
-                                        struct kvm_vcpu *vcpu)
-{
-        if (!is_paging(vcpu)) {
-                *hw_cr4 &= ~X86_CR4_PAE;
-                *hw_cr4 |= X86_CR4_PSE;
-        } else if (!(vcpu->arch.cr4 & X86_CR4_PAE))
-                *hw_cr4 &= ~X86_CR4_PAE;
-}
-
 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 {
         struct vcpu_vmx *vmx = to_vmx(vcpu);
@@ -1682,8 +1744,6 @@ static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
         else
                 hw_cr0 = (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON;
 
-        vmx_fpu_deactivate(vcpu);
-
         if (vmx->rmode.vm86_active && (cr0 & X86_CR0_PE))
                 enter_pmode(vcpu);
 
@@ -1691,7 +1751,7 @@ static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
                 enter_rmode(vcpu);
 
 #ifdef CONFIG_X86_64
-        if (vcpu->arch.shadow_efer & EFER_LME) {
+        if (vcpu->arch.efer & EFER_LME) {
                 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG))
                         enter_lmode(vcpu);
                 if (is_paging(vcpu) && !(cr0 & X86_CR0_PG))
@@ -1702,12 +1762,12 @@ static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
         if (enable_ept)
                 ept_update_paging_mode_cr0(&hw_cr0, cr0, vcpu);
 
+        if (!vcpu->fpu_active)
+                hw_cr0 |= X86_CR0_TS | X86_CR0_MP;
+
         vmcs_writel(CR0_READ_SHADOW, cr0);
         vmcs_writel(GUEST_CR0, hw_cr0);
         vcpu->arch.cr0 = cr0;
-
-        if (!(cr0 & X86_CR0_TS) || !(cr0 & X86_CR0_PE))
-                vmx_fpu_activate(vcpu);
 }
 
 static u64 construct_eptp(unsigned long root_hpa)
@@ -1738,8 +1798,6 @@ static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 
         vmx_flush_tlb(vcpu);
         vmcs_writel(GUEST_CR3, guest_cr3);
-        if (vcpu->arch.cr0 & X86_CR0_PE)
-                vmx_fpu_deactivate(vcpu);
 }
 
 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
@@ -1748,8 +1806,14 @@ static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
                     KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON);
 
         vcpu->arch.cr4 = cr4;
-        if (enable_ept)
-                ept_update_paging_mode_cr4(&hw_cr4, vcpu);
+        if (enable_ept) {
+                if (!is_paging(vcpu)) {
+                        hw_cr4 &= ~X86_CR4_PAE;
+                        hw_cr4 |= X86_CR4_PSE;
+                } else if (!(cr4 & X86_CR4_PAE)) {
+                        hw_cr4 &= ~X86_CR4_PAE;
+                }
+        }
 
         vmcs_writel(CR4_READ_SHADOW, cr4);
         vmcs_writel(GUEST_CR4, hw_cr4);
@@ -1787,7 +1851,7 @@ static void vmx_get_segment(struct kvm_vcpu *vcpu,
 
 static int vmx_get_cpl(struct kvm_vcpu *vcpu)
 {
-        if (!(vcpu->arch.cr0 & X86_CR0_PE)) /* if real mode */
+        if (!is_protmode(vcpu))
                 return 0;
 
         if (vmx_get_rflags(vcpu) & X86_EFLAGS_VM) /* if virtual 8086 */
@@ -2042,7 +2106,7 @@ static bool cs_ss_rpl_check(struct kvm_vcpu *vcpu)
 static bool guest_state_valid(struct kvm_vcpu *vcpu)
 {
         /* real mode guest state checks */
-        if (!(vcpu->arch.cr0 & X86_CR0_PE)) {
+        if (!is_protmode(vcpu)) {
                 if (!rmode_segment_valid(vcpu, VCPU_SREG_CS))
                         return false;
                 if (!rmode_segment_valid(vcpu, VCPU_SREG_SS))
@@ -2175,7 +2239,7 @@ static int alloc_apic_access_page(struct kvm *kvm)
         struct kvm_userspace_memory_region kvm_userspace_mem;
         int r = 0;
 
-        down_write(&kvm->slots_lock);
+        mutex_lock(&kvm->slots_lock);
         if (kvm->arch.apic_access_page)
                 goto out;
         kvm_userspace_mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
@@ -2188,7 +2252,7 @@ static int alloc_apic_access_page(struct kvm *kvm)
 
         kvm->arch.apic_access_page = gfn_to_page(kvm, 0xfee00);
 out:
-        up_write(&kvm->slots_lock);
+        mutex_unlock(&kvm->slots_lock);
         return r;
 }
 
@@ -2197,7 +2261,7 @@ static int alloc_identity_pagetable(struct kvm *kvm)
         struct kvm_userspace_memory_region kvm_userspace_mem;
         int r = 0;
 
-        down_write(&kvm->slots_lock);
+        mutex_lock(&kvm->slots_lock);
         if (kvm->arch.ept_identity_pagetable)
                 goto out;
         kvm_userspace_mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
@@ -2212,7 +2276,7 @@ static int alloc_identity_pagetable(struct kvm *kvm)
         kvm->arch.ept_identity_pagetable = gfn_to_page(kvm,
                         kvm->arch.ept_identity_map_addr >> PAGE_SHIFT);
 out:
-        up_write(&kvm->slots_lock);
+        mutex_unlock(&kvm->slots_lock);
         return r;
 }
 
@@ -2384,14 +2448,12 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
         for (i = 0; i < NR_VMX_MSR; ++i) {
                 u32 index = vmx_msr_index[i];
                 u32 data_low, data_high;
-                u64 data;
                 int j = vmx->nmsrs;
 
                 if (rdmsr_safe(index, &data_low, &data_high) < 0)
                         continue;
                 if (wrmsr_safe(index, data_low, data_high) < 0)
                         continue;
-                data = data_low | ((u64)data_high << 32);
                 vmx->guest_msrs[j].index = i;
                 vmx->guest_msrs[j].data = 0;
                 vmx->guest_msrs[j].mask = -1ull;
@@ -2404,7 +2466,10 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
         vmcs_write32(VM_ENTRY_CONTROLS, vmcs_config.vmentry_ctrl);
 
         vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL);
-        vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
+        vmx->vcpu.arch.cr4_guest_owned_bits = KVM_CR4_GUEST_OWNED_BITS;
+        if (enable_ept)
+                vmx->vcpu.arch.cr4_guest_owned_bits |= X86_CR4_PGE;
+        vmcs_writel(CR4_GUEST_HOST_MASK, ~vmx->vcpu.arch.cr4_guest_owned_bits);
 
         tsc_base = vmx->vcpu.kvm->arch.vm_init_tsc;
         rdtscll(tsc_this);
@@ -2429,10 +2494,10 @@ static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
 {
         struct vcpu_vmx *vmx = to_vmx(vcpu);
         u64 msr;
-        int ret;
+        int ret, idx;
 
         vcpu->arch.regs_avail = ~((1 << VCPU_REGS_RIP) | (1 << VCPU_REGS_RSP));
-        down_read(&vcpu->kvm->slots_lock);
+        idx = srcu_read_lock(&vcpu->kvm->srcu);
         if (!init_rmode(vmx->vcpu.kvm)) {
                 ret = -ENOMEM;
                 goto out;
@@ -2526,7 +2591,7 @@ static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
                 vmcs_write16(VIRTUAL_PROCESSOR_ID, vmx->vpid);
 
         vmx->vcpu.arch.cr0 = X86_CR0_NW | X86_CR0_CD | X86_CR0_ET;
-        vmx_set_cr0(&vmx->vcpu, vmx->vcpu.arch.cr0); /* enter rmode */
+        vmx_set_cr0(&vmx->vcpu, kvm_read_cr0(vcpu)); /* enter rmode */
         vmx_set_cr4(&vmx->vcpu, 0);
         vmx_set_efer(&vmx->vcpu, 0);
         vmx_fpu_activate(&vmx->vcpu);
@@ -2540,7 +2605,7 @@ static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
         vmx->emulation_required = 0;
 
 out:
-        up_read(&vcpu->kvm->slots_lock);
+        srcu_read_unlock(&vcpu->kvm->srcu, idx);
         return ret;
 }
 
@@ -2717,6 +2782,12 @@ static int handle_rmode_exception(struct kvm_vcpu *vcpu,
                 kvm_queue_exception(vcpu, vec);
                 return 1;
         case BP_VECTOR:
+                /*
+                 * Update instruction length as we may reinject the exception
+                 * from user space while in guest debugging mode.
+                 */
+                to_vmx(vcpu)->vcpu.arch.event_exit_inst_len =
+                        vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
                         return 0;
                 /* fall through */
@@ -2839,6 +2910,13 @@ static int handle_exception(struct kvm_vcpu *vcpu)
                 kvm_run->debug.arch.dr7 = vmcs_readl(GUEST_DR7);
                 /* fall through */
         case BP_VECTOR:
+                /*
+                 * Update instruction length as we may reinject #BP from
+                 * user space while in guest debugging mode. Reading it for
+                 * #DB as well causes no harm, it is not used in that case.
+                 */
+                vmx->vcpu.arch.event_exit_inst_len =
+                        vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
                 kvm_run->debug.arch.pc = vmcs_readl(GUEST_CS_BASE) + rip;
                 kvm_run->debug.arch.exception = ex_no;
@@ -2940,11 +3018,10 @@ static int handle_cr(struct kvm_vcpu *vcpu)
                 };
                 break;
         case 2: /* clts */
-                vmx_fpu_deactivate(vcpu);
-                vcpu->arch.cr0 &= ~X86_CR0_TS;
-                vmcs_writel(CR0_READ_SHADOW, vcpu->arch.cr0);
-                vmx_fpu_activate(vcpu);
+                vmx_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
+                trace_kvm_cr_write(0, kvm_read_cr0(vcpu));
                 skip_emulated_instruction(vcpu);
+                vmx_fpu_activate(vcpu);
                 return 1;
         case 1: /*mov from cr*/
                 switch (cr) {
@@ -2962,7 +3039,9 @@ static int handle_cr(struct kvm_vcpu *vcpu)
                 }
                 break;
         case 3: /* lmsw */
-                kvm_lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
+                val = (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f;
+                trace_kvm_cr_write(0, (kvm_read_cr0(vcpu) & ~0xful) | val);
+                kvm_lmsw(vcpu, val);
 
                 skip_emulated_instruction(vcpu);
                 return 1;
@@ -2975,12 +3054,22 @@ static int handle_cr(struct kvm_vcpu *vcpu)
         return 0;
 }
 
+static int check_dr_alias(struct kvm_vcpu *vcpu)
+{
+        if (kvm_read_cr4_bits(vcpu, X86_CR4_DE)) {
+                kvm_queue_exception(vcpu, UD_VECTOR);
+                return -1;
+        }
+        return 0;
+}
+
 static int handle_dr(struct kvm_vcpu *vcpu)
 {
         unsigned long exit_qualification;
         unsigned long val;
         int dr, reg;
 
+        /* Do not handle if the CPL > 0, will trigger GP on re-entry */
         if (!kvm_require_cpl(vcpu, 0))
                 return 1;
         dr = vmcs_readl(GUEST_DR7);
@@ -3016,14 +3105,20 @@ static int handle_dr(struct kvm_vcpu *vcpu)
                 case 0 ... 3:
                         val = vcpu->arch.db[dr];
                         break;
+                case 4:
+                        if (check_dr_alias(vcpu) < 0)
+                                return 1;
+                        /* fall through */
                 case 6:
                         val = vcpu->arch.dr6;
                         break;
-                case 7:
+                case 5:
+                        if (check_dr_alias(vcpu) < 0)
+                                return 1;
+                        /* fall through */
+                default: /* 7 */
                         val = vcpu->arch.dr7;
                         break;
-                default:
-                        val = 0;
                 }
                 kvm_register_write(vcpu, reg, val);
         } else {
@@ -3034,21 +3129,25 @@ static int handle_dr(struct kvm_vcpu *vcpu)
                         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
                                 vcpu->arch.eff_db[dr] = val;
                         break;
-                case 4 ... 5:
-                        if (vcpu->arch.cr4 & X86_CR4_DE)
-                                kvm_queue_exception(vcpu, UD_VECTOR);
-                        break;
+                case 4:
+                        if (check_dr_alias(vcpu) < 0)
+                                return 1;
+                        /* fall through */
                 case 6:
                         if (val & 0xffffffff00000000ULL) {
-                                kvm_queue_exception(vcpu, GP_VECTOR);
-                                break;
+                                kvm_inject_gp(vcpu, 0);
+                                return 1;
                         }
                         vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
                         break;
-                case 7:
+                case 5:
+                        if (check_dr_alias(vcpu) < 0)
+                                return 1;
+                        /* fall through */
+                default: /* 7 */
                         if (val & 0xffffffff00000000ULL) {
-                                kvm_queue_exception(vcpu, GP_VECTOR);
-                                break;
+                                kvm_inject_gp(vcpu, 0);
+                                return 1;
                         }
                         vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
                         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
@@ -3075,6 +3174,7 @@ static int handle_rdmsr(struct kvm_vcpu *vcpu)
         u64 data;
 
         if (vmx_get_msr(vcpu, ecx, &data)) {
+                trace_kvm_msr_read_ex(ecx);
                 kvm_inject_gp(vcpu, 0);
                 return 1;
         }
@@ -3094,13 +3194,13 @@ static int handle_wrmsr(struct kvm_vcpu *vcpu)
         u64 data = (vcpu->arch.regs[VCPU_REGS_RAX] & -1u)
                 | ((u64)(vcpu->arch.regs[VCPU_REGS_RDX] & -1u) << 32);
 
-        trace_kvm_msr_write(ecx, data);
-
         if (vmx_set_msr(vcpu, ecx, data) != 0) {
+                trace_kvm_msr_write_ex(ecx, data);
                 kvm_inject_gp(vcpu, 0);
                 return 1;
         }
 
+        trace_kvm_msr_write(ecx, data);
         skip_emulated_instruction(vcpu);
         return 1;
 }
@@ -3385,7 +3485,6 @@ static int handle_invalid_guest_state(struct kvm_vcpu *vcpu)
                 }
 
                 if (err != EMULATE_DONE) {
-                        kvm_report_emulation_failure(vcpu, "emulation failure");
                         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
                         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
                         vcpu->run->internal.ndata = 0;
@@ -3416,6 +3515,12 @@ static int handle_pause(struct kvm_vcpu *vcpu)
         return 1;
 }
 
+static int handle_invalid_op(struct kvm_vcpu *vcpu)
+{
+        kvm_queue_exception(vcpu, UD_VECTOR);
+        return 1;
+}
+
 /*
  * The exit handlers return 1 if the exit was handled fully and guest execution
  * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
@@ -3453,6 +3558,8 @@ static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu) = {
         [EXIT_REASON_EPT_VIOLATION]           = handle_ept_violation,
         [EXIT_REASON_EPT_MISCONFIG]           = handle_ept_misconfig,
         [EXIT_REASON_PAUSE_INSTRUCTION]       = handle_pause,
+        [EXIT_REASON_MWAIT_INSTRUCTION]       = handle_invalid_op,
+        [EXIT_REASON_MONITOR_INSTRUCTION]     = handle_invalid_op,
 };
 
 static const int kvm_vmx_max_exit_handlers =
@@ -3686,9 +3793,6 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu)
          */
         vmcs_writel(HOST_CR0, read_cr0());
 
-        if (vcpu->arch.switch_db_regs)
-                set_debugreg(vcpu->arch.dr6, 6);
-
         asm(
                 /* Store host registers */
                 "push %%"R"dx; push %%"R"bp;"
@@ -3789,9 +3893,6 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu)
                                   | (1 << VCPU_EXREG_PDPTR));
         vcpu->arch.regs_dirty = 0;
 
-        if (vcpu->arch.switch_db_regs)
-                get_debugreg(vcpu->arch.dr6, 6);
-
         vmx->idt_vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
         if (vmx->rmode.irq.pending)
                 fixup_rmode_irq(vmx);
@@ -3920,7 +4021,7 @@ static u64 vmx_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio)
          *   b. VT-d with snooping control feature: snooping control feature of
          *      VT-d engine can guarantee the cache correctness. Just set it
          *      to WB to keep consistent with host. So the same as item 3.
-         * 3. EPT without VT-d: always map as WB and set IGMT=1 to keep
+         * 3. EPT without VT-d: always map as WB and set IPAT=1 to keep
          *    consistent with host MTRR
          */
         if (is_mmio)
@@ -3931,37 +4032,88 @@ static u64 vmx_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio)
                       VMX_EPT_MT_EPTE_SHIFT;
         else
                 ret = (MTRR_TYPE_WRBACK << VMX_EPT_MT_EPTE_SHIFT)
-                        | VMX_EPT_IGMT_BIT;
+                        | VMX_EPT_IPAT_BIT;
 
         return ret;
 }
 
+#define _ER(x) { EXIT_REASON_##x, #x }
+
 static const struct trace_print_flags vmx_exit_reasons_str[] = {
-        { EXIT_REASON_EXCEPTION_NMI,           "exception" },
-        { EXIT_REASON_EXTERNAL_INTERRUPT,      "ext_irq" },
-        { EXIT_REASON_TRIPLE_FAULT,            "triple_fault" },
-        { EXIT_REASON_NMI_WINDOW,              "nmi_window" },
-        { EXIT_REASON_IO_INSTRUCTION,          "io_instruction" },
-        { EXIT_REASON_CR_ACCESS,               "cr_access" },
-        { EXIT_REASON_DR_ACCESS,               "dr_access" },
-        { EXIT_REASON_CPUID,                   "cpuid" },
-        { EXIT_REASON_MSR_READ,                "rdmsr" },
-        { EXIT_REASON_MSR_WRITE,               "wrmsr" },
-        { EXIT_REASON_PENDING_INTERRUPT,       "interrupt_window" },
-        { EXIT_REASON_HLT,                     "halt" },
-        { EXIT_REASON_INVLPG,                  "invlpg" },
-        { EXIT_REASON_VMCALL,                  "hypercall" },
-        { EXIT_REASON_TPR_BELOW_THRESHOLD,     "tpr_below_thres" },
-        { EXIT_REASON_APIC_ACCESS,             "apic_access" },
-        { EXIT_REASON_WBINVD,                  "wbinvd" },
-        { EXIT_REASON_TASK_SWITCH,             "task_switch" },
-        { EXIT_REASON_EPT_VIOLATION,           "ept_violation" },
+        _ER(EXCEPTION_NMI),
+        _ER(EXTERNAL_INTERRUPT),
+        _ER(TRIPLE_FAULT),
+        _ER(PENDING_INTERRUPT),
+        _ER(NMI_WINDOW),
+        _ER(TASK_SWITCH),
+        _ER(CPUID),
+        _ER(HLT),
+        _ER(INVLPG),
+        _ER(RDPMC),
+        _ER(RDTSC),
+        _ER(VMCALL),
+        _ER(VMCLEAR),
+        _ER(VMLAUNCH),
+        _ER(VMPTRLD),
+        _ER(VMPTRST),
+        _ER(VMREAD),
+        _ER(VMRESUME),
+        _ER(VMWRITE),
+        _ER(VMOFF),
+        _ER(VMON),
+        _ER(CR_ACCESS),
+        _ER(DR_ACCESS),
+        _ER(IO_INSTRUCTION),
+        _ER(MSR_READ),
+        _ER(MSR_WRITE),
+        _ER(MWAIT_INSTRUCTION),
+        _ER(MONITOR_INSTRUCTION),
+        _ER(PAUSE_INSTRUCTION),
+        _ER(MCE_DURING_VMENTRY),
+        _ER(TPR_BELOW_THRESHOLD),
+        _ER(APIC_ACCESS),
+        _ER(EPT_VIOLATION),
+        _ER(EPT_MISCONFIG),
+        _ER(WBINVD),
         { -1, NULL }
 };
 
-static bool vmx_gb_page_enable(void)
+#undef _ER
+
+static int vmx_get_lpage_level(void)
 {
-        return false;
+        if (enable_ept && !cpu_has_vmx_ept_1g_page())
+                return PT_DIRECTORY_LEVEL;
+        else
+                /* For shadow and EPT supported 1GB page */
+                return PT_PDPE_LEVEL;
+}
+
+static inline u32 bit(int bitno)
+{
+        return 1 << (bitno & 31);
+}
+
+static void vmx_cpuid_update(struct kvm_vcpu *vcpu)
+{
+        struct kvm_cpuid_entry2 *best;
+        struct vcpu_vmx *vmx = to_vmx(vcpu);
+        u32 exec_control;
+
+        vmx->rdtscp_enabled = false;
+        if (vmx_rdtscp_supported()) {
+                exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
+                if (exec_control & SECONDARY_EXEC_RDTSCP) {
+                        best = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
+                        if (best && (best->edx & bit(X86_FEATURE_RDTSCP)))
+                                vmx->rdtscp_enabled = true;
+                        else {
+                                exec_control &= ~SECONDARY_EXEC_RDTSCP;
+                                vmcs_write32(SECONDARY_VM_EXEC_CONTROL,
+                                                exec_control);
+                        }
+                }
+        }
 }
 
 static struct kvm_x86_ops vmx_x86_ops = {
@@ -3990,6 +4142,7 @@ static struct kvm_x86_ops vmx_x86_ops = {
         .set_segment = vmx_set_segment,
         .get_cpl = vmx_get_cpl,
         .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
+        .decache_cr0_guest_bits = vmx_decache_cr0_guest_bits,
         .decache_cr4_guest_bits = vmx_decache_cr4_guest_bits,
         .set_cr0 = vmx_set_cr0,
         .set_cr3 = vmx_set_cr3,
@@ -4002,6 +4155,8 @@ static struct kvm_x86_ops vmx_x86_ops = {
         .cache_reg = vmx_cache_reg,
         .get_rflags = vmx_get_rflags,
         .set_rflags = vmx_set_rflags,
+        .fpu_activate = vmx_fpu_activate,
+        .fpu_deactivate = vmx_fpu_deactivate,
 
         .tlb_flush = vmx_flush_tlb,
 
@@ -4027,7 +4182,11 @@ static struct kvm_x86_ops vmx_x86_ops = {
         .get_mt_mask = vmx_get_mt_mask,
 
         .exit_reasons_str = vmx_exit_reasons_str,
-        .gb_page_enable = vmx_gb_page_enable,
+        .get_lpage_level = vmx_get_lpage_level,
+
+        .cpuid_update = vmx_cpuid_update,
+
+        .rdtscp_supported = vmx_rdtscp_supported,
 };
 
 static int __init vmx_init(void)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index a1e1bc9d412..3c4ca98ad27 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -38,6 +38,8 @@
 #include <linux/intel-iommu.h>
 #include <linux/cpufreq.h>
 #include <linux/user-return-notifier.h>
+#include <linux/srcu.h>
+#include <linux/slab.h>
 #include <trace/events/kvm.h>
 #undef TRACE_INCLUDE_FILE
 #define CREATE_TRACE_POINTS
@@ -93,16 +95,16 @@ module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
 
 struct kvm_shared_msrs_global {
         int nr;
-        struct kvm_shared_msr {
-                u32 msr;
-                u64 value;
-        } msrs[KVM_NR_SHARED_MSRS];
+        u32 msrs[KVM_NR_SHARED_MSRS];
 };
 
 struct kvm_shared_msrs {
         struct user_return_notifier urn;
         bool registered;
-        u64 current_value[KVM_NR_SHARED_MSRS];
+        struct kvm_shared_msr_values {
+                u64 host;
+                u64 curr;
+        } values[KVM_NR_SHARED_MSRS];
 };
 
 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
@@ -147,53 +149,64 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
 static void kvm_on_user_return(struct user_return_notifier *urn)
 {
         unsigned slot;
-        struct kvm_shared_msr *global;
         struct kvm_shared_msrs *locals
                 = container_of(urn, struct kvm_shared_msrs, urn);
+        struct kvm_shared_msr_values *values;
 
         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
-                global = &shared_msrs_global.msrs[slot];
-                if (global->value != locals->current_value[slot]) {
-                        wrmsrl(global->msr, global->value);
-                        locals->current_value[slot] = global->value;
+                values = &locals->values[slot];
+                if (values->host != values->curr) {
+                        wrmsrl(shared_msrs_global.msrs[slot], values->host);
+                        values->curr = values->host;
                 }
         }
         locals->registered = false;
         user_return_notifier_unregister(urn);
 }
 
-void kvm_define_shared_msr(unsigned slot, u32 msr)
+static void shared_msr_update(unsigned slot, u32 msr)
 {
-        int cpu;
+        struct kvm_shared_msrs *smsr;
         u64 value;
 
+        smsr = &__get_cpu_var(shared_msrs);
+        /* only read, and nobody should modify it at this time,
+         * so don't need lock */
+        if (slot >= shared_msrs_global.nr) {
+                printk(KERN_ERR "kvm: invalid MSR slot!");
+                return;
+        }
+        rdmsrl_safe(msr, &value);
+        smsr->values[slot].host = value;
+        smsr->values[slot].curr = value;
+}
+
+void kvm_define_shared_msr(unsigned slot, u32 msr)
+{
         if (slot >= shared_msrs_global.nr)
                 shared_msrs_global.nr = slot + 1;
-        shared_msrs_global.msrs[slot].msr = msr;
-        rdmsrl_safe(msr, &value);
-        shared_msrs_global.msrs[slot].value = value;
-        for_each_online_cpu(cpu)
-                per_cpu(shared_msrs, cpu).current_value[slot] = value;
+        shared_msrs_global.msrs[slot] = msr;
+        /* we need ensured the shared_msr_global have been updated */
+        smp_wmb();
 }
 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 
 static void kvm_shared_msr_cpu_online(void)
 {
         unsigned i;
-        struct kvm_shared_msrs *locals = &__get_cpu_var(shared_msrs);
 
         for (i = 0; i < shared_msrs_global.nr; ++i)
-                locals->current_value[i] = shared_msrs_global.msrs[i].value;
+                shared_msr_update(i, shared_msrs_global.msrs[i]);
 }
 
 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 {
         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 
-        if (((value ^ smsr->current_value[slot]) & mask) == 0)
+        if (((value ^ smsr->values[slot].curr) & mask) == 0)
                 return;
-        smsr->current_value[slot] = value;
-        wrmsrl(shared_msrs_global.msrs[slot].msr, value);
+        smsr->values[slot].curr = value;
+        wrmsrl(shared_msrs_global.msrs[slot], value);
         if (!smsr->registered) {
                 smsr->urn.on_user_return = kvm_on_user_return;
                 user_return_notifier_register(&smsr->urn);
@@ -257,12 +270,68 @@ void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 }
 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 
+#define EXCPT_BENIGN            0
+#define EXCPT_CONTRIBUTORY      1
+#define EXCPT_PF                2
+
+static int exception_class(int vector)
+{
+        switch (vector) {
+        case PF_VECTOR:
+                return EXCPT_PF;
+        case DE_VECTOR:
+        case TS_VECTOR:
+        case NP_VECTOR:
+        case SS_VECTOR:
+        case GP_VECTOR:
+                return EXCPT_CONTRIBUTORY;
+        default:
+                break;
+        }
+        return EXCPT_BENIGN;
+}
+
+static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
+                unsigned nr, bool has_error, u32 error_code)
+{
+        u32 prev_nr;
+        int class1, class2;
+
+        if (!vcpu->arch.exception.pending) {
+        queue:
+                vcpu->arch.exception.pending = true;
+                vcpu->arch.exception.has_error_code = has_error;
+                vcpu->arch.exception.nr = nr;
+                vcpu->arch.exception.error_code = error_code;
+                return;
+        }
+
+        /* to check exception */
+        prev_nr = vcpu->arch.exception.nr;
+        if (prev_nr == DF_VECTOR) {
+                /* triple fault -> shutdown */
+                set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
+                return;
+        }
+        class1 = exception_class(prev_nr);
+        class2 = exception_class(nr);
+        if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
+                || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
+                /* generate double fault per SDM Table 5-5 */
+                vcpu->arch.exception.pending = true;
+                vcpu->arch.exception.has_error_code = true;
+                vcpu->arch.exception.nr = DF_VECTOR;
+                vcpu->arch.exception.error_code = 0;
+        } else
+                /* replace previous exception with a new one in a hope
+                   that instruction re-execution will regenerate lost
+                   exception */
+                goto queue;
+}
+
 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 {
-        WARN_ON(vcpu->arch.exception.pending);
-        vcpu->arch.exception.pending = true;
-        vcpu->arch.exception.has_error_code = false;
-        vcpu->arch.exception.nr = nr;
+        kvm_multiple_exception(vcpu, nr, false, 0);
 }
 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 
@@ -270,25 +339,6 @@ void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
                            u32 error_code)
 {
         ++vcpu->stat.pf_guest;
-
-        if (vcpu->arch.exception.pending) {
-                switch(vcpu->arch.exception.nr) {
-                case DF_VECTOR:
-                        /* triple fault -> shutdown */
-                        set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
-                        return;
-                case PF_VECTOR:
-                        vcpu->arch.exception.nr = DF_VECTOR;
-                        vcpu->arch.exception.error_code = 0;
-                        return;
-                default:
-                        /* replace previous exception with a new one in a hope
-                           that instruction re-execution will regenerate lost
-                           exception */
-                        vcpu->arch.exception.pending = false;
-                        break;
-                }
-        }
         vcpu->arch.cr2 = addr;
         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
 }
@@ -301,11 +351,7 @@ EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 
 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 {
-        WARN_ON(vcpu->arch.exception.pending);
-        vcpu->arch.exception.pending = true;
-        vcpu->arch.exception.has_error_code = true;
-        vcpu->arch.exception.nr = nr;
-        vcpu->arch.exception.error_code = error_code;
+        kvm_multiple_exception(vcpu, nr, true, error_code);
 }
 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 
@@ -383,41 +429,38 @@ out:
 
 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 {
-        if (cr0 & CR0_RESERVED_BITS) {
-                printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
-                       cr0, vcpu->arch.cr0);
+        cr0 |= X86_CR0_ET;
+
+#ifdef CONFIG_X86_64
+        if (cr0 & 0xffffffff00000000UL) {
                 kvm_inject_gp(vcpu, 0);
                 return;
         }
+#endif
+
+        cr0 &= ~CR0_RESERVED_BITS;
 
         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
-                printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
                 kvm_inject_gp(vcpu, 0);
                 return;
         }
 
         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
-                printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
-                       "and a clear PE flag\n");
                 kvm_inject_gp(vcpu, 0);
                 return;
         }
 
         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 #ifdef CONFIG_X86_64
-                if ((vcpu->arch.shadow_efer & EFER_LME)) {
+                if ((vcpu->arch.efer & EFER_LME)) {
                         int cs_db, cs_l;
 
                         if (!is_pae(vcpu)) {
-                                printk(KERN_DEBUG "set_cr0: #GP, start paging "
-                                       "in long mode while PAE is disabled\n");
                                 kvm_inject_gp(vcpu, 0);
                                 return;
                         }
                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
                         if (cs_l) {
-                                printk(KERN_DEBUG "set_cr0: #GP, start paging "
-                                       "in long mode while CS.L == 1\n");
                                 kvm_inject_gp(vcpu, 0);
                                 return;
 
@@ -425,8 +468,6 @@ void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
                 } else
 #endif
                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
-                        printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
-                               "reserved bits\n");
                         kvm_inject_gp(vcpu, 0);
                         return;
                 }
@@ -443,38 +484,33 @@ EXPORT_SYMBOL_GPL(kvm_set_cr0);
 
 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 {
-        kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
+        kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0ful) | (msw & 0x0f));
 }
 EXPORT_SYMBOL_GPL(kvm_lmsw);
 
 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 {
-        unsigned long old_cr4 = vcpu->arch.cr4;
+        unsigned long old_cr4 = kvm_read_cr4(vcpu);
         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 
         if (cr4 & CR4_RESERVED_BITS) {
-                printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
                 kvm_inject_gp(vcpu, 0);
                 return;
         }
 
         if (is_long_mode(vcpu)) {
                 if (!(cr4 & X86_CR4_PAE)) {
-                        printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
-                               "in long mode\n");
                         kvm_inject_gp(vcpu, 0);
                         return;
                 }
         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
                    && ((cr4 ^ old_cr4) & pdptr_bits)
                    && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
-                printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
                 kvm_inject_gp(vcpu, 0);
                 return;
         }
 
         if (cr4 & X86_CR4_VMXE) {
-                printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
                 kvm_inject_gp(vcpu, 0);
                 return;
         }
@@ -495,21 +531,16 @@ void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 
         if (is_long_mode(vcpu)) {
                 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
-                        printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
                         kvm_inject_gp(vcpu, 0);
                         return;
                 }
         } else {
                 if (is_pae(vcpu)) {
                         if (cr3 & CR3_PAE_RESERVED_BITS) {
-                                printk(KERN_DEBUG
-                                       "set_cr3: #GP, reserved bits\n");
                                 kvm_inject_gp(vcpu, 0);
                                 return;
                         }
                         if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
-                                printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
-                                       "reserved bits\n");
                                 kvm_inject_gp(vcpu, 0);
                                 return;
                         }
@@ -541,7 +572,6 @@ EXPORT_SYMBOL_GPL(kvm_set_cr3);
 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 {
         if (cr8 & CR8_RESERVED_BITS) {
-                printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
                 kvm_inject_gp(vcpu, 0);
                 return;
         }
@@ -575,9 +605,11 @@ static inline u32 bit(int bitno)
  * kvm-specific. Those are put in the beginning of the list.
  */
 
-#define KVM_SAVE_MSRS_BEGIN     2
+#define KVM_SAVE_MSRS_BEGIN     5
 static u32 msrs_to_save[] = {
         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
+        HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
+        HV_X64_MSR_APIC_ASSIST_PAGE,
         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
         MSR_K6_STAR,
 #ifdef CONFIG_X86_64
@@ -595,15 +627,12 @@ static u32 emulated_msrs[] = {
 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
 {
         if (efer & efer_reserved_bits) {
-                printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
-                       efer);
                 kvm_inject_gp(vcpu, 0);
                 return;
         }
 
         if (is_paging(vcpu)
-            && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
-                printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
+            && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME)) {
                 kvm_inject_gp(vcpu, 0);
                 return;
         }
@@ -613,7 +642,6 @@ static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
 
                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
-                        printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
                         kvm_inject_gp(vcpu, 0);
                         return;
                 }
@@ -624,7 +652,6 @@ static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
 
                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
-                        printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
                         kvm_inject_gp(vcpu, 0);
                         return;
                 }
@@ -633,9 +660,9 @@ static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
         kvm_x86_ops->set_efer(vcpu, efer);
 
         efer &= ~EFER_LMA;
-        efer |= vcpu->arch.shadow_efer & EFER_LMA;
+        efer |= vcpu->arch.efer & EFER_LMA;
 
-        vcpu->arch.shadow_efer = efer;
+        vcpu->arch.efer = efer;
 
         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
         kvm_mmu_reset_context(vcpu);
@@ -913,9 +940,13 @@ static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
                 if (msr >= MSR_IA32_MC0_CTL &&
                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
                         u32 offset = msr - MSR_IA32_MC0_CTL;
-                        /* only 0 or all 1s can be written to IA32_MCi_CTL */
+                        /* only 0 or all 1s can be written to IA32_MCi_CTL
+                         * some Linux kernels though clear bit 10 in bank 4 to
+                         * workaround a BIOS/GART TBL issue on AMD K8s, ignore
+                         * this to avoid an uncatched #GP in the guest
+                         */
                         if ((offset & 0x3) == 0 &&
-                            data != 0 && data != ~(u64)0)
+                            data != 0 && (data | (1 << 10)) != ~(u64)0)
                                 return -1;
                         vcpu->arch.mce_banks[offset] = data;
                         break;
@@ -957,6 +988,100 @@ out:
         return r;
 }
 
+static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
+{
+        return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
+}
+
+static bool kvm_hv_msr_partition_wide(u32 msr)
+{
+        bool r = false;
+        switch (msr) {
+        case HV_X64_MSR_GUEST_OS_ID:
+        case HV_X64_MSR_HYPERCALL:
+                r = true;
+                break;
+        }
+
+        return r;
+}
+
+static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
+{
+        struct kvm *kvm = vcpu->kvm;
+
+        switch (msr) {
+        case HV_X64_MSR_GUEST_OS_ID:
+                kvm->arch.hv_guest_os_id = data;
+                /* setting guest os id to zero disables hypercall page */
+                if (!kvm->arch.hv_guest_os_id)
+                        kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
+                break;
+        case HV_X64_MSR_HYPERCALL: {
+                u64 gfn;
+                unsigned long addr;
+                u8 instructions[4];
+
+                /* if guest os id is not set hypercall should remain disabled */
+                if (!kvm->arch.hv_guest_os_id)
+                        break;
+                if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
+                        kvm->arch.hv_hypercall = data;
+                        break;
+                }
+                gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
+                addr = gfn_to_hva(kvm, gfn);
+                if (kvm_is_error_hva(addr))
+                        return 1;
+                kvm_x86_ops->patch_hypercall(vcpu, instructions);
+                ((unsigned char *)instructions)[3] = 0xc3; /* ret */
+                if (copy_to_user((void __user *)addr, instructions, 4))
+                        return 1;
+                kvm->arch.hv_hypercall = data;
+                break;
+        }
+        default:
+                pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
+                          "data 0x%llx\n", msr, data);
+                return 1;
+        }
+        return 0;
+}
+
+static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
+{
+        switch (msr) {
+        case HV_X64_MSR_APIC_ASSIST_PAGE: {
+                unsigned long addr;
+
+                if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
+                        vcpu->arch.hv_vapic = data;
+                        break;
+                }
+                addr = gfn_to_hva(vcpu->kvm, data >>
+                                  HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
+                if (kvm_is_error_hva(addr))
+                        return 1;
+                if (clear_user((void __user *)addr, PAGE_SIZE))
+                        return 1;
+                vcpu->arch.hv_vapic = data;
+                break;
+        }
+        case HV_X64_MSR_EOI:
+                return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
+        case HV_X64_MSR_ICR:
+                return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
+        case HV_X64_MSR_TPR:
+                return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
+        default:
+                pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
+                          "data 0x%llx\n", msr, data);
+                return 1;
+        }
+
+        return 0;
+}
+
 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 {
         switch (msr) {
@@ -1071,6 +1196,16 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
                         "0x%x data 0x%llx\n", msr, data);
                 break;
+        case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
+                if (kvm_hv_msr_partition_wide(msr)) {
+                        int r;
+                        mutex_lock(&vcpu->kvm->lock);
+                        r = set_msr_hyperv_pw(vcpu, msr, data);
+                        mutex_unlock(&vcpu->kvm->lock);
+                        return r;
+                } else
+                        return set_msr_hyperv(vcpu, msr, data);
+                break;
         default:
                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
                         return xen_hvm_config(vcpu, data);
@@ -1170,6 +1305,54 @@ static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
         return 0;
 }
 
+static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
+{
+        u64 data = 0;
+        struct kvm *kvm = vcpu->kvm;
+
+        switch (msr) {
+        case HV_X64_MSR_GUEST_OS_ID:
+                data = kvm->arch.hv_guest_os_id;
+                break;
+        case HV_X64_MSR_HYPERCALL:
+                data = kvm->arch.hv_hypercall;
+                break;
+        default:
+                pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
+                return 1;
+        }
+
+        *pdata = data;
+        return 0;
+}
+
+static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
+{
+        u64 data = 0;
+
+        switch (msr) {
+        case HV_X64_MSR_VP_INDEX: {
+                int r;
+                struct kvm_vcpu *v;
+                kvm_for_each_vcpu(r, v, vcpu->kvm)
+                        if (v == vcpu)
+                                data = r;
+                break;
+        }
+        case HV_X64_MSR_EOI:
+                return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
+        case HV_X64_MSR_ICR:
+                return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
+        case HV_X64_MSR_TPR:
+                return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
+        default:
+                pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
+                return 1;
+        }
+        *pdata = data;
+        return 0;
+}
+
 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
 {
         u64 data;
@@ -1221,7 +1404,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
                 data |= (((uint64_t)4ULL) << 40);
                 break;
         case MSR_EFER:
-                data = vcpu->arch.shadow_efer;
+                data = vcpu->arch.efer;
                 break;
         case MSR_KVM_WALL_CLOCK:
                 data = vcpu->kvm->arch.wall_clock;
@@ -1236,6 +1419,16 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
         case MSR_IA32_MCG_STATUS:
         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
                 return get_msr_mce(vcpu, msr, pdata);
+        case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
+                if (kvm_hv_msr_partition_wide(msr)) {
+                        int r;
+                        mutex_lock(&vcpu->kvm->lock);
+                        r = get_msr_hyperv_pw(vcpu, msr, pdata);
+                        mutex_unlock(&vcpu->kvm->lock);
+                        return r;
+                } else
+                        return get_msr_hyperv(vcpu, msr, pdata);
+                break;
         default:
                 if (!ignore_msrs) {
                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
@@ -1261,15 +1454,15 @@ static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
                     int (*do_msr)(struct kvm_vcpu *vcpu,
                                   unsigned index, u64 *data))
 {
-        int i;
+        int i, idx;
 
         vcpu_load(vcpu);
 
-        down_read(&vcpu->kvm->slots_lock);
+        idx = srcu_read_lock(&vcpu->kvm->srcu);
         for (i = 0; i < msrs->nmsrs; ++i)
                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
                         break;
-        up_read(&vcpu->kvm->slots_lock);
+        srcu_read_unlock(&vcpu->kvm->srcu, idx);
 
         vcpu_put(vcpu);
 
@@ -1351,6 +1544,11 @@ int kvm_dev_ioctl_check_extension(long ext)
         case KVM_CAP_XEN_HVM:
         case KVM_CAP_ADJUST_CLOCK:
         case KVM_CAP_VCPU_EVENTS:
+        case KVM_CAP_HYPERV:
+        case KVM_CAP_HYPERV_VAPIC:
+        case KVM_CAP_HYPERV_SPIN:
+        case KVM_CAP_PCI_SEGMENT:
+        case KVM_CAP_X86_ROBUST_SINGLESTEP:
                 r = 1;
                 break;
         case KVM_CAP_COALESCED_MMIO:
@@ -1464,8 +1662,8 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 
 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
 {
-        kvm_x86_ops->vcpu_put(vcpu);
         kvm_put_guest_fpu(vcpu);
+        kvm_x86_ops->vcpu_put(vcpu);
 }
 
 static int is_efer_nx(void)
@@ -1530,6 +1728,7 @@ static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
         cpuid_fix_nx_cap(vcpu);
         r = 0;
         kvm_apic_set_version(vcpu);
+        kvm_x86_ops->cpuid_update(vcpu);
 
 out_free:
         vfree(cpuid_entries);
@@ -1552,6 +1751,7 @@ static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
                 goto out;
         vcpu->arch.cpuid_nent = cpuid->nent;
         kvm_apic_set_version(vcpu);
+        kvm_x86_ops->cpuid_update(vcpu);
         return 0;
 
 out:
@@ -1594,12 +1794,15 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
                          u32 index, int *nent, int maxnent)
 {
         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
-        unsigned f_gbpages = kvm_x86_ops->gb_page_enable() ? F(GBPAGES) : 0;
 #ifdef CONFIG_X86_64
+        unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
+                                ? F(GBPAGES) : 0;
         unsigned f_lm = F(LM);
 #else
+        unsigned f_gbpages = 0;
         unsigned f_lm = 0;
 #endif
+        unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
 
         /* cpuid 1.edx */
         const u32 kvm_supported_word0_x86_features =
@@ -1619,7 +1822,7 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
-                F(FXSR) | F(FXSR_OPT) | f_gbpages | 0 /* RDTSCP */ |
+                F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
         /* cpuid 1.ecx */
         const u32 kvm_supported_word4_x86_features =
@@ -1866,7 +2069,7 @@ static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
                 return 0;
         if (mce->status & MCI_STATUS_UC) {
                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
-                    !(vcpu->arch.cr4 & X86_CR4_MCE)) {
+                    !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
                         printk(KERN_DEBUG "kvm: set_mce: "
                                "injects mce exception while "
                                "previous one is in progress!\n");
@@ -2160,14 +2363,14 @@ static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
                 return -EINVAL;
 
-        down_write(&kvm->slots_lock);
+        mutex_lock(&kvm->slots_lock);
         spin_lock(&kvm->mmu_lock);
 
         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
 
         spin_unlock(&kvm->mmu_lock);
-        up_write(&kvm->slots_lock);
+        mutex_unlock(&kvm->slots_lock);
         return 0;
 }
 
@@ -2176,13 +2379,35 @@ static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
         return kvm->arch.n_alloc_mmu_pages;
 }
 
+gfn_t unalias_gfn_instantiation(struct kvm *kvm, gfn_t gfn)
+{
+        int i;
+        struct kvm_mem_alias *alias;
+        struct kvm_mem_aliases *aliases;
+
+        aliases = rcu_dereference(kvm->arch.aliases);
+
+        for (i = 0; i < aliases->naliases; ++i) {
+                alias = &aliases->aliases[i];
+                if (alias->flags & KVM_ALIAS_INVALID)
+                        continue;
+                if (gfn >= alias->base_gfn
+                    && gfn < alias->base_gfn + alias->npages)
+                        return alias->target_gfn + gfn - alias->base_gfn;
+        }
+        return gfn;
+}
+
 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
 {
         int i;
         struct kvm_mem_alias *alias;
+        struct kvm_mem_aliases *aliases;
 
-        for (i = 0; i < kvm->arch.naliases; ++i) {
-                alias = &kvm->arch.aliases[i];
+        aliases = rcu_dereference(kvm->arch.aliases);
+
+        for (i = 0; i < aliases->naliases; ++i) {
+                alias = &aliases->aliases[i];
                 if (gfn >= alias->base_gfn
                     && gfn < alias->base_gfn + alias->npages)
                         return alias->target_gfn + gfn - alias->base_gfn;
@@ -2200,6 +2425,7 @@ static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
 {
         int r, n;
         struct kvm_mem_alias *p;
+        struct kvm_mem_aliases *aliases, *old_aliases;
 
         r = -EINVAL;
         /* General sanity checks */
@@ -2216,26 +2442,48 @@ static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
             < alias->target_phys_addr)
                 goto out;
 
-        down_write(&kvm->slots_lock);
-        spin_lock(&kvm->mmu_lock);
+        r = -ENOMEM;
+        aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
+        if (!aliases)
+                goto out;
+
+        mutex_lock(&kvm->slots_lock);
 
-        p = &kvm->arch.aliases[alias->slot];
+        /* invalidate any gfn reference in case of deletion/shrinking */
+        memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
+        aliases->aliases[alias->slot].flags |= KVM_ALIAS_INVALID;
+        old_aliases = kvm->arch.aliases;
+        rcu_assign_pointer(kvm->arch.aliases, aliases);
+        synchronize_srcu_expedited(&kvm->srcu);
+        kvm_mmu_zap_all(kvm);
+        kfree(old_aliases);
+
+        r = -ENOMEM;
+        aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
+        if (!aliases)
+                goto out_unlock;
+
+        memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
+
+        p = &aliases->aliases[alias->slot];
         p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
         p->npages = alias->memory_size >> PAGE_SHIFT;
         p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
+        p->flags &= ~(KVM_ALIAS_INVALID);
 
         for (n = KVM_ALIAS_SLOTS; n > 0; --n)
-                if (kvm->arch.aliases[n - 1].npages)
+                if (aliases->aliases[n - 1].npages)
                         break;
-        kvm->arch.naliases = n;
+        aliases->naliases = n;
 
-        spin_unlock(&kvm->mmu_lock);
-        kvm_mmu_zap_all(kvm);
-
-        up_write(&kvm->slots_lock);
-
-        return 0;
+        old_aliases = kvm->arch.aliases;
+        rcu_assign_pointer(kvm->arch.aliases, aliases);
+        synchronize_srcu_expedited(&kvm->srcu);
+        kfree(old_aliases);
+        r = 0;
 
+out_unlock:
+        mutex_unlock(&kvm->slots_lock);
 out:
         return r;
 }
@@ -2273,18 +2521,18 @@ static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
         r = 0;
         switch (chip->chip_id) {
         case KVM_IRQCHIP_PIC_MASTER:
-                spin_lock(&pic_irqchip(kvm)->lock);
+                raw_spin_lock(&pic_irqchip(kvm)->lock);
                 memcpy(&pic_irqchip(kvm)->pics[0],
                         &chip->chip.pic,
                         sizeof(struct kvm_pic_state));
-                spin_unlock(&pic_irqchip(kvm)->lock);
+                raw_spin_unlock(&pic_irqchip(kvm)->lock);
                 break;
         case KVM_IRQCHIP_PIC_SLAVE:
-                spin_lock(&pic_irqchip(kvm)->lock);
+                raw_spin_lock(&pic_irqchip(kvm)->lock);
                 memcpy(&pic_irqchip(kvm)->pics[1],
                         &chip->chip.pic,
                         sizeof(struct kvm_pic_state));
-                spin_unlock(&pic_irqchip(kvm)->lock);
+                raw_spin_unlock(&pic_irqchip(kvm)->lock);
                 break;
         case KVM_IRQCHIP_IOAPIC:
                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
@@ -2364,29 +2612,63 @@ static int kvm_vm_ioctl_reinject(struct kvm *kvm,
 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
                                       struct kvm_dirty_log *log)
 {
-        int r;
-        int n;
+        int r, i;
         struct kvm_memory_slot *memslot;
-        int is_dirty = 0;
+        unsigned long n;
+        unsigned long is_dirty = 0;
+        unsigned long *dirty_bitmap = NULL;
 
-        down_write(&kvm->slots_lock);
+        mutex_lock(&kvm->slots_lock);
 
-        r = kvm_get_dirty_log(kvm, log, &is_dirty);
-        if (r)
+        r = -EINVAL;
+        if (log->slot >= KVM_MEMORY_SLOTS)
+                goto out;
+
+        memslot = &kvm->memslots->memslots[log->slot];
+        r = -ENOENT;
+        if (!memslot->dirty_bitmap)
+                goto out;
+
+        n = kvm_dirty_bitmap_bytes(memslot);
+
+        r = -ENOMEM;
+        dirty_bitmap = vmalloc(n);
+        if (!dirty_bitmap)
                 goto out;
+        memset(dirty_bitmap, 0, n);
+
+        for (i = 0; !is_dirty && i < n/sizeof(long); i++)
+                is_dirty = memslot->dirty_bitmap[i];
 
         /* If nothing is dirty, don't bother messing with page tables. */
         if (is_dirty) {
+                struct kvm_memslots *slots, *old_slots;
+
                 spin_lock(&kvm->mmu_lock);
                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
                 spin_unlock(&kvm->mmu_lock);
-                memslot = &kvm->memslots[log->slot];
-                n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
-                memset(memslot->dirty_bitmap, 0, n);
+
+                slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
+                if (!slots)
+                        goto out_free;
+
+                memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
+                slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
+
+                old_slots = kvm->memslots;
+                rcu_assign_pointer(kvm->memslots, slots);
+                synchronize_srcu_expedited(&kvm->srcu);
+                dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
+                kfree(old_slots);
         }
+
         r = 0;
+        if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
+                r = -EFAULT;
+out_free:
+        vfree(dirty_bitmap);
 out:
-        up_write(&kvm->slots_lock);
+        mutex_unlock(&kvm->slots_lock);
         return r;
 }
 
@@ -2469,6 +2751,8 @@ long kvm_arch_vm_ioctl(struct file *filp,
                 if (vpic) {
                         r = kvm_ioapic_init(kvm);
                         if (r) {
+                                kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
+                                                          &vpic->dev);
                                 kfree(vpic);
                                 goto create_irqchip_unlock;
                         }
@@ -2480,10 +2764,8 @@ long kvm_arch_vm_ioctl(struct file *filp,
                 r = kvm_setup_default_irq_routing(kvm);
                 if (r) {
                         mutex_lock(&kvm->irq_lock);
-                        kfree(kvm->arch.vpic);
-                        kfree(kvm->arch.vioapic);
-                        kvm->arch.vpic = NULL;
-                        kvm->arch.vioapic = NULL;
+                        kvm_ioapic_destroy(kvm);
+                        kvm_destroy_pic(kvm);
                         mutex_unlock(&kvm->irq_lock);
                 }
         create_irqchip_unlock:
@@ -2499,7 +2781,7 @@ long kvm_arch_vm_ioctl(struct file *filp,
                                    sizeof(struct kvm_pit_config)))
                         goto out;
         create_pit:
-                down_write(&kvm->slots_lock);
+                mutex_lock(&kvm->slots_lock);
                 r = -EEXIST;
                 if (kvm->arch.vpit)
                         goto create_pit_unlock;
@@ -2508,7 +2790,7 @@ long kvm_arch_vm_ioctl(struct file *filp,
                 if (kvm->arch.vpit)
                         r = 0;
         create_pit_unlock:
-                up_write(&kvm->slots_lock);
+                mutex_unlock(&kvm->slots_lock);
                 break;
         case KVM_IRQ_LINE_STATUS:
         case KVM_IRQ_LINE: {
@@ -2725,7 +3007,7 @@ static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
                 return 0;
 
-        return kvm_io_bus_write(&vcpu->kvm->mmio_bus, addr, len, v);
+        return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
 }
 
 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
@@ -2734,17 +3016,44 @@ static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
                 return 0;
 
-        return kvm_io_bus_read(&vcpu->kvm->mmio_bus, addr, len, v);
+        return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
 }
 
-static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
-                               struct kvm_vcpu *vcpu)
+gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
+{
+        u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
+        return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
+}
+
+ gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
+{
+        u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
+        access |= PFERR_FETCH_MASK;
+        return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
+}
+
+gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
+{
+        u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
+        access |= PFERR_WRITE_MASK;
+        return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
+}
+
+/* uses this to access any guest's mapped memory without checking CPL */
+gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
+{
+        return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, 0, error);
+}
+
+static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
+                                      struct kvm_vcpu *vcpu, u32 access,
+                                      u32 *error)
 {
         void *data = val;
         int r = X86EMUL_CONTINUE;
 
         while (bytes) {
-                gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
+                gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr, access, error);
                 unsigned offset = addr & (PAGE_SIZE-1);
                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
                 int ret;
@@ -2767,14 +3076,37 @@ out:
         return r;
 }
 
+/* used for instruction fetching */
+static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
+                                struct kvm_vcpu *vcpu, u32 *error)
+{
+        u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
+        return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
+                                          access | PFERR_FETCH_MASK, error);
+}
+
+static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
+                               struct kvm_vcpu *vcpu, u32 *error)
+{
+        u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
+        return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
+                                          error);
+}
+
+static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
+                               struct kvm_vcpu *vcpu, u32 *error)
+{
+        return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
+}
+
 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
-                                struct kvm_vcpu *vcpu)
+                                struct kvm_vcpu *vcpu, u32 *error)
 {
         void *data = val;
         int r = X86EMUL_CONTINUE;
 
         while (bytes) {
-                gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
+                gpa_t gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error);
                 unsigned offset = addr & (PAGE_SIZE-1);
                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
                 int ret;
@@ -2804,6 +3136,7 @@ static int emulator_read_emulated(unsigned long addr,
                                   struct kvm_vcpu *vcpu)
 {
         gpa_t                 gpa;
+        u32 error_code;
 
         if (vcpu->mmio_read_completed) {
                 memcpy(val, vcpu->mmio_data, bytes);
@@ -2813,17 +3146,20 @@ static int emulator_read_emulated(unsigned long addr,
                 return X86EMUL_CONTINUE;
         }
 
-        gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
+        gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, &error_code);
+
+        if (gpa == UNMAPPED_GVA) {
+                kvm_inject_page_fault(vcpu, addr, error_code);
+                return X86EMUL_PROPAGATE_FAULT;
+        }
 
         /* For APIC access vmexit */
         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
                 goto mmio;
 
-        if (kvm_read_guest_virt(addr, val, bytes, vcpu)
+        if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
                                 == X86EMUL_CONTINUE)
                 return X86EMUL_CONTINUE;
-        if (gpa == UNMAPPED_GVA)
-                return X86EMUL_PROPAGATE_FAULT;
 
 mmio:
         /*
@@ -2862,11 +3198,12 @@ static int emulator_write_emulated_onepage(unsigned long addr,
                                            struct kvm_vcpu *vcpu)
 {
         gpa_t                 gpa;
+        u32 error_code;
 
-        gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
+        gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, &error_code);
 
         if (gpa == UNMAPPED_GVA) {
-                kvm_inject_page_fault(vcpu, addr, 2);
+                kvm_inject_page_fault(vcpu, addr, error_code);
                 return X86EMUL_PROPAGATE_FAULT;
         }
 
@@ -2930,7 +3267,7 @@ static int emulator_cmpxchg_emulated(unsigned long addr,
                 char *kaddr;
                 u64 val;
 
-                gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
+                gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
 
                 if (gpa == UNMAPPED_GVA ||
                    (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
@@ -2967,35 +3304,21 @@ int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
 
 int emulate_clts(struct kvm_vcpu *vcpu)
 {
-        kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
+        kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
+        kvm_x86_ops->fpu_activate(vcpu);
         return X86EMUL_CONTINUE;
 }
 
 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
 {
-        struct kvm_vcpu *vcpu = ctxt->vcpu;
-
-        switch (dr) {
-        case 0 ... 3:
-                *dest = kvm_x86_ops->get_dr(vcpu, dr);
-                return X86EMUL_CONTINUE;
-        default:
-                pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
-                return X86EMUL_UNHANDLEABLE;
-        }
+        return kvm_x86_ops->get_dr(ctxt->vcpu, dr, dest);
 }
 
 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
 {
         unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
-        int exception;
 
-        kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
-        if (exception) {
-                /* FIXME: better handling */
-                return X86EMUL_UNHANDLEABLE;
-        }
-        return X86EMUL_CONTINUE;
+        return kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask);
 }
 
 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
@@ -3009,7 +3332,7 @@ void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
 
         rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
 
-        kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
+        kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu, NULL);
 
         printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
                context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
@@ -3017,7 +3340,8 @@ void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
 
 static struct x86_emulate_ops emulate_ops = {
-        .read_std            = kvm_read_guest_virt,
+        .read_std            = kvm_read_guest_virt_system,
+        .fetch               = kvm_fetch_guest_virt,
         .read_emulated       = emulator_read_emulated,
         .write_emulated      = emulator_write_emulated,
         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
@@ -3060,8 +3384,9 @@ int emulate_instruction(struct kvm_vcpu *vcpu,
                 vcpu->arch.emulate_ctxt.vcpu = vcpu;
                 vcpu->arch.emulate_ctxt.eflags = kvm_get_rflags(vcpu);
                 vcpu->arch.emulate_ctxt.mode =
+                        (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
                         (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
-                        ? X86EMUL_MODE_REAL : cs_l
+                        ? X86EMUL_MODE_VM86 : cs_l
                         ? X86EMUL_MODE_PROT64 : cs_db
                         ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
 
@@ -3153,12 +3478,17 @@ static int pio_copy_data(struct kvm_vcpu *vcpu)
         gva_t q = vcpu->arch.pio.guest_gva;
         unsigned bytes;
         int ret;
+        u32 error_code;
 
         bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
         if (vcpu->arch.pio.in)
-                ret = kvm_write_guest_virt(q, p, bytes, vcpu);
+                ret = kvm_write_guest_virt(q, p, bytes, vcpu, &error_code);
         else
-                ret = kvm_read_guest_virt(q, p, bytes, vcpu);
+                ret = kvm_read_guest_virt(q, p, bytes, vcpu, &error_code);
+
+        if (ret == X86EMUL_PROPAGATE_FAULT)
+                kvm_inject_page_fault(vcpu, q, error_code);
+
         return ret;
 }
 
@@ -3179,7 +3509,7 @@ int complete_pio(struct kvm_vcpu *vcpu)
                 if (io->in) {
                         r = pio_copy_data(vcpu);
                         if (r)
-                                return r;
+                                goto out;
                 }
 
                 delta = 1;
@@ -3206,7 +3536,7 @@ int complete_pio(struct kvm_vcpu *vcpu)
                         kvm_register_write(vcpu, VCPU_REGS_RSI, val);
                 }
         }
-
+out:
         io->count -= io->cur_count;
         io->cur_count = 0;
 
@@ -3219,11 +3549,12 @@ static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
         int r;
 
         if (vcpu->arch.pio.in)
-                r = kvm_io_bus_read(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
+                r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
                                     vcpu->arch.pio.size, pd);
         else
-                r = kvm_io_bus_write(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
-                                     vcpu->arch.pio.size, pd);
+                r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
+                                     vcpu->arch.pio.port, vcpu->arch.pio.size,
+                                     pd);
         return r;
 }
 
@@ -3234,7 +3565,7 @@ static int pio_string_write(struct kvm_vcpu *vcpu)
         int i, r = 0;
 
         for (i = 0; i < io->cur_count; i++) {
-                if (kvm_io_bus_write(&vcpu->kvm->pio_bus,
+                if (kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
                                      io->port, io->size, pd)) {
                         r = -EOPNOTSUPP;
                         break;
@@ -3248,6 +3579,8 @@ int kvm_emulate_pio(struct kvm_vcpu *vcpu, int in, int size, unsigned port)
 {
         unsigned long val;
 
+        trace_kvm_pio(!in, port, size, 1);
+
         vcpu->run->exit_reason = KVM_EXIT_IO;
         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
         vcpu->run->io.size = vcpu->arch.pio.size = size;
@@ -3259,11 +3592,10 @@ int kvm_emulate_pio(struct kvm_vcpu *vcpu, int in, int size, unsigned port)
         vcpu->arch.pio.down = 0;
         vcpu->arch.pio.rep = 0;
 
-        trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
-                      size, 1);
-
-        val = kvm_register_read(vcpu, VCPU_REGS_RAX);
-        memcpy(vcpu->arch.pio_data, &val, 4);
+        if (!vcpu->arch.pio.in) {
+                val = kvm_register_read(vcpu, VCPU_REGS_RAX);
+                memcpy(vcpu->arch.pio_data, &val, 4);
+        }
 
         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
                 complete_pio(vcpu);
@@ -3280,6 +3612,8 @@ int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, int in,
         unsigned now, in_page;
         int ret = 0;
 
+        trace_kvm_pio(!in, port, size, count);
+
         vcpu->run->exit_reason = KVM_EXIT_IO;
         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
         vcpu->run->io.size = vcpu->arch.pio.size = size;
@@ -3291,9 +3625,6 @@ int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, int in,
         vcpu->arch.pio.down = down;
         vcpu->arch.pio.rep = rep;
 
-        trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
-                      size, count);
-
         if (!count) {
                 kvm_x86_ops->skip_emulated_instruction(vcpu);
                 return 1;
@@ -3325,10 +3656,8 @@ int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, int in,
         if (!vcpu->arch.pio.in) {
                 /* string PIO write */
                 ret = pio_copy_data(vcpu);
-                if (ret == X86EMUL_PROPAGATE_FAULT) {
-                        kvm_inject_gp(vcpu, 0);
+                if (ret == X86EMUL_PROPAGATE_FAULT)
                         return 1;
-                }
                 if (ret == 0 && !pio_string_write(vcpu)) {
                         complete_pio(vcpu);
                         if (vcpu->arch.pio.count == 0)
@@ -3487,11 +3816,76 @@ static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
                 return a0 | ((gpa_t)a1 << 32);
 }
 
+int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
+{
+        u64 param, ingpa, outgpa, ret;
+        uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
+        bool fast, longmode;
+        int cs_db, cs_l;
+
+        /*
+         * hypercall generates UD from non zero cpl and real mode
+         * per HYPER-V spec
+         */
+        if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
+                kvm_queue_exception(vcpu, UD_VECTOR);
+                return 0;
+        }
+
+        kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
+        longmode = is_long_mode(vcpu) && cs_l == 1;
+
+        if (!longmode) {
+                param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
+                        (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
+                ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
+                        (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
+                outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
+                        (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
+        }
+#ifdef CONFIG_X86_64
+        else {
+                param = kvm_register_read(vcpu, VCPU_REGS_RCX);
+                ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
+                outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
+        }
+#endif
+
+        code = param & 0xffff;
+        fast = (param >> 16) & 0x1;
+        rep_cnt = (param >> 32) & 0xfff;
+        rep_idx = (param >> 48) & 0xfff;
+
+        trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
+
+        switch (code) {
+        case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
+                kvm_vcpu_on_spin(vcpu);
+                break;
+        default:
+                res = HV_STATUS_INVALID_HYPERCALL_CODE;
+                break;
+        }
+
+        ret = res | (((u64)rep_done & 0xfff) << 32);
+        if (longmode) {
+                kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
+        } else {
+                kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
+                kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
+        }
+
+        return 1;
+}
+
 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
 {
         unsigned long nr, a0, a1, a2, a3, ret;
         int r = 1;
 
+        if (kvm_hv_hypercall_enabled(vcpu->kvm))
+                return kvm_hv_hypercall(vcpu);
+
         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
@@ -3534,10 +3928,8 @@ EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
 {
         char instruction[3];
-        int ret = 0;
         unsigned long rip = kvm_rip_read(vcpu);
 
-
         /*
          * Blow out the MMU to ensure that no other VCPU has an active mapping
          * to ensure that the updated hypercall appears atomically across all
@@ -3546,11 +3938,8 @@ int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
         kvm_mmu_zap_all(vcpu->kvm);
 
         kvm_x86_ops->patch_hypercall(vcpu, instruction);
-        if (emulator_write_emulated(rip, instruction, 3, vcpu)
-            != X86EMUL_CONTINUE)
-                ret = -EFAULT;
 
-        return ret;
+        return emulator_write_emulated(rip, instruction, 3, vcpu);
 }
 
 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
@@ -3583,10 +3972,9 @@ unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
 {
         unsigned long value;
 
-        kvm_x86_ops->decache_cr4_guest_bits(vcpu);
         switch (cr) {
         case 0:
-                value = vcpu->arch.cr0;
+                value = kvm_read_cr0(vcpu);
                 break;
         case 2:
                 value = vcpu->arch.cr2;
@@ -3595,7 +3983,7 @@ unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
                 value = vcpu->arch.cr3;
                 break;
         case 4:
-                value = vcpu->arch.cr4;
+                value = kvm_read_cr4(vcpu);
                 break;
         case 8:
                 value = kvm_get_cr8(vcpu);
@@ -3613,7 +4001,7 @@ void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
 {
         switch (cr) {
         case 0:
-                kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
+                kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
                 *rflags = kvm_get_rflags(vcpu);
                 break;
         case 2:
@@ -3623,7 +4011,7 @@ void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
                 kvm_set_cr3(vcpu, val);
                 break;
         case 4:
-                kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
+                kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
                 break;
         case 8:
                 kvm_set_cr8(vcpu, val & 0xfUL);
@@ -3690,6 +4078,7 @@ struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
         }
         return best;
 }
+EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
 
 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
 {
@@ -3773,14 +4162,15 @@ static void vapic_enter(struct kvm_vcpu *vcpu)
 static void vapic_exit(struct kvm_vcpu *vcpu)
 {
         struct kvm_lapic *apic = vcpu->arch.apic;
+        int idx;
 
         if (!apic || !apic->vapic_addr)
                 return;
 
-        down_read(&vcpu->kvm->slots_lock);
+        idx = srcu_read_lock(&vcpu->kvm->srcu);
         kvm_release_page_dirty(apic->vapic_page);
         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
-        up_read(&vcpu->kvm->slots_lock);
+        srcu_read_unlock(&vcpu->kvm->srcu, idx);
 }
 
 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
@@ -3876,12 +4266,17 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
                         r = 0;
                         goto out;
                 }
+                if (test_and_clear_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests)) {
+                        vcpu->fpu_active = 0;
+                        kvm_x86_ops->fpu_deactivate(vcpu);
+                }
         }
 
         preempt_disable();
 
         kvm_x86_ops->prepare_guest_switch(vcpu);
-        kvm_load_guest_fpu(vcpu);
+        if (vcpu->fpu_active)
+                kvm_load_guest_fpu(vcpu);
 
         local_irq_disable();
 
@@ -3909,7 +4304,7 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
                 kvm_lapic_sync_to_vapic(vcpu);
         }
 
-        up_read(&vcpu->kvm->slots_lock);
+        srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
 
         kvm_guest_enter();
 
@@ -3951,7 +4346,7 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
 
         preempt_enable();
 
-        down_read(&vcpu->kvm->slots_lock);
+        vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
 
         /*
          * Profile KVM exit RIPs:
@@ -3973,6 +4368,7 @@ out:
 static int __vcpu_run(struct kvm_vcpu *vcpu)
 {
         int r;
+        struct kvm *kvm = vcpu->kvm;
 
         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
                 pr_debug("vcpu %d received sipi with vector # %x\n",
@@ -3984,7 +4380,7 @@ static int __vcpu_run(struct kvm_vcpu *vcpu)
                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
         }
 
-        down_read(&vcpu->kvm->slots_lock);
+        vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
         vapic_enter(vcpu);
 
         r = 1;
@@ -3992,9 +4388,9 @@ static int __vcpu_run(struct kvm_vcpu *vcpu)
                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
                         r = vcpu_enter_guest(vcpu);
                 else {
-                        up_read(&vcpu->kvm->slots_lock);
+                        srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
                         kvm_vcpu_block(vcpu);
-                        down_read(&vcpu->kvm->slots_lock);
+                        vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
                         if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
                         {
                                 switch(vcpu->arch.mp_state) {
@@ -4029,13 +4425,13 @@ static int __vcpu_run(struct kvm_vcpu *vcpu)
                         ++vcpu->stat.signal_exits;
                 }
                 if (need_resched()) {
-                        up_read(&vcpu->kvm->slots_lock);
+                        srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
                         kvm_resched(vcpu);
-                        down_read(&vcpu->kvm->slots_lock);
+                        vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
                 }
         }
 
-        up_read(&vcpu->kvm->slots_lock);
+        srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
         post_kvm_run_save(vcpu);
 
         vapic_exit(vcpu);
@@ -4065,7 +4461,9 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
                 kvm_set_cr8(vcpu, kvm_run->cr8);
 
         if (vcpu->arch.pio.cur_count) {
+                vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
                 r = complete_pio(vcpu);
+                srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
                 if (r)
                         goto out;
         }
@@ -4074,10 +4472,10 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
                 vcpu->mmio_read_completed = 1;
                 vcpu->mmio_needed = 0;
 
-                down_read(&vcpu->kvm->slots_lock);
+                vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
                 r = emulate_instruction(vcpu, vcpu->arch.mmio_fault_cr2, 0,
                                         EMULTYPE_NO_DECODE);
-                up_read(&vcpu->kvm->slots_lock);
+                srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
                 if (r == EMULATE_DO_MMIO) {
                         /*
                          * Read-modify-write.  Back to userspace.
@@ -4204,13 +4602,12 @@ int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
         sregs->gdt.limit = dt.limit;
         sregs->gdt.base = dt.base;
 
-        kvm_x86_ops->decache_cr4_guest_bits(vcpu);
-        sregs->cr0 = vcpu->arch.cr0;
+        sregs->cr0 = kvm_read_cr0(vcpu);
         sregs->cr2 = vcpu->arch.cr2;
         sregs->cr3 = vcpu->arch.cr3;
-        sregs->cr4 = vcpu->arch.cr4;
+        sregs->cr4 = kvm_read_cr4(vcpu);
         sregs->cr8 = kvm_get_cr8(vcpu);
-        sregs->efer = vcpu->arch.shadow_efer;
+        sregs->efer = vcpu->arch.efer;
         sregs->apic_base = kvm_get_apic_base(vcpu);
 
         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
@@ -4298,14 +4695,23 @@ static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
 {
         struct descriptor_table dtable;
         u16 index = selector >> 3;
+        int ret;
+        u32 err;
+        gva_t addr;
 
         get_segment_descriptor_dtable(vcpu, selector, &dtable);
 
         if (dtable.limit < index * 8 + 7) {
                 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
-                return 1;
+                return X86EMUL_PROPAGATE_FAULT;
         }
-        return kvm_read_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
+        addr = dtable.base + index * 8;
+        ret = kvm_read_guest_virt_system(addr, seg_desc, sizeof(*seg_desc),
+                                         vcpu,  &err);
+        if (ret == X86EMUL_PROPAGATE_FAULT)
+                kvm_inject_page_fault(vcpu, addr, err);
+
+       return ret;
 }
 
 /* allowed just for 8 bytes segments */
@@ -4319,15 +4725,23 @@ static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
 
         if (dtable.limit < index * 8 + 7)
                 return 1;
-        return kvm_write_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
+        return kvm_write_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu, NULL);
 }
 
-static gpa_t get_tss_base_addr(struct kvm_vcpu *vcpu,
+static gpa_t get_tss_base_addr_write(struct kvm_vcpu *vcpu,
+                               struct desc_struct *seg_desc)
+{
+        u32 base_addr = get_desc_base(seg_desc);
+
+        return kvm_mmu_gva_to_gpa_write(vcpu, base_addr, NULL);
+}
+
+static gpa_t get_tss_base_addr_read(struct kvm_vcpu *vcpu,
                              struct desc_struct *seg_desc)
 {
         u32 base_addr = get_desc_base(seg_desc);
 
-        return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
+        return kvm_mmu_gva_to_gpa_read(vcpu, base_addr, NULL);
 }
 
 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
@@ -4338,18 +4752,6 @@ static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
         return kvm_seg.selector;
 }
 
-static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
-                                                u16 selector,
-                                                struct kvm_segment *kvm_seg)
-{
-        struct desc_struct seg_desc;
-
-        if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
-                return 1;
-        seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
-        return 0;
-}
-
 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
 {
         struct kvm_segment segvar = {
@@ -4367,7 +4769,7 @@ static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int se
                 .unusable = 0,
         };
         kvm_x86_ops->set_segment(vcpu, &segvar, seg);
-        return 0;
+        return X86EMUL_CONTINUE;
 }
 
 static int is_vm86_segment(struct kvm_vcpu *vcpu, int seg)
@@ -4377,24 +4779,112 @@ static int is_vm86_segment(struct kvm_vcpu *vcpu, int seg)
                 (kvm_get_rflags(vcpu) & X86_EFLAGS_VM);
 }
 
-int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
-                                int type_bits, int seg)
+int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg)
 {
         struct kvm_segment kvm_seg;
+        struct desc_struct seg_desc;
+        u8 dpl, rpl, cpl;
+        unsigned err_vec = GP_VECTOR;
+        u32 err_code = 0;
+        bool null_selector = !(selector & ~0x3); /* 0000-0003 are null */
+        int ret;
 
-        if (is_vm86_segment(vcpu, seg) || !(vcpu->arch.cr0 & X86_CR0_PE))
+        if (is_vm86_segment(vcpu, seg) || !is_protmode(vcpu))
                 return kvm_load_realmode_segment(vcpu, selector, seg);
-        if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
-                return 1;
-        kvm_seg.type |= type_bits;
 
-        if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
-            seg != VCPU_SREG_LDTR)
-                if (!kvm_seg.s)
-                        kvm_seg.unusable = 1;
+        /* NULL selector is not valid for TR, CS and SS */
+        if ((seg == VCPU_SREG_CS || seg == VCPU_SREG_SS || seg == VCPU_SREG_TR)
+            && null_selector)
+                goto exception;
+
+        /* TR should be in GDT only */
+        if (seg == VCPU_SREG_TR && (selector & (1 << 2)))
+                goto exception;
+
+        ret = load_guest_segment_descriptor(vcpu, selector, &seg_desc);
+        if (ret)
+                return ret;
+
+        seg_desct_to_kvm_desct(&seg_desc, selector, &kvm_seg);
+
+        if (null_selector) { /* for NULL selector skip all following checks */
+                kvm_seg.unusable = 1;
+                goto load;
+        }
+
+        err_code = selector & 0xfffc;
+        err_vec = GP_VECTOR;
 
+        /* can't load system descriptor into segment selecor */
+        if (seg <= VCPU_SREG_GS && !kvm_seg.s)
+                goto exception;
+
+        if (!kvm_seg.present) {
+                err_vec = (seg == VCPU_SREG_SS) ? SS_VECTOR : NP_VECTOR;
+                goto exception;
+        }
+
+        rpl = selector & 3;
+        dpl = kvm_seg.dpl;
+        cpl = kvm_x86_ops->get_cpl(vcpu);
+
+        switch (seg) {
+        case VCPU_SREG_SS:
+                /*
+                 * segment is not a writable data segment or segment
+                 * selector's RPL != CPL or segment selector's RPL != CPL
+                 */
+                if (rpl != cpl || (kvm_seg.type & 0xa) != 0x2 || dpl != cpl)
+                        goto exception;
+                break;
+        case VCPU_SREG_CS:
+                if (!(kvm_seg.type & 8))
+                        goto exception;
+
+                if (kvm_seg.type & 4) {
+                        /* conforming */
+                        if (dpl > cpl)
+                                goto exception;
+                } else {
+                        /* nonconforming */
+                        if (rpl > cpl || dpl != cpl)
+                                goto exception;
+                }
+                /* CS(RPL) <- CPL */
+                selector = (selector & 0xfffc) | cpl;
+            break;
+        case VCPU_SREG_TR:
+                if (kvm_seg.s || (kvm_seg.type != 1 && kvm_seg.type != 9))
+                        goto exception;
+                break;
+        case VCPU_SREG_LDTR:
+                if (kvm_seg.s || kvm_seg.type != 2)
+                        goto exception;
+                break;
+        default: /*  DS, ES, FS, or GS */
+                /*
+                 * segment is not a data or readable code segment or
+                 * ((segment is a data or nonconforming code segment)
+                 * and (both RPL and CPL > DPL))
+                 */
+                if ((kvm_seg.type & 0xa) == 0x8 ||
+                    (((kvm_seg.type & 0xc) != 0xc) && (rpl > dpl && cpl > dpl)))
+                        goto exception;
+                break;
+        }
+
+        if (!kvm_seg.unusable && kvm_seg.s) {
+                /* mark segment as accessed */
+                kvm_seg.type |= 1;
+                seg_desc.type |= 1;
+                save_guest_segment_descriptor(vcpu, selector, &seg_desc);
+        }
+load:
         kvm_set_segment(vcpu, &kvm_seg, seg);
-        return 0;
+        return X86EMUL_CONTINUE;
+exception:
+        kvm_queue_exception_e(vcpu, err_vec, err_code);
+        return X86EMUL_PROPAGATE_FAULT;
 }
 
 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
@@ -4420,6 +4910,14 @@ static void save_state_to_tss32(struct kvm_vcpu *vcpu,
         tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
 }
 
+static void kvm_load_segment_selector(struct kvm_vcpu *vcpu, u16 sel, int seg)
+{
+        struct kvm_segment kvm_seg;
+        kvm_get_segment(vcpu, &kvm_seg, seg);
+        kvm_seg.selector = sel;
+        kvm_set_segment(vcpu, &kvm_seg, seg);
+}
+
 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
                                   struct tss_segment_32 *tss)
 {
@@ -4437,25 +4935,41 @@ static int load_state_from_tss32(struct kvm_vcpu *vcpu,
         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
 
-        if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
+        /*
+         * SDM says that segment selectors are loaded before segment
+         * descriptors
+         */
+        kvm_load_segment_selector(vcpu, tss->ldt_selector, VCPU_SREG_LDTR);
+        kvm_load_segment_selector(vcpu, tss->es, VCPU_SREG_ES);
+        kvm_load_segment_selector(vcpu, tss->cs, VCPU_SREG_CS);
+        kvm_load_segment_selector(vcpu, tss->ss, VCPU_SREG_SS);
+        kvm_load_segment_selector(vcpu, tss->ds, VCPU_SREG_DS);
+        kvm_load_segment_selector(vcpu, tss->fs, VCPU_SREG_FS);
+        kvm_load_segment_selector(vcpu, tss->gs, VCPU_SREG_GS);
+
+        /*
+         * Now load segment descriptors. If fault happenes at this stage
+         * it is handled in a context of new task
+         */
+        if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, VCPU_SREG_LDTR))
                 return 1;
 
-        if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
+        if (kvm_load_segment_descriptor(vcpu, tss->es, VCPU_SREG_ES))
                 return 1;
 
-        if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
+        if (kvm_load_segment_descriptor(vcpu, tss->cs, VCPU_SREG_CS))
                 return 1;
 
-        if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
+        if (kvm_load_segment_descriptor(vcpu, tss->ss, VCPU_SREG_SS))
                 return 1;
 
-        if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
+        if (kvm_load_segment_descriptor(vcpu, tss->ds, VCPU_SREG_DS))
                 return 1;
 
-        if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
+        if (kvm_load_segment_descriptor(vcpu, tss->fs, VCPU_SREG_FS))
                 return 1;
 
-        if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
+        if (kvm_load_segment_descriptor(vcpu, tss->gs, VCPU_SREG_GS))
                 return 1;
         return 0;
 }
@@ -4495,19 +5009,33 @@ static int load_state_from_tss16(struct kvm_vcpu *vcpu,
         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
 
-        if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
+        /*
+         * SDM says that segment selectors are loaded before segment
+         * descriptors
+         */
+        kvm_load_segment_selector(vcpu, tss->ldt, VCPU_SREG_LDTR);
+        kvm_load_segment_selector(vcpu, tss->es, VCPU_SREG_ES);
+        kvm_load_segment_selector(vcpu, tss->cs, VCPU_SREG_CS);
+        kvm_load_segment_selector(vcpu, tss->ss, VCPU_SREG_SS);
+        kvm_load_segment_selector(vcpu, tss->ds, VCPU_SREG_DS);
+
+        /*
+         * Now load segment descriptors. If fault happenes at this stage
+         * it is handled in a context of new task
+         */
+        if (kvm_load_segment_descriptor(vcpu, tss->ldt, VCPU_SREG_LDTR))
                 return 1;
 
-        if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
+        if (kvm_load_segment_descriptor(vcpu, tss->es, VCPU_SREG_ES))
                 return 1;
 
-        if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
+        if (kvm_load_segment_descriptor(vcpu, tss->cs, VCPU_SREG_CS))
                 return 1;
 
-        if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
+        if (kvm_load_segment_descriptor(vcpu, tss->ss, VCPU_SREG_SS))
                 return 1;
 
-        if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
+        if (kvm_load_segment_descriptor(vcpu, tss->ds, VCPU_SREG_DS))
                 return 1;
         return 0;
 }
@@ -4529,7 +5057,7 @@ static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
                             sizeof tss_segment_16))
                 goto out;
 
-        if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
+        if (kvm_read_guest(vcpu->kvm, get_tss_base_addr_read(vcpu, nseg_desc),
                            &tss_segment_16, sizeof tss_segment_16))
                 goto out;
 
@@ -4537,7 +5065,7 @@ static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
                 tss_segment_16.prev_task_link = old_tss_sel;
 
                 if (kvm_write_guest(vcpu->kvm,
-                                    get_tss_base_addr(vcpu, nseg_desc),
+                                    get_tss_base_addr_write(vcpu, nseg_desc),
                                     &tss_segment_16.prev_task_link,
                                     sizeof tss_segment_16.prev_task_link))
                         goto out;
@@ -4568,7 +5096,7 @@ static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
                             sizeof tss_segment_32))
                 goto out;
 
-        if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
+        if (kvm_read_guest(vcpu->kvm, get_tss_base_addr_read(vcpu, nseg_desc),
                            &tss_segment_32, sizeof tss_segment_32))
                 goto out;
 
@@ -4576,7 +5104,7 @@ static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
                 tss_segment_32.prev_task_link = old_tss_sel;
 
                 if (kvm_write_guest(vcpu->kvm,
-                                    get_tss_base_addr(vcpu, nseg_desc),
+                                    get_tss_base_addr_write(vcpu, nseg_desc),
                                     &tss_segment_32.prev_task_link,
                                     sizeof tss_segment_32.prev_task_link))
                         goto out;
@@ -4598,8 +5126,9 @@ int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
         int ret = 0;
         u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
         u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
+        u32 desc_limit;
 
-        old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
+        old_tss_base = kvm_mmu_gva_to_gpa_write(vcpu, old_tss_base, NULL);
 
         /* FIXME: Handle errors. Failure to read either TSS or their
          * descriptors should generate a pagefault.
@@ -4620,7 +5149,10 @@ int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
                 }
         }
 
-        if (!nseg_desc.p || get_desc_limit(&nseg_desc) < 0x67) {
+        desc_limit = get_desc_limit(&nseg_desc);
+        if (!nseg_desc.p ||
+            ((desc_limit < 0x67 && (nseg_desc.type & 8)) ||
+             desc_limit < 0x2b)) {
                 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
                 return 1;
         }
@@ -4658,7 +5190,7 @@ int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
                                               &nseg_desc);
         }
 
-        kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
+        kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0(vcpu) | X86_CR0_TS);
         seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
         tr_seg.type = 11;
         kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
@@ -4689,17 +5221,15 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
 
         kvm_set_cr8(vcpu, sregs->cr8);
 
-        mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
+        mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
         kvm_x86_ops->set_efer(vcpu, sregs->efer);
         kvm_set_apic_base(vcpu, sregs->apic_base);
 
-        kvm_x86_ops->decache_cr4_guest_bits(vcpu);
-
-        mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
+        mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
         vcpu->arch.cr0 = sregs->cr0;
 
-        mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
+        mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
                 load_pdptrs(vcpu, vcpu->arch.cr3);
@@ -4734,7 +5264,7 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
         /* Older userspace won't unhalt the vcpu on reset. */
         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
-            !(vcpu->arch.cr0 & X86_CR0_PE))
+            !is_protmode(vcpu))
                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
 
         vcpu_put(vcpu);
@@ -4832,11 +5362,12 @@ int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
 {
         unsigned long vaddr = tr->linear_address;
         gpa_t gpa;
+        int idx;
 
         vcpu_load(vcpu);
-        down_read(&vcpu->kvm->slots_lock);
-        gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
-        up_read(&vcpu->kvm->slots_lock);
+        idx = srcu_read_lock(&vcpu->kvm->srcu);
+        gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
+        srcu_read_unlock(&vcpu->kvm->srcu, idx);
         tr->physical_address = gpa;
         tr->valid = gpa != UNMAPPED_GVA;
         tr->writeable = 1;
@@ -4917,14 +5448,14 @@ EXPORT_SYMBOL_GPL(fx_init);
 
 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
 {
-        if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
+        if (vcpu->guest_fpu_loaded)
                 return;
 
         vcpu->guest_fpu_loaded = 1;
         kvm_fx_save(&vcpu->arch.host_fx_image);
         kvm_fx_restore(&vcpu->arch.guest_fx_image);
+        trace_kvm_fpu(1);
 }
-EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
 
 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
 {
@@ -4935,8 +5466,9 @@ void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
         kvm_fx_save(&vcpu->arch.guest_fx_image);
         kvm_fx_restore(&vcpu->arch.host_fx_image);
         ++vcpu->stat.fpu_reload;
+        set_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests);
+        trace_kvm_fpu(0);
 }
-EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
 
 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
 {
@@ -5088,11 +5620,13 @@ fail:
 
 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
 {
+        int idx;
+
         kfree(vcpu->arch.mce_banks);
         kvm_free_lapic(vcpu);
-        down_read(&vcpu->kvm->slots_lock);
+        idx = srcu_read_lock(&vcpu->kvm->srcu);
         kvm_mmu_destroy(vcpu);
-        up_read(&vcpu->kvm->slots_lock);
+        srcu_read_unlock(&vcpu->kvm->srcu, idx);
         free_page((unsigned long)vcpu->arch.pio_data);
 }
 
@@ -5103,6 +5637,12 @@ struct  kvm *kvm_arch_create_vm(void)
         if (!kvm)
                 return ERR_PTR(-ENOMEM);
 
+        kvm->arch.aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
+        if (!kvm->arch.aliases) {
+                kfree(kvm);
+                return ERR_PTR(-ENOMEM);
+        }
+
         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
 
@@ -5159,16 +5699,18 @@ void kvm_arch_destroy_vm(struct kvm *kvm)
                 put_page(kvm->arch.apic_access_page);
         if (kvm->arch.ept_identity_pagetable)
                 put_page(kvm->arch.ept_identity_pagetable);
+        cleanup_srcu_struct(&kvm->srcu);
+        kfree(kvm->arch.aliases);
         kfree(kvm);
 }
 
-int kvm_arch_set_memory_region(struct kvm *kvm,
-                                struct kvm_userspace_memory_region *mem,
+int kvm_arch_prepare_memory_region(struct kvm *kvm,
+                                struct kvm_memory_slot *memslot,
                                 struct kvm_memory_slot old,
+                                struct kvm_userspace_memory_region *mem,
                                 int user_alloc)
 {
-        int npages = mem->memory_size >> PAGE_SHIFT;
-        struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
+        int npages = memslot->npages;
 
         /*To keep backward compatibility with older userspace,
          *x86 needs to hanlde !user_alloc case.
@@ -5188,26 +5730,35 @@ int kvm_arch_set_memory_region(struct kvm *kvm,
                         if (IS_ERR((void *)userspace_addr))
                                 return PTR_ERR((void *)userspace_addr);
 
-                        /* set userspace_addr atomically for kvm_hva_to_rmapp */
-                        spin_lock(&kvm->mmu_lock);
                         memslot->userspace_addr = userspace_addr;
-                        spin_unlock(&kvm->mmu_lock);
-                } else {
-                        if (!old.user_alloc && old.rmap) {
-                                int ret;
-
-                                down_write(&current->mm->mmap_sem);
-                                ret = do_munmap(current->mm, old.userspace_addr,
-                                                old.npages * PAGE_SIZE);
-                                up_write(&current->mm->mmap_sem);
-                                if (ret < 0)
-                                        printk(KERN_WARNING
-                                       "kvm_vm_ioctl_set_memory_region: "
-                                       "failed to munmap memory\n");
-                        }
                 }
         }
 
+
+        return 0;
+}
+
+void kvm_arch_commit_memory_region(struct kvm *kvm,
+                                struct kvm_userspace_memory_region *mem,
+                                struct kvm_memory_slot old,
+                                int user_alloc)
+{
+
+        int npages = mem->memory_size >> PAGE_SHIFT;
+
+        if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
+                int ret;
+
+                down_write(&current->mm->mmap_sem);
+                ret = do_munmap(current->mm, old.userspace_addr,
+                                old.npages * PAGE_SIZE);
+                up_write(&current->mm->mmap_sem);
+                if (ret < 0)
+                        printk(KERN_WARNING
+                               "kvm_vm_ioctl_set_memory_region: "
+                               "failed to munmap memory\n");
+        }
+
         spin_lock(&kvm->mmu_lock);
         if (!kvm->arch.n_requested_mmu_pages) {
                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
@@ -5216,8 +5767,6 @@ int kvm_arch_set_memory_region(struct kvm *kvm,
 
         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
         spin_unlock(&kvm->mmu_lock);
-
-        return 0;
 }
 
 void kvm_arch_flush_shadow(struct kvm *kvm)
diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
index 5eadea585d2..2d101639bd8 100644
--- a/arch/x86/kvm/x86.h
+++ b/arch/x86/kvm/x86.h
@@ -2,6 +2,7 @@
 #define ARCH_X86_KVM_X86_H
 
 #include <linux/kvm_host.h>
+#include "kvm_cache_regs.h"
 
 static inline void kvm_clear_exception_queue(struct kvm_vcpu *vcpu)
 {
@@ -35,4 +36,33 @@ static inline bool kvm_exception_is_soft(unsigned int nr)
 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
                                              u32 function, u32 index);
 
+static inline bool is_protmode(struct kvm_vcpu *vcpu)
+{
+        return kvm_read_cr0_bits(vcpu, X86_CR0_PE);
+}
+
+static inline int is_long_mode(struct kvm_vcpu *vcpu)
+{
+#ifdef CONFIG_X86_64
+        return vcpu->arch.efer & EFER_LMA;
+#else
+        return 0;
+#endif
+}
+
+static inline int is_pae(struct kvm_vcpu *vcpu)
+{
+        return kvm_read_cr4_bits(vcpu, X86_CR4_PAE);
+}
+
+static inline int is_pse(struct kvm_vcpu *vcpu)
+{
+        return kvm_read_cr4_bits(vcpu, X86_CR4_PSE);
+}
+
+static inline int is_paging(struct kvm_vcpu *vcpu)
+{
+        return kvm_read_cr0_bits(vcpu, X86_CR0_PG);
+}
+
 #endif
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index 7e59dc1d3fc..2bdf628066b 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -115,7 +115,7 @@ static void async_hcall(unsigned long call, unsigned long arg1,
         local_irq_save(flags);
         if (lguest_data.hcall_status[next_call] != 0xFF) {
                 /* Table full, so do normal hcall which will flush table. */
-                kvm_hypercall4(call, arg1, arg2, arg3, arg4);
+                hcall(call, arg1, arg2, arg3, arg4);
         } else {
                 lguest_data.hcalls[next_call].arg0 = call;
                 lguest_data.hcalls[next_call].arg1 = arg1;
@@ -145,46 +145,45 @@ static void async_hcall(unsigned long call, unsigned long arg1,
  * So, when we're in lazy mode, we call async_hcall() to store the call for
  * future processing:
  */
-static void lazy_hcall1(unsigned long call,
-                       unsigned long arg1)
+static void lazy_hcall1(unsigned long call, unsigned long arg1)
 {
         if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE)
-                kvm_hypercall1(call, arg1);
+                hcall(call, arg1, 0, 0, 0);
         else
                 async_hcall(call, arg1, 0, 0, 0);
 }
 
 /* You can imagine what lazy_hcall2, 3 and 4 look like. :*/
 static void lazy_hcall2(unsigned long call,
-                       unsigned long arg1,
-                       unsigned long arg2)
+                        unsigned long arg1,
+                        unsigned long arg2)
 {
         if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE)
-                kvm_hypercall2(call, arg1, arg2);
+                hcall(call, arg1, arg2, 0, 0);
         else
                 async_hcall(call, arg1, arg2, 0, 0);
 }
 
 static void lazy_hcall3(unsigned long call,
-                       unsigned long arg1,
-                       unsigned long arg2,
-                       unsigned long arg3)
+                        unsigned long arg1,
+                        unsigned long arg2,
+                        unsigned long arg3)
 {
         if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE)
-                kvm_hypercall3(call, arg1, arg2, arg3);
+                hcall(call, arg1, arg2, arg3, 0);
         else
                 async_hcall(call, arg1, arg2, arg3, 0);
 }
 
 #ifdef CONFIG_X86_PAE
 static void lazy_hcall4(unsigned long call,
-                       unsigned long arg1,
-                       unsigned long arg2,
-                       unsigned long arg3,
-                       unsigned long arg4)
+                        unsigned long arg1,
+                        unsigned long arg2,
+                        unsigned long arg3,
+                        unsigned long arg4)
 {
         if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE)
-                kvm_hypercall4(call, arg1, arg2, arg3, arg4);
+                hcall(call, arg1, arg2, arg3, arg4);
         else
                 async_hcall(call, arg1, arg2, arg3, arg4);
 }
@@ -196,13 +195,13 @@ static void lazy_hcall4(unsigned long call,
 :*/
 static void lguest_leave_lazy_mmu_mode(void)
 {
-        kvm_hypercall0(LHCALL_FLUSH_ASYNC);
+        hcall(LHCALL_FLUSH_ASYNC, 0, 0, 0, 0);
         paravirt_leave_lazy_mmu();
 }
 
 static void lguest_end_context_switch(struct task_struct *next)
 {
-        kvm_hypercall0(LHCALL_FLUSH_ASYNC);
+        hcall(LHCALL_FLUSH_ASYNC, 0, 0, 0, 0);
         paravirt_end_context_switch(next);
 }
 
@@ -286,7 +285,7 @@ static void lguest_write_idt_entry(gate_desc *dt,
         /* Keep the local copy up to date. */
         native_write_idt_entry(dt, entrynum, g);
         /* Tell Host about this new entry. */
-        kvm_hypercall3(LHCALL_LOAD_IDT_ENTRY, entrynum, desc[0], desc[1]);
+        hcall(LHCALL_LOAD_IDT_ENTRY, entrynum, desc[0], desc[1], 0);
 }
 
 /*
@@ -300,7 +299,7 @@ static void lguest_load_idt(const struct desc_ptr *desc)
         struct desc_struct *idt = (void *)desc->address;
 
         for (i = 0; i < (desc->size+1)/8; i++)
-                kvm_hypercall3(LHCALL_LOAD_IDT_ENTRY, i, idt[i].a, idt[i].b);
+                hcall(LHCALL_LOAD_IDT_ENTRY, i, idt[i].a, idt[i].b, 0);
 }
 
 /*
@@ -321,7 +320,7 @@ static void lguest_load_gdt(const struct desc_ptr *desc)
         struct desc_struct *gdt = (void *)desc->address;
 
         for (i = 0; i < (desc->size+1)/8; i++)
-                kvm_hypercall3(LHCALL_LOAD_GDT_ENTRY, i, gdt[i].a, gdt[i].b);
+                hcall(LHCALL_LOAD_GDT_ENTRY, i, gdt[i].a, gdt[i].b, 0);
 }
 
 /*
@@ -334,8 +333,8 @@ static void lguest_write_gdt_entry(struct desc_struct *dt, int entrynum,
 {
         native_write_gdt_entry(dt, entrynum, desc, type);
         /* Tell Host about this new entry. */
-        kvm_hypercall3(LHCALL_LOAD_GDT_ENTRY, entrynum,
-                       dt[entrynum].a, dt[entrynum].b);
+        hcall(LHCALL_LOAD_GDT_ENTRY, entrynum,
+              dt[entrynum].a, dt[entrynum].b, 0);
 }
 
 /*
@@ -931,7 +930,7 @@ static int lguest_clockevent_set_next_event(unsigned long delta,
         }
 
         /* Please wake us this far in the future. */
-        kvm_hypercall1(LHCALL_SET_CLOCKEVENT, delta);
+        hcall(LHCALL_SET_CLOCKEVENT, delta, 0, 0, 0);
         return 0;
 }
 
@@ -942,7 +941,7 @@ static void lguest_clockevent_set_mode(enum clock_event_mode mode,
         case CLOCK_EVT_MODE_UNUSED:
         case CLOCK_EVT_MODE_SHUTDOWN:
                 /* A 0 argument shuts the clock down. */
-                kvm_hypercall0(LHCALL_SET_CLOCKEVENT);
+                hcall(LHCALL_SET_CLOCKEVENT, 0, 0, 0, 0);
                 break;
         case CLOCK_EVT_MODE_ONESHOT:
                 /* This is what we expect. */
@@ -1100,7 +1099,7 @@ static void set_lguest_basic_apic_ops(void)
 /* STOP!  Until an interrupt comes in. */
 static void lguest_safe_halt(void)
 {
-        kvm_hypercall0(LHCALL_HALT);
+        hcall(LHCALL_HALT, 0, 0, 0, 0);
 }
 
 /*
@@ -1112,8 +1111,8 @@ static void lguest_safe_halt(void)
  */
 static void lguest_power_off(void)
 {
-        kvm_hypercall2(LHCALL_SHUTDOWN, __pa("Power down"),
-                                        LGUEST_SHUTDOWN_POWEROFF);
+        hcall(LHCALL_SHUTDOWN, __pa("Power down"),
+              LGUEST_SHUTDOWN_POWEROFF, 0, 0);
 }
 
 /*
@@ -1123,7 +1122,7 @@ static void lguest_power_off(void)
  */
 static int lguest_panic(struct notifier_block *nb, unsigned long l, void *p)
 {
-        kvm_hypercall2(LHCALL_SHUTDOWN, __pa(p), LGUEST_SHUTDOWN_POWEROFF);
+        hcall(LHCALL_SHUTDOWN, __pa(p), LGUEST_SHUTDOWN_POWEROFF, 0, 0);
         /* The hcall won't return, but to keep gcc happy, we're "done". */
         return NOTIFY_DONE;
 }
@@ -1162,7 +1161,7 @@ static __init int early_put_chars(u32 vtermno, const char *buf, int count)
                 len = sizeof(scratch) - 1;
         scratch[len] = '\0';
         memcpy(scratch, buf, len);
-        kvm_hypercall1(LHCALL_NOTIFY, __pa(scratch));
+        hcall(LHCALL_NOTIFY, __pa(scratch), 0, 0, 0);
 
         /* This routine returns the number of bytes actually written. */
         return len;
@@ -1174,7 +1173,7 @@ static __init int early_put_chars(u32 vtermno, const char *buf, int count)
  */
 static void lguest_restart(char *reason)
 {
-        kvm_hypercall2(LHCALL_SHUTDOWN, __pa(reason), LGUEST_SHUTDOWN_RESTART);
+        hcall(LHCALL_SHUTDOWN, __pa(reason), LGUEST_SHUTDOWN_RESTART, 0, 0);
 }
 
 /*G:050
diff --git a/arch/x86/lguest/i386_head.S b/arch/x86/lguest/i386_head.S
index 27eac0faee4..4f420c2f2d5 100644
--- a/arch/x86/lguest/i386_head.S
+++ b/arch/x86/lguest/i386_head.S
@@ -32,7 +32,7 @@ ENTRY(lguest_entry)
          */
         movl $LHCALL_LGUEST_INIT, %eax
         movl $lguest_data - __PAGE_OFFSET, %ebx
-        .byte 0x0f,0x01,0xc1 /* KVM_HYPERCALL */
+        int $LGUEST_TRAP_ENTRY
 
         /* Set up the initial stack so we can run C code. */
         movl $(init_thread_union+THREAD_SIZE),%esp
diff --git a/arch/x86/mm/hugetlbpage.c b/arch/x86/mm/hugetlbpage.c
index f46c340727b..069ce7c37c0 100644
--- a/arch/x86/mm/hugetlbpage.c
+++ b/arch/x86/mm/hugetlbpage.c
@@ -9,7 +9,6 @@
 #include <linux/mm.h>
 #include <linux/hugetlb.h>
 #include <linux/pagemap.h>
-#include <linux/slab.h>
 #include <linux/err.h>
 #include <linux/sysctl.h>
 #include <asm/mman.h>
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index e71c5cbc8f3..b278535b14a 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -1,3 +1,4 @@
+#include <linux/gfp.h>
 #include <linux/initrd.h>
 #include <linux/ioport.h>
 #include <linux/swap.h>
@@ -331,11 +332,23 @@ int devmem_is_allowed(unsigned long pagenr)
 
 void free_init_pages(char *what, unsigned long begin, unsigned long end)
 {
-        unsigned long addr = begin;
+        unsigned long addr;
+        unsigned long begin_aligned, end_aligned;
 
-        if (addr >= end)
+        /* Make sure boundaries are page aligned */
+        begin_aligned = PAGE_ALIGN(begin);
+        end_aligned   = end & PAGE_MASK;
+
+        if (WARN_ON(begin_aligned != begin || end_aligned != end)) {
+                begin = begin_aligned;
+                end   = end_aligned;
+        }
+
+        if (begin >= end)
                 return;
 
+        addr = begin;
+
         /*
          * If debugging page accesses then do not free this memory but
          * mark them not present - any buggy init-section access will
@@ -343,7 +356,7 @@ void free_init_pages(char *what, unsigned long begin, unsigned long end)
          */
 #ifdef CONFIG_DEBUG_PAGEALLOC
         printk(KERN_INFO "debug: unmapping init memory %08lx..%08lx\n",
-                begin, PAGE_ALIGN(end));
+                begin, end);
         set_memory_np(begin, (end - begin) >> PAGE_SHIFT);
 #else
         /*
@@ -358,8 +371,7 @@ void free_init_pages(char *what, unsigned long begin, unsigned long end)
         for (; addr < end; addr += PAGE_SIZE) {
                 ClearPageReserved(virt_to_page(addr));
                 init_page_count(virt_to_page(addr));
-                memset((void *)(addr & ~(PAGE_SIZE-1)),
-                        POISON_FREE_INITMEM, PAGE_SIZE);
+                memset((void *)addr, POISON_FREE_INITMEM, PAGE_SIZE);
                 free_page(addr);
                 totalram_pages++;
         }
@@ -376,6 +388,15 @@ void free_initmem(void)
 #ifdef CONFIG_BLK_DEV_INITRD
 void free_initrd_mem(unsigned long start, unsigned long end)
 {
-        free_init_pages("initrd memory", start, end);
+        /*
+         * end could be not aligned, and We can not align that,
+         * decompresser could be confused by aligned initrd_end
+         * We already reserve the end partial page before in
+         *   - i386_start_kernel()
+         *   - x86_64_start_kernel()
+         *   - relocate_initrd()
+         * So here We can do PAGE_ALIGN() safely to get partial page to be freed
+         */
+        free_init_pages("initrd memory", start, PAGE_ALIGN(end));
 }
 #endif
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index 5cb3f0f54f4..bca79091b9d 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -25,11 +25,11 @@
 #include <linux/pfn.h>
 #include <linux/poison.h>
 #include <linux/bootmem.h>
-#include <linux/slab.h>
 #include <linux/proc_fs.h>
 #include <linux/memory_hotplug.h>
 #include <linux/initrd.h>
 #include <linux/cpumask.h>
+#include <linux/gfp.h>
 
 #include <asm/asm.h>
 #include <asm/bios_ebda.h>
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
index e9b040e1cde..ee41bba315d 100644
--- a/arch/x86/mm/init_64.c
+++ b/arch/x86/mm/init_64.c
@@ -29,6 +29,7 @@
 #include <linux/module.h>
 #include <linux/memory_hotplug.h>
 #include <linux/nmi.h>
+#include <linux/gfp.h>
 
 #include <asm/processor.h>
 #include <asm/bios_ebda.h>
diff --git a/arch/x86/mm/kmmio.c b/arch/x86/mm/kmmio.c
index 536fb682336..5d0e67fff1a 100644
--- a/arch/x86/mm/kmmio.c
+++ b/arch/x86/mm/kmmio.c
@@ -21,6 +21,7 @@
 #include <linux/kdebug.h>
 #include <linux/mutex.h>
 #include <linux/io.h>
+#include <linux/slab.h>
 #include <asm/cacheflush.h>
 #include <asm/tlbflush.h>
 #include <linux/errno.h>
diff --git a/arch/x86/mm/mmio-mod.c b/arch/x86/mm/mmio-mod.c
index 34a3291ca10..3adff7dcc14 100644
--- a/arch/x86/mm/mmio-mod.c
+++ b/arch/x86/mm/mmio-mod.c
@@ -26,6 +26,7 @@
 
 #include <linux/module.h>
 #include <linux/debugfs.h>
+#include <linux/slab.h>
 #include <linux/uaccess.h>
 #include <linux/io.h>
 #include <linux/version.h>
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 1d4eb93d333..28195c350b9 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -6,13 +6,13 @@
 #include <linux/bootmem.h>
 #include <linux/module.h>
 #include <linux/sched.h>
-#include <linux/slab.h>
 #include <linux/mm.h>
 #include <linux/interrupt.h>
 #include <linux/seq_file.h>
 #include <linux/debugfs.h>
 #include <linux/pfn.h>
 #include <linux/percpu.h>
+#include <linux/gfp.h>
 
 #include <asm/e820.h>
 #include <asm/processor.h>
@@ -291,8 +291,29 @@ static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
          */
         if (kernel_set_to_readonly &&
             within(address, (unsigned long)_text,
-                   (unsigned long)__end_rodata_hpage_align))
-                pgprot_val(forbidden) |= _PAGE_RW;
+                   (unsigned long)__end_rodata_hpage_align)) {
+                unsigned int level;
+
+                /*
+                 * Don't enforce the !RW mapping for the kernel text mapping,
+                 * if the current mapping is already using small page mapping.
+                 * No need to work hard to preserve large page mappings in this
+                 * case.
+                 *
+                 * This also fixes the Linux Xen paravirt guest boot failure
+                 * (because of unexpected read-only mappings for kernel identity
+                 * mappings). In this paravirt guest case, the kernel text
+                 * mapping and the kernel identity mapping share the same
+                 * page-table pages. Thus we can't really use different
+                 * protections for the kernel text and identity mappings. Also,
+                 * these shared mappings are made of small page mappings.
+                 * Thus this don't enforce !RW mapping for small page kernel
+                 * text mapping logic will help Linux Xen parvirt guest boot
+                 * aswell.
+                 */
+                if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
+                        pgprot_val(forbidden) |= _PAGE_RW;
+        }
 #endif
 
         prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index ae9648eb1c7..edc8b95afc1 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -12,7 +12,7 @@
 #include <linux/debugfs.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/gfp.h>
+#include <linux/slab.h>
 #include <linux/mm.h>
 #include <linux/fs.h>
 #include <linux/rbtree.h>
diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c
index c9ba9deafe8..5c4ee422590 100644
--- a/arch/x86/mm/pgtable.c
+++ b/arch/x86/mm/pgtable.c
@@ -1,4 +1,5 @@
 #include <linux/mm.h>
+#include <linux/gfp.h>
 #include <asm/pgalloc.h>
 #include <asm/pgtable.h>
 #include <asm/tlb.h>
diff --git a/arch/x86/mm/pgtable_32.c b/arch/x86/mm/pgtable_32.c
index 46c8834aedc..1a8faf09afe 100644
--- a/arch/x86/mm/pgtable_32.c
+++ b/arch/x86/mm/pgtable_32.c
@@ -6,7 +6,6 @@
 #include <linux/swap.h>
 #include <linux/smp.h>
 #include <linux/highmem.h>
-#include <linux/slab.h>
 #include <linux/pagemap.h>
 #include <linux/spinlock.h>
 #include <linux/module.h>
diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c
index 6a58256dce9..090cbbec7db 100644
--- a/arch/x86/oprofile/op_model_amd.c
+++ b/arch/x86/oprofile/op_model_amd.c
@@ -46,17 +46,6 @@
 
 static unsigned long reset_value[NUM_VIRT_COUNTERS];
 
-/* IbsFetchCtl bits/masks */
-#define IBS_FETCH_RAND_EN               (1ULL<<57)
-#define IBS_FETCH_VAL                   (1ULL<<49)
-#define IBS_FETCH_ENABLE                (1ULL<<48)
-#define IBS_FETCH_CNT_MASK              0xFFFF0000ULL
-
-/* IbsOpCtl bits */
-#define IBS_OP_CNT_CTL                  (1ULL<<19)
-#define IBS_OP_VAL                      (1ULL<<18)
-#define IBS_OP_ENABLE                   (1ULL<<17)
-
 #define IBS_FETCH_SIZE                  6
 #define IBS_OP_SIZE                     12
 
@@ -182,7 +171,7 @@ static void op_amd_setup_ctrs(struct op_x86_model_spec const *model,
                         continue;
                 }
                 rdmsrl(msrs->controls[i].addr, val);
-                if (val & ARCH_PERFMON_EVENTSEL0_ENABLE)
+                if (val & ARCH_PERFMON_EVENTSEL_ENABLE)
                         op_x86_warn_in_use(i);
                 val &= model->reserved;
                 wrmsrl(msrs->controls[i].addr, val);
@@ -290,7 +279,7 @@ op_amd_handle_ibs(struct pt_regs * const regs,
                         oprofile_write_commit(&entry);
 
                         /* reenable the IRQ */
-                        ctl &= ~(IBS_FETCH_VAL | IBS_FETCH_CNT_MASK);
+                        ctl &= ~(IBS_FETCH_VAL | IBS_FETCH_CNT);
                         ctl |= IBS_FETCH_ENABLE;
                         wrmsrl(MSR_AMD64_IBSFETCHCTL, ctl);
                 }
@@ -330,7 +319,7 @@ static inline void op_amd_start_ibs(void)
                 return;
 
         if (ibs_config.fetch_enabled) {
-                val = (ibs_config.max_cnt_fetch >> 4) & 0xFFFF;
+                val = (ibs_config.max_cnt_fetch >> 4) & IBS_FETCH_MAX_CNT;
                 val |= ibs_config.rand_en ? IBS_FETCH_RAND_EN : 0;
                 val |= IBS_FETCH_ENABLE;
                 wrmsrl(MSR_AMD64_IBSFETCHCTL, val);
@@ -352,7 +341,7 @@ static inline void op_amd_start_ibs(void)
                          * avoid underflows.
                          */
                         ibs_op_ctl = min(ibs_op_ctl + IBS_RANDOM_MAXCNT_OFFSET,
-                                         0xFFFFULL);
+                                         IBS_OP_MAX_CNT);
                 }
                 if (ibs_caps & IBS_CAPS_OPCNT && ibs_config.dispatched_ops)
                         ibs_op_ctl |= IBS_OP_CNT_CTL;
@@ -409,7 +398,7 @@ static void op_amd_start(struct op_msrs const * const msrs)
                 if (!reset_value[op_x86_phys_to_virt(i)])
                         continue;
                 rdmsrl(msrs->controls[i].addr, val);
-                val |= ARCH_PERFMON_EVENTSEL0_ENABLE;
+                val |= ARCH_PERFMON_EVENTSEL_ENABLE;
                 wrmsrl(msrs->controls[i].addr, val);
         }
 
@@ -429,7 +418,7 @@ static void op_amd_stop(struct op_msrs const * const msrs)
                 if (!reset_value[op_x86_phys_to_virt(i)])
                         continue;
                 rdmsrl(msrs->controls[i].addr, val);
-                val &= ~ARCH_PERFMON_EVENTSEL0_ENABLE;
+                val &= ~ARCH_PERFMON_EVENTSEL_ENABLE;
                 wrmsrl(msrs->controls[i].addr, val);
         }
 
diff --git a/arch/x86/oprofile/op_model_ppro.c b/arch/x86/oprofile/op_model_ppro.c
index 5d1727ba409..2bf90fafa7b 100644
--- a/arch/x86/oprofile/op_model_ppro.c
+++ b/arch/x86/oprofile/op_model_ppro.c
@@ -88,7 +88,7 @@ static void ppro_setup_ctrs(struct op_x86_model_spec const *model,
                         continue;
                 }
                 rdmsrl(msrs->controls[i].addr, val);
-                if (val & ARCH_PERFMON_EVENTSEL0_ENABLE)
+                if (val & ARCH_PERFMON_EVENTSEL_ENABLE)
                         op_x86_warn_in_use(i);
                 val &= model->reserved;
                 wrmsrl(msrs->controls[i].addr, val);
@@ -166,7 +166,7 @@ static void ppro_start(struct op_msrs const * const msrs)
         for (i = 0; i < num_counters; ++i) {
                 if (reset_value[i]) {
                         rdmsrl(msrs->controls[i].addr, val);
-                        val |= ARCH_PERFMON_EVENTSEL0_ENABLE;
+                        val |= ARCH_PERFMON_EVENTSEL_ENABLE;
                         wrmsrl(msrs->controls[i].addr, val);
                 }
         }
@@ -184,7 +184,7 @@ static void ppro_stop(struct op_msrs const * const msrs)
                 if (!reset_value[i])
                         continue;
                 rdmsrl(msrs->controls[i].addr, val);
-                val &= ~ARCH_PERFMON_EVENTSEL0_ENABLE;
+                val &= ~ARCH_PERFMON_EVENTSEL_ENABLE;
                 wrmsrl(msrs->controls[i].addr, val);
         }
 }
diff --git a/arch/x86/pci/Makefile b/arch/x86/pci/Makefile
index 0b7d3e9593e..b110d97fb92 100644
--- a/arch/x86/pci/Makefile
+++ b/arch/x86/pci/Makefile
@@ -13,6 +13,8 @@ obj-$(CONFIG_X86_VISWS)		+= visws.o
 
 obj-$(CONFIG_X86_NUMAQ)         += numaq_32.o
 
+obj-$(CONFIG_X86_MRST)          += mrst.o
+
 obj-y                           += common.o early.o
 obj-y                           += amd_bus.o bus_numa.o
 
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index 5f11ff6f538..31930fd30ea 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -3,6 +3,7 @@
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/dmi.h>
+#include <linux/slab.h>
 #include <asm/numa.h>
 #include <asm/pci_x86.h>
 
@@ -65,14 +66,44 @@ resource_to_addr(struct acpi_resource *resource,
                         struct acpi_resource_address64 *addr)
 {
         acpi_status status;
-
-        status = acpi_resource_to_address64(resource, addr);
-        if (ACPI_SUCCESS(status) &&
-            (addr->resource_type == ACPI_MEMORY_RANGE ||
-            addr->resource_type == ACPI_IO_RANGE) &&
-            addr->address_length > 0 &&
-            addr->producer_consumer == ACPI_PRODUCER) {
+        struct acpi_resource_memory24 *memory24;
+        struct acpi_resource_memory32 *memory32;
+        struct acpi_resource_fixed_memory32 *fixed_memory32;
+
+        memset(addr, 0, sizeof(*addr));
+        switch (resource->type) {
+        case ACPI_RESOURCE_TYPE_MEMORY24:
+                memory24 = &resource->data.memory24;
+                addr->resource_type = ACPI_MEMORY_RANGE;
+                addr->minimum = memory24->minimum;
+                addr->address_length = memory24->address_length;
+                addr->maximum = addr->minimum + addr->address_length - 1;
+                return AE_OK;
+        case ACPI_RESOURCE_TYPE_MEMORY32:
+                memory32 = &resource->data.memory32;
+                addr->resource_type = ACPI_MEMORY_RANGE;
+                addr->minimum = memory32->minimum;
+                addr->address_length = memory32->address_length;
+                addr->maximum = addr->minimum + addr->address_length - 1;
                 return AE_OK;
+        case ACPI_RESOURCE_TYPE_FIXED_MEMORY32:
+                fixed_memory32 = &resource->data.fixed_memory32;
+                addr->resource_type = ACPI_MEMORY_RANGE;
+                addr->minimum = fixed_memory32->address;
+                addr->address_length = fixed_memory32->address_length;
+                addr->maximum = addr->minimum + addr->address_length - 1;
+                return AE_OK;
+        case ACPI_RESOURCE_TYPE_ADDRESS16:
+        case ACPI_RESOURCE_TYPE_ADDRESS32:
+        case ACPI_RESOURCE_TYPE_ADDRESS64:
+                status = acpi_resource_to_address64(resource, addr);
+                if (ACPI_SUCCESS(status) &&
+                    (addr->resource_type == ACPI_MEMORY_RANGE ||
+                    addr->resource_type == ACPI_IO_RANGE) &&
+                    addr->address_length > 0) {
+                        return AE_OK;
+                }
+                break;
         }
         return AE_ERROR;
 }
@@ -90,30 +121,6 @@ count_resource(struct acpi_resource *acpi_res, void *data)
         return AE_OK;
 }
 
-static void
-align_resource(struct acpi_device *bridge, struct resource *res)
-{
-        int align = (res->flags & IORESOURCE_MEM) ? 16 : 4;
-
-        /*
-         * Host bridge windows are not BARs, but the decoders on the PCI side
-         * that claim this address space have starting alignment and length
-         * constraints, so fix any obvious BIOS goofs.
-         */
-        if (!IS_ALIGNED(res->start, align)) {
-                dev_printk(KERN_DEBUG, &bridge->dev,
-                           "host bridge window %pR invalid; "
-                           "aligning start to %d-byte boundary\n", res, align);
-                res->start &= ~(align - 1);
-        }
-        if (!IS_ALIGNED(res->end + 1, align)) {
-                dev_printk(KERN_DEBUG, &bridge->dev,
-                           "host bridge window %pR invalid; "
-                           "aligning end to %d-byte boundary\n", res, align);
-                res->end = ALIGN(res->end, align) - 1;
-        }
-}
-
 static acpi_status
 setup_resource(struct acpi_resource *acpi_res, void *data)
 {
@@ -122,7 +129,7 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
         struct acpi_resource_address64 addr;
         acpi_status status;
         unsigned long flags;
-        struct resource *root;
+        struct resource *root, *conflict;
         u64 start, end;
 
         status = resource_to_addr(acpi_res, &addr);
@@ -141,7 +148,7 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
                 return AE_OK;
 
         start = addr.minimum + addr.translation_offset;
-        end = start + addr.address_length - 1;
+        end = addr.maximum + addr.translation_offset;
 
         res = &info->res[info->res_num];
         res->name = info->name;
@@ -149,7 +156,6 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
         res->start = start;
         res->end = end;
         res->child = NULL;
-        align_resource(info->bridge, res);
 
         if (!pci_use_crs) {
                 dev_printk(KERN_DEBUG, &info->bridge->dev,
@@ -157,9 +163,12 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
                 return AE_OK;
         }
 
-        if (insert_resource(root, res)) {
+        conflict = insert_resource_conflict(root, res);
+        if (conflict) {
                 dev_err(&info->bridge->dev,
-                        "can't allocate host bridge window %pR\n", res);
+                        "address space collision: host bridge window %pR "
+                        "conflicts with %s %pR\n",
+                        res, conflict->name, conflict);
         } else {
                 pci_bus_add_resource(info->bus, res, 0);
                 info->res_num++;
@@ -298,17 +307,14 @@ int __init pci_acpi_init(void)
 {
         struct pci_dev *dev = NULL;
 
-        if (pcibios_scanned)
-                return 0;
-
         if (acpi_noirq)
-                return 0;
+                return -ENODEV;
 
         printk(KERN_INFO "PCI: Using ACPI for IRQ routing\n");
         acpi_irq_penalty_init();
-        pcibios_scanned++;
         pcibios_enable_irq = acpi_pci_irq_enable;
         pcibios_disable_irq = acpi_pci_irq_disable;
+        x86_init.pci.init_irq = x86_init_noop;
 
         if (pci_routeirq) {
                 /*
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index 3736176acaa..cf2e93869c4 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -9,6 +9,7 @@
 #include <linux/ioport.h>
 #include <linux/init.h>
 #include <linux/dmi.h>
+#include <linux/slab.h>
 
 #include <asm/acpi.h>
 #include <asm/segment.h>
@@ -72,12 +73,6 @@ struct pci_ops pci_root_ops = {
 };
 
 /*
- * legacy, numa, and acpi all want to call pcibios_scan_root
- * from their initcalls. This flag prevents that.
- */
-int pcibios_scanned;
-
-/*
  * This interrupt-safe spinlock protects all accesses to PCI
  * configuration space.
  */
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index dece3eb9c90..97da2ba9344 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -72,6 +72,9 @@ pcibios_align_resource(void *data, const struct resource *res,
                         return start;
                 if (start & 0x300)
                         start = (start + 0x3ff) & ~0x3ff;
+        } else if (res->flags & IORESOURCE_MEM) {
+                if (start < BIOS_END)
+                        start = BIOS_END;
         }
         return start;
 }
@@ -127,9 +130,6 @@ static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
                                         continue;
                                 if (!r->start ||
                                     pci_claim_resource(dev, idx) < 0) {
-                                        dev_info(&dev->dev,
-                                                 "can't reserve window %pR\n",
-                                                 r);
                                         /*
                                          * Something is wrong with the region.
                                          * Invalidate the resource to prevent
@@ -181,8 +181,6 @@ static void __init pcibios_allocate_resources(int pass)
                                         "BAR %d: reserving %pr (d=%d, p=%d)\n",
                                         idx, r, disabled, pass);
                                 if (pci_claim_resource(dev, idx) < 0) {
-                                        dev_info(&dev->dev,
-                                                 "can't reserve %pR\n", r);
                                         /* We'll assign a new address later */
                                         r->end -= r->start;
                                         r->start = 0;
diff --git a/arch/x86/pci/init.c b/arch/x86/pci/init.c
index 25a1f8efed4..adb62aaa7ec 100644
--- a/arch/x86/pci/init.c
+++ b/arch/x86/pci/init.c
@@ -1,6 +1,7 @@
 #include <linux/pci.h>
 #include <linux/init.h>
 #include <asm/pci_x86.h>
+#include <asm/x86_init.h>
 
 /* arch_initcall has too random ordering, so call the initializers
    in the right sequence from here. */
@@ -15,10 +16,9 @@ static __init int pci_arch_init(void)
         if (!(pci_probe & PCI_PROBE_NOEARLY))
                 pci_mmcfg_early_init();
 
-#ifdef CONFIG_PCI_OLPC
-        if (!pci_olpc_init())
-                return 0;       /* skip additional checks if it's an XO */
-#endif
+        if (x86_init.pci.arch_init && !x86_init.pci.arch_init())
+                return 0;
+
 #ifdef CONFIG_PCI_BIOS
         pci_pcbios_init();
 #endif
diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c
index b02f6d8ac92..5d362b5ba06 100644
--- a/arch/x86/pci/irq.c
+++ b/arch/x86/pci/irq.c
@@ -8,7 +8,6 @@
 #include <linux/kernel.h>
 #include <linux/pci.h>
 #include <linux/init.h>
-#include <linux/slab.h>
 #include <linux/interrupt.h>
 #include <linux/dmi.h>
 #include <linux/io.h>
@@ -53,7 +52,7 @@ struct irq_router_handler {
         int (*probe)(struct irq_router *r, struct pci_dev *router, u16 device);
 };
 
-int (*pcibios_enable_irq)(struct pci_dev *dev) = NULL;
+int (*pcibios_enable_irq)(struct pci_dev *dev) = pirq_enable_irq;
 void (*pcibios_disable_irq)(struct pci_dev *dev) = NULL;
 
 /*
@@ -1018,7 +1017,7 @@ static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
         return 1;
 }
 
-static void __init pcibios_fixup_irqs(void)
+void __init pcibios_fixup_irqs(void)
 {
         struct pci_dev *dev = NULL;
         u8 pin;
@@ -1112,12 +1111,12 @@ static struct dmi_system_id __initdata pciirq_dmi_table[] = {
         { }
 };
 
-int __init pcibios_irq_init(void)
+void __init pcibios_irq_init(void)
 {
         DBG(KERN_DEBUG "PCI: IRQ init\n");
 
-        if (pcibios_enable_irq || raw_pci_ops == NULL)
-                return 0;
+        if (raw_pci_ops == NULL)
+                return;
 
         dmi_check_system(pciirq_dmi_table);
 
@@ -1144,9 +1143,7 @@ int __init pcibios_irq_init(void)
                         pirq_table = NULL;
         }
 
-        pcibios_enable_irq = pirq_enable_irq;
-
-        pcibios_fixup_irqs();
+        x86_init.pci.fixup_irqs();
 
         if (io_apic_assign_pci_irqs && pci_routeirq) {
                 struct pci_dev *dev = NULL;
@@ -1159,8 +1156,6 @@ int __init pcibios_irq_init(void)
                 for_each_pci_dev(dev)
                         pirq_enable_irq(dev);
         }
-
-        return 0;
 }
 
 static void pirq_penalize_isa_irq(int irq, int active)
diff --git a/arch/x86/pci/legacy.c b/arch/x86/pci/legacy.c
index 4061bb0f267..0db5eaf5456 100644
--- a/arch/x86/pci/legacy.c
+++ b/arch/x86/pci/legacy.c
@@ -35,16 +35,13 @@ static void __devinit pcibios_fixup_peer_bridges(void)
         }
 }
 
-static int __init pci_legacy_init(void)
+int __init pci_legacy_init(void)
 {
         if (!raw_pci_ops) {
                 printk("PCI: System does not support PCI\n");
                 return 0;
         }
 
-        if (pcibios_scanned++)
-                return 0;
-
         printk("PCI: Probing PCI hardware\n");
         pci_root_bus = pcibios_scan_root(0);
         if (pci_root_bus)
@@ -55,18 +52,15 @@ static int __init pci_legacy_init(void)
 
 int __init pci_subsys_init(void)
 {
-#ifdef CONFIG_X86_NUMAQ
-        pci_numaq_init();
-#endif
-#ifdef CONFIG_ACPI
-        pci_acpi_init();
-#endif
-#ifdef CONFIG_X86_VISWS
-        pci_visws_init();
-#endif
-        pci_legacy_init();
+        /*
+         * The init function returns an non zero value when
+         * pci_legacy_init should be invoked.
+         */
+        if (x86_init.pci.init())
+                pci_legacy_init();
+
         pcibios_fixup_peer_bridges();
-        pcibios_irq_init();
+        x86_init.pci.init_irq();
         pcibios_init();
 
         return 0;
diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c
index 8f3f9a50b1e..39b9ebe8f88 100644
--- a/arch/x86/pci/mmconfig-shared.c
+++ b/arch/x86/pci/mmconfig-shared.c
@@ -16,6 +16,7 @@
 #include <linux/sfi_acpi.h>
 #include <linux/bitmap.h>
 #include <linux/dmi.h>
+#include <linux/slab.h>
 #include <asm/e820.h>
 #include <asm/pci_x86.h>
 #include <asm/acpi.h>
diff --git a/arch/x86/pci/mrst.c b/arch/x86/pci/mrst.c
new file mode 100644
index 00000000000..8bf2fcb88d0
--- /dev/null
+++ b/arch/x86/pci/mrst.c
@@ -0,0 +1,262 @@
+/*
+ * Moorestown PCI support
+ *   Copyright (c) 2008 Intel Corporation
+ *     Jesse Barnes <jesse.barnes@intel.com>
+ *
+ * Moorestown has an interesting PCI implementation:
+ *   - configuration space is memory mapped (as defined by MCFG)
+ *   - Lincroft devices also have a real, type 1 configuration space
+ *   - Early Lincroft silicon has a type 1 access bug that will cause
+ *     a hang if non-existent devices are accessed
+ *   - some devices have the "fixed BAR" capability, which means
+ *     they can't be relocated or modified; check for that during
+ *     BAR sizing
+ *
+ * So, we use the MCFG space for all reads and writes, but also send
+ * Lincroft writes to type 1 space.  But only read/write if the device
+ * actually exists, otherwise return all 1s for reads and bit bucket
+ * the writes.
+ */
+
+#include <linux/sched.h>
+#include <linux/pci.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/dmi.h>
+
+#include <asm/acpi.h>
+#include <asm/segment.h>
+#include <asm/io.h>
+#include <asm/smp.h>
+#include <asm/pci_x86.h>
+#include <asm/hw_irq.h>
+#include <asm/io_apic.h>
+
+#define PCIE_CAP_OFFSET 0x100
+
+/* Fixed BAR fields */
+#define PCIE_VNDR_CAP_ID_FIXED_BAR 0x00 /* Fixed BAR (TBD) */
+#define PCI_FIXED_BAR_0_SIZE    0x04
+#define PCI_FIXED_BAR_1_SIZE    0x08
+#define PCI_FIXED_BAR_2_SIZE    0x0c
+#define PCI_FIXED_BAR_3_SIZE    0x10
+#define PCI_FIXED_BAR_4_SIZE    0x14
+#define PCI_FIXED_BAR_5_SIZE    0x1c
+
+/**
+ * fixed_bar_cap - return the offset of the fixed BAR cap if found
+ * @bus: PCI bus
+ * @devfn: device in question
+ *
+ * Look for the fixed BAR cap on @bus and @devfn, returning its offset
+ * if found or 0 otherwise.
+ */
+static int fixed_bar_cap(struct pci_bus *bus, unsigned int devfn)
+{
+        int pos;
+        u32 pcie_cap = 0, cap_data;
+
+        pos = PCIE_CAP_OFFSET;
+
+        if (!raw_pci_ext_ops)
+                return 0;
+
+        while (pos) {
+                if (raw_pci_ext_ops->read(pci_domain_nr(bus), bus->number,
+                                          devfn, pos, 4, &pcie_cap))
+                        return 0;
+
+                if (pcie_cap == 0xffffffff)
+                        return 0;
+
+                if (PCI_EXT_CAP_ID(pcie_cap) == PCI_EXT_CAP_ID_VNDR) {
+                        raw_pci_ext_ops->read(pci_domain_nr(bus), bus->number,
+                                              devfn, pos + 4, 4, &cap_data);
+                        if ((cap_data & 0xffff) == PCIE_VNDR_CAP_ID_FIXED_BAR)
+                                return pos;
+                }
+
+                pos = pcie_cap >> 20;
+        }
+
+        return 0;
+}
+
+static int pci_device_update_fixed(struct pci_bus *bus, unsigned int devfn,
+                                   int reg, int len, u32 val, int offset)
+{
+        u32 size;
+        unsigned int domain, busnum;
+        int bar = (reg - PCI_BASE_ADDRESS_0) >> 2;
+
+        domain = pci_domain_nr(bus);
+        busnum = bus->number;
+
+        if (val == ~0 && len == 4) {
+                unsigned long decode;
+
+                raw_pci_ext_ops->read(domain, busnum, devfn,
+                               offset + 8 + (bar * 4), 4, &size);
+
+                /* Turn the size into a decode pattern for the sizing code */
+                if (size) {
+                        decode = size - 1;
+                        decode |= decode >> 1;
+                        decode |= decode >> 2;
+                        decode |= decode >> 4;
+                        decode |= decode >> 8;
+                        decode |= decode >> 16;
+                        decode++;
+                        decode = ~(decode - 1);
+                } else {
+                        decode = ~0;
+                }
+
+                /*
+                 * If val is all ones, the core code is trying to size the reg,
+                 * so update the mmconfig space with the real size.
+                 *
+                 * Note: this assumes the fixed size we got is a power of two.
+                 */
+                return raw_pci_ext_ops->write(domain, busnum, devfn, reg, 4,
+                                       decode);
+        }
+
+        /* This is some other kind of BAR write, so just do it. */
+        return raw_pci_ext_ops->write(domain, busnum, devfn, reg, len, val);
+}
+
+/**
+ * type1_access_ok - check whether to use type 1
+ * @bus: bus number
+ * @devfn: device & function in question
+ *
+ * If the bus is on a Lincroft chip and it exists, or is not on a Lincroft at
+ * all, the we can go ahead with any reads & writes.  If it's on a Lincroft,
+ * but doesn't exist, avoid the access altogether to keep the chip from
+ * hanging.
+ */
+static bool type1_access_ok(unsigned int bus, unsigned int devfn, int reg)
+{
+        /* This is a workaround for A0 LNC bug where PCI status register does
+         * not have new CAP bit set. can not be written by SW either.
+         *
+         * PCI header type in real LNC indicates a single function device, this
+         * will prevent probing other devices under the same function in PCI
+         * shim. Therefore, use the header type in shim instead.
+         */
+        if (reg >= 0x100 || reg == PCI_STATUS || reg == PCI_HEADER_TYPE)
+                return 0;
+        if (bus == 0 && (devfn == PCI_DEVFN(2, 0) || devfn == PCI_DEVFN(0, 0)))
+                return 1;
+        return 0; /* langwell on others */
+}
+
+static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
+                    int size, u32 *value)
+{
+        if (type1_access_ok(bus->number, devfn, where))
+                return pci_direct_conf1.read(pci_domain_nr(bus), bus->number,
+                                        devfn, where, size, value);
+        return raw_pci_ext_ops->read(pci_domain_nr(bus), bus->number,
+                              devfn, where, size, value);
+}
+
+static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
+                     int size, u32 value)
+{
+        int offset;
+
+        /* On MRST, there is no PCI ROM BAR, this will cause a subsequent read
+         * to ROM BAR return 0 then being ignored.
+         */
+        if (where == PCI_ROM_ADDRESS)
+                return 0;
+
+        /*
+         * Devices with fixed BARs need special handling:
+         *   - BAR sizing code will save, write ~0, read size, restore
+         *   - so writes to fixed BARs need special handling
+         *   - other writes to fixed BAR devices should go through mmconfig
+         */
+        offset = fixed_bar_cap(bus, devfn);
+        if (offset &&
+            (where >= PCI_BASE_ADDRESS_0 && where <= PCI_BASE_ADDRESS_5)) {
+                return pci_device_update_fixed(bus, devfn, where, size, value,
+                                               offset);
+        }
+
+        /*
+         * On Moorestown update both real & mmconfig space
+         * Note: early Lincroft silicon can't handle type 1 accesses to
+         *       non-existent devices, so just eat the write in that case.
+         */
+        if (type1_access_ok(bus->number, devfn, where))
+                return pci_direct_conf1.write(pci_domain_nr(bus), bus->number,
+                                              devfn, where, size, value);
+        return raw_pci_ext_ops->write(pci_domain_nr(bus), bus->number, devfn,
+                               where, size, value);
+}
+
+static int mrst_pci_irq_enable(struct pci_dev *dev)
+{
+        u8 pin;
+        struct io_apic_irq_attr irq_attr;
+
+        pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
+
+        /* MRST only have IOAPIC, the PCI irq lines are 1:1 mapped to
+         * IOAPIC RTE entries, so we just enable RTE for the device.
+         */
+        irq_attr.ioapic = mp_find_ioapic(dev->irq);
+        irq_attr.ioapic_pin = dev->irq;
+        irq_attr.trigger = 1; /* level */
+        irq_attr.polarity = 1; /* active low */
+        io_apic_set_pci_routing(&dev->dev, dev->irq, &irq_attr);
+
+        return 0;
+}
+
+struct pci_ops pci_mrst_ops = {
+        .read = pci_read,
+        .write = pci_write,
+};
+
+/**
+ * pci_mrst_init - installs pci_mrst_ops
+ *
+ * Moorestown has an interesting PCI implementation (see above).
+ * Called when the early platform detection installs it.
+ */
+int __init pci_mrst_init(void)
+{
+        printk(KERN_INFO "Moorestown platform detected, using MRST PCI ops\n");
+        pci_mmcfg_late_init();
+        pcibios_enable_irq = mrst_pci_irq_enable;
+        pci_root_ops = pci_mrst_ops;
+        /* Continue with standard init */
+        return 1;
+}
+
+/*
+ * Langwell devices reside at fixed offsets, don't try to move them.
+ */
+static void __devinit pci_fixed_bar_fixup(struct pci_dev *dev)
+{
+        unsigned long offset;
+        u32 size;
+        int i;
+
+        /* Fixup the BAR sizes for fixed BAR devices and make them unmoveable */
+        offset = fixed_bar_cap(dev->bus, dev->devfn);
+        if (!offset || PCI_DEVFN(2, 0) == dev->devfn ||
+            PCI_DEVFN(2, 2) == dev->devfn)
+                return;
+
+        for (i = 0; i < PCI_ROM_RESOURCE; i++) {
+                pci_read_config_dword(dev, offset + 8 + (i * 4), &size);
+                dev->resource[i].end = dev->resource[i].start + size - 1;
+                dev->resource[i].flags |= IORESOURCE_PCI_FIXED;
+        }
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_fixed_bar_fixup);
diff --git a/arch/x86/pci/numaq_32.c b/arch/x86/pci/numaq_32.c
index 8884a1c1ada..8223738ad80 100644
--- a/arch/x86/pci/numaq_32.c
+++ b/arch/x86/pci/numaq_32.c
@@ -148,14 +148,8 @@ int __init pci_numaq_init(void)
 {
         int quad;
 
-        if (!found_numaq)
-                return 0;
-
         raw_pci_ops = &pci_direct_conf1_mq;
 
-        if (pcibios_scanned++)
-                return 0;
-
         pci_root_bus = pcibios_scan_root(0);
         if (pci_root_bus)
                 pci_bus_add_devices(pci_root_bus);
diff --git a/arch/x86/pci/olpc.c b/arch/x86/pci/olpc.c
index b889d824f7c..b34815408f5 100644
--- a/arch/x86/pci/olpc.c
+++ b/arch/x86/pci/olpc.c
@@ -304,9 +304,6 @@ static struct pci_raw_ops pci_olpc_conf = {
 
 int __init pci_olpc_init(void)
 {
-        if (!machine_is_olpc() || olpc_has_vsa())
-                return -ENODEV;
-
         printk(KERN_INFO "PCI: Using configuration type OLPC\n");
         raw_pci_ops = &pci_olpc_conf;
         is_lx = is_geode_lx();
diff --git a/arch/x86/pci/pcbios.c b/arch/x86/pci/pcbios.c
index 1c975cc9839..59a225c17b8 100644
--- a/arch/x86/pci/pcbios.c
+++ b/arch/x86/pci/pcbios.c
@@ -4,6 +4,7 @@
 
 #include <linux/pci.h>
 #include <linux/init.h>
+#include <linux/slab.h>
 #include <linux/module.h>
 #include <linux/uaccess.h>
 #include <asm/pci_x86.h>
diff --git a/arch/x86/pci/visws.c b/arch/x86/pci/visws.c
index bcead7a4687..03008f72eb0 100644
--- a/arch/x86/pci/visws.c
+++ b/arch/x86/pci/visws.c
@@ -69,9 +69,6 @@ void __init pcibios_update_irq(struct pci_dev *dev, int irq)
 
 int __init pci_visws_init(void)
 {
-        if (!is_visws_box())
-                return -1;
-
         pcibios_enable_irq = &pci_visws_enable_irq;
         pcibios_disable_irq = &pci_visws_disable_irq;
 
@@ -90,5 +87,6 @@ int __init pci_visws_init(void)
         pci_scan_bus_with_sysdata(pci_bus1);
         pci_fixup_irqs(pci_common_swizzle, visws_map_irq);
         pcibios_resource_survey();
-        return 0;
+        /* Request bus scan */
+        return 1;
 }
diff --git a/arch/x86/power/hibernate_32.c b/arch/x86/power/hibernate_32.c
index 81197c62d5b..3769079874d 100644
--- a/arch/x86/power/hibernate_32.c
+++ b/arch/x86/power/hibernate_32.c
@@ -6,6 +6,7 @@
  * Copyright (c) 2006 Rafael J. Wysocki <rjw@sisk.pl>
  */
 
+#include <linux/gfp.h>
 #include <linux/suspend.h>
 #include <linux/bootmem.h>
 
diff --git a/arch/x86/power/hibernate_64.c b/arch/x86/power/hibernate_64.c
index 65fdc86e923..d24f983ba1e 100644
--- a/arch/x86/power/hibernate_64.c
+++ b/arch/x86/power/hibernate_64.c
@@ -8,6 +8,7 @@
  * Copyright (c) 2001 Patrick Mochel <mochel@osdl.org>
  */
 
+#include <linux/gfp.h>
 #include <linux/smp.h>
 #include <linux/suspend.h>
 #include <asm/proto.h>
diff --git a/arch/x86/power/hibernate_asm_32.S b/arch/x86/power/hibernate_asm_32.S
index b641388d828..ad47daeafa4 100644
--- a/arch/x86/power/hibernate_asm_32.S
+++ b/arch/x86/power/hibernate_asm_32.S
@@ -27,10 +27,17 @@ ENTRY(swsusp_arch_suspend)
         ret
 
 ENTRY(restore_image)
+        movl    mmu_cr4_features, %ecx
         movl    resume_pg_dir, %eax
         subl    $__PAGE_OFFSET, %eax
         movl    %eax, %cr3
 
+        jecxz   1f      # cr4 Pentium and higher, skip if zero
+        andl    $~(X86_CR4_PGE), %ecx
+        movl    %ecx, %cr4;  # turn off PGE
+        movl    %cr3, %eax;  # flush TLB
+        movl    %eax, %cr3
+1:
         movl    restore_pblist, %edx
         .p2align 4,,7
 
@@ -54,16 +61,8 @@ done:
         movl    $swapper_pg_dir, %eax
         subl    $__PAGE_OFFSET, %eax
         movl    %eax, %cr3
-        /* Flush TLB, including "global" things (vmalloc) */
         movl    mmu_cr4_features, %ecx
         jecxz   1f      # cr4 Pentium and higher, skip if zero
-        movl    %ecx, %edx
-        andl    $~(X86_CR4_PGE), %edx
-        movl    %edx, %cr4;  # turn off PGE
-1:
-        movl    %cr3, %eax;  # flush TLB
-        movl    %eax, %cr3
-        jecxz   1f      # cr4 Pentium and higher, skip if zero
         movl    %ecx, %cr4;  # turn PGE back on
 1:
 
diff --git a/arch/x86/vdso/vma.c b/arch/x86/vdso/vma.c
index 21e1aeb9f3e..ac74869b814 100644
--- a/arch/x86/vdso/vma.c
+++ b/arch/x86/vdso/vma.c
@@ -6,6 +6,7 @@
 #include <linux/mm.h>
 #include <linux/err.h>
 #include <linux/sched.h>
+#include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/random.h>
 #include <linux/elf.h>
diff --git a/arch/x86/xen/debugfs.c b/arch/x86/xen/debugfs.c
index e133ce25e29..1304bcec8ee 100644
--- a/arch/x86/xen/debugfs.c
+++ b/arch/x86/xen/debugfs.c
@@ -1,5 +1,6 @@
 #include <linux/init.h>
 #include <linux/debugfs.h>
+#include <linux/slab.h>
 #include <linux/module.h>
 
 #include "debugfs.h"
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index b607239c1ba..65d8d79b46a 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -28,6 +28,7 @@
 #include <linux/highmem.h>
 #include <linux/console.h>
 #include <linux/pci.h>
+#include <linux/gfp.h>
 
 #include <xen/xen.h>
 #include <xen/interface/xen.h>
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index f9eb7de74f4..914f04695ce 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -43,6 +43,7 @@
 #include <linux/debugfs.h>
 #include <linux/bug.h>
 #include <linux/module.h>
+#include <linux/gfp.h>
 
 #include <asm/pgtable.h>
 #include <asm/tlbflush.h>
diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c
index 563d2050498..a29693fd313 100644
--- a/arch/x86/xen/smp.c
+++ b/arch/x86/xen/smp.c
@@ -14,6 +14,7 @@
  */
 #include <linux/sched.h>
 #include <linux/err.h>
+#include <linux/slab.h>
 #include <linux/smp.h>
 
 #include <asm/paravirt.h>
@@ -361,7 +362,7 @@ static void xen_cpu_die(unsigned int cpu)
                 alternatives_smp_switch(0);
 }
 
-static void __cpuinit xen_play_dead(void) /* used only with CPU_HOTPLUG */
+static void __cpuinit xen_play_dead(void) /* used only with HOTPLUG_CPU */
 {
         play_dead_common();
         HYPERVISOR_vcpu_op(VCPUOP_down, smp_processor_id(), NULL);
diff --git a/arch/x86/xen/spinlock.c b/arch/x86/xen/spinlock.c
index 24ded31b5ae..e0500646585 100644
--- a/arch/x86/xen/spinlock.c
+++ b/arch/x86/xen/spinlock.c
@@ -6,6 +6,7 @@
 #include <linux/spinlock.h>
 #include <linux/debugfs.h>
 #include <linux/log2.h>
+#include <linux/gfp.h>
 
 #include <asm/paravirt.h>
 
diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c
index 0d3f07cd1b5..32764b8880b 100644
--- a/arch/x86/xen/time.c
+++ b/arch/x86/xen/time.c
@@ -13,6 +13,7 @@
 #include <linux/clockchips.h>
 #include <linux/kernel_stat.h>
 #include <linux/math64.h>
+#include <linux/gfp.h>
 
 #include <asm/pvclock.h>
 #include <asm/xen/hypervisor.h>
diff --git a/arch/xtensa/include/asm/pci.h b/arch/xtensa/include/asm/pci.h
index 66410acf18b..4609b0f15f1 100644
--- a/arch/xtensa/include/asm/pci.h
+++ b/arch/xtensa/include/asm/pci.h
@@ -56,14 +56,6 @@ struct pci_dev;
 
 #define PCI_DMA_BUS_IS_PHYS     (1)
 
-/* pci_unmap_{page,single} is a no-op, so */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
-#define pci_unmap_addr(PTR, ADDR_NAME)          (0)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
-#define pci_ubnmap_len(PTR, LEN_NAME)           (0)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL)   do { } while (0)
-
 /* Map a range of PCI memory or I/O space for a device into user space */
 int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
                         enum pci_mmap_state mmap_state, int write_combine);
diff --git a/arch/xtensa/include/asm/ptrace.h b/arch/xtensa/include/asm/ptrace.h
index 905e1e61965..3c549f79872 100644
--- a/arch/xtensa/include/asm/ptrace.h
+++ b/arch/xtensa/include/asm/ptrace.h
@@ -113,6 +113,7 @@ struct pt_regs {
 
 #include <variant/core.h>
 
+# define arch_has_single_step() (1)
 # define task_pt_regs(tsk) ((struct pt_regs*) \
   (task_stack_page(tsk) + KERNEL_STACK_SIZE - (XCHAL_NUM_AREGS-16)*4) - 1)
 # define user_mode(regs) (((regs)->ps & 0x00000020)!=0)
diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S
index 80d24c485fd..77fc9f6dc01 100644
--- a/arch/xtensa/kernel/entry.S
+++ b/arch/xtensa/kernel/entry.S
@@ -104,7 +104,7 @@
  *   excsave has been restored, and
  *   stack pointer (a1) has been set.
  *
- * Note: _user_exception might be at an odd adress. Don't use call0..call12
+ * Note: _user_exception might be at an odd address. Don't use call0..call12
  */
 
 ENTRY(user_exception)
@@ -244,7 +244,7 @@ _user_exception:
  *   excsave has been restored, and
  *   stack pointer (a1) has been set.
  *
- * Note: _kernel_exception might be at an odd adress. Don't use call0..call12
+ * Note: _kernel_exception might be at an odd address. Don't use call0..call12
  */
 
 ENTRY(kernel_exception)
diff --git a/arch/xtensa/kernel/pci-dma.c b/arch/xtensa/kernel/pci-dma.c
index f5319d78c87..2783fda76dd 100644
--- a/arch/xtensa/kernel/pci-dma.c
+++ b/arch/xtensa/kernel/pci-dma.c
@@ -20,6 +20,7 @@
 #include <linux/mm.h>
 #include <linux/string.h>
 #include <linux/pci.h>
+#include <linux/gfp.h>
 #include <asm/io.h>
 #include <asm/cacheflush.h>
 
diff --git a/arch/xtensa/kernel/process.c b/arch/xtensa/kernel/process.c
index e1a04a346e7..f167e0f5e05 100644
--- a/arch/xtensa/kernel/process.c
+++ b/arch/xtensa/kernel/process.c
@@ -23,7 +23,6 @@
 #include <linux/stddef.h>
 #include <linux/unistd.h>
 #include <linux/ptrace.h>
-#include <linux/slab.h>
 #include <linux/elf.h>
 #include <linux/init.h>
 #include <linux/prctl.h>
@@ -31,6 +30,7 @@
 #include <linux/module.h>
 #include <linux/mqueue.h>
 #include <linux/fs.h>
+#include <linux/slab.h>
 
 #include <asm/pgtable.h>
 #include <asm/uaccess.h>
diff --git a/arch/xtensa/kernel/ptrace.c b/arch/xtensa/kernel/ptrace.c
index 9486882ef0a..9d4e1ceb3f0 100644
--- a/arch/xtensa/kernel/ptrace.c
+++ b/arch/xtensa/kernel/ptrace.c
@@ -30,6 +30,17 @@
 #include <asm/elf.h>
 #include <asm/coprocessor.h>
 
+
+void user_enable_single_step(struct task_struct *child)
+{
+        child->ptrace |= PT_SINGLESTEP;
+}
+
+void user_disable_single_step(struct task_struct *child)
+{
+        child->ptrace &= ~PT_SINGLESTEP;
+}
+
 /*
  * Called by kernel/ptrace.c when detaching to disable single stepping.
  */
@@ -268,51 +279,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 ret = ptrace_pokeusr(child, addr, data);
                 break;
 
-        /* continue and stop at next (return from) syscall */
-
-        case PTRACE_SYSCALL:
-        case PTRACE_CONT: /* restart after signal. */
-        {
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                if (request == PTRACE_SYSCALL)
-                        set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                else
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                child->exit_code = data;
-                /* Make sure the single step bit is not set. */
-                child->ptrace &= ~PT_SINGLESTEP;
-                wake_up_process(child);
-                ret = 0;
-                break;
-        }
-
-        /*
-         * make the child exit.  Best I can do is send it a sigkill.
-         * perhaps it should be put in the status that it wants to
-         * exit.
-         */
-        case PTRACE_KILL:
-                ret = 0;
-                if (child->exit_state == EXIT_ZOMBIE)   /* already dead */
-                        break;
-                child->exit_code = SIGKILL;
-                child->ptrace &= ~PT_SINGLESTEP;
-                wake_up_process(child);
-                break;
-
-        case PTRACE_SINGLESTEP:
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                child->ptrace |= PT_SINGLESTEP;
-                child->exit_code = data;
-                wake_up_process(child);
-                ret = 0;
-                break;
-
         case PTRACE_GETREGS:
                 ret = ptrace_getregs(child, (void __user *) data);
                 break;
diff --git a/arch/xtensa/mm/init.c b/arch/xtensa/mm/init.c
index cdbc27ca966..ba150e5de2e 100644
--- a/arch/xtensa/mm/init.c
+++ b/arch/xtensa/mm/init.c
@@ -18,11 +18,11 @@
 #include <linux/kernel.h>
 #include <linux/errno.h>
 #include <linux/bootmem.h>
+#include <linux/gfp.h>
 #include <linux/swap.h>
 #include <linux/mman.h>
 #include <linux/nodemask.h>
 #include <linux/mm.h>
-#include <linux/slab.h>
 
 #include <asm/bootparam.h>
 #include <asm/page.h>
diff --git a/arch/xtensa/platforms/iss/console.c b/arch/xtensa/platforms/iss/console.c
index e60a1f57022..2c723e8b30d 100644
--- a/arch/xtensa/platforms/iss/console.c
+++ b/arch/xtensa/platforms/iss/console.c
@@ -14,7 +14,6 @@
 #include <linux/sched.h>
 #include <linux/console.h>
 #include <linux/init.h>
-#include <linux/slab.h>
 #include <linux/mm.h>
 #include <linux/major.h>
 #include <linux/param.h>