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authorPawel Moll <pawel.moll@arm.com>2011-05-20 09:39:28 -0400
committerWill Deacon <will.deacon@arm.com>2011-07-07 14:20:52 -0400
commitdc939cd835d0e2d3ff4197d6e2c017d269616d20 (patch)
treedc20e12126ed0f1c0901a3dcb93da97549998ee6 /arch
parent18b9dc130c33de2d1fd46bd668e67d0e1a544b16 (diff)
ARM: proc: convert v7 proc infos into a common macro
As most of the proc info content is common across all v7 processors, this patch converts existing A9 and generic v7 descriptions into a macro (allowing extra flags in future). Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mm/proc-v7.S67
1 files changed, 24 insertions, 43 deletions
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index a2e1ee87a2c..a759ccafeac 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -421,33 +421,36 @@ __v7_setup_stack:
421 421
422 .section ".proc.info.init", #alloc, #execinstr 422 .section ".proc.info.init", #alloc, #execinstr
423 423
424 .type __v7_ca9mp_proc_info, #object 424 /*
425__v7_ca9mp_proc_info: 425 * Standard v7 proc info content
426 .long 0x410fc090 @ Required ID value 426 */
427 .long 0xff0ffff0 @ Mask for ID 427.macro __v7_proc initfunc, mm_mmuflags = 0, io_mmuflags = 0, hwcaps = 0
428 ALT_SMP(.long \ 428 ALT_SMP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | \
429 PMD_TYPE_SECT | \ 429 PMD_FLAGS_SMP | \mm_mmuflags)
430 PMD_SECT_AP_WRITE | \ 430 ALT_UP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | \
431 PMD_SECT_AP_READ | \ 431 PMD_FLAGS_UP | \mm_mmuflags)
432 PMD_FLAGS_SMP) 432 .long PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_AP_WRITE | \
433 ALT_UP(.long \ 433 PMD_SECT_AP_READ | \io_mmuflags
434 PMD_TYPE_SECT | \ 434 W(b) \initfunc
435 PMD_SECT_AP_WRITE | \
436 PMD_SECT_AP_READ | \
437 PMD_FLAGS_UP)
438 .long PMD_TYPE_SECT | \
439 PMD_SECT_XN | \
440 PMD_SECT_AP_WRITE | \
441 PMD_SECT_AP_READ
442 W(b) __v7_ca9mp_setup
443 .long cpu_arch_name 435 .long cpu_arch_name
444 .long cpu_elf_name 436 .long cpu_elf_name
445 .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS 437 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB | HWCAP_FAST_MULT | \
438 HWCAP_EDSP | HWCAP_TLS | \hwcaps
446 .long cpu_v7_name 439 .long cpu_v7_name
447 .long v7_processor_functions 440 .long v7_processor_functions
448 .long v7wbi_tlb_fns 441 .long v7wbi_tlb_fns
449 .long v6_user_fns 442 .long v6_user_fns
450 .long v7_cache_fns 443 .long v7_cache_fns
444.endm
445
446 /*
447 * ARM Ltd. Cortex A9 processor.
448 */
449 .type __v7_ca9mp_proc_info, #object
450__v7_ca9mp_proc_info:
451 .long 0x410fc090
452 .long 0xff0ffff0
453 __v7_proc __v7_ca9mp_setup
451 .size __v7_ca9mp_proc_info, . - __v7_ca9mp_proc_info 454 .size __v7_ca9mp_proc_info, . - __v7_ca9mp_proc_info
452 455
453 /* 456 /*
@@ -457,27 +460,5 @@ __v7_ca9mp_proc_info:
457__v7_proc_info: 460__v7_proc_info:
458 .long 0x000f0000 @ Required ID value 461 .long 0x000f0000 @ Required ID value
459 .long 0x000f0000 @ Mask for ID 462 .long 0x000f0000 @ Mask for ID
460 ALT_SMP(.long \ 463 __v7_proc __v7_setup
461 PMD_TYPE_SECT | \
462 PMD_SECT_AP_WRITE | \
463 PMD_SECT_AP_READ | \
464 PMD_FLAGS_SMP)
465 ALT_UP(.long \
466 PMD_TYPE_SECT | \
467 PMD_SECT_AP_WRITE | \
468 PMD_SECT_AP_READ | \
469 PMD_FLAGS_UP)
470 .long PMD_TYPE_SECT | \
471 PMD_SECT_XN | \
472 PMD_SECT_AP_WRITE | \
473 PMD_SECT_AP_READ
474 W(b) __v7_setup
475 .long cpu_arch_name
476 .long cpu_elf_name
477 .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS
478 .long cpu_v7_name
479 .long v7_processor_functions
480 .long v7wbi_tlb_fns
481 .long v6_user_fns
482 .long v7_cache_fns
483 .size __v7_proc_info, . - __v7_proc_info 464 .size __v7_proc_info, . - __v7_proc_info