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authorBen Dooks <ben-linux@fluff.org>2005-06-23 16:56:47 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-06-23 16:56:47 -0400
commitd97a666f36cf051e1b1c60505be3d6e9b51f785f (patch)
tree2a4c9fda11b55f86354566f8a1253eb62cb7b86a /arch
parentd9dc58049d3ed5c63c1a6ac82c217558b4ec623a (diff)
[PATCH] ARM: 2729/1: DM9000 platform support for S3C2410 machines (BAST, VR1000)
Patch from Ben Dooks Add platform_device information for DM9000 chip(s) on the Simtec BAST and the VR1000 board. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-s3c2410/mach-bast.c49
-rw-r--r--arch/arm/mach-s3c2410/mach-vr1000.c77
2 files changed, 117 insertions, 9 deletions
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index 3bb97eb6e69..f3e970039b6 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -26,6 +26,7 @@
26 * 03-Mar-2005 BJD Ensured that bast-cpld.h is included 26 * 03-Mar-2005 BJD Ensured that bast-cpld.h is included
27 * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA 27 * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
28 * 14-Mar-2006 BJD Updated for __iomem changes 28 * 14-Mar-2006 BJD Updated for __iomem changes
29 * 22-Jun-2006 BJD Added DM9000 platform information
29*/ 30*/
30 31
31#include <linux/kernel.h> 32#include <linux/kernel.h>
@@ -35,6 +36,7 @@
35#include <linux/timer.h> 36#include <linux/timer.h>
36#include <linux/init.h> 37#include <linux/init.h>
37#include <linux/device.h> 38#include <linux/device.h>
39#include <linux/dm9000.h>
38 40
39#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
40#include <asm/mach/map.h> 42#include <asm/mach/map.h>
@@ -53,6 +55,7 @@
53#include <asm/arch/regs-serial.h> 55#include <asm/arch/regs-serial.h>
54#include <asm/arch/regs-gpio.h> 56#include <asm/arch/regs-gpio.h>
55#include <asm/arch/regs-mem.h> 57#include <asm/arch/regs-mem.h>
58#include <asm/arch/regs-lcd.h>
56#include <asm/arch/nand.h> 59#include <asm/arch/nand.h>
57 60
58#include <linux/mtd/mtd.h> 61#include <linux/mtd/mtd.h>
@@ -112,7 +115,6 @@ static struct map_desc bast_iodesc[] __initdata = {
112 { VA_C2(BAST_VA_ISAMEM), PA_CS2(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE }, 115 { VA_C2(BAST_VA_ISAMEM), PA_CS2(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE },
113 { VA_C2(BAST_VA_ASIXNET), PA_CS3(BAST_PA_ASIXNET), SZ_1M, MT_DEVICE }, 116 { VA_C2(BAST_VA_ASIXNET), PA_CS3(BAST_PA_ASIXNET), SZ_1M, MT_DEVICE },
114 { VA_C2(BAST_VA_SUPERIO), PA_CS2(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE }, 117 { VA_C2(BAST_VA_SUPERIO), PA_CS2(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE },
115 { VA_C2(BAST_VA_DM9000), PA_CS2(BAST_PA_DM9000), SZ_1M, MT_DEVICE },
116 { VA_C2(BAST_VA_IDEPRI), PA_CS3(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE }, 118 { VA_C2(BAST_VA_IDEPRI), PA_CS3(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE },
117 { VA_C2(BAST_VA_IDESEC), PA_CS3(BAST_PA_IDESEC), SZ_1M, MT_DEVICE }, 119 { VA_C2(BAST_VA_IDESEC), PA_CS3(BAST_PA_IDESEC), SZ_1M, MT_DEVICE },
118 { VA_C2(BAST_VA_IDEPRIAUX), PA_CS3(BAST_PA_IDEPRIAUX), SZ_1M, MT_DEVICE }, 120 { VA_C2(BAST_VA_IDEPRIAUX), PA_CS3(BAST_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
@@ -123,7 +125,6 @@ static struct map_desc bast_iodesc[] __initdata = {
123 { VA_C3(BAST_VA_ISAMEM), PA_CS3(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE }, 125 { VA_C3(BAST_VA_ISAMEM), PA_CS3(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE },
124 { VA_C3(BAST_VA_ASIXNET), PA_CS3(BAST_PA_ASIXNET), SZ_1M, MT_DEVICE }, 126 { VA_C3(BAST_VA_ASIXNET), PA_CS3(BAST_PA_ASIXNET), SZ_1M, MT_DEVICE },
125 { VA_C3(BAST_VA_SUPERIO), PA_CS3(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE }, 127 { VA_C3(BAST_VA_SUPERIO), PA_CS3(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE },
126 { VA_C3(BAST_VA_DM9000), PA_CS3(BAST_PA_DM9000), SZ_1M, MT_DEVICE },
127 { VA_C3(BAST_VA_IDEPRI), PA_CS3(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE }, 128 { VA_C3(BAST_VA_IDEPRI), PA_CS3(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE },
128 { VA_C3(BAST_VA_IDESEC), PA_CS3(BAST_PA_IDESEC), SZ_1M, MT_DEVICE }, 129 { VA_C3(BAST_VA_IDESEC), PA_CS3(BAST_PA_IDESEC), SZ_1M, MT_DEVICE },
129 { VA_C3(BAST_VA_IDEPRIAUX), PA_CS3(BAST_PA_IDEPRIAUX), SZ_1M, MT_DEVICE }, 130 { VA_C3(BAST_VA_IDEPRIAUX), PA_CS3(BAST_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
@@ -134,7 +135,6 @@ static struct map_desc bast_iodesc[] __initdata = {
134 { VA_C4(BAST_VA_ISAMEM), PA_CS4(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE }, 135 { VA_C4(BAST_VA_ISAMEM), PA_CS4(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE },
135 { VA_C4(BAST_VA_ASIXNET), PA_CS5(BAST_PA_ASIXNET), SZ_1M, MT_DEVICE }, 136 { VA_C4(BAST_VA_ASIXNET), PA_CS5(BAST_PA_ASIXNET), SZ_1M, MT_DEVICE },
136 { VA_C4(BAST_VA_SUPERIO), PA_CS4(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE }, 137 { VA_C4(BAST_VA_SUPERIO), PA_CS4(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE },
137 { VA_C4(BAST_VA_DM9000), PA_CS4(BAST_PA_DM9000), SZ_1M, MT_DEVICE },
138 { VA_C4(BAST_VA_IDEPRI), PA_CS5(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE }, 138 { VA_C4(BAST_VA_IDEPRI), PA_CS5(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE },
139 { VA_C4(BAST_VA_IDESEC), PA_CS5(BAST_PA_IDESEC), SZ_1M, MT_DEVICE }, 139 { VA_C4(BAST_VA_IDESEC), PA_CS5(BAST_PA_IDESEC), SZ_1M, MT_DEVICE },
140 { VA_C4(BAST_VA_IDEPRIAUX), PA_CS5(BAST_PA_IDEPRIAUX), SZ_1M, MT_DEVICE }, 140 { VA_C4(BAST_VA_IDEPRIAUX), PA_CS5(BAST_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
@@ -145,7 +145,6 @@ static struct map_desc bast_iodesc[] __initdata = {
145 { VA_C5(BAST_VA_ISAMEM), PA_CS5(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE }, 145 { VA_C5(BAST_VA_ISAMEM), PA_CS5(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE },
146 { VA_C5(BAST_VA_ASIXNET), PA_CS5(BAST_PA_ASIXNET), SZ_1M, MT_DEVICE }, 146 { VA_C5(BAST_VA_ASIXNET), PA_CS5(BAST_PA_ASIXNET), SZ_1M, MT_DEVICE },
147 { VA_C5(BAST_VA_SUPERIO), PA_CS5(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE }, 147 { VA_C5(BAST_VA_SUPERIO), PA_CS5(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE },
148 { VA_C5(BAST_VA_DM9000), PA_CS5(BAST_PA_DM9000), SZ_1M, MT_DEVICE },
149 { VA_C5(BAST_VA_IDEPRI), PA_CS5(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE }, 148 { VA_C5(BAST_VA_IDEPRI), PA_CS5(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE },
150 { VA_C5(BAST_VA_IDESEC), PA_CS5(BAST_PA_IDESEC), SZ_1M, MT_DEVICE }, 149 { VA_C5(BAST_VA_IDESEC), PA_CS5(BAST_PA_IDESEC), SZ_1M, MT_DEVICE },
151 { VA_C5(BAST_VA_IDEPRIAUX), PA_CS5(BAST_PA_IDEPRIAUX), SZ_1M, MT_DEVICE }, 150 { VA_C5(BAST_VA_IDEPRIAUX), PA_CS5(BAST_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
@@ -313,6 +312,45 @@ static struct s3c2410_platform_nand bast_nand_info = {
313 .select_chip = bast_nand_select, 312 .select_chip = bast_nand_select,
314}; 313};
315 314
315/* DM9000 */
316
317static struct resource bast_dm9k_resource[] = {
318 [0] = {
319 .start = S3C2410_CS5 + BAST_PA_DM9000,
320 .end = S3C2410_CS5 + BAST_PA_DM9000 + 3,
321 .flags = IORESOURCE_MEM
322 },
323 [1] = {
324 .start = S3C2410_CS5 + BAST_PA_DM9000 + 0x40,
325 .end = S3C2410_CS5 + BAST_PA_DM9000 + 0x40 + 0x3f,
326 .flags = IORESOURCE_MEM
327 },
328 [2] = {
329 .start = IRQ_DM9000,
330 .end = IRQ_DM9000,
331 .flags = IORESOURCE_IRQ
332 }
333
334};
335
336/* for the moment we limit ourselves to 16bit IO until some
337 * better IO routines can be written and tested
338*/
339
340struct dm9000_plat_data bast_dm9k_platdata = {
341 .flags = DM9000_PLATF_16BITONLY
342};
343
344static struct platform_device bast_device_dm9k = {
345 .name = "dm9000",
346 .id = 0,
347 .num_resources = ARRAY_SIZE(bast_dm9k_resource),
348 .resource = bast_dm9k_resource,
349 .dev = {
350 .platform_data = &bast_dm9k_platdata,
351 }
352};
353
316 354
317/* Standard BAST devices */ 355/* Standard BAST devices */
318 356
@@ -324,7 +362,8 @@ static struct platform_device *bast_devices[] __initdata = {
324 &s3c_device_iis, 362 &s3c_device_iis,
325 &s3c_device_rtc, 363 &s3c_device_rtc,
326 &s3c_device_nand, 364 &s3c_device_nand,
327 &bast_device_nor 365 &bast_device_nor,
366 &bast_device_dm9k,
328}; 367};
329 368
330static struct clk *bast_clocks[] = { 369static struct clk *bast_clocks[] = {
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index 5512146b1ce..76be074944a 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -27,6 +27,7 @@
27 * 10-Feb-2005 BJD Added power-off capability 27 * 10-Feb-2005 BJD Added power-off capability
28 * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA 28 * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
29 * 14-Mar-2006 BJD void __iomem fixes 29 * 14-Mar-2006 BJD void __iomem fixes
30 * 22-Jun-2006 BJD Added DM9000 platform information
30*/ 31*/
31 32
32#include <linux/kernel.h> 33#include <linux/kernel.h>
@@ -35,6 +36,7 @@
35#include <linux/list.h> 36#include <linux/list.h>
36#include <linux/timer.h> 37#include <linux/timer.h>
37#include <linux/init.h> 38#include <linux/init.h>
39#include <linux/dm9000.h>
38 40
39#include <linux/serial.h> 41#include <linux/serial.h>
40#include <linux/tty.h> 42#include <linux/tty.h>
@@ -98,28 +100,24 @@ static struct map_desc vr1000_iodesc[] __initdata = {
98 * are only 8bit */ 100 * are only 8bit */
99 101
100 /* slow, byte */ 102 /* slow, byte */
101 { VA_C2(VR1000_VA_DM9000), PA_CS2(VR1000_PA_DM9000), SZ_1M, MT_DEVICE },
102 { VA_C2(VR1000_VA_IDEPRI), PA_CS3(VR1000_PA_IDEPRI), SZ_1M, MT_DEVICE }, 103 { VA_C2(VR1000_VA_IDEPRI), PA_CS3(VR1000_PA_IDEPRI), SZ_1M, MT_DEVICE },
103 { VA_C2(VR1000_VA_IDESEC), PA_CS3(VR1000_PA_IDESEC), SZ_1M, MT_DEVICE }, 104 { VA_C2(VR1000_VA_IDESEC), PA_CS3(VR1000_PA_IDESEC), SZ_1M, MT_DEVICE },
104 { VA_C2(VR1000_VA_IDEPRIAUX), PA_CS3(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE }, 105 { VA_C2(VR1000_VA_IDEPRIAUX), PA_CS3(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
105 { VA_C2(VR1000_VA_IDESECAUX), PA_CS3(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE }, 106 { VA_C2(VR1000_VA_IDESECAUX), PA_CS3(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE },
106 107
107 /* slow, word */ 108 /* slow, word */
108 { VA_C3(VR1000_VA_DM9000), PA_CS3(VR1000_PA_DM9000), SZ_1M, MT_DEVICE },
109 { VA_C3(VR1000_VA_IDEPRI), PA_CS3(VR1000_PA_IDEPRI), SZ_1M, MT_DEVICE }, 109 { VA_C3(VR1000_VA_IDEPRI), PA_CS3(VR1000_PA_IDEPRI), SZ_1M, MT_DEVICE },
110 { VA_C3(VR1000_VA_IDESEC), PA_CS3(VR1000_PA_IDESEC), SZ_1M, MT_DEVICE }, 110 { VA_C3(VR1000_VA_IDESEC), PA_CS3(VR1000_PA_IDESEC), SZ_1M, MT_DEVICE },
111 { VA_C3(VR1000_VA_IDEPRIAUX), PA_CS3(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE }, 111 { VA_C3(VR1000_VA_IDEPRIAUX), PA_CS3(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
112 { VA_C3(VR1000_VA_IDESECAUX), PA_CS3(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE }, 112 { VA_C3(VR1000_VA_IDESECAUX), PA_CS3(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE },
113 113
114 /* fast, byte */ 114 /* fast, byte */
115 { VA_C4(VR1000_VA_DM9000), PA_CS4(VR1000_PA_DM9000), SZ_1M, MT_DEVICE },
116 { VA_C4(VR1000_VA_IDEPRI), PA_CS5(VR1000_PA_IDEPRI), SZ_1M, MT_DEVICE }, 115 { VA_C4(VR1000_VA_IDEPRI), PA_CS5(VR1000_PA_IDEPRI), SZ_1M, MT_DEVICE },
117 { VA_C4(VR1000_VA_IDESEC), PA_CS5(VR1000_PA_IDESEC), SZ_1M, MT_DEVICE }, 116 { VA_C4(VR1000_VA_IDESEC), PA_CS5(VR1000_PA_IDESEC), SZ_1M, MT_DEVICE },
118 { VA_C4(VR1000_VA_IDEPRIAUX), PA_CS5(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE }, 117 { VA_C4(VR1000_VA_IDEPRIAUX), PA_CS5(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
119 { VA_C4(VR1000_VA_IDESECAUX), PA_CS5(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE }, 118 { VA_C4(VR1000_VA_IDESECAUX), PA_CS5(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE },
120 119
121 /* fast, word */ 120 /* fast, word */
122 { VA_C5(VR1000_VA_DM9000), PA_CS5(VR1000_PA_DM9000), SZ_1M, MT_DEVICE },
123 { VA_C5(VR1000_VA_IDEPRI), PA_CS5(VR1000_PA_IDEPRI), SZ_1M, MT_DEVICE }, 121 { VA_C5(VR1000_VA_IDEPRI), PA_CS5(VR1000_PA_IDEPRI), SZ_1M, MT_DEVICE },
124 { VA_C5(VR1000_VA_IDESEC), PA_CS5(VR1000_PA_IDESEC), SZ_1M, MT_DEVICE }, 122 { VA_C5(VR1000_VA_IDESEC), PA_CS5(VR1000_PA_IDESEC), SZ_1M, MT_DEVICE },
125 { VA_C5(VR1000_VA_IDEPRIAUX), PA_CS5(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE }, 123 { VA_C5(VR1000_VA_IDEPRIAUX), PA_CS5(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
@@ -246,6 +244,74 @@ static struct platform_device vr1000_nor = {
246 .resource = vr1000_nor_resource, 244 .resource = vr1000_nor_resource,
247}; 245};
248 246
247/* DM9000 ethernet devices */
248
249static struct resource vr1000_dm9k0_resource[] = {
250 [0] = {
251 .start = S3C2410_CS5 + VR1000_PA_DM9000,
252 .end = S3C2410_CS5 + VR1000_PA_DM9000 + 3,
253 .flags = IORESOURCE_MEM
254 },
255 [1] = {
256 .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x40,
257 .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x7f,
258 .flags = IORESOURCE_MEM
259 },
260 [2] = {
261 .start = IRQ_VR1000_DM9000A,
262 .end = IRQ_VR1000_DM9000A,
263 .flags = IORESOURCE_IRQ
264 }
265
266};
267
268static struct resource vr1000_dm9k1_resource[] = {
269 [0] = {
270 .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x80,
271 .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x83,
272 .flags = IORESOURCE_MEM
273 },
274 [1] = {
275 .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0,
276 .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0xFF,
277 .flags = IORESOURCE_MEM
278 },
279 [2] = {
280 .start = IRQ_VR1000_DM9000N,
281 .end = IRQ_VR1000_DM9000N,
282 .flags = IORESOURCE_IRQ
283 }
284};
285
286/* for the moment we limit ourselves to 16bit IO until some
287 * better IO routines can be written and tested
288*/
289
290struct dm9000_plat_data vr1000_dm9k_platdata = {
291 .flags = DM9000_PLATF_16BITONLY,
292};
293
294static struct platform_device vr1000_dm9k0 = {
295 .name = "dm9000",
296 .id = 0,
297 .num_resources = ARRAY_SIZE(vr1000_dm9k0_resource),
298 .resource = vr1000_dm9k0_resource,
299 .dev = {
300 .platform_data = &vr1000_dm9k_platdata,
301 }
302};
303
304static struct platform_device vr1000_dm9k1 = {
305 .name = "dm9000",
306 .id = 1,
307 .num_resources = ARRAY_SIZE(vr1000_dm9k1_resource),
308 .resource = vr1000_dm9k1_resource,
309 .dev = {
310 .platform_data = &vr1000_dm9k_platdata,
311 }
312};
313
314/* devices for this board */
249 315
250static struct platform_device *vr1000_devices[] __initdata = { 316static struct platform_device *vr1000_devices[] __initdata = {
251 &s3c_device_usb, 317 &s3c_device_usb,
@@ -253,8 +319,11 @@ static struct platform_device *vr1000_devices[] __initdata = {
253 &s3c_device_wdt, 319 &s3c_device_wdt,
254 &s3c_device_i2c, 320 &s3c_device_i2c,
255 &s3c_device_iis, 321 &s3c_device_iis,
322 &s3c_device_adc,
256 &serial_device, 323 &serial_device,
257 &vr1000_nor, 324 &vr1000_nor,
325 &vr1000_dm9k0,
326 &vr1000_dm9k1
258}; 327};
259 328
260static struct clk *vr1000_clocks[] = { 329static struct clk *vr1000_clocks[] = {