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authorDaniel Jacobowitz <drow@false.org>2005-11-19 05:01:07 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-11-19 05:01:07 -0500
commita6c61e9dfdd0adf8443932cfc43b0c1e25036ad5 (patch)
tree68e09d27ce1ef0aecbe11fb9eb139fba92e1afe9 /arch
parentd2c5b69099ff747f9757da2416383b9a999171b1 (diff)
[ARM] 3168/1: Update ARM signal delivery and masking
Patch from Daniel Jacobowitz After delivering a signal (creating its stack frame) we must check for additional pending unblocked signals before returning to userspace. Otherwise signals may be delayed past the next syscall or reschedule. Once that was fixed it became obvious that the ARM signal mask manipulation was broken. It was a little bit broken before the recent SA_NODEFER changes, and then very broken after them. We must block the requested signals before starting the handler or the same signal can be delivered again before the handler even gets a chance to run. Signed-off-by: Daniel Jacobowitz <dan@codesourcery.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/kernel/entry-common.S3
-rw-r--r--arch/arm/kernel/signal.c25
-rw-r--r--arch/arm/mm/Makefile2
-rw-r--r--arch/arm/mm/blockops.c185
4 files changed, 14 insertions, 201 deletions
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 066597f4345..f7f18307523 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -48,8 +48,7 @@ work_pending:
48 mov r0, sp @ 'regs' 48 mov r0, sp @ 'regs'
49 mov r2, why @ 'syscall' 49 mov r2, why @ 'syscall'
50 bl do_notify_resume 50 bl do_notify_resume
51 disable_irq @ disable interrupts 51 b ret_slow_syscall @ Check work again
52 b no_work_pending
53 52
54work_resched: 53work_resched:
55 bl schedule 54 bl schedule
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index a917e3dd366..765922bcf9e 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -595,23 +595,22 @@ handle_signal(unsigned long sig, struct k_sigaction *ka,
595 */ 595 */
596 ret |= !valid_user_regs(regs); 596 ret |= !valid_user_regs(regs);
597 597
598 /*
599 * Block the signal if we were unsuccessful.
600 */
601 if (ret != 0) { 598 if (ret != 0) {
602 spin_lock_irq(&tsk->sighand->siglock); 599 force_sigsegv(sig, tsk);
603 sigorsets(&tsk->blocked, &tsk->blocked, 600 return;
604 &ka->sa.sa_mask);
605 if (!(ka->sa.sa_flags & SA_NODEFER))
606 sigaddset(&tsk->blocked, sig);
607 recalc_sigpending();
608 spin_unlock_irq(&tsk->sighand->siglock);
609 } 601 }
610 602
611 if (ret == 0) 603 /*
612 return; 604 * Block the signal if we were successful.
605 */
606 spin_lock_irq(&tsk->sighand->siglock);
607 sigorsets(&tsk->blocked, &tsk->blocked,
608 &ka->sa.sa_mask);
609 if (!(ka->sa.sa_flags & SA_NODEFER))
610 sigaddset(&tsk->blocked, sig);
611 recalc_sigpending();
612 spin_unlock_irq(&tsk->sighand->siglock);
613 613
614 force_sigsegv(sig, tsk);
615} 614}
616 615
617/* 616/*
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
index 59f47d4c2df..ffe73ba2bf1 100644
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
@@ -51,4 +51,4 @@ obj-$(CONFIG_CPU_ARM1026) += proc-arm1026.o
51obj-$(CONFIG_CPU_SA110) += proc-sa110.o 51obj-$(CONFIG_CPU_SA110) += proc-sa110.o
52obj-$(CONFIG_CPU_SA1100) += proc-sa1100.o 52obj-$(CONFIG_CPU_SA1100) += proc-sa1100.o
53obj-$(CONFIG_CPU_XSCALE) += proc-xscale.o 53obj-$(CONFIG_CPU_XSCALE) += proc-xscale.o
54obj-$(CONFIG_CPU_V6) += proc-v6.o blockops.o 54obj-$(CONFIG_CPU_V6) += proc-v6.o
diff --git a/arch/arm/mm/blockops.c b/arch/arm/mm/blockops.c
deleted file mode 100644
index 4f5ee2d0899..00000000000
--- a/arch/arm/mm/blockops.c
+++ /dev/null
@@ -1,185 +0,0 @@
1#include <linux/kernel.h>
2#include <linux/init.h>
3#include <linux/errno.h>
4#include <linux/mm.h>
5
6#include <asm/memory.h>
7#include <asm/ptrace.h>
8#include <asm/cacheflush.h>
9#include <asm/traps.h>
10
11extern struct cpu_cache_fns blk_cache_fns;
12
13#define HARVARD_CACHE
14
15/*
16 * blk_flush_kern_dcache_page(kaddr)
17 *
18 * Ensure that the data held in the page kaddr is written back
19 * to the page in question.
20 *
21 * - kaddr - kernel address (guaranteed to be page aligned)
22 */
23static void __attribute__((naked))
24blk_flush_kern_dcache_page(void *kaddr)
25{
26 asm(
27 "add r1, r0, %0 \n\
28 sub r1, r1, %1 \n\
291: .word 0xec401f0e @ mcrr p15, 0, r0, r1, c14, 0 @ blocking \n\
30 mov r0, #0 \n\
31 mcr p15, 0, r0, c7, c5, 0 \n\
32 mcr p15, 0, r0, c7, c10, 4 \n\
33 mov pc, lr"
34 :
35 : "I" (PAGE_SIZE), "I" (L1_CACHE_BYTES));
36}
37
38/*
39 * blk_dma_inv_range(start,end)
40 *
41 * Invalidate the data cache within the specified region; we will
42 * be performing a DMA operation in this region and we want to
43 * purge old data in the cache.
44 *
45 * - start - virtual start address of region
46 * - end - virtual end address of region
47 */
48static void __attribute__((naked))
49blk_dma_inv_range_unified(unsigned long start, unsigned long end)
50{
51 asm(
52 "tst r0, %0 \n\
53 mcrne p15, 0, r0, c7, c11, 1 @ clean unified line \n\
54 tst r1, %0 \n\
55 mcrne p15, 0, r1, c7, c15, 1 @ clean & invalidate unified line\n\
56 .word 0xec401f06 @ mcrr p15, 0, r1, r0, c6, 0 @ blocking \n\
57 mov r0, #0 \n\
58 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer \n\
59 mov pc, lr"
60 :
61 : "I" (L1_CACHE_BYTES - 1));
62}
63
64static void __attribute__((naked))
65blk_dma_inv_range_harvard(unsigned long start, unsigned long end)
66{
67 asm(
68 "tst r0, %0 \n\
69 mcrne p15, 0, r0, c7, c10, 1 @ clean D line \n\
70 tst r1, %0 \n\
71 mcrne p15, 0, r1, c7, c14, 1 @ clean & invalidate D line \n\
72 .word 0xec401f06 @ mcrr p15, 0, r1, r0, c6, 0 @ blocking \n\
73 mov r0, #0 \n\
74 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer \n\
75 mov pc, lr"
76 :
77 : "I" (L1_CACHE_BYTES - 1));
78}
79
80/*
81 * blk_dma_clean_range(start,end)
82 * - start - virtual start address of region
83 * - end - virtual end address of region
84 */
85static void __attribute__((naked))
86blk_dma_clean_range(unsigned long start, unsigned long end)
87{
88 asm(
89 ".word 0xec401f0c @ mcrr p15, 0, r1, r0, c12, 0 @ blocking \n\
90 mov r0, #0 \n\
91 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer \n\
92 mov pc, lr");
93}
94
95/*
96 * blk_dma_flush_range(start,end)
97 * - start - virtual start address of region
98 * - end - virtual end address of region
99 */
100static void __attribute__((naked))
101blk_dma_flush_range(unsigned long start, unsigned long end)
102{
103 asm(
104 ".word 0xec401f0e @ mcrr p15, 0, r1, r0, c14, 0 @ blocking \n\
105 mov pc, lr");
106}
107
108static int blockops_trap(struct pt_regs *regs, unsigned int instr)
109{
110 regs->ARM_r4 |= regs->ARM_r2;
111 regs->ARM_pc += 4;
112 return 0;
113}
114
115static char *func[] = {
116 "Prefetch data range",
117 "Clean+Invalidate data range",
118 "Clean data range",
119 "Invalidate data range",
120 "Invalidate instr range"
121};
122
123static struct undef_hook blockops_hook __initdata = {
124 .instr_mask = 0x0fffffd0,
125 .instr_val = 0x0c401f00,
126 .cpsr_mask = PSR_T_BIT,
127 .cpsr_val = 0,
128 .fn = blockops_trap,
129};
130
131static int __init blockops_check(void)
132{
133 register unsigned int err asm("r4") = 0;
134 unsigned int err_pos = 1;
135 unsigned int cache_type;
136 int i;
137
138 asm("mrc p15, 0, %0, c0, c0, 1" : "=r" (cache_type));
139
140 printk("Checking V6 block cache operations:\n");
141 register_undef_hook(&blockops_hook);
142
143 __asm__ ("mov r0, %0\n\t"
144 "mov r1, %1\n\t"
145 "mov r2, #1\n\t"
146 ".word 0xec401f2c @ mcrr p15, 0, r1, r0, c12, 2\n\t"
147 "mov r2, #2\n\t"
148 ".word 0xec401f0e @ mcrr p15, 0, r1, r0, c14, 0\n\t"
149 "mov r2, #4\n\t"
150 ".word 0xec401f0c @ mcrr p15, 0, r1, r0, c12, 0\n\t"
151 "mov r2, #8\n\t"
152 ".word 0xec401f06 @ mcrr p15, 0, r1, r0, c6, 0\n\t"
153 "mov r2, #16\n\t"
154 ".word 0xec401f05 @ mcrr p15, 0, r1, r0, c5, 0\n\t"
155 :
156 : "r" (PAGE_OFFSET), "r" (PAGE_OFFSET + 128)
157 : "r0", "r1", "r2");
158
159 unregister_undef_hook(&blockops_hook);
160
161 for (i = 0; i < ARRAY_SIZE(func); i++, err_pos <<= 1)
162 printk("%30s: %ssupported\n", func[i], err & err_pos ? "not " : "");
163
164 if ((err & 8) == 0) {
165 printk(" --> Using %s block cache invalidate\n",
166 cache_type & (1 << 24) ? "harvard" : "unified");
167 if (cache_type & (1 << 24))
168 cpu_cache.dma_inv_range = blk_dma_inv_range_harvard;
169 else
170 cpu_cache.dma_inv_range = blk_dma_inv_range_unified;
171 }
172 if ((err & 4) == 0) {
173 printk(" --> Using block cache clean\n");
174 cpu_cache.dma_clean_range = blk_dma_clean_range;
175 }
176 if ((err & 2) == 0) {
177 printk(" --> Using block cache clean+invalidate\n");
178 cpu_cache.dma_flush_range = blk_dma_flush_range;
179 cpu_cache.flush_kern_dcache_page = blk_flush_kern_dcache_page;
180 }
181
182 return 0;
183}
184
185__initcall(blockops_check);
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