Merge commit 'v2.6.38' into x86/mm

Conflicts:
	arch/x86/mm/numa_64.c

Merge reason: Resolve the conflict, update the branch to .38.

Signed-off-by: Ingo Molnar <mingo@elte.hu>

196 files changed, 1727 insertions, 1284 deletions

diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index 47f63d48014..cc31bec2e31 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -11,6 +11,7 @@ config ALPHA
         select HAVE_GENERIC_HARDIRQS
         select GENERIC_IRQ_PROBE
         select AUTO_IRQ_AFFINITY if SMP
+        select GENERIC_HARDIRQS_NO_DEPRECATED
         help
           The Alpha is a 64-bit general-purpose processor designed and
           marketed by the Digital Equipment Corporation of blessed memory,
diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c
index 9ab234f48dd..a19d6008229 100644
--- a/arch/alpha/kernel/irq.c
+++ b/arch/alpha/kernel/irq.c
@@ -44,11 +44,16 @@ static char irq_user_affinity[NR_IRQS];
 
 int irq_select_affinity(unsigned int irq)
 {
-        struct irq_desc *desc = irq_to_desc[irq];
+        struct irq_data *data = irq_get_irq_data(irq);
+        struct irq_chip *chip;
         static int last_cpu;
         int cpu = last_cpu + 1;
 
-        if (!desc || !get_irq_desc_chip(desc)->set_affinity || irq_user_affinity[irq])
+        if (!data)
+                return 1;
+        chip = irq_data_get_irq_chip(data);
+
+        if (!chip->irq_set_affinity || irq_user_affinity[irq])
                 return 1;
 
         while (!cpu_possible(cpu) ||
@@ -56,8 +61,8 @@ int irq_select_affinity(unsigned int irq)
                 cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0);
         last_cpu = cpu;
 
-        cpumask_copy(desc->affinity, cpumask_of(cpu));
-        get_irq_desc_chip(desc)->set_affinity(irq, cpumask_of(cpu));
+        cpumask_copy(data->affinity, cpumask_of(cpu));
+        chip->irq_set_affinity(data, cpumask_of(cpu), false);
         return 0;
 }
 #endif /* CONFIG_SMP */
diff --git a/arch/alpha/kernel/irq_alpha.c b/arch/alpha/kernel/irq_alpha.c
index 2d0679b6093..411ca11d0a1 100644
--- a/arch/alpha/kernel/irq_alpha.c
+++ b/arch/alpha/kernel/irq_alpha.c
@@ -228,14 +228,9 @@ struct irqaction timer_irqaction = {
 void __init
 init_rtc_irq(void)
 {
-        struct irq_desc *desc = irq_to_desc(RTC_IRQ);
-
-        if (desc) {
-                desc->status |= IRQ_DISABLED;
-                set_irq_chip_and_handler_name(RTC_IRQ, &no_irq_chip,
-                        handle_simple_irq, "RTC");
-                setup_irq(RTC_IRQ, &timer_irqaction);
-        }
+        set_irq_chip_and_handler_name(RTC_IRQ, &no_irq_chip,
+                                      handle_simple_irq, "RTC");
+        setup_irq(RTC_IRQ, &timer_irqaction);
 }
 
 /* Dummy irqactions.  */
diff --git a/arch/alpha/kernel/irq_i8259.c b/arch/alpha/kernel/irq_i8259.c
index 956ea0ed169..c7cc9813e45 100644
--- a/arch/alpha/kernel/irq_i8259.c
+++ b/arch/alpha/kernel/irq_i8259.c
@@ -33,10 +33,10 @@ i8259_update_irq_hw(unsigned int irq, unsigned long mask)
 }
 
 inline void
-i8259a_enable_irq(unsigned int irq)
+i8259a_enable_irq(struct irq_data *d)
 {
         spin_lock(&i8259_irq_lock);
-        i8259_update_irq_hw(irq, cached_irq_mask &= ~(1 << irq));
+        i8259_update_irq_hw(d->irq, cached_irq_mask &= ~(1 << d->irq));
         spin_unlock(&i8259_irq_lock);
 }
 
@@ -47,16 +47,18 @@ __i8259a_disable_irq(unsigned int irq)
 }
 
 void
-i8259a_disable_irq(unsigned int irq)
+i8259a_disable_irq(struct irq_data *d)
 {
         spin_lock(&i8259_irq_lock);
-        __i8259a_disable_irq(irq);
+        __i8259a_disable_irq(d->irq);
         spin_unlock(&i8259_irq_lock);
 }
 
 void
-i8259a_mask_and_ack_irq(unsigned int irq)
+i8259a_mask_and_ack_irq(struct irq_data *d)
 {
+        unsigned int irq = d->irq;
+
         spin_lock(&i8259_irq_lock);
         __i8259a_disable_irq(irq);
 
@@ -71,9 +73,9 @@ i8259a_mask_and_ack_irq(unsigned int irq)
 
 struct irq_chip i8259a_irq_type = {
         .name           = "XT-PIC",
-        .unmask         = i8259a_enable_irq,
-        .mask           = i8259a_disable_irq,
-        .mask_ack       = i8259a_mask_and_ack_irq,
+        .irq_unmask     = i8259a_enable_irq,
+        .irq_mask       = i8259a_disable_irq,
+        .irq_mask_ack   = i8259a_mask_and_ack_irq,
 };
 
 void __init
diff --git a/arch/alpha/kernel/irq_impl.h b/arch/alpha/kernel/irq_impl.h
index b63ccd7386f..d507a234b05 100644
--- a/arch/alpha/kernel/irq_impl.h
+++ b/arch/alpha/kernel/irq_impl.h
@@ -31,11 +31,9 @@ extern void init_rtc_irq(void);
 
 extern void common_init_isa_dma(void);
 
-extern void i8259a_enable_irq(unsigned int);
-extern void i8259a_disable_irq(unsigned int);
-extern void i8259a_mask_and_ack_irq(unsigned int);
-extern unsigned int i8259a_startup_irq(unsigned int);
-extern void i8259a_end_irq(unsigned int);
+extern void i8259a_enable_irq(struct irq_data *d);
+extern void i8259a_disable_irq(struct irq_data *d);
+extern void i8259a_mask_and_ack_irq(struct irq_data *d);
 extern struct irq_chip i8259a_irq_type;
 extern void init_i8259a_irqs(void);
 
diff --git a/arch/alpha/kernel/irq_pyxis.c b/arch/alpha/kernel/irq_pyxis.c
index 2863458c853..b30227fa7f5 100644
--- a/arch/alpha/kernel/irq_pyxis.c
+++ b/arch/alpha/kernel/irq_pyxis.c
@@ -29,21 +29,21 @@ pyxis_update_irq_hw(unsigned long mask)
 }
 
 static inline void
-pyxis_enable_irq(unsigned int irq)
+pyxis_enable_irq(struct irq_data *d)
 {
-        pyxis_update_irq_hw(cached_irq_mask |= 1UL << (irq - 16));
+        pyxis_update_irq_hw(cached_irq_mask |= 1UL << (d->irq - 16));
 }
 
 static void
-pyxis_disable_irq(unsigned int irq)
+pyxis_disable_irq(struct irq_data *d)
 {
-        pyxis_update_irq_hw(cached_irq_mask &= ~(1UL << (irq - 16)));
+        pyxis_update_irq_hw(cached_irq_mask &= ~(1UL << (d->irq - 16)));
 }
 
 static void
-pyxis_mask_and_ack_irq(unsigned int irq)
+pyxis_mask_and_ack_irq(struct irq_data *d)
 {
-        unsigned long bit = 1UL << (irq - 16);
+        unsigned long bit = 1UL << (d->irq - 16);
         unsigned long mask = cached_irq_mask &= ~bit;
 
         /* Disable the interrupt.  */
@@ -58,9 +58,9 @@ pyxis_mask_and_ack_irq(unsigned int irq)
 
 static struct irq_chip pyxis_irq_type = {
         .name           = "PYXIS",
-        .mask_ack       = pyxis_mask_and_ack_irq,
-        .mask           = pyxis_disable_irq,
-        .unmask         = pyxis_enable_irq,
+        .irq_mask_ack   = pyxis_mask_and_ack_irq,
+        .irq_mask       = pyxis_disable_irq,
+        .irq_unmask     = pyxis_enable_irq,
 };
 
 void 
@@ -103,7 +103,7 @@ init_pyxis_irqs(unsigned long ignore_mask)
                 if ((ignore_mask >> i) & 1)
                         continue;
                 set_irq_chip_and_handler(i, &pyxis_irq_type, handle_level_irq);
-                irq_to_desc(i)->status |= IRQ_LEVEL;
+                irq_set_status_flags(i, IRQ_LEVEL);
         }
 
         setup_irq(16+7, &isa_cascade_irqaction);
diff --git a/arch/alpha/kernel/irq_srm.c b/arch/alpha/kernel/irq_srm.c
index 0e57e828b41..82a47bba41c 100644
--- a/arch/alpha/kernel/irq_srm.c
+++ b/arch/alpha/kernel/irq_srm.c
@@ -18,27 +18,27 @@
 DEFINE_SPINLOCK(srm_irq_lock);
 
 static inline void
-srm_enable_irq(unsigned int irq)
+srm_enable_irq(struct irq_data *d)
 {
         spin_lock(&srm_irq_lock);
-        cserve_ena(irq - 16);
+        cserve_ena(d->irq - 16);
         spin_unlock(&srm_irq_lock);
 }
 
 static void
-srm_disable_irq(unsigned int irq)
+srm_disable_irq(struct irq_data *d)
 {
         spin_lock(&srm_irq_lock);
-        cserve_dis(irq - 16);
+        cserve_dis(d->irq - 16);
         spin_unlock(&srm_irq_lock);
 }
 
 /* Handle interrupts from the SRM, assuming no additional weirdness.  */
 static struct irq_chip srm_irq_type = {
         .name           = "SRM",
-        .unmask         = srm_enable_irq,
-        .mask           = srm_disable_irq,
-        .mask_ack       = srm_disable_irq,
+        .irq_unmask     = srm_enable_irq,
+        .irq_mask       = srm_disable_irq,
+        .irq_mask_ack   = srm_disable_irq,
 };
 
 void __init
@@ -52,7 +52,7 @@ init_srm_irqs(long max, unsigned long ignore_mask)
                 if (i < 64 && ((ignore_mask >> i) & 1))
                         continue;
                 set_irq_chip_and_handler(i, &srm_irq_type, handle_level_irq);
-                irq_to_desc(i)->status |= IRQ_LEVEL;
+                irq_set_status_flags(i, IRQ_LEVEL);
         }
 }
 
diff --git a/arch/alpha/kernel/sys_alcor.c b/arch/alpha/kernel/sys_alcor.c
index 7bef6176823..88d95e872f5 100644
--- a/arch/alpha/kernel/sys_alcor.c
+++ b/arch/alpha/kernel/sys_alcor.c
@@ -44,31 +44,31 @@ alcor_update_irq_hw(unsigned long mask)
 }
 
 static inline void
-alcor_enable_irq(unsigned int irq)
+alcor_enable_irq(struct irq_data *d)
 {
-        alcor_update_irq_hw(cached_irq_mask |= 1UL << (irq - 16));
+        alcor_update_irq_hw(cached_irq_mask |= 1UL << (d->irq - 16));
 }
 
 static void
-alcor_disable_irq(unsigned int irq)
+alcor_disable_irq(struct irq_data *d)
 {
-        alcor_update_irq_hw(cached_irq_mask &= ~(1UL << (irq - 16)));
+        alcor_update_irq_hw(cached_irq_mask &= ~(1UL << (d->irq - 16)));
 }
 
 static void
-alcor_mask_and_ack_irq(unsigned int irq)
+alcor_mask_and_ack_irq(struct irq_data *d)
 {
-        alcor_disable_irq(irq);
+        alcor_disable_irq(d);
 
         /* On ALCOR/XLT, need to dismiss interrupt via GRU. */
-        *(vuip)GRU_INT_CLEAR = 1 << (irq - 16); mb();
+        *(vuip)GRU_INT_CLEAR = 1 << (d->irq - 16); mb();
         *(vuip)GRU_INT_CLEAR = 0; mb();
 }
 
 static void
-alcor_isa_mask_and_ack_irq(unsigned int irq)
+alcor_isa_mask_and_ack_irq(struct irq_data *d)
 {
-        i8259a_mask_and_ack_irq(irq);
+        i8259a_mask_and_ack_irq(d);
 
         /* On ALCOR/XLT, need to dismiss interrupt via GRU. */
         *(vuip)GRU_INT_CLEAR = 0x80000000; mb();
@@ -77,9 +77,9 @@ alcor_isa_mask_and_ack_irq(unsigned int irq)
 
 static struct irq_chip alcor_irq_type = {
         .name           = "ALCOR",
-        .unmask         = alcor_enable_irq,
-        .mask           = alcor_disable_irq,
-        .mask_ack       = alcor_mask_and_ack_irq,
+        .irq_unmask     = alcor_enable_irq,
+        .irq_mask       = alcor_disable_irq,
+        .irq_mask_ack   = alcor_mask_and_ack_irq,
 };
 
 static void
@@ -126,9 +126,9 @@ alcor_init_irq(void)
                 if (i >= 16+20 && i <= 16+30)
                         continue;
                 set_irq_chip_and_handler(i, &alcor_irq_type, handle_level_irq);
-                irq_to_desc(i)->status |= IRQ_LEVEL;
+                irq_set_status_flags(i, IRQ_LEVEL);
         }
-        i8259a_irq_type.ack = alcor_isa_mask_and_ack_irq;
+        i8259a_irq_type.irq_ack = alcor_isa_mask_and_ack_irq;
 
         init_i8259a_irqs();
         common_init_isa_dma();
diff --git a/arch/alpha/kernel/sys_cabriolet.c b/arch/alpha/kernel/sys_cabriolet.c
index b0c916493ae..57eb6307bc2 100644
--- a/arch/alpha/kernel/sys_cabriolet.c
+++ b/arch/alpha/kernel/sys_cabriolet.c
@@ -46,22 +46,22 @@ cabriolet_update_irq_hw(unsigned int irq, unsigned long mask)
 }
 
 static inline void
-cabriolet_enable_irq(unsigned int irq)
+cabriolet_enable_irq(struct irq_data *d)
 {
-        cabriolet_update_irq_hw(irq, cached_irq_mask &= ~(1UL << irq));
+        cabriolet_update_irq_hw(d->irq, cached_irq_mask &= ~(1UL << d->irq));
 }
 
 static void
-cabriolet_disable_irq(unsigned int irq)
+cabriolet_disable_irq(struct irq_data *d)
 {
-        cabriolet_update_irq_hw(irq, cached_irq_mask |= 1UL << irq);
+        cabriolet_update_irq_hw(d->irq, cached_irq_mask |= 1UL << d->irq);
 }
 
 static struct irq_chip cabriolet_irq_type = {
         .name           = "CABRIOLET",
-        .unmask         = cabriolet_enable_irq,
-        .mask           = cabriolet_disable_irq,
-        .mask_ack       = cabriolet_disable_irq,
+        .irq_unmask     = cabriolet_enable_irq,
+        .irq_mask       = cabriolet_disable_irq,
+        .irq_mask_ack   = cabriolet_disable_irq,
 };
 
 static void 
@@ -107,7 +107,7 @@ common_init_irq(void (*srm_dev_int)(unsigned long v))
                 for (i = 16; i < 35; ++i) {
                         set_irq_chip_and_handler(i, &cabriolet_irq_type,
                                 handle_level_irq);
-                        irq_to_desc(i)->status |= IRQ_LEVEL;
+                        irq_set_status_flags(i, IRQ_LEVEL);
                 }
         }
 
diff --git a/arch/alpha/kernel/sys_dp264.c b/arch/alpha/kernel/sys_dp264.c
index edad5f759cc..481df4ecb65 100644
--- a/arch/alpha/kernel/sys_dp264.c
+++ b/arch/alpha/kernel/sys_dp264.c
@@ -98,37 +98,37 @@ tsunami_update_irq_hw(unsigned long mask)
 }
 
 static void
-dp264_enable_irq(unsigned int irq)
+dp264_enable_irq(struct irq_data *d)
 {
         spin_lock(&dp264_irq_lock);
-        cached_irq_mask |= 1UL << irq;
+        cached_irq_mask |= 1UL << d->irq;
         tsunami_update_irq_hw(cached_irq_mask);
         spin_unlock(&dp264_irq_lock);
 }
 
 static void
-dp264_disable_irq(unsigned int irq)
+dp264_disable_irq(struct irq_data *d)
 {
         spin_lock(&dp264_irq_lock);
-        cached_irq_mask &= ~(1UL << irq);
+        cached_irq_mask &= ~(1UL << d->irq);
         tsunami_update_irq_hw(cached_irq_mask);
         spin_unlock(&dp264_irq_lock);
 }
 
 static void
-clipper_enable_irq(unsigned int irq)
+clipper_enable_irq(struct irq_data *d)
 {
         spin_lock(&dp264_irq_lock);
-        cached_irq_mask |= 1UL << (irq - 16);
+        cached_irq_mask |= 1UL << (d->irq - 16);
         tsunami_update_irq_hw(cached_irq_mask);
         spin_unlock(&dp264_irq_lock);
 }
 
 static void
-clipper_disable_irq(unsigned int irq)
+clipper_disable_irq(struct irq_data *d)
 {
         spin_lock(&dp264_irq_lock);
-        cached_irq_mask &= ~(1UL << (irq - 16));
+        cached_irq_mask &= ~(1UL << (d->irq - 16));
         tsunami_update_irq_hw(cached_irq_mask);
         spin_unlock(&dp264_irq_lock);
 }
@@ -149,10 +149,11 @@ cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity)
 }
 
 static int
-dp264_set_affinity(unsigned int irq, const struct cpumask *affinity)
-{ 
+dp264_set_affinity(struct irq_data *d, const struct cpumask *affinity,
+                   bool force)
+{
         spin_lock(&dp264_irq_lock);
-        cpu_set_irq_affinity(irq, *affinity);
+        cpu_set_irq_affinity(d->irq, *affinity);
         tsunami_update_irq_hw(cached_irq_mask);
         spin_unlock(&dp264_irq_lock);
 
@@ -160,10 +161,11 @@ dp264_set_affinity(unsigned int irq, const struct cpumask *affinity)
 }
 
 static int
-clipper_set_affinity(unsigned int irq, const struct cpumask *affinity)
-{ 
+clipper_set_affinity(struct irq_data *d, const struct cpumask *affinity,
+                     bool force)
+{
         spin_lock(&dp264_irq_lock);
-        cpu_set_irq_affinity(irq - 16, *affinity);
+        cpu_set_irq_affinity(d->irq - 16, *affinity);
         tsunami_update_irq_hw(cached_irq_mask);
         spin_unlock(&dp264_irq_lock);
 
@@ -171,19 +173,19 @@ clipper_set_affinity(unsigned int irq, const struct cpumask *affinity)
 }
 
 static struct irq_chip dp264_irq_type = {
-        .name           = "DP264",
-        .unmask         = dp264_enable_irq,
-        .mask           = dp264_disable_irq,
-        .mask_ack       = dp264_disable_irq,
-        .set_affinity   = dp264_set_affinity,
+        .name                   = "DP264",
+        .irq_unmask             = dp264_enable_irq,
+        .irq_mask               = dp264_disable_irq,
+        .irq_mask_ack           = dp264_disable_irq,
+        .irq_set_affinity       = dp264_set_affinity,
 };
 
 static struct irq_chip clipper_irq_type = {
-        .name           = "CLIPPER",
-        .unmask         = clipper_enable_irq,
-        .mask           = clipper_disable_irq,
-        .mask_ack       = clipper_disable_irq,
-        .set_affinity   = clipper_set_affinity,
+        .name                   = "CLIPPER",
+        .irq_unmask             = clipper_enable_irq,
+        .irq_mask               = clipper_disable_irq,
+        .irq_mask_ack           = clipper_disable_irq,
+        .irq_set_affinity       = clipper_set_affinity,
 };
 
 static void
@@ -268,8 +270,8 @@ init_tsunami_irqs(struct irq_chip * ops, int imin, int imax)
 {
         long i;
         for (i = imin; i <= imax; ++i) {
-                irq_to_desc(i)->status |= IRQ_LEVEL;
                 set_irq_chip_and_handler(i, ops, handle_level_irq);
+                irq_set_status_flags(i, IRQ_LEVEL);
         }
 }
 
diff --git a/arch/alpha/kernel/sys_eb64p.c b/arch/alpha/kernel/sys_eb64p.c
index ae5f29d127b..402e908ffb3 100644
--- a/arch/alpha/kernel/sys_eb64p.c
+++ b/arch/alpha/kernel/sys_eb64p.c
@@ -44,22 +44,22 @@ eb64p_update_irq_hw(unsigned int irq, unsigned long mask)
 }
 
 static inline void
-eb64p_enable_irq(unsigned int irq)
+eb64p_enable_irq(struct irq_data *d)
 {
-        eb64p_update_irq_hw(irq, cached_irq_mask &= ~(1 << irq));
+        eb64p_update_irq_hw(d->irq, cached_irq_mask &= ~(1 << d->irq));
 }
 
 static void
-eb64p_disable_irq(unsigned int irq)
+eb64p_disable_irq(struct irq_data *d)
 {
-        eb64p_update_irq_hw(irq, cached_irq_mask |= 1 << irq);
+        eb64p_update_irq_hw(d->irq, cached_irq_mask |= 1 << d->irq);
 }
 
 static struct irq_chip eb64p_irq_type = {
         .name           = "EB64P",
-        .unmask         = eb64p_enable_irq,
-        .mask           = eb64p_disable_irq,
-        .mask_ack       = eb64p_disable_irq,
+        .irq_unmask     = eb64p_enable_irq,
+        .irq_mask       = eb64p_disable_irq,
+        .irq_mask_ack   = eb64p_disable_irq,
 };
 
 static void 
@@ -118,9 +118,9 @@ eb64p_init_irq(void)
         init_i8259a_irqs();
 
         for (i = 16; i < 32; ++i) {
-                irq_to_desc(i)->status |= IRQ_LEVEL;
                 set_irq_chip_and_handler(i, &eb64p_irq_type, handle_level_irq);
-        }               
+                irq_set_status_flags(i, IRQ_LEVEL);
+        }
 
         common_init_isa_dma();
         setup_irq(16+5, &isa_cascade_irqaction);
diff --git a/arch/alpha/kernel/sys_eiger.c b/arch/alpha/kernel/sys_eiger.c
index 1121bc5c6c6..0b44a54c152 100644
--- a/arch/alpha/kernel/sys_eiger.c
+++ b/arch/alpha/kernel/sys_eiger.c
@@ -51,16 +51,18 @@ eiger_update_irq_hw(unsigned long irq, unsigned long mask)
 }
 
 static inline void
-eiger_enable_irq(unsigned int irq)
+eiger_enable_irq(struct irq_data *d)
 {
+        unsigned int irq = d->irq;
         unsigned long mask;
         mask = (cached_irq_mask[irq >= 64] &= ~(1UL << (irq & 63)));
         eiger_update_irq_hw(irq, mask);
 }
 
 static void
-eiger_disable_irq(unsigned int irq)
+eiger_disable_irq(struct irq_data *d)
 {
+        unsigned int irq = d->irq;
         unsigned long mask;
         mask = (cached_irq_mask[irq >= 64] |= 1UL << (irq & 63));
         eiger_update_irq_hw(irq, mask);
@@ -68,9 +70,9 @@ eiger_disable_irq(unsigned int irq)
 
 static struct irq_chip eiger_irq_type = {
         .name           = "EIGER",
-        .unmask         = eiger_enable_irq,
-        .mask           = eiger_disable_irq,
-        .mask_ack       = eiger_disable_irq,
+        .irq_unmask     = eiger_enable_irq,
+        .irq_mask       = eiger_disable_irq,
+        .irq_mask_ack   = eiger_disable_irq,
 };
 
 static void
@@ -136,8 +138,8 @@ eiger_init_irq(void)
         init_i8259a_irqs();
 
         for (i = 16; i < 128; ++i) {
-                irq_to_desc(i)->status |= IRQ_LEVEL;
                 set_irq_chip_and_handler(i, &eiger_irq_type, handle_level_irq);
+                irq_set_status_flags(i, IRQ_LEVEL);
         }
 }
 
diff --git a/arch/alpha/kernel/sys_jensen.c b/arch/alpha/kernel/sys_jensen.c
index 34f55e03d33..00341b75c8b 100644
--- a/arch/alpha/kernel/sys_jensen.c
+++ b/arch/alpha/kernel/sys_jensen.c
@@ -63,34 +63,34 @@
  */
 
 static void
-jensen_local_enable(unsigned int irq)
+jensen_local_enable(struct irq_data *d)
 {
         /* the parport is really hw IRQ 1, silly Jensen.  */
-        if (irq == 7)
-                i8259a_enable_irq(1);
+        if (d->irq == 7)
+                i8259a_enable_irq(d);
 }
 
 static void
-jensen_local_disable(unsigned int irq)
+jensen_local_disable(struct irq_data *d)
 {
         /* the parport is really hw IRQ 1, silly Jensen.  */
-        if (irq == 7)
-                i8259a_disable_irq(1);
+        if (d->irq == 7)
+                i8259a_disable_irq(d);
 }
 
 static void
-jensen_local_mask_ack(unsigned int irq)
+jensen_local_mask_ack(struct irq_data *d)
 {
         /* the parport is really hw IRQ 1, silly Jensen.  */
-        if (irq == 7)
-                i8259a_mask_and_ack_irq(1);
+        if (d->irq == 7)
+                i8259a_mask_and_ack_irq(d);
 }
 
 static struct irq_chip jensen_local_irq_type = {
         .name           = "LOCAL",
-        .unmask         = jensen_local_enable,
-        .mask           = jensen_local_disable,
-        .mask_ack       = jensen_local_mask_ack,
+        .irq_unmask     = jensen_local_enable,
+        .irq_mask       = jensen_local_disable,
+        .irq_mask_ack   = jensen_local_mask_ack,
 };
 
 static void 
diff --git a/arch/alpha/kernel/sys_marvel.c b/arch/alpha/kernel/sys_marvel.c
index 2bfc9f1b1dd..e61910734e4 100644
--- a/arch/alpha/kernel/sys_marvel.c
+++ b/arch/alpha/kernel/sys_marvel.c
@@ -104,9 +104,10 @@ io7_get_irq_ctl(unsigned int irq, struct io7 **pio7)
 }
 
 static void
-io7_enable_irq(unsigned int irq)
+io7_enable_irq(struct irq_data *d)
 {
         volatile unsigned long *ctl;
+        unsigned int irq = d->irq;
         struct io7 *io7;
 
         ctl = io7_get_irq_ctl(irq, &io7);
@@ -115,7 +116,7 @@ io7_enable_irq(unsigned int irq)
                        __func__, irq);
                 return;
         }
-                
+
         spin_lock(&io7->irq_lock);
         *ctl |= 1UL << 24;
         mb();
@@ -124,9 +125,10 @@ io7_enable_irq(unsigned int irq)
 }
 
 static void
-io7_disable_irq(unsigned int irq)
+io7_disable_irq(struct irq_data *d)
 {
         volatile unsigned long *ctl;
+        unsigned int irq = d->irq;
         struct io7 *io7;
 
         ctl = io7_get_irq_ctl(irq, &io7);
@@ -135,7 +137,7 @@ io7_disable_irq(unsigned int irq)
                        __func__, irq);
                 return;
         }
-                
+
         spin_lock(&io7->irq_lock);
         *ctl &= ~(1UL << 24);
         mb();
@@ -144,35 +146,29 @@ io7_disable_irq(unsigned int irq)
 }
 
 static void
-marvel_irq_noop(unsigned int irq) 
-{ 
-        return; 
-}
-
-static unsigned int
-marvel_irq_noop_return(unsigned int irq) 
-{ 
-        return 0; 
+marvel_irq_noop(struct irq_data *d)
+{
+        return;
 }
 
 static struct irq_chip marvel_legacy_irq_type = {
         .name           = "LEGACY",
-        .mask           = marvel_irq_noop,
-        .unmask         = marvel_irq_noop,
+        .irq_mask       = marvel_irq_noop,
+        .irq_unmask     = marvel_irq_noop,
 };
 
 static struct irq_chip io7_lsi_irq_type = {
         .name           = "LSI",
-        .unmask         = io7_enable_irq,
-        .mask           = io7_disable_irq,
-        .mask_ack       = io7_disable_irq,
+        .irq_unmask     = io7_enable_irq,
+        .irq_mask       = io7_disable_irq,
+        .irq_mask_ack   = io7_disable_irq,
 };
 
 static struct irq_chip io7_msi_irq_type = {
         .name           = "MSI",
-        .unmask         = io7_enable_irq,
-        .mask           = io7_disable_irq,
-        .ack            = marvel_irq_noop,
+        .irq_unmask     = io7_enable_irq,
+        .irq_mask       = io7_disable_irq,
+        .irq_ack        = marvel_irq_noop,
 };
 
 static void
@@ -280,8 +276,8 @@ init_io7_irqs(struct io7 *io7,
 
         /* Set up the lsi irqs.  */
         for (i = 0; i < 128; ++i) {
-                irq_to_desc(base + i)->status |= IRQ_LEVEL;
                 set_irq_chip_and_handler(base + i, lsi_ops, handle_level_irq);
+                irq_set_status_flags(i, IRQ_LEVEL);
         }
 
         /* Disable the implemented irqs in hardware.  */
@@ -294,8 +290,8 @@ init_io7_irqs(struct io7 *io7,
 
         /* Set up the msi irqs.  */
         for (i = 128; i < (128 + 512); ++i) {
-                irq_to_desc(base + i)->status |= IRQ_LEVEL;
                 set_irq_chip_and_handler(base + i, msi_ops, handle_level_irq);
+                irq_set_status_flags(i, IRQ_LEVEL);
         }
 
         for (i = 0; i < 16; ++i)
diff --git a/arch/alpha/kernel/sys_mikasa.c b/arch/alpha/kernel/sys_mikasa.c
index bcc1639e8ef..cf7f43dd314 100644
--- a/arch/alpha/kernel/sys_mikasa.c
+++ b/arch/alpha/kernel/sys_mikasa.c
@@ -43,22 +43,22 @@ mikasa_update_irq_hw(int mask)
 }
 
 static inline void
-mikasa_enable_irq(unsigned int irq)
+mikasa_enable_irq(struct irq_data *d)
 {
-        mikasa_update_irq_hw(cached_irq_mask |= 1 << (irq - 16));
+        mikasa_update_irq_hw(cached_irq_mask |= 1 << (d->irq - 16));
 }
 
 static void
-mikasa_disable_irq(unsigned int irq)
+mikasa_disable_irq(struct irq_data *d)
 {
-        mikasa_update_irq_hw(cached_irq_mask &= ~(1 << (irq - 16)));
+        mikasa_update_irq_hw(cached_irq_mask &= ~(1 << (d->irq - 16)));
 }
 
 static struct irq_chip mikasa_irq_type = {
         .name           = "MIKASA",
-        .unmask         = mikasa_enable_irq,
-        .mask           = mikasa_disable_irq,
-        .mask_ack       = mikasa_disable_irq,
+        .irq_unmask     = mikasa_enable_irq,
+        .irq_mask       = mikasa_disable_irq,
+        .irq_mask_ack   = mikasa_disable_irq,
 };
 
 static void 
@@ -98,8 +98,8 @@ mikasa_init_irq(void)
         mikasa_update_irq_hw(0);
 
         for (i = 16; i < 32; ++i) {
-                irq_to_desc(i)->status |= IRQ_LEVEL;
                 set_irq_chip_and_handler(i, &mikasa_irq_type, handle_level_irq);
+                irq_set_status_flags(i, IRQ_LEVEL);
         }
 
         init_i8259a_irqs();
diff --git a/arch/alpha/kernel/sys_noritake.c b/arch/alpha/kernel/sys_noritake.c
index e88f4ae1260..92bc188e94a 100644
--- a/arch/alpha/kernel/sys_noritake.c
+++ b/arch/alpha/kernel/sys_noritake.c
@@ -48,22 +48,22 @@ noritake_update_irq_hw(int irq, int mask)
 }
 
 static void
-noritake_enable_irq(unsigned int irq)
+noritake_enable_irq(struct irq_data *d)
 {
-        noritake_update_irq_hw(irq, cached_irq_mask |= 1 << (irq - 16));
+        noritake_update_irq_hw(d->irq, cached_irq_mask |= 1 << (d->irq - 16));
 }
 
 static void
-noritake_disable_irq(unsigned int irq)
+noritake_disable_irq(struct irq_data *d)
 {
-        noritake_update_irq_hw(irq, cached_irq_mask &= ~(1 << (irq - 16)));
+        noritake_update_irq_hw(d->irq, cached_irq_mask &= ~(1 << (d->irq - 16)));
 }
 
 static struct irq_chip noritake_irq_type = {
         .name           = "NORITAKE",
-        .unmask         = noritake_enable_irq,
-        .mask           = noritake_disable_irq,
-        .mask_ack       = noritake_disable_irq,
+        .irq_unmask     = noritake_enable_irq,
+        .irq_mask       = noritake_disable_irq,
+        .irq_mask_ack   = noritake_disable_irq,
 };
 
 static void 
@@ -127,8 +127,8 @@ noritake_init_irq(void)
         outw(0, 0x54c);
 
         for (i = 16; i < 48; ++i) {
-                irq_to_desc(i)->status |= IRQ_LEVEL;
                 set_irq_chip_and_handler(i, &noritake_irq_type, handle_level_irq);
+                irq_set_status_flags(i, IRQ_LEVEL);
         }
 
         init_i8259a_irqs();
diff --git a/arch/alpha/kernel/sys_rawhide.c b/arch/alpha/kernel/sys_rawhide.c
index 6a51364dd1c..936d4140ed5 100644
--- a/arch/alpha/kernel/sys_rawhide.c
+++ b/arch/alpha/kernel/sys_rawhide.c
@@ -56,9 +56,10 @@ rawhide_update_irq_hw(int hose, int mask)
   (((h) < MCPCIA_MAX_HOSES) && (cached_irq_masks[(h)] != 0))
 
 static inline void 
-rawhide_enable_irq(unsigned int irq)
+rawhide_enable_irq(struct irq_data *d)
 {
         unsigned int mask, hose;
+        unsigned int irq = d->irq;
 
         irq -= 16;
         hose = irq / 24;
@@ -76,9 +77,10 @@ rawhide_enable_irq(unsigned int irq)
 }
 
 static void 
-rawhide_disable_irq(unsigned int irq)
+rawhide_disable_irq(struct irq_data *d)
 {
         unsigned int mask, hose;
+        unsigned int irq = d->irq;
 
         irq -= 16;
         hose = irq / 24;
@@ -96,9 +98,10 @@ rawhide_disable_irq(unsigned int irq)
 }
 
 static void
-rawhide_mask_and_ack_irq(unsigned int irq)
+rawhide_mask_and_ack_irq(struct irq_data *d)
 {
         unsigned int mask, mask1, hose;
+        unsigned int irq = d->irq;
 
         irq -= 16;
         hose = irq / 24;
@@ -123,9 +126,9 @@ rawhide_mask_and_ack_irq(unsigned int irq)
 
 static struct irq_chip rawhide_irq_type = {
         .name           = "RAWHIDE",
-        .unmask         = rawhide_enable_irq,
-        .mask           = rawhide_disable_irq,
-        .mask_ack       = rawhide_mask_and_ack_irq,
+        .irq_unmask     = rawhide_enable_irq,
+        .irq_mask       = rawhide_disable_irq,
+        .irq_mask_ack   = rawhide_mask_and_ack_irq,
 };
 
 static void 
@@ -177,8 +180,8 @@ rawhide_init_irq(void)
         }
 
         for (i = 16; i < 128; ++i) {
-                irq_to_desc(i)->status |= IRQ_LEVEL;
                 set_irq_chip_and_handler(i, &rawhide_irq_type, handle_level_irq);
+                irq_set_status_flags(i, IRQ_LEVEL);
         }
 
         init_i8259a_irqs();
diff --git a/arch/alpha/kernel/sys_rx164.c b/arch/alpha/kernel/sys_rx164.c
index 89e7e37ec84..cea22a62913 100644
--- a/arch/alpha/kernel/sys_rx164.c
+++ b/arch/alpha/kernel/sys_rx164.c
@@ -47,22 +47,22 @@ rx164_update_irq_hw(unsigned long mask)
 }
 
 static inline void
-rx164_enable_irq(unsigned int irq)
+rx164_enable_irq(struct irq_data *d)
 {
-        rx164_update_irq_hw(cached_irq_mask |= 1UL << (irq - 16));
+        rx164_update_irq_hw(cached_irq_mask |= 1UL << (d->irq - 16));
 }
 
 static void
-rx164_disable_irq(unsigned int irq)
+rx164_disable_irq(struct irq_data *d)
 {
-        rx164_update_irq_hw(cached_irq_mask &= ~(1UL << (irq - 16)));
+        rx164_update_irq_hw(cached_irq_mask &= ~(1UL << (d->irq - 16)));
 }
 
 static struct irq_chip rx164_irq_type = {
         .name           = "RX164",
-        .unmask         = rx164_enable_irq,
-        .mask           = rx164_disable_irq,
-        .mask_ack       = rx164_disable_irq,
+        .irq_unmask     = rx164_enable_irq,
+        .irq_mask       = rx164_disable_irq,
+        .irq_mask_ack   = rx164_disable_irq,
 };
 
 static void 
@@ -99,8 +99,8 @@ rx164_init_irq(void)
 
         rx164_update_irq_hw(0);
         for (i = 16; i < 40; ++i) {
-                irq_to_desc(i)->status |= IRQ_LEVEL;
                 set_irq_chip_and_handler(i, &rx164_irq_type, handle_level_irq);
+                irq_set_status_flags(i, IRQ_LEVEL);
         }
 
         init_i8259a_irqs();
diff --git a/arch/alpha/kernel/sys_sable.c b/arch/alpha/kernel/sys_sable.c
index 5c4423d1b06..a349538aabc 100644
--- a/arch/alpha/kernel/sys_sable.c
+++ b/arch/alpha/kernel/sys_sable.c
@@ -443,11 +443,11 @@ lynx_swizzle(struct pci_dev *dev, u8 *pinp)
 /* GENERIC irq routines */
 
 static inline void
-sable_lynx_enable_irq(unsigned int irq)
+sable_lynx_enable_irq(struct irq_data *d)
 {
         unsigned long bit, mask;
 
-        bit = sable_lynx_irq_swizzle->irq_to_mask[irq];
+        bit = sable_lynx_irq_swizzle->irq_to_mask[d->irq];
         spin_lock(&sable_lynx_irq_lock);
         mask = sable_lynx_irq_swizzle->shadow_mask &= ~(1UL << bit);
         sable_lynx_irq_swizzle->update_irq_hw(bit, mask);
@@ -459,11 +459,11 @@ sable_lynx_enable_irq(unsigned int irq)
 }
 
 static void
-sable_lynx_disable_irq(unsigned int irq)
+sable_lynx_disable_irq(struct irq_data *d)
 {
         unsigned long bit, mask;
 
-        bit = sable_lynx_irq_swizzle->irq_to_mask[irq];
+        bit = sable_lynx_irq_swizzle->irq_to_mask[d->irq];
         spin_lock(&sable_lynx_irq_lock);
         mask = sable_lynx_irq_swizzle->shadow_mask |= 1UL << bit;
         sable_lynx_irq_swizzle->update_irq_hw(bit, mask);
@@ -475,11 +475,11 @@ sable_lynx_disable_irq(unsigned int irq)
 }
 
 static void
-sable_lynx_mask_and_ack_irq(unsigned int irq)
+sable_lynx_mask_and_ack_irq(struct irq_data *d)
 {
         unsigned long bit, mask;
 
-        bit = sable_lynx_irq_swizzle->irq_to_mask[irq];
+        bit = sable_lynx_irq_swizzle->irq_to_mask[d->irq];
         spin_lock(&sable_lynx_irq_lock);
         mask = sable_lynx_irq_swizzle->shadow_mask |= 1UL << bit;
         sable_lynx_irq_swizzle->update_irq_hw(bit, mask);
@@ -489,9 +489,9 @@ sable_lynx_mask_and_ack_irq(unsigned int irq)
 
 static struct irq_chip sable_lynx_irq_type = {
         .name           = "SABLE/LYNX",
-        .unmask         = sable_lynx_enable_irq,
-        .mask           = sable_lynx_disable_irq,
-        .mask_ack       = sable_lynx_mask_and_ack_irq,
+        .irq_unmask     = sable_lynx_enable_irq,
+        .irq_mask       = sable_lynx_disable_irq,
+        .irq_mask_ack   = sable_lynx_mask_and_ack_irq,
 };
 
 static void 
@@ -518,9 +518,9 @@ sable_lynx_init_irq(int nr_of_irqs)
         long i;
 
         for (i = 0; i < nr_of_irqs; ++i) {
-                irq_to_desc(i)->status |= IRQ_LEVEL;
                 set_irq_chip_and_handler(i, &sable_lynx_irq_type,
                         handle_level_irq);
+                irq_set_status_flags(i, IRQ_LEVEL);
         }
 
         common_init_isa_dma();
diff --git a/arch/alpha/kernel/sys_takara.c b/arch/alpha/kernel/sys_takara.c
index f8a1e8a862f..42a5331f13c 100644
--- a/arch/alpha/kernel/sys_takara.c
+++ b/arch/alpha/kernel/sys_takara.c
@@ -45,16 +45,18 @@ takara_update_irq_hw(unsigned long irq, unsigned long mask)
 }
 
 static inline void
-takara_enable_irq(unsigned int irq)
+takara_enable_irq(struct irq_data *d)
 {
+        unsigned int irq = d->irq;
         unsigned long mask;
         mask = (cached_irq_mask[irq >= 64] &= ~(1UL << (irq & 63)));
         takara_update_irq_hw(irq, mask);
 }
 
 static void
-takara_disable_irq(unsigned int irq)
+takara_disable_irq(struct irq_data *d)
 {
+        unsigned int irq = d->irq;
         unsigned long mask;
         mask = (cached_irq_mask[irq >= 64] |= 1UL << (irq & 63));
         takara_update_irq_hw(irq, mask);
@@ -62,9 +64,9 @@ takara_disable_irq(unsigned int irq)
 
 static struct irq_chip takara_irq_type = {
         .name           = "TAKARA",
-        .unmask         = takara_enable_irq,
-        .mask           = takara_disable_irq,
-        .mask_ack       = takara_disable_irq,
+        .irq_unmask     = takara_enable_irq,
+        .irq_mask       = takara_disable_irq,
+        .irq_mask_ack   = takara_disable_irq,
 };
 
 static void
@@ -136,8 +138,8 @@ takara_init_irq(void)
                 takara_update_irq_hw(i, -1);
 
         for (i = 16; i < 128; ++i) {
-                irq_to_desc(i)->status |= IRQ_LEVEL;
                 set_irq_chip_and_handler(i, &takara_irq_type, handle_level_irq);
+                irq_set_status_flags(i, IRQ_LEVEL);
         }
 
         common_init_isa_dma();
diff --git a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c
index e02494bf5ef..8c13a0c7783 100644
--- a/arch/alpha/kernel/sys_titan.c
+++ b/arch/alpha/kernel/sys_titan.c
@@ -112,8 +112,9 @@ titan_update_irq_hw(unsigned long mask)
 }
 
 static inline void
-titan_enable_irq(unsigned int irq)
+titan_enable_irq(struct irq_data *d)
 {
+        unsigned int irq = d->irq;
         spin_lock(&titan_irq_lock);
         titan_cached_irq_mask |= 1UL << (irq - 16);
         titan_update_irq_hw(titan_cached_irq_mask);
@@ -121,8 +122,9 @@ titan_enable_irq(unsigned int irq)
 }
 
 static inline void
-titan_disable_irq(unsigned int irq)
+titan_disable_irq(struct irq_data *d)
 {
+        unsigned int irq = d->irq;
         spin_lock(&titan_irq_lock);
         titan_cached_irq_mask &= ~(1UL << (irq - 16));
         titan_update_irq_hw(titan_cached_irq_mask);
@@ -144,8 +146,10 @@ titan_cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity)
 }
 
 static int
-titan_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
+titan_set_irq_affinity(struct irq_data *d, const struct cpumask *affinity,
+                       bool force)
 { 
+        unsigned int irq = d->irq;
         spin_lock(&titan_irq_lock);
         titan_cpu_set_irq_affinity(irq - 16, *affinity);
         titan_update_irq_hw(titan_cached_irq_mask);
@@ -175,17 +179,17 @@ init_titan_irqs(struct irq_chip * ops, int imin, int imax)
 {
         long i;
         for (i = imin; i <= imax; ++i) {
-                irq_to_desc(i)->status |= IRQ_LEVEL;
                 set_irq_chip_and_handler(i, ops, handle_level_irq);
+                irq_set_status_flags(i, IRQ_LEVEL);
         }
 }
 
 static struct irq_chip titan_irq_type = {
-       .name            = "TITAN",
-       .unmask          = titan_enable_irq,
-       .mask            = titan_disable_irq,
-       .mask_ack        = titan_disable_irq,
-       .set_affinity    = titan_set_irq_affinity,
+       .name                    = "TITAN",
+       .irq_unmask              = titan_enable_irq,
+       .irq_mask                = titan_disable_irq,
+       .irq_mask_ack            = titan_disable_irq,
+       .irq_set_affinity        = titan_set_irq_affinity,
 };
 
 static irqreturn_t
diff --git a/arch/alpha/kernel/sys_wildfire.c b/arch/alpha/kernel/sys_wildfire.c
index eec52594d41..ca60a387ef0 100644
--- a/arch/alpha/kernel/sys_wildfire.c
+++ b/arch/alpha/kernel/sys_wildfire.c
@@ -104,10 +104,12 @@ wildfire_init_irq_hw(void)
 }
 
 static void
-wildfire_enable_irq(unsigned int irq)
+wildfire_enable_irq(struct irq_data *d)
 {
+        unsigned int irq = d->irq;
+
         if (irq < 16)
-                i8259a_enable_irq(irq);
+                i8259a_enable_irq(d);
 
         spin_lock(&wildfire_irq_lock);
         set_bit(irq, &cached_irq_mask);
@@ -116,10 +118,12 @@ wildfire_enable_irq(unsigned int irq)
 }
 
 static void
-wildfire_disable_irq(unsigned int irq)
+wildfire_disable_irq(struct irq_data *d)
 {
+        unsigned int irq = d->irq;
+
         if (irq < 16)
-                i8259a_disable_irq(irq);
+                i8259a_disable_irq(d);
 
         spin_lock(&wildfire_irq_lock);
         clear_bit(irq, &cached_irq_mask);
@@ -128,10 +132,12 @@ wildfire_disable_irq(unsigned int irq)
 }
 
 static void
-wildfire_mask_and_ack_irq(unsigned int irq)
+wildfire_mask_and_ack_irq(struct irq_data *d)
 {
+        unsigned int irq = d->irq;
+
         if (irq < 16)
-                i8259a_mask_and_ack_irq(irq);
+                i8259a_mask_and_ack_irq(d);
 
         spin_lock(&wildfire_irq_lock);
         clear_bit(irq, &cached_irq_mask);
@@ -141,9 +147,9 @@ wildfire_mask_and_ack_irq(unsigned int irq)
 
 static struct irq_chip wildfire_irq_type = {
         .name           = "WILDFIRE",
-        .unmask         = wildfire_enable_irq,
-        .mask           = wildfire_disable_irq,
-        .mask_ack       = wildfire_mask_and_ack_irq,
+        .irq_unmask     = wildfire_enable_irq,
+        .irq_mask       = wildfire_disable_irq,
+        .irq_mask_ack   = wildfire_mask_and_ack_irq,
 };
 
 static void __init
@@ -177,21 +183,21 @@ wildfire_init_irq_per_pca(int qbbno, int pcano)
         for (i = 0; i < 16; ++i) {
                 if (i == 2)
                         continue;
-                irq_to_desc(i+irq_bias)->status |= IRQ_LEVEL;
                 set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type,
                         handle_level_irq);
+                irq_set_status_flags(i + irq_bias, IRQ_LEVEL);
         }
 
-        irq_to_desc(36+irq_bias)->status |= IRQ_LEVEL;
         set_irq_chip_and_handler(36+irq_bias, &wildfire_irq_type,
                 handle_level_irq);
+        irq_set_status_flags(36 + irq_bias, IRQ_LEVEL);
         for (i = 40; i < 64; ++i) {
-                irq_to_desc(i+irq_bias)->status |= IRQ_LEVEL;
                 set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type,
                         handle_level_irq);
+                irq_set_status_flags(i + irq_bias, IRQ_LEVEL);
         }
 
-        setup_irq(32+irq_bias, &isa_enable);    
+        setup_irq(32+irq_bias, &isa_enable);
 }
 
 static void __init
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5cff165b7eb..166efa2a19c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1177,6 +1177,31 @@ config ARM_ERRATA_743622
           visible impact on the overall performance or power consumption of the
           processor.
 
+config ARM_ERRATA_751472
+        bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
+        depends on CPU_V7 && SMP
+        help
+          This option enables the workaround for the 751472 Cortex-A9 (prior
+          to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
+          completion of a following broadcasted operation if the second
+          operation is received by a CPU before the ICIALLUIS has completed,
+          potentially leading to corrupted entries in the cache or TLB.
+
+config ARM_ERRATA_753970
+        bool "ARM errata: cache sync operation may be faulty"
+        depends on CACHE_PL310
+        help
+          This option enables the workaround for the 753970 PL310 (r3p0) erratum.
+
+          Under some condition the effect of cache sync operation on
+          the store buffer still remains when the operation completes.
+          This means that the store buffer is always asked to drain and
+          this prevents it from merging any further writes. The workaround
+          is to replace the normal offset of cache sync operation (0x730)
+          by another offset targeting an unmapped PL310 register 0x740.
+          This has the same effect as the cache sync operation: store buffer
+          drain and waiting for all buffers empty.
+
 endmenu
 
 source "arch/arm/common/Kconfig"
@@ -1391,7 +1416,7 @@ config AEABI
 
 config OABI_COMPAT
         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
-        depends on AEABI && EXPERIMENTAL
+        depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
         default y
         help
           This option preserves the old syscall interface along with the
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index c22c1adfedd..6f7b29294c8 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -15,7 +15,7 @@ ifeq ($(CONFIG_CPU_ENDIAN_BE8),y)
 LDFLAGS_vmlinux += --be8
 endif
 
-OBJCOPYFLAGS    :=-O binary -R .note -R .note.gnu.build-id -R .comment -S
+OBJCOPYFLAGS    :=-O binary -R .comment -S
 GZFLAGS         :=-9
 #KBUILD_CFLAGS  +=-pipe
 # Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb:
diff --git a/arch/arm/boot/compressed/.gitignore b/arch/arm/boot/compressed/.gitignore
index ab204db594d..c6028967d33 100644
--- a/arch/arm/boot/compressed/.gitignore
+++ b/arch/arm/boot/compressed/.gitignore
@@ -1,3 +1,7 @@
 font.c
-piggy.gz
+lib1funcs.S
+piggy.gzip
+piggy.lzo
+piggy.lzma
+vmlinux
 vmlinux.lds
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 778655f0257..ea5ee4d067f 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -6,6 +6,8 @@ config ARM_VIC
 
 config ARM_VIC_NR
         int
+        default 4 if ARCH_S5PV210
+        default 3 if ARCH_S5P6442 || ARCH_S5PC100
         default 2
         depends on ARM_VIC
         help
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h
index 5aeec1e1735..16bd4803158 100644
--- a/arch/arm/include/asm/hardware/cache-l2x0.h
+++ b/arch/arm/include/asm/hardware/cache-l2x0.h
@@ -36,6 +36,7 @@
 #define L2X0_RAW_INTR_STAT              0x21C
 #define L2X0_INTR_CLEAR                 0x220
 #define L2X0_CACHE_SYNC                 0x730
+#define L2X0_DUMMY_REG                  0x740
 #define L2X0_INV_LINE_PA                0x770
 #define L2X0_INV_WAY                    0x77C
 #define L2X0_CLEAN_LINE_PA              0x7B0
diff --git a/arch/arm/include/asm/hardware/sp810.h b/arch/arm/include/asm/hardware/sp810.h
index 721847dc68a..e0d1c0cfa54 100644
--- a/arch/arm/include/asm/hardware/sp810.h
+++ b/arch/arm/include/asm/hardware/sp810.h
@@ -58,6 +58,9 @@
 
 static inline void sysctl_soft_reset(void __iomem *base)
 {
+        /* switch to slow mode */
+        writel(0x2, base + SCCTRL);
+
         /* writing any value to SCSYSSTAT reg will reset system */
         writel(0, base + SCSYSSTAT);
 }
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index 3a0893a76a3..bf13b814c1b 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -15,10 +15,6 @@ struct meminfo;
 struct sys_timer;
 
 struct machine_desc {
-        /*
-         * Note! The first two elements are used
-         * by assembler code in head.S, head-common.S
-         */
         unsigned int            nr;             /* architecture number  */
         const char              *name;          /* architecture name    */
         unsigned long           boot_params;    /* tagged list          */
diff --git a/arch/arm/include/asm/pgalloc.h b/arch/arm/include/asm/pgalloc.h
index 9763be04f77..22de005f159 100644
--- a/arch/arm/include/asm/pgalloc.h
+++ b/arch/arm/include/asm/pgalloc.h
@@ -10,6 +10,8 @@
 #ifndef _ASMARM_PGALLOC_H
 #define _ASMARM_PGALLOC_H
 
+#include <linux/pagemap.h>
+
 #include <asm/domain.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/processor.h>
diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h
index f41a6f57cd1..82dfe5d0c41 100644
--- a/arch/arm/include/asm/tlb.h
+++ b/arch/arm/include/asm/tlb.h
@@ -18,16 +18,34 @@
 #define __ASMARM_TLB_H
 
 #include <asm/cacheflush.h>
-#include <asm/tlbflush.h>
 
 #ifndef CONFIG_MMU
 
 #include <linux/pagemap.h>
+
+#define tlb_flush(tlb)  ((void) tlb)
+
 #include <asm-generic/tlb.h>
 
 #else /* !CONFIG_MMU */
 
+#include <linux/swap.h>
 #include <asm/pgalloc.h>
+#include <asm/tlbflush.h>
+
+/*
+ * We need to delay page freeing for SMP as other CPUs can access pages
+ * which have been removed but not yet had their TLB entries invalidated.
+ * Also, as ARMv7 speculative prefetch can drag new entries into the TLB,
+ * we need to apply this same delaying tactic to ensure correct operation.
+ */
+#if defined(CONFIG_SMP) || defined(CONFIG_CPU_32v7)
+#define tlb_fast_mode(tlb)      0
+#define FREE_PTE_NR             500
+#else
+#define tlb_fast_mode(tlb)      1
+#define FREE_PTE_NR             0
+#endif
 
 /*
  * TLB handling.  This allows us to remove pages from the page
@@ -36,12 +54,58 @@
 struct mmu_gather {
         struct mm_struct        *mm;
         unsigned int            fullmm;
+        struct vm_area_struct   *vma;
         unsigned long           range_start;
         unsigned long           range_end;
+        unsigned int            nr;
+        struct page             *pages[FREE_PTE_NR];
 };
 
 DECLARE_PER_CPU(struct mmu_gather, mmu_gathers);
 
+/*
+ * This is unnecessarily complex.  There's three ways the TLB shootdown
+ * code is used:
+ *  1. Unmapping a range of vmas.  See zap_page_range(), unmap_region().
+ *     tlb->fullmm = 0, and tlb_start_vma/tlb_end_vma will be called.
+ *     tlb->vma will be non-NULL.
+ *  2. Unmapping all vmas.  See exit_mmap().
+ *     tlb->fullmm = 1, and tlb_start_vma/tlb_end_vma will be called.
+ *     tlb->vma will be non-NULL.  Additionally, page tables will be freed.
+ *  3. Unmapping argument pages.  See shift_arg_pages().
+ *     tlb->fullmm = 0, but tlb_start_vma/tlb_end_vma will not be called.
+ *     tlb->vma will be NULL.
+ */
+static inline void tlb_flush(struct mmu_gather *tlb)
+{
+        if (tlb->fullmm || !tlb->vma)
+                flush_tlb_mm(tlb->mm);
+        else if (tlb->range_end > 0) {
+                flush_tlb_range(tlb->vma, tlb->range_start, tlb->range_end);
+                tlb->range_start = TASK_SIZE;
+                tlb->range_end = 0;
+        }
+}
+
+static inline void tlb_add_flush(struct mmu_gather *tlb, unsigned long addr)
+{
+        if (!tlb->fullmm) {
+                if (addr < tlb->range_start)
+                        tlb->range_start = addr;
+                if (addr + PAGE_SIZE > tlb->range_end)
+                        tlb->range_end = addr + PAGE_SIZE;
+        }
+}
+
+static inline void tlb_flush_mmu(struct mmu_gather *tlb)
+{
+        tlb_flush(tlb);
+        if (!tlb_fast_mode(tlb)) {
+                free_pages_and_swap_cache(tlb->pages, tlb->nr);
+                tlb->nr = 0;
+        }
+}
+
 static inline struct mmu_gather *
 tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush)
 {
@@ -49,6 +113,8 @@ tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush)
 
         tlb->mm = mm;
         tlb->fullmm = full_mm_flush;
+        tlb->vma = NULL;
+        tlb->nr = 0;
 
         return tlb;
 }
@@ -56,8 +122,7 @@ tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush)
 static inline void
 tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
 {
-        if (tlb->fullmm)
-                flush_tlb_mm(tlb->mm);
+        tlb_flush_mmu(tlb);
 
         /* keep the page table cache within bounds */
         check_pgt_cache();
@@ -71,12 +136,7 @@ tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
 static inline void
 tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep, unsigned long addr)
 {
-        if (!tlb->fullmm) {
-                if (addr < tlb->range_start)
-                        tlb->range_start = addr;
-                if (addr + PAGE_SIZE > tlb->range_end)
-                        tlb->range_end = addr + PAGE_SIZE;
-        }
+        tlb_add_flush(tlb, addr);
 }
 
 /*
@@ -89,6 +149,7 @@ tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
 {
         if (!tlb->fullmm) {
                 flush_cache_range(vma, vma->vm_start, vma->vm_end);
+                tlb->vma = vma;
                 tlb->range_start = TASK_SIZE;
                 tlb->range_end = 0;
         }
@@ -97,12 +158,30 @@ tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
 static inline void
 tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
 {
-        if (!tlb->fullmm && tlb->range_end > 0)
-                flush_tlb_range(vma, tlb->range_start, tlb->range_end);
+        if (!tlb->fullmm)
+                tlb_flush(tlb);
+}
+
+static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
+{
+        if (tlb_fast_mode(tlb)) {
+                free_page_and_swap_cache(page);
+        } else {
+                tlb->pages[tlb->nr++] = page;
+                if (tlb->nr >= FREE_PTE_NR)
+                        tlb_flush_mmu(tlb);
+        }
+}
+
+static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
+        unsigned long addr)
+{
+        pgtable_page_dtor(pte);
+        tlb_add_flush(tlb, addr);
+        tlb_remove_page(tlb, pte);
 }
 
-#define tlb_remove_page(tlb,page)       free_page_and_swap_cache(page)
-#define pte_free_tlb(tlb, ptep, addr)   pte_free((tlb)->mm, ptep)
+#define pte_free_tlb(tlb, ptep, addr)   __pte_free_tlb(tlb, ptep, addr)
 #define pmd_free_tlb(tlb, pmdp, addr)   pmd_free((tlb)->mm, pmdp)
 
 #define tlb_migrate_finish(mm)          do { } while (0)
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index ce7378ea15a..d2005de383b 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -10,12 +10,7 @@
 #ifndef _ASMARM_TLBFLUSH_H
 #define _ASMARM_TLBFLUSH_H
 
-
-#ifndef CONFIG_MMU
-
-#define tlb_flush(tlb)  ((void) tlb)
-
-#else /* CONFIG_MMU */
+#ifdef CONFIG_MMU
 
 #include <asm/glue.h>
 
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index c0225da3fb2..f06ff9feb0d 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -391,6 +391,7 @@ ENDPROC(__turn_mmu_on)
 
 
 #ifdef CONFIG_SMP_ON_UP
+        __INIT
 __fixup_smp:
         and     r3, r9, #0x000f0000     @ architecture version
         teq     r3, #0x000f0000         @ CPU ID supported?
@@ -415,18 +416,7 @@ __fixup_smp_on_up:
         sub     r3, r0, r3
         add     r4, r4, r3
         add     r5, r5, r3
-2:      cmp     r4, r5
-        movhs   pc, lr
-        ldmia   r4!, {r0, r6}
- ARM(   str     r6, [r0, r3]    )
- THUMB( add     r0, r0, r3      )
-#ifdef __ARMEB__
- THUMB( mov     r6, r6, ror #16 )       @ Convert word order for big-endian.
-#endif
- THUMB( strh    r6, [r0], #2    )       @ For Thumb-2, store as two halfwords
- THUMB( mov     r6, r6, lsr #16 )       @ to be robust against misaligned r3.
- THUMB( strh    r6, [r0]        )
-        b       2b
+        b       __do_fixup_smp_on_up
 ENDPROC(__fixup_smp)
 
         .align
@@ -440,7 +430,31 @@ smp_on_up:
         ALT_SMP(.long   1)
         ALT_UP(.long    0)
         .popsection
+#endif
 
+        .text
+__do_fixup_smp_on_up:
+        cmp     r4, r5
+        movhs   pc, lr
+        ldmia   r4!, {r0, r6}
+ ARM(   str     r6, [r0, r3]    )
+ THUMB( add     r0, r0, r3      )
+#ifdef __ARMEB__
+ THUMB( mov     r6, r6, ror #16 )       @ Convert word order for big-endian.
 #endif
+ THUMB( strh    r6, [r0], #2    )       @ For Thumb-2, store as two halfwords
+ THUMB( mov     r6, r6, lsr #16 )       @ to be robust against misaligned r3.
+ THUMB( strh    r6, [r0]        )
+        b       __do_fixup_smp_on_up
+ENDPROC(__do_fixup_smp_on_up)
+
+ENTRY(fixup_smp)
+        stmfd   sp!, {r4 - r6, lr}
+        mov     r4, r0
+        add     r5, r0, r1
+        mov     r3, #0
+        bl      __do_fixup_smp_on_up
+        ldmfd   sp!, {r4 - r6, pc}
+ENDPROC(fixup_smp)
 
 #include "head-common.S"
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index c9f3f046757..44b84fe6e1b 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -137,11 +137,10 @@ static u8 get_debug_arch(void)
         u32 didr;
 
         /* Do we implement the extended CPUID interface? */
-        if (((read_cpuid_id() >> 16) & 0xf) != 0xf) {
-                pr_warning("CPUID feature registers not supported. "
-                                "Assuming v6 debug is present.\n");
+        if (WARN_ONCE((((read_cpuid_id() >> 16) & 0xf) != 0xf),
+            "CPUID feature registers not supported. "
+            "Assuming v6 debug is present.\n"))
                 return ARM_DEBUG_ARCH_V6;
-        }
 
         ARM_DBG_READ(c0, 0, didr);
         return (didr >> 16) & 0xf;
@@ -152,6 +151,12 @@ u8 arch_get_debug_arch(void)
         return debug_arch;
 }
 
+static int debug_arch_supported(void)
+{
+        u8 arch = get_debug_arch();
+        return arch >= ARM_DEBUG_ARCH_V6 && arch <= ARM_DEBUG_ARCH_V7_ECP14;
+}
+
 /* Determine number of BRP register available. */
 static int get_num_brp_resources(void)
 {
@@ -268,6 +273,9 @@ out:
 
 int hw_breakpoint_slots(int type)
 {
+        if (!debug_arch_supported())
+                return 0;
+
         /*
          * We can be called early, so don't rely on
          * our static variables being initialised.
@@ -828,20 +836,33 @@ static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr,
 /*
  * One-time initialisation.
  */
-static void reset_ctrl_regs(void *unused)
+static void reset_ctrl_regs(void *info)
 {
-        int i;
+        int i, cpu = smp_processor_id();
+        u32 dbg_power;
+        cpumask_t *cpumask = info;
 
         /*
          * v7 debug contains save and restore registers so that debug state
-         * can be maintained across low-power modes without leaving
-         * the debug logic powered up. It is IMPLEMENTATION DEFINED whether
-         * we can write to the debug registers out of reset, so we must
-         * unlock the OS Lock Access Register to avoid taking undefined
-         * instruction exceptions later on.
+         * can be maintained across low-power modes without leaving the debug
+         * logic powered up. It is IMPLEMENTATION DEFINED whether we can access
+         * the debug registers out of reset, so we must unlock the OS Lock
+         * Access Register to avoid taking undefined instruction exceptions
+         * later on.
          */
         if (debug_arch >= ARM_DEBUG_ARCH_V7_ECP14) {
                 /*
+                 * Ensure sticky power-down is clear (i.e. debug logic is
+                 * powered up).
+                 */
+                asm volatile("mrc p14, 0, %0, c1, c5, 4" : "=r" (dbg_power));
+                if ((dbg_power & 0x1) == 0) {
+                        pr_warning("CPU %d debug is powered down!\n", cpu);
+                        cpumask_or(cpumask, cpumask, cpumask_of(cpu));
+                        return;
+                }
+
+                /*
                  * Unconditionally clear the lock by writing a value
                  * other than 0xC5ACCE55 to the access register.
                  */
@@ -879,10 +900,11 @@ static struct notifier_block __cpuinitdata dbg_reset_nb = {
 static int __init arch_hw_breakpoint_init(void)
 {
         u32 dscr;
+        cpumask_t cpumask = { CPU_BITS_NONE };
 
         debug_arch = get_debug_arch();
 
-        if (debug_arch > ARM_DEBUG_ARCH_V7_ECP14) {
+        if (!debug_arch_supported()) {
                 pr_info("debug architecture 0x%x unsupported.\n", debug_arch);
                 return 0;
         }
@@ -899,18 +921,24 @@ static int __init arch_hw_breakpoint_init(void)
                 pr_info("%d breakpoint(s) reserved for watchpoint "
                                 "single-step.\n", core_num_reserved_brps);
 
+        /*
+         * Reset the breakpoint resources. We assume that a halting
+         * debugger will leave the world in a nice state for us.
+         */
+        on_each_cpu(reset_ctrl_regs, &cpumask, 1);
+        if (!cpumask_empty(&cpumask)) {
+                core_num_brps = 0;
+                core_num_reserved_brps = 0;
+                core_num_wrps = 0;
+                return 0;
+        }
+
         ARM_DBG_READ(c1, 0, dscr);
         if (dscr & ARM_DSCR_HDBGEN) {
+                max_watchpoint_len = 4;
                 pr_warning("halting debug mode enabled. Assuming maximum "
-                                "watchpoint size of 4 bytes.");
+                           "watchpoint size of %u bytes.", max_watchpoint_len);
         } else {
-                /*
-                 * Reset the breakpoint resources. We assume that a halting
-                 * debugger will leave the world in a nice state for us.
-                 */
-                smp_call_function(reset_ctrl_regs, NULL, 1);
-                reset_ctrl_regs(NULL);
-
                 /* Work out the maximum supported watchpoint length. */
                 max_watchpoint_len = get_max_wp_len();
                 pr_info("maximum watchpoint size is %u bytes.\n",
diff --git a/arch/arm/kernel/kprobes-decode.c b/arch/arm/kernel/kprobes-decode.c
index 2c1f0050c9c..8f6ed43861f 100644
--- a/arch/arm/kernel/kprobes-decode.c
+++ b/arch/arm/kernel/kprobes-decode.c
@@ -1437,7 +1437,7 @@ arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
 
                 return space_cccc_1100_010x(insn, asi);
 
-        } else if ((insn & 0x0e000000) == 0x0c400000) {
+        } else if ((insn & 0x0e000000) == 0x0c000000) {
 
                 return space_cccc_110x(insn, asi);
 
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c
index 2cfe8161b47..6d4105e6872 100644
--- a/arch/arm/kernel/module.c
+++ b/arch/arm/kernel/module.c
@@ -22,6 +22,7 @@
 
 #include <asm/pgtable.h>
 #include <asm/sections.h>
+#include <asm/smp_plat.h>
 #include <asm/unwind.h>
 
 #ifdef CONFIG_XIP_KERNEL
@@ -268,12 +269,28 @@ struct mod_unwind_map {
         const Elf_Shdr *txt_sec;
 };
 
+static const Elf_Shdr *find_mod_section(const Elf32_Ehdr *hdr,
+        const Elf_Shdr *sechdrs, const char *name)
+{
+        const Elf_Shdr *s, *se;
+        const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
+
+        for (s = sechdrs, se = sechdrs + hdr->e_shnum; s < se; s++)
+                if (strcmp(name, secstrs + s->sh_name) == 0)
+                        return s;
+
+        return NULL;
+}
+
+extern void fixup_smp(const void *, unsigned long);
+
 int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs,
                     struct module *mod)
 {
+        const Elf_Shdr * __maybe_unused s = NULL;
 #ifdef CONFIG_ARM_UNWIND
         const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
-        const Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum;
+        const Elf_Shdr *sechdrs_end = sechdrs + hdr->e_shnum;
         struct mod_unwind_map maps[ARM_SEC_MAX];
         int i;
 
@@ -315,6 +332,9 @@ int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs,
                                                  maps[i].txt_sec->sh_addr,
                                                  maps[i].txt_sec->sh_size);
 #endif
+        s = find_mod_section(hdr, sechdrs, ".alt.smp.init");
+        if (s && !is_smp())
+                fixup_smp((void *)s->sh_addr, s->sh_size);
         return 0;
 }
 
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 5efa2647a2f..d150ad1ccb5 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -700,7 +700,7 @@ user_backtrace(struct frame_tail __user *tail,
          * Frame pointers should strictly progress back up the stack
          * (towards higher addresses).
          */
-        if (tail >= buftail.fp)
+        if (tail + 1 >= buftail.fp)
                 return NULL;
 
         return buftail.fp - 1;
diff --git a/arch/arm/kernel/pmu.c b/arch/arm/kernel/pmu.c
index b8af96ea62e..2c79eec1926 100644
--- a/arch/arm/kernel/pmu.c
+++ b/arch/arm/kernel/pmu.c
@@ -97,28 +97,34 @@ set_irq_affinity(int irq,
                            irq, cpu);
         return err;
 #else
-        return 0;
+        return -EINVAL;
 #endif
 }
 
 static int
 init_cpu_pmu(void)
 {
-        int i, err = 0;
+        int i, irqs, err = 0;
         struct platform_device *pdev = pmu_devices[ARM_PMU_DEVICE_CPU];
 
-        if (!pdev) {
-                err = -ENODEV;
-                goto out;
-        }
+        if (!pdev)
+                return -ENODEV;
+
+        irqs = pdev->num_resources;
+
+        /*
+         * If we have a single PMU interrupt that we can't shift, assume that
+         * we're running on a uniprocessor machine and continue.
+         */
+        if (irqs == 1 && !irq_can_set_affinity(platform_get_irq(pdev, 0)))
+                return 0;
 
-        for (i = 0; i < pdev->num_resources; ++i) {
+        for (i = 0; i < irqs; ++i) {
                 err = set_irq_affinity(platform_get_irq(pdev, i), i);
                 if (err)
                         break;
         }
 
-out:
         return err;
 }
 
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 19c6816db61..b13e70f63d7 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -996,10 +996,10 @@ static int ptrace_gethbpregs(struct task_struct *tsk, long num,
                 while (!(arch_ctrl.len & 0x1))
                         arch_ctrl.len >>= 1;
 
-                if (idx & 0x1)
-                        reg = encode_ctrl_reg(arch_ctrl);
-                else
+                if (num & 0x1)
                         reg = bp->attr.bp_addr;
+                else
+                        reg = encode_ctrl_reg(arch_ctrl);
         }
 
 put:
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 420b8d6485d..5ea4fb718b9 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -226,8 +226,8 @@ int cpu_architecture(void)
                  * Register 0 and check for VMSAv7 or PMSAv7 */
                 asm("mrc        p15, 0, %0, c0, c1, 4"
                     : "=r" (mmfr0));
-                if ((mmfr0 & 0x0000000f) == 0x00000003 ||
-                    (mmfr0 & 0x000000f0) == 0x00000030)
+                if ((mmfr0 & 0x0000000f) >= 0x00000003 ||
+                    (mmfr0 & 0x000000f0) >= 0x00000030)
                         cpu_arch = CPU_ARCH_ARMv7;
                 else if ((mmfr0 & 0x0000000f) == 0x00000002 ||
                          (mmfr0 & 0x000000f0) == 0x00000020)
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index 907d5a620bc..abaf8445ce2 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -474,7 +474,9 @@ setup_return(struct pt_regs *regs, struct k_sigaction *ka,
         unsigned long handler = (unsigned long)ka->sa.sa_handler;
         unsigned long retcode;
         int thumb = 0;
-        unsigned long cpsr = regs->ARM_cpsr & ~PSR_f;
+        unsigned long cpsr = regs->ARM_cpsr & ~(PSR_f | PSR_E_BIT);
+
+        cpsr |= PSR_ENDSTATE;
 
         /*
          * Maybe we need to deliver a 32-bit signal to a 26-bit task.
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 86b66f3f203..61462790757 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -21,6 +21,12 @@
 #define ARM_CPU_KEEP(x)
 #endif
 
+#if defined(CONFIG_SMP_ON_UP) && !defined(CONFIG_DEBUG_SPINLOCK)
+#define ARM_EXIT_KEEP(x)        x
+#else
+#define ARM_EXIT_KEEP(x)
+#endif
+
 OUTPUT_ARCH(arm)
 ENTRY(stext)
 
@@ -43,6 +49,7 @@ SECTIONS
                 _sinittext = .;
                         HEAD_TEXT
                         INIT_TEXT
+                        ARM_EXIT_KEEP(EXIT_TEXT)
                 _einittext = .;
                 ARM_CPU_DISCARD(PROC_INFO)
                 __arch_info_begin = .;
@@ -67,6 +74,7 @@ SECTIONS
 #ifndef CONFIG_XIP_KERNEL
                 __init_begin = _stext;
                 INIT_DATA
+                ARM_EXIT_KEEP(EXIT_DATA)
 #endif
         }
 
@@ -162,6 +170,7 @@ SECTIONS
                 . = ALIGN(PAGE_SIZE);
                 __init_begin = .;
                 INIT_DATA
+                ARM_EXIT_KEEP(EXIT_DATA)
                 . = ALIGN(PAGE_SIZE);
                 __init_end = .;
 #endif
@@ -247,6 +256,8 @@ SECTIONS
         }
 #endif
 
+        NOTES
+
         BSS_SECTION(0, 0, 0)
         _end = .;
 
diff --git a/arch/arm/mach-davinci/cpufreq.c b/arch/arm/mach-davinci/cpufreq.c
index 343de73161f..4a68c2b1ec1 100644
--- a/arch/arm/mach-davinci/cpufreq.c
+++ b/arch/arm/mach-davinci/cpufreq.c
@@ -132,7 +132,7 @@ out:
         return ret;
 }
 
-static int __init davinci_cpu_init(struct cpufreq_policy *policy)
+static int davinci_cpu_init(struct cpufreq_policy *policy)
 {
         int result = 0;
         struct davinci_cpufreq_config *pdata = cpufreq.dev->platform_data;
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 9eec63070e0..beda8a4133a 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -480,8 +480,15 @@ static struct platform_device da850_mcasp_device = {
         .resource       = da850_mcasp_resources,
 };
 
+struct platform_device davinci_pcm_device = {
+        .name   = "davinci-pcm-audio",
+        .id     = -1,
+};
+
 void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata)
 {
+        platform_device_register(&davinci_pcm_device);
+
         /* DA830/OMAP-L137 has 3 instances of McASP */
         if (cpu_is_davinci_da830() && id == 1) {
                 da830_mcasp1_device.dev.platform_data = pdata;
diff --git a/arch/arm/mach-davinci/gpio-tnetv107x.c b/arch/arm/mach-davinci/gpio-tnetv107x.c
index d10298620e2..3fa3e2867e1 100644
--- a/arch/arm/mach-davinci/gpio-tnetv107x.c
+++ b/arch/arm/mach-davinci/gpio-tnetv107x.c
@@ -58,7 +58,7 @@ static int tnetv107x_gpio_request(struct gpio_chip *chip, unsigned offset)
 
         spin_lock_irqsave(&ctlr->lock, flags);
 
-        gpio_reg_set_bit(&regs->enable, gpio);
+        gpio_reg_set_bit(regs->enable, gpio);
 
         spin_unlock_irqrestore(&ctlr->lock, flags);
 
@@ -74,7 +74,7 @@ static void tnetv107x_gpio_free(struct gpio_chip *chip, unsigned offset)
 
         spin_lock_irqsave(&ctlr->lock, flags);
 
-        gpio_reg_clear_bit(&regs->enable, gpio);
+        gpio_reg_clear_bit(regs->enable, gpio);
 
         spin_unlock_irqrestore(&ctlr->lock, flags);
 }
@@ -88,7 +88,7 @@ static int tnetv107x_gpio_dir_in(struct gpio_chip *chip, unsigned offset)
 
         spin_lock_irqsave(&ctlr->lock, flags);
 
-        gpio_reg_set_bit(&regs->direction, gpio);
+        gpio_reg_set_bit(regs->direction, gpio);
 
         spin_unlock_irqrestore(&ctlr->lock, flags);
 
@@ -106,11 +106,11 @@ static int tnetv107x_gpio_dir_out(struct gpio_chip *chip,
         spin_lock_irqsave(&ctlr->lock, flags);
 
         if (value)
-                gpio_reg_set_bit(&regs->data_out, gpio);
+                gpio_reg_set_bit(regs->data_out, gpio);
         else
-                gpio_reg_clear_bit(&regs->data_out, gpio);
+                gpio_reg_clear_bit(regs->data_out, gpio);
 
-        gpio_reg_clear_bit(&regs->direction, gpio);
+        gpio_reg_clear_bit(regs->direction, gpio);
 
         spin_unlock_irqrestore(&ctlr->lock, flags);
 
@@ -124,7 +124,7 @@ static int tnetv107x_gpio_get(struct gpio_chip *chip, unsigned offset)
         unsigned gpio = chip->base + offset;
         int ret;
 
-        ret = gpio_reg_get_bit(&regs->data_in, gpio);
+        ret = gpio_reg_get_bit(regs->data_in, gpio);
 
         return ret ? 1 : 0;
 }
@@ -140,9 +140,9 @@ static void tnetv107x_gpio_set(struct gpio_chip *chip,
         spin_lock_irqsave(&ctlr->lock, flags);
 
         if (value)
-                gpio_reg_set_bit(&regs->data_out, gpio);
+                gpio_reg_set_bit(regs->data_out, gpio);
         else
-                gpio_reg_clear_bit(&regs->data_out, gpio);
+                gpio_reg_clear_bit(regs->data_out, gpio);
 
         spin_unlock_irqrestore(&ctlr->lock, flags);
 }
diff --git a/arch/arm/mach-davinci/include/mach/clkdev.h b/arch/arm/mach-davinci/include/mach/clkdev.h
index 730c49d1ebd..14a50488718 100644
--- a/arch/arm/mach-davinci/include/mach/clkdev.h
+++ b/arch/arm/mach-davinci/include/mach/clkdev.h
@@ -1,6 +1,8 @@
 #ifndef __MACH_CLKDEV_H
 #define __MACH_CLKDEV_H
 
+struct clk;
+
 static inline int __clk_get(struct clk *clk)
 {
         return 1;
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index 337392c3f54..acb7ae5b0a2 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -77,7 +77,7 @@ static int _dpll_test_fint(struct clk *clk, u8 n)
         dd = clk->dpll_data;
 
         /* DPLL divider must result in a valid jitter correction val */
-        fint = clk->parent->rate / (n + 1);
+        fint = clk->parent->rate / n;
         if (fint < DPLL_FINT_BAND1_MIN) {
 
                 pr_debug("rejecting n=%d due to Fint failure, "
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index 394413dc7de..24b88504df0 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -193,10 +193,12 @@ static void omap2_mbox_disable_irq(struct omap_mbox *mbox,
                 omap_mbox_type_t irq)
 {
         struct omap_mbox2_priv *p = mbox->priv;
-        u32 l, bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
-        l = mbox_read_reg(p->irqdisable);
-        l &= ~bit;
-        mbox_write_reg(l, p->irqdisable);
+        u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
+
+        if (!cpu_is_omap44xx())
+                bit = mbox_read_reg(p->irqdisable) & ~bit;
+
+        mbox_write_reg(bit, p->irqdisable);
 }
 
 static void omap2_mbox_ack_irq(struct omap_mbox *mbox,
@@ -334,7 +336,7 @@ static struct omap_mbox mbox_iva_info = {
         .priv   = &omap2_mbox_iva_priv,
 };
 
-struct omap_mbox *omap2_mboxes[] = { &mbox_iva_info, &mbox_dsp_info, NULL };
+struct omap_mbox *omap2_mboxes[] = { &mbox_dsp_info, &mbox_iva_info, NULL };
 #endif
 
 #if defined(CONFIG_ARCH_OMAP4)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 98148b6c36e..6c84659cf84 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -605,7 +605,7 @@ static void __init omap_mux_dbg_create_entry(
         list_for_each_entry(e, &partition->muxmodes, node) {
                 struct omap_mux *m = &e->mux;
 
-                (void)debugfs_create_file(m->muxnames[0], S_IWUGO, mux_dbg_dir,
+                (void)debugfs_create_file(m->muxnames[0], S_IWUSR, mux_dbg_dir,
                                           m, &omap_mux_dbg_signal_fops);
         }
 }
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 125f56591fb..a5a83b358dd 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -637,14 +637,14 @@ static int __init pm_dbg_init(void)
 
                 }
 
-        (void) debugfs_create_file("enable_off_mode", S_IRUGO | S_IWUGO, d,
+        (void) debugfs_create_file("enable_off_mode", S_IRUGO | S_IWUSR, d,
                                    &enable_off_mode, &pm_dbg_option_fops);
-        (void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUGO, d,
+        (void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUSR, d,
                                    &sleep_while_idle, &pm_dbg_option_fops);
-        (void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUGO, d,
+        (void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUSR, d,
                                    &wakeup_timer_seconds, &pm_dbg_option_fops);
         (void) debugfs_create_file("wakeup_timer_milliseconds",
-                        S_IRUGO | S_IWUGO, d, &wakeup_timer_milliseconds,
+                        S_IRUGO | S_IWUSR, d, &wakeup_timer_milliseconds,
                         &pm_dbg_option_fops);
         pm_dbg_init_done = 1;
 
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h b/arch/arm/mach-omap2/prcm_mpu44xx.h
index 729a644ce85..3300ff6e3cf 100644
--- a/arch/arm/mach-omap2/prcm_mpu44xx.h
+++ b/arch/arm/mach-omap2/prcm_mpu44xx.h
@@ -38,8 +38,8 @@
 #define OMAP4430_PRCM_MPU_CPU1_INST             0x0800
 
 /* PRCM_MPU clockdomain register offsets (from instance start) */
-#define OMAP4430_PRCM_MPU_CPU0_MPU_CDOFFS       0x0000
-#define OMAP4430_PRCM_MPU_CPU1_MPU_CDOFFS       0x0000
+#define OMAP4430_PRCM_MPU_CPU0_MPU_CDOFFS       0x0018
+#define OMAP4430_PRCM_MPU_CPU1_MPU_CDOFFS       0x0018
 
 
 /*
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index c37e823266d..1a777e34d0c 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -282,6 +282,7 @@ error:
                 dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
                         "interrupt handler. Smartreflex will"
                         "not function as desired\n", __func__);
+                kfree(name);
                 kfree(sr_info);
                 return ret;
 }
@@ -879,7 +880,7 @@ static int __init omap_sr_probe(struct platform_device *pdev)
                 ret = sr_late_init(sr_info);
                 if (ret) {
                         pr_warning("%s: Error in SR late init\n", __func__);
-                        return ret;
+                        goto err_release_region;
                 }
         }
 
@@ -890,17 +891,20 @@ static int __init omap_sr_probe(struct platform_device *pdev)
          * not try to create rest of the debugfs entries.
          */
         vdd_dbg_dir = omap_voltage_get_dbgdir(sr_info->voltdm);
-        if (!vdd_dbg_dir)
-                return -EINVAL;
+        if (!vdd_dbg_dir) {
+                ret = -EINVAL;
+                goto err_release_region;
+        }
 
         dbg_dir = debugfs_create_dir("smartreflex", vdd_dbg_dir);
         if (IS_ERR(dbg_dir)) {
                 dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
                         __func__);
-                return PTR_ERR(dbg_dir);
+                ret = PTR_ERR(dbg_dir);
+                goto err_release_region;
         }
 
-        (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUGO, dbg_dir,
+        (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR, dbg_dir,
                                 (void *)sr_info, &pm_sr_fops);
         (void) debugfs_create_x32("errweight", S_IRUGO, dbg_dir,
                         &sr_info->err_weight);
@@ -913,7 +917,8 @@ static int __init omap_sr_probe(struct platform_device *pdev)
         if (IS_ERR(nvalue_dir)) {
                 dev_err(&pdev->dev, "%s: Unable to create debugfs directory"
                         "for n-values\n", __func__);
-                return PTR_ERR(nvalue_dir);
+                ret = PTR_ERR(nvalue_dir);
+                goto err_release_region;
         }
 
         omap_voltage_get_volttable(sr_info->voltdm, &volt_data);
@@ -922,24 +927,16 @@ static int __init omap_sr_probe(struct platform_device *pdev)
                         " corresponding vdd vdd_%s. Cannot create debugfs"
                         "entries for n-values\n",
                         __func__, sr_info->voltdm->name);
-                return -ENODATA;
+                ret = -ENODATA;
+                goto err_release_region;
         }
 
         for (i = 0; i < sr_info->nvalue_count; i++) {
-                char *name;
-                char volt_name[32];
-
-                name = kzalloc(NVALUE_NAME_LEN + 1, GFP_KERNEL);
-                if (!name) {
-                        dev_err(&pdev->dev, "%s: Unable to allocate memory"
-                                " for n-value directory name\n",  __func__);
-                        return -ENOMEM;
-                }
+                char name[NVALUE_NAME_LEN + 1];
 
-                strcpy(name, "volt_");
-                sprintf(volt_name, "%d", volt_data[i].volt_nominal);
-                strcat(name, volt_name);
-                (void) debugfs_create_x32(name, S_IRUGO | S_IWUGO, nvalue_dir,
+                snprintf(name, sizeof(name), "volt_%d",
+                         volt_data[i].volt_nominal);
+                (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
                                 &(sr_info->nvalue_table[i].nvalue));
         }
 
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index 7b7c2683ae7..0fc550e7e48 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -39,6 +39,7 @@
 #include <asm/mach/time.h>
 #include <plat/dmtimer.h>
 #include <asm/localtimer.h>
+#include <asm/sched_clock.h>
 
 #include "timer-gp.h"
 
@@ -190,6 +191,7 @@ static void __init omap2_gp_clocksource_init(void)
 /*
  * clocksource
  */
+static DEFINE_CLOCK_DATA(cd);
 static struct omap_dm_timer *gpt_clocksource;
 static cycle_t clocksource_read_cycles(struct clocksource *cs)
 {
@@ -204,6 +206,15 @@ static struct clocksource clocksource_gpt = {
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
+static void notrace dmtimer_update_sched_clock(void)
+{
+        u32 cyc;
+
+        cyc = omap_dm_timer_read_counter(gpt_clocksource);
+
+        update_sched_clock(&cd, cyc, (u32)~0);
+}
+
 /* Setup free-running counter for clocksource */
 static void __init omap2_gp_clocksource_init(void)
 {
@@ -224,6 +235,8 @@ static void __init omap2_gp_clocksource_init(void)
 
         omap_dm_timer_set_load_start(gpt, 1, 0);
 
+        init_sched_clock(&cd, dmtimer_update_sched_clock, 32, tick_rate);
+
         if (clocksource_register_hz(&clocksource_gpt, tick_rate))
                 printk(err2, clocksource_gpt.name);
 }
diff --git a/arch/arm/mach-pxa/colibri-evalboard.c b/arch/arm/mach-pxa/colibri-evalboard.c
index 6b2c800a113..28f667e52ef 100644
--- a/arch/arm/mach-pxa/colibri-evalboard.c
+++ b/arch/arm/mach-pxa/colibri-evalboard.c
@@ -50,7 +50,7 @@ static void __init colibri_mmc_init(void)
                         GPIO0_COLIBRI_PXA270_SD_DETECT;
         if (machine_is_colibri300())    /* PXA300 Colibri */
                 colibri_mci_platform_data.gpio_card_detect =
-                        GPIO39_COLIBRI_PXA300_SD_DETECT;
+                        GPIO13_COLIBRI_PXA300_SD_DETECT;
         else                            /* PXA320 Colibri */
                 colibri_mci_platform_data.gpio_card_detect =
                         GPIO28_COLIBRI_PXA320_SD_DETECT;
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c
index fddb16d07eb..66dd81cbc8a 100644
--- a/arch/arm/mach-pxa/colibri-pxa300.c
+++ b/arch/arm/mach-pxa/colibri-pxa300.c
@@ -41,7 +41,7 @@ static mfp_cfg_t colibri_pxa300_evalboard_pin_config[] __initdata = {
         GPIO4_MMC1_DAT1,
         GPIO5_MMC1_DAT2,
         GPIO6_MMC1_DAT3,
-        GPIO39_GPIO,    /* SD detect */
+        GPIO13_GPIO,    /* GPIO13_COLIBRI_PXA300_SD_DETECT */
 
         /* UHC */
         GPIO0_2_USBH_PEN,
diff --git a/arch/arm/mach-pxa/include/mach/colibri.h b/arch/arm/mach-pxa/include/mach/colibri.h
index 388a96f1ef9..cb4236e98a0 100644
--- a/arch/arm/mach-pxa/include/mach/colibri.h
+++ b/arch/arm/mach-pxa/include/mach/colibri.h
@@ -60,7 +60,7 @@ static inline void colibri_pxa3xx_init_nand(void) {}
 #define GPIO113_COLIBRI_PXA270_TS_IRQ   113
 
 /* GPIO definitions for Colibri PXA300/310 */
-#define GPIO39_COLIBRI_PXA300_SD_DETECT 39
+#define GPIO13_COLIBRI_PXA300_SD_DETECT 13
 
 /* GPIO definitions for Colibri PXA320 */
 #define GPIO28_COLIBRI_PXA320_SD_DETECT 28
diff --git a/arch/arm/mach-pxa/palm27x.c b/arch/arm/mach-pxa/palm27x.c
index 405b92a2979..35572c427fa 100644
--- a/arch/arm/mach-pxa/palm27x.c
+++ b/arch/arm/mach-pxa/palm27x.c
@@ -323,7 +323,7 @@ static struct platform_pwm_backlight_data palm27x_backlight_data = {
         .pwm_id         = 0,
         .max_brightness = 0xfe,
         .dft_brightness = 0x7e,
-        .pwm_period_ns  = 3500,
+        .pwm_period_ns  = 3500 * 1024,
         .init           = palm27x_backlight_init,
         .notify         = palm27x_backlight_notify,
         .exit           = palm27x_backlight_exit,
diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c
index 978e1b28954..1807c9abdde 100644
--- a/arch/arm/mach-pxa/pm.c
+++ b/arch/arm/mach-pxa/pm.c
@@ -33,7 +33,7 @@ int pxa_pm_enter(suspend_state_t state)
 #endif
 
         /* skip registers saving for standby */
-        if (state != PM_SUSPEND_STANDBY) {
+        if (state != PM_SUSPEND_STANDBY && pxa_cpu_pm_fns->save) {
                 pxa_cpu_pm_fns->save(sleep_save);
                 /* before sleeping, calculate and save a checksum */
                 for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++)
@@ -44,7 +44,7 @@ int pxa_pm_enter(suspend_state_t state)
         pxa_cpu_pm_fns->enter(state);
         cpu_init();
 
-        if (state != PM_SUSPEND_STANDBY) {
+        if (state != PM_SUSPEND_STANDBY && pxa_cpu_pm_fns->restore) {
                 /* after sleeping, validate the checksum */
                 for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++)
                         checksum += sleep_save[i];
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index fbc5b775f89..b166b1d845d 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -347,6 +347,7 @@ static struct platform_device *pxa25x_devices[] __initdata = {
         &pxa25x_device_assp,
         &pxa25x_device_pwm0,
         &pxa25x_device_pwm1,
+        &pxa_device_asoc_platform,
 };
 
 static struct sys_device pxa25x_sysdev[] = {
diff --git a/arch/arm/mach-pxa/tosa-bt.c b/arch/arm/mach-pxa/tosa-bt.c
index c31e601eb49..b9b1e5c2b29 100644
--- a/arch/arm/mach-pxa/tosa-bt.c
+++ b/arch/arm/mach-pxa/tosa-bt.c
@@ -81,8 +81,6 @@ static int tosa_bt_probe(struct platform_device *dev)
                 goto err_rfk_alloc;
         }
 
-        rfkill_set_led_trigger_name(rfk, "tosa-bt");
-
         rc = rfkill_register(rfk);
         if (rc)
                 goto err_rfkill;
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index af152e70cfc..f2582ec300d 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -875,6 +875,11 @@ static struct platform_device sharpsl_rom_device = {
         .dev.platform_data = &sharpsl_rom_data,
 };
 
+static struct platform_device wm9712_device = {
+        .name   = "wm9712-codec",
+        .id     = -1,
+};
+
 static struct platform_device *devices[] __initdata = {
         &tosascoop_device,
         &tosascoop_jc_device,
@@ -885,6 +890,7 @@ static struct platform_device *devices[] __initdata = {
         &tosaled_device,
         &tosa_bt_device,
         &sharpsl_rom_device,
+        &wm9712_device,
 };
 
 static void tosa_poweroff(void)
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
index a0cb2581894..50825a3f91c 100644
--- a/arch/arm/mach-s3c2440/Kconfig
+++ b/arch/arm/mach-s3c2440/Kconfig
@@ -99,6 +99,7 @@ config MACH_NEO1973_GTA02
         select POWER_SUPPLY
         select MACH_NEO1973
         select S3C2410_PWM
+        select S3C_DEV_USB_HOST
         help
            Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone
 
diff --git a/arch/arm/mach-s3c2440/include/mach/gta02.h b/arch/arm/mach-s3c2440/include/mach/gta02.h
index 953331d8d56..3a56a229cac 100644
--- a/arch/arm/mach-s3c2440/include/mach/gta02.h
+++ b/arch/arm/mach-s3c2440/include/mach/gta02.h
@@ -44,19 +44,19 @@
 #define GTA02v3_GPIO_nUSB_FLT   S3C2410_GPG(10) /* v3 + v4 only */
 #define GTA02v3_GPIO_nGSM_OC    S3C2410_GPG(11) /* v3 + v4 only */
 
-#define GTA02_GPIO_AMP_SHUT     S3C2440_GPJ1    /* v2 + v3 + v4 only */
-#define GTA02v1_GPIO_WLAN_GPIO10        S3C2440_GPJ2
-#define GTA02_GPIO_HP_IN        S3C2440_GPJ2    /* v2 + v3 + v4 only */
-#define GTA02_GPIO_INT0         S3C2440_GPJ3    /* v2 + v3 + v4 only */
-#define GTA02_GPIO_nGSM_EN      S3C2440_GPJ4
-#define GTA02_GPIO_3D_RESET     S3C2440_GPJ5
-#define GTA02_GPIO_nDL_GSM      S3C2440_GPJ6    /* v4 + v5 only */
-#define GTA02_GPIO_WLAN_GPIO0   S3C2440_GPJ7
-#define GTA02v1_GPIO_BAT_ID     S3C2440_GPJ8
-#define GTA02_GPIO_KEEPACT      S3C2440_GPJ8
-#define GTA02v1_GPIO_HP_IN      S3C2440_GPJ10
-#define GTA02_CHIP_PWD          S3C2440_GPJ11   /* v2 + v3 + v4 only */
-#define GTA02_GPIO_nWLAN_RESET  S3C2440_GPJ12   /* v2 + v3 + v4 only */
+#define GTA02_GPIO_AMP_SHUT     S3C2410_GPJ(1)  /* v2 + v3 + v4 only */
+#define GTA02v1_GPIO_WLAN_GPIO10        S3C2410_GPJ(2)
+#define GTA02_GPIO_HP_IN        S3C2410_GPJ(2)  /* v2 + v3 + v4 only */
+#define GTA02_GPIO_INT0         S3C2410_GPJ(3)  /* v2 + v3 + v4 only */
+#define GTA02_GPIO_nGSM_EN      S3C2410_GPJ(4)
+#define GTA02_GPIO_3D_RESET     S3C2410_GPJ(5)
+#define GTA02_GPIO_nDL_GSM      S3C2410_GPJ(6)  /* v4 + v5 only */
+#define GTA02_GPIO_WLAN_GPIO0   S3C2410_GPJ(7)
+#define GTA02v1_GPIO_BAT_ID     S3C2410_GPJ(8)
+#define GTA02_GPIO_KEEPACT      S3C2410_GPJ(8)
+#define GTA02v1_GPIO_HP_IN      S3C2410_GPJ(10)
+#define GTA02_CHIP_PWD          S3C2410_GPJ(11) /* v2 + v3 + v4 only */
+#define GTA02_GPIO_nWLAN_RESET  S3C2410_GPJ(12) /* v2 + v3 + v4 only */
 
 #define GTA02_IRQ_GSENSOR_1     IRQ_EINT0
 #define GTA02_IRQ_MODEM         IRQ_EINT1
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index dd378206450..fdfc4d5e37a 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -151,6 +151,12 @@ static struct clk init_clocks_off[] = {
                 .enable         = s3c64xx_pclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_PCLK_IIC,
         }, {
+                .name           = "i2c",
+                .id             = 1,
+                .parent         = &clk_p,
+                .enable         = s3c64xx_pclk_ctrl,
+                .ctrlbit        = S3C6410_CLKCON_PCLK_I2C1,
+        }, {
                 .name           = "iis",
                 .id             = 0,
                 .parent         = &clk_p,
diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index 135db1b4125..c35585cf8c4 100644
--- a/arch/arm/mach-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -690,12 +690,12 @@ static int s3c64xx_dma_init1(int chno, enum dma_ch chbase,
 
         regptr = regs + PL080_Cx_BASE(0);
 
-        for (ch = 0; ch < 8; ch++, chno++, chptr++) {
-                printk(KERN_INFO "%s: registering DMA %d (%p)\n",
-                       __func__, chno, regptr);
+        for (ch = 0; ch < 8; ch++, chptr++) {
+                pr_debug("%s: registering DMA %d (%p)\n",
+                         __func__, chno + ch, regptr);
 
                 chptr->bit = 1 << ch;
-                chptr->number = chno;
+                chptr->number = chno + ch;
                 chptr->dmac = dmac;
                 chptr->regs = regptr;
                 regptr += PL080_Cx_STRIDE;
@@ -704,7 +704,8 @@ static int s3c64xx_dma_init1(int chno, enum dma_ch chbase,
         /* for the moment, permanently enable the controller */
         writel(PL080_CONFIG_ENABLE, regs + PL080_CONFIG);
 
-        printk(KERN_INFO "PL080: IRQ %d, at %p\n", irq, regs);
+        printk(KERN_INFO "PL080: IRQ %d, at %p, channels %d..%d\n",
+               irq, regs, chno, chno+8);
 
         return 0;
 
diff --git a/arch/arm/mach-s3c64xx/gpiolib.c b/arch/arm/mach-s3c64xx/gpiolib.c
index fd99a82e82c..92b09085caa 100644
--- a/arch/arm/mach-s3c64xx/gpiolib.c
+++ b/arch/arm/mach-s3c64xx/gpiolib.c
@@ -72,7 +72,7 @@ static struct s3c_gpio_cfg gpio_4bit_cfg_eint0011 = {
         .get_pull       = s3c_gpio_getpull_updown,
 };
 
-int s3c64xx_gpio2int_gpm(struct gpio_chip *chip, unsigned pin)
+static int s3c64xx_gpio2int_gpm(struct gpio_chip *chip, unsigned pin)
 {
         return pin < 5 ? IRQ_EINT(23) + pin : -ENXIO;
 }
@@ -138,7 +138,7 @@ static struct s3c_gpio_chip gpio_4bit[] = {
         },
 };
 
-int s3c64xx_gpio2int_gpl(struct gpio_chip *chip, unsigned pin)
+static int s3c64xx_gpio2int_gpl(struct gpio_chip *chip, unsigned pin)
 {
         return pin >= 8 ? IRQ_EINT(16) + pin - 8 : -ENXIO;
 }
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index e85192a86fb..a80a3163dd3 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -28,6 +28,7 @@
 #include <linux/delay.h>
 #include <linux/smsc911x.h>
 #include <linux/regulator/fixed.h>
+#include <linux/regulator/machine.h>
 
 #ifdef CONFIG_SMDK6410_WM1190_EV1
 #include <linux/mfd/wm8350/core.h>
@@ -351,7 +352,7 @@ static struct regulator_init_data smdk6410_vddpll = {
 /* VDD_UH_MMC, LDO5 on J5 */
 static struct regulator_init_data smdk6410_vdduh_mmc = {
         .constraints = {
-                .name = "PVDD_UH/PVDD_MMC",
+                .name = "PVDD_UH+PVDD_MMC",
                 .always_on = 1,
         },
 };
@@ -417,7 +418,7 @@ static struct regulator_init_data smdk6410_vddaudio = {
 /* S3C64xx internal logic & PLL */
 static struct regulator_init_data wm8350_dcdc1_data = {
         .constraints = {
-                .name = "PVDD_INT/PVDD_PLL",
+                .name = "PVDD_INT+PVDD_PLL",
                 .min_uV = 1200000,
                 .max_uV = 1200000,
                 .always_on = 1,
@@ -452,7 +453,7 @@ static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
 
 static struct regulator_init_data wm8350_dcdc4_data = {
         .constraints = {
-                .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
+                .name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV",
                 .min_uV = 3000000,
                 .max_uV = 3000000,
                 .always_on = 1,
@@ -464,7 +465,7 @@ static struct regulator_init_data wm8350_dcdc4_data = {
 /* OTGi/1190-EV1 HPVDD & AVDD */
 static struct regulator_init_data wm8350_ldo4_data = {
         .constraints = {
-                .name = "PVDD_OTGI/HPVDD/AVDD",
+                .name = "PVDD_OTGI+HPVDD+AVDD",
                 .min_uV = 1200000,
                 .max_uV = 1200000,
                 .apply_uV = 1,
@@ -552,7 +553,7 @@ static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
 
 static struct regulator_init_data wm1192_dcdc3 = {
         .constraints = {
-                .name = "PVDD_MEM/PVDD_GPS",
+                .name = "PVDD_MEM+PVDD_GPS",
                 .always_on = 1,
         },
 };
@@ -563,7 +564,7 @@ static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
 
 static struct regulator_init_data wm1192_ldo1 = {
         .constraints = {
-                .name = "PVDD_LCD/PVDD_EXT",
+                .name = "PVDD_LCD+PVDD_EXT",
                 .always_on = 1,
         },
         .consumer_supplies = wm1192_ldo1_consumers,
diff --git a/arch/arm/mach-s3c64xx/setup-keypad.c b/arch/arm/mach-s3c64xx/setup-keypad.c
index f8ed0d22db7..1d4d0ee9e87 100644
--- a/arch/arm/mach-s3c64xx/setup-keypad.c
+++ b/arch/arm/mach-s3c64xx/setup-keypad.c
@@ -17,7 +17,7 @@
 void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
 {
         /* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */
-        s3c_gpio_cfgrange_nopull(S3C64XX_GPK(8), 8 + rows, S3C_GPIO_SFN(3));
+        s3c_gpio_cfgrange_nopull(S3C64XX_GPK(8), rows, S3C_GPIO_SFN(3));
 
         /* Set all the necessary GPL pins to special-function 3: KP_COL[x] */
         s3c_gpio_cfgrange_nopull(S3C64XX_GPL(0), cols, S3C_GPIO_SFN(3));
diff --git a/arch/arm/mach-s3c64xx/setup-sdhci.c b/arch/arm/mach-s3c64xx/setup-sdhci.c
index 1a942037c4e..f344a222bc8 100644
--- a/arch/arm/mach-s3c64xx/setup-sdhci.c
+++ b/arch/arm/mach-s3c64xx/setup-sdhci.c
@@ -56,7 +56,7 @@ void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
         else
                 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
 
-        printk(KERN_INFO "%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3);
+        pr_debug("%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3);
         writel(ctrl2, r + S3C_SDHCI_CONTROL2);
         writel(ctrl3, r + S3C_SDHCI_CONTROL3);
 }
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h
index 203dd5a18bd..058dab4482a 100644
--- a/arch/arm/mach-s5p6442/include/mach/map.h
+++ b/arch/arm/mach-s5p6442/include/mach/map.h
@@ -1,6 +1,6 @@
 /* linux/arch/arm/mach-s5p6442/include/mach/map.h
  *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  *              http://www.samsung.com/
  *
  * S5P6442 - Memory map definitions
@@ -16,56 +16,61 @@
 #include <plat/map-base.h>
 #include <plat/map-s5p.h>
 
-#define S5P6442_PA_CHIPID       (0xE0000000)
-#define S5P_PA_CHIPID           S5P6442_PA_CHIPID
+#define S5P6442_PA_SDRAM        0x20000000
 
-#define S5P6442_PA_SYSCON       (0xE0100000)
-#define S5P_PA_SYSCON           S5P6442_PA_SYSCON
+#define S5P6442_PA_I2S0         0xC0B00000
+#define S5P6442_PA_I2S1         0xF2200000
 
-#define S5P6442_PA_GPIO         (0xE0200000)
+#define S5P6442_PA_CHIPID       0xE0000000
 
-#define S5P6442_PA_VIC0         (0xE4000000)
-#define S5P6442_PA_VIC1         (0xE4100000)
-#define S5P6442_PA_VIC2         (0xE4200000)
+#define S5P6442_PA_SYSCON       0xE0100000
 
-#define S5P6442_PA_SROMC        (0xE7000000)
-#define S5P_PA_SROMC            S5P6442_PA_SROMC
+#define S5P6442_PA_GPIO         0xE0200000
 
-#define S5P6442_PA_MDMA         0xE8000000
-#define S5P6442_PA_PDMA         0xE9000000
+#define S5P6442_PA_VIC0         0xE4000000
+#define S5P6442_PA_VIC1         0xE4100000
+#define S5P6442_PA_VIC2         0xE4200000
 
-#define S5P6442_PA_TIMER        (0xEA000000)
-#define S5P_PA_TIMER            S5P6442_PA_TIMER
+#define S5P6442_PA_SROMC        0xE7000000
 
-#define S5P6442_PA_SYSTIMER     (0xEA100000)
+#define S5P6442_PA_MDMA         0xE8000000
+#define S5P6442_PA_PDMA         0xE9000000
 
-#define S5P6442_PA_WATCHDOG     (0xEA200000)
+#define S5P6442_PA_TIMER        0xEA000000
 
-#define S5P6442_PA_UART         (0xEC000000)
+#define S5P6442_PA_SYSTIMER     0xEA100000
 
-#define S5P_PA_UART0            (S5P6442_PA_UART + 0x0)
-#define S5P_PA_UART1            (S5P6442_PA_UART + 0x400)
-#define S5P_PA_UART2            (S5P6442_PA_UART + 0x800)
-#define S5P_SZ_UART             SZ_256
+#define S5P6442_PA_WATCHDOG     0xEA200000
 
-#define S5P6442_PA_IIC0         (0xEC100000)
+#define S5P6442_PA_UART         0xEC000000
 
-#define S5P6442_PA_SDRAM        (0x20000000)
-#define S5P_PA_SDRAM            S5P6442_PA_SDRAM
+#define S5P6442_PA_IIC0         0xEC100000
 
 #define S5P6442_PA_SPI          0xEC300000
 
-/* I2S */
-#define S5P6442_PA_I2S0         0xC0B00000
-#define S5P6442_PA_I2S1         0xF2200000
-
-/* PCM */
 #define S5P6442_PA_PCM0         0xF2400000
 #define S5P6442_PA_PCM1         0xF2500000
 
-/* compatibiltiy defines. */
+/* Compatibiltiy Defines */
+
+#define S3C_PA_IIC              S5P6442_PA_IIC0
 #define S3C_PA_WDT              S5P6442_PA_WATCHDOG
+
+#define S5P_PA_CHIPID           S5P6442_PA_CHIPID
+#define S5P_PA_SDRAM            S5P6442_PA_SDRAM
+#define S5P_PA_SROMC            S5P6442_PA_SROMC
+#define S5P_PA_SYSCON           S5P6442_PA_SYSCON
+#define S5P_PA_TIMER            S5P6442_PA_TIMER
+
+/* UART */
+
 #define S3C_PA_UART             S5P6442_PA_UART
-#define S3C_PA_IIC              S5P6442_PA_IIC0
+
+#define S5P_PA_UART(x)          (S3C_PA_UART + ((x) * S3C_UART_OFFSET))
+#define S5P_PA_UART0            S5P_PA_UART(0)
+#define S5P_PA_UART1            S5P_PA_UART(1)
+#define S5P_PA_UART2            S5P_PA_UART(2)
+
+#define S5P_SZ_UART             SZ_256
 
 #endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/gpio.h b/arch/arm/mach-s5p64x0/include/mach/gpio.h
index 5486c8f01f1..adb5f298ead 100644
--- a/arch/arm/mach-s5p64x0/include/mach/gpio.h
+++ b/arch/arm/mach-s5p64x0/include/mach/gpio.h
@@ -23,7 +23,7 @@
 #define S5P6440_GPIO_A_NR       (6)
 #define S5P6440_GPIO_B_NR       (7)
 #define S5P6440_GPIO_C_NR       (8)
-#define S5P6440_GPIO_F_NR       (2)
+#define S5P6440_GPIO_F_NR       (16)
 #define S5P6440_GPIO_G_NR       (7)
 #define S5P6440_GPIO_H_NR       (10)
 #define S5P6440_GPIO_I_NR       (16)
@@ -36,7 +36,7 @@
 #define S5P6450_GPIO_B_NR       (7)
 #define S5P6450_GPIO_C_NR       (8)
 #define S5P6450_GPIO_D_NR       (8)
-#define S5P6450_GPIO_F_NR       (2)
+#define S5P6450_GPIO_F_NR       (16)
 #define S5P6450_GPIO_G_NR       (14)
 #define S5P6450_GPIO_H_NR       (10)
 #define S5P6450_GPIO_I_NR       (16)
diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h
index a9365e5ba61..95c91257c7c 100644
--- a/arch/arm/mach-s5p64x0/include/mach/map.h
+++ b/arch/arm/mach-s5p64x0/include/mach/map.h
@@ -1,6 +1,6 @@
 /* linux/arch/arm/mach-s5p64x0/include/mach/map.h
  *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
  *              http://www.samsung.com
  *
  * S5P64X0 - Memory map definitions
@@ -16,64 +16,46 @@
 #include <plat/map-base.h>
 #include <plat/map-s5p.h>
 
-#define S5P64X0_PA_SDRAM        (0x20000000)
+#define S5P64X0_PA_SDRAM        0x20000000
 
-#define S5P64X0_PA_CHIPID       (0xE0000000)
-#define S5P_PA_CHIPID           S5P64X0_PA_CHIPID
-
-#define S5P64X0_PA_SYSCON       (0xE0100000)
-#define S5P_PA_SYSCON           S5P64X0_PA_SYSCON
-
-#define S5P64X0_PA_GPIO         (0xE0308000)
-
-#define S5P64X0_PA_VIC0         (0xE4000000)
-#define S5P64X0_PA_VIC1         (0xE4100000)
+#define S5P64X0_PA_CHIPID       0xE0000000
 
-#define S5P64X0_PA_SROMC        (0xE7000000)
-#define S5P_PA_SROMC            S5P64X0_PA_SROMC
-
-#define S5P64X0_PA_PDMA         (0xE9000000)
-
-#define S5P64X0_PA_TIMER        (0xEA000000)
-#define S5P_PA_TIMER            S5P64X0_PA_TIMER
+#define S5P64X0_PA_SYSCON       0xE0100000
 
-#define S5P64X0_PA_RTC          (0xEA100000)
+#define S5P64X0_PA_GPIO         0xE0308000
 
-#define S5P64X0_PA_WDT          (0xEA200000)
+#define S5P64X0_PA_VIC0         0xE4000000
+#define S5P64X0_PA_VIC1         0xE4100000
 
-#define S5P6440_PA_UART(x)      (0xEC000000 + ((x) * S3C_UART_OFFSET))
-#define S5P6450_PA_UART(x)      ((x < 5) ? (0xEC800000 + ((x) * S3C_UART_OFFSET)) : (0xEC000000))
+#define S5P64X0_PA_SROMC        0xE7000000
 
-#define S5P_PA_UART0            S5P6450_PA_UART(0)
-#define S5P_PA_UART1            S5P6450_PA_UART(1)
-#define S5P_PA_UART2            S5P6450_PA_UART(2)
-#define S5P_PA_UART3            S5P6450_PA_UART(3)
-#define S5P_PA_UART4            S5P6450_PA_UART(4)
-#define S5P_PA_UART5            S5P6450_PA_UART(5)
+#define S5P64X0_PA_PDMA         0xE9000000
 
-#define S5P_SZ_UART             SZ_256
+#define S5P64X0_PA_TIMER        0xEA000000
+#define S5P64X0_PA_RTC          0xEA100000
+#define S5P64X0_PA_WDT          0xEA200000
 
-#define S5P6440_PA_IIC0         (0xEC104000)
-#define S5P6440_PA_IIC1         (0xEC20F000)
-#define S5P6450_PA_IIC0         (0xEC100000)
-#define S5P6450_PA_IIC1         (0xEC200000)
+#define S5P6440_PA_IIC0         0xEC104000
+#define S5P6440_PA_IIC1         0xEC20F000
+#define S5P6450_PA_IIC0         0xEC100000
+#define S5P6450_PA_IIC1         0xEC200000
 
-#define S5P64X0_PA_SPI0         (0xEC400000)
-#define S5P64X0_PA_SPI1         (0xEC500000)
+#define S5P64X0_PA_SPI0         0xEC400000
+#define S5P64X0_PA_SPI1         0xEC500000
 
-#define S5P64X0_PA_HSOTG        (0xED100000)
+#define S5P64X0_PA_HSOTG        0xED100000
 
 #define S5P64X0_PA_HSMMC(x)     (0xED800000 + ((x) * 0x100000))
 
-#define S5P64X0_PA_I2S          (0xF2000000)
+#define S5P64X0_PA_I2S          0xF2000000
 #define S5P6450_PA_I2S1         0xF2800000
 #define S5P6450_PA_I2S2         0xF2900000
 
-#define S5P64X0_PA_PCM          (0xF2100000)
+#define S5P64X0_PA_PCM          0xF2100000
 
-#define S5P64X0_PA_ADC          (0xF3000000)
+#define S5P64X0_PA_ADC          0xF3000000
 
-/* compatibiltiy defines. */
+/* Compatibiltiy Defines */
 
 #define S3C_PA_HSMMC0           S5P64X0_PA_HSMMC(0)
 #define S3C_PA_HSMMC1           S5P64X0_PA_HSMMC(1)
@@ -83,6 +65,25 @@
 #define S3C_PA_RTC              S5P64X0_PA_RTC
 #define S3C_PA_WDT              S5P64X0_PA_WDT
 
+#define S5P_PA_CHIPID           S5P64X0_PA_CHIPID
+#define S5P_PA_SROMC            S5P64X0_PA_SROMC
+#define S5P_PA_SYSCON           S5P64X0_PA_SYSCON
+#define S5P_PA_TIMER            S5P64X0_PA_TIMER
+
 #define SAMSUNG_PA_ADC          S5P64X0_PA_ADC
 
+/* UART */
+
+#define S5P6440_PA_UART(x)      (0xEC000000 + ((x) * S3C_UART_OFFSET))
+#define S5P6450_PA_UART(x)      ((x < 5) ? (0xEC800000 + ((x) * S3C_UART_OFFSET)) : (0xEC000000))
+
+#define S5P_PA_UART0            S5P6450_PA_UART(0)
+#define S5P_PA_UART1            S5P6450_PA_UART(1)
+#define S5P_PA_UART2            S5P6450_PA_UART(2)
+#define S5P_PA_UART3            S5P6450_PA_UART(3)
+#define S5P_PA_UART4            S5P6450_PA_UART(4)
+#define S5P_PA_UART5            S5P6450_PA_UART(5)
+
+#define S5P_SZ_UART             SZ_256
+
 #endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h
index 328467b346a..ccbe6b767f7 100644
--- a/arch/arm/mach-s5pc100/include/mach/map.h
+++ b/arch/arm/mach-s5pc100/include/mach/map.h
@@ -1,5 +1,8 @@
 /* linux/arch/arm/mach-s5pc100/include/mach/map.h
  *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
  * Copyright 2009 Samsung Electronics Co.
  *      Byungho Min <bhmin@samsung.com>
  *
@@ -16,145 +19,115 @@
 #include <plat/map-base.h>
 #include <plat/map-s5p.h>
 
-/*
- * map-base.h has already defined virtual memory address
- * S3C_VA_IRQ           S3C_ADDR(0x00000000)    irq controller(s)
- * S3C_VA_SYS           S3C_ADDR(0x00100000)    system control
- * S3C_VA_MEM           S3C_ADDR(0x00200000)    system control (not used)
- * S3C_VA_TIMER         S3C_ADDR(0x00300000)    timer block
- * S3C_VA_WATCHDOG      S3C_ADDR(0x00400000)    watchdog
- * S3C_VA_UART          S3C_ADDR(0x01000000)    UART
- *
- * S5PC100 specific virtual memory address can be defined here
- * S5PC1XX_VA_GPIO      S3C_ADDR(0x00500000)    GPIO
- *
- */
+#define S5PC100_PA_SDRAM                0x20000000
+
+#define S5PC100_PA_ONENAND              0xE7100000
+#define S5PC100_PA_ONENAND_BUF          0xB0000000
+
+#define S5PC100_PA_CHIPID               0xE0000000
 
-#define S5PC100_PA_ONENAND_BUF  (0xB0000000)
-#define S5PC100_SZ_ONENAND_BUF  (SZ_256M - SZ_32M)
+#define S5PC100_PA_SYSCON               0xE0100000
 
-/* Chip ID */
+#define S5PC100_PA_OTHERS               0xE0200000
 
-#define S5PC100_PA_CHIPID       (0xE0000000)
-#define S5P_PA_CHIPID           S5PC100_PA_CHIPID
+#define S5PC100_PA_GPIO                 0xE0300000
 
-#define S5PC100_PA_SYSCON       (0xE0100000)
-#define S5P_PA_SYSCON           S5PC100_PA_SYSCON
+#define S5PC100_PA_VIC0                 0xE4000000
+#define S5PC100_PA_VIC1                 0xE4100000
+#define S5PC100_PA_VIC2                 0xE4200000
 
-#define S5PC100_PA_OTHERS       (0xE0200000)
-#define S5PC100_VA_OTHERS       (S3C_VA_SYS + 0x10000)
+#define S5PC100_PA_SROMC                0xE7000000
 
-#define S5PC100_PA_GPIO         (0xE0300000)
-#define S5PC1XX_VA_GPIO         S3C_ADDR(0x00500000)
+#define S5PC100_PA_CFCON                0xE7800000
 
-/* Interrupt */
-#define S5PC100_PA_VIC0         (0xE4000000)
-#define S5PC100_PA_VIC1         (0xE4100000)
-#define S5PC100_PA_VIC2         (0xE4200000)
-#define S5PC100_VA_VIC          S3C_VA_IRQ
-#define S5PC100_VA_VIC_OFFSET   0x10000
-#define S5PC1XX_VA_VIC(x)       (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET))
+#define S5PC100_PA_MDMA                 0xE8100000
+#define S5PC100_PA_PDMA0                0xE9000000
+#define S5PC100_PA_PDMA1                0xE9200000
 
-#define S5PC100_PA_SROMC        (0xE7000000)
-#define S5P_PA_SROMC            S5PC100_PA_SROMC
+#define S5PC100_PA_TIMER                0xEA000000
+#define S5PC100_PA_SYSTIMER             0xEA100000
+#define S5PC100_PA_WATCHDOG             0xEA200000
+#define S5PC100_PA_RTC                  0xEA300000
 
-#define S5PC100_PA_ONENAND      (0xE7100000)
+#define S5PC100_PA_UART                 0xEC000000
 
-#define S5PC100_PA_CFCON        (0xE7800000)
+#define S5PC100_PA_IIC0                 0xEC100000
+#define S5PC100_PA_IIC1                 0xEC200000
 
-/* DMA */
-#define S5PC100_PA_MDMA         (0xE8100000)
-#define S5PC100_PA_PDMA0        (0xE9000000)
-#define S5PC100_PA_PDMA1        (0xE9200000)
+#define S5PC100_PA_SPI0                 0xEC300000
+#define S5PC100_PA_SPI1                 0xEC400000
+#define S5PC100_PA_SPI2                 0xEC500000
 
-/* Timer */
-#define S5PC100_PA_TIMER        (0xEA000000)
-#define S5P_PA_TIMER            S5PC100_PA_TIMER
+#define S5PC100_PA_USB_HSOTG            0xED200000
+#define S5PC100_PA_USB_HSPHY            0xED300000
 
-#define S5PC100_PA_SYSTIMER     (0xEA100000)
+#define S5PC100_PA_HSMMC(x)             (0xED800000 + ((x) * 0x100000))
 
-#define S5PC100_PA_WATCHDOG     (0xEA200000)
-#define S5PC100_PA_RTC          (0xEA300000)
+#define S5PC100_PA_FB                   0xEE000000
 
-#define S5PC100_PA_UART         (0xEC000000)
+#define S5PC100_PA_FIMC0                0xEE200000
+#define S5PC100_PA_FIMC1                0xEE300000
+#define S5PC100_PA_FIMC2                0xEE400000
 
-#define S5P_PA_UART0            (S5PC100_PA_UART + 0x0)
-#define S5P_PA_UART1            (S5PC100_PA_UART + 0x400)
-#define S5P_PA_UART2            (S5PC100_PA_UART + 0x800)
-#define S5P_PA_UART3            (S5PC100_PA_UART + 0xC00)
-#define S5P_SZ_UART             SZ_256
+#define S5PC100_PA_I2S0                 0xF2000000
+#define S5PC100_PA_I2S1                 0xF2100000
+#define S5PC100_PA_I2S2                 0xF2200000
 
-#define S5PC100_PA_IIC0         (0xEC100000)
-#define S5PC100_PA_IIC1         (0xEC200000)
+#define S5PC100_PA_AC97                 0xF2300000
 
-/* SPI */
-#define S5PC100_PA_SPI0         0xEC300000
-#define S5PC100_PA_SPI1         0xEC400000
-#define S5PC100_PA_SPI2         0xEC500000
+#define S5PC100_PA_PCM0                 0xF2400000
+#define S5PC100_PA_PCM1                 0xF2500000
 
-/* USB HS OTG */
-#define S5PC100_PA_USB_HSOTG    (0xED200000)
-#define S5PC100_PA_USB_HSPHY    (0xED300000)
+#define S5PC100_PA_SPDIF                0xF2600000
 
-#define S5PC100_PA_FB           (0xEE000000)
+#define S5PC100_PA_TSADC                0xF3000000
 
-#define S5PC100_PA_FIMC0        (0xEE200000)
-#define S5PC100_PA_FIMC1        (0xEE300000)
-#define S5PC100_PA_FIMC2        (0xEE400000)
+#define S5PC100_PA_KEYPAD               0xF3100000
 
-#define S5PC100_PA_I2S0         (0xF2000000)
-#define S5PC100_PA_I2S1         (0xF2100000)
-#define S5PC100_PA_I2S2         (0xF2200000)
+/* Compatibiltiy Defines */
 
-#define S5PC100_PA_AC97         0xF2300000
+#define S3C_PA_FB                       S5PC100_PA_FB
+#define S3C_PA_HSMMC0                   S5PC100_PA_HSMMC(0)
+#define S3C_PA_HSMMC1                   S5PC100_PA_HSMMC(1)
+#define S3C_PA_HSMMC2                   S5PC100_PA_HSMMC(2)
+#define S3C_PA_IIC                      S5PC100_PA_IIC0
+#define S3C_PA_IIC1                     S5PC100_PA_IIC1
+#define S3C_PA_KEYPAD                   S5PC100_PA_KEYPAD
+#define S3C_PA_ONENAND                  S5PC100_PA_ONENAND
+#define S3C_PA_ONENAND_BUF              S5PC100_PA_ONENAND_BUF
+#define S3C_PA_RTC                      S5PC100_PA_RTC
+#define S3C_PA_TSADC                    S5PC100_PA_TSADC
+#define S3C_PA_USB_HSOTG                S5PC100_PA_USB_HSOTG
+#define S3C_PA_USB_HSPHY                S5PC100_PA_USB_HSPHY
+#define S3C_PA_WDT                      S5PC100_PA_WATCHDOG
 
-/* PCM */
-#define S5PC100_PA_PCM0         0xF2400000
-#define S5PC100_PA_PCM1         0xF2500000
+#define S5P_PA_CHIPID                   S5PC100_PA_CHIPID
+#define S5P_PA_FIMC0                    S5PC100_PA_FIMC0
+#define S5P_PA_FIMC1                    S5PC100_PA_FIMC1
+#define S5P_PA_FIMC2                    S5PC100_PA_FIMC2
+#define S5P_PA_SDRAM                    S5PC100_PA_SDRAM
+#define S5P_PA_SROMC                    S5PC100_PA_SROMC
+#define S5P_PA_SYSCON                   S5PC100_PA_SYSCON
+#define S5P_PA_TIMER                    S5PC100_PA_TIMER
 
-#define S5PC100_PA_SPDIF        0xF2600000
+#define SAMSUNG_PA_ADC                  S5PC100_PA_TSADC
+#define SAMSUNG_PA_CFCON                S5PC100_PA_CFCON
+#define SAMSUNG_PA_KEYPAD               S5PC100_PA_KEYPAD
 
-#define S5PC100_PA_TSADC        (0xF3000000)
+#define S5PC100_VA_OTHERS               (S3C_VA_SYS + 0x10000)
 
-/* KEYPAD */
-#define S5PC100_PA_KEYPAD       (0xF3100000)
+#define S3C_SZ_ONENAND_BUF              (SZ_256M - SZ_32M)
 
-#define S5PC100_PA_HSMMC(x)     (0xED800000 + ((x) * 0x100000))
+/* UART */
 
-#define S5PC100_PA_SDRAM        (0x20000000)
-#define S5P_PA_SDRAM            S5PC100_PA_SDRAM
+#define S3C_PA_UART                     S5PC100_PA_UART
 
-/* compatibiltiy defines. */
-#define S3C_PA_UART             S5PC100_PA_UART
-#define S3C_PA_IIC              S5PC100_PA_IIC0
-#define S3C_PA_IIC1             S5PC100_PA_IIC1
-#define S3C_PA_FB               S5PC100_PA_FB
-#define S3C_PA_G2D              S5PC100_PA_G2D
-#define S3C_PA_G3D              S5PC100_PA_G3D
-#define S3C_PA_JPEG             S5PC100_PA_JPEG
-#define S3C_PA_ROTATOR          S5PC100_PA_ROTATOR
-#define S5P_VA_VIC0             S5PC1XX_VA_VIC(0)
-#define S5P_VA_VIC1             S5PC1XX_VA_VIC(1)
-#define S5P_VA_VIC2             S5PC1XX_VA_VIC(2)
-#define S3C_PA_USB_HSOTG        S5PC100_PA_USB_HSOTG
-#define S3C_PA_USB_HSPHY        S5PC100_PA_USB_HSPHY
-#define S3C_PA_HSMMC0           S5PC100_PA_HSMMC(0)
-#define S3C_PA_HSMMC1           S5PC100_PA_HSMMC(1)
-#define S3C_PA_HSMMC2           S5PC100_PA_HSMMC(2)
-#define S3C_PA_KEYPAD           S5PC100_PA_KEYPAD
-#define S3C_PA_WDT              S5PC100_PA_WATCHDOG
-#define S3C_PA_TSADC            S5PC100_PA_TSADC
-#define S3C_PA_ONENAND          S5PC100_PA_ONENAND
-#define S3C_PA_ONENAND_BUF      S5PC100_PA_ONENAND_BUF
-#define S3C_SZ_ONENAND_BUF      S5PC100_SZ_ONENAND_BUF
-#define S3C_PA_RTC              S5PC100_PA_RTC
-
-#define SAMSUNG_PA_ADC          S5PC100_PA_TSADC
-#define SAMSUNG_PA_CFCON        S5PC100_PA_CFCON
-#define SAMSUNG_PA_KEYPAD       S5PC100_PA_KEYPAD
+#define S5P_PA_UART(x)                  (S3C_PA_UART + ((x) * S3C_UART_OFFSET))
+#define S5P_PA_UART0                    S5P_PA_UART(0)
+#define S5P_PA_UART1                    S5P_PA_UART(1)
+#define S5P_PA_UART2                    S5P_PA_UART(2)
+#define S5P_PA_UART3                    S5P_PA_UART(3)
 
-#define S5P_PA_FIMC0            S5PC100_PA_FIMC0
-#define S5P_PA_FIMC1            S5PC100_PA_FIMC1
-#define S5P_PA_FIMC2            S5PC100_PA_FIMC2
+#define S5P_SZ_UART                     SZ_256
 
-#endif /* __ASM_ARCH_C100_MAP_H */
+#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
index 3611492ad68..1dd58836fd4 100644
--- a/arch/arm/mach-s5pv210/include/mach/map.h
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -1,6 +1,6 @@
 /* linux/arch/arm/mach-s5pv210/include/mach/map.h
  *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  *              http://www.samsung.com/
  *
  * S5PV210 - Memory map definitions
@@ -16,122 +16,120 @@
 #include <plat/map-base.h>
 #include <plat/map-s5p.h>
 
-#define S5PV210_PA_SROM_BANK5   (0xA8000000)
+#define S5PV210_PA_SDRAM                0x20000000
 
-#define S5PC110_PA_ONENAND      (0xB0000000)
-#define S5P_PA_ONENAND          S5PC110_PA_ONENAND
+#define S5PV210_PA_SROM_BANK5           0xA8000000
 
-#define S5PC110_PA_ONENAND_DMA  (0xB0600000)
-#define S5P_PA_ONENAND_DMA      S5PC110_PA_ONENAND_DMA
+#define S5PC110_PA_ONENAND              0xB0000000
+#define S5PC110_PA_ONENAND_DMA          0xB0600000
 
-#define S5PV210_PA_CHIPID       (0xE0000000)
-#define S5P_PA_CHIPID           S5PV210_PA_CHIPID
+#define S5PV210_PA_CHIPID               0xE0000000
 
-#define S5PV210_PA_SYSCON       (0xE0100000)
-#define S5P_PA_SYSCON           S5PV210_PA_SYSCON
+#define S5PV210_PA_SYSCON               0xE0100000
 
-#define S5PV210_PA_GPIO         (0xE0200000)
+#define S5PV210_PA_GPIO                 0xE0200000
 
-/* SPI */
-#define S5PV210_PA_SPI0         0xE1300000
-#define S5PV210_PA_SPI1         0xE1400000
+#define S5PV210_PA_SPDIF                0xE1100000
 
-#define S5PV210_PA_KEYPAD       (0xE1600000)
+#define S5PV210_PA_SPI0                 0xE1300000
+#define S5PV210_PA_SPI1                 0xE1400000
 
-#define S5PV210_PA_IIC0         (0xE1800000)
-#define S5PV210_PA_IIC1         (0xFAB00000)
-#define S5PV210_PA_IIC2         (0xE1A00000)
+#define S5PV210_PA_KEYPAD               0xE1600000
 
-#define S5PV210_PA_TIMER        (0xE2500000)
-#define S5P_PA_TIMER            S5PV210_PA_TIMER
+#define S5PV210_PA_ADC                  0xE1700000
 
-#define S5PV210_PA_SYSTIMER     (0xE2600000)
+#define S5PV210_PA_IIC0                 0xE1800000
+#define S5PV210_PA_IIC1                 0xFAB00000
+#define S5PV210_PA_IIC2                 0xE1A00000
 
-#define S5PV210_PA_WATCHDOG     (0xE2700000)
+#define S5PV210_PA_AC97                 0xE2200000
 
-#define S5PV210_PA_RTC          (0xE2800000)
-#define S5PV210_PA_UART         (0xE2900000)
+#define S5PV210_PA_PCM0                 0xE2300000
+#define S5PV210_PA_PCM1                 0xE1200000
+#define S5PV210_PA_PCM2                 0xE2B00000
 
-#define S5P_PA_UART0            (S5PV210_PA_UART + 0x0)
-#define S5P_PA_UART1            (S5PV210_PA_UART + 0x400)
-#define S5P_PA_UART2            (S5PV210_PA_UART + 0x800)
-#define S5P_PA_UART3            (S5PV210_PA_UART + 0xC00)
+#define S5PV210_PA_TIMER                0xE2500000
+#define S5PV210_PA_SYSTIMER             0xE2600000
+#define S5PV210_PA_WATCHDOG             0xE2700000
+#define S5PV210_PA_RTC                  0xE2800000
 
-#define S5P_SZ_UART             SZ_256
+#define S5PV210_PA_UART                 0xE2900000
 
-#define S3C_VA_UARTx(x)         (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
+#define S5PV210_PA_SROMC                0xE8000000
 
-#define S5PV210_PA_SROMC        (0xE8000000)
-#define S5P_PA_SROMC            S5PV210_PA_SROMC
+#define S5PV210_PA_CFCON                0xE8200000
 
-#define S5PV210_PA_CFCON        (0xE8200000)
+#define S5PV210_PA_HSMMC(x)             (0xEB000000 + ((x) * 0x100000))
 
-#define S5PV210_PA_MDMA         0xFA200000
-#define S5PV210_PA_PDMA0        0xE0900000
-#define S5PV210_PA_PDMA1        0xE0A00000
+#define S5PV210_PA_HSOTG                0xEC000000
+#define S5PV210_PA_HSPHY                0xEC100000
 
-#define S5PV210_PA_FB           (0xF8000000)
+#define S5PV210_PA_IIS0                 0xEEE30000
+#define S5PV210_PA_IIS1                 0xE2100000
+#define S5PV210_PA_IIS2                 0xE2A00000
 
-#define S5PV210_PA_FIMC0        (0xFB200000)
-#define S5PV210_PA_FIMC1        (0xFB300000)
-#define S5PV210_PA_FIMC2        (0xFB400000)
+#define S5PV210_PA_DMC0                 0xF0000000
+#define S5PV210_PA_DMC1                 0xF1400000
 
-#define S5PV210_PA_HSMMC(x)     (0xEB000000 + ((x) * 0x100000))
+#define S5PV210_PA_VIC0                 0xF2000000
+#define S5PV210_PA_VIC1                 0xF2100000
+#define S5PV210_PA_VIC2                 0xF2200000
+#define S5PV210_PA_VIC3                 0xF2300000
 
-#define S5PV210_PA_HSOTG        (0xEC000000)
-#define S5PV210_PA_HSPHY        (0xEC100000)
+#define S5PV210_PA_FB                   0xF8000000
 
-#define S5PV210_PA_VIC0         (0xF2000000)
-#define S5PV210_PA_VIC1         (0xF2100000)
-#define S5PV210_PA_VIC2         (0xF2200000)
-#define S5PV210_PA_VIC3         (0xF2300000)
+#define S5PV210_PA_MDMA                 0xFA200000
+#define S5PV210_PA_PDMA0                0xE0900000
+#define S5PV210_PA_PDMA1                0xE0A00000
 
-#define S5PV210_PA_SDRAM        (0x20000000)
-#define S5P_PA_SDRAM            S5PV210_PA_SDRAM
+#define S5PV210_PA_MIPI_CSIS            0xFA600000
 
-/* S/PDIF */
-#define S5PV210_PA_SPDIF        0xE1100000
+#define S5PV210_PA_FIMC0                0xFB200000
+#define S5PV210_PA_FIMC1                0xFB300000
+#define S5PV210_PA_FIMC2                0xFB400000
 
-/* I2S */
-#define S5PV210_PA_IIS0         0xEEE30000
-#define S5PV210_PA_IIS1         0xE2100000
-#define S5PV210_PA_IIS2         0xE2A00000
+/* Compatibiltiy Defines */
 
-/* PCM */
-#define S5PV210_PA_PCM0         0xE2300000
-#define S5PV210_PA_PCM1         0xE1200000
-#define S5PV210_PA_PCM2         0xE2B00000
+#define S3C_PA_FB                       S5PV210_PA_FB
+#define S3C_PA_HSMMC0                   S5PV210_PA_HSMMC(0)
+#define S3C_PA_HSMMC1                   S5PV210_PA_HSMMC(1)
+#define S3C_PA_HSMMC2                   S5PV210_PA_HSMMC(2)
+#define S3C_PA_HSMMC3                   S5PV210_PA_HSMMC(3)
+#define S3C_PA_IIC                      S5PV210_PA_IIC0
+#define S3C_PA_IIC1                     S5PV210_PA_IIC1
+#define S3C_PA_IIC2                     S5PV210_PA_IIC2
+#define S3C_PA_RTC                      S5PV210_PA_RTC
+#define S3C_PA_USB_HSOTG                S5PV210_PA_HSOTG
+#define S3C_PA_WDT                      S5PV210_PA_WATCHDOG
 
-/* AC97 */
-#define S5PV210_PA_AC97         0xE2200000
+#define S5P_PA_CHIPID                   S5PV210_PA_CHIPID
+#define S5P_PA_FIMC0                    S5PV210_PA_FIMC0
+#define S5P_PA_FIMC1                    S5PV210_PA_FIMC1
+#define S5P_PA_FIMC2                    S5PV210_PA_FIMC2
+#define S5P_PA_MIPI_CSIS0               S5PV210_PA_MIPI_CSIS
+#define S5P_PA_ONENAND                  S5PC110_PA_ONENAND
+#define S5P_PA_ONENAND_DMA              S5PC110_PA_ONENAND_DMA
+#define S5P_PA_SDRAM                    S5PV210_PA_SDRAM
+#define S5P_PA_SROMC                    S5PV210_PA_SROMC
+#define S5P_PA_SYSCON                   S5PV210_PA_SYSCON
+#define S5P_PA_TIMER                    S5PV210_PA_TIMER
 
-#define S5PV210_PA_ADC          (0xE1700000)
+#define SAMSUNG_PA_ADC                  S5PV210_PA_ADC
+#define SAMSUNG_PA_CFCON                S5PV210_PA_CFCON
+#define SAMSUNG_PA_KEYPAD               S5PV210_PA_KEYPAD
 
-#define S5PV210_PA_DMC0         (0xF0000000)
-#define S5PV210_PA_DMC1         (0xF1400000)
+/* UART */
 
-#define S5PV210_PA_MIPI_CSIS    0xFA600000
+#define S3C_VA_UARTx(x)                 (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
 
-/* compatibiltiy defines. */
-#define S3C_PA_UART             S5PV210_PA_UART
-#define S3C_PA_HSMMC0           S5PV210_PA_HSMMC(0)
-#define S3C_PA_HSMMC1           S5PV210_PA_HSMMC(1)
-#define S3C_PA_HSMMC2           S5PV210_PA_HSMMC(2)
-#define S3C_PA_HSMMC3           S5PV210_PA_HSMMC(3)
-#define S3C_PA_IIC              S5PV210_PA_IIC0
-#define S3C_PA_IIC1             S5PV210_PA_IIC1
-#define S3C_PA_IIC2             S5PV210_PA_IIC2
-#define S3C_PA_FB               S5PV210_PA_FB
-#define S3C_PA_RTC              S5PV210_PA_RTC
-#define S3C_PA_WDT              S5PV210_PA_WATCHDOG
-#define S3C_PA_USB_HSOTG        S5PV210_PA_HSOTG
-#define S5P_PA_FIMC0            S5PV210_PA_FIMC0
-#define S5P_PA_FIMC1            S5PV210_PA_FIMC1
-#define S5P_PA_FIMC2            S5PV210_PA_FIMC2
-#define S5P_PA_MIPI_CSIS0       S5PV210_PA_MIPI_CSIS
+#define S3C_PA_UART                     S5PV210_PA_UART
 
-#define SAMSUNG_PA_ADC          S5PV210_PA_ADC
-#define SAMSUNG_PA_CFCON        S5PV210_PA_CFCON
-#define SAMSUNG_PA_KEYPAD       S5PV210_PA_KEYPAD
+#define S5P_PA_UART(x)                  (S3C_PA_UART + ((x) * S3C_UART_OFFSET))
+#define S5P_PA_UART0                    S5P_PA_UART(0)
+#define S5P_PA_UART1                    S5P_PA_UART(1)
+#define S5P_PA_UART2                    S5P_PA_UART(2)
+#define S5P_PA_UART3                    S5P_PA_UART(3)
+
+#define S5P_SZ_UART                     SZ_256
 
 #endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index 461aa035afc..557add4fc56 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -149,7 +149,7 @@ static struct regulator_init_data aquila_ldo2_data = {
 
 static struct regulator_init_data aquila_ldo3_data = {
         .constraints    = {
-                .name           = "VUSB/MIPI_1.1V",
+                .name           = "VUSB+MIPI_1.1V",
                 .min_uV         = 1100000,
                 .max_uV         = 1100000,
                 .apply_uV       = 1,
@@ -197,7 +197,7 @@ static struct regulator_init_data aquila_ldo7_data = {
 
 static struct regulator_init_data aquila_ldo8_data = {
         .constraints    = {
-                .name           = "VUSB/VADC_3.3V",
+                .name           = "VUSB+VADC_3.3V",
                 .min_uV         = 3300000,
                 .max_uV         = 3300000,
                 .apply_uV       = 1,
@@ -207,7 +207,7 @@ static struct regulator_init_data aquila_ldo8_data = {
 
 static struct regulator_init_data aquila_ldo9_data = {
         .constraints    = {
-                .name           = "VCC/VCAM_2.8V",
+                .name           = "VCC+VCAM_2.8V",
                 .min_uV         = 2800000,
                 .max_uV         = 2800000,
                 .apply_uV       = 1,
@@ -381,9 +381,12 @@ static struct max8998_platform_data aquila_max8998_pdata = {
         .buck1_set1     = S5PV210_GPH0(3),
         .buck1_set2     = S5PV210_GPH0(4),
         .buck2_set3     = S5PV210_GPH0(5),
-        .buck1_max_voltage1 = 1200000,
-        .buck1_max_voltage2 = 1200000,
-        .buck2_max_voltage = 1200000,
+        .buck1_voltage1 = 1200000,
+        .buck1_voltage2 = 1200000,
+        .buck1_voltage3 = 1200000,
+        .buck1_voltage4 = 1200000,
+        .buck2_voltage1 = 1200000,
+        .buck2_voltage2 = 1200000,
 };
 #endif
 
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index e22d5112fd4..056f5c769b0 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -288,7 +288,7 @@ static struct regulator_init_data goni_ldo2_data = {
 
 static struct regulator_init_data goni_ldo3_data = {
         .constraints    = {
-                .name           = "VUSB/MIPI_1.1V",
+                .name           = "VUSB+MIPI_1.1V",
                 .min_uV         = 1100000,
                 .max_uV         = 1100000,
                 .apply_uV       = 1,
@@ -337,7 +337,7 @@ static struct regulator_init_data goni_ldo7_data = {
 
 static struct regulator_init_data goni_ldo8_data = {
         .constraints    = {
-                .name           = "VUSB/VADC_3.3V",
+                .name           = "VUSB+VADC_3.3V",
                 .min_uV         = 3300000,
                 .max_uV         = 3300000,
                 .apply_uV       = 1,
@@ -347,7 +347,7 @@ static struct regulator_init_data goni_ldo8_data = {
 
 static struct regulator_init_data goni_ldo9_data = {
         .constraints    = {
-                .name           = "VCC/VCAM_2.8V",
+                .name           = "VCC+VCAM_2.8V",
                 .min_uV         = 2800000,
                 .max_uV         = 2800000,
                 .apply_uV       = 1,
@@ -521,9 +521,12 @@ static struct max8998_platform_data goni_max8998_pdata = {
         .buck1_set1     = S5PV210_GPH0(3),
         .buck1_set2     = S5PV210_GPH0(4),
         .buck2_set3     = S5PV210_GPH0(5),
-        .buck1_max_voltage1 = 1200000,
-        .buck1_max_voltage2 = 1200000,
-        .buck2_max_voltage = 1200000,
+        .buck1_voltage1 = 1200000,
+        .buck1_voltage2 = 1200000,
+        .buck1_voltage3 = 1200000,
+        .buck1_voltage4 = 1200000,
+        .buck2_voltage1 = 1200000,
+        .buck2_voltage2 = 1200000,
 };
 #endif
 
diff --git a/arch/arm/mach-s5pv310/include/mach/map.h b/arch/arm/mach-s5pv310/include/mach/map.h
index 3060f78e12a..901657fa7a1 100644
--- a/arch/arm/mach-s5pv310/include/mach/map.h
+++ b/arch/arm/mach-s5pv310/include/mach/map.h
@@ -1,6 +1,6 @@
 /* linux/arch/arm/mach-s5pv310/include/mach/map.h
  *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  *              http://www.samsung.com/
  *
  * S5PV310 - Memory map definitions
@@ -23,90 +23,43 @@
 
 #include <plat/map-s5p.h>
 
-#define S5PV310_PA_SYSRAM               (0x02025000)
+#define S5PV310_PA_SYSRAM               0x02025000
 
-#define S5PV310_PA_SROM_BANK(x)         (0x04000000 + ((x) * 0x01000000))
-
-#define S5PC210_PA_ONENAND              (0x0C000000)
-#define S5P_PA_ONENAND                  S5PC210_PA_ONENAND
-
-#define S5PC210_PA_ONENAND_DMA          (0x0C600000)
-#define S5P_PA_ONENAND_DMA              S5PC210_PA_ONENAND_DMA
-
-#define S5PV310_PA_CHIPID               (0x10000000)
-#define S5P_PA_CHIPID                   S5PV310_PA_CHIPID
-
-#define S5PV310_PA_SYSCON               (0x10010000)
-#define S5P_PA_SYSCON                   S5PV310_PA_SYSCON
+#define S5PV310_PA_I2S0                 0x03830000
+#define S5PV310_PA_I2S1                 0xE3100000
+#define S5PV310_PA_I2S2                 0xE2A00000
 
-#define S5PV310_PA_PMU                  (0x10020000)
+#define S5PV310_PA_PCM0                 0x03840000
+#define S5PV310_PA_PCM1                 0x13980000
+#define S5PV310_PA_PCM2                 0x13990000
 
-#define S5PV310_PA_CMU                  (0x10030000)
-
-#define S5PV310_PA_WATCHDOG             (0x10060000)
-#define S5PV310_PA_RTC                  (0x10070000)
-
-#define S5PV310_PA_DMC0                 (0x10400000)
-
-#define S5PV310_PA_COMBINER             (0x10448000)
-
-#define S5PV310_PA_COREPERI             (0x10500000)
-#define S5PV310_PA_GIC_CPU              (0x10500100)
-#define S5PV310_PA_TWD                  (0x10500600)
-#define S5PV310_PA_GIC_DIST             (0x10501000)
-#define S5PV310_PA_L2CC                 (0x10502000)
-
-/* DMA */
-#define S5PV310_PA_MDMA         0x10810000
-#define S5PV310_PA_PDMA0        0x12680000
-#define S5PV310_PA_PDMA1        0x12690000
-
-#define S5PV310_PA_GPIO1                (0x11400000)
-#define S5PV310_PA_GPIO2                (0x11000000)
-#define S5PV310_PA_GPIO3                (0x03860000)
-
-#define S5PV310_PA_MIPI_CSIS0           0x11880000
-#define S5PV310_PA_MIPI_CSIS1           0x11890000
+#define S5PV310_PA_SROM_BANK(x)         (0x04000000 + ((x) * 0x01000000))
 
-#define S5PV310_PA_HSMMC(x)             (0x12510000 + ((x) * 0x10000))
+#define S5PC210_PA_ONENAND              0x0C000000
+#define S5PC210_PA_ONENAND_DMA          0x0C600000
 
-#define S5PV310_PA_SROMC                (0x12570000)
-#define S5P_PA_SROMC                    S5PV310_PA_SROMC
+#define S5PV310_PA_CHIPID               0x10000000
 
-/* S/PDIF */
-#define S5PV310_PA_SPDIF        0xE1100000
+#define S5PV310_PA_SYSCON               0x10010000
+#define S5PV310_PA_PMU                  0x10020000
+#define S5PV310_PA_CMU                  0x10030000
 
-/* I2S */
-#define S5PV310_PA_I2S0         0x03830000
-#define S5PV310_PA_I2S1         0xE3100000
-#define S5PV310_PA_I2S2         0xE2A00000
+#define S5PV310_PA_WATCHDOG             0x10060000
+#define S5PV310_PA_RTC                  0x10070000
 
-/* PCM */
-#define S5PV310_PA_PCM0         0x03840000
-#define S5PV310_PA_PCM1         0x13980000
-#define S5PV310_PA_PCM2         0x13990000
+#define S5PV310_PA_DMC0                 0x10400000
 
-/* AC97 */
-#define S5PV310_PA_AC97         0x139A0000
+#define S5PV310_PA_COMBINER             0x10448000
 
-#define S5PV310_PA_UART                 (0x13800000)
+#define S5PV310_PA_COREPERI             0x10500000
+#define S5PV310_PA_GIC_CPU              0x10500100
+#define S5PV310_PA_TWD                  0x10500600
+#define S5PV310_PA_GIC_DIST             0x10501000
+#define S5PV310_PA_L2CC                 0x10502000
 
-#define S5P_PA_UART(x)                  (S5PV310_PA_UART + ((x) * S3C_UART_OFFSET))
-#define S5P_PA_UART0                    S5P_PA_UART(0)
-#define S5P_PA_UART1                    S5P_PA_UART(1)
-#define S5P_PA_UART2                    S5P_PA_UART(2)
-#define S5P_PA_UART3                    S5P_PA_UART(3)
-#define S5P_PA_UART4                    S5P_PA_UART(4)
-
-#define S5P_SZ_UART                     SZ_256
-
-#define S5PV310_PA_IIC(x)               (0x13860000 + ((x) * 0x10000))
-
-#define S5PV310_PA_TIMER                (0x139D0000)
-#define S5P_PA_TIMER                    S5PV310_PA_TIMER
-
-#define S5PV310_PA_SDRAM                (0x40000000)
-#define S5P_PA_SDRAM                    S5PV310_PA_SDRAM
+#define S5PV310_PA_MDMA                 0x10810000
+#define S5PV310_PA_PDMA0                0x12680000
+#define S5PV310_PA_PDMA1                0x12690000
 
 #define S5PV310_PA_SYSMMU_MDMA          0x10A40000
 #define S5PV310_PA_SYSMMU_SSS           0x10A50000
@@ -125,8 +78,31 @@
 #define S5PV310_PA_SYSMMU_MFC_L         0x13620000
 #define S5PV310_PA_SYSMMU_MFC_R         0x13630000
 
-/* compatibiltiy defines. */
-#define S3C_PA_UART                     S5PV310_PA_UART
+#define S5PV310_PA_GPIO1                0x11400000
+#define S5PV310_PA_GPIO2                0x11000000
+#define S5PV310_PA_GPIO3                0x03860000
+
+#define S5PV310_PA_MIPI_CSIS0           0x11880000
+#define S5PV310_PA_MIPI_CSIS1           0x11890000
+
+#define S5PV310_PA_HSMMC(x)             (0x12510000 + ((x) * 0x10000))
+
+#define S5PV310_PA_SROMC                0x12570000
+
+#define S5PV310_PA_UART                 0x13800000
+
+#define S5PV310_PA_IIC(x)               (0x13860000 + ((x) * 0x10000))
+
+#define S5PV310_PA_AC97                 0x139A0000
+
+#define S5PV310_PA_TIMER                0x139D0000
+
+#define S5PV310_PA_SDRAM                0x40000000
+
+#define S5PV310_PA_SPDIF                0xE1100000
+
+/* Compatibiltiy Defines */
+
 #define S3C_PA_HSMMC0                   S5PV310_PA_HSMMC(0)
 #define S3C_PA_HSMMC1                   S5PV310_PA_HSMMC(1)
 #define S3C_PA_HSMMC2                   S5PV310_PA_HSMMC(2)
@@ -141,7 +117,28 @@
 #define S3C_PA_IIC7                     S5PV310_PA_IIC(7)
 #define S3C_PA_RTC                      S5PV310_PA_RTC
 #define S3C_PA_WDT                      S5PV310_PA_WATCHDOG
+
+#define S5P_PA_CHIPID                   S5PV310_PA_CHIPID
 #define S5P_PA_MIPI_CSIS0               S5PV310_PA_MIPI_CSIS0
 #define S5P_PA_MIPI_CSIS1               S5PV310_PA_MIPI_CSIS1
+#define S5P_PA_ONENAND                  S5PC210_PA_ONENAND
+#define S5P_PA_ONENAND_DMA              S5PC210_PA_ONENAND_DMA
+#define S5P_PA_SDRAM                    S5PV310_PA_SDRAM
+#define S5P_PA_SROMC                    S5PV310_PA_SROMC
+#define S5P_PA_SYSCON                   S5PV310_PA_SYSCON
+#define S5P_PA_TIMER                    S5PV310_PA_TIMER
+
+/* UART */
+
+#define S3C_PA_UART                     S5PV310_PA_UART
+
+#define S5P_PA_UART(x)                  (S3C_PA_UART + ((x) * S3C_UART_OFFSET))
+#define S5P_PA_UART0                    S5P_PA_UART(0)
+#define S5P_PA_UART1                    S5P_PA_UART(1)
+#define S5P_PA_UART2                    S5P_PA_UART(2)
+#define S5P_PA_UART3                    S5P_PA_UART(3)
+#define S5P_PA_UART4                    S5P_PA_UART(4)
+
+#define S5P_SZ_UART                     SZ_256
 
 #endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index d43c5ef58eb..bd3e1bfdd6a 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -241,6 +241,9 @@ static struct locomo_platform_data locomo_info = {
 struct platform_device collie_locomo_device = {
         .name           = "locomo",
         .id             = 0,
+        .dev            = {
+                .platform_data  = &locomo_info,
+        },
         .num_resources  = ARRAY_SIZE(locomo_resources),
         .resource       = locomo_resources,
 };
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index 2123b96b563..4303a86e6e3 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -454,6 +454,7 @@ static void __init ag5evm_init(void)
         gpio_direction_output(GPIO_PORT217, 0);
         mdelay(1);
         gpio_set_value(GPIO_PORT217, 1);
+        mdelay(100);
 
         /* LCD backlight controller */
         gpio_request(GPIO_PORT235, NULL); /* RESET */
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 3cf0951caa2..81d6536552a 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -1303,7 +1303,7 @@ static void __init ap4evb_init(void)
 
         lcdc_info.clock_source                  = LCDC_CLK_BUS;
         lcdc_info.ch[0].interface_type          = RGB18;
-        lcdc_info.ch[0].clock_divider           = 2;
+        lcdc_info.ch[0].clock_divider           = 3;
         lcdc_info.ch[0].flags                   = 0;
         lcdc_info.ch[0].lcd_size_cfg.width      = 152;
         lcdc_info.ch[0].lcd_size_cfg.height     = 91;
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index fb4213a4e15..1657eac5dde 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -303,7 +303,7 @@ static struct sh_mobile_lcdc_info lcdc_info = {
                 .lcd_cfg = mackerel_lcdc_modes,
                 .num_cfg = ARRAY_SIZE(mackerel_lcdc_modes),
                 .interface_type         = RGB24,
-                .clock_divider          = 2,
+                .clock_divider          = 3,
                 .flags                  = 0,
                 .lcd_size_cfg.width     = 152,
                 .lcd_size_cfg.height    = 91,
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index ddd4a1b775f..7e58904c1c8 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -263,7 +263,7 @@ static struct clk div6_clks[DIV6_NR] = {
 };
 
 enum { MSTP001,
-        MSTP125, MSTP118, MSTP116, MSTP100,
+        MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100,
         MSTP219,
         MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
         MSTP331, MSTP329, MSTP325, MSTP323, MSTP312,
@@ -275,6 +275,10 @@ enum { MSTP001,
 
 static struct clk mstp_clks[MSTP_NR] = {
         [MSTP001] = MSTP(&div4_clks[DIV4_HP], SMSTPCR0, 1, 0), /* IIC2 */
+        [MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* CEU1 */
+        [MSTP128] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 28, 0), /* CSI2-RX1 */
+        [MSTP127] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 27, 0), /* CEU0 */
+        [MSTP126] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 26, 0), /* CSI2-RX0 */
         [MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */
         [MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX0 */
         [MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */
@@ -306,6 +310,9 @@ static struct clk_lookup lookups[] = {
         CLKDEV_CON_ID("r_clk", &r_clk),
 
         /* DIV6 clocks */
+        CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]),
+        CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]),
+        CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]),
         CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
         CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
         CLKDEV_ICK_ID("dsi0p_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
@@ -313,11 +320,15 @@ static struct clk_lookup lookups[] = {
 
         /* MSTP32 clocks */
         CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */
-        CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
+        CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP129]), /* CEU1 */
+        CLKDEV_DEV_ID("sh-mobile-csi2.1", &mstp_clks[MSTP128]), /* CSI2-RX1 */
+        CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU0 */
+        CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2-RX0 */
         CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */
         CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
-        CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
         CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
+        CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
+        CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
         CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */
         CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
         CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */
diff --git a/arch/arm/mach-shmobile/include/mach/head-ap4evb.txt b/arch/arm/mach-shmobile/include/mach/head-ap4evb.txt
index efd3687ba19..3029aba3868 100644
--- a/arch/arm/mach-shmobile/include/mach/head-ap4evb.txt
+++ b/arch/arm/mach-shmobile/include/mach/head-ap4evb.txt
@@ -6,13 +6,10 @@ LIST "RWT Setting"
 EW 0xE6020004, 0xA500
 EW 0xE6030004, 0xA500
 
-DD 0x01001000, 0x01001000
-
 LIST "GPIO Setting"
 EB 0xE6051013, 0xA2
 
 LIST "CPG"
-ED 0xE6150080, 0x00000180
 ED 0xE61500C0, 0x00000002
 
 WAIT 1, 0xFE40009C
@@ -37,6 +34,9 @@ ED 0xE615002C, 0x93000040
 
 WAIT 1, 0xFE40009C
 
+LIST "SUB/USBClk"
+ED 0xE6150080, 0x00000180
+
 LIST "BSC"
 ED 0xFEC10000, 0x00E0001B
 
@@ -53,7 +53,7 @@ ED 0xFE400048, 0x20C18505
 ED 0xFE40004C, 0x00110209
 ED 0xFE400010, 0x00000087
 
-WAIT 10, 0xFE40009C
+WAIT 30, 0xFE40009C
 
 ED 0xFE400084, 0x0000003F
 EB 0xFE500000, 0x00
@@ -84,7 +84,7 @@ ED 0xE6150004, 0x80331050
 
 WAIT 1, 0xFE40009C
 
-ED 0xE6150354, 0x00000002
+ED 0xFE400354, 0x01AD8002
 
 LIST "SCIF0 - Serial port for earlyprintk"
 EB 0xE6053098, 0x11
diff --git a/arch/arm/mach-shmobile/include/mach/head-mackerel.txt b/arch/arm/mach-shmobile/include/mach/head-mackerel.txt
index efd3687ba19..3029aba3868 100644
--- a/arch/arm/mach-shmobile/include/mach/head-mackerel.txt
+++ b/arch/arm/mach-shmobile/include/mach/head-mackerel.txt
@@ -6,13 +6,10 @@ LIST "RWT Setting"
 EW 0xE6020004, 0xA500
 EW 0xE6030004, 0xA500
 
-DD 0x01001000, 0x01001000
-
 LIST "GPIO Setting"
 EB 0xE6051013, 0xA2
 
 LIST "CPG"
-ED 0xE6150080, 0x00000180
 ED 0xE61500C0, 0x00000002
 
 WAIT 1, 0xFE40009C
@@ -37,6 +34,9 @@ ED 0xE615002C, 0x93000040
 
 WAIT 1, 0xFE40009C
 
+LIST "SUB/USBClk"
+ED 0xE6150080, 0x00000180
+
 LIST "BSC"
 ED 0xFEC10000, 0x00E0001B
 
@@ -53,7 +53,7 @@ ED 0xFE400048, 0x20C18505
 ED 0xFE40004C, 0x00110209
 ED 0xFE400010, 0x00000087
 
-WAIT 10, 0xFE40009C
+WAIT 30, 0xFE40009C
 
 ED 0xFE400084, 0x0000003F
 EB 0xFE500000, 0x00
@@ -84,7 +84,7 @@ ED 0xE6150004, 0x80331050
 
 WAIT 1, 0xFE40009C
 
-ED 0xE6150354, 0x00000002
+ED 0xFE400354, 0x01AD8002
 
 LIST "SCIF0 - Serial port for earlyprintk"
 EB 0xE6053098, 0x11
diff --git a/arch/arm/mach-spear3xx/include/mach/spear320.h b/arch/arm/mach-spear3xx/include/mach/spear320.h
index cacf17a958c..53677e464d4 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear320.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear320.h
@@ -62,7 +62,7 @@
 #define SPEAR320_SMII1_BASE             0xAB000000
 #define SPEAR320_SMII1_SIZE             0x01000000
 
-#define SPEAR320_SOC_CONFIG_BASE        0xB4000000
+#define SPEAR320_SOC_CONFIG_BASE        0xB3000000
 #define SPEAR320_SOC_CONFIG_SIZE        0x00000070
 /* Interrupt registers offsets and masks */
 #define INT_STS_MASK_REG                0x04
diff --git a/arch/arm/mach-tegra/include/mach/kbc.h b/arch/arm/mach-tegra/include/mach/kbc.h
index 66ad2760c62..04c779832c7 100644
--- a/arch/arm/mach-tegra/include/mach/kbc.h
+++ b/arch/arm/mach-tegra/include/mach/kbc.h
@@ -57,5 +57,6 @@ struct tegra_kbc_platform_data {
         const struct matrix_keymap_data *keymap_data;
 
         bool wakeup;
+        bool use_fn_map;
 };
 #endif
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 9d30c6f804b..e4509bae8fc 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -405,7 +405,7 @@ config CPU_V6
 config CPU_32v6K
         bool "Support ARM V6K processor extensions" if !SMP
         depends on CPU_V6 || CPU_V7
-        default y if SMP && !(ARCH_MX3 || ARCH_OMAP2)
+        default y if SMP
         help
           Say Y here if your ARMv6 processor supports the 'K' extension.
           This enables the kernel to use some instructions not present
@@ -416,7 +416,7 @@ config CPU_32v6K
 # ARMv7
 config CPU_V7
         bool "Support ARM V7 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX
-        select CPU_32v6K if !ARCH_OMAP2
+        select CPU_32v6K
         select CPU_32v7
         select CPU_ABRT_EV7
         select CPU_PABRT_V7
@@ -644,7 +644,7 @@ config ARM_THUMBEE
 
 config SWP_EMULATE
         bool "Emulate SWP/SWPB instructions"
-        depends on CPU_V7 && !CPU_V6
+        depends on !CPU_USE_DOMAINS && CPU_V7 && !CPU_V6
         select HAVE_PROC_CPU if PROC_FS
         default y if SMP
         help
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 170c9bb9586..f2ce38e085d 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -49,7 +49,13 @@ static inline void cache_wait(void __iomem *reg, unsigned long mask)
 static inline void cache_sync(void)
 {
         void __iomem *base = l2x0_base;
+
+#ifdef CONFIG_ARM_ERRATA_753970
+        /* write to an unmmapped register */
+        writel_relaxed(0, base + L2X0_DUMMY_REG);
+#else
         writel_relaxed(0, base + L2X0_CACHE_SYNC);
+#endif
         cache_wait(base + L2X0_CACHE_SYNC, 1);
 }
 
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 0c1172b56b4..8e335623913 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -264,6 +264,12 @@ __v7_setup:
         orreq   r10, r10, #1 << 6               @ set bit #6
         mcreq   p15, 0, r10, c15, c0, 1         @ write diagnostic register
 #endif
+#ifdef CONFIG_ARM_ERRATA_751472
+        cmp     r6, #0x30                       @ present prior to r3p0
+        mrclt   p15, 0, r10, c15, c0, 1         @ read diagnostic register
+        orrlt   r10, r10, #1 << 11              @ set bit #11
+        mcrlt   p15, 0, r10, c15, c0, 1         @ write diagnostic register
+#endif
 
 3:      mov     r10, #0
 #ifdef HARVARD_CACHE
diff --git a/arch/arm/oprofile/common.c b/arch/arm/oprofile/common.c
index 8aa974491df..c074e66ad22 100644
--- a/arch/arm/oprofile/common.c
+++ b/arch/arm/oprofile/common.c
@@ -10,8 +10,6 @@
  */
 
 #include <linux/cpumask.h>
-#include <linux/err.h>
-#include <linux/errno.h>
 #include <linux/init.h>
 #include <linux/mutex.h>
 #include <linux/oprofile.h>
@@ -46,6 +44,7 @@ char *op_name_from_perf_id(void)
                 return NULL;
         }
 }
+#endif
 
 static int report_trace(struct stackframe *frame, void *d)
 {
@@ -85,7 +84,7 @@ static struct frame_tail* user_backtrace(struct frame_tail *tail)
 
         /* frame pointers should strictly progress back up the stack
          * (towards higher addresses) */
-        if (tail >= buftail[0].fp)
+        if (tail + 1 >= buftail[0].fp)
                 return NULL;
 
         return buftail[0].fp-1;
@@ -111,6 +110,7 @@ static void arm_backtrace(struct pt_regs * const regs, unsigned int depth)
 
 int __init oprofile_arch_init(struct oprofile_operations *ops)
 {
+        /* provide backtrace support also in timer mode: */
         ops->backtrace          = arm_backtrace;
 
         return oprofile_perf_init(ops);
@@ -120,11 +120,3 @@ void __exit oprofile_arch_exit(void)
 {
         oprofile_perf_exit();
 }
-#else
-int __init oprofile_arch_init(struct oprofile_operations *ops)
-{
-        pr_info("oprofile: hardware counters not available\n");
-        return -ENODEV;
-}
-void __exit oprofile_arch_exit(void) {}
-#endif /* CONFIG_HW_PERF_EVENTS */
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c
index 459b319a9fa..49d3208793e 100644
--- a/arch/arm/plat-omap/mailbox.c
+++ b/arch/arm/plat-omap/mailbox.c
@@ -322,15 +322,18 @@ static void omap_mbox_fini(struct omap_mbox *mbox)
 
 struct omap_mbox *omap_mbox_get(const char *name, struct notifier_block *nb)
 {
-        struct omap_mbox *mbox;
-        int ret;
+        struct omap_mbox *_mbox, *mbox = NULL;
+        int i, ret;
 
         if (!mboxes)
                 return ERR_PTR(-EINVAL);
 
-        for (mbox = *mboxes; mbox; mbox++)
-                if (!strcmp(mbox->name, name))
+        for (i = 0; (_mbox = mboxes[i]); i++) {
+                if (!strcmp(_mbox->name, name)) {
+                        mbox = _mbox;
                         break;
+                }
+        }
 
         if (!mbox)
                 return ERR_PTR(-ENOENT);
diff --git a/arch/arm/plat-pxa/mfp.c b/arch/arm/plat-pxa/mfp.c
index b77e018d36c..a9aa5ad3f4e 100644
--- a/arch/arm/plat-pxa/mfp.c
+++ b/arch/arm/plat-pxa/mfp.c
@@ -139,10 +139,11 @@ static const unsigned long mfpr_edge[] = {
 #define mfp_configured(p)       ((p)->config != -1)
 
 /*
- * perform a read-back of any MFPR register to make sure the
+ * perform a read-back of any valid MFPR register to make sure the
  * previous writings are finished
  */
-#define mfpr_sync()     (void)__raw_readl(mfpr_mmio_base + 0)
+static unsigned long mfpr_off_readback;
+#define mfpr_sync()     (void)__raw_readl(mfpr_mmio_base + mfpr_off_readback)
 
 static inline void __mfp_config_run(struct mfp_pin *p)
 {
@@ -248,6 +249,9 @@ void __init mfp_init_addr(struct mfp_addr_map *map)
 
         spin_lock_irqsave(&mfp_spin_lock, flags);
 
+        /* mfp offset for readback */
+        mfpr_off_readback = map[0].offset;
+
         for (p = map; p->start != MFP_PIN_INVALID; p++) {
                 offset = p->offset;
                 i = p->start;
diff --git a/arch/arm/plat-s5p/dev-uart.c b/arch/arm/plat-s5p/dev-uart.c
index 6a734288617..afaf87fdb93 100644
--- a/arch/arm/plat-s5p/dev-uart.c
+++ b/arch/arm/plat-s5p/dev-uart.c
@@ -28,7 +28,7 @@
 static struct resource s5p_uart0_resource[] = {
         [0] = {
                 .start  = S5P_PA_UART0,
-                .end    = S5P_PA_UART0 + S5P_SZ_UART,
+                .end    = S5P_PA_UART0 + S5P_SZ_UART - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -51,7 +51,7 @@ static struct resource s5p_uart0_resource[] = {
 static struct resource s5p_uart1_resource[] = {
         [0] = {
                 .start  = S5P_PA_UART1,
-                .end    = S5P_PA_UART1 + S5P_SZ_UART,
+                .end    = S5P_PA_UART1 + S5P_SZ_UART - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -74,7 +74,7 @@ static struct resource s5p_uart1_resource[] = {
 static struct resource s5p_uart2_resource[] = {
         [0] = {
                 .start  = S5P_PA_UART2,
-                .end    = S5P_PA_UART2 + S5P_SZ_UART,
+                .end    = S5P_PA_UART2 + S5P_SZ_UART - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -98,7 +98,7 @@ static struct resource s5p_uart3_resource[] = {
 #if CONFIG_SERIAL_SAMSUNG_UARTS > 3
         [0] = {
                 .start  = S5P_PA_UART3,
-                .end    = S5P_PA_UART3 + S5P_SZ_UART,
+                .end    = S5P_PA_UART3 + S5P_SZ_UART - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -123,7 +123,7 @@ static struct resource s5p_uart4_resource[] = {
 #if CONFIG_SERIAL_SAMSUNG_UARTS > 4
         [0] = {
                 .start  = S5P_PA_UART4,
-                .end    = S5P_PA_UART4 + S5P_SZ_UART,
+                .end    = S5P_PA_UART4 + S5P_SZ_UART - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -148,7 +148,7 @@ static struct resource s5p_uart5_resource[] = {
 #if CONFIG_SERIAL_SAMSUNG_UARTS > 5
         [0] = {
                 .start  = S5P_PA_UART5,
-                .end    = S5P_PA_UART5 + S5P_SZ_UART,
+                .end    = S5P_PA_UART5 + S5P_SZ_UART - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
diff --git a/arch/arm/plat-samsung/dev-ts.c b/arch/arm/plat-samsung/dev-ts.c
index 236ef8427d7..3e4bd8147bf 100644
--- a/arch/arm/plat-samsung/dev-ts.c
+++ b/arch/arm/plat-samsung/dev-ts.c
@@ -58,4 +58,3 @@ void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
 
         s3c_device_ts.dev.platform_data = npd;
 }
-EXPORT_SYMBOL(s3c24xx_ts_set_platdata);
diff --git a/arch/arm/plat-samsung/dev-uart.c b/arch/arm/plat-samsung/dev-uart.c
index 3776cd95245..5928105490f 100644
--- a/arch/arm/plat-samsung/dev-uart.c
+++ b/arch/arm/plat-samsung/dev-uart.c
@@ -15,6 +15,8 @@
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 
+#include <plat/devs.h>
+
 /* uart devices */
 
 static struct platform_device s3c24xx_uart_device0 = {
diff --git a/arch/arm/plat-spear/include/plat/uncompress.h b/arch/arm/plat-spear/include/plat/uncompress.h
index 99ba6789cc9..6dd455bafdf 100644
--- a/arch/arm/plat-spear/include/plat/uncompress.h
+++ b/arch/arm/plat-spear/include/plat/uncompress.h
@@ -24,10 +24,10 @@ static inline void putc(int c)
 {
         void __iomem *base = (void __iomem *)SPEAR_DBG_UART_BASE;
 
-        while (readl(base + UART01x_FR) & UART01x_FR_TXFF)
+        while (readl_relaxed(base + UART01x_FR) & UART01x_FR_TXFF)
                 barrier();
 
-        writel(c, base + UART01x_DR);
+        writel_relaxed(c, base + UART01x_DR);
 }
 
 static inline void flush(void)
diff --git a/arch/arm/plat-spear/include/plat/vmalloc.h b/arch/arm/plat-spear/include/plat/vmalloc.h
index 09e9372aea2..8c8b24d0704 100644
--- a/arch/arm/plat-spear/include/plat/vmalloc.h
+++ b/arch/arm/plat-spear/include/plat/vmalloc.h
@@ -14,6 +14,6 @@
 #ifndef __PLAT_VMALLOC_H
 #define __PLAT_VMALLOC_H
 
-#define VMALLOC_END             0xF0000000
+#define VMALLOC_END             0xF0000000UL
 
 #endif /* __PLAT_VMALLOC_H */
diff --git a/arch/blackfin/lib/outs.S b/arch/blackfin/lib/outs.S
index 250f4d4b943..06a5e674401 100644
--- a/arch/blackfin/lib/outs.S
+++ b/arch/blackfin/lib/outs.S
@@ -13,6 +13,8 @@
 .align 2
 
 ENTRY(_outsl)
+        CC = R2 == 0;
+        IF CC JUMP 1f;
         P0 = R0;        /* P0 = port */
         P1 = R1;        /* P1 = address */
         P2 = R2;        /* P2 = count */
@@ -20,10 +22,12 @@ ENTRY(_outsl)
         LSETUP( .Llong_loop_s, .Llong_loop_e) LC0 = P2;
 .Llong_loop_s: R0 = [P1++];
 .Llong_loop_e: [P0] = R0;
-        RTS;
+1:      RTS;
 ENDPROC(_outsl)
 
 ENTRY(_outsw)
+        CC = R2 == 0;
+        IF CC JUMP 1f;
         P0 = R0;        /* P0 = port */
         P1 = R1;        /* P1 = address */
         P2 = R2;        /* P2 = count */
@@ -31,10 +35,12 @@ ENTRY(_outsw)
         LSETUP( .Lword_loop_s, .Lword_loop_e) LC0 = P2;
 .Lword_loop_s: R0 = W[P1++];
 .Lword_loop_e: W[P0] = R0;
-        RTS;
+1:      RTS;
 ENDPROC(_outsw)
 
 ENTRY(_outsb)
+        CC = R2 == 0;
+        IF CC JUMP 1f;
         P0 = R0;        /* P0 = port */
         P1 = R1;        /* P1 = address */
         P2 = R2;        /* P2 = count */
@@ -42,10 +48,12 @@ ENTRY(_outsb)
         LSETUP( .Lbyte_loop_s, .Lbyte_loop_e) LC0 = P2;
 .Lbyte_loop_s: R0 = B[P1++];
 .Lbyte_loop_e: B[P0] = R0;
-        RTS;
+1:      RTS;
 ENDPROC(_outsb)
 
 ENTRY(_outsw_8)
+        CC = R2 == 0;
+        IF CC JUMP 1f;
         P0 = R0;        /* P0 = port */
         P1 = R1;        /* P1 = address */
         P2 = R2;        /* P2 = count */
@@ -56,5 +64,5 @@ ENTRY(_outsw_8)
                 R0 = R0 << 8;
                 R0 = R0 + R1;
 .Lword8_loop_e: W[P0] = R0;
-        RTS;
+1:      RTS;
 ENDPROC(_outsw_8)
diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S
index 790c767ca95..ab4a925a443 100644
--- a/arch/blackfin/mach-common/cache.S
+++ b/arch/blackfin/mach-common/cache.S
@@ -58,6 +58,8 @@
 1:
 .ifeqs "\flushins", BROK_FLUSH_INST
         \flushins [P0++];
+        nop;
+        nop;
 2:      nop;
 .else
 2:      \flushins [P0++];
diff --git a/arch/cris/kernel/vmlinux.lds.S b/arch/cris/kernel/vmlinux.lds.S
index 442218980db..c49be845f96 100644
--- a/arch/cris/kernel/vmlinux.lds.S
+++ b/arch/cris/kernel/vmlinux.lds.S
@@ -72,11 +72,6 @@ SECTIONS
         INIT_TEXT_SECTION(PAGE_SIZE)
         .init.data : { INIT_DATA }
         .init.setup : { INIT_SETUP(16) }
-#ifdef CONFIG_ETRAX_ARCH_V32
-        __start___param = .;
-        __param : { *(__param) }
-        __stop___param = .;
-#endif
         .initcall.init : {
                 INIT_CALLS
         }
diff --git a/arch/m68k/include/asm/string.h b/arch/m68k/include/asm/string.h
index 65b13128283..32198454da7 100644
--- a/arch/m68k/include/asm/string.h
+++ b/arch/m68k/include/asm/string.h
@@ -99,14 +99,12 @@ static inline int strcmp(const char *cs, const char *ct)
                 : "+a" (cs), "+a" (ct), "=d" (res));
         return res;
 }
+#endif /* CONFIG_COLDFIRE */
 
 #define __HAVE_ARCH_MEMMOVE
 extern void *memmove(void *, const void *, __kernel_size_t);
 
-#define __HAVE_ARCH_MEMCMP
-extern int memcmp(const void *, const void *, __kernel_size_t);
 #define memcmp(d, s, n) __builtin_memcmp(d, s, n)
-#endif /* CONFIG_COLDFIRE */
 
 #define __HAVE_ARCH_MEMSET
 extern void *memset(void *, int, __kernel_size_t);
diff --git a/arch/m68k/lib/string.c b/arch/m68k/lib/string.c
index 4253f870e54..d399c5f2563 100644
--- a/arch/m68k/lib/string.c
+++ b/arch/m68k/lib/string.c
@@ -243,14 +243,3 @@ void *memmove(void *dest, const void *src, size_t n)
         return xdest;
 }
 EXPORT_SYMBOL(memmove);
-
-int memcmp(const void *cs, const void *ct, size_t count)
-{
-        const unsigned char *su1, *su2;
-
-        for (su1 = cs, su2 = ct; count > 0; ++su1, ++su2, count--)
-                if (*su1 != *su2)
-                        return *su1 < *su2 ? -1 : +1;
-        return 0;
-}
-EXPORT_SYMBOL(memcmp);
diff --git a/arch/m68knommu/kernel/vmlinux.lds.S b/arch/m68knommu/kernel/vmlinux.lds.S
index ef332136f96..47e15ebfd89 100644
--- a/arch/m68knommu/kernel/vmlinux.lds.S
+++ b/arch/m68knommu/kernel/vmlinux.lds.S
@@ -141,6 +141,12 @@ SECTIONS {
                 *(__param)
                 __stop___param = .;
 
+                /* Built-in module versions */
+                . = ALIGN(4) ;
+                __start___modver = .;
+                *(__modver)
+                __stop___modver = .;
+
                 . = ALIGN(4) ;
                 _etext = . ;
         } > TEXT
diff --git a/arch/m68knommu/lib/Makefile b/arch/m68knommu/lib/Makefile
index d94d709665a..32d852e586d 100644
--- a/arch/m68knommu/lib/Makefile
+++ b/arch/m68knommu/lib/Makefile
@@ -4,4 +4,4 @@
 
 lib-y   := ashldi3.o ashrdi3.o lshrdi3.o \
            muldi3.o mulsi3.o divsi3.o udivsi3.o modsi3.o umodsi3.o \
-           checksum.o memcpy.o memset.o delay.o
+           checksum.o memcpy.o memmove.o memset.o delay.o
diff --git a/arch/m68knommu/lib/memmove.c b/arch/m68knommu/lib/memmove.c
new file mode 100644
index 00000000000..b3dcfe9dab7
--- /dev/null
+++ b/arch/m68knommu/lib/memmove.c
@@ -0,0 +1,105 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#define __IN_STRING_C
+
+#include <linux/module.h>
+#include <linux/string.h>
+
+void *memmove(void *dest, const void *src, size_t n)
+{
+        void *xdest = dest;
+        size_t temp;
+
+        if (!n)
+                return xdest;
+
+        if (dest < src) {
+                if ((long)dest & 1) {
+                        char *cdest = dest;
+                        const char *csrc = src;
+                        *cdest++ = *csrc++;
+                        dest = cdest;
+                        src = csrc;
+                        n--;
+                }
+                if (n > 2 && (long)dest & 2) {
+                        short *sdest = dest;
+                        const short *ssrc = src;
+                        *sdest++ = *ssrc++;
+                        dest = sdest;
+                        src = ssrc;
+                        n -= 2;
+                }
+                temp = n >> 2;
+                if (temp) {
+                        long *ldest = dest;
+                        const long *lsrc = src;
+                        temp--;
+                        do
+                                *ldest++ = *lsrc++;
+                        while (temp--);
+                        dest = ldest;
+                        src = lsrc;
+                }
+                if (n & 2) {
+                        short *sdest = dest;
+                        const short *ssrc = src;
+                        *sdest++ = *ssrc++;
+                        dest = sdest;
+                        src = ssrc;
+                }
+                if (n & 1) {
+                        char *cdest = dest;
+                        const char *csrc = src;
+                        *cdest = *csrc;
+                }
+        } else {
+                dest = (char *)dest + n;
+                src = (const char *)src + n;
+                if ((long)dest & 1) {
+                        char *cdest = dest;
+                        const char *csrc = src;
+                        *--cdest = *--csrc;
+                        dest = cdest;
+                        src = csrc;
+                        n--;
+                }
+                if (n > 2 && (long)dest & 2) {
+                        short *sdest = dest;
+                        const short *ssrc = src;
+                        *--sdest = *--ssrc;
+                        dest = sdest;
+                        src = ssrc;
+                        n -= 2;
+                }
+                temp = n >> 2;
+                if (temp) {
+                        long *ldest = dest;
+                        const long *lsrc = src;
+                        temp--;
+                        do
+                                *--ldest = *--lsrc;
+                        while (temp--);
+                        dest = ldest;
+                        src = lsrc;
+                }
+                if (n & 2) {
+                        short *sdest = dest;
+                        const short *ssrc = src;
+                        *--sdest = *--ssrc;
+                        dest = sdest;
+                        src = ssrc;
+                }
+                if (n & 1) {
+                        char *cdest = dest;
+                        const char *csrc = src;
+                        *--cdest = *--csrc;
+                }
+        }
+        return xdest;
+}
+EXPORT_SYMBOL(memmove);
diff --git a/arch/m68knommu/platform/5249/intc2.c b/arch/m68knommu/platform/5249/intc2.c
index d09d9da0453..c5151f84659 100644
--- a/arch/m68knommu/platform/5249/intc2.c
+++ b/arch/m68knommu/platform/5249/intc2.c
@@ -50,8 +50,10 @@ static int __init mcf_intc2_init(void)
         int irq;
 
         /* GPIO interrupt sources */
-        for (irq = MCFINTC2_GPIOIRQ0; (irq <= MCFINTC2_GPIOIRQ7); irq++)
+        for (irq = MCFINTC2_GPIOIRQ0; (irq <= MCFINTC2_GPIOIRQ7); irq++) {
                 irq_desc[irq].chip = &intc2_irq_gpio_chip;
+                set_irq_handler(irq, handle_edge_irq);
+        }
 
         return 0;
 }
diff --git a/arch/m68knommu/platform/68328/entry.S b/arch/m68knommu/platform/68328/entry.S
index 240a7a6e25c..676960cf022 100644
--- a/arch/m68knommu/platform/68328/entry.S
+++ b/arch/m68knommu/platform/68328/entry.S
@@ -108,7 +108,6 @@ Luser_return:
         movel   %d1,%a2
 1:
         move    %a2@(TI_FLAGS),%d1      /* thread_info->flags */
-        andl    #_TIF_WORK_MASK,%d1
         jne     Lwork_to_do
         RESTORE_ALL
 
diff --git a/arch/m68knommu/platform/68360/commproc.c b/arch/m68knommu/platform/68360/commproc.c
index f27e688c404..8e4e10cc008 100644
--- a/arch/m68knommu/platform/68360/commproc.c
+++ b/arch/m68knommu/platform/68360/commproc.c
@@ -210,7 +210,7 @@ void
 cpm_install_handler(int vec, void (*handler)(), void *dev_id)
 {
 
-        request_irq(vec, handler, IRQ_FLG_LOCK, "timer", dev_id);
+        request_irq(vec, handler, 0, "timer", dev_id);
 
 /*      if (cpm_vecs[vec].handler != 0) */
 /*              printk(KERN_INFO "CPM interrupt %x replacing %x\n", */
diff --git a/arch/m68knommu/platform/68360/config.c b/arch/m68knommu/platform/68360/config.c
index ac629fa3009..9dd5bca3874 100644
--- a/arch/m68knommu/platform/68360/config.c
+++ b/arch/m68knommu/platform/68360/config.c
@@ -75,7 +75,7 @@ void hw_timer_init(void)
   /* Set compare register  32Khz / 32 / 10 = 100 */
   TCMP = 10;                                                              
 
-  request_irq(IRQ_MACHSPEC | 1, timer_routine, IRQ_FLG_LOCK, "timer", NULL);
+  request_irq(IRQ_MACHSPEC | 1, timer_routine, 0, "timer", NULL);
 #endif
 
   /* General purpose quicc timers: MC68360UM p7-20 */
diff --git a/arch/m68knommu/platform/68360/entry.S b/arch/m68knommu/platform/68360/entry.S
index 8a28788c0ee..46c1b18c9dc 100644
--- a/arch/m68knommu/platform/68360/entry.S
+++ b/arch/m68knommu/platform/68360/entry.S
@@ -104,7 +104,6 @@ Luser_return:
         movel   %d1,%a2
 1:
         move    %a2@(TI_FLAGS),%d1      /* thread_info->flags */
-        andl    #_TIF_WORK_MASK,%d1
         jne     Lwork_to_do
         RESTORE_ALL
 
diff --git a/arch/m68knommu/platform/68360/ints.c b/arch/m68knommu/platform/68360/ints.c
index ad96ab1051f..a29041c1a8a 100644
--- a/arch/m68knommu/platform/68360/ints.c
+++ b/arch/m68knommu/platform/68360/ints.c
@@ -132,8 +132,8 @@ void init_IRQ(void)
         pquicc->intr_cimr = 0x00000000;
 
         for (i = 0; (i < NR_IRQS); i++) {
-                set_irq_chip(irq, &intc_irq_chip);
-                set_irq_handler(irq, handle_level_irq);
+                set_irq_chip(i, &intc_irq_chip);
+                set_irq_handler(i, handle_level_irq);
         }
 }
 
diff --git a/arch/m68knommu/platform/coldfire/entry.S b/arch/m68knommu/platform/coldfire/entry.S
index 4ddfc3da70d..5837cf080b6 100644
--- a/arch/m68knommu/platform/coldfire/entry.S
+++ b/arch/m68knommu/platform/coldfire/entry.S
@@ -138,7 +138,6 @@ Luser_return:
         andl    #-THREAD_SIZE,%d1       /* at base of kernel stack */
         movel   %d1,%a0
         movel   %a0@(TI_FLAGS),%d1      /* get thread_info->flags */
-        andl    #0xefff,%d1
         jne     Lwork_to_do             /* still work to do */
 
 Lreturn:
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index f5ecc0566bc..d88983516e2 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -4,6 +4,7 @@ config MIPS
         select HAVE_GENERIC_DMA_COHERENT
         select HAVE_IDE
         select HAVE_OPROFILE
+        select HAVE_IRQ_WORK
         select HAVE_PERF_EVENTS
         select PERF_USE_VMALLOC
         select HAVE_ARCH_KGDB
@@ -208,6 +209,7 @@ config MACH_JZ4740
         select ARCH_REQUIRE_GPIOLIB
         select SYS_HAS_EARLY_PRINTK
         select HAVE_PWM
+        select HAVE_CLK
 
 config LASAT
         bool "LASAT Networks platforms"
@@ -333,6 +335,8 @@ config PNX8550_STB810
 config PMC_MSP
         bool "PMC-Sierra MSP chipsets"
         depends on EXPERIMENTAL
+        select CEVT_R4K
+        select CSRC_R4K
         select DMA_NONCOHERENT
         select SWAP_IO_SPACE
         select NO_EXCEPT_FILL
diff --git a/arch/mips/alchemy/mtx-1/board_setup.c b/arch/mips/alchemy/mtx-1/board_setup.c
index 6398fa95905..40b84b99119 100644
--- a/arch/mips/alchemy/mtx-1/board_setup.c
+++ b/arch/mips/alchemy/mtx-1/board_setup.c
@@ -54,8 +54,8 @@ int mtx1_pci_idsel(unsigned int devsel, int assert);
 
 static void mtx1_reset(char *c)
 {
-        /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
-        au_writel(0x00000000, 0xAE00001C);
+        /* Jump to the reset vector */
+        __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
 }
 
 static void mtx1_power_off(void)
diff --git a/arch/mips/alchemy/mtx-1/platform.c b/arch/mips/alchemy/mtx-1/platform.c
index e30e42add69..956f946218c 100644
--- a/arch/mips/alchemy/mtx-1/platform.c
+++ b/arch/mips/alchemy/mtx-1/platform.c
@@ -28,6 +28,8 @@
 #include <linux/mtd/physmap.h>
 #include <mtd/mtd-abi.h>
 
+#include <asm/mach-au1x00/au1xxx_eth.h>
+
 static struct gpio_keys_button mtx1_gpio_button[] = {
         {
                 .gpio = 207,
@@ -140,10 +142,17 @@ static struct __initdata platform_device * mtx1_devs[] = {
         &mtx1_mtd,
 };
 
+static struct au1000_eth_platform_data mtx1_au1000_eth0_pdata = {
+        .phy_search_highest_addr        = 1,
+        .phy1_search_mac0               = 1,
+};
+
 static int __init mtx1_register_devices(void)
 {
         int rc;
 
+        au1xxx_override_eth_cfg(0, &mtx1_au1000_eth0_pdata);
+
         rc = gpio_request(mtx1_gpio_button[0].gpio,
                                         mtx1_gpio_button[0].desc);
         if (rc < 0) {
diff --git a/arch/mips/alchemy/xxs1500/board_setup.c b/arch/mips/alchemy/xxs1500/board_setup.c
index b43c918925d..80c521e5290 100644
--- a/arch/mips/alchemy/xxs1500/board_setup.c
+++ b/arch/mips/alchemy/xxs1500/board_setup.c
@@ -36,8 +36,8 @@
 
 static void xxs1500_reset(char *c)
 {
-        /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
-        au_writel(0x00000000, 0xAE00001C);
+        /* Jump to the reset vector */
+        __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
 }
 
 static void xxs1500_power_off(void)
diff --git a/arch/mips/include/asm/perf_event.h b/arch/mips/include/asm/perf_event.h
index e00007cf816..d0c77496c72 100644
--- a/arch/mips/include/asm/perf_event.h
+++ b/arch/mips/include/asm/perf_event.h
@@ -11,15 +11,5 @@
 
 #ifndef __MIPS_PERF_EVENT_H__
 #define __MIPS_PERF_EVENT_H__
-
-/*
- * MIPS performance counters do not raise NMI upon overflow, a regular
- * interrupt will be signaled. Hence we can do the pending perf event
- * work at the tail of the irq handler.
- */
-static inline void
-set_perf_event_pending(void)
-{
-}
-
+/* Leave it empty here. The file is required by linux/perf_event.h */
 #endif /* __MIPS_PERF_EVENT_H__ */
diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c
index 5a84a1f1123..94ca2b018af 100644
--- a/arch/mips/kernel/ftrace.c
+++ b/arch/mips/kernel/ftrace.c
@@ -17,29 +17,13 @@
 #include <asm/cacheflush.h>
 #include <asm/uasm.h>
 
-/*
- * If the Instruction Pointer is in module space (0xc0000000), return true;
- * otherwise, it is in kernel space (0x80000000), return false.
- *
- * FIXME: This will not work when the kernel space and module space are the
- * same. If they are the same, we need to modify scripts/recordmcount.pl,
- * ftrace_make_nop/call() and the other related parts to ensure the
- * enabling/disabling of the calling site to _mcount is right for both kernel
- * and module.
- */
-
-static inline int in_module(unsigned long ip)
-{
-        return ip & 0x40000000;
-}
+#include <asm-generic/sections.h>
 
 #ifdef CONFIG_DYNAMIC_FTRACE
 
 #define JAL 0x0c000000          /* jump & link: ip --> ra, jump to target */
 #define ADDR_MASK 0x03ffffff    /*  op_code|addr : 31...26|25 ....0 */
 
-#define INSN_B_1F_4 0x10000004  /* b 1f; offset = 4 */
-#define INSN_B_1F_5 0x10000005  /* b 1f; offset = 5 */
 #define INSN_NOP 0x00000000     /* nop */
 #define INSN_JAL(addr)  \
         ((unsigned int)(JAL | (((addr) >> 2) & ADDR_MASK)))
@@ -69,6 +53,20 @@ static inline void ftrace_dyn_arch_init_insns(void)
 #endif
 }
 
+/*
+ * Check if the address is in kernel space
+ *
+ * Clone core_kernel_text() from kernel/extable.c, but doesn't call
+ * init_kernel_text() for Ftrace doesn't trace functions in init sections.
+ */
+static inline int in_kernel_space(unsigned long ip)
+{
+        if (ip >= (unsigned long)_stext &&
+            ip <= (unsigned long)_etext)
+                return 1;
+        return 0;
+}
+
 static int ftrace_modify_code(unsigned long ip, unsigned int new_code)
 {
         int faulted;
@@ -84,6 +82,42 @@ static int ftrace_modify_code(unsigned long ip, unsigned int new_code)
         return 0;
 }
 
+/*
+ * The details about the calling site of mcount on MIPS
+ *
+ * 1. For kernel:
+ *
+ * move at, ra
+ * jal _mcount          --> nop
+ *
+ * 2. For modules:
+ *
+ * 2.1 For KBUILD_MCOUNT_RA_ADDRESS and CONFIG_32BIT
+ *
+ * lui v1, hi_16bit_of_mcount        --> b 1f (0x10000005)
+ * addiu v1, v1, low_16bit_of_mcount
+ * move at, ra
+ * move $12, ra_address
+ * jalr v1
+ *  sub sp, sp, 8
+ *                                  1: offset = 5 instructions
+ * 2.2 For the Other situations
+ *
+ * lui v1, hi_16bit_of_mcount        --> b 1f (0x10000004)
+ * addiu v1, v1, low_16bit_of_mcount
+ * move at, ra
+ * jalr v1
+ *  nop | move $12, ra_address | sub sp, sp, 8
+ *                                  1: offset = 4 instructions
+ */
+
+#if defined(KBUILD_MCOUNT_RA_ADDRESS) && defined(CONFIG_32BIT)
+#define MCOUNT_OFFSET_INSNS 5
+#else
+#define MCOUNT_OFFSET_INSNS 4
+#endif
+#define INSN_B_1F (0x10000000 | MCOUNT_OFFSET_INSNS)
+
 int ftrace_make_nop(struct module *mod,
                     struct dyn_ftrace *rec, unsigned long addr)
 {
@@ -91,39 +125,11 @@ int ftrace_make_nop(struct module *mod,
         unsigned long ip = rec->ip;
 
         /*
-         * We have compiled module with -mlong-calls, but compiled the kernel
-         * without it, we need to cope with them respectively.
+         * If ip is in kernel space, no long call, otherwise, long call is
+         * needed.
          */
-        if (in_module(ip)) {
-#if defined(KBUILD_MCOUNT_RA_ADDRESS) && defined(CONFIG_32BIT)
-                /*
-                 * lui v1, hi_16bit_of_mcount        --> b 1f (0x10000005)
-                 * addiu v1, v1, low_16bit_of_mcount
-                 * move at, ra
-                 * move $12, ra_address
-                 * jalr v1
-                 *  sub sp, sp, 8
-                 *                                  1: offset = 5 instructions
-                 */
-                new = INSN_B_1F_5;
-#else
-                /*
-                 * lui v1, hi_16bit_of_mcount        --> b 1f (0x10000004)
-                 * addiu v1, v1, low_16bit_of_mcount
-                 * move at, ra
-                 * jalr v1
-                 *  nop | move $12, ra_address | sub sp, sp, 8
-                 *                                  1: offset = 4 instructions
-                 */
-                new = INSN_B_1F_4;
-#endif
-        } else {
-                /*
-                 * move at, ra
-                 * jal _mcount          --> nop
-                 */
-                new = INSN_NOP;
-        }
+        new = in_kernel_space(ip) ? INSN_NOP : INSN_B_1F;
+
         return ftrace_modify_code(ip, new);
 }
 
@@ -132,8 +138,8 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
         unsigned int new;
         unsigned long ip = rec->ip;
 
-        /* ip, module: 0xc0000000, kernel: 0x80000000 */
-        new = in_module(ip) ? insn_lui_v1_hi16_mcount : insn_jal_ftrace_caller;
+        new = in_kernel_space(ip) ? insn_jal_ftrace_caller :
+                insn_lui_v1_hi16_mcount;
 
         return ftrace_modify_code(ip, new);
 }
@@ -190,29 +196,25 @@ int ftrace_disable_ftrace_graph_caller(void)
 #define S_R_SP  (0xafb0 << 16)  /* s{d,w} R, offset(sp) */
 #define OFFSET_MASK     0xffff  /* stack offset range: 0 ~ PT_SIZE */
 
-unsigned long ftrace_get_parent_addr(unsigned long self_addr,
-                                     unsigned long parent,
-                                     unsigned long parent_addr,
-                                     unsigned long fp)
+unsigned long ftrace_get_parent_ra_addr(unsigned long self_ra, unsigned long
+                old_parent_ra, unsigned long parent_ra_addr, unsigned long fp)
 {
-        unsigned long sp, ip, ra;
+        unsigned long sp, ip, tmp;
         unsigned int code;
         int faulted;
 
         /*
-         * For module, move the ip from calling site of mcount to the
-         * instruction "lui v1, hi_16bit_of_mcount"(offset is 20), but for
-         * kernel, move to the instruction "move ra, at"(offset is 12)
+         * For module, move the ip from the return address after the
+         * instruction "lui v1, hi_16bit_of_mcount"(offset is 24), but for
+         * kernel, move after the instruction "move ra, at"(offset is 16)
          */
-        ip = self_addr - (in_module(self_addr) ? 20 : 12);
+        ip = self_ra - (in_kernel_space(self_ra) ? 16 : 24);
 
         /*
          * search the text until finding the non-store instruction or "s{d,w}
          * ra, offset(sp)" instruction
          */
         do {
-                ip -= 4;
-
                 /* get the code at "ip": code = *(unsigned int *)ip; */
                 safe_load_code(code, ip, faulted);
 
@@ -224,18 +226,20 @@ unsigned long ftrace_get_parent_addr(unsigned long self_addr,
                  * store the ra on the stack
                  */
                 if ((code & S_R_SP) != S_R_SP)
-                        return parent_addr;
+                        return parent_ra_addr;
 
-        } while (((code & S_RA_SP) != S_RA_SP));
+                /* Move to the next instruction */
+                ip -= 4;
+        } while ((code & S_RA_SP) != S_RA_SP);
 
         sp = fp + (code & OFFSET_MASK);
 
-        /* ra = *(unsigned long *)sp; */
-        safe_load_stack(ra, sp, faulted);
+        /* tmp = *(unsigned long *)sp; */
+        safe_load_stack(tmp, sp, faulted);
         if (unlikely(faulted))
                 return 0;
 
-        if (ra == parent)
+        if (tmp == old_parent_ra)
                 return sp;
         return 0;
 }
@@ -246,21 +250,21 @@ unsigned long ftrace_get_parent_addr(unsigned long self_addr,
  * Hook the return address and push it in the stack of return addrs
  * in current thread info.
  */
-void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
+void prepare_ftrace_return(unsigned long *parent_ra_addr, unsigned long self_ra,
                            unsigned long fp)
 {
-        unsigned long old;
+        unsigned long old_parent_ra;
         struct ftrace_graph_ent trace;
         unsigned long return_hooker = (unsigned long)
             &return_to_handler;
-        int faulted;
+        int faulted, insns;
 
         if (unlikely(atomic_read(&current->tracing_graph_pause)))
                 return;
 
         /*
-         * "parent" is the stack address saved the return address of the caller
-         * of _mcount.
+         * "parent_ra_addr" is the stack address saved the return address of
+         * the caller of _mcount.
          *
          * if the gcc < 4.5, a leaf function does not save the return address
          * in the stack address, so, we "emulate" one in _mcount's stack space,
@@ -275,37 +279,44 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
          * do it in ftrace_graph_caller of mcount.S.
          */
 
-        /* old = *parent; */
-        safe_load_stack(old, parent, faulted);
+        /* old_parent_ra = *parent_ra_addr; */
+        safe_load_stack(old_parent_ra, parent_ra_addr, faulted);
         if (unlikely(faulted))
                 goto out;
 #ifndef KBUILD_MCOUNT_RA_ADDRESS
-        parent = (unsigned long *)ftrace_get_parent_addr(self_addr, old,
-                        (unsigned long)parent, fp);
+        parent_ra_addr = (unsigned long *)ftrace_get_parent_ra_addr(self_ra,
+                        old_parent_ra, (unsigned long)parent_ra_addr, fp);
         /*
          * If fails when getting the stack address of the non-leaf function's
          * ra, stop function graph tracer and return
          */
-        if (parent == 0)
+        if (parent_ra_addr == 0)
                 goto out;
 #endif
-        /* *parent = return_hooker; */
-        safe_store_stack(return_hooker, parent, faulted);
+        /* *parent_ra_addr = return_hooker; */
+        safe_store_stack(return_hooker, parent_ra_addr, faulted);
         if (unlikely(faulted))
                 goto out;
 
-        if (ftrace_push_return_trace(old, self_addr, &trace.depth, fp) ==
-            -EBUSY) {
-                *parent = old;
+        if (ftrace_push_return_trace(old_parent_ra, self_ra, &trace.depth, fp)
+            == -EBUSY) {
+                *parent_ra_addr = old_parent_ra;
                 return;
         }
 
-        trace.func = self_addr;
+        /*
+         * Get the recorded ip of the current mcount calling site in the
+         * __mcount_loc section, which will be used to filter the function
+         * entries configured through the tracing/set_graph_function interface.
+         */
+
+        insns = in_kernel_space(self_ra) ? 2 : MCOUNT_OFFSET_INSNS + 1;
+        trace.func = self_ra - (MCOUNT_INSN_SIZE * insns);
 
         /* Only trace if the calling function expects to */
         if (!ftrace_graph_entry(&trace)) {
                 current->curr_ret_stack--;
-                *parent = old;
+                *parent_ra_addr = old_parent_ra;
         }
         return;
 out:
diff --git a/arch/mips/kernel/perf_event.c b/arch/mips/kernel/perf_event.c
index 2b7f3f703b8..a8244854d3d 100644
--- a/arch/mips/kernel/perf_event.c
+++ b/arch/mips/kernel/perf_event.c
@@ -161,41 +161,6 @@ mipspmu_event_set_period(struct perf_event *event,
         return ret;
 }
 
-static int mipspmu_enable(struct perf_event *event)
-{
-        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
-        struct hw_perf_event *hwc = &event->hw;
-        int idx;
-        int err = 0;
-
-        /* To look for a free counter for this event. */
-        idx = mipspmu->alloc_counter(cpuc, hwc);
-        if (idx < 0) {
-                err = idx;
-                goto out;
-        }
-
-        /*
-         * If there is an event in the counter we are going to use then
-         * make sure it is disabled.
-         */
-        event->hw.idx = idx;
-        mipspmu->disable_event(idx);
-        cpuc->events[idx] = event;
-
-        /* Set the period for the event. */
-        mipspmu_event_set_period(event, hwc, idx);
-
-        /* Enable the event. */
-        mipspmu->enable_event(hwc, idx);
-
-        /* Propagate our changes to the userspace mapping. */
-        perf_event_update_userpage(event);
-
-out:
-        return err;
-}
-
 static void mipspmu_event_update(struct perf_event *event,
                         struct hw_perf_event *hwc,
                         int idx)
@@ -204,7 +169,7 @@ static void mipspmu_event_update(struct perf_event *event,
         unsigned long flags;
         int shift = 64 - TOTAL_BITS;
         s64 prev_raw_count, new_raw_count;
-        s64 delta;
+        u64 delta;
 
 again:
         prev_raw_count = local64_read(&hwc->prev_count);
@@ -231,32 +196,90 @@ again:
         return;
 }
 
-static void mipspmu_disable(struct perf_event *event)
+static void mipspmu_start(struct perf_event *event, int flags)
+{
+        struct hw_perf_event *hwc = &event->hw;
+
+        if (!mipspmu)
+                return;
+
+        if (flags & PERF_EF_RELOAD)
+                WARN_ON_ONCE(!(hwc->state & PERF_HES_UPTODATE));
+
+        hwc->state = 0;
+
+        /* Set the period for the event. */
+        mipspmu_event_set_period(event, hwc, hwc->idx);
+
+        /* Enable the event. */
+        mipspmu->enable_event(hwc, hwc->idx);
+}
+
+static void mipspmu_stop(struct perf_event *event, int flags)
+{
+        struct hw_perf_event *hwc = &event->hw;
+
+        if (!mipspmu)
+                return;
+
+        if (!(hwc->state & PERF_HES_STOPPED)) {
+                /* We are working on a local event. */
+                mipspmu->disable_event(hwc->idx);
+                barrier();
+                mipspmu_event_update(event, hwc, hwc->idx);
+                hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;
+        }
+}
+
+static int mipspmu_add(struct perf_event *event, int flags)
 {
         struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
         struct hw_perf_event *hwc = &event->hw;
-        int idx = hwc->idx;
+        int idx;
+        int err = 0;
 
+        perf_pmu_disable(event->pmu);
 
-        WARN_ON(idx < 0 || idx >= mipspmu->num_counters);
+        /* To look for a free counter for this event. */
+        idx = mipspmu->alloc_counter(cpuc, hwc);
+        if (idx < 0) {
+                err = idx;
+                goto out;
+        }
 
-        /* We are working on a local event. */
+        /*
+         * If there is an event in the counter we are going to use then
+         * make sure it is disabled.
+         */
+        event->hw.idx = idx;
         mipspmu->disable_event(idx);
+        cpuc->events[idx] = event;
 
-        barrier();
-
-        mipspmu_event_update(event, hwc, idx);
-        cpuc->events[idx] = NULL;
-        clear_bit(idx, cpuc->used_mask);
+        hwc->state = PERF_HES_STOPPED | PERF_HES_UPTODATE;
+        if (flags & PERF_EF_START)
+                mipspmu_start(event, PERF_EF_RELOAD);
 
+        /* Propagate our changes to the userspace mapping. */
         perf_event_update_userpage(event);
+
+out:
+        perf_pmu_enable(event->pmu);
+        return err;
 }
 
-static void mipspmu_unthrottle(struct perf_event *event)
+static void mipspmu_del(struct perf_event *event, int flags)
 {
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
         struct hw_perf_event *hwc = &event->hw;
+        int idx = hwc->idx;
 
-        mipspmu->enable_event(hwc, hwc->idx);
+        WARN_ON(idx < 0 || idx >= mipspmu->num_counters);
+
+        mipspmu_stop(event, PERF_EF_UPDATE);
+        cpuc->events[idx] = NULL;
+        clear_bit(idx, cpuc->used_mask);
+
+        perf_event_update_userpage(event);
 }
 
 static void mipspmu_read(struct perf_event *event)
@@ -270,12 +293,17 @@ static void mipspmu_read(struct perf_event *event)
         mipspmu_event_update(event, hwc, hwc->idx);
 }
 
-static struct pmu pmu = {
-        .enable         = mipspmu_enable,
-        .disable        = mipspmu_disable,
-        .unthrottle     = mipspmu_unthrottle,
-        .read           = mipspmu_read,
-};
+static void mipspmu_enable(struct pmu *pmu)
+{
+        if (mipspmu)
+                mipspmu->start();
+}
+
+static void mipspmu_disable(struct pmu *pmu)
+{
+        if (mipspmu)
+                mipspmu->stop();
+}
 
 static atomic_t active_events = ATOMIC_INIT(0);
 static DEFINE_MUTEX(pmu_reserve_mutex);
@@ -318,6 +346,82 @@ static void mipspmu_free_irq(void)
                 perf_irq = save_perf_irq;
 }
 
+/*
+ * mipsxx/rm9000/loongson2 have different performance counters, they have
+ * specific low-level init routines.
+ */
+static void reset_counters(void *arg);
+static int __hw_perf_event_init(struct perf_event *event);
+
+static void hw_perf_event_destroy(struct perf_event *event)
+{
+        if (atomic_dec_and_mutex_lock(&active_events,
+                                &pmu_reserve_mutex)) {
+                /*
+                 * We must not call the destroy function with interrupts
+                 * disabled.
+                 */
+                on_each_cpu(reset_counters,
+                        (void *)(long)mipspmu->num_counters, 1);
+                mipspmu_free_irq();
+                mutex_unlock(&pmu_reserve_mutex);
+        }
+}
+
+static int mipspmu_event_init(struct perf_event *event)
+{
+        int err = 0;
+
+        switch (event->attr.type) {
+        case PERF_TYPE_RAW:
+        case PERF_TYPE_HARDWARE:
+        case PERF_TYPE_HW_CACHE:
+                break;
+
+        default:
+                return -ENOENT;
+        }
+
+        if (!mipspmu || event->cpu >= nr_cpumask_bits ||
+                (event->cpu >= 0 && !cpu_online(event->cpu)))
+                return -ENODEV;
+
+        if (!atomic_inc_not_zero(&active_events)) {
+                if (atomic_read(&active_events) > MIPS_MAX_HWEVENTS) {
+                        atomic_dec(&active_events);
+                        return -ENOSPC;
+                }
+
+                mutex_lock(&pmu_reserve_mutex);
+                if (atomic_read(&active_events) == 0)
+                        err = mipspmu_get_irq();
+
+                if (!err)
+                        atomic_inc(&active_events);
+                mutex_unlock(&pmu_reserve_mutex);
+        }
+
+        if (err)
+                return err;
+
+        err = __hw_perf_event_init(event);
+        if (err)
+                hw_perf_event_destroy(event);
+
+        return err;
+}
+
+static struct pmu pmu = {
+        .pmu_enable     = mipspmu_enable,
+        .pmu_disable    = mipspmu_disable,
+        .event_init     = mipspmu_event_init,
+        .add            = mipspmu_add,
+        .del            = mipspmu_del,
+        .start          = mipspmu_start,
+        .stop           = mipspmu_stop,
+        .read           = mipspmu_read,
+};
+
 static inline unsigned int
 mipspmu_perf_event_encode(const struct mips_perf_event *pev)
 {
@@ -382,8 +486,9 @@ static int validate_event(struct cpu_hw_events *cpuc,
 {
         struct hw_perf_event fake_hwc = event->hw;
 
-        if (event->pmu && event->pmu != &pmu)
-                return 0;
+        /* Allow mixed event group. So return 1 to pass validation. */
+        if (event->pmu != &pmu || event->state <= PERF_EVENT_STATE_OFF)
+                return 1;
 
         return mipspmu->alloc_counter(cpuc, &fake_hwc) >= 0;
 }
@@ -409,73 +514,6 @@ static int validate_group(struct perf_event *event)
         return 0;
 }
 
-/*
- * mipsxx/rm9000/loongson2 have different performance counters, they have
- * specific low-level init routines.
- */
-static void reset_counters(void *arg);
-static int __hw_perf_event_init(struct perf_event *event);
-
-static void hw_perf_event_destroy(struct perf_event *event)
-{
-        if (atomic_dec_and_mutex_lock(&active_events,
-                                &pmu_reserve_mutex)) {
-                /*
-                 * We must not call the destroy function with interrupts
-                 * disabled.
-                 */
-                on_each_cpu(reset_counters,
-                        (void *)(long)mipspmu->num_counters, 1);
-                mipspmu_free_irq();
-                mutex_unlock(&pmu_reserve_mutex);
-        }
-}
-
-const struct pmu *hw_perf_event_init(struct perf_event *event)
-{
-        int err = 0;
-
-        if (!mipspmu || event->cpu >= nr_cpumask_bits ||
-                (event->cpu >= 0 && !cpu_online(event->cpu)))
-                return ERR_PTR(-ENODEV);
-
-        if (!atomic_inc_not_zero(&active_events)) {
-                if (atomic_read(&active_events) > MIPS_MAX_HWEVENTS) {
-                        atomic_dec(&active_events);
-                        return ERR_PTR(-ENOSPC);
-                }
-
-                mutex_lock(&pmu_reserve_mutex);
-                if (atomic_read(&active_events) == 0)
-                        err = mipspmu_get_irq();
-
-                if (!err)
-                        atomic_inc(&active_events);
-                mutex_unlock(&pmu_reserve_mutex);
-        }
-
-        if (err)
-                return ERR_PTR(err);
-
-        err = __hw_perf_event_init(event);
-        if (err)
-                hw_perf_event_destroy(event);
-
-        return err ? ERR_PTR(err) : &pmu;
-}
-
-void hw_perf_enable(void)
-{
-        if (mipspmu)
-                mipspmu->start();
-}
-
-void hw_perf_disable(void)
-{
-        if (mipspmu)
-                mipspmu->stop();
-}
-
 /* This is needed by specific irq handlers in perf_event_*.c */
 static void
 handle_associated_event(struct cpu_hw_events *cpuc,
@@ -496,21 +534,13 @@ handle_associated_event(struct cpu_hw_events *cpuc,
 #include "perf_event_mipsxx.c"
 
 /* Callchain handling code. */
-static inline void
-callchain_store(struct perf_callchain_entry *entry,
-                u64 ip)
-{
-        if (entry->nr < PERF_MAX_STACK_DEPTH)
-                entry->ip[entry->nr++] = ip;
-}
 
 /*
  * Leave userspace callchain empty for now. When we find a way to trace
  * the user stack callchains, we add here.
  */
-static void
-perf_callchain_user(struct pt_regs *regs,
-                    struct perf_callchain_entry *entry)
+void perf_callchain_user(struct perf_callchain_entry *entry,
+                    struct pt_regs *regs)
 {
 }
 
@@ -523,23 +553,21 @@ static void save_raw_perf_callchain(struct perf_callchain_entry *entry,
         while (!kstack_end(sp)) {
                 addr = *sp++;
                 if (__kernel_text_address(addr)) {
-                        callchain_store(entry, addr);
+                        perf_callchain_store(entry, addr);
                         if (entry->nr >= PERF_MAX_STACK_DEPTH)
                                 break;
                 }
         }
 }
 
-static void
-perf_callchain_kernel(struct pt_regs *regs,
-                      struct perf_callchain_entry *entry)
+void perf_callchain_kernel(struct perf_callchain_entry *entry,
+                      struct pt_regs *regs)
 {
         unsigned long sp = regs->regs[29];
 #ifdef CONFIG_KALLSYMS
         unsigned long ra = regs->regs[31];
         unsigned long pc = regs->cp0_epc;
 
-        callchain_store(entry, PERF_CONTEXT_KERNEL);
         if (raw_show_trace || !__kernel_text_address(pc)) {
                 unsigned long stack_page =
                         (unsigned long)task_stack_page(current);
@@ -549,53 +577,12 @@ perf_callchain_kernel(struct pt_regs *regs,
                 return;
         }
         do {
-                callchain_store(entry, pc);
+                perf_callchain_store(entry, pc);
                 if (entry->nr >= PERF_MAX_STACK_DEPTH)
                         break;
                 pc = unwind_stack(current, &sp, pc, &ra);
         } while (pc);
 #else
-        callchain_store(entry, PERF_CONTEXT_KERNEL);
         save_raw_perf_callchain(entry, sp);
 #endif
 }
-
-static void
-perf_do_callchain(struct pt_regs *regs,
-                  struct perf_callchain_entry *entry)
-{
-        int is_user;
-
-        if (!regs)
-                return;
-
-        is_user = user_mode(regs);
-
-        if (!current || !current->pid)
-                return;
-
-        if (is_user && current->state != TASK_RUNNING)
-                return;
-
-        if (!is_user) {
-                perf_callchain_kernel(regs, entry);
-                if (current->mm)
-                        regs = task_pt_regs(current);
-                else
-                        regs = NULL;
-        }
-        if (regs)
-                perf_callchain_user(regs, entry);
-}
-
-static DEFINE_PER_CPU(struct perf_callchain_entry, pmc_irq_entry);
-
-struct perf_callchain_entry *
-perf_callchain(struct pt_regs *regs)
-{
-        struct perf_callchain_entry *entry = &__get_cpu_var(pmc_irq_entry);
-
-        entry->nr = 0;
-        perf_do_callchain(regs, entry);
-        return entry;
-}
diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c
index 183e0d22666..d9a7db78ed6 100644
--- a/arch/mips/kernel/perf_event_mipsxx.c
+++ b/arch/mips/kernel/perf_event_mipsxx.c
@@ -696,7 +696,7 @@ static int mipsxx_pmu_handle_shared_irq(void)
          * interrupt, not NMI.
          */
         if (handled == IRQ_HANDLED)
-                perf_event_do_pending();
+                irq_work_run();
 
 #ifdef CONFIG_MIPS_MT_SMP
         read_unlock(&pmuint_rwlock);
@@ -1045,6 +1045,8 @@ init_hw_perf_events(void)
                         "CPU, irq %d%s\n", mipspmu->name, counters, irq,
                         irq < 0 ? " (share with timer interrupt)" : "");
 
+        perf_pmu_register(&pmu, "cpu", PERF_TYPE_RAW);
+
         return 0;
 }
 early_initcall(init_hw_perf_events);
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c
index 5922342bca3..dbbe0ce48d8 100644
--- a/arch/mips/kernel/signal.c
+++ b/arch/mips/kernel/signal.c
@@ -84,7 +84,7 @@ static int protected_save_fp_context(struct sigcontext __user *sc)
 
 static int protected_restore_fp_context(struct sigcontext __user *sc)
 {
-        int err, tmp;
+        int err, tmp __maybe_unused;
         while (1) {
                 lock_fpu_owner();
                 own_fpu_inatomic(0);
diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c
index a0ed0e052b2..aae98661379 100644
--- a/arch/mips/kernel/signal32.c
+++ b/arch/mips/kernel/signal32.c
@@ -115,7 +115,7 @@ static int protected_save_fp_context32(struct sigcontext32 __user *sc)
 
 static int protected_restore_fp_context32(struct sigcontext32 __user *sc)
 {
-        int err, tmp;
+        int err, tmp __maybe_unused;
         while (1) {
                 lock_fpu_owner();
                 own_fpu_inatomic(0);
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 383aeb95cb4..32a25610108 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -193,6 +193,22 @@ void __devinit smp_prepare_boot_cpu(void)
  */
 static struct task_struct *cpu_idle_thread[NR_CPUS];
 
+struct create_idle {
+        struct work_struct work;
+        struct task_struct *idle;
+        struct completion done;
+        int cpu;
+};
+
+static void __cpuinit do_fork_idle(struct work_struct *work)
+{
+        struct create_idle *c_idle =
+                container_of(work, struct create_idle, work);
+
+        c_idle->idle = fork_idle(c_idle->cpu);
+        complete(&c_idle->done);
+}
+
 int __cpuinit __cpu_up(unsigned int cpu)
 {
         struct task_struct *idle;
@@ -203,8 +219,19 @@ int __cpuinit __cpu_up(unsigned int cpu)
          * Linux can schedule processes on this slave.
          */
         if (!cpu_idle_thread[cpu]) {
-                idle = fork_idle(cpu);
-                cpu_idle_thread[cpu] = idle;
+                /*
+                 * Schedule work item to avoid forking user task
+                 * Ported from arch/x86/kernel/smpboot.c
+                 */
+                struct create_idle c_idle = {
+                        .cpu    = cpu,
+                        .done   = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
+                };
+
+                INIT_WORK_ONSTACK(&c_idle.work, do_fork_idle);
+                schedule_work(&c_idle.work);
+                wait_for_completion(&c_idle.done);
+                idle = cpu_idle_thread[cpu] = c_idle.idle;
 
                 if (IS_ERR(idle))
                         panic(KERN_ERR "Fork failed for CPU %d", cpu);
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 1dc6edff45e..58beabf50b3 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -383,12 +383,11 @@ save_static_function(sys_sysmips);
 static int __used noinline
 _sys_sysmips(nabi_no_regargs struct pt_regs regs)
 {
-        long cmd, arg1, arg2, arg3;
+        long cmd, arg1, arg2;
 
         cmd = regs.regs[4];
         arg1 = regs.regs[5];
         arg2 = regs.regs[6];
-        arg3 = regs.regs[7];
 
         switch (cmd) {
         case MIPS_ATOMIC_SET:
@@ -405,7 +404,7 @@ _sys_sysmips(nabi_no_regargs struct pt_regs regs)
                 if (arg1 & 2)
                         set_thread_flag(TIF_LOGADE);
                 else
-                        clear_thread_flag(TIF_FIXADE);
+                        clear_thread_flag(TIF_LOGADE);
 
                 return 0;
 
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c
index 6a1fdfef8fd..ab52b7cf3b6 100644
--- a/arch/mips/kernel/vpe.c
+++ b/arch/mips/kernel/vpe.c
@@ -148,9 +148,9 @@ struct {
         spinlock_t tc_list_lock;
         struct list_head tc_list;       /* Thread contexts */
 } vpecontrol = {
-        .vpe_list_lock  = SPIN_LOCK_UNLOCKED,
+        .vpe_list_lock  = __SPIN_LOCK_UNLOCKED(vpe_list_lock),
         .vpe_list       = LIST_HEAD_INIT(vpecontrol.vpe_list),
-        .tc_list_lock   = SPIN_LOCK_UNLOCKED,
+        .tc_list_lock   = __SPIN_LOCK_UNLOCKED(tc_list_lock),
         .tc_list        = LIST_HEAD_INIT(vpecontrol.tc_list)
 };
 
diff --git a/arch/mips/loongson/Kconfig b/arch/mips/loongson/Kconfig
index 6e1b77fec7e..aca93eed877 100644
--- a/arch/mips/loongson/Kconfig
+++ b/arch/mips/loongson/Kconfig
@@ -1,6 +1,7 @@
+if MACH_LOONGSON
+
 choice
         prompt "Machine Type"
-        depends on MACH_LOONGSON
 
 config LEMOTE_FULOONG2E
         bool "Lemote Fuloong(2e) mini-PC"
@@ -87,3 +88,5 @@ config LOONGSON_UART_BASE
 config LOONGSON_MC146818
         bool
         default n
+
+endif # MACH_LOONGSON
diff --git a/arch/mips/loongson/common/cmdline.c b/arch/mips/loongson/common/cmdline.c
index 1a06defc4f7..353e1d2e41a 100644
--- a/arch/mips/loongson/common/cmdline.c
+++ b/arch/mips/loongson/common/cmdline.c
@@ -44,10 +44,5 @@ void __init prom_init_cmdline(void)
                 strcat(arcs_cmdline, " ");
         }
 
-        if ((strstr(arcs_cmdline, "console=")) == NULL)
-                strcat(arcs_cmdline, " console=ttyS0,115200");
-        if ((strstr(arcs_cmdline, "root=")) == NULL)
-                strcat(arcs_cmdline, " root=/dev/hda1");
-
         prom_init_machtype();
 }
diff --git a/arch/mips/loongson/common/machtype.c b/arch/mips/loongson/common/machtype.c
index 81fbe6b73f9..2efd5d9dee2 100644
--- a/arch/mips/loongson/common/machtype.c
+++ b/arch/mips/loongson/common/machtype.c
@@ -41,7 +41,7 @@ void __weak __init mach_prom_init_machtype(void)
 
 void __init prom_init_machtype(void)
 {
-        char *p, str[MACHTYPE_LEN];
+        char *p, str[MACHTYPE_LEN + 1];
         int machtype = MACH_LEMOTE_FL2E;
 
         mips_machtype = LOONGSON_MACHTYPE;
@@ -53,6 +53,7 @@ void __init prom_init_machtype(void)
         }
         p += strlen("machtype=");
         strncpy(str, p, MACHTYPE_LEN);
+        str[MACHTYPE_LEN] = '\0';
         p = strstr(str, " ");
         if (p)
                 *p = '\0';
diff --git a/arch/mips/math-emu/ieee754int.h b/arch/mips/math-emu/ieee754int.h
index 2701d950095..2a7d43f4f16 100644
--- a/arch/mips/math-emu/ieee754int.h
+++ b/arch/mips/math-emu/ieee754int.h
@@ -70,7 +70,7 @@
 
 
 #define COMPXSP \
-  unsigned xm; int xe; int xs; int xc
+  unsigned xm; int xe; int xs __maybe_unused; int xc
 
 #define COMPYSP \
   unsigned ym; int ye; int ys; int yc
@@ -104,7 +104,7 @@
 
 
 #define COMPXDP \
-u64 xm; int xe; int xs; int xc
+u64 xm; int xe; int xs __maybe_unused; int xc
 
 #define COMPYDP \
 u64 ym; int ye; int ys; int yc
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 2efcbd24c82..279599e9a77 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -324,7 +324,7 @@ int page_is_ram(unsigned long pagenr)
 void __init paging_init(void)
 {
         unsigned long max_zone_pfns[MAX_NR_ZONES];
-        unsigned long lastpfn;
+        unsigned long lastpfn __maybe_unused;
 
         pagetable_init();
 
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 083d3412d0b..04f9e17db9d 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -109,6 +109,8 @@ static bool scratchpad_available(void)
 static int scratchpad_offset(int i)
 {
         BUG();
+        /* Really unreachable, but evidently some GCC want this. */
+        return 0;
 }
 #endif
 /*
diff --git a/arch/mips/pci/ops-pmcmsp.c b/arch/mips/pci/ops-pmcmsp.c
index b7c03d80c88..68798f869c0 100644
--- a/arch/mips/pci/ops-pmcmsp.c
+++ b/arch/mips/pci/ops-pmcmsp.c
@@ -308,7 +308,7 @@ static struct resource pci_mem_resource = {
  *  RETURNS:     PCIBIOS_SUCCESSFUL  - success
  *
  ****************************************************************************/
-static int bpci_interrupt(int irq, void *dev_id)
+static irqreturn_t bpci_interrupt(int irq, void *dev_id)
 {
         struct msp_pci_regs *preg = (void *)PCI_BASE_REG;
         unsigned int stat = preg->if_status;
@@ -326,7 +326,7 @@ static int bpci_interrupt(int irq, void *dev_id)
         /* write to clear all asserted interrupts */
         preg->if_status = stat;
 
-        return PCIBIOS_SUCCESSFUL;
+        return IRQ_HANDLED;
 }
 
 /*****************************************************************************
diff --git a/arch/mips/pmc-sierra/Kconfig b/arch/mips/pmc-sierra/Kconfig
index c139988bb85..8d798497c61 100644
--- a/arch/mips/pmc-sierra/Kconfig
+++ b/arch/mips/pmc-sierra/Kconfig
@@ -4,15 +4,11 @@ choice
 
 config PMC_MSP4200_EVAL
         bool "PMC-Sierra MSP4200 Eval Board"
-        select CEVT_R4K
-        select CSRC_R4K
         select IRQ_MSP_SLP
         select HW_HAS_PCI
 
 config PMC_MSP4200_GW
         bool "PMC-Sierra MSP4200 VoIP Gateway"
-        select CEVT_R4K
-        select CSRC_R4K
         select IRQ_MSP_SLP
         select HW_HAS_PCI
 
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_time.c b/arch/mips/pmc-sierra/msp71xx/msp_time.c
index cca64e15f57..01df84ce31e 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_time.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_time.c
@@ -81,7 +81,7 @@ void __init plat_time_init(void)
         mips_hpt_frequency = cpu_rate/2;
 }
 
-unsigned int __init get_c0_compare_int(void)
+unsigned int __cpuinit get_c0_compare_int(void)
 {
         return MSP_INT_VPE0_TIMER;
 }
diff --git a/arch/mn10300/include/asm/atomic.h b/arch/mn10300/include/asm/atomic.h
index 92d2f9298e3..9d773a63951 100644
--- a/arch/mn10300/include/asm/atomic.h
+++ b/arch/mn10300/include/asm/atomic.h
@@ -139,7 +139,7 @@ static inline unsigned long __cmpxchg(volatile unsigned long *m,
  * Atomically reads the value of @v.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.
  */
-#define atomic_read(v)  ((v)->counter)
+#define atomic_read(v)  (ACCESS_ONCE((v)->counter))
 
 /**
  * atomic_set - set atomic variable
diff --git a/arch/mn10300/include/asm/uaccess.h b/arch/mn10300/include/asm/uaccess.h
index 679dee0bbd0..3d6e60dad9d 100644
--- a/arch/mn10300/include/asm/uaccess.h
+++ b/arch/mn10300/include/asm/uaccess.h
@@ -160,9 +160,10 @@ struct __large_struct { unsigned long buf[100]; };
 
 #define __get_user_check(x, ptr, size)                                  \
 ({                                                                      \
+        const __typeof__(ptr) __guc_ptr = (ptr);                        \
         int _e;                                                         \
-        if (likely(__access_ok((unsigned long) (ptr), (size))))         \
-                _e = __get_user_nocheck((x), (ptr), (size));            \
+        if (likely(__access_ok((unsigned long) __guc_ptr, (size))))     \
+                _e = __get_user_nocheck((x), __guc_ptr, (size));        \
         else {                                                          \
                 _e = -EFAULT;                                           \
                 (x) = (__typeof__(x))0;                                 \
diff --git a/arch/mn10300/mm/cache-inv-icache.c b/arch/mn10300/mm/cache-inv-icache.c
index a8933a60b2d..a6b63dde603 100644
--- a/arch/mn10300/mm/cache-inv-icache.c
+++ b/arch/mn10300/mm/cache-inv-icache.c
@@ -69,7 +69,7 @@ static void flush_icache_page_range(unsigned long start, unsigned long end)
 
         /* invalidate the icache coverage on that region */
         mn10300_local_icache_inv_range2(addr + off, size);
-        smp_cache_call(SMP_ICACHE_INV_FLUSH_RANGE, start, end);
+        smp_cache_call(SMP_ICACHE_INV_RANGE, start, end);
 }
 
 /**
@@ -101,7 +101,7 @@ void flush_icache_range(unsigned long start, unsigned long end)
                  * directly */
                 start_page = (start >= 0x80000000UL) ? start : 0x80000000UL;
                 mn10300_icache_inv_range(start_page, end);
-                smp_cache_call(SMP_ICACHE_INV_FLUSH_RANGE, start, end);
+                smp_cache_call(SMP_ICACHE_INV_RANGE, start, end);
                 if (start_page == start)
                         goto done;
                 end = start_page;
diff --git a/arch/powerpc/include/asm/lppaca.h b/arch/powerpc/include/asm/lppaca.h
index 380d48bacd1..26b8c807f8f 100644
--- a/arch/powerpc/include/asm/lppaca.h
+++ b/arch/powerpc/include/asm/lppaca.h
@@ -33,9 +33,25 @@
 //
 //----------------------------------------------------------------------------
 #include <linux/cache.h>
+#include <linux/threads.h>
 #include <asm/types.h>
 #include <asm/mmu.h>
 
+/*
+ * We only have to have statically allocated lppaca structs on
+ * legacy iSeries, which supports at most 64 cpus.
+ */
+#ifdef CONFIG_PPC_ISERIES
+#if NR_CPUS < 64
+#define NR_LPPACAS      NR_CPUS
+#else
+#define NR_LPPACAS      64
+#endif
+#else /* not iSeries */
+#define NR_LPPACAS      1
+#endif
+
+
 /* The Hypervisor barfs if the lppaca crosses a page boundary.  A 1k
  * alignment is sufficient to prevent this */
 struct lppaca {
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
index 991d5998d6b..fe56a23e1ff 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -240,6 +240,12 @@ struct machdep_calls {
          * claims to support kexec.
          */
         int (*machine_kexec_prepare)(struct kimage *image);
+
+        /* Called to perform the _real_ kexec.
+         * Do NOT allocate memory or fail here. We are past the point of
+         * no return.
+         */
+        void (*machine_kexec)(struct kimage *image);
 #endif /* CONFIG_KEXEC */
 
 #ifdef CONFIG_SUSPEND
diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c
index 49a170af814..a5f8672eeff 100644
--- a/arch/powerpc/kernel/machine_kexec.c
+++ b/arch/powerpc/kernel/machine_kexec.c
@@ -87,7 +87,10 @@ void machine_kexec(struct kimage *image)
 
         save_ftrace_enabled = __ftrace_enabled_save();
 
-        default_machine_kexec(image);
+        if (ppc_md.machine_kexec)
+                ppc_md.machine_kexec(image);
+        else
+                default_machine_kexec(image);
 
         __ftrace_enabled_restore(save_ftrace_enabled);
 
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c
index ebf9846f3c3..f4adf89d761 100644
--- a/arch/powerpc/kernel/paca.c
+++ b/arch/powerpc/kernel/paca.c
@@ -27,20 +27,6 @@ extern unsigned long __toc_start;
 #ifdef CONFIG_PPC_BOOK3S
 
 /*
- * We only have to have statically allocated lppaca structs on
- * legacy iSeries, which supports at most 64 cpus.
- */
-#ifdef CONFIG_PPC_ISERIES
-#if NR_CPUS < 64
-#define NR_LPPACAS      NR_CPUS
-#else
-#define NR_LPPACAS      64
-#endif
-#else /* not iSeries */
-#define NR_LPPACAS      1
-#endif
-
-/*
  * The structure which the hypervisor knows about - this structure
  * should not cross a page boundary.  The vpa_init/register_vpa call
  * is now known to fail if the lppaca structure crosses a page
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 7a1d5cb7693..8303a6c65ef 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -353,6 +353,7 @@ static void switch_booke_debug_regs(struct thread_struct *new_thread)
                         prime_debug_regs(new_thread);
 }
 #else   /* !CONFIG_PPC_ADV_DEBUG_REGS */
+#ifndef CONFIG_HAVE_HW_BREAKPOINT
 static void set_debug_reg_defaults(struct thread_struct *thread)
 {
         if (thread->dabr) {
@@ -360,6 +361,7 @@ static void set_debug_reg_defaults(struct thread_struct *thread)
                 set_dabr(0);
         }
 }
+#endif /* !CONFIG_HAVE_HW_BREAKPOINT */
 #endif  /* CONFIG_PPC_ADV_DEBUG_REGS */
 
 int set_dabr(unsigned long dabr)
@@ -670,11 +672,11 @@ void flush_thread(void)
 {
         discard_lazy_cpu_state();
 
-#ifdef CONFIG_HAVE_HW_BREAKPOINTS
+#ifdef CONFIG_HAVE_HW_BREAKPOINT
         flush_ptrace_hw_breakpoint(current);
-#else /* CONFIG_HAVE_HW_BREAKPOINTS */
+#else /* CONFIG_HAVE_HW_BREAKPOINT */
         set_debug_reg_defaults(&current->thread);
-#endif /* CONFIG_HAVE_HW_BREAKPOINTS */
+#endif /* CONFIG_HAVE_HW_BREAKPOINT */
 }
 
 void
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index fd481232957..0dc95c0aa3b 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -1516,7 +1516,8 @@ int start_topology_update(void)
 {
         int rc = 0;
 
-        if (firmware_has_feature(FW_FEATURE_VPHN) &&
+        /* Disabled until races with load balancing are fixed */
+        if (0 && firmware_has_feature(FW_FEATURE_VPHN) &&
             get_lppaca()->shared_proc) {
                 vphn_enabled = 1;
                 setup_cpu_associativity_change_counters();
diff --git a/arch/powerpc/mm/tlb_hash64.c b/arch/powerpc/mm/tlb_hash64.c
index 1ec06576f61..c14d09f614f 100644
--- a/arch/powerpc/mm/tlb_hash64.c
+++ b/arch/powerpc/mm/tlb_hash64.c
@@ -38,13 +38,11 @@ DEFINE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
  * neesd to be flushed. This function will either perform the flush
  * immediately or will batch it up if the current CPU has an active
  * batch on it.
- *
- * Must be called from within some kind of spinlock/non-preempt region...
  */
 void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
                      pte_t *ptep, unsigned long pte, int huge)
 {
-        struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
+        struct ppc64_tlb_batch *batch = &get_cpu_var(ppc64_tlb_batch);
         unsigned long vsid, vaddr;
         unsigned int psize;
         int ssize;
@@ -99,6 +97,7 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
          */
         if (!batch->active) {
                 flush_hash_page(vaddr, rpte, psize, ssize, 0);
+                put_cpu_var(ppc64_tlb_batch);
                 return;
         }
 
@@ -127,6 +126,7 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
         batch->index = ++i;
         if (i >= PPC64_TLB_BATCH_NR)
                 __flush_tlb_pending(batch);
+        put_cpu_var(ppc64_tlb_batch);
 }
 
 /*
diff --git a/arch/powerpc/platforms/iseries/dt.c b/arch/powerpc/platforms/iseries/dt.c
index fdb7384c0c4..f0491cc2890 100644
--- a/arch/powerpc/platforms/iseries/dt.c
+++ b/arch/powerpc/platforms/iseries/dt.c
@@ -242,8 +242,8 @@ static void __init dt_cpus(struct iseries_flat_dt *dt)
         pft_size[0] = 0; /* NUMA CEC cookie, 0 for non NUMA  */
         pft_size[1] = __ilog2(HvCallHpt_getHptPages() * HW_PAGE_SIZE);
 
-        for (i = 0; i < NR_CPUS; i++) {
-                if (lppaca_of(i).dyn_proc_status >= 2)
+        for (i = 0; i < NR_LPPACAS; i++) {
+                if (lppaca[i].dyn_proc_status >= 2)
                         continue;
 
                 snprintf(p, 32 - (p - buf), "@%d", i);
@@ -251,7 +251,7 @@ static void __init dt_cpus(struct iseries_flat_dt *dt)
 
                 dt_prop_str(dt, "device_type", device_type_cpu);
 
-                index = lppaca_of(i).dyn_hv_phys_proc_index;
+                index = lppaca[i].dyn_hv_phys_proc_index;
                 d = &xIoHriProcessorVpd[index];
 
                 dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024);
diff --git a/arch/powerpc/platforms/iseries/setup.c b/arch/powerpc/platforms/iseries/setup.c
index b0863410517..2946ae10fbf 100644
--- a/arch/powerpc/platforms/iseries/setup.c
+++ b/arch/powerpc/platforms/iseries/setup.c
@@ -680,6 +680,7 @@ void * __init iSeries_early_setup(void)
          * on but calling this function multiple times is fine.
          */
         identify_cpu(0, mfspr(SPRN_PVR));
+        initialise_paca(&boot_paca, 0);
 
         powerpc_firmware_features |= FW_FEATURE_ISERIES;
         powerpc_firmware_features |= FW_FEATURE_LPAR;
diff --git a/arch/s390/boot/compressed/misc.c b/arch/s390/boot/compressed/misc.c
index 0851eb1e919..2751b3a8a66 100644
--- a/arch/s390/boot/compressed/misc.c
+++ b/arch/s390/boot/compressed/misc.c
@@ -133,11 +133,12 @@ unsigned long decompress_kernel(void)
         unsigned long output_addr;
         unsigned char *output;
 
-        check_ipl_parmblock((void *) 0, (unsigned long) output + SZ__bss_start);
+        output_addr = ((unsigned long) &_end + HEAP_SIZE + 4095UL) & -4096UL;
+        check_ipl_parmblock((void *) 0, output_addr + SZ__bss_start);
         memset(&_bss, 0, &_ebss - &_bss);
         free_mem_ptr = (unsigned long)&_end;
         free_mem_end_ptr = free_mem_ptr + HEAP_SIZE;
-        output = (unsigned char *) ((free_mem_end_ptr + 4095UL) & -4096UL);
+        output = (unsigned char *) output_addr;
 
 #ifdef CONFIG_BLK_DEV_INITRD
         /*
diff --git a/arch/s390/crypto/sha_common.c b/arch/s390/crypto/sha_common.c
index f42dbabc0d3..48884f89ab9 100644
--- a/arch/s390/crypto/sha_common.c
+++ b/arch/s390/crypto/sha_common.c
@@ -38,6 +38,7 @@ int s390_sha_update(struct shash_desc *desc, const u8 *data, unsigned int len)
                 BUG_ON(ret != bsize);
                 data += bsize - index;
                 len -= bsize - index;
+                index = 0;
         }
 
         /* process as many blocks as possible */
diff --git a/arch/s390/include/asm/atomic.h b/arch/s390/include/asm/atomic.h
index 76daea11718..5c5ba10384c 100644
--- a/arch/s390/include/asm/atomic.h
+++ b/arch/s390/include/asm/atomic.h
@@ -36,14 +36,19 @@
 
 static inline int atomic_read(const atomic_t *v)
 {
-        barrier();
-        return v->counter;
+        int c;
+
+        asm volatile(
+                "       l       %0,%1\n"
+                : "=d" (c) : "Q" (v->counter));
+        return c;
 }
 
 static inline void atomic_set(atomic_t *v, int i)
 {
-        v->counter = i;
-        barrier();
+        asm volatile(
+                "       st      %1,%0\n"
+                : "=Q" (v->counter) : "d" (i));
 }
 
 static inline int atomic_add_return(int i, atomic_t *v)
@@ -128,14 +133,19 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
 
 static inline long long atomic64_read(const atomic64_t *v)
 {
-        barrier();
-        return v->counter;
+        long long c;
+
+        asm volatile(
+                "       lg      %0,%1\n"
+                : "=d" (c) : "Q" (v->counter));
+        return c;
 }
 
 static inline void atomic64_set(atomic64_t *v, long long i)
 {
-        v->counter = i;
-        barrier();
+        asm volatile(
+                "       stg     %1,%0\n"
+                : "=Q" (v->counter) : "d" (i));
 }
 
 static inline long long atomic64_add_return(long long i, atomic64_t *v)
diff --git a/arch/s390/include/asm/cache.h b/arch/s390/include/asm/cache.h
index 24aafa68b64..2a30d5ac066 100644
--- a/arch/s390/include/asm/cache.h
+++ b/arch/s390/include/asm/cache.h
@@ -13,6 +13,7 @@
 
 #define L1_CACHE_BYTES     256
 #define L1_CACHE_SHIFT     8
+#define NET_SKB_PAD        32
 
 #define __read_mostly __attribute__((__section__(".data..read_mostly")))
 
diff --git a/arch/s390/include/asm/processor.h b/arch/s390/include/asm/processor.h
index bf3de04170a..2c79b641627 100644
--- a/arch/s390/include/asm/processor.h
+++ b/arch/s390/include/asm/processor.h
@@ -148,11 +148,6 @@ extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
  */
 extern unsigned long thread_saved_pc(struct task_struct *t);
 
-/*
- * Print register of task into buffer. Used in fs/proc/array.c.
- */
-extern void task_show_regs(struct seq_file *m, struct task_struct *task);
-
 extern void show_code(struct pt_regs *regs);
 
 unsigned long get_wchan(struct task_struct *p);
diff --git a/arch/s390/kernel/traps.c b/arch/s390/kernel/traps.c
index 5eb78dd584c..b5a4a739b47 100644
--- a/arch/s390/kernel/traps.c
+++ b/arch/s390/kernel/traps.c
@@ -237,43 +237,6 @@ void show_regs(struct pt_regs *regs)
         show_last_breaking_event(regs);
 }
 
-/* This is called from fs/proc/array.c */
-void task_show_regs(struct seq_file *m, struct task_struct *task)
-{
-        struct pt_regs *regs;
-
-        regs = task_pt_regs(task);
-        seq_printf(m, "task: %p, ksp: %p\n",
-                       task, (void *)task->thread.ksp);
-        seq_printf(m, "User PSW : %p %p\n",
-                       (void *) regs->psw.mask, (void *)regs->psw.addr);
-
-        seq_printf(m, "User GPRS: " FOURLONG,
-                          regs->gprs[0], regs->gprs[1],
-                          regs->gprs[2], regs->gprs[3]);
-        seq_printf(m, "           " FOURLONG,
-                          regs->gprs[4], regs->gprs[5],
-                          regs->gprs[6], regs->gprs[7]);
-        seq_printf(m, "           " FOURLONG,
-                          regs->gprs[8], regs->gprs[9],
-                          regs->gprs[10], regs->gprs[11]);
-        seq_printf(m, "           " FOURLONG,
-                          regs->gprs[12], regs->gprs[13],
-                          regs->gprs[14], regs->gprs[15]);
-        seq_printf(m, "User ACRS: %08x %08x %08x %08x\n",
-                          task->thread.acrs[0], task->thread.acrs[1],
-                          task->thread.acrs[2], task->thread.acrs[3]);
-        seq_printf(m, "           %08x %08x %08x %08x\n",
-                          task->thread.acrs[4], task->thread.acrs[5],
-                          task->thread.acrs[6], task->thread.acrs[7]);
-        seq_printf(m, "           %08x %08x %08x %08x\n",
-                          task->thread.acrs[8], task->thread.acrs[9],
-                          task->thread.acrs[10], task->thread.acrs[11]);
-        seq_printf(m, "           %08x %08x %08x %08x\n",
-                          task->thread.acrs[12], task->thread.acrs[13],
-                          task->thread.acrs[14], task->thread.acrs[15]);
-}
-
 static DEFINE_SPINLOCK(die_lock);
 
 void die(const char * str, struct pt_regs * regs, long err)
diff --git a/arch/sh/include/asm/sections.h b/arch/sh/include/asm/sections.h
index a78701da775..4a5350037c8 100644
--- a/arch/sh/include/asm/sections.h
+++ b/arch/sh/include/asm/sections.h
@@ -3,7 +3,7 @@
 
 #include <asm-generic/sections.h>
 
-extern void __nosave_begin, __nosave_end;
+extern long __nosave_begin, __nosave_end;
 extern long __machvec_start, __machvec_end;
 extern char __uncached_start, __uncached_end;
 extern char _ebss[];
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index 672944f5b19..e53b4b38bd1 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -14,7 +14,7 @@
 #include <linux/io.h>
 #include <linux/sh_timer.h>
 #include <linux/serial_sci.h>
-#include <asm/machtypes.h>
+#include <generated/machtypes.h>
 
 static struct resource rtc_resources[] = {
         [0] = {
@@ -255,12 +255,17 @@ static struct platform_device *sh7750_early_devices[] __initdata = {
 
 void __init plat_early_device_setup(void)
 {
+        struct platform_device *dev[1];
+
         if (mach_is_rts7751r2d()) {
                 scif_platform_data.scscr |= SCSCR_CKE1;
-                early_platform_add_devices(&scif_device, 1);
+                dev[0] = &scif_device;
+                early_platform_add_devices(dev, 1);
         } else {
-                early_platform_add_devices(&sci_device, 1);
-                early_platform_add_devices(&scif_device, 1);
+                dev[0] = &sci_device;
+                early_platform_add_devices(dev, 1);
+                dev[0] = &scif_device;
+                early_platform_add_devices(dev, 1);
         }
 
         early_platform_add_devices(sh7750_early_devices,
diff --git a/arch/sh/lib/delay.c b/arch/sh/lib/delay.c
index faa8f86c0db..0901b2f14e1 100644
--- a/arch/sh/lib/delay.c
+++ b/arch/sh/lib/delay.c
@@ -10,6 +10,16 @@
 void __delay(unsigned long loops)
 {
         __asm__ __volatile__(
+                /*
+                 * ST40-300 appears to have an issue with this code,
+                 * normally taking two cycles each loop, as with all
+                 * other SH variants. If however the branch and the
+                 * delay slot straddle an 8 byte boundary, this increases
+                 * to 3 cycles.
+                 * This align directive ensures this doesn't occur.
+                 */
+                ".balign 8\n\t"
+
                 "tst    %0, %0\n\t"
                 "1:\t"
                 "bf/s   1b\n\t"
diff --git a/arch/sh/mm/cache.c b/arch/sh/mm/cache.c
index 88d3dc3d30d..5a580ea0442 100644
--- a/arch/sh/mm/cache.c
+++ b/arch/sh/mm/cache.c
@@ -108,7 +108,8 @@ void copy_user_highpage(struct page *to, struct page *from,
                 kunmap_atomic(vfrom, KM_USER0);
         }
 
-        if (pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
+        if (pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK) ||
+            (vma->vm_flags & VM_EXEC))
                 __flush_purge_region(vto, PAGE_SIZE);
 
         kunmap_atomic(vto, KM_USER1);
diff --git a/arch/sparc/include/asm/pcr.h b/arch/sparc/include/asm/pcr.h
index a2f5c61f924..843e4faf6a5 100644
--- a/arch/sparc/include/asm/pcr.h
+++ b/arch/sparc/include/asm/pcr.h
@@ -43,4 +43,6 @@ static inline u64 picl_value(unsigned int nmi_hz)
 
 extern u64 pcr_enable;
 
+extern int pcr_arch_init(void);
+
 #endif /* __PCR_H */
diff --git a/arch/sparc/kernel/iommu.c b/arch/sparc/kernel/iommu.c
index 47977a77f6c..72509d0e34b 100644
--- a/arch/sparc/kernel/iommu.c
+++ b/arch/sparc/kernel/iommu.c
@@ -255,10 +255,9 @@ static inline iopte_t *alloc_npages(struct device *dev, struct iommu *iommu,
 static int iommu_alloc_ctx(struct iommu *iommu)
 {
         int lowest = iommu->ctx_lowest_free;
-        int sz = IOMMU_NUM_CTXS - lowest;
-        int n = find_next_zero_bit(iommu->ctx_bitmap, sz, lowest);
+        int n = find_next_zero_bit(iommu->ctx_bitmap, IOMMU_NUM_CTXS, lowest);
 
-        if (unlikely(n == sz)) {
+        if (unlikely(n == IOMMU_NUM_CTXS)) {
                 n = find_next_zero_bit(iommu->ctx_bitmap, lowest, 1);
                 if (unlikely(n == lowest)) {
                         printk(KERN_WARNING "IOMMU: Ran out of contexts.\n");
diff --git a/arch/sparc/kernel/pcr.c b/arch/sparc/kernel/pcr.c
index ae96cf52a95..7c2ced612b8 100644
--- a/arch/sparc/kernel/pcr.c
+++ b/arch/sparc/kernel/pcr.c
@@ -167,5 +167,3 @@ out_unregister:
         unregister_perf_hsvc();
         return err;
 }
-
-early_initcall(pcr_arch_init);
diff --git a/arch/sparc/kernel/smp_64.c b/arch/sparc/kernel/smp_64.c
index b6a2b8f4704..555a76d1f4a 100644
--- a/arch/sparc/kernel/smp_64.c
+++ b/arch/sparc/kernel/smp_64.c
@@ -49,6 +49,7 @@
 #include <asm/mdesc.h>
 #include <asm/ldc.h>
 #include <asm/hypervisor.h>
+#include <asm/pcr.h>
 
 #include "cpumap.h"
 
@@ -1358,6 +1359,7 @@ void __cpu_die(unsigned int cpu)
 
 void __init smp_cpus_done(unsigned int max_cpus)
 {
+        pcr_arch_init();
 }
 
 void smp_send_reschedule(int cpu)
diff --git a/arch/sparc/kernel/una_asm_32.S b/arch/sparc/kernel/una_asm_32.S
index 8cc03458eb7..8f096e84a93 100644
--- a/arch/sparc/kernel/una_asm_32.S
+++ b/arch/sparc/kernel/una_asm_32.S
@@ -24,9 +24,9 @@ retl_efault:
         .globl  __do_int_store
 __do_int_store:
         ld      [%o2], %g1
-        cmp     %1, 2
+        cmp     %o1, 2
         be      2f
-         cmp    %1, 4
+         cmp    %o1, 4
         be      1f
          srl    %g1, 24, %g2
         srl     %g1, 16, %g7
diff --git a/arch/sparc/lib/bitext.c b/arch/sparc/lib/bitext.c
index 764b3eb7b60..48d00e72ce1 100644
--- a/arch/sparc/lib/bitext.c
+++ b/arch/sparc/lib/bitext.c
@@ -10,7 +10,7 @@
  */
 
 #include <linux/string.h>
-#include <linux/bitops.h>
+#include <linux/bitmap.h>
 
 #include <asm/bitext.h>
 
@@ -80,8 +80,7 @@ int bit_map_string_get(struct bit_map *t, int len, int align)
                 while (test_bit(offset + i, t->map) == 0) {
                         i++;
                         if (i == len) {
-                                for (i = 0; i < len; i++)
-                                        __set_bit(offset + i, t->map);
+                                bitmap_set(t->map, offset, len);
                                 if (offset == t->first_free)
                                         t->first_free = find_next_zero_bit
                                                         (t->map, t->size,
diff --git a/arch/x86/boot/compressed/mkpiggy.c b/arch/x86/boot/compressed/mkpiggy.c
index 646aa78ba5f..46a82388243 100644
--- a/arch/x86/boot/compressed/mkpiggy.c
+++ b/arch/x86/boot/compressed/mkpiggy.c
@@ -62,7 +62,12 @@ int main(int argc, char *argv[])
         if (fseek(f, -4L, SEEK_END)) {
                 perror(argv[1]);
         }
-        fread(&olen, sizeof olen, 1, f);
+
+        if (fread(&olen, sizeof(olen), 1, f) != 1) {
+                perror(argv[1]);
+                return 1;
+        }
+
         ilen = ftell(f);
         olen = getle32(&olen);
         fclose(f);
diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h
index a37da6df07f..b964ec45754 100644
--- a/arch/x86/include/asm/acpi.h
+++ b/arch/x86/include/asm/acpi.h
@@ -88,6 +88,7 @@ extern int acpi_disabled;
 extern int acpi_pci_disabled;
 extern int acpi_skip_timer_override;
 extern int acpi_use_timer_override;
+extern int acpi_fix_pin2_polarity;
 
 extern u8 acpi_sci_flags;
 extern int acpi_sci_override_gsi;
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index ad30ca4b6fe..b8a3484d69e 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -233,6 +233,7 @@ extern void sync_Arb_IDs(void);
 extern void init_bsp_APIC(void);
 extern void setup_local_APIC(void);
 extern void end_local_APIC_setup(void);
+extern void bsp_end_local_APIC_setup(void);
 extern void init_apic_mappings(void);
 void register_lapic_address(unsigned long address);
 extern void setup_boot_APIC_clock(void);
diff --git a/arch/x86/include/asm/ce4100.h b/arch/x86/include/asm/ce4100.h
new file mode 100644
index 00000000000..e656ad8c0a2
--- /dev/null
+++ b/arch/x86/include/asm/ce4100.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_CE4100_H_
+#define _ASM_CE4100_H_
+
+int ce4100_pci_init(void);
+
+#endif
diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
index 6e6e7558e70..4564c8e28a3 100644
--- a/arch/x86/include/asm/cpu.h
+++ b/arch/x86/include/asm/cpu.h
@@ -32,6 +32,6 @@ extern void arch_unregister_cpu(int);
 
 DECLARE_PER_CPU(int, cpu_state);
 
-int __cpuinit mwait_usable(const struct cpuinfo_x86 *);
+int mwait_usable(const struct cpuinfo_x86 *);
 
 #endif /* _ASM_X86_CPU_H */
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 4d0dfa0d998..43a18c77676 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -36,6 +36,11 @@
 #define MSR_IA32_PERFCTR1               0x000000c2
 #define MSR_FSB_FREQ                    0x000000cd
 
+#define MSR_NHM_SNB_PKG_CST_CFG_CTL     0x000000e2
+#define NHM_C3_AUTO_DEMOTE              (1UL << 25)
+#define NHM_C1_AUTO_DEMOTE              (1UL << 26)
+#define ATM_LNC_C6_AUTO_DEMOTE          (1UL << 25)
+
 #define MSR_MTRRcap                     0x000000fe
 #define MSR_IA32_BBL_CR_CTL             0x00000119
 
diff --git a/arch/x86/include/asm/perf_event_p4.h b/arch/x86/include/asm/perf_event_p4.h
index e2f6a99f14a..cc29086e30c 100644
--- a/arch/x86/include/asm/perf_event_p4.h
+++ b/arch/x86/include/asm/perf_event_p4.h
@@ -22,6 +22,7 @@
 
 #define ARCH_P4_CNTRVAL_BITS    (40)
 #define ARCH_P4_CNTRVAL_MASK    ((1ULL << ARCH_P4_CNTRVAL_BITS) - 1)
+#define ARCH_P4_UNFLAGGED_BIT   ((1ULL) << (ARCH_P4_CNTRVAL_BITS - 1))
 
 #define P4_ESCR_EVENT_MASK      0x7e000000U
 #define P4_ESCR_EVENT_SHIFT     25
diff --git a/arch/x86/include/asm/smpboot_hooks.h b/arch/x86/include/asm/smpboot_hooks.h
index 6c22bf353f2..725b7783199 100644
--- a/arch/x86/include/asm/smpboot_hooks.h
+++ b/arch/x86/include/asm/smpboot_hooks.h
@@ -34,7 +34,7 @@ static inline void smpboot_restore_warm_reset_vector(void)
          */
         CMOS_WRITE(0, 0xf);
 
-        *((volatile long *)phys_to_virt(apic->trampoline_phys_low)) = 0;
+        *((volatile u32 *)phys_to_virt(apic->trampoline_phys_low)) = 0;
 }
 
 static inline void __init smpboot_setup_io_apic(void)
diff --git a/arch/x86/include/asm/uv/uv_bau.h b/arch/x86/include/asm/uv/uv_bau.h
index ce1d54c8a43..3e094af443c 100644
--- a/arch/x86/include/asm/uv/uv_bau.h
+++ b/arch/x86/include/asm/uv/uv_bau.h
@@ -176,7 +176,7 @@ struct bau_msg_payload {
 struct bau_msg_header {
         unsigned int dest_subnodeid:6;  /* must be 0x10, for the LB */
         /* bits 5:0 */
-        unsigned int base_dest_nodeid:15; /* nasid (pnode<<1) of */
+        unsigned int base_dest_nodeid:15; /* nasid of the */
         /* bits 20:6 */                   /* first bit in uvhub map */
         unsigned int command:8; /* message type */
         /* bits 28:21 */
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index a2c51217539..9a966c579af 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -72,6 +72,7 @@ u8 acpi_sci_flags __initdata;
 int acpi_sci_override_gsi __initdata;
 int acpi_skip_timer_override __initdata;
 int acpi_use_timer_override __initdata;
+int acpi_fix_pin2_polarity __initdata;
 
 #ifdef CONFIG_X86_LOCAL_APIC
 static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE;
@@ -415,10 +416,15 @@ acpi_parse_int_src_ovr(struct acpi_subtable_header * header,
                 return 0;
         }
 
-        if (acpi_skip_timer_override &&
-            intsrc->source_irq == 0 && intsrc->global_irq == 2) {
-                printk(PREFIX "BIOS IRQ0 pin2 override ignored.\n");
-                return 0;
+        if (intsrc->source_irq == 0 && intsrc->global_irq == 2) {
+                if (acpi_skip_timer_override) {
+                        printk(PREFIX "BIOS IRQ0 pin2 override ignored.\n");
+                        return 0;
+                }
+                if (acpi_fix_pin2_polarity && (intsrc->inti_flags & ACPI_MADT_POLARITY_MASK)) {
+                        intsrc->inti_flags &= ~ACPI_MADT_POLARITY_MASK;
+                        printk(PREFIX "BIOS IRQ0 pin2 override: forcing polarity to high active.\n");
+                }
         }
 
         mp_override_legacy_irq(intsrc->source_irq,
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index 123608531c8..7038b95d363 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -671,7 +671,7 @@ void __kprobes text_poke_smp_batch(struct text_poke_param *params, int n)
 
         atomic_set(&stop_machine_first, 1);
         wrote_text = 0;
-        stop_machine(stop_machine_text_poke, (void *)&tpp, NULL);
+        __stop_machine(stop_machine_text_poke, (void *)&tpp, NULL);
 }
 
 #if defined(CONFIG_DYNAMIC_FTRACE) || defined(HAVE_JUMP_LABEL)
diff --git a/arch/x86/kernel/apb_timer.c b/arch/x86/kernel/apb_timer.c
index 51ef31a89be..51d4e166306 100644
--- a/arch/x86/kernel/apb_timer.c
+++ b/arch/x86/kernel/apb_timer.c
@@ -284,7 +284,7 @@ static int __init apbt_clockevent_register(void)
         memcpy(&adev->evt, &apbt_clockevent, sizeof(struct clock_event_device));
 
         if (mrst_timer_options == MRST_TIMER_LAPIC_APBT) {
-                apbt_clockevent.rating = APBT_CLOCKEVENT_RATING - 100;
+                adev->evt.rating = APBT_CLOCKEVENT_RATING - 100;
                 global_clock_event = &adev->evt;
                 printk(KERN_DEBUG "%s clockevent registered as global\n",
                        global_clock_event->name);
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 1390cf985af..306386fbc10 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1403,12 +1403,17 @@ void __cpuinit end_local_APIC_setup(void)
 #endif
 
         apic_pm_activate();
+}
+
+void __init bsp_end_local_APIC_setup(void)
+{
+        end_local_APIC_setup();
 
         /*
          * Now that local APIC setup is completed for BP, configure the fault
          * handling for interrupt remapping.
          */
-        if (!smp_processor_id() && intr_remapping_enabled)
+        if (intr_remapping_enabled)
                 enable_drhd_fault_handling();
 
 }
@@ -1778,7 +1783,7 @@ int __init APIC_init_uniprocessor(void)
                 enable_IO_APIC();
 #endif
 
-        end_local_APIC_setup();
+        bsp_end_local_APIC_setup();
 
 #ifdef CONFIG_X86_IO_APIC
         if (smp_found_config && !skip_ioapic_setup && nr_ioapics)
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 697dc34b7b8..ca9e2a3545a 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -4002,6 +4002,9 @@ int mp_find_ioapic(u32 gsi)
 {
         int i = 0;
 
+        if (nr_ioapics == 0)
+                return -1;
+
         /* Find the IOAPIC that manages this GSI. */
         for (i = 0; i < nr_ioapics; i++) {
                 if ((gsi >= mp_gsi_routing[i].gsi_base)
diff --git a/arch/x86/kernel/check.c b/arch/x86/kernel/check.c
index 13a38917951..452932d3473 100644
--- a/arch/x86/kernel/check.c
+++ b/arch/x86/kernel/check.c
@@ -106,8 +106,8 @@ void __init setup_bios_corruption_check(void)
                 addr += size;
         }
 
-        printk(KERN_INFO "Scanning %d areas for low memory corruption\n",
-               num_scan_areas);
+        if (num_scan_areas)
+                printk(KERN_INFO "Scanning %d areas for low memory corruption\n", num_scan_areas);
 }
 
 
@@ -143,12 +143,12 @@ static void check_corruption(struct work_struct *dummy)
 {
         check_for_bios_corruption();
         schedule_delayed_work(&bios_check_work,
-                round_jiffies_relative(corruption_check_period*HZ)); 
+                round_jiffies_relative(corruption_check_period*HZ));
 }
 
 static int start_periodic_check_for_corruption(void)
 {
-        if (!memory_corruption_check || corruption_check_period == 0)
+        if (!num_scan_areas || !memory_corruption_check || corruption_check_period == 0)
                 return 0;
 
         printk(KERN_INFO "Scanning for low memory corruption every %d seconds\n",
diff --git a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
index bd1cac747f6..52c93648e49 100644
--- a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
+++ b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
@@ -158,9 +158,9 @@ static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c)
 {
         if (c->x86 == 0x06) {
                 if (cpu_has(c, X86_FEATURE_EST))
-                        printk(KERN_WARNING PFX "Warning: EST-capable CPU "
-                               "detected. The acpi-cpufreq module offers "
-                               "voltage scaling in addition of frequency "
+                        printk_once(KERN_WARNING PFX "Warning: EST-capable "
+                               "CPU detected. The acpi-cpufreq module offers "
+                               "voltage scaling in addition to frequency "
                                "scaling. You should use that instead of "
                                "p4-clockmod, if possible.\n");
                 switch (c->x86_model) {
diff --git a/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c
index 4f6f679f279..4a5a42b842a 100644
--- a/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c
@@ -195,7 +195,7 @@ static unsigned int pcc_get_freq(unsigned int cpu)
 cmd_incomplete:
         iowrite16(0, &pcch_hdr->status);
         spin_unlock(&pcc_lock);
-        return -EINVAL;
+        return 0;
 }
 
 static int pcc_cpufreq_target(struct cpufreq_policy *policy,
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
index 35c7e65e59b..c567dec854f 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
@@ -1537,6 +1537,7 @@ static struct notifier_block cpb_nb = {
 static int __cpuinit powernowk8_init(void)
 {
         unsigned int i, supported_cpus = 0, cpu;
+        int rv;
 
         for_each_online_cpu(i) {
                 int rc;
@@ -1555,14 +1556,14 @@ static int __cpuinit powernowk8_init(void)
 
                 cpb_capable = true;
 
-                register_cpu_notifier(&cpb_nb);
-
                 msrs = msrs_alloc();
                 if (!msrs) {
                         printk(KERN_ERR "%s: Error allocating msrs!\n", __func__);
                         return -ENOMEM;
                 }
 
+                register_cpu_notifier(&cpb_nb);
+
                 rdmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs);
 
                 for_each_cpu(cpu, cpu_online_mask) {
@@ -1574,7 +1575,13 @@ static int __cpuinit powernowk8_init(void)
                         (cpb_enabled ? "on" : "off"));
         }
 
-        return cpufreq_register_driver(&cpufreq_amd64_driver);
+        rv = cpufreq_register_driver(&cpufreq_amd64_driver);
+        if (rv < 0 && boot_cpu_has(X86_FEATURE_CPB)) {
+                unregister_cpu_notifier(&cpb_nb);
+                msrs_free(msrs);
+                msrs = NULL;
+        }
+        return rv;
 }
 
 /* driver entry point for term */
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index f7a0993c1e7..ff751a9f182 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -770,9 +770,14 @@ static inline int p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc)
                 return 1;
         }
 
-        /* it might be unflagged overflow */
-        rdmsrl(hwc->event_base + hwc->idx, v);
-        if (!(v & ARCH_P4_CNTRVAL_MASK))
+        /*
+         * In some circumstances the overflow might issue an NMI but did
+         * not set P4_CCCR_OVF bit. Because a counter holds a negative value
+         * we simply check for high bit being set, if it's cleared it means
+         * the counter has reached zero value and continued counting before
+         * real NMI signal was received:
+         */
+        if (!(v & ARCH_P4_UNFLAGGED_BIT))
                 return 1;
 
         return 0;
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index 76b8cd953de..9efbdcc5642 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -143,15 +143,10 @@ static void __init ati_bugs(int num, int slot, int func)
 
 static u32 __init ati_sbx00_rev(int num, int slot, int func)
 {
-        u32 old, d;
+        u32 d;
 
-        d = read_pci_config(num, slot, func, 0x70);
-        old = d;
-        d &= ~(1<<8);
-        write_pci_config(num, slot, func, 0x70, d);
         d = read_pci_config(num, slot, func, 0x8);
         d &= 0xff;
-        write_pci_config(num, slot, func, 0x70, old);
 
         return d;
 }
@@ -160,13 +155,16 @@ static void __init ati_bugs_contd(int num, int slot, int func)
 {
         u32 d, rev;
 
-        if (acpi_use_timer_override)
-                return;
-
         rev = ati_sbx00_rev(num, slot, func);
+        if (rev >= 0x40)
+                acpi_fix_pin2_polarity = 1;
+
         if (rev > 0x13)
                 return;
 
+        if (acpi_use_timer_override)
+                return;
+
         /* check for IRQ0 interrupt swap */
         d = read_pci_config(num, slot, func, 0x64);
         if (!(d & (1<<14)))
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index 52945da52a9..387b6a0c9e8 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -367,7 +367,8 @@ void fixup_irqs(void)
                 if (irr  & (1 << (vector % 32))) {
                         irq = __this_cpu_read(vector_irq[vector]);
 
-                        data = irq_get_irq_data(irq);
+                        desc = irq_to_desc(irq);
+                        data = &desc->irq_data;
                         raw_spin_lock(&desc->lock);
                         if (data->chip->irq_retrigger)
                                 data->chip->irq_retrigger(data);
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index e764fc05d70..ff455419898 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -92,21 +92,31 @@ void show_regs(struct pt_regs *regs)
 
 void show_regs_common(void)
 {
-        const char *board, *product;
+        const char *vendor, *product, *board;
 
-        board = dmi_get_system_info(DMI_BOARD_NAME);
-        if (!board)
-                board = "";
+        vendor = dmi_get_system_info(DMI_SYS_VENDOR);
+        if (!vendor)
+                vendor = "";
         product = dmi_get_system_info(DMI_PRODUCT_NAME);
         if (!product)
                 product = "";
 
+        /* Board Name is optional */
+        board = dmi_get_system_info(DMI_BOARD_NAME);
+
         printk(KERN_CONT "\n");
-        printk(KERN_DEFAULT "Pid: %d, comm: %.20s %s %s %.*s %s/%s\n",
+        printk(KERN_DEFAULT "Pid: %d, comm: %.20s %s %s %.*s",
                 current->pid, current->comm, print_tainted(),
                 init_utsname()->release,
                 (int)strcspn(init_utsname()->version, " "),
-                init_utsname()->version, board, product);
+                init_utsname()->version);
+        printk(KERN_CONT " ");
+        printk(KERN_CONT "%s %s", vendor, product);
+        if (board) {
+                printk(KERN_CONT "/");
+                printk(KERN_CONT "%s", board);
+        }
+        printk(KERN_CONT "\n");
 }
 
 void flush_thread(void)
@@ -506,7 +516,7 @@ static void poll_idle(void)
 #define MWAIT_ECX_EXTENDED_INFO         0x01
 #define MWAIT_EDX_C1                    0xf0
 
-int __cpuinit mwait_usable(const struct cpuinfo_x86 *c)
+int mwait_usable(const struct cpuinfo_x86 *c)
 {
         u32 eax, ebx, ecx, edx;
 
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index fc7aae1e2bc..715037caeb4 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -285,6 +285,14 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {
                         DMI_MATCH(DMI_BOARD_NAME, "P4S800"),
                 },
         },
+        {       /* Handle problems with rebooting on VersaLogic Menlow boards */
+                .callback = set_bios_reboot,
+                .ident = "VersaLogic Menlow based board",
+                .matches = {
+                        DMI_MATCH(DMI_BOARD_VENDOR, "VersaLogic Corporation"),
+                        DMI_MATCH(DMI_BOARD_NAME, "VersaLogic Menlow board"),
+                },
+        },
         { }
 };
 
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index fe4837136e0..a9d805f3920 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -999,7 +999,7 @@ static int __init smp_sanity_check(unsigned max_cpus)
 
                 connect_bsp_APIC();
                 setup_local_APIC();
-                end_local_APIC_setup();
+                bsp_end_local_APIC_setup();
                 return -1;
         }
 
@@ -1074,7 +1074,7 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
         if (!skip_ioapic_setup && nr_ioapics)
                 enable_IO_APIC();
 
-        end_local_APIC_setup();
+        bsp_end_local_APIC_setup();
 
         if (apic->setup_portio_remap)
                 apic->setup_portio_remap();
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 54ce246a383..63fec1531e8 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -2777,6 +2777,8 @@ static int dr_interception(struct vcpu_svm *svm)
                         kvm_register_write(&svm->vcpu, reg, val);
         }
 
+        skip_emulated_instruction(&svm->vcpu);
+
         return 1;
 }
 
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index 7d90ceb882a..20e3f8702d1 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -229,15 +229,14 @@ void vmalloc_sync_all(void)
         for (address = VMALLOC_START & PMD_MASK;
              address >= TASK_SIZE && address < FIXADDR_TOP;
              address += PMD_SIZE) {
-
-                unsigned long flags;
                 struct page *page;
 
-                spin_lock_irqsave(&pgd_lock, flags);
+                spin_lock(&pgd_lock);
                 list_for_each_entry(page, &pgd_list, lru) {
                         spinlock_t *pgt_lock;
                         pmd_t *ret;
 
+                        /* the pgt_lock only for Xen */
                         pgt_lock = &pgd_page_get_mm(page)->page_table_lock;
 
                         spin_lock(pgt_lock);
@@ -247,7 +246,7 @@ void vmalloc_sync_all(void)
                         if (!ret)
                                 break;
                 }
-                spin_unlock_irqrestore(&pgd_lock, flags);
+                spin_unlock(&pgd_lock);
         }
 }
 
@@ -828,6 +827,13 @@ mm_fault_error(struct pt_regs *regs, unsigned long error_code,
                unsigned long address, unsigned int fault)
 {
         if (fault & VM_FAULT_OOM) {
+                /* Kernel mode? Handle exceptions or die: */
+                if (!(error_code & PF_USER)) {
+                        up_read(&current->mm->mmap_sem);
+                        no_context(regs, error_code, address);
+                        return;
+                }
+
                 out_of_memory(regs, error_code, address);
         } else {
                 if (fault & (VM_FAULT_SIGBUS|VM_FAULT_HWPOISON|
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
index c8813aa3974..a08a62cb136 100644
--- a/arch/x86/mm/init_64.c
+++ b/arch/x86/mm/init_64.c
@@ -105,18 +105,18 @@ void sync_global_pgds(unsigned long start, unsigned long end)
 
         for (address = start; address <= end; address += PGDIR_SIZE) {
                 const pgd_t *pgd_ref = pgd_offset_k(address);
-                unsigned long flags;
                 struct page *page;
 
                 if (pgd_none(*pgd_ref))
                         continue;
 
-                spin_lock_irqsave(&pgd_lock, flags);
+                spin_lock(&pgd_lock);
                 list_for_each_entry(page, &pgd_list, lru) {
                         pgd_t *pgd;
                         spinlock_t *pgt_lock;
 
                         pgd = (pgd_t *)page_address(page) + pgd_index(address);
+                        /* the pgt_lock only for Xen */
                         pgt_lock = &pgd_page_get_mm(page)->page_table_lock;
                         spin_lock(pgt_lock);
 
@@ -128,7 +128,7 @@ void sync_global_pgds(unsigned long start, unsigned long end)
 
                         spin_unlock(pgt_lock);
                 }
-                spin_unlock_irqrestore(&pgd_lock, flags);
+                spin_unlock(&pgd_lock);
         }
 }
 
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index d343b3c81f3..90825f2eb0f 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -57,12 +57,10 @@ static unsigned long direct_pages_count[PG_LEVEL_NUM];
 
 void update_page_count(int level, unsigned long pages)
 {
-        unsigned long flags;
-
         /* Protect against CPA */
-        spin_lock_irqsave(&pgd_lock, flags);
+        spin_lock(&pgd_lock);
         direct_pages_count[level] += pages;
-        spin_unlock_irqrestore(&pgd_lock, flags);
+        spin_unlock(&pgd_lock);
 }
 
 static void split_page_count(int level)
@@ -394,7 +392,7 @@ static int
 try_preserve_large_page(pte_t *kpte, unsigned long address,
                         struct cpa_data *cpa)
 {
-        unsigned long nextpage_addr, numpages, pmask, psize, flags, addr, pfn;
+        unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn;
         pte_t new_pte, old_pte, *tmp;
         pgprot_t old_prot, new_prot, req_prot;
         int i, do_split = 1;
@@ -403,7 +401,7 @@ try_preserve_large_page(pte_t *kpte, unsigned long address,
         if (cpa->force_split)
                 return 1;
 
-        spin_lock_irqsave(&pgd_lock, flags);
+        spin_lock(&pgd_lock);
         /*
          * Check for races, another CPU might have split this page
          * up already:
@@ -498,14 +496,14 @@ try_preserve_large_page(pte_t *kpte, unsigned long address,
         }
 
 out_unlock:
-        spin_unlock_irqrestore(&pgd_lock, flags);
+        spin_unlock(&pgd_lock);
 
         return do_split;
 }
 
 static int split_large_page(pte_t *kpte, unsigned long address)
 {
-        unsigned long flags, pfn, pfninc = 1;
+        unsigned long pfn, pfninc = 1;
         unsigned int i, level;
         pte_t *pbase, *tmp;
         pgprot_t ref_prot;
@@ -519,7 +517,7 @@ static int split_large_page(pte_t *kpte, unsigned long address)
         if (!base)
                 return -ENOMEM;
 
-        spin_lock_irqsave(&pgd_lock, flags);
+        spin_lock(&pgd_lock);
         /*
          * Check for races, another CPU might have split this page
          * up for us already:
@@ -591,7 +589,7 @@ out_unlock:
          */
         if (base)
                 __free_page(base);
-        spin_unlock_irqrestore(&pgd_lock, flags);
+        spin_unlock(&pgd_lock);
 
         return 0;
 }
diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c
index 500242d3c96..0113d19c8aa 100644
--- a/arch/x86/mm/pgtable.c
+++ b/arch/x86/mm/pgtable.c
@@ -121,14 +121,12 @@ static void pgd_ctor(struct mm_struct *mm, pgd_t *pgd)
 
 static void pgd_dtor(pgd_t *pgd)
 {
-        unsigned long flags; /* can be called from interrupt context */
-
         if (SHARED_KERNEL_PMD)
                 return;
 
-        spin_lock_irqsave(&pgd_lock, flags);
+        spin_lock(&pgd_lock);
         pgd_list_del(pgd);
-        spin_unlock_irqrestore(&pgd_lock, flags);
+        spin_unlock(&pgd_lock);
 }
 
 /*
@@ -260,7 +258,6 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
 {
         pgd_t *pgd;
         pmd_t *pmds[PREALLOCATED_PMDS];
-        unsigned long flags;
 
         pgd = (pgd_t *)__get_free_page(PGALLOC_GFP);
 
@@ -280,12 +277,12 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
          * respect to anything walking the pgd_list, so that they
          * never see a partially populated pgd.
          */
-        spin_lock_irqsave(&pgd_lock, flags);
+        spin_lock(&pgd_lock);
 
         pgd_ctor(mm, pgd);
         pgd_prepopulate_pmd(mm, pgd, pmds);
 
-        spin_unlock_irqrestore(&pgd_lock, flags);
+        spin_unlock(&pgd_lock);
 
         return pgd;
 
diff --git a/arch/x86/pci/ce4100.c b/arch/x86/pci/ce4100.c
index 85b68ef5e80..9260b3eb18d 100644
--- a/arch/x86/pci/ce4100.c
+++ b/arch/x86/pci/ce4100.c
@@ -34,6 +34,7 @@
 #include <linux/pci.h>
 #include <linux/init.h>
 
+#include <asm/ce4100.h>
 #include <asm/pci_x86.h>
 
 struct sim_reg {
@@ -306,10 +307,10 @@ struct pci_raw_ops ce4100_pci_conf = {
         .write = ce4100_conf_write,
 };
 
-static int __init ce4100_pci_init(void)
+int __init ce4100_pci_init(void)
 {
         init_sim_regs();
         raw_pci_ops = &ce4100_pci_conf;
-        return 0;
+        /* Indicate caller that it should invoke pci_legacy_init() */
+        return 1;
 }
-subsys_initcall(ce4100_pci_init);
diff --git a/arch/x86/platform/ce4100/ce4100.c b/arch/x86/platform/ce4100/ce4100.c
index d2c0d51a717..cd6f184c3b3 100644
--- a/arch/x86/platform/ce4100/ce4100.c
+++ b/arch/x86/platform/ce4100/ce4100.c
@@ -15,6 +15,7 @@
 #include <linux/serial_reg.h>
 #include <linux/serial_8250.h>
 
+#include <asm/ce4100.h>
 #include <asm/setup.h>
 #include <asm/io.h>
 
@@ -129,4 +130,5 @@ void __init x86_ce4100_early_setup(void)
         x86_init.resources.probe_roms = x86_init_noop;
         x86_init.mpparse.get_smp_config = x86_init_uint_noop;
         x86_init.mpparse.find_smp_config = sdv_find_smp_config;
+        x86_init.pci.init = ce4100_pci_init;
 }
diff --git a/arch/x86/platform/olpc/olpc_dt.c b/arch/x86/platform/olpc/olpc_dt.c
index dab87464753..044bda5b317 100644
--- a/arch/x86/platform/olpc/olpc_dt.c
+++ b/arch/x86/platform/olpc/olpc_dt.c
@@ -140,8 +140,7 @@ void * __init prom_early_alloc(unsigned long size)
                  * wasted bootmem) and hand off chunks of it to callers.
                  */
                 res = alloc_bootmem(chunk_size);
-                if (!res)
-                        return NULL;
+                BUG_ON(!res);
                 prom_early_allocated += chunk_size;
                 memset(res, 0, chunk_size);
                 free_mem = chunk_size;
diff --git a/arch/x86/platform/uv/tlb_uv.c b/arch/x86/platform/uv/tlb_uv.c
index df58e9cad96..a7b38d35c29 100644
--- a/arch/x86/platform/uv/tlb_uv.c
+++ b/arch/x86/platform/uv/tlb_uv.c
@@ -1364,11 +1364,11 @@ uv_activation_descriptor_init(int node, int pnode)
                 memset(bd2, 0, sizeof(struct bau_desc));
                 bd2->header.sw_ack_flag = 1;
                 /*
-                 * base_dest_nodeid is the nasid (pnode<<1) of the first uvhub
+                 * base_dest_nodeid is the nasid of the first uvhub
                  * in the partition. The bit map will indicate uvhub numbers,
                  * which are 0-N in a partition. Pnodes are unique system-wide.
                  */
-                bd2->header.base_dest_nodeid = uv_partition_base_pnode << 1;
+                bd2->header.base_dest_nodeid = UV_PNODE_TO_NASID(uv_partition_base_pnode);
                 bd2->header.dest_subnodeid = 0x10; /* the LB */
                 bd2->header.command = UV_NET_ENDPOINT_INTD;
                 bd2->header.int_both = 1;
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 13783a18c6f..77f3228cfc8 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -986,10 +986,9 @@ static void xen_pgd_pin(struct mm_struct *mm)
  */
 void xen_mm_pin_all(void)
 {
-        unsigned long flags;
         struct page *page;
 
-        spin_lock_irqsave(&pgd_lock, flags);
+        spin_lock(&pgd_lock);
 
         list_for_each_entry(page, &pgd_list, lru) {
                 if (!PagePinned(page)) {
@@ -998,7 +997,7 @@ void xen_mm_pin_all(void)
                 }
         }
 
-        spin_unlock_irqrestore(&pgd_lock, flags);
+        spin_unlock(&pgd_lock);
 }
 
 /*
@@ -1099,10 +1098,9 @@ static void xen_pgd_unpin(struct mm_struct *mm)
  */
 void xen_mm_unpin_all(void)
 {
-        unsigned long flags;
         struct page *page;
 
-        spin_lock_irqsave(&pgd_lock, flags);
+        spin_lock(&pgd_lock);
 
         list_for_each_entry(page, &pgd_list, lru) {
                 if (PageSavePinned(page)) {
@@ -1112,7 +1110,7 @@ void xen_mm_unpin_all(void)
                 }
         }
 
-        spin_unlock_irqrestore(&pgd_lock, flags);
+        spin_unlock(&pgd_lock);
 }
 
 void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)