x86: prevent unconditional writes to DebugCtl MSR

Otherwise, enabling (or better, subsequent disabling) of single
stepping would cause a kernel oops on CPUs not having this MSR.

The patch could have been added a conditional to the MSR write in
user_disable_single_step(), but centralizing the updates seems safer
and (looking forward) better manageable.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Cc: Markus Metzger <markus.t.metzger@intel.com>

Signed-off-by: Ingo Molnar <mingo@elte.hu>

4 files changed, 7 insertions, 7 deletions

diff --git a/arch/x86/kernel/kprobes.c b/arch/x86/kernel/kprobes.c
index 34a591283f5..1e3de7db9ad 100644
--- a/arch/x86/kernel/kprobes.c
+++ b/arch/x86/kernel/kprobes.c
@@ -410,13 +410,13 @@ static void __kprobes set_current_kprobe(struct kprobe *p, struct pt_regs *regs,
 static void __kprobes clear_btf(void)
 {
         if (test_thread_flag(TIF_DEBUGCTLMSR))
-                wrmsrl(MSR_IA32_DEBUGCTLMSR, 0);
+                update_debugctlmsr(0);
 }
 
 static void __kprobes restore_btf(void)
 {
         if (test_thread_flag(TIF_DEBUGCTLMSR))
-                wrmsrl(MSR_IA32_DEBUGCTLMSR, current->thread.debugctlmsr);
+                update_debugctlmsr(current->thread.debugctlmsr);
 }
 
 static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs)
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c
index 9230ce060d0..ec05fb750df 100644
--- a/arch/x86/kernel/process_32.c
+++ b/arch/x86/kernel/process_32.c
@@ -564,12 +564,12 @@ __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
                 /* we clear debugctl to make sure DS
                  * is not in use when we change it */
                 debugctl = 0;
-                wrmsrl(MSR_IA32_DEBUGCTLMSR, 0);
+                update_debugctlmsr(0);
                 wrmsr(MSR_IA32_DS_AREA, next->ds_area_msr, 0);
         }
 
         if (next->debugctlmsr != debugctl)
-                wrmsr(MSR_IA32_DEBUGCTLMSR, next->debugctlmsr, 0);
+                update_debugctlmsr(next->debugctlmsr);
 
         if (test_tsk_thread_flag(next_p, TIF_DEBUG)) {
                 set_debugreg(next->debugreg0, 0);
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 1ffce14cff6..4f40272474d 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -563,12 +563,12 @@ static inline void __switch_to_xtra(struct task_struct *prev_p,
                 /* we clear debugctl to make sure DS
                  * is not in use when we change it */
                 debugctl = 0;
-                wrmsrl(MSR_IA32_DEBUGCTLMSR, 0);
+                update_debugctlmsr(0);
                 wrmsrl(MSR_IA32_DS_AREA, next->ds_area_msr);
         }
 
         if (next->debugctlmsr != debugctl)
-                wrmsrl(MSR_IA32_DEBUGCTLMSR, next->debugctlmsr);
+                update_debugctlmsr(next->debugctlmsr);
 
         if (test_tsk_thread_flag(next_p, TIF_DEBUG)) {
                 loaddebug(next, 0);
diff --git a/arch/x86/kernel/step.c b/arch/x86/kernel/step.c
index 071ff479823..92c20fee678 100644
--- a/arch/x86/kernel/step.c
+++ b/arch/x86/kernel/step.c
@@ -148,7 +148,7 @@ static void write_debugctlmsr(struct task_struct *child, unsigned long val)
         if (child != current)
                 return;
 
-        wrmsrl(MSR_IA32_DEBUGCTLMSR, val);
+        update_debugctlmsr(val);
 }
 
 /*