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authorRussell King <rmk+kernel@arm.linux.org.uk>2012-01-05 07:55:03 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-01-05 07:55:03 -0500
commit4c5f830c4c9d4f19c1eef356c0cd322b46d695c9 (patch)
treea14ad6c652736bb28859a7aec392a01b236ae58d /arch
parentcc511b8d84d88ab788cddbfe8d21485b1c387493 (diff)
parent2e3d256de9d3db5a7ca19b61305627a516b54b45 (diff)
Merge branch 'for-russell' of git://hansjkoch.de/git/linux-tcc into HEAD
Conflicts: arch/arm/plat-omap/include/plat/common.h
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig35
-rw-r--r--arch/arm/Makefile2
-rw-r--r--arch/arm/boot/Makefile2
-rw-r--r--arch/arm/boot/dts/tegra-ventana.dts3
-rw-r--r--arch/arm/common/gic.c16
-rw-r--r--arch/arm/common/pl330.c12
-rw-r--r--arch/arm/configs/at91cap9_defconfig (renamed from arch/arm/configs/at91cap9adk_defconfig)7
-rw-r--r--arch/arm/configs/at91rm9200_defconfig47
-rw-r--r--arch/arm/configs/at91sam9260_defconfig (renamed from arch/arm/configs/at91sam9260ek_defconfig)16
-rw-r--r--arch/arm/configs/at91sam9g20_defconfig (renamed from arch/arm/configs/at91sam9g20ek_defconfig)23
-rw-r--r--arch/arm/configs/at91sam9g45_defconfig7
-rw-r--r--arch/arm/configs/at91sam9rl_defconfig (renamed from arch/arm/configs/at91sam9rlek_defconfig)5
-rw-r--r--arch/arm/configs/ezx_defconfig2
-rw-r--r--arch/arm/configs/imote2_defconfig2
-rw-r--r--arch/arm/configs/magician_defconfig2
-rw-r--r--arch/arm/configs/omap1_defconfig6
-rw-r--r--arch/arm/configs/u300_defconfig13
-rw-r--r--arch/arm/configs/u8500_defconfig14
-rw-r--r--arch/arm/configs/zeus_defconfig2
-rw-r--r--arch/arm/include/asm/hardware/cache-l2x0.h2
-rw-r--r--arch/arm/include/asm/mach/arch.h1
-rw-r--r--arch/arm/include/asm/pmu.h10
-rw-r--r--arch/arm/include/asm/topology.h2
-rw-r--r--arch/arm/include/asm/unistd.h2
-rw-r--r--arch/arm/include/asm/unwind.h16
-rw-r--r--arch/arm/kernel/calls.S2
-rw-r--r--arch/arm/kernel/entry-armv.S2
-rw-r--r--arch/arm/kernel/head.S2
-rw-r--r--arch/arm/kernel/kprobes-arm.c4
-rw-r--r--arch/arm/kernel/kprobes-test-arm.c27
-rw-r--r--arch/arm/kernel/kprobes-test-thumb.c16
-rw-r--r--arch/arm/kernel/kprobes-test.h100
-rw-r--r--arch/arm/kernel/machine_kexec.c35
-rw-r--r--arch/arm/kernel/perf_event.c20
-rw-r--r--arch/arm/kernel/pmu.c1
-rw-r--r--arch/arm/kernel/process.c3
-rw-r--r--arch/arm/kernel/setup.c20
-rw-r--r--arch/arm/kernel/topology.c2
-rw-r--r--arch/arm/kernel/unwind.c129
-rw-r--r--arch/arm/lib/bitops.h26
-rw-r--r--arch/arm/lib/changebit.S4
-rw-r--r--arch/arm/lib/clearbit.S4
-rw-r--r--arch/arm/lib/setbit.S4
-rw-r--r--arch/arm/lib/testchangebit.S4
-rw-r--r--arch/arm/lib/testclearbit.S4
-rw-r--r--arch/arm/lib/testsetbit.S4
-rw-r--r--arch/arm/mach-at91/at91cap9_devices.c7
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c7
-rw-r--r--arch/arm/mach-at91/at91sam9260.c6
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c7
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c7
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c7
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c7
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c7
-rw-r--r--arch/arm/mach-at91/board-yl-9200.c2
-rw-r--r--arch/arm/mach-at91/include/mach/system_rev.h2
-rw-r--r--arch/arm/mach-at91/include/mach/vmalloc.h2
-rw-r--r--arch/arm/mach-bcmring/core.c2
-rw-r--r--arch/arm/mach-bcmring/dma.c1
-rw-r--r--arch/arm/mach-davinci/board-da850-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-dm365-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-dm646x-evm.c6
-rw-r--r--arch/arm/mach-davinci/dm646x.c1
-rw-r--r--arch/arm/mach-davinci/include/mach/psc.h5
-rw-r--r--arch/arm/mach-davinci/psc.c18
-rw-r--r--arch/arm/mach-exynos/cpuidle.c2
-rw-r--r--arch/arm/mach-exynos/mct.c13
-rw-r--r--arch/arm/mach-highbank/highbank.c4
-rw-r--r--arch/arm/mach-imx/Kconfig13
-rw-r--r--arch/arm/mach-imx/Makefile.boot34
-rw-r--r--arch/arm/mach-imx/clock-imx6q.c24
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c10
-rw-r--r--arch/arm/mach-imx/mm-imx3.c109
-rw-r--r--arch/arm/mach-imx/src.c7
-rw-r--r--arch/arm/mach-mmp/gplugd.c2
-rw-r--r--arch/arm/mach-mmp/include/mach/gpio-pxa.h2
-rw-r--r--arch/arm/mach-msm/Makefile2
-rw-r--r--arch/arm/mach-msm/board-msm7x30.c4
-rw-r--r--arch/arm/mach-msm/board-msm8960.c4
-rw-r--r--arch/arm/mach-msm/board-msm8x60.c4
-rw-r--r--arch/arm/mach-msm/devices-iommu.c1
-rw-r--r--arch/arm/mach-msm/scm.c3
-rw-r--r--arch/arm/mach-mx5/board-mx51_babbage.c2
-rw-r--r--arch/arm/mach-mx5/board-mx53_evk.c2
-rw-r--r--arch/arm/mach-mx5/board-mx53_loco.c2
-rw-r--r--arch/arm/mach-mx5/board-mx53_smd.c2
-rw-r--r--arch/arm/mach-mx5/clock-mx51-mx53.c6
-rw-r--r--arch/arm/mach-mx5/cpu.c5
-rw-r--r--arch/arm/mach-mx5/imx51-dt.c12
-rw-r--r--arch/arm/mach-mx5/imx53-dt.c12
-rw-r--r--arch/arm/mach-mx5/mm.c6
-rw-r--r--arch/arm/mach-mxs/clock-mx28.c2
-rw-r--r--arch/arm/mach-mxs/include/mach/mx28.h4
-rw-r--r--arch/arm/mach-mxs/include/mach/mxs.h1
-rw-r--r--arch/arm/mach-mxs/mach-m28evk.c2
-rw-r--r--arch/arm/mach-mxs/mach-mx28evk.c4
-rw-r--r--arch/arm/mach-mxs/mach-stmp378x_devb.c2
-rw-r--r--arch/arm/mach-mxs/module-tx28.c4
-rw-r--r--arch/arm/mach-omap1/Kconfig8
-rw-r--r--arch/arm/mach-omap1/board-ams-delta.c10
-rw-r--r--arch/arm/mach-omap1/clock.h3
-rw-r--r--arch/arm/mach-omap1/clock_data.c61
-rw-r--r--arch/arm/mach-omap1/devices.c3
-rw-r--r--arch/arm/mach-omap2/Kconfig1
-rw-r--r--arch/arm/mach-omap2/Makefile5
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c2
-rw-r--r--arch/arm/mach-omap2/cpuidle34xx.c1
-rw-r--r--arch/arm/mach-omap2/display.c159
-rw-r--r--arch/arm/mach-omap2/display.h29
-rw-r--r--arch/arm/mach-omap2/io.h0
-rw-r--r--arch/arm/mach-omap2/mcbsp.c6
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c6
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c17
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c17
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c5
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c37
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c24
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_common_data.c4
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_common_data.h4
-rw-r--r--arch/arm/mach-omap2/omap_l3_noc.c2
-rw-r--r--arch/arm/mach-omap2/pm.c6
-rw-r--r--arch/arm/mach-omap2/smartreflex.c2
-rw-r--r--arch/arm/mach-omap2/twl-common.c11
-rw-r--r--arch/arm/mach-omap2/twl-common.h3
-rw-r--r--arch/arm/mach-picoxcell/include/mach/debug-macro.S2
-rw-r--r--arch/arm/mach-prima2/pm.c1
-rw-r--r--arch/arm/mach-prima2/prima2.c1
-rw-r--r--arch/arm/mach-pxa/balloon3.c2
-rw-r--r--arch/arm/mach-pxa/colibri-pxa320.c2
-rw-r--r--arch/arm/mach-pxa/gumstix.c2
-rw-r--r--arch/arm/mach-pxa/include/mach/palm27x.h4
-rw-r--r--arch/arm/mach-pxa/palm27x.c4
-rw-r--r--arch/arm/mach-pxa/palmtc.c2
-rw-r--r--arch/arm/mach-pxa/vpac270.c2
-rw-r--r--arch/arm/mach-s3c64xx/dev-spi.c1
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410-module.c2
-rw-r--r--arch/arm/mach-s3c64xx/s3c6400.c2
-rw-r--r--arch/arm/mach-s3c64xx/setup-fb-24bpp.c2
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkv210.c1
-rw-r--r--arch/arm/mach-sa1100/Makefile.boot4
-rw-r--r--arch/arm/mach-shmobile/Makefile2
-rw-r--r--arch/arm/mach-shmobile/board-ag5evm.c17
-rw-r--r--arch/arm/mach-shmobile/board-ap4evb.c2
-rw-r--r--arch/arm/mach-shmobile/board-kota2.c146
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c8
-rw-r--r--arch/arm/mach-shmobile/clock-sh73a0.c18
-rw-r--r--arch/arm/mach-shmobile/cpuidle.c52
-rw-r--r--arch/arm/mach-shmobile/include/mach/common.h4
-rw-r--r--arch/arm/mach-shmobile/include/mach/sh73a0.h8
-rw-r--r--arch/arm/mach-shmobile/pfc-sh7367.c122
-rw-r--r--arch/arm/mach-shmobile/pfc-sh7372.c262
-rw-r--r--arch/arm/mach-shmobile/pfc-sh7377.c159
-rw-r--r--arch/arm/mach-shmobile/pfc-sh73a0.c193
-rw-r--r--arch/arm/mach-shmobile/pm-sh7372.c47
-rw-r--r--arch/arm/mach-shmobile/pm_runtime.c67
-rw-r--r--arch/arm/mach-tcc8k/Kconfig11
-rw-r--r--arch/arm/mach-tcc8k/Makefile9
-rw-r--r--arch/arm/mach-tcc8k/Makefile.boot3
-rw-r--r--arch/arm/mach-tcc8k/board-tcc8000-sdk.c81
-rw-r--r--arch/arm/mach-tcc8k/clock.c580
-rw-r--r--arch/arm/mach-tcc8k/common.h15
-rw-r--r--arch/arm/mach-tcc8k/devices.c239
-rw-r--r--arch/arm/mach-tcc8k/io.c62
-rw-r--r--arch/arm/mach-tcc8k/irq.c111
-rw-r--r--arch/arm/mach-tcc8k/time.c134
-rw-r--r--arch/arm/mach-tegra/board-dt.c13
-rw-r--r--arch/arm/mach-tegra/board-harmony-pinmux.c6
-rw-r--r--arch/arm/mach-tegra/board-paz00-pinmux.c6
-rw-r--r--arch/arm/mach-tegra/board-seaboard-pinmux.c6
-rw-r--r--arch/arm/mach-tegra/board-trimslice-pinmux.c5
-rw-r--r--arch/arm/mach-w90x900/dev.c4
-rw-r--r--arch/arm/mach-w90x900/include/mach/mfp.h3
-rw-r--r--arch/arm/mach-w90x900/include/mach/nuc900_spi.h2
-rw-r--r--arch/arm/mach-w90x900/mfp.c48
-rw-r--r--arch/arm/mm/cache-l2x0.c2
-rw-r--r--arch/arm/mm/dma-mapping.c11
-rw-r--r--arch/arm/mm/mmap.c23
-rw-r--r--arch/arm/plat-mxc/Kconfig4
-rw-r--r--arch/arm/plat-mxc/avic.c1
-rw-r--r--arch/arm/plat-mxc/cpufreq.c1
-rw-r--r--arch/arm/plat-mxc/gic.c11
-rw-r--r--arch/arm/plat-mxc/include/mach/common.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/entry-macro.S3
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc.h14
-rw-r--r--arch/arm/plat-mxc/include/mach/system.h7
-rw-r--r--arch/arm/plat-mxc/pwm.c7
-rw-r--r--arch/arm/plat-mxc/system.c3
-rw-r--r--arch/arm/plat-mxc/tzic.c1
-rw-r--r--arch/arm/plat-omap/include/plat/clock.h2
-rw-r--r--arch/arm/plat-omap/include/plat/common.h3
-rw-r--r--arch/arm/plat-s3c24xx/cpu-freq-debugfs.c2
-rw-r--r--arch/arm/plat-s5p/sysmmu.c1
-rw-r--r--arch/arm/plat-samsung/dev-backlight.c1
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg.h2
-rw-r--r--arch/arm/plat-samsung/pd.c2
-rw-r--r--arch/arm/plat-samsung/pwm.c2
-rw-r--r--arch/arm/plat-tcc/Kconfig20
-rw-r--r--arch/arm/plat-tcc/Makefile3
-rw-r--r--arch/arm/plat-tcc/clock.c179
-rw-r--r--arch/arm/plat-tcc/include/mach/clock.h48
-rw-r--r--arch/arm/plat-tcc/include/mach/debug-macro.S32
-rw-r--r--arch/arm/plat-tcc/include/mach/entry-macro.S68
-rw-r--r--arch/arm/plat-tcc/include/mach/hardware.h43
-rw-r--r--arch/arm/plat-tcc/include/mach/io.h23
-rw-r--r--arch/arm/plat-tcc/include/mach/irqs.h83
-rw-r--r--arch/arm/plat-tcc/include/mach/system.h31
-rw-r--r--arch/arm/plat-tcc/include/mach/tcc8k-regs.h807
-rw-r--r--arch/arm/plat-tcc/include/mach/timex.h5
-rw-r--r--arch/arm/plat-tcc/include/mach/uncompress.h34
-rw-r--r--arch/arm/plat-tcc/include/mach/vmalloc.h10
-rw-r--r--arch/arm/plat-tcc/system.c25
-rw-r--r--arch/arm/tools/mach-types1
-rw-r--r--arch/blackfin/include/asm/bfin_serial.h2
-rw-r--r--arch/blackfin/mach-bf518/boards/ezbrd.c14
-rw-r--r--arch/blackfin/mach-bf518/boards/tcm-bf518.c14
-rw-r--r--arch/blackfin/mach-bf527/boards/ad7160eval.c14
-rw-r--r--arch/blackfin/mach-bf527/boards/cm_bf527.c16
-rw-r--r--arch/blackfin/mach-bf527/boards/ezbrd.c16
-rw-r--r--arch/blackfin/mach-bf527/boards/ezkit.c14
-rw-r--r--arch/blackfin/mach-bf527/boards/tll6527m.c14
-rw-r--r--arch/blackfin/mach-bf533/boards/H8606.c7
-rw-r--r--arch/blackfin/mach-bf533/boards/blackstamp.c7
-rw-r--r--arch/blackfin/mach-bf533/boards/cm_bf533.c7
-rw-r--r--arch/blackfin/mach-bf533/boards/ezkit.c7
-rw-r--r--arch/blackfin/mach-bf533/boards/ip0x.c7
-rw-r--r--arch/blackfin/mach-bf533/boards/stamp.c7
-rw-r--r--arch/blackfin/mach-bf537/boards/cm_bf537e.c16
-rw-r--r--arch/blackfin/mach-bf537/boards/cm_bf537u.c16
-rw-r--r--arch/blackfin/mach-bf537/boards/dnp5370.c16
-rw-r--r--arch/blackfin/mach-bf537/boards/minotaur.c14
-rw-r--r--arch/blackfin/mach-bf537/boards/pnav10.c15
-rw-r--r--arch/blackfin/mach-bf537/boards/stamp.c16
-rw-r--r--arch/blackfin/mach-bf537/boards/tcm_bf537.c16
-rw-r--r--arch/blackfin/mach-bf538/boards/ezkit.c21
-rw-r--r--arch/blackfin/mach-bf548/boards/cm_bf548.c28
-rw-r--r--arch/blackfin/mach-bf548/boards/ezkit.c28
-rw-r--r--arch/blackfin/mach-bf561/boards/acvilon.c7
-rw-r--r--arch/blackfin/mach-bf561/boards/cm_bf561.c7
-rw-r--r--arch/blackfin/mach-bf561/boards/ezkit.c7
-rw-r--r--arch/blackfin/mach-bf561/boards/tepla.c7
-rw-r--r--arch/cris/arch-v10/drivers/Kconfig2
-rw-r--r--arch/cris/arch-v32/drivers/Kconfig2
-rw-r--r--arch/m68k/Kconfig4
-rw-r--r--arch/m68k/Kconfig.bus9
-rw-r--r--arch/m68k/Kconfig.devices31
-rw-r--r--arch/m68k/amiga/amiints.c168
-rw-r--r--arch/m68k/amiga/cia.c39
-rw-r--r--arch/m68k/apollo/dn_ints.c35
-rw-r--r--arch/m68k/atari/ataints.c274
-rw-r--r--arch/m68k/bvme6000/config.c2
-rw-r--r--arch/m68k/hp300/time.c2
-rw-r--r--arch/m68k/include/asm/hardirq.h5
-rw-r--r--arch/m68k/include/asm/irq.h69
-rw-r--r--arch/m68k/include/asm/macintosh.h2
-rw-r--r--arch/m68k/include/asm/q40ints.h3
-rw-r--r--arch/m68k/include/asm/unistd.h4
-rw-r--r--arch/m68k/kernel/Makefile9
-rw-r--r--arch/m68k/kernel/entry_mm.S7
-rw-r--r--arch/m68k/kernel/ints.c323
-rw-r--r--arch/m68k/kernel/syscalltable.S2
-rw-r--r--arch/m68k/mac/baboon.c21
-rw-r--r--arch/m68k/mac/iop.c10
-rw-r--r--arch/m68k/mac/macints.c24
-rw-r--r--arch/m68k/mac/oss.c54
-rw-r--r--arch/m68k/mac/psc.c49
-rw-r--r--arch/m68k/mac/via.c74
-rw-r--r--arch/m68k/mvme147/config.c5
-rw-r--r--arch/m68k/mvme16x/config.c2
-rw-r--r--arch/m68k/q40/q40ints.c60
-rw-r--r--arch/m68k/sun3/sun3ints.c46
-rw-r--r--arch/microblaze/include/asm/namei.h22
-rw-r--r--arch/mips/Makefile4
-rw-r--r--arch/mips/cavium-octeon/flash_setup.c9
-rw-r--r--arch/mips/cavium-octeon/smp.c5
-rw-r--r--arch/mips/emma/common/prom.c2
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/gpio.h18
-rw-r--r--arch/mips/include/asm/unistd.h18
-rw-r--r--arch/mips/kernel/cevt-r4k.c38
-rw-r--r--arch/mips/kernel/cpufreq/loongson2_clock.c1
-rw-r--r--arch/mips/kernel/perf_event_mipsxx.c8
-rw-r--r--arch/mips/kernel/scall32-o32.S2
-rw-r--r--arch/mips/kernel/scall64-64.S2
-rw-r--r--arch/mips/kernel/scall64-n32.S2
-rw-r--r--arch/mips/kernel/scall64-o32.S2
-rw-r--r--arch/mips/kernel/traps.c3
-rw-r--r--arch/mips/lantiq/clk.c2
-rw-r--r--arch/mips/lantiq/devices.c2
-rw-r--r--arch/mips/lantiq/prom.c2
-rw-r--r--arch/mips/lantiq/setup.c2
-rw-r--r--arch/mips/lantiq/xway/clk-ase.c2
-rw-r--r--arch/mips/lantiq/xway/clk-xway.c2
-rw-r--r--arch/mips/lantiq/xway/devices.c2
-rw-r--r--arch/mips/lantiq/xway/dma.c1
-rw-r--r--arch/mips/lantiq/xway/gpio.c2
-rw-r--r--arch/mips/lantiq/xway/gpio_ebu.c2
-rw-r--r--arch/mips/lantiq/xway/gpio_stp.c2
-rw-r--r--arch/mips/lantiq/xway/prom-ase.c2
-rw-r--r--arch/mips/lantiq/xway/prom-xway.c2
-rw-r--r--arch/mips/lantiq/xway/reset.c2
-rw-r--r--arch/mips/nxp/pnx8550/common/pci.c134
-rw-r--r--arch/mips/nxp/pnx8550/common/setup.c143
-rw-r--r--arch/mips/pci/pci-alchemy.c1
-rw-r--r--arch/mips/pci/pci-lantiq.c1
-rw-r--r--arch/mips/pmc-sierra/yosemite/prom.c2
-rw-r--r--arch/powerpc/Kconfig2
-rw-r--r--arch/powerpc/Makefile6
-rw-r--r--arch/powerpc/boot/dts/charon.dts236
-rw-r--r--arch/powerpc/boot/dts/p1023rds.dts17
-rw-r--r--arch/powerpc/configs/52xx/tqm5200_defconfig20
-rw-r--r--arch/powerpc/configs/ppc44x_defconfig2
-rw-r--r--arch/powerpc/configs/ppc64_defconfig4
-rw-r--r--arch/powerpc/configs/pseries_defconfig4
-rw-r--r--arch/powerpc/include/asm/atomic.h48
-rw-r--r--arch/powerpc/include/asm/bitops.h12
-rw-r--r--arch/powerpc/include/asm/floppy.h4
-rw-r--r--arch/powerpc/include/asm/futex.h7
-rw-r--r--arch/powerpc/include/asm/kvm.h8
-rw-r--r--arch/powerpc/include/asm/kvm_book3s.h2
-rw-r--r--arch/powerpc/include/asm/lv1call.h2
-rw-r--r--arch/powerpc/include/asm/reg_booke.h2
-rw-r--r--arch/powerpc/include/asm/sections.h2
-rw-r--r--arch/powerpc/include/asm/synch.h9
-rw-r--r--arch/powerpc/include/asm/xics.h4
-rw-r--r--arch/powerpc/kernel/entry_32.S15
-rw-r--r--arch/powerpc/kernel/exceptions-64s.S6
-rw-r--r--arch/powerpc/kernel/jump_label.c2
-rw-r--r--arch/powerpc/kernel/kvm.c1
-rw-r--r--arch/powerpc/kernel/misc_32.S2
-rw-r--r--arch/powerpc/kernel/process.c24
-rw-r--r--arch/powerpc/kernel/prom_init.c6
-rw-r--r--arch/powerpc/kernel/setup_32.c2
-rw-r--r--arch/powerpc/kernel/setup_64.c1
-rw-r--r--arch/powerpc/kernel/signal_32.c2
-rw-r--r--arch/powerpc/kernel/smp.c2
-rw-r--r--arch/powerpc/kernel/traps.c2
-rw-r--r--arch/powerpc/kvm/book3s_hv.c1
-rw-r--r--arch/powerpc/kvm/book3s_hv_rmhandlers.S2
-rw-r--r--arch/powerpc/kvm/book3s_pr.c14
-rw-r--r--arch/powerpc/kvm/powerpc.c1
-rw-r--r--arch/powerpc/lib/feature-fixups.c23
-rw-r--r--arch/powerpc/mm/hugetlbpage.c1
-rw-r--r--arch/powerpc/mm/mem.c30
-rw-r--r--arch/powerpc/mm/numa.c24
-rw-r--r--arch/powerpc/platforms/52xx/mpc5200_simple.c1
-rw-r--r--arch/powerpc/platforms/85xx/Kconfig2
-rw-r--r--arch/powerpc/platforms/85xx/p3060_qds.c2
-rw-r--r--arch/powerpc/platforms/Kconfig2
-rw-r--r--arch/powerpc/platforms/cell/beat.c2
-rw-r--r--arch/powerpc/platforms/cell/celleb_scc_pciex.c2
-rw-r--r--arch/powerpc/platforms/cell/iommu.c3
-rw-r--r--arch/powerpc/platforms/cell/pmu.c2
-rw-r--r--arch/powerpc/platforms/cell/spu_base.c9
-rw-r--r--arch/powerpc/platforms/powermac/pic.c1
-rw-r--r--arch/powerpc/platforms/powermac/smp.c4
-rw-r--r--arch/powerpc/platforms/ps3/device-init.c2
-rw-r--r--arch/powerpc/platforms/ps3/interrupt.c23
-rw-r--r--arch/powerpc/platforms/ps3/platform.h1
-rw-r--r--arch/powerpc/platforms/ps3/repository.c32
-rw-r--r--arch/powerpc/platforms/ps3/smp.c62
-rw-r--r--arch/powerpc/sysdev/ehv_pic.c1
-rw-r--r--arch/powerpc/sysdev/fsl_lbc.c1
-rw-r--r--arch/powerpc/sysdev/fsl_rio.c2
-rw-r--r--arch/powerpc/sysdev/mpic.c2
-rw-r--r--arch/powerpc/sysdev/ppc4xx_soc.c2
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe.c2
-rw-r--r--arch/powerpc/sysdev/xics/xics-common.c5
-rw-r--r--arch/s390/Kconfig1
-rw-r--r--arch/s390/crypto/crypt_s390.h7
-rw-r--r--arch/s390/include/asm/kvm_host.h3
-rw-r--r--arch/s390/include/asm/pgtable.h20
-rw-r--r--arch/s390/include/asm/setup.h3
-rw-r--r--arch/s390/include/asm/timex.h2
-rw-r--r--arch/s390/include/asm/unistd.h4
-rw-r--r--arch/s390/kernel/compat_wrapper.S20
-rw-r--r--arch/s390/kernel/early.c2
-rw-r--r--arch/s390/kernel/ptrace.c30
-rw-r--r--arch/s390/kernel/setup.c6
-rw-r--r--arch/s390/kernel/signal.c8
-rw-r--r--arch/s390/kernel/syscalls.S2
-rw-r--r--arch/s390/kernel/topology.c45
-rw-r--r--arch/s390/kernel/vmlinux.lds.S2
-rw-r--r--arch/s390/kvm/diag.c2
-rw-r--r--arch/s390/kvm/intercept.c3
-rw-r--r--arch/s390/kvm/interrupt.c1
-rw-r--r--arch/s390/kvm/kvm-s390.c12
-rw-r--r--arch/s390/kvm/priv.c10
-rw-r--r--arch/s390/kvm/sigp.c45
-rw-r--r--arch/s390/mm/fault.c9
-rw-r--r--arch/s390/oprofile/init.c2
-rw-r--r--arch/sh/boards/board-sh7757lcr.c16
-rw-r--r--arch/sh/include/asm/page.h5
-rw-r--r--arch/sh/include/asm/unistd_32.h4
-rw-r--r--arch/sh/include/asm/unistd_64.h4
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7203.c16
-rw-r--r--arch/sh/kernel/syscalls_32.S2
-rw-r--r--arch/sh/kernel/syscalls_64.S2
-rw-r--r--arch/sparc/include/asm/pgtable_32.h20
-rw-r--r--arch/sparc/include/asm/pgtable_64.h20
-rw-r--r--arch/sparc/include/asm/unistd.h4
-rw-r--r--arch/sparc/kernel/ds.c6
-rw-r--r--arch/sparc/kernel/entry.h7
-rw-r--r--arch/sparc/kernel/module.c27
-rw-r--r--arch/sparc/kernel/pci_sun4v.c4
-rw-r--r--arch/sparc/kernel/prom_common.c4
-rw-r--r--arch/sparc/kernel/setup_64.c48
-rw-r--r--arch/sparc/kernel/signal32.c18
-rw-r--r--arch/sparc/kernel/signal_32.c30
-rw-r--r--arch/sparc/kernel/signal_64.c42
-rw-r--r--arch/sparc/kernel/sigutil_64.c1
-rw-r--r--arch/sparc/kernel/systbls_32.S2
-rw-r--r--arch/sparc/kernel/systbls_64.S4
-rw-r--r--arch/sparc/mm/Makefile1
-rw-r--r--arch/sparc/mm/btfixup.c3
-rw-r--r--arch/sparc/mm/generic_32.c99
-rw-r--r--arch/sparc/mm/generic_64.c165
-rw-r--r--arch/tile/include/asm/irq.h10
-rw-r--r--arch/tile/kernel/irq.c16
-rw-r--r--arch/tile/kernel/pci-dma.c1
-rw-r--r--arch/tile/kernel/pci.c1
-rw-r--r--arch/tile/kernel/sysfs.c1
-rw-r--r--arch/tile/lib/exports.c3
-rw-r--r--arch/tile/mm/homecache.c9
-rw-r--r--arch/unicore32/Kconfig4
-rw-r--r--arch/unicore32/Kconfig.debug14
-rw-r--r--arch/unicore32/boot/compressed/Makefile4
-rw-r--r--arch/unicore32/include/asm/bitops.h12
-rw-r--r--arch/unicore32/include/asm/processor.h1
-rw-r--r--arch/unicore32/kernel/ksyms.c4
-rw-r--r--arch/unicore32/lib/findbit.S14
-rw-r--r--arch/x86/Kconfig8
-rw-r--r--arch/x86/include/asm/apic.h1
-rw-r--r--arch/x86/include/asm/intel_scu_ipc.h14
-rw-r--r--arch/x86/include/asm/mach_traps.h2
-rw-r--r--arch/x86/include/asm/mce.h5
-rw-r--r--arch/x86/include/asm/mrst.h16
-rw-r--r--arch/x86/include/asm/msr.h9
-rw-r--r--arch/x86/include/asm/system.h1
-rw-r--r--arch/x86/include/asm/timer.h23
-rw-r--r--arch/x86/include/asm/uv/uv_mmrs.h1
-rw-r--r--arch/x86/include/asm/x86_init.h3
-rw-r--r--arch/x86/kernel/alternative.c2
-rw-r--r--arch/x86/kernel/apic/apic.c33
-rw-r--r--arch/x86/kernel/apic/io_apic.c9
-rw-r--r--arch/x86/kernel/apic/x2apic_uv_x.c2
-rw-r--r--arch/x86/kernel/cpu/amd.c8
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce-inject.c2
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce.c25
-rw-r--r--arch/x86/kernel/cpu/mtrr/generic.c2
-rw-r--r--arch/x86/kernel/cpu/perf_event.c16
-rw-r--r--arch/x86/kernel/cpu/perf_event_amd_ibs.c29
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel.c8
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel_ds.c6
-rw-r--r--arch/x86/kernel/cpu/perf_event_p4.c2
-rw-r--r--arch/x86/kernel/dumpstack_32.c8
-rw-r--r--arch/x86/kernel/dumpstack_64.c8
-rw-r--r--arch/x86/kernel/hpet.c21
-rw-r--r--arch/x86/kernel/irq_64.c3
-rw-r--r--arch/x86/kernel/kvmclock.c5
-rw-r--r--arch/x86/kernel/microcode_core.c28
-rw-r--r--arch/x86/kernel/mpparse.c2
-rw-r--r--arch/x86/kernel/nmi.c3
-rw-r--r--arch/x86/kernel/process.c8
-rw-r--r--arch/x86/kernel/quirks.c13
-rw-r--r--arch/x86/kernel/reboot.c21
-rw-r--r--arch/x86/kernel/rtc.c5
-rw-r--r--arch/x86/kernel/setup.c2
-rw-r--r--arch/x86/kernel/x86_init.c4
-rw-r--r--arch/x86/kvm/vmx.c131
-rw-r--r--arch/x86/mm/gup.c2
-rw-r--r--arch/x86/mm/highmem_32.c2
-rw-r--r--arch/x86/net/bpf_jit_comp.c4
-rw-r--r--arch/x86/oprofile/init.c7
-rw-r--r--arch/x86/platform/ce4100/ce4100.c2
-rw-r--r--arch/x86/platform/efi/efi_32.c48
-rw-r--r--arch/x86/platform/mrst/mrst.c109
-rw-r--r--arch/x86/platform/mrst/vrtc.c4
-rw-r--r--arch/x86/um/asm/processor.h2
-rw-r--r--arch/x86/xen/enlighten.c3
-rw-r--r--arch/x86/xen/grant-table.c2
-rw-r--r--arch/x86/xen/setup.c20
480 files changed, 3840 insertions, 6087 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 44789eff983..849e3ad9370 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -220,8 +220,9 @@ config NEED_MACH_MEMORY_H
220 be avoided when possible. 220 be avoided when possible.
221 221
222config PHYS_OFFSET 222config PHYS_OFFSET
223 hex "Physical address of main memory" 223 hex "Physical address of main memory" if MMU
224 depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H 224 depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
225 default DRAM_BASE if !MMU
225 help 226 help
226 Please provide the physical address corresponding to the 227 Please provide the physical address corresponding to the
227 location of main memory in your system. 228 location of main memory in your system.
@@ -867,16 +868,6 @@ config ARCH_SHARK
867 Support for the StrongARM based Digital DNARD machine, also known 868 Support for the StrongARM based Digital DNARD machine, also known
868 as "Shark" (<http://www.shark-linux.de/shark.html>). 869 as "Shark" (<http://www.shark-linux.de/shark.html>).
869 870
870config ARCH_TCC_926
871 bool "Telechips TCC ARM926-based systems"
872 select CLKSRC_MMIO
873 select CPU_ARM926T
874 select HAVE_CLK
875 select CLKDEV_LOOKUP
876 select GENERIC_CLOCKEVENTS
877 help
878 Support for Telechips TCC ARM926-based systems.
879
880config ARCH_U300 871config ARCH_U300
881 bool "ST-Ericsson U300 Series" 872 bool "ST-Ericsson U300 Series"
882 depends on MMU 873 depends on MMU
@@ -1059,8 +1050,6 @@ source "arch/arm/plat-s5p/Kconfig"
1059 1050
1060source "arch/arm/plat-spear/Kconfig" 1051source "arch/arm/plat-spear/Kconfig"
1061 1052
1062source "arch/arm/plat-tcc/Kconfig"
1063
1064if ARCH_S3C2410 1053if ARCH_S3C2410
1065source "arch/arm/mach-s3c2410/Kconfig" 1054source "arch/arm/mach-s3c2410/Kconfig"
1066source "arch/arm/mach-s3c2412/Kconfig" 1055source "arch/arm/mach-s3c2412/Kconfig"
@@ -1231,7 +1220,7 @@ config ARM_ERRATA_742231
1231 capabilities of the processor. 1220 capabilities of the processor.
1232 1221
1233config PL310_ERRATA_588369 1222config PL310_ERRATA_588369
1234 bool "Clean & Invalidate maintenance operations do not invalidate clean lines" 1223 bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1235 depends on CACHE_L2X0 1224 depends on CACHE_L2X0
1236 help 1225 help
1237 The PL310 L2 cache controller implements three types of Clean & 1226 The PL310 L2 cache controller implements three types of Clean &
@@ -1256,7 +1245,7 @@ config ARM_ERRATA_720789
1256 entries regardless of the ASID. 1245 entries regardless of the ASID.
1257 1246
1258config PL310_ERRATA_727915 1247config PL310_ERRATA_727915
1259 bool "Background Clean & Invalidate by Way operation can cause data corruption" 1248 bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1260 depends on CACHE_L2X0 1249 depends on CACHE_L2X0
1261 help 1250 help
1262 PL310 implements the Clean & Invalidate by Way L2 cache maintenance 1251 PL310 implements the Clean & Invalidate by Way L2 cache maintenance
@@ -1289,8 +1278,8 @@ config ARM_ERRATA_751472
1289 operation is received by a CPU before the ICIALLUIS has completed, 1278 operation is received by a CPU before the ICIALLUIS has completed,
1290 potentially leading to corrupted entries in the cache or TLB. 1279 potentially leading to corrupted entries in the cache or TLB.
1291 1280
1292config ARM_ERRATA_753970 1281config PL310_ERRATA_753970
1293 bool "ARM errata: cache sync operation may be faulty" 1282 bool "PL310 errata: cache sync operation may be faulty"
1294 depends on CACHE_PL310 1283 depends on CACHE_PL310
1295 help 1284 help
1296 This option enables the workaround for the 753970 PL310 (r3p0) erratum. 1285 This option enables the workaround for the 753970 PL310 (r3p0) erratum.
@@ -1352,6 +1341,18 @@ config ARM_ERRATA_764369
1352 relevant cache maintenance functions and sets a specific bit 1341 relevant cache maintenance functions and sets a specific bit
1353 in the diagnostic control register of the SCU. 1342 in the diagnostic control register of the SCU.
1354 1343
1344config PL310_ERRATA_769419
1345 bool "PL310 errata: no automatic Store Buffer drain"
1346 depends on CACHE_L2X0
1347 help
1348 On revisions of the PL310 prior to r3p2, the Store Buffer does
1349 not automatically drain. This can cause normal, non-cacheable
1350 writes to be retained when the memory system is idle, leading
1351 to suboptimal I/O performance for drivers using coherent DMA.
1352 This option adds a write barrier to the cpu_idle loop so that,
1353 on systems with an outer cache, the store buffer is drained
1354 explicitly.
1355
1355endmenu 1356endmenu
1356 1357
1357source "arch/arm/common/Kconfig" 1358source "arch/arm/common/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index dfcf3b033e1..40319d91bb7 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -184,7 +184,6 @@ machine-$(CONFIG_ARCH_EXYNOS4) := exynos
184machine-$(CONFIG_ARCH_SA1100) := sa1100 184machine-$(CONFIG_ARCH_SA1100) := sa1100
185machine-$(CONFIG_ARCH_SHARK) := shark 185machine-$(CONFIG_ARCH_SHARK) := shark
186machine-$(CONFIG_ARCH_SHMOBILE) := shmobile 186machine-$(CONFIG_ARCH_SHMOBILE) := shmobile
187machine-$(CONFIG_ARCH_TCC8K) := tcc8k
188machine-$(CONFIG_ARCH_TEGRA) := tegra 187machine-$(CONFIG_ARCH_TEGRA) := tegra
189machine-$(CONFIG_ARCH_U300) := u300 188machine-$(CONFIG_ARCH_U300) := u300
190machine-$(CONFIG_ARCH_U8500) := ux500 189machine-$(CONFIG_ARCH_U8500) := ux500
@@ -204,7 +203,6 @@ machine-$(CONFIG_ARCH_ZYNQ) := zynq
204plat-$(CONFIG_ARCH_MXC) := mxc 203plat-$(CONFIG_ARCH_MXC) := mxc
205plat-$(CONFIG_ARCH_OMAP) := omap 204plat-$(CONFIG_ARCH_OMAP) := omap
206plat-$(CONFIG_ARCH_S3C64XX) := samsung 205plat-$(CONFIG_ARCH_S3C64XX) := samsung
207plat-$(CONFIG_ARCH_TCC_926) := tcc
208plat-$(CONFIG_ARCH_ZYNQ) := versatile 206plat-$(CONFIG_ARCH_ZYNQ) := versatile
209plat-$(CONFIG_PLAT_IOP) := iop 207plat-$(CONFIG_PLAT_IOP) := iop
210plat-$(CONFIG_PLAT_NOMADIK) := nomadik 208plat-$(CONFIG_PLAT_NOMADIK) := nomadik
diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile
index 176062ac7f0..5df26a9976a 100644
--- a/arch/arm/boot/Makefile
+++ b/arch/arm/boot/Makefile
@@ -65,6 +65,8 @@ $(obj)/%.dtb: $(src)/dts/%.dts
65 65
66$(obj)/dtbs: $(addprefix $(obj)/, $(dtb-y)) 66$(obj)/dtbs: $(addprefix $(obj)/, $(dtb-y))
67 67
68clean-files := *.dtb
69
68quiet_cmd_uimage = UIMAGE $@ 70quiet_cmd_uimage = UIMAGE $@
69 cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A arm -O linux -T kernel \ 71 cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A arm -O linux -T kernel \
70 -C none -a $(LOADADDR) -e $(STARTADDR) \ 72 -C none -a $(LOADADDR) -e $(STARTADDR) \
diff --git a/arch/arm/boot/dts/tegra-ventana.dts b/arch/arm/boot/dts/tegra-ventana.dts
index 9b29a623aaf..3f9abd6b696 100644
--- a/arch/arm/boot/dts/tegra-ventana.dts
+++ b/arch/arm/boot/dts/tegra-ventana.dts
@@ -22,11 +22,10 @@
22 sdhci@c8000400 { 22 sdhci@c8000400 {
23 cd-gpios = <&gpio 69 0>; /* gpio PI5 */ 23 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
24 wp-gpios = <&gpio 57 0>; /* gpio PH1 */ 24 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
25 power-gpios = <&gpio 155 0>; /* gpio PT3 */ 25 power-gpios = <&gpio 70 0>; /* gpio PI6 */
26 }; 26 };
27 27
28 sdhci@c8000600 { 28 sdhci@c8000600 {
29 power-gpios = <&gpio 70 0>; /* gpio PI6 */
30 support-8bit; 29 support-8bit;
31 }; 30 };
32}; 31};
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 0e6ae470c94..410a546060a 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -526,7 +526,8 @@ static void __init gic_pm_init(struct gic_chip_data *gic)
526 sizeof(u32)); 526 sizeof(u32));
527 BUG_ON(!gic->saved_ppi_conf); 527 BUG_ON(!gic->saved_ppi_conf);
528 528
529 cpu_pm_register_notifier(&gic_notifier_block); 529 if (gic == &gic_data[0])
530 cpu_pm_register_notifier(&gic_notifier_block);
530} 531}
531#else 532#else
532static void __init gic_pm_init(struct gic_chip_data *gic) 533static void __init gic_pm_init(struct gic_chip_data *gic)
@@ -581,13 +582,16 @@ void __init gic_init(unsigned int gic_nr, int irq_start,
581 * For primary GICs, skip over SGIs. 582 * For primary GICs, skip over SGIs.
582 * For secondary GICs, skip over PPIs, too. 583 * For secondary GICs, skip over PPIs, too.
583 */ 584 */
585 domain->hwirq_base = 32;
584 if (gic_nr == 0) { 586 if (gic_nr == 0) {
585 gic_cpu_base_addr = cpu_base; 587 gic_cpu_base_addr = cpu_base;
586 domain->hwirq_base = 16; 588
587 if (irq_start > 0) 589 if ((irq_start & 31) > 0) {
588 irq_start = (irq_start & ~31) + 16; 590 domain->hwirq_base = 16;
589 } else 591 if (irq_start != -1)
590 domain->hwirq_base = 32; 592 irq_start = (irq_start & ~31) + 16;
593 }
594 }
591 595
592 /* 596 /*
593 * Find out how many interrupts are supported. 597 * Find out how many interrupts are supported.
diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c
index 7129cfbdacd..f407a6b35d3 100644
--- a/arch/arm/common/pl330.c
+++ b/arch/arm/common/pl330.c
@@ -1211,8 +1211,8 @@ static inline u32 _prepare_ccr(const struct pl330_reqcfg *rqc)
1211 ccr |= (rqc->brst_size << CC_SRCBRSTSIZE_SHFT); 1211 ccr |= (rqc->brst_size << CC_SRCBRSTSIZE_SHFT);
1212 ccr |= (rqc->brst_size << CC_DSTBRSTSIZE_SHFT); 1212 ccr |= (rqc->brst_size << CC_DSTBRSTSIZE_SHFT);
1213 1213
1214 ccr |= (rqc->dcctl << CC_SRCCCTRL_SHFT); 1214 ccr |= (rqc->scctl << CC_SRCCCTRL_SHFT);
1215 ccr |= (rqc->scctl << CC_DSTCCTRL_SHFT); 1215 ccr |= (rqc->dcctl << CC_DSTCCTRL_SHFT);
1216 1216
1217 ccr |= (rqc->swap << CC_SWAP_SHFT); 1217 ccr |= (rqc->swap << CC_SWAP_SHFT);
1218 1218
@@ -1623,6 +1623,11 @@ static inline int _alloc_event(struct pl330_thread *thrd)
1623 return -1; 1623 return -1;
1624} 1624}
1625 1625
1626static bool _chan_ns(const struct pl330_info *pi, int i)
1627{
1628 return pi->pcfg.irq_ns & (1 << i);
1629}
1630
1626/* Upon success, returns IdentityToken for the 1631/* Upon success, returns IdentityToken for the
1627 * allocated channel, NULL otherwise. 1632 * allocated channel, NULL otherwise.
1628 */ 1633 */
@@ -1647,7 +1652,8 @@ void *pl330_request_channel(const struct pl330_info *pi)
1647 1652
1648 for (i = 0; i < chans; i++) { 1653 for (i = 0; i < chans; i++) {
1649 thrd = &pl330->channels[i]; 1654 thrd = &pl330->channels[i];
1650 if (thrd->free) { 1655 if ((thrd->free) && (!_manager_ns(thrd) ||
1656 _chan_ns(pi, i))) {
1651 thrd->ev = _alloc_event(thrd); 1657 thrd->ev = _alloc_event(thrd);
1652 if (thrd->ev >= 0) { 1658 if (thrd->ev >= 0) {
1653 thrd->free = false; 1659 thrd->free = false;
diff --git a/arch/arm/configs/at91cap9adk_defconfig b/arch/arm/configs/at91cap9_defconfig
index ffb1edd9336..8826eb218e7 100644
--- a/arch/arm/configs/at91cap9adk_defconfig
+++ b/arch/arm/configs/at91cap9_defconfig
@@ -38,7 +38,6 @@ CONFIG_IP_PNP_RARP=y
38# CONFIG_IPV6 is not set 38# CONFIG_IPV6 is not set
39CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 39CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
40CONFIG_MTD=y 40CONFIG_MTD=y
41CONFIG_MTD_PARTITIONS=y
42CONFIG_MTD_CMDLINE_PARTS=y 41CONFIG_MTD_CMDLINE_PARTS=y
43CONFIG_MTD_CHAR=y 42CONFIG_MTD_CHAR=y
44CONFIG_MTD_BLOCK=y 43CONFIG_MTD_BLOCK=y
@@ -52,16 +51,12 @@ CONFIG_MTD_NAND_ATMEL=y
52CONFIG_BLK_DEV_LOOP=y 51CONFIG_BLK_DEV_LOOP=y
53CONFIG_BLK_DEV_RAM=y 52CONFIG_BLK_DEV_RAM=y
54CONFIG_BLK_DEV_RAM_SIZE=8192 53CONFIG_BLK_DEV_RAM_SIZE=8192
55CONFIG_ATMEL_SSC=y
56CONFIG_SCSI=y 54CONFIG_SCSI=y
57CONFIG_BLK_DEV_SD=y 55CONFIG_BLK_DEV_SD=y
58CONFIG_SCSI_MULTI_LUN=y 56CONFIG_SCSI_MULTI_LUN=y
59CONFIG_NETDEVICES=y 57CONFIG_NETDEVICES=y
60CONFIG_NET_ETHERNET=y
61CONFIG_MII=y 58CONFIG_MII=y
62CONFIG_MACB=y 59CONFIG_MACB=y
63# CONFIG_NETDEV_1000 is not set
64# CONFIG_NETDEV_10000 is not set
65# CONFIG_INPUT_MOUSEDEV_PSAUX is not set 60# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
66CONFIG_INPUT_EVDEV=y 61CONFIG_INPUT_EVDEV=y
67# CONFIG_INPUT_KEYBOARD is not set 62# CONFIG_INPUT_KEYBOARD is not set
@@ -81,7 +76,6 @@ CONFIG_WATCHDOG=y
81CONFIG_WATCHDOG_NOWAYOUT=y 76CONFIG_WATCHDOG_NOWAYOUT=y
82CONFIG_FB=y 77CONFIG_FB=y
83CONFIG_FB_ATMEL=y 78CONFIG_FB_ATMEL=y
84# CONFIG_VGA_CONSOLE is not set
85CONFIG_LOGO=y 79CONFIG_LOGO=y
86# CONFIG_LOGO_LINUX_MONO is not set 80# CONFIG_LOGO_LINUX_MONO is not set
87# CONFIG_LOGO_LINUX_CLUT224 is not set 81# CONFIG_LOGO_LINUX_CLUT224 is not set
@@ -99,7 +93,6 @@ CONFIG_MMC_AT91=m
99CONFIG_RTC_CLASS=y 93CONFIG_RTC_CLASS=y
100CONFIG_RTC_DRV_AT91SAM9=y 94CONFIG_RTC_DRV_AT91SAM9=y
101CONFIG_EXT2_FS=y 95CONFIG_EXT2_FS=y
102CONFIG_INOTIFY=y
103CONFIG_VFAT_FS=y 96CONFIG_VFAT_FS=y
104CONFIG_TMPFS=y 97CONFIG_TMPFS=y
105CONFIG_JFFS2_FS=y 98CONFIG_JFFS2_FS=y
diff --git a/arch/arm/configs/at91rm9200_defconfig b/arch/arm/configs/at91rm9200_defconfig
index 38cb7c98542..bbe4e1a1f5d 100644
--- a/arch/arm/configs/at91rm9200_defconfig
+++ b/arch/arm/configs/at91rm9200_defconfig
@@ -5,7 +5,6 @@ CONFIG_SYSVIPC=y
5CONFIG_IKCONFIG=y 5CONFIG_IKCONFIG=y
6CONFIG_IKCONFIG_PROC=y 6CONFIG_IKCONFIG_PROC=y
7CONFIG_LOG_BUF_SHIFT=14 7CONFIG_LOG_BUF_SHIFT=14
8CONFIG_SYSFS_DEPRECATED_V2=y
9CONFIG_BLK_DEV_INITRD=y 8CONFIG_BLK_DEV_INITRD=y
10CONFIG_MODULES=y 9CONFIG_MODULES=y
11CONFIG_MODULE_FORCE_LOAD=y 10CONFIG_MODULE_FORCE_LOAD=y
@@ -56,7 +55,6 @@ CONFIG_IP_PNP=y
56CONFIG_IP_PNP_DHCP=y 55CONFIG_IP_PNP_DHCP=y
57CONFIG_IP_PNP_BOOTP=y 56CONFIG_IP_PNP_BOOTP=y
58CONFIG_NET_IPIP=m 57CONFIG_NET_IPIP=m
59CONFIG_NET_IPGRE=m
60CONFIG_INET_AH=m 58CONFIG_INET_AH=m
61CONFIG_INET_ESP=m 59CONFIG_INET_ESP=m
62CONFIG_INET_IPCOMP=m 60CONFIG_INET_IPCOMP=m
@@ -75,18 +73,8 @@ CONFIG_IPV6_TUNNEL=m
75CONFIG_BRIDGE=m 73CONFIG_BRIDGE=m
76CONFIG_VLAN_8021Q=m 74CONFIG_VLAN_8021Q=m
77CONFIG_BT=m 75CONFIG_BT=m
78CONFIG_BT_L2CAP=m
79CONFIG_BT_SCO=m
80CONFIG_BT_RFCOMM=m
81CONFIG_BT_RFCOMM_TTY=y
82CONFIG_BT_BNEP=m
83CONFIG_BT_BNEP_MC_FILTER=y
84CONFIG_BT_BNEP_PROTO_FILTER=y
85CONFIG_BT_HIDP=m
86CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 76CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
87CONFIG_MTD=y 77CONFIG_MTD=y
88CONFIG_MTD_CONCAT=y
89CONFIG_MTD_PARTITIONS=y
90CONFIG_MTD_CMDLINE_PARTS=y 78CONFIG_MTD_CMDLINE_PARTS=y
91CONFIG_MTD_AFS_PARTS=y 79CONFIG_MTD_AFS_PARTS=y
92CONFIG_MTD_CHAR=y 80CONFIG_MTD_CHAR=y
@@ -108,8 +96,6 @@ CONFIG_BLK_DEV_LOOP=y
108CONFIG_BLK_DEV_NBD=y 96CONFIG_BLK_DEV_NBD=y
109CONFIG_BLK_DEV_RAM=y 97CONFIG_BLK_DEV_RAM=y
110CONFIG_BLK_DEV_RAM_SIZE=8192 98CONFIG_BLK_DEV_RAM_SIZE=8192
111CONFIG_ATMEL_TCLIB=y
112CONFIG_EEPROM_LEGACY=m
113CONFIG_SCSI=y 99CONFIG_SCSI=y
114CONFIG_BLK_DEV_SD=y 100CONFIG_BLK_DEV_SD=y
115CONFIG_BLK_DEV_SR=m 101CONFIG_BLK_DEV_SR=m
@@ -119,14 +105,23 @@ CONFIG_SCSI_MULTI_LUN=y
119# CONFIG_SCSI_LOWLEVEL is not set 105# CONFIG_SCSI_LOWLEVEL is not set
120CONFIG_NETDEVICES=y 106CONFIG_NETDEVICES=y
121CONFIG_TUN=m 107CONFIG_TUN=m
108CONFIG_ARM_AT91_ETHER=y
122CONFIG_PHYLIB=y 109CONFIG_PHYLIB=y
123CONFIG_DAVICOM_PHY=y 110CONFIG_DAVICOM_PHY=y
124CONFIG_SMSC_PHY=y 111CONFIG_SMSC_PHY=y
125CONFIG_MICREL_PHY=y 112CONFIG_MICREL_PHY=y
126CONFIG_NET_ETHERNET=y 113CONFIG_PPP=y
127CONFIG_ARM_AT91_ETHER=y 114CONFIG_PPP_BSDCOMP=y
128# CONFIG_NETDEV_1000 is not set 115CONFIG_PPP_DEFLATE=y
129# CONFIG_NETDEV_10000 is not set 116CONFIG_PPP_FILTER=y
117CONFIG_PPP_MPPE=m
118CONFIG_PPP_MULTILINK=y
119CONFIG_PPPOE=m
120CONFIG_PPP_ASYNC=y
121CONFIG_SLIP=m
122CONFIG_SLIP_COMPRESSED=y
123CONFIG_SLIP_SMART=y
124CONFIG_SLIP_MODE_SLIP6=y
130CONFIG_USB_CATC=m 125CONFIG_USB_CATC=m
131CONFIG_USB_KAWETH=m 126CONFIG_USB_KAWETH=m
132CONFIG_USB_PEGASUS=m 127CONFIG_USB_PEGASUS=m
@@ -139,18 +134,6 @@ CONFIG_USB_NET_RNDIS_HOST=m
139CONFIG_USB_ALI_M5632=y 134CONFIG_USB_ALI_M5632=y
140CONFIG_USB_AN2720=y 135CONFIG_USB_AN2720=y
141CONFIG_USB_EPSON2888=y 136CONFIG_USB_EPSON2888=y
142CONFIG_PPP=y
143CONFIG_PPP_MULTILINK=y
144CONFIG_PPP_FILTER=y
145CONFIG_PPP_ASYNC=y
146CONFIG_PPP_DEFLATE=y
147CONFIG_PPP_BSDCOMP=y
148CONFIG_PPP_MPPE=m
149CONFIG_PPPOE=m
150CONFIG_SLIP=m
151CONFIG_SLIP_COMPRESSED=y
152CONFIG_SLIP_SMART=y
153CONFIG_SLIP_MODE_SLIP6=y
154# CONFIG_INPUT_MOUSEDEV_PSAUX is not set 137# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
155CONFIG_INPUT_MOUSEDEV_SCREEN_X=640 138CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
156CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480 139CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480
@@ -158,9 +141,9 @@ CONFIG_INPUT_EVDEV=y
158CONFIG_KEYBOARD_GPIO=y 141CONFIG_KEYBOARD_GPIO=y
159# CONFIG_INPUT_MOUSE is not set 142# CONFIG_INPUT_MOUSE is not set
160CONFIG_INPUT_TOUCHSCREEN=y 143CONFIG_INPUT_TOUCHSCREEN=y
144CONFIG_LEGACY_PTY_COUNT=32
161CONFIG_SERIAL_ATMEL=y 145CONFIG_SERIAL_ATMEL=y
162CONFIG_SERIAL_ATMEL_CONSOLE=y 146CONFIG_SERIAL_ATMEL_CONSOLE=y
163CONFIG_LEGACY_PTY_COUNT=32
164CONFIG_HW_RANDOM=y 147CONFIG_HW_RANDOM=y
165CONFIG_I2C=y 148CONFIG_I2C=y
166CONFIG_I2C_CHARDEV=y 149CONFIG_I2C_CHARDEV=y
@@ -290,7 +273,6 @@ CONFIG_NFS_V3_ACL=y
290CONFIG_NFS_V4=y 273CONFIG_NFS_V4=y
291CONFIG_ROOT_NFS=y 274CONFIG_ROOT_NFS=y
292CONFIG_NFSD=y 275CONFIG_NFSD=y
293CONFIG_SMB_FS=m
294CONFIG_CIFS=m 276CONFIG_CIFS=m
295CONFIG_PARTITION_ADVANCED=y 277CONFIG_PARTITION_ADVANCED=y
296CONFIG_MAC_PARTITION=y 278CONFIG_MAC_PARTITION=y
@@ -335,7 +317,6 @@ CONFIG_NLS_UTF8=y
335CONFIG_MAGIC_SYSRQ=y 317CONFIG_MAGIC_SYSRQ=y
336CONFIG_DEBUG_FS=y 318CONFIG_DEBUG_FS=y
337CONFIG_DEBUG_KERNEL=y 319CONFIG_DEBUG_KERNEL=y
338# CONFIG_RCU_CPU_STALL_DETECTOR is not set
339# CONFIG_FTRACE is not set 320# CONFIG_FTRACE is not set
340CONFIG_CRYPTO_PCBC=y 321CONFIG_CRYPTO_PCBC=y
341CONFIG_CRYPTO_SHA1=y 322CONFIG_CRYPTO_SHA1=y
diff --git a/arch/arm/configs/at91sam9260ek_defconfig b/arch/arm/configs/at91sam9260_defconfig
index f8a9226413b..505b3765f87 100644
--- a/arch/arm/configs/at91sam9260ek_defconfig
+++ b/arch/arm/configs/at91sam9260_defconfig
@@ -12,11 +12,23 @@ CONFIG_MODULE_UNLOAD=y
12# CONFIG_IOSCHED_CFQ is not set 12# CONFIG_IOSCHED_CFQ is not set
13CONFIG_ARCH_AT91=y 13CONFIG_ARCH_AT91=y
14CONFIG_ARCH_AT91SAM9260=y 14CONFIG_ARCH_AT91SAM9260=y
15CONFIG_ARCH_AT91SAM9260_SAM9XE=y
15CONFIG_MACH_AT91SAM9260EK=y 16CONFIG_MACH_AT91SAM9260EK=y
17CONFIG_MACH_CAM60=y
18CONFIG_MACH_SAM9_L9260=y
19CONFIG_MACH_AFEB9260=y
20CONFIG_MACH_USB_A9260=y
21CONFIG_MACH_QIL_A9260=y
22CONFIG_MACH_CPU9260=y
23CONFIG_MACH_FLEXIBITY=y
24CONFIG_MACH_SNAPPER_9260=y
25CONFIG_MACH_AT91SAM_DT=y
16CONFIG_AT91_PROGRAMMABLE_CLOCKS=y 26CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
17# CONFIG_ARM_THUMB is not set 27# CONFIG_ARM_THUMB is not set
18CONFIG_ZBOOT_ROM_TEXT=0x0 28CONFIG_ZBOOT_ROM_TEXT=0x0
19CONFIG_ZBOOT_ROM_BSS=0x0 29CONFIG_ZBOOT_ROM_BSS=0x0
30CONFIG_ARM_APPENDED_DTB=y
31CONFIG_ARM_ATAG_DTB_COMPAT=y
20CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw" 32CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
21CONFIG_FPE_NWFPE=y 33CONFIG_FPE_NWFPE=y
22CONFIG_NET=y 34CONFIG_NET=y
@@ -33,12 +45,10 @@ CONFIG_IP_PNP_BOOTP=y
33CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 45CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
34CONFIG_BLK_DEV_RAM=y 46CONFIG_BLK_DEV_RAM=y
35CONFIG_BLK_DEV_RAM_SIZE=8192 47CONFIG_BLK_DEV_RAM_SIZE=8192
36CONFIG_ATMEL_SSC=y
37CONFIG_SCSI=y 48CONFIG_SCSI=y
38CONFIG_BLK_DEV_SD=y 49CONFIG_BLK_DEV_SD=y
39CONFIG_SCSI_MULTI_LUN=y 50CONFIG_SCSI_MULTI_LUN=y
40CONFIG_NETDEVICES=y 51CONFIG_NETDEVICES=y
41CONFIG_NET_ETHERNET=y
42CONFIG_MII=y 52CONFIG_MII=y
43CONFIG_MACB=y 53CONFIG_MACB=y
44# CONFIG_INPUT_MOUSEDEV_PSAUX is not set 54# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
@@ -55,7 +65,6 @@ CONFIG_I2C_GPIO=y
55CONFIG_WATCHDOG=y 65CONFIG_WATCHDOG=y
56CONFIG_WATCHDOG_NOWAYOUT=y 66CONFIG_WATCHDOG_NOWAYOUT=y
57CONFIG_AT91SAM9X_WATCHDOG=y 67CONFIG_AT91SAM9X_WATCHDOG=y
58# CONFIG_VGA_CONSOLE is not set
59# CONFIG_USB_HID is not set 68# CONFIG_USB_HID is not set
60CONFIG_USB=y 69CONFIG_USB=y
61CONFIG_USB_DEVICEFS=y 70CONFIG_USB_DEVICEFS=y
@@ -71,7 +80,6 @@ CONFIG_USB_G_SERIAL=m
71CONFIG_RTC_CLASS=y 80CONFIG_RTC_CLASS=y
72CONFIG_RTC_DRV_AT91SAM9=y 81CONFIG_RTC_DRV_AT91SAM9=y
73CONFIG_EXT2_FS=y 82CONFIG_EXT2_FS=y
74CONFIG_INOTIFY=y
75CONFIG_VFAT_FS=y 83CONFIG_VFAT_FS=y
76CONFIG_TMPFS=y 84CONFIG_TMPFS=y
77CONFIG_CRAMFS=y 85CONFIG_CRAMFS=y
diff --git a/arch/arm/configs/at91sam9g20ek_defconfig b/arch/arm/configs/at91sam9g20_defconfig
index 9e90e6d7929..9123568d9a8 100644
--- a/arch/arm/configs/at91sam9g20ek_defconfig
+++ b/arch/arm/configs/at91sam9g20_defconfig
@@ -14,6 +14,15 @@ CONFIG_ARCH_AT91=y
14CONFIG_ARCH_AT91SAM9G20=y 14CONFIG_ARCH_AT91SAM9G20=y
15CONFIG_MACH_AT91SAM9G20EK=y 15CONFIG_MACH_AT91SAM9G20EK=y
16CONFIG_MACH_AT91SAM9G20EK_2MMC=y 16CONFIG_MACH_AT91SAM9G20EK_2MMC=y
17CONFIG_MACH_CPU9G20=y
18CONFIG_MACH_ACMENETUSFOXG20=y
19CONFIG_MACH_PORTUXG20=y
20CONFIG_MACH_STAMP9G20=y
21CONFIG_MACH_PCONTROL_G20=y
22CONFIG_MACH_GSIA18S=y
23CONFIG_MACH_USB_A9G20=y
24CONFIG_MACH_SNAPPER_9260=y
25CONFIG_MACH_AT91SAM_DT=y
17CONFIG_AT91_PROGRAMMABLE_CLOCKS=y 26CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
18# CONFIG_ARM_THUMB is not set 27# CONFIG_ARM_THUMB is not set
19CONFIG_AEABI=y 28CONFIG_AEABI=y
@@ -21,9 +30,10 @@ CONFIG_LEDS=y
21CONFIG_LEDS_CPU=y 30CONFIG_LEDS_CPU=y
22CONFIG_ZBOOT_ROM_TEXT=0x0 31CONFIG_ZBOOT_ROM_TEXT=0x0
23CONFIG_ZBOOT_ROM_BSS=0x0 32CONFIG_ZBOOT_ROM_BSS=0x0
33CONFIG_ARM_APPENDED_DTB=y
34CONFIG_ARM_ATAG_DTB_COMPAT=y
24CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw" 35CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
25CONFIG_FPE_NWFPE=y 36CONFIG_FPE_NWFPE=y
26CONFIG_PM=y
27CONFIG_NET=y 37CONFIG_NET=y
28CONFIG_PACKET=y 38CONFIG_PACKET=y
29CONFIG_UNIX=y 39CONFIG_UNIX=y
@@ -37,8 +47,6 @@ CONFIG_IP_PNP_BOOTP=y
37# CONFIG_IPV6 is not set 47# CONFIG_IPV6 is not set
38CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 48CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
39CONFIG_MTD=y 49CONFIG_MTD=y
40CONFIG_MTD_CONCAT=y
41CONFIG_MTD_PARTITIONS=y
42CONFIG_MTD_CMDLINE_PARTS=y 50CONFIG_MTD_CMDLINE_PARTS=y
43CONFIG_MTD_CHAR=y 51CONFIG_MTD_CHAR=y
44CONFIG_MTD_BLOCK=y 52CONFIG_MTD_BLOCK=y
@@ -48,17 +56,13 @@ CONFIG_MTD_NAND_ATMEL=y
48CONFIG_BLK_DEV_LOOP=y 56CONFIG_BLK_DEV_LOOP=y
49CONFIG_BLK_DEV_RAM=y 57CONFIG_BLK_DEV_RAM=y
50CONFIG_BLK_DEV_RAM_SIZE=8192 58CONFIG_BLK_DEV_RAM_SIZE=8192
51CONFIG_ATMEL_SSC=y
52CONFIG_SCSI=y 59CONFIG_SCSI=y
53CONFIG_BLK_DEV_SD=y 60CONFIG_BLK_DEV_SD=y
54CONFIG_SCSI_MULTI_LUN=y 61CONFIG_SCSI_MULTI_LUN=y
55# CONFIG_SCSI_LOWLEVEL is not set 62# CONFIG_SCSI_LOWLEVEL is not set
56CONFIG_NETDEVICES=y 63CONFIG_NETDEVICES=y
57CONFIG_NET_ETHERNET=y
58CONFIG_MII=y 64CONFIG_MII=y
59CONFIG_MACB=y 65CONFIG_MACB=y
60# CONFIG_NETDEV_1000 is not set
61# CONFIG_NETDEV_10000 is not set
62# CONFIG_INPUT_MOUSEDEV_PSAUX is not set 66# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
63CONFIG_INPUT_MOUSEDEV_SCREEN_X=320 67CONFIG_INPUT_MOUSEDEV_SCREEN_X=320
64CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240 68CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240
@@ -66,15 +70,14 @@ CONFIG_INPUT_EVDEV=y
66# CONFIG_KEYBOARD_ATKBD is not set 70# CONFIG_KEYBOARD_ATKBD is not set
67CONFIG_KEYBOARD_GPIO=y 71CONFIG_KEYBOARD_GPIO=y
68# CONFIG_INPUT_MOUSE is not set 72# CONFIG_INPUT_MOUSE is not set
73CONFIG_LEGACY_PTY_COUNT=16
69CONFIG_SERIAL_ATMEL=y 74CONFIG_SERIAL_ATMEL=y
70CONFIG_SERIAL_ATMEL_CONSOLE=y 75CONFIG_SERIAL_ATMEL_CONSOLE=y
71CONFIG_LEGACY_PTY_COUNT=16
72CONFIG_HW_RANDOM=y 76CONFIG_HW_RANDOM=y
73CONFIG_SPI=y 77CONFIG_SPI=y
74CONFIG_SPI_ATMEL=y 78CONFIG_SPI_ATMEL=y
75CONFIG_SPI_SPIDEV=y 79CONFIG_SPI_SPIDEV=y
76# CONFIG_HWMON is not set 80# CONFIG_HWMON is not set
77# CONFIG_VGA_CONSOLE is not set
78CONFIG_SOUND=y 81CONFIG_SOUND=y
79CONFIG_SND=y 82CONFIG_SND=y
80CONFIG_SND_SEQUENCER=y 83CONFIG_SND_SEQUENCER=y
@@ -82,7 +85,6 @@ CONFIG_SND_MIXER_OSS=y
82CONFIG_SND_PCM_OSS=y 85CONFIG_SND_PCM_OSS=y
83CONFIG_SND_SEQUENCER_OSS=y 86CONFIG_SND_SEQUENCER_OSS=y
84# CONFIG_SND_VERBOSE_PROCFS is not set 87# CONFIG_SND_VERBOSE_PROCFS is not set
85CONFIG_SND_AT73C213=y
86CONFIG_USB=y 88CONFIG_USB=y
87CONFIG_USB_DEVICEFS=y 89CONFIG_USB_DEVICEFS=y
88# CONFIG_USB_DEVICE_CLASS is not set 90# CONFIG_USB_DEVICE_CLASS is not set
@@ -105,7 +107,6 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
105CONFIG_RTC_CLASS=y 107CONFIG_RTC_CLASS=y
106CONFIG_RTC_DRV_AT91SAM9=y 108CONFIG_RTC_DRV_AT91SAM9=y
107CONFIG_EXT2_FS=y 109CONFIG_EXT2_FS=y
108CONFIG_INOTIFY=y
109CONFIG_MSDOS_FS=y 110CONFIG_MSDOS_FS=y
110CONFIG_VFAT_FS=y 111CONFIG_VFAT_FS=y
111CONFIG_TMPFS=y 112CONFIG_TMPFS=y
diff --git a/arch/arm/configs/at91sam9g45_defconfig b/arch/arm/configs/at91sam9g45_defconfig
index c5876d244f4..606d48f3b8f 100644
--- a/arch/arm/configs/at91sam9g45_defconfig
+++ b/arch/arm/configs/at91sam9g45_defconfig
@@ -18,6 +18,7 @@ CONFIG_MODULE_UNLOAD=y
18CONFIG_ARCH_AT91=y 18CONFIG_ARCH_AT91=y
19CONFIG_ARCH_AT91SAM9G45=y 19CONFIG_ARCH_AT91SAM9G45=y
20CONFIG_MACH_AT91SAM9M10G45EK=y 20CONFIG_MACH_AT91SAM9M10G45EK=y
21CONFIG_MACH_AT91SAM_DT=y
21CONFIG_AT91_PROGRAMMABLE_CLOCKS=y 22CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
22CONFIG_AT91_SLOW_CLOCK=y 23CONFIG_AT91_SLOW_CLOCK=y
23CONFIG_AEABI=y 24CONFIG_AEABI=y
@@ -73,11 +74,8 @@ CONFIG_SCSI_MULTI_LUN=y
73# CONFIG_SCSI_LOWLEVEL is not set 74# CONFIG_SCSI_LOWLEVEL is not set
74CONFIG_NETDEVICES=y 75CONFIG_NETDEVICES=y
75CONFIG_MII=y 76CONFIG_MII=y
76CONFIG_DAVICOM_PHY=y
77CONFIG_NET_ETHERNET=y
78CONFIG_MACB=y 77CONFIG_MACB=y
79# CONFIG_NETDEV_1000 is not set 78CONFIG_DAVICOM_PHY=y
80# CONFIG_NETDEV_10000 is not set
81CONFIG_LIBERTAS_THINFIRM=m 79CONFIG_LIBERTAS_THINFIRM=m
82CONFIG_LIBERTAS_THINFIRM_USB=m 80CONFIG_LIBERTAS_THINFIRM_USB=m
83CONFIG_AT76C50X_USB=m 81CONFIG_AT76C50X_USB=m
@@ -131,7 +129,6 @@ CONFIG_I2C_GPIO=y
131CONFIG_SPI=y 129CONFIG_SPI=y
132CONFIG_SPI_ATMEL=y 130CONFIG_SPI_ATMEL=y
133# CONFIG_HWMON is not set 131# CONFIG_HWMON is not set
134# CONFIG_MFD_SUPPORT is not set
135CONFIG_FB=y 132CONFIG_FB=y
136CONFIG_FB_ATMEL=y 133CONFIG_FB_ATMEL=y
137CONFIG_FB_UDL=m 134CONFIG_FB_UDL=m
diff --git a/arch/arm/configs/at91sam9rlek_defconfig b/arch/arm/configs/at91sam9rl_defconfig
index 75621e4d03f..ad562ee6420 100644
--- a/arch/arm/configs/at91sam9rlek_defconfig
+++ b/arch/arm/configs/at91sam9rl_defconfig
@@ -23,8 +23,6 @@ CONFIG_NET=y
23CONFIG_UNIX=y 23CONFIG_UNIX=y
24CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 24CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
25CONFIG_MTD=y 25CONFIG_MTD=y
26CONFIG_MTD_CONCAT=y
27CONFIG_MTD_PARTITIONS=y
28CONFIG_MTD_CMDLINE_PARTS=y 26CONFIG_MTD_CMDLINE_PARTS=y
29CONFIG_MTD_CHAR=y 27CONFIG_MTD_CHAR=y
30CONFIG_MTD_BLOCK=y 28CONFIG_MTD_BLOCK=y
@@ -35,7 +33,6 @@ CONFIG_BLK_DEV_LOOP=y
35CONFIG_BLK_DEV_RAM=y 33CONFIG_BLK_DEV_RAM=y
36CONFIG_BLK_DEV_RAM_COUNT=4 34CONFIG_BLK_DEV_RAM_COUNT=4
37CONFIG_BLK_DEV_RAM_SIZE=24576 35CONFIG_BLK_DEV_RAM_SIZE=24576
38CONFIG_ATMEL_SSC=y
39CONFIG_SCSI=y 36CONFIG_SCSI=y
40CONFIG_BLK_DEV_SD=y 37CONFIG_BLK_DEV_SD=y
41CONFIG_SCSI_MULTI_LUN=y 38CONFIG_SCSI_MULTI_LUN=y
@@ -62,13 +59,11 @@ CONFIG_WATCHDOG_NOWAYOUT=y
62CONFIG_AT91SAM9X_WATCHDOG=y 59CONFIG_AT91SAM9X_WATCHDOG=y
63CONFIG_FB=y 60CONFIG_FB=y
64CONFIG_FB_ATMEL=y 61CONFIG_FB_ATMEL=y
65# CONFIG_VGA_CONSOLE is not set
66CONFIG_MMC=y 62CONFIG_MMC=y
67CONFIG_MMC_AT91=m 63CONFIG_MMC_AT91=m
68CONFIG_RTC_CLASS=y 64CONFIG_RTC_CLASS=y
69CONFIG_RTC_DRV_AT91SAM9=y 65CONFIG_RTC_DRV_AT91SAM9=y
70CONFIG_EXT2_FS=y 66CONFIG_EXT2_FS=y
71CONFIG_INOTIFY=y
72CONFIG_MSDOS_FS=y 67CONFIG_MSDOS_FS=y
73CONFIG_VFAT_FS=y 68CONFIG_VFAT_FS=y
74CONFIG_TMPFS=y 69CONFIG_TMPFS=y
diff --git a/arch/arm/configs/ezx_defconfig b/arch/arm/configs/ezx_defconfig
index 227a477346e..d95763d5f0d 100644
--- a/arch/arm/configs/ezx_defconfig
+++ b/arch/arm/configs/ezx_defconfig
@@ -287,7 +287,7 @@ CONFIG_USB=y
287# CONFIG_USB_DEVICE_CLASS is not set 287# CONFIG_USB_DEVICE_CLASS is not set
288CONFIG_USB_OHCI_HCD=y 288CONFIG_USB_OHCI_HCD=y
289CONFIG_USB_GADGET=y 289CONFIG_USB_GADGET=y
290CONFIG_USB_GADGET_PXA27X=y 290CONFIG_USB_PXA27X=y
291CONFIG_USB_ETH=m 291CONFIG_USB_ETH=m
292# CONFIG_USB_ETH_RNDIS is not set 292# CONFIG_USB_ETH_RNDIS is not set
293CONFIG_MMC=y 293CONFIG_MMC=y
diff --git a/arch/arm/configs/imote2_defconfig b/arch/arm/configs/imote2_defconfig
index 176ec22af03..fd996bb1302 100644
--- a/arch/arm/configs/imote2_defconfig
+++ b/arch/arm/configs/imote2_defconfig
@@ -263,7 +263,7 @@ CONFIG_USB=y
263# CONFIG_USB_DEVICE_CLASS is not set 263# CONFIG_USB_DEVICE_CLASS is not set
264CONFIG_USB_OHCI_HCD=y 264CONFIG_USB_OHCI_HCD=y
265CONFIG_USB_GADGET=y 265CONFIG_USB_GADGET=y
266CONFIG_USB_GADGET_PXA27X=y 266CONFIG_USB_PXA27X=y
267CONFIG_USB_ETH=m 267CONFIG_USB_ETH=m
268# CONFIG_USB_ETH_RNDIS is not set 268# CONFIG_USB_ETH_RNDIS is not set
269CONFIG_MMC=y 269CONFIG_MMC=y
diff --git a/arch/arm/configs/magician_defconfig b/arch/arm/configs/magician_defconfig
index a88e64d4e9a..443675d317e 100644
--- a/arch/arm/configs/magician_defconfig
+++ b/arch/arm/configs/magician_defconfig
@@ -132,7 +132,7 @@ CONFIG_USB_MON=m
132CONFIG_USB_OHCI_HCD=y 132CONFIG_USB_OHCI_HCD=y
133CONFIG_USB_GADGET=y 133CONFIG_USB_GADGET=y
134CONFIG_USB_GADGET_VBUS_DRAW=500 134CONFIG_USB_GADGET_VBUS_DRAW=500
135CONFIG_USB_GADGET_PXA27X=y 135CONFIG_USB_PXA27X=y
136CONFIG_USB_ETH=m 136CONFIG_USB_ETH=m
137# CONFIG_USB_ETH_RNDIS is not set 137# CONFIG_USB_ETH_RNDIS is not set
138CONFIG_USB_GADGETFS=m 138CONFIG_USB_GADGETFS=m
diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig
index 7b63462b349..945a34f2a34 100644
--- a/arch/arm/configs/omap1_defconfig
+++ b/arch/arm/configs/omap1_defconfig
@@ -48,13 +48,7 @@ CONFIG_MACH_SX1=y
48CONFIG_MACH_NOKIA770=y 48CONFIG_MACH_NOKIA770=y
49CONFIG_MACH_AMS_DELTA=y 49CONFIG_MACH_AMS_DELTA=y
50CONFIG_MACH_OMAP_GENERIC=y 50CONFIG_MACH_OMAP_GENERIC=y
51CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER=y
52CONFIG_OMAP_ARM_216MHZ=y
53CONFIG_OMAP_ARM_195MHZ=y
54CONFIG_OMAP_ARM_192MHZ=y
55CONFIG_OMAP_ARM_182MHZ=y 51CONFIG_OMAP_ARM_182MHZ=y
56CONFIG_OMAP_ARM_168MHZ=y
57# CONFIG_OMAP_ARM_60MHZ is not set
58# CONFIG_ARM_THUMB is not set 52# CONFIG_ARM_THUMB is not set
59CONFIG_PCCARD=y 53CONFIG_PCCARD=y
60CONFIG_OMAP_CF=y 54CONFIG_OMAP_CF=y
diff --git a/arch/arm/configs/u300_defconfig b/arch/arm/configs/u300_defconfig
index 4a5a12681be..374000ec4e4 100644
--- a/arch/arm/configs/u300_defconfig
+++ b/arch/arm/configs/u300_defconfig
@@ -14,8 +14,6 @@ CONFIG_MODULE_UNLOAD=y
14CONFIG_ARCH_U300=y 14CONFIG_ARCH_U300=y
15CONFIG_MACH_U300=y 15CONFIG_MACH_U300=y
16CONFIG_MACH_U300_BS335=y 16CONFIG_MACH_U300_BS335=y
17CONFIG_MACH_U300_DUAL_RAM=y
18CONFIG_U300_DEBUG=y
19CONFIG_MACH_U300_SPIDUMMY=y 17CONFIG_MACH_U300_SPIDUMMY=y
20CONFIG_NO_HZ=y 18CONFIG_NO_HZ=y
21CONFIG_HIGH_RES_TIMERS=y 19CONFIG_HIGH_RES_TIMERS=y
@@ -26,19 +24,21 @@ CONFIG_ZBOOT_ROM_BSS=0x0
26CONFIG_CMDLINE="root=/dev/ram0 rw rootfstype=rootfs console=ttyAMA0,115200n8 lpj=515072" 24CONFIG_CMDLINE="root=/dev/ram0 rw rootfstype=rootfs console=ttyAMA0,115200n8 lpj=515072"
27CONFIG_CPU_IDLE=y 25CONFIG_CPU_IDLE=y
28CONFIG_FPE_NWFPE=y 26CONFIG_FPE_NWFPE=y
29CONFIG_PM=y
30# CONFIG_SUSPEND is not set 27# CONFIG_SUSPEND is not set
31CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 28CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
32# CONFIG_PREVENT_FIRMWARE_BUILD is not set 29# CONFIG_PREVENT_FIRMWARE_BUILD is not set
33# CONFIG_MISC_DEVICES is not set 30CONFIG_MTD=y
31CONFIG_MTD_CMDLINE_PARTS=y
32CONFIG_MTD_NAND=y
33CONFIG_MTD_NAND_FSMC=y
34# CONFIG_INPUT_MOUSEDEV is not set 34# CONFIG_INPUT_MOUSEDEV is not set
35CONFIG_INPUT_EVDEV=y 35CONFIG_INPUT_EVDEV=y
36# CONFIG_KEYBOARD_ATKBD is not set 36# CONFIG_KEYBOARD_ATKBD is not set
37# CONFIG_INPUT_MOUSE is not set 37# CONFIG_INPUT_MOUSE is not set
38# CONFIG_SERIO is not set 38# CONFIG_SERIO is not set
39CONFIG_LEGACY_PTY_COUNT=16
39CONFIG_SERIAL_AMBA_PL011=y 40CONFIG_SERIAL_AMBA_PL011=y
40CONFIG_SERIAL_AMBA_PL011_CONSOLE=y 41CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
41CONFIG_LEGACY_PTY_COUNT=16
42# CONFIG_HW_RANDOM is not set 42# CONFIG_HW_RANDOM is not set
43CONFIG_I2C=y 43CONFIG_I2C=y
44# CONFIG_HWMON is not set 44# CONFIG_HWMON is not set
@@ -51,6 +51,7 @@ CONFIG_BACKLIGHT_CLASS_DEVICE=y
51# CONFIG_HID_SUPPORT is not set 51# CONFIG_HID_SUPPORT is not set
52# CONFIG_USB_SUPPORT is not set 52# CONFIG_USB_SUPPORT is not set
53CONFIG_MMC=y 53CONFIG_MMC=y
54CONFIG_MMC_CLKGATE=y
54CONFIG_MMC_ARMMMCI=y 55CONFIG_MMC_ARMMMCI=y
55CONFIG_RTC_CLASS=y 56CONFIG_RTC_CLASS=y
56# CONFIG_RTC_HCTOSYS is not set 57# CONFIG_RTC_HCTOSYS is not set
@@ -65,10 +66,8 @@ CONFIG_NLS_CODEPAGE_437=y
65CONFIG_NLS_ISO8859_1=y 66CONFIG_NLS_ISO8859_1=y
66CONFIG_PRINTK_TIME=y 67CONFIG_PRINTK_TIME=y
67CONFIG_DEBUG_FS=y 68CONFIG_DEBUG_FS=y
68CONFIG_DEBUG_KERNEL=y
69# CONFIG_SCHED_DEBUG is not set 69# CONFIG_SCHED_DEBUG is not set
70CONFIG_TIMER_STATS=y 70CONFIG_TIMER_STATS=y
71# CONFIG_DEBUG_PREEMPT is not set 71# CONFIG_DEBUG_PREEMPT is not set
72CONFIG_DEBUG_INFO=y 72CONFIG_DEBUG_INFO=y
73# CONFIG_RCU_CPU_STALL_DETECTOR is not set
74# CONFIG_CRC32 is not set 73# CONFIG_CRC32 is not set
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index 97d31a4663d..2d7b6e7b727 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -10,7 +10,7 @@ CONFIG_MODULE_UNLOAD=y
10CONFIG_ARCH_U8500=y 10CONFIG_ARCH_U8500=y
11CONFIG_UX500_SOC_DB5500=y 11CONFIG_UX500_SOC_DB5500=y
12CONFIG_UX500_SOC_DB8500=y 12CONFIG_UX500_SOC_DB8500=y
13CONFIG_MACH_U8500=y 13CONFIG_MACH_HREFV60=y
14CONFIG_MACH_SNOWBALL=y 14CONFIG_MACH_SNOWBALL=y
15CONFIG_MACH_U5500=y 15CONFIG_MACH_U5500=y
16CONFIG_NO_HZ=y 16CONFIG_NO_HZ=y
@@ -24,6 +24,7 @@ CONFIG_CPU_FREQ=y
24CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y 24CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
25CONFIG_VFP=y 25CONFIG_VFP=y
26CONFIG_NEON=y 26CONFIG_NEON=y
27CONFIG_PM_RUNTIME=y
27CONFIG_NET=y 28CONFIG_NET=y
28CONFIG_PACKET=y 29CONFIG_PACKET=y
29CONFIG_UNIX=y 30CONFIG_UNIX=y
@@ -41,11 +42,8 @@ CONFIG_MISC_DEVICES=y
41CONFIG_AB8500_PWM=y 42CONFIG_AB8500_PWM=y
42CONFIG_SENSORS_BH1780=y 43CONFIG_SENSORS_BH1780=y
43CONFIG_NETDEVICES=y 44CONFIG_NETDEVICES=y
44CONFIG_SMSC_PHY=y
45CONFIG_NET_ETHERNET=y
46CONFIG_SMSC911X=y 45CONFIG_SMSC911X=y
47# CONFIG_NETDEV_1000 is not set 46CONFIG_SMSC_PHY=y
48# CONFIG_NETDEV_10000 is not set
49# CONFIG_WLAN is not set 47# CONFIG_WLAN is not set
50# CONFIG_INPUT_MOUSEDEV_PSAUX is not set 48# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
51CONFIG_INPUT_EVDEV=y 49CONFIG_INPUT_EVDEV=y
@@ -72,15 +70,12 @@ CONFIG_SPI=y
72CONFIG_SPI_PL022=y 70CONFIG_SPI_PL022=y
73CONFIG_GPIO_STMPE=y 71CONFIG_GPIO_STMPE=y
74CONFIG_GPIO_TC3589X=y 72CONFIG_GPIO_TC3589X=y
75# CONFIG_HWMON is not set
76CONFIG_MFD_STMPE=y 73CONFIG_MFD_STMPE=y
77CONFIG_MFD_TC3589X=y 74CONFIG_MFD_TC3589X=y
75CONFIG_AB5500_CORE=y
78CONFIG_AB8500_CORE=y 76CONFIG_AB8500_CORE=y
79CONFIG_REGULATOR_AB8500=y 77CONFIG_REGULATOR_AB8500=y
80# CONFIG_HID_SUPPORT is not set 78# CONFIG_HID_SUPPORT is not set
81CONFIG_USB_MUSB_HDRC=y
82CONFIG_USB_GADGET_MUSB_HDRC=y
83CONFIG_MUSB_PIO_ONLY=y
84CONFIG_USB_GADGET=y 79CONFIG_USB_GADGET=y
85CONFIG_AB8500_USB=y 80CONFIG_AB8500_USB=y
86CONFIG_MMC=y 81CONFIG_MMC=y
@@ -97,6 +92,7 @@ CONFIG_DMADEVICES=y
97CONFIG_STE_DMA40=y 92CONFIG_STE_DMA40=y
98CONFIG_STAGING=y 93CONFIG_STAGING=y
99CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y 94CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y
95CONFIG_HSEM_U8500=y
100CONFIG_EXT2_FS=y 96CONFIG_EXT2_FS=y
101CONFIG_EXT2_FS_XATTR=y 97CONFIG_EXT2_FS_XATTR=y
102CONFIG_EXT2_FS_POSIX_ACL=y 98CONFIG_EXT2_FS_POSIX_ACL=y
diff --git a/arch/arm/configs/zeus_defconfig b/arch/arm/configs/zeus_defconfig
index 59577ad3f4e..547a3c1e59d 100644
--- a/arch/arm/configs/zeus_defconfig
+++ b/arch/arm/configs/zeus_defconfig
@@ -140,7 +140,7 @@ CONFIG_USB_SERIAL=m
140CONFIG_USB_SERIAL_GENERIC=y 140CONFIG_USB_SERIAL_GENERIC=y
141CONFIG_USB_SERIAL_MCT_U232=m 141CONFIG_USB_SERIAL_MCT_U232=m
142CONFIG_USB_GADGET=m 142CONFIG_USB_GADGET=m
143CONFIG_USB_GADGET_PXA27X=y 143CONFIG_USB_PXA27X=y
144CONFIG_USB_ETH=m 144CONFIG_USB_ETH=m
145CONFIG_USB_GADGETFS=m 145CONFIG_USB_GADGETFS=m
146CONFIG_USB_FILE_STORAGE=m 146CONFIG_USB_FILE_STORAGE=m
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h
index 1db1143a948..7df239bcdf2 100644
--- a/arch/arm/include/asm/hardware/cache-l2x0.h
+++ b/arch/arm/include/asm/hardware/cache-l2x0.h
@@ -20,6 +20,8 @@
20#ifndef __ASM_ARM_HARDWARE_L2X0_H 20#ifndef __ASM_ARM_HARDWARE_L2X0_H
21#define __ASM_ARM_HARDWARE_L2X0_H 21#define __ASM_ARM_HARDWARE_L2X0_H
22 22
23#include <linux/errno.h>
24
23#define L2X0_CACHE_ID 0x000 25#define L2X0_CACHE_ID 0x000
24#define L2X0_CACHE_TYPE 0x004 26#define L2X0_CACHE_TYPE 0x004
25#define L2X0_CTRL 0x100 27#define L2X0_CTRL 0x100
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index 7d19425dd49..2b0efc3104a 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -13,6 +13,7 @@
13struct tag; 13struct tag;
14struct meminfo; 14struct meminfo;
15struct sys_timer; 15struct sys_timer;
16struct pt_regs;
16 17
17struct machine_desc { 18struct machine_desc {
18 unsigned int nr; /* architecture number */ 19 unsigned int nr; /* architecture number */
diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h
index 71d99b83cdb..0bda22c094a 100644
--- a/arch/arm/include/asm/pmu.h
+++ b/arch/arm/include/asm/pmu.h
@@ -55,16 +55,6 @@ reserve_pmu(enum arm_pmu_type type);
55extern void 55extern void
56release_pmu(enum arm_pmu_type type); 56release_pmu(enum arm_pmu_type type);
57 57
58/**
59 * init_pmu() - Initialise the PMU.
60 *
61 * Initialise the system ready for PMU enabling. This should typically set the
62 * IRQ affinity and nothing else. The users (oprofile/perf events etc) will do
63 * the actual hardware initialisation.
64 */
65extern int
66init_pmu(enum arm_pmu_type type);
67
68#else /* CONFIG_CPU_HAS_PMU */ 58#else /* CONFIG_CPU_HAS_PMU */
69 59
70#include <linux/err.h> 60#include <linux/err.h>
diff --git a/arch/arm/include/asm/topology.h b/arch/arm/include/asm/topology.h
index a7e457ed27c..58b8b84adcd 100644
--- a/arch/arm/include/asm/topology.h
+++ b/arch/arm/include/asm/topology.h
@@ -25,7 +25,7 @@ extern struct cputopo_arm cpu_topology[NR_CPUS];
25 25
26void init_cpu_topology(void); 26void init_cpu_topology(void);
27void store_cpu_topology(unsigned int cpuid); 27void store_cpu_topology(unsigned int cpuid);
28const struct cpumask *cpu_coregroup_mask(unsigned int cpu); 28const struct cpumask *cpu_coregroup_mask(int cpu);
29 29
30#else 30#else
31 31
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index c60a2944f95..4a112378380 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -402,6 +402,8 @@
402#define __NR_syncfs (__NR_SYSCALL_BASE+373) 402#define __NR_syncfs (__NR_SYSCALL_BASE+373)
403#define __NR_sendmmsg (__NR_SYSCALL_BASE+374) 403#define __NR_sendmmsg (__NR_SYSCALL_BASE+374)
404#define __NR_setns (__NR_SYSCALL_BASE+375) 404#define __NR_setns (__NR_SYSCALL_BASE+375)
405#define __NR_process_vm_readv (__NR_SYSCALL_BASE+376)
406#define __NR_process_vm_writev (__NR_SYSCALL_BASE+377)
405 407
406/* 408/*
407 * The following SWIs are ARM private. 409 * The following SWIs are ARM private.
diff --git a/arch/arm/include/asm/unwind.h b/arch/arm/include/asm/unwind.h
index a5edf421005..d1c3f3a71c9 100644
--- a/arch/arm/include/asm/unwind.h
+++ b/arch/arm/include/asm/unwind.h
@@ -30,14 +30,15 @@ enum unwind_reason_code {
30}; 30};
31 31
32struct unwind_idx { 32struct unwind_idx {
33 unsigned long addr; 33 unsigned long addr_offset;
34 unsigned long insn; 34 unsigned long insn;
35}; 35};
36 36
37struct unwind_table { 37struct unwind_table {
38 struct list_head list; 38 struct list_head list;
39 struct unwind_idx *start; 39 const struct unwind_idx *start;
40 struct unwind_idx *stop; 40 const struct unwind_idx *origin;
41 const struct unwind_idx *stop;
41 unsigned long begin_addr; 42 unsigned long begin_addr;
42 unsigned long end_addr; 43 unsigned long end_addr;
43}; 44};
@@ -49,15 +50,6 @@ extern struct unwind_table *unwind_table_add(unsigned long start,
49extern void unwind_table_del(struct unwind_table *tab); 50extern void unwind_table_del(struct unwind_table *tab);
50extern void unwind_backtrace(struct pt_regs *regs, struct task_struct *tsk); 51extern void unwind_backtrace(struct pt_regs *regs, struct task_struct *tsk);
51 52
52#ifdef CONFIG_ARM_UNWIND
53extern int __init unwind_init(void);
54#else
55static inline int __init unwind_init(void)
56{
57 return 0;
58}
59#endif
60
61#endif /* !__ASSEMBLY__ */ 53#endif /* !__ASSEMBLY__ */
62 54
63#ifdef CONFIG_ARM_UNWIND 55#ifdef CONFIG_ARM_UNWIND
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 9943e9e74a1..463ff4a0ec8 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -385,6 +385,8 @@
385 CALL(sys_syncfs) 385 CALL(sys_syncfs)
386 CALL(sys_sendmmsg) 386 CALL(sys_sendmmsg)
387/* 375 */ CALL(sys_setns) 387/* 375 */ CALL(sys_setns)
388 CALL(sys_process_vm_readv)
389 CALL(sys_process_vm_writev)
388#ifndef syscalls_counted 390#ifndef syscalls_counted
389.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls 391.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
390#define syscalls_counted 392#define syscalls_counted
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 9ad50c4208a..b145f16c91b 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -497,7 +497,7 @@ ENDPROC(__und_usr)
497 .popsection 497 .popsection
498 .pushsection __ex_table,"a" 498 .pushsection __ex_table,"a"
499 .long 1b, 4b 499 .long 1b, 4b
500#if __LINUX_ARM_ARCH__ >= 7 500#if CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7
501 .long 2b, 4b 501 .long 2b, 4b
502 .long 3b, 4b 502 .long 3b, 4b
503#endif 503#endif
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 566c54c2a1f..08c82fd844a 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -360,7 +360,7 @@ __secondary_data:
360 * r13 = *virtual* address to jump to upon completion 360 * r13 = *virtual* address to jump to upon completion
361 */ 361 */
362__enable_mmu: 362__enable_mmu:
363#ifdef CONFIG_ALIGNMENT_TRAP 363#if defined(CONFIG_ALIGNMENT_TRAP) && __LINUX_ARM_ARCH__ < 6
364 orr r0, r0, #CR_A 364 orr r0, r0, #CR_A
365#else 365#else
366 bic r0, r0, #CR_A 366 bic r0, r0, #CR_A
diff --git a/arch/arm/kernel/kprobes-arm.c b/arch/arm/kernel/kprobes-arm.c
index 9fe8910308a..8a30c89da70 100644
--- a/arch/arm/kernel/kprobes-arm.c
+++ b/arch/arm/kernel/kprobes-arm.c
@@ -519,10 +519,12 @@ static const union decode_item arm_cccc_0000_____1001_table[] = {
519static const union decode_item arm_cccc_0001_____1001_table[] = { 519static const union decode_item arm_cccc_0001_____1001_table[] = {
520 /* Synchronization primitives */ 520 /* Synchronization primitives */
521 521
522#if __LINUX_ARM_ARCH__ < 6
523 /* Deprecated on ARMv6 and may be UNDEFINED on v7 */
522 /* SMP/SWPB cccc 0001 0x00 xxxx xxxx xxxx 1001 xxxx */ 524 /* SMP/SWPB cccc 0001 0x00 xxxx xxxx xxxx 1001 xxxx */
523 DECODE_EMULATEX (0x0fb000f0, 0x01000090, emulate_rd12rn16rm0_rwflags_nopc, 525 DECODE_EMULATEX (0x0fb000f0, 0x01000090, emulate_rd12rn16rm0_rwflags_nopc,
524 REGS(NOPC, NOPC, 0, 0, NOPC)), 526 REGS(NOPC, NOPC, 0, 0, NOPC)),
525 527#endif
526 /* LDREX/STREX{,D,B,H} cccc 0001 1xxx xxxx xxxx xxxx 1001 xxxx */ 528 /* LDREX/STREX{,D,B,H} cccc 0001 1xxx xxxx xxxx xxxx 1001 xxxx */
527 /* And unallocated instructions... */ 529 /* And unallocated instructions... */
528 DECODE_END 530 DECODE_END
diff --git a/arch/arm/kernel/kprobes-test-arm.c b/arch/arm/kernel/kprobes-test-arm.c
index fc82de8bdcc..ba32b393b3f 100644
--- a/arch/arm/kernel/kprobes-test-arm.c
+++ b/arch/arm/kernel/kprobes-test-arm.c
@@ -427,18 +427,25 @@ void kprobe_arm_test_cases(void)
427 427
428 TEST_GROUP("Synchronization primitives") 428 TEST_GROUP("Synchronization primitives")
429 429
430 /* 430#if __LINUX_ARM_ARCH__ < 6
431 * Use hard coded constants for SWP instructions to avoid warnings 431 TEST_RP("swp lr, r",7,VAL2,", [r",8,0,"]")
432 * about deprecated instructions. 432 TEST_R( "swpvs r0, r",1,VAL1,", [sp]")
433 */ 433 TEST_RP("swp sp, r",14,VAL2,", [r",12,13*4,"]")
434 TEST_RP( ".word 0xe108e097 @ swp lr, r",7,VAL2,", [r",8,0,"]") 434#else
435 TEST_R( ".word 0x610d0091 @ swpvs r0, r",1,VAL1,", [sp]") 435 TEST_UNSUPPORTED(".word 0xe108e097 @ swp lr, r7, [r8]")
436 TEST_RP( ".word 0xe10cd09e @ swp sp, r",14,VAL2,", [r",12,13*4,"]") 436 TEST_UNSUPPORTED(".word 0x610d0091 @ swpvs r0, r1, [sp]")
437 TEST_UNSUPPORTED(".word 0xe10cd09e @ swp sp, r14 [r12]")
438#endif
437 TEST_UNSUPPORTED(".word 0xe102f091 @ swp pc, r1, [r2]") 439 TEST_UNSUPPORTED(".word 0xe102f091 @ swp pc, r1, [r2]")
438 TEST_UNSUPPORTED(".word 0xe102009f @ swp r0, pc, [r2]") 440 TEST_UNSUPPORTED(".word 0xe102009f @ swp r0, pc, [r2]")
439 TEST_UNSUPPORTED(".word 0xe10f0091 @ swp r0, r1, [pc]") 441 TEST_UNSUPPORTED(".word 0xe10f0091 @ swp r0, r1, [pc]")
440 TEST_RP( ".word 0xe148e097 @ swpb lr, r",7,VAL2,", [r",8,0,"]") 442#if __LINUX_ARM_ARCH__ < 6
441 TEST_R( ".word 0x614d0091 @ swpvsb r0, r",1,VAL1,", [sp]") 443 TEST_RP("swpb lr, r",7,VAL2,", [r",8,0,"]")
444 TEST_R( "swpvsb r0, r",1,VAL1,", [sp]")
445#else
446 TEST_UNSUPPORTED(".word 0xe148e097 @ swpb lr, r7, [r8]")
447 TEST_UNSUPPORTED(".word 0x614d0091 @ swpvsb r0, r1, [sp]")
448#endif
442 TEST_UNSUPPORTED(".word 0xe142f091 @ swpb pc, r1, [r2]") 449 TEST_UNSUPPORTED(".word 0xe142f091 @ swpb pc, r1, [r2]")
443 450
444 TEST_UNSUPPORTED(".word 0xe1100090") /* Unallocated space */ 451 TEST_UNSUPPORTED(".word 0xe1100090") /* Unallocated space */
@@ -550,7 +557,7 @@ void kprobe_arm_test_cases(void)
550 TEST_RPR( "strccd r",8, VAL2,", [r",13,0, ", r",12,48,"]") 557 TEST_RPR( "strccd r",8, VAL2,", [r",13,0, ", r",12,48,"]")
551 TEST_RPR( "strd r",4, VAL1,", [r",2, 24,", r",3, 48,"]!") 558 TEST_RPR( "strd r",4, VAL1,", [r",2, 24,", r",3, 48,"]!")
552 TEST_RPR( "strcsd r",12,VAL2,", [r",11,48,", -r",10,24,"]!") 559 TEST_RPR( "strcsd r",12,VAL2,", [r",11,48,", -r",10,24,"]!")
553 TEST_RPR( "strd r",2, VAL1,", [r",3, 24,"], r",4,48,"") 560 TEST_RPR( "strd r",2, VAL1,", [r",5, 24,"], r",4,48,"")
554 TEST_RPR( "strd r",10,VAL2,", [r",9, 48,"], -r",7,24,"") 561 TEST_RPR( "strd r",10,VAL2,", [r",9, 48,"], -r",7,24,"")
555 TEST_UNSUPPORTED(".word 0xe1afc0fa @ strd r12, [pc, r10]!") 562 TEST_UNSUPPORTED(".word 0xe1afc0fa @ strd r12, [pc, r10]!")
556 563
diff --git a/arch/arm/kernel/kprobes-test-thumb.c b/arch/arm/kernel/kprobes-test-thumb.c
index 5e726c31c45..5d8b8579222 100644
--- a/arch/arm/kernel/kprobes-test-thumb.c
+++ b/arch/arm/kernel/kprobes-test-thumb.c
@@ -222,8 +222,8 @@ void kprobe_thumb16_test_cases(void)
222DONT_TEST_IN_ITBLOCK( 222DONT_TEST_IN_ITBLOCK(
223 TEST_BF_R( "cbnz r",0,0, ", 2f") 223 TEST_BF_R( "cbnz r",0,0, ", 2f")
224 TEST_BF_R( "cbz r",2,-1,", 2f") 224 TEST_BF_R( "cbz r",2,-1,", 2f")
225 TEST_BF_RX( "cbnz r",4,1, ", 2f",0x20) 225 TEST_BF_RX( "cbnz r",4,1, ", 2f", SPACE_0x20)
226 TEST_BF_RX( "cbz r",7,0, ", 2f",0x40) 226 TEST_BF_RX( "cbz r",7,0, ", 2f", SPACE_0x40)
227) 227)
228 TEST_R("sxth r0, r",7, HH1,"") 228 TEST_R("sxth r0, r",7, HH1,"")
229 TEST_R("sxth r7, r",0, HH2,"") 229 TEST_R("sxth r7, r",0, HH2,"")
@@ -246,7 +246,7 @@ DONT_TEST_IN_ITBLOCK(
246 TESTCASE_START(code) \ 246 TESTCASE_START(code) \
247 TEST_ARG_PTR(13, offset) \ 247 TEST_ARG_PTR(13, offset) \
248 TEST_ARG_END("") \ 248 TEST_ARG_END("") \
249 TEST_BRANCH_F(code,0) \ 249 TEST_BRANCH_F(code) \
250 TESTCASE_END 250 TESTCASE_END
251 251
252 TEST("push {r0}") 252 TEST("push {r0}")
@@ -319,8 +319,8 @@ CONDITION_INSTRUCTIONS(8,
319 319
320 TEST_BF( "b 2f") 320 TEST_BF( "b 2f")
321 TEST_BB( "b 2b") 321 TEST_BB( "b 2b")
322 TEST_BF_X("b 2f", 0x400) 322 TEST_BF_X("b 2f", SPACE_0x400)
323 TEST_BB_X("b 2b", 0x400) 323 TEST_BB_X("b 2b", SPACE_0x400)
324 324
325 TEST_GROUP("Testing instructions in IT blocks") 325 TEST_GROUP("Testing instructions in IT blocks")
326 326
@@ -746,7 +746,7 @@ CONDITION_INSTRUCTIONS(22,
746 TEST_BB("bne.w 2b") 746 TEST_BB("bne.w 2b")
747 TEST_BF("bgt.w 2f") 747 TEST_BF("bgt.w 2f")
748 TEST_BB("blt.w 2b") 748 TEST_BB("blt.w 2b")
749 TEST_BF_X("bpl.w 2f",0x1000) 749 TEST_BF_X("bpl.w 2f", SPACE_0x1000)
750) 750)
751 751
752 TEST_UNSUPPORTED("msr cpsr, r0") 752 TEST_UNSUPPORTED("msr cpsr, r0")
@@ -786,11 +786,11 @@ CONDITION_INSTRUCTIONS(22,
786 786
787 TEST_BF( "b.w 2f") 787 TEST_BF( "b.w 2f")
788 TEST_BB( "b.w 2b") 788 TEST_BB( "b.w 2b")
789 TEST_BF_X("b.w 2f", 0x1000) 789 TEST_BF_X("b.w 2f", SPACE_0x1000)
790 790
791 TEST_BF( "bl.w 2f") 791 TEST_BF( "bl.w 2f")
792 TEST_BB( "bl.w 2b") 792 TEST_BB( "bl.w 2b")
793 TEST_BB_X("bl.w 2b", 0x1000) 793 TEST_BB_X("bl.w 2b", SPACE_0x1000)
794 794
795 TEST_X( "blx __dummy_arm_subroutine", 795 TEST_X( "blx __dummy_arm_subroutine",
796 ".arm \n\t" 796 ".arm \n\t"
diff --git a/arch/arm/kernel/kprobes-test.h b/arch/arm/kernel/kprobes-test.h
index 0dc5d77b935..e28a869b1ae 100644
--- a/arch/arm/kernel/kprobes-test.h
+++ b/arch/arm/kernel/kprobes-test.h
@@ -149,23 +149,31 @@ struct test_arg_end {
149 "1: "instruction" \n\t" \ 149 "1: "instruction" \n\t" \
150 " nop \n\t" 150 " nop \n\t"
151 151
152#define TEST_BRANCH_F(instruction, xtra_dist) \ 152#define TEST_BRANCH_F(instruction) \
153 TEST_INSTRUCTION(instruction) \ 153 TEST_INSTRUCTION(instruction) \
154 ".if "#xtra_dist" \n\t" \
155 " b 99f \n\t" \ 154 " b 99f \n\t" \
156 ".space "#xtra_dist" \n\t" \ 155 "2: nop \n\t"
157 ".endif \n\t" \ 156
157#define TEST_BRANCH_B(instruction) \
158 " b 50f \n\t" \
159 " b 99f \n\t" \
160 "2: nop \n\t" \
161 " b 99f \n\t" \
162 TEST_INSTRUCTION(instruction)
163
164#define TEST_BRANCH_FX(instruction, codex) \
165 TEST_INSTRUCTION(instruction) \
166 " b 99f \n\t" \
167 codex" \n\t" \
158 " b 99f \n\t" \ 168 " b 99f \n\t" \
159 "2: nop \n\t" 169 "2: nop \n\t"
160 170
161#define TEST_BRANCH_B(instruction, xtra_dist) \ 171#define TEST_BRANCH_BX(instruction, codex) \
162 " b 50f \n\t" \ 172 " b 50f \n\t" \
163 " b 99f \n\t" \ 173 " b 99f \n\t" \
164 "2: nop \n\t" \ 174 "2: nop \n\t" \
165 " b 99f \n\t" \ 175 " b 99f \n\t" \
166 ".if "#xtra_dist" \n\t" \ 176 codex" \n\t" \
167 ".space "#xtra_dist" \n\t" \
168 ".endif \n\t" \
169 TEST_INSTRUCTION(instruction) 177 TEST_INSTRUCTION(instruction)
170 178
171#define TESTCASE_END \ 179#define TESTCASE_END \
@@ -301,47 +309,60 @@ struct test_arg_end {
301 TESTCASE_START(code1 #reg1 code2) \ 309 TESTCASE_START(code1 #reg1 code2) \
302 TEST_ARG_PTR(reg1, val1) \ 310 TEST_ARG_PTR(reg1, val1) \
303 TEST_ARG_END("") \ 311 TEST_ARG_END("") \
304 TEST_BRANCH_F(code1 #reg1 code2, 0) \ 312 TEST_BRANCH_F(code1 #reg1 code2) \
305 TESTCASE_END 313 TESTCASE_END
306 314
307#define TEST_BF_X(code, xtra_dist) \ 315#define TEST_BF(code) \
308 TESTCASE_START(code) \ 316 TESTCASE_START(code) \
309 TEST_ARG_END("") \ 317 TEST_ARG_END("") \
310 TEST_BRANCH_F(code, xtra_dist) \ 318 TEST_BRANCH_F(code) \
311 TESTCASE_END 319 TESTCASE_END
312 320
313#define TEST_BB_X(code, xtra_dist) \ 321#define TEST_BB(code) \
314 TESTCASE_START(code) \ 322 TESTCASE_START(code) \
315 TEST_ARG_END("") \ 323 TEST_ARG_END("") \
316 TEST_BRANCH_B(code, xtra_dist) \ 324 TEST_BRANCH_B(code) \
317 TESTCASE_END 325 TESTCASE_END
318 326
319#define TEST_BF_RX(code1, reg, val, code2, xtra_dist) \ 327#define TEST_BF_R(code1, reg, val, code2) \
320 TESTCASE_START(code1 #reg code2) \ 328 TESTCASE_START(code1 #reg code2) \
321 TEST_ARG_REG(reg, val) \ 329 TEST_ARG_REG(reg, val) \
322 TEST_ARG_END("") \ 330 TEST_ARG_END("") \
323 TEST_BRANCH_F(code1 #reg code2, xtra_dist) \ 331 TEST_BRANCH_F(code1 #reg code2) \
324 TESTCASE_END 332 TESTCASE_END
325 333
326#define TEST_BB_RX(code1, reg, val, code2, xtra_dist) \ 334#define TEST_BB_R(code1, reg, val, code2) \
327 TESTCASE_START(code1 #reg code2) \ 335 TESTCASE_START(code1 #reg code2) \
328 TEST_ARG_REG(reg, val) \ 336 TEST_ARG_REG(reg, val) \
329 TEST_ARG_END("") \ 337 TEST_ARG_END("") \
330 TEST_BRANCH_B(code1 #reg code2, xtra_dist) \ 338 TEST_BRANCH_B(code1 #reg code2) \
331 TESTCASE_END 339 TESTCASE_END
332 340
333#define TEST_BF(code) TEST_BF_X(code, 0)
334#define TEST_BB(code) TEST_BB_X(code, 0)
335
336#define TEST_BF_R(code1, reg, val, code2) TEST_BF_RX(code1, reg, val, code2, 0)
337#define TEST_BB_R(code1, reg, val, code2) TEST_BB_RX(code1, reg, val, code2, 0)
338
339#define TEST_BF_RR(code1, reg1, val1, code2, reg2, val2, code3) \ 341#define TEST_BF_RR(code1, reg1, val1, code2, reg2, val2, code3) \
340 TESTCASE_START(code1 #reg1 code2 #reg2 code3) \ 342 TESTCASE_START(code1 #reg1 code2 #reg2 code3) \
341 TEST_ARG_REG(reg1, val1) \ 343 TEST_ARG_REG(reg1, val1) \
342 TEST_ARG_REG(reg2, val2) \ 344 TEST_ARG_REG(reg2, val2) \
343 TEST_ARG_END("") \ 345 TEST_ARG_END("") \
344 TEST_BRANCH_F(code1 #reg1 code2 #reg2 code3, 0) \ 346 TEST_BRANCH_F(code1 #reg1 code2 #reg2 code3) \
347 TESTCASE_END
348
349#define TEST_BF_X(code, codex) \
350 TESTCASE_START(code) \
351 TEST_ARG_END("") \
352 TEST_BRANCH_FX(code, codex) \
353 TESTCASE_END
354
355#define TEST_BB_X(code, codex) \
356 TESTCASE_START(code) \
357 TEST_ARG_END("") \
358 TEST_BRANCH_BX(code, codex) \
359 TESTCASE_END
360
361#define TEST_BF_RX(code1, reg, val, code2, codex) \
362 TESTCASE_START(code1 #reg code2) \
363 TEST_ARG_REG(reg, val) \
364 TEST_ARG_END("") \
365 TEST_BRANCH_FX(code1 #reg code2, codex) \
345 TESTCASE_END 366 TESTCASE_END
346 367
347#define TEST_X(code, codex) \ 368#define TEST_X(code, codex) \
@@ -372,6 +393,25 @@ struct test_arg_end {
372 TESTCASE_END 393 TESTCASE_END
373 394
374 395
396/*
397 * Macros for defining space directives spread over multiple lines.
398 * These are required so the compiler guesses better the length of inline asm
399 * code and will spill the literal pool early enough to avoid generating PC
400 * relative loads with out of range offsets.
401 */
402#define TWICE(x) x x
403#define SPACE_0x8 TWICE(".space 4\n\t")
404#define SPACE_0x10 TWICE(SPACE_0x8)
405#define SPACE_0x20 TWICE(SPACE_0x10)
406#define SPACE_0x40 TWICE(SPACE_0x20)
407#define SPACE_0x80 TWICE(SPACE_0x40)
408#define SPACE_0x100 TWICE(SPACE_0x80)
409#define SPACE_0x200 TWICE(SPACE_0x100)
410#define SPACE_0x400 TWICE(SPACE_0x200)
411#define SPACE_0x800 TWICE(SPACE_0x400)
412#define SPACE_0x1000 TWICE(SPACE_0x800)
413
414
375/* Various values used in test cases... */ 415/* Various values used in test cases... */
376#define N(val) (val ^ 0xffffffff) 416#define N(val) (val ^ 0xffffffff)
377#define VAL1 0x12345678 417#define VAL1 0x12345678
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index c1b4463dcc8..e59bbd496c3 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -32,24 +32,6 @@ static atomic_t waiting_for_crash_ipi;
32 32
33int machine_kexec_prepare(struct kimage *image) 33int machine_kexec_prepare(struct kimage *image)
34{ 34{
35 unsigned long page_list;
36 void *reboot_code_buffer;
37 page_list = image->head & PAGE_MASK;
38
39 reboot_code_buffer = page_address(image->control_code_page);
40
41 /* Prepare parameters for reboot_code_buffer*/
42 kexec_start_address = image->start;
43 kexec_indirection_page = page_list;
44 kexec_mach_type = machine_arch_type;
45 kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET;
46
47 /* copy our kernel relocation code to the control code page */
48 memcpy(reboot_code_buffer,
49 relocate_new_kernel, relocate_new_kernel_size);
50
51 flush_icache_range((unsigned long) reboot_code_buffer,
52 (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE);
53 return 0; 35 return 0;
54} 36}
55 37
@@ -100,14 +82,31 @@ void (*kexec_reinit)(void);
100 82
101void machine_kexec(struct kimage *image) 83void machine_kexec(struct kimage *image)
102{ 84{
85 unsigned long page_list;
103 unsigned long reboot_code_buffer_phys; 86 unsigned long reboot_code_buffer_phys;
104 void *reboot_code_buffer; 87 void *reboot_code_buffer;
105 88
89
90 page_list = image->head & PAGE_MASK;
91
106 /* we need both effective and real address here */ 92 /* we need both effective and real address here */
107 reboot_code_buffer_phys = 93 reboot_code_buffer_phys =
108 page_to_pfn(image->control_code_page) << PAGE_SHIFT; 94 page_to_pfn(image->control_code_page) << PAGE_SHIFT;
109 reboot_code_buffer = page_address(image->control_code_page); 95 reboot_code_buffer = page_address(image->control_code_page);
110 96
97 /* Prepare parameters for reboot_code_buffer*/
98 kexec_start_address = image->start;
99 kexec_indirection_page = page_list;
100 kexec_mach_type = machine_arch_type;
101 kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET;
102
103 /* copy our kernel relocation code to the control code page */
104 memcpy(reboot_code_buffer,
105 relocate_new_kernel, relocate_new_kernel_size);
106
107
108 flush_icache_range((unsigned long) reboot_code_buffer,
109 (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE);
111 printk(KERN_INFO "Bye!\n"); 110 printk(KERN_INFO "Bye!\n");
112 111
113 if (kexec_reinit) 112 if (kexec_reinit)
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 24e2347be6b..88b0941ce51 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -343,19 +343,25 @@ validate_group(struct perf_event *event)
343{ 343{
344 struct perf_event *sibling, *leader = event->group_leader; 344 struct perf_event *sibling, *leader = event->group_leader;
345 struct pmu_hw_events fake_pmu; 345 struct pmu_hw_events fake_pmu;
346 DECLARE_BITMAP(fake_used_mask, ARMPMU_MAX_HWEVENTS);
346 347
347 memset(&fake_pmu, 0, sizeof(fake_pmu)); 348 /*
349 * Initialise the fake PMU. We only need to populate the
350 * used_mask for the purposes of validation.
351 */
352 memset(fake_used_mask, 0, sizeof(fake_used_mask));
353 fake_pmu.used_mask = fake_used_mask;
348 354
349 if (!validate_event(&fake_pmu, leader)) 355 if (!validate_event(&fake_pmu, leader))
350 return -ENOSPC; 356 return -EINVAL;
351 357
352 list_for_each_entry(sibling, &leader->sibling_list, group_entry) { 358 list_for_each_entry(sibling, &leader->sibling_list, group_entry) {
353 if (!validate_event(&fake_pmu, sibling)) 359 if (!validate_event(&fake_pmu, sibling))
354 return -ENOSPC; 360 return -EINVAL;
355 } 361 }
356 362
357 if (!validate_event(&fake_pmu, event)) 363 if (!validate_event(&fake_pmu, event))
358 return -ENOSPC; 364 return -EINVAL;
359 365
360 return 0; 366 return 0;
361} 367}
@@ -396,6 +402,9 @@ armpmu_reserve_hardware(struct arm_pmu *armpmu)
396 int i, err, irq, irqs; 402 int i, err, irq, irqs;
397 struct platform_device *pmu_device = armpmu->plat_device; 403 struct platform_device *pmu_device = armpmu->plat_device;
398 404
405 if (!pmu_device)
406 return -ENODEV;
407
399 err = reserve_pmu(armpmu->type); 408 err = reserve_pmu(armpmu->type);
400 if (err) { 409 if (err) {
401 pr_warning("unable to reserve pmu\n"); 410 pr_warning("unable to reserve pmu\n");
@@ -631,6 +640,9 @@ static struct platform_device_id armpmu_plat_device_ids[] = {
631 640
632static int __devinit armpmu_device_probe(struct platform_device *pdev) 641static int __devinit armpmu_device_probe(struct platform_device *pdev)
633{ 642{
643 if (!cpu_pmu)
644 return -ENODEV;
645
634 cpu_pmu->plat_device = pdev; 646 cpu_pmu->plat_device = pdev;
635 return 0; 647 return 0;
636} 648}
diff --git a/arch/arm/kernel/pmu.c b/arch/arm/kernel/pmu.c
index 2c3407ee857..2334bf8a650 100644
--- a/arch/arm/kernel/pmu.c
+++ b/arch/arm/kernel/pmu.c
@@ -33,3 +33,4 @@ release_pmu(enum arm_pmu_type type)
33{ 33{
34 clear_bit_unlock(type, pmu_lock); 34 clear_bit_unlock(type, pmu_lock);
35} 35}
36EXPORT_SYMBOL_GPL(release_pmu);
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 75316f0dd02..3d0c6fb74ae 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -192,6 +192,9 @@ void cpu_idle(void)
192#endif 192#endif
193 193
194 local_irq_disable(); 194 local_irq_disable();
195#ifdef CONFIG_PL310_ERRATA_769419
196 wmb();
197#endif
195 if (hlt_counter) { 198 if (hlt_counter) {
196 local_irq_enable(); 199 local_irq_enable();
197 cpu_relax(); 200 cpu_relax();
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 7e7977ab994..8fc2c8fcbdc 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -461,8 +461,10 @@ static void __init setup_processor(void)
461 cpu_name, read_cpuid_id(), read_cpuid_id() & 15, 461 cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
462 proc_arch[cpu_architecture()], cr_alignment); 462 proc_arch[cpu_architecture()], cr_alignment);
463 463
464 sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS); 464 snprintf(init_utsname()->machine, __NEW_UTS_LEN + 1, "%s%c",
465 sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS); 465 list->arch_name, ENDIANNESS);
466 snprintf(elf_platform, ELF_PLATFORM_SIZE, "%s%c",
467 list->elf_name, ENDIANNESS);
466 elf_hwcap = list->elf_hwcap; 468 elf_hwcap = list->elf_hwcap;
467#ifndef CONFIG_ARM_THUMB 469#ifndef CONFIG_ARM_THUMB
468 elf_hwcap &= ~HWCAP_THUMB; 470 elf_hwcap &= ~HWCAP_THUMB;
@@ -893,8 +895,6 @@ void __init setup_arch(char **cmdline_p)
893{ 895{
894 struct machine_desc *mdesc; 896 struct machine_desc *mdesc;
895 897
896 unwind_init();
897
898 setup_processor(); 898 setup_processor();
899 mdesc = setup_machine_fdt(__atags_pointer); 899 mdesc = setup_machine_fdt(__atags_pointer);
900 if (!mdesc) 900 if (!mdesc)
@@ -902,6 +902,12 @@ void __init setup_arch(char **cmdline_p)
902 machine_desc = mdesc; 902 machine_desc = mdesc;
903 machine_name = mdesc->name; 903 machine_name = mdesc->name;
904 904
905#ifdef CONFIG_ZONE_DMA
906 if (mdesc->dma_zone_size) {
907 extern unsigned long arm_dma_zone_size;
908 arm_dma_zone_size = mdesc->dma_zone_size;
909 }
910#endif
905 if (mdesc->soft_reboot) 911 if (mdesc->soft_reboot)
906 reboot_setup("s"); 912 reboot_setup("s");
907 913
@@ -932,12 +938,6 @@ void __init setup_arch(char **cmdline_p)
932 938
933 tcm_init(); 939 tcm_init();
934 940
935#ifdef CONFIG_ZONE_DMA
936 if (mdesc->dma_zone_size) {
937 extern unsigned long arm_dma_zone_size;
938 arm_dma_zone_size = mdesc->dma_zone_size;
939 }
940#endif
941#ifdef CONFIG_MULTI_IRQ_HANDLER 941#ifdef CONFIG_MULTI_IRQ_HANDLER
942 handle_arch_irq = mdesc->handle_irq; 942 handle_arch_irq = mdesc->handle_irq;
943#endif 943#endif
diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
index 1040c00405d..8200deaa14f 100644
--- a/arch/arm/kernel/topology.c
+++ b/arch/arm/kernel/topology.c
@@ -43,7 +43,7 @@
43 43
44struct cputopo_arm cpu_topology[NR_CPUS]; 44struct cputopo_arm cpu_topology[NR_CPUS];
45 45
46const struct cpumask *cpu_coregroup_mask(unsigned int cpu) 46const struct cpumask *cpu_coregroup_mask(int cpu)
47{ 47{
48 return &cpu_topology[cpu].core_sibling; 48 return &cpu_topology[cpu].core_sibling;
49} 49}
diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c
index e7e8365795c..00df012c467 100644
--- a/arch/arm/kernel/unwind.c
+++ b/arch/arm/kernel/unwind.c
@@ -67,7 +67,7 @@ EXPORT_SYMBOL(__aeabi_unwind_cpp_pr2);
67 67
68struct unwind_ctrl_block { 68struct unwind_ctrl_block {
69 unsigned long vrs[16]; /* virtual register set */ 69 unsigned long vrs[16]; /* virtual register set */
70 unsigned long *insn; /* pointer to the current instructions word */ 70 const unsigned long *insn; /* pointer to the current instructions word */
71 int entries; /* number of entries left to interpret */ 71 int entries; /* number of entries left to interpret */
72 int byte; /* current byte number in the instructions word */ 72 int byte; /* current byte number in the instructions word */
73}; 73};
@@ -83,8 +83,9 @@ enum regs {
83 PC = 15 83 PC = 15
84}; 84};
85 85
86extern struct unwind_idx __start_unwind_idx[]; 86extern const struct unwind_idx __start_unwind_idx[];
87extern struct unwind_idx __stop_unwind_idx[]; 87static const struct unwind_idx *__origin_unwind_idx;
88extern const struct unwind_idx __stop_unwind_idx[];
88 89
89static DEFINE_SPINLOCK(unwind_lock); 90static DEFINE_SPINLOCK(unwind_lock);
90static LIST_HEAD(unwind_tables); 91static LIST_HEAD(unwind_tables);
@@ -98,45 +99,99 @@ static LIST_HEAD(unwind_tables);
98}) 99})
99 100
100/* 101/*
101 * Binary search in the unwind index. The entries entries are 102 * Binary search in the unwind index. The entries are
102 * guaranteed to be sorted in ascending order by the linker. 103 * guaranteed to be sorted in ascending order by the linker.
104 *
105 * start = first entry
106 * origin = first entry with positive offset (or stop if there is no such entry)
107 * stop - 1 = last entry
103 */ 108 */
104static struct unwind_idx *search_index(unsigned long addr, 109static const struct unwind_idx *search_index(unsigned long addr,
105 struct unwind_idx *first, 110 const struct unwind_idx *start,
106 struct unwind_idx *last) 111 const struct unwind_idx *origin,
112 const struct unwind_idx *stop)
107{ 113{
108 pr_debug("%s(%08lx, %p, %p)\n", __func__, addr, first, last); 114 unsigned long addr_prel31;
115
116 pr_debug("%s(%08lx, %p, %p, %p)\n",
117 __func__, addr, start, origin, stop);
118
119 /*
120 * only search in the section with the matching sign. This way the
121 * prel31 numbers can be compared as unsigned longs.
122 */
123 if (addr < (unsigned long)start)
124 /* negative offsets: [start; origin) */
125 stop = origin;
126 else
127 /* positive offsets: [origin; stop) */
128 start = origin;
129
130 /* prel31 for address relavive to start */
131 addr_prel31 = (addr - (unsigned long)start) & 0x7fffffff;
109 132
110 if (addr < first->addr) { 133 while (start < stop - 1) {
134 const struct unwind_idx *mid = start + ((stop - start) >> 1);
135
136 /*
137 * As addr_prel31 is relative to start an offset is needed to
138 * make it relative to mid.
139 */
140 if (addr_prel31 - ((unsigned long)mid - (unsigned long)start) <
141 mid->addr_offset)
142 stop = mid;
143 else {
144 /* keep addr_prel31 relative to start */
145 addr_prel31 -= ((unsigned long)mid -
146 (unsigned long)start);
147 start = mid;
148 }
149 }
150
151 if (likely(start->addr_offset <= addr_prel31))
152 return start;
153 else {
111 pr_warning("unwind: Unknown symbol address %08lx\n", addr); 154 pr_warning("unwind: Unknown symbol address %08lx\n", addr);
112 return NULL; 155 return NULL;
113 } else if (addr >= last->addr) 156 }
114 return last; 157}
115 158
116 while (first < last - 1) { 159static const struct unwind_idx *unwind_find_origin(
117 struct unwind_idx *mid = first + ((last - first + 1) >> 1); 160 const struct unwind_idx *start, const struct unwind_idx *stop)
161{
162 pr_debug("%s(%p, %p)\n", __func__, start, stop);
163 while (start < stop) {
164 const struct unwind_idx *mid = start + ((stop - start) >> 1);
118 165
119 if (addr < mid->addr) 166 if (mid->addr_offset >= 0x40000000)
120 last = mid; 167 /* negative offset */
168 start = mid + 1;
121 else 169 else
122 first = mid; 170 /* positive offset */
171 stop = mid;
123 } 172 }
124 173 pr_debug("%s -> %p\n", __func__, stop);
125 return first; 174 return stop;
126} 175}
127 176
128static struct unwind_idx *unwind_find_idx(unsigned long addr) 177static const struct unwind_idx *unwind_find_idx(unsigned long addr)
129{ 178{
130 struct unwind_idx *idx = NULL; 179 const struct unwind_idx *idx = NULL;
131 unsigned long flags; 180 unsigned long flags;
132 181
133 pr_debug("%s(%08lx)\n", __func__, addr); 182 pr_debug("%s(%08lx)\n", __func__, addr);
134 183
135 if (core_kernel_text(addr)) 184 if (core_kernel_text(addr)) {
185 if (unlikely(!__origin_unwind_idx))
186 __origin_unwind_idx =
187 unwind_find_origin(__start_unwind_idx,
188 __stop_unwind_idx);
189
136 /* main unwind table */ 190 /* main unwind table */
137 idx = search_index(addr, __start_unwind_idx, 191 idx = search_index(addr, __start_unwind_idx,
138 __stop_unwind_idx - 1); 192 __origin_unwind_idx,
139 else { 193 __stop_unwind_idx);
194 } else {
140 /* module unwind tables */ 195 /* module unwind tables */
141 struct unwind_table *table; 196 struct unwind_table *table;
142 197
@@ -145,7 +200,8 @@ static struct unwind_idx *unwind_find_idx(unsigned long addr)
145 if (addr >= table->begin_addr && 200 if (addr >= table->begin_addr &&
146 addr < table->end_addr) { 201 addr < table->end_addr) {
147 idx = search_index(addr, table->start, 202 idx = search_index(addr, table->start,
148 table->stop - 1); 203 table->origin,
204 table->stop);
149 /* Move-to-front to exploit common traces */ 205 /* Move-to-front to exploit common traces */
150 list_move(&table->list, &unwind_tables); 206 list_move(&table->list, &unwind_tables);
151 break; 207 break;
@@ -274,7 +330,7 @@ static int unwind_exec_insn(struct unwind_ctrl_block *ctrl)
274int unwind_frame(struct stackframe *frame) 330int unwind_frame(struct stackframe *frame)
275{ 331{
276 unsigned long high, low; 332 unsigned long high, low;
277 struct unwind_idx *idx; 333 const struct unwind_idx *idx;
278 struct unwind_ctrl_block ctrl; 334 struct unwind_ctrl_block ctrl;
279 335
280 /* only go to a higher address on the stack */ 336 /* only go to a higher address on the stack */
@@ -399,7 +455,6 @@ struct unwind_table *unwind_table_add(unsigned long start, unsigned long size,
399 unsigned long text_size) 455 unsigned long text_size)
400{ 456{
401 unsigned long flags; 457 unsigned long flags;
402 struct unwind_idx *idx;
403 struct unwind_table *tab = kmalloc(sizeof(*tab), GFP_KERNEL); 458 struct unwind_table *tab = kmalloc(sizeof(*tab), GFP_KERNEL);
404 459
405 pr_debug("%s(%08lx, %08lx, %08lx, %08lx)\n", __func__, start, size, 460 pr_debug("%s(%08lx, %08lx, %08lx, %08lx)\n", __func__, start, size,
@@ -408,15 +463,12 @@ struct unwind_table *unwind_table_add(unsigned long start, unsigned long size,
408 if (!tab) 463 if (!tab)
409 return tab; 464 return tab;
410 465
411 tab->start = (struct unwind_idx *)start; 466 tab->start = (const struct unwind_idx *)start;
412 tab->stop = (struct unwind_idx *)(start + size); 467 tab->stop = (const struct unwind_idx *)(start + size);
468 tab->origin = unwind_find_origin(tab->start, tab->stop);
413 tab->begin_addr = text_addr; 469 tab->begin_addr = text_addr;
414 tab->end_addr = text_addr + text_size; 470 tab->end_addr = text_addr + text_size;
415 471
416 /* Convert the symbol addresses to absolute values */
417 for (idx = tab->start; idx < tab->stop; idx++)
418 idx->addr = prel31_to_addr(&idx->addr);
419
420 spin_lock_irqsave(&unwind_lock, flags); 472 spin_lock_irqsave(&unwind_lock, flags);
421 list_add_tail(&tab->list, &unwind_tables); 473 list_add_tail(&tab->list, &unwind_tables);
422 spin_unlock_irqrestore(&unwind_lock, flags); 474 spin_unlock_irqrestore(&unwind_lock, flags);
@@ -437,16 +489,3 @@ void unwind_table_del(struct unwind_table *tab)
437 489
438 kfree(tab); 490 kfree(tab);
439} 491}
440
441int __init unwind_init(void)
442{
443 struct unwind_idx *idx;
444
445 /* Convert the symbol addresses to absolute values */
446 for (idx = __start_unwind_idx; idx < __stop_unwind_idx; idx++)
447 idx->addr = prel31_to_addr(&idx->addr);
448
449 pr_debug("unwind: ARM stack unwinding initialised\n");
450
451 return 0;
452}
diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h
index 10d868a5a48..d6408d1ee54 100644
--- a/arch/arm/lib/bitops.h
+++ b/arch/arm/lib/bitops.h
@@ -1,5 +1,9 @@
1#include <asm/unwind.h>
2
1#if __LINUX_ARM_ARCH__ >= 6 3#if __LINUX_ARM_ARCH__ >= 6
2 .macro bitop, instr 4 .macro bitop, name, instr
5ENTRY( \name )
6UNWIND( .fnstart )
3 ands ip, r1, #3 7 ands ip, r1, #3
4 strneb r1, [ip] @ assert word-aligned 8 strneb r1, [ip] @ assert word-aligned
5 mov r2, #1 9 mov r2, #1
@@ -13,9 +17,13 @@
13 cmp r0, #0 17 cmp r0, #0
14 bne 1b 18 bne 1b
15 bx lr 19 bx lr
20UNWIND( .fnend )
21ENDPROC(\name )
16 .endm 22 .endm
17 23
18 .macro testop, instr, store 24 .macro testop, name, instr, store
25ENTRY( \name )
26UNWIND( .fnstart )
19 ands ip, r1, #3 27 ands ip, r1, #3
20 strneb r1, [ip] @ assert word-aligned 28 strneb r1, [ip] @ assert word-aligned
21 mov r2, #1 29 mov r2, #1
@@ -34,9 +42,13 @@
34 cmp r0, #0 42 cmp r0, #0
35 movne r0, #1 43 movne r0, #1
362: bx lr 442: bx lr
45UNWIND( .fnend )
46ENDPROC(\name )
37 .endm 47 .endm
38#else 48#else
39 .macro bitop, instr 49 .macro bitop, name, instr
50ENTRY( \name )
51UNWIND( .fnstart )
40 ands ip, r1, #3 52 ands ip, r1, #3
41 strneb r1, [ip] @ assert word-aligned 53 strneb r1, [ip] @ assert word-aligned
42 and r2, r0, #31 54 and r2, r0, #31
@@ -49,6 +61,8 @@
49 str r2, [r1, r0, lsl #2] 61 str r2, [r1, r0, lsl #2]
50 restore_irqs ip 62 restore_irqs ip
51 mov pc, lr 63 mov pc, lr
64UNWIND( .fnend )
65ENDPROC(\name )
52 .endm 66 .endm
53 67
54/** 68/**
@@ -59,7 +73,9 @@
59 * Note: we can trivially conditionalise the store instruction 73 * Note: we can trivially conditionalise the store instruction
60 * to avoid dirtying the data cache. 74 * to avoid dirtying the data cache.
61 */ 75 */
62 .macro testop, instr, store 76 .macro testop, name, instr, store
77ENTRY( \name )
78UNWIND( .fnstart )
63 ands ip, r1, #3 79 ands ip, r1, #3
64 strneb r1, [ip] @ assert word-aligned 80 strneb r1, [ip] @ assert word-aligned
65 and r3, r0, #31 81 and r3, r0, #31
@@ -73,5 +89,7 @@
73 moveq r0, #0 89 moveq r0, #0
74 restore_irqs ip 90 restore_irqs ip
75 mov pc, lr 91 mov pc, lr
92UNWIND( .fnend )
93ENDPROC(\name )
76 .endm 94 .endm
77#endif 95#endif
diff --git a/arch/arm/lib/changebit.S b/arch/arm/lib/changebit.S
index 68ed5b62e83..f4027862172 100644
--- a/arch/arm/lib/changebit.S
+++ b/arch/arm/lib/changebit.S
@@ -12,6 +12,4 @@
12#include "bitops.h" 12#include "bitops.h"
13 .text 13 .text
14 14
15ENTRY(_change_bit) 15bitop _change_bit, eor
16 bitop eor
17ENDPROC(_change_bit)
diff --git a/arch/arm/lib/clearbit.S b/arch/arm/lib/clearbit.S
index 4c04c3b51ee..f6b75fb64d3 100644
--- a/arch/arm/lib/clearbit.S
+++ b/arch/arm/lib/clearbit.S
@@ -12,6 +12,4 @@
12#include "bitops.h" 12#include "bitops.h"
13 .text 13 .text
14 14
15ENTRY(_clear_bit) 15bitop _clear_bit, bic
16 bitop bic
17ENDPROC(_clear_bit)
diff --git a/arch/arm/lib/setbit.S b/arch/arm/lib/setbit.S
index bbee5c66a23..618fedae4b3 100644
--- a/arch/arm/lib/setbit.S
+++ b/arch/arm/lib/setbit.S
@@ -12,6 +12,4 @@
12#include "bitops.h" 12#include "bitops.h"
13 .text 13 .text
14 14
15ENTRY(_set_bit) 15bitop _set_bit, orr
16 bitop orr
17ENDPROC(_set_bit)
diff --git a/arch/arm/lib/testchangebit.S b/arch/arm/lib/testchangebit.S
index 15a4d431f22..4becdc3a59c 100644
--- a/arch/arm/lib/testchangebit.S
+++ b/arch/arm/lib/testchangebit.S
@@ -12,6 +12,4 @@
12#include "bitops.h" 12#include "bitops.h"
13 .text 13 .text
14 14
15ENTRY(_test_and_change_bit) 15testop _test_and_change_bit, eor, str
16 testop eor, str
17ENDPROC(_test_and_change_bit)
diff --git a/arch/arm/lib/testclearbit.S b/arch/arm/lib/testclearbit.S
index 521b66b5b95..918841dcce7 100644
--- a/arch/arm/lib/testclearbit.S
+++ b/arch/arm/lib/testclearbit.S
@@ -12,6 +12,4 @@
12#include "bitops.h" 12#include "bitops.h"
13 .text 13 .text
14 14
15ENTRY(_test_and_clear_bit) 15testop _test_and_clear_bit, bicne, strne
16 testop bicne, strne
17ENDPROC(_test_and_clear_bit)
diff --git a/arch/arm/lib/testsetbit.S b/arch/arm/lib/testsetbit.S
index 1c98cc2185b..8d1b2fe9e48 100644
--- a/arch/arm/lib/testsetbit.S
+++ b/arch/arm/lib/testsetbit.S
@@ -12,6 +12,4 @@
12#include "bitops.h" 12#include "bitops.h"
13 .text 13 .text
14 14
15ENTRY(_test_and_set_bit) 15testop _test_and_set_bit, orreq, streq
16 testop orreq, streq
17ENDPROC(_test_and_set_bit)
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index a4401d6b5b0..adad70db70e 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -98,7 +98,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
98 * USB HS Device (Gadget) 98 * USB HS Device (Gadget)
99 * -------------------------------------------------------------------- */ 99 * -------------------------------------------------------------------- */
100 100
101#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE) 101#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
102 102
103static struct resource usba_udc_resources[] = { 103static struct resource usba_udc_resources[] = {
104 [0] = { 104 [0] = {
@@ -1021,8 +1021,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1021#if defined(CONFIG_SERIAL_ATMEL) 1021#if defined(CONFIG_SERIAL_ATMEL)
1022static struct resource dbgu_resources[] = { 1022static struct resource dbgu_resources[] = {
1023 [0] = { 1023 [0] = {
1024 .start = AT91_VA_BASE_SYS + AT91_DBGU, 1024 .start = AT91_BASE_SYS + AT91_DBGU,
1025 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1025 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
1026 .flags = IORESOURCE_MEM, 1026 .flags = IORESOURCE_MEM,
1027 }, 1027 },
1028 [1] = { 1028 [1] = {
@@ -1035,7 +1035,6 @@ static struct resource dbgu_resources[] = {
1035static struct atmel_uart_data dbgu_data = { 1035static struct atmel_uart_data dbgu_data = {
1036 .use_dma_tx = 0, 1036 .use_dma_tx = 0,
1037 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 1037 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
1038 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
1039}; 1038};
1040 1039
1041static u64 dbgu_dmamask = DMA_BIT_MASK(32); 1040static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 01d8bbd1468..ad930688358 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -83,7 +83,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
83 * USB Device (Gadget) 83 * USB Device (Gadget)
84 * -------------------------------------------------------------------- */ 84 * -------------------------------------------------------------------- */
85 85
86#ifdef CONFIG_USB_GADGET_AT91 86#ifdef CONFIG_USB_AT91
87static struct at91_udc_data udc_data; 87static struct at91_udc_data udc_data;
88 88
89static struct resource udc_resources[] = { 89static struct resource udc_resources[] = {
@@ -877,8 +877,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
877#if defined(CONFIG_SERIAL_ATMEL) 877#if defined(CONFIG_SERIAL_ATMEL)
878static struct resource dbgu_resources[] = { 878static struct resource dbgu_resources[] = {
879 [0] = { 879 [0] = {
880 .start = AT91_VA_BASE_SYS + AT91_DBGU, 880 .start = AT91_BASE_SYS + AT91_DBGU,
881 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 881 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
882 .flags = IORESOURCE_MEM, 882 .flags = IORESOURCE_MEM,
883 }, 883 },
884 [1] = { 884 [1] = {
@@ -891,7 +891,6 @@ static struct resource dbgu_resources[] = {
891static struct atmel_uart_data dbgu_data = { 891static struct atmel_uart_data dbgu_data = {
892 .use_dma_tx = 0, 892 .use_dma_tx = 0,
893 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 893 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
894 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
895}; 894};
896 895
897static u64 dbgu_dmamask = DMA_BIT_MASK(32); 896static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index b84a9f642f5..0d20677fbef 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -195,9 +195,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
195 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk), 195 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
196 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk), 196 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
197 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk), 197 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
198 CLKDEV_CON_DEV_ID("t3_clk", "atmel_tcb.1", &tc3_clk), 198 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tc3_clk),
199 CLKDEV_CON_DEV_ID("t4_clk", "atmel_tcb.1", &tc4_clk), 199 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk),
200 CLKDEV_CON_DEV_ID("t5_clk", "atmel_tcb.1", &tc5_clk), 200 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk),
201 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk), 201 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk),
202 /* more usart lookup table for DT entries */ 202 /* more usart lookup table for DT entries */
203 CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck), 203 CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 24b6f8c0440..629fa977497 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -84,7 +84,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
84 * USB Device (Gadget) 84 * USB Device (Gadget)
85 * -------------------------------------------------------------------- */ 85 * -------------------------------------------------------------------- */
86 86
87#ifdef CONFIG_USB_GADGET_AT91 87#ifdef CONFIG_USB_AT91
88static struct at91_udc_data udc_data; 88static struct at91_udc_data udc_data;
89 89
90static struct resource udc_resources[] = { 90static struct resource udc_resources[] = {
@@ -837,8 +837,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
837#if defined(CONFIG_SERIAL_ATMEL) 837#if defined(CONFIG_SERIAL_ATMEL)
838static struct resource dbgu_resources[] = { 838static struct resource dbgu_resources[] = {
839 [0] = { 839 [0] = {
840 .start = AT91_VA_BASE_SYS + AT91_DBGU, 840 .start = AT91_BASE_SYS + AT91_DBGU,
841 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 841 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
842 .flags = IORESOURCE_MEM, 842 .flags = IORESOURCE_MEM,
843 }, 843 },
844 [1] = { 844 [1] = {
@@ -851,7 +851,6 @@ static struct resource dbgu_resources[] = {
851static struct atmel_uart_data dbgu_data = { 851static struct atmel_uart_data dbgu_data = {
852 .use_dma_tx = 0, 852 .use_dma_tx = 0,
853 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 853 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
854 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
855}; 854};
856 855
857static u64 dbgu_dmamask = DMA_BIT_MASK(32); 856static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 3b70b3897d9..a178b58b0b9 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -87,7 +87,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
87 * USB Device (Gadget) 87 * USB Device (Gadget)
88 * -------------------------------------------------------------------- */ 88 * -------------------------------------------------------------------- */
89 89
90#ifdef CONFIG_USB_GADGET_AT91 90#ifdef CONFIG_USB_AT91
91static struct at91_udc_data udc_data; 91static struct at91_udc_data udc_data;
92 92
93static struct resource udc_resources[] = { 93static struct resource udc_resources[] = {
@@ -816,8 +816,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
816#if defined(CONFIG_SERIAL_ATMEL) 816#if defined(CONFIG_SERIAL_ATMEL)
817static struct resource dbgu_resources[] = { 817static struct resource dbgu_resources[] = {
818 [0] = { 818 [0] = {
819 .start = AT91_VA_BASE_SYS + AT91_DBGU, 819 .start = AT91_BASE_SYS + AT91_DBGU,
820 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 820 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
821 .flags = IORESOURCE_MEM, 821 .flags = IORESOURCE_MEM,
822 }, 822 },
823 [1] = { 823 [1] = {
@@ -830,7 +830,6 @@ static struct resource dbgu_resources[] = {
830static struct atmel_uart_data dbgu_data = { 830static struct atmel_uart_data dbgu_data = {
831 .use_dma_tx = 0, 831 .use_dma_tx = 0,
832 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 832 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
833 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
834}; 833};
835 834
836static u64 dbgu_dmamask = DMA_BIT_MASK(32); 835static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 3faa1fde9ad..d5fbac9ff4f 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -92,7 +92,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
92 * USB Device (Gadget) 92 * USB Device (Gadget)
93 * -------------------------------------------------------------------- */ 93 * -------------------------------------------------------------------- */
94 94
95#ifdef CONFIG_USB_GADGET_AT91 95#ifdef CONFIG_USB_AT91
96static struct at91_udc_data udc_data; 96static struct at91_udc_data udc_data;
97 97
98static struct resource udc_resources[] = { 98static struct resource udc_resources[] = {
@@ -1196,8 +1196,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1196 1196
1197static struct resource dbgu_resources[] = { 1197static struct resource dbgu_resources[] = {
1198 [0] = { 1198 [0] = {
1199 .start = AT91_VA_BASE_SYS + AT91_DBGU, 1199 .start = AT91_BASE_SYS + AT91_DBGU,
1200 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1200 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
1201 .flags = IORESOURCE_MEM, 1201 .flags = IORESOURCE_MEM,
1202 }, 1202 },
1203 [1] = { 1203 [1] = {
@@ -1210,7 +1210,6 @@ static struct resource dbgu_resources[] = {
1210static struct atmel_uart_data dbgu_data = { 1210static struct atmel_uart_data dbgu_data = {
1211 .use_dma_tx = 0, 1211 .use_dma_tx = 0,
1212 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 1212 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
1213 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
1214}; 1213};
1215 1214
1216static u64 dbgu_dmamask = DMA_BIT_MASK(32); 1215static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 000b5e1da96..09a16d6bd5c 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -197,7 +197,7 @@ void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data) {}
197 * USB HS Device (Gadget) 197 * USB HS Device (Gadget)
198 * -------------------------------------------------------------------- */ 198 * -------------------------------------------------------------------- */
199 199
200#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE) 200#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
201static struct resource usba_udc_resources[] = { 201static struct resource usba_udc_resources[] = {
202 [0] = { 202 [0] = {
203 .start = AT91SAM9G45_UDPHS_FIFO, 203 .start = AT91SAM9G45_UDPHS_FIFO,
@@ -1332,8 +1332,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1332#if defined(CONFIG_SERIAL_ATMEL) 1332#if defined(CONFIG_SERIAL_ATMEL)
1333static struct resource dbgu_resources[] = { 1333static struct resource dbgu_resources[] = {
1334 [0] = { 1334 [0] = {
1335 .start = AT91_VA_BASE_SYS + AT91_DBGU, 1335 .start = AT91_BASE_SYS + AT91_DBGU,
1336 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1336 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
1337 .flags = IORESOURCE_MEM, 1337 .flags = IORESOURCE_MEM,
1338 }, 1338 },
1339 [1] = { 1339 [1] = {
@@ -1346,7 +1346,6 @@ static struct resource dbgu_resources[] = {
1346static struct atmel_uart_data dbgu_data = { 1346static struct atmel_uart_data dbgu_data = {
1347 .use_dma_tx = 0, 1347 .use_dma_tx = 0,
1348 .use_dma_rx = 0, 1348 .use_dma_rx = 0,
1349 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
1350}; 1349};
1351 1350
1352static u64 dbgu_dmamask = DMA_BIT_MASK(32); 1351static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 305a851b5bf..628eb566d60 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -75,7 +75,7 @@ void __init at91_add_device_hdmac(void) {}
75 * USB HS Device (Gadget) 75 * USB HS Device (Gadget)
76 * -------------------------------------------------------------------- */ 76 * -------------------------------------------------------------------- */
77 77
78#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE) 78#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
79 79
80static struct resource usba_udc_resources[] = { 80static struct resource usba_udc_resources[] = {
81 [0] = { 81 [0] = {
@@ -908,8 +908,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
908#if defined(CONFIG_SERIAL_ATMEL) 908#if defined(CONFIG_SERIAL_ATMEL)
909static struct resource dbgu_resources[] = { 909static struct resource dbgu_resources[] = {
910 [0] = { 910 [0] = {
911 .start = AT91_VA_BASE_SYS + AT91_DBGU, 911 .start = AT91_BASE_SYS + AT91_DBGU,
912 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 912 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
913 .flags = IORESOURCE_MEM, 913 .flags = IORESOURCE_MEM,
914 }, 914 },
915 [1] = { 915 [1] = {
@@ -922,7 +922,6 @@ static struct resource dbgu_resources[] = {
922static struct atmel_uart_data dbgu_data = { 922static struct atmel_uart_data dbgu_data = {
923 .use_dma_tx = 0, 923 .use_dma_tx = 0,
924 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 924 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
925 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
926}; 925};
927 926
928static u64 dbgu_dmamask = DMA_BIT_MASK(32); 927static u64 dbgu_dmamask = DMA_BIT_MASK(32);
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index 649b052231f..12a3f955162 100644
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -384,7 +384,7 @@ static struct spi_board_info yl9200_spi_devices[] = {
384#include <video/s1d13xxxfb.h> 384#include <video/s1d13xxxfb.h>
385 385
386 386
387static void __init yl9200_init_video(void) 387static void yl9200_init_video(void)
388{ 388{
389 /* NWAIT Signal */ 389 /* NWAIT Signal */
390 at91_set_A_periph(AT91_PIN_PC6, 0); 390 at91_set_A_periph(AT91_PIN_PC6, 0);
diff --git a/arch/arm/mach-at91/include/mach/system_rev.h b/arch/arm/mach-at91/include/mach/system_rev.h
index 8f4866045b4..ec164a4124c 100644
--- a/arch/arm/mach-at91/include/mach/system_rev.h
+++ b/arch/arm/mach-at91/include/mach/system_rev.h
@@ -19,7 +19,7 @@
19#define BOARD_HAVE_NAND_16BIT (1 << 31) 19#define BOARD_HAVE_NAND_16BIT (1 << 31)
20static inline int board_have_nand_16bit(void) 20static inline int board_have_nand_16bit(void)
21{ 21{
22 return system_rev & BOARD_HAVE_NAND_16BIT; 22 return (system_rev & BOARD_HAVE_NAND_16BIT) ? 1 : 0;
23} 23}
24 24
25#endif /* __ARCH_SYSTEM_REV_H__ */ 25#endif /* __ARCH_SYSTEM_REV_H__ */
diff --git a/arch/arm/mach-at91/include/mach/vmalloc.h b/arch/arm/mach-at91/include/mach/vmalloc.h
index 8eb459f3f5b..8e4a1bd0ab1 100644
--- a/arch/arm/mach-at91/include/mach/vmalloc.h
+++ b/arch/arm/mach-at91/include/mach/vmalloc.h
@@ -21,6 +21,8 @@
21#ifndef __ASM_ARCH_VMALLOC_H 21#ifndef __ASM_ARCH_VMALLOC_H
22#define __ASM_ARCH_VMALLOC_H 22#define __ASM_ARCH_VMALLOC_H
23 23
24#include <mach/hardware.h>
25
24#define VMALLOC_END (AT91_VIRT_BASE & PGDIR_MASK) 26#define VMALLOC_END (AT91_VIRT_BASE & PGDIR_MASK)
25 27
26#endif 28#endif
diff --git a/arch/arm/mach-bcmring/core.c b/arch/arm/mach-bcmring/core.c
index 43eadbcc29e..430da120a29 100644
--- a/arch/arm/mach-bcmring/core.c
+++ b/arch/arm/mach-bcmring/core.c
@@ -235,7 +235,7 @@ void __init bcmring_init_timer(void)
235 */ 235 */
236 bcmring_clocksource_init(); 236 bcmring_clocksource_init();
237 237
238 sp804_clockevents_register(TIMER0_VA_BASE, IRQ_TIMER0, "timer0"); 238 sp804_clockevents_init(TIMER0_VA_BASE, IRQ_TIMER0, "timer0");
239} 239}
240 240
241struct sys_timer bcmring_timer = { 241struct sys_timer bcmring_timer = {
diff --git a/arch/arm/mach-bcmring/dma.c b/arch/arm/mach-bcmring/dma.c
index b52b8de91bd..f4d4d6d174d 100644
--- a/arch/arm/mach-bcmring/dma.c
+++ b/arch/arm/mach-bcmring/dma.c
@@ -36,6 +36,7 @@
36#include <linux/mm.h> 36#include <linux/mm.h>
37#include <linux/pfn.h> 37#include <linux/pfn.h>
38#include <linux/atomic.h> 38#include <linux/atomic.h>
39#include <linux/sched.h>
39#include <mach/dma.h> 40#include <mach/dma.h>
40 41
41/* I don't quite understand why dc4 fails when this is set to 1 and DMA is enabled */ 42/* I don't quite understand why dc4 fails when this is set to 1 and DMA is enabled */
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 1d7d2499522..6659a90dbca 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -753,7 +753,7 @@ static struct snd_platform_data da850_evm_snd_data = {
753 .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction), 753 .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
754 .tdm_slots = 2, 754 .tdm_slots = 2,
755 .serial_dir = da850_iis_serializer_direction, 755 .serial_dir = da850_iis_serializer_direction,
756 .asp_chan_q = EVENTQ_1, 756 .asp_chan_q = EVENTQ_0,
757 .version = MCASP_VERSION_2, 757 .version = MCASP_VERSION_2,
758 .txnumevt = 1, 758 .txnumevt = 1,
759 .rxnumevt = 1, 759 .rxnumevt = 1,
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index 1918ae71142..46e1f4173b9 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -107,7 +107,7 @@ static struct mtd_partition davinci_nand_partitions[] = {
107 /* UBL (a few copies) plus U-Boot */ 107 /* UBL (a few copies) plus U-Boot */
108 .name = "bootloader", 108 .name = "bootloader",
109 .offset = 0, 109 .offset = 0,
110 .size = 28 * NAND_BLOCK_SIZE, 110 .size = 30 * NAND_BLOCK_SIZE,
111 .mask_flags = MTD_WRITEABLE, /* force read-only */ 111 .mask_flags = MTD_WRITEABLE, /* force read-only */
112 }, { 112 }, {
113 /* U-Boot environment */ 113 /* U-Boot environment */
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index e574d7f837a..635bf774015 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -564,7 +564,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
564 int val; 564 int val;
565 u32 value; 565 u32 value;
566 566
567 if (!vpif_vsclkdis_reg || !cpld_client) 567 if (!vpif_vidclkctl_reg || !cpld_client)
568 return -ENXIO; 568 return -ENXIO;
569 569
570 val = i2c_smbus_read_byte(cpld_client); 570 val = i2c_smbus_read_byte(cpld_client);
@@ -572,7 +572,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
572 return val; 572 return val;
573 573
574 spin_lock_irqsave(&vpif_reg_lock, flags); 574 spin_lock_irqsave(&vpif_reg_lock, flags);
575 value = __raw_readl(vpif_vsclkdis_reg); 575 value = __raw_readl(vpif_vidclkctl_reg);
576 if (mux_mode) { 576 if (mux_mode) {
577 val &= VPIF_INPUT_TWO_CHANNEL; 577 val &= VPIF_INPUT_TWO_CHANNEL;
578 value |= VIDCH1CLK; 578 value |= VIDCH1CLK;
@@ -580,7 +580,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
580 val |= VPIF_INPUT_ONE_CHANNEL; 580 val |= VPIF_INPUT_ONE_CHANNEL;
581 value &= ~VIDCH1CLK; 581 value &= ~VIDCH1CLK;
582 } 582 }
583 __raw_writel(value, vpif_vsclkdis_reg); 583 __raw_writel(value, vpif_vidclkctl_reg);
584 spin_unlock_irqrestore(&vpif_reg_lock, flags); 584 spin_unlock_irqrestore(&vpif_reg_lock, flags);
585 585
586 err = i2c_smbus_write_byte(cpld_client, val); 586 err = i2c_smbus_write_byte(cpld_client, val);
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 0b68ed534f8..af27c130595 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -161,7 +161,6 @@ static struct clk dsp_clk = {
161 .name = "dsp", 161 .name = "dsp",
162 .parent = &pll1_sysclk1, 162 .parent = &pll1_sysclk1,
163 .lpsc = DM646X_LPSC_C64X_CPU, 163 .lpsc = DM646X_LPSC_C64X_CPU,
164 .flags = PSC_DSP,
165 .usecount = 1, /* REVISIT how to disable? */ 164 .usecount = 1, /* REVISIT how to disable? */
166}; 165};
167 166
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index fa59c097223..8bc3fc25617 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -233,7 +233,7 @@
233#define PTCMD 0x120 233#define PTCMD 0x120
234#define PTSTAT 0x128 234#define PTSTAT 0x128
235#define PDSTAT 0x200 235#define PDSTAT 0x200
236#define PDCTL1 0x304 236#define PDCTL 0x300
237#define MDSTAT 0x800 237#define MDSTAT 0x800
238#define MDCTL 0xA00 238#define MDCTL 0xA00
239 239
@@ -244,7 +244,10 @@
244#define PSC_STATE_ENABLE 3 244#define PSC_STATE_ENABLE 3
245 245
246#define MDSTAT_STATE_MASK 0x3f 246#define MDSTAT_STATE_MASK 0x3f
247#define PDSTAT_STATE_MASK 0x1f
247#define MDCTL_FORCE BIT(31) 248#define MDCTL_FORCE BIT(31)
249#define PDCTL_NEXT BIT(1)
250#define PDCTL_EPCGOOD BIT(8)
248 251
249#ifndef __ASSEMBLER__ 252#ifndef __ASSEMBLER__
250 253
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index 1fb6bdff38c..d7e210f4b55 100644
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -52,7 +52,7 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
52void davinci_psc_config(unsigned int domain, unsigned int ctlr, 52void davinci_psc_config(unsigned int domain, unsigned int ctlr,
53 unsigned int id, bool enable, u32 flags) 53 unsigned int id, bool enable, u32 flags)
54{ 54{
55 u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl; 55 u32 epcpr, ptcmd, ptstat, pdstat, pdctl, mdstat, mdctl;
56 void __iomem *psc_base; 56 void __iomem *psc_base;
57 struct davinci_soc_info *soc_info = &davinci_soc_info; 57 struct davinci_soc_info *soc_info = &davinci_soc_info;
58 u32 next_state = PSC_STATE_ENABLE; 58 u32 next_state = PSC_STATE_ENABLE;
@@ -79,11 +79,11 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
79 mdctl |= MDCTL_FORCE; 79 mdctl |= MDCTL_FORCE;
80 __raw_writel(mdctl, psc_base + MDCTL + 4 * id); 80 __raw_writel(mdctl, psc_base + MDCTL + 4 * id);
81 81
82 pdstat = __raw_readl(psc_base + PDSTAT); 82 pdstat = __raw_readl(psc_base + PDSTAT + 4 * domain);
83 if ((pdstat & 0x00000001) == 0) { 83 if ((pdstat & PDSTAT_STATE_MASK) == 0) {
84 pdctl1 = __raw_readl(psc_base + PDCTL1); 84 pdctl = __raw_readl(psc_base + PDCTL + 4 * domain);
85 pdctl1 |= 0x1; 85 pdctl |= PDCTL_NEXT;
86 __raw_writel(pdctl1, psc_base + PDCTL1); 86 __raw_writel(pdctl, psc_base + PDCTL + 4 * domain);
87 87
88 ptcmd = 1 << domain; 88 ptcmd = 1 << domain;
89 __raw_writel(ptcmd, psc_base + PTCMD); 89 __raw_writel(ptcmd, psc_base + PTCMD);
@@ -92,9 +92,9 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
92 epcpr = __raw_readl(psc_base + EPCPR); 92 epcpr = __raw_readl(psc_base + EPCPR);
93 } while ((((epcpr >> domain) & 1) == 0)); 93 } while ((((epcpr >> domain) & 1) == 0));
94 94
95 pdctl1 = __raw_readl(psc_base + PDCTL1); 95 pdctl = __raw_readl(psc_base + PDCTL + 4 * domain);
96 pdctl1 |= 0x100; 96 pdctl |= PDCTL_EPCGOOD;
97 __raw_writel(pdctl1, psc_base + PDCTL1); 97 __raw_writel(pdctl, psc_base + PDCTL + 4 * domain);
98 } else { 98 } else {
99 ptcmd = 1 << domain; 99 ptcmd = 1 << domain;
100 __raw_writel(ptcmd, psc_base + PTCMD); 100 __raw_writel(ptcmd, psc_base + PTCMD);
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index 35f6502144a..4ebb382c597 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -12,6 +12,8 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/cpuidle.h> 13#include <linux/cpuidle.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/export.h>
16#include <linux/time.h>
15 17
16#include <asm/proc-fns.h> 18#include <asm/proc-fns.h>
17 19
diff --git a/arch/arm/mach-exynos/mct.c b/arch/arm/mach-exynos/mct.c
index 97343df8f13..85b5527d091 100644
--- a/arch/arm/mach-exynos/mct.c
+++ b/arch/arm/mach-exynos/mct.c
@@ -44,8 +44,6 @@ struct mct_clock_event_device {
44 char name[10]; 44 char name[10];
45}; 45};
46 46
47static DEFINE_PER_CPU(struct mct_clock_event_device, percpu_mct_tick);
48
49static void exynos4_mct_write(unsigned int value, void *addr) 47static void exynos4_mct_write(unsigned int value, void *addr)
50{ 48{
51 void __iomem *stat_addr; 49 void __iomem *stat_addr;
@@ -264,6 +262,9 @@ static void exynos4_clockevent_init(void)
264} 262}
265 263
266#ifdef CONFIG_LOCAL_TIMERS 264#ifdef CONFIG_LOCAL_TIMERS
265
266static DEFINE_PER_CPU(struct mct_clock_event_device, percpu_mct_tick);
267
267/* Clock event handling */ 268/* Clock event handling */
268static void exynos4_mct_tick_stop(struct mct_clock_event_device *mevt) 269static void exynos4_mct_tick_stop(struct mct_clock_event_device *mevt)
269{ 270{
@@ -428,9 +429,13 @@ int __cpuinit local_timer_setup(struct clock_event_device *evt)
428 429
429void local_timer_stop(struct clock_event_device *evt) 430void local_timer_stop(struct clock_event_device *evt)
430{ 431{
432 unsigned int cpu = smp_processor_id();
431 evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt); 433 evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt);
432 if (mct_int_type == MCT_INT_SPI) 434 if (mct_int_type == MCT_INT_SPI)
433 disable_irq(evt->irq); 435 if (cpu == 0)
436 remove_irq(evt->irq, &mct_tick0_event_irq);
437 else
438 remove_irq(evt->irq, &mct_tick1_event_irq);
434 else 439 else
435 disable_percpu_irq(IRQ_MCT_LOCALTIMER); 440 disable_percpu_irq(IRQ_MCT_LOCALTIMER);
436} 441}
@@ -443,6 +448,7 @@ static void __init exynos4_timer_resources(void)
443 448
444 clk_rate = clk_get_rate(mct_clk); 449 clk_rate = clk_get_rate(mct_clk);
445 450
451#ifdef CONFIG_LOCAL_TIMERS
446 if (mct_int_type == MCT_INT_PPI) { 452 if (mct_int_type == MCT_INT_PPI) {
447 int err; 453 int err;
448 454
@@ -452,6 +458,7 @@ static void __init exynos4_timer_resources(void)
452 WARN(err, "MCT: can't request IRQ %d (%d)\n", 458 WARN(err, "MCT: can't request IRQ %d (%d)\n",
453 IRQ_MCT_LOCALTIMER, err); 459 IRQ_MCT_LOCALTIMER, err);
454 } 460 }
461#endif /* CONFIG_LOCAL_TIMERS */
455} 462}
456 463
457static void __init exynos4_timer_init(void) 464static void __init exynos4_timer_init(void)
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index b82dcf08e74..88660d500f5 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -22,6 +22,7 @@
22#include <linux/of_irq.h> 22#include <linux/of_irq.h>
23#include <linux/of_platform.h> 23#include <linux/of_platform.h>
24#include <linux/of_address.h> 24#include <linux/of_address.h>
25#include <linux/smp.h>
25 26
26#include <asm/cacheflush.h> 27#include <asm/cacheflush.h>
27#include <asm/unified.h> 28#include <asm/unified.h>
@@ -72,6 +73,9 @@ static void __init highbank_map_io(void)
72 73
73void highbank_set_cpu_jump(int cpu, void *jump_addr) 74void highbank_set_cpu_jump(int cpu, void *jump_addr)
74{ 75{
76#ifdef CONFIG_SMP
77 cpu = cpu_logical_map(cpu);
78#endif
75 writel(BSYM(virt_to_phys(jump_addr)), HB_JUMP_TABLE_VIRT(cpu)); 79 writel(BSYM(virt_to_phys(jump_addr)), HB_JUMP_TABLE_VIRT(cpu));
76 __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16); 80 __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
77 outer_clean_range(HB_JUMP_TABLE_PHYS(cpu), 81 outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 5f7f9c2a34a..c44aa974e79 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -10,11 +10,6 @@ config HAVE_IMX_MMDC
10config HAVE_IMX_SRC 10config HAVE_IMX_SRC
11 bool 11 bool
12 12
13#
14# ARCH_MX31 and ARCH_MX35 are left for compatibility
15# Some usages assume that having one of them implies not having (e.g.) ARCH_MX2.
16# To easily distinguish good and reviewed from unreviewed usages new (and IMHO
17# more sensible) names are used: SOC_IMX31 and SOC_IMX35
18config ARCH_MX1 13config ARCH_MX1
19 bool 14 bool
20 15
@@ -27,12 +22,6 @@ config ARCH_MX25
27config MACH_MX27 22config MACH_MX27
28 bool 23 bool
29 24
30config ARCH_MX31
31 bool
32
33config ARCH_MX35
34 bool
35
36config SOC_IMX1 25config SOC_IMX1
37 bool 26 bool
38 select ARCH_MX1 27 select ARCH_MX1
@@ -72,7 +61,6 @@ config SOC_IMX31
72 select CPU_V6 61 select CPU_V6
73 select IMX_HAVE_PLATFORM_MXC_RNGA 62 select IMX_HAVE_PLATFORM_MXC_RNGA
74 select ARCH_MXC_AUDMUX_V2 63 select ARCH_MXC_AUDMUX_V2
75 select ARCH_MX31
76 select MXC_AVIC 64 select MXC_AVIC
77 select SMP_ON_UP if SMP 65 select SMP_ON_UP if SMP
78 66
@@ -82,7 +70,6 @@ config SOC_IMX35
82 select ARCH_MXC_IOMUX_V3 70 select ARCH_MXC_IOMUX_V3
83 select ARCH_MXC_AUDMUX_V2 71 select ARCH_MXC_AUDMUX_V2
84 select HAVE_EPIT 72 select HAVE_EPIT
85 select ARCH_MX35
86 select MXC_AVIC 73 select MXC_AVIC
87 select SMP_ON_UP if SMP 74 select SMP_ON_UP if SMP
88 75
diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot
index 22d85889f62..cfede5768aa 100644
--- a/arch/arm/mach-imx/Makefile.boot
+++ b/arch/arm/mach-imx/Makefile.boot
@@ -1,22 +1,26 @@
1zreladdr-$(CONFIG_ARCH_MX1) += 0x08008000 1zreladdr-$(CONFIG_SOC_IMX1) += 0x08008000
2params_phys-$(CONFIG_ARCH_MX1) := 0x08000100 2params_phys-$(CONFIG_SOC_IMX1) := 0x08000100
3initrd_phys-$(CONFIG_ARCH_MX1) := 0x08800000 3initrd_phys-$(CONFIG_SOC_IMX1) := 0x08800000
4 4
5zreladdr-$(CONFIG_MACH_MX21) += 0xC0008000 5zreladdr-$(CONFIG_SOC_IMX21) += 0xC0008000
6params_phys-$(CONFIG_MACH_MX21) := 0xC0000100 6params_phys-$(CONFIG_SOC_IMX21) := 0xC0000100
7initrd_phys-$(CONFIG_MACH_MX21) := 0xC0800000 7initrd_phys-$(CONFIG_SOC_IMX21) := 0xC0800000
8 8
9zreladdr-$(CONFIG_ARCH_MX25) += 0x80008000 9zreladdr-$(CONFIG_SOC_IMX25) += 0x80008000
10params_phys-$(CONFIG_ARCH_MX25) := 0x80000100 10params_phys-$(CONFIG_SOC_IMX25) := 0x80000100
11initrd_phys-$(CONFIG_ARCH_MX25) := 0x80800000 11initrd_phys-$(CONFIG_SOC_IMX25) := 0x80800000
12 12
13zreladdr-$(CONFIG_MACH_MX27) += 0xA0008000 13zreladdr-$(CONFIG_SOC_IMX27) += 0xA0008000
14params_phys-$(CONFIG_MACH_MX27) := 0xA0000100 14params_phys-$(CONFIG_SOC_IMX27) := 0xA0000100
15initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000 15initrd_phys-$(CONFIG_SOC_IMX27) := 0xA0800000
16 16
17zreladdr-$(CONFIG_ARCH_MX3) += 0x80008000 17zreladdr-$(CONFIG_SOC_IMX31) += 0x80008000
18params_phys-$(CONFIG_ARCH_MX3) := 0x80000100 18params_phys-$(CONFIG_SOC_IMX31) := 0x80000100
19initrd_phys-$(CONFIG_ARCH_MX3) := 0x80800000 19initrd_phys-$(CONFIG_SOC_IMX31) := 0x80800000
20
21zreladdr-$(CONFIG_SOC_IMX35) += 0x80008000
22params_phys-$(CONFIG_SOC_IMX35) := 0x80000100
23initrd_phys-$(CONFIG_SOC_IMX35) := 0x80800000
20 24
21zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000 25zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000
22params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100 26params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100
diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c
index e0b926dfece..039a7abb165 100644
--- a/arch/arm/mach-imx/clock-imx6q.c
+++ b/arch/arm/mach-imx/clock-imx6q.c
@@ -1139,7 +1139,7 @@ static int _clk_set_rate(struct clk *clk, unsigned long rate)
1139 return -EINVAL; 1139 return -EINVAL;
1140 1140
1141 max_div = ((d->bm_pred >> d->bp_pred) + 1) * 1141 max_div = ((d->bm_pred >> d->bp_pred) + 1) *
1142 ((d->bm_pred >> d->bp_pred) + 1); 1142 ((d->bm_podf >> d->bp_podf) + 1);
1143 1143
1144 div = parent_rate / rate; 1144 div = parent_rate / rate;
1145 if (div == 0) 1145 if (div == 0)
@@ -1953,14 +1953,17 @@ static struct map_desc imx6q_clock_desc[] = {
1953 imx_map_entry(MX6Q, ANATOP, MT_DEVICE), 1953 imx_map_entry(MX6Q, ANATOP, MT_DEVICE),
1954}; 1954};
1955 1955
1956void __init imx6q_clock_map_io(void)
1957{
1958 iotable_init(imx6q_clock_desc, ARRAY_SIZE(imx6q_clock_desc));
1959}
1960
1956int __init mx6q_clocks_init(void) 1961int __init mx6q_clocks_init(void)
1957{ 1962{
1958 struct device_node *np; 1963 struct device_node *np;
1959 void __iomem *base; 1964 void __iomem *base;
1960 int i, irq; 1965 int i, irq;
1961 1966
1962 iotable_init(imx6q_clock_desc, ARRAY_SIZE(imx6q_clock_desc));
1963
1964 /* retrieve the freqency of fixed clocks from device tree */ 1967 /* retrieve the freqency of fixed clocks from device tree */
1965 for_each_compatible_node(np, NULL, "fixed-clock") { 1968 for_each_compatible_node(np, NULL, "fixed-clock") {
1966 u32 rate; 1969 u32 rate;
@@ -2002,6 +2005,21 @@ int __init mx6q_clocks_init(void)
2002 clk_set_rate(&asrc_serial_clk, 1500000); 2005 clk_set_rate(&asrc_serial_clk, 1500000);
2003 clk_set_rate(&enfc_clk, 11000000); 2006 clk_set_rate(&enfc_clk, 11000000);
2004 2007
2008 /*
2009 * Before pinctrl API is available, we have to rely on the pad
2010 * configuration set up by bootloader. For usdhc example here,
2011 * u-boot sets up the pads for 49.5 MHz case, and we have to lower
2012 * the usdhc clock from 198 to 49.5 MHz to match the pad configuration.
2013 *
2014 * FIXME: This is should be removed after pinctrl API is available.
2015 * At that time, usdhc driver can call pinctrl API to change pad
2016 * configuration dynamically per different usdhc clock settings.
2017 */
2018 clk_set_rate(&usdhc1_clk, 49500000);
2019 clk_set_rate(&usdhc2_clk, 49500000);
2020 clk_set_rate(&usdhc3_clk, 49500000);
2021 clk_set_rate(&usdhc4_clk, 49500000);
2022
2005 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt"); 2023 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");
2006 base = of_iomap(np, 0); 2024 base = of_iomap(np, 0);
2007 WARN_ON(!base); 2025 WARN_ON(!base);
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 8bf5fa34948..8deb012189b 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -34,16 +34,18 @@ static void __init imx6q_map_io(void)
34{ 34{
35 imx_lluart_map_io(); 35 imx_lluart_map_io();
36 imx_scu_map_io(); 36 imx_scu_map_io();
37 imx6q_clock_map_io();
37} 38}
38 39
39static void __init imx6q_gpio_add_irq_domain(struct device_node *np, 40static int __init imx6q_gpio_add_irq_domain(struct device_node *np,
40 struct device_node *interrupt_parent) 41 struct device_node *interrupt_parent)
41{ 42{
42 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS - 43 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
43 32 * 7; /* imx6q gets 7 gpio ports */
44 44
45 gpio_irq_base -= 32;
45 irq_domain_add_simple(np, gpio_irq_base); 46 irq_domain_add_simple(np, gpio_irq_base);
46 gpio_irq_base += 32; 47
48 return 0;
47} 49}
48 50
49static const struct of_device_id imx6q_irq_match[] __initconst = { 51static const struct of_device_id imx6q_irq_match[] __initconst = {
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index 9f0e82ec339..31807d2a8b7 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -33,29 +33,32 @@
33static void imx3_idle(void) 33static void imx3_idle(void)
34{ 34{
35 unsigned long reg = 0; 35 unsigned long reg = 0;
36 __asm__ __volatile__( 36
37 /* disable I and D cache */ 37 if (!need_resched())
38 "mrc p15, 0, %0, c1, c0, 0\n" 38 __asm__ __volatile__(
39 "bic %0, %0, #0x00001000\n" 39 /* disable I and D cache */
40 "bic %0, %0, #0x00000004\n" 40 "mrc p15, 0, %0, c1, c0, 0\n"
41 "mcr p15, 0, %0, c1, c0, 0\n" 41 "bic %0, %0, #0x00001000\n"
42 /* invalidate I cache */ 42 "bic %0, %0, #0x00000004\n"
43 "mov %0, #0\n" 43 "mcr p15, 0, %0, c1, c0, 0\n"
44 "mcr p15, 0, %0, c7, c5, 0\n" 44 /* invalidate I cache */
45 /* clear and invalidate D cache */ 45 "mov %0, #0\n"
46 "mov %0, #0\n" 46 "mcr p15, 0, %0, c7, c5, 0\n"
47 "mcr p15, 0, %0, c7, c14, 0\n" 47 /* clear and invalidate D cache */
48 /* WFI */ 48 "mov %0, #0\n"
49 "mov %0, #0\n" 49 "mcr p15, 0, %0, c7, c14, 0\n"
50 "mcr p15, 0, %0, c7, c0, 4\n" 50 /* WFI */
51 "nop\n" "nop\n" "nop\n" "nop\n" 51 "mov %0, #0\n"
52 "nop\n" "nop\n" "nop\n" 52 "mcr p15, 0, %0, c7, c0, 4\n"
53 /* enable I and D cache */ 53 "nop\n" "nop\n" "nop\n" "nop\n"
54 "mrc p15, 0, %0, c1, c0, 0\n" 54 "nop\n" "nop\n" "nop\n"
55 "orr %0, %0, #0x00001000\n" 55 /* enable I and D cache */
56 "orr %0, %0, #0x00000004\n" 56 "mrc p15, 0, %0, c1, c0, 0\n"
57 "mcr p15, 0, %0, c1, c0, 0\n" 57 "orr %0, %0, #0x00001000\n"
58 : "=r" (reg)); 58 "orr %0, %0, #0x00000004\n"
59 "mcr p15, 0, %0, c1, c0, 0\n"
60 : "=r" (reg));
61 local_irq_enable();
59} 62}
60 63
61static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, 64static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
@@ -108,6 +111,7 @@ void imx3_init_l2x0(void)
108 l2x0_init(l2x0_base, 0x00030024, 0x00000000); 111 l2x0_init(l2x0_base, 0x00030024, 0x00000000);
109} 112}
110 113
114#ifdef CONFIG_SOC_IMX31
111static struct map_desc mx31_io_desc[] __initdata = { 115static struct map_desc mx31_io_desc[] __initdata = {
112 imx_map_entry(MX31, X_MEMC, MT_DEVICE), 116 imx_map_entry(MX31, X_MEMC, MT_DEVICE),
113 imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED), 117 imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED),
@@ -126,33 +130,11 @@ void __init mx31_map_io(void)
126 iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc)); 130 iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc));
127} 131}
128 132
129static struct map_desc mx35_io_desc[] __initdata = {
130 imx_map_entry(MX35, X_MEMC, MT_DEVICE),
131 imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
132 imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
133 imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
134 imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
135};
136
137void __init mx35_map_io(void)
138{
139 iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
140}
141
142void __init imx31_init_early(void) 133void __init imx31_init_early(void)
143{ 134{
144 mxc_set_cpu_type(MXC_CPU_MX31); 135 mxc_set_cpu_type(MXC_CPU_MX31);
145 mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); 136 mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
146 imx_idle = imx3_idle; 137 pm_idle = imx3_idle;
147 imx_ioremap = imx3_ioremap;
148}
149
150void __init imx35_init_early(void)
151{
152 mxc_set_cpu_type(MXC_CPU_MX35);
153 mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
154 mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
155 imx_idle = imx3_idle;
156 imx_ioremap = imx3_ioremap; 138 imx_ioremap = imx3_ioremap;
157} 139}
158 140
@@ -161,11 +143,6 @@ void __init mx31_init_irq(void)
161 mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR)); 143 mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR));
162} 144}
163 145
164void __init mx35_init_irq(void)
165{
166 mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
167}
168
169static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = { 146static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = {
170 .per_2_per_addr = 1677, 147 .per_2_per_addr = 1677,
171}; 148};
@@ -199,6 +176,35 @@ void __init imx31_soc_init(void)
199 176
200 imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata); 177 imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata);
201} 178}
179#endif /* ifdef CONFIG_SOC_IMX31 */
180
181#ifdef CONFIG_SOC_IMX35
182static struct map_desc mx35_io_desc[] __initdata = {
183 imx_map_entry(MX35, X_MEMC, MT_DEVICE),
184 imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
185 imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
186 imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
187 imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
188};
189
190void __init mx35_map_io(void)
191{
192 iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
193}
194
195void __init imx35_init_early(void)
196{
197 mxc_set_cpu_type(MXC_CPU_MX35);
198 mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
199 mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
200 pm_idle = imx3_idle;
201 imx_ioremap = imx3_ioremap;
202}
203
204void __init mx35_init_irq(void)
205{
206 mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
207}
202 208
203static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = { 209static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = {
204 .ap_2_ap_addr = 642, 210 .ap_2_ap_addr = 642,
@@ -254,3 +260,4 @@ void __init imx35_soc_init(void)
254 260
255 imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata); 261 imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata);
256} 262}
263#endif /* ifdef CONFIG_SOC_IMX35 */
diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c
index 36cacbd0dcc..a8e33681b73 100644
--- a/arch/arm/mach-imx/src.c
+++ b/arch/arm/mach-imx/src.c
@@ -14,6 +14,7 @@
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/of.h> 15#include <linux/of.h>
16#include <linux/of_address.h> 16#include <linux/of_address.h>
17#include <linux/smp.h>
17#include <asm/unified.h> 18#include <asm/unified.h>
18 19
19#define SRC_SCR 0x000 20#define SRC_SCR 0x000
@@ -23,10 +24,15 @@
23 24
24static void __iomem *src_base; 25static void __iomem *src_base;
25 26
27#ifndef CONFIG_SMP
28#define cpu_logical_map(cpu) 0
29#endif
30
26void imx_enable_cpu(int cpu, bool enable) 31void imx_enable_cpu(int cpu, bool enable)
27{ 32{
28 u32 mask, val; 33 u32 mask, val;
29 34
35 cpu = cpu_logical_map(cpu);
30 mask = 1 << (BP_SRC_SCR_CORE1_ENABLE + cpu - 1); 36 mask = 1 << (BP_SRC_SCR_CORE1_ENABLE + cpu - 1);
31 val = readl_relaxed(src_base + SRC_SCR); 37 val = readl_relaxed(src_base + SRC_SCR);
32 val = enable ? val | mask : val & ~mask; 38 val = enable ? val | mask : val & ~mask;
@@ -35,6 +41,7 @@ void imx_enable_cpu(int cpu, bool enable)
35 41
36void imx_set_cpu_jump(int cpu, void *jump_addr) 42void imx_set_cpu_jump(int cpu, void *jump_addr)
37{ 43{
44 cpu = cpu_logical_map(cpu);
38 writel_relaxed(BSYM(virt_to_phys(jump_addr)), 45 writel_relaxed(BSYM(virt_to_phys(jump_addr)),
39 src_base + SRC_GPR1 + cpu * 8); 46 src_base + SRC_GPR1 + cpu * 8);
40} 47}
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index 69156568bc4..4665767a4f7 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -182,7 +182,7 @@ static void __init gplugd_init(void)
182 182
183 /* on-chip devices */ 183 /* on-chip devices */
184 pxa168_add_uart(3); 184 pxa168_add_uart(3);
185 pxa168_add_ssp(0); 185 pxa168_add_ssp(1);
186 pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info)); 186 pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info));
187 187
188 pxa168_add_eth(&gplugd_eth_platform_data); 188 pxa168_add_eth(&gplugd_eth_platform_data);
diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
index d14eeaf1632..99b4ce1b656 100644
--- a/arch/arm/mach-mmp/include/mach/gpio-pxa.h
+++ b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
@@ -7,7 +7,7 @@
7#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000) 7#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000)
8 8
9#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) 9#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
10#define GPIO_REG(x) (GPIO_REGS_VIRT + (x)) 10#define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
11 11
12#define NR_BUILTIN_GPIO IRQ_GPIO_NUM 12#define NR_BUILTIN_GPIO IRQ_GPIO_NUM
13 13
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 4285dfd80b6..4ad3969b988 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -15,6 +15,8 @@ obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o
15obj-$(CONFIG_MSM_SMD) += last_radio_log.o 15obj-$(CONFIG_MSM_SMD) += last_radio_log.o
16obj-$(CONFIG_MSM_SCM) += scm.o scm-boot.o 16obj-$(CONFIG_MSM_SCM) += scm.o scm-boot.o
17 17
18CFLAGS_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1)
19
18obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 20obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
19obj-$(CONFIG_SMP) += headsmp.o platsmp.o 21obj-$(CONFIG_SMP) += headsmp.o platsmp.o
20 22
diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c
index 71de5062c71..db81ed53103 100644
--- a/arch/arm/mach-msm/board-msm7x30.c
+++ b/arch/arm/mach-msm/board-msm7x30.c
@@ -42,8 +42,8 @@
42 42
43extern struct sys_timer msm_timer; 43extern struct sys_timer msm_timer;
44 44
45static void __init msm7x30_fixup(struct machine_desc *desc, struct tag *tag, 45static void __init msm7x30_fixup(struct tag *tag, char **cmdline,
46 char **cmdline, struct meminfo *mi) 46 struct meminfo *mi)
47{ 47{
48 for (; tag->hdr.size; tag = tag_next(tag)) 48 for (; tag->hdr.size; tag = tag_next(tag))
49 if (tag->hdr.tag == ATAG_MEM && tag->u.mem.start == 0x200000) { 49 if (tag->hdr.tag == ATAG_MEM && tag->u.mem.start == 0x200000) {
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c
index b04468e7d00..6dc1cbd2a59 100644
--- a/arch/arm/mach-msm/board-msm8960.c
+++ b/arch/arm/mach-msm/board-msm8960.c
@@ -32,8 +32,8 @@
32 32
33#include "devices.h" 33#include "devices.h"
34 34
35static void __init msm8960_fixup(struct machine_desc *desc, struct tag *tag, 35static void __init msm8960_fixup(struct tag *tag, char **cmdline,
36 char **cmdline, struct meminfo *mi) 36 struct meminfo *mi)
37{ 37{
38 for (; tag->hdr.size; tag = tag_next(tag)) 38 for (; tag->hdr.size; tag = tag_next(tag))
39 if (tag->hdr.tag == ATAG_MEM && 39 if (tag->hdr.tag == ATAG_MEM &&
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index cf38e2284fa..44bf7168837 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -28,8 +28,8 @@
28#include <mach/board.h> 28#include <mach/board.h>
29#include <mach/msm_iomap.h> 29#include <mach/msm_iomap.h>
30 30
31static void __init msm8x60_fixup(struct machine_desc *desc, struct tag *tag, 31static void __init msm8x60_fixup(struct tag *tag, char **cmdline,
32 char **cmdline, struct meminfo *mi) 32 struct meminfo *mi)
33{ 33{
34 for (; tag->hdr.size; tag = tag_next(tag)) 34 for (; tag->hdr.size; tag = tag_next(tag))
35 if (tag->hdr.tag == ATAG_MEM && 35 if (tag->hdr.tag == ATAG_MEM &&
diff --git a/arch/arm/mach-msm/devices-iommu.c b/arch/arm/mach-msm/devices-iommu.c
index 24030d0da6e..0fb7a17df39 100644
--- a/arch/arm/mach-msm/devices-iommu.c
+++ b/arch/arm/mach-msm/devices-iommu.c
@@ -18,6 +18,7 @@
18#include <linux/kernel.h> 18#include <linux/kernel.h>
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/bootmem.h> 20#include <linux/bootmem.h>
21#include <linux/module.h>
21#include <mach/irqs.h> 22#include <mach/irqs.h>
22#include <mach/iommu.h> 23#include <mach/iommu.h>
23 24
diff --git a/arch/arm/mach-msm/scm.c b/arch/arm/mach-msm/scm.c
index 232f97a0450..bafabb50258 100644
--- a/arch/arm/mach-msm/scm.c
+++ b/arch/arm/mach-msm/scm.c
@@ -180,6 +180,9 @@ static u32 smc(u32 cmd_addr)
180 __asmeq("%1", "r0") 180 __asmeq("%1", "r0")
181 __asmeq("%2", "r1") 181 __asmeq("%2", "r1")
182 __asmeq("%3", "r2") 182 __asmeq("%3", "r2")
183#ifdef REQUIRES_SEC
184 ".arch_extension sec\n"
185#endif
183 "smc #0 @ switch to secure world\n" 186 "smc #0 @ switch to secure world\n"
184 : "=r" (r0) 187 : "=r" (r0)
185 : "r" (r0), "r" (r1), "r" (r2) 188 : "r" (r0), "r" (r1), "r" (r2)
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index 5c837603ff0..24994bb5214 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -362,7 +362,7 @@ static void __init mx51_babbage_init(void)
362{ 362{
363 iomux_v3_cfg_t usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP; 363 iomux_v3_cfg_t usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP;
364 iomux_v3_cfg_t power_key = NEW_PAD_CTRL(MX51_PAD_EIM_A27__GPIO2_21, 364 iomux_v3_cfg_t power_key = NEW_PAD_CTRL(MX51_PAD_EIM_A27__GPIO2_21,
365 PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP); 365 PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH);
366 366
367 imx51_soc_init(); 367 imx51_soc_init();
368 368
diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c
index 6bea31ab8f8..64bbfcea6f3 100644
--- a/arch/arm/mach-mx5/board-mx53_evk.c
+++ b/arch/arm/mach-mx5/board-mx53_evk.c
@@ -106,7 +106,7 @@ static inline void mx53_evk_fec_reset(void)
106 gpio_set_value(MX53_EVK_FEC_PHY_RST, 1); 106 gpio_set_value(MX53_EVK_FEC_PHY_RST, 1);
107} 107}
108 108
109static struct fec_platform_data mx53_evk_fec_pdata = { 109static const struct fec_platform_data mx53_evk_fec_pdata __initconst = {
110 .phy = PHY_INTERFACE_MODE_RMII, 110 .phy = PHY_INTERFACE_MODE_RMII,
111}; 111};
112 112
diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c
index 7678f7734db..237bdecd933 100644
--- a/arch/arm/mach-mx5/board-mx53_loco.c
+++ b/arch/arm/mach-mx5/board-mx53_loco.c
@@ -242,7 +242,7 @@ static inline void mx53_loco_fec_reset(void)
242 gpio_set_value(LOCO_FEC_PHY_RST, 1); 242 gpio_set_value(LOCO_FEC_PHY_RST, 1);
243} 243}
244 244
245static struct fec_platform_data mx53_loco_fec_data = { 245static const struct fec_platform_data mx53_loco_fec_data __initconst = {
246 .phy = PHY_INTERFACE_MODE_RMII, 246 .phy = PHY_INTERFACE_MODE_RMII,
247}; 247};
248 248
diff --git a/arch/arm/mach-mx5/board-mx53_smd.c b/arch/arm/mach-mx5/board-mx53_smd.c
index 59c0845eb4a..d42132a80e8 100644
--- a/arch/arm/mach-mx5/board-mx53_smd.c
+++ b/arch/arm/mach-mx5/board-mx53_smd.c
@@ -104,7 +104,7 @@ static inline void mx53_smd_fec_reset(void)
104 gpio_set_value(SMD_FEC_PHY_RST, 1); 104 gpio_set_value(SMD_FEC_PHY_RST, 1);
105} 105}
106 106
107static struct fec_platform_data mx53_smd_fec_data = { 107static const struct fec_platform_data mx53_smd_fec_data __initconst = {
108 .phy = PHY_INTERFACE_MODE_RMII, 108 .phy = PHY_INTERFACE_MODE_RMII,
109}; 109};
110 110
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index 2aacf41c48e..4cb27697719 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -1281,9 +1281,9 @@ DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET,
1281 NULL, NULL, &ipg_clk, &gpt_ipg_clk); 1281 NULL, NULL, &ipg_clk, &gpt_ipg_clk);
1282 1282
1283DEFINE_CLOCK(pwm1_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG6_OFFSET, 1283DEFINE_CLOCK(pwm1_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG6_OFFSET,
1284 NULL, NULL, &ipg_clk, NULL); 1284 NULL, NULL, &ipg_perclk, NULL);
1285DEFINE_CLOCK(pwm2_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG8_OFFSET, 1285DEFINE_CLOCK(pwm2_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG8_OFFSET,
1286 NULL, NULL, &ipg_clk, NULL); 1286 NULL, NULL, &ipg_perclk, NULL);
1287 1287
1288/* I2C */ 1288/* I2C */
1289DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET, 1289DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET,
@@ -1634,6 +1634,7 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,
1634 return 0; 1634 return 0;
1635} 1635}
1636 1636
1637#ifdef CONFIG_OF
1637static void __init clk_get_freq_dt(unsigned long *ckil, unsigned long *osc, 1638static void __init clk_get_freq_dt(unsigned long *ckil, unsigned long *osc,
1638 unsigned long *ckih1, unsigned long *ckih2) 1639 unsigned long *ckih1, unsigned long *ckih2)
1639{ 1640{
@@ -1671,3 +1672,4 @@ int __init mx53_clocks_init_dt(void)
1671 clk_get_freq_dt(&ckil, &osc, &ckih1, &ckih2); 1672 clk_get_freq_dt(&ckil, &osc, &ckih1, &ckih2);
1672 return mx53_clocks_init(ckil, osc, ckih1, ckih2); 1673 return mx53_clocks_init(ckil, osc, ckih1, ckih2);
1673} 1674}
1675#endif
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
index 5c5328257dc..5e2e7a84386 100644
--- a/arch/arm/mach-mx5/cpu.c
+++ b/arch/arm/mach-mx5/cpu.c
@@ -16,7 +16,7 @@
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/module.h> 17#include <linux/module.h>
18#include <mach/hardware.h> 18#include <mach/hardware.h>
19#include <asm/io.h> 19#include <linux/io.h>
20 20
21static int mx5_cpu_rev = -1; 21static int mx5_cpu_rev = -1;
22 22
@@ -67,7 +67,8 @@ static int __init mx51_neon_fixup(void)
67 if (!cpu_is_mx51()) 67 if (!cpu_is_mx51())
68 return 0; 68 return 0;
69 69
70 if (mx51_revision() < IMX_CHIP_REVISION_3_0 && (elf_hwcap & HWCAP_NEON)) { 70 if (mx51_revision() < IMX_CHIP_REVISION_3_0 &&
71 (elf_hwcap & HWCAP_NEON)) {
71 elf_hwcap &= ~HWCAP_NEON; 72 elf_hwcap &= ~HWCAP_NEON;
72 pr_info("Turning off NEON support, detected broken NEON implementation\n"); 73 pr_info("Turning off NEON support, detected broken NEON implementation\n");
73 } 74 }
diff --git a/arch/arm/mach-mx5/imx51-dt.c b/arch/arm/mach-mx5/imx51-dt.c
index ccc61585659..596edd967db 100644
--- a/arch/arm/mach-mx5/imx51-dt.c
+++ b/arch/arm/mach-mx5/imx51-dt.c
@@ -44,20 +44,22 @@ static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = {
44 { /* sentinel */ } 44 { /* sentinel */ }
45}; 45};
46 46
47static void __init imx51_tzic_add_irq_domain(struct device_node *np, 47static int __init imx51_tzic_add_irq_domain(struct device_node *np,
48 struct device_node *interrupt_parent) 48 struct device_node *interrupt_parent)
49{ 49{
50 irq_domain_add_simple(np, 0); 50 irq_domain_add_simple(np, 0);
51 return 0;
51} 52}
52 53
53static void __init imx51_gpio_add_irq_domain(struct device_node *np, 54static int __init imx51_gpio_add_irq_domain(struct device_node *np,
54 struct device_node *interrupt_parent) 55 struct device_node *interrupt_parent)
55{ 56{
56 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS - 57 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
57 32 * 4; /* imx51 gets 4 gpio ports */
58 58
59 gpio_irq_base -= 32;
59 irq_domain_add_simple(np, gpio_irq_base); 60 irq_domain_add_simple(np, gpio_irq_base);
60 gpio_irq_base += 32; 61
62 return 0;
61} 63}
62 64
63static const struct of_device_id imx51_irq_match[] __initconst = { 65static const struct of_device_id imx51_irq_match[] __initconst = {
diff --git a/arch/arm/mach-mx5/imx53-dt.c b/arch/arm/mach-mx5/imx53-dt.c
index ccaa0b81b76..85bfd5ff21b 100644
--- a/arch/arm/mach-mx5/imx53-dt.c
+++ b/arch/arm/mach-mx5/imx53-dt.c
@@ -48,20 +48,22 @@ static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = {
48 { /* sentinel */ } 48 { /* sentinel */ }
49}; 49};
50 50
51static void __init imx53_tzic_add_irq_domain(struct device_node *np, 51static int __init imx53_tzic_add_irq_domain(struct device_node *np,
52 struct device_node *interrupt_parent) 52 struct device_node *interrupt_parent)
53{ 53{
54 irq_domain_add_simple(np, 0); 54 irq_domain_add_simple(np, 0);
55 return 0;
55} 56}
56 57
57static void __init imx53_gpio_add_irq_domain(struct device_node *np, 58static int __init imx53_gpio_add_irq_domain(struct device_node *np,
58 struct device_node *interrupt_parent) 59 struct device_node *interrupt_parent)
59{ 60{
60 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS - 61 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
61 32 * 7; /* imx53 gets 7 gpio ports */
62 62
63 gpio_irq_base -= 32;
63 irq_domain_add_simple(np, gpio_irq_base); 64 irq_domain_add_simple(np, gpio_irq_base);
64 gpio_irq_base += 32; 65
66 return 0;
65} 67}
66 68
67static const struct of_device_id imx53_irq_match[] __initconst = { 69static const struct of_device_id imx53_irq_match[] __initconst = {
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index 26eacc9d0d9..df4a508f240 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -23,7 +23,9 @@
23 23
24static void imx5_idle(void) 24static void imx5_idle(void)
25{ 25{
26 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); 26 if (!need_resched())
27 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
28 local_irq_enable();
27} 29}
28 30
29/* 31/*
@@ -89,7 +91,7 @@ void __init imx51_init_early(void)
89 mxc_set_cpu_type(MXC_CPU_MX51); 91 mxc_set_cpu_type(MXC_CPU_MX51);
90 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); 92 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
91 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); 93 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
92 imx_idle = imx5_idle; 94 pm_idle = imx5_idle;
93} 95}
94 96
95void __init imx53_init_early(void) 97void __init imx53_init_early(void)
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c
index 229ae349421..da6e4aad177 100644
--- a/arch/arm/mach-mxs/clock-mx28.c
+++ b/arch/arm/mach-mxs/clock-mx28.c
@@ -404,7 +404,7 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \
404 reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \ 404 reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \
405 reg &= ~BM_CLKCTRL_##dr##_DIV; \ 405 reg &= ~BM_CLKCTRL_##dr##_DIV; \
406 reg |= div << BP_CLKCTRL_##dr##_DIV; \ 406 reg |= div << BP_CLKCTRL_##dr##_DIV; \
407 if (reg | (1 << clk->enable_shift)) { \ 407 if (reg & (1 << clk->enable_shift)) { \
408 pr_err("%s: clock is gated\n", __func__); \ 408 pr_err("%s: clock is gated\n", __func__); \
409 return -EINVAL; \ 409 return -EINVAL; \
410 } \ 410 } \
diff --git a/arch/arm/mach-mxs/include/mach/mx28.h b/arch/arm/mach-mxs/include/mach/mx28.h
index 75d86118b76..30c7990f3c0 100644
--- a/arch/arm/mach-mxs/include/mach/mx28.h
+++ b/arch/arm/mach-mxs/include/mach/mx28.h
@@ -104,8 +104,8 @@
104#define MX28_INT_CAN1 9 104#define MX28_INT_CAN1 9
105#define MX28_INT_LRADC_TOUCH 10 105#define MX28_INT_LRADC_TOUCH 10
106#define MX28_INT_HSADC 13 106#define MX28_INT_HSADC 13
107#define MX28_INT_IRADC_THRESH0 14 107#define MX28_INT_LRADC_THRESH0 14
108#define MX28_INT_IRADC_THRESH1 15 108#define MX28_INT_LRADC_THRESH1 15
109#define MX28_INT_LRADC_CH0 16 109#define MX28_INT_LRADC_CH0 16
110#define MX28_INT_LRADC_CH1 17 110#define MX28_INT_LRADC_CH1 17
111#define MX28_INT_LRADC_CH2 18 111#define MX28_INT_LRADC_CH2 18
diff --git a/arch/arm/mach-mxs/include/mach/mxs.h b/arch/arm/mach-mxs/include/mach/mxs.h
index 0d2d2b47099..bde5f663474 100644
--- a/arch/arm/mach-mxs/include/mach/mxs.h
+++ b/arch/arm/mach-mxs/include/mach/mxs.h
@@ -30,6 +30,7 @@
30 */ 30 */
31#define cpu_is_mx23() ( \ 31#define cpu_is_mx23() ( \
32 machine_is_mx23evk() || \ 32 machine_is_mx23evk() || \
33 machine_is_stmp378x() || \
33 0) 34 0)
34#define cpu_is_mx28() ( \ 35#define cpu_is_mx28() ( \
35 machine_is_mx28evk() || \ 36 machine_is_mx28evk() || \
diff --git a/arch/arm/mach-mxs/mach-m28evk.c b/arch/arm/mach-mxs/mach-m28evk.c
index 3b1681e4f49..6b00577b702 100644
--- a/arch/arm/mach-mxs/mach-m28evk.c
+++ b/arch/arm/mach-mxs/mach-m28evk.c
@@ -361,6 +361,6 @@ static struct sys_timer m28evk_timer = {
361MACHINE_START(M28EVK, "DENX M28 EVK") 361MACHINE_START(M28EVK, "DENX M28 EVK")
362 .map_io = mx28_map_io, 362 .map_io = mx28_map_io,
363 .init_irq = mx28_init_irq, 363 .init_irq = mx28_init_irq,
364 .init_machine = m28evk_init,
365 .timer = &m28evk_timer, 364 .timer = &m28evk_timer,
365 .init_machine = m28evk_init,
366MACHINE_END 366MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c
index ac2316d53d3..064ec5abaa5 100644
--- a/arch/arm/mach-mxs/mach-mx28evk.c
+++ b/arch/arm/mach-mxs/mach-mx28evk.c
@@ -471,7 +471,8 @@ static void __init mx28evk_init(void)
471 "mmc0-slot-power"); 471 "mmc0-slot-power");
472 if (ret) 472 if (ret)
473 pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret); 473 pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret);
474 mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]); 474 else
475 mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]);
475 476
476 ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW, 477 ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW,
477 "mmc1-slot-power"); 478 "mmc1-slot-power");
@@ -480,7 +481,6 @@ static void __init mx28evk_init(void)
480 else 481 else
481 mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]); 482 mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
482 483
483 mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
484 mx28_add_rtc_stmp3xxx(); 484 mx28_add_rtc_stmp3xxx();
485 485
486 gpio_led_register_device(0, &mx28evk_led_data); 486 gpio_led_register_device(0, &mx28evk_led_data);
diff --git a/arch/arm/mach-mxs/mach-stmp378x_devb.c b/arch/arm/mach-mxs/mach-stmp378x_devb.c
index 177e53123a0..6834dea38c0 100644
--- a/arch/arm/mach-mxs/mach-stmp378x_devb.c
+++ b/arch/arm/mach-mxs/mach-stmp378x_devb.c
@@ -115,6 +115,6 @@ static struct sys_timer stmp378x_dvb_timer = {
115MACHINE_START(STMP378X, "STMP378X") 115MACHINE_START(STMP378X, "STMP378X")
116 .map_io = mx23_map_io, 116 .map_io = mx23_map_io,
117 .init_irq = mx23_init_irq, 117 .init_irq = mx23_init_irq,
118 .init_machine = stmp378x_dvb_init,
119 .timer = &stmp378x_dvb_timer, 118 .timer = &stmp378x_dvb_timer,
119 .init_machine = stmp378x_dvb_init,
120MACHINE_END 120MACHINE_END
diff --git a/arch/arm/mach-mxs/module-tx28.c b/arch/arm/mach-mxs/module-tx28.c
index 0fcff47009c..9a7b08b2a92 100644
--- a/arch/arm/mach-mxs/module-tx28.c
+++ b/arch/arm/mach-mxs/module-tx28.c
@@ -66,11 +66,11 @@ static const iomux_cfg_t tx28_fec1_pads[] __initconst = {
66 MX28_PAD_ENET0_CRS__ENET1_RX_EN, 66 MX28_PAD_ENET0_CRS__ENET1_RX_EN,
67}; 67};
68 68
69static struct fec_platform_data tx28_fec0_data = { 69static const struct fec_platform_data tx28_fec0_data __initconst = {
70 .phy = PHY_INTERFACE_MODE_RMII, 70 .phy = PHY_INTERFACE_MODE_RMII,
71}; 71};
72 72
73static struct fec_platform_data tx28_fec1_data = { 73static const struct fec_platform_data tx28_fec1_data __initconst = {
74 .phy = PHY_INTERFACE_MODE_RMII, 74 .phy = PHY_INTERFACE_MODE_RMII,
75}; 75};
76 76
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig
index e0a028161dd..73f287d6429 100644
--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -171,14 +171,6 @@ config MACH_OMAP_GENERIC
171comment "OMAP CPU Speed" 171comment "OMAP CPU Speed"
172 depends on ARCH_OMAP1 172 depends on ARCH_OMAP1
173 173
174config OMAP_CLOCKS_SET_BY_BOOTLOADER
175 bool "OMAP clocks set by bootloader"
176 depends on ARCH_OMAP1
177 help
178 Enable this option to prevent the kernel from overriding the clock
179 frequencies programmed by bootloader for MPU, DSP, MMUs, TC,
180 internal LCD controller and MPU peripherals.
181
182config OMAP_ARM_216MHZ 174config OMAP_ARM_216MHZ
183 bool "OMAP ARM 216 MHz CPU (1710 only)" 175 bool "OMAP ARM 216 MHz CPU (1710 only)"
184 depends on ARCH_OMAP1 && ARCH_OMAP16XX 176 depends on ARCH_OMAP1 && ARCH_OMAP16XX
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index 1b374009b1a..af7911963c0 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -302,8 +302,6 @@ static void __init ams_delta_init(void)
302 omap_cfg_reg(J19_1610_CAM_D6); 302 omap_cfg_reg(J19_1610_CAM_D6);
303 omap_cfg_reg(J18_1610_CAM_D7); 303 omap_cfg_reg(J18_1610_CAM_D7);
304 304
305 iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
306
307 omap_board_config = ams_delta_config; 305 omap_board_config = ams_delta_config;
308 omap_board_config_size = ARRAY_SIZE(ams_delta_config); 306 omap_board_config_size = ARRAY_SIZE(ams_delta_config);
309 omap_serial_init(); 307 omap_serial_init();
@@ -373,10 +371,16 @@ static int __init ams_delta_modem_init(void)
373} 371}
374arch_initcall(ams_delta_modem_init); 372arch_initcall(ams_delta_modem_init);
375 373
374static void __init ams_delta_map_io(void)
375{
376 omap15xx_map_io();
377 iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
378}
379
376MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)") 380MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")
377 /* Maintainer: Jonathan McDowell <noodles@earth.li> */ 381 /* Maintainer: Jonathan McDowell <noodles@earth.li> */
378 .atag_offset = 0x100, 382 .atag_offset = 0x100,
379 .map_io = omap15xx_map_io, 383 .map_io = ams_delta_map_io,
380 .init_early = omap1_init_early, 384 .init_early = omap1_init_early,
381 .reserve = omap_reserve, 385 .reserve = omap_reserve,
382 .init_irq = omap1_init_irq, 386 .init_irq = omap1_init_irq,
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index eaf09efb91c..16b1423b454 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -17,7 +17,8 @@
17 17
18#include <plat/clock.h> 18#include <plat/clock.h>
19 19
20extern int __init omap1_clk_init(void); 20int omap1_clk_init(void);
21void omap1_clk_late_init(void);
21extern int omap1_clk_enable(struct clk *clk); 22extern int omap1_clk_enable(struct clk *clk);
22extern void omap1_clk_disable(struct clk *clk); 23extern void omap1_clk_disable(struct clk *clk);
23extern long omap1_clk_round_rate(struct clk *clk, unsigned long rate); 24extern long omap1_clk_round_rate(struct clk *clk, unsigned long rate);
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index 92400b9eb69..9ff90a744a2 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -16,6 +16,8 @@
16 16
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/clk.h> 18#include <linux/clk.h>
19#include <linux/cpufreq.h>
20#include <linux/delay.h>
19#include <linux/io.h> 21#include <linux/io.h>
20 22
21#include <asm/mach-types.h> /* for machine_is_* */ 23#include <asm/mach-types.h> /* for machine_is_* */
@@ -767,6 +769,15 @@ static struct clk_functions omap1_clk_functions = {
767 .clk_disable_unused = omap1_clk_disable_unused, 769 .clk_disable_unused = omap1_clk_disable_unused,
768}; 770};
769 771
772static void __init omap1_show_rates(void)
773{
774 pr_notice("Clocking rate (xtal/DPLL1/MPU): "
775 "%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n",
776 ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10,
777 ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
778 arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
779}
780
770int __init omap1_clk_init(void) 781int __init omap1_clk_init(void)
771{ 782{
772 struct omap_clk *c; 783 struct omap_clk *c;
@@ -835,9 +846,12 @@ int __init omap1_clk_init(void)
835 /* We want to be in syncronous scalable mode */ 846 /* We want to be in syncronous scalable mode */
836 omap_writew(0x1000, ARM_SYSST); 847 omap_writew(0x1000, ARM_SYSST);
837 848
838#ifdef CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER 849
839 /* Use values set by bootloader. Determine PLL rate and recalculate 850 /*
840 * dependent clocks as if kernel had changed PLL or divisors. 851 * Initially use the values set by bootloader. Determine PLL rate and
852 * recalculate dependent clocks as if kernel had changed PLL or
853 * divisors. See also omap1_clk_late_init() that can reprogram dpll1
854 * after the SRAM is initialized.
841 */ 855 */
842 { 856 {
843 unsigned pll_ctl_val = omap_readw(DPLL_CTL); 857 unsigned pll_ctl_val = omap_readw(DPLL_CTL);
@@ -862,25 +876,10 @@ int __init omap1_clk_init(void)
862 } 876 }
863 } 877 }
864 } 878 }
865#else
866 /* Find the highest supported frequency and enable it */
867 if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
868 printk(KERN_ERR "System frequencies not set. Check your config.\n");
869 /* Guess sane values (60MHz) */
870 omap_writew(0x2290, DPLL_CTL);
871 omap_writew(cpu_is_omap7xx() ? 0x3005 : 0x1005, ARM_CKCTL);
872 ck_dpll1.rate = 60000000;
873 }
874#endif
875 propagate_rate(&ck_dpll1); 879 propagate_rate(&ck_dpll1);
876 /* Cache rates for clocks connected to ck_ref (not dpll1) */ 880 /* Cache rates for clocks connected to ck_ref (not dpll1) */
877 propagate_rate(&ck_ref); 881 propagate_rate(&ck_ref);
878 printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): " 882 omap1_show_rates();
879 "%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n",
880 ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10,
881 ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
882 arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
883
884 if (machine_is_omap_perseus2() || machine_is_omap_fsample()) { 883 if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
885 /* Select slicer output as OMAP input clock */ 884 /* Select slicer output as OMAP input clock */
886 omap_writew(omap_readw(OMAP7XX_PCC_UPLD_CTRL) & ~0x1, 885 omap_writew(omap_readw(OMAP7XX_PCC_UPLD_CTRL) & ~0x1,
@@ -925,3 +924,27 @@ int __init omap1_clk_init(void)
925 924
926 return 0; 925 return 0;
927} 926}
927
928#define OMAP1_DPLL1_SANE_VALUE 60000000
929
930void __init omap1_clk_late_init(void)
931{
932 unsigned long rate = ck_dpll1.rate;
933
934 if (rate >= OMAP1_DPLL1_SANE_VALUE)
935 return;
936
937 /* System booting at unusable rate, force reprogramming of DPLL1 */
938 ck_dpll1_p->rate = 0;
939
940 /* Find the highest supported frequency and enable it */
941 if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
942 pr_err("System frequencies not set, using default. Check your config.\n");
943 omap_writew(0x2290, DPLL_CTL);
944 omap_writew(cpu_is_omap7xx() ? 0x2005 : 0x0005, ARM_CKCTL);
945 ck_dpll1.rate = OMAP1_DPLL1_SANE_VALUE;
946 }
947 propagate_rate(&ck_dpll1);
948 omap1_show_rates();
949 loops_per_jiffy = cpufreq_scale(loops_per_jiffy, rate, ck_dpll1.rate);
950}
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 9d47ca7f80f..1d76a63c098 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -30,6 +30,8 @@
30#include <plat/omap7xx.h> 30#include <plat/omap7xx.h>
31#include <plat/mcbsp.h> 31#include <plat/mcbsp.h>
32 32
33#include "clock.h"
34
33/*-------------------------------------------------------------------------*/ 35/*-------------------------------------------------------------------------*/
34 36
35#if defined(CONFIG_RTC_DRV_OMAP) || defined(CONFIG_RTC_DRV_OMAP_MODULE) 37#if defined(CONFIG_RTC_DRV_OMAP) || defined(CONFIG_RTC_DRV_OMAP_MODULE)
@@ -293,6 +295,7 @@ static int __init omap1_init_devices(void)
293 return -ENODEV; 295 return -ENODEV;
294 296
295 omap_sram_init(); 297 omap_sram_init();
298 omap1_clk_late_init();
296 299
297 /* please keep these calls, and their implementations above, 300 /* please keep these calls, and their implementations above,
298 * in alphabetical order so they're easier to sort through. 301 * in alphabetical order so they're easier to sort through.
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 50341471890..e1293aa513d 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -334,6 +334,7 @@ config MACH_OMAP4_PANDA
334config OMAP3_EMU 334config OMAP3_EMU
335 bool "OMAP3 debugging peripherals" 335 bool "OMAP3 debugging peripherals"
336 depends on ARCH_OMAP3 336 depends on ARCH_OMAP3
337 select ARM_AMBA
337 select OC_ETM 338 select OC_ETM
338 help 339 help
339 Say Y here to enable debugging hardware of omap3 340 Say Y here to enable debugging hardware of omap3
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 69ab1c06913..b009f17dee5 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -4,7 +4,7 @@
4 4
5# Common support 5# Common support
6obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \ 6obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
7 common.o gpio.o dma.o wd_timer.o 7 common.o gpio.o dma.o wd_timer.o display.o
8 8
9omap-2-3-common = irq.o sdrc.o 9omap-2-3-common = irq.o sdrc.o
10hwmod-common = omap_hwmod.o \ 10hwmod-common = omap_hwmod.o \
@@ -264,7 +264,4 @@ smsc911x-$(CONFIG_SMSC911X) := gpmc-smsc911x.o
264obj-y += $(smsc911x-m) $(smsc911x-y) 264obj-y += $(smsc911x-m) $(smsc911x-y)
265obj-$(CONFIG_ARCH_OMAP4) += hwspinlock.o 265obj-$(CONFIG_ARCH_OMAP4) += hwspinlock.o
266 266
267disp-$(CONFIG_OMAP2_DSS) := display.o
268obj-y += $(disp-m) $(disp-y)
269
270obj-y += common-board-devices.o twl-common.o 267obj-y += common-board-devices.o twl-common.o
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index bd18d691c6a..108fee6146f 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -193,7 +193,7 @@ static struct platform_device rx51_charger_device = {
193static void __init rx51_charger_init(void) 193static void __init rx51_charger_init(void)
194{ 194{
195 WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO, 195 WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
196 GPIOF_OUT_INIT_LOW, "isp1704_reset")); 196 GPIOF_OUT_INIT_HIGH, "isp1704_reset"));
197 197
198 platform_device_register(&rx51_charger_device); 198 platform_device_register(&rx51_charger_device);
199} 199}
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 1fe35c24fba..942bb4f19f9 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -24,6 +24,7 @@
24 24
25#include <linux/sched.h> 25#include <linux/sched.h>
26#include <linux/cpuidle.h> 26#include <linux/cpuidle.h>
27#include <linux/export.h>
27 28
28#include <plat/prcm.h> 29#include <plat/prcm.h>
29#include <plat/irqs.h> 30#include <plat/irqs.h>
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index adb2756e242..dce9905d64b 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -27,8 +27,35 @@
27#include <plat/omap_hwmod.h> 27#include <plat/omap_hwmod.h>
28#include <plat/omap_device.h> 28#include <plat/omap_device.h>
29#include <plat/omap-pm.h> 29#include <plat/omap-pm.h>
30#include <plat/common.h>
30 31
31#include "control.h" 32#include "control.h"
33#include "display.h"
34
35#define DISPC_CONTROL 0x0040
36#define DISPC_CONTROL2 0x0238
37#define DISPC_IRQSTATUS 0x0018
38
39#define DSS_SYSCONFIG 0x10
40#define DSS_SYSSTATUS 0x14
41#define DSS_CONTROL 0x40
42#define DSS_SDI_CONTROL 0x44
43#define DSS_PLL_CONTROL 0x48
44
45#define LCD_EN_MASK (0x1 << 0)
46#define DIGIT_EN_MASK (0x1 << 1)
47
48#define FRAMEDONE_IRQ_SHIFT 0
49#define EVSYNC_EVEN_IRQ_SHIFT 2
50#define EVSYNC_ODD_IRQ_SHIFT 3
51#define FRAMEDONE2_IRQ_SHIFT 22
52#define FRAMEDONETV_IRQ_SHIFT 24
53
54/*
55 * FRAMEDONE_IRQ_TIMEOUT: how long (in milliseconds) to wait during DISPC
56 * reset before deciding that something has gone wrong
57 */
58#define FRAMEDONE_IRQ_TIMEOUT 100
32 59
33static struct platform_device omap_display_device = { 60static struct platform_device omap_display_device = {
34 .name = "omapdss", 61 .name = "omapdss",
@@ -172,3 +199,135 @@ int __init omap_display_init(struct omap_dss_board_info *board_data)
172 199
173 return r; 200 return r;
174} 201}
202
203static void dispc_disable_outputs(void)
204{
205 u32 v, irq_mask = 0;
206 bool lcd_en, digit_en, lcd2_en = false;
207 int i;
208 struct omap_dss_dispc_dev_attr *da;
209 struct omap_hwmod *oh;
210
211 oh = omap_hwmod_lookup("dss_dispc");
212 if (!oh) {
213 WARN(1, "display: could not disable outputs during reset - could not find dss_dispc hwmod\n");
214 return;
215 }
216
217 if (!oh->dev_attr) {
218 pr_err("display: could not disable outputs during reset due to missing dev_attr\n");
219 return;
220 }
221
222 da = (struct omap_dss_dispc_dev_attr *)oh->dev_attr;
223
224 /* store value of LCDENABLE and DIGITENABLE bits */
225 v = omap_hwmod_read(oh, DISPC_CONTROL);
226 lcd_en = v & LCD_EN_MASK;
227 digit_en = v & DIGIT_EN_MASK;
228
229 /* store value of LCDENABLE for LCD2 */
230 if (da->manager_count > 2) {
231 v = omap_hwmod_read(oh, DISPC_CONTROL2);
232 lcd2_en = v & LCD_EN_MASK;
233 }
234
235 if (!(lcd_en | digit_en | lcd2_en))
236 return; /* no managers currently enabled */
237
238 /*
239 * If any manager was enabled, we need to disable it before
240 * DSS clocks are disabled or DISPC module is reset
241 */
242 if (lcd_en)
243 irq_mask |= 1 << FRAMEDONE_IRQ_SHIFT;
244
245 if (digit_en) {
246 if (da->has_framedonetv_irq) {
247 irq_mask |= 1 << FRAMEDONETV_IRQ_SHIFT;
248 } else {
249 irq_mask |= 1 << EVSYNC_EVEN_IRQ_SHIFT |
250 1 << EVSYNC_ODD_IRQ_SHIFT;
251 }
252 }
253
254 if (lcd2_en)
255 irq_mask |= 1 << FRAMEDONE2_IRQ_SHIFT;
256
257 /*
258 * clear any previous FRAMEDONE, FRAMEDONETV,
259 * EVSYNC_EVEN/ODD or FRAMEDONE2 interrupts
260 */
261 omap_hwmod_write(irq_mask, oh, DISPC_IRQSTATUS);
262
263 /* disable LCD and TV managers */
264 v = omap_hwmod_read(oh, DISPC_CONTROL);
265 v &= ~(LCD_EN_MASK | DIGIT_EN_MASK);
266 omap_hwmod_write(v, oh, DISPC_CONTROL);
267
268 /* disable LCD2 manager */
269 if (da->manager_count > 2) {
270 v = omap_hwmod_read(oh, DISPC_CONTROL2);
271 v &= ~LCD_EN_MASK;
272 omap_hwmod_write(v, oh, DISPC_CONTROL2);
273 }
274
275 i = 0;
276 while ((omap_hwmod_read(oh, DISPC_IRQSTATUS) & irq_mask) !=
277 irq_mask) {
278 i++;
279 if (i > FRAMEDONE_IRQ_TIMEOUT) {
280 pr_err("didn't get FRAMEDONE1/2 or TV interrupt\n");
281 break;
282 }
283 mdelay(1);
284 }
285}
286
287#define MAX_MODULE_SOFTRESET_WAIT 10000
288int omap_dss_reset(struct omap_hwmod *oh)
289{
290 struct omap_hwmod_opt_clk *oc;
291 int c = 0;
292 int i, r;
293
294 if (!(oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)) {
295 pr_err("dss_core: hwmod data doesn't contain reset data\n");
296 return -EINVAL;
297 }
298
299 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
300 if (oc->_clk)
301 clk_enable(oc->_clk);
302
303 dispc_disable_outputs();
304
305 /* clear SDI registers */
306 if (cpu_is_omap3430()) {
307 omap_hwmod_write(0x0, oh, DSS_SDI_CONTROL);
308 omap_hwmod_write(0x0, oh, DSS_PLL_CONTROL);
309 }
310
311 /*
312 * clear DSS_CONTROL register to switch DSS clock sources to
313 * PRCM clock, if any
314 */
315 omap_hwmod_write(0x0, oh, DSS_CONTROL);
316
317 omap_test_timeout((omap_hwmod_read(oh, oh->class->sysc->syss_offs)
318 & SYSS_RESETDONE_MASK),
319 MAX_MODULE_SOFTRESET_WAIT, c);
320
321 if (c == MAX_MODULE_SOFTRESET_WAIT)
322 pr_warning("dss_core: waiting for reset to finish failed\n");
323 else
324 pr_debug("dss_core: softreset done\n");
325
326 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
327 if (oc->_clk)
328 clk_disable(oc->_clk);
329
330 r = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
331
332 return r;
333}
diff --git a/arch/arm/mach-omap2/display.h b/arch/arm/mach-omap2/display.h
new file mode 100644
index 00000000000..b871b017b35
--- /dev/null
+++ b/arch/arm/mach-omap2/display.h
@@ -0,0 +1,29 @@
1/*
2 * display.h - OMAP2+ integration-specific DSS header
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published by
8 * the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program. If not, see <http://www.gnu.org/licenses/>.
17 */
18
19#ifndef __ARCH_ARM_MACH_OMAP2_DISPLAY_H
20#define __ARCH_ARM_MACH_OMAP2_DISPLAY_H
21
22#include <linux/kernel.h>
23
24struct omap_dss_dispc_dev_attr {
25 u8 manager_count;
26 bool has_framedonetv_irq;
27};
28
29#endif
diff --git a/arch/arm/mach-omap2/io.h b/arch/arm/mach-omap2/io.h
deleted file mode 100644
index e69de29bb2d..00000000000
--- a/arch/arm/mach-omap2/io.h
+++ /dev/null
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 292eee3be15..28fcb27005d 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -145,6 +145,9 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
145 pdata->reg_size = 4; 145 pdata->reg_size = 4;
146 pdata->has_ccr = true; 146 pdata->has_ccr = true;
147 } 147 }
148 pdata->set_clk_src = omap2_mcbsp_set_clk_src;
149 if (id == 1)
150 pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
148 151
149 if (oh->class->rev == MCBSP_CONFIG_TYPE3) { 152 if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
150 if (id == 2) 153 if (id == 2)
@@ -174,9 +177,6 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
174 name, oh->name); 177 name, oh->name);
175 return PTR_ERR(pdev); 178 return PTR_ERR(pdev);
176 } 179 }
177 pdata->set_clk_src = omap2_mcbsp_set_clk_src;
178 if (id == 1)
179 pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
180 omap_mcbsp_count++; 180 omap_mcbsp_count++;
181 return 0; 181 return 0;
182} 182}
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 00fcd2c311e..529142aff76 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -749,7 +749,7 @@ static int _count_mpu_irqs(struct omap_hwmod *oh)
749 ohii = &oh->mpu_irqs[i++]; 749 ohii = &oh->mpu_irqs[i++];
750 } while (ohii->irq != -1); 750 } while (ohii->irq != -1);
751 751
752 return i; 752 return i-1;
753} 753}
754 754
755/** 755/**
@@ -772,7 +772,7 @@ static int _count_sdma_reqs(struct omap_hwmod *oh)
772 ohdi = &oh->sdma_reqs[i++]; 772 ohdi = &oh->sdma_reqs[i++];
773 } while (ohdi->dma_req != -1); 773 } while (ohdi->dma_req != -1);
774 774
775 return i; 775 return i-1;
776} 776}
777 777
778/** 778/**
@@ -795,7 +795,7 @@ static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
795 mem = &os->addr[i++]; 795 mem = &os->addr[i++];
796 } while (mem->pa_start != mem->pa_end); 796 } while (mem->pa_start != mem->pa_end);
797 797
798 return i; 798 return i-1;
799} 799}
800 800
801/** 801/**
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index 6d720621352..a5409ce3f32 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -875,6 +875,10 @@ static struct omap_hwmod_ocp_if *omap2420_dss_slaves[] = {
875}; 875};
876 876
877static struct omap_hwmod_opt_clk dss_opt_clks[] = { 877static struct omap_hwmod_opt_clk dss_opt_clks[] = {
878 /*
879 * The DSS HW needs all DSS clocks enabled during reset. The dss_core
880 * driver does not use these clocks.
881 */
878 { .role = "tv_clk", .clk = "dss_54m_fck" }, 882 { .role = "tv_clk", .clk = "dss_54m_fck" },
879 { .role = "sys_clk", .clk = "dss2_fck" }, 883 { .role = "sys_clk", .clk = "dss2_fck" },
880}; 884};
@@ -899,7 +903,7 @@ static struct omap_hwmod omap2420_dss_core_hwmod = {
899 .slaves_cnt = ARRAY_SIZE(omap2420_dss_slaves), 903 .slaves_cnt = ARRAY_SIZE(omap2420_dss_slaves),
900 .masters = omap2420_dss_masters, 904 .masters = omap2420_dss_masters,
901 .masters_cnt = ARRAY_SIZE(omap2420_dss_masters), 905 .masters_cnt = ARRAY_SIZE(omap2420_dss_masters),
902 .flags = HWMOD_NO_IDLEST, 906 .flags = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,
903}; 907};
904 908
905/* l4_core -> dss_dispc */ 909/* l4_core -> dss_dispc */
@@ -939,6 +943,7 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = {
939 .slaves = omap2420_dss_dispc_slaves, 943 .slaves = omap2420_dss_dispc_slaves,
940 .slaves_cnt = ARRAY_SIZE(omap2420_dss_dispc_slaves), 944 .slaves_cnt = ARRAY_SIZE(omap2420_dss_dispc_slaves),
941 .flags = HWMOD_NO_IDLEST, 945 .flags = HWMOD_NO_IDLEST,
946 .dev_attr = &omap2_3_dss_dispc_dev_attr
942}; 947};
943 948
944/* l4_core -> dss_rfbi */ 949/* l4_core -> dss_rfbi */
@@ -961,6 +966,10 @@ static struct omap_hwmod_ocp_if *omap2420_dss_rfbi_slaves[] = {
961 &omap2420_l4_core__dss_rfbi, 966 &omap2420_l4_core__dss_rfbi,
962}; 967};
963 968
969static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
970 { .role = "ick", .clk = "dss_ick" },
971};
972
964static struct omap_hwmod omap2420_dss_rfbi_hwmod = { 973static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
965 .name = "dss_rfbi", 974 .name = "dss_rfbi",
966 .class = &omap2_rfbi_hwmod_class, 975 .class = &omap2_rfbi_hwmod_class,
@@ -972,6 +981,8 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
972 .module_offs = CORE_MOD, 981 .module_offs = CORE_MOD,
973 }, 982 },
974 }, 983 },
984 .opt_clks = dss_rfbi_opt_clks,
985 .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks),
975 .slaves = omap2420_dss_rfbi_slaves, 986 .slaves = omap2420_dss_rfbi_slaves,
976 .slaves_cnt = ARRAY_SIZE(omap2420_dss_rfbi_slaves), 987 .slaves_cnt = ARRAY_SIZE(omap2420_dss_rfbi_slaves),
977 .flags = HWMOD_NO_IDLEST, 988 .flags = HWMOD_NO_IDLEST,
@@ -981,7 +992,7 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
981static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { 992static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
982 .master = &omap2420_l4_core_hwmod, 993 .master = &omap2420_l4_core_hwmod,
983 .slave = &omap2420_dss_venc_hwmod, 994 .slave = &omap2420_dss_venc_hwmod,
984 .clk = "dss_54m_fck", 995 .clk = "dss_ick",
985 .addr = omap2_dss_venc_addrs, 996 .addr = omap2_dss_venc_addrs,
986 .fw = { 997 .fw = {
987 .omap2 = { 998 .omap2 = {
@@ -1001,7 +1012,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_venc_slaves[] = {
1001static struct omap_hwmod omap2420_dss_venc_hwmod = { 1012static struct omap_hwmod omap2420_dss_venc_hwmod = {
1002 .name = "dss_venc", 1013 .name = "dss_venc",
1003 .class = &omap2_venc_hwmod_class, 1014 .class = &omap2_venc_hwmod_class,
1004 .main_clk = "dss1_fck", 1015 .main_clk = "dss_54m_fck",
1005 .prcm = { 1016 .prcm = {
1006 .omap2 = { 1017 .omap2 = {
1007 .prcm_reg_id = 1, 1018 .prcm_reg_id = 1,
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index a2580d01c3f..c4f56cb60d7 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -942,6 +942,10 @@ static struct omap_hwmod_ocp_if *omap2430_dss_slaves[] = {
942}; 942};
943 943
944static struct omap_hwmod_opt_clk dss_opt_clks[] = { 944static struct omap_hwmod_opt_clk dss_opt_clks[] = {
945 /*
946 * The DSS HW needs all DSS clocks enabled during reset. The dss_core
947 * driver does not use these clocks.
948 */
945 { .role = "tv_clk", .clk = "dss_54m_fck" }, 949 { .role = "tv_clk", .clk = "dss_54m_fck" },
946 { .role = "sys_clk", .clk = "dss2_fck" }, 950 { .role = "sys_clk", .clk = "dss2_fck" },
947}; 951};
@@ -966,7 +970,7 @@ static struct omap_hwmod omap2430_dss_core_hwmod = {
966 .slaves_cnt = ARRAY_SIZE(omap2430_dss_slaves), 970 .slaves_cnt = ARRAY_SIZE(omap2430_dss_slaves),
967 .masters = omap2430_dss_masters, 971 .masters = omap2430_dss_masters,
968 .masters_cnt = ARRAY_SIZE(omap2430_dss_masters), 972 .masters_cnt = ARRAY_SIZE(omap2430_dss_masters),
969 .flags = HWMOD_NO_IDLEST, 973 .flags = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,
970}; 974};
971 975
972/* l4_core -> dss_dispc */ 976/* l4_core -> dss_dispc */
@@ -1000,6 +1004,7 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = {
1000 .slaves = omap2430_dss_dispc_slaves, 1004 .slaves = omap2430_dss_dispc_slaves,
1001 .slaves_cnt = ARRAY_SIZE(omap2430_dss_dispc_slaves), 1005 .slaves_cnt = ARRAY_SIZE(omap2430_dss_dispc_slaves),
1002 .flags = HWMOD_NO_IDLEST, 1006 .flags = HWMOD_NO_IDLEST,
1007 .dev_attr = &omap2_3_dss_dispc_dev_attr
1003}; 1008};
1004 1009
1005/* l4_core -> dss_rfbi */ 1010/* l4_core -> dss_rfbi */
@@ -1016,6 +1021,10 @@ static struct omap_hwmod_ocp_if *omap2430_dss_rfbi_slaves[] = {
1016 &omap2430_l4_core__dss_rfbi, 1021 &omap2430_l4_core__dss_rfbi,
1017}; 1022};
1018 1023
1024static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
1025 { .role = "ick", .clk = "dss_ick" },
1026};
1027
1019static struct omap_hwmod omap2430_dss_rfbi_hwmod = { 1028static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
1020 .name = "dss_rfbi", 1029 .name = "dss_rfbi",
1021 .class = &omap2_rfbi_hwmod_class, 1030 .class = &omap2_rfbi_hwmod_class,
@@ -1027,6 +1036,8 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
1027 .module_offs = CORE_MOD, 1036 .module_offs = CORE_MOD,
1028 }, 1037 },
1029 }, 1038 },
1039 .opt_clks = dss_rfbi_opt_clks,
1040 .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks),
1030 .slaves = omap2430_dss_rfbi_slaves, 1041 .slaves = omap2430_dss_rfbi_slaves,
1031 .slaves_cnt = ARRAY_SIZE(omap2430_dss_rfbi_slaves), 1042 .slaves_cnt = ARRAY_SIZE(omap2430_dss_rfbi_slaves),
1032 .flags = HWMOD_NO_IDLEST, 1043 .flags = HWMOD_NO_IDLEST,
@@ -1036,7 +1047,7 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
1036static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { 1047static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
1037 .master = &omap2430_l4_core_hwmod, 1048 .master = &omap2430_l4_core_hwmod,
1038 .slave = &omap2430_dss_venc_hwmod, 1049 .slave = &omap2430_dss_venc_hwmod,
1039 .clk = "dss_54m_fck", 1050 .clk = "dss_ick",
1040 .addr = omap2_dss_venc_addrs, 1051 .addr = omap2_dss_venc_addrs,
1041 .flags = OCPIF_SWSUP_IDLE, 1052 .flags = OCPIF_SWSUP_IDLE,
1042 .user = OCP_USER_MPU | OCP_USER_SDMA, 1053 .user = OCP_USER_MPU | OCP_USER_SDMA,
@@ -1050,7 +1061,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_venc_slaves[] = {
1050static struct omap_hwmod omap2430_dss_venc_hwmod = { 1061static struct omap_hwmod omap2430_dss_venc_hwmod = {
1051 .name = "dss_venc", 1062 .name = "dss_venc",
1052 .class = &omap2_venc_hwmod_class, 1063 .class = &omap2_venc_hwmod_class,
1053 .main_clk = "dss1_fck", 1064 .main_clk = "dss_54m_fck",
1054 .prcm = { 1065 .prcm = {
1055 .omap2 = { 1066 .omap2 = {
1056 .prcm_reg_id = 1, 1067 .prcm_reg_id = 1,
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
index c451729d289..c11273da5dc 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
@@ -11,6 +11,7 @@
11#include <plat/omap_hwmod.h> 11#include <plat/omap_hwmod.h>
12#include <plat/serial.h> 12#include <plat/serial.h>
13#include <plat/dma.h> 13#include <plat/dma.h>
14#include <plat/common.h>
14 15
15#include <mach/irqs.h> 16#include <mach/irqs.h>
16 17
@@ -43,13 +44,15 @@ static struct omap_hwmod_class_sysconfig omap2_dss_sysc = {
43 .rev_offs = 0x0000, 44 .rev_offs = 0x0000,
44 .sysc_offs = 0x0010, 45 .sysc_offs = 0x0010,
45 .syss_offs = 0x0014, 46 .syss_offs = 0x0014,
46 .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), 47 .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
48 SYSS_HAS_RESET_STATUS),
47 .sysc_fields = &omap_hwmod_sysc_type1, 49 .sysc_fields = &omap_hwmod_sysc_type1,
48}; 50};
49 51
50struct omap_hwmod_class omap2_dss_hwmod_class = { 52struct omap_hwmod_class omap2_dss_hwmod_class = {
51 .name = "dss", 53 .name = "dss",
52 .sysc = &omap2_dss_sysc, 54 .sysc = &omap2_dss_sysc,
55 .reset = omap_dss_reset,
53}; 56};
54 57
55/* 58/*
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index bc9035ec87f..7f8915ad509 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1369,9 +1369,14 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_slaves[] = {
1369}; 1369};
1370 1370
1371static struct omap_hwmod_opt_clk dss_opt_clks[] = { 1371static struct omap_hwmod_opt_clk dss_opt_clks[] = {
1372 { .role = "tv_clk", .clk = "dss_tv_fck" }, 1372 /*
1373 { .role = "video_clk", .clk = "dss_96m_fck" }, 1373 * The DSS HW needs all DSS clocks enabled during reset. The dss_core
1374 * driver does not use these clocks.
1375 */
1374 { .role = "sys_clk", .clk = "dss2_alwon_fck" }, 1376 { .role = "sys_clk", .clk = "dss2_alwon_fck" },
1377 { .role = "tv_clk", .clk = "dss_tv_fck" },
1378 /* required only on OMAP3430 */
1379 { .role = "tv_dac_clk", .clk = "dss_96m_fck" },
1375}; 1380};
1376 1381
1377static struct omap_hwmod omap3430es1_dss_core_hwmod = { 1382static struct omap_hwmod omap3430es1_dss_core_hwmod = {
@@ -1394,11 +1399,12 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = {
1394 .slaves_cnt = ARRAY_SIZE(omap3430es1_dss_slaves), 1399 .slaves_cnt = ARRAY_SIZE(omap3430es1_dss_slaves),
1395 .masters = omap3xxx_dss_masters, 1400 .masters = omap3xxx_dss_masters,
1396 .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters), 1401 .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters),
1397 .flags = HWMOD_NO_IDLEST, 1402 .flags = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1398}; 1403};
1399 1404
1400static struct omap_hwmod omap3xxx_dss_core_hwmod = { 1405static struct omap_hwmod omap3xxx_dss_core_hwmod = {
1401 .name = "dss_core", 1406 .name = "dss_core",
1407 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1402 .class = &omap2_dss_hwmod_class, 1408 .class = &omap2_dss_hwmod_class,
1403 .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ 1409 .main_clk = "dss1_alwon_fck", /* instead of dss_fck */
1404 .sdma_reqs = omap3xxx_dss_sdma_chs, 1410 .sdma_reqs = omap3xxx_dss_sdma_chs,
@@ -1456,6 +1462,7 @@ static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
1456 .slaves = omap3xxx_dss_dispc_slaves, 1462 .slaves = omap3xxx_dss_dispc_slaves,
1457 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dispc_slaves), 1463 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dispc_slaves),
1458 .flags = HWMOD_NO_IDLEST, 1464 .flags = HWMOD_NO_IDLEST,
1465 .dev_attr = &omap2_3_dss_dispc_dev_attr
1459}; 1466};
1460 1467
1461/* 1468/*
@@ -1486,6 +1493,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = {
1486static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dsi1 = { 1493static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dsi1 = {
1487 .master = &omap3xxx_l4_core_hwmod, 1494 .master = &omap3xxx_l4_core_hwmod,
1488 .slave = &omap3xxx_dss_dsi1_hwmod, 1495 .slave = &omap3xxx_dss_dsi1_hwmod,
1496 .clk = "dss_ick",
1489 .addr = omap3xxx_dss_dsi1_addrs, 1497 .addr = omap3xxx_dss_dsi1_addrs,
1490 .fw = { 1498 .fw = {
1491 .omap2 = { 1499 .omap2 = {
@@ -1502,6 +1510,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dsi1_slaves[] = {
1502 &omap3xxx_l4_core__dss_dsi1, 1510 &omap3xxx_l4_core__dss_dsi1,
1503}; 1511};
1504 1512
1513static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = {
1514 { .role = "sys_clk", .clk = "dss2_alwon_fck" },
1515};
1516
1505static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = { 1517static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
1506 .name = "dss_dsi1", 1518 .name = "dss_dsi1",
1507 .class = &omap3xxx_dsi_hwmod_class, 1519 .class = &omap3xxx_dsi_hwmod_class,
@@ -1514,6 +1526,8 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
1514 .module_offs = OMAP3430_DSS_MOD, 1526 .module_offs = OMAP3430_DSS_MOD,
1515 }, 1527 },
1516 }, 1528 },
1529 .opt_clks = dss_dsi1_opt_clks,
1530 .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_opt_clks),
1517 .slaves = omap3xxx_dss_dsi1_slaves, 1531 .slaves = omap3xxx_dss_dsi1_slaves,
1518 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dsi1_slaves), 1532 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dsi1_slaves),
1519 .flags = HWMOD_NO_IDLEST, 1533 .flags = HWMOD_NO_IDLEST,
@@ -1540,6 +1554,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_rfbi_slaves[] = {
1540 &omap3xxx_l4_core__dss_rfbi, 1554 &omap3xxx_l4_core__dss_rfbi,
1541}; 1555};
1542 1556
1557static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
1558 { .role = "ick", .clk = "dss_ick" },
1559};
1560
1543static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = { 1561static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
1544 .name = "dss_rfbi", 1562 .name = "dss_rfbi",
1545 .class = &omap2_rfbi_hwmod_class, 1563 .class = &omap2_rfbi_hwmod_class,
@@ -1551,6 +1569,8 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
1551 .module_offs = OMAP3430_DSS_MOD, 1569 .module_offs = OMAP3430_DSS_MOD,
1552 }, 1570 },
1553 }, 1571 },
1572 .opt_clks = dss_rfbi_opt_clks,
1573 .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks),
1554 .slaves = omap3xxx_dss_rfbi_slaves, 1574 .slaves = omap3xxx_dss_rfbi_slaves,
1555 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_rfbi_slaves), 1575 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_rfbi_slaves),
1556 .flags = HWMOD_NO_IDLEST, 1576 .flags = HWMOD_NO_IDLEST,
@@ -1560,7 +1580,7 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
1560static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { 1580static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {
1561 .master = &omap3xxx_l4_core_hwmod, 1581 .master = &omap3xxx_l4_core_hwmod,
1562 .slave = &omap3xxx_dss_venc_hwmod, 1582 .slave = &omap3xxx_dss_venc_hwmod,
1563 .clk = "dss_tv_fck", 1583 .clk = "dss_ick",
1564 .addr = omap2_dss_venc_addrs, 1584 .addr = omap2_dss_venc_addrs,
1565 .fw = { 1585 .fw = {
1566 .omap2 = { 1586 .omap2 = {
@@ -1578,10 +1598,15 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_venc_slaves[] = {
1578 &omap3xxx_l4_core__dss_venc, 1598 &omap3xxx_l4_core__dss_venc,
1579}; 1599};
1580 1600
1601static struct omap_hwmod_opt_clk dss_venc_opt_clks[] = {
1602 /* required only on OMAP3430 */
1603 { .role = "tv_dac_clk", .clk = "dss_96m_fck" },
1604};
1605
1581static struct omap_hwmod omap3xxx_dss_venc_hwmod = { 1606static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
1582 .name = "dss_venc", 1607 .name = "dss_venc",
1583 .class = &omap2_venc_hwmod_class, 1608 .class = &omap2_venc_hwmod_class,
1584 .main_clk = "dss1_alwon_fck", 1609 .main_clk = "dss_tv_fck",
1585 .prcm = { 1610 .prcm = {
1586 .omap2 = { 1611 .omap2 = {
1587 .prcm_reg_id = 1, 1612 .prcm_reg_id = 1,
@@ -1589,6 +1614,8 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
1589 .module_offs = OMAP3430_DSS_MOD, 1614 .module_offs = OMAP3430_DSS_MOD,
1590 }, 1615 },
1591 }, 1616 },
1617 .opt_clks = dss_venc_opt_clks,
1618 .opt_clks_cnt = ARRAY_SIZE(dss_venc_opt_clks),
1592 .slaves = omap3xxx_dss_venc_slaves, 1619 .slaves = omap3xxx_dss_venc_slaves,
1593 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_venc_slaves), 1620 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_venc_slaves),
1594 .flags = HWMOD_NO_IDLEST, 1621 .flags = HWMOD_NO_IDLEST,
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 7695e5d4331..daaf165af69 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -30,6 +30,7 @@
30#include <plat/mmc.h> 30#include <plat/mmc.h>
31#include <plat/i2c.h> 31#include <plat/i2c.h>
32#include <plat/dmtimer.h> 32#include <plat/dmtimer.h>
33#include <plat/common.h>
33 34
34#include "omap_hwmod_common_data.h" 35#include "omap_hwmod_common_data.h"
35 36
@@ -1187,6 +1188,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_dss_sysc = {
1187static struct omap_hwmod_class omap44xx_dss_hwmod_class = { 1188static struct omap_hwmod_class omap44xx_dss_hwmod_class = {
1188 .name = "dss", 1189 .name = "dss",
1189 .sysc = &omap44xx_dss_sysc, 1190 .sysc = &omap44xx_dss_sysc,
1191 .reset = omap_dss_reset,
1190}; 1192};
1191 1193
1192/* dss */ 1194/* dss */
@@ -1240,12 +1242,12 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_slaves[] = {
1240static struct omap_hwmod_opt_clk dss_opt_clks[] = { 1242static struct omap_hwmod_opt_clk dss_opt_clks[] = {
1241 { .role = "sys_clk", .clk = "dss_sys_clk" }, 1243 { .role = "sys_clk", .clk = "dss_sys_clk" },
1242 { .role = "tv_clk", .clk = "dss_tv_clk" }, 1244 { .role = "tv_clk", .clk = "dss_tv_clk" },
1243 { .role = "dss_clk", .clk = "dss_dss_clk" }, 1245 { .role = "hdmi_clk", .clk = "dss_48mhz_clk" },
1244 { .role = "video_clk", .clk = "dss_48mhz_clk" },
1245}; 1246};
1246 1247
1247static struct omap_hwmod omap44xx_dss_hwmod = { 1248static struct omap_hwmod omap44xx_dss_hwmod = {
1248 .name = "dss_core", 1249 .name = "dss_core",
1250 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1249 .class = &omap44xx_dss_hwmod_class, 1251 .class = &omap44xx_dss_hwmod_class,
1250 .clkdm_name = "l3_dss_clkdm", 1252 .clkdm_name = "l3_dss_clkdm",
1251 .main_clk = "dss_dss_clk", 1253 .main_clk = "dss_dss_clk",
@@ -1325,6 +1327,11 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_addrs[] = {
1325 { } 1327 { }
1326}; 1328};
1327 1329
1330static struct omap_dss_dispc_dev_attr omap44xx_dss_dispc_dev_attr = {
1331 .manager_count = 3,
1332 .has_framedonetv_irq = 1
1333};
1334
1328/* l4_per -> dss_dispc */ 1335/* l4_per -> dss_dispc */
1329static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = { 1336static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = {
1330 .master = &omap44xx_l4_per_hwmod, 1337 .master = &omap44xx_l4_per_hwmod,
@@ -1340,12 +1347,6 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dispc_slaves[] = {
1340 &omap44xx_l4_per__dss_dispc, 1347 &omap44xx_l4_per__dss_dispc,
1341}; 1348};
1342 1349
1343static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = {
1344 { .role = "sys_clk", .clk = "dss_sys_clk" },
1345 { .role = "tv_clk", .clk = "dss_tv_clk" },
1346 { .role = "hdmi_clk", .clk = "dss_48mhz_clk" },
1347};
1348
1349static struct omap_hwmod omap44xx_dss_dispc_hwmod = { 1350static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
1350 .name = "dss_dispc", 1351 .name = "dss_dispc",
1351 .class = &omap44xx_dispc_hwmod_class, 1352 .class = &omap44xx_dispc_hwmod_class,
@@ -1359,10 +1360,9 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
1359 .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, 1360 .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET,
1360 }, 1361 },
1361 }, 1362 },
1362 .opt_clks = dss_dispc_opt_clks,
1363 .opt_clks_cnt = ARRAY_SIZE(dss_dispc_opt_clks),
1364 .slaves = omap44xx_dss_dispc_slaves, 1363 .slaves = omap44xx_dss_dispc_slaves,
1365 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves), 1364 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves),
1365 .dev_attr = &omap44xx_dss_dispc_dev_attr
1366}; 1366};
1367 1367
1368/* 1368/*
@@ -1624,7 +1624,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
1624 .clkdm_name = "l3_dss_clkdm", 1624 .clkdm_name = "l3_dss_clkdm",
1625 .mpu_irqs = omap44xx_dss_hdmi_irqs, 1625 .mpu_irqs = omap44xx_dss_hdmi_irqs,
1626 .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, 1626 .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs,
1627 .main_clk = "dss_dss_clk", 1627 .main_clk = "dss_48mhz_clk",
1628 .prcm = { 1628 .prcm = {
1629 .omap4 = { 1629 .omap4 = {
1630 .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, 1630 .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
@@ -1785,7 +1785,7 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = {
1785 .name = "dss_venc", 1785 .name = "dss_venc",
1786 .class = &omap44xx_venc_hwmod_class, 1786 .class = &omap44xx_venc_hwmod_class,
1787 .clkdm_name = "l3_dss_clkdm", 1787 .clkdm_name = "l3_dss_clkdm",
1788 .main_clk = "dss_dss_clk", 1788 .main_clk = "dss_tv_clk",
1789 .prcm = { 1789 .prcm = {
1790 .omap4 = { 1790 .omap4 = {
1791 .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, 1791 .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.c b/arch/arm/mach-omap2/omap_hwmod_common_data.c
index de832ebc93a..51e5418899f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.c
@@ -49,3 +49,7 @@ struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2 = {
49 .srst_shift = SYSC_TYPE2_SOFTRESET_SHIFT, 49 .srst_shift = SYSC_TYPE2_SOFTRESET_SHIFT,
50}; 50};
51 51
52struct omap_dss_dispc_dev_attr omap2_3_dss_dispc_dev_attr = {
53 .manager_count = 2,
54 .has_framedonetv_irq = 0
55};
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h
index 39a7c37f458..ad5d8f04c0b 100644
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.h
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h
@@ -16,6 +16,8 @@
16 16
17#include <plat/omap_hwmod.h> 17#include <plat/omap_hwmod.h>
18 18
19#include "display.h"
20
19/* Common address space across OMAP2xxx */ 21/* Common address space across OMAP2xxx */
20extern struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[]; 22extern struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[];
21extern struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[]; 23extern struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[];
@@ -111,4 +113,6 @@ extern struct omap_hwmod_class omap2xxx_dma_hwmod_class;
111extern struct omap_hwmod_class omap2xxx_mailbox_hwmod_class; 113extern struct omap_hwmod_class omap2xxx_mailbox_hwmod_class;
112extern struct omap_hwmod_class omap2xxx_mcspi_class; 114extern struct omap_hwmod_class omap2xxx_mcspi_class;
113 115
116extern struct omap_dss_dispc_dev_attr omap2_3_dss_dispc_dev_attr;
117
114#endif 118#endif
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c
index 6a66aa5e2a5..d15225ff5c4 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.c
+++ b/arch/arm/mach-omap2/omap_l3_noc.c
@@ -237,7 +237,7 @@ static int __devexit omap4_l3_remove(struct platform_device *pdev)
237static const struct of_device_id l3_noc_match[] = { 237static const struct of_device_id l3_noc_match[] = {
238 {.compatible = "ti,omap4-l3-noc", }, 238 {.compatible = "ti,omap4-l3-noc", },
239 {}, 239 {},
240} 240};
241MODULE_DEVICE_TABLE(of, l3_noc_match); 241MODULE_DEVICE_TABLE(of, l3_noc_match);
242#else 242#else
243#define l3_noc_match NULL 243#define l3_noc_match NULL
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index e7bee5ca407..1881fe91514 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -24,6 +24,7 @@
24#include "powerdomain.h" 24#include "powerdomain.h"
25#include "clockdomain.h" 25#include "clockdomain.h"
26#include "pm.h" 26#include "pm.h"
27#include "twl-common.h"
27 28
28static struct omap_device_pm_latency *pm_lats; 29static struct omap_device_pm_latency *pm_lats;
29 30
@@ -226,11 +227,8 @@ postcore_initcall(omap2_common_pm_init);
226 227
227static int __init omap2_common_pm_late_init(void) 228static int __init omap2_common_pm_late_init(void)
228{ 229{
229 /* Init the OMAP TWL parameters */
230 omap3_twl_init();
231 omap4_twl_init();
232
233 /* Init the voltage layer */ 230 /* Init the voltage layer */
231 omap_pmic_late_init();
234 omap_voltage_late_init(); 232 omap_voltage_late_init();
235 233
236 /* Initialize the voltages */ 234 /* Initialize the voltages */
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 919d827ed70..9dd93453e56 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -139,7 +139,7 @@ static irqreturn_t sr_interrupt(int irq, void *data)
139 sr_write_reg(sr_info, ERRCONFIG_V1, status); 139 sr_write_reg(sr_info, ERRCONFIG_V1, status);
140 } else if (sr_info->ip_type == SR_TYPE_V2) { 140 } else if (sr_info->ip_type == SR_TYPE_V2) {
141 /* Read the status bits */ 141 /* Read the status bits */
142 sr_read_reg(sr_info, IRQSTATUS); 142 status = sr_read_reg(sr_info, IRQSTATUS);
143 143
144 /* Clear them by writing back */ 144 /* Clear them by writing back */
145 sr_write_reg(sr_info, IRQSTATUS, status); 145 sr_write_reg(sr_info, IRQSTATUS, status);
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 52243577216..10b20c652e5 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -30,6 +30,7 @@
30#include <plat/usb.h> 30#include <plat/usb.h>
31 31
32#include "twl-common.h" 32#include "twl-common.h"
33#include "pm.h"
33 34
34static struct i2c_board_info __initdata pmic_i2c_board_info = { 35static struct i2c_board_info __initdata pmic_i2c_board_info = {
35 .addr = 0x48, 36 .addr = 0x48,
@@ -48,6 +49,16 @@ void __init omap_pmic_init(int bus, u32 clkrate,
48 omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); 49 omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
49} 50}
50 51
52void __init omap_pmic_late_init(void)
53{
54 /* Init the OMAP TWL parameters (if PMIC has been registerd) */
55 if (!pmic_i2c_board_info.irq)
56 return;
57
58 omap3_twl_init();
59 omap4_twl_init();
60}
61
51#if defined(CONFIG_ARCH_OMAP3) 62#if defined(CONFIG_ARCH_OMAP3)
52static struct twl4030_usb_data omap3_usb_pdata = { 63static struct twl4030_usb_data omap3_usb_pdata = {
53 .usb_mode = T2_USB_MODE_ULPI, 64 .usb_mode = T2_USB_MODE_ULPI,
diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h
index 5e83a5bd37f..275dde8cb27 100644
--- a/arch/arm/mach-omap2/twl-common.h
+++ b/arch/arm/mach-omap2/twl-common.h
@@ -1,6 +1,8 @@
1#ifndef __OMAP_PMIC_COMMON__ 1#ifndef __OMAP_PMIC_COMMON__
2#define __OMAP_PMIC_COMMON__ 2#define __OMAP_PMIC_COMMON__
3 3
4#include <plat/irqs.h>
5
4#define TWL_COMMON_PDATA_USB (1 << 0) 6#define TWL_COMMON_PDATA_USB (1 << 0)
5#define TWL_COMMON_PDATA_BCI (1 << 1) 7#define TWL_COMMON_PDATA_BCI (1 << 1)
6#define TWL_COMMON_PDATA_MADC (1 << 2) 8#define TWL_COMMON_PDATA_MADC (1 << 2)
@@ -30,6 +32,7 @@ struct twl4030_platform_data;
30 32
31void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, 33void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq,
32 struct twl4030_platform_data *pmic_data); 34 struct twl4030_platform_data *pmic_data);
35void omap_pmic_late_init(void);
33 36
34static inline void omap2_pmic_init(const char *pmic_type, 37static inline void omap2_pmic_init(const char *pmic_type,
35 struct twl4030_platform_data *pmic_data) 38 struct twl4030_platform_data *pmic_data)
diff --git a/arch/arm/mach-picoxcell/include/mach/debug-macro.S b/arch/arm/mach-picoxcell/include/mach/debug-macro.S
index 8f2c234ed9d..58d4ee3ae94 100644
--- a/arch/arm/mach-picoxcell/include/mach/debug-macro.S
+++ b/arch/arm/mach-picoxcell/include/mach/debug-macro.S
@@ -14,7 +14,7 @@
14 14
15#define UART_SHIFT 2 15#define UART_SHIFT 2
16 16
17 .macro addruart, rp, rv 17 .macro addruart, rp, rv, tmp
18 ldr \rv, =PHYS_TO_IO(PICOXCELL_UART1_BASE) 18 ldr \rv, =PHYS_TO_IO(PICOXCELL_UART1_BASE)
19 ldr \rp, =PICOXCELL_UART1_BASE 19 ldr \rp, =PICOXCELL_UART1_BASE
20 .endm 20 .endm
diff --git a/arch/arm/mach-prima2/pm.c b/arch/arm/mach-prima2/pm.c
index cb53160f6c5..26ebb57719d 100644
--- a/arch/arm/mach-prima2/pm.c
+++ b/arch/arm/mach-prima2/pm.c
@@ -9,6 +9,7 @@
9#include <linux/kernel.h> 9#include <linux/kernel.h>
10#include <linux/suspend.h> 10#include <linux/suspend.h>
11#include <linux/slab.h> 11#include <linux/slab.h>
12#include <linux/module.h>
12#include <linux/of.h> 13#include <linux/of.h>
13#include <linux/of_address.h> 14#include <linux/of_address.h>
14#include <linux/of_device.h> 15#include <linux/of_device.h>
diff --git a/arch/arm/mach-prima2/prima2.c b/arch/arm/mach-prima2/prima2.c
index ef555c04196..a12b689a870 100644
--- a/arch/arm/mach-prima2/prima2.c
+++ b/arch/arm/mach-prima2/prima2.c
@@ -8,6 +8,7 @@
8 8
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <asm/sizes.h>
11#include <asm/mach-types.h> 12#include <asm/mach-types.h>
12#include <asm/mach/arch.h> 13#include <asm/mach/arch.h>
13#include <linux/of.h> 14#include <linux/of.h>
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index fc0b8544e17..4b81f59a4cb 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -307,7 +307,7 @@ static inline void balloon3_mmc_init(void) {}
307/****************************************************************************** 307/******************************************************************************
308 * USB Gadget 308 * USB Gadget
309 ******************************************************************************/ 309 ******************************************************************************/
310#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE) 310#if defined(CONFIG_USB_PXA27X)||defined(CONFIG_USB_PXA27X_MODULE)
311static void balloon3_udc_command(int cmd) 311static void balloon3_udc_command(int cmd)
312{ 312{
313 if (cmd == PXA2XX_UDC_CMD_CONNECT) 313 if (cmd == PXA2XX_UDC_CMD_CONNECT)
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
index 692e1ffc558..d23b92b8048 100644
--- a/arch/arm/mach-pxa/colibri-pxa320.c
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -146,7 +146,7 @@ static void __init colibri_pxa320_init_eth(void)
146static inline void __init colibri_pxa320_init_eth(void) {} 146static inline void __init colibri_pxa320_init_eth(void) {}
147#endif /* CONFIG_AX88796 */ 147#endif /* CONFIG_AX88796 */
148 148
149#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE) 149#if defined(CONFIG_USB_PXA27X)||defined(CONFIG_USB_PXA27X_MODULE)
150static struct gpio_vbus_mach_info colibri_pxa320_gpio_vbus_info = { 150static struct gpio_vbus_mach_info colibri_pxa320_gpio_vbus_info = {
151 .gpio_vbus = mfp_to_gpio(MFP_PIN_GPIO96), 151 .gpio_vbus = mfp_to_gpio(MFP_PIN_GPIO96),
152 .gpio_pullup = -1, 152 .gpio_pullup = -1,
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index 9c8208ca041..ffdd70dad32 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -106,7 +106,7 @@ static void __init gumstix_mmc_init(void)
106} 106}
107#endif 107#endif
108 108
109#ifdef CONFIG_USB_GADGET_PXA25X 109#ifdef CONFIG_USB_PXA25X
110static struct gpio_vbus_mach_info gumstix_udc_info = { 110static struct gpio_vbus_mach_info gumstix_udc_info = {
111 .gpio_vbus = GPIO_GUMSTIX_USB_GPIOn, 111 .gpio_vbus = GPIO_GUMSTIX_USB_GPIOn,
112 .gpio_pullup = GPIO_GUMSTIX_USB_GPIOx, 112 .gpio_pullup = GPIO_GUMSTIX_USB_GPIOx,
diff --git a/arch/arm/mach-pxa/include/mach/palm27x.h b/arch/arm/mach-pxa/include/mach/palm27x.h
index f80bbe246af..d4eac3d6ffb 100644
--- a/arch/arm/mach-pxa/include/mach/palm27x.h
+++ b/arch/arm/mach-pxa/include/mach/palm27x.h
@@ -37,8 +37,8 @@ extern void __init palm27x_lcd_init(int power,
37#define palm27x_lcd_init(power, mode) do {} while (0) 37#define palm27x_lcd_init(power, mode) do {} while (0)
38#endif 38#endif
39 39
40#if defined(CONFIG_USB_GADGET_PXA27X) || \ 40#if defined(CONFIG_USB_PXA27X) || \
41 defined(CONFIG_USB_GADGET_PXA27X_MODULE) 41 defined(CONFIG_USB_PXA27X_MODULE)
42extern void __init palm27x_udc_init(int vbus, int pullup, 42extern void __init palm27x_udc_init(int vbus, int pullup,
43 int vbus_inverted); 43 int vbus_inverted);
44#else 44#else
diff --git a/arch/arm/mach-pxa/palm27x.c b/arch/arm/mach-pxa/palm27x.c
index 325c245c0a0..fbc10d7b95d 100644
--- a/arch/arm/mach-pxa/palm27x.c
+++ b/arch/arm/mach-pxa/palm27x.c
@@ -164,8 +164,8 @@ void __init palm27x_lcd_init(int power, struct pxafb_mode_info *mode)
164/****************************************************************************** 164/******************************************************************************
165 * USB Gadget 165 * USB Gadget
166 ******************************************************************************/ 166 ******************************************************************************/
167#if defined(CONFIG_USB_GADGET_PXA27X) || \ 167#if defined(CONFIG_USB_PXA27X) || \
168 defined(CONFIG_USB_GADGET_PXA27X_MODULE) 168 defined(CONFIG_USB_PXA27X_MODULE)
169static struct gpio_vbus_mach_info palm27x_udc_info = { 169static struct gpio_vbus_mach_info palm27x_udc_info = {
170 .gpio_vbus_inverted = 1, 170 .gpio_vbus_inverted = 1,
171}; 171};
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index 6ec7caefb37..2c24c67fd92 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -338,7 +338,7 @@ static inline void palmtc_mkp_init(void) {}
338/****************************************************************************** 338/******************************************************************************
339 * UDC 339 * UDC
340 ******************************************************************************/ 340 ******************************************************************************/
341#if defined(CONFIG_USB_GADGET_PXA25X)||defined(CONFIG_USB_GADGET_PXA25X_MODULE) 341#if defined(CONFIG_USB_PXA25X)||defined(CONFIG_USB_PXA25X_MODULE)
342static struct gpio_vbus_mach_info palmtc_udc_info = { 342static struct gpio_vbus_mach_info palmtc_udc_info = {
343 .gpio_vbus = GPIO_NR_PALMTC_USB_DETECT_N, 343 .gpio_vbus = GPIO_NR_PALMTC_USB_DETECT_N,
344 .gpio_vbus_inverted = 1, 344 .gpio_vbus_inverted = 1,
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index a7539a6ed1f..ca0c6615028 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -343,7 +343,7 @@ static inline void vpac270_uhc_init(void) {}
343/****************************************************************************** 343/******************************************************************************
344 * USB Gadget 344 * USB Gadget
345 ******************************************************************************/ 345 ******************************************************************************/
346#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE) 346#if defined(CONFIG_USB_PXA27X)||defined(CONFIG_USB_PXA27X_MODULE)
347static struct gpio_vbus_mach_info vpac270_gpio_vbus_info = { 347static struct gpio_vbus_mach_info vpac270_gpio_vbus_info = {
348 .gpio_vbus = GPIO41_VPAC270_UDC_DETECT, 348 .gpio_vbus = GPIO41_VPAC270_UDC_DETECT,
349 .gpio_pullup = -1, 349 .gpio_pullup = -1,
diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c
index 5e6b42089eb..3341fd11872 100644
--- a/arch/arm/mach-s3c64xx/dev-spi.c
+++ b/arch/arm/mach-s3c64xx/dev-spi.c
@@ -10,6 +10,7 @@
10 10
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/string.h> 12#include <linux/string.h>
13#include <linux/export.h>
13#include <linux/platform_device.h> 14#include <linux/platform_device.h>
14#include <linux/dma-mapping.h> 15#include <linux/dma-mapping.h>
15#include <linux/gpio.h> 16#include <linux/gpio.h>
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
index 66668565ee7..f208154b138 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
@@ -8,7 +8,7 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#include <linux/module.h> 11#include <linux/export.h>
12#include <linux/interrupt.h> 12#include <linux/interrupt.h>
13#include <linux/i2c.h> 13#include <linux/i2c.h>
14 14
diff --git a/arch/arm/mach-s3c64xx/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c
index 33366581998..b1e1571f2f6 100644
--- a/arch/arm/mach-s3c64xx/s3c6400.c
+++ b/arch/arm/mach-s3c64xx/s3c6400.c
@@ -71,7 +71,7 @@ void __init s3c6400_init_irq(void)
71 s3c64xx_init_irq(~0 & ~(0xf << 5), ~0); 71 s3c64xx_init_irq(~0 & ~(0xf << 5), ~0);
72} 72}
73 73
74struct sysdev_class s3c6400_sysclass = { 74static struct sysdev_class s3c6400_sysclass = {
75 .name = "s3c6400-core", 75 .name = "s3c6400-core",
76}; 76};
77 77
diff --git a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
index 83d2afb79e9..2cf80026c58 100644
--- a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
+++ b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
@@ -20,7 +20,7 @@
20#include <plat/fb.h> 20#include <plat/fb.h>
21#include <plat/gpio-cfg.h> 21#include <plat/gpio-cfg.h>
22 22
23extern void s3c64xx_fb_gpio_setup_24bpp(void) 23void s3c64xx_fb_gpio_setup_24bpp(void)
24{ 24{
25 s3c_gpio_cfgrange_nopull(S3C64XX_GPI(0), 16, S3C_GPIO_SFN(2)); 25 s3c_gpio_cfgrange_nopull(S3C64XX_GPI(0), 16, S3C_GPIO_SFN(2));
26 s3c_gpio_cfgrange_nopull(S3C64XX_GPJ(0), 12, S3C_GPIO_SFN(2)); 26 s3c_gpio_cfgrange_nopull(S3C64XX_GPJ(0), 12, S3C_GPIO_SFN(2));
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index bc35e8261e5..194c3b0626b 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -274,6 +274,7 @@ static struct samsung_bl_gpio_info smdkv210_bl_gpio_info = {
274 274
275static struct platform_pwm_backlight_data smdkv210_bl_data = { 275static struct platform_pwm_backlight_data smdkv210_bl_data = {
276 .pwm_id = 3, 276 .pwm_id = 3,
277 .pwm_period_ns = 1000,
277}; 278};
278 279
279static void __init smdkv210_map_io(void) 280static void __init smdkv210_map_io(void)
diff --git a/arch/arm/mach-sa1100/Makefile.boot b/arch/arm/mach-sa1100/Makefile.boot
index 5a616f6e561..f7951aa0456 100644
--- a/arch/arm/mach-sa1100/Makefile.boot
+++ b/arch/arm/mach-sa1100/Makefile.boot
@@ -1,5 +1,5 @@
1ifeq ($(CONFIG_ARCH_SA1100),y) 1ifeq ($(CONFIG_SA1111),y)
2 zreladdr-$(CONFIG_SA1111) += 0xc0208000 2 zreladdr-y += 0xc0208000
3else 3else
4 zreladdr-y += 0xc0008000 4 zreladdr-y += 0xc0008000
5endif 5endif
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 2aec2f73251..737bdc631b0 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5# Common objects 5# Common objects
6obj-y := timer.o console.o clock.o pm_runtime.o 6obj-y := timer.o console.o clock.o
7 7
8# CPU objects 8# CPU objects
9obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o intc-sh7367.o 9obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o intc-sh7367.o
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index 83624e26b88..7119b87cbfa 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -515,14 +515,14 @@ static void __init ag5evm_init(void)
515 /* enable MMCIF */ 515 /* enable MMCIF */
516 gpio_request(GPIO_FN_MMCCLK0, NULL); 516 gpio_request(GPIO_FN_MMCCLK0, NULL);
517 gpio_request(GPIO_FN_MMCCMD0_PU, NULL); 517 gpio_request(GPIO_FN_MMCCMD0_PU, NULL);
518 gpio_request(GPIO_FN_MMCD0_0, NULL); 518 gpio_request(GPIO_FN_MMCD0_0_PU, NULL);
519 gpio_request(GPIO_FN_MMCD0_1, NULL); 519 gpio_request(GPIO_FN_MMCD0_1_PU, NULL);
520 gpio_request(GPIO_FN_MMCD0_2, NULL); 520 gpio_request(GPIO_FN_MMCD0_2_PU, NULL);
521 gpio_request(GPIO_FN_MMCD0_3, NULL); 521 gpio_request(GPIO_FN_MMCD0_3_PU, NULL);
522 gpio_request(GPIO_FN_MMCD0_4, NULL); 522 gpio_request(GPIO_FN_MMCD0_4_PU, NULL);
523 gpio_request(GPIO_FN_MMCD0_5, NULL); 523 gpio_request(GPIO_FN_MMCD0_5_PU, NULL);
524 gpio_request(GPIO_FN_MMCD0_6, NULL); 524 gpio_request(GPIO_FN_MMCD0_6_PU, NULL);
525 gpio_request(GPIO_FN_MMCD0_7, NULL); 525 gpio_request(GPIO_FN_MMCD0_7_PU, NULL);
526 gpio_request(GPIO_PORT208, NULL); /* Reset */ 526 gpio_request(GPIO_PORT208, NULL); /* Reset */
527 gpio_direction_output(GPIO_PORT208, 1); 527 gpio_direction_output(GPIO_PORT208, 1);
528 528
@@ -607,6 +607,7 @@ struct sys_timer ag5evm_timer = {
607 607
608MACHINE_START(AG5EVM, "ag5evm") 608MACHINE_START(AG5EVM, "ag5evm")
609 .map_io = ag5evm_map_io, 609 .map_io = ag5evm_map_io,
610 .nr_irqs = NR_IRQS_LEGACY,
610 .init_irq = sh73a0_init_irq, 611 .init_irq = sh73a0_init_irq,
611 .handle_irq = shmobile_handle_irq_gic, 612 .handle_irq = shmobile_handle_irq_gic,
612 .init_machine = ag5evm_init, 613 .init_machine = ag5evm_init,
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index a3aa0f6df96..4c865ece9ac 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -201,7 +201,7 @@ static struct physmap_flash_data nor_flash_data = {
201static struct resource nor_flash_resources[] = { 201static struct resource nor_flash_resources[] = {
202 [0] = { 202 [0] = {
203 .start = 0x20000000, /* CS0 shadow instead of regular CS0 */ 203 .start = 0x20000000, /* CS0 shadow instead of regular CS0 */
204 .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */ 204 .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
205 .flags = IORESOURCE_MEM, 205 .flags = IORESOURCE_MEM,
206 } 206 }
207}; 207};
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
index adc73122bf2..f44150b5ae4 100644
--- a/arch/arm/mach-shmobile/board-kota2.c
+++ b/arch/arm/mach-shmobile/board-kota2.c
@@ -33,6 +33,7 @@
33#include <linux/input/sh_keysc.h> 33#include <linux/input/sh_keysc.h>
34#include <linux/gpio_keys.h> 34#include <linux/gpio_keys.h>
35#include <linux/leds.h> 35#include <linux/leds.h>
36#include <linux/platform_data/leds-renesas-tpu.h>
36#include <linux/mmc/host.h> 37#include <linux/mmc/host.h>
37#include <linux/mmc/sh_mmcif.h> 38#include <linux/mmc/sh_mmcif.h>
38#include <linux/mfd/tmio.h> 39#include <linux/mfd/tmio.h>
@@ -48,6 +49,7 @@
48#include <asm/hardware/cache-l2x0.h> 49#include <asm/hardware/cache-l2x0.h>
49#include <asm/traps.h> 50#include <asm/traps.h>
50 51
52/* SMSC 9220 */
51static struct resource smsc9220_resources[] = { 53static struct resource smsc9220_resources[] = {
52 [0] = { 54 [0] = {
53 .start = 0x14000000, /* CS5A */ 55 .start = 0x14000000, /* CS5A */
@@ -55,7 +57,7 @@ static struct resource smsc9220_resources[] = {
55 .flags = IORESOURCE_MEM, 57 .flags = IORESOURCE_MEM,
56 }, 58 },
57 [1] = { 59 [1] = {
58 .start = gic_spi(33), /* PINTA2 @ PORT144 */ 60 .start = SH73A0_PINT0_IRQ(2), /* PINTA2 */
59 .flags = IORESOURCE_IRQ, 61 .flags = IORESOURCE_IRQ,
60 }, 62 },
61}; 63};
@@ -77,6 +79,7 @@ static struct platform_device eth_device = {
77 .num_resources = ARRAY_SIZE(smsc9220_resources), 79 .num_resources = ARRAY_SIZE(smsc9220_resources),
78}; 80};
79 81
82/* KEYSC */
80static struct sh_keysc_info keysc_platdata = { 83static struct sh_keysc_info keysc_platdata = {
81 .mode = SH_KEYSC_MODE_6, 84 .mode = SH_KEYSC_MODE_6,
82 .scan_timing = 3, 85 .scan_timing = 3,
@@ -120,6 +123,7 @@ static struct platform_device keysc_device = {
120 }, 123 },
121}; 124};
122 125
126/* GPIO KEY */
123#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 } 127#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 }
124 128
125static struct gpio_keys_button gpio_buttons[] = { 129static struct gpio_keys_button gpio_buttons[] = {
@@ -150,13 +154,10 @@ static struct platform_device gpio_keys_device = {
150 }, 154 },
151}; 155};
152 156
157/* GPIO LED */
153#define GPIO_LED(n, g) { .name = n, .gpio = g } 158#define GPIO_LED(n, g) { .name = n, .gpio = g }
154 159
155static struct gpio_led gpio_leds[] = { 160static struct gpio_led gpio_leds[] = {
156 GPIO_LED("V2513", GPIO_PORT153), /* PORT153 [TPU1T02] -> V2513 */
157 GPIO_LED("V2514", GPIO_PORT199), /* PORT199 [TPU4TO1] -> V2514 */
158 GPIO_LED("V2515", GPIO_PORT197), /* PORT197 [TPU2TO1] -> V2515 */
159 GPIO_LED("KEYLED", GPIO_PORT163), /* PORT163 [TPU3TO0] -> KEYLED */
160 GPIO_LED("G", GPIO_PORT20), /* PORT20 [GPO0] -> LED7 -> "G" */ 161 GPIO_LED("G", GPIO_PORT20), /* PORT20 [GPO0] -> LED7 -> "G" */
161 GPIO_LED("H", GPIO_PORT21), /* PORT21 [GPO1] -> LED8 -> "H" */ 162 GPIO_LED("H", GPIO_PORT21), /* PORT21 [GPO1] -> LED8 -> "H" */
162 GPIO_LED("J", GPIO_PORT22), /* PORT22 [GPO2] -> LED9 -> "J" */ 163 GPIO_LED("J", GPIO_PORT22), /* PORT22 [GPO2] -> LED9 -> "J" */
@@ -175,6 +176,120 @@ static struct platform_device gpio_leds_device = {
175 }, 176 },
176}; 177};
177 178
179/* TPU LED */
180static struct led_renesas_tpu_config led_renesas_tpu12_pdata = {
181 .name = "V2513",
182 .pin_gpio_fn = GPIO_FN_TPU1TO2,
183 .pin_gpio = GPIO_PORT153,
184 .channel_offset = 0x90,
185 .timer_bit = 2,
186 .max_brightness = 1000,
187};
188
189static struct resource tpu12_resources[] = {
190 [0] = {
191 .name = "TPU12",
192 .start = 0xe6610090,
193 .end = 0xe66100b5,
194 .flags = IORESOURCE_MEM,
195 },
196};
197
198static struct platform_device leds_tpu12_device = {
199 .name = "leds-renesas-tpu",
200 .id = 12,
201 .dev = {
202 .platform_data = &led_renesas_tpu12_pdata,
203 },
204 .num_resources = ARRAY_SIZE(tpu12_resources),
205 .resource = tpu12_resources,
206};
207
208static struct led_renesas_tpu_config led_renesas_tpu41_pdata = {
209 .name = "V2514",
210 .pin_gpio_fn = GPIO_FN_TPU4TO1,
211 .pin_gpio = GPIO_PORT199,
212 .channel_offset = 0x50,
213 .timer_bit = 1,
214 .max_brightness = 1000,
215};
216
217static struct resource tpu41_resources[] = {
218 [0] = {
219 .name = "TPU41",
220 .start = 0xe6640050,
221 .end = 0xe6640075,
222 .flags = IORESOURCE_MEM,
223 },
224};
225
226static struct platform_device leds_tpu41_device = {
227 .name = "leds-renesas-tpu",
228 .id = 41,
229 .dev = {
230 .platform_data = &led_renesas_tpu41_pdata,
231 },
232 .num_resources = ARRAY_SIZE(tpu41_resources),
233 .resource = tpu41_resources,
234};
235
236static struct led_renesas_tpu_config led_renesas_tpu21_pdata = {
237 .name = "V2515",
238 .pin_gpio_fn = GPIO_FN_TPU2TO1,
239 .pin_gpio = GPIO_PORT197,
240 .channel_offset = 0x50,
241 .timer_bit = 1,
242 .max_brightness = 1000,
243};
244
245static struct resource tpu21_resources[] = {
246 [0] = {
247 .name = "TPU21",
248 .start = 0xe6620050,
249 .end = 0xe6620075,
250 .flags = IORESOURCE_MEM,
251 },
252};
253
254static struct platform_device leds_tpu21_device = {
255 .name = "leds-renesas-tpu",
256 .id = 21,
257 .dev = {
258 .platform_data = &led_renesas_tpu21_pdata,
259 },
260 .num_resources = ARRAY_SIZE(tpu21_resources),
261 .resource = tpu21_resources,
262};
263
264static struct led_renesas_tpu_config led_renesas_tpu30_pdata = {
265 .name = "KEYLED",
266 .pin_gpio_fn = GPIO_FN_TPU3TO0,
267 .pin_gpio = GPIO_PORT163,
268 .channel_offset = 0x10,
269 .timer_bit = 0,
270 .max_brightness = 1000,
271};
272
273static struct resource tpu30_resources[] = {
274 [0] = {
275 .name = "TPU30",
276 .start = 0xe6630010,
277 .end = 0xe6630035,
278 .flags = IORESOURCE_MEM,
279 },
280};
281
282static struct platform_device leds_tpu30_device = {
283 .name = "leds-renesas-tpu",
284 .id = 30,
285 .dev = {
286 .platform_data = &led_renesas_tpu30_pdata,
287 },
288 .num_resources = ARRAY_SIZE(tpu30_resources),
289 .resource = tpu30_resources,
290};
291
292/* MMCIF */
178static struct resource mmcif_resources[] = { 293static struct resource mmcif_resources[] = {
179 [0] = { 294 [0] = {
180 .name = "MMCIF", 295 .name = "MMCIF",
@@ -207,6 +322,7 @@ static struct platform_device mmcif_device = {
207 .resource = mmcif_resources, 322 .resource = mmcif_resources,
208}; 323};
209 324
325/* SDHI0 */
210static struct sh_mobile_sdhi_info sdhi0_info = { 326static struct sh_mobile_sdhi_info sdhi0_info = {
211 .tmio_caps = MMC_CAP_SD_HIGHSPEED, 327 .tmio_caps = MMC_CAP_SD_HIGHSPEED,
212 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT, 328 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
@@ -243,6 +359,7 @@ static struct platform_device sdhi0_device = {
243 }, 359 },
244}; 360};
245 361
362/* SDHI1 */
246static struct sh_mobile_sdhi_info sdhi1_info = { 363static struct sh_mobile_sdhi_info sdhi1_info = {
247 .tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ, 364 .tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ,
248 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT, 365 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
@@ -284,6 +401,10 @@ static struct platform_device *kota2_devices[] __initdata = {
284 &keysc_device, 401 &keysc_device,
285 &gpio_keys_device, 402 &gpio_keys_device,
286 &gpio_leds_device, 403 &gpio_leds_device,
404 &leds_tpu12_device,
405 &leds_tpu41_device,
406 &leds_tpu21_device,
407 &leds_tpu30_device,
287 &mmcif_device, 408 &mmcif_device,
288 &sdhi0_device, 409 &sdhi0_device,
289 &sdhi1_device, 410 &sdhi1_device,
@@ -310,18 +431,6 @@ static void __init kota2_map_io(void)
310 shmobile_setup_console(); 431 shmobile_setup_console();
311} 432}
312 433
313#define PINTER0A 0xe69000a0
314#define PINTCR0A 0xe69000b0
315
316void __init kota2_init_irq(void)
317{
318 sh73a0_init_irq();
319
320 /* setup PINT: enable PINTA2 as active low */
321 __raw_writel(1 << 29, PINTER0A);
322 __raw_writew(2 << 10, PINTCR0A);
323}
324
325static void __init kota2_init(void) 434static void __init kota2_init(void)
326{ 435{
327 sh73a0_pinmux_init(); 436 sh73a0_pinmux_init();
@@ -440,7 +549,8 @@ struct sys_timer kota2_timer = {
440 549
441MACHINE_START(KOTA2, "kota2") 550MACHINE_START(KOTA2, "kota2")
442 .map_io = kota2_map_io, 551 .map_io = kota2_map_io,
443 .init_irq = kota2_init_irq, 552 .nr_irqs = NR_IRQS_LEGACY,
553 .init_irq = sh73a0_init_irq,
444 .handle_irq = shmobile_handle_irq_gic, 554 .handle_irq = shmobile_handle_irq_gic,
445 .init_machine = kota2_init, 555 .init_machine = kota2_init,
446 .timer = &kota2_timer, 556 .timer = &kota2_timer,
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 66975921e64..995a9c3aec8 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -476,7 +476,7 @@ static struct clk_ops fsidiv_clk_ops = {
476 .disable = fsidiv_disable, 476 .disable = fsidiv_disable,
477}; 477};
478 478
479static struct clk_mapping sh7372_fsidiva_clk_mapping = { 479static struct clk_mapping fsidiva_clk_mapping = {
480 .phys = FSIDIVA, 480 .phys = FSIDIVA,
481 .len = 8, 481 .len = 8,
482}; 482};
@@ -484,10 +484,10 @@ static struct clk_mapping sh7372_fsidiva_clk_mapping = {
484struct clk sh7372_fsidiva_clk = { 484struct clk sh7372_fsidiva_clk = {
485 .ops = &fsidiv_clk_ops, 485 .ops = &fsidiv_clk_ops,
486 .parent = &div6_reparent_clks[DIV6_FSIA], /* late install */ 486 .parent = &div6_reparent_clks[DIV6_FSIA], /* late install */
487 .mapping = &sh7372_fsidiva_clk_mapping, 487 .mapping = &fsidiva_clk_mapping,
488}; 488};
489 489
490static struct clk_mapping sh7372_fsidivb_clk_mapping = { 490static struct clk_mapping fsidivb_clk_mapping = {
491 .phys = FSIDIVB, 491 .phys = FSIDIVB,
492 .len = 8, 492 .len = 8,
493}; 493};
@@ -495,7 +495,7 @@ static struct clk_mapping sh7372_fsidivb_clk_mapping = {
495struct clk sh7372_fsidivb_clk = { 495struct clk sh7372_fsidivb_clk = {
496 .ops = &fsidiv_clk_ops, 496 .ops = &fsidiv_clk_ops,
497 .parent = &div6_reparent_clks[DIV6_FSIB], /* late install */ 497 .parent = &div6_reparent_clks[DIV6_FSIB], /* late install */
498 .mapping = &sh7372_fsidivb_clk_mapping, 498 .mapping = &fsidivb_clk_mapping,
499}; 499};
500 500
501static struct clk *late_main_clks[] = { 501static struct clk *late_main_clks[] = {
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 61a846bb30f..1370a89ca35 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -113,6 +113,12 @@ static struct clk main_clk = {
113 .ops = &main_clk_ops, 113 .ops = &main_clk_ops,
114}; 114};
115 115
116/* Divide Main clock by two */
117static struct clk main_div2_clk = {
118 .ops = &div2_clk_ops,
119 .parent = &main_clk,
120};
121
116/* PLL0, PLL1, PLL2, PLL3 */ 122/* PLL0, PLL1, PLL2, PLL3 */
117static unsigned long pll_recalc(struct clk *clk) 123static unsigned long pll_recalc(struct clk *clk)
118{ 124{
@@ -181,6 +187,7 @@ static struct clk *main_clks[] = {
181 &extal1_div2_clk, 187 &extal1_div2_clk,
182 &extal2_div2_clk, 188 &extal2_div2_clk,
183 &main_clk, 189 &main_clk,
190 &main_div2_clk,
184 &pll0_clk, 191 &pll0_clk,
185 &pll1_clk, 192 &pll1_clk,
186 &pll2_clk, 193 &pll2_clk,
@@ -243,7 +250,7 @@ static struct clk div6_clks[DIV6_NR] = {
243 [DIV6_VCK1] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR1, 0), 250 [DIV6_VCK1] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR1, 0),
244 [DIV6_VCK2] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR2, 0), 251 [DIV6_VCK2] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR2, 0),
245 [DIV6_VCK3] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR3, 0), 252 [DIV6_VCK3] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR3, 0),
246 [DIV6_ZB1] = SH_CLK_DIV6(&pll1_div2_clk, ZBCKCR, 0), 253 [DIV6_ZB1] = SH_CLK_DIV6(&pll1_div2_clk, ZBCKCR, CLK_ENABLE_ON_INIT),
247 [DIV6_FLCTL] = SH_CLK_DIV6(&pll1_div2_clk, FLCKCR, 0), 254 [DIV6_FLCTL] = SH_CLK_DIV6(&pll1_div2_clk, FLCKCR, 0),
248 [DIV6_SDHI0] = SH_CLK_DIV6(&pll1_div2_clk, SD0CKCR, 0), 255 [DIV6_SDHI0] = SH_CLK_DIV6(&pll1_div2_clk, SD0CKCR, 0),
249 [DIV6_SDHI1] = SH_CLK_DIV6(&pll1_div2_clk, SD1CKCR, 0), 256 [DIV6_SDHI1] = SH_CLK_DIV6(&pll1_div2_clk, SD1CKCR, 0),
@@ -268,6 +275,7 @@ enum { MSTP001,
268 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, 275 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
269 MSTP331, MSTP329, MSTP325, MSTP323, MSTP318, 276 MSTP331, MSTP329, MSTP325, MSTP323, MSTP318,
270 MSTP314, MSTP313, MSTP312, MSTP311, 277 MSTP314, MSTP313, MSTP312, MSTP311,
278 MSTP303, MSTP302, MSTP301, MSTP300,
271 MSTP411, MSTP410, MSTP403, 279 MSTP411, MSTP410, MSTP403,
272 MSTP_NR }; 280 MSTP_NR };
273 281
@@ -301,6 +309,10 @@ static struct clk mstp_clks[MSTP_NR] = {
301 [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */ 309 [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */
302 [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */ 310 [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
303 [MSTP311] = MSTP(&div6_clks[DIV6_SDHI2], SMSTPCR3, 11, 0), /* SDHI2 */ 311 [MSTP311] = MSTP(&div6_clks[DIV6_SDHI2], SMSTPCR3, 11, 0), /* SDHI2 */
312 [MSTP303] = MSTP(&main_div2_clk, SMSTPCR3, 3, 0), /* TPU1 */
313 [MSTP302] = MSTP(&main_div2_clk, SMSTPCR3, 2, 0), /* TPU2 */
314 [MSTP301] = MSTP(&main_div2_clk, SMSTPCR3, 1, 0), /* TPU3 */
315 [MSTP300] = MSTP(&main_div2_clk, SMSTPCR3, 0, 0), /* TPU4 */
304 [MSTP411] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */ 316 [MSTP411] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */
305 [MSTP410] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 10, 0), /* IIC4 */ 317 [MSTP410] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 10, 0), /* IIC4 */
306 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */ 318 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
@@ -350,6 +362,10 @@ static struct clk_lookup lookups[] = {
350 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ 362 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
351 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */ 363 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */
352 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */ 364 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */
365 CLKDEV_DEV_ID("leds-renesas-tpu.12", &mstp_clks[MSTP303]), /* TPU1 */
366 CLKDEV_DEV_ID("leds-renesas-tpu.21", &mstp_clks[MSTP302]), /* TPU2 */
367 CLKDEV_DEV_ID("leds-renesas-tpu.30", &mstp_clks[MSTP301]), /* TPU3 */
368 CLKDEV_DEV_ID("leds-renesas-tpu.41", &mstp_clks[MSTP300]), /* TPU4 */
353 CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */ 369 CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */
354 CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */ 370 CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */
355 CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */ 371 CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
diff --git a/arch/arm/mach-shmobile/cpuidle.c b/arch/arm/mach-shmobile/cpuidle.c
index 2e44f11f592..1b2334277e8 100644
--- a/arch/arm/mach-shmobile/cpuidle.c
+++ b/arch/arm/mach-shmobile/cpuidle.c
@@ -26,65 +26,59 @@ void (*shmobile_cpuidle_modes[CPUIDLE_STATE_MAX])(void) = {
26}; 26};
27 27
28static int shmobile_cpuidle_enter(struct cpuidle_device *dev, 28static int shmobile_cpuidle_enter(struct cpuidle_device *dev,
29 struct cpuidle_state *state) 29 struct cpuidle_driver *drv,
30 int index)
30{ 31{
31 ktime_t before, after; 32 ktime_t before, after;
32 int requested_state = state - &dev->states[0];
33 33
34 dev->last_state = &dev->states[requested_state];
35 before = ktime_get(); 34 before = ktime_get();
36 35
37 local_irq_disable(); 36 local_irq_disable();
38 local_fiq_disable(); 37 local_fiq_disable();
39 38
40 shmobile_cpuidle_modes[requested_state](); 39 shmobile_cpuidle_modes[index]();
41 40
42 local_irq_enable(); 41 local_irq_enable();
43 local_fiq_enable(); 42 local_fiq_enable();
44 43
45 after = ktime_get(); 44 after = ktime_get();
46 return ktime_to_ns(ktime_sub(after, before)) >> 10; 45 dev->last_residency = ktime_to_ns(ktime_sub(after, before)) >> 10;
46
47 return index;
47} 48}
48 49
49static struct cpuidle_device shmobile_cpuidle_dev; 50static struct cpuidle_device shmobile_cpuidle_dev;
50static struct cpuidle_driver shmobile_cpuidle_driver = { 51static struct cpuidle_driver shmobile_cpuidle_driver = {
51 .name = "shmobile_cpuidle", 52 .name = "shmobile_cpuidle",
52 .owner = THIS_MODULE, 53 .owner = THIS_MODULE,
54 .states[0] = {
55 .name = "C1",
56 .desc = "WFI",
57 .exit_latency = 1,
58 .target_residency = 1 * 2,
59 .flags = CPUIDLE_FLAG_TIME_VALID,
60 },
61 .safe_state_index = 0, /* C1 */
62 .state_count = 1,
53}; 63};
54 64
55void (*shmobile_cpuidle_setup)(struct cpuidle_device *dev); 65void (*shmobile_cpuidle_setup)(struct cpuidle_driver *drv);
56 66
57static int shmobile_cpuidle_init(void) 67static int shmobile_cpuidle_init(void)
58{ 68{
59 struct cpuidle_device *dev = &shmobile_cpuidle_dev; 69 struct cpuidle_device *dev = &shmobile_cpuidle_dev;
60 struct cpuidle_state *state; 70 struct cpuidle_driver *drv = &shmobile_cpuidle_driver;
61 int i; 71 int i;
62 72
63 cpuidle_register_driver(&shmobile_cpuidle_driver); 73 for (i = 0; i < CPUIDLE_STATE_MAX; i++)
64 74 drv->states[i].enter = shmobile_cpuidle_enter;
65 for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
66 dev->states[i].name[0] = '\0';
67 dev->states[i].desc[0] = '\0';
68 dev->states[i].enter = shmobile_cpuidle_enter;
69 }
70
71 i = CPUIDLE_DRIVER_STATE_START;
72
73 state = &dev->states[i++];
74 snprintf(state->name, CPUIDLE_NAME_LEN, "C1");
75 strncpy(state->desc, "WFI", CPUIDLE_DESC_LEN);
76 state->exit_latency = 1;
77 state->target_residency = 1 * 2;
78 state->power_usage = 3;
79 state->flags = 0;
80 state->flags |= CPUIDLE_FLAG_TIME_VALID;
81
82 dev->safe_state = state;
83 dev->state_count = i;
84 75
85 if (shmobile_cpuidle_setup) 76 if (shmobile_cpuidle_setup)
86 shmobile_cpuidle_setup(dev); 77 shmobile_cpuidle_setup(drv);
78
79 cpuidle_register_driver(drv);
87 80
81 dev->state_count = drv->state_count;
88 cpuidle_register_device(dev); 82 cpuidle_register_device(dev);
89 83
90 return 0; 84 return 0;
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index c0cdbf997c9..834bd6cd508 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -9,9 +9,9 @@ extern int clk_init(void);
9extern void shmobile_handle_irq_intc(struct pt_regs *); 9extern void shmobile_handle_irq_intc(struct pt_regs *);
10extern void shmobile_handle_irq_gic(struct pt_regs *); 10extern void shmobile_handle_irq_gic(struct pt_regs *);
11extern struct platform_suspend_ops shmobile_suspend_ops; 11extern struct platform_suspend_ops shmobile_suspend_ops;
12struct cpuidle_device; 12struct cpuidle_driver;
13extern void (*shmobile_cpuidle_modes[])(void); 13extern void (*shmobile_cpuidle_modes[])(void);
14extern void (*shmobile_cpuidle_setup)(struct cpuidle_device *dev); 14extern void (*shmobile_cpuidle_setup)(struct cpuidle_driver *drv);
15 15
16extern void sh7367_init_irq(void); 16extern void sh7367_init_irq(void);
17extern void sh7367_add_early_devices(void); 17extern void sh7367_add_early_devices(void);
diff --git a/arch/arm/mach-shmobile/include/mach/sh73a0.h b/arch/arm/mach-shmobile/include/mach/sh73a0.h
index 18ae6a990bc..881d515a968 100644
--- a/arch/arm/mach-shmobile/include/mach/sh73a0.h
+++ b/arch/arm/mach-shmobile/include/mach/sh73a0.h
@@ -470,6 +470,14 @@ enum {
470 GPIO_FN_SDHICMD2_PU, 470 GPIO_FN_SDHICMD2_PU,
471 GPIO_FN_MMCCMD0_PU, 471 GPIO_FN_MMCCMD0_PU,
472 GPIO_FN_MMCCMD1_PU, 472 GPIO_FN_MMCCMD1_PU,
473 GPIO_FN_MMCD0_0_PU,
474 GPIO_FN_MMCD0_1_PU,
475 GPIO_FN_MMCD0_2_PU,
476 GPIO_FN_MMCD0_3_PU,
477 GPIO_FN_MMCD0_4_PU,
478 GPIO_FN_MMCD0_5_PU,
479 GPIO_FN_MMCD0_6_PU,
480 GPIO_FN_MMCD0_7_PU,
473 GPIO_FN_FSIACK_PU, 481 GPIO_FN_FSIACK_PU,
474 GPIO_FN_FSIAILR_PU, 482 GPIO_FN_FSIAILR_PU,
475 GPIO_FN_FSIAIBT_PU, 483 GPIO_FN_FSIAIBT_PU,
diff --git a/arch/arm/mach-shmobile/pfc-sh7367.c b/arch/arm/mach-shmobile/pfc-sh7367.c
index 128555e76e4..e6e524654e6 100644
--- a/arch/arm/mach-shmobile/pfc-sh7367.c
+++ b/arch/arm/mach-shmobile/pfc-sh7367.c
@@ -21,68 +21,49 @@
21#include <linux/gpio.h> 21#include <linux/gpio.h>
22#include <mach/sh7367.h> 22#include <mach/sh7367.h>
23 23
24#define _1(fn, pfx, sfx) fn(pfx, sfx) 24#define CPU_ALL_PORT(fn, pfx, sfx) \
25 25 PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
26#define _10(fn, pfx, sfx) \ 26 PORT_10(fn, pfx##10, sfx), PORT_90(fn, pfx##1, sfx), \
27 _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \ 27 PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \
28 _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \ 28 PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \
29 _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \ 29 PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \
30 _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \ 30 PORT_10(fn, pfx##26, sfx), PORT_1(fn, pfx##270, sfx), \
31 _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx) 31 PORT_1(fn, pfx##271, sfx), PORT_1(fn, pfx##272, sfx)
32
33#define _90(fn, pfx, sfx) \
34 _10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx), \
35 _10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx), \
36 _10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx), \
37 _10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx), \
38 _10(fn, pfx##9, sfx)
39
40#define _273(fn, pfx, sfx) \
41 _10(fn, pfx, sfx), _90(fn, pfx, sfx), \
42 _10(fn, pfx##10, sfx), _90(fn, pfx##1, sfx), \
43 _10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx), \
44 _10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx), \
45 _10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx), \
46 _10(fn, pfx##26, sfx), _1(fn, pfx##270, sfx), \
47 _1(fn, pfx##271, sfx), _1(fn, pfx##272, sfx)
48
49#define _PORT(pfx, sfx) pfx##_##sfx
50#define PORT_273(str) _273(_PORT, PORT, str)
51 32
52enum { 33enum {
53 PINMUX_RESERVED = 0, 34 PINMUX_RESERVED = 0,
54 35
55 PINMUX_DATA_BEGIN, 36 PINMUX_DATA_BEGIN,
56 PORT_273(DATA), /* PORT0_DATA -> PORT272_DATA */ 37 PORT_ALL(DATA), /* PORT0_DATA -> PORT272_DATA */
57 PINMUX_DATA_END, 38 PINMUX_DATA_END,
58 39
59 PINMUX_INPUT_BEGIN, 40 PINMUX_INPUT_BEGIN,
60 PORT_273(IN), /* PORT0_IN -> PORT272_IN */ 41 PORT_ALL(IN), /* PORT0_IN -> PORT272_IN */
61 PINMUX_INPUT_END, 42 PINMUX_INPUT_END,
62 43
63 PINMUX_INPUT_PULLUP_BEGIN, 44 PINMUX_INPUT_PULLUP_BEGIN,
64 PORT_273(IN_PU), /* PORT0_IN_PU -> PORT272_IN_PU */ 45 PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT272_IN_PU */
65 PINMUX_INPUT_PULLUP_END, 46 PINMUX_INPUT_PULLUP_END,
66 47
67 PINMUX_INPUT_PULLDOWN_BEGIN, 48 PINMUX_INPUT_PULLDOWN_BEGIN,
68 PORT_273(IN_PD), /* PORT0_IN_PD -> PORT272_IN_PD */ 49 PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT272_IN_PD */
69 PINMUX_INPUT_PULLDOWN_END, 50 PINMUX_INPUT_PULLDOWN_END,
70 51
71 PINMUX_OUTPUT_BEGIN, 52 PINMUX_OUTPUT_BEGIN,
72 PORT_273(OUT), /* PORT0_OUT -> PORT272_OUT */ 53 PORT_ALL(OUT), /* PORT0_OUT -> PORT272_OUT */
73 PINMUX_OUTPUT_END, 54 PINMUX_OUTPUT_END,
74 55
75 PINMUX_FUNCTION_BEGIN, 56 PINMUX_FUNCTION_BEGIN,
76 PORT_273(FN_IN), /* PORT0_FN_IN -> PORT272_FN_IN */ 57 PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT272_FN_IN */
77 PORT_273(FN_OUT), /* PORT0_FN_OUT -> PORT272_FN_OUT */ 58 PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT272_FN_OUT */
78 PORT_273(FN0), /* PORT0_FN0 -> PORT272_FN0 */ 59 PORT_ALL(FN0), /* PORT0_FN0 -> PORT272_FN0 */
79 PORT_273(FN1), /* PORT0_FN1 -> PORT272_FN1 */ 60 PORT_ALL(FN1), /* PORT0_FN1 -> PORT272_FN1 */
80 PORT_273(FN2), /* PORT0_FN2 -> PORT272_FN2 */ 61 PORT_ALL(FN2), /* PORT0_FN2 -> PORT272_FN2 */
81 PORT_273(FN3), /* PORT0_FN3 -> PORT272_FN3 */ 62 PORT_ALL(FN3), /* PORT0_FN3 -> PORT272_FN3 */
82 PORT_273(FN4), /* PORT0_FN4 -> PORT272_FN4 */ 63 PORT_ALL(FN4), /* PORT0_FN4 -> PORT272_FN4 */
83 PORT_273(FN5), /* PORT0_FN5 -> PORT272_FN5 */ 64 PORT_ALL(FN5), /* PORT0_FN5 -> PORT272_FN5 */
84 PORT_273(FN6), /* PORT0_FN6 -> PORT272_FN6 */ 65 PORT_ALL(FN6), /* PORT0_FN6 -> PORT272_FN6 */
85 PORT_273(FN7), /* PORT0_FN7 -> PORT272_FN7 */ 66 PORT_ALL(FN7), /* PORT0_FN7 -> PORT272_FN7 */
86 67
87 MSELBCR_MSEL2_1, MSELBCR_MSEL2_0, 68 MSELBCR_MSEL2_1, MSELBCR_MSEL2_0,
88 PINMUX_FUNCTION_END, 69 PINMUX_FUNCTION_END,
@@ -327,41 +308,6 @@ enum {
327 PINMUX_MARK_END, 308 PINMUX_MARK_END,
328}; 309};
329 310
330#define PORT_DATA_I(nr) \
331 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
332
333#define PORT_DATA_I_PD(nr) \
334 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
335 PORT##nr##_IN, PORT##nr##_IN_PD)
336
337#define PORT_DATA_I_PU(nr) \
338 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
339 PORT##nr##_IN, PORT##nr##_IN_PU)
340
341#define PORT_DATA_I_PU_PD(nr) \
342 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
343 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
344
345#define PORT_DATA_O(nr) \
346 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
347
348#define PORT_DATA_IO(nr) \
349 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
350 PORT##nr##_IN)
351
352#define PORT_DATA_IO_PD(nr) \
353 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
354 PORT##nr##_IN, PORT##nr##_IN_PD)
355
356#define PORT_DATA_IO_PU(nr) \
357 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
358 PORT##nr##_IN, PORT##nr##_IN_PU)
359
360#define PORT_DATA_IO_PU_PD(nr) \
361 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
362 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
363
364
365static pinmux_enum_t pinmux_data[] = { 311static pinmux_enum_t pinmux_data[] = {
366 312
367 /* specify valid pin states for each pin in GPIO mode */ 313 /* specify valid pin states for each pin in GPIO mode */
@@ -1098,13 +1044,9 @@ static pinmux_enum_t pinmux_data[] = {
1098 PINMUX_DATA(DIVLOCK_MARK, PORT272_FN1), 1044 PINMUX_DATA(DIVLOCK_MARK, PORT272_FN1),
1099}; 1045};
1100 1046
1101#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
1102#define GPIO_PORT_273() _273(_GPIO_PORT, , unused)
1103#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
1104
1105static struct pinmux_gpio pinmux_gpios[] = { 1047static struct pinmux_gpio pinmux_gpios[] = {
1106 /* 49-1 -> 49-6 (GPIO) */ 1048 /* 49-1 -> 49-6 (GPIO) */
1107 GPIO_PORT_273(), 1049 GPIO_PORT_ALL(),
1108 1050
1109 /* Special Pull-up / Pull-down Functions */ 1051 /* Special Pull-up / Pull-down Functions */
1110 GPIO_FN(PORT48_KEYIN0_PU), GPIO_FN(PORT49_KEYIN1_PU), 1052 GPIO_FN(PORT48_KEYIN0_PU), GPIO_FN(PORT49_KEYIN1_PU),
@@ -1345,22 +1287,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
1345 GPIO_FN(DIVLOCK), 1287 GPIO_FN(DIVLOCK),
1346}; 1288};
1347 1289
1348/* helper for top 4 bits in PORTnCR */
1349#define PCRH(in, in_pd, in_pu, out) \
1350 0, (out), (in), 0, \
1351 0, 0, 0, 0, \
1352 0, 0, (in_pd), 0, \
1353 0, 0, (in_pu), 0
1354
1355#define PORTCR(nr, reg) \
1356 { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
1357 PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
1358 PORT##nr##_IN_PU, PORT##nr##_OUT), \
1359 PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
1360 PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
1361 PORT##nr##_FN6, PORT##nr##_FN7 } \
1362 }
1363
1364static struct pinmux_cfg_reg pinmux_config_regs[] = { 1290static struct pinmux_cfg_reg pinmux_config_regs[] = {
1365 PORTCR(0, 0xe6050000), /* PORT0CR */ 1291 PORTCR(0, 0xe6050000), /* PORT0CR */
1366 PORTCR(1, 0xe6050001), /* PORT1CR */ 1292 PORTCR(1, 0xe6050001), /* PORT1CR */
diff --git a/arch/arm/mach-shmobile/pfc-sh7372.c b/arch/arm/mach-shmobile/pfc-sh7372.c
index 9c265dae138..1bd6585a6ac 100644
--- a/arch/arm/mach-shmobile/pfc-sh7372.c
+++ b/arch/arm/mach-shmobile/pfc-sh7372.c
@@ -25,27 +25,13 @@
25#include <linux/gpio.h> 25#include <linux/gpio.h>
26#include <mach/sh7372.h> 26#include <mach/sh7372.h>
27 27
28#define _1(fn, pfx, sfx) fn(pfx, sfx) 28#define CPU_ALL_PORT(fn, pfx, sfx) \
29 29 PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
30#define _10(fn, pfx, sfx) \ 30 PORT_10(fn, pfx##10, sfx), PORT_10(fn, pfx##11, sfx), \
31 _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \ 31 PORT_10(fn, pfx##12, sfx), PORT_10(fn, pfx##13, sfx), \
32 _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \ 32 PORT_10(fn, pfx##14, sfx), PORT_10(fn, pfx##15, sfx), \
33 _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \ 33 PORT_10(fn, pfx##16, sfx), PORT_10(fn, pfx##17, sfx), \
34 _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \ 34 PORT_10(fn, pfx##18, sfx), PORT_1(fn, pfx##190, sfx)
35 _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
36
37#define _80(fn, pfx, sfx) \
38 _10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx), \
39 _10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx), \
40 _10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx), \
41 _10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx)
42
43#define _190(fn, pfx, sfx) \
44 _10(fn, pfx, sfx), _80(fn, pfx, sfx), _10(fn, pfx##9, sfx), \
45 _10(fn, pfx##10, sfx), _80(fn, pfx##1, sfx), _1(fn, pfx##190, sfx)
46
47#define _PORT(pfx, sfx) pfx##_##sfx
48#define PORT_ALL(str) _190(_PORT, PORT, str)
49 35
50enum { 36enum {
51 PINMUX_RESERVED = 0, 37 PINMUX_RESERVED = 0,
@@ -381,108 +367,124 @@ enum {
381 PINMUX_MARK_END, 367 PINMUX_MARK_END,
382}; 368};
383 369
384/* PORT_DATA_I_PD(nr) */
385#define _I___D(nr) \
386 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
387 PORT##nr##_IN, PORT##nr##_IN_PD)
388
389/* PORT_DATA_I_PU(nr) */
390#define _I__U_(nr) \
391 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
392 PORT##nr##_IN, PORT##nr##_IN_PU)
393
394/* PORT_DATA_I_PU_PD(nr) */
395#define _I__UD(nr) \
396 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
397 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
398
399/* PORT_DATA_O(nr) */
400#define __O___(nr) \
401 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
402
403/* PORT_DATA_IO(nr) */
404#define _IO___(nr) \
405 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
406 PORT##nr##_IN)
407
408/* PORT_DATA_IO_PD(nr) */
409#define _IO__D(nr) \
410 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
411 PORT##nr##_IN, PORT##nr##_IN_PD)
412
413/* PORT_DATA_IO_PU(nr) */
414#define _IO_U_(nr) \
415 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
416 PORT##nr##_IN, PORT##nr##_IN_PU)
417
418/* PORT_DATA_IO_PU_PD(nr) */
419#define _IO_UD(nr) \
420 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
421 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
422
423
424static pinmux_enum_t pinmux_data[] = { 370static pinmux_enum_t pinmux_data[] = {
425 371
426 /* specify valid pin states for each pin in GPIO mode */ 372 /* specify valid pin states for each pin in GPIO mode */
427 373 PORT_DATA_IO_PD(0), PORT_DATA_IO_PD(1),
428 _IO__D(0), _IO__D(1), __O___(2), _I___D(3), _I___D(4), 374 PORT_DATA_O(2), PORT_DATA_I_PD(3),
429 _I___D(5), _IO_UD(6), _I___D(7), _IO__D(8), __O___(9), 375 PORT_DATA_I_PD(4), PORT_DATA_I_PD(5),
430 376 PORT_DATA_IO_PU_PD(6), PORT_DATA_I_PD(7),
431 __O___(10), __O___(11), _IO_UD(12), _IO__D(13), _IO__D(14), 377 PORT_DATA_IO_PD(8), PORT_DATA_O(9),
432 __O___(15), _IO__D(16), _IO__D(17), _I___D(18), _IO___(19), 378
433 379 PORT_DATA_O(10), PORT_DATA_O(11),
434 _IO___(20), _IO___(21), _IO___(22), _IO___(23), _IO___(24), 380 PORT_DATA_IO_PU_PD(12), PORT_DATA_IO_PD(13),
435 _IO___(25), _IO___(26), _IO___(27), _IO___(28), _IO___(29), 381 PORT_DATA_IO_PD(14), PORT_DATA_O(15),
436 382 PORT_DATA_IO_PD(16), PORT_DATA_IO_PD(17),
437 _IO___(30), _IO___(31), _IO___(32), _IO___(33), _IO___(34), 383 PORT_DATA_I_PD(18), PORT_DATA_IO(19),
438 _IO___(35), _IO___(36), _IO___(37), _IO___(38), _IO___(39), 384
439 385 PORT_DATA_IO(20), PORT_DATA_IO(21),
440 _IO___(40), _IO___(41), _IO___(42), _IO___(43), _IO___(44), 386 PORT_DATA_IO(22), PORT_DATA_IO(23),
441 _IO___(45), _IO_U_(46), _IO_U_(47), _IO_U_(48), _IO_U_(49), 387 PORT_DATA_IO(24), PORT_DATA_IO(25),
442 388 PORT_DATA_IO(26), PORT_DATA_IO(27),
443 _IO_U_(50), _IO_U_(51), _IO_U_(52), _IO_U_(53), _IO_U_(54), 389 PORT_DATA_IO(28), PORT_DATA_IO(29),
444 _IO_U_(55), _IO_U_(56), _IO_U_(57), _IO_U_(58), _IO_U_(59), 390
445 391 PORT_DATA_IO(30), PORT_DATA_IO(31),
446 _IO_U_(60), _IO_U_(61), _IO___(62), __O___(63), __O___(64), 392 PORT_DATA_IO(32), PORT_DATA_IO(33),
447 _IO_U_(65), __O___(66), _IO_U_(67), __O___(68), _IO___(69), /*66?*/ 393 PORT_DATA_IO(34), PORT_DATA_IO(35),
448 394 PORT_DATA_IO(36), PORT_DATA_IO(37),
449 _IO___(70), _IO___(71), __O___(72), _I__U_(73), _I__UD(74), 395 PORT_DATA_IO(38), PORT_DATA_IO(39),
450 _IO_UD(75), _IO_UD(76), _IO_UD(77), _IO_UD(78), _IO_UD(79), 396
451 397 PORT_DATA_IO(40), PORT_DATA_IO(41),
452 _IO_UD(80), _IO_UD(81), _IO_UD(82), _IO_UD(83), _IO_UD(84), 398 PORT_DATA_IO(42), PORT_DATA_IO(43),
453 _IO_UD(85), _IO_UD(86), _IO_UD(87), _IO_UD(88), _IO_UD(89), 399 PORT_DATA_IO(44), PORT_DATA_IO(45),
454 400 PORT_DATA_IO_PU(46), PORT_DATA_IO_PU(47),
455 _IO_UD(90), _IO_UD(91), _IO_UD(92), _IO_UD(93), _IO_UD(94), 401 PORT_DATA_IO_PU(48), PORT_DATA_IO_PU(49),
456 _IO_UD(95), _IO_U_(96), _IO_UD(97), _IO_UD(98), __O___(99), /*99?*/ 402
457 403 PORT_DATA_IO_PU(50), PORT_DATA_IO_PU(51),
458 _IO__D(100), _IO__D(101), _IO__D(102), _IO__D(103), _IO__D(104), 404 PORT_DATA_IO_PU(52), PORT_DATA_IO_PU(53),
459 _IO__D(105), _IO_U_(106), _IO_U_(107), _IO_U_(108), _IO_U_(109), 405 PORT_DATA_IO_PU(54), PORT_DATA_IO_PU(55),
460 406 PORT_DATA_IO_PU(56), PORT_DATA_IO_PU(57),
461 _IO_U_(110), _IO_U_(111), _IO__D(112), _IO__D(113), _IO_U_(114), 407 PORT_DATA_IO_PU(58), PORT_DATA_IO_PU(59),
462 _IO_U_(115), _IO_U_(116), _IO_U_(117), _IO_U_(118), _IO_U_(119), 408
463 409 PORT_DATA_IO_PU(60), PORT_DATA_IO_PU(61),
464 _IO_U_(120), _IO__D(121), _IO__D(122), _IO__D(123), _IO__D(124), 410 PORT_DATA_IO(62), PORT_DATA_O(63),
465 _IO__D(125), _IO__D(126), _IO__D(127), _IO__D(128), _IO_UD(129), 411 PORT_DATA_O(64), PORT_DATA_IO_PU(65),
466 412 PORT_DATA_O(66), PORT_DATA_IO_PU(67), /*66?*/
467 _IO_UD(130), _IO_UD(131), _IO_UD(132), _IO_UD(133), _IO_UD(134), 413 PORT_DATA_O(68), PORT_DATA_IO(69),
468 _IO_UD(135), _IO__D(136), _IO__D(137), _IO__D(138), _IO__D(139), 414
469 415 PORT_DATA_IO(70), PORT_DATA_IO(71),
470 _IO__D(140), _IO__D(141), _IO__D(142), _IO_UD(143), _IO__D(144), 416 PORT_DATA_O(72), PORT_DATA_I_PU(73),
471 _IO__D(145), _IO__D(146), _IO__D(147), _IO__D(148), _IO__D(149), 417 PORT_DATA_I_PU_PD(74), PORT_DATA_IO_PU_PD(75),
472 418 PORT_DATA_IO_PU_PD(76), PORT_DATA_IO_PU_PD(77),
473 _IO__D(150), _IO__D(151), _IO_UD(152), _I___D(153), _IO_UD(154), 419 PORT_DATA_IO_PU_PD(78), PORT_DATA_IO_PU_PD(79),
474 _I___D(155), _IO__D(156), _IO__D(157), _I___D(158), _IO__D(159), 420
475 421 PORT_DATA_IO_PU_PD(80), PORT_DATA_IO_PU_PD(81),
476 __O___(160), _IO__D(161), _IO__D(162), _IO__D(163), _I___D(164), 422 PORT_DATA_IO_PU_PD(82), PORT_DATA_IO_PU_PD(83),
477 _IO__D(165), _I___D(166), _I___D(167), _I___D(168), _I___D(169), 423 PORT_DATA_IO_PU_PD(84), PORT_DATA_IO_PU_PD(85),
478 424 PORT_DATA_IO_PU_PD(86), PORT_DATA_IO_PU_PD(87),
479 _I___D(170), __O___(171), _IO_UD(172), _IO_UD(173), _IO_UD(174), 425 PORT_DATA_IO_PU_PD(88), PORT_DATA_IO_PU_PD(89),
480 _IO_UD(175), _IO_UD(176), _IO_UD(177), _IO_UD(178), __O___(179), 426
481 427 PORT_DATA_IO_PU_PD(90), PORT_DATA_IO_PU_PD(91),
482 _IO_UD(180), _IO_UD(181), _IO_UD(182), _IO_UD(183), _IO_UD(184), 428 PORT_DATA_IO_PU_PD(92), PORT_DATA_IO_PU_PD(93),
483 __O___(185), _IO_UD(186), _IO_UD(187), _IO_UD(188), _IO_UD(189), 429 PORT_DATA_IO_PU_PD(94), PORT_DATA_IO_PU_PD(95),
484 430 PORT_DATA_IO_PU(96), PORT_DATA_IO_PU_PD(97),
485 _IO_UD(190), 431 PORT_DATA_IO_PU_PD(98), PORT_DATA_O(99), /*99?*/
432
433 PORT_DATA_IO_PD(100), PORT_DATA_IO_PD(101),
434 PORT_DATA_IO_PD(102), PORT_DATA_IO_PD(103),
435 PORT_DATA_IO_PD(104), PORT_DATA_IO_PD(105),
436 PORT_DATA_IO_PU(106), PORT_DATA_IO_PU(107),
437 PORT_DATA_IO_PU(108), PORT_DATA_IO_PU(109),
438
439 PORT_DATA_IO_PU(110), PORT_DATA_IO_PU(111),
440 PORT_DATA_IO_PD(112), PORT_DATA_IO_PD(113),
441 PORT_DATA_IO_PU(114), PORT_DATA_IO_PU(115),
442 PORT_DATA_IO_PU(116), PORT_DATA_IO_PU(117),
443 PORT_DATA_IO_PU(118), PORT_DATA_IO_PU(119),
444
445 PORT_DATA_IO_PU(120), PORT_DATA_IO_PD(121),
446 PORT_DATA_IO_PD(122), PORT_DATA_IO_PD(123),
447 PORT_DATA_IO_PD(124), PORT_DATA_IO_PD(125),
448 PORT_DATA_IO_PD(126), PORT_DATA_IO_PD(127),
449 PORT_DATA_IO_PD(128), PORT_DATA_IO_PU_PD(129),
450
451 PORT_DATA_IO_PU_PD(130), PORT_DATA_IO_PU_PD(131),
452 PORT_DATA_IO_PU_PD(132), PORT_DATA_IO_PU_PD(133),
453 PORT_DATA_IO_PU_PD(134), PORT_DATA_IO_PU_PD(135),
454 PORT_DATA_IO_PD(136), PORT_DATA_IO_PD(137),
455 PORT_DATA_IO_PD(138), PORT_DATA_IO_PD(139),
456
457 PORT_DATA_IO_PD(140), PORT_DATA_IO_PD(141),
458 PORT_DATA_IO_PD(142), PORT_DATA_IO_PU_PD(143),
459 PORT_DATA_IO_PD(144), PORT_DATA_IO_PD(145),
460 PORT_DATA_IO_PD(146), PORT_DATA_IO_PD(147),
461 PORT_DATA_IO_PD(148), PORT_DATA_IO_PD(149),
462
463 PORT_DATA_IO_PD(150), PORT_DATA_IO_PD(151),
464 PORT_DATA_IO_PU_PD(152), PORT_DATA_I_PD(153),
465 PORT_DATA_IO_PU_PD(154), PORT_DATA_I_PD(155),
466 PORT_DATA_IO_PD(156), PORT_DATA_IO_PD(157),
467 PORT_DATA_I_PD(158), PORT_DATA_IO_PD(159),
468
469 PORT_DATA_O(160), PORT_DATA_IO_PD(161),
470 PORT_DATA_IO_PD(162), PORT_DATA_IO_PD(163),
471 PORT_DATA_I_PD(164), PORT_DATA_IO_PD(165),
472 PORT_DATA_I_PD(166), PORT_DATA_I_PD(167),
473 PORT_DATA_I_PD(168), PORT_DATA_I_PD(169),
474
475 PORT_DATA_I_PD(170), PORT_DATA_O(171),
476 PORT_DATA_IO_PU_PD(172), PORT_DATA_IO_PU_PD(173),
477 PORT_DATA_IO_PU_PD(174), PORT_DATA_IO_PU_PD(175),
478 PORT_DATA_IO_PU_PD(176), PORT_DATA_IO_PU_PD(177),
479 PORT_DATA_IO_PU_PD(178), PORT_DATA_O(179),
480
481 PORT_DATA_IO_PU_PD(180), PORT_DATA_IO_PU_PD(181),
482 PORT_DATA_IO_PU_PD(182), PORT_DATA_IO_PU_PD(183),
483 PORT_DATA_IO_PU_PD(184), PORT_DATA_O(185),
484 PORT_DATA_IO_PU_PD(186), PORT_DATA_IO_PU_PD(187),
485 PORT_DATA_IO_PU_PD(188), PORT_DATA_IO_PU_PD(189),
486
487 PORT_DATA_IO_PU_PD(190),
486 488
487 /* IRQ */ 489 /* IRQ */
488 PINMUX_DATA(IRQ0_6_MARK, PORT6_FN0, MSEL1CR_0_0), 490 PINMUX_DATA(IRQ0_6_MARK, PORT6_FN0, MSEL1CR_0_0),
@@ -926,10 +928,6 @@ static pinmux_enum_t pinmux_data[] = {
926 PINMUX_DATA(MFIv4_MARK, MSEL4CR_6_1), 928 PINMUX_DATA(MFIv4_MARK, MSEL4CR_6_1),
927}; 929};
928 930
929#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
930#define GPIO_PORT_ALL() _190(_GPIO_PORT, , unused)
931#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
932
933static struct pinmux_gpio pinmux_gpios[] = { 931static struct pinmux_gpio pinmux_gpios[] = {
934 932
935 /* PORT */ 933 /* PORT */
@@ -1201,22 +1199,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
1201 GPIO_FN(SDENC_DV_CLKI), 1199 GPIO_FN(SDENC_DV_CLKI),
1202}; 1200};
1203 1201
1204/* helper for top 4 bits in PORTnCR */
1205#define PCRH(in, in_pd, in_pu, out) \
1206 0, (out), (in), 0, \
1207 0, 0, 0, 0, \
1208 0, 0, (in_pd), 0, \
1209 0, 0, (in_pu), 0
1210
1211#define PORTCR(nr, reg) \
1212 { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
1213 PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
1214 PORT##nr##_IN_PU, PORT##nr##_OUT), \
1215 PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
1216 PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
1217 PORT##nr##_FN6, PORT##nr##_FN7 } \
1218 }
1219
1220static struct pinmux_cfg_reg pinmux_config_regs[] = { 1202static struct pinmux_cfg_reg pinmux_config_regs[] = {
1221 PORTCR(0, 0xE6051000), /* PORT0CR */ 1203 PORTCR(0, 0xE6051000), /* PORT0CR */
1222 PORTCR(1, 0xE6051001), /* PORT1CR */ 1204 PORTCR(1, 0xE6051001), /* PORT1CR */
diff --git a/arch/arm/mach-shmobile/pfc-sh7377.c b/arch/arm/mach-shmobile/pfc-sh7377.c
index 613e6842ad0..2f10511946a 100644
--- a/arch/arm/mach-shmobile/pfc-sh7377.c
+++ b/arch/arm/mach-shmobile/pfc-sh7377.c
@@ -22,84 +22,65 @@
22#include <linux/gpio.h> 22#include <linux/gpio.h>
23#include <mach/sh7377.h> 23#include <mach/sh7377.h>
24 24
25#define _1(fn, pfx, sfx) fn(pfx, sfx) 25#define CPU_ALL_PORT(fn, pfx, sfx) \
26 26 PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
27#define _10(fn, pfx, sfx) \ 27 PORT_10(fn, pfx##10, sfx), \
28 _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \ 28 PORT_1(fn, pfx##110, sfx), PORT_1(fn, pfx##111, sfx), \
29 _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \ 29 PORT_1(fn, pfx##112, sfx), PORT_1(fn, pfx##113, sfx), \
30 _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \ 30 PORT_1(fn, pfx##114, sfx), PORT_1(fn, pfx##115, sfx), \
31 _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \ 31 PORT_1(fn, pfx##116, sfx), PORT_1(fn, pfx##117, sfx), \
32 _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx) 32 PORT_1(fn, pfx##118, sfx), \
33 33 PORT_1(fn, pfx##128, sfx), PORT_1(fn, pfx##129, sfx), \
34#define _90(fn, pfx, sfx) \ 34 PORT_10(fn, pfx##13, sfx), PORT_10(fn, pfx##14, sfx), \
35 _10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx), \ 35 PORT_10(fn, pfx##15, sfx), \
36 _10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx), \ 36 PORT_1(fn, pfx##160, sfx), PORT_1(fn, pfx##161, sfx), \
37 _10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx), \ 37 PORT_1(fn, pfx##162, sfx), PORT_1(fn, pfx##163, sfx), \
38 _10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx), \ 38 PORT_1(fn, pfx##164, sfx), \
39 _10(fn, pfx##9, sfx) 39 PORT_1(fn, pfx##192, sfx), PORT_1(fn, pfx##193, sfx), \
40 40 PORT_1(fn, pfx##194, sfx), PORT_1(fn, pfx##195, sfx), \
41#define _265(fn, pfx, sfx) \ 41 PORT_1(fn, pfx##196, sfx), PORT_1(fn, pfx##197, sfx), \
42 _10(fn, pfx, sfx), _90(fn, pfx, sfx), \ 42 PORT_1(fn, pfx##198, sfx), PORT_1(fn, pfx##199, sfx), \
43 _10(fn, pfx##10, sfx), \ 43 PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \
44 _1(fn, pfx##110, sfx), _1(fn, pfx##111, sfx), \ 44 PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \
45 _1(fn, pfx##112, sfx), _1(fn, pfx##113, sfx), \ 45 PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \
46 _1(fn, pfx##114, sfx), _1(fn, pfx##115, sfx), \ 46 PORT_1(fn, pfx##260, sfx), PORT_1(fn, pfx##261, sfx), \
47 _1(fn, pfx##116, sfx), _1(fn, pfx##117, sfx), \ 47 PORT_1(fn, pfx##262, sfx), PORT_1(fn, pfx##263, sfx), \
48 _1(fn, pfx##118, sfx), \ 48 PORT_1(fn, pfx##264, sfx)
49 _1(fn, pfx##128, sfx), _1(fn, pfx##129, sfx), \
50 _10(fn, pfx##13, sfx), _10(fn, pfx##14, sfx), \
51 _10(fn, pfx##15, sfx), \
52 _1(fn, pfx##160, sfx), _1(fn, pfx##161, sfx), \
53 _1(fn, pfx##162, sfx), _1(fn, pfx##163, sfx), \
54 _1(fn, pfx##164, sfx), \
55 _1(fn, pfx##192, sfx), _1(fn, pfx##193, sfx), \
56 _1(fn, pfx##194, sfx), _1(fn, pfx##195, sfx), \
57 _1(fn, pfx##196, sfx), _1(fn, pfx##197, sfx), \
58 _1(fn, pfx##198, sfx), _1(fn, pfx##199, sfx), \
59 _10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx), \
60 _10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx), \
61 _10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx), \
62 _1(fn, pfx##260, sfx), _1(fn, pfx##261, sfx), \
63 _1(fn, pfx##262, sfx), _1(fn, pfx##263, sfx), \
64 _1(fn, pfx##264, sfx)
65
66#define _PORT(pfx, sfx) pfx##_##sfx
67#define PORT_265(str) _265(_PORT, PORT, str)
68 49
69enum { 50enum {
70 PINMUX_RESERVED = 0, 51 PINMUX_RESERVED = 0,
71 52
72 PINMUX_DATA_BEGIN, 53 PINMUX_DATA_BEGIN,
73 PORT_265(DATA), /* PORT0_DATA -> PORT264_DATA */ 54 PORT_ALL(DATA), /* PORT0_DATA -> PORT264_DATA */
74 PINMUX_DATA_END, 55 PINMUX_DATA_END,
75 56
76 PINMUX_INPUT_BEGIN, 57 PINMUX_INPUT_BEGIN,
77 PORT_265(IN), /* PORT0_IN -> PORT264_IN */ 58 PORT_ALL(IN), /* PORT0_IN -> PORT264_IN */
78 PINMUX_INPUT_END, 59 PINMUX_INPUT_END,
79 60
80 PINMUX_INPUT_PULLUP_BEGIN, 61 PINMUX_INPUT_PULLUP_BEGIN,
81 PORT_265(IN_PU), /* PORT0_IN_PU -> PORT264_IN_PU */ 62 PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT264_IN_PU */
82 PINMUX_INPUT_PULLUP_END, 63 PINMUX_INPUT_PULLUP_END,
83 64
84 PINMUX_INPUT_PULLDOWN_BEGIN, 65 PINMUX_INPUT_PULLDOWN_BEGIN,
85 PORT_265(IN_PD), /* PORT0_IN_PD -> PORT264_IN_PD */ 66 PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT264_IN_PD */
86 PINMUX_INPUT_PULLDOWN_END, 67 PINMUX_INPUT_PULLDOWN_END,
87 68
88 PINMUX_OUTPUT_BEGIN, 69 PINMUX_OUTPUT_BEGIN,
89 PORT_265(OUT), /* PORT0_OUT -> PORT264_OUT */ 70 PORT_ALL(OUT), /* PORT0_OUT -> PORT264_OUT */
90 PINMUX_OUTPUT_END, 71 PINMUX_OUTPUT_END,
91 72
92 PINMUX_FUNCTION_BEGIN, 73 PINMUX_FUNCTION_BEGIN,
93 PORT_265(FN_IN), /* PORT0_FN_IN -> PORT264_FN_IN */ 74 PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT264_FN_IN */
94 PORT_265(FN_OUT), /* PORT0_FN_OUT -> PORT264_FN_OUT */ 75 PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT264_FN_OUT */
95 PORT_265(FN0), /* PORT0_FN0 -> PORT264_FN0 */ 76 PORT_ALL(FN0), /* PORT0_FN0 -> PORT264_FN0 */
96 PORT_265(FN1), /* PORT0_FN1 -> PORT264_FN1 */ 77 PORT_ALL(FN1), /* PORT0_FN1 -> PORT264_FN1 */
97 PORT_265(FN2), /* PORT0_FN2 -> PORT264_FN2 */ 78 PORT_ALL(FN2), /* PORT0_FN2 -> PORT264_FN2 */
98 PORT_265(FN3), /* PORT0_FN3 -> PORT264_FN3 */ 79 PORT_ALL(FN3), /* PORT0_FN3 -> PORT264_FN3 */
99 PORT_265(FN4), /* PORT0_FN4 -> PORT264_FN4 */ 80 PORT_ALL(FN4), /* PORT0_FN4 -> PORT264_FN4 */
100 PORT_265(FN5), /* PORT0_FN5 -> PORT264_FN5 */ 81 PORT_ALL(FN5), /* PORT0_FN5 -> PORT264_FN5 */
101 PORT_265(FN6), /* PORT0_FN6 -> PORT264_FN6 */ 82 PORT_ALL(FN6), /* PORT0_FN6 -> PORT264_FN6 */
102 PORT_265(FN7), /* PORT0_FN7 -> PORT264_FN7 */ 83 PORT_ALL(FN7), /* PORT0_FN7 -> PORT264_FN7 */
103 84
104 MSELBCR_MSEL17_1, MSELBCR_MSEL17_0, 85 MSELBCR_MSEL17_1, MSELBCR_MSEL17_0,
105 MSELBCR_MSEL16_1, MSELBCR_MSEL16_0, 86 MSELBCR_MSEL16_1, MSELBCR_MSEL16_0,
@@ -360,45 +341,6 @@ enum {
360 PINMUX_MARK_END, 341 PINMUX_MARK_END,
361}; 342};
362 343
363#define PORT_DATA_I(nr) \
364 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
365
366#define PORT_DATA_I_PD(nr) \
367 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
368 PORT##nr##_IN, PORT##nr##_IN_PD)
369
370#define PORT_DATA_I_PU(nr) \
371 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
372 PORT##nr##_IN, PORT##nr##_IN_PU)
373
374#define PORT_DATA_I_PU_PD(nr) \
375 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
376 PORT##nr##_IN, PORT##nr##_IN_PD, \
377 PORT##nr##_IN_PU)
378
379#define PORT_DATA_O(nr) \
380 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
381 PORT##nr##_OUT)
382
383#define PORT_DATA_IO(nr) \
384 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
385 PORT##nr##_OUT, PORT##nr##_IN)
386
387#define PORT_DATA_IO_PD(nr) \
388 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
389 PORT##nr##_OUT, PORT##nr##_IN, \
390 PORT##nr##_IN_PD)
391
392#define PORT_DATA_IO_PU(nr) \
393 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
394 PORT##nr##_OUT, PORT##nr##_IN, \
395 PORT##nr##_IN_PU)
396
397#define PORT_DATA_IO_PU_PD(nr) \
398 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
399 PORT##nr##_OUT, PORT##nr##_IN, \
400 PORT##nr##_IN_PD, PORT##nr##_IN_PU)
401
402static pinmux_enum_t pinmux_data[] = { 344static pinmux_enum_t pinmux_data[] = {
403 /* specify valid pin states for each pin in GPIO mode */ 345 /* specify valid pin states for each pin in GPIO mode */
404 /* 55-1 (GPIO) */ 346 /* 55-1 (GPIO) */
@@ -1078,13 +1020,9 @@ static pinmux_enum_t pinmux_data[] = {
1078 PINMUX_DATA(RESETOUTS_MARK, PORT264_FN1), 1020 PINMUX_DATA(RESETOUTS_MARK, PORT264_FN1),
1079}; 1021};
1080 1022
1081#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
1082#define GPIO_PORT_265() _265(_GPIO_PORT, , unused)
1083#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
1084
1085static struct pinmux_gpio pinmux_gpios[] = { 1023static struct pinmux_gpio pinmux_gpios[] = {
1086 /* 55-1 -> 55-5 (GPIO) */ 1024 /* 55-1 -> 55-5 (GPIO) */
1087 GPIO_PORT_265(), 1025 GPIO_PORT_ALL(),
1088 1026
1089 /* Special Pull-up / Pull-down Functions */ 1027 /* Special Pull-up / Pull-down Functions */
1090 GPIO_FN(PORT66_KEYIN0_PU), GPIO_FN(PORT67_KEYIN1_PU), 1028 GPIO_FN(PORT66_KEYIN0_PU), GPIO_FN(PORT67_KEYIN1_PU),
@@ -1362,23 +1300,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
1362 GPIO_FN(RESETOUTS), 1300 GPIO_FN(RESETOUTS),
1363}; 1301};
1364 1302
1365/* helper for top 4 bits in PORTnCR */
1366#define PCRH(in, in_pd, in_pu, out) \
1367 0, (out), (in), 0, \
1368 0, 0, 0, 0, \
1369 0, 0, (in_pd), 0, \
1370 0, 0, (in_pu), 0
1371
1372#define PORTCR(nr, reg) \
1373 { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
1374 PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
1375 PORT##nr##_IN_PU, PORT##nr##_OUT), \
1376 PORT##nr##_FN0, PORT##nr##_FN1, \
1377 PORT##nr##_FN2, PORT##nr##_FN3, \
1378 PORT##nr##_FN4, PORT##nr##_FN5, \
1379 PORT##nr##_FN6, PORT##nr##_FN7 } \
1380 }
1381
1382static struct pinmux_cfg_reg pinmux_config_regs[] = { 1303static struct pinmux_cfg_reg pinmux_config_regs[] = {
1383 PORTCR(0, 0xe6050000), /* PORT0CR */ 1304 PORTCR(0, 0xe6050000), /* PORT0CR */
1384 PORTCR(1, 0xe6050001), /* PORT1CR */ 1305 PORTCR(1, 0xe6050001), /* PORT1CR */
diff --git a/arch/arm/mach-shmobile/pfc-sh73a0.c b/arch/arm/mach-shmobile/pfc-sh73a0.c
index 5abe02fbd6b..e05634ce2e0 100644
--- a/arch/arm/mach-shmobile/pfc-sh73a0.c
+++ b/arch/arm/mach-shmobile/pfc-sh73a0.c
@@ -24,83 +24,71 @@
24#include <mach/sh73a0.h> 24#include <mach/sh73a0.h>
25#include <mach/irqs.h> 25#include <mach/irqs.h>
26 26
27#define _1(fn, pfx, sfx) fn(pfx, sfx) 27#define CPU_ALL_PORT(fn, pfx, sfx) \
28 28 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
29#define _10(fn, pfx, sfx) \ 29 PORT_10(fn, pfx##2, sfx), PORT_10(fn, pfx##3, sfx), \
30 _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \ 30 PORT_10(fn, pfx##4, sfx), PORT_10(fn, pfx##5, sfx), \
31 _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \ 31 PORT_10(fn, pfx##6, sfx), PORT_10(fn, pfx##7, sfx), \
32 _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \ 32 PORT_10(fn, pfx##8, sfx), PORT_10(fn, pfx##9, sfx), \
33 _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \ 33 PORT_10(fn, pfx##10, sfx), \
34 _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx) 34 PORT_1(fn, pfx##110, sfx), PORT_1(fn, pfx##111, sfx), \
35 35 PORT_1(fn, pfx##112, sfx), PORT_1(fn, pfx##113, sfx), \
36#define _310(fn, pfx, sfx) \ 36 PORT_1(fn, pfx##114, sfx), PORT_1(fn, pfx##115, sfx), \
37 _10(fn, pfx, sfx), _10(fn, pfx##1, sfx), \ 37 PORT_1(fn, pfx##116, sfx), PORT_1(fn, pfx##117, sfx), \
38 _10(fn, pfx##2, sfx), _10(fn, pfx##3, sfx), \ 38 PORT_1(fn, pfx##118, sfx), \
39 _10(fn, pfx##4, sfx), _10(fn, pfx##5, sfx), \ 39 PORT_1(fn, pfx##128, sfx), PORT_1(fn, pfx##129, sfx), \
40 _10(fn, pfx##6, sfx), _10(fn, pfx##7, sfx), \ 40 PORT_10(fn, pfx##13, sfx), PORT_10(fn, pfx##14, sfx), \
41 _10(fn, pfx##8, sfx), _10(fn, pfx##9, sfx), \ 41 PORT_10(fn, pfx##15, sfx), \
42 _10(fn, pfx##10, sfx), \ 42 PORT_1(fn, pfx##160, sfx), PORT_1(fn, pfx##161, sfx), \
43 _1(fn, pfx##110, sfx), _1(fn, pfx##111, sfx), \ 43 PORT_1(fn, pfx##162, sfx), PORT_1(fn, pfx##163, sfx), \
44 _1(fn, pfx##112, sfx), _1(fn, pfx##113, sfx), \ 44 PORT_1(fn, pfx##164, sfx), \
45 _1(fn, pfx##114, sfx), _1(fn, pfx##115, sfx), \ 45 PORT_1(fn, pfx##192, sfx), PORT_1(fn, pfx##193, sfx), \
46 _1(fn, pfx##116, sfx), _1(fn, pfx##117, sfx), \ 46 PORT_1(fn, pfx##194, sfx), PORT_1(fn, pfx##195, sfx), \
47 _1(fn, pfx##118, sfx), \ 47 PORT_1(fn, pfx##196, sfx), PORT_1(fn, pfx##197, sfx), \
48 _1(fn, pfx##128, sfx), _1(fn, pfx##129, sfx), \ 48 PORT_1(fn, pfx##198, sfx), PORT_1(fn, pfx##199, sfx), \
49 _10(fn, pfx##13, sfx), _10(fn, pfx##14, sfx), \ 49 PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \
50 _10(fn, pfx##15, sfx), \ 50 PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \
51 _1(fn, pfx##160, sfx), _1(fn, pfx##161, sfx), \ 51 PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \
52 _1(fn, pfx##162, sfx), _1(fn, pfx##163, sfx), \ 52 PORT_10(fn, pfx##26, sfx), PORT_10(fn, pfx##27, sfx), \
53 _1(fn, pfx##164, sfx), \ 53 PORT_1(fn, pfx##280, sfx), PORT_1(fn, pfx##281, sfx), \
54 _1(fn, pfx##192, sfx), _1(fn, pfx##193, sfx), \ 54 PORT_1(fn, pfx##282, sfx), \
55 _1(fn, pfx##194, sfx), _1(fn, pfx##195, sfx), \ 55 PORT_1(fn, pfx##288, sfx), PORT_1(fn, pfx##289, sfx), \
56 _1(fn, pfx##196, sfx), _1(fn, pfx##197, sfx), \ 56 PORT_10(fn, pfx##29, sfx), PORT_10(fn, pfx##30, sfx)
57 _1(fn, pfx##198, sfx), _1(fn, pfx##199, sfx), \
58 _10(fn, pfx##20, sfx), _10(fn, pfx##21, sfx), \
59 _10(fn, pfx##22, sfx), _10(fn, pfx##23, sfx), \
60 _10(fn, pfx##24, sfx), _10(fn, pfx##25, sfx), \
61 _10(fn, pfx##26, sfx), _10(fn, pfx##27, sfx), \
62 _1(fn, pfx##280, sfx), _1(fn, pfx##281, sfx), \
63 _1(fn, pfx##282, sfx), \
64 _1(fn, pfx##288, sfx), _1(fn, pfx##289, sfx), \
65 _10(fn, pfx##29, sfx), _10(fn, pfx##30, sfx)
66
67#define _PORT(pfx, sfx) pfx##_##sfx
68#define PORT_310(str) _310(_PORT, PORT, str)
69 57
70enum { 58enum {
71 PINMUX_RESERVED = 0, 59 PINMUX_RESERVED = 0,
72 60
73 PINMUX_DATA_BEGIN, 61 PINMUX_DATA_BEGIN,
74 PORT_310(DATA), /* PORT0_DATA -> PORT309_DATA */ 62 PORT_ALL(DATA), /* PORT0_DATA -> PORT309_DATA */
75 PINMUX_DATA_END, 63 PINMUX_DATA_END,
76 64
77 PINMUX_INPUT_BEGIN, 65 PINMUX_INPUT_BEGIN,
78 PORT_310(IN), /* PORT0_IN -> PORT309_IN */ 66 PORT_ALL(IN), /* PORT0_IN -> PORT309_IN */
79 PINMUX_INPUT_END, 67 PINMUX_INPUT_END,
80 68
81 PINMUX_INPUT_PULLUP_BEGIN, 69 PINMUX_INPUT_PULLUP_BEGIN,
82 PORT_310(IN_PU), /* PORT0_IN_PU -> PORT309_IN_PU */ 70 PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT309_IN_PU */
83 PINMUX_INPUT_PULLUP_END, 71 PINMUX_INPUT_PULLUP_END,
84 72
85 PINMUX_INPUT_PULLDOWN_BEGIN, 73 PINMUX_INPUT_PULLDOWN_BEGIN,
86 PORT_310(IN_PD), /* PORT0_IN_PD -> PORT309_IN_PD */ 74 PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT309_IN_PD */
87 PINMUX_INPUT_PULLDOWN_END, 75 PINMUX_INPUT_PULLDOWN_END,
88 76
89 PINMUX_OUTPUT_BEGIN, 77 PINMUX_OUTPUT_BEGIN,
90 PORT_310(OUT), /* PORT0_OUT -> PORT309_OUT */ 78 PORT_ALL(OUT), /* PORT0_OUT -> PORT309_OUT */
91 PINMUX_OUTPUT_END, 79 PINMUX_OUTPUT_END,
92 80
93 PINMUX_FUNCTION_BEGIN, 81 PINMUX_FUNCTION_BEGIN,
94 PORT_310(FN_IN), /* PORT0_FN_IN -> PORT309_FN_IN */ 82 PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT309_FN_IN */
95 PORT_310(FN_OUT), /* PORT0_FN_OUT -> PORT309_FN_OUT */ 83 PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT309_FN_OUT */
96 PORT_310(FN0), /* PORT0_FN0 -> PORT309_FN0 */ 84 PORT_ALL(FN0), /* PORT0_FN0 -> PORT309_FN0 */
97 PORT_310(FN1), /* PORT0_FN1 -> PORT309_FN1 */ 85 PORT_ALL(FN1), /* PORT0_FN1 -> PORT309_FN1 */
98 PORT_310(FN2), /* PORT0_FN2 -> PORT309_FN2 */ 86 PORT_ALL(FN2), /* PORT0_FN2 -> PORT309_FN2 */
99 PORT_310(FN3), /* PORT0_FN3 -> PORT309_FN3 */ 87 PORT_ALL(FN3), /* PORT0_FN3 -> PORT309_FN3 */
100 PORT_310(FN4), /* PORT0_FN4 -> PORT309_FN4 */ 88 PORT_ALL(FN4), /* PORT0_FN4 -> PORT309_FN4 */
101 PORT_310(FN5), /* PORT0_FN5 -> PORT309_FN5 */ 89 PORT_ALL(FN5), /* PORT0_FN5 -> PORT309_FN5 */
102 PORT_310(FN6), /* PORT0_FN6 -> PORT309_FN6 */ 90 PORT_ALL(FN6), /* PORT0_FN6 -> PORT309_FN6 */
103 PORT_310(FN7), /* PORT0_FN7 -> PORT309_FN7 */ 91 PORT_ALL(FN7), /* PORT0_FN7 -> PORT309_FN7 */
104 92
105 MSEL2CR_MSEL19_0, MSEL2CR_MSEL19_1, 93 MSEL2CR_MSEL19_0, MSEL2CR_MSEL19_1,
106 MSEL2CR_MSEL18_0, MSEL2CR_MSEL18_1, 94 MSEL2CR_MSEL18_0, MSEL2CR_MSEL18_1,
@@ -508,6 +496,14 @@ enum {
508 SDHICMD2_PU_MARK, 496 SDHICMD2_PU_MARK,
509 MMCCMD0_PU_MARK, 497 MMCCMD0_PU_MARK,
510 MMCCMD1_PU_MARK, 498 MMCCMD1_PU_MARK,
499 MMCD0_0_PU_MARK,
500 MMCD0_1_PU_MARK,
501 MMCD0_2_PU_MARK,
502 MMCD0_3_PU_MARK,
503 MMCD0_4_PU_MARK,
504 MMCD0_5_PU_MARK,
505 MMCD0_6_PU_MARK,
506 MMCD0_7_PU_MARK,
511 FSIBISLD_PU_MARK, 507 FSIBISLD_PU_MARK,
512 FSIACK_PU_MARK, 508 FSIACK_PU_MARK,
513 FSIAILR_PU_MARK, 509 FSIAILR_PU_MARK,
@@ -517,45 +513,6 @@ enum {
517 PINMUX_MARK_END, 513 PINMUX_MARK_END,
518}; 514};
519 515
520#define PORT_DATA_I(nr) \
521 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
522
523#define PORT_DATA_I_PD(nr) \
524 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
525 PORT##nr##_IN, PORT##nr##_IN_PD)
526
527#define PORT_DATA_I_PU(nr) \
528 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
529 PORT##nr##_IN, PORT##nr##_IN_PU)
530
531#define PORT_DATA_I_PU_PD(nr) \
532 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
533 PORT##nr##_IN, PORT##nr##_IN_PD, \
534 PORT##nr##_IN_PU)
535
536#define PORT_DATA_O(nr) \
537 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
538 PORT##nr##_OUT)
539
540#define PORT_DATA_IO(nr) \
541 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
542 PORT##nr##_OUT, PORT##nr##_IN)
543
544#define PORT_DATA_IO_PD(nr) \
545 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
546 PORT##nr##_OUT, PORT##nr##_IN, \
547 PORT##nr##_IN_PD)
548
549#define PORT_DATA_IO_PU(nr) \
550 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
551 PORT##nr##_OUT, PORT##nr##_IN, \
552 PORT##nr##_IN_PU)
553
554#define PORT_DATA_IO_PU_PD(nr) \
555 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
556 PORT##nr##_OUT, PORT##nr##_IN, \
557 PORT##nr##_IN_PD, PORT##nr##_IN_PU)
558
559static pinmux_enum_t pinmux_data[] = { 516static pinmux_enum_t pinmux_data[] = {
560 /* specify valid pin states for each pin in GPIO mode */ 517 /* specify valid pin states for each pin in GPIO mode */
561 518
@@ -1561,6 +1518,24 @@ static pinmux_enum_t pinmux_data[] = {
1561 MSEL4CR_MSEL15_0), 1518 MSEL4CR_MSEL15_0),
1562 PINMUX_DATA(MMCCMD1_PU_MARK, PORT297_FN2, PORT297_IN_PU, 1519 PINMUX_DATA(MMCCMD1_PU_MARK, PORT297_FN2, PORT297_IN_PU,
1563 MSEL4CR_MSEL15_1), 1520 MSEL4CR_MSEL15_1),
1521
1522 PINMUX_DATA(MMCD0_0_PU_MARK,
1523 PORT271_FN1, PORT271_IN_PU, MSEL4CR_MSEL15_0),
1524 PINMUX_DATA(MMCD0_1_PU_MARK,
1525 PORT272_FN1, PORT272_IN_PU, MSEL4CR_MSEL15_0),
1526 PINMUX_DATA(MMCD0_2_PU_MARK,
1527 PORT273_FN1, PORT273_IN_PU, MSEL4CR_MSEL15_0),
1528 PINMUX_DATA(MMCD0_3_PU_MARK,
1529 PORT274_FN1, PORT274_IN_PU, MSEL4CR_MSEL15_0),
1530 PINMUX_DATA(MMCD0_4_PU_MARK,
1531 PORT275_FN1, PORT275_IN_PU, MSEL4CR_MSEL15_0),
1532 PINMUX_DATA(MMCD0_5_PU_MARK,
1533 PORT276_FN1, PORT276_IN_PU, MSEL4CR_MSEL15_0),
1534 PINMUX_DATA(MMCD0_6_PU_MARK,
1535 PORT277_FN1, PORT277_IN_PU, MSEL4CR_MSEL15_0),
1536 PINMUX_DATA(MMCD0_7_PU_MARK,
1537 PORT278_FN1, PORT278_IN_PU, MSEL4CR_MSEL15_0),
1538
1564 PINMUX_DATA(FSIBISLD_PU_MARK, PORT39_FN1, PORT39_IN_PU), 1539 PINMUX_DATA(FSIBISLD_PU_MARK, PORT39_FN1, PORT39_IN_PU),
1565 PINMUX_DATA(FSIACK_PU_MARK, PORT49_FN1, PORT49_IN_PU), 1540 PINMUX_DATA(FSIACK_PU_MARK, PORT49_FN1, PORT49_IN_PU),
1566 PINMUX_DATA(FSIAILR_PU_MARK, PORT50_FN5, PORT50_IN_PU), 1541 PINMUX_DATA(FSIAILR_PU_MARK, PORT50_FN5, PORT50_IN_PU),
@@ -1568,12 +1543,8 @@ static pinmux_enum_t pinmux_data[] = {
1568 PINMUX_DATA(FSIAISLD_PU_MARK, PORT55_FN1, PORT55_IN_PU), 1543 PINMUX_DATA(FSIAISLD_PU_MARK, PORT55_FN1, PORT55_IN_PU),
1569}; 1544};
1570 1545
1571#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
1572#define GPIO_PORT_310() _310(_GPIO_PORT, , unused)
1573#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
1574
1575static struct pinmux_gpio pinmux_gpios[] = { 1546static struct pinmux_gpio pinmux_gpios[] = {
1576 GPIO_PORT_310(), 1547 GPIO_PORT_ALL(),
1577 1548
1578 /* Table 25-1 (Functions 0-7) */ 1549 /* Table 25-1 (Functions 0-7) */
1579 GPIO_FN(VBUS_0), 1550 GPIO_FN(VBUS_0),
@@ -2236,24 +2207,20 @@ static struct pinmux_gpio pinmux_gpios[] = {
2236 GPIO_FN(SDHICMD2_PU), 2207 GPIO_FN(SDHICMD2_PU),
2237 GPIO_FN(MMCCMD0_PU), 2208 GPIO_FN(MMCCMD0_PU),
2238 GPIO_FN(MMCCMD1_PU), 2209 GPIO_FN(MMCCMD1_PU),
2210 GPIO_FN(MMCD0_0_PU),
2211 GPIO_FN(MMCD0_1_PU),
2212 GPIO_FN(MMCD0_2_PU),
2213 GPIO_FN(MMCD0_3_PU),
2214 GPIO_FN(MMCD0_4_PU),
2215 GPIO_FN(MMCD0_5_PU),
2216 GPIO_FN(MMCD0_6_PU),
2217 GPIO_FN(MMCD0_7_PU),
2239 GPIO_FN(FSIACK_PU), 2218 GPIO_FN(FSIACK_PU),
2240 GPIO_FN(FSIAILR_PU), 2219 GPIO_FN(FSIAILR_PU),
2241 GPIO_FN(FSIAIBT_PU), 2220 GPIO_FN(FSIAIBT_PU),
2242 GPIO_FN(FSIAISLD_PU), 2221 GPIO_FN(FSIAISLD_PU),
2243}; 2222};
2244 2223
2245#define PORTCR(nr, reg) \
2246 { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
2247 0, \
2248 /*0001*/ PORT##nr##_OUT , \
2249 /*0010*/ PORT##nr##_IN , 0, 0, 0, 0, 0, 0, 0, \
2250 /*1010*/ PORT##nr##_IN_PD, 0, 0, 0, \
2251 /*1110*/ PORT##nr##_IN_PU, 0, \
2252 PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
2253 PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
2254 PORT##nr##_FN6, PORT##nr##_FN7, 0, 0, 0, 0, 0, 0, 0, 0 } \
2255 }
2256
2257static struct pinmux_cfg_reg pinmux_config_regs[] = { 2224static struct pinmux_cfg_reg pinmux_config_regs[] = {
2258 PORTCR(0, 0xe6050000), /* PORT0CR */ 2225 PORTCR(0, 0xe6050000), /* PORT0CR */
2259 PORTCR(1, 0xe6050001), /* PORT1CR */ 2226 PORTCR(1, 0xe6050001), /* PORT1CR */
diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c
index 79612737c5b..34bbcbfb170 100644
--- a/arch/arm/mach-shmobile/pm-sh7372.c
+++ b/arch/arm/mach-shmobile/pm-sh7372.c
@@ -20,6 +20,7 @@
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/irq.h> 21#include <linux/irq.h>
22#include <linux/bitrev.h> 22#include <linux/bitrev.h>
23#include <linux/console.h>
23#include <asm/system.h> 24#include <asm/system.h>
24#include <asm/io.h> 25#include <asm/io.h>
25#include <asm/tlbflush.h> 26#include <asm/tlbflush.h>
@@ -106,9 +107,8 @@ static int pd_power_down(struct generic_pm_domain *genpd)
106 return 0; 107 return 0;
107} 108}
108 109
109static int pd_power_up(struct generic_pm_domain *genpd) 110static int __pd_power_up(struct sh7372_pm_domain *sh7372_pd, bool do_resume)
110{ 111{
111 struct sh7372_pm_domain *sh7372_pd = to_sh7372_pd(genpd);
112 unsigned int mask = 1 << sh7372_pd->bit_shift; 112 unsigned int mask = 1 << sh7372_pd->bit_shift;
113 unsigned int retry_count; 113 unsigned int retry_count;
114 int ret = 0; 114 int ret = 0;
@@ -123,13 +123,13 @@ static int pd_power_up(struct generic_pm_domain *genpd)
123 123
124 for (retry_count = 2 * PSTR_RETRIES; retry_count; retry_count--) { 124 for (retry_count = 2 * PSTR_RETRIES; retry_count; retry_count--) {
125 if (!(__raw_readl(SWUCR) & mask)) 125 if (!(__raw_readl(SWUCR) & mask))
126 goto out; 126 break;
127 if (retry_count > PSTR_RETRIES) 127 if (retry_count > PSTR_RETRIES)
128 udelay(PSTR_DELAY_US); 128 udelay(PSTR_DELAY_US);
129 else 129 else
130 cpu_relax(); 130 cpu_relax();
131 } 131 }
132 if (__raw_readl(SWUCR) & mask) 132 if (!retry_count)
133 ret = -EIO; 133 ret = -EIO;
134 134
135 if (!sh7372_pd->no_debug) 135 if (!sh7372_pd->no_debug)
@@ -137,12 +137,17 @@ static int pd_power_up(struct generic_pm_domain *genpd)
137 mask, __raw_readl(PSTR)); 137 mask, __raw_readl(PSTR));
138 138
139 out: 139 out:
140 if (ret == 0 && sh7372_pd->resume) 140 if (ret == 0 && sh7372_pd->resume && do_resume)
141 sh7372_pd->resume(); 141 sh7372_pd->resume();
142 142
143 return ret; 143 return ret;
144} 144}
145 145
146static int pd_power_up(struct generic_pm_domain *genpd)
147{
148 return __pd_power_up(to_sh7372_pd(genpd), true);
149}
150
146static void sh7372_a4r_suspend(void) 151static void sh7372_a4r_suspend(void)
147{ 152{
148 sh7372_intcs_suspend(); 153 sh7372_intcs_suspend();
@@ -174,7 +179,7 @@ void sh7372_init_pm_domain(struct sh7372_pm_domain *sh7372_pd)
174 genpd->active_wakeup = pd_active_wakeup; 179 genpd->active_wakeup = pd_active_wakeup;
175 genpd->power_off = pd_power_down; 180 genpd->power_off = pd_power_down;
176 genpd->power_on = pd_power_up; 181 genpd->power_on = pd_power_up;
177 genpd->power_on(&sh7372_pd->genpd); 182 __pd_power_up(sh7372_pd, false);
178} 183}
179 184
180void sh7372_add_device_to_domain(struct sh7372_pm_domain *sh7372_pd, 185void sh7372_add_device_to_domain(struct sh7372_pm_domain *sh7372_pd,
@@ -227,11 +232,23 @@ struct sh7372_pm_domain sh7372_a3sp = {
227 .no_debug = true, 232 .no_debug = true,
228}; 233};
229 234
235static void sh7372_a3sp_init(void)
236{
237 /* serial consoles make use of SCIF hardware located in A3SP,
238 * keep such power domain on if "no_console_suspend" is set.
239 */
240 sh7372_a3sp.stay_on = !console_suspend_enabled;
241}
242
230struct sh7372_pm_domain sh7372_a3sg = { 243struct sh7372_pm_domain sh7372_a3sg = {
231 .bit_shift = 13, 244 .bit_shift = 13,
232}; 245};
233 246
234#endif /* CONFIG_PM */ 247#else /* !CONFIG_PM */
248
249static inline void sh7372_a3sp_init(void) {}
250
251#endif /* !CONFIG_PM */
235 252
236#if defined(CONFIG_SUSPEND) || defined(CONFIG_CPU_IDLE) 253#if defined(CONFIG_SUSPEND) || defined(CONFIG_CPU_IDLE)
237static int sh7372_do_idle_core_standby(unsigned long unused) 254static int sh7372_do_idle_core_standby(unsigned long unused)
@@ -402,22 +419,18 @@ static void sh7372_setup_a3sm(unsigned long msk, unsigned long msk2)
402 419
403#ifdef CONFIG_CPU_IDLE 420#ifdef CONFIG_CPU_IDLE
404 421
405static void sh7372_cpuidle_setup(struct cpuidle_device *dev) 422static void sh7372_cpuidle_setup(struct cpuidle_driver *drv)
406{ 423{
407 struct cpuidle_state *state; 424 struct cpuidle_state *state = &drv->states[drv->state_count];
408 int i = dev->state_count;
409 425
410 state = &dev->states[i];
411 snprintf(state->name, CPUIDLE_NAME_LEN, "C2"); 426 snprintf(state->name, CPUIDLE_NAME_LEN, "C2");
412 strncpy(state->desc, "Core Standby Mode", CPUIDLE_DESC_LEN); 427 strncpy(state->desc, "Core Standby Mode", CPUIDLE_DESC_LEN);
413 state->exit_latency = 10; 428 state->exit_latency = 10;
414 state->target_residency = 20 + 10; 429 state->target_residency = 20 + 10;
415 state->power_usage = 1; /* perhaps not */ 430 state->flags = CPUIDLE_FLAG_TIME_VALID;
416 state->flags = 0; 431 shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_core_standby;
417 state->flags |= CPUIDLE_FLAG_TIME_VALID;
418 shmobile_cpuidle_modes[i] = sh7372_enter_core_standby;
419 432
420 dev->state_count = i + 1; 433 drv->state_count++;
421} 434}
422 435
423static void sh7372_cpuidle_init(void) 436static void sh7372_cpuidle_init(void)
@@ -469,6 +482,8 @@ void __init sh7372_pm_init(void)
469 /* do not convert A3SM, A3SP, A3SG, A4R power down into A4S */ 482 /* do not convert A3SM, A3SP, A3SG, A4R power down into A4S */
470 __raw_writel(0, PDNSEL); 483 __raw_writel(0, PDNSEL);
471 484
485 sh7372_a3sp_init();
486
472 sh7372_suspend_init(); 487 sh7372_suspend_init();
473 sh7372_cpuidle_init(); 488 sh7372_cpuidle_init();
474} 489}
diff --git a/arch/arm/mach-shmobile/pm_runtime.c b/arch/arm/mach-shmobile/pm_runtime.c
deleted file mode 100644
index bd5c6a3b8c5..00000000000
--- a/arch/arm/mach-shmobile/pm_runtime.c
+++ /dev/null
@@ -1,67 +0,0 @@
1/*
2 * arch/arm/mach-shmobile/pm_runtime.c
3 *
4 * Runtime PM support code for SuperH Mobile ARM
5 *
6 * Copyright (C) 2009-2010 Magnus Damm
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/io.h>
16#include <linux/pm_runtime.h>
17#include <linux/pm_domain.h>
18#include <linux/pm_clock.h>
19#include <linux/platform_device.h>
20#include <linux/clk.h>
21#include <linux/sh_clk.h>
22#include <linux/bitmap.h>
23#include <linux/slab.h>
24
25#ifdef CONFIG_PM_RUNTIME
26
27static int default_platform_runtime_idle(struct device *dev)
28{
29 /* suspend synchronously to disable clocks immediately */
30 return pm_runtime_suspend(dev);
31}
32
33static struct dev_pm_domain default_pm_domain = {
34 .ops = {
35 .runtime_suspend = pm_clk_suspend,
36 .runtime_resume = pm_clk_resume,
37 .runtime_idle = default_platform_runtime_idle,
38 USE_PLATFORM_PM_SLEEP_OPS
39 },
40};
41
42#define DEFAULT_PM_DOMAIN_PTR (&default_pm_domain)
43
44#else
45
46#define DEFAULT_PM_DOMAIN_PTR NULL
47
48#endif /* CONFIG_PM_RUNTIME */
49
50static struct pm_clk_notifier_block platform_bus_notifier = {
51 .pm_domain = DEFAULT_PM_DOMAIN_PTR,
52 .con_ids = { NULL, },
53};
54
55static int __init sh_pm_runtime_init(void)
56{
57 pm_clk_add_notifier(&platform_bus_type, &platform_bus_notifier);
58 return 0;
59}
60core_initcall(sh_pm_runtime_init);
61
62static int __init sh_pm_runtime_late_init(void)
63{
64 pm_genpd_poweroff_unused();
65 return 0;
66}
67late_initcall(sh_pm_runtime_late_init);
diff --git a/arch/arm/mach-tcc8k/Kconfig b/arch/arm/mach-tcc8k/Kconfig
deleted file mode 100644
index ad86415d157..00000000000
--- a/arch/arm/mach-tcc8k/Kconfig
+++ /dev/null
@@ -1,11 +0,0 @@
1if ARCH_TCC8K
2
3comment "TCC8000 systems:"
4
5config MACH_TCC8000_SDK
6 bool "Telechips TCC8000-SDK development kit"
7 default y
8 help
9 Support for the Telechips TCC8000-SDK board.
10
11endif
diff --git a/arch/arm/mach-tcc8k/Makefile b/arch/arm/mach-tcc8k/Makefile
deleted file mode 100644
index 9bacf31e49b..00000000000
--- a/arch/arm/mach-tcc8k/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
1#
2# Makefile for TCC8K boards and common files.
3#
4
5# Common support
6obj-y += clock.o irq.o time.o io.o devices.o
7
8# Board specific support
9obj-$(CONFIG_MACH_TCC8000_SDK) += board-tcc8000-sdk.o
diff --git a/arch/arm/mach-tcc8k/Makefile.boot b/arch/arm/mach-tcc8k/Makefile.boot
deleted file mode 100644
index 5e02d4156b0..00000000000
--- a/arch/arm/mach-tcc8k/Makefile.boot
+++ /dev/null
@@ -1,3 +0,0 @@
1 zreladdr-y += 0x20008000
2params_phys-y := 0x20000100
3initrd_phys-y := 0x20800000
diff --git a/arch/arm/mach-tcc8k/board-tcc8000-sdk.c b/arch/arm/mach-tcc8k/board-tcc8000-sdk.c
deleted file mode 100644
index 777a5bb9eed..00000000000
--- a/arch/arm/mach-tcc8k/board-tcc8000-sdk.c
+++ /dev/null
@@ -1,81 +0,0 @@
1/*
2 * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <linux/delay.h>
10#include <linux/init.h>
11#include <linux/kernel.h>
12#include <linux/platform_device.h>
13
14#include <asm/mach-types.h>
15
16#include <asm/mach/arch.h>
17#include <asm/mach/map.h>
18#include <asm/mach/time.h>
19
20#include <mach/clock.h>
21#include <mach/tcc-nand.h>
22#include <mach/tcc8k-regs.h>
23
24#include "common.h"
25
26#define XI_FREQUENCY 12000000
27#define XTI_FREQUENCY 32768
28
29#ifdef CONFIG_MTD_NAND_TCC
30/* NAND */
31static struct tcc_nand_platform_data tcc8k_sdk_nand_data = {
32 .width = 1,
33 .hw_ecc = 0,
34};
35#endif
36
37static void __init tcc8k_init(void)
38{
39#ifdef CONFIG_MTD_NAND_TCC
40 tcc_nand_device.dev.platform_data = &tcc8k_sdk_nand_data;
41 platform_device_register(&tcc_nand_device);
42#endif
43}
44
45static void __init tcc8k_init_timer(void)
46{
47 tcc_clocks_init(XI_FREQUENCY, XTI_FREQUENCY);
48}
49
50static struct sys_timer tcc8k_timer = {
51 .init = tcc8k_init_timer,
52};
53
54static void __init tcc8k_map_io(void)
55{
56 tcc8k_map_common_io();
57
58 /* set PLL0 clock to 96MHz, adapt UART0 divisor */
59 __raw_writel(0x00026003, CKC_BASE + PLL0CFG_OFFS);
60 __raw_writel(0x10000001, CKC_BASE + ACLKUART0_OFFS);
61
62 /* set PLL1 clock to 192MHz */
63 __raw_writel(0x00016003, CKC_BASE + PLL1CFG_OFFS);
64
65 /* set PLL2 clock to 48MHz */
66 __raw_writel(0x00036003, CKC_BASE + PLL2CFG_OFFS);
67
68 /* with CPU freq higher than 150 MHz, need extra DTCM wait */
69 __raw_writel(0x00000001, SCFG_BASE + DTCMWAIT_OFFS);
70
71 /* PLL locking time as specified */
72 udelay(300);
73}
74
75MACHINE_START(TCC8000_SDK, "Telechips TCC8000-SDK Demo Board")
76 .atag_offset = 0x100,
77 .map_io = tcc8k_map_io,
78 .init_irq = tcc8k_init_irq,
79 .init_machine = tcc8k_init,
80 .timer = &tcc8k_timer,
81MACHINE_END
diff --git a/arch/arm/mach-tcc8k/clock.c b/arch/arm/mach-tcc8k/clock.c
deleted file mode 100644
index e7cdae5c77a..00000000000
--- a/arch/arm/mach-tcc8k/clock.c
+++ /dev/null
@@ -1,580 +0,0 @@
1/*
2 * Lowlevel clock handling for Telechips TCC8xxx SoCs
3 *
4 * Copyright (C) 2010 by Hans J. Koch <hjk@linutronix.de>
5 *
6 * Licensed under the terms of the GPL v2
7 */
8
9#include <linux/clk.h>
10#include <linux/delay.h>
11#include <linux/err.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/spinlock.h>
15#include <linux/clkdev.h>
16
17#include <mach/clock.h>
18#include <mach/irqs.h>
19#include <mach/tcc8k-regs.h>
20
21#include "common.h"
22
23#define BCLKCTR0 (CKC_BASE + BCLKCTR0_OFFS)
24#define BCLKCTR1 (CKC_BASE + BCLKCTR1_OFFS)
25
26#define ACLKREF (CKC_BASE + ACLKREF_OFFS)
27#define ACLKUART0 (CKC_BASE + ACLKUART0_OFFS)
28#define ACLKUART1 (CKC_BASE + ACLKUART1_OFFS)
29#define ACLKUART2 (CKC_BASE + ACLKUART2_OFFS)
30#define ACLKUART3 (CKC_BASE + ACLKUART3_OFFS)
31#define ACLKUART4 (CKC_BASE + ACLKUART4_OFFS)
32#define ACLKI2C (CKC_BASE + ACLKI2C_OFFS)
33#define ACLKADC (CKC_BASE + ACLKADC_OFFS)
34#define ACLKUSBH (CKC_BASE + ACLKUSBH_OFFS)
35#define ACLKLCD (CKC_BASE + ACLKLCD_OFFS)
36#define ACLKSDH0 (CKC_BASE + ACLKSDH0_OFFS)
37#define ACLKSDH1 (CKC_BASE + ACLKSDH1_OFFS)
38#define ACLKSPI0 (CKC_BASE + ACLKSPI0_OFFS)
39#define ACLKSPI1 (CKC_BASE + ACLKSPI1_OFFS)
40#define ACLKSPDIF (CKC_BASE + ACLKSPDIF_OFFS)
41#define ACLKC3DEC (CKC_BASE + ACLKC3DEC_OFFS)
42#define ACLKCAN0 (CKC_BASE + ACLKCAN0_OFFS)
43#define ACLKCAN1 (CKC_BASE + ACLKCAN1_OFFS)
44#define ACLKGSB0 (CKC_BASE + ACLKGSB0_OFFS)
45#define ACLKGSB1 (CKC_BASE + ACLKGSB1_OFFS)
46#define ACLKGSB2 (CKC_BASE + ACLKGSB2_OFFS)
47#define ACLKGSB3 (CKC_BASE + ACLKGSB3_OFFS)
48#define ACLKTCT (CKC_BASE + ACLKTCT_OFFS)
49#define ACLKTCX (CKC_BASE + ACLKTCX_OFFS)
50#define ACLKTCZ (CKC_BASE + ACLKTCZ_OFFS)
51
52#define ACLK_MAX_DIV (0xfff + 1)
53
54/* Crystal frequencies */
55static unsigned long xi_rate, xti_rate;
56
57static void __iomem *pll_cfg_addr(int pll)
58{
59 switch (pll) {
60 case 0: return (CKC_BASE + PLL0CFG_OFFS);
61 case 1: return (CKC_BASE + PLL1CFG_OFFS);
62 case 2: return (CKC_BASE + PLL2CFG_OFFS);
63 default:
64 BUG();
65 }
66}
67
68static int pll_enable(int pll, int enable)
69{
70 u32 reg;
71 void __iomem *addr = pll_cfg_addr(pll);
72
73 reg = __raw_readl(addr);
74 if (enable)
75 reg &= ~PLLxCFG_PD;
76 else
77 reg |= PLLxCFG_PD;
78
79 __raw_writel(reg, addr);
80 return 0;
81}
82
83static int xi_enable(int enable)
84{
85 u32 reg;
86
87 reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS);
88 if (enable)
89 reg |= CLKCTRL_XE;
90 else
91 reg &= ~CLKCTRL_XE;
92
93 __raw_writel(reg, CKC_BASE + CLKCTRL_OFFS);
94 return 0;
95}
96
97static int root_clk_enable(enum root_clks src)
98{
99 switch (src) {
100 case CLK_SRC_PLL0: return pll_enable(0, 1);
101 case CLK_SRC_PLL1: return pll_enable(1, 1);
102 case CLK_SRC_PLL2: return pll_enable(2, 1);
103 case CLK_SRC_XI: return xi_enable(1);
104 default:
105 BUG();
106 }
107 return 0;
108}
109
110static int root_clk_disable(enum root_clks src)
111{
112 switch (src) {
113 case CLK_SRC_PLL0: return pll_enable(0, 0);
114 case CLK_SRC_PLL1: return pll_enable(1, 0);
115 case CLK_SRC_PLL2: return pll_enable(2, 0);
116 case CLK_SRC_XI: return xi_enable(0);
117 default:
118 BUG();
119 }
120 return 0;
121}
122
123static int enable_clk(struct clk *clk)
124{
125 u32 reg;
126
127 if (clk->root_id != CLK_SRC_NOROOT)
128 return root_clk_enable(clk->root_id);
129
130 if (clk->aclkreg) {
131 reg = __raw_readl(clk->aclkreg);
132 reg |= ACLK_EN;
133 __raw_writel(reg, clk->aclkreg);
134 }
135 if (clk->bclkctr) {
136 reg = __raw_readl(clk->bclkctr);
137 reg |= 1 << clk->bclk_shift;
138 __raw_writel(reg, clk->bclkctr);
139 }
140 return 0;
141}
142
143static void disable_clk(struct clk *clk)
144{
145 u32 reg;
146
147 if (clk->root_id != CLK_SRC_NOROOT) {
148 root_clk_disable(clk->root_id);
149 return;
150 }
151
152 if (clk->bclkctr) {
153 reg = __raw_readl(clk->bclkctr);
154 reg &= ~(1 << clk->bclk_shift);
155 __raw_writel(reg, clk->bclkctr);
156 }
157 if (clk->aclkreg) {
158 reg = __raw_readl(clk->aclkreg);
159 reg &= ~ACLK_EN;
160 __raw_writel(reg, clk->aclkreg);
161 }
162}
163
164static unsigned long get_rate_pll(int pll)
165{
166 u32 reg;
167 unsigned long s, m, p;
168 void __iomem *addr = pll_cfg_addr(pll);
169
170 reg = __raw_readl(addr);
171 s = (reg >> 16) & 0x07;
172 m = (reg >> 8) & 0xff;
173 p = reg & 0x3f;
174
175 return (m * xi_rate) / (p * (1 << s));
176}
177
178static unsigned long get_rate_pll_div(int pll)
179{
180 u32 reg;
181 unsigned long div = 0;
182 void __iomem *addr;
183
184 switch (pll) {
185 case 0:
186 addr = CKC_BASE + CLKDIVC0_OFFS;
187 reg = __raw_readl(addr);
188 if (reg & CLKDIVC0_P0E)
189 div = (reg >> 24) & 0x3f;
190 break;
191 case 1:
192 addr = CKC_BASE + CLKDIVC0_OFFS;
193 reg = __raw_readl(addr);
194 if (reg & CLKDIVC0_P1E)
195 div = (reg >> 16) & 0x3f;
196 break;
197 case 2:
198 addr = CKC_BASE + CLKDIVC1_OFFS;
199 reg = __raw_readl(addr);
200 if (reg & CLKDIVC1_P2E)
201 div = reg & 0x3f;
202 break;
203 }
204 return get_rate_pll(pll) / (div + 1);
205}
206
207static unsigned long get_rate_xi_div(void)
208{
209 unsigned long div = 0;
210 u32 reg = __raw_readl(CKC_BASE + CLKDIVC0_OFFS);
211
212 if (reg & CLKDIVC0_XE)
213 div = (reg >> 8) & 0x3f;
214
215 return xi_rate / (div + 1);
216}
217
218static unsigned long get_rate_xti_div(void)
219{
220 unsigned long div = 0;
221 u32 reg = __raw_readl(CKC_BASE + CLKDIVC0_OFFS);
222
223 if (reg & CLKDIVC0_XTE)
224 div = reg & 0x3f;
225
226 return xti_rate / (div + 1);
227}
228
229static unsigned long root_clk_get_rate(enum root_clks src)
230{
231 switch (src) {
232 case CLK_SRC_PLL0: return get_rate_pll(0);
233 case CLK_SRC_PLL1: return get_rate_pll(1);
234 case CLK_SRC_PLL2: return get_rate_pll(2);
235 case CLK_SRC_PLL0DIV: return get_rate_pll_div(0);
236 case CLK_SRC_PLL1DIV: return get_rate_pll_div(1);
237 case CLK_SRC_PLL2DIV: return get_rate_pll_div(2);
238 case CLK_SRC_XI: return xi_rate;
239 case CLK_SRC_XTI: return xti_rate;
240 case CLK_SRC_XIDIV: return get_rate_xi_div();
241 case CLK_SRC_XTIDIV: return get_rate_xti_div();
242 default: return 0;
243 }
244}
245
246static unsigned long aclk_get_rate(struct clk *clk)
247{
248 u32 reg;
249 unsigned long div;
250 unsigned int src;
251
252 reg = __raw_readl(clk->aclkreg);
253 div = reg & 0x0fff;
254 src = (reg >> ACLK_SEL_SHIFT) & CLK_SRC_MASK;
255 return root_clk_get_rate(src) / (div + 1);
256}
257
258static unsigned long aclk_best_div(struct clk *clk, unsigned long rate)
259{
260 unsigned long div, src, freq, r1, r2;
261
262 if (!rate)
263 return ACLK_MAX_DIV;
264
265 src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT;
266 src &= CLK_SRC_MASK;
267 freq = root_clk_get_rate(src);
268 div = freq / rate;
269 if (!div)
270 return 1;
271 if (div >= ACLK_MAX_DIV)
272 return ACLK_MAX_DIV;
273 r1 = freq / div;
274 r2 = freq / (div + 1);
275 if ((rate - r2) < (r1 - rate))
276 return div + 1;
277
278 return div;
279}
280
281static unsigned long aclk_round_rate(struct clk *clk, unsigned long rate)
282{
283 unsigned int src;
284
285 src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT;
286 src &= CLK_SRC_MASK;
287
288 return root_clk_get_rate(src) / aclk_best_div(clk, rate);
289}
290
291static int aclk_set_rate(struct clk *clk, unsigned long rate)
292{
293 u32 reg;
294
295 reg = __raw_readl(clk->aclkreg) & ~ACLK_DIV_MASK;
296 reg |= aclk_best_div(clk, rate) - 1;
297 __raw_writel(reg, clk->aclkreg);
298 return 0;
299}
300
301static unsigned long get_rate_sys(struct clk *clk)
302{
303 unsigned int src;
304
305 src = __raw_readl(CKC_BASE + CLKCTRL_OFFS) & CLK_SRC_MASK;
306 return root_clk_get_rate(src);
307}
308
309static unsigned long get_rate_bus(struct clk *clk)
310{
311 unsigned int reg, sdiv, bdiv, rate;
312
313 reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS);
314 rate = get_rate_sys(clk);
315 sdiv = (reg >> 20) & 3;
316 if (sdiv)
317 rate /= sdiv + 1;
318 bdiv = (reg >> 4) & 0xff;
319 if (bdiv)
320 rate /= bdiv + 1;
321 return rate;
322}
323
324static unsigned long get_rate_cpu(struct clk *clk)
325{
326 unsigned int reg, div, fsys, fbus;
327
328 fbus = get_rate_bus(clk);
329 reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS);
330 if (reg & (1 << 29))
331 return fbus;
332 fsys = get_rate_sys(clk);
333 div = (reg >> 16) & 0x0f;
334 return fbus + ((fsys - fbus) * (div + 1)) / 16;
335}
336
337static unsigned long get_rate_root(struct clk *clk)
338{
339 return root_clk_get_rate(clk->root_id);
340}
341
342static int aclk_set_parent(struct clk *clock, struct clk *parent)
343{
344 u32 reg;
345
346 if (clock->parent == parent)
347 return 0;
348
349 clock->parent = parent;
350
351 if (!parent)
352 return 0;
353
354 if (parent->root_id == CLK_SRC_NOROOT)
355 return 0;
356 reg = __raw_readl(clock->aclkreg);
357 reg &= ~ACLK_SEL_MASK;
358 reg |= (parent->root_id << ACLK_SEL_SHIFT) & ACLK_SEL_MASK;
359 __raw_writel(reg, clock->aclkreg);
360
361 return 0;
362}
363
364#define DEFINE_ROOT_CLOCK(name, ri, p) \
365 static struct clk name = { \
366 .root_id = ri, \
367 .get_rate = get_rate_root, \
368 .enable = enable_clk, \
369 .disable = disable_clk, \
370 .parent = p, \
371 };
372
373#define DEFINE_SPECIAL_CLOCK(name, gr, p) \
374 static struct clk name = { \
375 .root_id = CLK_SRC_NOROOT, \
376 .get_rate = gr, \
377 .parent = p, \
378 };
379
380#define DEFINE_ACLOCK(name, bc, bs, ar) \
381 static struct clk name = { \
382 .root_id = CLK_SRC_NOROOT, \
383 .bclkctr = bc, \
384 .bclk_shift = bs, \
385 .aclkreg = ar, \
386 .get_rate = aclk_get_rate, \
387 .set_rate = aclk_set_rate, \
388 .round_rate = aclk_round_rate, \
389 .enable = enable_clk, \
390 .disable = disable_clk, \
391 .set_parent = aclk_set_parent, \
392 };
393
394#define DEFINE_BCLOCK(name, bc, bs, gr, p) \
395 static struct clk name = { \
396 .root_id = CLK_SRC_NOROOT, \
397 .bclkctr = bc, \
398 .bclk_shift = bs, \
399 .get_rate = gr, \
400 .enable = enable_clk, \
401 .disable = disable_clk, \
402 .parent = p, \
403 };
404
405DEFINE_ROOT_CLOCK(xi, CLK_SRC_XI, NULL)
406DEFINE_ROOT_CLOCK(xti, CLK_SRC_XTI, NULL)
407DEFINE_ROOT_CLOCK(xidiv, CLK_SRC_XIDIV, &xi)
408DEFINE_ROOT_CLOCK(xtidiv, CLK_SRC_XTIDIV, &xti)
409DEFINE_ROOT_CLOCK(pll0, CLK_SRC_PLL0, &xi)
410DEFINE_ROOT_CLOCK(pll1, CLK_SRC_PLL1, &xi)
411DEFINE_ROOT_CLOCK(pll2, CLK_SRC_PLL2, &xi)
412DEFINE_ROOT_CLOCK(pll0div, CLK_SRC_PLL0DIV, &pll0)
413DEFINE_ROOT_CLOCK(pll1div, CLK_SRC_PLL1DIV, &pll1)
414DEFINE_ROOT_CLOCK(pll2div, CLK_SRC_PLL2DIV, &pll2)
415
416/* The following 3 clocks are special and are initialized explicitly later */
417DEFINE_SPECIAL_CLOCK(sys, get_rate_sys, NULL)
418DEFINE_SPECIAL_CLOCK(bus, get_rate_bus, &sys)
419DEFINE_SPECIAL_CLOCK(cpu, get_rate_cpu, &sys)
420
421DEFINE_ACLOCK(tct, NULL, 0, ACLKTCT)
422DEFINE_ACLOCK(tcx, NULL, 0, ACLKTCX)
423DEFINE_ACLOCK(tcz, NULL, 0, ACLKTCZ)
424DEFINE_ACLOCK(ref, NULL, 0, ACLKREF)
425DEFINE_ACLOCK(uart0, BCLKCTR0, 5, ACLKUART0)
426DEFINE_ACLOCK(uart1, BCLKCTR0, 23, ACLKUART1)
427DEFINE_ACLOCK(uart2, BCLKCTR0, 6, ACLKUART2)
428DEFINE_ACLOCK(uart3, BCLKCTR0, 8, ACLKUART3)
429DEFINE_ACLOCK(uart4, BCLKCTR1, 6, ACLKUART4)
430DEFINE_ACLOCK(i2c, BCLKCTR0, 7, ACLKI2C)
431DEFINE_ACLOCK(adc, BCLKCTR0, 10, ACLKADC)
432DEFINE_ACLOCK(usbh0, BCLKCTR0, 11, ACLKUSBH)
433DEFINE_ACLOCK(lcd, BCLKCTR0, 13, ACLKLCD)
434DEFINE_ACLOCK(sd0, BCLKCTR0, 17, ACLKSDH0)
435DEFINE_ACLOCK(sd1, BCLKCTR1, 5, ACLKSDH1)
436DEFINE_ACLOCK(spi0, BCLKCTR0, 24, ACLKSPI0)
437DEFINE_ACLOCK(spi1, BCLKCTR0, 30, ACLKSPI1)
438DEFINE_ACLOCK(spdif, BCLKCTR1, 2, ACLKSPDIF)
439DEFINE_ACLOCK(c3dec, BCLKCTR1, 9, ACLKC3DEC)
440DEFINE_ACLOCK(can0, BCLKCTR1, 10, ACLKCAN0)
441DEFINE_ACLOCK(can1, BCLKCTR1, 11, ACLKCAN1)
442DEFINE_ACLOCK(gsb0, BCLKCTR1, 13, ACLKGSB0)
443DEFINE_ACLOCK(gsb1, BCLKCTR1, 14, ACLKGSB1)
444DEFINE_ACLOCK(gsb2, BCLKCTR1, 15, ACLKGSB2)
445DEFINE_ACLOCK(gsb3, BCLKCTR1, 16, ACLKGSB3)
446DEFINE_ACLOCK(usbh1, BCLKCTR1, 20, ACLKUSBH)
447
448DEFINE_BCLOCK(dai0, BCLKCTR0, 0, NULL, NULL)
449DEFINE_BCLOCK(pic, BCLKCTR0, 1, NULL, NULL)
450DEFINE_BCLOCK(tc, BCLKCTR0, 2, NULL, NULL)
451DEFINE_BCLOCK(gpio, BCLKCTR0, 3, NULL, NULL)
452DEFINE_BCLOCK(usbd, BCLKCTR0, 4, NULL, NULL)
453DEFINE_BCLOCK(ecc, BCLKCTR0, 9, NULL, NULL)
454DEFINE_BCLOCK(gdma0, BCLKCTR0, 12, NULL, NULL)
455DEFINE_BCLOCK(rtc, BCLKCTR0, 15, NULL, NULL)
456DEFINE_BCLOCK(nfc, BCLKCTR0, 16, NULL, NULL)
457DEFINE_BCLOCK(g2d, BCLKCTR0, 18, NULL, NULL)
458DEFINE_BCLOCK(gdma1, BCLKCTR0, 22, NULL, NULL)
459DEFINE_BCLOCK(mscl, BCLKCTR0, 25, NULL, NULL)
460DEFINE_BCLOCK(bdma, BCLKCTR1, 0, NULL, NULL)
461DEFINE_BCLOCK(adma0, BCLKCTR1, 1, NULL, NULL)
462DEFINE_BCLOCK(scfg, BCLKCTR1, 3, NULL, NULL)
463DEFINE_BCLOCK(cid, BCLKCTR1, 4, NULL, NULL)
464DEFINE_BCLOCK(dai1, BCLKCTR1, 7, NULL, NULL)
465DEFINE_BCLOCK(adma1, BCLKCTR1, 8, NULL, NULL)
466DEFINE_BCLOCK(gps, BCLKCTR1, 12, NULL, NULL)
467DEFINE_BCLOCK(gdma2, BCLKCTR1, 17, NULL, NULL)
468DEFINE_BCLOCK(gdma3, BCLKCTR1, 18, NULL, NULL)
469DEFINE_BCLOCK(ddrc, BCLKCTR1, 19, NULL, NULL)
470
471#define _REGISTER_CLOCK(d, n, c) \
472 { \
473 .dev_id = d, \
474 .con_id = n, \
475 .clk = &c, \
476 },
477
478static struct clk_lookup lookups[] = {
479 _REGISTER_CLOCK(NULL, "bus", bus)
480 _REGISTER_CLOCK(NULL, "cpu", cpu)
481 _REGISTER_CLOCK(NULL, "tct", tct)
482 _REGISTER_CLOCK(NULL, "tcx", tcx)
483 _REGISTER_CLOCK(NULL, "tcz", tcz)
484 _REGISTER_CLOCK(NULL, "ref", ref)
485 _REGISTER_CLOCK(NULL, "dai0", dai0)
486 _REGISTER_CLOCK(NULL, "pic", pic)
487 _REGISTER_CLOCK(NULL, "tc", tc)
488 _REGISTER_CLOCK(NULL, "gpio", gpio)
489 _REGISTER_CLOCK(NULL, "usbd", usbd)
490 _REGISTER_CLOCK("tcc-uart.0", NULL, uart0)
491 _REGISTER_CLOCK("tcc-uart.2", NULL, uart2)
492 _REGISTER_CLOCK("tcc-i2c", NULL, i2c)
493 _REGISTER_CLOCK("tcc-uart.3", NULL, uart3)
494 _REGISTER_CLOCK(NULL, "ecc", ecc)
495 _REGISTER_CLOCK(NULL, "adc", adc)
496 _REGISTER_CLOCK("tcc-usbh.0", "usb", usbh0)
497 _REGISTER_CLOCK(NULL, "gdma0", gdma0)
498 _REGISTER_CLOCK(NULL, "lcd", lcd)
499 _REGISTER_CLOCK(NULL, "rtc", rtc)
500 _REGISTER_CLOCK(NULL, "nfc", nfc)
501 _REGISTER_CLOCK("tcc-mmc.0", NULL, sd0)
502 _REGISTER_CLOCK(NULL, "g2d", g2d)
503 _REGISTER_CLOCK(NULL, "gdma1", gdma1)
504 _REGISTER_CLOCK("tcc-uart.1", NULL, uart1)
505 _REGISTER_CLOCK("tcc-spi.0", NULL, spi0)
506 _REGISTER_CLOCK(NULL, "mscl", mscl)
507 _REGISTER_CLOCK("tcc-spi.1", NULL, spi1)
508 _REGISTER_CLOCK(NULL, "bdma", bdma)
509 _REGISTER_CLOCK(NULL, "adma0", adma0)
510 _REGISTER_CLOCK(NULL, "spdif", spdif)
511 _REGISTER_CLOCK(NULL, "scfg", scfg)
512 _REGISTER_CLOCK(NULL, "cid", cid)
513 _REGISTER_CLOCK("tcc-mmc.1", NULL, sd1)
514 _REGISTER_CLOCK("tcc-uart.4", NULL, uart4)
515 _REGISTER_CLOCK(NULL, "dai1", dai1)
516 _REGISTER_CLOCK(NULL, "adma1", adma1)
517 _REGISTER_CLOCK(NULL, "c3dec", c3dec)
518 _REGISTER_CLOCK("tcc-can.0", NULL, can0)
519 _REGISTER_CLOCK("tcc-can.1", NULL, can1)
520 _REGISTER_CLOCK(NULL, "gps", gps)
521 _REGISTER_CLOCK("tcc-gsb.0", NULL, gsb0)
522 _REGISTER_CLOCK("tcc-gsb.1", NULL, gsb1)
523 _REGISTER_CLOCK("tcc-gsb.2", NULL, gsb2)
524 _REGISTER_CLOCK("tcc-gsb.3", NULL, gsb3)
525 _REGISTER_CLOCK(NULL, "gdma2", gdma2)
526 _REGISTER_CLOCK(NULL, "gdma3", gdma3)
527 _REGISTER_CLOCK(NULL, "ddrc", ddrc)
528 _REGISTER_CLOCK("tcc-usbh.1", "usb", usbh1)
529};
530
531static struct clk *root_clk_by_index(enum root_clks src)
532{
533 switch (src) {
534 case CLK_SRC_PLL0: return &pll0;
535 case CLK_SRC_PLL1: return &pll1;
536 case CLK_SRC_PLL2: return &pll2;
537 case CLK_SRC_PLL0DIV: return &pll0div;
538 case CLK_SRC_PLL1DIV: return &pll1div;
539 case CLK_SRC_PLL2DIV: return &pll2div;
540 case CLK_SRC_XI: return &xi;
541 case CLK_SRC_XTI: return &xti;
542 case CLK_SRC_XIDIV: return &xidiv;
543 case CLK_SRC_XTIDIV: return &xtidiv;
544 default: return NULL;
545 }
546}
547
548static void find_aclk_parent(struct clk *clk)
549{
550 unsigned int src;
551 struct clk *clock;
552
553 if (!clk->aclkreg)
554 return;
555
556 src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT;
557 src &= CLK_SRC_MASK;
558
559 clock = root_clk_by_index(src);
560 if (!clock)
561 return;
562
563 clk->parent = clock;
564 clk->set_parent = aclk_set_parent;
565}
566
567void __init tcc_clocks_init(unsigned long xi_freq, unsigned long xti_freq)
568{
569 int i;
570
571 xi_rate = xi_freq;
572 xti_rate = xti_freq;
573
574 /* fixup parents and add the clock */
575 for (i = 0; i < ARRAY_SIZE(lookups); i++) {
576 find_aclk_parent(lookups[i].clk);
577 clkdev_add(&lookups[i]);
578 }
579 tcc8k_timer_init(&tcz, (void __iomem *)TIMER_BASE, INT_TC32);
580}
diff --git a/arch/arm/mach-tcc8k/common.h b/arch/arm/mach-tcc8k/common.h
deleted file mode 100644
index 705690add39..00000000000
--- a/arch/arm/mach-tcc8k/common.h
+++ /dev/null
@@ -1,15 +0,0 @@
1#ifndef MACH_TCC8K_COMMON_H
2#define MACH_TCC8K_COMMON_H
3
4#include <linux/platform_device.h>
5
6extern struct platform_device tcc_nand_device;
7
8struct clk;
9
10extern void tcc_clocks_init(unsigned long xi_freq, unsigned long xti_freq);
11extern void tcc8k_timer_init(struct clk *clock, void __iomem *base, int irq);
12extern void tcc8k_init_irq(void);
13extern void tcc8k_map_common_io(void);
14
15#endif
diff --git a/arch/arm/mach-tcc8k/devices.c b/arch/arm/mach-tcc8k/devices.c
deleted file mode 100644
index 6722ad7c283..00000000000
--- a/arch/arm/mach-tcc8k/devices.c
+++ /dev/null
@@ -1,239 +0,0 @@
1/*
2 * linux/arch/arm/mach-tcc8k/devices.c
3 *
4 * Copyright (C) Telechips, Inc.
5 * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
6 *
7 * Licensed under the terms of GPL v2.
8 *
9 */
10
11#include <linux/dma-mapping.h>
12#include <linux/init.h>
13#include <linux/io.h>
14#include <linux/kernel.h>
15#include <linux/module.h>
16
17#include <asm/mach/map.h>
18
19#include <mach/tcc8k-regs.h>
20#include <mach/irqs.h>
21
22#include "common.h"
23
24static u64 tcc8k_dmamask = DMA_BIT_MASK(32);
25
26#ifdef CONFIG_MTD_NAND_TCC
27/* NAND controller */
28static struct resource tcc_nand_resources[] = {
29 {
30 .start = (resource_size_t)NFC_BASE,
31 .end = (resource_size_t)NFC_BASE + 0x7f,
32 .flags = IORESOURCE_MEM,
33 }, {
34 .start = INT_NFC,
35 .end = INT_NFC,
36 .flags = IORESOURCE_IRQ,
37 },
38};
39
40struct platform_device tcc_nand_device = {
41 .name = "tcc_nand",
42 .id = 0,
43 .num_resources = ARRAY_SIZE(tcc_nand_resources),
44 .resource = tcc_nand_resources,
45};
46#endif
47
48#ifdef CONFIG_MMC_TCC8K
49/* MMC controller */
50static struct resource tcc8k_mmc0_resource[] = {
51 {
52 .start = INT_SD0,
53 .end = INT_SD0,
54 .flags = IORESOURCE_IRQ,
55 },
56};
57
58static struct resource tcc8k_mmc1_resource[] = {
59 {
60 .start = INT_SD1,
61 .end = INT_SD1,
62 .flags = IORESOURCE_IRQ,
63 },
64};
65
66struct platform_device tcc8k_mmc0_device = {
67 .name = "tcc-mmc",
68 .id = 0,
69 .num_resources = ARRAY_SIZE(tcc8k_mmc0_resource),
70 .resource = tcc8k_mmc0_resource,
71 .dev = {
72 .dma_mask = &tcc8k_dmamask,
73 .coherent_dma_mask = DMA_BIT_MASK(32),
74 }
75};
76
77struct platform_device tcc8k_mmc1_device = {
78 .name = "tcc-mmc",
79 .id = 1,
80 .num_resources = ARRAY_SIZE(tcc8k_mmc1_resource),
81 .resource = tcc8k_mmc1_resource,
82 .dev = {
83 .dma_mask = &tcc8k_dmamask,
84 .coherent_dma_mask = DMA_BIT_MASK(32),
85 }
86};
87
88static inline void tcc8k_init_mmc(void)
89{
90 u32 reg = __raw_readl(GPIOPS_BASE + GPIOPS_FS1_OFFS);
91
92 reg |= GPIOPS_FS1_SDH0_BITS | GPIOPS_FS1_SDH1_BITS;
93 __raw_writel(reg, GPIOPS_BASE + GPIOPS_FS1_OFFS);
94
95 platform_device_register(&tcc8k_mmc0_device);
96 platform_device_register(&tcc8k_mmc1_device);
97}
98#else
99static inline void tcc8k_init_mmc(void) { }
100#endif
101
102#ifdef CONFIG_USB_OHCI_HCD
103static int tcc8k_ohci_init(struct device *dev)
104{
105 u32 reg;
106
107 /* Use GPIO PK19 as VBUS control output */
108 reg = __raw_readl(GPIOPK_BASE + GPIOPK_FS0_OFFS);
109 reg &= ~(1 << 19);
110 __raw_writel(reg, GPIOPK_BASE + GPIOPK_FS0_OFFS);
111 reg = __raw_readl(GPIOPK_BASE + GPIOPK_FS1_OFFS);
112 reg &= ~(1 << 19);
113 __raw_writel(reg, GPIOPK_BASE + GPIOPK_FS1_OFFS);
114
115 reg = __raw_readl(GPIOPK_BASE + GPIOPK_DOE_OFFS);
116 reg |= (1 << 19);
117 __raw_writel(reg, GPIOPK_BASE + GPIOPK_DOE_OFFS);
118 /* Turn on VBUS */
119 reg = __raw_readl(GPIOPK_BASE + GPIOPK_DAT_OFFS);
120 reg |= (1 << 19);
121 __raw_writel(reg, GPIOPK_BASE + GPIOPK_DAT_OFFS);
122
123 return 0;
124}
125
126static struct resource tcc8k_ohci0_resources[] = {
127 [0] = {
128 .start = (resource_size_t)USBH0_BASE,
129 .end = (resource_size_t)USBH0_BASE + 0x5c,
130 .flags = IORESOURCE_MEM,
131 },
132 [1] = {
133 .start = INT_USBH0,
134 .end = INT_USBH0,
135 .flags = IORESOURCE_IRQ,
136 }
137};
138
139static struct resource tcc8k_ohci1_resources[] = {
140 [0] = {
141 .start = (resource_size_t)USBH1_BASE,
142 .end = (resource_size_t)USBH1_BASE + 0x5c,
143 .flags = IORESOURCE_MEM,
144 },
145 [1] = {
146 .start = INT_USBH1,
147 .end = INT_USBH1,
148 .flags = IORESOURCE_IRQ,
149 }
150};
151
152static struct tccohci_platform_data tcc8k_ohci0_platform_data = {
153 .controller = 0,
154 .port_mode = PMM_PERPORT_MODE,
155 .init = tcc8k_ohci_init,
156};
157
158static struct tccohci_platform_data tcc8k_ohci1_platform_data = {
159 .controller = 1,
160 .port_mode = PMM_PERPORT_MODE,
161 .init = tcc8k_ohci_init,
162};
163
164static struct platform_device ohci0_device = {
165 .name = "tcc-ohci",
166 .id = 0,
167 .dev = {
168 .dma_mask = &tcc8k_dmamask,
169 .coherent_dma_mask = DMA_BIT_MASK(32),
170 .platform_data = &tcc8k_ohci0_platform_data,
171 },
172 .num_resources = ARRAY_SIZE(tcc8k_ohci0_resources),
173 .resource = tcc8k_ohci0_resources,
174};
175
176static struct platform_device ohci1_device = {
177 .name = "tcc-ohci",
178 .id = 1,
179 .dev = {
180 .dma_mask = &tcc8k_dmamask,
181 .coherent_dma_mask = DMA_BIT_MASK(32),
182 .platform_data = &tcc8k_ohci1_platform_data,
183 },
184 .num_resources = ARRAY_SIZE(tcc8k_ohci1_resources),
185 .resource = tcc8k_ohci1_resources,
186};
187
188static void __init tcc8k_init_usbhost(void)
189{
190 platform_device_register(&ohci0_device);
191 platform_device_register(&ohci1_device);
192}
193#else
194static void __init tcc8k_init_usbhost(void) { }
195#endif
196
197/* USB device controller*/
198#ifdef CONFIG_USB_GADGET_TCC8K
199static struct resource udc_resources[] = {
200 [0] = {
201 .start = INT_USBD,
202 .end = INT_USBD,
203 .flags = IORESOURCE_IRQ,
204 },
205 [1] = {
206 .start = INT_UDMA,
207 .end = INT_UDMA,
208 .flags = IORESOURCE_IRQ,
209 },
210};
211
212static struct platform_device tcc8k_udc_device = {
213 .name = "tcc-udc",
214 .id = 0,
215 .resource = udc_resources,
216 .num_resources = ARRAY_SIZE(udc_resources),
217 .dev = {
218 .dma_mask = &tcc8k_dmamask,
219 .coherent_dma_mask = DMA_BIT_MASK(32),
220 },
221};
222
223static void __init tcc8k_init_usb_gadget(void)
224{
225 platform_device_register(&tcc8k_udc_device);
226}
227#else
228static void __init tcc8k_init_usb_gadget(void) { }
229#endif /* CONFIG_USB_GADGET_TCC83X */
230
231static int __init tcc8k_init_devices(void)
232{
233 tcc8k_init_mmc();
234 tcc8k_init_usbhost();
235 tcc8k_init_usb_gadget();
236 return 0;
237}
238
239arch_initcall(tcc8k_init_devices);
diff --git a/arch/arm/mach-tcc8k/io.c b/arch/arm/mach-tcc8k/io.c
deleted file mode 100644
index 9b39d7fa658..00000000000
--- a/arch/arm/mach-tcc8k/io.c
+++ /dev/null
@@ -1,62 +0,0 @@
1/*
2 * linux/arch/arm/mach-tcc8k/io.c
3 *
4 * (C) 2009 Hans J. Koch <hjk@linutronix.de>
5 *
6 * derived from TCC83xx io.c
7 * Copyright (C) Telechips, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/init.h>
15#include <linux/io.h>
16#include <linux/kernel.h>
17
18#include <asm/mach/map.h>
19
20#include <mach/tcc8k-regs.h>
21
22/*
23 * The machine specific code may provide the extra mapping besides the
24 * default mapping provided here.
25 */
26static struct map_desc tcc8k_io_desc[] __initdata = {
27 {
28 .virtual = (unsigned long)CS1_BASE_VIRT,
29 .pfn = __phys_to_pfn(CS1_BASE),
30 .length = CS1_SIZE,
31 .type = MT_DEVICE,
32 }, {
33 .virtual = (unsigned long)AHB_PERI_BASE_VIRT,
34 .pfn = __phys_to_pfn(AHB_PERI_BASE),
35 .length = AHB_PERI_SIZE,
36 .type = MT_DEVICE,
37 }, {
38 .virtual = (unsigned long)APB0_PERI_BASE_VIRT,
39 .pfn = __phys_to_pfn(APB0_PERI_BASE),
40 .length = APB0_PERI_SIZE,
41 .type = MT_DEVICE,
42 }, {
43 .virtual = (unsigned long)APB1_PERI_BASE_VIRT,
44 .pfn = __phys_to_pfn(APB1_PERI_BASE),
45 .length = APB1_PERI_SIZE,
46 .type = MT_DEVICE,
47 }, {
48 .virtual = (unsigned long)EXT_MEM_CTRL_BASE_VIRT,
49 .pfn = __phys_to_pfn(EXT_MEM_CTRL_BASE),
50 .length = EXT_MEM_CTRL_SIZE,
51 .type = MT_DEVICE,
52 },
53};
54
55/*
56 * Maps common IO regions for tcc8k.
57 *
58 */
59void __init tcc8k_map_common_io(void)
60{
61 iotable_init(tcc8k_io_desc, ARRAY_SIZE(tcc8k_io_desc));
62}
diff --git a/arch/arm/mach-tcc8k/irq.c b/arch/arm/mach-tcc8k/irq.c
deleted file mode 100644
index 209fa5c65d4..00000000000
--- a/arch/arm/mach-tcc8k/irq.c
+++ /dev/null
@@ -1,111 +0,0 @@
1/*
2 * Copyright (C) Telechips, Inc.
3 * Copyright (C) 2009-2010 Hans J. Koch <hjk@linutronix.de>
4 *
5 * Licensed under the terms of the GNU GPL version 2.
6 */
7
8#include <linux/init.h>
9#include <linux/interrupt.h>
10#include <linux/io.h>
11
12#include <asm/irq.h>
13#include <asm/mach/irq.h>
14
15#include <mach/tcc8k-regs.h>
16#include <mach/irqs.h>
17
18#include "common.h"
19
20/* Disable IRQ */
21static void tcc8000_mask_ack_irq0(struct irq_data *d)
22{
23 PIC0_IEN &= ~(1 << d->irq);
24 PIC0_CREQ |= (1 << d->irq);
25}
26
27static void tcc8000_mask_ack_irq1(struct irq_data *d)
28{
29 PIC1_IEN &= ~(1 << (d->irq - 32));
30 PIC1_CREQ |= (1 << (d->irq - 32));
31}
32
33static void tcc8000_mask_irq0(struct irq_data *d)
34{
35 PIC0_IEN &= ~(1 << d->irq);
36}
37
38static void tcc8000_mask_irq1(struct irq_data *d)
39{
40 PIC1_IEN &= ~(1 << (d->irq - 32));
41}
42
43static void tcc8000_ack_irq0(struct irq_data *d)
44{
45 PIC0_CREQ |= (1 << d->irq);
46}
47
48static void tcc8000_ack_irq1(struct irq_data *d)
49{
50 PIC1_CREQ |= (1 << (d->irq - 32));
51}
52
53/* Enable IRQ */
54static void tcc8000_unmask_irq0(struct irq_data *d)
55{
56 PIC0_IEN |= (1 << d->irq);
57 PIC0_INTOEN |= (1 << d->irq);
58}
59
60static void tcc8000_unmask_irq1(struct irq_data *d)
61{
62 PIC1_IEN |= (1 << (d->irq - 32));
63 PIC1_INTOEN |= (1 << (d->irq - 32));
64}
65
66static struct irq_chip tcc8000_irq_chip0 = {
67 .name = "tcc_irq0",
68 .irq_mask = tcc8000_mask_irq0,
69 .irq_ack = tcc8000_ack_irq0,
70 .irq_mask_ack = tcc8000_mask_ack_irq0,
71 .irq_unmask = tcc8000_unmask_irq0,
72};
73
74static struct irq_chip tcc8000_irq_chip1 = {
75 .name = "tcc_irq1",
76 .irq_mask = tcc8000_mask_irq1,
77 .irq_ack = tcc8000_ack_irq1,
78 .irq_mask_ack = tcc8000_mask_ack_irq1,
79 .irq_unmask = tcc8000_unmask_irq1,
80};
81
82void __init tcc8k_init_irq(void)
83{
84 int irqno;
85
86 /* Mask and clear all interrupts */
87 PIC0_IEN = 0x00000000;
88 PIC0_CREQ = 0xffffffff;
89 PIC1_IEN = 0x00000000;
90 PIC1_CREQ = 0xffffffff;
91
92 PIC0_MEN0 = 0x00000003;
93 PIC1_MEN1 = 0x00000003;
94 PIC1_MEN = 0x00000003;
95
96 /* let all IRQs be level triggered */
97 PIC0_TMODE = 0xffffffff;
98 PIC1_TMODE = 0xffffffff;
99 /* all IRQs are IRQs (not FIQs) */
100 PIC0_IRQSEL = 0xffffffff;
101 PIC1_IRQSEL = 0xffffffff;
102
103 for (irqno = 0; irqno < NR_IRQS; irqno++) {
104 if (irqno < 32)
105 irq_set_chip(irqno, &tcc8000_irq_chip0);
106 else
107 irq_set_chip(irqno, &tcc8000_irq_chip1);
108 irq_set_handler(irqno, handle_level_irq);
109 set_irq_flags(irqno, IRQF_VALID);
110 }
111}
diff --git a/arch/arm/mach-tcc8k/time.c b/arch/arm/mach-tcc8k/time.c
deleted file mode 100644
index a96babe8377..00000000000
--- a/arch/arm/mach-tcc8k/time.c
+++ /dev/null
@@ -1,134 +0,0 @@
1/*
2 * TCC8000 system timer setup
3 *
4 * (C) 2009 Hans J. Koch <hjk@linutronix.de>
5 *
6 * Licensed under the terms of the GPL version 2.
7 *
8 */
9
10#include <linux/clk.h>
11#include <linux/clockchips.h>
12#include <linux/init.h>
13#include <linux/interrupt.h>
14#include <linux/io.h>
15#include <linux/irq.h>
16#include <linux/kernel.h>
17#include <linux/spinlock.h>
18
19#include <asm/mach/time.h>
20
21#include <mach/tcc8k-regs.h>
22#include <mach/irqs.h>
23
24#include "common.h"
25
26static void __iomem *timer_base;
27
28static int tcc_set_next_event(unsigned long evt,
29 struct clock_event_device *unused)
30{
31 unsigned long reg = __raw_readl(timer_base + TC32MCNT_OFFS);
32
33 __raw_writel(reg + evt, timer_base + TC32CMP0_OFFS);
34 return 0;
35}
36
37static void tcc_set_mode(enum clock_event_mode mode,
38 struct clock_event_device *evt)
39{
40 unsigned long tc32irq;
41
42 switch (mode) {
43 case CLOCK_EVT_MODE_ONESHOT:
44 tc32irq = __raw_readl(timer_base + TC32IRQ_OFFS);
45 tc32irq |= TC32IRQ_IRQEN0;
46 __raw_writel(tc32irq, timer_base + TC32IRQ_OFFS);
47 break;
48 case CLOCK_EVT_MODE_SHUTDOWN:
49 case CLOCK_EVT_MODE_UNUSED:
50 tc32irq = __raw_readl(timer_base + TC32IRQ_OFFS);
51 tc32irq &= ~TC32IRQ_IRQEN0;
52 __raw_writel(tc32irq, timer_base + TC32IRQ_OFFS);
53 break;
54 case CLOCK_EVT_MODE_PERIODIC:
55 case CLOCK_EVT_MODE_RESUME:
56 break;
57 }
58}
59
60static irqreturn_t tcc8k_timer_interrupt(int irq, void *dev_id)
61{
62 struct clock_event_device *evt = dev_id;
63
64 /* Acknowledge TC32 interrupt by reading TC32IRQ */
65 __raw_readl(timer_base + TC32IRQ_OFFS);
66
67 evt->event_handler(evt);
68
69 return IRQ_HANDLED;
70}
71
72static struct clock_event_device clockevent_tcc = {
73 .name = "tcc_timer1",
74 .features = CLOCK_EVT_FEAT_ONESHOT,
75 .shift = 32,
76 .set_mode = tcc_set_mode,
77 .set_next_event = tcc_set_next_event,
78 .rating = 200,
79};
80
81static struct irqaction tcc8k_timer_irq = {
82 .name = "TC32_timer",
83 .flags = IRQF_DISABLED | IRQF_TIMER,
84 .handler = tcc8k_timer_interrupt,
85 .dev_id = &clockevent_tcc,
86};
87
88static int __init tcc_clockevent_init(struct clk *clock)
89{
90 unsigned int c = clk_get_rate(clock);
91
92 clocksource_mmio_init(timer_base + TC32MCNT_OFFS, "tcc_tc32", c,
93 200, 32, clocksource_mmio_readl_up);
94
95 clockevent_tcc.mult = div_sc(c, NSEC_PER_SEC,
96 clockevent_tcc.shift);
97 clockevent_tcc.max_delta_ns =
98 clockevent_delta2ns(0xfffffffe, &clockevent_tcc);
99 clockevent_tcc.min_delta_ns =
100 clockevent_delta2ns(0xff, &clockevent_tcc);
101
102 clockevent_tcc.cpumask = cpumask_of(0);
103
104 clockevents_register_device(&clockevent_tcc);
105
106 return 0;
107}
108
109void __init tcc8k_timer_init(struct clk *clock, void __iomem *base, int irq)
110{
111 u32 reg;
112
113 timer_base = base;
114 tcc8k_timer_irq.irq = irq;
115
116 /* Enable clocks */
117 clk_enable(clock);
118
119 /* Initialize 32-bit timer */
120 reg = __raw_readl(timer_base + TC32EN_OFFS);
121 reg &= ~TC32EN_ENABLE; /* Disable timer */
122 __raw_writel(reg, timer_base + TC32EN_OFFS);
123 /* Free running timer, counting from 0 to 0xffffffff */
124 __raw_writel(0, timer_base + TC32EN_OFFS);
125 __raw_writel(0, timer_base + TC32LDV_OFFS);
126 reg = __raw_readl(timer_base + TC32IRQ_OFFS);
127 reg |= TC32IRQ_IRQEN0; /* irq at match with CMP0 */
128 __raw_writel(reg, timer_base + TC32IRQ_OFFS);
129
130 __raw_writel(TC32EN_ENABLE, timer_base + TC32EN_OFFS);
131
132 tcc_clockevent_init(clock);
133 setup_irq(irq, &tcc8k_timer_irq);
134}
diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c
index d368f8dafcf..74743ad3d2d 100644
--- a/arch/arm/mach-tegra/board-dt.c
+++ b/arch/arm/mach-tegra/board-dt.c
@@ -101,6 +101,13 @@ static void __init tegra_dt_init(void)
101 101
102 tegra_clk_init_from_table(tegra_dt_clk_init_table); 102 tegra_clk_init_from_table(tegra_dt_clk_init_table);
103 103
104 /*
105 * Finished with the static registrations now; fill in the missing
106 * devices
107 */
108 of_platform_populate(NULL, tegra_dt_match_table,
109 tegra20_auxdata_lookup, NULL);
110
104 for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) { 111 for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) {
105 if (of_machine_is_compatible(pinmux_configs[i].machine)) { 112 if (of_machine_is_compatible(pinmux_configs[i].machine)) {
106 pinmux_configs[i].init(); 113 pinmux_configs[i].init();
@@ -110,12 +117,6 @@ static void __init tegra_dt_init(void)
110 117
111 WARN(i == ARRAY_SIZE(pinmux_configs), 118 WARN(i == ARRAY_SIZE(pinmux_configs),
112 "Unknown platform! Pinmuxing not initialized\n"); 119 "Unknown platform! Pinmuxing not initialized\n");
113
114 /*
115 * Finished with the static registrations now; fill in the missing
116 * devices
117 */
118 of_platform_populate(NULL, tegra_dt_match_table, tegra20_auxdata_lookup, NULL);
119} 120}
120 121
121static const char * tegra_dt_board_compat[] = { 122static const char * tegra_dt_board_compat[] = {
diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c
index e99b45618cd..7a4a26d5174 100644
--- a/arch/arm/mach-tegra/board-harmony-pinmux.c
+++ b/arch/arm/mach-tegra/board-harmony-pinmux.c
@@ -16,6 +16,8 @@
16 16
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/gpio.h> 18#include <linux/gpio.h>
19#include <linux/of.h>
20
19#include <mach/pinmux.h> 21#include <mach/pinmux.h>
20 22
21#include "gpio-names.h" 23#include "gpio-names.h"
@@ -161,7 +163,9 @@ static struct tegra_gpio_table gpio_table[] = {
161 163
162void harmony_pinmux_init(void) 164void harmony_pinmux_init(void)
163{ 165{
164 platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); 166 if (!of_machine_is_compatible("nvidia,tegra20"))
167 platform_add_devices(pinmux_devices,
168 ARRAY_SIZE(pinmux_devices));
165 169
166 tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux)); 170 tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux));
167 171
diff --git a/arch/arm/mach-tegra/board-paz00-pinmux.c b/arch/arm/mach-tegra/board-paz00-pinmux.c
index fb20894862b..be30e215f4b 100644
--- a/arch/arm/mach-tegra/board-paz00-pinmux.c
+++ b/arch/arm/mach-tegra/board-paz00-pinmux.c
@@ -16,6 +16,8 @@
16 16
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/gpio.h> 18#include <linux/gpio.h>
19#include <linux/of.h>
20
19#include <mach/pinmux.h> 21#include <mach/pinmux.h>
20 22
21#include "gpio-names.h" 23#include "gpio-names.h"
@@ -158,7 +160,9 @@ static struct tegra_gpio_table gpio_table[] = {
158 160
159void paz00_pinmux_init(void) 161void paz00_pinmux_init(void)
160{ 162{
161 platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); 163 if (!of_machine_is_compatible("nvidia,tegra20"))
164 platform_add_devices(pinmux_devices,
165 ARRAY_SIZE(pinmux_devices));
162 166
163 tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux)); 167 tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux));
164 168
diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c
index fbce31daa3c..b1c2972f62f 100644
--- a/arch/arm/mach-tegra/board-seaboard-pinmux.c
+++ b/arch/arm/mach-tegra/board-seaboard-pinmux.c
@@ -16,6 +16,7 @@
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/gpio.h> 18#include <linux/gpio.h>
19#include <linux/of.h>
19 20
20#include <mach/pinmux.h> 21#include <mach/pinmux.h>
21#include <mach/pinmux-t2.h> 22#include <mach/pinmux-t2.h>
@@ -191,6 +192,7 @@ static struct tegra_gpio_table common_gpio_table[] = {
191 { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true }, 192 { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true },
192 { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true }, 193 { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true },
193 { .gpio = TEGRA_GPIO_POWERKEY, .enable = true }, 194 { .gpio = TEGRA_GPIO_POWERKEY, .enable = true },
195 { .gpio = TEGRA_GPIO_HP_DET, .enable = true },
194 { .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true }, 196 { .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true },
195 { .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true }, 197 { .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true },
196 { .gpio = TEGRA_GPIO_USB1, .enable = true }, 198 { .gpio = TEGRA_GPIO_USB1, .enable = true },
@@ -218,7 +220,9 @@ static void __init update_pinmux(struct tegra_pingroup_config *newtbl, int size)
218 220
219void __init seaboard_common_pinmux_init(void) 221void __init seaboard_common_pinmux_init(void)
220{ 222{
221 platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); 223 if (!of_machine_is_compatible("nvidia,tegra20"))
224 platform_add_devices(pinmux_devices,
225 ARRAY_SIZE(pinmux_devices));
222 226
223 tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux)); 227 tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux));
224 228
diff --git a/arch/arm/mach-tegra/board-trimslice-pinmux.c b/arch/arm/mach-tegra/board-trimslice-pinmux.c
index 4969dd28a04..7ab719d46da 100644
--- a/arch/arm/mach-tegra/board-trimslice-pinmux.c
+++ b/arch/arm/mach-tegra/board-trimslice-pinmux.c
@@ -16,6 +16,7 @@
16#include <linux/gpio.h> 16#include <linux/gpio.h>
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/of.h>
19 20
20#include <mach/pinmux.h> 21#include <mach/pinmux.h>
21 22
@@ -157,7 +158,9 @@ static struct tegra_gpio_table gpio_table[] = {
157 158
158void __init trimslice_pinmux_init(void) 159void __init trimslice_pinmux_init(void)
159{ 160{
160 platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); 161 if (!of_machine_is_compatible("nvidia,tegra20"))
162 platform_add_devices(pinmux_devices,
163 ARRAY_SIZE(pinmux_devices));
161 tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux)); 164 tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux));
162 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table)); 165 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
163} 166}
diff --git a/arch/arm/mach-w90x900/dev.c b/arch/arm/mach-w90x900/dev.c
index 7a1fa6adb7c..5b0c38abacc 100644
--- a/arch/arm/mach-w90x900/dev.c
+++ b/arch/arm/mach-w90x900/dev.c
@@ -422,7 +422,7 @@ struct platform_device nuc900_device_kpi = {
422 422
423/* LCD controller*/ 423/* LCD controller*/
424 424
425static struct nuc900fb_display __initdata nuc900_lcd_info[] = { 425static struct nuc900fb_display nuc900_lcd_info[] = {
426 /* Giantplus Technology GPM1040A0 320x240 Color TFT LCD */ 426 /* Giantplus Technology GPM1040A0 320x240 Color TFT LCD */
427 [0] = { 427 [0] = {
428 .type = LCM_DCCS_VA_SRC_RGB565, 428 .type = LCM_DCCS_VA_SRC_RGB565,
@@ -445,7 +445,7 @@ static struct nuc900fb_display __initdata nuc900_lcd_info[] = {
445 }, 445 },
446}; 446};
447 447
448static struct nuc900fb_mach_info nuc900_fb_info __initdata = { 448static struct nuc900fb_mach_info nuc900_fb_info = {
449#if defined(CONFIG_GPM1040A0_320X240) 449#if defined(CONFIG_GPM1040A0_320X240)
450 .displays = &nuc900_lcd_info[0], 450 .displays = &nuc900_lcd_info[0],
451#else 451#else
diff --git a/arch/arm/mach-w90x900/include/mach/mfp.h b/arch/arm/mach-w90x900/include/mach/mfp.h
index 94c0e71617c..23ef1f573ab 100644
--- a/arch/arm/mach-w90x900/include/mach/mfp.h
+++ b/arch/arm/mach-w90x900/include/mach/mfp.h
@@ -19,6 +19,7 @@
19extern void mfp_set_groupf(struct device *dev); 19extern void mfp_set_groupf(struct device *dev);
20extern void mfp_set_groupc(struct device *dev); 20extern void mfp_set_groupc(struct device *dev);
21extern void mfp_set_groupi(struct device *dev); 21extern void mfp_set_groupi(struct device *dev);
22extern void mfp_set_groupg(struct device *dev); 22extern void mfp_set_groupg(struct device *dev, const char *subname);
23extern void mfp_set_groupd(struct device *dev, const char *subname);
23 24
24#endif /* __ASM_ARCH_MFP_H */ 25#endif /* __ASM_ARCH_MFP_H */
diff --git a/arch/arm/mach-w90x900/include/mach/nuc900_spi.h b/arch/arm/mach-w90x900/include/mach/nuc900_spi.h
index bd94819e314..2c4e0c12850 100644
--- a/arch/arm/mach-w90x900/include/mach/nuc900_spi.h
+++ b/arch/arm/mach-w90x900/include/mach/nuc900_spi.h
@@ -14,7 +14,7 @@
14#ifndef __ASM_ARCH_SPI_H 14#ifndef __ASM_ARCH_SPI_H
15#define __ASM_ARCH_SPI_H 15#define __ASM_ARCH_SPI_H
16 16
17extern void mfp_set_groupg(struct device *dev); 17extern void mfp_set_groupg(struct device *dev, const char *subname);
18 18
19struct nuc900_spi_info { 19struct nuc900_spi_info {
20 unsigned int num_cs; 20 unsigned int num_cs;
diff --git a/arch/arm/mach-w90x900/mfp.c b/arch/arm/mach-w90x900/mfp.c
index fb7fb627b1a..9dd74612bb8 100644
--- a/arch/arm/mach-w90x900/mfp.c
+++ b/arch/arm/mach-w90x900/mfp.c
@@ -26,10 +26,8 @@
26#define REG_MFSEL (W90X900_VA_GCR + 0xC) 26#define REG_MFSEL (W90X900_VA_GCR + 0xC)
27 27
28#define GPSELF (0x01 << 1) 28#define GPSELF (0x01 << 1)
29
30#define GPSELC (0x03 << 2) 29#define GPSELC (0x03 << 2)
31#define ENKPI (0x02 << 2) 30#define GPSELD (0x0f << 4)
32#define ENNAND (0x01 << 2)
33 31
34#define GPSELEI0 (0x01 << 26) 32#define GPSELEI0 (0x01 << 26)
35#define GPSELEI1 (0x01 << 27) 33#define GPSELEI1 (0x01 << 27)
@@ -37,11 +35,16 @@
37#define GPIOG0TO1 (0x03 << 14) 35#define GPIOG0TO1 (0x03 << 14)
38#define GPIOG2TO3 (0x03 << 16) 36#define GPIOG2TO3 (0x03 << 16)
39#define GPIOG22TO23 (0x03 << 22) 37#define GPIOG22TO23 (0x03 << 22)
38#define GPIOG18TO20 (0x07 << 18)
40 39
41#define ENSPI (0x0a << 14) 40#define ENSPI (0x0a << 14)
42#define ENI2C0 (0x01 << 14) 41#define ENI2C0 (0x01 << 14)
43#define ENI2C1 (0x01 << 16) 42#define ENI2C1 (0x01 << 16)
44#define ENAC97 (0x02 << 22) 43#define ENAC97 (0x02 << 22)
44#define ENSD1 (0x02 << 18)
45#define ENSD0 (0x0a << 4)
46#define ENKPI (0x02 << 2)
47#define ENNAND (0x01 << 2)
45 48
46static DEFINE_MUTEX(mfp_mutex); 49static DEFINE_MUTEX(mfp_mutex);
47 50
@@ -127,16 +130,19 @@ void mfp_set_groupi(struct device *dev)
127} 130}
128EXPORT_SYMBOL(mfp_set_groupi); 131EXPORT_SYMBOL(mfp_set_groupi);
129 132
130void mfp_set_groupg(struct device *dev) 133void mfp_set_groupg(struct device *dev, const char *subname)
131{ 134{
132 unsigned long mfpen; 135 unsigned long mfpen;
133 const char *dev_id; 136 const char *dev_id;
134 137
135 BUG_ON(!dev); 138 BUG_ON((!dev) && (!subname));
136 139
137 mutex_lock(&mfp_mutex); 140 mutex_lock(&mfp_mutex);
138 141
139 dev_id = dev_name(dev); 142 if (subname != NULL)
143 dev_id = subname;
144 else
145 dev_id = dev_name(dev);
140 146
141 mfpen = __raw_readl(REG_MFSEL); 147 mfpen = __raw_readl(REG_MFSEL);
142 148
@@ -152,6 +158,9 @@ void mfp_set_groupg(struct device *dev)
152 } else if (strcmp(dev_id, "nuc900-audio") == 0) { 158 } else if (strcmp(dev_id, "nuc900-audio") == 0) {
153 mfpen &= ~(GPIOG22TO23); 159 mfpen &= ~(GPIOG22TO23);
154 mfpen |= ENAC97;/*enable AC97*/ 160 mfpen |= ENAC97;/*enable AC97*/
161 } else if (strcmp(dev_id, "nuc900-mmc-port1") == 0) {
162 mfpen &= ~(GPIOG18TO20);
163 mfpen |= (ENSD1 | 0x01);/*enable sd1*/
155 } else { 164 } else {
156 mfpen &= ~(GPIOG0TO1 | GPIOG2TO3);/*GPIOG[3:0]*/ 165 mfpen &= ~(GPIOG0TO1 | GPIOG2TO3);/*GPIOG[3:0]*/
157 } 166 }
@@ -162,3 +171,30 @@ void mfp_set_groupg(struct device *dev)
162} 171}
163EXPORT_SYMBOL(mfp_set_groupg); 172EXPORT_SYMBOL(mfp_set_groupg);
164 173
174void mfp_set_groupd(struct device *dev, const char *subname)
175{
176 unsigned long mfpen;
177 const char *dev_id;
178
179 BUG_ON((!dev) && (!subname));
180
181 mutex_lock(&mfp_mutex);
182
183 if (subname != NULL)
184 dev_id = subname;
185 else
186 dev_id = dev_name(dev);
187
188 mfpen = __raw_readl(REG_MFSEL);
189
190 if (strcmp(dev_id, "nuc900-mmc-port0") == 0) {
191 mfpen &= ~GPSELD;/*enable sd0*/
192 mfpen |= ENSD0;
193 } else
194 mfpen &= (~GPSELD);
195
196 __raw_writel(mfpen, REG_MFSEL);
197
198 mutex_unlock(&mfp_mutex);
199}
200EXPORT_SYMBOL(mfp_set_groupd);
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 8ac9e9f8479..b1e192ba8c2 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -61,7 +61,7 @@ static inline void cache_sync(void)
61{ 61{
62 void __iomem *base = l2x0_base; 62 void __iomem *base = l2x0_base;
63 63
64#ifdef CONFIG_ARM_ERRATA_753970 64#ifdef CONFIG_PL310_ERRATA_753970
65 /* write to an unmmapped register */ 65 /* write to an unmmapped register */
66 writel_relaxed(0, base + L2X0_DUMMY_REG); 66 writel_relaxed(0, base + L2X0_DUMMY_REG);
67#else 67#else
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index e4e7f6cba1a..1aa664a1999 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -168,7 +168,7 @@ static int __init consistent_init(void)
168 pte_t *pte; 168 pte_t *pte;
169 int i = 0; 169 int i = 0;
170 unsigned long base = consistent_base; 170 unsigned long base = consistent_base;
171 unsigned long num_ptes = (CONSISTENT_END - base) >> PGDIR_SHIFT; 171 unsigned long num_ptes = (CONSISTENT_END - base) >> PMD_SHIFT;
172 172
173 consistent_pte = kmalloc(num_ptes * sizeof(pte_t), GFP_KERNEL); 173 consistent_pte = kmalloc(num_ptes * sizeof(pte_t), GFP_KERNEL);
174 if (!consistent_pte) { 174 if (!consistent_pte) {
@@ -332,6 +332,15 @@ __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
332 struct page *page; 332 struct page *page;
333 void *addr; 333 void *addr;
334 334
335 /*
336 * Following is a work-around (a.k.a. hack) to prevent pages
337 * with __GFP_COMP being passed to split_page() which cannot
338 * handle them. The real problem is that this flag probably
339 * should be 0 on ARM as it is not supported on this
340 * platform; see CONFIG_HUGETLBFS.
341 */
342 gfp &= ~(__GFP_COMP);
343
335 *handle = ~0; 344 *handle = ~0;
336 size = PAGE_ALIGN(size); 345 size = PAGE_ALIGN(size);
337 346
diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c
index 74be05f3e03..44b628e4d6e 100644
--- a/arch/arm/mm/mmap.c
+++ b/arch/arm/mm/mmap.c
@@ -9,8 +9,7 @@
9#include <linux/io.h> 9#include <linux/io.h>
10#include <linux/personality.h> 10#include <linux/personality.h>
11#include <linux/random.h> 11#include <linux/random.h>
12#include <asm/cputype.h> 12#include <asm/cachetype.h>
13#include <asm/system.h>
14 13
15#define COLOUR_ALIGN(addr,pgoff) \ 14#define COLOUR_ALIGN(addr,pgoff) \
16 ((((addr)+SHMLBA-1)&~(SHMLBA-1)) + \ 15 ((((addr)+SHMLBA-1)&~(SHMLBA-1)) + \
@@ -32,25 +31,15 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,
32 struct mm_struct *mm = current->mm; 31 struct mm_struct *mm = current->mm;
33 struct vm_area_struct *vma; 32 struct vm_area_struct *vma;
34 unsigned long start_addr; 33 unsigned long start_addr;
35#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) 34 int do_align = 0;
36 unsigned int cache_type; 35 int aliasing = cache_is_vipt_aliasing();
37 int do_align = 0, aliasing = 0;
38 36
39 /* 37 /*
40 * We only need to do colour alignment if either the I or D 38 * We only need to do colour alignment if either the I or D
41 * caches alias. This is indicated by bits 9 and 21 of the 39 * caches alias.
42 * cache type register.
43 */ 40 */
44 cache_type = read_cpuid_cachetype(); 41 if (aliasing)
45 if (cache_type != read_cpuid_id()) { 42 do_align = filp || (flags & MAP_SHARED);
46 aliasing = (cache_type | cache_type >> 12) & (1 << 11);
47 if (aliasing)
48 do_align = filp || flags & MAP_SHARED;
49 }
50#else
51#define do_align 0
52#define aliasing 0
53#endif
54 43
55 /* 44 /*
56 * We enforce the MAP_FIXED case. 45 * We enforce the MAP_FIXED case.
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index a08a95107a6..b3a1f2b3ada 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -10,7 +10,7 @@ choice
10 10
11config ARCH_IMX_V4_V5 11config ARCH_IMX_V4_V5
12 bool "i.MX1, i.MX21, i.MX25, i.MX27" 12 bool "i.MX1, i.MX21, i.MX25, i.MX27"
13 select AUTO_ZRELADDR 13 select AUTO_ZRELADDR if !ZBOOT_ROM
14 select ARM_PATCH_PHYS_VIRT 14 select ARM_PATCH_PHYS_VIRT
15 help 15 help
16 This enables support for systems based on the Freescale i.MX ARMv4 16 This enables support for systems based on the Freescale i.MX ARMv4
@@ -26,7 +26,7 @@ config ARCH_IMX_V6_V7
26 26
27config ARCH_MX5 27config ARCH_MX5
28 bool "i.MX50, i.MX51, i.MX53" 28 bool "i.MX50, i.MX51, i.MX53"
29 select AUTO_ZRELADDR 29 select AUTO_ZRELADDR if !ZBOOT_ROM
30 select ARM_PATCH_PHYS_VIRT 30 select ARM_PATCH_PHYS_VIRT
31 help 31 help
32 This enables support for machines using Freescale's i.MX50 and i.MX53 32 This enables support for machines using Freescale's i.MX50 and i.MX53
diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c
index 8875fb415f6..55f15699a38 100644
--- a/arch/arm/plat-mxc/avic.c
+++ b/arch/arm/plat-mxc/avic.c
@@ -22,6 +22,7 @@
22#include <linux/io.h> 22#include <linux/io.h>
23#include <mach/common.h> 23#include <mach/common.h>
24#include <asm/mach/irq.h> 24#include <asm/mach/irq.h>
25#include <asm/exception.h>
25#include <mach/hardware.h> 26#include <mach/hardware.h>
26 27
27#include "irq-common.h" 28#include "irq-common.h"
diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c
index 74aac96cda2..adbff706ef6 100644
--- a/arch/arm/plat-mxc/cpufreq.c
+++ b/arch/arm/plat-mxc/cpufreq.c
@@ -17,6 +17,7 @@
17 * the CPU clock speed on the fly. 17 * the CPU clock speed on the fly.
18 */ 18 */
19 19
20#include <linux/module.h>
20#include <linux/cpufreq.h> 21#include <linux/cpufreq.h>
21#include <linux/clk.h> 22#include <linux/clk.h>
22#include <linux/err.h> 23#include <linux/err.h>
diff --git a/arch/arm/plat-mxc/gic.c b/arch/arm/plat-mxc/gic.c
index b3b8eed263b..12f8f810901 100644
--- a/arch/arm/plat-mxc/gic.c
+++ b/arch/arm/plat-mxc/gic.c
@@ -28,21 +28,14 @@ asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
28 if (irqnr == 1023) 28 if (irqnr == 1023)
29 break; 29 break;
30 30
31 if (irqnr > 29 && irqnr < 1021) 31 if (irqnr > 15 && irqnr < 1021)
32 handle_IRQ(irqnr, regs); 32 handle_IRQ(irqnr, regs);
33#ifdef CONFIG_SMP 33#ifdef CONFIG_SMP
34 else if (irqnr < 16) { 34 else {
35 writel_relaxed(irqstat, gic_cpu_base_addr + 35 writel_relaxed(irqstat, gic_cpu_base_addr +
36 GIC_CPU_EOI); 36 GIC_CPU_EOI);
37 handle_IPI(irqnr, regs); 37 handle_IPI(irqnr, regs);
38 } 38 }
39#endif 39#endif
40#ifdef CONFIG_LOCAL_TIMERS
41 else if (irqnr == 29) {
42 writel_relaxed(irqstat, gic_cpu_base_addr +
43 GIC_CPU_EOI);
44 handle_local_timer(regs);
45 }
46#endif
47 } while (1); 40 } while (1);
48} 41}
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 83b745a5e1b..c75f254abd8 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -85,7 +85,6 @@ enum mxc_cpu_pwr_mode {
85}; 85};
86 86
87extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode); 87extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode);
88extern void (*imx_idle)(void);
89extern void imx_print_silicon_rev(const char *cpu, int srev); 88extern void imx_print_silicon_rev(const char *cpu, int srev);
90 89
91void avic_handle_irq(struct pt_regs *); 90void avic_handle_irq(struct pt_regs *);
@@ -133,4 +132,5 @@ extern void imx53_qsb_common_init(void);
133extern void imx53_smd_common_init(void); 132extern void imx53_smd_common_init(void);
134extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode); 133extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
135extern void imx6q_pm_init(void); 134extern void imx6q_pm_init(void);
135extern void imx6q_clock_map_io(void);
136#endif 136#endif
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S
index 9fe0dfcf4e7..ca5cf26a04b 100644
--- a/arch/arm/plat-mxc/include/mach/entry-macro.S
+++ b/arch/arm/plat-mxc/include/mach/entry-macro.S
@@ -25,6 +25,3 @@
25 25
26 .macro test_for_ipi, irqnr, irqstat, base, tmp 26 .macro test_for_ipi, irqnr, irqstat, base, tmp
27 .endm 27 .endm
28
29 .macro test_for_ltirq, irqnr, irqstat, base, tmp
30 .endm
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index 00a78193c68..a4d36d601d5 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -50,20 +50,6 @@
50#define IMX_CHIP_REVISION_3_3 0x33 50#define IMX_CHIP_REVISION_3_3 0x33
51#define IMX_CHIP_REVISION_UNKNOWN 0xff 51#define IMX_CHIP_REVISION_UNKNOWN 0xff
52 52
53#define IMX_CHIP_REVISION_1_0_STRING "1.0"
54#define IMX_CHIP_REVISION_1_1_STRING "1.1"
55#define IMX_CHIP_REVISION_1_2_STRING "1.2"
56#define IMX_CHIP_REVISION_1_3_STRING "1.3"
57#define IMX_CHIP_REVISION_2_0_STRING "2.0"
58#define IMX_CHIP_REVISION_2_1_STRING "2.1"
59#define IMX_CHIP_REVISION_2_2_STRING "2.2"
60#define IMX_CHIP_REVISION_2_3_STRING "2.3"
61#define IMX_CHIP_REVISION_3_0_STRING "3.0"
62#define IMX_CHIP_REVISION_3_1_STRING "3.1"
63#define IMX_CHIP_REVISION_3_2_STRING "3.2"
64#define IMX_CHIP_REVISION_3_3_STRING "3.3"
65#define IMX_CHIP_REVISION_UNKNOWN_STRING "unknown"
66
67#ifndef __ASSEMBLY__ 53#ifndef __ASSEMBLY__
68extern unsigned int __mxc_cpu_type; 54extern unsigned int __mxc_cpu_type;
69#endif 55#endif
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h
index cf88b3593fb..b9895d25016 100644
--- a/arch/arm/plat-mxc/include/mach/system.h
+++ b/arch/arm/plat-mxc/include/mach/system.h
@@ -17,14 +17,9 @@
17#ifndef __ASM_ARCH_MXC_SYSTEM_H__ 17#ifndef __ASM_ARCH_MXC_SYSTEM_H__
18#define __ASM_ARCH_MXC_SYSTEM_H__ 18#define __ASM_ARCH_MXC_SYSTEM_H__
19 19
20extern void (*imx_idle)(void);
21
22static inline void arch_idle(void) 20static inline void arch_idle(void)
23{ 21{
24 if (imx_idle != NULL) 22 cpu_do_idle();
25 (imx_idle)();
26 else
27 cpu_do_idle();
28} 23}
29 24
30void arch_reset(char mode, const char *cmd); 25void arch_reset(char mode, const char *cmd);
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c
index 42d74ea5908..845de59f07e 100644
--- a/arch/arm/plat-mxc/pwm.c
+++ b/arch/arm/plat-mxc/pwm.c
@@ -32,6 +32,9 @@
32#define MX3_PWMSAR 0x0C /* PWM Sample Register */ 32#define MX3_PWMSAR 0x0C /* PWM Sample Register */
33#define MX3_PWMPR 0x10 /* PWM Period Register */ 33#define MX3_PWMPR 0x10 /* PWM Period Register */
34#define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4) 34#define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4)
35#define MX3_PWMCR_DOZEEN (1 << 24)
36#define MX3_PWMCR_WAITEN (1 << 23)
37#define MX3_PWMCR_DBGEN (1 << 22)
35#define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16) 38#define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16)
36#define MX3_PWMCR_CLKSRC_IPG (1 << 16) 39#define MX3_PWMCR_CLKSRC_IPG (1 << 16)
37#define MX3_PWMCR_EN (1 << 0) 40#define MX3_PWMCR_EN (1 << 0)
@@ -77,7 +80,9 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
77 writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR); 80 writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR);
78 writel(period_cycles, pwm->mmio_base + MX3_PWMPR); 81 writel(period_cycles, pwm->mmio_base + MX3_PWMPR);
79 82
80 cr = MX3_PWMCR_PRESCALER(prescale) | MX3_PWMCR_EN; 83 cr = MX3_PWMCR_PRESCALER(prescale) |
84 MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN |
85 MX3_PWMCR_DBGEN | MX3_PWMCR_EN;
81 86
82 if (cpu_is_mx25()) 87 if (cpu_is_mx25())
83 cr |= MX3_PWMCR_CLKSRC_IPG; 88 cr |= MX3_PWMCR_CLKSRC_IPG;
diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/plat-mxc/system.c
index 9dad8dcc2ea..d65fb31a55c 100644
--- a/arch/arm/plat-mxc/system.c
+++ b/arch/arm/plat-mxc/system.c
@@ -21,6 +21,7 @@
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/err.h> 22#include <linux/err.h>
23#include <linux/delay.h> 23#include <linux/delay.h>
24#include <linux/module.h>
24 25
25#include <mach/hardware.h> 26#include <mach/hardware.h>
26#include <mach/common.h> 27#include <mach/common.h>
@@ -28,8 +29,8 @@
28#include <asm/system.h> 29#include <asm/system.h>
29#include <asm/mach-types.h> 30#include <asm/mach-types.h>
30 31
31void (*imx_idle)(void) = NULL;
32void __iomem *(*imx_ioremap)(unsigned long, size_t, unsigned int) = NULL; 32void __iomem *(*imx_ioremap)(unsigned long, size_t, unsigned int) = NULL;
33EXPORT_SYMBOL_GPL(imx_ioremap);
33 34
34static void __iomem *wdog_base; 35static void __iomem *wdog_base;
35 36
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c
index e993a184189..a3c164c7ba8 100644
--- a/arch/arm/plat-mxc/tzic.c
+++ b/arch/arm/plat-mxc/tzic.c
@@ -17,6 +17,7 @@
17#include <linux/io.h> 17#include <linux/io.h>
18 18
19#include <asm/mach/irq.h> 19#include <asm/mach/irq.h>
20#include <asm/exception.h>
20 21
21#include <mach/hardware.h> 22#include <mach/hardware.h>
22#include <mach/common.h> 23#include <mach/common.h>
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index 197ca03c3f7..eb73ab40e95 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -165,8 +165,8 @@ struct dpll_data {
165 u8 auto_recal_bit; 165 u8 auto_recal_bit;
166 u8 recal_en_bit; 166 u8 recal_en_bit;
167 u8 recal_st_bit; 167 u8 recal_st_bit;
168 u8 flags;
169# endif 168# endif
169 u8 flags;
170}; 170};
171 171
172#endif 172#endif
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index 346098fb921..257f9770b2d 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -28,11 +28,14 @@
28#define __ARCH_ARM_MACH_OMAP_COMMON_H 28#define __ARCH_ARM_MACH_OMAP_COMMON_H
29 29
30#include <plat/i2c.h> 30#include <plat/i2c.h>
31#include <plat/omap_hwmod.h>
31 32
32extern int __init omap_init_clocksource_32k(void); 33extern int __init omap_init_clocksource_32k(void);
33extern unsigned long long notrace omap_32k_sched_clock(void); 34extern unsigned long long notrace omap_32k_sched_clock(void);
34 35
35extern void omap_reserve(void); 36extern void omap_reserve(void);
37extern int omap_dss_reset(struct omap_hwmod *);
38
36void omap_sram_init(void); 39void omap_sram_init(void);
37 40
38#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */ 41#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */
diff --git a/arch/arm/plat-s3c24xx/cpu-freq-debugfs.c b/arch/arm/plat-s3c24xx/cpu-freq-debugfs.c
index a9276667c2f..c7adad0e8de 100644
--- a/arch/arm/plat-s3c24xx/cpu-freq-debugfs.c
+++ b/arch/arm/plat-s3c24xx/cpu-freq-debugfs.c
@@ -12,7 +12,7 @@
12*/ 12*/
13 13
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/module.h> 15#include <linux/export.h>
16#include <linux/interrupt.h> 16#include <linux/interrupt.h>
17#include <linux/ioport.h> 17#include <linux/ioport.h>
18#include <linux/cpufreq.h> 18#include <linux/cpufreq.h>
diff --git a/arch/arm/plat-s5p/sysmmu.c b/arch/arm/plat-s5p/sysmmu.c
index e1cbc728c77..c8bec9c7655 100644
--- a/arch/arm/plat-s5p/sysmmu.c
+++ b/arch/arm/plat-s5p/sysmmu.c
@@ -11,6 +11,7 @@
11#include <linux/io.h> 11#include <linux/io.h>
12#include <linux/interrupt.h> 12#include <linux/interrupt.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/export.h>
14 15
15#include <asm/pgtable.h> 16#include <asm/pgtable.h>
16 17
diff --git a/arch/arm/plat-samsung/dev-backlight.c b/arch/arm/plat-samsung/dev-backlight.c
index e657305644c..a976c023b28 100644
--- a/arch/arm/plat-samsung/dev-backlight.c
+++ b/arch/arm/plat-samsung/dev-backlight.c
@@ -15,7 +15,6 @@
15#include <linux/slab.h> 15#include <linux/slab.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/pwm_backlight.h> 17#include <linux/pwm_backlight.h>
18#include <linux/slab.h>
19 18
20#include <plat/devs.h> 19#include <plat/devs.h>
21#include <plat/gpio-cfg.h> 20#include <plat/gpio-cfg.h>
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index d48245bb02b..df8155b9d4d 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
@@ -24,6 +24,8 @@
24#ifndef __PLAT_GPIO_CFG_H 24#ifndef __PLAT_GPIO_CFG_H
25#define __PLAT_GPIO_CFG_H __FILE__ 25#define __PLAT_GPIO_CFG_H __FILE__
26 26
27#include<linux/types.h>
28
27typedef unsigned int __bitwise__ samsung_gpio_pull_t; 29typedef unsigned int __bitwise__ samsung_gpio_pull_t;
28typedef unsigned int __bitwise__ s5p_gpio_drvstr_t; 30typedef unsigned int __bitwise__ s5p_gpio_drvstr_t;
29 31
diff --git a/arch/arm/plat-samsung/pd.c b/arch/arm/plat-samsung/pd.c
index efe1d564473..312b510d86b 100644
--- a/arch/arm/plat-samsung/pd.c
+++ b/arch/arm/plat-samsung/pd.c
@@ -11,7 +11,7 @@
11*/ 11*/
12 12
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/module.h> 14#include <linux/export.h>
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/err.h> 16#include <linux/err.h>
17#include <linux/pm_runtime.h> 17#include <linux/pm_runtime.h>
diff --git a/arch/arm/plat-samsung/pwm.c b/arch/arm/plat-samsung/pwm.c
index dc1185dcf80..c559d8438c7 100644
--- a/arch/arm/plat-samsung/pwm.c
+++ b/arch/arm/plat-samsung/pwm.c
@@ -11,7 +11,7 @@
11 * the Free Software Foundation; either version 2 of the License. 11 * the Free Software Foundation; either version 2 of the License.
12*/ 12*/
13 13
14#include <linux/module.h> 14#include <linux/export.h>
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/slab.h> 17#include <linux/slab.h>
diff --git a/arch/arm/plat-tcc/Kconfig b/arch/arm/plat-tcc/Kconfig
deleted file mode 100644
index 1bf499570f4..00000000000
--- a/arch/arm/plat-tcc/Kconfig
+++ /dev/null
@@ -1,20 +0,0 @@
1if ARCH_TCC_926
2
3menu "Telechips ARM926-based CPUs"
4
5choice
6 prompt "Telechips CPU type:"
7 default ARCH_TCC8K
8
9config ARCH_TCC8K
10 bool TCC8000
11 select USB_ARCH_HAS_OHCI
12 help
13 Support for Telechips TCC8000 systems
14
15endchoice
16
17source "arch/arm/mach-tcc8k/Kconfig"
18
19endmenu
20endif
diff --git a/arch/arm/plat-tcc/Makefile b/arch/arm/plat-tcc/Makefile
deleted file mode 100644
index eceabc869b8..00000000000
--- a/arch/arm/plat-tcc/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
1# "Telechips Platform Common Modules"
2
3obj-y := clock.o system.o
diff --git a/arch/arm/plat-tcc/clock.c b/arch/arm/plat-tcc/clock.c
deleted file mode 100644
index f3ced10d527..00000000000
--- a/arch/arm/plat-tcc/clock.c
+++ /dev/null
@@ -1,179 +0,0 @@
1/*
2 * Clock framework for Telechips SoCs
3 * Based on arch/arm/plat-mxc/clock.c
4 *
5 * Copyright (C) 2004 - 2005 Nokia corporation
6 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
7 * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
8 * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
9 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
10 * Copyright 2010 Hans J. Koch, hjk@linutronix.de
11 *
12 * Licensed under the terms of the GPL v2.
13 */
14
15#include <linux/clk.h>
16#include <linux/err.h>
17#include <linux/errno.h>
18#include <linux/module.h>
19#include <linux/mutex.h>
20#include <linux/string.h>
21
22#include <mach/clock.h>
23#include <mach/hardware.h>
24
25static DEFINE_MUTEX(clocks_mutex);
26
27/*-------------------------------------------------------------------------
28 * Standard clock functions defined in include/linux/clk.h
29 *-------------------------------------------------------------------------*/
30
31static void __clk_disable(struct clk *clk)
32{
33 BUG_ON(clk->refcount == 0);
34
35 if (!(--clk->refcount) && clk->disable) {
36 /* Unconditionally disable the clock in hardware */
37 clk->disable(clk);
38 /* recursively disable parents */
39 if (clk->parent)
40 __clk_disable(clk->parent);
41 }
42}
43
44static int __clk_enable(struct clk *clk)
45{
46 int ret = 0;
47
48 if (clk->refcount++ == 0 && clk->enable) {
49 if (clk->parent)
50 ret = __clk_enable(clk->parent);
51 if (ret)
52 return ret;
53 else
54 return clk->enable(clk);
55 }
56
57 return 0;
58}
59
60/* This function increments the reference count on the clock and enables the
61 * clock if not already enabled. The parent clock tree is recursively enabled
62 */
63int clk_enable(struct clk *clk)
64{
65 int ret = 0;
66
67 if (!clk)
68 return -EINVAL;
69
70 mutex_lock(&clocks_mutex);
71 ret = __clk_enable(clk);
72 mutex_unlock(&clocks_mutex);
73
74 return ret;
75}
76EXPORT_SYMBOL_GPL(clk_enable);
77
78/* This function decrements the reference count on the clock and disables
79 * the clock when reference count is 0. The parent clock tree is
80 * recursively disabled
81 */
82void clk_disable(struct clk *clk)
83{
84 if (!clk)
85 return;
86
87 mutex_lock(&clocks_mutex);
88 __clk_disable(clk);
89 mutex_unlock(&clocks_mutex);
90}
91EXPORT_SYMBOL_GPL(clk_disable);
92
93/* Retrieve the *current* clock rate. If the clock itself
94 * does not provide a special calculation routine, ask
95 * its parent and so on, until one is able to return
96 * a valid clock rate
97 */
98unsigned long clk_get_rate(struct clk *clk)
99{
100 if (!clk)
101 return 0UL;
102
103 if (clk->get_rate)
104 return clk->get_rate(clk);
105
106 return clk_get_rate(clk->parent);
107}
108EXPORT_SYMBOL_GPL(clk_get_rate);
109
110/* Round the requested clock rate to the nearest supported
111 * rate that is less than or equal to the requested rate.
112 * This is dependent on the clock's current parent.
113 */
114long clk_round_rate(struct clk *clk, unsigned long rate)
115{
116 if (!clk)
117 return 0;
118 if (!clk->round_rate)
119 return 0;
120
121 return clk->round_rate(clk, rate);
122}
123EXPORT_SYMBOL_GPL(clk_round_rate);
124
125/* Set the clock to the requested clock rate. The rate must
126 * match a supported rate exactly based on what clk_round_rate returns
127 */
128int clk_set_rate(struct clk *clk, unsigned long rate)
129{
130 int ret = -EINVAL;
131
132 if (!clk)
133 return ret;
134 if (!clk->set_rate || !rate)
135 return ret;
136
137 mutex_lock(&clocks_mutex);
138 ret = clk->set_rate(clk, rate);
139 mutex_unlock(&clocks_mutex);
140
141 return ret;
142}
143EXPORT_SYMBOL_GPL(clk_set_rate);
144
145/* Set the clock's parent to another clock source */
146int clk_set_parent(struct clk *clk, struct clk *parent)
147{
148 struct clk *old;
149 int ret = -EINVAL;
150
151 if (!clk)
152 return ret;
153 if (!clk->set_parent || !parent)
154 return ret;
155
156 mutex_lock(&clocks_mutex);
157 old = clk->parent;
158 if (clk->refcount)
159 __clk_enable(parent);
160 ret = clk->set_parent(clk, parent);
161 if (ret)
162 old = parent;
163 if (clk->refcount)
164 __clk_disable(old);
165 mutex_unlock(&clocks_mutex);
166
167 return ret;
168}
169EXPORT_SYMBOL_GPL(clk_set_parent);
170
171/* Retrieve the clock's parent clock source */
172struct clk *clk_get_parent(struct clk *clk)
173{
174 if (!clk)
175 return NULL;
176
177 return clk->parent;
178}
179EXPORT_SYMBOL_GPL(clk_get_parent);
diff --git a/arch/arm/plat-tcc/include/mach/clock.h b/arch/arm/plat-tcc/include/mach/clock.h
deleted file mode 100644
index a12f58ad71a..00000000000
--- a/arch/arm/plat-tcc/include/mach/clock.h
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 * Low level clock header file for Telechips TCC architecture
3 * (C) 2010 Hans J. Koch <hjk@linutronix.de>
4 *
5 * Licensed under the GPL v2.
6 */
7
8#ifndef __ASM_ARCH_TCC_CLOCK_H__
9#define __ASM_ARCH_TCC_CLOCK_H__
10
11#ifndef __ASSEMBLY__
12
13struct clk {
14 struct clk *parent;
15 /* id number of a root clock, 0 for normal clocks */
16 int root_id;
17 /* Reference count of clock enable/disable */
18 int refcount;
19 /* Address of associated BCLKCTRx register. Must be set. */
20 void __iomem *bclkctr;
21 /* Bit position for BCLKCTRx. Must be set. */
22 int bclk_shift;
23 /* Address of ACLKxxx register, if any. */
24 void __iomem *aclkreg;
25 /* get the current clock rate (always a fresh value) */
26 unsigned long (*get_rate) (struct clk *);
27 /* Function ptr to set the clock to a new rate. The rate must match a
28 supported rate returned from round_rate. Leave blank if clock is not
29 programmable */
30 int (*set_rate) (struct clk *, unsigned long);
31 /* Function ptr to round the requested clock rate to the nearest
32 supported rate that is less than or equal to the requested rate. */
33 unsigned long (*round_rate) (struct clk *, unsigned long);
34 /* Function ptr to enable the clock. Leave blank if clock can not
35 be gated. */
36 int (*enable) (struct clk *);
37 /* Function ptr to disable the clock. Leave blank if clock can not
38 be gated. */
39 void (*disable) (struct clk *);
40 /* Function ptr to set the parent clock of the clock. */
41 int (*set_parent) (struct clk *, struct clk *);
42};
43
44int clk_register(struct clk *clk);
45void clk_unregister(struct clk *clk);
46
47#endif /* __ASSEMBLY__ */
48#endif /* __ASM_ARCH_MXC_CLOCK_H__ */
diff --git a/arch/arm/plat-tcc/include/mach/debug-macro.S b/arch/arm/plat-tcc/include/mach/debug-macro.S
deleted file mode 100644
index cf17d04ec30..00000000000
--- a/arch/arm/plat-tcc/include/mach/debug-macro.S
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * Copyright (C) 1994-1999 Russell King
3 * Copyright (C) 2008-2009 Telechips
4 * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12 .macro addruart, rp, rv, tmp
13 moveq \rp, #0x90000000 @ physical base address
14 movne \rv, #0xF1000000 @ virtual base
15 orr \rp, \rp, #0x00007000 @ UART0
16 orr \rv, \rv, #0x00007000 @ UART0
17 .endm
18
19 .macro senduart,rd,rx
20 strb \rd, [\rx, #0x44]
21 .endm
22
23 .macro waituart,rd,rx
24 .endm
25
26 .macro busyuart,rd,rx
271001:
28 ldr \rd, [\rx, #0x14]
29 tst \rd, #0x20
30
31 beq 1001b
32 .endm
diff --git a/arch/arm/plat-tcc/include/mach/entry-macro.S b/arch/arm/plat-tcc/include/mach/entry-macro.S
deleted file mode 100644
index 748f401e4b6..00000000000
--- a/arch/arm/plat-tcc/include/mach/entry-macro.S
+++ /dev/null
@@ -1,68 +0,0 @@
1/*
2 * include/asm-arm/arch-tcc83x/entry-macro.S
3 *
4 * Author : <linux@telechips.com>
5 * Created: June 10, 2008
6 * Description: Low-level IRQ helper macros for Telechips-based platforms
7 *
8 * Copyright (C) 2008-2009 Telechips
9 *
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without any
12 * warranty of any kind, whether express or implied.
13 */
14
15#include <mach/hardware.h>
16#include <mach/irqs.h>
17
18 .macro disable_fiq
19 .endm
20
21 .macro get_irqnr_preamble, base, tmp
22 .endm
23
24 .macro arch_ret_to_user, tmp1, tmp2
25 .endm
26
27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
28
29 ldr \base, =0xF2003000 @ base address of PIC registers
30
31 @@ read MREQ register of PIC0
32
33 mov \irqnr, #0
34 ldr \irqstat, [\base, #0x00000014 ] @ lower 32 interrupts
35 cmp \irqstat, #0
36 bne 1001f
37
38 @@ read MREQ register of PIC1
39
40 ldr \irqstat, [\base, #0x00000094] @ upper 32 interrupts
41 cmp \irqstat, #0
42 beq 1002f
43 mov \irqnr, #0x20
44
451001:
46 movs \tmp, \irqstat, lsl #16
47 movne \irqstat, \tmp
48 addeq \irqnr, \irqnr, #16
49
50 movs \tmp, \irqstat, lsl #8
51 movne \irqstat, \tmp
52 addeq \irqnr, \irqnr, #8
53
54 movs \tmp, \irqstat, lsl #4
55 movne \irqstat, \tmp
56 addeq \irqnr, \irqnr, #4
57
58 movs \tmp, \irqstat, lsl #2
59 movne \irqstat, \tmp
60 addeq \irqnr, \irqnr, #2
61
62 movs \tmp, \irqstat, lsl #1
63 addeq \irqnr, \irqnr, #1
64 orrs \base, \base, #1
651002:
66 @@ exit here, Z flag unset if IRQ
67
68 .endm
diff --git a/arch/arm/plat-tcc/include/mach/hardware.h b/arch/arm/plat-tcc/include/mach/hardware.h
deleted file mode 100644
index e70d126ccaf..00000000000
--- a/arch/arm/plat-tcc/include/mach/hardware.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * Author: RidgeRun, Inc. Greg Lonnon <glonnon@ridgerun.com>
3 * Reorganized for Linux-2.6 by Tony Lindgren <tony@atomide.com>
4 * and Dirk Behme <dirk.behme@de.bosch.com>
5 * Rewritten by: <linux@telechips.com>
6 * Description: Hardware definitions for TCC8300 processors and boards
7 *
8 * Copyright (C) 2001 RidgeRun, Inc.
9 * Copyright (C) 2008-2009 Telechips
10 *
11 * Modifications for mainline (C) 2009 Hans J. Koch <hjk@linutronix.de>
12 *
13 * Licensed under the terms of the GNU Pulic License version 2.
14 */
15
16#ifndef __ASM_ARCH_TCC_HARDWARE_H
17#define __ASM_ARCH_TCC_HARDWARE_H
18
19#include <asm/sizes.h>
20#ifndef __ASSEMBLER__
21#include <asm/types.h>
22#endif
23#include <mach/io.h>
24
25/*
26 * ----------------------------------------------------------------------------
27 * Clocks
28 * ----------------------------------------------------------------------------
29 */
30#define CLKGEN_REG_BASE 0xfffece00
31#define ARM_CKCTL (CLKGEN_REG_BASE + 0x0)
32#define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4)
33#define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8)
34#define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC)
35#define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10)
36#define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14)
37#define ARM_SYSST (CLKGEN_REG_BASE + 0x18)
38#define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24)
39
40/* DPLL control registers */
41#define DPLL_CTL 0xfffecf00
42
43#endif /* __ASM_ARCH_TCC_HARDWARE_H */
diff --git a/arch/arm/plat-tcc/include/mach/io.h b/arch/arm/plat-tcc/include/mach/io.h
deleted file mode 100644
index 3e911d3ea0f..00000000000
--- a/arch/arm/plat-tcc/include/mach/io.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * IO definitions for TCC8000 processors and boards
3 *
4 * Copyright (C) 1997-1999 Russell King
5 * Copyright (C) 2008-2009 Telechips
6 * Copyright (C) 2010 Hans J. Koch <hjk@linutronix.de>
7 *
8 * Licensed under the terms of the GNU Public License version 2.
9 */
10
11#ifndef __ASM_ARM_ARCH_IO_H
12#define __ASM_ARM_ARCH_IO_H
13
14#define IO_SPACE_LIMIT 0xffffffff
15
16/*
17 * We don't actually have real ISA nor PCI buses, but there is so many
18 * drivers out there that might just work if we fake them...
19 */
20#define __io(a) __typesafe_io(a)
21#define __mem_pci(a) (a)
22
23#endif
diff --git a/arch/arm/plat-tcc/include/mach/irqs.h b/arch/arm/plat-tcc/include/mach/irqs.h
deleted file mode 100644
index da863894d49..00000000000
--- a/arch/arm/plat-tcc/include/mach/irqs.h
+++ /dev/null
@@ -1,83 +0,0 @@
1/*
2 * IRQ definitions for TCC8xxx
3 *
4 * Copyright (C) 2008-2009 Telechips
5 * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
6 *
7 * Licensed under the terms of the GPL v2.
8 *
9 */
10
11#ifndef __ASM_ARCH_TCC_IRQS_H
12#define __ASM_ARCH_TCC_IRQS_H
13
14#define NR_IRQS 64
15
16/* PIC0 interrupts */
17#define INT_ADMA1 0
18#define INT_BDMA 1
19#define INT_ADMA0 2
20#define INT_GDMA1 3
21#define INT_I2S0RX 4
22#define INT_I2S0TX 5
23#define INT_TC 6
24#define INT_UART0 7
25#define INT_USBD 8
26#define INT_SPI0TX 9
27#define INT_UDMA 10
28#define INT_LIRQ 11
29#define INT_GDMA2 12
30#define INT_GDMA0 13
31#define INT_TC32 14
32#define INT_LCD 15
33#define INT_ADC 16
34#define INT_I2C 17
35#define INT_RTCP 18
36#define INT_RTCA 19
37#define INT_NFC 20
38#define INT_SD0 21
39#define INT_GSB0 22
40#define INT_PK 23
41#define INT_USBH0 24
42#define INT_USBH1 25
43#define INT_G2D 26
44#define INT_ECC 27
45#define INT_SPI0RX 28
46#define INT_UART1 29
47#define INT_MSCL 30
48#define INT_GSB1 31
49/* PIC1 interrupts */
50#define INT_E0 32
51#define INT_E1 33
52#define INT_E2 34
53#define INT_E3 35
54#define INT_E4 36
55#define INT_E5 37
56#define INT_E6 38
57#define INT_E7 39
58#define INT_UART2 40
59#define INT_UART3 41
60#define INT_SPI1TX 42
61#define INT_SPI1RX 43
62#define INT_GSB2 44
63#define INT_SPDIF 45
64#define INT_CDIF 46
65#define INT_VBON 47
66#define INT_VBOFF 48
67#define INT_SD1 49
68#define INT_UART4 50
69#define INT_GDMA3 51
70#define INT_I2S1RX 52
71#define INT_I2S1TX 53
72#define INT_CAN0 54
73#define INT_CAN1 55
74#define INT_GSB3 56
75#define INT_KRST 57
76#define INT_UNUSED 58
77#define INT_SD0D3 59
78#define INT_SD1D3 60
79#define INT_GPS0 61
80#define INT_GPS1 62
81#define INT_GPS2 63
82
83#endif /* ASM_ARCH_TCC_IRQS_H */
diff --git a/arch/arm/plat-tcc/include/mach/system.h b/arch/arm/plat-tcc/include/mach/system.h
deleted file mode 100644
index 909e6035d84..00000000000
--- a/arch/arm/plat-tcc/include/mach/system.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * Author: <linux@telechips.com>
3 * Created: June 10, 2008
4 * Description: LINUX SYSTEM FUNCTIONS for TCC83x
5 *
6 * Copyright (C) 2008-2009 Telechips
7 *
8 * Licensed under the terms of the GPL v2.
9 *
10 */
11
12#ifndef __ASM_ARCH_SYSTEM_H
13#define __ASM_ARCH_SYSTEM_H
14#include <linux/clk.h>
15
16#include <asm/mach-types.h>
17#include <mach/hardware.h>
18
19extern void plat_tcc_reboot(void);
20
21static inline void arch_idle(void)
22{
23 cpu_do_idle();
24}
25
26static inline void arch_reset(char mode, const char *cmd)
27{
28 plat_tcc_reboot();
29}
30
31#endif
diff --git a/arch/arm/plat-tcc/include/mach/tcc8k-regs.h b/arch/arm/plat-tcc/include/mach/tcc8k-regs.h
deleted file mode 100644
index 1d942829533..00000000000
--- a/arch/arm/plat-tcc/include/mach/tcc8k-regs.h
+++ /dev/null
@@ -1,807 +0,0 @@
1/*
2 * Telechips TCC8000 register definitions
3 *
4 * (C) 2009 Hans J. Koch <hjk@linutronix.de>
5 *
6 * Licensed under the terms of the GPLv2.
7 */
8
9#ifndef TCC8K_REGS_H
10#define TCC8K_REGS_H
11
12#include <linux/types.h>
13
14#define EXT_SDRAM_BASE 0x20000000
15#define INT_SRAM_BASE 0x30000000
16#define INT_SRAM_SIZE SZ_32K
17#define CS0_BASE 0x40000000
18#define CS1_BASE 0x50000000
19#define CS1_SIZE SZ_64K
20#define CS2_BASE 0x60000000
21#define CS3_BASE 0x70000000
22#define AHB_PERI_BASE 0x80000000
23#define AHB_PERI_SIZE SZ_64K
24#define APB0_PERI_BASE 0x90000000
25#define APB0_PERI_SIZE SZ_128K
26#define APB1_PERI_BASE 0x98000000
27#define APB1_PERI_SIZE SZ_128K
28#define DATA_TCM_BASE 0xa0000000
29#define DATA_TCM_SIZE SZ_8K
30#define EXT_MEM_CTRL_BASE 0xf0000000
31#define EXT_MEM_CTRL_SIZE SZ_4K
32
33#define CS1_BASE_VIRT (void __iomem *)0xf7000000
34#define AHB_PERI_BASE_VIRT (void __iomem *)0xf4000000
35#define APB0_PERI_BASE_VIRT (void __iomem *)0xf1000000
36#define APB1_PERI_BASE_VIRT (void __iomem *)0xf2000000
37#define EXT_MEM_CTRL_BASE_VIRT (void __iomem *)0xf3000000
38#define INT_SRAM_BASE_VIRT (void __iomem *)0xf5000000
39#define DATA_TCM_BASE_VIRT (void __iomem *)0xf6000000
40
41#define __REG(x) (*((volatile u32 *)(x)))
42
43/* USB Device Controller Registers */
44#define UDC_BASE (AHB_PERI_BASE_VIRT + 0x8000)
45#define UDC_BASE_PHYS (AHB_PERI_BASE + 0x8000)
46
47#define UDC_IR_OFFS 0x00
48#define UDC_EIR_OFFS 0x04
49#define UDC_EIER_OFFS 0x08
50#define UDC_FAR_OFFS 0x0c
51#define UDC_FNR_OFFS 0x10
52#define UDC_EDR_OFFS 0x14
53#define UDC_RT_OFFS 0x18
54#define UDC_SSR_OFFS 0x1c
55#define UDC_SCR_OFFS 0x20
56#define UDC_EP0SR_OFFS 0x24
57#define UDC_EP0CR_OFFS 0x28
58
59#define UDC_ESR_OFFS 0x2c
60#define UDC_ECR_OFFS 0x30
61#define UDC_BRCR_OFFS 0x34
62#define UDC_BWCR_OFFS 0x38
63#define UDC_MPR_OFFS 0x3c
64#define UDC_DCR_OFFS 0x40
65#define UDC_DTCR_OFFS 0x44
66#define UDC_DFCR_OFFS 0x48
67#define UDC_DTTCR1_OFFS 0x4c
68#define UDC_DTTCR2_OFFS 0x50
69#define UDC_ESR2_OFFS 0x54
70
71#define UDC_SCR2_OFFS 0x58
72#define UDC_EP0BUF_OFFS 0x60
73#define UDC_EP1BUF_OFFS 0x64
74#define UDC_EP2BUF_OFFS 0x68
75#define UDC_EP3BUF_OFFS 0x6c
76#define UDC_PLICR_OFFS 0xa0
77#define UDC_PCR_OFFS 0xa4
78
79#define UDC_UPCR0_OFFS 0xc8
80#define UDC_UPCR1_OFFS 0xcc
81#define UDC_UPCR2_OFFS 0xd0
82#define UDC_UPCR3_OFFS 0xd4
83
84/* Bits in UDC_EIR */
85#define UDC_EIR_EP0I (1 << 0)
86#define UDC_EIR_EP1I (1 << 1)
87#define UDC_EIR_EP2I (1 << 2)
88#define UDC_EIR_EP3I (1 << 3)
89#define UDC_EIR_EPI_MASK 0x0f
90
91/* Bits in UDC_EIER */
92#define UDC_EIER_EP0IE (1 << 0)
93#define UDC_EIER_EP1IE (1 << 1)
94#define UDC_EIER_EP2IE (1 << 2)
95#define UDC_EIER_EP3IE (1 << 3)
96
97/* Bits in UDC_FNR */
98#define UDC_FNR_FN_MASK 0x7ff
99#define UDC_FNR_SM (1 << 13)
100#define UDC_FNR_FTL (1 << 14)
101
102/* Bits in UDC_SSR */
103#define UDC_SSR_HFRES (1 << 0)
104#define UDC_SSR_HFSUSP (1 << 1)
105#define UDC_SSR_HFRM (1 << 2)
106#define UDC_SSR_SDE (1 << 3)
107#define UDC_SSR_HSP (1 << 4)
108#define UDC_SSR_DM (1 << 5)
109#define UDC_SSR_DP (1 << 6)
110#define UDC_SSR_TBM (1 << 7)
111#define UDC_SSR_VBON (1 << 8)
112#define UDC_SSR_VBOFF (1 << 9)
113#define UDC_SSR_EOERR (1 << 10)
114#define UDC_SSR_DCERR (1 << 11)
115#define UDC_SSR_TCERR (1 << 12)
116#define UDC_SSR_BSERR (1 << 13)
117#define UDC_SSR_TMERR (1 << 14)
118#define UDC_SSR_BAERR (1 << 15)
119
120/* Bits in UDC_SCR */
121#define UDC_SCR_HRESE (1 << 0)
122#define UDC_SCR_HSSPE (1 << 1)
123#define UDC_SCR_RRDE (1 << 5)
124#define UDC_SCR_SPDEN (1 << 6)
125#define UDC_SCR_DIEN (1 << 12)
126
127/* Bits in UDC_EP0SR */
128#define UDC_EP0SR_RSR (1 << 0)
129#define UDC_EP0SR_TST (1 << 1)
130#define UDC_EP0SR_SHT (1 << 4)
131#define UDC_EP0SR_LWO (1 << 6)
132
133/* Bits in UDC_EP0CR */
134#define UDC_EP0CR_ESS (1 << 1)
135
136/* Bits in UDC_ESR */
137#define UDC_ESR_RPS (1 << 0)
138#define UDC_ESR_TPS (1 << 1)
139#define UDC_ESR_LWO (1 << 4)
140#define UDC_ESR_FFS (1 << 6)
141
142/* Bits in UDC_ECR */
143#define UDC_ECR_ESS (1 << 1)
144#define UDC_ECR_CDP (1 << 2)
145
146#define UDC_ECR_FLUSH (1 << 6)
147#define UDC_ECR_DUEN (1 << 7)
148
149/* Bits in UDC_UPCR0 */
150#define UDC_UPCR0_VBD (1 << 1)
151#define UDC_UPCR0_VBDS (1 << 6)
152#define UDC_UPCR0_RCD_12 (0x0 << 9)
153#define UDC_UPCR0_RCD_24 (0x1 << 9)
154#define UDC_UPCR0_RCD_48 (0x2 << 9)
155#define UDC_UPCR0_RCS_EXT (0x1 << 11)
156#define UDC_UPCR0_RCS_XTAL (0x0 << 11)
157
158/* Bits in UDC_UPCR1 */
159#define UDC_UPCR1_CDT(x) ((x) << 0)
160#define UDC_UPCR1_OTGT(x) ((x) << 3)
161#define UDC_UPCR1_SQRXT(x) ((x) << 8)
162#define UDC_UPCR1_TXFSLST(x) ((x) << 12)
163
164/* Bits in UDC_UPCR2 */
165#define UDC_UPCR2_TP (1 << 0)
166#define UDC_UPCR2_TXRT(x) ((x) << 2)
167#define UDC_UPCR2_TXVRT(x) ((x) << 5)
168#define UDC_UPCR2_OPMODE(x) ((x) << 9)
169#define UDC_UPCR2_XCVRSEL(x) ((x) << 12)
170#define UDC_UPCR2_TM (1 << 14)
171
172/* USB Host Controller registers */
173#define USBH0_BASE (AHB_PERI_BASE_VIRT + 0xb000)
174#define USBH1_BASE (AHB_PERI_BASE_VIRT + 0xb800)
175
176#define OHCI_INT_ENABLE_OFFS 0x10
177
178#define RH_DESCRIPTOR_A_OFFS 0x48
179#define RH_DESCRIPTOR_B_OFFS 0x4c
180
181#define USBHTCFG0_OFFS 0x100
182#define USBHHCFG0_OFFS 0x104
183#define USBHHCFG1_OFFS 0x104
184
185/* DMA controller registers */
186#define DMAC0_BASE (AHB_PERI_BASE + 0x4000)
187#define DMAC1_BASE (AHB_PERI_BASE + 0xa000)
188#define DMAC2_BASE (AHB_PERI_BASE + 0x4800)
189#define DMAC3_BASE (AHB_PERI_BASE + 0xa800)
190
191#define DMAC_CH_OFFSET(ch) (ch * 0x30)
192
193#define ST_SADR_OFFS 0x00
194#define SPARAM_OFFS 0x04
195#define C_SADR_OFFS 0x0c
196#define ST_DADR_OFFS 0x10
197#define DPARAM_OFFS 0x14
198#define C_DADR_OFFS 0x1c
199#define HCOUNT_OFFS 0x20
200#define CHCTRL_OFFS 0x24
201#define RPTCTRL_OFFS 0x28
202#define EXTREQ_A_OFFS 0x2c
203
204/* Bits in CHCTRL register */
205#define CHCTRL_EN (1 << 0)
206
207#define CHCTRL_IEN (1 << 2)
208#define CHCTRL_FLAG (1 << 3)
209#define CHCTRL_WSIZE8 (0 << 4)
210#define CHCTRL_WSIZE16 (1 << 4)
211#define CHCTRL_WSIZE32 (2 << 4)
212
213#define CHCTRL_BSIZE1 (0 << 6)
214#define CHCTRL_BSIZE2 (1 << 6)
215#define CHCTRL_BSIZE4 (2 << 6)
216#define CHCTRL_BSIZE8 (3 << 6)
217
218#define CHCTRL_TYPE_SINGLE_E (0 << 8)
219#define CHCTRL_TYPE_HW (1 << 8)
220#define CHCTRL_TYPE_SW (2 << 8)
221#define CHCTRL_TYPE_SINGLE_L (3 << 8)
222
223#define CHCTRL_BST (1 << 10)
224
225/* Use DMA controller 0, channel 2 for USB */
226#define USB_DMA_BASE (DMAC0_BASE + DMAC_CH_OFFSET(2))
227
228/* NAND flash controller registers */
229#define NFC_BASE (AHB_PERI_BASE_VIRT + 0xd000)
230#define NFC_BASE_PHYS (AHB_PERI_BASE + 0xd000)
231
232#define NFC_CMD_OFFS 0x00
233#define NFC_LADDR_OFFS 0x04
234#define NFC_BADDR_OFFS 0x08
235#define NFC_SADDR_OFFS 0x0c
236#define NFC_WDATA_OFFS 0x10
237#define NFC_LDATA_OFFS 0x20
238#define NFC_SDATA_OFFS 0x40
239#define NFC_CTRL_OFFS 0x50
240#define NFC_PSTART_OFFS 0x54
241#define NFC_RSTART_OFFS 0x58
242#define NFC_DSIZE_OFFS 0x5c
243#define NFC_IREQ_OFFS 0x60
244#define NFC_RST_OFFS 0x64
245#define NFC_CTRL1_OFFS 0x68
246#define NFC_MDATA_OFFS 0x70
247
248#define NFC_WDATA_PHYS_ADDR (NFC_BASE_PHYS + NFC_WDATA_OFFS)
249
250/* Bits in NFC_CTRL */
251#define NFC_CTRL_BHLD_MASK (0xf << 0)
252#define NFC_CTRL_BPW_MASK (0xf << 4)
253#define NFC_CTRL_BSTP_MASK (0xf << 8)
254#define NFC_CTRL_CADDR_MASK (0x7 << 12)
255#define NFC_CTRL_CADDR_1 (0x0 << 12)
256#define NFC_CTRL_CADDR_2 (0x1 << 12)
257#define NFC_CTRL_CADDR_3 (0x2 << 12)
258#define NFC_CTRL_CADDR_4 (0x3 << 12)
259#define NFC_CTRL_CADDR_5 (0x4 << 12)
260#define NFC_CTRL_MSK (1 << 15)
261#define NFC_CTRL_PSIZE256 (0 << 16)
262#define NFC_CTRL_PSIZE512 (1 << 16)
263#define NFC_CTRL_PSIZE1024 (2 << 16)
264#define NFC_CTRL_PSIZE2048 (3 << 16)
265#define NFC_CTRL_PSIZE4096 (4 << 16)
266#define NFC_CTRL_PSIZE_MASK (7 << 16)
267#define NFC_CTRL_BSIZE1 (0 << 19)
268#define NFC_CTRL_BSIZE2 (1 << 19)
269#define NFC_CTRL_BSIZE4 (2 << 19)
270#define NFC_CTRL_BSIZE8 (3 << 19)
271#define NFC_CTRL_BSIZE_MASK (3 << 19)
272#define NFC_CTRL_RDY (1 << 21)
273#define NFC_CTRL_CS0SEL (1 << 22)
274#define NFC_CTRL_CS1SEL (1 << 23)
275#define NFC_CTRL_CS2SEL (1 << 24)
276#define NFC_CTRL_CS3SEL (1 << 25)
277#define NFC_CTRL_CSMASK (0xf << 22)
278#define NFC_CTRL_BW (1 << 26)
279#define NFC_CTRL_FS (1 << 27)
280#define NFC_CTRL_DEN (1 << 28)
281#define NFC_CTRL_READ_IEN (1 << 29)
282#define NFC_CTRL_PROG_IEN (1 << 30)
283#define NFC_CTRL_RDY_IEN (1 << 31)
284
285/* Bits in NFC_IREQ */
286#define NFC_IREQ_IRQ0 (1 << 0)
287#define NFC_IREQ_IRQ1 (1 << 1)
288#define NFC_IREQ_IRQ2 (1 << 2)
289
290#define NFC_IREQ_FLAG0 (1 << 4)
291#define NFC_IREQ_FLAG1 (1 << 5)
292#define NFC_IREQ_FLAG2 (1 << 6)
293
294/* MMC controller registers */
295#define MMC0_BASE (AHB_PERI_BASE_VIRT + 0xe000)
296#define MMC1_BASE (AHB_PERI_BASE_VIRT + 0xe800)
297
298/* UART base addresses */
299
300#define UART0_BASE (APB0_PERI_BASE_VIRT + 0x07000)
301#define UART0_BASE_PHYS (APB0_PERI_BASE + 0x07000)
302#define UART1_BASE (APB0_PERI_BASE_VIRT + 0x08000)
303#define UART1_BASE_PHYS (APB0_PERI_BASE + 0x08000)
304#define UART2_BASE (APB0_PERI_BASE_VIRT + 0x09000)
305#define UART2_BASE_PHYS (APB0_PERI_BASE + 0x09000)
306#define UART3_BASE (APB0_PERI_BASE_VIRT + 0x0a000)
307#define UART3_BASE_PHYS (APB0_PERI_BASE + 0x0a000)
308#define UART4_BASE (APB0_PERI_BASE_VIRT + 0x15000)
309#define UART4_BASE_PHYS (APB0_PERI_BASE + 0x15000)
310
311#define UART_BASE UART0_BASE
312#define UART_BASE_PHYS UART0_BASE_PHYS
313
314/* ECC controller */
315#define ECC_CTR_BASE (APB0_PERI_BASE_VIRT + 0xd000)
316
317#define ECC_CTRL_OFFS 0x00
318#define ECC_BASE_OFFS 0x04
319#define ECC_MASK_OFFS 0x08
320#define ECC_CLEAR_OFFS 0x0c
321#define ECC4_0_OFFS 0x10
322#define ECC4_1_OFFS 0x14
323
324#define ECC_EADDR0_OFFS 0x50
325
326#define ECC_ERRNUM_OFFS 0x90
327#define ECC_IREQ_OFFS 0x94
328
329/* Bits in ECC_CTRL */
330#define ECC_CTRL_ECC4_DIEN (1 << 28)
331#define ECC_CTRL_ECC8_DIEN (1 << 29)
332#define ECC_CTRL_ECC12_DIEN (1 << 30)
333#define ECC_CTRL_ECC_DISABLE 0x0
334#define ECC_CTRL_ECC_SLC_ENC 0x8
335#define ECC_CTRL_ECC_SLC_DEC 0x9
336#define ECC_CTRL_ECC4_ENC 0xa
337#define ECC_CTRL_ECC4_DEC 0xb
338#define ECC_CTRL_ECC8_ENC 0xc
339#define ECC_CTRL_ECC8_DEC 0xd
340#define ECC_CTRL_ECC12_ENC 0xe
341#define ECC_CTRL_ECC12_DEC 0xf
342
343/* Bits in ECC_IREQ */
344#define ECC_IREQ_E4DI (1 << 4)
345
346#define ECC_IREQ_E4DF (1 << 20)
347#define ECC_IREQ_E4EF (1 << 21)
348
349/* Interrupt controller */
350
351#define PIC0_BASE (APB1_PERI_BASE_VIRT + 0x3000)
352#define PIC0_BASE_PHYS (APB1_PERI_BASE + 0x3000)
353
354#define PIC0_IEN_OFFS 0x00
355#define PIC0_CREQ_OFFS 0x04
356#define PIC0_IREQ_OFFS 0x08
357#define PIC0_IRQSEL_OFFS 0x0c
358#define PIC0_SRC_OFFS 0x10
359#define PIC0_MREQ_OFFS 0x14
360#define PIC0_TSTREQ_OFFS 0x18
361#define PIC0_POL_OFFS 0x1c
362#define PIC0_IRQ_OFFS 0x20
363#define PIC0_FIQ_OFFS 0x24
364#define PIC0_MIRQ_OFFS 0x28
365#define PIC0_MFIQ_OFFS 0x2c
366#define PIC0_TMODE_OFFS 0x30
367#define PIC0_SYNC_OFFS 0x34
368#define PIC0_WKUP_OFFS 0x38
369#define PIC0_TMODEA_OFFS 0x3c
370#define PIC0_INTOEN_OFFS 0x40
371#define PIC0_MEN0_OFFS 0x44
372#define PIC0_MEN_OFFS 0x48
373
374#define PIC0_IEN __REG(PIC0_BASE + PIC0_IEN_OFFS)
375#define PIC0_IEN_PHYS __REG(PIC0_BASE_PHYS + PIC0_IEN_OFFS)
376#define PIC0_CREQ __REG(PIC0_BASE + PIC0_CREQ_OFFS)
377#define PIC0_CREQ_PHYS __REG(PIC0_BASE_PHYS + PIC0_CREQ_OFFS)
378#define PIC0_IREQ __REG(PIC0_BASE + PIC0_IREQ_OFFS)
379#define PIC0_IRQSEL __REG(PIC0_BASE + PIC0_IRQSEL_OFFS)
380#define PIC0_IRQSEL_PHYS __REG(PIC0_BASE_PHYS + PIC0_IRQSEL_OFFS)
381#define PIC0_SRC __REG(PIC0_BASE + PIC0_SRC_OFFS)
382#define PIC0_MREQ __REG(PIC0_BASE + PIC0_MREQ_OFFS)
383#define PIC0_TSTREQ __REG(PIC0_BASE + PIC0_TSTREQ_OFFS)
384#define PIC0_POL __REG(PIC0_BASE + PIC0_POL_OFFS)
385#define PIC0_IRQ __REG(PIC0_BASE + PIC0_IRQ_OFFS)
386#define PIC0_FIQ __REG(PIC0_BASE + PIC0_FIQ_OFFS)
387#define PIC0_MIRQ __REG(PIC0_BASE + PIC0_MIRQ_OFFS)
388#define PIC0_MFIQ __REG(PIC0_BASE + PIC0_MFIQ_OFFS)
389#define PIC0_TMODE __REG(PIC0_BASE + PIC0_TMODE_OFFS)
390#define PIC0_TMODE_PHYS __REG(PIC0_BASE_PHYS + PIC0_TMODE_OFFS)
391#define PIC0_SYNC __REG(PIC0_BASE + PIC0_SYNC_OFFS)
392#define PIC0_WKUP __REG(PIC0_BASE + PIC0_WKUP_OFFS)
393#define PIC0_TMODEA __REG(PIC0_BASE + PIC0_TMODEA_OFFS)
394#define PIC0_INTOEN __REG(PIC0_BASE + PIC0_INTOEN_OFFS)
395#define PIC0_MEN0 __REG(PIC0_BASE + PIC0_MEN0_OFFS)
396#define PIC0_MEN __REG(PIC0_BASE + PIC0_MEN_OFFS)
397
398#define PIC1_BASE (APB1_PERI_BASE_VIRT + 0x3080)
399
400#define PIC1_IEN_OFFS 0x00
401#define PIC1_CREQ_OFFS 0x04
402#define PIC1_IREQ_OFFS 0x08
403#define PIC1_IRQSEL_OFFS 0x0c
404#define PIC1_SRC_OFFS 0x10
405#define PIC1_MREQ_OFFS 0x14
406#define PIC1_TSTREQ_OFFS 0x18
407#define PIC1_POL_OFFS 0x1c
408#define PIC1_IRQ_OFFS 0x20
409#define PIC1_FIQ_OFFS 0x24
410#define PIC1_MIRQ_OFFS 0x28
411#define PIC1_MFIQ_OFFS 0x2c
412#define PIC1_TMODE_OFFS 0x30
413#define PIC1_SYNC_OFFS 0x34
414#define PIC1_WKUP_OFFS 0x38
415#define PIC1_TMODEA_OFFS 0x3c
416#define PIC1_INTOEN_OFFS 0x40
417#define PIC1_MEN1_OFFS 0x44
418#define PIC1_MEN_OFFS 0x48
419
420#define PIC1_IEN __REG(PIC1_BASE + PIC1_IEN_OFFS)
421#define PIC1_CREQ __REG(PIC1_BASE + PIC1_CREQ_OFFS)
422#define PIC1_IREQ __REG(PIC1_BASE + PIC1_IREQ_OFFS)
423#define PIC1_IRQSEL __REG(PIC1_BASE + PIC1_IRQSEL_OFFS)
424#define PIC1_SRC __REG(PIC1_BASE + PIC1_SRC_OFFS)
425#define PIC1_MREQ __REG(PIC1_BASE + PIC1_MREQ_OFFS)
426#define PIC1_TSTREQ __REG(PIC1_BASE + PIC1_TSTREQ_OFFS)
427#define PIC1_POL __REG(PIC1_BASE + PIC1_POL_OFFS)
428#define PIC1_IRQ __REG(PIC1_BASE + PIC1_IRQ_OFFS)
429#define PIC1_FIQ __REG(PIC1_BASE + PIC1_FIQ_OFFS)
430#define PIC1_MIRQ __REG(PIC1_BASE + PIC1_MIRQ_OFFS)
431#define PIC1_MFIQ __REG(PIC1_BASE + PIC1_MFIQ_OFFS)
432#define PIC1_TMODE __REG(PIC1_BASE + PIC1_TMODE_OFFS)
433#define PIC1_SYNC __REG(PIC1_BASE + PIC1_SYNC_OFFS)
434#define PIC1_WKUP __REG(PIC1_BASE + PIC1_WKUP_OFFS)
435#define PIC1_TMODEA __REG(PIC1_BASE + PIC1_TMODEA_OFFS)
436#define PIC1_INTOEN __REG(PIC1_BASE + PIC1_INTOEN_OFFS)
437#define PIC1_MEN1 __REG(PIC1_BASE + PIC1_MEN1_OFFS)
438#define PIC1_MEN __REG(PIC1_BASE + PIC1_MEN_OFFS)
439
440/* Timer registers */
441#define TIMER_BASE (APB1_PERI_BASE_VIRT + 0x4000)
442#define TIMER_BASE_PHYS (APB1_PERI_BASE + 0x4000)
443
444#define TWDCFG_OFFS 0x70
445
446#define TC32EN_OFFS 0x80
447#define TC32LDV_OFFS 0x84
448#define TC32CMP0_OFFS 0x88
449#define TC32CMP1_OFFS 0x8c
450#define TC32PCNT_OFFS 0x90
451#define TC32MCNT_OFFS 0x94
452#define TC32IRQ_OFFS 0x98
453
454/* Bits in TC32EN */
455#define TC32EN_PRESCALE_MASK 0x00ffffff
456#define TC32EN_ENABLE (1 << 24)
457#define TC32EN_LOADZERO (1 << 25)
458#define TC32EN_STOPMODE (1 << 26)
459#define TC32EN_LDM0 (1 << 28)
460#define TC32EN_LDM1 (1 << 29)
461
462/* Bits in TC32IRQ */
463#define TC32IRQ_MSTAT_MASK 0x0000001f
464#define TC32IRQ_RSTAT_MASK (0x1f << 8)
465#define TC32IRQ_IRQEN0 (1 << 16)
466#define TC32IRQ_IRQEN1 (1 << 17)
467#define TC32IRQ_IRQEN2 (1 << 18)
468#define TC32IRQ_IRQEN3 (1 << 19)
469#define TC32IRQ_IRQEN4 (1 << 20)
470#define TC32IRQ_RSYNC (1 << 30)
471#define TC32IRQ_IRQCLR (1 << 31)
472
473/* GPIO registers */
474#define GPIOPD_BASE (APB1_PERI_BASE_VIRT + 0x5000)
475
476#define GPIOPD_DAT_OFFS 0x00
477#define GPIOPD_DOE_OFFS 0x04
478#define GPIOPD_FS0_OFFS 0x08
479#define GPIOPD_FS1_OFFS 0x0c
480#define GPIOPD_FS2_OFFS 0x10
481#define GPIOPD_RPU_OFFS 0x30
482#define GPIOPD_RPD_OFFS 0x34
483#define GPIOPD_DV0_OFFS 0x38
484#define GPIOPD_DV1_OFFS 0x3c
485
486#define GPIOPS_BASE (APB1_PERI_BASE_VIRT + 0x5000)
487
488#define GPIOPS_DAT_OFFS 0x40
489#define GPIOPS_DOE_OFFS 0x44
490#define GPIOPS_FS0_OFFS 0x48
491#define GPIOPS_FS1_OFFS 0x4c
492#define GPIOPS_FS2_OFFS 0x50
493#define GPIOPS_FS3_OFFS 0x54
494#define GPIOPS_RPU_OFFS 0x70
495#define GPIOPS_RPD_OFFS 0x74
496#define GPIOPS_DV0_OFFS 0x78
497#define GPIOPS_DV1_OFFS 0x7c
498
499#define GPIOPS_FS1_SDH0_BITS 0x000000ff
500#define GPIOPS_FS1_SDH1_BITS 0x0000ff00
501
502#define GPIOPU_BASE (APB1_PERI_BASE_VIRT + 0x5000)
503
504#define GPIOPU_DAT_OFFS 0x80
505#define GPIOPU_DOE_OFFS 0x84
506#define GPIOPU_FS0_OFFS 0x88
507#define GPIOPU_FS1_OFFS 0x8c
508#define GPIOPU_FS2_OFFS 0x90
509#define GPIOPU_RPU_OFFS 0xb0
510#define GPIOPU_RPD_OFFS 0xb4
511#define GPIOPU_DV0_OFFS 0xb8
512#define GPIOPU_DV1_OFFS 0xbc
513
514#define GPIOPU_FS0_TXD0 (1 << 0)
515#define GPIOPU_FS0_RXD0 (1 << 1)
516#define GPIOPU_FS0_CTS0 (1 << 2)
517#define GPIOPU_FS0_RTS0 (1 << 3)
518#define GPIOPU_FS0_TXD1 (1 << 4)
519#define GPIOPU_FS0_RXD1 (1 << 5)
520#define GPIOPU_FS0_CTS1 (1 << 6)
521#define GPIOPU_FS0_RTS1 (1 << 7)
522#define GPIOPU_FS0_TXD2 (1 << 8)
523#define GPIOPU_FS0_RXD2 (1 << 9)
524#define GPIOPU_FS0_CTS2 (1 << 10)
525#define GPIOPU_FS0_RTS2 (1 << 11)
526#define GPIOPU_FS0_TXD3 (1 << 12)
527#define GPIOPU_FS0_RXD3 (1 << 13)
528#define GPIOPU_FS0_CTS3 (1 << 14)
529#define GPIOPU_FS0_RTS3 (1 << 15)
530#define GPIOPU_FS0_TXD4 (1 << 16)
531#define GPIOPU_FS0_RXD4 (1 << 17)
532#define GPIOPU_FS0_CTS4 (1 << 18)
533#define GPIOPU_FS0_RTS4 (1 << 19)
534
535#define GPIOFC_BASE (APB1_PERI_BASE_VIRT + 0x5000)
536
537#define GPIOFC_DAT_OFFS 0xc0
538#define GPIOFC_DOE_OFFS 0xc4
539#define GPIOFC_FS0_OFFS 0xc8
540#define GPIOFC_FS1_OFFS 0xcc
541#define GPIOFC_FS2_OFFS 0xd0
542#define GPIOFC_FS3_OFFS 0xd4
543#define GPIOFC_RPU_OFFS 0xf0
544#define GPIOFC_RPD_OFFS 0xf4
545#define GPIOFC_DV0_OFFS 0xf8
546#define GPIOFC_DV1_OFFS 0xfc
547
548#define GPIOFD_BASE (APB1_PERI_BASE_VIRT + 0x5000)
549
550#define GPIOFD_DAT_OFFS 0x100
551#define GPIOFD_DOE_OFFS 0x104
552#define GPIOFD_FS0_OFFS 0x108
553#define GPIOFD_FS1_OFFS 0x10c
554#define GPIOFD_FS2_OFFS 0x110
555#define GPIOFD_RPU_OFFS 0x130
556#define GPIOFD_RPD_OFFS 0x134
557#define GPIOFD_DV0_OFFS 0x138
558#define GPIOFD_DV1_OFFS 0x13c
559
560#define GPIOLC_BASE (APB1_PERI_BASE_VIRT + 0x5000)
561
562#define GPIOLC_DAT_OFFS 0x140
563#define GPIOLC_DOE_OFFS 0x144
564#define GPIOLC_FS0_OFFS 0x148
565#define GPIOLC_FS1_OFFS 0x14c
566#define GPIOLC_RPU_OFFS 0x170
567#define GPIOLC_RPD_OFFS 0x174
568#define GPIOLC_DV0_OFFS 0x178
569#define GPIOLC_DV1_OFFS 0x17c
570
571#define GPIOLD_BASE (APB1_PERI_BASE_VIRT + 0x5000)
572
573#define GPIOLD_DAT_OFFS 0x180
574#define GPIOLD_DOE_OFFS 0x184
575#define GPIOLD_FS0_OFFS 0x188
576#define GPIOLD_FS1_OFFS 0x18c
577#define GPIOLD_FS2_OFFS 0x190
578#define GPIOLD_RPU_OFFS 0x1b0
579#define GPIOLD_RPD_OFFS 0x1b4
580#define GPIOLD_DV0_OFFS 0x1b8
581#define GPIOLD_DV1_OFFS 0x1bc
582
583#define GPIOAD_BASE (APB1_PERI_BASE_VIRT + 0x5000)
584
585#define GPIOAD_DAT_OFFS 0x1c0
586#define GPIOAD_DOE_OFFS 0x1c4
587#define GPIOAD_FS0_OFFS 0x1c8
588#define GPIOAD_RPU_OFFS 0x1f0
589#define GPIOAD_RPD_OFFS 0x1f4
590#define GPIOAD_DV0_OFFS 0x1f8
591#define GPIOAD_DV1_OFFS 0x1fc
592
593#define GPIOXC_BASE (APB1_PERI_BASE_VIRT + 0x5000)
594
595#define GPIOXC_DAT_OFFS 0x200
596#define GPIOXC_DOE_OFFS 0x204
597#define GPIOXC_FS0_OFFS 0x208
598#define GPIOXC_RPU_OFFS 0x230
599#define GPIOXC_RPD_OFFS 0x234
600#define GPIOXC_DV0_OFFS 0x238
601#define GPIOXC_DV1_OFFS 0x23c
602
603#define GPIOXC_FS0 __REG(GPIOXC_BASE + GPIOXC_FS0_OFFS)
604
605#define GPIOXC_FS0_CS0 (1 << 26)
606#define GPIOXC_FS0_CS1 (1 << 27)
607
608#define GPIOXD_BASE (APB1_PERI_BASE_VIRT + 0x5000)
609
610#define GPIOXD_DAT_OFFS 0x240
611#define GPIOXD_FS0_OFFS 0x248
612#define GPIOXD_RPU_OFFS 0x270
613#define GPIOXD_RPD_OFFS 0x274
614#define GPIOXD_DV0_OFFS 0x278
615#define GPIOXD_DV1_OFFS 0x27c
616
617#define GPIOPK_BASE (APB1_PERI_BASE_VIRT + 0x1c000)
618
619#define GPIOPK_RST_OFFS 0x008
620#define GPIOPK_DAT_OFFS 0x100
621#define GPIOPK_DOE_OFFS 0x104
622#define GPIOPK_FS0_OFFS 0x108
623#define GPIOPK_FS1_OFFS 0x10c
624#define GPIOPK_FS2_OFFS 0x110
625#define GPIOPK_IRQST_OFFS 0x210
626#define GPIOPK_IRQEN_OFFS 0x214
627#define GPIOPK_IRQPOL_OFFS 0x218
628#define GPIOPK_IRQTM0_OFFS 0x21c
629#define GPIOPK_IRQTM1_OFFS 0x220
630#define GPIOPK_CTL_OFFS 0x22c
631
632#define PMGPIO_BASE (APB1_PERI_BASE_VIRT + 0x10000)
633#define BACKUP_RAM_BASE PMGPIO_BASE
634
635#define PMGPIO_DAT_OFFS 0x800
636#define PMGPIO_DOE_OFFS 0x804
637#define PMGPIO_FS0_OFFS 0x808
638#define PMGPIO_RPU_OFFS 0x810
639#define PMGPIO_RPD_OFFS 0x814
640#define PMGPIO_DV0_OFFS 0x818
641#define PMGPIO_DV1_OFFS 0x81c
642#define PMGPIO_EE0_OFFS 0x820
643#define PMGPIO_EE1_OFFS 0x824
644#define PMGPIO_CTL_OFFS 0x828
645#define PMGPIO_DI_OFFS 0x82c
646#define PMGPIO_STR_OFFS 0x830
647#define PMGPIO_STF_OFFS 0x834
648#define PMGPIO_POL_OFFS 0x838
649#define PMGPIO_APB_OFFS 0x800
650
651/* Clock controller registers */
652#define CKC_BASE ((void __iomem *)(APB1_PERI_BASE_VIRT + 0x6000))
653
654#define CLKCTRL_OFFS 0x00
655#define PLL0CFG_OFFS 0x04
656#define PLL1CFG_OFFS 0x08
657#define CLKDIVC0_OFFS 0x0c
658
659#define BCLKCTR0_OFFS 0x14
660#define SWRESET0_OFFS 0x18
661
662#define BCLKCTR1_OFFS 0x60
663#define SWRESET1_OFFS 0x64
664#define PWDCTL_OFFS 0x68
665#define PLL2CFG_OFFS 0x6c
666#define CLKDIVC1_OFFS 0x70
667
668#define ACLKREF_OFFS 0x80
669#define ACLKI2C_OFFS 0x84
670#define ACLKSPI0_OFFS 0x88
671#define ACLKSPI1_OFFS 0x8c
672#define ACLKUART0_OFFS 0x90
673#define ACLKUART1_OFFS 0x94
674#define ACLKUART2_OFFS 0x98
675#define ACLKUART3_OFFS 0x9c
676#define ACLKUART4_OFFS 0xa0
677#define ACLKTCT_OFFS 0xa4
678#define ACLKTCX_OFFS 0xa8
679#define ACLKTCZ_OFFS 0xac
680#define ACLKADC_OFFS 0xb0
681#define ACLKDAI0_OFFS 0xb4
682#define ACLKDAI1_OFFS 0xb8
683#define ACLKLCD_OFFS 0xbc
684#define ACLKSPDIF_OFFS 0xc0
685#define ACLKUSBH_OFFS 0xc4
686#define ACLKSDH0_OFFS 0xc8
687#define ACLKSDH1_OFFS 0xcc
688#define ACLKC3DEC_OFFS 0xd0
689#define ACLKEXT_OFFS 0xd4
690#define ACLKCAN0_OFFS 0xd8
691#define ACLKCAN1_OFFS 0xdc
692#define ACLKGSB0_OFFS 0xe0
693#define ACLKGSB1_OFFS 0xe4
694#define ACLKGSB2_OFFS 0xe8
695#define ACLKGSB3_OFFS 0xec
696
697#define PLLxCFG_PD (1 << 31)
698
699/* CLKCTRL bits */
700#define CLKCTRL_XE (1 << 31)
701
702/* CLKDIVCx bits */
703#define CLKDIVC0_XTE (1 << 7)
704#define CLKDIVC0_XE (1 << 15)
705#define CLKDIVC0_P1E (1 << 23)
706#define CLKDIVC0_P0E (1 << 31)
707
708#define CLKDIVC1_P2E (1 << 7)
709
710/* BCLKCTR0 clock bits */
711#define BCLKCTR0_USBD (1 << 4)
712#define BCLKCTR0_ECC (1 << 9)
713#define BCLKCTR0_USBH0 (1 << 11)
714#define BCLKCTR0_NFC (1 << 16)
715
716/* BCLKCTR1 clock bits */
717#define BCLKCTR1_USBH1 (1 << 20)
718
719/* SWRESET0 bits */
720#define SWRESET0_USBD (1 << 4)
721#define SWRESET0_USBH0 (1 << 11)
722
723/* SWRESET1 bits */
724#define SWRESET1_USBH1 (1 << 20)
725
726/* System clock sources.
727 * Note: These are the clock sources that serve as parents for
728 * all other clocks. They have no parents themselves.
729 *
730 * These values are used for struct clk->root_id. All clocks
731 * that are not system clock sources have this value set to
732 * CLK_SRC_NOROOT.
733 * The values for system clocks start with CLK_SRC_PLL0 == 0
734 * because this gives us exactly the values needed for the lower
735 * 4 bits of ACLK_* registers. Therefore, CLK_SRC_NOROOT is
736 * defined as -1 to not disturb the order.
737 */
738enum root_clks {
739 CLK_SRC_NOROOT = -1,
740 CLK_SRC_PLL0 = 0,
741 CLK_SRC_PLL1,
742 CLK_SRC_PLL0DIV,
743 CLK_SRC_PLL1DIV,
744 CLK_SRC_XI,
745 CLK_SRC_XIDIV,
746 CLK_SRC_XTI,
747 CLK_SRC_XTIDIV,
748 CLK_SRC_PLL2,
749 CLK_SRC_PLL2DIV,
750 CLK_SRC_PK0,
751 CLK_SRC_PK1,
752 CLK_SRC_PK2,
753 CLK_SRC_PK3,
754 CLK_SRC_PK4,
755 CLK_SRC_48MHZ
756};
757
758#define CLK_SRC_MASK 0xf
759
760/* Bits in ACLK* registers */
761#define ACLK_EN (1 << 28)
762#define ACLK_SEL_SHIFT 24
763#define ACLK_SEL_MASK 0x0f000000
764#define ACLK_DIV_MASK 0x00000fff
765
766/* System configuration registers */
767
768#define SCFG_BASE (APB1_PERI_BASE_VIRT + 0x13000)
769
770#define BMI_OFFS 0x00
771#define AHBCON0_OFFS 0x04
772#define APBPWE_OFFS 0x08
773#define DTCMWAIT_OFFS 0x0c
774#define ECCSEL_OFFS 0x10
775#define AHBCON1_OFFS 0x14
776#define SDHCFG_OFFS 0x18
777#define REMAP_OFFS 0x20
778#define LCDSIAE_OFFS 0x24
779#define XMCCFG_OFFS 0xe0
780#define IMCCFG_OFFS 0xe4
781
782/* Values for ECCSEL */
783#define ECCSEL_EXTMEM 0x0
784#define ECCSEL_DTCM 0x1
785#define ECCSEL_INT_SRAM 0x2
786#define ECCSEL_AHB 0x3
787
788/* Bits in XMCCFG */
789#define XMCCFG_NFCE (1 << 1)
790#define XMCCFG_FDXD (1 << 2)
791
792/* External memory controller registers */
793
794#define EMC_BASE EXT_MEM_CTRL_BASE
795
796#define SDCFG_OFFS 0x00
797#define SDFSM_OFFS 0x04
798#define MCFG_OFFS 0x08
799
800#define CSCFG0_OFFS 0x10
801#define CSCFG1_OFFS 0x14
802#define CSCFG2_OFFS 0x18
803#define CSCFG3_OFFS 0x1c
804
805#define MCFG_SDEN (1 << 4)
806
807#endif /* TCC8K_REGS_H */
diff --git a/arch/arm/plat-tcc/include/mach/timex.h b/arch/arm/plat-tcc/include/mach/timex.h
deleted file mode 100644
index 057acbe651d..00000000000
--- a/arch/arm/plat-tcc/include/mach/timex.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * A definition needed by arch core code.
3 *
4 */
5#define CLOCK_TICK_RATE (HZ * 100000UL)
diff --git a/arch/arm/plat-tcc/include/mach/uncompress.h b/arch/arm/plat-tcc/include/mach/uncompress.h
deleted file mode 100644
index 7a3e33a27a3..00000000000
--- a/arch/arm/plat-tcc/include/mach/uncompress.h
+++ /dev/null
@@ -1,34 +0,0 @@
1/*
2 * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
3 *
4 * This file is licensed under the terms of the GPL version 2.
5 */
6
7#include <linux/serial_reg.h>
8#include <linux/types.h>
9
10#include <mach/tcc8k-regs.h>
11
12unsigned int system_rev;
13
14#define ID_MASK 0x7fff
15
16static void putc(int c)
17{
18 u32 *uart_lsr = (u32 *)(UART_BASE_PHYS + (UART_LSR << 2));
19 u32 *uart_tx = (u32 *)(UART_BASE_PHYS + (UART_TX << 2));
20
21 while (!(*uart_lsr & UART_LSR_THRE))
22 barrier();
23 *uart_tx = c;
24}
25
26static inline void flush(void)
27{
28}
29
30/*
31 * nothing to do
32 */
33#define arch_decomp_setup()
34#define arch_decomp_wdog()
diff --git a/arch/arm/plat-tcc/include/mach/vmalloc.h b/arch/arm/plat-tcc/include/mach/vmalloc.h
deleted file mode 100644
index 99414d9c2b9..00000000000
--- a/arch/arm/plat-tcc/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
1/*
2 * Author: <linux@telechips.com>
3 * Created: June 10, 2008
4 *
5 * Copyright (C) 2000 Russell King.
6 * Copyright (C) 2008-2009 Telechips
7 *
8 * Licensed under the terms of the GPL v2.
9 */
10#define VMALLOC_END 0xf0000000UL
diff --git a/arch/arm/plat-tcc/system.c b/arch/arm/plat-tcc/system.c
deleted file mode 100644
index cc208fae3e7..00000000000
--- a/arch/arm/plat-tcc/system.c
+++ /dev/null
@@ -1,25 +0,0 @@
1/*
2 * System functions for Telechips TCCxxxx SoCs
3 *
4 * Copyright (C) Hans J. Koch <hjk@linutronix.de>
5 *
6 * Licensed under the terms of the GPL v2.
7 *
8 */
9
10#include <linux/io.h>
11
12#include <mach/tcc8k-regs.h>
13
14/* System reboot */
15void plat_tcc_reboot(void)
16{
17 /* Make sure clocks are on */
18 __raw_writel(0xffffffff, CKC_BASE + BCLKCTR0_OFFS);
19
20 /* Enable watchdog reset */
21 __raw_writel(0x49, TIMER_BASE + TWDCFG_OFFS);
22 /* Wait for reset */
23 while(1)
24 ;
25}
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 5bdeef96984..ccbe16f4722 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -1123,5 +1123,6 @@ blissc MACH_BLISSC BLISSC 3491
1123thales_adc MACH_THALES_ADC THALES_ADC 3492 1123thales_adc MACH_THALES_ADC THALES_ADC 3492
1124ubisys_p9d_evp MACH_UBISYS_P9D_EVP UBISYS_P9D_EVP 3493 1124ubisys_p9d_evp MACH_UBISYS_P9D_EVP UBISYS_P9D_EVP 3493
1125atdgp318 MACH_ATDGP318 ATDGP318 3494 1125atdgp318 MACH_ATDGP318 ATDGP318 3494
1126m28evk MACH_M28EVK M28EVK 3613
1126smdk4212 MACH_SMDK4212 SMDK4212 3638 1127smdk4212 MACH_SMDK4212 SMDK4212 3638
1127smdk4412 MACH_SMDK4412 SMDK4412 3765 1128smdk4412 MACH_SMDK4412 SMDK4412 3765
diff --git a/arch/blackfin/include/asm/bfin_serial.h b/arch/blackfin/include/asm/bfin_serial.h
index 7fd0ec7b5b0..ecacdf34768 100644
--- a/arch/blackfin/include/asm/bfin_serial.h
+++ b/arch/blackfin/include/asm/bfin_serial.h
@@ -32,6 +32,8 @@ struct work_struct;
32struct bfin_serial_port { 32struct bfin_serial_port {
33 struct uart_port port; 33 struct uart_port port;
34 unsigned int old_status; 34 unsigned int old_status;
35 int tx_irq;
36 int rx_irq;
35 int status_irq; 37 int status_irq;
36#ifndef BFIN_UART_BF54X_STYLE 38#ifndef BFIN_UART_BF54X_STYLE
37 unsigned int lsr; 39 unsigned int lsr;
diff --git a/arch/blackfin/mach-bf518/boards/ezbrd.c b/arch/blackfin/mach-bf518/boards/ezbrd.c
index 1082e49f7a9..d1c0c0cff3e 100644
--- a/arch/blackfin/mach-bf518/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf518/boards/ezbrd.c
@@ -373,8 +373,13 @@ static struct resource bfin_uart0_resources[] = {
373 .flags = IORESOURCE_MEM, 373 .flags = IORESOURCE_MEM,
374 }, 374 },
375 { 375 {
376 .start = IRQ_UART0_TX,
377 .end = IRQ_UART0_TX,
378 .flags = IORESOURCE_IRQ,
379 },
380 {
376 .start = IRQ_UART0_RX, 381 .start = IRQ_UART0_RX,
377 .end = IRQ_UART0_RX+1, 382 .end = IRQ_UART0_RX,
378 .flags = IORESOURCE_IRQ, 383 .flags = IORESOURCE_IRQ,
379 }, 384 },
380 { 385 {
@@ -416,8 +421,13 @@ static struct resource bfin_uart1_resources[] = {
416 .flags = IORESOURCE_MEM, 421 .flags = IORESOURCE_MEM,
417 }, 422 },
418 { 423 {
424 .start = IRQ_UART1_TX,
425 .end = IRQ_UART1_TX,
426 .flags = IORESOURCE_IRQ,
427 },
428 {
419 .start = IRQ_UART1_RX, 429 .start = IRQ_UART1_RX,
420 .end = IRQ_UART1_RX+1, 430 .end = IRQ_UART1_RX,
421 .flags = IORESOURCE_IRQ, 431 .flags = IORESOURCE_IRQ,
422 }, 432 },
423 { 433 {
diff --git a/arch/blackfin/mach-bf518/boards/tcm-bf518.c b/arch/blackfin/mach-bf518/boards/tcm-bf518.c
index 55c12790881..5470bf89e52 100644
--- a/arch/blackfin/mach-bf518/boards/tcm-bf518.c
+++ b/arch/blackfin/mach-bf518/boards/tcm-bf518.c
@@ -309,8 +309,13 @@ static struct resource bfin_uart0_resources[] = {
309 .flags = IORESOURCE_MEM, 309 .flags = IORESOURCE_MEM,
310 }, 310 },
311 { 311 {
312 .start = IRQ_UART0_TX,
313 .end = IRQ_UART0_TX,
314 .flags = IORESOURCE_IRQ,
315 },
316 {
312 .start = IRQ_UART0_RX, 317 .start = IRQ_UART0_RX,
313 .end = IRQ_UART0_RX+1, 318 .end = IRQ_UART0_RX,
314 .flags = IORESOURCE_IRQ, 319 .flags = IORESOURCE_IRQ,
315 }, 320 },
316 { 321 {
@@ -352,8 +357,13 @@ static struct resource bfin_uart1_resources[] = {
352 .flags = IORESOURCE_MEM, 357 .flags = IORESOURCE_MEM,
353 }, 358 },
354 { 359 {
360 .start = IRQ_UART1_TX,
361 .end = IRQ_UART1_TX,
362 .flags = IORESOURCE_IRQ,
363 },
364 {
355 .start = IRQ_UART1_RX, 365 .start = IRQ_UART1_RX,
356 .end = IRQ_UART1_RX+1, 366 .end = IRQ_UART1_RX,
357 .flags = IORESOURCE_IRQ, 367 .flags = IORESOURCE_IRQ,
358 }, 368 },
359 { 369 {
diff --git a/arch/blackfin/mach-bf527/boards/ad7160eval.c b/arch/blackfin/mach-bf527/boards/ad7160eval.c
index 8d65d476f11..5bc6938157a 100644
--- a/arch/blackfin/mach-bf527/boards/ad7160eval.c
+++ b/arch/blackfin/mach-bf527/boards/ad7160eval.c
@@ -381,8 +381,13 @@ static struct resource bfin_uart0_resources[] = {
381 .flags = IORESOURCE_MEM, 381 .flags = IORESOURCE_MEM,
382 }, 382 },
383 { 383 {
384 .start = IRQ_UART0_TX,
385 .end = IRQ_UART0_TX,
386 .flags = IORESOURCE_IRQ,
387 },
388 {
384 .start = IRQ_UART0_RX, 389 .start = IRQ_UART0_RX,
385 .end = IRQ_UART0_RX+1, 390 .end = IRQ_UART0_RX,
386 .flags = IORESOURCE_IRQ, 391 .flags = IORESOURCE_IRQ,
387 }, 392 },
388 { 393 {
@@ -424,8 +429,13 @@ static struct resource bfin_uart1_resources[] = {
424 .flags = IORESOURCE_MEM, 429 .flags = IORESOURCE_MEM,
425 }, 430 },
426 { 431 {
432 .start = IRQ_UART1_TX,
433 .end = IRQ_UART1_TX,
434 .flags = IORESOURCE_IRQ,
435 },
436 {
427 .start = IRQ_UART1_RX, 437 .start = IRQ_UART1_RX,
428 .end = IRQ_UART1_RX+1, 438 .end = IRQ_UART1_RX,
429 .flags = IORESOURCE_IRQ, 439 .flags = IORESOURCE_IRQ,
430 }, 440 },
431 { 441 {
diff --git a/arch/blackfin/mach-bf527/boards/cm_bf527.c b/arch/blackfin/mach-bf527/boards/cm_bf527.c
index 6410fc1af8e..cd289698b4d 100644
--- a/arch/blackfin/mach-bf527/boards/cm_bf527.c
+++ b/arch/blackfin/mach-bf527/boards/cm_bf527.c
@@ -8,6 +8,7 @@
8 */ 8 */
9 9
10#include <linux/device.h> 10#include <linux/device.h>
11#include <linux/export.h>
11#include <linux/platform_device.h> 12#include <linux/platform_device.h>
12#include <linux/mtd/mtd.h> 13#include <linux/mtd/mtd.h>
13#include <linux/mtd/partitions.h> 14#include <linux/mtd/partitions.h>
@@ -539,8 +540,13 @@ static struct resource bfin_uart0_resources[] = {
539 .flags = IORESOURCE_MEM, 540 .flags = IORESOURCE_MEM,
540 }, 541 },
541 { 542 {
543 .start = IRQ_UART0_TX,
544 .end = IRQ_UART0_TX,
545 .flags = IORESOURCE_IRQ,
546 },
547 {
542 .start = IRQ_UART0_RX, 548 .start = IRQ_UART0_RX,
543 .end = IRQ_UART0_RX+1, 549 .end = IRQ_UART0_RX,
544 .flags = IORESOURCE_IRQ, 550 .flags = IORESOURCE_IRQ,
545 }, 551 },
546 { 552 {
@@ -582,8 +588,13 @@ static struct resource bfin_uart1_resources[] = {
582 .flags = IORESOURCE_MEM, 588 .flags = IORESOURCE_MEM,
583 }, 589 },
584 { 590 {
591 .start = IRQ_UART1_TX,
592 .end = IRQ_UART1_TX,
593 .flags = IORESOURCE_IRQ,
594 },
595 {
585 .start = IRQ_UART1_RX, 596 .start = IRQ_UART1_RX,
586 .end = IRQ_UART1_RX+1, 597 .end = IRQ_UART1_RX,
587 .flags = IORESOURCE_IRQ, 598 .flags = IORESOURCE_IRQ,
588 }, 599 },
589 { 600 {
@@ -801,7 +812,6 @@ static struct platform_device bfin_sport1_uart_device = {
801#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 812#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
802#include <linux/input.h> 813#include <linux/input.h>
803#include <linux/gpio_keys.h> 814#include <linux/gpio_keys.h>
804#include <linux/export.h>
805 815
806static struct gpio_keys_button bfin_gpio_keys_table[] = { 816static struct gpio_keys_button bfin_gpio_keys_table[] = {
807 {BTN_0, GPIO_PF14, 1, "gpio-keys: BTN0"}, 817 {BTN_0, GPIO_PF14, 1, "gpio-keys: BTN0"},
diff --git a/arch/blackfin/mach-bf527/boards/ezbrd.c b/arch/blackfin/mach-bf527/boards/ezbrd.c
index 64f7278aba5..9f792eafd1c 100644
--- a/arch/blackfin/mach-bf527/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf527/boards/ezbrd.c
@@ -7,6 +7,7 @@
7 */ 7 */
8 8
9#include <linux/device.h> 9#include <linux/device.h>
10#include <linux/export.h>
10#include <linux/platform_device.h> 11#include <linux/platform_device.h>
11#include <linux/mtd/mtd.h> 12#include <linux/mtd/mtd.h>
12#include <linux/mtd/partitions.h> 13#include <linux/mtd/partitions.h>
@@ -417,8 +418,13 @@ static struct resource bfin_uart0_resources[] = {
417 .flags = IORESOURCE_MEM, 418 .flags = IORESOURCE_MEM,
418 }, 419 },
419 { 420 {
421 .start = IRQ_UART0_TX,
422 .end = IRQ_UART0_TX,
423 .flags = IORESOURCE_IRQ,
424 },
425 {
420 .start = IRQ_UART0_RX, 426 .start = IRQ_UART0_RX,
421 .end = IRQ_UART0_RX+1, 427 .end = IRQ_UART0_RX,
422 .flags = IORESOURCE_IRQ, 428 .flags = IORESOURCE_IRQ,
423 }, 429 },
424 { 430 {
@@ -460,8 +466,13 @@ static struct resource bfin_uart1_resources[] = {
460 .flags = IORESOURCE_MEM, 466 .flags = IORESOURCE_MEM,
461 }, 467 },
462 { 468 {
469 .start = IRQ_UART1_TX,
470 .end = IRQ_UART1_TX,
471 .flags = IORESOURCE_IRQ,
472 },
473 {
463 .start = IRQ_UART1_RX, 474 .start = IRQ_UART1_RX,
464 .end = IRQ_UART1_RX+1, 475 .end = IRQ_UART1_RX,
465 .flags = IORESOURCE_IRQ, 476 .flags = IORESOURCE_IRQ,
466 }, 477 },
467 { 478 {
@@ -674,7 +685,6 @@ static struct platform_device bfin_sport1_uart_device = {
674#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 685#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
675#include <linux/input.h> 686#include <linux/input.h>
676#include <linux/gpio_keys.h> 687#include <linux/gpio_keys.h>
677#include <linux/export.h>
678 688
679static struct gpio_keys_button bfin_gpio_keys_table[] = { 689static struct gpio_keys_button bfin_gpio_keys_table[] = {
680 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"}, 690 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index e4c6a122b66..3ecafff5d2e 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -711,8 +711,13 @@ static struct resource bfin_uart0_resources[] = {
711 .flags = IORESOURCE_MEM, 711 .flags = IORESOURCE_MEM,
712 }, 712 },
713 { 713 {
714 .start = IRQ_UART0_TX,
715 .end = IRQ_UART0_TX,
716 .flags = IORESOURCE_IRQ,
717 },
718 {
714 .start = IRQ_UART0_RX, 719 .start = IRQ_UART0_RX,
715 .end = IRQ_UART0_RX+1, 720 .end = IRQ_UART0_RX,
716 .flags = IORESOURCE_IRQ, 721 .flags = IORESOURCE_IRQ,
717 }, 722 },
718 { 723 {
@@ -754,8 +759,13 @@ static struct resource bfin_uart1_resources[] = {
754 .flags = IORESOURCE_MEM, 759 .flags = IORESOURCE_MEM,
755 }, 760 },
756 { 761 {
762 .start = IRQ_UART1_TX,
763 .end = IRQ_UART1_TX,
764 .flags = IORESOURCE_IRQ,
765 },
766 {
757 .start = IRQ_UART1_RX, 767 .start = IRQ_UART1_RX,
758 .end = IRQ_UART1_RX+1, 768 .end = IRQ_UART1_RX,
759 .flags = IORESOURCE_IRQ, 769 .flags = IORESOURCE_IRQ,
760 }, 770 },
761 { 771 {
diff --git a/arch/blackfin/mach-bf527/boards/tll6527m.c b/arch/blackfin/mach-bf527/boards/tll6527m.c
index 76dbc03a8d4..3a92c4318d2 100644
--- a/arch/blackfin/mach-bf527/boards/tll6527m.c
+++ b/arch/blackfin/mach-bf527/boards/tll6527m.c
@@ -496,8 +496,13 @@ static struct resource bfin_uart0_resources[] = {
496 .flags = IORESOURCE_MEM, 496 .flags = IORESOURCE_MEM,
497 }, 497 },
498 { 498 {
499 .start = IRQ_UART0_TX,
500 .end = IRQ_UART0_TX,
501 .flags = IORESOURCE_IRQ,
502 },
503 {
499 .start = IRQ_UART0_RX, 504 .start = IRQ_UART0_RX,
500 .end = IRQ_UART0_RX+1, 505 .end = IRQ_UART0_RX,
501 .flags = IORESOURCE_IRQ, 506 .flags = IORESOURCE_IRQ,
502 }, 507 },
503 { 508 {
@@ -540,8 +545,13 @@ static struct resource bfin_uart1_resources[] = {
540 .flags = IORESOURCE_MEM, 545 .flags = IORESOURCE_MEM,
541 }, 546 },
542 { 547 {
548 .start = IRQ_UART1_TX,
549 .end = IRQ_UART1_TX,
550 .flags = IORESOURCE_IRQ,
551 },
552 {
543 .start = IRQ_UART1_RX, 553 .start = IRQ_UART1_RX,
544 .end = IRQ_UART1_RX+1, 554 .end = IRQ_UART1_RX,
545 .flags = IORESOURCE_IRQ, 555 .flags = IORESOURCE_IRQ,
546 }, 556 },
547 { 557 {
diff --git a/arch/blackfin/mach-bf533/boards/H8606.c b/arch/blackfin/mach-bf533/boards/H8606.c
index 5da5787fc4e..47cadd316e7 100644
--- a/arch/blackfin/mach-bf533/boards/H8606.c
+++ b/arch/blackfin/mach-bf533/boards/H8606.c
@@ -238,8 +238,13 @@ static struct resource bfin_uart0_resources[] = {
238 .flags = IORESOURCE_MEM, 238 .flags = IORESOURCE_MEM,
239 }, 239 },
240 { 240 {
241 .start = IRQ_UART0_TX,
242 .end = IRQ_UART0_TX,
243 .flags = IORESOURCE_IRQ,
244 },
245 {
241 .start = IRQ_UART0_RX, 246 .start = IRQ_UART0_RX,
242 .end = IRQ_UART0_RX + 1, 247 .end = IRQ_UART0_RX,
243 .flags = IORESOURCE_IRQ, 248 .flags = IORESOURCE_IRQ,
244 }, 249 },
245 { 250 {
diff --git a/arch/blackfin/mach-bf533/boards/blackstamp.c b/arch/blackfin/mach-bf533/boards/blackstamp.c
index b0ec825fb4e..18817d57c7a 100644
--- a/arch/blackfin/mach-bf533/boards/blackstamp.c
+++ b/arch/blackfin/mach-bf533/boards/blackstamp.c
@@ -193,8 +193,13 @@ static struct resource bfin_uart0_resources[] = {
193 .flags = IORESOURCE_MEM, 193 .flags = IORESOURCE_MEM,
194 }, 194 },
195 { 195 {
196 .start = IRQ_UART0_TX,
197 .end = IRQ_UART0_TX,
198 .flags = IORESOURCE_IRQ,
199 },
200 {
196 .start = IRQ_UART0_RX, 201 .start = IRQ_UART0_RX,
197 .end = IRQ_UART0_RX + 1, 202 .end = IRQ_UART0_RX,
198 .flags = IORESOURCE_IRQ, 203 .flags = IORESOURCE_IRQ,
199 }, 204 },
200 { 205 {
diff --git a/arch/blackfin/mach-bf533/boards/cm_bf533.c b/arch/blackfin/mach-bf533/boards/cm_bf533.c
index 14f54a31e74..2c8f30ef6a7 100644
--- a/arch/blackfin/mach-bf533/boards/cm_bf533.c
+++ b/arch/blackfin/mach-bf533/boards/cm_bf533.c
@@ -221,8 +221,13 @@ static struct resource bfin_uart0_resources[] = {
221 .flags = IORESOURCE_MEM, 221 .flags = IORESOURCE_MEM,
222 }, 222 },
223 { 223 {
224 .start = IRQ_UART0_TX,
225 .end = IRQ_UART0_TX,
226 .flags = IORESOURCE_IRQ,
227 },
228 {
224 .start = IRQ_UART0_RX, 229 .start = IRQ_UART0_RX,
225 .end = IRQ_UART0_RX + 1, 230 .end = IRQ_UART0_RX,
226 .flags = IORESOURCE_IRQ, 231 .flags = IORESOURCE_IRQ,
227 }, 232 },
228 { 233 {
diff --git a/arch/blackfin/mach-bf533/boards/ezkit.c b/arch/blackfin/mach-bf533/boards/ezkit.c
index ecd2801f050..144556e1449 100644
--- a/arch/blackfin/mach-bf533/boards/ezkit.c
+++ b/arch/blackfin/mach-bf533/boards/ezkit.c
@@ -292,8 +292,13 @@ static struct resource bfin_uart0_resources[] = {
292 .flags = IORESOURCE_MEM, 292 .flags = IORESOURCE_MEM,
293 }, 293 },
294 { 294 {
295 .start = IRQ_UART0_TX,
296 .end = IRQ_UART0_TX,
297 .flags = IORESOURCE_IRQ,
298 },
299 {
295 .start = IRQ_UART0_RX, 300 .start = IRQ_UART0_RX,
296 .end = IRQ_UART0_RX + 1, 301 .end = IRQ_UART0_RX,
297 .flags = IORESOURCE_IRQ, 302 .flags = IORESOURCE_IRQ,
298 }, 303 },
299 { 304 {
diff --git a/arch/blackfin/mach-bf533/boards/ip0x.c b/arch/blackfin/mach-bf533/boards/ip0x.c
index fbee77fa921..b597d4e50d5 100644
--- a/arch/blackfin/mach-bf533/boards/ip0x.c
+++ b/arch/blackfin/mach-bf533/boards/ip0x.c
@@ -151,8 +151,13 @@ static struct resource bfin_uart0_resources[] = {
151 .flags = IORESOURCE_MEM, 151 .flags = IORESOURCE_MEM,
152 }, 152 },
153 { 153 {
154 .start = IRQ_UART0_TX,
155 .end = IRQ_UART0_TX,
156 .flags = IORESOURCE_IRQ,
157 },
158 {
154 .start = IRQ_UART0_RX, 159 .start = IRQ_UART0_RX,
155 .end = IRQ_UART0_RX + 1, 160 .end = IRQ_UART0_RX,
156 .flags = IORESOURCE_IRQ, 161 .flags = IORESOURCE_IRQ,
157 }, 162 },
158 { 163 {
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c
index 964a8e5f79b..2afd02e14bd 100644
--- a/arch/blackfin/mach-bf533/boards/stamp.c
+++ b/arch/blackfin/mach-bf533/boards/stamp.c
@@ -298,8 +298,13 @@ static struct resource bfin_uart0_resources[] = {
298 .flags = IORESOURCE_MEM, 298 .flags = IORESOURCE_MEM,
299 }, 299 },
300 { 300 {
301 .start = IRQ_UART0_TX,
302 .end = IRQ_UART0_TX,
303 .flags = IORESOURCE_IRQ,
304 },
305 {
301 .start = IRQ_UART0_RX, 306 .start = IRQ_UART0_RX,
302 .end = IRQ_UART0_RX + 1, 307 .end = IRQ_UART0_RX,
303 .flags = IORESOURCE_IRQ, 308 .flags = IORESOURCE_IRQ,
304 }, 309 },
305 { 310 {
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537e.c b/arch/blackfin/mach-bf537/boards/cm_bf537e.c
index 1471c51ea69..604a430038e 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537e.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537e.c
@@ -8,6 +8,7 @@
8 */ 8 */
9 9
10#include <linux/device.h> 10#include <linux/device.h>
11#include <linux/export.h>
11#include <linux/etherdevice.h> 12#include <linux/etherdevice.h>
12#include <linux/platform_device.h> 13#include <linux/platform_device.h>
13#include <linux/mtd/mtd.h> 14#include <linux/mtd/mtd.h>
@@ -305,8 +306,13 @@ static struct resource bfin_uart0_resources[] = {
305 .flags = IORESOURCE_MEM, 306 .flags = IORESOURCE_MEM,
306 }, 307 },
307 { 308 {
309 .start = IRQ_UART0_TX,
310 .end = IRQ_UART0_TX,
311 .flags = IORESOURCE_IRQ,
312 },
313 {
308 .start = IRQ_UART0_RX, 314 .start = IRQ_UART0_RX,
309 .end = IRQ_UART0_RX+1, 315 .end = IRQ_UART0_RX,
310 .flags = IORESOURCE_IRQ, 316 .flags = IORESOURCE_IRQ,
311 }, 317 },
312 { 318 {
@@ -366,8 +372,13 @@ static struct resource bfin_uart1_resources[] = {
366 .flags = IORESOURCE_MEM, 372 .flags = IORESOURCE_MEM,
367 }, 373 },
368 { 374 {
375 .start = IRQ_UART1_TX,
376 .end = IRQ_UART1_TX,
377 .flags = IORESOURCE_IRQ,
378 },
379 {
369 .start = IRQ_UART1_RX, 380 .start = IRQ_UART1_RX,
370 .end = IRQ_UART1_RX+1, 381 .end = IRQ_UART1_RX,
371 .flags = IORESOURCE_IRQ, 382 .flags = IORESOURCE_IRQ,
372 }, 383 },
373 { 384 {
@@ -569,7 +580,6 @@ static struct platform_device bfin_sport1_uart_device = {
569 580
570#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) 581#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
571#include <linux/bfin_mac.h> 582#include <linux/bfin_mac.h>
572#include <linux/export.h>
573static const unsigned short bfin_mac_peripherals[] = P_MII0; 583static const unsigned short bfin_mac_peripherals[] = P_MII0;
574 584
575static struct bfin_phydev_platform_data bfin_phydev_data[] = { 585static struct bfin_phydev_platform_data bfin_phydev_data[] = {
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537u.c b/arch/blackfin/mach-bf537/boards/cm_bf537u.c
index 47cf37de33b..d916b46a44f 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537u.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537u.c
@@ -9,6 +9,7 @@
9 9
10#include <linux/device.h> 10#include <linux/device.h>
11#include <linux/etherdevice.h> 11#include <linux/etherdevice.h>
12#include <linux/export.h>
12#include <linux/platform_device.h> 13#include <linux/platform_device.h>
13#include <linux/mtd/mtd.h> 14#include <linux/mtd/mtd.h>
14#include <linux/mtd/partitions.h> 15#include <linux/mtd/partitions.h>
@@ -306,8 +307,13 @@ static struct resource bfin_uart0_resources[] = {
306 .flags = IORESOURCE_MEM, 307 .flags = IORESOURCE_MEM,
307 }, 308 },
308 { 309 {
310 .start = IRQ_UART0_TX,
311 .end = IRQ_UART0_TX,
312 .flags = IORESOURCE_IRQ,
313 },
314 {
309 .start = IRQ_UART0_RX, 315 .start = IRQ_UART0_RX,
310 .end = IRQ_UART0_RX+1, 316 .end = IRQ_UART0_RX,
311 .flags = IORESOURCE_IRQ, 317 .flags = IORESOURCE_IRQ,
312 }, 318 },
313 { 319 {
@@ -349,8 +355,13 @@ static struct resource bfin_uart1_resources[] = {
349 .flags = IORESOURCE_MEM, 355 .flags = IORESOURCE_MEM,
350 }, 356 },
351 { 357 {
358 .start = IRQ_UART1_TX,
359 .end = IRQ_UART1_TX,
360 .flags = IORESOURCE_IRQ,
361 },
362 {
352 .start = IRQ_UART1_RX, 363 .start = IRQ_UART1_RX,
353 .end = IRQ_UART1_RX+1, 364 .end = IRQ_UART1_RX,
354 .flags = IORESOURCE_IRQ, 365 .flags = IORESOURCE_IRQ,
355 }, 366 },
356 { 367 {
@@ -534,7 +545,6 @@ static struct platform_device bfin_sport1_uart_device = {
534 545
535#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) 546#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
536#include <linux/bfin_mac.h> 547#include <linux/bfin_mac.h>
537#include <linux/export.h>
538static const unsigned short bfin_mac_peripherals[] = P_MII0; 548static const unsigned short bfin_mac_peripherals[] = P_MII0;
539 549
540static struct bfin_phydev_platform_data bfin_phydev_data[] = { 550static struct bfin_phydev_platform_data bfin_phydev_data[] = {
diff --git a/arch/blackfin/mach-bf537/boards/dnp5370.c b/arch/blackfin/mach-bf537/boards/dnp5370.c
index 33e69e427e9..5f307228be6 100644
--- a/arch/blackfin/mach-bf537/boards/dnp5370.c
+++ b/arch/blackfin/mach-bf537/boards/dnp5370.c
@@ -12,6 +12,7 @@
12 */ 12 */
13 13
14#include <linux/device.h> 14#include <linux/device.h>
15#include <linux/export.h>
15#include <linux/kernel.h> 16#include <linux/kernel.h>
16#include <linux/platform_device.h> 17#include <linux/platform_device.h>
17#include <linux/io.h> 18#include <linux/io.h>
@@ -49,7 +50,6 @@ static struct platform_device rtc_device = {
49 50
50#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) 51#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
51#include <linux/bfin_mac.h> 52#include <linux/bfin_mac.h>
52#include <linux/export.h>
53static const unsigned short bfin_mac_peripherals[] = P_RMII0; 53static const unsigned short bfin_mac_peripherals[] = P_RMII0;
54 54
55static struct bfin_phydev_platform_data bfin_phydev_data[] = { 55static struct bfin_phydev_platform_data bfin_phydev_data[] = {
@@ -237,8 +237,13 @@ static struct resource bfin_uart0_resources[] = {
237 .flags = IORESOURCE_MEM, 237 .flags = IORESOURCE_MEM,
238 }, 238 },
239 { 239 {
240 .start = IRQ_UART0_TX,
241 .end = IRQ_UART0_TX,
242 .flags = IORESOURCE_IRQ,
243 },
244 {
240 .start = IRQ_UART0_RX, 245 .start = IRQ_UART0_RX,
241 .end = IRQ_UART0_RX+1, 246 .end = IRQ_UART0_RX,
242 .flags = IORESOURCE_IRQ, 247 .flags = IORESOURCE_IRQ,
243 }, 248 },
244 { 249 {
@@ -281,8 +286,13 @@ static struct resource bfin_uart1_resources[] = {
281 .flags = IORESOURCE_MEM, 286 .flags = IORESOURCE_MEM,
282 }, 287 },
283 { 288 {
289 .start = IRQ_UART1_TX,
290 .end = IRQ_UART1_TX,
291 .flags = IORESOURCE_IRQ,
292 },
293 {
284 .start = IRQ_UART1_RX, 294 .start = IRQ_UART1_RX,
285 .end = IRQ_UART1_RX+1, 295 .end = IRQ_UART1_RX,
286 .flags = IORESOURCE_IRQ, 296 .flags = IORESOURCE_IRQ,
287 }, 297 },
288 { 298 {
diff --git a/arch/blackfin/mach-bf537/boards/minotaur.c b/arch/blackfin/mach-bf537/boards/minotaur.c
index c62f9dccd9f..3901dd093b9 100644
--- a/arch/blackfin/mach-bf537/boards/minotaur.c
+++ b/arch/blackfin/mach-bf537/boards/minotaur.c
@@ -240,8 +240,13 @@ static struct resource bfin_uart0_resources[] = {
240 .flags = IORESOURCE_MEM, 240 .flags = IORESOURCE_MEM,
241 }, 241 },
242 { 242 {
243 .start = IRQ_UART0_TX,
244 .end = IRQ_UART0_TX,
245 .flags = IORESOURCE_IRQ,
246 },
247 {
243 .start = IRQ_UART0_RX, 248 .start = IRQ_UART0_RX,
244 .end = IRQ_UART0_RX+1, 249 .end = IRQ_UART0_RX,
245 .flags = IORESOURCE_IRQ, 250 .flags = IORESOURCE_IRQ,
246 }, 251 },
247 { 252 {
@@ -283,8 +288,13 @@ static struct resource bfin_uart1_resources[] = {
283 .flags = IORESOURCE_MEM, 288 .flags = IORESOURCE_MEM,
284 }, 289 },
285 { 290 {
291 .start = IRQ_UART1_TX,
292 .end = IRQ_UART1_TX,
293 .flags = IORESOURCE_IRQ,
294 },
295 {
286 .start = IRQ_UART1_RX, 296 .start = IRQ_UART1_RX,
287 .end = IRQ_UART1_RX+1, 297 .end = IRQ_UART1_RX,
288 .flags = IORESOURCE_IRQ, 298 .flags = IORESOURCE_IRQ,
289 }, 299 },
290 { 300 {
diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c
index 3099e91114f..aebd31c845f 100644
--- a/arch/blackfin/mach-bf537/boards/pnav10.c
+++ b/arch/blackfin/mach-bf537/boards/pnav10.c
@@ -8,6 +8,7 @@
8 8
9#include <linux/device.h> 9#include <linux/device.h>
10#include <linux/etherdevice.h> 10#include <linux/etherdevice.h>
11#include <linux/export.h>
11#include <linux/platform_device.h> 12#include <linux/platform_device.h>
12#include <linux/mtd/mtd.h> 13#include <linux/mtd/mtd.h>
13#include <linux/mtd/partitions.h> 14#include <linux/mtd/partitions.h>
@@ -309,8 +310,13 @@ static struct resource bfin_uart0_resources[] = {
309 .flags = IORESOURCE_MEM, 310 .flags = IORESOURCE_MEM,
310 }, 311 },
311 { 312 {
313 .start = IRQ_UART0_TX,
314 .end = IRQ_UART0_TX,
315 .flags = IORESOURCE_IRQ,
316 },
317 {
312 .start = IRQ_UART0_RX, 318 .start = IRQ_UART0_RX,
313 .end = IRQ_UART0_RX+1, 319 .end = IRQ_UART0_RX,
314 .flags = IORESOURCE_IRQ, 320 .flags = IORESOURCE_IRQ,
315 }, 321 },
316 { 322 {
@@ -352,8 +358,13 @@ static struct resource bfin_uart1_resources[] = {
352 .flags = IORESOURCE_MEM, 358 .flags = IORESOURCE_MEM,
353 }, 359 },
354 { 360 {
361 .start = IRQ_UART1_TX,
362 .end = IRQ_UART1_TX,
363 .flags = IORESOURCE_IRQ,
364 },
365 {
355 .start = IRQ_UART1_RX, 366 .start = IRQ_UART1_RX,
356 .end = IRQ_UART1_RX+1, 367 .end = IRQ_UART1_RX,
357 .flags = IORESOURCE_IRQ, 368 .flags = IORESOURCE_IRQ,
358 }, 369 },
359 { 370 {
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index 27f955db997..7fbb0bbf867 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -7,6 +7,7 @@
7 */ 7 */
8 8
9#include <linux/device.h> 9#include <linux/device.h>
10#include <linux/export.h>
10#include <linux/kernel.h> 11#include <linux/kernel.h>
11#include <linux/platform_device.h> 12#include <linux/platform_device.h>
12#include <linux/io.h> 13#include <linux/io.h>
@@ -1566,8 +1567,13 @@ static struct resource bfin_uart0_resources[] = {
1566 .flags = IORESOURCE_MEM, 1567 .flags = IORESOURCE_MEM,
1567 }, 1568 },
1568 { 1569 {
1570 .start = IRQ_UART0_TX,
1571 .end = IRQ_UART0_TX,
1572 .flags = IORESOURCE_IRQ,
1573 },
1574 {
1569 .start = IRQ_UART0_RX, 1575 .start = IRQ_UART0_RX,
1570 .end = IRQ_UART0_RX+1, 1576 .end = IRQ_UART0_RX,
1571 .flags = IORESOURCE_IRQ, 1577 .flags = IORESOURCE_IRQ,
1572 }, 1578 },
1573 { 1579 {
@@ -1621,8 +1627,13 @@ static struct resource bfin_uart1_resources[] = {
1621 .flags = IORESOURCE_MEM, 1627 .flags = IORESOURCE_MEM,
1622 }, 1628 },
1623 { 1629 {
1630 .start = IRQ_UART1_TX,
1631 .end = IRQ_UART1_TX,
1632 .flags = IORESOURCE_IRQ,
1633 },
1634 {
1624 .start = IRQ_UART1_RX, 1635 .start = IRQ_UART1_RX,
1625 .end = IRQ_UART1_RX+1, 1636 .end = IRQ_UART1_RX,
1626 .flags = IORESOURCE_IRQ, 1637 .flags = IORESOURCE_IRQ,
1627 }, 1638 },
1628 { 1639 {
@@ -1992,7 +2003,6 @@ static struct adp8870_backlight_platform_data adp8870_pdata = {
1992 2003
1993#if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE) 2004#if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
1994#include <linux/i2c/adp8860.h> 2005#include <linux/i2c/adp8860.h>
1995#include <linux/export.h>
1996static struct led_info adp8860_leds[] = { 2006static struct led_info adp8860_leds[] = {
1997 { 2007 {
1998 .name = "adp8860-led7", 2008 .name = "adp8860-led7",
diff --git a/arch/blackfin/mach-bf537/boards/tcm_bf537.c b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
index 841803038d6..6917ce2fa55 100644
--- a/arch/blackfin/mach-bf537/boards/tcm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
@@ -9,6 +9,7 @@
9 9
10#include <linux/device.h> 10#include <linux/device.h>
11#include <linux/etherdevice.h> 11#include <linux/etherdevice.h>
12#include <linux/export.h>
12#include <linux/platform_device.h> 13#include <linux/platform_device.h>
13#include <linux/mtd/mtd.h> 14#include <linux/mtd/mtd.h>
14#include <linux/mtd/partitions.h> 15#include <linux/mtd/partitions.h>
@@ -306,8 +307,13 @@ static struct resource bfin_uart0_resources[] = {
306 .flags = IORESOURCE_MEM, 307 .flags = IORESOURCE_MEM,
307 }, 308 },
308 { 309 {
310 .start = IRQ_UART0_TX,
311 .end = IRQ_UART0_TX,
312 .flags = IORESOURCE_IRQ,
313 },
314 {
309 .start = IRQ_UART0_RX, 315 .start = IRQ_UART0_RX,
310 .end = IRQ_UART0_RX+1, 316 .end = IRQ_UART0_RX,
311 .flags = IORESOURCE_IRQ, 317 .flags = IORESOURCE_IRQ,
312 }, 318 },
313 { 319 {
@@ -349,8 +355,13 @@ static struct resource bfin_uart1_resources[] = {
349 .flags = IORESOURCE_MEM, 355 .flags = IORESOURCE_MEM,
350 }, 356 },
351 { 357 {
358 .start = IRQ_UART1_TX,
359 .end = IRQ_UART1_TX,
360 .flags = IORESOURCE_IRQ,
361 },
362 {
352 .start = IRQ_UART1_RX, 363 .start = IRQ_UART1_RX,
353 .end = IRQ_UART1_RX+1, 364 .end = IRQ_UART1_RX,
354 .flags = IORESOURCE_IRQ, 365 .flags = IORESOURCE_IRQ,
355 }, 366 },
356 { 367 {
@@ -536,7 +547,6 @@ static struct platform_device bfin_sport1_uart_device = {
536 547
537#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) 548#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
538#include <linux/bfin_mac.h> 549#include <linux/bfin_mac.h>
539#include <linux/export.h>
540static const unsigned short bfin_mac_peripherals[] = P_MII0; 550static const unsigned short bfin_mac_peripherals[] = P_MII0;
541 551
542static struct bfin_phydev_platform_data bfin_phydev_data[] = { 552static struct bfin_phydev_platform_data bfin_phydev_data[] = {
diff --git a/arch/blackfin/mach-bf538/boards/ezkit.c b/arch/blackfin/mach-bf538/boards/ezkit.c
index 629f3c33341..8356eb599f1 100644
--- a/arch/blackfin/mach-bf538/boards/ezkit.c
+++ b/arch/blackfin/mach-bf538/boards/ezkit.c
@@ -49,8 +49,13 @@ static struct resource bfin_uart0_resources[] = {
49 .flags = IORESOURCE_MEM, 49 .flags = IORESOURCE_MEM,
50 }, 50 },
51 { 51 {
52 .start = IRQ_UART0_TX,
53 .end = IRQ_UART0_TX,
54 .flags = IORESOURCE_IRQ,
55 },
56 {
52 .start = IRQ_UART0_RX, 57 .start = IRQ_UART0_RX,
53 .end = IRQ_UART0_RX+1, 58 .end = IRQ_UART0_RX,
54 .flags = IORESOURCE_IRQ, 59 .flags = IORESOURCE_IRQ,
55 }, 60 },
56 { 61 {
@@ -104,8 +109,13 @@ static struct resource bfin_uart1_resources[] = {
104 .flags = IORESOURCE_MEM, 109 .flags = IORESOURCE_MEM,
105 }, 110 },
106 { 111 {
112 .start = IRQ_UART1_TX,
113 .end = IRQ_UART1_TX,
114 .flags = IORESOURCE_IRQ,
115 },
116 {
107 .start = IRQ_UART1_RX, 117 .start = IRQ_UART1_RX,
108 .end = IRQ_UART1_RX+1, 118 .end = IRQ_UART1_RX,
109 .flags = IORESOURCE_IRQ, 119 .flags = IORESOURCE_IRQ,
110 }, 120 },
111 { 121 {
@@ -147,8 +157,13 @@ static struct resource bfin_uart2_resources[] = {
147 .flags = IORESOURCE_MEM, 157 .flags = IORESOURCE_MEM,
148 }, 158 },
149 { 159 {
160 .start = IRQ_UART2_TX,
161 .end = IRQ_UART2_TX,
162 .flags = IORESOURCE_IRQ,
163 },
164 {
150 .start = IRQ_UART2_RX, 165 .start = IRQ_UART2_RX,
151 .end = IRQ_UART2_RX+1, 166 .end = IRQ_UART2_RX,
152 .flags = IORESOURCE_IRQ, 167 .flags = IORESOURCE_IRQ,
153 }, 168 },
154 { 169 {
diff --git a/arch/blackfin/mach-bf548/boards/cm_bf548.c b/arch/blackfin/mach-bf548/boards/cm_bf548.c
index 212b9e0a08c..0350eacec21 100644
--- a/arch/blackfin/mach-bf548/boards/cm_bf548.c
+++ b/arch/blackfin/mach-bf548/boards/cm_bf548.c
@@ -135,8 +135,13 @@ static struct resource bfin_uart0_resources[] = {
135 .flags = IORESOURCE_MEM, 135 .flags = IORESOURCE_MEM,
136 }, 136 },
137 { 137 {
138 .start = IRQ_UART0_TX,
139 .end = IRQ_UART0_TX,
140 .flags = IORESOURCE_IRQ,
141 },
142 {
138 .start = IRQ_UART0_RX, 143 .start = IRQ_UART0_RX,
139 .end = IRQ_UART0_RX+1, 144 .end = IRQ_UART0_RX,
140 .flags = IORESOURCE_IRQ, 145 .flags = IORESOURCE_IRQ,
141 }, 146 },
142 { 147 {
@@ -178,8 +183,13 @@ static struct resource bfin_uart1_resources[] = {
178 .flags = IORESOURCE_MEM, 183 .flags = IORESOURCE_MEM,
179 }, 184 },
180 { 185 {
186 .start = IRQ_UART1_TX,
187 .end = IRQ_UART1_TX,
188 .flags = IORESOURCE_IRQ,
189 },
190 {
181 .start = IRQ_UART1_RX, 191 .start = IRQ_UART1_RX,
182 .end = IRQ_UART1_RX+1, 192 .end = IRQ_UART1_RX,
183 .flags = IORESOURCE_IRQ, 193 .flags = IORESOURCE_IRQ,
184 }, 194 },
185 { 195 {
@@ -237,8 +247,13 @@ static struct resource bfin_uart2_resources[] = {
237 .flags = IORESOURCE_MEM, 247 .flags = IORESOURCE_MEM,
238 }, 248 },
239 { 249 {
250 .start = IRQ_UART2_TX,
251 .end = IRQ_UART2_TX,
252 .flags = IORESOURCE_IRQ,
253 },
254 {
240 .start = IRQ_UART2_RX, 255 .start = IRQ_UART2_RX,
241 .end = IRQ_UART2_RX+1, 256 .end = IRQ_UART2_RX,
242 .flags = IORESOURCE_IRQ, 257 .flags = IORESOURCE_IRQ,
243 }, 258 },
244 { 259 {
@@ -280,8 +295,13 @@ static struct resource bfin_uart3_resources[] = {
280 .flags = IORESOURCE_MEM, 295 .flags = IORESOURCE_MEM,
281 }, 296 },
282 { 297 {
298 .start = IRQ_UART3_TX,
299 .end = IRQ_UART3_TX,
300 .flags = IORESOURCE_IRQ,
301 },
302 {
283 .start = IRQ_UART3_RX, 303 .start = IRQ_UART3_RX,
284 .end = IRQ_UART3_RX+1, 304 .end = IRQ_UART3_RX,
285 .flags = IORESOURCE_IRQ, 305 .flags = IORESOURCE_IRQ,
286 }, 306 },
287 { 307 {
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index cd9cbb68de6..bb868ac0fe2 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -241,8 +241,13 @@ static struct resource bfin_uart0_resources[] = {
241 .flags = IORESOURCE_MEM, 241 .flags = IORESOURCE_MEM,
242 }, 242 },
243 { 243 {
244 .start = IRQ_UART0_TX,
245 .end = IRQ_UART0_TX,
246 .flags = IORESOURCE_IRQ,
247 },
248 {
244 .start = IRQ_UART0_RX, 249 .start = IRQ_UART0_RX,
245 .end = IRQ_UART0_RX+1, 250 .end = IRQ_UART0_RX,
246 .flags = IORESOURCE_IRQ, 251 .flags = IORESOURCE_IRQ,
247 }, 252 },
248 { 253 {
@@ -284,8 +289,13 @@ static struct resource bfin_uart1_resources[] = {
284 .flags = IORESOURCE_MEM, 289 .flags = IORESOURCE_MEM,
285 }, 290 },
286 { 291 {
292 .start = IRQ_UART1_TX,
293 .end = IRQ_UART1_TX,
294 .flags = IORESOURCE_IRQ,
295 },
296 {
287 .start = IRQ_UART1_RX, 297 .start = IRQ_UART1_RX,
288 .end = IRQ_UART1_RX+1, 298 .end = IRQ_UART1_RX,
289 .flags = IORESOURCE_IRQ, 299 .flags = IORESOURCE_IRQ,
290 }, 300 },
291 { 301 {
@@ -343,8 +353,13 @@ static struct resource bfin_uart2_resources[] = {
343 .flags = IORESOURCE_MEM, 353 .flags = IORESOURCE_MEM,
344 }, 354 },
345 { 355 {
356 .start = IRQ_UART2_TX,
357 .end = IRQ_UART2_TX,
358 .flags = IORESOURCE_IRQ,
359 },
360 {
346 .start = IRQ_UART2_RX, 361 .start = IRQ_UART2_RX,
347 .end = IRQ_UART2_RX+1, 362 .end = IRQ_UART2_RX,
348 .flags = IORESOURCE_IRQ, 363 .flags = IORESOURCE_IRQ,
349 }, 364 },
350 { 365 {
@@ -386,8 +401,13 @@ static struct resource bfin_uart3_resources[] = {
386 .flags = IORESOURCE_MEM, 401 .flags = IORESOURCE_MEM,
387 }, 402 },
388 { 403 {
404 .start = IRQ_UART3_TX,
405 .end = IRQ_UART3_TX,
406 .flags = IORESOURCE_IRQ,
407 },
408 {
389 .start = IRQ_UART3_RX, 409 .start = IRQ_UART3_RX,
390 .end = IRQ_UART3_RX+1, 410 .end = IRQ_UART3_RX,
391 .flags = IORESOURCE_IRQ, 411 .flags = IORESOURCE_IRQ,
392 }, 412 },
393 { 413 {
diff --git a/arch/blackfin/mach-bf561/boards/acvilon.c b/arch/blackfin/mach-bf561/boards/acvilon.c
index 972e1347c6b..b1b7339b6ba 100644
--- a/arch/blackfin/mach-bf561/boards/acvilon.c
+++ b/arch/blackfin/mach-bf561/boards/acvilon.c
@@ -203,8 +203,13 @@ static struct resource bfin_uart0_resources[] = {
203 .flags = IORESOURCE_MEM, 203 .flags = IORESOURCE_MEM,
204 }, 204 },
205 { 205 {
206 .start = IRQ_UART_TX,
207 .end = IRQ_UART_TX,
208 .flags = IORESOURCE_IRQ,
209 },
210 {
206 .start = IRQ_UART_RX, 211 .start = IRQ_UART_RX,
207 .end = IRQ_UART_RX + 1, 212 .end = IRQ_UART_RX,
208 .flags = IORESOURCE_IRQ, 213 .flags = IORESOURCE_IRQ,
209 }, 214 },
210 { 215 {
diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c
index c1b72f2d635..c017cf07ed4 100644
--- a/arch/blackfin/mach-bf561/boards/cm_bf561.c
+++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c
@@ -277,8 +277,13 @@ static struct resource bfin_uart0_resources[] = {
277 .flags = IORESOURCE_MEM, 277 .flags = IORESOURCE_MEM,
278 }, 278 },
279 { 279 {
280 .start = IRQ_UART_TX,
281 .end = IRQ_UART_TX,
282 .flags = IORESOURCE_IRQ,
283 },
284 {
280 .start = IRQ_UART_RX, 285 .start = IRQ_UART_RX,
281 .end = IRQ_UART_RX+1, 286 .end = IRQ_UART_RX,
282 .flags = IORESOURCE_IRQ, 287 .flags = IORESOURCE_IRQ,
283 }, 288 },
284 { 289 {
diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c
index 9490dc800ca..27f22ed381d 100644
--- a/arch/blackfin/mach-bf561/boards/ezkit.c
+++ b/arch/blackfin/mach-bf561/boards/ezkit.c
@@ -172,8 +172,13 @@ static struct resource bfin_uart0_resources[] = {
172 .flags = IORESOURCE_MEM, 172 .flags = IORESOURCE_MEM,
173 }, 173 },
174 { 174 {
175 .start = IRQ_UART_TX,
176 .end = IRQ_UART_TX,
177 .flags = IORESOURCE_IRQ,
178 },
179 {
175 .start = IRQ_UART_RX, 180 .start = IRQ_UART_RX,
176 .end = IRQ_UART_RX+1, 181 .end = IRQ_UART_RX,
177 .flags = IORESOURCE_IRQ, 182 .flags = IORESOURCE_IRQ,
178 }, 183 },
179 { 184 {
diff --git a/arch/blackfin/mach-bf561/boards/tepla.c b/arch/blackfin/mach-bf561/boards/tepla.c
index bb056e60f6e..1a57bc986aa 100644
--- a/arch/blackfin/mach-bf561/boards/tepla.c
+++ b/arch/blackfin/mach-bf561/boards/tepla.c
@@ -51,8 +51,13 @@ static struct resource bfin_uart0_resources[] = {
51 .flags = IORESOURCE_MEM, 51 .flags = IORESOURCE_MEM,
52 }, 52 },
53 { 53 {
54 .start = IRQ_UART_TX,
55 .end = IRQ_UART_TX,
56 .flags = IORESOURCE_IRQ,
57 },
58 {
54 .start = IRQ_UART_RX, 59 .start = IRQ_UART_RX,
55 .end = IRQ_UART_RX+1, 60 .end = IRQ_UART_RX,
56 .flags = IORESOURCE_IRQ, 61 .flags = IORESOURCE_IRQ,
57 }, 62 },
58 { 63 {
diff --git a/arch/cris/arch-v10/drivers/Kconfig b/arch/cris/arch-v10/drivers/Kconfig
index 32d90867a98..5f2cdb3e428 100644
--- a/arch/cris/arch-v10/drivers/Kconfig
+++ b/arch/cris/arch-v10/drivers/Kconfig
@@ -3,7 +3,7 @@ if ETRAX_ARCH_V10
3config ETRAX_ETHERNET 3config ETRAX_ETHERNET
4 bool "Ethernet support" 4 bool "Ethernet support"
5 depends on ETRAX_ARCH_V10 5 depends on ETRAX_ARCH_V10
6 select NET_ETHERNET 6 select ETHERNET
7 select NET_CORE 7 select NET_CORE
8 select MII 8 select MII
9 help 9 help
diff --git a/arch/cris/arch-v32/drivers/Kconfig b/arch/cris/arch-v32/drivers/Kconfig
index e47e9c3401b..de43aadcdbc 100644
--- a/arch/cris/arch-v32/drivers/Kconfig
+++ b/arch/cris/arch-v32/drivers/Kconfig
@@ -3,7 +3,7 @@ if ETRAX_ARCH_V32
3config ETRAX_ETHERNET 3config ETRAX_ETHERNET
4 bool "Ethernet support" 4 bool "Ethernet support"
5 depends on ETRAX_ARCH_V32 5 depends on ETRAX_ARCH_V32
6 select NET_ETHERNET 6 select ETHERNET
7 select NET_CORE 7 select NET_CORE
8 select MII 8 select MII
9 help 9 help
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index 6c28582fb98..361d54019bb 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -4,8 +4,8 @@ config M68K
4 select HAVE_IDE 4 select HAVE_IDE
5 select HAVE_AOUT if MMU 5 select HAVE_AOUT if MMU
6 select GENERIC_ATOMIC64 if MMU 6 select GENERIC_ATOMIC64 if MMU
7 select HAVE_GENERIC_HARDIRQS if !MMU 7 select HAVE_GENERIC_HARDIRQS
8 select GENERIC_IRQ_SHOW if !MMU 8 select GENERIC_IRQ_SHOW
9 select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS 9 select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS
10 10
11config RWSEM_GENERIC_SPINLOCK 11config RWSEM_GENERIC_SPINLOCK
diff --git a/arch/m68k/Kconfig.bus b/arch/m68k/Kconfig.bus
index 8294f0c1785..3adb499584f 100644
--- a/arch/m68k/Kconfig.bus
+++ b/arch/m68k/Kconfig.bus
@@ -2,6 +2,15 @@ if MMU
2 2
3comment "Bus Support" 3comment "Bus Support"
4 4
5config DIO
6 bool "DIO bus support"
7 depends on HP300
8 default y
9 help
10 Say Y here to enable support for the "DIO" expansion bus used in
11 HP300 machines. If you are using such a system you almost certainly
12 want this.
13
5config NUBUS 14config NUBUS
6 bool 15 bool
7 depends on MAC 16 depends on MAC
diff --git a/arch/m68k/Kconfig.devices b/arch/m68k/Kconfig.devices
index d214034be6a..6033f5d4e67 100644
--- a/arch/m68k/Kconfig.devices
+++ b/arch/m68k/Kconfig.devices
@@ -24,6 +24,37 @@ config PROC_HARDWARE
24 including the model, CPU, MMU, clock speed, BogoMIPS rating, 24 including the model, CPU, MMU, clock speed, BogoMIPS rating,
25 and memory size. 25 and memory size.
26 26
27config NATFEAT
28 bool "ARAnyM emulator support"
29 depends on ATARI
30 help
31 This option enables support for ARAnyM native features, such as
32 access to a disk image as /dev/hda.
33
34config NFBLOCK
35 tristate "NatFeat block device support"
36 depends on BLOCK && NATFEAT
37 help
38 Say Y to include support for the ARAnyM NatFeat block device
39 which allows direct access to the hard drives without using
40 the hardware emulation.
41
42config NFCON
43 tristate "NatFeat console driver"
44 depends on NATFEAT
45 help
46 Say Y to include support for the ARAnyM NatFeat console driver
47 which allows the console output to be redirected to the stderr
48 output of ARAnyM.
49
50config NFETH
51 tristate "NatFeat Ethernet support"
52 depends on ETHERNET && NATFEAT
53 help
54 Say Y to include support for the ARAnyM NatFeat network device
55 which will emulate a regular ethernet device while presenting an
56 ethertap device to the host system.
57
27endmenu 58endmenu
28 59
29menu "Character devices" 60menu "Character devices"
diff --git a/arch/m68k/amiga/amiints.c b/arch/m68k/amiga/amiints.c
index c5b5212cc3f..47b5f90002a 100644
--- a/arch/m68k/amiga/amiints.c
+++ b/arch/m68k/amiga/amiints.c
@@ -1,43 +1,15 @@
1/* 1/*
2 * linux/arch/m68k/amiga/amiints.c -- Amiga Linux interrupt handling code 2 * Amiga Linux interrupt handling code
3 * 3 *
4 * This file is subject to the terms and conditions of the GNU General Public 4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file COPYING in the main directory of this archive 5 * License. See the file COPYING in the main directory of this archive
6 * for more details. 6 * for more details.
7 *
8 * 11/07/96: rewritten interrupt handling, irq lists are exists now only for
9 * this sources where it makes sense (VERTB/PORTS/EXTER) and you must
10 * be careful that dev_id for this sources is unique since this the
11 * only possibility to distinguish between different handlers for
12 * free_irq. irq lists also have different irq flags:
13 * - IRQ_FLG_FAST: handler is inserted at top of list (after other
14 * fast handlers)
15 * - IRQ_FLG_SLOW: handler is inserted at bottom of list and before
16 * they're executed irq level is set to the previous
17 * one, but handlers don't need to be reentrant, if
18 * reentrance occurred, slow handlers will be just
19 * called again.
20 * The whole interrupt handling for CIAs is moved to cia.c
21 * /Roman Zippel
22 *
23 * 07/08/99: rewamp of the interrupt handling - we now have two types of
24 * interrupts, normal and fast handlers, fast handlers being
25 * marked with IRQF_DISABLED and runs with all other interrupts
26 * disabled. Normal interrupts disable their own source but
27 * run with all other interrupt sources enabled.
28 * PORTS and EXTER interrupts are always shared even if the
29 * drivers do not explicitly mark this when calling
30 * request_irq which they really should do.
31 * This is similar to the way interrupts are handled on all
32 * other architectures and makes a ton of sense besides
33 * having the advantage of making it easier to share
34 * drivers.
35 * /Jes
36 */ 7 */
37 8
38#include <linux/init.h> 9#include <linux/init.h>
39#include <linux/interrupt.h> 10#include <linux/interrupt.h>
40#include <linux/errno.h> 11#include <linux/errno.h>
12#include <linux/irq.h>
41 13
42#include <asm/irq.h> 14#include <asm/irq.h>
43#include <asm/traps.h> 15#include <asm/traps.h>
@@ -45,56 +17,6 @@
45#include <asm/amigaints.h> 17#include <asm/amigaints.h>
46#include <asm/amipcmcia.h> 18#include <asm/amipcmcia.h>
47 19
48static void amiga_enable_irq(unsigned int irq);
49static void amiga_disable_irq(unsigned int irq);
50static irqreturn_t ami_int1(int irq, void *dev_id);
51static irqreturn_t ami_int3(int irq, void *dev_id);
52static irqreturn_t ami_int4(int irq, void *dev_id);
53static irqreturn_t ami_int5(int irq, void *dev_id);
54
55static struct irq_controller amiga_irq_controller = {
56 .name = "amiga",
57 .lock = __SPIN_LOCK_UNLOCKED(amiga_irq_controller.lock),
58 .enable = amiga_enable_irq,
59 .disable = amiga_disable_irq,
60};
61
62/*
63 * void amiga_init_IRQ(void)
64 *
65 * Parameters: None
66 *
67 * Returns: Nothing
68 *
69 * This function should be called during kernel startup to initialize
70 * the amiga IRQ handling routines.
71 */
72
73void __init amiga_init_IRQ(void)
74{
75 if (request_irq(IRQ_AUTO_1, ami_int1, 0, "int1", NULL))
76 pr_err("Couldn't register int%d\n", 1);
77 if (request_irq(IRQ_AUTO_3, ami_int3, 0, "int3", NULL))
78 pr_err("Couldn't register int%d\n", 3);
79 if (request_irq(IRQ_AUTO_4, ami_int4, 0, "int4", NULL))
80 pr_err("Couldn't register int%d\n", 4);
81 if (request_irq(IRQ_AUTO_5, ami_int5, 0, "int5", NULL))
82 pr_err("Couldn't register int%d\n", 5);
83
84 m68k_setup_irq_controller(&amiga_irq_controller, IRQ_USER, AMI_STD_IRQS);
85
86 /* turn off PCMCIA interrupts */
87 if (AMIGAHW_PRESENT(PCMCIA))
88 gayle.inten = GAYLE_IRQ_IDE;
89
90 /* turn off all interrupts and enable the master interrupt bit */
91 amiga_custom.intena = 0x7fff;
92 amiga_custom.intreq = 0x7fff;
93 amiga_custom.intena = IF_SETCLR | IF_INTEN;
94
95 cia_init_IRQ(&ciaa_base);
96 cia_init_IRQ(&ciab_base);
97}
98 20
99/* 21/*
100 * Enable/disable a particular machine specific interrupt source. 22 * Enable/disable a particular machine specific interrupt source.
@@ -103,112 +25,150 @@ void __init amiga_init_IRQ(void)
103 * internal data, that may not be changed by the interrupt at the same time. 25 * internal data, that may not be changed by the interrupt at the same time.
104 */ 26 */
105 27
106static void amiga_enable_irq(unsigned int irq) 28static void amiga_irq_enable(struct irq_data *data)
107{ 29{
108 amiga_custom.intena = IF_SETCLR | (1 << (irq - IRQ_USER)); 30 amiga_custom.intena = IF_SETCLR | (1 << (data->irq - IRQ_USER));
109} 31}
110 32
111static void amiga_disable_irq(unsigned int irq) 33static void amiga_irq_disable(struct irq_data *data)
112{ 34{
113 amiga_custom.intena = 1 << (irq - IRQ_USER); 35 amiga_custom.intena = 1 << (data->irq - IRQ_USER);
114} 36}
115 37
38static struct irq_chip amiga_irq_chip = {
39 .name = "amiga",
40 .irq_enable = amiga_irq_enable,
41 .irq_disable = amiga_irq_disable,
42};
43
44
116/* 45/*
117 * The builtin Amiga hardware interrupt handlers. 46 * The builtin Amiga hardware interrupt handlers.
118 */ 47 */
119 48
120static irqreturn_t ami_int1(int irq, void *dev_id) 49static void ami_int1(unsigned int irq, struct irq_desc *desc)
121{ 50{
122 unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar; 51 unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
123 52
124 /* if serial transmit buffer empty, interrupt */ 53 /* if serial transmit buffer empty, interrupt */
125 if (ints & IF_TBE) { 54 if (ints & IF_TBE) {
126 amiga_custom.intreq = IF_TBE; 55 amiga_custom.intreq = IF_TBE;
127 m68k_handle_int(IRQ_AMIGA_TBE); 56 generic_handle_irq(IRQ_AMIGA_TBE);
128 } 57 }
129 58
130 /* if floppy disk transfer complete, interrupt */ 59 /* if floppy disk transfer complete, interrupt */
131 if (ints & IF_DSKBLK) { 60 if (ints & IF_DSKBLK) {
132 amiga_custom.intreq = IF_DSKBLK; 61 amiga_custom.intreq = IF_DSKBLK;
133 m68k_handle_int(IRQ_AMIGA_DSKBLK); 62 generic_handle_irq(IRQ_AMIGA_DSKBLK);
134 } 63 }
135 64
136 /* if software interrupt set, interrupt */ 65 /* if software interrupt set, interrupt */
137 if (ints & IF_SOFT) { 66 if (ints & IF_SOFT) {
138 amiga_custom.intreq = IF_SOFT; 67 amiga_custom.intreq = IF_SOFT;
139 m68k_handle_int(IRQ_AMIGA_SOFT); 68 generic_handle_irq(IRQ_AMIGA_SOFT);
140 } 69 }
141 return IRQ_HANDLED;
142} 70}
143 71
144static irqreturn_t ami_int3(int irq, void *dev_id) 72static void ami_int3(unsigned int irq, struct irq_desc *desc)
145{ 73{
146 unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar; 74 unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
147 75
148 /* if a blitter interrupt */ 76 /* if a blitter interrupt */
149 if (ints & IF_BLIT) { 77 if (ints & IF_BLIT) {
150 amiga_custom.intreq = IF_BLIT; 78 amiga_custom.intreq = IF_BLIT;
151 m68k_handle_int(IRQ_AMIGA_BLIT); 79 generic_handle_irq(IRQ_AMIGA_BLIT);
152 } 80 }
153 81
154 /* if a copper interrupt */ 82 /* if a copper interrupt */
155 if (ints & IF_COPER) { 83 if (ints & IF_COPER) {
156 amiga_custom.intreq = IF_COPER; 84 amiga_custom.intreq = IF_COPER;
157 m68k_handle_int(IRQ_AMIGA_COPPER); 85 generic_handle_irq(IRQ_AMIGA_COPPER);
158 } 86 }
159 87
160 /* if a vertical blank interrupt */ 88 /* if a vertical blank interrupt */
161 if (ints & IF_VERTB) { 89 if (ints & IF_VERTB) {
162 amiga_custom.intreq = IF_VERTB; 90 amiga_custom.intreq = IF_VERTB;
163 m68k_handle_int(IRQ_AMIGA_VERTB); 91 generic_handle_irq(IRQ_AMIGA_VERTB);
164 } 92 }
165 return IRQ_HANDLED;
166} 93}
167 94
168static irqreturn_t ami_int4(int irq, void *dev_id) 95static void ami_int4(unsigned int irq, struct irq_desc *desc)
169{ 96{
170 unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar; 97 unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
171 98
172 /* if audio 0 interrupt */ 99 /* if audio 0 interrupt */
173 if (ints & IF_AUD0) { 100 if (ints & IF_AUD0) {
174 amiga_custom.intreq = IF_AUD0; 101 amiga_custom.intreq = IF_AUD0;
175 m68k_handle_int(IRQ_AMIGA_AUD0); 102 generic_handle_irq(IRQ_AMIGA_AUD0);
176 } 103 }
177 104
178 /* if audio 1 interrupt */ 105 /* if audio 1 interrupt */
179 if (ints & IF_AUD1) { 106 if (ints & IF_AUD1) {
180 amiga_custom.intreq = IF_AUD1; 107 amiga_custom.intreq = IF_AUD1;
181 m68k_handle_int(IRQ_AMIGA_AUD1); 108 generic_handle_irq(IRQ_AMIGA_AUD1);
182 } 109 }
183 110
184 /* if audio 2 interrupt */ 111 /* if audio 2 interrupt */
185 if (ints & IF_AUD2) { 112 if (ints & IF_AUD2) {
186 amiga_custom.intreq = IF_AUD2; 113 amiga_custom.intreq = IF_AUD2;
187 m68k_handle_int(IRQ_AMIGA_AUD2); 114 generic_handle_irq(IRQ_AMIGA_AUD2);
188 } 115 }
189 116
190 /* if audio 3 interrupt */ 117 /* if audio 3 interrupt */
191 if (ints & IF_AUD3) { 118 if (ints & IF_AUD3) {
192 amiga_custom.intreq = IF_AUD3; 119 amiga_custom.intreq = IF_AUD3;
193 m68k_handle_int(IRQ_AMIGA_AUD3); 120 generic_handle_irq(IRQ_AMIGA_AUD3);
194 } 121 }
195 return IRQ_HANDLED;
196} 122}
197 123
198static irqreturn_t ami_int5(int irq, void *dev_id) 124static void ami_int5(unsigned int irq, struct irq_desc *desc)
199{ 125{
200 unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar; 126 unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
201 127
202 /* if serial receive buffer full interrupt */ 128 /* if serial receive buffer full interrupt */
203 if (ints & IF_RBF) { 129 if (ints & IF_RBF) {
204 /* acknowledge of IF_RBF must be done by the serial interrupt */ 130 /* acknowledge of IF_RBF must be done by the serial interrupt */
205 m68k_handle_int(IRQ_AMIGA_RBF); 131 generic_handle_irq(IRQ_AMIGA_RBF);
206 } 132 }
207 133
208 /* if a disk sync interrupt */ 134 /* if a disk sync interrupt */
209 if (ints & IF_DSKSYN) { 135 if (ints & IF_DSKSYN) {
210 amiga_custom.intreq = IF_DSKSYN; 136 amiga_custom.intreq = IF_DSKSYN;
211 m68k_handle_int(IRQ_AMIGA_DSKSYN); 137 generic_handle_irq(IRQ_AMIGA_DSKSYN);
212 } 138 }
213 return IRQ_HANDLED; 139}
140
141
142/*
143 * void amiga_init_IRQ(void)
144 *
145 * Parameters: None
146 *
147 * Returns: Nothing
148 *
149 * This function should be called during kernel startup to initialize
150 * the amiga IRQ handling routines.
151 */
152
153void __init amiga_init_IRQ(void)
154{
155 m68k_setup_irq_controller(&amiga_irq_chip, handle_simple_irq, IRQ_USER,
156 AMI_STD_IRQS);
157
158 irq_set_chained_handler(IRQ_AUTO_1, ami_int1);
159 irq_set_chained_handler(IRQ_AUTO_3, ami_int3);
160 irq_set_chained_handler(IRQ_AUTO_4, ami_int4);
161 irq_set_chained_handler(IRQ_AUTO_5, ami_int5);
162
163 /* turn off PCMCIA interrupts */
164 if (AMIGAHW_PRESENT(PCMCIA))
165 gayle.inten = GAYLE_IRQ_IDE;
166
167 /* turn off all interrupts and enable the master interrupt bit */
168 amiga_custom.intena = 0x7fff;
169 amiga_custom.intreq = 0x7fff;
170 amiga_custom.intena = IF_SETCLR | IF_INTEN;
171
172 cia_init_IRQ(&ciaa_base);
173 cia_init_IRQ(&ciab_base);
214} 174}
diff --git a/arch/m68k/amiga/cia.c b/arch/m68k/amiga/cia.c
index ecd0f7ca6f0..18c0e29976e 100644
--- a/arch/m68k/amiga/cia.c
+++ b/arch/m68k/amiga/cia.c
@@ -93,13 +93,14 @@ static irqreturn_t cia_handler(int irq, void *dev_id)
93 amiga_custom.intreq = base->int_mask; 93 amiga_custom.intreq = base->int_mask;
94 for (; ints; mach_irq++, ints >>= 1) { 94 for (; ints; mach_irq++, ints >>= 1) {
95 if (ints & 1) 95 if (ints & 1)
96 m68k_handle_int(mach_irq); 96 generic_handle_irq(mach_irq);
97 } 97 }
98 return IRQ_HANDLED; 98 return IRQ_HANDLED;
99} 99}
100 100
101static void cia_enable_irq(unsigned int irq) 101static void cia_irq_enable(struct irq_data *data)
102{ 102{
103 unsigned int irq = data->irq;
103 unsigned char mask; 104 unsigned char mask;
104 105
105 if (irq >= IRQ_AMIGA_CIAB) { 106 if (irq >= IRQ_AMIGA_CIAB) {
@@ -113,19 +114,20 @@ static void cia_enable_irq(unsigned int irq)
113 } 114 }
114} 115}
115 116
116static void cia_disable_irq(unsigned int irq) 117static void cia_irq_disable(struct irq_data *data)
117{ 118{
119 unsigned int irq = data->irq;
120
118 if (irq >= IRQ_AMIGA_CIAB) 121 if (irq >= IRQ_AMIGA_CIAB)
119 cia_able_irq(&ciab_base, 1 << (irq - IRQ_AMIGA_CIAB)); 122 cia_able_irq(&ciab_base, 1 << (irq - IRQ_AMIGA_CIAB));
120 else 123 else
121 cia_able_irq(&ciaa_base, 1 << (irq - IRQ_AMIGA_CIAA)); 124 cia_able_irq(&ciaa_base, 1 << (irq - IRQ_AMIGA_CIAA));
122} 125}
123 126
124static struct irq_controller cia_irq_controller = { 127static struct irq_chip cia_irq_chip = {
125 .name = "cia", 128 .name = "cia",
126 .lock = __SPIN_LOCK_UNLOCKED(cia_irq_controller.lock), 129 .irq_enable = cia_irq_enable,
127 .enable = cia_enable_irq, 130 .irq_disable = cia_irq_disable,
128 .disable = cia_disable_irq,
129}; 131};
130 132
131/* 133/*
@@ -134,9 +136,9 @@ static struct irq_controller cia_irq_controller = {
134 * into this chain. 136 * into this chain.
135 */ 137 */
136 138
137static void auto_enable_irq(unsigned int irq) 139static void auto_irq_enable(struct irq_data *data)
138{ 140{
139 switch (irq) { 141 switch (data->irq) {
140 case IRQ_AUTO_2: 142 case IRQ_AUTO_2:
141 amiga_custom.intena = IF_SETCLR | IF_PORTS; 143 amiga_custom.intena = IF_SETCLR | IF_PORTS;
142 break; 144 break;
@@ -146,9 +148,9 @@ static void auto_enable_irq(unsigned int irq)
146 } 148 }
147} 149}
148 150
149static void auto_disable_irq(unsigned int irq) 151static void auto_irq_disable(struct irq_data *data)
150{ 152{
151 switch (irq) { 153 switch (data->irq) {
152 case IRQ_AUTO_2: 154 case IRQ_AUTO_2:
153 amiga_custom.intena = IF_PORTS; 155 amiga_custom.intena = IF_PORTS;
154 break; 156 break;
@@ -158,24 +160,25 @@ static void auto_disable_irq(unsigned int irq)
158 } 160 }
159} 161}
160 162
161static struct irq_controller auto_irq_controller = { 163static struct irq_chip auto_irq_chip = {
162 .name = "auto", 164 .name = "auto",
163 .lock = __SPIN_LOCK_UNLOCKED(auto_irq_controller.lock), 165 .irq_enable = auto_irq_enable,
164 .enable = auto_enable_irq, 166 .irq_disable = auto_irq_disable,
165 .disable = auto_disable_irq,
166}; 167};
167 168
168void __init cia_init_IRQ(struct ciabase *base) 169void __init cia_init_IRQ(struct ciabase *base)
169{ 170{
170 m68k_setup_irq_controller(&cia_irq_controller, base->cia_irq, CIA_IRQS); 171 m68k_setup_irq_controller(&cia_irq_chip, handle_simple_irq,
172 base->cia_irq, CIA_IRQS);
171 173
172 /* clear any pending interrupt and turn off all interrupts */ 174 /* clear any pending interrupt and turn off all interrupts */
173 cia_set_irq(base, CIA_ICR_ALL); 175 cia_set_irq(base, CIA_ICR_ALL);
174 cia_able_irq(base, CIA_ICR_ALL); 176 cia_able_irq(base, CIA_ICR_ALL);
175 177
176 /* override auto int and install CIA handler */ 178 /* override auto int and install CIA handler */
177 m68k_setup_irq_controller(&auto_irq_controller, base->handler_irq, 1); 179 m68k_setup_irq_controller(&auto_irq_chip, handle_simple_irq,
178 m68k_irq_startup(base->handler_irq); 180 base->handler_irq, 1);
181 m68k_irq_startup_irq(base->handler_irq);
179 if (request_irq(base->handler_irq, cia_handler, IRQF_SHARED, 182 if (request_irq(base->handler_irq, cia_handler, IRQF_SHARED,
180 base->name, base)) 183 base->name, base))
181 pr_err("Couldn't register %s interrupt\n", base->name); 184 pr_err("Couldn't register %s interrupt\n", base->name);
diff --git a/arch/m68k/apollo/dn_ints.c b/arch/m68k/apollo/dn_ints.c
index 5d47f3aa381..17be1e7e2df 100644
--- a/arch/m68k/apollo/dn_ints.c
+++ b/arch/m68k/apollo/dn_ints.c
@@ -1,19 +1,13 @@
1#include <linux/interrupt.h> 1#include <linux/interrupt.h>
2#include <linux/irq.h>
2 3
3#include <asm/irq.h>
4#include <asm/traps.h> 4#include <asm/traps.h>
5#include <asm/apollohw.h> 5#include <asm/apollohw.h>
6 6
7void dn_process_int(unsigned int irq, struct pt_regs *fp) 7unsigned int apollo_irq_startup(struct irq_data *data)
8{ 8{
9 __m68k_handle_int(irq, fp); 9 unsigned int irq = data->irq;
10 10
11 *(volatile unsigned char *)(pica)=0x20;
12 *(volatile unsigned char *)(picb)=0x20;
13}
14
15int apollo_irq_startup(unsigned int irq)
16{
17 if (irq < 8) 11 if (irq < 8)
18 *(volatile unsigned char *)(pica+1) &= ~(1 << irq); 12 *(volatile unsigned char *)(pica+1) &= ~(1 << irq);
19 else 13 else
@@ -21,24 +15,33 @@ int apollo_irq_startup(unsigned int irq)
21 return 0; 15 return 0;
22} 16}
23 17
24void apollo_irq_shutdown(unsigned int irq) 18void apollo_irq_shutdown(struct irq_data *data)
25{ 19{
20 unsigned int irq = data->irq;
21
26 if (irq < 8) 22 if (irq < 8)
27 *(volatile unsigned char *)(pica+1) |= (1 << irq); 23 *(volatile unsigned char *)(pica+1) |= (1 << irq);
28 else 24 else
29 *(volatile unsigned char *)(picb+1) |= (1 << (irq - 8)); 25 *(volatile unsigned char *)(picb+1) |= (1 << (irq - 8));
30} 26}
31 27
32static struct irq_controller apollo_irq_controller = { 28void apollo_irq_eoi(struct irq_data *data)
29{
30 *(volatile unsigned char *)(pica) = 0x20;
31 *(volatile unsigned char *)(picb) = 0x20;
32}
33
34static struct irq_chip apollo_irq_chip = {
33 .name = "apollo", 35 .name = "apollo",
34 .lock = __SPIN_LOCK_UNLOCKED(apollo_irq_controller.lock), 36 .irq_startup = apollo_irq_startup,
35 .startup = apollo_irq_startup, 37 .irq_shutdown = apollo_irq_shutdown,
36 .shutdown = apollo_irq_shutdown, 38 .irq_eoi = apollo_irq_eoi,
37}; 39};
38 40
39 41
40void __init dn_init_IRQ(void) 42void __init dn_init_IRQ(void)
41{ 43{
42 m68k_setup_user_interrupt(VEC_USER + 96, 16, dn_process_int); 44 m68k_setup_user_interrupt(VEC_USER + 96, 16);
43 m68k_setup_irq_controller(&apollo_irq_controller, IRQ_APOLLO, 16); 45 m68k_setup_irq_controller(&apollo_irq_chip, handle_fasteoi_irq,
46 IRQ_APOLLO, 16);
44} 47}
diff --git a/arch/m68k/atari/ataints.c b/arch/m68k/atari/ataints.c
index 26a804e67bc..6d196dadfdb 100644
--- a/arch/m68k/atari/ataints.c
+++ b/arch/m68k/atari/ataints.c
@@ -60,243 +60,7 @@
60 * <asm/atariints.h>): Autovector interrupts are 1..7, then follow ST-MFP, 60 * <asm/atariints.h>): Autovector interrupts are 1..7, then follow ST-MFP,
61 * TT-MFP, SCC, and finally VME interrupts. Vector numbers for the latter can 61 * TT-MFP, SCC, and finally VME interrupts. Vector numbers for the latter can
62 * be allocated by atari_register_vme_int(). 62 * be allocated by atari_register_vme_int().
63 *
64 * Each interrupt can be of three types:
65 *
66 * - SLOW: The handler runs with all interrupts enabled, except the one it
67 * was called by (to avoid reentering). This should be the usual method.
68 * But it is currently possible only for MFP ints, since only the MFP
69 * offers an easy way to mask interrupts.
70 *
71 * - FAST: The handler runs with all interrupts disabled. This should be used
72 * only for really fast handlers, that just do actions immediately
73 * necessary, and let the rest do a bottom half or task queue.
74 *
75 * - PRIORITIZED: The handler can be interrupted by higher-level ints
76 * (greater IPL, no MFP priorities!). This is the method of choice for ints
77 * which should be slow, but are not from a MFP.
78 *
79 * The feature of more than one handler for one int source is still there, but
80 * only applicable if all handers are of the same type. To not slow down
81 * processing of ints with only one handler by the chaining feature, the list
82 * calling function atari_call_irq_list() is only plugged in at the time the
83 * second handler is registered.
84 *
85 * Implementation notes: For fast-as-possible int handling, there are separate
86 * entry points for each type (slow/fast/prio). The assembler handler calls
87 * the irq directly in the usual case, no C wrapper is involved. In case of
88 * multiple handlers, atari_call_irq_list() is registered as handler and calls
89 * in turn the real irq's. To ease access from assembler level to the irq
90 * function pointer and accompanying data, these two are stored in a separate
91 * array, irq_handler[]. The rest of data (type, name) are put into a second
92 * array, irq_param, that is accessed from C only. For each slow interrupt (32
93 * in all) there are separate handler functions, which makes it possible to
94 * hard-code the MFP register address and value, are necessary to mask the
95 * int. If there'd be only one generic function, lots of calculations would be
96 * needed to determine MFP register and int mask from the vector number :-(
97 *
98 * Furthermore, slow ints may not lower the IPL below its previous value
99 * (before the int happened). This is needed so that an int of class PRIO, on
100 * that this int may be stacked, cannot be reentered. This feature is
101 * implemented as follows: If the stack frame format is 1 (throwaway), the int
102 * is not stacked, and the IPL is anded with 0xfbff, resulting in a new level
103 * 2, which still blocks the HSYNC, but no interrupts of interest. If the
104 * frame format is 0, the int is nested, and the old IPL value can be found in
105 * the sr copy in the frame.
106 */
107
108#if 0
109
110#define NUM_INT_SOURCES (8 + NUM_ATARI_SOURCES)
111
112typedef void (*asm_irq_handler)(void);
113
114struct irqhandler {
115 irqreturn_t (*handler)(int, void *, struct pt_regs *);
116 void *dev_id;
117};
118
119struct irqparam {
120 unsigned long flags;
121 const char *devname;
122};
123
124/*
125 * Array with irq's and their parameter data. This array is accessed from low
126 * level assembler code, so an element size of 8 allows usage of index scaling
127 * addressing mode.
128 */ 63 */
129static struct irqhandler irq_handler[NUM_INT_SOURCES];
130
131/*
132 * This array hold the rest of parameters of int handlers: type
133 * (slow,fast,prio) and the name of the handler. These values are only
134 * accessed from C
135 */
136static struct irqparam irq_param[NUM_INT_SOURCES];
137
138/* check for valid int number (complex, sigh...) */
139#define IS_VALID_INTNO(n) \
140 ((n) > 0 && \
141 /* autovec and ST-MFP ok anyway */ \
142 (((n) < TTMFP_SOURCE_BASE) || \
143 /* TT-MFP ok if present */ \
144 ((n) >= TTMFP_SOURCE_BASE && (n) < SCC_SOURCE_BASE && \
145 ATARIHW_PRESENT(TT_MFP)) || \
146 /* SCC ok if present and number even */ \
147 ((n) >= SCC_SOURCE_BASE && (n) < VME_SOURCE_BASE && \
148 !((n) & 1) && ATARIHW_PRESENT(SCC)) || \
149 /* greater numbers ok if they are registered VME vectors */ \
150 ((n) >= VME_SOURCE_BASE && (n) < VME_SOURCE_BASE + VME_MAX_SOURCES && \
151 free_vme_vec_bitmap & (1 << ((n) - VME_SOURCE_BASE)))))
152
153
154/*
155 * Here start the assembler entry points for interrupts
156 */
157
158#define IRQ_NAME(nr) atari_slow_irq_##nr##_handler(void)
159
160#define BUILD_SLOW_IRQ(n) \
161asmlinkage void IRQ_NAME(n); \
162/* Dummy function to allow asm with operands. */ \
163void atari_slow_irq_##n##_dummy (void) { \
164__asm__ (__ALIGN_STR "\n" \
165"atari_slow_irq_" #n "_handler:\t" \
166" addl %6,%5\n" /* preempt_count() += HARDIRQ_OFFSET */ \
167 SAVE_ALL_INT "\n" \
168 GET_CURRENT(%%d0) "\n" \
169" andb #~(1<<(%c3&7)),%a4:w\n" /* mask this interrupt */ \
170 /* get old IPL from stack frame */ \
171" bfextu %%sp@(%c2){#5,#3},%%d0\n" \
172" movew %%sr,%%d1\n" \
173" bfins %%d0,%%d1{#21,#3}\n" \
174" movew %%d1,%%sr\n" /* set IPL = previous value */ \
175" addql #1,%a0\n" \
176" lea %a1,%%a0\n" \
177" pea %%sp@\n" /* push addr of frame */ \
178" movel %%a0@(4),%%sp@-\n" /* push handler data */ \
179" pea (%c3+8)\n" /* push int number */ \
180" movel %%a0@,%%a0\n" \
181" jbsr %%a0@\n" /* call the handler */ \
182" addql #8,%%sp\n" \
183" addql #4,%%sp\n" \
184" orw #0x0600,%%sr\n" \
185" andw #0xfeff,%%sr\n" /* set IPL = 6 again */ \
186" orb #(1<<(%c3&7)),%a4:w\n" /* now unmask the int again */ \
187" jbra ret_from_interrupt\n" \
188 : : "i" (&kstat_cpu(0).irqs[n+8]), "i" (&irq_handler[n+8]), \
189 "n" (PT_OFF_SR), "n" (n), \
190 "i" (n & 8 ? (n & 16 ? &tt_mfp.int_mk_a : &st_mfp.int_mk_a) \
191 : (n & 16 ? &tt_mfp.int_mk_b : &st_mfp.int_mk_b)), \
192 "m" (preempt_count()), "di" (HARDIRQ_OFFSET) \
193); \
194 for (;;); /* fake noreturn */ \
195}
196
197BUILD_SLOW_IRQ(0);
198BUILD_SLOW_IRQ(1);
199BUILD_SLOW_IRQ(2);
200BUILD_SLOW_IRQ(3);
201BUILD_SLOW_IRQ(4);
202BUILD_SLOW_IRQ(5);
203BUILD_SLOW_IRQ(6);
204BUILD_SLOW_IRQ(7);
205BUILD_SLOW_IRQ(8);
206BUILD_SLOW_IRQ(9);
207BUILD_SLOW_IRQ(10);
208BUILD_SLOW_IRQ(11);
209BUILD_SLOW_IRQ(12);
210BUILD_SLOW_IRQ(13);
211BUILD_SLOW_IRQ(14);
212BUILD_SLOW_IRQ(15);
213BUILD_SLOW_IRQ(16);
214BUILD_SLOW_IRQ(17);
215BUILD_SLOW_IRQ(18);
216BUILD_SLOW_IRQ(19);
217BUILD_SLOW_IRQ(20);
218BUILD_SLOW_IRQ(21);
219BUILD_SLOW_IRQ(22);
220BUILD_SLOW_IRQ(23);
221BUILD_SLOW_IRQ(24);
222BUILD_SLOW_IRQ(25);
223BUILD_SLOW_IRQ(26);
224BUILD_SLOW_IRQ(27);
225BUILD_SLOW_IRQ(28);
226BUILD_SLOW_IRQ(29);
227BUILD_SLOW_IRQ(30);
228BUILD_SLOW_IRQ(31);
229
230asm_irq_handler slow_handlers[32] = {
231 [0] = atari_slow_irq_0_handler,
232 [1] = atari_slow_irq_1_handler,
233 [2] = atari_slow_irq_2_handler,
234 [3] = atari_slow_irq_3_handler,
235 [4] = atari_slow_irq_4_handler,
236 [5] = atari_slow_irq_5_handler,
237 [6] = atari_slow_irq_6_handler,
238 [7] = atari_slow_irq_7_handler,
239 [8] = atari_slow_irq_8_handler,
240 [9] = atari_slow_irq_9_handler,
241 [10] = atari_slow_irq_10_handler,
242 [11] = atari_slow_irq_11_handler,
243 [12] = atari_slow_irq_12_handler,
244 [13] = atari_slow_irq_13_handler,
245 [14] = atari_slow_irq_14_handler,
246 [15] = atari_slow_irq_15_handler,
247 [16] = atari_slow_irq_16_handler,
248 [17] = atari_slow_irq_17_handler,
249 [18] = atari_slow_irq_18_handler,
250 [19] = atari_slow_irq_19_handler,
251 [20] = atari_slow_irq_20_handler,
252 [21] = atari_slow_irq_21_handler,
253 [22] = atari_slow_irq_22_handler,
254 [23] = atari_slow_irq_23_handler,
255 [24] = atari_slow_irq_24_handler,
256 [25] = atari_slow_irq_25_handler,
257 [26] = atari_slow_irq_26_handler,
258 [27] = atari_slow_irq_27_handler,
259 [28] = atari_slow_irq_28_handler,
260 [29] = atari_slow_irq_29_handler,
261 [30] = atari_slow_irq_30_handler,
262 [31] = atari_slow_irq_31_handler
263};
264
265asmlinkage void atari_fast_irq_handler( void );
266asmlinkage void atari_prio_irq_handler( void );
267
268/* Dummy function to allow asm with operands. */
269void atari_fast_prio_irq_dummy (void) {
270__asm__ (__ALIGN_STR "\n"
271"atari_fast_irq_handler:\n\t"
272 "orw #0x700,%%sr\n" /* disable all interrupts */
273"atari_prio_irq_handler:\n\t"
274 "addl %3,%2\n\t" /* preempt_count() += HARDIRQ_OFFSET */
275 SAVE_ALL_INT "\n\t"
276 GET_CURRENT(%%d0) "\n\t"
277 /* get vector number from stack frame and convert to source */
278 "bfextu %%sp@(%c1){#4,#10},%%d0\n\t"
279 "subw #(0x40-8),%%d0\n\t"
280 "jpl 1f\n\t"
281 "addw #(0x40-8-0x18),%%d0\n"
282 "1:\tlea %a0,%%a0\n\t"
283 "addql #1,%%a0@(%%d0:l:4)\n\t"
284 "lea irq_handler,%%a0\n\t"
285 "lea %%a0@(%%d0:l:8),%%a0\n\t"
286 "pea %%sp@\n\t" /* push frame address */
287 "movel %%a0@(4),%%sp@-\n\t" /* push handler data */
288 "movel %%d0,%%sp@-\n\t" /* push int number */
289 "movel %%a0@,%%a0\n\t"
290 "jsr %%a0@\n\t" /* and call the handler */
291 "addql #8,%%sp\n\t"
292 "addql #4,%%sp\n\t"
293 "jbra ret_from_interrupt"
294 : : "i" (&kstat_cpu(0).irqs), "n" (PT_OFF_FORMATVEC),
295 "m" (preempt_count()), "di" (HARDIRQ_OFFSET)
296);
297 for (;;);
298}
299#endif
300 64
301/* 65/*
302 * Bitmap for free interrupt vector numbers 66 * Bitmap for free interrupt vector numbers
@@ -320,31 +84,44 @@ extern void atari_microwire_cmd(int cmd);
320 84
321extern int atari_SCC_reset_done; 85extern int atari_SCC_reset_done;
322 86
323static int atari_startup_irq(unsigned int irq) 87static unsigned int atari_irq_startup(struct irq_data *data)
324{ 88{
325 m68k_irq_startup(irq); 89 unsigned int irq = data->irq;
90
91 m68k_irq_startup(data);
326 atari_turnon_irq(irq); 92 atari_turnon_irq(irq);
327 atari_enable_irq(irq); 93 atari_enable_irq(irq);
328 return 0; 94 return 0;
329} 95}
330 96
331static void atari_shutdown_irq(unsigned int irq) 97static void atari_irq_shutdown(struct irq_data *data)
332{ 98{
99 unsigned int irq = data->irq;
100
333 atari_disable_irq(irq); 101 atari_disable_irq(irq);
334 atari_turnoff_irq(irq); 102 atari_turnoff_irq(irq);
335 m68k_irq_shutdown(irq); 103 m68k_irq_shutdown(data);
336 104
337 if (irq == IRQ_AUTO_4) 105 if (irq == IRQ_AUTO_4)
338 vectors[VEC_INT4] = falcon_hblhandler; 106 vectors[VEC_INT4] = falcon_hblhandler;
339} 107}
340 108
341static struct irq_controller atari_irq_controller = { 109static void atari_irq_enable(struct irq_data *data)
110{
111 atari_enable_irq(data->irq);
112}
113
114static void atari_irq_disable(struct irq_data *data)
115{
116 atari_disable_irq(data->irq);
117}
118
119static struct irq_chip atari_irq_chip = {
342 .name = "atari", 120 .name = "atari",
343 .lock = __SPIN_LOCK_UNLOCKED(atari_irq_controller.lock), 121 .irq_startup = atari_irq_startup,
344 .startup = atari_startup_irq, 122 .irq_shutdown = atari_irq_shutdown,
345 .shutdown = atari_shutdown_irq, 123 .irq_enable = atari_irq_enable,
346 .enable = atari_enable_irq, 124 .irq_disable = atari_irq_disable,
347 .disable = atari_disable_irq,
348}; 125};
349 126
350/* 127/*
@@ -360,8 +137,9 @@ static struct irq_controller atari_irq_controller = {
360 137
361void __init atari_init_IRQ(void) 138void __init atari_init_IRQ(void)
362{ 139{
363 m68k_setup_user_interrupt(VEC_USER, NUM_ATARI_SOURCES - IRQ_USER, NULL); 140 m68k_setup_user_interrupt(VEC_USER, NUM_ATARI_SOURCES - IRQ_USER);
364 m68k_setup_irq_controller(&atari_irq_controller, 1, NUM_ATARI_SOURCES - 1); 141 m68k_setup_irq_controller(&atari_irq_chip, handle_simple_irq, 1,
142 NUM_ATARI_SOURCES - 1);
365 143
366 /* Initialize the MFP(s) */ 144 /* Initialize the MFP(s) */
367 145
diff --git a/arch/m68k/bvme6000/config.c b/arch/m68k/bvme6000/config.c
index 1edd95095cb..81286476f74 100644
--- a/arch/m68k/bvme6000/config.c
+++ b/arch/m68k/bvme6000/config.c
@@ -86,7 +86,7 @@ static void bvme6000_get_model(char *model)
86 */ 86 */
87static void __init bvme6000_init_IRQ(void) 87static void __init bvme6000_init_IRQ(void)
88{ 88{
89 m68k_setup_user_interrupt(VEC_USER, 192, NULL); 89 m68k_setup_user_interrupt(VEC_USER, 192);
90} 90}
91 91
92void __init config_bvme6000(void) 92void __init config_bvme6000(void)
diff --git a/arch/m68k/hp300/time.c b/arch/m68k/hp300/time.c
index f6312c7d872..c87fe69b072 100644
--- a/arch/m68k/hp300/time.c
+++ b/arch/m68k/hp300/time.c
@@ -70,7 +70,7 @@ void __init hp300_sched_init(irq_handler_t vector)
70 70
71 asm volatile(" movpw %0,%1@(5)" : : "d" (INTVAL), "a" (CLOCKBASE)); 71 asm volatile(" movpw %0,%1@(5)" : : "d" (INTVAL), "a" (CLOCKBASE));
72 72
73 if (request_irq(IRQ_AUTO_6, hp300_tick, IRQ_FLG_STD, "timer tick", vector)) 73 if (request_irq(IRQ_AUTO_6, hp300_tick, 0, "timer tick", vector))
74 pr_err("Couldn't register timer interrupt\n"); 74 pr_err("Couldn't register timer interrupt\n");
75 75
76 out_8(CLOCKBASE + CLKCR2, 0x1); /* select CR1 */ 76 out_8(CLOCKBASE + CLKCR2, 0x1); /* select CR1 */
diff --git a/arch/m68k/include/asm/hardirq.h b/arch/m68k/include/asm/hardirq.h
index 870e5347155..db30ed27687 100644
--- a/arch/m68k/include/asm/hardirq.h
+++ b/arch/m68k/include/asm/hardirq.h
@@ -18,6 +18,11 @@
18 18
19#ifdef CONFIG_MMU 19#ifdef CONFIG_MMU
20 20
21static inline void ack_bad_irq(unsigned int irq)
22{
23 pr_crit("unexpected IRQ trap at vector %02x\n", irq);
24}
25
21/* entry.S is sensitive to the offsets of these fields */ 26/* entry.S is sensitive to the offsets of these fields */
22typedef struct { 27typedef struct {
23 unsigned int __softirq_pending; 28 unsigned int __softirq_pending;
diff --git a/arch/m68k/include/asm/irq.h b/arch/m68k/include/asm/irq.h
index 69ed0d74d53..6198df5ff24 100644
--- a/arch/m68k/include/asm/irq.h
+++ b/arch/m68k/include/asm/irq.h
@@ -27,11 +27,6 @@
27 27
28#ifdef CONFIG_MMU 28#ifdef CONFIG_MMU
29 29
30#include <linux/linkage.h>
31#include <linux/hardirq.h>
32#include <linux/irqreturn.h>
33#include <linux/spinlock_types.h>
34
35/* 30/*
36 * Interrupt source definitions 31 * Interrupt source definitions
37 * General interrupt sources are the level 1-7. 32 * General interrupt sources are the level 1-7.
@@ -54,10 +49,6 @@
54 49
55#define IRQ_USER 8 50#define IRQ_USER 8
56 51
57extern unsigned int irq_canonicalize(unsigned int irq);
58
59struct pt_regs;
60
61/* 52/*
62 * various flags for request_irq() - the Amiga now uses the standard 53 * various flags for request_irq() - the Amiga now uses the standard
63 * mechanism like all other architectures - IRQF_DISABLED and 54 * mechanism like all other architectures - IRQF_DISABLED and
@@ -71,57 +62,27 @@ struct pt_regs;
71#define IRQ_FLG_STD (0x8000) /* internally used */ 62#define IRQ_FLG_STD (0x8000) /* internally used */
72#endif 63#endif
73 64
74/* 65struct irq_data;
75 * This structure is used to chain together the ISRs for a particular 66struct irq_chip;
76 * interrupt source (if it supports chaining). 67struct irq_desc;
77 */ 68extern unsigned int m68k_irq_startup(struct irq_data *data);
78typedef struct irq_node { 69extern unsigned int m68k_irq_startup_irq(unsigned int irq);
79 irqreturn_t (*handler)(int, void *); 70extern void m68k_irq_shutdown(struct irq_data *data);
80 void *dev_id; 71extern void m68k_setup_auto_interrupt(void (*handler)(unsigned int,
81 struct irq_node *next; 72 struct pt_regs *));
82 unsigned long flags; 73extern void m68k_setup_user_interrupt(unsigned int vec, unsigned int cnt);
83 const char *devname; 74extern void m68k_setup_irq_controller(struct irq_chip *,
84} irq_node_t; 75 void (*handle)(unsigned int irq,
85 76 struct irq_desc *desc),
86/* 77 unsigned int irq, unsigned int cnt);
87 * This structure has only 4 elements for speed reasons
88 */
89struct irq_handler {
90 int (*handler)(int, void *);
91 unsigned long flags;
92 void *dev_id;
93 const char *devname;
94};
95
96struct irq_controller {
97 const char *name;
98 spinlock_t lock;
99 int (*startup)(unsigned int irq);
100 void (*shutdown)(unsigned int irq);
101 void (*enable)(unsigned int irq);
102 void (*disable)(unsigned int irq);
103};
104
105extern int m68k_irq_startup(unsigned int);
106extern void m68k_irq_shutdown(unsigned int);
107
108/*
109 * This function returns a new irq_node_t
110 */
111extern irq_node_t *new_irq_node(void);
112 78
113extern void m68k_setup_auto_interrupt(void (*handler)(unsigned int, struct pt_regs *)); 79extern unsigned int irq_canonicalize(unsigned int irq);
114extern void m68k_setup_user_interrupt(unsigned int vec, unsigned int cnt,
115 void (*handler)(unsigned int, struct pt_regs *));
116extern void m68k_setup_irq_controller(struct irq_controller *, unsigned int, unsigned int);
117
118asmlinkage void m68k_handle_int(unsigned int);
119asmlinkage void __m68k_handle_int(unsigned int, struct pt_regs *);
120 80
121#else 81#else
122#define irq_canonicalize(irq) (irq) 82#define irq_canonicalize(irq) (irq)
123#endif /* CONFIG_MMU */ 83#endif /* CONFIG_MMU */
124 84
125asmlinkage void do_IRQ(int irq, struct pt_regs *regs); 85asmlinkage void do_IRQ(int irq, struct pt_regs *regs);
86extern atomic_t irq_err_count;
126 87
127#endif /* _M68K_IRQ_H_ */ 88#endif /* _M68K_IRQ_H_ */
diff --git a/arch/m68k/include/asm/macintosh.h b/arch/m68k/include/asm/macintosh.h
index c2a1c5eac1a..12ebe43b008 100644
--- a/arch/m68k/include/asm/macintosh.h
+++ b/arch/m68k/include/asm/macintosh.h
@@ -12,6 +12,8 @@ extern void mac_reset(void);
12extern void mac_poweroff(void); 12extern void mac_poweroff(void);
13extern void mac_init_IRQ(void); 13extern void mac_init_IRQ(void);
14extern int mac_irq_pending(unsigned int); 14extern int mac_irq_pending(unsigned int);
15extern void mac_irq_enable(struct irq_data *data);
16extern void mac_irq_disable(struct irq_data *data);
15 17
16/* 18/*
17 * Floppy driver magic hook - probably shouldn't be here 19 * Floppy driver magic hook - probably shouldn't be here
diff --git a/arch/m68k/include/asm/q40ints.h b/arch/m68k/include/asm/q40ints.h
index 3d970afb708..22f12c9eb91 100644
--- a/arch/m68k/include/asm/q40ints.h
+++ b/arch/m68k/include/asm/q40ints.h
@@ -24,6 +24,3 @@
24#define Q40_IRQ10_MASK (1<<5) 24#define Q40_IRQ10_MASK (1<<5)
25#define Q40_IRQ14_MASK (1<<6) 25#define Q40_IRQ14_MASK (1<<6)
26#define Q40_IRQ15_MASK (1<<7) 26#define Q40_IRQ15_MASK (1<<7)
27
28extern unsigned long q40_probe_irq_on (void);
29extern int q40_probe_irq_off (unsigned long irqs);
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h
index 43f984e9397..303192fc926 100644
--- a/arch/m68k/include/asm/unistd.h
+++ b/arch/m68k/include/asm/unistd.h
@@ -350,10 +350,12 @@
350#define __NR_clock_adjtime 342 350#define __NR_clock_adjtime 342
351#define __NR_syncfs 343 351#define __NR_syncfs 343
352#define __NR_setns 344 352#define __NR_setns 344
353#define __NR_process_vm_readv 345
354#define __NR_process_vm_writev 346
353 355
354#ifdef __KERNEL__ 356#ifdef __KERNEL__
355 357
356#define NR_syscalls 345 358#define NR_syscalls 347
357 359
358#define __ARCH_WANT_IPC_PARSE_VERSION 360#define __ARCH_WANT_IPC_PARSE_VERSION
359#define __ARCH_WANT_OLD_READDIR 361#define __ARCH_WANT_OLD_READDIR
diff --git a/arch/m68k/kernel/Makefile b/arch/m68k/kernel/Makefile
index e7f0f2e5ad4..c5696193281 100644
--- a/arch/m68k/kernel/Makefile
+++ b/arch/m68k/kernel/Makefile
@@ -6,16 +6,15 @@ extra-$(CONFIG_MMU) := head.o
6extra-$(CONFIG_SUN3) := sun3-head.o 6extra-$(CONFIG_SUN3) := sun3-head.o
7extra-y += vmlinux.lds 7extra-y += vmlinux.lds
8 8
9obj-y := entry.o m68k_ksyms.o module.o process.o ptrace.o setup.o signal.o \ 9obj-y := entry.o irq.o m68k_ksyms.o module.o process.o ptrace.o setup.o \
10 sys_m68k.o syscalltable.o time.o traps.o 10 signal.o sys_m68k.o syscalltable.o time.o traps.o
11 11
12obj-$(CONFIG_MMU) += ints.o devres.o vectors.o 12obj-$(CONFIG_MMU) += ints.o vectors.o
13devres-$(CONFIG_MMU) = ../../../kernel/irq/devres.o
14 13
15ifndef CONFIG_MMU_SUN3 14ifndef CONFIG_MMU_SUN3
16obj-y += dma.o 15obj-y += dma.o
17endif 16endif
18ifndef CONFIG_MMU 17ifndef CONFIG_MMU
19obj-y += init_task.o irq.o 18obj-y += init_task.o
20endif 19endif
21 20
diff --git a/arch/m68k/kernel/entry_mm.S b/arch/m68k/kernel/entry_mm.S
index bd0ec05263b..c713f514843 100644
--- a/arch/m68k/kernel/entry_mm.S
+++ b/arch/m68k/kernel/entry_mm.S
@@ -48,7 +48,7 @@
48.globl sys_fork, sys_clone, sys_vfork 48.globl sys_fork, sys_clone, sys_vfork
49.globl ret_from_interrupt, bad_interrupt 49.globl ret_from_interrupt, bad_interrupt
50.globl auto_irqhandler_fixup 50.globl auto_irqhandler_fixup
51.globl user_irqvec_fixup, user_irqhandler_fixup 51.globl user_irqvec_fixup
52 52
53.text 53.text
54ENTRY(buserr) 54ENTRY(buserr)
@@ -207,7 +207,7 @@ ENTRY(auto_inthandler)
207 movel %sp,%sp@- 207 movel %sp,%sp@-
208 movel %d0,%sp@- | put vector # on stack 208 movel %d0,%sp@- | put vector # on stack
209auto_irqhandler_fixup = . + 2 209auto_irqhandler_fixup = . + 2
210 jsr __m68k_handle_int | process the IRQ 210 jsr do_IRQ | process the IRQ
211 addql #8,%sp | pop parameters off stack 211 addql #8,%sp | pop parameters off stack
212 212
213ret_from_interrupt: 213ret_from_interrupt:
@@ -240,8 +240,7 @@ user_irqvec_fixup = . + 2
240 240
241 movel %sp,%sp@- 241 movel %sp,%sp@-
242 movel %d0,%sp@- | put vector # on stack 242 movel %d0,%sp@- | put vector # on stack
243user_irqhandler_fixup = . + 2 243 jsr do_IRQ | process the IRQ
244 jsr __m68k_handle_int | process the IRQ
245 addql #8,%sp | pop parameters off stack 244 addql #8,%sp | pop parameters off stack
246 245
247 subqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1) 246 subqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
diff --git a/arch/m68k/kernel/ints.c b/arch/m68k/kernel/ints.c
index 761ee0440c9..74fefac0089 100644
--- a/arch/m68k/kernel/ints.c
+++ b/arch/m68k/kernel/ints.c
@@ -4,25 +4,6 @@
4 * This file is subject to the terms and conditions of the GNU General Public 4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file COPYING in the main directory of this archive 5 * License. See the file COPYING in the main directory of this archive
6 * for more details. 6 * for more details.
7 *
8 * 07/03/96: Timer initialization, and thus mach_sched_init(),
9 * removed from request_irq() and moved to init_time().
10 * We should therefore consider renaming our add_isr() and
11 * remove_isr() to request_irq() and free_irq()
12 * respectively, so they are compliant with the other
13 * architectures. /Jes
14 * 11/07/96: Changed all add_/remove_isr() to request_/free_irq() calls.
15 * Removed irq list support, if any machine needs an irq server
16 * it must implement this itself (as it's already done), instead
17 * only default handler are used with mach_default_handler.
18 * request_irq got some flags different from other architectures:
19 * - IRQ_FLG_REPLACE : Replace an existing handler (the default one
20 * can be replaced without this flag)
21 * - IRQ_FLG_LOCK : handler can't be replaced
22 * There are other machine depending flags, see there
23 * If you want to replace a default handler you should know what
24 * you're doing, since it might handle different other irq sources
25 * which must be served /Roman Zippel
26 */ 7 */
27 8
28#include <linux/module.h> 9#include <linux/module.h>
@@ -47,33 +28,22 @@
47#endif 28#endif
48 29
49extern u32 auto_irqhandler_fixup[]; 30extern u32 auto_irqhandler_fixup[];
50extern u32 user_irqhandler_fixup[];
51extern u16 user_irqvec_fixup[]; 31extern u16 user_irqvec_fixup[];
52 32
53/* table for system interrupt handlers */
54static struct irq_node *irq_list[NR_IRQS];
55static struct irq_controller *irq_controller[NR_IRQS];
56static int irq_depth[NR_IRQS];
57
58static int m68k_first_user_vec; 33static int m68k_first_user_vec;
59 34
60static struct irq_controller auto_irq_controller = { 35static struct irq_chip auto_irq_chip = {
61 .name = "auto", 36 .name = "auto",
62 .lock = __SPIN_LOCK_UNLOCKED(auto_irq_controller.lock), 37 .irq_startup = m68k_irq_startup,
63 .startup = m68k_irq_startup, 38 .irq_shutdown = m68k_irq_shutdown,
64 .shutdown = m68k_irq_shutdown,
65}; 39};
66 40
67static struct irq_controller user_irq_controller = { 41static struct irq_chip user_irq_chip = {
68 .name = "user", 42 .name = "user",
69 .lock = __SPIN_LOCK_UNLOCKED(user_irq_controller.lock), 43 .irq_startup = m68k_irq_startup,
70 .startup = m68k_irq_startup, 44 .irq_shutdown = m68k_irq_shutdown,
71 .shutdown = m68k_irq_shutdown,
72}; 45};
73 46
74#define NUM_IRQ_NODES 100
75static irq_node_t nodes[NUM_IRQ_NODES];
76
77/* 47/*
78 * void init_IRQ(void) 48 * void init_IRQ(void)
79 * 49 *
@@ -96,7 +66,7 @@ void __init init_IRQ(void)
96 } 66 }
97 67
98 for (i = IRQ_AUTO_1; i <= IRQ_AUTO_7; i++) 68 for (i = IRQ_AUTO_1; i <= IRQ_AUTO_7; i++)
99 irq_controller[i] = &auto_irq_controller; 69 irq_set_chip_and_handler(i, &auto_irq_chip, handle_simple_irq);
100 70
101 mach_init_IRQ(); 71 mach_init_IRQ();
102} 72}
@@ -106,7 +76,7 @@ void __init init_IRQ(void)
106 * @handler: called from auto vector interrupts 76 * @handler: called from auto vector interrupts
107 * 77 *
108 * setup the handler to be called from auto vector interrupts instead of the 78 * setup the handler to be called from auto vector interrupts instead of the
109 * standard __m68k_handle_int(), it will be called with irq numbers in the range 79 * standard do_IRQ(), it will be called with irq numbers in the range
110 * from IRQ_AUTO_1 - IRQ_AUTO_7. 80 * from IRQ_AUTO_1 - IRQ_AUTO_7.
111 */ 81 */
112void __init m68k_setup_auto_interrupt(void (*handler)(unsigned int, struct pt_regs *)) 82void __init m68k_setup_auto_interrupt(void (*handler)(unsigned int, struct pt_regs *))
@@ -120,217 +90,49 @@ void __init m68k_setup_auto_interrupt(void (*handler)(unsigned int, struct pt_re
120 * m68k_setup_user_interrupt 90 * m68k_setup_user_interrupt
121 * @vec: first user vector interrupt to handle 91 * @vec: first user vector interrupt to handle
122 * @cnt: number of active user vector interrupts 92 * @cnt: number of active user vector interrupts
123 * @handler: called from user vector interrupts
124 * 93 *
125 * setup user vector interrupts, this includes activating the specified range 94 * setup user vector interrupts, this includes activating the specified range
126 * of interrupts, only then these interrupts can be requested (note: this is 95 * of interrupts, only then these interrupts can be requested (note: this is
127 * different from auto vector interrupts). An optional handler can be installed 96 * different from auto vector interrupts).
128 * to be called instead of the default __m68k_handle_int(), it will be called
129 * with irq numbers starting from IRQ_USER.
130 */ 97 */
131void __init m68k_setup_user_interrupt(unsigned int vec, unsigned int cnt, 98void __init m68k_setup_user_interrupt(unsigned int vec, unsigned int cnt)
132 void (*handler)(unsigned int, struct pt_regs *))
133{ 99{
134 int i; 100 int i;
135 101
136 BUG_ON(IRQ_USER + cnt > NR_IRQS); 102 BUG_ON(IRQ_USER + cnt > NR_IRQS);
137 m68k_first_user_vec = vec; 103 m68k_first_user_vec = vec;
138 for (i = 0; i < cnt; i++) 104 for (i = 0; i < cnt; i++)
139 irq_controller[IRQ_USER + i] = &user_irq_controller; 105 irq_set_chip(IRQ_USER + i, &user_irq_chip);
140 *user_irqvec_fixup = vec - IRQ_USER; 106 *user_irqvec_fixup = vec - IRQ_USER;
141 if (handler)
142 *user_irqhandler_fixup = (u32)handler;
143 flush_icache(); 107 flush_icache();
144} 108}
145 109
146/** 110/**
147 * m68k_setup_irq_controller 111 * m68k_setup_irq_controller
148 * @contr: irq controller which controls specified irq 112 * @chip: irq chip which controls specified irq
113 * @handle: flow handler which handles specified irq
149 * @irq: first irq to be managed by the controller 114 * @irq: first irq to be managed by the controller
115 * @cnt: number of irqs to be managed by the controller
150 * 116 *
151 * Change the controller for the specified range of irq, which will be used to 117 * Change the controller for the specified range of irq, which will be used to
152 * manage these irq. auto/user irq already have a default controller, which can 118 * manage these irq. auto/user irq already have a default controller, which can
153 * be changed as well, but the controller probably should use m68k_irq_startup/ 119 * be changed as well, but the controller probably should use m68k_irq_startup/
154 * m68k_irq_shutdown. 120 * m68k_irq_shutdown.
155 */ 121 */
156void m68k_setup_irq_controller(struct irq_controller *contr, unsigned int irq, 122void m68k_setup_irq_controller(struct irq_chip *chip,
123 irq_flow_handler_t handle, unsigned int irq,
157 unsigned int cnt) 124 unsigned int cnt)
158{ 125{
159 int i; 126 int i;
160 127
161 for (i = 0; i < cnt; i++) 128 for (i = 0; i < cnt; i++) {
162 irq_controller[irq + i] = contr; 129 irq_set_chip(irq + i, chip);
163} 130 if (handle)
164 131 irq_set_handler(irq + i, handle);
165irq_node_t *new_irq_node(void)
166{
167 irq_node_t *node;
168 short i;
169
170 for (node = nodes, i = NUM_IRQ_NODES-1; i >= 0; node++, i--) {
171 if (!node->handler) {
172 memset(node, 0, sizeof(*node));
173 return node;
174 }
175 } 132 }
176
177 printk ("new_irq_node: out of nodes\n");
178 return NULL;
179} 133}
180 134
181int setup_irq(unsigned int irq, struct irq_node *node) 135unsigned int m68k_irq_startup_irq(unsigned int irq)
182{
183 struct irq_controller *contr;
184 struct irq_node **prev;
185 unsigned long flags;
186
187 if (irq >= NR_IRQS || !(contr = irq_controller[irq])) {
188 printk("%s: Incorrect IRQ %d from %s\n",
189 __func__, irq, node->devname);
190 return -ENXIO;
191 }
192
193 spin_lock_irqsave(&contr->lock, flags);
194
195 prev = irq_list + irq;
196 if (*prev) {
197 /* Can't share interrupts unless both agree to */
198 if (!((*prev)->flags & node->flags & IRQF_SHARED)) {
199 spin_unlock_irqrestore(&contr->lock, flags);
200 return -EBUSY;
201 }
202 while (*prev)
203 prev = &(*prev)->next;
204 }
205
206 if (!irq_list[irq]) {
207 if (contr->startup)
208 contr->startup(irq);
209 else
210 contr->enable(irq);
211 }
212 node->next = NULL;
213 *prev = node;
214
215 spin_unlock_irqrestore(&contr->lock, flags);
216
217 return 0;
218}
219
220int request_irq(unsigned int irq,
221 irq_handler_t handler,
222 unsigned long flags, const char *devname, void *dev_id)
223{
224 struct irq_node *node;
225 int res;
226
227 node = new_irq_node();
228 if (!node)
229 return -ENOMEM;
230
231 node->handler = handler;
232 node->flags = flags;
233 node->dev_id = dev_id;
234 node->devname = devname;
235
236 res = setup_irq(irq, node);
237 if (res)
238 node->handler = NULL;
239
240 return res;
241}
242
243EXPORT_SYMBOL(request_irq);
244
245void free_irq(unsigned int irq, void *dev_id)
246{
247 struct irq_controller *contr;
248 struct irq_node **p, *node;
249 unsigned long flags;
250
251 if (irq >= NR_IRQS || !(contr = irq_controller[irq])) {
252 printk("%s: Incorrect IRQ %d\n", __func__, irq);
253 return;
254 }
255
256 spin_lock_irqsave(&contr->lock, flags);
257
258 p = irq_list + irq;
259 while ((node = *p)) {
260 if (node->dev_id == dev_id)
261 break;
262 p = &node->next;
263 }
264
265 if (node) {
266 *p = node->next;
267 node->handler = NULL;
268 } else
269 printk("%s: Removing probably wrong IRQ %d\n",
270 __func__, irq);
271
272 if (!irq_list[irq]) {
273 if (contr->shutdown)
274 contr->shutdown(irq);
275 else
276 contr->disable(irq);
277 }
278
279 spin_unlock_irqrestore(&contr->lock, flags);
280}
281
282EXPORT_SYMBOL(free_irq);
283
284void enable_irq(unsigned int irq)
285{
286 struct irq_controller *contr;
287 unsigned long flags;
288
289 if (irq >= NR_IRQS || !(contr = irq_controller[irq])) {
290 printk("%s: Incorrect IRQ %d\n",
291 __func__, irq);
292 return;
293 }
294
295 spin_lock_irqsave(&contr->lock, flags);
296 if (irq_depth[irq]) {
297 if (!--irq_depth[irq]) {
298 if (contr->enable)
299 contr->enable(irq);
300 }
301 } else
302 WARN_ON(1);
303 spin_unlock_irqrestore(&contr->lock, flags);
304}
305
306EXPORT_SYMBOL(enable_irq);
307
308void disable_irq(unsigned int irq)
309{
310 struct irq_controller *contr;
311 unsigned long flags;
312
313 if (irq >= NR_IRQS || !(contr = irq_controller[irq])) {
314 printk("%s: Incorrect IRQ %d\n",
315 __func__, irq);
316 return;
317 }
318
319 spin_lock_irqsave(&contr->lock, flags);
320 if (!irq_depth[irq]++) {
321 if (contr->disable)
322 contr->disable(irq);
323 }
324 spin_unlock_irqrestore(&contr->lock, flags);
325}
326
327EXPORT_SYMBOL(disable_irq);
328
329void disable_irq_nosync(unsigned int irq) __attribute__((alias("disable_irq")));
330
331EXPORT_SYMBOL(disable_irq_nosync);
332
333int m68k_irq_startup(unsigned int irq)
334{ 136{
335 if (irq <= IRQ_AUTO_7) 137 if (irq <= IRQ_AUTO_7)
336 vectors[VEC_SPUR + irq] = auto_inthandler; 138 vectors[VEC_SPUR + irq] = auto_inthandler;
@@ -339,41 +141,21 @@ int m68k_irq_startup(unsigned int irq)
339 return 0; 141 return 0;
340} 142}
341 143
342void m68k_irq_shutdown(unsigned int irq) 144unsigned int m68k_irq_startup(struct irq_data *data)
343{ 145{
344 if (irq <= IRQ_AUTO_7) 146 return m68k_irq_startup_irq(data->irq);
345 vectors[VEC_SPUR + irq] = bad_inthandler;
346 else
347 vectors[m68k_first_user_vec + irq - IRQ_USER] = bad_inthandler;
348} 147}
349 148
350 149void m68k_irq_shutdown(struct irq_data *data)
351/*
352 * Do we need these probe functions on the m68k?
353 *
354 * ... may be useful with ISA devices
355 */
356unsigned long probe_irq_on (void)
357{ 150{
358#ifdef CONFIG_Q40 151 unsigned int irq = data->irq;
359 if (MACH_IS_Q40)
360 return q40_probe_irq_on();
361#endif
362 return 0;
363}
364 152
365EXPORT_SYMBOL(probe_irq_on); 153 if (irq <= IRQ_AUTO_7)
366 154 vectors[VEC_SPUR + irq] = bad_inthandler;
367int probe_irq_off (unsigned long irqs) 155 else
368{ 156 vectors[m68k_first_user_vec + irq - IRQ_USER] = bad_inthandler;
369#ifdef CONFIG_Q40
370 if (MACH_IS_Q40)
371 return q40_probe_irq_off(irqs);
372#endif
373 return 0;
374} 157}
375 158
376EXPORT_SYMBOL(probe_irq_off);
377 159
378unsigned int irq_canonicalize(unsigned int irq) 160unsigned int irq_canonicalize(unsigned int irq)
379{ 161{
@@ -386,52 +168,9 @@ unsigned int irq_canonicalize(unsigned int irq)
386 168
387EXPORT_SYMBOL(irq_canonicalize); 169EXPORT_SYMBOL(irq_canonicalize);
388 170
389asmlinkage void m68k_handle_int(unsigned int irq)
390{
391 struct irq_node *node;
392 kstat_cpu(0).irqs[irq]++;
393 node = irq_list[irq];
394 do {
395 node->handler(irq, node->dev_id);
396 node = node->next;
397 } while (node);
398}
399
400asmlinkage void __m68k_handle_int(unsigned int irq, struct pt_regs *regs)
401{
402 struct pt_regs *old_regs;
403 old_regs = set_irq_regs(regs);
404 m68k_handle_int(irq);
405 set_irq_regs(old_regs);
406}
407 171
408asmlinkage void handle_badint(struct pt_regs *regs) 172asmlinkage void handle_badint(struct pt_regs *regs)
409{ 173{
410 kstat_cpu(0).irqs[0]++; 174 atomic_inc(&irq_err_count);
411 printk("unexpected interrupt from %u\n", regs->vector); 175 pr_warn("unexpected interrupt from %u\n", regs->vector);
412}
413
414int show_interrupts(struct seq_file *p, void *v)
415{
416 struct irq_controller *contr;
417 struct irq_node *node;
418 int i = *(loff_t *) v;
419
420 /* autovector interrupts */
421 if (irq_list[i]) {
422 contr = irq_controller[i];
423 node = irq_list[i];
424 seq_printf(p, "%-8s %3u: %10u %s", contr->name, i, kstat_cpu(0).irqs[i], node->devname);
425 while ((node = node->next))
426 seq_printf(p, ", %s", node->devname);
427 seq_puts(p, "\n");
428 }
429 return 0;
430}
431
432#ifdef CONFIG_PROC_FS
433void init_irq_proc(void)
434{
435 /* Insert /proc/irq driver here */
436} 176}
437#endif
diff --git a/arch/m68k/kernel/syscalltable.S b/arch/m68k/kernel/syscalltable.S
index c468f2edaa8..ce827b37611 100644
--- a/arch/m68k/kernel/syscalltable.S
+++ b/arch/m68k/kernel/syscalltable.S
@@ -365,4 +365,6 @@ ENTRY(sys_call_table)
365 .long sys_clock_adjtime 365 .long sys_clock_adjtime
366 .long sys_syncfs 366 .long sys_syncfs
367 .long sys_setns 367 .long sys_setns
368 .long sys_process_vm_readv /* 345 */
369 .long sys_process_vm_writev
368 370
diff --git a/arch/m68k/mac/baboon.c b/arch/m68k/mac/baboon.c
index 2a96bebd896..b403924a1ca 100644
--- a/arch/m68k/mac/baboon.c
+++ b/arch/m68k/mac/baboon.c
@@ -11,6 +11,7 @@
11#include <linux/mm.h> 11#include <linux/mm.h>
12#include <linux/delay.h> 12#include <linux/delay.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/irq.h>
14 15
15#include <asm/traps.h> 16#include <asm/traps.h>
16#include <asm/bootinfo.h> 17#include <asm/bootinfo.h>
@@ -20,9 +21,6 @@
20 21
21/* #define DEBUG_IRQS */ 22/* #define DEBUG_IRQS */
22 23
23extern void mac_enable_irq(unsigned int);
24extern void mac_disable_irq(unsigned int);
25
26int baboon_present; 24int baboon_present;
27static volatile struct baboon *baboon; 25static volatile struct baboon *baboon;
28static unsigned char baboon_disabled; 26static unsigned char baboon_disabled;
@@ -53,7 +51,7 @@ void __init baboon_init(void)
53 * Baboon interrupt handler. This works a lot like a VIA. 51 * Baboon interrupt handler. This works a lot like a VIA.
54 */ 52 */
55 53
56static irqreturn_t baboon_irq(int irq, void *dev_id) 54static void baboon_irq(unsigned int irq, struct irq_desc *desc)
57{ 55{
58 int irq_bit, irq_num; 56 int irq_bit, irq_num;
59 unsigned char events; 57 unsigned char events;
@@ -64,15 +62,16 @@ static irqreturn_t baboon_irq(int irq, void *dev_id)
64 (uint) baboon->mb_status); 62 (uint) baboon->mb_status);
65#endif 63#endif
66 64
67 if (!(events = baboon->mb_ifr & 0x07)) 65 events = baboon->mb_ifr & 0x07;
68 return IRQ_NONE; 66 if (!events)
67 return;
69 68
70 irq_num = IRQ_BABOON_0; 69 irq_num = IRQ_BABOON_0;
71 irq_bit = 1; 70 irq_bit = 1;
72 do { 71 do {
73 if (events & irq_bit) { 72 if (events & irq_bit) {
74 baboon->mb_ifr &= ~irq_bit; 73 baboon->mb_ifr &= ~irq_bit;
75 m68k_handle_int(irq_num); 74 generic_handle_irq(irq_num);
76 } 75 }
77 irq_bit <<= 1; 76 irq_bit <<= 1;
78 irq_num++; 77 irq_num++;
@@ -82,7 +81,6 @@ static irqreturn_t baboon_irq(int irq, void *dev_id)
82 /* for now we need to smash all interrupts */ 81 /* for now we need to smash all interrupts */
83 baboon->mb_ifr &= ~events; 82 baboon->mb_ifr &= ~events;
84#endif 83#endif
85 return IRQ_HANDLED;
86} 84}
87 85
88/* 86/*
@@ -92,8 +90,7 @@ static irqreturn_t baboon_irq(int irq, void *dev_id)
92void __init baboon_register_interrupts(void) 90void __init baboon_register_interrupts(void)
93{ 91{
94 baboon_disabled = 0; 92 baboon_disabled = 0;
95 if (request_irq(IRQ_NUBUS_C, baboon_irq, 0, "baboon", (void *)baboon)) 93 irq_set_chained_handler(IRQ_NUBUS_C, baboon_irq);
96 pr_err("Couldn't register baboon interrupt\n");
97} 94}
98 95
99/* 96/*
@@ -111,7 +108,7 @@ void baboon_irq_enable(int irq)
111 108
112 baboon_disabled &= ~(1 << irq_idx); 109 baboon_disabled &= ~(1 << irq_idx);
113 if (!baboon_disabled) 110 if (!baboon_disabled)
114 mac_enable_irq(IRQ_NUBUS_C); 111 mac_irq_enable(irq_get_irq_data(IRQ_NUBUS_C));
115} 112}
116 113
117void baboon_irq_disable(int irq) 114void baboon_irq_disable(int irq)
@@ -124,7 +121,7 @@ void baboon_irq_disable(int irq)
124 121
125 baboon_disabled |= 1 << irq_idx; 122 baboon_disabled |= 1 << irq_idx;
126 if (baboon_disabled) 123 if (baboon_disabled)
127 mac_disable_irq(IRQ_NUBUS_C); 124 mac_irq_disable(irq_get_irq_data(IRQ_NUBUS_C));
128} 125}
129 126
130void baboon_irq_clear(int irq) 127void baboon_irq_clear(int irq)
diff --git a/arch/m68k/mac/iop.c b/arch/m68k/mac/iop.c
index 1ad4e9d80eb..a5462cc0bfd 100644
--- a/arch/m68k/mac/iop.c
+++ b/arch/m68k/mac/iop.c
@@ -305,15 +305,13 @@ void __init iop_register_interrupts(void)
305{ 305{
306 if (iop_ism_present) { 306 if (iop_ism_present) {
307 if (oss_present) { 307 if (oss_present) {
308 if (request_irq(OSS_IRQLEV_IOPISM, iop_ism_irq, 308 if (request_irq(OSS_IRQLEV_IOPISM, iop_ism_irq, 0,
309 IRQ_FLG_LOCK, "ISM IOP", 309 "ISM IOP", (void *)IOP_NUM_ISM))
310 (void *) IOP_NUM_ISM))
311 pr_err("Couldn't register ISM IOP interrupt\n"); 310 pr_err("Couldn't register ISM IOP interrupt\n");
312 oss_irq_enable(IRQ_MAC_ADB); 311 oss_irq_enable(IRQ_MAC_ADB);
313 } else { 312 } else {
314 if (request_irq(IRQ_VIA2_0, iop_ism_irq, 313 if (request_irq(IRQ_VIA2_0, iop_ism_irq, 0, "ISM IOP",
315 IRQ_FLG_LOCK|IRQ_FLG_FAST, "ISM IOP", 314 (void *)IOP_NUM_ISM))
316 (void *) IOP_NUM_ISM))
317 pr_err("Couldn't register ISM IOP interrupt\n"); 315 pr_err("Couldn't register ISM IOP interrupt\n");
318 } 316 }
319 if (!iop_alive(iop_base[IOP_NUM_ISM])) { 317 if (!iop_alive(iop_base[IOP_NUM_ISM])) {
diff --git a/arch/m68k/mac/macints.c b/arch/m68k/mac/macints.c
index f92190c159b..ba220b70ab8 100644
--- a/arch/m68k/mac/macints.c
+++ b/arch/m68k/mac/macints.c
@@ -190,14 +190,10 @@ irqreturn_t mac_debug_handler(int, void *);
190 190
191/* #define DEBUG_MACINTS */ 191/* #define DEBUG_MACINTS */
192 192
193void mac_enable_irq(unsigned int irq); 193static struct irq_chip mac_irq_chip = {
194void mac_disable_irq(unsigned int irq);
195
196static struct irq_controller mac_irq_controller = {
197 .name = "mac", 194 .name = "mac",
198 .lock = __SPIN_LOCK_UNLOCKED(mac_irq_controller.lock), 195 .irq_enable = mac_irq_enable,
199 .enable = mac_enable_irq, 196 .irq_disable = mac_irq_disable,
200 .disable = mac_disable_irq,
201}; 197};
202 198
203void __init mac_init_IRQ(void) 199void __init mac_init_IRQ(void)
@@ -205,7 +201,7 @@ void __init mac_init_IRQ(void)
205#ifdef DEBUG_MACINTS 201#ifdef DEBUG_MACINTS
206 printk("mac_init_IRQ(): Setting things up...\n"); 202 printk("mac_init_IRQ(): Setting things up...\n");
207#endif 203#endif
208 m68k_setup_irq_controller(&mac_irq_controller, IRQ_USER, 204 m68k_setup_irq_controller(&mac_irq_chip, handle_simple_irq, IRQ_USER,
209 NUM_MAC_SOURCES - IRQ_USER); 205 NUM_MAC_SOURCES - IRQ_USER);
210 /* Make sure the SONIC interrupt is cleared or things get ugly */ 206 /* Make sure the SONIC interrupt is cleared or things get ugly */
211#ifdef SHUTUP_SONIC 207#ifdef SHUTUP_SONIC
@@ -241,16 +237,17 @@ void __init mac_init_IRQ(void)
241} 237}
242 238
243/* 239/*
244 * mac_enable_irq - enable an interrupt source 240 * mac_irq_enable - enable an interrupt source
245 * mac_disable_irq - disable an interrupt source 241 * mac_irq_disable - disable an interrupt source
246 * mac_clear_irq - clears a pending interrupt 242 * mac_clear_irq - clears a pending interrupt
247 * mac_pending_irq - Returns the pending status of an IRQ (nonzero = pending) 243 * mac_irq_pending - returns the pending status of an IRQ (nonzero = pending)
248 * 244 *
249 * These routines are just dispatchers to the VIA/OSS/PSC routines. 245 * These routines are just dispatchers to the VIA/OSS/PSC routines.
250 */ 246 */
251 247
252void mac_enable_irq(unsigned int irq) 248void mac_irq_enable(struct irq_data *data)
253{ 249{
250 int irq = data->irq;
254 int irq_src = IRQ_SRC(irq); 251 int irq_src = IRQ_SRC(irq);
255 252
256 switch(irq_src) { 253 switch(irq_src) {
@@ -283,8 +280,9 @@ void mac_enable_irq(unsigned int irq)
283 } 280 }
284} 281}
285 282
286void mac_disable_irq(unsigned int irq) 283void mac_irq_disable(struct irq_data *data)
287{ 284{
285 int irq = data->irq;
288 int irq_src = IRQ_SRC(irq); 286 int irq_src = IRQ_SRC(irq);
289 287
290 switch(irq_src) { 288 switch(irq_src) {
diff --git a/arch/m68k/mac/oss.c b/arch/m68k/mac/oss.c
index a9c0f5ab4cc..a4c82dab9ff 100644
--- a/arch/m68k/mac/oss.c
+++ b/arch/m68k/mac/oss.c
@@ -19,6 +19,7 @@
19#include <linux/mm.h> 19#include <linux/mm.h>
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/irq.h>
22 23
23#include <asm/bootinfo.h> 24#include <asm/bootinfo.h>
24#include <asm/macintosh.h> 25#include <asm/macintosh.h>
@@ -29,10 +30,7 @@
29int oss_present; 30int oss_present;
30volatile struct mac_oss *oss; 31volatile struct mac_oss *oss;
31 32
32static irqreturn_t oss_irq(int, void *); 33extern void via1_irq(unsigned int irq, struct irq_desc *desc);
33static irqreturn_t oss_nubus_irq(int, void *);
34
35extern irqreturn_t via1_irq(int, void *);
36 34
37/* 35/*
38 * Initialize the OSS 36 * Initialize the OSS
@@ -60,26 +58,6 @@ void __init oss_init(void)
60} 58}
61 59
62/* 60/*
63 * Register the OSS and NuBus interrupt dispatchers.
64 */
65
66void __init oss_register_interrupts(void)
67{
68 if (request_irq(OSS_IRQLEV_SCSI, oss_irq, IRQ_FLG_LOCK,
69 "scsi", (void *) oss))
70 pr_err("Couldn't register %s interrupt\n", "scsi");
71 if (request_irq(OSS_IRQLEV_NUBUS, oss_nubus_irq, IRQ_FLG_LOCK,
72 "nubus", (void *) oss))
73 pr_err("Couldn't register %s interrupt\n", "nubus");
74 if (request_irq(OSS_IRQLEV_SOUND, oss_irq, IRQ_FLG_LOCK,
75 "sound", (void *) oss))
76 pr_err("Couldn't register %s interrupt\n", "sound");
77 if (request_irq(OSS_IRQLEV_VIA1, via1_irq, IRQ_FLG_LOCK,
78 "via1", (void *) via1))
79 pr_err("Couldn't register %s interrupt\n", "via1");
80}
81
82/*
83 * Initialize OSS for Nubus access 61 * Initialize OSS for Nubus access
84 */ 62 */
85 63
@@ -92,17 +70,17 @@ void __init oss_nubus_init(void)
92 * and SCSI; everything else is routed to its own autovector IRQ. 70 * and SCSI; everything else is routed to its own autovector IRQ.
93 */ 71 */
94 72
95static irqreturn_t oss_irq(int irq, void *dev_id) 73static void oss_irq(unsigned int irq, struct irq_desc *desc)
96{ 74{
97 int events; 75 int events;
98 76
99 events = oss->irq_pending & (OSS_IP_SOUND|OSS_IP_SCSI); 77 events = oss->irq_pending & (OSS_IP_SOUND|OSS_IP_SCSI);
100 if (!events) 78 if (!events)
101 return IRQ_NONE; 79 return;
102 80
103#ifdef DEBUG_IRQS 81#ifdef DEBUG_IRQS
104 if ((console_loglevel == 10) && !(events & OSS_IP_SCSI)) { 82 if ((console_loglevel == 10) && !(events & OSS_IP_SCSI)) {
105 printk("oss_irq: irq %d events = 0x%04X\n", irq, 83 printk("oss_irq: irq %u events = 0x%04X\n", irq,
106 (int) oss->irq_pending); 84 (int) oss->irq_pending);
107 } 85 }
108#endif 86#endif
@@ -113,11 +91,10 @@ static irqreturn_t oss_irq(int irq, void *dev_id)
113 /* FIXME: call sound handler */ 91 /* FIXME: call sound handler */
114 } else if (events & OSS_IP_SCSI) { 92 } else if (events & OSS_IP_SCSI) {
115 oss->irq_pending &= ~OSS_IP_SCSI; 93 oss->irq_pending &= ~OSS_IP_SCSI;
116 m68k_handle_int(IRQ_MAC_SCSI); 94 generic_handle_irq(IRQ_MAC_SCSI);
117 } else { 95 } else {
118 /* FIXME: error check here? */ 96 /* FIXME: error check here? */
119 } 97 }
120 return IRQ_HANDLED;
121} 98}
122 99
123/* 100/*
@@ -126,13 +103,13 @@ static irqreturn_t oss_irq(int irq, void *dev_id)
126 * Unlike the VIA/RBV this is on its own autovector interrupt level. 103 * Unlike the VIA/RBV this is on its own autovector interrupt level.
127 */ 104 */
128 105
129static irqreturn_t oss_nubus_irq(int irq, void *dev_id) 106static void oss_nubus_irq(unsigned int irq, struct irq_desc *desc)
130{ 107{
131 int events, irq_bit, i; 108 int events, irq_bit, i;
132 109
133 events = oss->irq_pending & OSS_IP_NUBUS; 110 events = oss->irq_pending & OSS_IP_NUBUS;
134 if (!events) 111 if (!events)
135 return IRQ_NONE; 112 return;
136 113
137#ifdef DEBUG_NUBUS_INT 114#ifdef DEBUG_NUBUS_INT
138 if (console_loglevel > 7) { 115 if (console_loglevel > 7) {
@@ -148,10 +125,21 @@ static irqreturn_t oss_nubus_irq(int irq, void *dev_id)
148 irq_bit >>= 1; 125 irq_bit >>= 1;
149 if (events & irq_bit) { 126 if (events & irq_bit) {
150 oss->irq_pending &= ~irq_bit; 127 oss->irq_pending &= ~irq_bit;
151 m68k_handle_int(NUBUS_SOURCE_BASE + i); 128 generic_handle_irq(NUBUS_SOURCE_BASE + i);
152 } 129 }
153 } while(events & (irq_bit - 1)); 130 } while(events & (irq_bit - 1));
154 return IRQ_HANDLED; 131}
132
133/*
134 * Register the OSS and NuBus interrupt dispatchers.
135 */
136
137void __init oss_register_interrupts(void)
138{
139 irq_set_chained_handler(OSS_IRQLEV_SCSI, oss_irq);
140 irq_set_chained_handler(OSS_IRQLEV_NUBUS, oss_nubus_irq);
141 irq_set_chained_handler(OSS_IRQLEV_SOUND, oss_irq);
142 irq_set_chained_handler(OSS_IRQLEV_VIA1, via1_irq);
155} 143}
156 144
157/* 145/*
diff --git a/arch/m68k/mac/psc.c b/arch/m68k/mac/psc.c
index a4c3eb60706..e6c2d20f328 100644
--- a/arch/m68k/mac/psc.c
+++ b/arch/m68k/mac/psc.c
@@ -18,6 +18,7 @@
18#include <linux/mm.h> 18#include <linux/mm.h>
19#include <linux/delay.h> 19#include <linux/delay.h>
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/irq.h>
21 22
22#include <asm/traps.h> 23#include <asm/traps.h>
23#include <asm/bootinfo.h> 24#include <asm/bootinfo.h>
@@ -30,8 +31,6 @@
30int psc_present; 31int psc_present;
31volatile __u8 *psc; 32volatile __u8 *psc;
32 33
33irqreturn_t psc_irq(int, void *);
34
35/* 34/*
36 * Debugging dump, used in various places to see what's going on. 35 * Debugging dump, used in various places to see what's going on.
37 */ 36 */
@@ -112,52 +111,52 @@ void __init psc_init(void)
112} 111}
113 112
114/* 113/*
115 * Register the PSC interrupt dispatchers for autovector interrupts 3-6.
116 */
117
118void __init psc_register_interrupts(void)
119{
120 if (request_irq(IRQ_AUTO_3, psc_irq, 0, "psc3", (void *) 0x30))
121 pr_err("Couldn't register psc%d interrupt\n", 3);
122 if (request_irq(IRQ_AUTO_4, psc_irq, 0, "psc4", (void *) 0x40))
123 pr_err("Couldn't register psc%d interrupt\n", 4);
124 if (request_irq(IRQ_AUTO_5, psc_irq, 0, "psc5", (void *) 0x50))
125 pr_err("Couldn't register psc%d interrupt\n", 5);
126 if (request_irq(IRQ_AUTO_6, psc_irq, 0, "psc6", (void *) 0x60))
127 pr_err("Couldn't register psc%d interrupt\n", 6);
128}
129
130/*
131 * PSC interrupt handler. It's a lot like the VIA interrupt handler. 114 * PSC interrupt handler. It's a lot like the VIA interrupt handler.
132 */ 115 */
133 116
134irqreturn_t psc_irq(int irq, void *dev_id) 117static void psc_irq(unsigned int irq, struct irq_desc *desc)
135{ 118{
136 int pIFR = pIFRbase + ((int) dev_id); 119 unsigned int offset = (unsigned int)irq_desc_get_handler_data(desc);
137 int pIER = pIERbase + ((int) dev_id); 120 int pIFR = pIFRbase + offset;
121 int pIER = pIERbase + offset;
138 int irq_num; 122 int irq_num;
139 unsigned char irq_bit, events; 123 unsigned char irq_bit, events;
140 124
141#ifdef DEBUG_IRQS 125#ifdef DEBUG_IRQS
142 printk("psc_irq: irq %d pIFR = 0x%02X pIER = 0x%02X\n", 126 printk("psc_irq: irq %u pIFR = 0x%02X pIER = 0x%02X\n",
143 irq, (int) psc_read_byte(pIFR), (int) psc_read_byte(pIER)); 127 irq, (int) psc_read_byte(pIFR), (int) psc_read_byte(pIER));
144#endif 128#endif
145 129
146 events = psc_read_byte(pIFR) & psc_read_byte(pIER) & 0xF; 130 events = psc_read_byte(pIFR) & psc_read_byte(pIER) & 0xF;
147 if (!events) 131 if (!events)
148 return IRQ_NONE; 132 return;
149 133
150 irq_num = irq << 3; 134 irq_num = irq << 3;
151 irq_bit = 1; 135 irq_bit = 1;
152 do { 136 do {
153 if (events & irq_bit) { 137 if (events & irq_bit) {
154 psc_write_byte(pIFR, irq_bit); 138 psc_write_byte(pIFR, irq_bit);
155 m68k_handle_int(irq_num); 139 generic_handle_irq(irq_num);
156 } 140 }
157 irq_num++; 141 irq_num++;
158 irq_bit <<= 1; 142 irq_bit <<= 1;
159 } while (events >= irq_bit); 143 } while (events >= irq_bit);
160 return IRQ_HANDLED; 144}
145
146/*
147 * Register the PSC interrupt dispatchers for autovector interrupts 3-6.
148 */
149
150void __init psc_register_interrupts(void)
151{
152 irq_set_chained_handler(IRQ_AUTO_3, psc_irq);
153 irq_set_handler_data(IRQ_AUTO_3, (void *)0x30);
154 irq_set_chained_handler(IRQ_AUTO_4, psc_irq);
155 irq_set_handler_data(IRQ_AUTO_4, (void *)0x40);
156 irq_set_chained_handler(IRQ_AUTO_5, psc_irq);
157 irq_set_handler_data(IRQ_AUTO_5, (void *)0x50);
158 irq_set_chained_handler(IRQ_AUTO_6, psc_irq);
159 irq_set_handler_data(IRQ_AUTO_6, (void *)0x60);
161} 160}
162 161
163void psc_irq_enable(int irq) { 162void psc_irq_enable(int irq) {
diff --git a/arch/m68k/mac/via.c b/arch/m68k/mac/via.c
index e71166daec6..f1600ad2662 100644
--- a/arch/m68k/mac/via.c
+++ b/arch/m68k/mac/via.c
@@ -28,6 +28,7 @@
28#include <linux/delay.h> 28#include <linux/delay.h>
29#include <linux/init.h> 29#include <linux/init.h>
30#include <linux/module.h> 30#include <linux/module.h>
31#include <linux/irq.h>
31 32
32#include <asm/bootinfo.h> 33#include <asm/bootinfo.h>
33#include <asm/macintosh.h> 34#include <asm/macintosh.h>
@@ -77,9 +78,6 @@ static int gIER,gIFR,gBufA,gBufB;
77static u8 nubus_disabled; 78static u8 nubus_disabled;
78 79
79void via_debug_dump(void); 80void via_debug_dump(void);
80irqreturn_t via1_irq(int, void *);
81irqreturn_t via2_irq(int, void *);
82irqreturn_t via_nubus_irq(int, void *);
83void via_irq_enable(int irq); 81void via_irq_enable(int irq);
84void via_irq_disable(int irq); 82void via_irq_disable(int irq);
85void via_irq_clear(int irq); 83void via_irq_clear(int irq);
@@ -281,40 +279,11 @@ void __init via_init_clock(irq_handler_t func)
281 via1[vT1CL] = MAC_CLOCK_LOW; 279 via1[vT1CL] = MAC_CLOCK_LOW;
282 via1[vT1CH] = MAC_CLOCK_HIGH; 280 via1[vT1CH] = MAC_CLOCK_HIGH;
283 281
284 if (request_irq(IRQ_MAC_TIMER_1, func, IRQ_FLG_LOCK, "timer", func)) 282 if (request_irq(IRQ_MAC_TIMER_1, func, 0, "timer", func))
285 pr_err("Couldn't register %s interrupt\n", "timer"); 283 pr_err("Couldn't register %s interrupt\n", "timer");
286} 284}
287 285
288/* 286/*
289 * Register the interrupt dispatchers for VIA or RBV machines only.
290 */
291
292void __init via_register_interrupts(void)
293{
294 if (via_alt_mapping) {
295 if (request_irq(IRQ_AUTO_1, via1_irq,
296 IRQ_FLG_LOCK|IRQ_FLG_FAST, "software",
297 (void *) via1))
298 pr_err("Couldn't register %s interrupt\n", "software");
299 if (request_irq(IRQ_AUTO_6, via1_irq,
300 IRQ_FLG_LOCK|IRQ_FLG_FAST, "via1",
301 (void *) via1))
302 pr_err("Couldn't register %s interrupt\n", "via1");
303 } else {
304 if (request_irq(IRQ_AUTO_1, via1_irq,
305 IRQ_FLG_LOCK|IRQ_FLG_FAST, "via1",
306 (void *) via1))
307 pr_err("Couldn't register %s interrupt\n", "via1");
308 }
309 if (request_irq(IRQ_AUTO_2, via2_irq, IRQ_FLG_LOCK|IRQ_FLG_FAST,
310 "via2", (void *) via2))
311 pr_err("Couldn't register %s interrupt\n", "via2");
312 if (request_irq(IRQ_MAC_NUBUS, via_nubus_irq,
313 IRQ_FLG_LOCK|IRQ_FLG_FAST, "nubus", (void *) via2))
314 pr_err("Couldn't register %s interrupt\n", "nubus");
315}
316
317/*
318 * Debugging dump, used in various places to see what's going on. 287 * Debugging dump, used in various places to see what's going on.
319 */ 288 */
320 289
@@ -446,48 +415,46 @@ void __init via_nubus_init(void)
446 * via6522.c :-), disable/pending masks added. 415 * via6522.c :-), disable/pending masks added.
447 */ 416 */
448 417
449irqreturn_t via1_irq(int irq, void *dev_id) 418void via1_irq(unsigned int irq, struct irq_desc *desc)
450{ 419{
451 int irq_num; 420 int irq_num;
452 unsigned char irq_bit, events; 421 unsigned char irq_bit, events;
453 422
454 events = via1[vIFR] & via1[vIER] & 0x7F; 423 events = via1[vIFR] & via1[vIER] & 0x7F;
455 if (!events) 424 if (!events)
456 return IRQ_NONE; 425 return;
457 426
458 irq_num = VIA1_SOURCE_BASE; 427 irq_num = VIA1_SOURCE_BASE;
459 irq_bit = 1; 428 irq_bit = 1;
460 do { 429 do {
461 if (events & irq_bit) { 430 if (events & irq_bit) {
462 via1[vIFR] = irq_bit; 431 via1[vIFR] = irq_bit;
463 m68k_handle_int(irq_num); 432 generic_handle_irq(irq_num);
464 } 433 }
465 ++irq_num; 434 ++irq_num;
466 irq_bit <<= 1; 435 irq_bit <<= 1;
467 } while (events >= irq_bit); 436 } while (events >= irq_bit);
468 return IRQ_HANDLED;
469} 437}
470 438
471irqreturn_t via2_irq(int irq, void *dev_id) 439static void via2_irq(unsigned int irq, struct irq_desc *desc)
472{ 440{
473 int irq_num; 441 int irq_num;
474 unsigned char irq_bit, events; 442 unsigned char irq_bit, events;
475 443
476 events = via2[gIFR] & via2[gIER] & 0x7F; 444 events = via2[gIFR] & via2[gIER] & 0x7F;
477 if (!events) 445 if (!events)
478 return IRQ_NONE; 446 return;
479 447
480 irq_num = VIA2_SOURCE_BASE; 448 irq_num = VIA2_SOURCE_BASE;
481 irq_bit = 1; 449 irq_bit = 1;
482 do { 450 do {
483 if (events & irq_bit) { 451 if (events & irq_bit) {
484 via2[gIFR] = irq_bit | rbv_clear; 452 via2[gIFR] = irq_bit | rbv_clear;
485 m68k_handle_int(irq_num); 453 generic_handle_irq(irq_num);
486 } 454 }
487 ++irq_num; 455 ++irq_num;
488 irq_bit <<= 1; 456 irq_bit <<= 1;
489 } while (events >= irq_bit); 457 } while (events >= irq_bit);
490 return IRQ_HANDLED;
491} 458}
492 459
493/* 460/*
@@ -495,7 +462,7 @@ irqreturn_t via2_irq(int irq, void *dev_id)
495 * VIA2 dispatcher as a fast interrupt handler. 462 * VIA2 dispatcher as a fast interrupt handler.
496 */ 463 */
497 464
498irqreturn_t via_nubus_irq(int irq, void *dev_id) 465void via_nubus_irq(unsigned int irq, struct irq_desc *desc)
499{ 466{
500 int slot_irq; 467 int slot_irq;
501 unsigned char slot_bit, events; 468 unsigned char slot_bit, events;
@@ -506,7 +473,7 @@ irqreturn_t via_nubus_irq(int irq, void *dev_id)
506 else 473 else
507 events &= ~via2[vDirA]; 474 events &= ~via2[vDirA];
508 if (!events) 475 if (!events)
509 return IRQ_NONE; 476 return;
510 477
511 do { 478 do {
512 slot_irq = IRQ_NUBUS_F; 479 slot_irq = IRQ_NUBUS_F;
@@ -514,7 +481,7 @@ irqreturn_t via_nubus_irq(int irq, void *dev_id)
514 do { 481 do {
515 if (events & slot_bit) { 482 if (events & slot_bit) {
516 events &= ~slot_bit; 483 events &= ~slot_bit;
517 m68k_handle_int(slot_irq); 484 generic_handle_irq(slot_irq);
518 } 485 }
519 --slot_irq; 486 --slot_irq;
520 slot_bit >>= 1; 487 slot_bit >>= 1;
@@ -528,7 +495,24 @@ irqreturn_t via_nubus_irq(int irq, void *dev_id)
528 else 495 else
529 events &= ~via2[vDirA]; 496 events &= ~via2[vDirA];
530 } while (events); 497 } while (events);
531 return IRQ_HANDLED; 498}
499
500/*
501 * Register the interrupt dispatchers for VIA or RBV machines only.
502 */
503
504void __init via_register_interrupts(void)
505{
506 if (via_alt_mapping) {
507 /* software interrupt */
508 irq_set_chained_handler(IRQ_AUTO_1, via1_irq);
509 /* via1 interrupt */
510 irq_set_chained_handler(IRQ_AUTO_6, via1_irq);
511 } else {
512 irq_set_chained_handler(IRQ_AUTO_1, via1_irq);
513 }
514 irq_set_chained_handler(IRQ_AUTO_2, via2_irq);
515 irq_set_chained_handler(IRQ_MAC_NUBUS, via_nubus_irq);
532} 516}
533 517
534void via_irq_enable(int irq) { 518void via_irq_enable(int irq) {
diff --git a/arch/m68k/mvme147/config.c b/arch/m68k/mvme147/config.c
index 6cb9c3a9b6c..5de924ef42e 100644
--- a/arch/m68k/mvme147/config.c
+++ b/arch/m68k/mvme147/config.c
@@ -81,7 +81,7 @@ static void mvme147_get_model(char *model)
81 81
82void __init mvme147_init_IRQ(void) 82void __init mvme147_init_IRQ(void)
83{ 83{
84 m68k_setup_user_interrupt(VEC_USER, 192, NULL); 84 m68k_setup_user_interrupt(VEC_USER, 192);
85} 85}
86 86
87void __init config_mvme147(void) 87void __init config_mvme147(void)
@@ -114,8 +114,7 @@ static irqreturn_t mvme147_timer_int (int irq, void *dev_id)
114void mvme147_sched_init (irq_handler_t timer_routine) 114void mvme147_sched_init (irq_handler_t timer_routine)
115{ 115{
116 tick_handler = timer_routine; 116 tick_handler = timer_routine;
117 if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, IRQ_FLG_REPLACE, 117 if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, 0, "timer 1", NULL))
118 "timer 1", NULL))
119 pr_err("Couldn't register timer interrupt\n"); 118 pr_err("Couldn't register timer interrupt\n");
120 119
121 /* Init the clock with a value */ 120 /* Init the clock with a value */
diff --git a/arch/m68k/mvme16x/config.c b/arch/m68k/mvme16x/config.c
index 0b28e262165..31a66d99cbc 100644
--- a/arch/m68k/mvme16x/config.c
+++ b/arch/m68k/mvme16x/config.c
@@ -117,7 +117,7 @@ static void mvme16x_get_hardware_list(struct seq_file *m)
117 117
118static void __init mvme16x_init_IRQ (void) 118static void __init mvme16x_init_IRQ (void)
119{ 119{
120 m68k_setup_user_interrupt(VEC_USER, 192, NULL); 120 m68k_setup_user_interrupt(VEC_USER, 192);
121} 121}
122 122
123#define pcc2chip ((volatile u_char *)0xfff42000) 123#define pcc2chip ((volatile u_char *)0xfff42000)
diff --git a/arch/m68k/q40/q40ints.c b/arch/m68k/q40/q40ints.c
index 9f0e3d59bf9..2b888491f29 100644
--- a/arch/m68k/q40/q40ints.c
+++ b/arch/m68k/q40/q40ints.c
@@ -15,10 +15,10 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/errno.h> 16#include <linux/errno.h>
17#include <linux/interrupt.h> 17#include <linux/interrupt.h>
18#include <linux/irq.h>
18 19
19#include <asm/ptrace.h> 20#include <asm/ptrace.h>
20#include <asm/system.h> 21#include <asm/system.h>
21#include <asm/irq.h>
22#include <asm/traps.h> 22#include <asm/traps.h>
23 23
24#include <asm/q40_master.h> 24#include <asm/q40_master.h>
@@ -35,35 +35,36 @@
35*/ 35*/
36 36
37static void q40_irq_handler(unsigned int, struct pt_regs *fp); 37static void q40_irq_handler(unsigned int, struct pt_regs *fp);
38static void q40_enable_irq(unsigned int); 38static void q40_irq_enable(struct irq_data *data);
39static void q40_disable_irq(unsigned int); 39static void q40_irq_disable(struct irq_data *data);
40 40
41unsigned short q40_ablecount[35]; 41unsigned short q40_ablecount[35];
42unsigned short q40_state[35]; 42unsigned short q40_state[35];
43 43
44static int q40_irq_startup(unsigned int irq) 44static unsigned int q40_irq_startup(struct irq_data *data)
45{ 45{
46 unsigned int irq = data->irq;
47
46 /* test for ISA ints not implemented by HW */ 48 /* test for ISA ints not implemented by HW */
47 switch (irq) { 49 switch (irq) {
48 case 1: case 2: case 8: case 9: 50 case 1: case 2: case 8: case 9:
49 case 11: case 12: case 13: 51 case 11: case 12: case 13:
50 printk("%s: ISA IRQ %d not implemented by HW\n", __func__, irq); 52 printk("%s: ISA IRQ %d not implemented by HW\n", __func__, irq);
51 return -ENXIO; 53 /* FIXME return -ENXIO; */
52 } 54 }
53 return 0; 55 return 0;
54} 56}
55 57
56static void q40_irq_shutdown(unsigned int irq) 58static void q40_irq_shutdown(struct irq_data *data)
57{ 59{
58} 60}
59 61
60static struct irq_controller q40_irq_controller = { 62static struct irq_chip q40_irq_chip = {
61 .name = "q40", 63 .name = "q40",
62 .lock = __SPIN_LOCK_UNLOCKED(q40_irq_controller.lock), 64 .irq_startup = q40_irq_startup,
63 .startup = q40_irq_startup, 65 .irq_shutdown = q40_irq_shutdown,
64 .shutdown = q40_irq_shutdown, 66 .irq_enable = q40_irq_enable,
65 .enable = q40_enable_irq, 67 .irq_disable = q40_irq_disable,
66 .disable = q40_disable_irq,
67}; 68};
68 69
69/* 70/*
@@ -81,13 +82,14 @@ static int disabled;
81 82
82void __init q40_init_IRQ(void) 83void __init q40_init_IRQ(void)
83{ 84{
84 m68k_setup_irq_controller(&q40_irq_controller, 1, Q40_IRQ_MAX); 85 m68k_setup_irq_controller(&q40_irq_chip, handle_simple_irq, 1,
86 Q40_IRQ_MAX);
85 87
86 /* setup handler for ISA ints */ 88 /* setup handler for ISA ints */
87 m68k_setup_auto_interrupt(q40_irq_handler); 89 m68k_setup_auto_interrupt(q40_irq_handler);
88 90
89 m68k_irq_startup(IRQ_AUTO_2); 91 m68k_irq_startup_irq(IRQ_AUTO_2);
90 m68k_irq_startup(IRQ_AUTO_4); 92 m68k_irq_startup_irq(IRQ_AUTO_4);
91 93
92 /* now enable some ints.. */ 94 /* now enable some ints.. */
93 master_outb(1, EXT_ENABLE_REG); /* ISA IRQ 5-15 */ 95 master_outb(1, EXT_ENABLE_REG); /* ISA IRQ 5-15 */
@@ -218,11 +220,11 @@ static void q40_irq_handler(unsigned int irq, struct pt_regs *fp)
218 switch (irq) { 220 switch (irq) {
219 case 4: 221 case 4:
220 case 6: 222 case 6:
221 __m68k_handle_int(Q40_IRQ_SAMPLE, fp); 223 do_IRQ(Q40_IRQ_SAMPLE, fp);
222 return; 224 return;
223 } 225 }
224 if (mir & Q40_IRQ_FRAME_MASK) { 226 if (mir & Q40_IRQ_FRAME_MASK) {
225 __m68k_handle_int(Q40_IRQ_FRAME, fp); 227 do_IRQ(Q40_IRQ_FRAME, fp);
226 master_outb(-1, FRAME_CLEAR_REG); 228 master_outb(-1, FRAME_CLEAR_REG);
227 } 229 }
228 if ((mir & Q40_IRQ_SER_MASK) || (mir & Q40_IRQ_EXT_MASK)) { 230 if ((mir & Q40_IRQ_SER_MASK) || (mir & Q40_IRQ_EXT_MASK)) {
@@ -257,7 +259,7 @@ static void q40_irq_handler(unsigned int irq, struct pt_regs *fp)
257 goto iirq; 259 goto iirq;
258 } 260 }
259 q40_state[irq] |= IRQ_INPROGRESS; 261 q40_state[irq] |= IRQ_INPROGRESS;
260 __m68k_handle_int(irq, fp); 262 do_IRQ(irq, fp);
261 q40_state[irq] &= ~IRQ_INPROGRESS; 263 q40_state[irq] &= ~IRQ_INPROGRESS;
262 264
263 /* naively enable everything, if that fails than */ 265 /* naively enable everything, if that fails than */
@@ -288,25 +290,29 @@ static void q40_irq_handler(unsigned int irq, struct pt_regs *fp)
288 mir = master_inb(IIRQ_REG); 290 mir = master_inb(IIRQ_REG);
289 /* should test whether keyboard irq is really enabled, doing it in defhand */ 291 /* should test whether keyboard irq is really enabled, doing it in defhand */
290 if (mir & Q40_IRQ_KEYB_MASK) 292 if (mir & Q40_IRQ_KEYB_MASK)
291 __m68k_handle_int(Q40_IRQ_KEYBOARD, fp); 293 do_IRQ(Q40_IRQ_KEYBOARD, fp);
292 294
293 return; 295 return;
294} 296}
295 297
296void q40_enable_irq(unsigned int irq) 298void q40_irq_enable(struct irq_data *data)
297{ 299{
300 unsigned int irq = data->irq;
301
298 if (irq >= 5 && irq <= 15) { 302 if (irq >= 5 && irq <= 15) {
299 mext_disabled--; 303 mext_disabled--;
300 if (mext_disabled > 0) 304 if (mext_disabled > 0)
301 printk("q40_enable_irq : nested disable/enable\n"); 305 printk("q40_irq_enable : nested disable/enable\n");
302 if (mext_disabled == 0) 306 if (mext_disabled == 0)
303 master_outb(1, EXT_ENABLE_REG); 307 master_outb(1, EXT_ENABLE_REG);
304 } 308 }
305} 309}
306 310
307 311
308void q40_disable_irq(unsigned int irq) 312void q40_irq_disable(struct irq_data *data)
309{ 313{
314 unsigned int irq = data->irq;
315
310 /* disable ISA iqs : only do something if the driver has been 316 /* disable ISA iqs : only do something if the driver has been
311 * verified to be Q40 "compatible" - right now IDE, NE2K 317 * verified to be Q40 "compatible" - right now IDE, NE2K
312 * Any driver should not attempt to sleep across disable_irq !! 318 * Any driver should not attempt to sleep across disable_irq !!
@@ -319,13 +325,3 @@ void q40_disable_irq(unsigned int irq)
319 printk("disable_irq nesting count %d\n",mext_disabled); 325 printk("disable_irq nesting count %d\n",mext_disabled);
320 } 326 }
321} 327}
322
323unsigned long q40_probe_irq_on(void)
324{
325 printk("irq probing not working - reconfigure the driver to avoid this\n");
326 return -1;
327}
328int q40_probe_irq_off(unsigned long irqs)
329{
330 return -1;
331}
diff --git a/arch/m68k/sun3/sun3ints.c b/arch/m68k/sun3/sun3ints.c
index 6464ad3ae3e..78b60f53e90 100644
--- a/arch/m68k/sun3/sun3ints.c
+++ b/arch/m68k/sun3/sun3ints.c
@@ -51,25 +51,29 @@ void sun3_disable_irq(unsigned int irq)
51 51
52static irqreturn_t sun3_int7(int irq, void *dev_id) 52static irqreturn_t sun3_int7(int irq, void *dev_id)
53{ 53{
54 *sun3_intreg |= (1 << irq); 54 unsigned int cnt;
55 if (!(kstat_cpu(0).irqs[irq] % 2000)) 55
56 sun3_leds(led_pattern[(kstat_cpu(0).irqs[irq] % 16000) / 2000]); 56 cnt = kstat_irqs_cpu(irq, 0);
57 if (!(cnt % 2000))
58 sun3_leds(led_pattern[cnt % 16000 / 2000]);
57 return IRQ_HANDLED; 59 return IRQ_HANDLED;
58} 60}
59 61
60static irqreturn_t sun3_int5(int irq, void *dev_id) 62static irqreturn_t sun3_int5(int irq, void *dev_id)
61{ 63{
64 unsigned int cnt;
65
62#ifdef CONFIG_SUN3 66#ifdef CONFIG_SUN3
63 intersil_clear(); 67 intersil_clear();
64#endif 68#endif
65 *sun3_intreg |= (1 << irq);
66#ifdef CONFIG_SUN3 69#ifdef CONFIG_SUN3
67 intersil_clear(); 70 intersil_clear();
68#endif 71#endif
69 xtime_update(1); 72 xtime_update(1);
70 update_process_times(user_mode(get_irq_regs())); 73 update_process_times(user_mode(get_irq_regs()));
71 if (!(kstat_cpu(0).irqs[irq] % 20)) 74 cnt = kstat_irqs_cpu(irq, 0);
72 sun3_leds(led_pattern[(kstat_cpu(0).irqs[irq] % 160) / 20]); 75 if (!(cnt % 20))
76 sun3_leds(led_pattern[cnt % 160 / 20]);
73 return IRQ_HANDLED; 77 return IRQ_HANDLED;
74} 78}
75 79
@@ -79,29 +83,33 @@ static irqreturn_t sun3_vec255(int irq, void *dev_id)
79 return IRQ_HANDLED; 83 return IRQ_HANDLED;
80} 84}
81 85
82static void sun3_inthandle(unsigned int irq, struct pt_regs *fp) 86static void sun3_irq_enable(struct irq_data *data)
83{ 87{
84 *sun3_intreg &= ~(1 << irq); 88 sun3_enable_irq(data->irq);
89};
85 90
86 __m68k_handle_int(irq, fp); 91static void sun3_irq_disable(struct irq_data *data)
87} 92{
93 sun3_disable_irq(data->irq);
94};
88 95
89static struct irq_controller sun3_irq_controller = { 96static struct irq_chip sun3_irq_chip = {
90 .name = "sun3", 97 .name = "sun3",
91 .lock = __SPIN_LOCK_UNLOCKED(sun3_irq_controller.lock), 98 .irq_startup = m68k_irq_startup,
92 .startup = m68k_irq_startup, 99 .irq_shutdown = m68k_irq_shutdown,
93 .shutdown = m68k_irq_shutdown, 100 .irq_enable = sun3_irq_enable,
94 .enable = sun3_enable_irq, 101 .irq_disable = sun3_irq_disable,
95 .disable = sun3_disable_irq, 102 .irq_mask = sun3_irq_disable,
103 .irq_unmask = sun3_irq_enable,
96}; 104};
97 105
98void __init sun3_init_IRQ(void) 106void __init sun3_init_IRQ(void)
99{ 107{
100 *sun3_intreg = 1; 108 *sun3_intreg = 1;
101 109
102 m68k_setup_auto_interrupt(sun3_inthandle); 110 m68k_setup_irq_controller(&sun3_irq_chip, handle_level_irq, IRQ_AUTO_1,
103 m68k_setup_irq_controller(&sun3_irq_controller, IRQ_AUTO_1, 7); 111 7);
104 m68k_setup_user_interrupt(VEC_USER, 128, NULL); 112 m68k_setup_user_interrupt(VEC_USER, 128);
105 113
106 if (request_irq(IRQ_AUTO_5, sun3_int5, 0, "int5", NULL)) 114 if (request_irq(IRQ_AUTO_5, sun3_int5, 0, "int5", NULL))
107 pr_err("Couldn't register %s interrupt\n", "int5"); 115 pr_err("Couldn't register %s interrupt\n", "int5");
diff --git a/arch/microblaze/include/asm/namei.h b/arch/microblaze/include/asm/namei.h
deleted file mode 100644
index 61d60b8a07d..00000000000
--- a/arch/microblaze/include/asm/namei.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * Copyright (C) 2006 Atmark Techno, Inc.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8
9#ifndef _ASM_MICROBLAZE_NAMEI_H
10#define _ASM_MICROBLAZE_NAMEI_H
11
12#ifdef __KERNEL__
13
14/* This dummy routine maybe changed to something useful
15 * for /usr/gnemul/ emulation stuff.
16 * Look at asm-sparc/namei.h for details.
17 */
18#define __emul_prefix() NULL
19
20#endif /* __KERNEL__ */
21
22#endif /* _ASM_MICROBLAZE_NAMEI_H */
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 9b4cb00407d..0be318609fc 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -286,11 +286,11 @@ CLEAN_FILES += vmlinux.32 vmlinux.64
286archprepare: 286archprepare:
287ifdef CONFIG_MIPS32_N32 287ifdef CONFIG_MIPS32_N32
288 @echo ' Checking missing-syscalls for N32' 288 @echo ' Checking missing-syscalls for N32'
289 $(Q)$(MAKE) $(build)=. missing-syscalls ccflags-y="-mabi=n32" 289 $(Q)$(MAKE) $(build)=. missing-syscalls missing_syscalls_flags="-mabi=n32"
290endif 290endif
291ifdef CONFIG_MIPS32_O32 291ifdef CONFIG_MIPS32_O32
292 @echo ' Checking missing-syscalls for O32' 292 @echo ' Checking missing-syscalls for O32'
293 $(Q)$(MAKE) $(build)=. missing-syscalls ccflags-y="-mabi=32" 293 $(Q)$(MAKE) $(build)=. missing-syscalls missing_syscalls_flags="-mabi=32"
294endif 294endif
295 295
296install: 296install:
diff --git a/arch/mips/cavium-octeon/flash_setup.c b/arch/mips/cavium-octeon/flash_setup.c
index 975c20327bb..0a430e06f5e 100644
--- a/arch/mips/cavium-octeon/flash_setup.c
+++ b/arch/mips/cavium-octeon/flash_setup.c
@@ -17,8 +17,6 @@
17 17
18static struct map_info flash_map; 18static struct map_info flash_map;
19static struct mtd_info *mymtd; 19static struct mtd_info *mymtd;
20static int nr_parts;
21static struct mtd_partition *parts;
22static const char *part_probe_types[] = { 20static const char *part_probe_types[] = {
23 "cmdlinepart", 21 "cmdlinepart",
24#ifdef CONFIG_MTD_REDBOOT_PARTS 22#ifdef CONFIG_MTD_REDBOOT_PARTS
@@ -61,11 +59,8 @@ static int __init flash_init(void)
61 mymtd = do_map_probe("cfi_probe", &flash_map); 59 mymtd = do_map_probe("cfi_probe", &flash_map);
62 if (mymtd) { 60 if (mymtd) {
63 mymtd->owner = THIS_MODULE; 61 mymtd->owner = THIS_MODULE;
64 62 mtd_device_parse_register(mymtd, part_probe_types,
65 nr_parts = parse_mtd_partitions(mymtd, 63 0, NULL, 0);
66 part_probe_types,
67 &parts, 0);
68 mtd_device_register(mymtd, parts, nr_parts);
69 } else { 64 } else {
70 pr_err("Failed to register MTD device for flash\n"); 65 pr_err("Failed to register MTD device for flash\n");
71 } 66 }
diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c
index 8b606423bbd..efcfff4d462 100644
--- a/arch/mips/cavium-octeon/smp.c
+++ b/arch/mips/cavium-octeon/smp.c
@@ -207,8 +207,9 @@ void octeon_prepare_cpus(unsigned int max_cpus)
207 * the other bits alone. 207 * the other bits alone.
208 */ 208 */
209 cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cvmx_get_core_num()), 0xffff); 209 cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cvmx_get_core_num()), 0xffff);
210 if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt, IRQF_DISABLED, 210 if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt,
211 "SMP-IPI", mailbox_interrupt)) { 211 IRQF_PERCPU | IRQF_NO_THREAD, "SMP-IPI",
212 mailbox_interrupt)) {
212 panic("Cannot request_irq(OCTEON_IRQ_MBOX0)\n"); 213 panic("Cannot request_irq(OCTEON_IRQ_MBOX0)\n");
213 } 214 }
214} 215}
diff --git a/arch/mips/emma/common/prom.c b/arch/mips/emma/common/prom.c
index 708f0876140..cae42259d6d 100644
--- a/arch/mips/emma/common/prom.c
+++ b/arch/mips/emma/common/prom.c
@@ -50,7 +50,7 @@ void __init prom_init(void)
50 50
51 /* arg[0] is "g", the rest is boot parameters */ 51 /* arg[0] is "g", the rest is boot parameters */
52 for (i = 1; i < argc; i++) { 52 for (i = 1; i < argc; i++) {
53 if (strlen(arcs_cmdline) + strlen(arg[i] + 1) 53 if (strlen(arcs_cmdline) + strlen(arg[i]) + 1
54 >= sizeof(arcs_cmdline)) 54 >= sizeof(arcs_cmdline))
55 break; 55 break;
56 strcat(arcs_cmdline, arg[i]); 56 strcat(arcs_cmdline, arg[i]);
diff --git a/arch/mips/include/asm/mach-bcm47xx/gpio.h b/arch/mips/include/asm/mach-bcm47xx/gpio.h
index 76961cabeed..2ef17e8df40 100644
--- a/arch/mips/include/asm/mach-bcm47xx/gpio.h
+++ b/arch/mips/include/asm/mach-bcm47xx/gpio.h
@@ -36,6 +36,8 @@ static inline int gpio_get_value(unsigned gpio)
36 return -EINVAL; 36 return -EINVAL;
37} 37}
38 38
39#define gpio_get_value_cansleep gpio_get_value
40
39static inline void gpio_set_value(unsigned gpio, int value) 41static inline void gpio_set_value(unsigned gpio, int value)
40{ 42{
41 switch (bcm47xx_bus_type) { 43 switch (bcm47xx_bus_type) {
@@ -54,6 +56,19 @@ static inline void gpio_set_value(unsigned gpio, int value)
54 } 56 }
55} 57}
56 58
59#define gpio_set_value_cansleep gpio_set_value
60
61static inline int gpio_cansleep(unsigned gpio)
62{
63 return 0;
64}
65
66static inline int gpio_is_valid(unsigned gpio)
67{
68 return gpio < (BCM47XX_EXTIF_GPIO_LINES + BCM47XX_CHIPCO_GPIO_LINES);
69}
70
71
57static inline int gpio_direction_input(unsigned gpio) 72static inline int gpio_direction_input(unsigned gpio)
58{ 73{
59 switch (bcm47xx_bus_type) { 74 switch (bcm47xx_bus_type) {
@@ -137,7 +152,4 @@ static inline int gpio_polarity(unsigned gpio, int value)
137} 152}
138 153
139 154
140/* cansleep wrappers */
141#include <asm-generic/gpio.h>
142
143#endif /* __BCM47XX_GPIO_H */ 155#endif /* __BCM47XX_GPIO_H */
diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h
index ecea7871dec..d8dad5340ea 100644
--- a/arch/mips/include/asm/unistd.h
+++ b/arch/mips/include/asm/unistd.h
@@ -365,16 +365,18 @@
365#define __NR_syncfs (__NR_Linux + 342) 365#define __NR_syncfs (__NR_Linux + 342)
366#define __NR_sendmmsg (__NR_Linux + 343) 366#define __NR_sendmmsg (__NR_Linux + 343)
367#define __NR_setns (__NR_Linux + 344) 367#define __NR_setns (__NR_Linux + 344)
368#define __NR_process_vm_readv (__NR_Linux + 345)
369#define __NR_process_vm_writev (__NR_Linux + 346)
368 370
369/* 371/*
370 * Offset of the last Linux o32 flavoured syscall 372 * Offset of the last Linux o32 flavoured syscall
371 */ 373 */
372#define __NR_Linux_syscalls 344 374#define __NR_Linux_syscalls 346
373 375
374#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 376#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
375 377
376#define __NR_O32_Linux 4000 378#define __NR_O32_Linux 4000
377#define __NR_O32_Linux_syscalls 344 379#define __NR_O32_Linux_syscalls 346
378 380
379#if _MIPS_SIM == _MIPS_SIM_ABI64 381#if _MIPS_SIM == _MIPS_SIM_ABI64
380 382
@@ -686,16 +688,18 @@
686#define __NR_syncfs (__NR_Linux + 301) 688#define __NR_syncfs (__NR_Linux + 301)
687#define __NR_sendmmsg (__NR_Linux + 302) 689#define __NR_sendmmsg (__NR_Linux + 302)
688#define __NR_setns (__NR_Linux + 303) 690#define __NR_setns (__NR_Linux + 303)
691#define __NR_process_vm_readv (__NR_Linux + 304)
692#define __NR_process_vm_writev (__NR_Linux + 305)
689 693
690/* 694/*
691 * Offset of the last Linux 64-bit flavoured syscall 695 * Offset of the last Linux 64-bit flavoured syscall
692 */ 696 */
693#define __NR_Linux_syscalls 303 697#define __NR_Linux_syscalls 305
694 698
695#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ 699#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
696 700
697#define __NR_64_Linux 5000 701#define __NR_64_Linux 5000
698#define __NR_64_Linux_syscalls 303 702#define __NR_64_Linux_syscalls 305
699 703
700#if _MIPS_SIM == _MIPS_SIM_NABI32 704#if _MIPS_SIM == _MIPS_SIM_NABI32
701 705
@@ -1012,16 +1016,18 @@
1012#define __NR_syncfs (__NR_Linux + 306) 1016#define __NR_syncfs (__NR_Linux + 306)
1013#define __NR_sendmmsg (__NR_Linux + 307) 1017#define __NR_sendmmsg (__NR_Linux + 307)
1014#define __NR_setns (__NR_Linux + 308) 1018#define __NR_setns (__NR_Linux + 308)
1019#define __NR_process_vm_readv (__NR_Linux + 309)
1020#define __NR_process_vm_writev (__NR_Linux + 310)
1015 1021
1016/* 1022/*
1017 * Offset of the last N32 flavoured syscall 1023 * Offset of the last N32 flavoured syscall
1018 */ 1024 */
1019#define __NR_Linux_syscalls 308 1025#define __NR_Linux_syscalls 310
1020 1026
1021#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ 1027#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
1022 1028
1023#define __NR_N32_Linux 6000 1029#define __NR_N32_Linux 6000
1024#define __NR_N32_Linux_syscalls 308 1030#define __NR_N32_Linux_syscalls 310
1025 1031
1026#ifdef __KERNEL__ 1032#ifdef __KERNEL__
1027 1033
diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c
index 98c5a9737c1..e2d8e199be3 100644
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -103,19 +103,10 @@ static int c0_compare_int_pending(void)
103 103
104/* 104/*
105 * Compare interrupt can be routed and latched outside the core, 105 * Compare interrupt can be routed and latched outside the core,
106 * so a single execution hazard barrier may not be enough to give 106 * so wait up to worst case number of cycle counter ticks for timer interrupt
107 * it time to clear as seen in the Cause register. 4 time the 107 * changes to propagate to the cause register.
108 * pipeline depth seems reasonably conservative, and empirically
109 * works better in configurations with high CPU/bus clock ratios.
110 */ 108 */
111 109#define COMPARE_INT_SEEN_TICKS 50
112#define compare_change_hazard() \
113 do { \
114 irq_disable_hazard(); \
115 irq_disable_hazard(); \
116 irq_disable_hazard(); \
117 irq_disable_hazard(); \
118 } while (0)
119 110
120int c0_compare_int_usable(void) 111int c0_compare_int_usable(void)
121{ 112{
@@ -126,8 +117,12 @@ int c0_compare_int_usable(void)
126 * IP7 already pending? Try to clear it by acking the timer. 117 * IP7 already pending? Try to clear it by acking the timer.
127 */ 118 */
128 if (c0_compare_int_pending()) { 119 if (c0_compare_int_pending()) {
129 write_c0_compare(read_c0_count()); 120 cnt = read_c0_count();
130 compare_change_hazard(); 121 write_c0_compare(cnt);
122 back_to_back_c0_hazard();
123 while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
124 if (!c0_compare_int_pending())
125 break;
131 if (c0_compare_int_pending()) 126 if (c0_compare_int_pending())
132 return 0; 127 return 0;
133 } 128 }
@@ -136,7 +131,7 @@ int c0_compare_int_usable(void)
136 cnt = read_c0_count(); 131 cnt = read_c0_count();
137 cnt += delta; 132 cnt += delta;
138 write_c0_compare(cnt); 133 write_c0_compare(cnt);
139 compare_change_hazard(); 134 back_to_back_c0_hazard();
140 if ((int)(read_c0_count() - cnt) < 0) 135 if ((int)(read_c0_count() - cnt) < 0)
141 break; 136 break;
142 /* increase delta if the timer was already expired */ 137 /* increase delta if the timer was already expired */
@@ -145,12 +140,17 @@ int c0_compare_int_usable(void)
145 while ((int)(read_c0_count() - cnt) <= 0) 140 while ((int)(read_c0_count() - cnt) <= 0)
146 ; /* Wait for expiry */ 141 ; /* Wait for expiry */
147 142
148 compare_change_hazard(); 143 while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
144 if (c0_compare_int_pending())
145 break;
149 if (!c0_compare_int_pending()) 146 if (!c0_compare_int_pending())
150 return 0; 147 return 0;
151 148 cnt = read_c0_count();
152 write_c0_compare(read_c0_count()); 149 write_c0_compare(cnt);
153 compare_change_hazard(); 150 back_to_back_c0_hazard();
151 while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
152 if (!c0_compare_int_pending())
153 break;
154 if (c0_compare_int_pending()) 154 if (c0_compare_int_pending())
155 return 0; 155 return 0;
156 156
diff --git a/arch/mips/kernel/cpufreq/loongson2_clock.c b/arch/mips/kernel/cpufreq/loongson2_clock.c
index cefc6e259ba..5426779d9fd 100644
--- a/arch/mips/kernel/cpufreq/loongson2_clock.c
+++ b/arch/mips/kernel/cpufreq/loongson2_clock.c
@@ -7,6 +7,7 @@
7 * for more details. 7 * for more details.
8 */ 8 */
9 9
10#include <linux/module.h>
10#include <linux/cpufreq.h> 11#include <linux/cpufreq.h>
11#include <linux/platform_device.h> 12#include <linux/platform_device.h>
12 13
diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c
index 4f2971bcf8e..315fc0b250f 100644
--- a/arch/mips/kernel/perf_event_mipsxx.c
+++ b/arch/mips/kernel/perf_event_mipsxx.c
@@ -623,7 +623,7 @@ static int mipspmu_event_init(struct perf_event *event)
623 if (!atomic_inc_not_zero(&active_events)) { 623 if (!atomic_inc_not_zero(&active_events)) {
624 if (atomic_read(&active_events) > MIPS_MAX_HWEVENTS) { 624 if (atomic_read(&active_events) > MIPS_MAX_HWEVENTS) {
625 atomic_dec(&active_events); 625 atomic_dec(&active_events);
626 return -ENOSPC; 626 return -EINVAL;
627 } 627 }
628 628
629 mutex_lock(&pmu_reserve_mutex); 629 mutex_lock(&pmu_reserve_mutex);
@@ -732,15 +732,15 @@ static int validate_group(struct perf_event *event)
732 memset(&fake_cpuc, 0, sizeof(fake_cpuc)); 732 memset(&fake_cpuc, 0, sizeof(fake_cpuc));
733 733
734 if (!validate_event(&fake_cpuc, leader)) 734 if (!validate_event(&fake_cpuc, leader))
735 return -ENOSPC; 735 return -EINVAL;
736 736
737 list_for_each_entry(sibling, &leader->sibling_list, group_entry) { 737 list_for_each_entry(sibling, &leader->sibling_list, group_entry) {
738 if (!validate_event(&fake_cpuc, sibling)) 738 if (!validate_event(&fake_cpuc, sibling))
739 return -ENOSPC; 739 return -EINVAL;
740 } 740 }
741 741
742 if (!validate_event(&fake_cpuc, event)) 742 if (!validate_event(&fake_cpuc, event))
743 return -ENOSPC; 743 return -EINVAL;
744 744
745 return 0; 745 return 0;
746} 746}
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 47920657968..a632bc144ef 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -591,6 +591,8 @@ einval: li v0, -ENOSYS
591 sys sys_syncfs 1 591 sys sys_syncfs 1
592 sys sys_sendmmsg 4 592 sys sys_sendmmsg 4
593 sys sys_setns 2 593 sys sys_setns 2
594 sys sys_process_vm_readv 6 /* 4345 */
595 sys sys_process_vm_writev 6
594 .endm 596 .endm
595 597
596 /* We pre-compute the number of _instruction_ bytes needed to 598 /* We pre-compute the number of _instruction_ bytes needed to
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index fb7334bea73..3b5a5e9ae49 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -430,4 +430,6 @@ sys_call_table:
430 PTR sys_syncfs 430 PTR sys_syncfs
431 PTR sys_sendmmsg 431 PTR sys_sendmmsg
432 PTR sys_setns 432 PTR sys_setns
433 PTR sys_process_vm_readv
434 PTR sys_process_vm_writev /* 5305 */
433 .size sys_call_table,.-sys_call_table 435 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 6de1f598346..6be6f702092 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -430,4 +430,6 @@ EXPORT(sysn32_call_table)
430 PTR sys_syncfs 430 PTR sys_syncfs
431 PTR compat_sys_sendmmsg 431 PTR compat_sys_sendmmsg
432 PTR sys_setns 432 PTR sys_setns
433 PTR compat_sys_process_vm_readv
434 PTR compat_sys_process_vm_writev /* 6310 */
433 .size sysn32_call_table,.-sysn32_call_table 435 .size sysn32_call_table,.-sysn32_call_table
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 1d813169e45..54228553691 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -548,4 +548,6 @@ sys_call_table:
548 PTR sys_syncfs 548 PTR sys_syncfs
549 PTR compat_sys_sendmmsg 549 PTR compat_sys_sendmmsg
550 PTR sys_setns 550 PTR sys_setns
551 PTR compat_sys_process_vm_readv /* 4345 */
552 PTR compat_sys_process_vm_writev
551 .size sys_call_table,.-sys_call_table 553 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 261ccbc0774..5c8a49d5505 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1596,7 +1596,8 @@ void __cpuinit per_cpu_trap_init(void)
1596 } 1596 }
1597#endif /* CONFIG_MIPS_MT_SMTC */ 1597#endif /* CONFIG_MIPS_MT_SMTC */
1598 1598
1599 cpu_data[cpu].asid_cache = ASID_FIRST_VERSION; 1599 if (!cpu_data[cpu].asid_cache)
1600 cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
1600 1601
1601 atomic_inc(&init_mm.mm_count); 1602 atomic_inc(&init_mm.mm_count);
1602 current->active_mm = &init_mm; 1603 current->active_mm = &init_mm;
diff --git a/arch/mips/lantiq/clk.c b/arch/mips/lantiq/clk.c
index 7e9c0ffc11a..77ed70fc2fe 100644
--- a/arch/mips/lantiq/clk.c
+++ b/arch/mips/lantiq/clk.c
@@ -7,7 +7,7 @@
7 * Copyright (C) 2010 John Crispin <blogic@openwrt.org> 7 * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
8 */ 8 */
9#include <linux/io.h> 9#include <linux/io.h>
10#include <linux/module.h> 10#include <linux/export.h>
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/types.h> 13#include <linux/types.h>
diff --git a/arch/mips/lantiq/devices.c b/arch/mips/lantiq/devices.c
index 44a36771c81..de1cb2bcd79 100644
--- a/arch/mips/lantiq/devices.c
+++ b/arch/mips/lantiq/devices.c
@@ -7,7 +7,7 @@
7 */ 7 */
8 8
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/module.h> 10#include <linux/export.h>
11#include <linux/types.h> 11#include <linux/types.h>
12#include <linux/string.h> 12#include <linux/string.h>
13#include <linux/kernel.h> 13#include <linux/kernel.h>
diff --git a/arch/mips/lantiq/prom.c b/arch/mips/lantiq/prom.c
index 56ba007bf1e..e34fcfd0d5c 100644
--- a/arch/mips/lantiq/prom.c
+++ b/arch/mips/lantiq/prom.c
@@ -6,7 +6,7 @@
6 * Copyright (C) 2010 John Crispin <blogic@openwrt.org> 6 * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
7 */ 7 */
8 8
9#include <linux/module.h> 9#include <linux/export.h>
10#include <linux/clk.h> 10#include <linux/clk.h>
11#include <asm/bootinfo.h> 11#include <asm/bootinfo.h>
12#include <asm/time.h> 12#include <asm/time.h>
diff --git a/arch/mips/lantiq/setup.c b/arch/mips/lantiq/setup.c
index 9b8af77ed0f..1ff6c9d6cb9 100644
--- a/arch/mips/lantiq/setup.c
+++ b/arch/mips/lantiq/setup.c
@@ -7,7 +7,7 @@
7 */ 7 */
8 8
9#include <linux/kernel.h> 9#include <linux/kernel.h>
10#include <linux/module.h> 10#include <linux/export.h>
11#include <linux/io.h> 11#include <linux/io.h>
12#include <linux/ioport.h> 12#include <linux/ioport.h>
13#include <asm/bootinfo.h> 13#include <asm/bootinfo.h>
diff --git a/arch/mips/lantiq/xway/clk-ase.c b/arch/mips/lantiq/xway/clk-ase.c
index 22d823acd53..652258309c9 100644
--- a/arch/mips/lantiq/xway/clk-ase.c
+++ b/arch/mips/lantiq/xway/clk-ase.c
@@ -7,7 +7,7 @@
7 */ 7 */
8 8
9#include <linux/io.h> 9#include <linux/io.h>
10#include <linux/module.h> 10#include <linux/export.h>
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/clk.h> 12#include <linux/clk.h>
13 13
diff --git a/arch/mips/lantiq/xway/clk-xway.c b/arch/mips/lantiq/xway/clk-xway.c
index ddd39593c58..696b1a3e064 100644
--- a/arch/mips/lantiq/xway/clk-xway.c
+++ b/arch/mips/lantiq/xway/clk-xway.c
@@ -7,7 +7,7 @@
7 */ 7 */
8 8
9#include <linux/io.h> 9#include <linux/io.h>
10#include <linux/module.h> 10#include <linux/export.h>
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/clk.h> 12#include <linux/clk.h>
13 13
diff --git a/arch/mips/lantiq/xway/devices.c b/arch/mips/lantiq/xway/devices.c
index d0e32ab2ea0..d614aa7ff07 100644
--- a/arch/mips/lantiq/xway/devices.c
+++ b/arch/mips/lantiq/xway/devices.c
@@ -7,7 +7,7 @@
7 */ 7 */
8 8
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/module.h> 10#include <linux/export.h>
11#include <linux/types.h> 11#include <linux/types.h>
12#include <linux/string.h> 12#include <linux/string.h>
13#include <linux/mtd/physmap.h> 13#include <linux/mtd/physmap.h>
diff --git a/arch/mips/lantiq/xway/dma.c b/arch/mips/lantiq/xway/dma.c
index 4278a459d6c..cbb6ae5747b 100644
--- a/arch/mips/lantiq/xway/dma.c
+++ b/arch/mips/lantiq/xway/dma.c
@@ -19,6 +19,7 @@
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/dma-mapping.h> 21#include <linux/dma-mapping.h>
22#include <linux/export.h>
22 23
23#include <lantiq_soc.h> 24#include <lantiq_soc.h>
24#include <xway_dma.h> 25#include <xway_dma.h>
diff --git a/arch/mips/lantiq/xway/gpio.c b/arch/mips/lantiq/xway/gpio.c
index a321451a545..d2fa98f3c78 100644
--- a/arch/mips/lantiq/xway/gpio.c
+++ b/arch/mips/lantiq/xway/gpio.c
@@ -7,7 +7,7 @@
7 */ 7 */
8 8
9#include <linux/slab.h> 9#include <linux/slab.h>
10#include <linux/module.h> 10#include <linux/export.h>
11#include <linux/platform_device.h> 11#include <linux/platform_device.h>
12#include <linux/gpio.h> 12#include <linux/gpio.h>
13#include <linux/ioport.h> 13#include <linux/ioport.h>
diff --git a/arch/mips/lantiq/xway/gpio_ebu.c b/arch/mips/lantiq/xway/gpio_ebu.c
index a479355abdb..b91c7f17f10 100644
--- a/arch/mips/lantiq/xway/gpio_ebu.c
+++ b/arch/mips/lantiq/xway/gpio_ebu.c
@@ -7,7 +7,7 @@
7 */ 7 */
8 8
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/module.h> 10#include <linux/export.h>
11#include <linux/types.h> 11#include <linux/types.h>
12#include <linux/platform_device.h> 12#include <linux/platform_device.h>
13#include <linux/mutex.h> 13#include <linux/mutex.h>
diff --git a/arch/mips/lantiq/xway/gpio_stp.c b/arch/mips/lantiq/xway/gpio_stp.c
index 67d59d69034..ff9991cddea 100644
--- a/arch/mips/lantiq/xway/gpio_stp.c
+++ b/arch/mips/lantiq/xway/gpio_stp.c
@@ -9,7 +9,7 @@
9 9
10#include <linux/slab.h> 10#include <linux/slab.h>
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/module.h> 12#include <linux/export.h>
13#include <linux/types.h> 13#include <linux/types.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/mutex.h> 15#include <linux/mutex.h>
diff --git a/arch/mips/lantiq/xway/prom-ase.c b/arch/mips/lantiq/xway/prom-ase.c
index abe49f4db57..ae4959ae865 100644
--- a/arch/mips/lantiq/xway/prom-ase.c
+++ b/arch/mips/lantiq/xway/prom-ase.c
@@ -6,7 +6,7 @@
6 * Copyright (C) 2010 John Crispin <blogic@openwrt.org> 6 * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
7 */ 7 */
8 8
9#include <linux/module.h> 9#include <linux/export.h>
10#include <linux/clk.h> 10#include <linux/clk.h>
11#include <asm/bootinfo.h> 11#include <asm/bootinfo.h>
12#include <asm/time.h> 12#include <asm/time.h>
diff --git a/arch/mips/lantiq/xway/prom-xway.c b/arch/mips/lantiq/xway/prom-xway.c
index 1686692ac24..2228133ca35 100644
--- a/arch/mips/lantiq/xway/prom-xway.c
+++ b/arch/mips/lantiq/xway/prom-xway.c
@@ -6,7 +6,7 @@
6 * Copyright (C) 2010 John Crispin <blogic@openwrt.org> 6 * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
7 */ 7 */
8 8
9#include <linux/module.h> 9#include <linux/export.h>
10#include <linux/clk.h> 10#include <linux/clk.h>
11#include <asm/bootinfo.h> 11#include <asm/bootinfo.h>
12#include <asm/time.h> 12#include <asm/time.h>
diff --git a/arch/mips/lantiq/xway/reset.c b/arch/mips/lantiq/xway/reset.c
index a1be36d0e49..3d41f0bb5bf 100644
--- a/arch/mips/lantiq/xway/reset.c
+++ b/arch/mips/lantiq/xway/reset.c
@@ -10,7 +10,7 @@
10#include <linux/io.h> 10#include <linux/io.h>
11#include <linux/ioport.h> 11#include <linux/ioport.h>
12#include <linux/pm.h> 12#include <linux/pm.h>
13#include <linux/module.h> 13#include <linux/export.h>
14#include <asm/reboot.h> 14#include <asm/reboot.h>
15 15
16#include <lantiq_soc.h> 16#include <lantiq_soc.h>
diff --git a/arch/mips/nxp/pnx8550/common/pci.c b/arch/mips/nxp/pnx8550/common/pci.c
deleted file mode 100644
index 98e86ddb86c..00000000000
--- a/arch/mips/nxp/pnx8550/common/pci.c
+++ /dev/null
@@ -1,134 +0,0 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 *
5 * Author: source@mvista.com
6 *
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
19 */
20#include <linux/types.h>
21#include <linux/pci.h>
22#include <linux/kernel.h>
23#include <linux/init.h>
24
25#include <pci.h>
26#include <glb.h>
27#include <nand.h>
28
29static struct resource pci_io_resource = {
30 .start = PNX8550_PCIIO + 0x1000, /* reserve regacy I/O space */
31 .end = PNX8550_PCIIO + PNX8550_PCIIO_SIZE,
32 .name = "pci IO space",
33 .flags = IORESOURCE_IO
34};
35
36static struct resource pci_mem_resource = {
37 .start = PNX8550_PCIMEM,
38 .end = PNX8550_PCIMEM + PNX8550_PCIMEM_SIZE - 1,
39 .name = "pci memory space",
40 .flags = IORESOURCE_MEM
41};
42
43extern struct pci_ops pnx8550_pci_ops;
44
45static struct pci_controller pnx8550_controller = {
46 .pci_ops = &pnx8550_pci_ops,
47 .io_map_base = PNX8550_PORT_BASE,
48 .io_resource = &pci_io_resource,
49 .mem_resource = &pci_mem_resource,
50};
51
52/* Return the total size of DRAM-memory, (RANK0 + RANK1) */
53static inline unsigned long get_system_mem_size(void)
54{
55 /* Read IP2031_RANK0_ADDR_LO */
56 unsigned long dram_r0_lo = inl(PCI_BASE | 0x65010);
57 /* Read IP2031_RANK1_ADDR_HI */
58 unsigned long dram_r1_hi = inl(PCI_BASE | 0x65018);
59
60 return dram_r1_hi - dram_r0_lo + 1;
61}
62
63static int __init pnx8550_pci_setup(void)
64{
65 int pci_mem_code;
66 int mem_size = get_system_mem_size() >> 20;
67
68 /* Clear the Global 2 Register, PCI Inta Output Enable Registers
69 Bit 1:Enable DAC Powerdown
70 -> 0:DACs are enabled and are working normally
71 1:DACs are powerdown
72 Bit 0:Enable of PCI inta output
73 -> 0 = Disable PCI inta output
74 1 = Enable PCI inta output
75 */
76 PNX8550_GLB2_ENAB_INTA_O = 0;
77
78 /* Calc the PCI mem size code */
79 if (mem_size >= 128)
80 pci_mem_code = SIZE_128M;
81 else if (mem_size >= 64)
82 pci_mem_code = SIZE_64M;
83 else if (mem_size >= 32)
84 pci_mem_code = SIZE_32M;
85 else
86 pci_mem_code = SIZE_16M;
87
88 /* Set PCI_XIO registers */
89 outl(pci_mem_resource.start, PCI_BASE | PCI_BASE1_LO);
90 outl(pci_mem_resource.end + 1, PCI_BASE | PCI_BASE1_HI);
91 outl(pci_io_resource.start, PCI_BASE | PCI_BASE2_LO);
92 outl(pci_io_resource.end, PCI_BASE | PCI_BASE2_HI);
93
94 /* Send memory transaction via PCI_BASE2 */
95 outl(0x00000001, PCI_BASE | PCI_IO);
96
97 /* Unlock the setup register */
98 outl(0xca, PCI_BASE | PCI_UNLOCKREG);
99
100 /*
101 * BAR0 of PNX8550 (pci base 10) must be zero in order for ide
102 * to work, and in order for bus_to_baddr to work without any
103 * hacks.
104 */
105 outl(0x00000000, PCI_BASE | PCI_BASE10);
106
107 /*
108 *These two bars are set by default or the boot code.
109 * However, it's safer to set them here so we're not boot
110 * code dependent.
111 */
112 outl(0x1be00000, PCI_BASE | PCI_BASE14); /* PNX MMIO */
113 outl(PNX8550_NAND_BASE_ADDR, PCI_BASE | PCI_BASE18); /* XIO */
114
115 outl(PCI_EN_TA |
116 PCI_EN_PCI2MMI |
117 PCI_EN_XIO |
118 PCI_SETUP_BASE18_SIZE(SIZE_32M) |
119 PCI_SETUP_BASE18_EN |
120 PCI_SETUP_BASE14_EN |
121 PCI_SETUP_BASE10_PREF |
122 PCI_SETUP_BASE10_SIZE(pci_mem_code) |
123 PCI_SETUP_CFGMANAGE_EN |
124 PCI_SETUP_PCIARB_EN,
125 PCI_BASE |
126 PCI_SETUP); /* PCI_SETUP */
127 outl(0x00000000, PCI_BASE | PCI_CTRL); /* PCI_CONTROL */
128
129 register_pci_controller(&pnx8550_controller);
130
131 return 0;
132}
133
134arch_initcall(pnx8550_pci_setup);
diff --git a/arch/mips/nxp/pnx8550/common/setup.c b/arch/mips/nxp/pnx8550/common/setup.c
deleted file mode 100644
index 71adac32332..00000000000
--- a/arch/mips/nxp/pnx8550/common/setup.c
+++ /dev/null
@@ -1,143 +0,0 @@
1/*
2 *
3 * 2.6 port, Embedded Alley Solutions, Inc
4 *
5 * Based on Per Hallsmark, per.hallsmark@mvista.com
6 *
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
19 */
20#include <linux/init.h>
21#include <linux/sched.h>
22#include <linux/ioport.h>
23#include <linux/irq.h>
24#include <linux/mm.h>
25#include <linux/delay.h>
26#include <linux/interrupt.h>
27#include <linux/serial_pnx8xxx.h>
28#include <linux/pm.h>
29
30#include <asm/cpu.h>
31#include <asm/bootinfo.h>
32#include <asm/irq.h>
33#include <asm/mipsregs.h>
34#include <asm/reboot.h>
35#include <asm/pgtable.h>
36#include <asm/time.h>
37
38#include <glb.h>
39#include <int.h>
40#include <pci.h>
41#include <uart.h>
42#include <nand.h>
43
44extern void __init board_setup(void);
45extern void pnx8550_machine_restart(char *);
46extern void pnx8550_machine_halt(void);
47extern void pnx8550_machine_power_off(void);
48extern struct resource ioport_resource;
49extern struct resource iomem_resource;
50extern char *prom_getcmdline(void);
51
52struct resource standard_io_resources[] = {
53 {
54 .start = 0x00,
55 .end = 0x1f,
56 .name = "dma1",
57 .flags = IORESOURCE_BUSY
58 }, {
59 .start = 0x40,
60 .end = 0x5f,
61 .name = "timer",
62 .flags = IORESOURCE_BUSY
63 }, {
64 .start = 0x80,
65 .end = 0x8f,
66 .name = "dma page reg",
67 .flags = IORESOURCE_BUSY
68 }, {
69 .start = 0xc0,
70 .end = 0xdf,
71 .name = "dma2",
72 .flags = IORESOURCE_BUSY
73 },
74};
75
76#define STANDARD_IO_RESOURCES ARRAY_SIZE(standard_io_resources)
77
78extern struct resource pci_io_resource;
79extern struct resource pci_mem_resource;
80
81/* Return the total size of DRAM-memory, (RANK0 + RANK1) */
82unsigned long get_system_mem_size(void)
83{
84 /* Read IP2031_RANK0_ADDR_LO */
85 unsigned long dram_r0_lo = inl(PCI_BASE | 0x65010);
86 /* Read IP2031_RANK1_ADDR_HI */
87 unsigned long dram_r1_hi = inl(PCI_BASE | 0x65018);
88
89 return dram_r1_hi - dram_r0_lo + 1;
90}
91
92int pnx8550_console_port = -1;
93
94void __init plat_mem_setup(void)
95{
96 int i;
97 char* argptr;
98
99 board_setup(); /* board specific setup */
100
101 _machine_restart = pnx8550_machine_restart;
102 _machine_halt = pnx8550_machine_halt;
103 pm_power_off = pnx8550_machine_power_off;
104
105 /* Clear the Global 2 Register, PCI Inta Output Enable Registers
106 Bit 1:Enable DAC Powerdown
107 -> 0:DACs are enabled and are working normally
108 1:DACs are powerdown
109 Bit 0:Enable of PCI inta output
110 -> 0 = Disable PCI inta output
111 1 = Enable PCI inta output
112 */
113 PNX8550_GLB2_ENAB_INTA_O = 0;
114
115 /* IO/MEM resources. */
116 set_io_port_base(PNX8550_PORT_BASE);
117 ioport_resource.start = 0;
118 ioport_resource.end = ~0;
119 iomem_resource.start = 0;
120 iomem_resource.end = ~0;
121
122 /* Request I/O space for devices on this board */
123 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
124 request_resource(&ioport_resource, standard_io_resources + i);
125
126 /* Place the Mode Control bit for GPIO pin 16 in primary function */
127 /* Pin 16 is used by UART1, UA1_TX */
128 outl((PNX8550_GPIO_MODE_PRIMOP << PNX8550_GPIO_MC_16_BIT) |
129 (PNX8550_GPIO_MODE_PRIMOP << PNX8550_GPIO_MC_17_BIT),
130 PNX8550_GPIO_MC1);
131
132 argptr = prom_getcmdline();
133 if ((argptr = strstr(argptr, "console=ttyS")) != NULL) {
134 argptr += strlen("console=ttyS");
135 pnx8550_console_port = *argptr == '0' ? 0 : 1;
136
137 /* We must initialize the UART (console) before early printk */
138 /* Set LCR to 8-bit and BAUD to 38400 (no 5) */
139 ip3106_lcr(UART_BASE, pnx8550_console_port) =
140 PNX8XXX_UART_LCR_8BIT;
141 ip3106_baud(UART_BASE, pnx8550_console_port) = 5;
142 }
143}
diff --git a/arch/mips/pci/pci-alchemy.c b/arch/mips/pci/pci-alchemy.c
index 4ee57104e47..b5ce041cdaf 100644
--- a/arch/mips/pci/pci-alchemy.c
+++ b/arch/mips/pci/pci-alchemy.c
@@ -7,6 +7,7 @@
7 * Support for all devices (greater than 16) added by David Gathright. 7 * Support for all devices (greater than 16) added by David Gathright.
8 */ 8 */
9 9
10#include <linux/export.h>
10#include <linux/types.h> 11#include <linux/types.h>
11#include <linux/pci.h> 12#include <linux/pci.h>
12#include <linux/platform_device.h> 13#include <linux/platform_device.h>
diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c
index 8656388b34b..be1e1afe12c 100644
--- a/arch/mips/pci/pci-lantiq.c
+++ b/arch/mips/pci/pci-lantiq.c
@@ -13,6 +13,7 @@
13#include <linux/delay.h> 13#include <linux/delay.h>
14#include <linux/mm.h> 14#include <linux/mm.h>
15#include <linux/vmalloc.h> 15#include <linux/vmalloc.h>
16#include <linux/export.h>
16#include <linux/platform_device.h> 17#include <linux/platform_device.h>
17 18
18#include <asm/pci.h> 19#include <asm/pci.h>
diff --git a/arch/mips/pmc-sierra/yosemite/prom.c b/arch/mips/pmc-sierra/yosemite/prom.c
index cf4c868715a..dcc926e06fc 100644
--- a/arch/mips/pmc-sierra/yosemite/prom.c
+++ b/arch/mips/pmc-sierra/yosemite/prom.c
@@ -102,7 +102,7 @@ void __init prom_init(void)
102 102
103 /* Get the boot parameters */ 103 /* Get the boot parameters */
104 for (i = 1; i < argc; i++) { 104 for (i = 1; i < argc; i++) {
105 if (strlen(arcs_cmdline) + strlen(arg[i] + 1) >= 105 if (strlen(arcs_cmdline) + strlen(arg[i]) + 1 >=
106 sizeof(arcs_cmdline)) 106 sizeof(arcs_cmdline))
107 break; 107 break;
108 108
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index b177caa56d9..951e18f5335 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -345,7 +345,7 @@ config ARCH_ENABLE_MEMORY_HOTREMOVE
345 345
346config KEXEC 346config KEXEC
347 bool "kexec system call (EXPERIMENTAL)" 347 bool "kexec system call (EXPERIMENTAL)"
348 depends on (PPC_BOOK3S || FSL_BOOKE || (44x && !SMP && !47x)) && EXPERIMENTAL 348 depends on (PPC_BOOK3S || FSL_BOOKE || (44x && !SMP && !PPC_47x)) && EXPERIMENTAL
349 help 349 help
350 kexec is a system call that implements the ability to shutdown your 350 kexec is a system call that implements the ability to shutdown your
351 current kernel, and to start another kernel. It is like a reboot 351 current kernel, and to start another kernel. It is like a reboot
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 57af16edc19..70ba0c0a122 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -255,12 +255,6 @@ checkbin:
255 echo 'disable kernel modules' ; \ 255 echo 'disable kernel modules' ; \
256 false ; \ 256 false ; \
257 fi 257 fi
258 @if ! /bin/echo dssall | $(AS) -many -o $(TOUT) >/dev/null 2>&1 ; then \
259 echo -n '*** ${VERSION}.${PATCHLEVEL} kernels no longer build ' ; \
260 echo 'correctly with old versions of binutils.' ; \
261 echo '*** Please upgrade your binutils to 2.12.1 or newer' ; \
262 false ; \
263 fi
264 258
265CLEAN_FILES += $(TOUT) 259CLEAN_FILES += $(TOUT)
266 260
diff --git a/arch/powerpc/boot/dts/charon.dts b/arch/powerpc/boot/dts/charon.dts
new file mode 100644
index 00000000000..0e00e508eaa
--- /dev/null
+++ b/arch/powerpc/boot/dts/charon.dts
@@ -0,0 +1,236 @@
1/*
2 * charon board Device Tree Source
3 *
4 * Copyright (C) 2007 Semihalf
5 * Marian Balakowicz <m8@semihalf.com>
6 *
7 * Copyright (C) 2010 DENX Software Engineering GmbH
8 * Heiko Schocher <hs@denx.de>
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15
16/dts-v1/;
17
18/ {
19 model = "anon,charon";
20 compatible = "anon,charon";
21 #address-cells = <1>;
22 #size-cells = <1>;
23 interrupt-parent = <&mpc5200_pic>;
24
25 cpus {
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 PowerPC,5200@0 {
30 device_type = "cpu";
31 reg = <0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
34 d-cache-size = <0x4000>; // L1, 16K
35 i-cache-size = <0x4000>; // L1, 16K
36 timebase-frequency = <0>; // from bootloader
37 bus-frequency = <0>; // from bootloader
38 clock-frequency = <0>; // from bootloader
39 };
40 };
41
42 memory {
43 device_type = "memory";
44 reg = <0x00000000 0x08000000>; // 128MB
45 };
46
47 soc5200@f0000000 {
48 #address-cells = <1>;
49 #size-cells = <1>;
50 compatible = "fsl,mpc5200-immr";
51 ranges = <0 0xf0000000 0x0000c000>;
52 reg = <0xf0000000 0x00000100>;
53 bus-frequency = <0>; // from bootloader
54 system-frequency = <0>; // from bootloader
55
56 cdm@200 {
57 compatible = "fsl,mpc5200-cdm";
58 reg = <0x200 0x38>;
59 };
60
61 mpc5200_pic: interrupt-controller@500 {
62 // 5200 interrupts are encoded into two levels;
63 interrupt-controller;
64 #interrupt-cells = <3>;
65 compatible = "fsl,mpc5200-pic";
66 reg = <0x500 0x80>;
67 };
68
69 timer@600 { // General Purpose Timer
70 compatible = "fsl,mpc5200-gpt";
71 reg = <0x600 0x10>;
72 interrupts = <1 9 0>;
73 fsl,has-wdt;
74 };
75
76 can@900 {
77 compatible = "fsl,mpc5200-mscan";
78 interrupts = <2 17 0>;
79 reg = <0x900 0x80>;
80 };
81
82 can@980 {
83 compatible = "fsl,mpc5200-mscan";
84 interrupts = <2 18 0>;
85 reg = <0x980 0x80>;
86 };
87
88 gpio_simple: gpio@b00 {
89 compatible = "fsl,mpc5200-gpio";
90 reg = <0xb00 0x40>;
91 interrupts = <1 7 0>;
92 gpio-controller;
93 #gpio-cells = <2>;
94 };
95
96 usb@1000 {
97 compatible = "fsl,mpc5200-ohci","ohci-be";
98 reg = <0x1000 0xff>;
99 interrupts = <2 6 0>;
100 };
101
102 dma-controller@1200 {
103 device_type = "dma-controller";
104 compatible = "fsl,mpc5200-bestcomm";
105 reg = <0x1200 0x80>;
106 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
107 3 4 0 3 5 0 3 6 0 3 7 0
108 3 8 0 3 9 0 3 10 0 3 11 0
109 3 12 0 3 13 0 3 14 0 3 15 0>;
110 };
111
112 xlb@1f00 {
113 compatible = "fsl,mpc5200-xlb";
114 reg = <0x1f00 0x100>;
115 };
116
117 serial@2000 { // PSC1
118 compatible = "fsl,mpc5200-psc-uart";
119 reg = <0x2000 0x100>;
120 interrupts = <2 1 0>;
121 };
122
123 serial@2400 { // PSC3
124 compatible = "fsl,mpc5200-psc-uart";
125 reg = <0x2400 0x100>;
126 interrupts = <2 3 0>;
127 };
128
129 ethernet@3000 {
130 compatible = "fsl,mpc5200-fec";
131 reg = <0x3000 0x400>;
132 local-mac-address = [ 00 00 00 00 00 00 ];
133 interrupts = <2 5 0>;
134 fixed-link = <1 1 100 0 0>;
135 };
136
137 mdio@3000 {
138 #address-cells = <1>;
139 #size-cells = <0>;
140 compatible = "fsl,mpc5200-mdio";
141 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
142 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
143 };
144
145 ata@3a00 {
146 compatible = "fsl,mpc5200-ata";
147 reg = <0x3a00 0x100>;
148 interrupts = <2 7 0>;
149 };
150
151 i2c@3d00 {
152 #address-cells = <1>;
153 #size-cells = <0>;
154 compatible = "fsl,mpc5200-i2c","fsl-i2c";
155 reg = <0x3d00 0x40>;
156 interrupts = <2 15 0>;
157 };
158
159
160 i2c@3d40 {
161 #address-cells = <1>;
162 #size-cells = <0>;
163 compatible = "fsl,mpc5200-i2c","fsl-i2c";
164 reg = <0x3d40 0x40>;
165 interrupts = <2 16 0>;
166
167 dtt@28 {
168 compatible = "national,lm80";
169 reg = <0x28>;
170 };
171
172 rtc@68 {
173 compatible = "dallas,ds1374";
174 reg = <0x68>;
175 };
176 };
177
178 sram@8000 {
179 compatible = "fsl,mpc5200-sram";
180 reg = <0x8000 0x4000>;
181 };
182 };
183
184 localbus {
185 compatible = "fsl,mpc5200-lpb","simple-bus";
186 #address-cells = <2>;
187 #size-cells = <1>;
188 ranges = < 0 0 0xfc000000 0x02000000
189 1 0 0xe0000000 0x04000000 // CS1 range, SM501
190 3 0 0xe8000000 0x00080000>;
191
192 flash@0,0 {
193 compatible = "cfi-flash";
194 reg = <0 0 0x02000000>;
195 bank-width = <4>;
196 device-width = <2>;
197 #size-cells = <1>;
198 #address-cells = <1>;
199 };
200
201 display@1,0 {
202 compatible = "smi,sm501";
203 reg = <1 0x00000000 0x00800000
204 1 0x03e00000 0x00200000>;
205 mode = "640x480-32@60";
206 interrupts = <1 1 3>;
207 little-endian;
208 };
209
210 mram0@3,0 {
211 compatible = "mtd-ram";
212 reg = <3 0x00000 0x80000>;
213 bank-width = <1>;
214 };
215 };
216
217 pci@f0000d00 {
218 #interrupt-cells = <1>;
219 #size-cells = <2>;
220 #address-cells = <3>;
221 device_type = "pci";
222 compatible = "fsl,mpc5200-pci";
223 reg = <0xf0000d00 0x100>;
224 interrupt-map-mask = <0xf800 0 0 7>;
225 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3
226 0xc000 0 0 2 &mpc5200_pic 0 0 3
227 0xc000 0 0 3 &mpc5200_pic 0 0 3
228 0xc000 0 0 4 &mpc5200_pic 0 0 3>;
229 clock-frequency = <0>; // From boot loader
230 interrupts = <2 8 0 2 9 0 2 10 0>;
231 bus-range = <0 0>;
232 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000
233 0x02000000 0 0x90000000 0x90000000 0 0x10000000
234 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
235 };
236};
diff --git a/arch/powerpc/boot/dts/p1023rds.dts b/arch/powerpc/boot/dts/p1023rds.dts
index d9b776740a6..d3b478242ea 100644
--- a/arch/powerpc/boot/dts/p1023rds.dts
+++ b/arch/powerpc/boot/dts/p1023rds.dts
@@ -449,6 +449,7 @@
449 interrupt-parent = <&mpic>; 449 interrupt-parent = <&mpic>;
450 interrupts = <16 2>; 450 interrupts = <16 2>;
451 interrupt-map-mask = <0xf800 0 0 7>; 451 interrupt-map-mask = <0xf800 0 0 7>;
452 /* IRQ[0:3] are pulled up on board, set to active-low */
452 interrupt-map = < 453 interrupt-map = <
453 /* IDSEL 0x0 */ 454 /* IDSEL 0x0 */
454 0000 0 0 1 &mpic 0 1 455 0000 0 0 1 &mpic 0 1
@@ -488,11 +489,15 @@
488 interrupt-parent = <&mpic>; 489 interrupt-parent = <&mpic>;
489 interrupts = <16 2>; 490 interrupts = <16 2>;
490 interrupt-map-mask = <0xf800 0 0 7>; 491 interrupt-map-mask = <0xf800 0 0 7>;
492 /*
493 * IRQ[4:6] only for PCIe, set to active-high,
494 * IRQ[7] is pulled up on board, set to active-low
495 */
491 interrupt-map = < 496 interrupt-map = <
492 /* IDSEL 0x0 */ 497 /* IDSEL 0x0 */
493 0000 0 0 1 &mpic 4 1 498 0000 0 0 1 &mpic 4 2
494 0000 0 0 2 &mpic 5 1 499 0000 0 0 2 &mpic 5 2
495 0000 0 0 3 &mpic 6 1 500 0000 0 0 3 &mpic 6 2
496 0000 0 0 4 &mpic 7 1 501 0000 0 0 4 &mpic 7 1
497 >; 502 >;
498 ranges = <0x2000000 0x0 0xa0000000 503 ranges = <0x2000000 0x0 0xa0000000
@@ -527,12 +532,16 @@
527 interrupt-parent = <&mpic>; 532 interrupt-parent = <&mpic>;
528 interrupts = <16 2>; 533 interrupts = <16 2>;
529 interrupt-map-mask = <0xf800 0 0 7>; 534 interrupt-map-mask = <0xf800 0 0 7>;
535 /*
536 * IRQ[8:10] are pulled up on board, set to active-low
537 * IRQ[11] only for PCIe, set to active-high,
538 */
530 interrupt-map = < 539 interrupt-map = <
531 /* IDSEL 0x0 */ 540 /* IDSEL 0x0 */
532 0000 0 0 1 &mpic 8 1 541 0000 0 0 1 &mpic 8 1
533 0000 0 0 2 &mpic 9 1 542 0000 0 0 2 &mpic 9 1
534 0000 0 0 3 &mpic 10 1 543 0000 0 0 3 &mpic 10 1
535 0000 0 0 4 &mpic 11 1 544 0000 0 0 4 &mpic 11 2
536 >; 545 >;
537 ranges = <0x2000000 0x0 0x80000000 546 ranges = <0x2000000 0x0 0x80000000
538 0x2000000 0x0 0x80000000 547 0x2000000 0x0 0x80000000
diff --git a/arch/powerpc/configs/52xx/tqm5200_defconfig b/arch/powerpc/configs/52xx/tqm5200_defconfig
index 959cd2cfc27..716a37be16e 100644
--- a/arch/powerpc/configs/52xx/tqm5200_defconfig
+++ b/arch/powerpc/configs/52xx/tqm5200_defconfig
@@ -1,9 +1,10 @@
1CONFIG_EXPERIMENTAL=y 1CONFIG_EXPERIMENTAL=y
2CONFIG_SYSVIPC=y 2CONFIG_SYSVIPC=y
3CONFIG_SPARSE_IRQ=y
3CONFIG_LOG_BUF_SHIFT=14 4CONFIG_LOG_BUF_SHIFT=14
4CONFIG_BLK_DEV_INITRD=y 5CONFIG_BLK_DEV_INITRD=y
5# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 6# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
6CONFIG_EXPERT=y 7CONFIG_EMBEDDED=y
7# CONFIG_SYSCTL_SYSCALL is not set 8# CONFIG_SYSCTL_SYSCALL is not set
8# CONFIG_KALLSYMS is not set 9# CONFIG_KALLSYMS is not set
9# CONFIG_EPOLL is not set 10# CONFIG_EPOLL is not set
@@ -17,7 +18,6 @@ CONFIG_PPC_MPC5200_SIMPLE=y
17CONFIG_PPC_MPC5200_BUGFIX=y 18CONFIG_PPC_MPC5200_BUGFIX=y
18# CONFIG_PPC_PMAC is not set 19# CONFIG_PPC_PMAC is not set
19CONFIG_PPC_BESTCOMM=y 20CONFIG_PPC_BESTCOMM=y
20CONFIG_SPARSE_IRQ=y
21CONFIG_PM=y 21CONFIG_PM=y
22# CONFIG_PCI is not set 22# CONFIG_PCI is not set
23CONFIG_NET=y 23CONFIG_NET=y
@@ -38,17 +38,18 @@ CONFIG_MTD=y
38CONFIG_MTD_CONCAT=y 38CONFIG_MTD_CONCAT=y
39CONFIG_MTD_PARTITIONS=y 39CONFIG_MTD_PARTITIONS=y
40CONFIG_MTD_CMDLINE_PARTS=y 40CONFIG_MTD_CMDLINE_PARTS=y
41CONFIG_MTD_OF_PARTS=y
41CONFIG_MTD_CHAR=y 42CONFIG_MTD_CHAR=y
42CONFIG_MTD_BLOCK=y 43CONFIG_MTD_BLOCK=y
43CONFIG_MTD_CFI=y 44CONFIG_MTD_CFI=y
44CONFIG_MTD_CFI_AMDSTD=y 45CONFIG_MTD_CFI_AMDSTD=y
45CONFIG_MTD_ROM=y 46CONFIG_MTD_ROM=y
46CONFIG_MTD_PHYSMAP_OF=y 47CONFIG_MTD_PHYSMAP_OF=y
48CONFIG_MTD_PLATRAM=y
47CONFIG_PROC_DEVICETREE=y 49CONFIG_PROC_DEVICETREE=y
48CONFIG_BLK_DEV_LOOP=y 50CONFIG_BLK_DEV_LOOP=y
49CONFIG_BLK_DEV_RAM=y 51CONFIG_BLK_DEV_RAM=y
50CONFIG_BLK_DEV_RAM_SIZE=32768 52CONFIG_BLK_DEV_RAM_SIZE=32768
51# CONFIG_MISC_DEVICES is not set
52CONFIG_BLK_DEV_SD=y 53CONFIG_BLK_DEV_SD=y
53CONFIG_CHR_DEV_SG=y 54CONFIG_CHR_DEV_SG=y
54CONFIG_ATA=y 55CONFIG_ATA=y
@@ -56,13 +57,11 @@ CONFIG_PATA_MPC52xx=y
56CONFIG_PATA_PLATFORM=y 57CONFIG_PATA_PLATFORM=y
57CONFIG_NETDEVICES=y 58CONFIG_NETDEVICES=y
58CONFIG_LXT_PHY=y 59CONFIG_LXT_PHY=y
60CONFIG_FIXED_PHY=y
59CONFIG_NET_ETHERNET=y 61CONFIG_NET_ETHERNET=y
60CONFIG_FEC_MPC52xx=y 62CONFIG_FEC_MPC52xx=y
61# CONFIG_NETDEV_1000 is not set 63# CONFIG_NETDEV_1000 is not set
62# CONFIG_NETDEV_10000 is not set 64# CONFIG_NETDEV_10000 is not set
63# CONFIG_INPUT is not set
64# CONFIG_SERIO is not set
65# CONFIG_VT is not set
66CONFIG_SERIAL_MPC52xx=y 65CONFIG_SERIAL_MPC52xx=y
67CONFIG_SERIAL_MPC52xx_CONSOLE=y 66CONFIG_SERIAL_MPC52xx_CONSOLE=y
68CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD=115200 67CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD=115200
@@ -70,7 +69,13 @@ CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD=115200
70CONFIG_I2C=y 69CONFIG_I2C=y
71CONFIG_I2C_CHARDEV=y 70CONFIG_I2C_CHARDEV=y
72CONFIG_I2C_MPC=y 71CONFIG_I2C_MPC=y
72CONFIG_SENSORS_LM80=y
73CONFIG_WATCHDOG=y 73CONFIG_WATCHDOG=y
74CONFIG_MFD_SM501=y
75CONFIG_FB=y
76CONFIG_FB_FOREIGN_ENDIAN=y
77CONFIG_FB_SM501=y
78CONFIG_FRAMEBUFFER_CONSOLE=y
74CONFIG_USB=y 79CONFIG_USB=y
75CONFIG_USB_DEVICEFS=y 80CONFIG_USB_DEVICEFS=y
76# CONFIG_USB_DEVICE_CLASS is not set 81# CONFIG_USB_DEVICE_CLASS is not set
@@ -80,10 +85,10 @@ CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
80CONFIG_USB_STORAGE=y 85CONFIG_USB_STORAGE=y
81CONFIG_RTC_CLASS=y 86CONFIG_RTC_CLASS=y
82CONFIG_RTC_DRV_DS1307=y 87CONFIG_RTC_DRV_DS1307=y
88CONFIG_RTC_DRV_DS1374=y
83CONFIG_EXT2_FS=y 89CONFIG_EXT2_FS=y
84CONFIG_EXT3_FS=y 90CONFIG_EXT3_FS=y
85# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set 91# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
86CONFIG_INOTIFY=y
87CONFIG_MSDOS_FS=y 92CONFIG_MSDOS_FS=y
88CONFIG_VFAT_FS=y 93CONFIG_VFAT_FS=y
89CONFIG_PROC_KCORE=y 94CONFIG_PROC_KCORE=y
@@ -102,7 +107,6 @@ CONFIG_DEBUG_KERNEL=y
102CONFIG_DETECT_HUNG_TASK=y 107CONFIG_DETECT_HUNG_TASK=y
103# CONFIG_DEBUG_BUGVERBOSE is not set 108# CONFIG_DEBUG_BUGVERBOSE is not set
104CONFIG_DEBUG_INFO=y 109CONFIG_DEBUG_INFO=y
105# CONFIG_RCU_CPU_STALL_DETECTOR is not set
106CONFIG_CRYPTO_ECB=y 110CONFIG_CRYPTO_ECB=y
107CONFIG_CRYPTO_PCBC=y 111CONFIG_CRYPTO_PCBC=y
108# CONFIG_CRYPTO_ANSI_CPRNG is not set 112# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/powerpc/configs/ppc44x_defconfig b/arch/powerpc/configs/ppc44x_defconfig
index 6cdf1c0d2c8..3b98d735434 100644
--- a/arch/powerpc/configs/ppc44x_defconfig
+++ b/arch/powerpc/configs/ppc44x_defconfig
@@ -52,6 +52,8 @@ CONFIG_MTD_CFI=y
52CONFIG_MTD_JEDECPROBE=y 52CONFIG_MTD_JEDECPROBE=y
53CONFIG_MTD_CFI_AMDSTD=y 53CONFIG_MTD_CFI_AMDSTD=y
54CONFIG_MTD_PHYSMAP_OF=y 54CONFIG_MTD_PHYSMAP_OF=y
55CONFIG_MTD_NAND=m
56CONFIG_MTD_NAND_NDFC=m
55CONFIG_MTD_UBI=m 57CONFIG_MTD_UBI=m
56CONFIG_MTD_UBI_GLUEBI=m 58CONFIG_MTD_UBI_GLUEBI=m
57CONFIG_PROC_DEVICETREE=y 59CONFIG_PROC_DEVICETREE=y
diff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig
index 84a685a505f..535711fcb13 100644
--- a/arch/powerpc/configs/ppc64_defconfig
+++ b/arch/powerpc/configs/ppc64_defconfig
@@ -485,3 +485,7 @@ CONFIG_CRYPTO_TWOFISH=m
485CONFIG_CRYPTO_LZO=m 485CONFIG_CRYPTO_LZO=m
486# CONFIG_CRYPTO_ANSI_CPRNG is not set 486# CONFIG_CRYPTO_ANSI_CPRNG is not set
487# CONFIG_CRYPTO_HW is not set 487# CONFIG_CRYPTO_HW is not set
488CONFIG_VIRTUALIZATION=y
489CONFIG_KVM_BOOK3S_64=m
490CONFIG_KVM_BOOK3S_64_HV=y
491CONFIG_VHOST_NET=m
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig
index 96a58b70970..a72f2415a64 100644
--- a/arch/powerpc/configs/pseries_defconfig
+++ b/arch/powerpc/configs/pseries_defconfig
@@ -362,3 +362,7 @@ CONFIG_CRYPTO_TWOFISH=m
362CONFIG_CRYPTO_LZO=m 362CONFIG_CRYPTO_LZO=m
363# CONFIG_CRYPTO_ANSI_CPRNG is not set 363# CONFIG_CRYPTO_ANSI_CPRNG is not set
364# CONFIG_CRYPTO_HW is not set 364# CONFIG_CRYPTO_HW is not set
365CONFIG_VIRTUALIZATION=y
366CONFIG_KVM_BOOK3S_64=m
367CONFIG_KVM_BOOK3S_64_HV=y
368CONFIG_VHOST_NET=m
diff --git a/arch/powerpc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h
index e2a4c26ad37..02e41b53488 100644
--- a/arch/powerpc/include/asm/atomic.h
+++ b/arch/powerpc/include/asm/atomic.h
@@ -49,13 +49,13 @@ static __inline__ int atomic_add_return(int a, atomic_t *v)
49 int t; 49 int t;
50 50
51 __asm__ __volatile__( 51 __asm__ __volatile__(
52 PPC_RELEASE_BARRIER 52 PPC_ATOMIC_ENTRY_BARRIER
53"1: lwarx %0,0,%2 # atomic_add_return\n\ 53"1: lwarx %0,0,%2 # atomic_add_return\n\
54 add %0,%1,%0\n" 54 add %0,%1,%0\n"
55 PPC405_ERR77(0,%2) 55 PPC405_ERR77(0,%2)
56" stwcx. %0,0,%2 \n\ 56" stwcx. %0,0,%2 \n\
57 bne- 1b" 57 bne- 1b"
58 PPC_ACQUIRE_BARRIER 58 PPC_ATOMIC_EXIT_BARRIER
59 : "=&r" (t) 59 : "=&r" (t)
60 : "r" (a), "r" (&v->counter) 60 : "r" (a), "r" (&v->counter)
61 : "cc", "memory"); 61 : "cc", "memory");
@@ -85,13 +85,13 @@ static __inline__ int atomic_sub_return(int a, atomic_t *v)
85 int t; 85 int t;
86 86
87 __asm__ __volatile__( 87 __asm__ __volatile__(
88 PPC_RELEASE_BARRIER 88 PPC_ATOMIC_ENTRY_BARRIER
89"1: lwarx %0,0,%2 # atomic_sub_return\n\ 89"1: lwarx %0,0,%2 # atomic_sub_return\n\
90 subf %0,%1,%0\n" 90 subf %0,%1,%0\n"
91 PPC405_ERR77(0,%2) 91 PPC405_ERR77(0,%2)
92" stwcx. %0,0,%2 \n\ 92" stwcx. %0,0,%2 \n\
93 bne- 1b" 93 bne- 1b"
94 PPC_ACQUIRE_BARRIER 94 PPC_ATOMIC_EXIT_BARRIER
95 : "=&r" (t) 95 : "=&r" (t)
96 : "r" (a), "r" (&v->counter) 96 : "r" (a), "r" (&v->counter)
97 : "cc", "memory"); 97 : "cc", "memory");
@@ -119,13 +119,13 @@ static __inline__ int atomic_inc_return(atomic_t *v)
119 int t; 119 int t;
120 120
121 __asm__ __volatile__( 121 __asm__ __volatile__(
122 PPC_RELEASE_BARRIER 122 PPC_ATOMIC_ENTRY_BARRIER
123"1: lwarx %0,0,%1 # atomic_inc_return\n\ 123"1: lwarx %0,0,%1 # atomic_inc_return\n\
124 addic %0,%0,1\n" 124 addic %0,%0,1\n"
125 PPC405_ERR77(0,%1) 125 PPC405_ERR77(0,%1)
126" stwcx. %0,0,%1 \n\ 126" stwcx. %0,0,%1 \n\
127 bne- 1b" 127 bne- 1b"
128 PPC_ACQUIRE_BARRIER 128 PPC_ATOMIC_EXIT_BARRIER
129 : "=&r" (t) 129 : "=&r" (t)
130 : "r" (&v->counter) 130 : "r" (&v->counter)
131 : "cc", "xer", "memory"); 131 : "cc", "xer", "memory");
@@ -163,13 +163,13 @@ static __inline__ int atomic_dec_return(atomic_t *v)
163 int t; 163 int t;
164 164
165 __asm__ __volatile__( 165 __asm__ __volatile__(
166 PPC_RELEASE_BARRIER 166 PPC_ATOMIC_ENTRY_BARRIER
167"1: lwarx %0,0,%1 # atomic_dec_return\n\ 167"1: lwarx %0,0,%1 # atomic_dec_return\n\
168 addic %0,%0,-1\n" 168 addic %0,%0,-1\n"
169 PPC405_ERR77(0,%1) 169 PPC405_ERR77(0,%1)
170" stwcx. %0,0,%1\n\ 170" stwcx. %0,0,%1\n\
171 bne- 1b" 171 bne- 1b"
172 PPC_ACQUIRE_BARRIER 172 PPC_ATOMIC_EXIT_BARRIER
173 : "=&r" (t) 173 : "=&r" (t)
174 : "r" (&v->counter) 174 : "r" (&v->counter)
175 : "cc", "xer", "memory"); 175 : "cc", "xer", "memory");
@@ -194,7 +194,7 @@ static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
194 int t; 194 int t;
195 195
196 __asm__ __volatile__ ( 196 __asm__ __volatile__ (
197 PPC_RELEASE_BARRIER 197 PPC_ATOMIC_ENTRY_BARRIER
198"1: lwarx %0,0,%1 # __atomic_add_unless\n\ 198"1: lwarx %0,0,%1 # __atomic_add_unless\n\
199 cmpw 0,%0,%3 \n\ 199 cmpw 0,%0,%3 \n\
200 beq- 2f \n\ 200 beq- 2f \n\
@@ -202,7 +202,7 @@ static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
202 PPC405_ERR77(0,%2) 202 PPC405_ERR77(0,%2)
203" stwcx. %0,0,%1 \n\ 203" stwcx. %0,0,%1 \n\
204 bne- 1b \n" 204 bne- 1b \n"
205 PPC_ACQUIRE_BARRIER 205 PPC_ATOMIC_EXIT_BARRIER
206" subf %0,%2,%0 \n\ 206" subf %0,%2,%0 \n\
2072:" 2072:"
208 : "=&r" (t) 208 : "=&r" (t)
@@ -226,7 +226,7 @@ static __inline__ int atomic_dec_if_positive(atomic_t *v)
226 int t; 226 int t;
227 227
228 __asm__ __volatile__( 228 __asm__ __volatile__(
229 PPC_RELEASE_BARRIER 229 PPC_ATOMIC_ENTRY_BARRIER
230"1: lwarx %0,0,%1 # atomic_dec_if_positive\n\ 230"1: lwarx %0,0,%1 # atomic_dec_if_positive\n\
231 cmpwi %0,1\n\ 231 cmpwi %0,1\n\
232 addi %0,%0,-1\n\ 232 addi %0,%0,-1\n\
@@ -234,7 +234,7 @@ static __inline__ int atomic_dec_if_positive(atomic_t *v)
234 PPC405_ERR77(0,%1) 234 PPC405_ERR77(0,%1)
235" stwcx. %0,0,%1\n\ 235" stwcx. %0,0,%1\n\
236 bne- 1b" 236 bne- 1b"
237 PPC_ACQUIRE_BARRIER 237 PPC_ATOMIC_EXIT_BARRIER
238 "\n\ 238 "\n\
2392:" : "=&b" (t) 2392:" : "=&b" (t)
240 : "r" (&v->counter) 240 : "r" (&v->counter)
@@ -285,12 +285,12 @@ static __inline__ long atomic64_add_return(long a, atomic64_t *v)
285 long t; 285 long t;
286 286
287 __asm__ __volatile__( 287 __asm__ __volatile__(
288 PPC_RELEASE_BARRIER 288 PPC_ATOMIC_ENTRY_BARRIER
289"1: ldarx %0,0,%2 # atomic64_add_return\n\ 289"1: ldarx %0,0,%2 # atomic64_add_return\n\
290 add %0,%1,%0\n\ 290 add %0,%1,%0\n\
291 stdcx. %0,0,%2 \n\ 291 stdcx. %0,0,%2 \n\
292 bne- 1b" 292 bne- 1b"
293 PPC_ACQUIRE_BARRIER 293 PPC_ATOMIC_EXIT_BARRIER
294 : "=&r" (t) 294 : "=&r" (t)
295 : "r" (a), "r" (&v->counter) 295 : "r" (a), "r" (&v->counter)
296 : "cc", "memory"); 296 : "cc", "memory");
@@ -319,12 +319,12 @@ static __inline__ long atomic64_sub_return(long a, atomic64_t *v)
319 long t; 319 long t;
320 320
321 __asm__ __volatile__( 321 __asm__ __volatile__(
322 PPC_RELEASE_BARRIER 322 PPC_ATOMIC_ENTRY_BARRIER
323"1: ldarx %0,0,%2 # atomic64_sub_return\n\ 323"1: ldarx %0,0,%2 # atomic64_sub_return\n\
324 subf %0,%1,%0\n\ 324 subf %0,%1,%0\n\
325 stdcx. %0,0,%2 \n\ 325 stdcx. %0,0,%2 \n\
326 bne- 1b" 326 bne- 1b"
327 PPC_ACQUIRE_BARRIER 327 PPC_ATOMIC_EXIT_BARRIER
328 : "=&r" (t) 328 : "=&r" (t)
329 : "r" (a), "r" (&v->counter) 329 : "r" (a), "r" (&v->counter)
330 : "cc", "memory"); 330 : "cc", "memory");
@@ -351,12 +351,12 @@ static __inline__ long atomic64_inc_return(atomic64_t *v)
351 long t; 351 long t;
352 352
353 __asm__ __volatile__( 353 __asm__ __volatile__(
354 PPC_RELEASE_BARRIER 354 PPC_ATOMIC_ENTRY_BARRIER
355"1: ldarx %0,0,%1 # atomic64_inc_return\n\ 355"1: ldarx %0,0,%1 # atomic64_inc_return\n\
356 addic %0,%0,1\n\ 356 addic %0,%0,1\n\
357 stdcx. %0,0,%1 \n\ 357 stdcx. %0,0,%1 \n\
358 bne- 1b" 358 bne- 1b"
359 PPC_ACQUIRE_BARRIER 359 PPC_ATOMIC_EXIT_BARRIER
360 : "=&r" (t) 360 : "=&r" (t)
361 : "r" (&v->counter) 361 : "r" (&v->counter)
362 : "cc", "xer", "memory"); 362 : "cc", "xer", "memory");
@@ -393,12 +393,12 @@ static __inline__ long atomic64_dec_return(atomic64_t *v)
393 long t; 393 long t;
394 394
395 __asm__ __volatile__( 395 __asm__ __volatile__(
396 PPC_RELEASE_BARRIER 396 PPC_ATOMIC_ENTRY_BARRIER
397"1: ldarx %0,0,%1 # atomic64_dec_return\n\ 397"1: ldarx %0,0,%1 # atomic64_dec_return\n\
398 addic %0,%0,-1\n\ 398 addic %0,%0,-1\n\
399 stdcx. %0,0,%1\n\ 399 stdcx. %0,0,%1\n\
400 bne- 1b" 400 bne- 1b"
401 PPC_ACQUIRE_BARRIER 401 PPC_ATOMIC_EXIT_BARRIER
402 : "=&r" (t) 402 : "=&r" (t)
403 : "r" (&v->counter) 403 : "r" (&v->counter)
404 : "cc", "xer", "memory"); 404 : "cc", "xer", "memory");
@@ -418,13 +418,13 @@ static __inline__ long atomic64_dec_if_positive(atomic64_t *v)
418 long t; 418 long t;
419 419
420 __asm__ __volatile__( 420 __asm__ __volatile__(
421 PPC_RELEASE_BARRIER 421 PPC_ATOMIC_ENTRY_BARRIER
422"1: ldarx %0,0,%1 # atomic64_dec_if_positive\n\ 422"1: ldarx %0,0,%1 # atomic64_dec_if_positive\n\
423 addic. %0,%0,-1\n\ 423 addic. %0,%0,-1\n\
424 blt- 2f\n\ 424 blt- 2f\n\
425 stdcx. %0,0,%1\n\ 425 stdcx. %0,0,%1\n\
426 bne- 1b" 426 bne- 1b"
427 PPC_ACQUIRE_BARRIER 427 PPC_ATOMIC_EXIT_BARRIER
428 "\n\ 428 "\n\
4292:" : "=&r" (t) 4292:" : "=&r" (t)
430 : "r" (&v->counter) 430 : "r" (&v->counter)
@@ -450,14 +450,14 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
450 long t; 450 long t;
451 451
452 __asm__ __volatile__ ( 452 __asm__ __volatile__ (
453 PPC_RELEASE_BARRIER 453 PPC_ATOMIC_ENTRY_BARRIER
454"1: ldarx %0,0,%1 # __atomic_add_unless\n\ 454"1: ldarx %0,0,%1 # __atomic_add_unless\n\
455 cmpd 0,%0,%3 \n\ 455 cmpd 0,%0,%3 \n\
456 beq- 2f \n\ 456 beq- 2f \n\
457 add %0,%2,%0 \n" 457 add %0,%2,%0 \n"
458" stdcx. %0,0,%1 \n\ 458" stdcx. %0,0,%1 \n\
459 bne- 1b \n" 459 bne- 1b \n"
460 PPC_ACQUIRE_BARRIER 460 PPC_ATOMIC_EXIT_BARRIER
461" subf %0,%2,%0 \n\ 461" subf %0,%2,%0 \n\
4622:" 4622:"
463 : "=&r" (t) 463 : "=&r" (t)
diff --git a/arch/powerpc/include/asm/bitops.h b/arch/powerpc/include/asm/bitops.h
index e137afcc10f..efdc92618b3 100644
--- a/arch/powerpc/include/asm/bitops.h
+++ b/arch/powerpc/include/asm/bitops.h
@@ -124,14 +124,14 @@ static __inline__ unsigned long fn( \
124 return (old & mask); \ 124 return (old & mask); \
125} 125}
126 126
127DEFINE_TESTOP(test_and_set_bits, or, PPC_RELEASE_BARRIER, 127DEFINE_TESTOP(test_and_set_bits, or, PPC_ATOMIC_ENTRY_BARRIER,
128 PPC_ACQUIRE_BARRIER, 0) 128 PPC_ATOMIC_EXIT_BARRIER, 0)
129DEFINE_TESTOP(test_and_set_bits_lock, or, "", 129DEFINE_TESTOP(test_and_set_bits_lock, or, "",
130 PPC_ACQUIRE_BARRIER, 1) 130 PPC_ACQUIRE_BARRIER, 1)
131DEFINE_TESTOP(test_and_clear_bits, andc, PPC_RELEASE_BARRIER, 131DEFINE_TESTOP(test_and_clear_bits, andc, PPC_ATOMIC_ENTRY_BARRIER,
132 PPC_ACQUIRE_BARRIER, 0) 132 PPC_ATOMIC_EXIT_BARRIER, 0)
133DEFINE_TESTOP(test_and_change_bits, xor, PPC_RELEASE_BARRIER, 133DEFINE_TESTOP(test_and_change_bits, xor, PPC_ATOMIC_ENTRY_BARRIER,
134 PPC_ACQUIRE_BARRIER, 0) 134 PPC_ATOMIC_EXIT_BARRIER, 0)
135 135
136static __inline__ int test_and_set_bit(unsigned long nr, 136static __inline__ int test_and_set_bit(unsigned long nr,
137 volatile unsigned long *addr) 137 volatile unsigned long *addr)
diff --git a/arch/powerpc/include/asm/floppy.h b/arch/powerpc/include/asm/floppy.h
index 24bd34c57e9..936a904ae78 100644
--- a/arch/powerpc/include/asm/floppy.h
+++ b/arch/powerpc/include/asm/floppy.h
@@ -108,10 +108,10 @@ static int fd_request_irq(void)
108{ 108{
109 if (can_use_virtual_dma) 109 if (can_use_virtual_dma)
110 return request_irq(FLOPPY_IRQ, floppy_hardint, 110 return request_irq(FLOPPY_IRQ, floppy_hardint,
111 IRQF_DISABLED, "floppy", NULL); 111 0, "floppy", NULL);
112 else 112 else
113 return request_irq(FLOPPY_IRQ, floppy_interrupt, 113 return request_irq(FLOPPY_IRQ, floppy_interrupt,
114 IRQF_DISABLED, "floppy", NULL); 114 0, "floppy", NULL);
115} 115}
116 116
117static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io) 117static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io)
diff --git a/arch/powerpc/include/asm/futex.h b/arch/powerpc/include/asm/futex.h
index c94e4a3fe2e..2a9cf845473 100644
--- a/arch/powerpc/include/asm/futex.h
+++ b/arch/powerpc/include/asm/futex.h
@@ -11,12 +11,13 @@
11 11
12#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ 12#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
13 __asm__ __volatile ( \ 13 __asm__ __volatile ( \
14 PPC_RELEASE_BARRIER \ 14 PPC_ATOMIC_ENTRY_BARRIER \
15"1: lwarx %0,0,%2\n" \ 15"1: lwarx %0,0,%2\n" \
16 insn \ 16 insn \
17 PPC405_ERR77(0, %2) \ 17 PPC405_ERR77(0, %2) \
18"2: stwcx. %1,0,%2\n" \ 18"2: stwcx. %1,0,%2\n" \
19 "bne- 1b\n" \ 19 "bne- 1b\n" \
20 PPC_ATOMIC_EXIT_BARRIER \
20 "li %1,0\n" \ 21 "li %1,0\n" \
21"3: .section .fixup,\"ax\"\n" \ 22"3: .section .fixup,\"ax\"\n" \
22"4: li %1,%3\n" \ 23"4: li %1,%3\n" \
@@ -92,14 +93,14 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
92 return -EFAULT; 93 return -EFAULT;
93 94
94 __asm__ __volatile__ ( 95 __asm__ __volatile__ (
95 PPC_RELEASE_BARRIER 96 PPC_ATOMIC_ENTRY_BARRIER
96"1: lwarx %1,0,%3 # futex_atomic_cmpxchg_inatomic\n\ 97"1: lwarx %1,0,%3 # futex_atomic_cmpxchg_inatomic\n\
97 cmpw 0,%1,%4\n\ 98 cmpw 0,%1,%4\n\
98 bne- 3f\n" 99 bne- 3f\n"
99 PPC405_ERR77(0,%3) 100 PPC405_ERR77(0,%3)
100"2: stwcx. %5,0,%3\n\ 101"2: stwcx. %5,0,%3\n\
101 bne- 1b\n" 102 bne- 1b\n"
102 PPC_ACQUIRE_BARRIER 103 PPC_ATOMIC_EXIT_BARRIER
103"3: .section .fixup,\"ax\"\n\ 104"3: .section .fixup,\"ax\"\n\
1044: li %0,%6\n\ 1054: li %0,%6\n\
105 b 3b\n\ 106 b 3b\n\
diff --git a/arch/powerpc/include/asm/kvm.h b/arch/powerpc/include/asm/kvm.h
index 08fe69edcd1..0ad432bc81d 100644
--- a/arch/powerpc/include/asm/kvm.h
+++ b/arch/powerpc/include/asm/kvm.h
@@ -149,12 +149,6 @@ struct kvm_regs {
149#define KVM_SREGS_E_UPDATE_DBSR (1 << 3) 149#define KVM_SREGS_E_UPDATE_DBSR (1 << 3)
150 150
151/* 151/*
152 * Book3S special bits to indicate contents in the struct by maintaining
153 * backwards compatibility with older structs. If adding a new field,
154 * please make sure to add a flag for that new field */
155#define KVM_SREGS_S_HIOR (1 << 0)
156
157/*
158 * In KVM_SET_SREGS, reserved/pad fields must be left untouched from a 152 * In KVM_SET_SREGS, reserved/pad fields must be left untouched from a
159 * previous KVM_GET_REGS. 153 * previous KVM_GET_REGS.
160 * 154 *
@@ -179,8 +173,6 @@ struct kvm_sregs {
179 __u64 ibat[8]; 173 __u64 ibat[8];
180 __u64 dbat[8]; 174 __u64 dbat[8];
181 } ppc32; 175 } ppc32;
182 __u64 flags; /* KVM_SREGS_S_ */
183 __u64 hior;
184 } s; 176 } s;
185 struct { 177 struct {
186 union { 178 union {
diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
index a384ffdf33d..d4df013ad77 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -90,8 +90,6 @@ struct kvmppc_vcpu_book3s {
90#endif 90#endif
91 int context_id[SID_CONTEXTS]; 91 int context_id[SID_CONTEXTS];
92 92
93 bool hior_sregs; /* HIOR is set by SREGS, not PVR */
94
95 struct hlist_head hpte_hash_pte[HPTEG_HASH_NUM_PTE]; 93 struct hlist_head hpte_hash_pte[HPTEG_HASH_NUM_PTE];
96 struct hlist_head hpte_hash_pte_long[HPTEG_HASH_NUM_PTE_LONG]; 94 struct hlist_head hpte_hash_pte_long[HPTEG_HASH_NUM_PTE_LONG];
97 struct hlist_head hpte_hash_vpte[HPTEG_HASH_NUM_VPTE]; 95 struct hlist_head hpte_hash_vpte[HPTEG_HASH_NUM_VPTE];
diff --git a/arch/powerpc/include/asm/lv1call.h b/arch/powerpc/include/asm/lv1call.h
index 9cd5fc828a3..f77c708c67a 100644
--- a/arch/powerpc/include/asm/lv1call.h
+++ b/arch/powerpc/include/asm/lv1call.h
@@ -316,7 +316,7 @@ LV1_CALL(gpu_context_free, 1, 0, 218 )
316LV1_CALL(gpu_context_iomap, 5, 0, 221 ) 316LV1_CALL(gpu_context_iomap, 5, 0, 221 )
317LV1_CALL(gpu_context_attribute, 6, 0, 225 ) 317LV1_CALL(gpu_context_attribute, 6, 0, 225 )
318LV1_CALL(gpu_context_intr, 1, 1, 227 ) 318LV1_CALL(gpu_context_intr, 1, 1, 227 )
319LV1_CALL(gpu_attribute, 5, 0, 228 ) 319LV1_CALL(gpu_attribute, 3, 0, 228 )
320LV1_CALL(get_rtc, 0, 2, 232 ) 320LV1_CALL(get_rtc, 0, 2, 232 )
321LV1_CALL(set_ppe_periodic_tracer_frequency, 1, 0, 240 ) 321LV1_CALL(set_ppe_periodic_tracer_frequency, 1, 0, 240 )
322LV1_CALL(start_ppe_periodic_tracer, 5, 0, 241 ) 322LV1_CALL(start_ppe_periodic_tracer, 5, 0, 241 )
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 28cdbd9f399..03c48e819c8 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -31,7 +31,7 @@
31 31
32#define MSR_ MSR_ME | MSR_CE 32#define MSR_ MSR_ME | MSR_CE
33#define MSR_KERNEL MSR_ | MSR_64BIT 33#define MSR_KERNEL MSR_ | MSR_64BIT
34#define MSR_USER32 MSR_ | MSR_PR | MSR_EE | MSR_DE 34#define MSR_USER32 MSR_ | MSR_PR | MSR_EE
35#define MSR_USER64 MSR_USER32 | MSR_64BIT 35#define MSR_USER64 MSR_USER32 | MSR_64BIT
36#elif defined (CONFIG_40x) 36#elif defined (CONFIG_40x)
37#define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR|MSR_CE) 37#define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR|MSR_CE)
diff --git a/arch/powerpc/include/asm/sections.h b/arch/powerpc/include/asm/sections.h
index 6fbce725c71..a0f358d4a00 100644
--- a/arch/powerpc/include/asm/sections.h
+++ b/arch/powerpc/include/asm/sections.h
@@ -8,7 +8,7 @@
8 8
9#ifdef __powerpc64__ 9#ifdef __powerpc64__
10 10
11extern char _end[]; 11extern char __end_interrupts[];
12 12
13static inline int in_kernel_text(unsigned long addr) 13static inline int in_kernel_text(unsigned long addr)
14{ 14{
diff --git a/arch/powerpc/include/asm/synch.h b/arch/powerpc/include/asm/synch.h
index d7cab44643c..e682a7143ed 100644
--- a/arch/powerpc/include/asm/synch.h
+++ b/arch/powerpc/include/asm/synch.h
@@ -13,6 +13,7 @@
13extern unsigned int __start___lwsync_fixup, __stop___lwsync_fixup; 13extern unsigned int __start___lwsync_fixup, __stop___lwsync_fixup;
14extern void do_lwsync_fixups(unsigned long value, void *fixup_start, 14extern void do_lwsync_fixups(unsigned long value, void *fixup_start,
15 void *fixup_end); 15 void *fixup_end);
16extern void do_final_fixups(void);
16 17
17static inline void eieio(void) 18static inline void eieio(void)
18{ 19{
@@ -41,11 +42,15 @@ static inline void isync(void)
41 START_LWSYNC_SECTION(97); \ 42 START_LWSYNC_SECTION(97); \
42 isync; \ 43 isync; \
43 MAKE_LWSYNC_SECTION_ENTRY(97, __lwsync_fixup); 44 MAKE_LWSYNC_SECTION_ENTRY(97, __lwsync_fixup);
44#define PPC_ACQUIRE_BARRIER "\n" stringify_in_c(__PPC_ACQUIRE_BARRIER) 45#define PPC_ACQUIRE_BARRIER "\n" stringify_in_c(__PPC_ACQUIRE_BARRIER)
45#define PPC_RELEASE_BARRIER stringify_in_c(LWSYNC) "\n" 46#define PPC_RELEASE_BARRIER stringify_in_c(LWSYNC) "\n"
47#define PPC_ATOMIC_ENTRY_BARRIER "\n" stringify_in_c(LWSYNC) "\n"
48#define PPC_ATOMIC_EXIT_BARRIER "\n" stringify_in_c(sync) "\n"
46#else 49#else
47#define PPC_ACQUIRE_BARRIER 50#define PPC_ACQUIRE_BARRIER
48#define PPC_RELEASE_BARRIER 51#define PPC_RELEASE_BARRIER
52#define PPC_ATOMIC_ENTRY_BARRIER
53#define PPC_ATOMIC_EXIT_BARRIER
49#endif 54#endif
50 55
51#endif /* __KERNEL__ */ 56#endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/xics.h b/arch/powerpc/include/asm/xics.h
index bd6c401c0ee..c48de98ba94 100644
--- a/arch/powerpc/include/asm/xics.h
+++ b/arch/powerpc/include/asm/xics.h
@@ -15,8 +15,8 @@
15#define DEFAULT_PRIORITY 5 15#define DEFAULT_PRIORITY 5
16 16
17/* 17/*
18 * Mark IPIs as higher priority so we can take them inside interrupts that 18 * Mark IPIs as higher priority so we can take them inside interrupts
19 * arent marked IRQF_DISABLED 19 * FIXME: still true now?
20 */ 20 */
21#define IPI_PRIORITY 4 21#define IPI_PRIORITY 4
22 22
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 56212bc0ab0..4f80cf1ce77 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -215,7 +215,22 @@ reenable_mmu: /* re-enable mmu so we can */
215 stw r9,8(r1) 215 stw r9,8(r1)
216 stw r11,12(r1) 216 stw r11,12(r1)
217 stw r3,ORIG_GPR3(r1) 217 stw r3,ORIG_GPR3(r1)
218 /*
219 * The trace_hardirqs_off will use CALLER_ADDR0 and CALLER_ADDR1.
220 * If from user mode there is only one stack frame on the stack, and
221 * accessing CALLER_ADDR1 will cause oops. So we need create a dummy
222 * stack frame to make trace_hardirqs_off happy.
223 */
224 andi. r12,r12,MSR_PR
225 beq 11f
226 stwu r1,-16(r1)
227 bl trace_hardirqs_off
228 addi r1,r1,16
229 b 12f
230
23111:
218 bl trace_hardirqs_off 232 bl trace_hardirqs_off
23312:
219 lwz r0,GPR0(r1) 234 lwz r0,GPR0(r1)
220 lwz r3,ORIG_GPR3(r1) 235 lwz r3,ORIG_GPR3(r1)
221 lwz r4,GPR4(r1) 236 lwz r4,GPR4(r1)
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index a54d92fec61..cf9c69b9189 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -267,7 +267,7 @@ vsx_unavailable_pSeries_1:
267 267
268#ifdef CONFIG_CBE_RAS 268#ifdef CONFIG_CBE_RAS
269 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error) 269 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
270 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_HV, 0x1202) 270 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
271#endif /* CONFIG_CBE_RAS */ 271#endif /* CONFIG_CBE_RAS */
272 272
273 STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint) 273 STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
@@ -275,7 +275,7 @@ vsx_unavailable_pSeries_1:
275 275
276#ifdef CONFIG_CBE_RAS 276#ifdef CONFIG_CBE_RAS
277 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance) 277 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
278 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_HV, 0x1602) 278 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
279#endif /* CONFIG_CBE_RAS */ 279#endif /* CONFIG_CBE_RAS */
280 280
281 STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist) 281 STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
@@ -283,7 +283,7 @@ vsx_unavailable_pSeries_1:
283 283
284#ifdef CONFIG_CBE_RAS 284#ifdef CONFIG_CBE_RAS
285 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal) 285 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
286 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_HV, 0x1802) 286 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
287#endif /* CONFIG_CBE_RAS */ 287#endif /* CONFIG_CBE_RAS */
288 288
289 . = 0x3000 289 . = 0x3000
diff --git a/arch/powerpc/kernel/jump_label.c b/arch/powerpc/kernel/jump_label.c
index 368d158d665..a1ed8a8c7cb 100644
--- a/arch/powerpc/kernel/jump_label.c
+++ b/arch/powerpc/kernel/jump_label.c
@@ -11,6 +11,7 @@
11#include <linux/jump_label.h> 11#include <linux/jump_label.h>
12#include <asm/code-patching.h> 12#include <asm/code-patching.h>
13 13
14#ifdef HAVE_JUMP_LABEL
14void arch_jump_label_transform(struct jump_entry *entry, 15void arch_jump_label_transform(struct jump_entry *entry,
15 enum jump_label_type type) 16 enum jump_label_type type)
16{ 17{
@@ -21,3 +22,4 @@ void arch_jump_label_transform(struct jump_entry *entry,
21 else 22 else
22 patch_instruction(addr, PPC_INST_NOP); 23 patch_instruction(addr, PPC_INST_NOP);
23} 24}
25#endif
diff --git a/arch/powerpc/kernel/kvm.c b/arch/powerpc/kernel/kvm.c
index 35f27646c4f..2985338d0e1 100644
--- a/arch/powerpc/kernel/kvm.c
+++ b/arch/powerpc/kernel/kvm.c
@@ -132,7 +132,6 @@ static void kvm_patch_ins_b(u32 *inst, int addr)
132 /* On relocatable kernels interrupts handlers and our code 132 /* On relocatable kernels interrupts handlers and our code
133 can be in different regions, so we don't patch them */ 133 can be in different regions, so we don't patch them */
134 134
135 extern u32 __end_interrupts;
136 if ((ulong)inst < (ulong)&__end_interrupts) 135 if ((ulong)inst < (ulong)&__end_interrupts)
137 return; 136 return;
138#endif 137#endif
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index f7d760ab5ca..7cd07b42ca1 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -738,7 +738,7 @@ relocate_new_kernel:
738 mr r5, r31 738 mr r5, r31
739 739
740 li r0, 0 740 li r0, 0
741#elif defined(CONFIG_44x) && !defined(CONFIG_47x) 741#elif defined(CONFIG_44x) && !defined(CONFIG_PPC_47x)
742 742
743/* 743/*
744 * Code for setting up 1:1 mapping for PPC440x for KEXEC 744 * Code for setting up 1:1 mapping for PPC440x for KEXEC
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 9054ca9ab4f..6457574c0b2 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -486,28 +486,6 @@ struct task_struct *__switch_to(struct task_struct *prev,
486 new_thread = &new->thread; 486 new_thread = &new->thread;
487 old_thread = &current->thread; 487 old_thread = &current->thread;
488 488
489#if defined(CONFIG_PPC_BOOK3E_64)
490 /* XXX Current Book3E code doesn't deal with kernel side DBCR0,
491 * we always hold the user values, so we set it now.
492 *
493 * However, we ensure the kernel MSR:DE is appropriately cleared too
494 * to avoid spurrious single step exceptions in the kernel.
495 *
496 * This will have to change to merge with the ppc32 code at some point,
497 * but I don't like much what ppc32 is doing today so there's some
498 * thinking needed there
499 */
500 if ((new_thread->dbcr0 | old_thread->dbcr0) & DBCR0_IDM) {
501 u32 dbcr0;
502
503 mtmsr(mfmsr() & ~MSR_DE);
504 isync();
505 dbcr0 = mfspr(SPRN_DBCR0);
506 dbcr0 = (dbcr0 & DBCR0_EDM) | new_thread->dbcr0;
507 mtspr(SPRN_DBCR0, dbcr0);
508 }
509#endif /* CONFIG_PPC64_BOOK3E */
510
511#ifdef CONFIG_PPC64 489#ifdef CONFIG_PPC64
512 /* 490 /*
513 * Collect processor utilization data per process 491 * Collect processor utilization data per process
@@ -657,7 +635,7 @@ void show_regs(struct pt_regs * regs)
657 if ((regs->trap != 0xc00) && cpu_has_feature(CPU_FTR_CFAR)) 635 if ((regs->trap != 0xc00) && cpu_has_feature(CPU_FTR_CFAR))
658 printk("CFAR: "REG"\n", regs->orig_gpr3); 636 printk("CFAR: "REG"\n", regs->orig_gpr3);
659 if (trap == 0x300 || trap == 0x600) 637 if (trap == 0x300 || trap == 0x600)
660#ifdef CONFIG_PPC_ADV_DEBUG_REGS 638#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
661 printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr); 639 printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
662#else 640#else
663 printk("DAR: "REG", DSISR: %08lx\n", regs->dar, regs->dsisr); 641 printk("DAR: "REG", DSISR: %08lx\n", regs->dar, regs->dsisr);
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index b4fa6612749..cc584865b3d 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -1579,10 +1579,8 @@ static void __init prom_instantiate_rtas(void)
1579 return; 1579 return;
1580 1580
1581 base = alloc_down(size, PAGE_SIZE, 0); 1581 base = alloc_down(size, PAGE_SIZE, 0);
1582 if (base == 0) { 1582 if (base == 0)
1583 prom_printf("RTAS allocation failed !\n"); 1583 prom_panic("Could not allocate memory for RTAS\n");
1584 return;
1585 }
1586 1584
1587 rtas_inst = call_prom("open", 1, 1, ADDR("/rtas")); 1585 rtas_inst = call_prom("open", 1, 1, ADDR("/rtas"));
1588 if (!IHANDLE_VALID(rtas_inst)) { 1586 if (!IHANDLE_VALID(rtas_inst)) {
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index c1ce86357ec..ac761081511 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -107,6 +107,8 @@ notrace unsigned long __init early_init(unsigned long dt_ptr)
107 PTRRELOC(&__start___lwsync_fixup), 107 PTRRELOC(&__start___lwsync_fixup),
108 PTRRELOC(&__stop___lwsync_fixup)); 108 PTRRELOC(&__stop___lwsync_fixup));
109 109
110 do_final_fixups();
111
110 return KERNELBASE + offset; 112 return KERNELBASE + offset;
111} 113}
112 114
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 1a9dea80a69..fb9bb46e7e8 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -359,6 +359,7 @@ void __init setup_system(void)
359 &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup); 359 &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
360 do_lwsync_fixups(cur_cpu_spec->cpu_features, 360 do_lwsync_fixups(cur_cpu_spec->cpu_features,
361 &__start___lwsync_fixup, &__stop___lwsync_fixup); 361 &__start___lwsync_fixup, &__stop___lwsync_fixup);
362 do_final_fixups();
362 363
363 /* 364 /*
364 * Unflatten the device-tree passed by prom_init or kexec 365 * Unflatten the device-tree passed by prom_init or kexec
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index 78b76dc54df..836a5a19eb2 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -97,7 +97,7 @@ static inline int put_sigset_t(compat_sigset_t __user *uset, sigset_t *set)
97 compat_sigset_t cset; 97 compat_sigset_t cset;
98 98
99 switch (_NSIG_WORDS) { 99 switch (_NSIG_WORDS) {
100 case 4: cset.sig[5] = set->sig[3] & 0xffffffffull; 100 case 4: cset.sig[6] = set->sig[3] & 0xffffffffull;
101 cset.sig[7] = set->sig[3] >> 32; 101 cset.sig[7] = set->sig[3] >> 32;
102 case 3: cset.sig[4] = set->sig[2] & 0xffffffffull; 102 case 3: cset.sig[4] = set->sig[2] & 0xffffffffull;
103 cset.sig[5] = set->sig[2] >> 32; 103 cset.sig[5] = set->sig[2] >> 32;
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 25ddbfc7dd3..6df70907d60 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -187,7 +187,7 @@ int smp_request_message_ipi(int virq, int msg)
187 return 1; 187 return 1;
188 } 188 }
189#endif 189#endif
190 err = request_irq(virq, smp_ipi_action[msg], IRQF_DISABLED|IRQF_PERCPU, 190 err = request_irq(virq, smp_ipi_action[msg], IRQF_PERCPU,
191 smp_ipi_name[msg], 0); 191 smp_ipi_name[msg], 0);
192 WARN(err < 0, "unable to request_irq %d for %s (rc %d)\n", 192 WARN(err < 0, "unable to request_irq %d for %s (rc %d)\n",
193 virq, smp_ipi_name[msg], err); 193 virq, smp_ipi_name[msg], err);
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 4e5908264d1..5459d148a0f 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -1298,14 +1298,12 @@ void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status)
1298 1298
1299 if (user_mode(regs)) { 1299 if (user_mode(regs)) {
1300 current->thread.dbcr0 &= ~DBCR0_IC; 1300 current->thread.dbcr0 &= ~DBCR0_IC;
1301#ifdef CONFIG_PPC_ADV_DEBUG_REGS
1302 if (DBCR_ACTIVE_EVENTS(current->thread.dbcr0, 1301 if (DBCR_ACTIVE_EVENTS(current->thread.dbcr0,
1303 current->thread.dbcr1)) 1302 current->thread.dbcr1))
1304 regs->msr |= MSR_DE; 1303 regs->msr |= MSR_DE;
1305 else 1304 else
1306 /* Make sure the IDM bit is off */ 1305 /* Make sure the IDM bit is off */
1307 current->thread.dbcr0 &= ~DBCR0_IDM; 1306 current->thread.dbcr0 &= ~DBCR0_IDM;
1308#endif
1309 } 1307 }
1310 1308
1311 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip); 1309 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 0cdbc07cec1..0cb137a9b03 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -44,6 +44,7 @@
44#include <asm/processor.h> 44#include <asm/processor.h>
45#include <asm/cputhreads.h> 45#include <asm/cputhreads.h>
46#include <asm/page.h> 46#include <asm/page.h>
47#include <asm/hvcall.h>
47#include <linux/gfp.h> 48#include <linux/gfp.h>
48#include <linux/sched.h> 49#include <linux/sched.h>
49#include <linux/vmalloc.h> 50#include <linux/vmalloc.h>
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index f422231d923..44d8829334a 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -1263,7 +1263,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_206)
1263 addi r6,r5,VCORE_NAPPING_THREADS 1263 addi r6,r5,VCORE_NAPPING_THREADS
126431: lwarx r4,0,r6 126431: lwarx r4,0,r6
1265 or r4,r4,r0 1265 or r4,r4,r0
1266 popcntw r7,r4 1266 PPC_POPCNTW(r7,r4)
1267 cmpw r7,r8 1267 cmpw r7,r8
1268 bge 2f 1268 bge 2f
1269 stwcx. r4,0,r6 1269 stwcx. r4,0,r6
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
index bc4d50dec78..3c791e1eb67 100644
--- a/arch/powerpc/kvm/book3s_pr.c
+++ b/arch/powerpc/kvm/book3s_pr.c
@@ -151,16 +151,14 @@ void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr)
151#ifdef CONFIG_PPC_BOOK3S_64 151#ifdef CONFIG_PPC_BOOK3S_64
152 if ((pvr >= 0x330000) && (pvr < 0x70330000)) { 152 if ((pvr >= 0x330000) && (pvr < 0x70330000)) {
153 kvmppc_mmu_book3s_64_init(vcpu); 153 kvmppc_mmu_book3s_64_init(vcpu);
154 if (!to_book3s(vcpu)->hior_sregs) 154 to_book3s(vcpu)->hior = 0xfff00000;
155 to_book3s(vcpu)->hior = 0xfff00000;
156 to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL; 155 to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL;
157 vcpu->arch.cpu_type = KVM_CPU_3S_64; 156 vcpu->arch.cpu_type = KVM_CPU_3S_64;
158 } else 157 } else
159#endif 158#endif
160 { 159 {
161 kvmppc_mmu_book3s_32_init(vcpu); 160 kvmppc_mmu_book3s_32_init(vcpu);
162 if (!to_book3s(vcpu)->hior_sregs) 161 to_book3s(vcpu)->hior = 0;
163 to_book3s(vcpu)->hior = 0;
164 to_book3s(vcpu)->msr_mask = 0xffffffffULL; 162 to_book3s(vcpu)->msr_mask = 0xffffffffULL;
165 vcpu->arch.cpu_type = KVM_CPU_3S_32; 163 vcpu->arch.cpu_type = KVM_CPU_3S_32;
166 } 164 }
@@ -797,9 +795,6 @@ int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
797 } 795 }
798 } 796 }
799 797
800 if (sregs->u.s.flags & KVM_SREGS_S_HIOR)
801 sregs->u.s.hior = to_book3s(vcpu)->hior;
802
803 return 0; 798 return 0;
804} 799}
805 800
@@ -836,11 +831,6 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
836 /* Flush the MMU after messing with the segments */ 831 /* Flush the MMU after messing with the segments */
837 kvmppc_mmu_pte_flush(vcpu, 0, 0); 832 kvmppc_mmu_pte_flush(vcpu, 0, 0);
838 833
839 if (sregs->u.s.flags & KVM_SREGS_S_HIOR) {
840 to_book3s(vcpu)->hior_sregs = true;
841 to_book3s(vcpu)->hior = sregs->u.s.hior;
842 }
843
844 return 0; 834 return 0;
845} 835}
846 836
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
index efbf9ad8720..607fbdf24b8 100644
--- a/arch/powerpc/kvm/powerpc.c
+++ b/arch/powerpc/kvm/powerpc.c
@@ -208,7 +208,6 @@ int kvm_dev_ioctl_check_extension(long ext)
208 case KVM_CAP_PPC_BOOKE_SREGS: 208 case KVM_CAP_PPC_BOOKE_SREGS:
209#else 209#else
210 case KVM_CAP_PPC_SEGSTATE: 210 case KVM_CAP_PPC_SEGSTATE:
211 case KVM_CAP_PPC_HIOR:
212 case KVM_CAP_PPC_PAPR: 211 case KVM_CAP_PPC_PAPR:
213#endif 212#endif
214 case KVM_CAP_PPC_UNSET_IRQ: 213 case KVM_CAP_PPC_UNSET_IRQ:
diff --git a/arch/powerpc/lib/feature-fixups.c b/arch/powerpc/lib/feature-fixups.c
index 0d08d017139..7a8a7487cee 100644
--- a/arch/powerpc/lib/feature-fixups.c
+++ b/arch/powerpc/lib/feature-fixups.c
@@ -18,6 +18,8 @@
18#include <linux/init.h> 18#include <linux/init.h>
19#include <asm/cputable.h> 19#include <asm/cputable.h>
20#include <asm/code-patching.h> 20#include <asm/code-patching.h>
21#include <asm/page.h>
22#include <asm/sections.h>
21 23
22 24
23struct fixup_entry { 25struct fixup_entry {
@@ -128,6 +130,27 @@ void do_lwsync_fixups(unsigned long value, void *fixup_start, void *fixup_end)
128 } 130 }
129} 131}
130 132
133void do_final_fixups(void)
134{
135#if defined(CONFIG_PPC64) && defined(CONFIG_RELOCATABLE)
136 int *src, *dest;
137 unsigned long length;
138
139 if (PHYSICAL_START == 0)
140 return;
141
142 src = (int *)(KERNELBASE + PHYSICAL_START);
143 dest = (int *)KERNELBASE;
144 length = (__end_interrupts - _stext) / sizeof(int);
145
146 while (length--) {
147 patch_instruction(dest, *src);
148 src++;
149 dest++;
150 }
151#endif
152}
153
131#ifdef CONFIG_FTR_FIXUP_SELFTEST 154#ifdef CONFIG_FTR_FIXUP_SELFTEST
132 155
133#define check(x) \ 156#define check(x) \
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index 5964371303a..8558b572e55 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -15,6 +15,7 @@
15#include <linux/of_fdt.h> 15#include <linux/of_fdt.h>
16#include <linux/memblock.h> 16#include <linux/memblock.h>
17#include <linux/bootmem.h> 17#include <linux/bootmem.h>
18#include <linux/moduleparam.h>
18#include <asm/pgtable.h> 19#include <asm/pgtable.h>
19#include <asm/pgalloc.h> 20#include <asm/pgalloc.h>
20#include <asm/tlb.h> 21#include <asm/tlb.h>
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 16da595ff40..2dd6bdd31fe 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -34,6 +34,7 @@
34#include <linux/suspend.h> 34#include <linux/suspend.h>
35#include <linux/memblock.h> 35#include <linux/memblock.h>
36#include <linux/hugetlb.h> 36#include <linux/hugetlb.h>
37#include <linux/slab.h>
37 38
38#include <asm/pgalloc.h> 39#include <asm/pgalloc.h>
39#include <asm/prom.h> 40#include <asm/prom.h>
@@ -555,3 +556,32 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
555 book3e_hugetlb_preload(vma->vm_mm, address, *ptep); 556 book3e_hugetlb_preload(vma->vm_mm, address, *ptep);
556#endif 557#endif
557} 558}
559
560/*
561 * System memory should not be in /proc/iomem but various tools expect it
562 * (eg kdump).
563 */
564static int add_system_ram_resources(void)
565{
566 struct memblock_region *reg;
567
568 for_each_memblock(memory, reg) {
569 struct resource *res;
570 unsigned long base = reg->base;
571 unsigned long size = reg->size;
572
573 res = kzalloc(sizeof(struct resource), GFP_KERNEL);
574 WARN_ON(!res);
575
576 if (res) {
577 res->name = "System RAM";
578 res->start = base;
579 res->end = base + size - 1;
580 res->flags = IORESOURCE_MEM;
581 WARN_ON(request_resource(&iomem_resource, res) < 0);
582 }
583 }
584
585 return 0;
586}
587subsys_initcall(add_system_ram_resources);
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index c7dd4dec4df..b22a83a91cb 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -315,7 +315,10 @@ static int __init find_min_common_depth(void)
315 struct device_node *root; 315 struct device_node *root;
316 const char *vec5; 316 const char *vec5;
317 317
318 root = of_find_node_by_path("/rtas"); 318 if (firmware_has_feature(FW_FEATURE_OPAL))
319 root = of_find_node_by_path("/ibm,opal");
320 else
321 root = of_find_node_by_path("/rtas");
319 if (!root) 322 if (!root)
320 root = of_find_node_by_path("/"); 323 root = of_find_node_by_path("/");
321 324
@@ -344,12 +347,19 @@ static int __init find_min_common_depth(void)
344 347
345#define VEC5_AFFINITY_BYTE 5 348#define VEC5_AFFINITY_BYTE 5
346#define VEC5_AFFINITY 0x80 349#define VEC5_AFFINITY 0x80
347 chosen = of_find_node_by_path("/chosen"); 350
348 if (chosen) { 351 if (firmware_has_feature(FW_FEATURE_OPAL))
349 vec5 = of_get_property(chosen, "ibm,architecture-vec-5", NULL); 352 form1_affinity = 1;
350 if (vec5 && (vec5[VEC5_AFFINITY_BYTE] & VEC5_AFFINITY)) { 353 else {
351 dbg("Using form 1 affinity\n"); 354 chosen = of_find_node_by_path("/chosen");
352 form1_affinity = 1; 355 if (chosen) {
356 vec5 = of_get_property(chosen,
357 "ibm,architecture-vec-5", NULL);
358 if (vec5 && (vec5[VEC5_AFFINITY_BYTE] &
359 VEC5_AFFINITY)) {
360 dbg("Using form 1 affinity\n");
361 form1_affinity = 1;
362 }
353 } 363 }
354 } 364 }
355 365
diff --git a/arch/powerpc/platforms/52xx/mpc5200_simple.c b/arch/powerpc/platforms/52xx/mpc5200_simple.c
index e36d6e232ae..846b789fb19 100644
--- a/arch/powerpc/platforms/52xx/mpc5200_simple.c
+++ b/arch/powerpc/platforms/52xx/mpc5200_simple.c
@@ -50,6 +50,7 @@ static void __init mpc5200_simple_setup_arch(void)
50 50
51/* list of the supported boards */ 51/* list of the supported boards */
52static const char *board[] __initdata = { 52static const char *board[] __initdata = {
53 "anon,charon",
53 "intercontrol,digsy-mtc", 54 "intercontrol,digsy-mtc",
54 "manroland,mucmc52", 55 "manroland,mucmc52",
55 "manroland,uc101", 56 "manroland,uc101",
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index 45023e26aea..d7946be298b 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -203,7 +203,7 @@ config P3060_QDS
203 select PPC_E500MC 203 select PPC_E500MC
204 select PHYS_64BIT 204 select PHYS_64BIT
205 select SWIOTLB 205 select SWIOTLB
206 select MPC8xxx_GPIO 206 select GPIO_MPC8XXX
207 select HAS_RAPIDIO 207 select HAS_RAPIDIO
208 select PPC_EPAPR_HV_PIC 208 select PPC_EPAPR_HV_PIC
209 help 209 help
diff --git a/arch/powerpc/platforms/85xx/p3060_qds.c b/arch/powerpc/platforms/85xx/p3060_qds.c
index 01dcf44871e..081cf4ac188 100644
--- a/arch/powerpc/platforms/85xx/p3060_qds.c
+++ b/arch/powerpc/platforms/85xx/p3060_qds.c
@@ -70,7 +70,7 @@ define_machine(p3060_qds) {
70 .power_save = e500_idle, 70 .power_save = e500_idle,
71}; 71};
72 72
73machine_device_initcall(p3060_qds, declare_of_platform_devices); 73machine_device_initcall(p3060_qds, corenet_ds_publish_devices);
74 74
75#ifdef CONFIG_SWIOTLB 75#ifdef CONFIG_SWIOTLB
76machine_arch_initcall(p3060_qds, swiotlb_setup_bus_notifier); 76machine_arch_initcall(p3060_qds, swiotlb_setup_bus_notifier);
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index e4588721ef3..3fe6d927ad7 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -347,7 +347,7 @@ config SIMPLE_GPIO
347 347
348config MCU_MPC8349EMITX 348config MCU_MPC8349EMITX
349 bool "MPC8349E-mITX MCU driver" 349 bool "MPC8349E-mITX MCU driver"
350 depends on I2C && PPC_83xx 350 depends on I2C=y && PPC_83xx
351 select GENERIC_GPIO 351 select GENERIC_GPIO
352 select ARCH_REQUIRE_GPIOLIB 352 select ARCH_REQUIRE_GPIOLIB
353 help 353 help
diff --git a/arch/powerpc/platforms/cell/beat.c b/arch/powerpc/platforms/cell/beat.c
index 232fc384e85..852592b2b71 100644
--- a/arch/powerpc/platforms/cell/beat.c
+++ b/arch/powerpc/platforms/cell/beat.c
@@ -230,7 +230,7 @@ static int __init beat_register_event(void)
230 } 230 }
231 ev->virq = virq; 231 ev->virq = virq;
232 232
233 rc = request_irq(virq, ev->handler, IRQF_DISABLED, 233 rc = request_irq(virq, ev->handler, 0,
234 ev->typecode, NULL); 234 ev->typecode, NULL);
235 if (rc != 0) { 235 if (rc != 0) {
236 printk(KERN_ERR "Beat: failed to request virtual IRQ" 236 printk(KERN_ERR "Beat: failed to request virtual IRQ"
diff --git a/arch/powerpc/platforms/cell/celleb_scc_pciex.c b/arch/powerpc/platforms/cell/celleb_scc_pciex.c
index ae790ac4a58..14be2bd358b 100644
--- a/arch/powerpc/platforms/cell/celleb_scc_pciex.c
+++ b/arch/powerpc/platforms/cell/celleb_scc_pciex.c
@@ -514,7 +514,7 @@ static __init int celleb_setup_pciex(struct device_node *node,
514 virq = irq_create_of_mapping(oirq.controller, oirq.specifier, 514 virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
515 oirq.size); 515 oirq.size);
516 if (request_irq(virq, pciex_handle_internal_irq, 516 if (request_irq(virq, pciex_handle_internal_irq,
517 IRQF_DISABLED, "pciex", (void *)phb)) { 517 0, "pciex", (void *)phb)) {
518 pr_err("PCIEXC:Failed to request irq\n"); 518 pr_err("PCIEXC:Failed to request irq\n");
519 goto error; 519 goto error;
520 } 520 }
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index fc46fcac392..592c3d51b81 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -412,8 +412,7 @@ static void cell_iommu_enable_hardware(struct cbe_iommu *iommu)
412 IIC_IRQ_IOEX_ATI | (iommu->nid << IIC_IRQ_NODE_SHIFT)); 412 IIC_IRQ_IOEX_ATI | (iommu->nid << IIC_IRQ_NODE_SHIFT));
413 BUG_ON(virq == NO_IRQ); 413 BUG_ON(virq == NO_IRQ);
414 414
415 ret = request_irq(virq, ioc_interrupt, IRQF_DISABLED, 415 ret = request_irq(virq, ioc_interrupt, 0, iommu->name, iommu);
416 iommu->name, iommu);
417 BUG_ON(ret); 416 BUG_ON(ret);
418 417
419 /* set the IOC segment table origin register (and turn on the iommu) */ 418 /* set the IOC segment table origin register (and turn on the iommu) */
diff --git a/arch/powerpc/platforms/cell/pmu.c b/arch/powerpc/platforms/cell/pmu.c
index 1acf3601042..59c1a169410 100644
--- a/arch/powerpc/platforms/cell/pmu.c
+++ b/arch/powerpc/platforms/cell/pmu.c
@@ -392,7 +392,7 @@ static int __init cbe_init_pm_irq(void)
392 } 392 }
393 393
394 rc = request_irq(irq, cbe_pm_irq, 394 rc = request_irq(irq, cbe_pm_irq,
395 IRQF_DISABLED, "cbe-pmu-0", NULL); 395 0, "cbe-pmu-0", NULL);
396 if (rc) { 396 if (rc) {
397 printk("ERROR: Request for irq on node %d failed\n", 397 printk("ERROR: Request for irq on node %d failed\n",
398 node); 398 node);
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index 3675da73623..e94d3ecdd8b 100644
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -442,8 +442,7 @@ static int spu_request_irqs(struct spu *spu)
442 snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0", 442 snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0",
443 spu->number); 443 spu->number);
444 ret = request_irq(spu->irqs[0], spu_irq_class_0, 444 ret = request_irq(spu->irqs[0], spu_irq_class_0,
445 IRQF_DISABLED, 445 0, spu->irq_c0, spu);
446 spu->irq_c0, spu);
447 if (ret) 446 if (ret)
448 goto bail0; 447 goto bail0;
449 } 448 }
@@ -451,8 +450,7 @@ static int spu_request_irqs(struct spu *spu)
451 snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1", 450 snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1",
452 spu->number); 451 spu->number);
453 ret = request_irq(spu->irqs[1], spu_irq_class_1, 452 ret = request_irq(spu->irqs[1], spu_irq_class_1,
454 IRQF_DISABLED, 453 0, spu->irq_c1, spu);
455 spu->irq_c1, spu);
456 if (ret) 454 if (ret)
457 goto bail1; 455 goto bail1;
458 } 456 }
@@ -460,8 +458,7 @@ static int spu_request_irqs(struct spu *spu)
460 snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2", 458 snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2",
461 spu->number); 459 spu->number);
462 ret = request_irq(spu->irqs[2], spu_irq_class_2, 460 ret = request_irq(spu->irqs[2], spu_irq_class_2,
463 IRQF_DISABLED, 461 0, spu->irq_c2, spu);
464 spu->irq_c2, spu);
465 if (ret) 462 if (ret)
466 goto bail2; 463 goto bail2;
467 } 464 }
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
index cb40e921a56..901bfbddc3d 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -272,7 +272,6 @@ static struct irqaction xmon_action = {
272 272
273static struct irqaction gatwick_cascade_action = { 273static struct irqaction gatwick_cascade_action = {
274 .handler = gatwick_action, 274 .handler = gatwick_action,
275 .flags = IRQF_DISABLED,
276 .name = "cascade", 275 .name = "cascade",
277}; 276};
278 277
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
index 9a521dc8e48..9b6a820bdd7 100644
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -200,7 +200,7 @@ static int psurge_secondary_ipi_init(void)
200 200
201 if (psurge_secondary_virq) 201 if (psurge_secondary_virq)
202 rc = request_irq(psurge_secondary_virq, psurge_ipi_intr, 202 rc = request_irq(psurge_secondary_virq, psurge_ipi_intr,
203 IRQF_DISABLED|IRQF_PERCPU, "IPI", NULL); 203 IRQF_PERCPU, "IPI", NULL);
204 204
205 if (rc) 205 if (rc)
206 pr_err("Failed to setup secondary cpu IPI\n"); 206 pr_err("Failed to setup secondary cpu IPI\n");
@@ -408,7 +408,7 @@ static int __init smp_psurge_kick_cpu(int nr)
408 408
409static struct irqaction psurge_irqaction = { 409static struct irqaction psurge_irqaction = {
410 .handler = psurge_ipi_intr, 410 .handler = psurge_ipi_intr,
411 .flags = IRQF_DISABLED|IRQF_PERCPU, 411 .flags = IRQF_PERCPU,
412 .name = "primary IPI", 412 .name = "primary IPI",
413}; 413};
414 414
diff --git a/arch/powerpc/platforms/ps3/device-init.c b/arch/powerpc/platforms/ps3/device-init.c
index 6c4b5837fc8..3f175e8aedb 100644
--- a/arch/powerpc/platforms/ps3/device-init.c
+++ b/arch/powerpc/platforms/ps3/device-init.c
@@ -825,7 +825,7 @@ static int ps3_probe_thread(void *data)
825 825
826 spin_lock_init(&dev.lock); 826 spin_lock_init(&dev.lock);
827 827
828 res = request_irq(irq, ps3_notification_interrupt, IRQF_DISABLED, 828 res = request_irq(irq, ps3_notification_interrupt, 0,
829 "ps3_notification", &dev); 829 "ps3_notification", &dev);
830 if (res) { 830 if (res) {
831 pr_err("%s:%u: request_irq failed %d\n", __func__, __LINE__, 831 pr_err("%s:%u: request_irq failed %d\n", __func__, __LINE__,
diff --git a/arch/powerpc/platforms/ps3/interrupt.c b/arch/powerpc/platforms/ps3/interrupt.c
index 404bc52b780..1d6f4f478fe 100644
--- a/arch/powerpc/platforms/ps3/interrupt.c
+++ b/arch/powerpc/platforms/ps3/interrupt.c
@@ -88,6 +88,7 @@ struct ps3_private {
88 struct ps3_bmp bmp __attribute__ ((aligned (PS3_BMP_MINALIGN))); 88 struct ps3_bmp bmp __attribute__ ((aligned (PS3_BMP_MINALIGN)));
89 u64 ppe_id; 89 u64 ppe_id;
90 u64 thread_id; 90 u64 thread_id;
91 unsigned long ipi_mask;
91}; 92};
92 93
93static DEFINE_PER_CPU(struct ps3_private, ps3_private); 94static DEFINE_PER_CPU(struct ps3_private, ps3_private);
@@ -144,7 +145,11 @@ static void ps3_chip_unmask(struct irq_data *d)
144static void ps3_chip_eoi(struct irq_data *d) 145static void ps3_chip_eoi(struct irq_data *d)
145{ 146{
146 const struct ps3_private *pd = irq_data_get_irq_chip_data(d); 147 const struct ps3_private *pd = irq_data_get_irq_chip_data(d);
147 lv1_end_of_interrupt_ext(pd->ppe_id, pd->thread_id, d->irq); 148
149 /* non-IPIs are EOIed here. */
150
151 if (!test_bit(63 - d->irq, &pd->ipi_mask))
152 lv1_end_of_interrupt_ext(pd->ppe_id, pd->thread_id, d->irq);
148} 153}
149 154
150/** 155/**
@@ -691,6 +696,16 @@ void __init ps3_register_ipi_debug_brk(unsigned int cpu, unsigned int virq)
691 cpu, virq, pd->bmp.ipi_debug_brk_mask); 696 cpu, virq, pd->bmp.ipi_debug_brk_mask);
692} 697}
693 698
699void __init ps3_register_ipi_irq(unsigned int cpu, unsigned int virq)
700{
701 struct ps3_private *pd = &per_cpu(ps3_private, cpu);
702
703 set_bit(63 - virq, &pd->ipi_mask);
704
705 DBG("%s:%d: cpu %u, virq %u, ipi_mask %lxh\n", __func__, __LINE__,
706 cpu, virq, pd->ipi_mask);
707}
708
694static unsigned int ps3_get_irq(void) 709static unsigned int ps3_get_irq(void)
695{ 710{
696 struct ps3_private *pd = &__get_cpu_var(ps3_private); 711 struct ps3_private *pd = &__get_cpu_var(ps3_private);
@@ -720,6 +735,12 @@ static unsigned int ps3_get_irq(void)
720 BUG(); 735 BUG();
721 } 736 }
722#endif 737#endif
738
739 /* IPIs are EOIed here. */
740
741 if (test_bit(63 - plug, &pd->ipi_mask))
742 lv1_end_of_interrupt_ext(pd->ppe_id, pd->thread_id, plug);
743
723 return plug; 744 return plug;
724} 745}
725 746
diff --git a/arch/powerpc/platforms/ps3/platform.h b/arch/powerpc/platforms/ps3/platform.h
index 9a196a88eda..1a633ed0fe9 100644
--- a/arch/powerpc/platforms/ps3/platform.h
+++ b/arch/powerpc/platforms/ps3/platform.h
@@ -43,6 +43,7 @@ void ps3_mm_shutdown(void);
43void ps3_init_IRQ(void); 43void ps3_init_IRQ(void);
44void ps3_shutdown_IRQ(int cpu); 44void ps3_shutdown_IRQ(int cpu);
45void __init ps3_register_ipi_debug_brk(unsigned int cpu, unsigned int virq); 45void __init ps3_register_ipi_debug_brk(unsigned int cpu, unsigned int virq);
46void __init ps3_register_ipi_irq(unsigned int cpu, unsigned int virq);
46 47
47/* smp */ 48/* smp */
48 49
diff --git a/arch/powerpc/platforms/ps3/repository.c b/arch/powerpc/platforms/ps3/repository.c
index 5e304c292f6..ca40f6afd35 100644
--- a/arch/powerpc/platforms/ps3/repository.c
+++ b/arch/powerpc/platforms/ps3/repository.c
@@ -184,7 +184,7 @@ int ps3_repository_read_bus_type(unsigned int bus_index,
184 enum ps3_bus_type *bus_type) 184 enum ps3_bus_type *bus_type)
185{ 185{
186 int result; 186 int result;
187 u64 v1; 187 u64 v1 = 0;
188 188
189 result = read_node(PS3_LPAR_ID_PME, 189 result = read_node(PS3_LPAR_ID_PME,
190 make_first_field("bus", bus_index), 190 make_first_field("bus", bus_index),
@@ -199,7 +199,7 @@ int ps3_repository_read_bus_num_dev(unsigned int bus_index,
199 unsigned int *num_dev) 199 unsigned int *num_dev)
200{ 200{
201 int result; 201 int result;
202 u64 v1; 202 u64 v1 = 0;
203 203
204 result = read_node(PS3_LPAR_ID_PME, 204 result = read_node(PS3_LPAR_ID_PME,
205 make_first_field("bus", bus_index), 205 make_first_field("bus", bus_index),
@@ -239,7 +239,7 @@ int ps3_repository_read_dev_type(unsigned int bus_index,
239 unsigned int dev_index, enum ps3_dev_type *dev_type) 239 unsigned int dev_index, enum ps3_dev_type *dev_type)
240{ 240{
241 int result; 241 int result;
242 u64 v1; 242 u64 v1 = 0;
243 243
244 result = read_node(PS3_LPAR_ID_PME, 244 result = read_node(PS3_LPAR_ID_PME,
245 make_first_field("bus", bus_index), 245 make_first_field("bus", bus_index),
@@ -256,8 +256,8 @@ int ps3_repository_read_dev_intr(unsigned int bus_index,
256 enum ps3_interrupt_type *intr_type, unsigned int *interrupt_id) 256 enum ps3_interrupt_type *intr_type, unsigned int *interrupt_id)
257{ 257{
258 int result; 258 int result;
259 u64 v1; 259 u64 v1 = 0;
260 u64 v2; 260 u64 v2 = 0;
261 261
262 result = read_node(PS3_LPAR_ID_PME, 262 result = read_node(PS3_LPAR_ID_PME,
263 make_first_field("bus", bus_index), 263 make_first_field("bus", bus_index),
@@ -275,7 +275,7 @@ int ps3_repository_read_dev_reg_type(unsigned int bus_index,
275 enum ps3_reg_type *reg_type) 275 enum ps3_reg_type *reg_type)
276{ 276{
277 int result; 277 int result;
278 u64 v1; 278 u64 v1 = 0;
279 279
280 result = read_node(PS3_LPAR_ID_PME, 280 result = read_node(PS3_LPAR_ID_PME,
281 make_first_field("bus", bus_index), 281 make_first_field("bus", bus_index),
@@ -615,7 +615,7 @@ int ps3_repository_read_stor_dev_num_regions(unsigned int bus_index,
615 unsigned int dev_index, unsigned int *num_regions) 615 unsigned int dev_index, unsigned int *num_regions)
616{ 616{
617 int result; 617 int result;
618 u64 v1; 618 u64 v1 = 0;
619 619
620 result = read_node(PS3_LPAR_ID_PME, 620 result = read_node(PS3_LPAR_ID_PME,
621 make_first_field("bus", bus_index), 621 make_first_field("bus", bus_index),
@@ -631,7 +631,7 @@ int ps3_repository_read_stor_dev_region_id(unsigned int bus_index,
631 unsigned int *region_id) 631 unsigned int *region_id)
632{ 632{
633 int result; 633 int result;
634 u64 v1; 634 u64 v1 = 0;
635 635
636 result = read_node(PS3_LPAR_ID_PME, 636 result = read_node(PS3_LPAR_ID_PME,
637 make_first_field("bus", bus_index), 637 make_first_field("bus", bus_index),
@@ -786,7 +786,7 @@ int ps3_repository_read_mm_info(u64 *rm_base, u64 *rm_size, u64 *region_total)
786int ps3_repository_read_num_spu_reserved(unsigned int *num_spu_reserved) 786int ps3_repository_read_num_spu_reserved(unsigned int *num_spu_reserved)
787{ 787{
788 int result; 788 int result;
789 u64 v1; 789 u64 v1 = 0;
790 790
791 result = read_node(PS3_LPAR_ID_CURRENT, 791 result = read_node(PS3_LPAR_ID_CURRENT,
792 make_first_field("bi", 0), 792 make_first_field("bi", 0),
@@ -805,7 +805,7 @@ int ps3_repository_read_num_spu_reserved(unsigned int *num_spu_reserved)
805int ps3_repository_read_num_spu_resource_id(unsigned int *num_resource_id) 805int ps3_repository_read_num_spu_resource_id(unsigned int *num_resource_id)
806{ 806{
807 int result; 807 int result;
808 u64 v1; 808 u64 v1 = 0;
809 809
810 result = read_node(PS3_LPAR_ID_CURRENT, 810 result = read_node(PS3_LPAR_ID_CURRENT,
811 make_first_field("bi", 0), 811 make_first_field("bi", 0),
@@ -827,8 +827,8 @@ int ps3_repository_read_spu_resource_id(unsigned int res_index,
827 enum ps3_spu_resource_type *resource_type, unsigned int *resource_id) 827 enum ps3_spu_resource_type *resource_type, unsigned int *resource_id)
828{ 828{
829 int result; 829 int result;
830 u64 v1; 830 u64 v1 = 0;
831 u64 v2; 831 u64 v2 = 0;
832 832
833 result = read_node(PS3_LPAR_ID_CURRENT, 833 result = read_node(PS3_LPAR_ID_CURRENT,
834 make_first_field("bi", 0), 834 make_first_field("bi", 0),
@@ -854,7 +854,7 @@ static int ps3_repository_read_boot_dat_address(u64 *address)
854int ps3_repository_read_boot_dat_size(unsigned int *size) 854int ps3_repository_read_boot_dat_size(unsigned int *size)
855{ 855{
856 int result; 856 int result;
857 u64 v1; 857 u64 v1 = 0;
858 858
859 result = read_node(PS3_LPAR_ID_CURRENT, 859 result = read_node(PS3_LPAR_ID_CURRENT,
860 make_first_field("bi", 0), 860 make_first_field("bi", 0),
@@ -869,7 +869,7 @@ int ps3_repository_read_boot_dat_size(unsigned int *size)
869int ps3_repository_read_vuart_av_port(unsigned int *port) 869int ps3_repository_read_vuart_av_port(unsigned int *port)
870{ 870{
871 int result; 871 int result;
872 u64 v1; 872 u64 v1 = 0;
873 873
874 result = read_node(PS3_LPAR_ID_CURRENT, 874 result = read_node(PS3_LPAR_ID_CURRENT,
875 make_first_field("bi", 0), 875 make_first_field("bi", 0),
@@ -884,7 +884,7 @@ int ps3_repository_read_vuart_av_port(unsigned int *port)
884int ps3_repository_read_vuart_sysmgr_port(unsigned int *port) 884int ps3_repository_read_vuart_sysmgr_port(unsigned int *port)
885{ 885{
886 int result; 886 int result;
887 u64 v1; 887 u64 v1 = 0;
888 888
889 result = read_node(PS3_LPAR_ID_CURRENT, 889 result = read_node(PS3_LPAR_ID_CURRENT,
890 make_first_field("bi", 0), 890 make_first_field("bi", 0),
@@ -919,7 +919,7 @@ int ps3_repository_read_boot_dat_info(u64 *lpar_addr, unsigned int *size)
919int ps3_repository_read_num_be(unsigned int *num_be) 919int ps3_repository_read_num_be(unsigned int *num_be)
920{ 920{
921 int result; 921 int result;
922 u64 v1; 922 u64 v1 = 0;
923 923
924 result = read_node(PS3_LPAR_ID_PME, 924 result = read_node(PS3_LPAR_ID_PME,
925 make_first_field("ben", 0), 925 make_first_field("ben", 0),
diff --git a/arch/powerpc/platforms/ps3/smp.c b/arch/powerpc/platforms/ps3/smp.c
index 4c44794faac..efc1cd8c034 100644
--- a/arch/powerpc/platforms/ps3/smp.c
+++ b/arch/powerpc/platforms/ps3/smp.c
@@ -59,46 +59,49 @@ static void ps3_smp_message_pass(int cpu, int msg)
59 59
60static int ps3_smp_probe(void) 60static int ps3_smp_probe(void)
61{ 61{
62 return 2; 62 int cpu;
63}
64 63
65static void __init ps3_smp_setup_cpu(int cpu) 64 for (cpu = 0; cpu < 2; cpu++) {
66{ 65 int result;
67 int result; 66 unsigned int *virqs = per_cpu(ps3_ipi_virqs, cpu);
68 unsigned int *virqs = per_cpu(ps3_ipi_virqs, cpu); 67 int i;
69 int i;
70 68
71 DBG(" -> %s:%d: (%d)\n", __func__, __LINE__, cpu); 69 DBG(" -> %s:%d: (%d)\n", __func__, __LINE__, cpu);
72 70
73 /* 71 /*
74 * Check assumptions on ps3_ipi_virqs[] indexing. If this 72 * Check assumptions on ps3_ipi_virqs[] indexing. If this
75 * check fails, then a different mapping of PPC_MSG_ 73 * check fails, then a different mapping of PPC_MSG_
76 * to index needs to be setup. 74 * to index needs to be setup.
77 */ 75 */
78 76
79 BUILD_BUG_ON(PPC_MSG_CALL_FUNCTION != 0); 77 BUILD_BUG_ON(PPC_MSG_CALL_FUNCTION != 0);
80 BUILD_BUG_ON(PPC_MSG_RESCHEDULE != 1); 78 BUILD_BUG_ON(PPC_MSG_RESCHEDULE != 1);
81 BUILD_BUG_ON(PPC_MSG_CALL_FUNC_SINGLE != 2); 79 BUILD_BUG_ON(PPC_MSG_CALL_FUNC_SINGLE != 2);
82 BUILD_BUG_ON(PPC_MSG_DEBUGGER_BREAK != 3); 80 BUILD_BUG_ON(PPC_MSG_DEBUGGER_BREAK != 3);
83 81
84 for (i = 0; i < MSG_COUNT; i++) { 82 for (i = 0; i < MSG_COUNT; i++) {
85 result = ps3_event_receive_port_setup(cpu, &virqs[i]); 83 result = ps3_event_receive_port_setup(cpu, &virqs[i]);
86 84
87 if (result) 85 if (result)
88 continue; 86 continue;
89 87
90 DBG("%s:%d: (%d, %d) => virq %u\n", 88 DBG("%s:%d: (%d, %d) => virq %u\n",
91 __func__, __LINE__, cpu, i, virqs[i]); 89 __func__, __LINE__, cpu, i, virqs[i]);
92 90
93 result = smp_request_message_ipi(virqs[i], i); 91 result = smp_request_message_ipi(virqs[i], i);
94 92
95 if (result) 93 if (result)
96 virqs[i] = NO_IRQ; 94 virqs[i] = NO_IRQ;
97 } 95 else
96 ps3_register_ipi_irq(cpu, virqs[i]);
97 }
98 98
99 ps3_register_ipi_debug_brk(cpu, virqs[PPC_MSG_DEBUGGER_BREAK]); 99 ps3_register_ipi_debug_brk(cpu, virqs[PPC_MSG_DEBUGGER_BREAK]);
100 100
101 DBG(" <- %s:%d: (%d)\n", __func__, __LINE__, cpu); 101 DBG(" <- %s:%d: (%d)\n", __func__, __LINE__, cpu);
102 }
103
104 return 2;
102} 105}
103 106
104void ps3_smp_cleanup_cpu(int cpu) 107void ps3_smp_cleanup_cpu(int cpu)
@@ -121,7 +124,6 @@ static struct smp_ops_t ps3_smp_ops = {
121 .probe = ps3_smp_probe, 124 .probe = ps3_smp_probe,
122 .message_pass = ps3_smp_message_pass, 125 .message_pass = ps3_smp_message_pass,
123 .kick_cpu = smp_generic_kick_cpu, 126 .kick_cpu = smp_generic_kick_cpu,
124 .setup_cpu = ps3_smp_setup_cpu,
125}; 127};
126 128
127void smp_init_ps3(void) 129void smp_init_ps3(void)
diff --git a/arch/powerpc/sysdev/ehv_pic.c b/arch/powerpc/sysdev/ehv_pic.c
index af1a5df46b3..b6731e4a664 100644
--- a/arch/powerpc/sysdev/ehv_pic.c
+++ b/arch/powerpc/sysdev/ehv_pic.c
@@ -280,6 +280,7 @@ void __init ehv_pic_init(void)
280 280
281 if (!ehv_pic->irqhost) { 281 if (!ehv_pic->irqhost) {
282 of_node_put(np); 282 of_node_put(np);
283 kfree(ehv_pic);
283 return; 284 return;
284 } 285 }
285 286
diff --git a/arch/powerpc/sysdev/fsl_lbc.c b/arch/powerpc/sysdev/fsl_lbc.c
index c4d96fa32ba..d5c3c90ee69 100644
--- a/arch/powerpc/sysdev/fsl_lbc.c
+++ b/arch/powerpc/sysdev/fsl_lbc.c
@@ -328,6 +328,7 @@ static int __devinit fsl_lbc_ctrl_probe(struct platform_device *dev)
328err: 328err:
329 iounmap(fsl_lbc_ctrl_dev->regs); 329 iounmap(fsl_lbc_ctrl_dev->regs);
330 kfree(fsl_lbc_ctrl_dev); 330 kfree(fsl_lbc_ctrl_dev);
331 fsl_lbc_ctrl_dev = NULL;
331 return ret; 332 return ret;
332} 333}
333 334
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index de170fd5ba4..22ffccd8bef 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -23,7 +23,7 @@
23 */ 23 */
24 24
25#include <linux/init.h> 25#include <linux/init.h>
26#include <linux/export.h> 26#include <linux/module.h>
27#include <linux/types.h> 27#include <linux/types.h>
28#include <linux/dma-mapping.h> 28#include <linux/dma-mapping.h>
29#include <linux/interrupt.h> 29#include <linux/interrupt.h>
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 0842c6f8a3e..8c7e8528e7c 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -800,8 +800,6 @@ static void mpic_end_ipi(struct irq_data *d)
800 * IPIs are marked IRQ_PER_CPU. This has the side effect of 800 * IPIs are marked IRQ_PER_CPU. This has the side effect of
801 * preventing the IRQ_PENDING/IRQ_INPROGRESS logic from 801 * preventing the IRQ_PENDING/IRQ_INPROGRESS logic from
802 * applying to them. We EOI them late to avoid re-entering. 802 * applying to them. We EOI them late to avoid re-entering.
803 * We mark IPI's with IRQF_DISABLED as they must run with
804 * irqs disabled.
805 */ 803 */
806 mpic_eoi(mpic); 804 mpic_eoi(mpic);
807} 805}
diff --git a/arch/powerpc/sysdev/ppc4xx_soc.c b/arch/powerpc/sysdev/ppc4xx_soc.c
index d3d6ce3c33b..0debcc31ad7 100644
--- a/arch/powerpc/sysdev/ppc4xx_soc.c
+++ b/arch/powerpc/sysdev/ppc4xx_soc.c
@@ -115,7 +115,7 @@ static int __init ppc4xx_l2c_probe(void)
115 } 115 }
116 116
117 /* Install error handler */ 117 /* Install error handler */
118 if (request_irq(irq, l2c_error_handler, IRQF_DISABLED, "L2C", 0) < 0) { 118 if (request_irq(irq, l2c_error_handler, 0, "L2C", 0) < 0) {
119 printk(KERN_ERR "Cannot install L2C error handler" 119 printk(KERN_ERR "Cannot install L2C error handler"
120 ", cache is not enabled\n"); 120 ", cache is not enabled\n");
121 of_node_put(np); 121 of_node_put(np);
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index 3363fbc964f..ceb09cbd232 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -216,7 +216,7 @@ int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier)
216 /* Errata QE_General4, which affects some MPC832x and MPC836x SOCs, says 216 /* Errata QE_General4, which affects some MPC832x and MPC836x SOCs, says
217 that the BRG divisor must be even if you're not using divide-by-16 217 that the BRG divisor must be even if you're not using divide-by-16
218 mode. */ 218 mode. */
219 if (!div16 && (divisor & 1)) 219 if (!div16 && (divisor & 1) && (divisor > 3))
220 divisor++; 220 divisor++;
221 221
222 tempval = ((divisor - 1) << QE_BRGC_DIVISOR_SHIFT) | 222 tempval = ((divisor - 1) << QE_BRGC_DIVISOR_SHIFT) |
diff --git a/arch/powerpc/sysdev/xics/xics-common.c b/arch/powerpc/sysdev/xics/xics-common.c
index 3d93a8ded0f..63762c672a0 100644
--- a/arch/powerpc/sysdev/xics/xics-common.c
+++ b/arch/powerpc/sysdev/xics/xics-common.c
@@ -134,11 +134,10 @@ static void xics_request_ipi(void)
134 BUG_ON(ipi == NO_IRQ); 134 BUG_ON(ipi == NO_IRQ);
135 135
136 /* 136 /*
137 * IPIs are marked IRQF_DISABLED as they must run with irqs 137 * IPIs are marked IRQF_PERCPU. The handler was set in map.
138 * disabled, and PERCPU. The handler was set in map.
139 */ 138 */
140 BUG_ON(request_irq(ipi, icp_ops->ipi_action, 139 BUG_ON(request_irq(ipi, icp_ops->ipi_action,
141 IRQF_DISABLED|IRQF_PERCPU, "IPI", NULL)); 140 IRQF_PERCPU, "IPI", NULL));
142} 141}
143 142
144int __init xics_smp_probe(void) 143int __init xics_smp_probe(void)
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index a9fbd43395f..373679b3744 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -572,6 +572,7 @@ config KEXEC
572config CRASH_DUMP 572config CRASH_DUMP
573 bool "kernel crash dumps" 573 bool "kernel crash dumps"
574 depends on 64BIT 574 depends on 64BIT
575 select KEXEC
575 help 576 help
576 Generate crash dump after being started by kexec. 577 Generate crash dump after being started by kexec.
577 Crash dump kernels are loaded in the main kernel with kexec-tools 578 Crash dump kernels are loaded in the main kernel with kexec-tools
diff --git a/arch/s390/crypto/crypt_s390.h b/arch/s390/crypto/crypt_s390.h
index 49676771bd6..ffd1ac255f1 100644
--- a/arch/s390/crypto/crypt_s390.h
+++ b/arch/s390/crypto/crypt_s390.h
@@ -368,9 +368,12 @@ static inline int crypt_s390_func_available(int func,
368 368
369 if (facility_mask & CRYPT_S390_MSA && !test_facility(17)) 369 if (facility_mask & CRYPT_S390_MSA && !test_facility(17))
370 return 0; 370 return 0;
371 if (facility_mask & CRYPT_S390_MSA3 && !test_facility(76)) 371
372 if (facility_mask & CRYPT_S390_MSA3 &&
373 (!test_facility(2) || !test_facility(76)))
372 return 0; 374 return 0;
373 if (facility_mask & CRYPT_S390_MSA4 && !test_facility(77)) 375 if (facility_mask & CRYPT_S390_MSA4 &&
376 (!test_facility(2) || !test_facility(77)))
374 return 0; 377 return 0;
375 378
376 switch (func & CRYPT_S390_OP_MASK) { 379 switch (func & CRYPT_S390_OP_MASK) {
diff --git a/arch/s390/include/asm/kvm_host.h b/arch/s390/include/asm/kvm_host.h
index 24e18473d92..b0c235cb6ad 100644
--- a/arch/s390/include/asm/kvm_host.h
+++ b/arch/s390/include/asm/kvm_host.h
@@ -47,7 +47,7 @@ struct sca_block {
47#define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 47#define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
48#define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 48#define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
49 49
50#define CPUSTAT_HOST 0x80000000 50#define CPUSTAT_STOPPED 0x80000000
51#define CPUSTAT_WAIT 0x10000000 51#define CPUSTAT_WAIT 0x10000000
52#define CPUSTAT_ECALL_PEND 0x08000000 52#define CPUSTAT_ECALL_PEND 0x08000000
53#define CPUSTAT_STOP_INT 0x04000000 53#define CPUSTAT_STOP_INT 0x04000000
@@ -139,6 +139,7 @@ struct kvm_vcpu_stat {
139 u32 instruction_stfl; 139 u32 instruction_stfl;
140 u32 instruction_tprot; 140 u32 instruction_tprot;
141 u32 instruction_sigp_sense; 141 u32 instruction_sigp_sense;
142 u32 instruction_sigp_sense_running;
142 u32 instruction_sigp_external_call; 143 u32 instruction_sigp_external_call;
143 u32 instruction_sigp_emergency; 144 u32 instruction_sigp_emergency;
144 u32 instruction_sigp_stop; 145 u32 instruction_sigp_stop;
diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
index 34ede0ea85a..4f289ff0b7f 100644
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -593,14 +593,16 @@ static inline pgste_t pgste_update_all(pte_t *ptep, pgste_t pgste)
593 unsigned long address, bits; 593 unsigned long address, bits;
594 unsigned char skey; 594 unsigned char skey;
595 595
596 if (!pte_present(*ptep))
597 return pgste;
596 address = pte_val(*ptep) & PAGE_MASK; 598 address = pte_val(*ptep) & PAGE_MASK;
597 skey = page_get_storage_key(address); 599 skey = page_get_storage_key(address);
598 bits = skey & (_PAGE_CHANGED | _PAGE_REFERENCED); 600 bits = skey & (_PAGE_CHANGED | _PAGE_REFERENCED);
599 /* Clear page changed & referenced bit in the storage key */ 601 /* Clear page changed & referenced bit in the storage key */
600 if (bits) { 602 if (bits & _PAGE_CHANGED)
601 skey ^= bits; 603 page_set_storage_key(address, skey ^ bits, 1);
602 page_set_storage_key(address, skey, 1); 604 else if (bits)
603 } 605 page_reset_referenced(address);
604 /* Transfer page changed & referenced bit to guest bits in pgste */ 606 /* Transfer page changed & referenced bit to guest bits in pgste */
605 pgste_val(pgste) |= bits << 48; /* RCP_GR_BIT & RCP_GC_BIT */ 607 pgste_val(pgste) |= bits << 48; /* RCP_GR_BIT & RCP_GC_BIT */
606 /* Get host changed & referenced bits from pgste */ 608 /* Get host changed & referenced bits from pgste */
@@ -625,6 +627,8 @@ static inline pgste_t pgste_update_young(pte_t *ptep, pgste_t pgste)
625#ifdef CONFIG_PGSTE 627#ifdef CONFIG_PGSTE
626 int young; 628 int young;
627 629
630 if (!pte_present(*ptep))
631 return pgste;
628 young = page_reset_referenced(pte_val(*ptep) & PAGE_MASK); 632 young = page_reset_referenced(pte_val(*ptep) & PAGE_MASK);
629 /* Transfer page referenced bit to pte software bit (host view) */ 633 /* Transfer page referenced bit to pte software bit (host view) */
630 if (young || (pgste_val(pgste) & RCP_HR_BIT)) 634 if (young || (pgste_val(pgste) & RCP_HR_BIT))
@@ -638,13 +642,15 @@ static inline pgste_t pgste_update_young(pte_t *ptep, pgste_t pgste)
638 642
639} 643}
640 644
641static inline void pgste_set_pte(pte_t *ptep, pgste_t pgste) 645static inline void pgste_set_pte(pte_t *ptep, pgste_t pgste, pte_t entry)
642{ 646{
643#ifdef CONFIG_PGSTE 647#ifdef CONFIG_PGSTE
644 unsigned long address; 648 unsigned long address;
645 unsigned long okey, nkey; 649 unsigned long okey, nkey;
646 650
647 address = pte_val(*ptep) & PAGE_MASK; 651 if (!pte_present(entry))
652 return;
653 address = pte_val(entry) & PAGE_MASK;
648 okey = nkey = page_get_storage_key(address); 654 okey = nkey = page_get_storage_key(address);
649 nkey &= ~(_PAGE_ACC_BITS | _PAGE_FP_BIT); 655 nkey &= ~(_PAGE_ACC_BITS | _PAGE_FP_BIT);
650 /* Set page access key and fetch protection bit from pgste */ 656 /* Set page access key and fetch protection bit from pgste */
@@ -712,7 +718,7 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
712 718
713 if (mm_has_pgste(mm)) { 719 if (mm_has_pgste(mm)) {
714 pgste = pgste_get_lock(ptep); 720 pgste = pgste_get_lock(ptep);
715 pgste_set_pte(ptep, pgste); 721 pgste_set_pte(ptep, pgste, entry);
716 *ptep = entry; 722 *ptep = entry;
717 pgste_set_unlock(ptep, pgste); 723 pgste_set_unlock(ptep, pgste);
718 } else 724 } else
diff --git a/arch/s390/include/asm/setup.h b/arch/s390/include/asm/setup.h
index 5a099714df0..097183c7040 100644
--- a/arch/s390/include/asm/setup.h
+++ b/arch/s390/include/asm/setup.h
@@ -82,6 +82,7 @@ extern unsigned int user_mode;
82#define MACHINE_FLAG_LPAR (1UL << 12) 82#define MACHINE_FLAG_LPAR (1UL << 12)
83#define MACHINE_FLAG_SPP (1UL << 13) 83#define MACHINE_FLAG_SPP (1UL << 13)
84#define MACHINE_FLAG_TOPOLOGY (1UL << 14) 84#define MACHINE_FLAG_TOPOLOGY (1UL << 14)
85#define MACHINE_FLAG_STCKF (1UL << 15)
85 86
86#define MACHINE_IS_VM (S390_lowcore.machine_flags & MACHINE_FLAG_VM) 87#define MACHINE_IS_VM (S390_lowcore.machine_flags & MACHINE_FLAG_VM)
87#define MACHINE_IS_KVM (S390_lowcore.machine_flags & MACHINE_FLAG_KVM) 88#define MACHINE_IS_KVM (S390_lowcore.machine_flags & MACHINE_FLAG_KVM)
@@ -100,6 +101,7 @@ extern unsigned int user_mode;
100#define MACHINE_HAS_PFMF (0) 101#define MACHINE_HAS_PFMF (0)
101#define MACHINE_HAS_SPP (0) 102#define MACHINE_HAS_SPP (0)
102#define MACHINE_HAS_TOPOLOGY (0) 103#define MACHINE_HAS_TOPOLOGY (0)
104#define MACHINE_HAS_STCKF (0)
103#else /* __s390x__ */ 105#else /* __s390x__ */
104#define MACHINE_HAS_IEEE (1) 106#define MACHINE_HAS_IEEE (1)
105#define MACHINE_HAS_CSP (1) 107#define MACHINE_HAS_CSP (1)
@@ -111,6 +113,7 @@ extern unsigned int user_mode;
111#define MACHINE_HAS_PFMF (S390_lowcore.machine_flags & MACHINE_FLAG_PFMF) 113#define MACHINE_HAS_PFMF (S390_lowcore.machine_flags & MACHINE_FLAG_PFMF)
112#define MACHINE_HAS_SPP (S390_lowcore.machine_flags & MACHINE_FLAG_SPP) 114#define MACHINE_HAS_SPP (S390_lowcore.machine_flags & MACHINE_FLAG_SPP)
113#define MACHINE_HAS_TOPOLOGY (S390_lowcore.machine_flags & MACHINE_FLAG_TOPOLOGY) 115#define MACHINE_HAS_TOPOLOGY (S390_lowcore.machine_flags & MACHINE_FLAG_TOPOLOGY)
116#define MACHINE_HAS_STCKF (S390_lowcore.machine_flags & MACHINE_FLAG_STCKF)
114#endif /* __s390x__ */ 117#endif /* __s390x__ */
115 118
116#define ZFCPDUMP_HSA_SIZE (32UL<<20) 119#define ZFCPDUMP_HSA_SIZE (32UL<<20)
diff --git a/arch/s390/include/asm/timex.h b/arch/s390/include/asm/timex.h
index d610bef9c5e..c447a27a7fd 100644
--- a/arch/s390/include/asm/timex.h
+++ b/arch/s390/include/asm/timex.h
@@ -90,7 +90,7 @@ static inline unsigned long long get_clock_fast(void)
90{ 90{
91 unsigned long long clk; 91 unsigned long long clk;
92 92
93 if (test_facility(25)) 93 if (MACHINE_HAS_STCKF)
94 asm volatile(".insn s,0xb27c0000,%0" : "=Q" (clk) : : "cc"); 94 asm volatile(".insn s,0xb27c0000,%0" : "=Q" (clk) : : "cc");
95 else 95 else
96 clk = get_clock(); 96 clk = get_clock();
diff --git a/arch/s390/include/asm/unistd.h b/arch/s390/include/asm/unistd.h
index 404bdb9671b..58de4c91c33 100644
--- a/arch/s390/include/asm/unistd.h
+++ b/arch/s390/include/asm/unistd.h
@@ -277,7 +277,9 @@
277#define __NR_clock_adjtime 337 277#define __NR_clock_adjtime 337
278#define __NR_syncfs 338 278#define __NR_syncfs 338
279#define __NR_setns 339 279#define __NR_setns 339
280#define NR_syscalls 340 280#define __NR_process_vm_readv 340
281#define __NR_process_vm_writev 341
282#define NR_syscalls 342
281 283
282/* 284/*
283 * There are some system calls that are not present on 64 bit, some 285 * There are some system calls that are not present on 64 bit, some
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index 5006a1d9f5d..18c51df9fe0 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -1627,3 +1627,23 @@ ENTRY(sys_setns_wrapper)
1627 lgfr %r2,%r2 # int 1627 lgfr %r2,%r2 # int
1628 lgfr %r3,%r3 # int 1628 lgfr %r3,%r3 # int
1629 jg sys_setns 1629 jg sys_setns
1630
1631ENTRY(compat_sys_process_vm_readv_wrapper)
1632 lgfr %r2,%r2 # compat_pid_t
1633 llgtr %r3,%r3 # struct compat_iovec __user *
1634 llgfr %r4,%r4 # unsigned long
1635 llgtr %r5,%r5 # struct compat_iovec __user *
1636 llgfr %r6,%r6 # unsigned long
1637 llgf %r0,164(%r15) # unsigned long
1638 stg %r0,160(%r15)
1639 jg sys_process_vm_readv
1640
1641ENTRY(compat_sys_process_vm_writev_wrapper)
1642 lgfr %r2,%r2 # compat_pid_t
1643 llgtr %r3,%r3 # struct compat_iovec __user *
1644 llgfr %r4,%r4 # unsigned long
1645 llgtr %r5,%r5 # struct compat_iovec __user *
1646 llgfr %r6,%r6 # unsigned long
1647 llgf %r0,164(%r15) # unsigned long
1648 stg %r0,160(%r15)
1649 jg sys_process_vm_writev
diff --git a/arch/s390/kernel/early.c b/arch/s390/kernel/early.c
index 37394b3413e..c9ffe002519 100644
--- a/arch/s390/kernel/early.c
+++ b/arch/s390/kernel/early.c
@@ -390,6 +390,8 @@ static __init void detect_machine_facilities(void)
390 S390_lowcore.machine_flags |= MACHINE_FLAG_MVCOS; 390 S390_lowcore.machine_flags |= MACHINE_FLAG_MVCOS;
391 if (test_facility(40)) 391 if (test_facility(40))
392 S390_lowcore.machine_flags |= MACHINE_FLAG_SPP; 392 S390_lowcore.machine_flags |= MACHINE_FLAG_SPP;
393 if (test_facility(25))
394 S390_lowcore.machine_flags |= MACHINE_FLAG_STCKF;
393#endif 395#endif
394} 396}
395 397
diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c
index 450931a45b6..573bc29551e 100644
--- a/arch/s390/kernel/ptrace.c
+++ b/arch/s390/kernel/ptrace.c
@@ -296,13 +296,6 @@ static int __poke_user(struct task_struct *child, addr_t addr, addr_t data)
296 ((data & PSW_MASK_EA) && !(data & PSW_MASK_BA)))) 296 ((data & PSW_MASK_EA) && !(data & PSW_MASK_BA))))
297 /* Invalid psw mask. */ 297 /* Invalid psw mask. */
298 return -EINVAL; 298 return -EINVAL;
299 if (addr == (addr_t) &dummy->regs.psw.addr)
300 /*
301 * The debugger changed the instruction address,
302 * reset system call restart, see signal.c:do_signal
303 */
304 task_thread_info(child)->system_call = 0;
305
306 *(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr) = data; 299 *(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr) = data;
307 300
308 } else if (addr < (addr_t) (&dummy->regs.orig_gpr2)) { 301 } else if (addr < (addr_t) (&dummy->regs.orig_gpr2)) {
@@ -614,11 +607,6 @@ static int __poke_user_compat(struct task_struct *child,
614 /* Transfer 31 bit amode bit to psw mask. */ 607 /* Transfer 31 bit amode bit to psw mask. */
615 regs->psw.mask = (regs->psw.mask & ~PSW_MASK_BA) | 608 regs->psw.mask = (regs->psw.mask & ~PSW_MASK_BA) |
616 (__u64)(tmp & PSW32_ADDR_AMODE); 609 (__u64)(tmp & PSW32_ADDR_AMODE);
617 /*
618 * The debugger changed the instruction address,
619 * reset system call restart, see signal.c:do_signal
620 */
621 task_thread_info(child)->system_call = 0;
622 } else { 610 } else {
623 /* gpr 0-15 */ 611 /* gpr 0-15 */
624 *(__u32*)((addr_t) &regs->psw + addr*2 + 4) = tmp; 612 *(__u32*)((addr_t) &regs->psw + addr*2 + 4) = tmp;
@@ -905,6 +893,14 @@ static int s390_last_break_get(struct task_struct *target,
905 return 0; 893 return 0;
906} 894}
907 895
896static int s390_last_break_set(struct task_struct *target,
897 const struct user_regset *regset,
898 unsigned int pos, unsigned int count,
899 const void *kbuf, const void __user *ubuf)
900{
901 return 0;
902}
903
908#endif 904#endif
909 905
910static int s390_system_call_get(struct task_struct *target, 906static int s390_system_call_get(struct task_struct *target,
@@ -951,6 +947,7 @@ static const struct user_regset s390_regsets[] = {
951 .size = sizeof(long), 947 .size = sizeof(long),
952 .align = sizeof(long), 948 .align = sizeof(long),
953 .get = s390_last_break_get, 949 .get = s390_last_break_get,
950 .set = s390_last_break_set,
954 }, 951 },
955#endif 952#endif
956 [REGSET_SYSTEM_CALL] = { 953 [REGSET_SYSTEM_CALL] = {
@@ -1116,6 +1113,14 @@ static int s390_compat_last_break_get(struct task_struct *target,
1116 return 0; 1113 return 0;
1117} 1114}
1118 1115
1116static int s390_compat_last_break_set(struct task_struct *target,
1117 const struct user_regset *regset,
1118 unsigned int pos, unsigned int count,
1119 const void *kbuf, const void __user *ubuf)
1120{
1121 return 0;
1122}
1123
1119static const struct user_regset s390_compat_regsets[] = { 1124static const struct user_regset s390_compat_regsets[] = {
1120 [REGSET_GENERAL] = { 1125 [REGSET_GENERAL] = {
1121 .core_note_type = NT_PRSTATUS, 1126 .core_note_type = NT_PRSTATUS,
@@ -1139,6 +1144,7 @@ static const struct user_regset s390_compat_regsets[] = {
1139 .size = sizeof(long), 1144 .size = sizeof(long),
1140 .align = sizeof(long), 1145 .align = sizeof(long),
1141 .get = s390_compat_last_break_get, 1146 .get = s390_compat_last_break_get,
1147 .set = s390_compat_last_break_set,
1142 }, 1148 },
1143 [REGSET_SYSTEM_CALL] = { 1149 [REGSET_SYSTEM_CALL] = {
1144 .core_note_type = NT_S390_SYSTEM_CALL, 1150 .core_note_type = NT_S390_SYSTEM_CALL,
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index 8ac6bfa2786..e54c4ff8aba 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -211,6 +211,8 @@ static void __init setup_zfcpdump(unsigned int console_devno)
211 211
212 if (ipl_info.type != IPL_TYPE_FCP_DUMP) 212 if (ipl_info.type != IPL_TYPE_FCP_DUMP)
213 return; 213 return;
214 if (OLDMEM_BASE)
215 return;
214 if (console_devno != -1) 216 if (console_devno != -1)
215 sprintf(str, " cio_ignore=all,!0.0.%04x,!0.0.%04x", 217 sprintf(str, " cio_ignore=all,!0.0.%04x,!0.0.%04x",
216 ipl_info.data.fcp.dev_id.devno, console_devno); 218 ipl_info.data.fcp.dev_id.devno, console_devno);
@@ -482,7 +484,7 @@ static void __init setup_memory_end(void)
482 484
483 485
484#ifdef CONFIG_ZFCPDUMP 486#ifdef CONFIG_ZFCPDUMP
485 if (ipl_info.type == IPL_TYPE_FCP_DUMP) { 487 if (ipl_info.type == IPL_TYPE_FCP_DUMP && !OLDMEM_BASE) {
486 memory_end = ZFCPDUMP_HSA_SIZE; 488 memory_end = ZFCPDUMP_HSA_SIZE;
487 memory_end_set = 1; 489 memory_end_set = 1;
488 } 490 }
@@ -577,7 +579,7 @@ static unsigned long __init find_crash_base(unsigned long crash_size,
577 *msg = "first memory chunk must be at least crashkernel size"; 579 *msg = "first memory chunk must be at least crashkernel size";
578 return 0; 580 return 0;
579 } 581 }
580 if (is_kdump_kernel() && (crash_size == OLDMEM_SIZE)) 582 if (OLDMEM_BASE && crash_size == OLDMEM_SIZE)
581 return OLDMEM_BASE; 583 return OLDMEM_BASE;
582 584
583 for (i = MEMORY_CHUNKS - 1; i >= 0; i--) { 585 for (i = MEMORY_CHUNKS - 1; i >= 0; i--) {
diff --git a/arch/s390/kernel/signal.c b/arch/s390/kernel/signal.c
index 05a85bc14c9..7f6f9f35454 100644
--- a/arch/s390/kernel/signal.c
+++ b/arch/s390/kernel/signal.c
@@ -460,9 +460,9 @@ void do_signal(struct pt_regs *regs)
460 regs->svc_code >> 16); 460 regs->svc_code >> 16);
461 break; 461 break;
462 } 462 }
463 /* No longer in a system call */
464 clear_thread_flag(TIF_SYSCALL);
465 } 463 }
464 /* No longer in a system call */
465 clear_thread_flag(TIF_SYSCALL);
466 466
467 if ((is_compat_task() ? 467 if ((is_compat_task() ?
468 handle_signal32(signr, &ka, &info, oldset, regs) : 468 handle_signal32(signr, &ka, &info, oldset, regs) :
@@ -486,6 +486,7 @@ void do_signal(struct pt_regs *regs)
486 } 486 }
487 487
488 /* No handlers present - check for system call restart */ 488 /* No handlers present - check for system call restart */
489 clear_thread_flag(TIF_SYSCALL);
489 if (current_thread_info()->system_call) { 490 if (current_thread_info()->system_call) {
490 regs->svc_code = current_thread_info()->system_call; 491 regs->svc_code = current_thread_info()->system_call;
491 switch (regs->gprs[2]) { 492 switch (regs->gprs[2]) {
@@ -500,9 +501,6 @@ void do_signal(struct pt_regs *regs)
500 regs->gprs[2] = regs->orig_gpr2; 501 regs->gprs[2] = regs->orig_gpr2;
501 set_thread_flag(TIF_SYSCALL); 502 set_thread_flag(TIF_SYSCALL);
502 break; 503 break;
503 default:
504 clear_thread_flag(TIF_SYSCALL);
505 break;
506 } 504 }
507 } 505 }
508 506
diff --git a/arch/s390/kernel/syscalls.S b/arch/s390/kernel/syscalls.S
index 73eb08c874f..bcab2f04ba5 100644
--- a/arch/s390/kernel/syscalls.S
+++ b/arch/s390/kernel/syscalls.S
@@ -348,3 +348,5 @@ SYSCALL(sys_open_by_handle_at,sys_open_by_handle_at,compat_sys_open_by_handle_at
348SYSCALL(sys_clock_adjtime,sys_clock_adjtime,compat_sys_clock_adjtime_wrapper) 348SYSCALL(sys_clock_adjtime,sys_clock_adjtime,compat_sys_clock_adjtime_wrapper)
349SYSCALL(sys_syncfs,sys_syncfs,sys_syncfs_wrapper) 349SYSCALL(sys_syncfs,sys_syncfs,sys_syncfs_wrapper)
350SYSCALL(sys_setns,sys_setns,sys_setns_wrapper) 350SYSCALL(sys_setns,sys_setns,sys_setns_wrapper)
351SYSCALL(sys_process_vm_readv,sys_process_vm_readv,compat_sys_process_vm_readv_wrapper) /* 340 */
352SYSCALL(sys_process_vm_writev,sys_process_vm_writev,compat_sys_process_vm_writev_wrapper)
diff --git a/arch/s390/kernel/topology.c b/arch/s390/kernel/topology.c
index 77b8942b9a1..fdb5b8cb260 100644
--- a/arch/s390/kernel/topology.c
+++ b/arch/s390/kernel/topology.c
@@ -68,8 +68,10 @@ static cpumask_t cpu_group_map(struct mask_info *info, unsigned int cpu)
68 return mask; 68 return mask;
69} 69}
70 70
71static void add_cpus_to_mask(struct topology_cpu *tl_cpu, 71static struct mask_info *add_cpus_to_mask(struct topology_cpu *tl_cpu,
72 struct mask_info *book, struct mask_info *core) 72 struct mask_info *book,
73 struct mask_info *core,
74 int z10)
73{ 75{
74 unsigned int cpu; 76 unsigned int cpu;
75 77
@@ -88,10 +90,16 @@ static void add_cpus_to_mask(struct topology_cpu *tl_cpu,
88 cpu_book_id[lcpu] = book->id; 90 cpu_book_id[lcpu] = book->id;
89#endif 91#endif
90 cpumask_set_cpu(lcpu, &core->mask); 92 cpumask_set_cpu(lcpu, &core->mask);
91 cpu_core_id[lcpu] = core->id; 93 if (z10) {
94 cpu_core_id[lcpu] = rcpu;
95 core = core->next;
96 } else {
97 cpu_core_id[lcpu] = core->id;
98 }
92 smp_cpu_polarization[lcpu] = tl_cpu->pp; 99 smp_cpu_polarization[lcpu] = tl_cpu->pp;
93 } 100 }
94 } 101 }
102 return core;
95} 103}
96 104
97static void clear_masks(void) 105static void clear_masks(void)
@@ -123,18 +131,41 @@ static void tl_to_cores(struct sysinfo_15_1_x *info)
123{ 131{
124#ifdef CONFIG_SCHED_BOOK 132#ifdef CONFIG_SCHED_BOOK
125 struct mask_info *book = &book_info; 133 struct mask_info *book = &book_info;
134 struct cpuid cpu_id;
126#else 135#else
127 struct mask_info *book = NULL; 136 struct mask_info *book = NULL;
128#endif 137#endif
129 struct mask_info *core = &core_info; 138 struct mask_info *core = &core_info;
130 union topology_entry *tle, *end; 139 union topology_entry *tle, *end;
140 int z10 = 0;
131 141
132 142#ifdef CONFIG_SCHED_BOOK
143 get_cpu_id(&cpu_id);
144 z10 = cpu_id.machine == 0x2097 || cpu_id.machine == 0x2098;
145#endif
133 spin_lock_irq(&topology_lock); 146 spin_lock_irq(&topology_lock);
134 clear_masks(); 147 clear_masks();
135 tle = info->tle; 148 tle = info->tle;
136 end = (union topology_entry *)((unsigned long)info + info->length); 149 end = (union topology_entry *)((unsigned long)info + info->length);
137 while (tle < end) { 150 while (tle < end) {
151#ifdef CONFIG_SCHED_BOOK
152 if (z10) {
153 switch (tle->nl) {
154 case 1:
155 book = book->next;
156 book->id = tle->container.id;
157 break;
158 case 0:
159 core = add_cpus_to_mask(&tle->cpu, book, core, z10);
160 break;
161 default:
162 clear_masks();
163 goto out;
164 }
165 tle = next_tle(tle);
166 continue;
167 }
168#endif
138 switch (tle->nl) { 169 switch (tle->nl) {
139#ifdef CONFIG_SCHED_BOOK 170#ifdef CONFIG_SCHED_BOOK
140 case 2: 171 case 2:
@@ -147,7 +178,7 @@ static void tl_to_cores(struct sysinfo_15_1_x *info)
147 core->id = tle->container.id; 178 core->id = tle->container.id;
148 break; 179 break;
149 case 0: 180 case 0:
150 add_cpus_to_mask(&tle->cpu, book, core); 181 add_cpus_to_mask(&tle->cpu, book, core, z10);
151 break; 182 break;
152 default: 183 default:
153 clear_masks(); 184 clear_masks();
@@ -328,8 +359,8 @@ void __init s390_init_cpu_topology(void)
328 for (i = 0; i < TOPOLOGY_NR_MAG; i++) 359 for (i = 0; i < TOPOLOGY_NR_MAG; i++)
329 printk(" %d", info->mag[i]); 360 printk(" %d", info->mag[i]);
330 printk(" / %d\n", info->mnest); 361 printk(" / %d\n", info->mnest);
331 alloc_masks(info, &core_info, 2); 362 alloc_masks(info, &core_info, 1);
332#ifdef CONFIG_SCHED_BOOK 363#ifdef CONFIG_SCHED_BOOK
333 alloc_masks(info, &book_info, 3); 364 alloc_masks(info, &book_info, 2);
334#endif 365#endif
335} 366}
diff --git a/arch/s390/kernel/vmlinux.lds.S b/arch/s390/kernel/vmlinux.lds.S
index 56fe6bc81fe..e4c79ebb40e 100644
--- a/arch/s390/kernel/vmlinux.lds.S
+++ b/arch/s390/kernel/vmlinux.lds.S
@@ -43,6 +43,8 @@ SECTIONS
43 43
44 NOTES :text :note 44 NOTES :text :note
45 45
46 .dummy : { *(.dummy) } :data
47
46 RODATA 48 RODATA
47 49
48#ifdef CONFIG_SHARED_KERNEL 50#ifdef CONFIG_SHARED_KERNEL
diff --git a/arch/s390/kvm/diag.c b/arch/s390/kvm/diag.c
index 87cedd61be0..8943e82cd4d 100644
--- a/arch/s390/kvm/diag.c
+++ b/arch/s390/kvm/diag.c
@@ -70,7 +70,7 @@ static int __diag_ipl_functions(struct kvm_vcpu *vcpu)
70 return -EOPNOTSUPP; 70 return -EOPNOTSUPP;
71 } 71 }
72 72
73 atomic_clear_mask(CPUSTAT_RUNNING, &vcpu->arch.sie_block->cpuflags); 73 atomic_set_mask(CPUSTAT_STOPPED, &vcpu->arch.sie_block->cpuflags);
74 vcpu->run->s390_reset_flags |= KVM_S390_RESET_SUBSYSTEM; 74 vcpu->run->s390_reset_flags |= KVM_S390_RESET_SUBSYSTEM;
75 vcpu->run->s390_reset_flags |= KVM_S390_RESET_IPL; 75 vcpu->run->s390_reset_flags |= KVM_S390_RESET_IPL;
76 vcpu->run->s390_reset_flags |= KVM_S390_RESET_CPU_INIT; 76 vcpu->run->s390_reset_flags |= KVM_S390_RESET_CPU_INIT;
diff --git a/arch/s390/kvm/intercept.c b/arch/s390/kvm/intercept.c
index c7c51898984..02434543eab 100644
--- a/arch/s390/kvm/intercept.c
+++ b/arch/s390/kvm/intercept.c
@@ -132,7 +132,6 @@ static int handle_stop(struct kvm_vcpu *vcpu)
132 int rc = 0; 132 int rc = 0;
133 133
134 vcpu->stat.exit_stop_request++; 134 vcpu->stat.exit_stop_request++;
135 atomic_clear_mask(CPUSTAT_RUNNING, &vcpu->arch.sie_block->cpuflags);
136 spin_lock_bh(&vcpu->arch.local_int.lock); 135 spin_lock_bh(&vcpu->arch.local_int.lock);
137 if (vcpu->arch.local_int.action_bits & ACTION_STORE_ON_STOP) { 136 if (vcpu->arch.local_int.action_bits & ACTION_STORE_ON_STOP) {
138 vcpu->arch.local_int.action_bits &= ~ACTION_STORE_ON_STOP; 137 vcpu->arch.local_int.action_bits &= ~ACTION_STORE_ON_STOP;
@@ -149,6 +148,8 @@ static int handle_stop(struct kvm_vcpu *vcpu)
149 } 148 }
150 149
151 if (vcpu->arch.local_int.action_bits & ACTION_STOP_ON_STOP) { 150 if (vcpu->arch.local_int.action_bits & ACTION_STOP_ON_STOP) {
151 atomic_set_mask(CPUSTAT_STOPPED,
152 &vcpu->arch.sie_block->cpuflags);
152 vcpu->arch.local_int.action_bits &= ~ACTION_STOP_ON_STOP; 153 vcpu->arch.local_int.action_bits &= ~ACTION_STOP_ON_STOP;
153 VCPU_EVENT(vcpu, 3, "%s", "cpu stopped"); 154 VCPU_EVENT(vcpu, 3, "%s", "cpu stopped");
154 rc = -EOPNOTSUPP; 155 rc = -EOPNOTSUPP;
diff --git a/arch/s390/kvm/interrupt.c b/arch/s390/kvm/interrupt.c
index 87c16705b38..278ee009ce6 100644
--- a/arch/s390/kvm/interrupt.c
+++ b/arch/s390/kvm/interrupt.c
@@ -252,6 +252,7 @@ static void __do_deliver_interrupt(struct kvm_vcpu *vcpu,
252 offsetof(struct _lowcore, restart_psw), sizeof(psw_t)); 252 offsetof(struct _lowcore, restart_psw), sizeof(psw_t));
253 if (rc == -EFAULT) 253 if (rc == -EFAULT)
254 exception = 1; 254 exception = 1;
255 atomic_clear_mask(CPUSTAT_STOPPED, &vcpu->arch.sie_block->cpuflags);
255 break; 256 break;
256 257
257 case KVM_S390_PROGRAM_INT: 258 case KVM_S390_PROGRAM_INT:
diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c
index 0bd3bea1e4c..d1c44573245 100644
--- a/arch/s390/kvm/kvm-s390.c
+++ b/arch/s390/kvm/kvm-s390.c
@@ -65,6 +65,7 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
65 { "instruction_stfl", VCPU_STAT(instruction_stfl) }, 65 { "instruction_stfl", VCPU_STAT(instruction_stfl) },
66 { "instruction_tprot", VCPU_STAT(instruction_tprot) }, 66 { "instruction_tprot", VCPU_STAT(instruction_tprot) },
67 { "instruction_sigp_sense", VCPU_STAT(instruction_sigp_sense) }, 67 { "instruction_sigp_sense", VCPU_STAT(instruction_sigp_sense) },
68 { "instruction_sigp_sense_running", VCPU_STAT(instruction_sigp_sense_running) },
68 { "instruction_sigp_external_call", VCPU_STAT(instruction_sigp_external_call) }, 69 { "instruction_sigp_external_call", VCPU_STAT(instruction_sigp_external_call) },
69 { "instruction_sigp_emergency", VCPU_STAT(instruction_sigp_emergency) }, 70 { "instruction_sigp_emergency", VCPU_STAT(instruction_sigp_emergency) },
70 { "instruction_sigp_stop", VCPU_STAT(instruction_sigp_stop) }, 71 { "instruction_sigp_stop", VCPU_STAT(instruction_sigp_stop) },
@@ -127,6 +128,7 @@ int kvm_dev_ioctl_check_extension(long ext)
127 switch (ext) { 128 switch (ext) {
128 case KVM_CAP_S390_PSW: 129 case KVM_CAP_S390_PSW:
129 case KVM_CAP_S390_GMAP: 130 case KVM_CAP_S390_GMAP:
131 case KVM_CAP_SYNC_MMU:
130 r = 1; 132 r = 1;
131 break; 133 break;
132 default: 134 default:
@@ -270,10 +272,12 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
270 restore_fp_regs(&vcpu->arch.guest_fpregs); 272 restore_fp_regs(&vcpu->arch.guest_fpregs);
271 restore_access_regs(vcpu->arch.guest_acrs); 273 restore_access_regs(vcpu->arch.guest_acrs);
272 gmap_enable(vcpu->arch.gmap); 274 gmap_enable(vcpu->arch.gmap);
275 atomic_set_mask(CPUSTAT_RUNNING, &vcpu->arch.sie_block->cpuflags);
273} 276}
274 277
275void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) 278void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
276{ 279{
280 atomic_clear_mask(CPUSTAT_RUNNING, &vcpu->arch.sie_block->cpuflags);
277 gmap_disable(vcpu->arch.gmap); 281 gmap_disable(vcpu->arch.gmap);
278 save_fp_regs(&vcpu->arch.guest_fpregs); 282 save_fp_regs(&vcpu->arch.guest_fpregs);
279 save_access_regs(vcpu->arch.guest_acrs); 283 save_access_regs(vcpu->arch.guest_acrs);
@@ -301,7 +305,9 @@ static void kvm_s390_vcpu_initial_reset(struct kvm_vcpu *vcpu)
301 305
302int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) 306int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
303{ 307{
304 atomic_set(&vcpu->arch.sie_block->cpuflags, CPUSTAT_ZARCH | CPUSTAT_SM); 308 atomic_set(&vcpu->arch.sie_block->cpuflags, CPUSTAT_ZARCH |
309 CPUSTAT_SM |
310 CPUSTAT_STOPPED);
305 vcpu->arch.sie_block->ecb = 6; 311 vcpu->arch.sie_block->ecb = 6;
306 vcpu->arch.sie_block->eca = 0xC1002001U; 312 vcpu->arch.sie_block->eca = 0xC1002001U;
307 vcpu->arch.sie_block->fac = (int) (long) facilities; 313 vcpu->arch.sie_block->fac = (int) (long) facilities;
@@ -428,7 +434,7 @@ static int kvm_arch_vcpu_ioctl_set_initial_psw(struct kvm_vcpu *vcpu, psw_t psw)
428{ 434{
429 int rc = 0; 435 int rc = 0;
430 436
431 if (atomic_read(&vcpu->arch.sie_block->cpuflags) & CPUSTAT_RUNNING) 437 if (!(atomic_read(&vcpu->arch.sie_block->cpuflags) & CPUSTAT_STOPPED))
432 rc = -EBUSY; 438 rc = -EBUSY;
433 else { 439 else {
434 vcpu->run->psw_mask = psw.mask; 440 vcpu->run->psw_mask = psw.mask;
@@ -501,7 +507,7 @@ rerun_vcpu:
501 if (vcpu->sigset_active) 507 if (vcpu->sigset_active)
502 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved); 508 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
503 509
504 atomic_set_mask(CPUSTAT_RUNNING, &vcpu->arch.sie_block->cpuflags); 510 atomic_clear_mask(CPUSTAT_STOPPED, &vcpu->arch.sie_block->cpuflags);
505 511
506 BUG_ON(vcpu->kvm->arch.float_int.local_int[vcpu->vcpu_id] == NULL); 512 BUG_ON(vcpu->kvm->arch.float_int.local_int[vcpu->vcpu_id] == NULL);
507 513
diff --git a/arch/s390/kvm/priv.c b/arch/s390/kvm/priv.c
index 39162636108..d0263895992 100644
--- a/arch/s390/kvm/priv.c
+++ b/arch/s390/kvm/priv.c
@@ -336,6 +336,7 @@ static int handle_tprot(struct kvm_vcpu *vcpu)
336 u64 address1 = disp1 + base1 ? vcpu->arch.guest_gprs[base1] : 0; 336 u64 address1 = disp1 + base1 ? vcpu->arch.guest_gprs[base1] : 0;
337 u64 address2 = disp2 + base2 ? vcpu->arch.guest_gprs[base2] : 0; 337 u64 address2 = disp2 + base2 ? vcpu->arch.guest_gprs[base2] : 0;
338 struct vm_area_struct *vma; 338 struct vm_area_struct *vma;
339 unsigned long user_address;
339 340
340 vcpu->stat.instruction_tprot++; 341 vcpu->stat.instruction_tprot++;
341 342
@@ -349,9 +350,14 @@ static int handle_tprot(struct kvm_vcpu *vcpu)
349 return -EOPNOTSUPP; 350 return -EOPNOTSUPP;
350 351
351 352
353 /* we must resolve the address without holding the mmap semaphore.
354 * This is ok since the userspace hypervisor is not supposed to change
355 * the mapping while the guest queries the memory. Otherwise the guest
356 * might crash or get wrong info anyway. */
357 user_address = (unsigned long) __guestaddr_to_user(vcpu, address1);
358
352 down_read(&current->mm->mmap_sem); 359 down_read(&current->mm->mmap_sem);
353 vma = find_vma(current->mm, 360 vma = find_vma(current->mm, user_address);
354 (unsigned long) __guestaddr_to_user(vcpu, address1));
355 if (!vma) { 361 if (!vma) {
356 up_read(&current->mm->mmap_sem); 362 up_read(&current->mm->mmap_sem);
357 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); 363 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
diff --git a/arch/s390/kvm/sigp.c b/arch/s390/kvm/sigp.c
index f815118835f..0a7941d74bc 100644
--- a/arch/s390/kvm/sigp.c
+++ b/arch/s390/kvm/sigp.c
@@ -31,9 +31,11 @@
31#define SIGP_SET_PREFIX 0x0d 31#define SIGP_SET_PREFIX 0x0d
32#define SIGP_STORE_STATUS_ADDR 0x0e 32#define SIGP_STORE_STATUS_ADDR 0x0e
33#define SIGP_SET_ARCH 0x12 33#define SIGP_SET_ARCH 0x12
34#define SIGP_SENSE_RUNNING 0x15
34 35
35/* cpu status bits */ 36/* cpu status bits */
36#define SIGP_STAT_EQUIPMENT_CHECK 0x80000000UL 37#define SIGP_STAT_EQUIPMENT_CHECK 0x80000000UL
38#define SIGP_STAT_NOT_RUNNING 0x00000400UL
37#define SIGP_STAT_INCORRECT_STATE 0x00000200UL 39#define SIGP_STAT_INCORRECT_STATE 0x00000200UL
38#define SIGP_STAT_INVALID_PARAMETER 0x00000100UL 40#define SIGP_STAT_INVALID_PARAMETER 0x00000100UL
39#define SIGP_STAT_EXT_CALL_PENDING 0x00000080UL 41#define SIGP_STAT_EXT_CALL_PENDING 0x00000080UL
@@ -57,8 +59,8 @@ static int __sigp_sense(struct kvm_vcpu *vcpu, u16 cpu_addr,
57 spin_lock(&fi->lock); 59 spin_lock(&fi->lock);
58 if (fi->local_int[cpu_addr] == NULL) 60 if (fi->local_int[cpu_addr] == NULL)
59 rc = 3; /* not operational */ 61 rc = 3; /* not operational */
60 else if (atomic_read(fi->local_int[cpu_addr]->cpuflags) 62 else if (!(atomic_read(fi->local_int[cpu_addr]->cpuflags)
61 & CPUSTAT_RUNNING) { 63 & CPUSTAT_STOPPED)) {
62 *reg &= 0xffffffff00000000UL; 64 *reg &= 0xffffffff00000000UL;
63 rc = 1; /* status stored */ 65 rc = 1; /* status stored */
64 } else { 66 } else {
@@ -251,7 +253,7 @@ static int __sigp_set_prefix(struct kvm_vcpu *vcpu, u16 cpu_addr, u32 address,
251 253
252 spin_lock_bh(&li->lock); 254 spin_lock_bh(&li->lock);
253 /* cpu must be in stopped state */ 255 /* cpu must be in stopped state */
254 if (atomic_read(li->cpuflags) & CPUSTAT_RUNNING) { 256 if (!(atomic_read(li->cpuflags) & CPUSTAT_STOPPED)) {
255 rc = 1; /* incorrect state */ 257 rc = 1; /* incorrect state */
256 *reg &= SIGP_STAT_INCORRECT_STATE; 258 *reg &= SIGP_STAT_INCORRECT_STATE;
257 kfree(inti); 259 kfree(inti);
@@ -275,6 +277,38 @@ out_fi:
275 return rc; 277 return rc;
276} 278}
277 279
280static int __sigp_sense_running(struct kvm_vcpu *vcpu, u16 cpu_addr,
281 unsigned long *reg)
282{
283 int rc;
284 struct kvm_s390_float_interrupt *fi = &vcpu->kvm->arch.float_int;
285
286 if (cpu_addr >= KVM_MAX_VCPUS)
287 return 3; /* not operational */
288
289 spin_lock(&fi->lock);
290 if (fi->local_int[cpu_addr] == NULL)
291 rc = 3; /* not operational */
292 else {
293 if (atomic_read(fi->local_int[cpu_addr]->cpuflags)
294 & CPUSTAT_RUNNING) {
295 /* running */
296 rc = 1;
297 } else {
298 /* not running */
299 *reg &= 0xffffffff00000000UL;
300 *reg |= SIGP_STAT_NOT_RUNNING;
301 rc = 0;
302 }
303 }
304 spin_unlock(&fi->lock);
305
306 VCPU_EVENT(vcpu, 4, "sensed running status of cpu %x rc %x", cpu_addr,
307 rc);
308
309 return rc;
310}
311
278int kvm_s390_handle_sigp(struct kvm_vcpu *vcpu) 312int kvm_s390_handle_sigp(struct kvm_vcpu *vcpu)
279{ 313{
280 int r1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; 314 int r1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
@@ -331,6 +365,11 @@ int kvm_s390_handle_sigp(struct kvm_vcpu *vcpu)
331 rc = __sigp_set_prefix(vcpu, cpu_addr, parameter, 365 rc = __sigp_set_prefix(vcpu, cpu_addr, parameter,
332 &vcpu->arch.guest_gprs[r1]); 366 &vcpu->arch.guest_gprs[r1]);
333 break; 367 break;
368 case SIGP_SENSE_RUNNING:
369 vcpu->stat.instruction_sigp_sense_running++;
370 rc = __sigp_sense_running(vcpu, cpu_addr,
371 &vcpu->arch.guest_gprs[r1]);
372 break;
334 case SIGP_RESTART: 373 case SIGP_RESTART:
335 vcpu->stat.instruction_sigp_restart++; 374 vcpu->stat.instruction_sigp_restart++;
336 /* user space must know about restart */ 375 /* user space must know about restart */
diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c
index 1766def5bc3..a9a301866b3 100644
--- a/arch/s390/mm/fault.c
+++ b/arch/s390/mm/fault.c
@@ -587,8 +587,13 @@ static void pfault_interrupt(unsigned int ext_int_code,
587 } else { 587 } else {
588 /* Completion interrupt was faster than initial 588 /* Completion interrupt was faster than initial
589 * interrupt. Set pfault_wait to -1 so the initial 589 * interrupt. Set pfault_wait to -1 so the initial
590 * interrupt doesn't put the task to sleep. */ 590 * interrupt doesn't put the task to sleep.
591 tsk->thread.pfault_wait = -1; 591 * If the task is not running, ignore the completion
592 * interrupt since it must be a leftover of a PFAULT
593 * CANCEL operation which didn't remove all pending
594 * completion interrupts. */
595 if (tsk->state == TASK_RUNNING)
596 tsk->thread.pfault_wait = -1;
592 } 597 }
593 put_task_struct(tsk); 598 put_task_struct(tsk);
594 } else { 599 } else {
diff --git a/arch/s390/oprofile/init.c b/arch/s390/oprofile/init.c
index 6efc18b5e60..bd58b72454c 100644
--- a/arch/s390/oprofile/init.c
+++ b/arch/s390/oprofile/init.c
@@ -88,7 +88,7 @@ static ssize_t hwsampler_write(struct file *file, char const __user *buf,
88 return -EINVAL; 88 return -EINVAL;
89 89
90 retval = oprofilefs_ulong_from_user(&val, buf, count); 90 retval = oprofilefs_ulong_from_user(&val, buf, count);
91 if (retval) 91 if (retval <= 0)
92 return retval; 92 return retval;
93 93
94 if (oprofile_started) 94 if (oprofile_started)
diff --git a/arch/sh/boards/board-sh7757lcr.c b/arch/sh/boards/board-sh7757lcr.c
index ec8c84c14b1..895e337c79b 100644
--- a/arch/sh/boards/board-sh7757lcr.c
+++ b/arch/sh/boards/board-sh7757lcr.c
@@ -50,9 +50,9 @@ static struct platform_device heartbeat_device = {
50#define GBECONT 0xffc10100 50#define GBECONT 0xffc10100
51#define GBECONT_RMII1 BIT(17) 51#define GBECONT_RMII1 BIT(17)
52#define GBECONT_RMII0 BIT(16) 52#define GBECONT_RMII0 BIT(16)
53static void sh7757_eth_set_mdio_gate(unsigned long addr) 53static void sh7757_eth_set_mdio_gate(void *addr)
54{ 54{
55 if ((addr & 0x00000fff) < 0x0800) 55 if (((unsigned long)addr & 0x00000fff) < 0x0800)
56 writel(readl(GBECONT) | GBECONT_RMII0, GBECONT); 56 writel(readl(GBECONT) | GBECONT_RMII0, GBECONT);
57 else 57 else
58 writel(readl(GBECONT) | GBECONT_RMII1, GBECONT); 58 writel(readl(GBECONT) | GBECONT_RMII1, GBECONT);
@@ -116,9 +116,9 @@ static struct platform_device sh7757_eth1_device = {
116 }, 116 },
117}; 117};
118 118
119static void sh7757_eth_giga_set_mdio_gate(unsigned long addr) 119static void sh7757_eth_giga_set_mdio_gate(void *addr)
120{ 120{
121 if ((addr & 0x00000fff) < 0x0800) { 121 if (((unsigned long)addr & 0x00000fff) < 0x0800) {
122 gpio_set_value(GPIO_PTT4, 1); 122 gpio_set_value(GPIO_PTT4, 1);
123 writel(readl(GBECONT) & ~GBECONT_RMII0, GBECONT); 123 writel(readl(GBECONT) & ~GBECONT_RMII0, GBECONT);
124 } else { 124 } else {
@@ -210,8 +210,12 @@ static struct resource sh_mmcif_resources[] = {
210}; 210};
211 211
212static struct sh_mmcif_dma sh7757lcr_mmcif_dma = { 212static struct sh_mmcif_dma sh7757lcr_mmcif_dma = {
213 .chan_priv_tx = SHDMA_SLAVE_MMCIF_TX, 213 .chan_priv_tx = {
214 .chan_priv_rx = SHDMA_SLAVE_MMCIF_RX, 214 .slave_id = SHDMA_SLAVE_MMCIF_TX,
215 },
216 .chan_priv_rx = {
217 .slave_id = SHDMA_SLAVE_MMCIF_RX,
218 }
215}; 219};
216 220
217static struct sh_mmcif_plat_data sh_mmcif_plat = { 221static struct sh_mmcif_plat_data sh_mmcif_plat = {
diff --git a/arch/sh/include/asm/page.h b/arch/sh/include/asm/page.h
index 0dca9a5c6be..15d970328f7 100644
--- a/arch/sh/include/asm/page.h
+++ b/arch/sh/include/asm/page.h
@@ -151,8 +151,13 @@ typedef struct page *pgtable_t;
151#endif /* !__ASSEMBLY__ */ 151#endif /* !__ASSEMBLY__ */
152 152
153#ifdef CONFIG_UNCACHED_MAPPING 153#ifdef CONFIG_UNCACHED_MAPPING
154#if defined(CONFIG_29BIT)
155#define UNCAC_ADDR(addr) P2SEGADDR(addr)
156#define CAC_ADDR(addr) P1SEGADDR(addr)
157#else
154#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + uncached_start) 158#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + uncached_start)
155#define CAC_ADDR(addr) ((addr) - uncached_start + PAGE_OFFSET) 159#define CAC_ADDR(addr) ((addr) - uncached_start + PAGE_OFFSET)
160#endif
156#else 161#else
157#define UNCAC_ADDR(addr) ((addr)) 162#define UNCAC_ADDR(addr) ((addr))
158#define CAC_ADDR(addr) ((addr)) 163#define CAC_ADDR(addr) ((addr))
diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/asm/unistd_32.h
index 3432008d288..152b8627a18 100644
--- a/arch/sh/include/asm/unistd_32.h
+++ b/arch/sh/include/asm/unistd_32.h
@@ -375,8 +375,10 @@
375#define __NR_syncfs 362 375#define __NR_syncfs 362
376#define __NR_sendmmsg 363 376#define __NR_sendmmsg 363
377#define __NR_setns 364 377#define __NR_setns 364
378#define __NR_process_vm_readv 365
379#define __NR_process_vm_writev 366
378 380
379#define NR_syscalls 365 381#define NR_syscalls 367
380 382
381#ifdef __KERNEL__ 383#ifdef __KERNEL__
382 384
diff --git a/arch/sh/include/asm/unistd_64.h b/arch/sh/include/asm/unistd_64.h
index ec9898665f2..c330c23db5a 100644
--- a/arch/sh/include/asm/unistd_64.h
+++ b/arch/sh/include/asm/unistd_64.h
@@ -396,10 +396,12 @@
396#define __NR_syncfs 373 396#define __NR_syncfs 373
397#define __NR_sendmmsg 374 397#define __NR_sendmmsg 374
398#define __NR_setns 375 398#define __NR_setns 375
399#define __NR_process_vm_readv 376
400#define __NR_process_vm_writev 377
399 401
400#ifdef __KERNEL__ 402#ifdef __KERNEL__
401 403
402#define NR_syscalls 376 404#define NR_syscalls 378
403 405
404#define __ARCH_WANT_IPC_PARSE_VERSION 406#define __ARCH_WANT_IPC_PARSE_VERSION
405#define __ARCH_WANT_OLD_READDIR 407#define __ARCH_WANT_OLD_READDIR
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
index a43124e608c..0bd744f9a3b 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
@@ -176,10 +176,12 @@ static DECLARE_INTC_DESC(intc_desc, "sh7203", vectors, groups,
176static struct plat_sci_port scif0_platform_data = { 176static struct plat_sci_port scif0_platform_data = {
177 .mapbase = 0xfffe8000, 177 .mapbase = 0xfffe8000,
178 .flags = UPF_BOOT_AUTOCONF, 178 .flags = UPF_BOOT_AUTOCONF,
179 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 179 .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
180 SCSCR_REIE,
180 .scbrr_algo_id = SCBRR_ALGO_2, 181 .scbrr_algo_id = SCBRR_ALGO_2,
181 .type = PORT_SCIF, 182 .type = PORT_SCIF,
182 .irqs = { 192, 192, 192, 192 }, 183 .irqs = { 192, 192, 192, 192 },
184 .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
183}; 185};
184 186
185static struct platform_device scif0_device = { 187static struct platform_device scif0_device = {
@@ -193,10 +195,12 @@ static struct platform_device scif0_device = {
193static struct plat_sci_port scif1_platform_data = { 195static struct plat_sci_port scif1_platform_data = {
194 .mapbase = 0xfffe8800, 196 .mapbase = 0xfffe8800,
195 .flags = UPF_BOOT_AUTOCONF, 197 .flags = UPF_BOOT_AUTOCONF,
196 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 198 .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
199 SCSCR_REIE,
197 .scbrr_algo_id = SCBRR_ALGO_2, 200 .scbrr_algo_id = SCBRR_ALGO_2,
198 .type = PORT_SCIF, 201 .type = PORT_SCIF,
199 .irqs = { 196, 196, 196, 196 }, 202 .irqs = { 196, 196, 196, 196 },
203 .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
200}; 204};
201 205
202static struct platform_device scif1_device = { 206static struct platform_device scif1_device = {
@@ -210,10 +214,12 @@ static struct platform_device scif1_device = {
210static struct plat_sci_port scif2_platform_data = { 214static struct plat_sci_port scif2_platform_data = {
211 .mapbase = 0xfffe9000, 215 .mapbase = 0xfffe9000,
212 .flags = UPF_BOOT_AUTOCONF, 216 .flags = UPF_BOOT_AUTOCONF,
213 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 217 .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
218 SCSCR_REIE,
214 .scbrr_algo_id = SCBRR_ALGO_2, 219 .scbrr_algo_id = SCBRR_ALGO_2,
215 .type = PORT_SCIF, 220 .type = PORT_SCIF,
216 .irqs = { 200, 200, 200, 200 }, 221 .irqs = { 200, 200, 200, 200 },
222 .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
217}; 223};
218 224
219static struct platform_device scif2_device = { 225static struct platform_device scif2_device = {
@@ -227,10 +233,12 @@ static struct platform_device scif2_device = {
227static struct plat_sci_port scif3_platform_data = { 233static struct plat_sci_port scif3_platform_data = {
228 .mapbase = 0xfffe9800, 234 .mapbase = 0xfffe9800,
229 .flags = UPF_BOOT_AUTOCONF, 235 .flags = UPF_BOOT_AUTOCONF,
230 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 236 .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
237 SCSCR_REIE,
231 .scbrr_algo_id = SCBRR_ALGO_2, 238 .scbrr_algo_id = SCBRR_ALGO_2,
232 .type = PORT_SCIF, 239 .type = PORT_SCIF,
233 .irqs = { 204, 204, 204, 204 }, 240 .irqs = { 204, 204, 204, 204 },
241 .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
234}; 242};
235 243
236static struct platform_device scif3_device = { 244static struct platform_device scif3_device = {
diff --git a/arch/sh/kernel/syscalls_32.S b/arch/sh/kernel/syscalls_32.S
index 293e39c59c0..ee56a9b1a98 100644
--- a/arch/sh/kernel/syscalls_32.S
+++ b/arch/sh/kernel/syscalls_32.S
@@ -382,3 +382,5 @@ ENTRY(sys_call_table)
382 .long sys_syncfs 382 .long sys_syncfs
383 .long sys_sendmmsg 383 .long sys_sendmmsg
384 .long sys_setns 384 .long sys_setns
385 .long sys_process_vm_readv /* 365 */
386 .long sys_process_vm_writev
diff --git a/arch/sh/kernel/syscalls_64.S b/arch/sh/kernel/syscalls_64.S
index ceb34b94afa..9af7de26fb7 100644
--- a/arch/sh/kernel/syscalls_64.S
+++ b/arch/sh/kernel/syscalls_64.S
@@ -402,3 +402,5 @@ sys_call_table:
402 .long sys_syncfs 402 .long sys_syncfs
403 .long sys_sendmmsg 403 .long sys_sendmmsg
404 .long sys_setns /* 375 */ 404 .long sys_setns /* 375 */
405 .long sys_process_vm_readv
406 .long sys_process_vm_writev
diff --git a/arch/sparc/include/asm/pgtable_32.h b/arch/sparc/include/asm/pgtable_32.h
index 5b31a8e8982..a790cc65747 100644
--- a/arch/sparc/include/asm/pgtable_32.h
+++ b/arch/sparc/include/asm/pgtable_32.h
@@ -431,10 +431,6 @@ extern unsigned long *sparc_valid_addr_bitmap;
431#define kern_addr_valid(addr) \ 431#define kern_addr_valid(addr) \
432 (test_bit(__pa((unsigned long)(addr))>>20, sparc_valid_addr_bitmap)) 432 (test_bit(__pa((unsigned long)(addr))>>20, sparc_valid_addr_bitmap))
433 433
434extern int io_remap_pfn_range(struct vm_area_struct *vma,
435 unsigned long from, unsigned long pfn,
436 unsigned long size, pgprot_t prot);
437
438/* 434/*
439 * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in 435 * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in
440 * its high 4 bits. These macros/functions put it there or get it from there. 436 * its high 4 bits. These macros/functions put it there or get it from there.
@@ -443,6 +439,22 @@ extern int io_remap_pfn_range(struct vm_area_struct *vma,
443#define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4)) 439#define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4))
444#define GET_PFN(pfn) (pfn & 0x0fffffffUL) 440#define GET_PFN(pfn) (pfn & 0x0fffffffUL)
445 441
442extern int remap_pfn_range(struct vm_area_struct *, unsigned long, unsigned long,
443 unsigned long, pgprot_t);
444
445static inline int io_remap_pfn_range(struct vm_area_struct *vma,
446 unsigned long from, unsigned long pfn,
447 unsigned long size, pgprot_t prot)
448{
449 unsigned long long offset, space, phys_base;
450
451 offset = ((unsigned long long) GET_PFN(pfn)) << PAGE_SHIFT;
452 space = GET_IOSPACE(pfn);
453 phys_base = offset | (space << 32ULL);
454
455 return remap_pfn_range(vma, from, phys_base >> PAGE_SHIFT, size, prot);
456}
457
446#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 458#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
447#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ 459#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
448({ \ 460({ \
diff --git a/arch/sparc/include/asm/pgtable_64.h b/arch/sparc/include/asm/pgtable_64.h
index adf89329af5..38ebb2c6013 100644
--- a/arch/sparc/include/asm/pgtable_64.h
+++ b/arch/sparc/include/asm/pgtable_64.h
@@ -757,10 +757,6 @@ static inline bool kern_addr_valid(unsigned long addr)
757 757
758extern int page_in_phys_avail(unsigned long paddr); 758extern int page_in_phys_avail(unsigned long paddr);
759 759
760extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
761 unsigned long pfn,
762 unsigned long size, pgprot_t prot);
763
764/* 760/*
765 * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in 761 * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in
766 * its high 4 bits. These macros/functions put it there or get it from there. 762 * its high 4 bits. These macros/functions put it there or get it from there.
@@ -769,6 +765,22 @@ extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
769#define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4)) 765#define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4))
770#define GET_PFN(pfn) (pfn & 0x0fffffffffffffffUL) 766#define GET_PFN(pfn) (pfn & 0x0fffffffffffffffUL)
771 767
768extern int remap_pfn_range(struct vm_area_struct *, unsigned long, unsigned long,
769 unsigned long, pgprot_t);
770
771static inline int io_remap_pfn_range(struct vm_area_struct *vma,
772 unsigned long from, unsigned long pfn,
773 unsigned long size, pgprot_t prot)
774{
775 unsigned long offset = GET_PFN(pfn) << PAGE_SHIFT;
776 int space = GET_IOSPACE(pfn);
777 unsigned long phys_base;
778
779 phys_base = offset | (((unsigned long) space) << 32UL);
780
781 return remap_pfn_range(vma, from, phys_base >> PAGE_SHIFT, size, prot);
782}
783
772#include <asm-generic/pgtable.h> 784#include <asm-generic/pgtable.h>
773 785
774/* We provide our own get_unmapped_area to cope with VA holes and 786/* We provide our own get_unmapped_area to cope with VA holes and
diff --git a/arch/sparc/include/asm/unistd.h b/arch/sparc/include/asm/unistd.h
index 6260d5deeab..c7cb0af0eb5 100644
--- a/arch/sparc/include/asm/unistd.h
+++ b/arch/sparc/include/asm/unistd.h
@@ -406,8 +406,10 @@
406#define __NR_syncfs 335 406#define __NR_syncfs 335
407#define __NR_sendmmsg 336 407#define __NR_sendmmsg 336
408#define __NR_setns 337 408#define __NR_setns 337
409#define __NR_process_vm_readv 338
410#define __NR_process_vm_writev 339
409 411
410#define NR_syscalls 338 412#define NR_syscalls 340
411 413
412#ifdef __32bit_syscall_numbers__ 414#ifdef __32bit_syscall_numbers__
413/* Sparc 32-bit only has the "setresuid32", "getresuid32" variants, 415/* Sparc 32-bit only has the "setresuid32", "getresuid32" variants,
diff --git a/arch/sparc/kernel/ds.c b/arch/sparc/kernel/ds.c
index 7429b47c3ac..381edcd5bc2 100644
--- a/arch/sparc/kernel/ds.c
+++ b/arch/sparc/kernel/ds.c
@@ -1181,13 +1181,11 @@ static int __devinit ds_probe(struct vio_dev *vdev,
1181 1181
1182 dp->rcv_buf_len = 4096; 1182 dp->rcv_buf_len = 4096;
1183 1183
1184 dp->ds_states = kzalloc(sizeof(ds_states_template), 1184 dp->ds_states = kmemdup(ds_states_template,
1185 GFP_KERNEL); 1185 sizeof(ds_states_template), GFP_KERNEL);
1186 if (!dp->ds_states) 1186 if (!dp->ds_states)
1187 goto out_free_rcv_buf; 1187 goto out_free_rcv_buf;
1188 1188
1189 memcpy(dp->ds_states, ds_states_template,
1190 sizeof(ds_states_template));
1191 dp->num_ds_states = ARRAY_SIZE(ds_states_template); 1189 dp->num_ds_states = ARRAY_SIZE(ds_states_template);
1192 1190
1193 for (i = 0; i < dp->num_ds_states; i++) 1191 for (i = 0; i < dp->num_ds_states; i++)
diff --git a/arch/sparc/kernel/entry.h b/arch/sparc/kernel/entry.h
index e27f8ea8656..0c218e4c088 100644
--- a/arch/sparc/kernel/entry.h
+++ b/arch/sparc/kernel/entry.h
@@ -42,6 +42,9 @@ extern void fpsave(unsigned long *fpregs, unsigned long *fsr,
42extern void fpload(unsigned long *fpregs, unsigned long *fsr); 42extern void fpload(unsigned long *fpregs, unsigned long *fsr);
43 43
44#else /* CONFIG_SPARC32 */ 44#else /* CONFIG_SPARC32 */
45
46#include <asm/trap_block.h>
47
45struct popc_3insn_patch_entry { 48struct popc_3insn_patch_entry {
46 unsigned int addr; 49 unsigned int addr;
47 unsigned int insns[3]; 50 unsigned int insns[3];
@@ -57,6 +60,10 @@ extern struct popc_6insn_patch_entry __popc_6insn_patch,
57 __popc_6insn_patch_end; 60 __popc_6insn_patch_end;
58 61
59extern void __init per_cpu_patch(void); 62extern void __init per_cpu_patch(void);
63extern void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *,
64 struct sun4v_1insn_patch_entry *);
65extern void sun4v_patch_2insn_range(struct sun4v_2insn_patch_entry *,
66 struct sun4v_2insn_patch_entry *);
60extern void __init sun4v_patch(void); 67extern void __init sun4v_patch(void);
61extern void __init boot_cpu_id_too_large(int cpu); 68extern void __init boot_cpu_id_too_large(int cpu);
62extern unsigned int dcache_parity_tl1_occurred; 69extern unsigned int dcache_parity_tl1_occurred;
diff --git a/arch/sparc/kernel/module.c b/arch/sparc/kernel/module.c
index da0c6c70ccb..e5519870c3d 100644
--- a/arch/sparc/kernel/module.c
+++ b/arch/sparc/kernel/module.c
@@ -17,6 +17,8 @@
17#include <asm/processor.h> 17#include <asm/processor.h>
18#include <asm/spitfire.h> 18#include <asm/spitfire.h>
19 19
20#include "entry.h"
21
20#ifdef CONFIG_SPARC64 22#ifdef CONFIG_SPARC64
21 23
22#include <linux/jump_label.h> 24#include <linux/jump_label.h>
@@ -203,6 +205,29 @@ int apply_relocate_add(Elf_Shdr *sechdrs,
203} 205}
204 206
205#ifdef CONFIG_SPARC64 207#ifdef CONFIG_SPARC64
208static void do_patch_sections(const Elf_Ehdr *hdr,
209 const Elf_Shdr *sechdrs)
210{
211 const Elf_Shdr *s, *sun4v_1insn = NULL, *sun4v_2insn = NULL;
212 char *secstrings = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
213
214 for (s = sechdrs; s < sechdrs + hdr->e_shnum; s++) {
215 if (!strcmp(".sun4v_1insn_patch", secstrings + s->sh_name))
216 sun4v_1insn = s;
217 if (!strcmp(".sun4v_2insn_patch", secstrings + s->sh_name))
218 sun4v_2insn = s;
219 }
220
221 if (sun4v_1insn && tlb_type == hypervisor) {
222 void *p = (void *) sun4v_1insn->sh_addr;
223 sun4v_patch_1insn_range(p, p + sun4v_1insn->sh_size);
224 }
225 if (sun4v_2insn && tlb_type == hypervisor) {
226 void *p = (void *) sun4v_2insn->sh_addr;
227 sun4v_patch_2insn_range(p, p + sun4v_2insn->sh_size);
228 }
229}
230
206int module_finalize(const Elf_Ehdr *hdr, 231int module_finalize(const Elf_Ehdr *hdr,
207 const Elf_Shdr *sechdrs, 232 const Elf_Shdr *sechdrs,
208 struct module *me) 233 struct module *me)
@@ -210,6 +235,8 @@ int module_finalize(const Elf_Ehdr *hdr,
210 /* make jump label nops */ 235 /* make jump label nops */
211 jump_label_apply_nops(me); 236 jump_label_apply_nops(me);
212 237
238 do_patch_sections(hdr, sechdrs);
239
213 /* Cheetah's I-cache is fully coherent. */ 240 /* Cheetah's I-cache is fully coherent. */
214 if (tlb_type == spitfire) { 241 if (tlb_type == spitfire) {
215 unsigned long va; 242 unsigned long va;
diff --git a/arch/sparc/kernel/pci_sun4v.c b/arch/sparc/kernel/pci_sun4v.c
index b272cda35a0..af5755d20fb 100644
--- a/arch/sparc/kernel/pci_sun4v.c
+++ b/arch/sparc/kernel/pci_sun4v.c
@@ -849,10 +849,10 @@ static int pci_sun4v_msiq_build_irq(struct pci_pbm_info *pbm,
849 if (!irq) 849 if (!irq)
850 return -ENOMEM; 850 return -ENOMEM;
851 851
852 if (pci_sun4v_msiq_setstate(pbm->devhandle, msiqid, HV_MSIQSTATE_IDLE))
853 return -EINVAL;
854 if (pci_sun4v_msiq_setvalid(pbm->devhandle, msiqid, HV_MSIQ_VALID)) 852 if (pci_sun4v_msiq_setvalid(pbm->devhandle, msiqid, HV_MSIQ_VALID))
855 return -EINVAL; 853 return -EINVAL;
854 if (pci_sun4v_msiq_setstate(pbm->devhandle, msiqid, HV_MSIQSTATE_IDLE))
855 return -EINVAL;
856 856
857 return irq; 857 return irq;
858} 858}
diff --git a/arch/sparc/kernel/prom_common.c b/arch/sparc/kernel/prom_common.c
index 46614807a57..741df916c12 100644
--- a/arch/sparc/kernel/prom_common.c
+++ b/arch/sparc/kernel/prom_common.c
@@ -58,12 +58,10 @@ int of_set_property(struct device_node *dp, const char *name, void *val, int len
58 void *new_val; 58 void *new_val;
59 int err; 59 int err;
60 60
61 new_val = kmalloc(len, GFP_KERNEL); 61 new_val = kmemdup(val, len, GFP_KERNEL);
62 if (!new_val) 62 if (!new_val)
63 return -ENOMEM; 63 return -ENOMEM;
64 64
65 memcpy(new_val, val, len);
66
67 err = -ENODEV; 65 err = -ENODEV;
68 66
69 mutex_lock(&of_set_property_mutex); 67 mutex_lock(&of_set_property_mutex);
diff --git a/arch/sparc/kernel/setup_64.c b/arch/sparc/kernel/setup_64.c
index c965595aa7e..a854a1c240f 100644
--- a/arch/sparc/kernel/setup_64.c
+++ b/arch/sparc/kernel/setup_64.c
@@ -234,40 +234,50 @@ void __init per_cpu_patch(void)
234 } 234 }
235} 235}
236 236
237void __init sun4v_patch(void) 237void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *start,
238 struct sun4v_1insn_patch_entry *end)
238{ 239{
239 extern void sun4v_hvapi_init(void); 240 while (start < end) {
240 struct sun4v_1insn_patch_entry *p1; 241 unsigned long addr = start->addr;
241 struct sun4v_2insn_patch_entry *p2;
242
243 if (tlb_type != hypervisor)
244 return;
245 242
246 p1 = &__sun4v_1insn_patch; 243 *(unsigned int *) (addr + 0) = start->insn;
247 while (p1 < &__sun4v_1insn_patch_end) {
248 unsigned long addr = p1->addr;
249
250 *(unsigned int *) (addr + 0) = p1->insn;
251 wmb(); 244 wmb();
252 __asm__ __volatile__("flush %0" : : "r" (addr + 0)); 245 __asm__ __volatile__("flush %0" : : "r" (addr + 0));
253 246
254 p1++; 247 start++;
255 } 248 }
249}
256 250
257 p2 = &__sun4v_2insn_patch; 251void sun4v_patch_2insn_range(struct sun4v_2insn_patch_entry *start,
258 while (p2 < &__sun4v_2insn_patch_end) { 252 struct sun4v_2insn_patch_entry *end)
259 unsigned long addr = p2->addr; 253{
254 while (start < end) {
255 unsigned long addr = start->addr;
260 256
261 *(unsigned int *) (addr + 0) = p2->insns[0]; 257 *(unsigned int *) (addr + 0) = start->insns[0];
262 wmb(); 258 wmb();
263 __asm__ __volatile__("flush %0" : : "r" (addr + 0)); 259 __asm__ __volatile__("flush %0" : : "r" (addr + 0));
264 260
265 *(unsigned int *) (addr + 4) = p2->insns[1]; 261 *(unsigned int *) (addr + 4) = start->insns[1];
266 wmb(); 262 wmb();
267 __asm__ __volatile__("flush %0" : : "r" (addr + 4)); 263 __asm__ __volatile__("flush %0" : : "r" (addr + 4));
268 264
269 p2++; 265 start++;
270 } 266 }
267}
268
269void __init sun4v_patch(void)
270{
271 extern void sun4v_hvapi_init(void);
272
273 if (tlb_type != hypervisor)
274 return;
275
276 sun4v_patch_1insn_range(&__sun4v_1insn_patch,
277 &__sun4v_1insn_patch_end);
278
279 sun4v_patch_2insn_range(&__sun4v_2insn_patch,
280 &__sun4v_2insn_patch_end);
271 281
272 sun4v_hvapi_init(); 282 sun4v_hvapi_init();
273} 283}
diff --git a/arch/sparc/kernel/signal32.c b/arch/sparc/kernel/signal32.c
index 2caa556db86..023b8860dc9 100644
--- a/arch/sparc/kernel/signal32.c
+++ b/arch/sparc/kernel/signal32.c
@@ -822,21 +822,23 @@ static inline void syscall_restart32(unsigned long orig_i0, struct pt_regs *regs
822 * want to handle. Thus you cannot kill init even with a SIGKILL even by 822 * want to handle. Thus you cannot kill init even with a SIGKILL even by
823 * mistake. 823 * mistake.
824 */ 824 */
825void do_signal32(sigset_t *oldset, struct pt_regs * regs, 825void do_signal32(sigset_t *oldset, struct pt_regs * regs)
826 int restart_syscall, unsigned long orig_i0)
827{ 826{
828 struct k_sigaction ka; 827 struct k_sigaction ka;
828 unsigned long orig_i0;
829 int restart_syscall;
829 siginfo_t info; 830 siginfo_t info;
830 int signr; 831 int signr;
831 832
832 signr = get_signal_to_deliver(&info, &ka, regs, NULL); 833 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
833 834
834 /* If the debugger messes with the program counter, it clears 835 restart_syscall = 0;
835 * the "in syscall" bit, directing us to not perform a syscall 836 orig_i0 = 0;
836 * restart. 837 if (pt_regs_is_syscall(regs) &&
837 */ 838 (regs->tstate & (TSTATE_XCARRY | TSTATE_ICARRY))) {
838 if (restart_syscall && !pt_regs_is_syscall(regs)) 839 restart_syscall = 1;
839 restart_syscall = 0; 840 orig_i0 = regs->u_regs[UREG_G6];
841 }
840 842
841 if (signr > 0) { 843 if (signr > 0) {
842 if (restart_syscall) 844 if (restart_syscall)
diff --git a/arch/sparc/kernel/signal_32.c b/arch/sparc/kernel/signal_32.c
index 8ce247ac04c..d54c6e53aba 100644
--- a/arch/sparc/kernel/signal_32.c
+++ b/arch/sparc/kernel/signal_32.c
@@ -519,10 +519,26 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)
519 siginfo_t info; 519 siginfo_t info;
520 int signr; 520 int signr;
521 521
522 /* It's a lot of work and synchronization to add a new ptrace
523 * register for GDB to save and restore in order to get
524 * orig_i0 correct for syscall restarts when debugging.
525 *
526 * Although it should be the case that most of the global
527 * registers are volatile across a system call, glibc already
528 * depends upon that fact that we preserve them. So we can't
529 * just use any global register to save away the orig_i0 value.
530 *
531 * In particular %g2, %g3, %g4, and %g5 are all assumed to be
532 * preserved across a system call trap by various pieces of
533 * code in glibc.
534 *
535 * %g7 is used as the "thread register". %g6 is not used in
536 * any fixed manner. %g6 is used as a scratch register and
537 * a compiler temporary, but it's value is never used across
538 * a system call. Therefore %g6 is usable for orig_i0 storage.
539 */
522 if (pt_regs_is_syscall(regs) && (regs->psr & PSR_C)) 540 if (pt_regs_is_syscall(regs) && (regs->psr & PSR_C))
523 restart_syscall = 1; 541 regs->u_regs[UREG_G6] = orig_i0;
524 else
525 restart_syscall = 0;
526 542
527 if (test_thread_flag(TIF_RESTORE_SIGMASK)) 543 if (test_thread_flag(TIF_RESTORE_SIGMASK))
528 oldset = &current->saved_sigmask; 544 oldset = &current->saved_sigmask;
@@ -535,8 +551,12 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)
535 * the software "in syscall" bit, directing us to not perform 551 * the software "in syscall" bit, directing us to not perform
536 * a syscall restart. 552 * a syscall restart.
537 */ 553 */
538 if (restart_syscall && !pt_regs_is_syscall(regs)) 554 restart_syscall = 0;
539 restart_syscall = 0; 555 if (pt_regs_is_syscall(regs) && (regs->psr & PSR_C)) {
556 restart_syscall = 1;
557 orig_i0 = regs->u_regs[UREG_G6];
558 }
559
540 560
541 if (signr > 0) { 561 if (signr > 0) {
542 if (restart_syscall) 562 if (restart_syscall)
diff --git a/arch/sparc/kernel/signal_64.c b/arch/sparc/kernel/signal_64.c
index a2b81598d90..f0836cd0e2f 100644
--- a/arch/sparc/kernel/signal_64.c
+++ b/arch/sparc/kernel/signal_64.c
@@ -529,11 +529,27 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)
529 siginfo_t info; 529 siginfo_t info;
530 int signr; 530 int signr;
531 531
532 /* It's a lot of work and synchronization to add a new ptrace
533 * register for GDB to save and restore in order to get
534 * orig_i0 correct for syscall restarts when debugging.
535 *
536 * Although it should be the case that most of the global
537 * registers are volatile across a system call, glibc already
538 * depends upon that fact that we preserve them. So we can't
539 * just use any global register to save away the orig_i0 value.
540 *
541 * In particular %g2, %g3, %g4, and %g5 are all assumed to be
542 * preserved across a system call trap by various pieces of
543 * code in glibc.
544 *
545 * %g7 is used as the "thread register". %g6 is not used in
546 * any fixed manner. %g6 is used as a scratch register and
547 * a compiler temporary, but it's value is never used across
548 * a system call. Therefore %g6 is usable for orig_i0 storage.
549 */
532 if (pt_regs_is_syscall(regs) && 550 if (pt_regs_is_syscall(regs) &&
533 (regs->tstate & (TSTATE_XCARRY | TSTATE_ICARRY))) { 551 (regs->tstate & (TSTATE_XCARRY | TSTATE_ICARRY)))
534 restart_syscall = 1; 552 regs->u_regs[UREG_G6] = orig_i0;
535 } else
536 restart_syscall = 0;
537 553
538 if (current_thread_info()->status & TS_RESTORE_SIGMASK) 554 if (current_thread_info()->status & TS_RESTORE_SIGMASK)
539 oldset = &current->saved_sigmask; 555 oldset = &current->saved_sigmask;
@@ -542,22 +558,20 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)
542 558
543#ifdef CONFIG_COMPAT 559#ifdef CONFIG_COMPAT
544 if (test_thread_flag(TIF_32BIT)) { 560 if (test_thread_flag(TIF_32BIT)) {
545 extern void do_signal32(sigset_t *, struct pt_regs *, 561 extern void do_signal32(sigset_t *, struct pt_regs *);
546 int restart_syscall, 562 do_signal32(oldset, regs);
547 unsigned long orig_i0);
548 do_signal32(oldset, regs, restart_syscall, orig_i0);
549 return; 563 return;
550 } 564 }
551#endif 565#endif
552 566
553 signr = get_signal_to_deliver(&info, &ka, regs, NULL); 567 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
554 568
555 /* If the debugger messes with the program counter, it clears 569 restart_syscall = 0;
556 * the software "in syscall" bit, directing us to not perform 570 if (pt_regs_is_syscall(regs) &&
557 * a syscall restart. 571 (regs->tstate & (TSTATE_XCARRY | TSTATE_ICARRY))) {
558 */ 572 restart_syscall = 1;
559 if (restart_syscall && !pt_regs_is_syscall(regs)) 573 orig_i0 = regs->u_regs[UREG_G6];
560 restart_syscall = 0; 574 }
561 575
562 if (signr > 0) { 576 if (signr > 0) {
563 if (restart_syscall) 577 if (restart_syscall)
diff --git a/arch/sparc/kernel/sigutil_64.c b/arch/sparc/kernel/sigutil_64.c
index e7dc508c38e..b19570d41a3 100644
--- a/arch/sparc/kernel/sigutil_64.c
+++ b/arch/sparc/kernel/sigutil_64.c
@@ -2,6 +2,7 @@
2#include <linux/types.h> 2#include <linux/types.h>
3#include <linux/thread_info.h> 3#include <linux/thread_info.h>
4#include <linux/uaccess.h> 4#include <linux/uaccess.h>
5#include <linux/errno.h>
5 6
6#include <asm/sigcontext.h> 7#include <asm/sigcontext.h>
7#include <asm/fpumacro.h> 8#include <asm/fpumacro.h>
diff --git a/arch/sparc/kernel/systbls_32.S b/arch/sparc/kernel/systbls_32.S
index 09d8ec45445..63402f9e9f5 100644
--- a/arch/sparc/kernel/systbls_32.S
+++ b/arch/sparc/kernel/systbls_32.S
@@ -84,4 +84,4 @@ sys_call_table:
84/*320*/ .long sys_dup3, sys_pipe2, sys_inotify_init1, sys_accept4, sys_preadv 84/*320*/ .long sys_dup3, sys_pipe2, sys_inotify_init1, sys_accept4, sys_preadv
85/*325*/ .long sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init 85/*325*/ .long sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init
86/*330*/ .long sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime 86/*330*/ .long sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime
87/*335*/ .long sys_syncfs, sys_sendmmsg, sys_setns 87/*335*/ .long sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev
diff --git a/arch/sparc/kernel/systbls_64.S b/arch/sparc/kernel/systbls_64.S
index edbec45d468..db86b1a0e9a 100644
--- a/arch/sparc/kernel/systbls_64.S
+++ b/arch/sparc/kernel/systbls_64.S
@@ -85,7 +85,7 @@ sys_call_table32:
85/*320*/ .word sys_dup3, sys_pipe2, sys_inotify_init1, sys_accept4, compat_sys_preadv 85/*320*/ .word sys_dup3, sys_pipe2, sys_inotify_init1, sys_accept4, compat_sys_preadv
86 .word compat_sys_pwritev, compat_sys_rt_tgsigqueueinfo, sys_perf_event_open, compat_sys_recvmmsg, sys_fanotify_init 86 .word compat_sys_pwritev, compat_sys_rt_tgsigqueueinfo, sys_perf_event_open, compat_sys_recvmmsg, sys_fanotify_init
87/*330*/ .word sys32_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, compat_sys_open_by_handle_at, compat_sys_clock_adjtime 87/*330*/ .word sys32_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, compat_sys_open_by_handle_at, compat_sys_clock_adjtime
88 .word sys_syncfs, compat_sys_sendmmsg, sys_setns 88 .word sys_syncfs, compat_sys_sendmmsg, sys_setns, compat_sys_process_vm_readv, compat_sys_process_vm_writev
89 89
90#endif /* CONFIG_COMPAT */ 90#endif /* CONFIG_COMPAT */
91 91
@@ -162,4 +162,4 @@ sys_call_table:
162/*320*/ .word sys_dup3, sys_pipe2, sys_inotify_init1, sys_accept4, sys_preadv 162/*320*/ .word sys_dup3, sys_pipe2, sys_inotify_init1, sys_accept4, sys_preadv
163 .word sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init 163 .word sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init
164/*330*/ .word sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime 164/*330*/ .word sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime
165 .word sys_syncfs, sys_sendmmsg, sys_setns 165 .word sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev
diff --git a/arch/sparc/mm/Makefile b/arch/sparc/mm/Makefile
index e3cda21b5ee..301421c1129 100644
--- a/arch/sparc/mm/Makefile
+++ b/arch/sparc/mm/Makefile
@@ -8,7 +8,6 @@ obj-$(CONFIG_SPARC64) += ultra.o tlb.o tsb.o gup.o
8obj-y += fault_$(BITS).o 8obj-y += fault_$(BITS).o
9obj-y += init_$(BITS).o 9obj-y += init_$(BITS).o
10obj-$(CONFIG_SPARC32) += loadmmu.o 10obj-$(CONFIG_SPARC32) += loadmmu.o
11obj-y += generic_$(BITS).o
12obj-$(CONFIG_SPARC32) += extable.o btfixup.o srmmu.o iommu.o io-unit.o 11obj-$(CONFIG_SPARC32) += extable.o btfixup.o srmmu.o iommu.o io-unit.o
13obj-$(CONFIG_SPARC32) += hypersparc.o viking.o tsunami.o swift.o 12obj-$(CONFIG_SPARC32) += hypersparc.o viking.o tsunami.o swift.o
14obj-$(CONFIG_SPARC_LEON)+= leon_mm.o 13obj-$(CONFIG_SPARC_LEON)+= leon_mm.o
diff --git a/arch/sparc/mm/btfixup.c b/arch/sparc/mm/btfixup.c
index 5175ac2f482..8a7f81743c1 100644
--- a/arch/sparc/mm/btfixup.c
+++ b/arch/sparc/mm/btfixup.c
@@ -302,8 +302,7 @@ void __init btfixup(void)
302 case 'i': /* INT */ 302 case 'i': /* INT */
303 if ((insn & 0xc1c00000) == 0x01000000) /* %HI */ 303 if ((insn & 0xc1c00000) == 0x01000000) /* %HI */
304 set_addr(addr, q[1], fmangled, (insn & 0xffc00000) | (p[1] >> 10)); 304 set_addr(addr, q[1], fmangled, (insn & 0xffc00000) | (p[1] >> 10));
305 else if ((insn & 0x80002000) == 0x80002000 && 305 else if ((insn & 0x80002000) == 0x80002000) /* %LO */
306 (insn & 0x01800000) != 0x01800000) /* %LO */
307 set_addr(addr, q[1], fmangled, (insn & 0xffffe000) | (p[1] & 0x3ff)); 306 set_addr(addr, q[1], fmangled, (insn & 0xffffe000) | (p[1] & 0x3ff));
308 else { 307 else {
309 prom_printf(insn_i, p, addr, insn); 308 prom_printf(insn_i, p, addr, insn);
diff --git a/arch/sparc/mm/generic_32.c b/arch/sparc/mm/generic_32.c
deleted file mode 100644
index 6ca39a60a19..00000000000
--- a/arch/sparc/mm/generic_32.c
+++ /dev/null
@@ -1,99 +0,0 @@
1/*
2 * generic.c: Generic Sparc mm routines that are not dependent upon
3 * MMU type but are Sparc specific.
4 *
5 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
6 */
7
8#include <linux/kernel.h>
9#include <linux/mm.h>
10#include <linux/swap.h>
11#include <linux/pagemap.h>
12#include <linux/export.h>
13
14#include <asm/pgalloc.h>
15#include <asm/pgtable.h>
16#include <asm/page.h>
17#include <asm/cacheflush.h>
18#include <asm/tlbflush.h>
19
20/* Remap IO memory, the same way as remap_pfn_range(), but use
21 * the obio memory space.
22 *
23 * They use a pgprot that sets PAGE_IO and does not check the
24 * mem_map table as this is independent of normal memory.
25 */
26static inline void io_remap_pte_range(struct mm_struct *mm, pte_t * pte, unsigned long address, unsigned long size,
27 unsigned long offset, pgprot_t prot, int space)
28{
29 unsigned long end;
30
31 address &= ~PMD_MASK;
32 end = address + size;
33 if (end > PMD_SIZE)
34 end = PMD_SIZE;
35 do {
36 set_pte_at(mm, address, pte, mk_pte_io(offset, prot, space));
37 address += PAGE_SIZE;
38 offset += PAGE_SIZE;
39 pte++;
40 } while (address < end);
41}
42
43static inline int io_remap_pmd_range(struct mm_struct *mm, pmd_t * pmd, unsigned long address, unsigned long size,
44 unsigned long offset, pgprot_t prot, int space)
45{
46 unsigned long end;
47
48 address &= ~PGDIR_MASK;
49 end = address + size;
50 if (end > PGDIR_SIZE)
51 end = PGDIR_SIZE;
52 offset -= address;
53 do {
54 pte_t *pte = pte_alloc_map(mm, NULL, pmd, address);
55 if (!pte)
56 return -ENOMEM;
57 io_remap_pte_range(mm, pte, address, end - address, address + offset, prot, space);
58 address = (address + PMD_SIZE) & PMD_MASK;
59 pmd++;
60 } while (address < end);
61 return 0;
62}
63
64int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
65 unsigned long pfn, unsigned long size, pgprot_t prot)
66{
67 int error = 0;
68 pgd_t * dir;
69 unsigned long beg = from;
70 unsigned long end = from + size;
71 struct mm_struct *mm = vma->vm_mm;
72 int space = GET_IOSPACE(pfn);
73 unsigned long offset = GET_PFN(pfn) << PAGE_SHIFT;
74
75 /* See comment in mm/memory.c remap_pfn_range */
76 vma->vm_flags |= VM_IO | VM_RESERVED | VM_PFNMAP;
77 vma->vm_pgoff = (offset >> PAGE_SHIFT) |
78 ((unsigned long)space << 28UL);
79
80 offset -= from;
81 dir = pgd_offset(mm, from);
82 flush_cache_range(vma, beg, end);
83
84 while (from < end) {
85 pmd_t *pmd = pmd_alloc(mm, dir, from);
86 error = -ENOMEM;
87 if (!pmd)
88 break;
89 error = io_remap_pmd_range(mm, pmd, from, end - from, offset + from, prot, space);
90 if (error)
91 break;
92 from = (from + PGDIR_SIZE) & PGDIR_MASK;
93 dir++;
94 }
95
96 flush_tlb_range(vma, beg, end);
97 return error;
98}
99EXPORT_SYMBOL(io_remap_pfn_range);
diff --git a/arch/sparc/mm/generic_64.c b/arch/sparc/mm/generic_64.c
deleted file mode 100644
index 9b357ddae39..00000000000
--- a/arch/sparc/mm/generic_64.c
+++ /dev/null
@@ -1,165 +0,0 @@
1/*
2 * generic.c: Generic Sparc mm routines that are not dependent upon
3 * MMU type but are Sparc specific.
4 *
5 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
6 */
7
8#include <linux/kernel.h>
9#include <linux/mm.h>
10#include <linux/swap.h>
11#include <linux/export.h>
12#include <linux/pagemap.h>
13
14#include <asm/pgalloc.h>
15#include <asm/pgtable.h>
16#include <asm/page.h>
17#include <asm/tlbflush.h>
18
19/* Remap IO memory, the same way as remap_pfn_range(), but use
20 * the obio memory space.
21 *
22 * They use a pgprot that sets PAGE_IO and does not check the
23 * mem_map table as this is independent of normal memory.
24 */
25static inline void io_remap_pte_range(struct mm_struct *mm, pte_t * pte,
26 unsigned long address,
27 unsigned long size,
28 unsigned long offset, pgprot_t prot,
29 int space)
30{
31 unsigned long end;
32
33 /* clear hack bit that was used as a write_combine side-effect flag */
34 offset &= ~0x1UL;
35 address &= ~PMD_MASK;
36 end = address + size;
37 if (end > PMD_SIZE)
38 end = PMD_SIZE;
39 do {
40 pte_t entry;
41 unsigned long curend = address + PAGE_SIZE;
42
43 entry = mk_pte_io(offset, prot, space, PAGE_SIZE);
44 if (!(address & 0xffff)) {
45 if (PAGE_SIZE < (4 * 1024 * 1024) &&
46 !(address & 0x3fffff) &&
47 !(offset & 0x3ffffe) &&
48 end >= address + 0x400000) {
49 entry = mk_pte_io(offset, prot, space,
50 4 * 1024 * 1024);
51 curend = address + 0x400000;
52 offset += 0x400000;
53 } else if (PAGE_SIZE < (512 * 1024) &&
54 !(address & 0x7ffff) &&
55 !(offset & 0x7fffe) &&
56 end >= address + 0x80000) {
57 entry = mk_pte_io(offset, prot, space,
58 512 * 1024 * 1024);
59 curend = address + 0x80000;
60 offset += 0x80000;
61 } else if (PAGE_SIZE < (64 * 1024) &&
62 !(offset & 0xfffe) &&
63 end >= address + 0x10000) {
64 entry = mk_pte_io(offset, prot, space,
65 64 * 1024);
66 curend = address + 0x10000;
67 offset += 0x10000;
68 } else
69 offset += PAGE_SIZE;
70 } else
71 offset += PAGE_SIZE;
72
73 if (pte_write(entry))
74 entry = pte_mkdirty(entry);
75 do {
76 BUG_ON(!pte_none(*pte));
77 set_pte_at(mm, address, pte, entry);
78 address += PAGE_SIZE;
79 pte_val(entry) += PAGE_SIZE;
80 pte++;
81 } while (address < curend);
82 } while (address < end);
83}
84
85static inline int io_remap_pmd_range(struct mm_struct *mm, pmd_t * pmd, unsigned long address, unsigned long size,
86 unsigned long offset, pgprot_t prot, int space)
87{
88 unsigned long end;
89
90 address &= ~PGDIR_MASK;
91 end = address + size;
92 if (end > PGDIR_SIZE)
93 end = PGDIR_SIZE;
94 offset -= address;
95 do {
96 pte_t *pte = pte_alloc_map(mm, NULL, pmd, address);
97 if (!pte)
98 return -ENOMEM;
99 io_remap_pte_range(mm, pte, address, end - address, address + offset, prot, space);
100 pte_unmap(pte);
101 address = (address + PMD_SIZE) & PMD_MASK;
102 pmd++;
103 } while (address < end);
104 return 0;
105}
106
107static inline int io_remap_pud_range(struct mm_struct *mm, pud_t * pud, unsigned long address, unsigned long size,
108 unsigned long offset, pgprot_t prot, int space)
109{
110 unsigned long end;
111
112 address &= ~PUD_MASK;
113 end = address + size;
114 if (end > PUD_SIZE)
115 end = PUD_SIZE;
116 offset -= address;
117 do {
118 pmd_t *pmd = pmd_alloc(mm, pud, address);
119 if (!pud)
120 return -ENOMEM;
121 io_remap_pmd_range(mm, pmd, address, end - address, address + offset, prot, space);
122 address = (address + PUD_SIZE) & PUD_MASK;
123 pud++;
124 } while (address < end);
125 return 0;
126}
127
128int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
129 unsigned long pfn, unsigned long size, pgprot_t prot)
130{
131 int error = 0;
132 pgd_t * dir;
133 unsigned long beg = from;
134 unsigned long end = from + size;
135 struct mm_struct *mm = vma->vm_mm;
136 int space = GET_IOSPACE(pfn);
137 unsigned long offset = GET_PFN(pfn) << PAGE_SHIFT;
138 unsigned long phys_base;
139
140 phys_base = offset | (((unsigned long) space) << 32UL);
141
142 /* See comment in mm/memory.c remap_pfn_range */
143 vma->vm_flags |= VM_IO | VM_RESERVED | VM_PFNMAP;
144 vma->vm_pgoff = phys_base >> PAGE_SHIFT;
145
146 offset -= from;
147 dir = pgd_offset(mm, from);
148 flush_cache_range(vma, beg, end);
149
150 while (from < end) {
151 pud_t *pud = pud_alloc(mm, dir, from);
152 error = -ENOMEM;
153 if (!pud)
154 break;
155 error = io_remap_pud_range(mm, pud, from, end - from, offset + from, prot, space);
156 if (error)
157 break;
158 from = (from + PGDIR_SIZE) & PGDIR_MASK;
159 dir++;
160 }
161
162 flush_tlb_range(vma, beg, end);
163 return error;
164}
165EXPORT_SYMBOL(io_remap_pfn_range);
diff --git a/arch/tile/include/asm/irq.h b/arch/tile/include/asm/irq.h
index 94e9a511de8..f80f8ceabc6 100644
--- a/arch/tile/include/asm/irq.h
+++ b/arch/tile/include/asm/irq.h
@@ -74,16 +74,6 @@ enum {
74 */ 74 */
75void tile_irq_activate(unsigned int irq, int tile_irq_type); 75void tile_irq_activate(unsigned int irq, int tile_irq_type);
76 76
77/*
78 * For onboard, non-PCI (e.g. TILE_IRQ_PERCPU) devices, drivers know
79 * how to use enable/disable_percpu_irq() to manage interrupts on each
80 * core. We can't use the generic enable/disable_irq() because they
81 * use a single reference count per irq, rather than per cpu per irq.
82 */
83void enable_percpu_irq(unsigned int irq);
84void disable_percpu_irq(unsigned int irq);
85
86
87void setup_irq_regs(void); 77void setup_irq_regs(void);
88 78
89#endif /* _ASM_TILE_IRQ_H */ 79#endif /* _ASM_TILE_IRQ_H */
diff --git a/arch/tile/kernel/irq.c b/arch/tile/kernel/irq.c
index aa0134db2dd..02e62806501 100644
--- a/arch/tile/kernel/irq.c
+++ b/arch/tile/kernel/irq.c
@@ -152,14 +152,13 @@ void tile_dev_intr(struct pt_regs *regs, int intnum)
152 * Remove an irq from the disabled mask. If we're in an interrupt 152 * Remove an irq from the disabled mask. If we're in an interrupt
153 * context, defer enabling the HW interrupt until we leave. 153 * context, defer enabling the HW interrupt until we leave.
154 */ 154 */
155void enable_percpu_irq(unsigned int irq) 155static void tile_irq_chip_enable(struct irq_data *d)
156{ 156{
157 get_cpu_var(irq_disable_mask) &= ~(1UL << irq); 157 get_cpu_var(irq_disable_mask) &= ~(1UL << d->irq);
158 if (__get_cpu_var(irq_depth) == 0) 158 if (__get_cpu_var(irq_depth) == 0)
159 unmask_irqs(1UL << irq); 159 unmask_irqs(1UL << d->irq);
160 put_cpu_var(irq_disable_mask); 160 put_cpu_var(irq_disable_mask);
161} 161}
162EXPORT_SYMBOL(enable_percpu_irq);
163 162
164/* 163/*
165 * Add an irq to the disabled mask. We disable the HW interrupt 164 * Add an irq to the disabled mask. We disable the HW interrupt
@@ -167,13 +166,12 @@ EXPORT_SYMBOL(enable_percpu_irq);
167 * in an interrupt context, the return path is careful to avoid 166 * in an interrupt context, the return path is careful to avoid
168 * unmasking a newly disabled interrupt. 167 * unmasking a newly disabled interrupt.
169 */ 168 */
170void disable_percpu_irq(unsigned int irq) 169static void tile_irq_chip_disable(struct irq_data *d)
171{ 170{
172 get_cpu_var(irq_disable_mask) |= (1UL << irq); 171 get_cpu_var(irq_disable_mask) |= (1UL << d->irq);
173 mask_irqs(1UL << irq); 172 mask_irqs(1UL << d->irq);
174 put_cpu_var(irq_disable_mask); 173 put_cpu_var(irq_disable_mask);
175} 174}
176EXPORT_SYMBOL(disable_percpu_irq);
177 175
178/* Mask an interrupt. */ 176/* Mask an interrupt. */
179static void tile_irq_chip_mask(struct irq_data *d) 177static void tile_irq_chip_mask(struct irq_data *d)
@@ -209,6 +207,8 @@ static void tile_irq_chip_eoi(struct irq_data *d)
209 207
210static struct irq_chip tile_irq_chip = { 208static struct irq_chip tile_irq_chip = {
211 .name = "tile_irq_chip", 209 .name = "tile_irq_chip",
210 .irq_enable = tile_irq_chip_enable,
211 .irq_disable = tile_irq_chip_disable,
212 .irq_ack = tile_irq_chip_ack, 212 .irq_ack = tile_irq_chip_ack,
213 .irq_eoi = tile_irq_chip_eoi, 213 .irq_eoi = tile_irq_chip_eoi,
214 .irq_mask = tile_irq_chip_mask, 214 .irq_mask = tile_irq_chip_mask,
diff --git a/arch/tile/kernel/pci-dma.c b/arch/tile/kernel/pci-dma.c
index 658f2ce426a..b3ed19f8779 100644
--- a/arch/tile/kernel/pci-dma.c
+++ b/arch/tile/kernel/pci-dma.c
@@ -15,6 +15,7 @@
15#include <linux/mm.h> 15#include <linux/mm.h>
16#include <linux/dma-mapping.h> 16#include <linux/dma-mapping.h>
17#include <linux/vmalloc.h> 17#include <linux/vmalloc.h>
18#include <linux/export.h>
18#include <asm/tlbflush.h> 19#include <asm/tlbflush.h>
19#include <asm/homecache.h> 20#include <asm/homecache.h>
20 21
diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c
index 2a8014cb1ff..9d610d3fb11 100644
--- a/arch/tile/kernel/pci.c
+++ b/arch/tile/kernel/pci.c
@@ -24,6 +24,7 @@
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/uaccess.h> 26#include <linux/uaccess.h>
27#include <linux/export.h>
27 28
28#include <asm/processor.h> 29#include <asm/processor.h>
29#include <asm/sections.h> 30#include <asm/sections.h>
diff --git a/arch/tile/kernel/sysfs.c b/arch/tile/kernel/sysfs.c
index b671a86f451..60290826809 100644
--- a/arch/tile/kernel/sysfs.c
+++ b/arch/tile/kernel/sysfs.c
@@ -18,6 +18,7 @@
18#include <linux/cpu.h> 18#include <linux/cpu.h>
19#include <linux/slab.h> 19#include <linux/slab.h>
20#include <linux/smp.h> 20#include <linux/smp.h>
21#include <linux/stat.h>
21#include <hv/hypervisor.h> 22#include <hv/hypervisor.h>
22 23
23/* Return a string queried from the hypervisor, truncated to page size. */ 24/* Return a string queried from the hypervisor, truncated to page size. */
diff --git a/arch/tile/lib/exports.c b/arch/tile/lib/exports.c
index a87d2a859ba..2a81d32de0d 100644
--- a/arch/tile/lib/exports.c
+++ b/arch/tile/lib/exports.c
@@ -39,6 +39,9 @@ EXPORT_SYMBOL(finv_user_asm);
39EXPORT_SYMBOL(current_text_addr); 39EXPORT_SYMBOL(current_text_addr);
40EXPORT_SYMBOL(dump_stack); 40EXPORT_SYMBOL(dump_stack);
41 41
42/* arch/tile/kernel/head.S */
43EXPORT_SYMBOL(empty_zero_page);
44
42/* arch/tile/lib/, various memcpy files */ 45/* arch/tile/lib/, various memcpy files */
43EXPORT_SYMBOL(memcpy); 46EXPORT_SYMBOL(memcpy);
44EXPORT_SYMBOL(__copy_to_user_inatomic); 47EXPORT_SYMBOL(__copy_to_user_inatomic);
diff --git a/arch/tile/mm/homecache.c b/arch/tile/mm/homecache.c
index cbe6f4f9eca..1cc6ae477c9 100644
--- a/arch/tile/mm/homecache.c
+++ b/arch/tile/mm/homecache.c
@@ -449,9 +449,12 @@ void homecache_free_pages(unsigned long addr, unsigned int order)
449 VM_BUG_ON(!virt_addr_valid((void *)addr)); 449 VM_BUG_ON(!virt_addr_valid((void *)addr));
450 page = virt_to_page((void *)addr); 450 page = virt_to_page((void *)addr);
451 if (put_page_testzero(page)) { 451 if (put_page_testzero(page)) {
452 int pages = (1 << order);
453 homecache_change_page_home(page, order, initial_page_home()); 452 homecache_change_page_home(page, order, initial_page_home());
454 while (pages--) 453 if (order == 0) {
455 __free_page(page++); 454 free_hot_cold_page(page, 0);
455 } else {
456 init_page_count(page);
457 __free_pages(page, order);
458 }
456 } 459 }
457} 460}
diff --git a/arch/unicore32/Kconfig b/arch/unicore32/Kconfig
index e57dcce9bfd..942ed6174f1 100644
--- a/arch/unicore32/Kconfig
+++ b/arch/unicore32/Kconfig
@@ -237,13 +237,13 @@ menu "PKUnity NetBook-0916 Features"
237 237
238config I2C_BATTERY_BQ27200 238config I2C_BATTERY_BQ27200
239 tristate "I2C Battery BQ27200 Support" 239 tristate "I2C Battery BQ27200 Support"
240 select PUV3_I2C 240 select I2C_PUV3
241 select POWER_SUPPLY 241 select POWER_SUPPLY
242 select BATTERY_BQ27x00 242 select BATTERY_BQ27x00
243 243
244config I2C_EEPROM_AT24 244config I2C_EEPROM_AT24
245 tristate "I2C EEPROMs AT24 support" 245 tristate "I2C EEPROMs AT24 support"
246 select PUV3_I2C 246 select I2C_PUV3
247 select MISC_DEVICES 247 select MISC_DEVICES
248 select EEPROM_AT24 248 select EEPROM_AT24
249 249
diff --git a/arch/unicore32/Kconfig.debug b/arch/unicore32/Kconfig.debug
index ae2ec334c3c..1a362623984 100644
--- a/arch/unicore32/Kconfig.debug
+++ b/arch/unicore32/Kconfig.debug
@@ -44,18 +44,4 @@ config DEBUG_OCD
44 Say Y here if you want the debug print routines to direct their 44 Say Y here if you want the debug print routines to direct their
45 output to the UniCore On-Chip-Debugger channel using CP #1. 45 output to the UniCore On-Chip-Debugger channel using CP #1.
46 46
47config DEBUG_OCD_BREAKPOINT
48 bool "Breakpoint support via On-Chip-Debugger"
49 depends on DEBUG_OCD
50
51config DEBUG_UART
52 int "Kernel low-level debugging messages via serial port"
53 depends on DEBUG_LL
54 range 0 1
55 default "0"
56 help
57 Choice for UART for kernel low-level using PKUnity UARTS,
58 should be between zero and one. The port must have been
59 initialised by the boot-loader before use.
60
61endmenu 47endmenu
diff --git a/arch/unicore32/boot/compressed/Makefile b/arch/unicore32/boot/compressed/Makefile
index b0954a2d23c..950a9afa38f 100644
--- a/arch/unicore32/boot/compressed/Makefile
+++ b/arch/unicore32/boot/compressed/Makefile
@@ -10,8 +10,8 @@
10# Copyright (C) 2001~2010 GUAN Xue-tao 10# Copyright (C) 2001~2010 GUAN Xue-tao
11# 11#
12 12
13EXTRA_CFLAGS := -fpic -fno-builtin 13ccflags-y := -fpic -fno-builtin
14EXTRA_AFLAGS := -Wa,-march=all 14asflags-y := -Wa,-march=all
15 15
16OBJS := misc.o 16OBJS := misc.o
17 17
diff --git a/arch/unicore32/include/asm/bitops.h b/arch/unicore32/include/asm/bitops.h
index 1628a632899..401f597bc38 100644
--- a/arch/unicore32/include/asm/bitops.h
+++ b/arch/unicore32/include/asm/bitops.h
@@ -13,12 +13,6 @@
13#ifndef __UNICORE_BITOPS_H__ 13#ifndef __UNICORE_BITOPS_H__
14#define __UNICORE_BITOPS_H__ 14#define __UNICORE_BITOPS_H__
15 15
16#define find_next_bit __uc32_find_next_bit
17#define find_next_zero_bit __uc32_find_next_zero_bit
18
19#define find_first_bit __uc32_find_first_bit
20#define find_first_zero_bit __uc32_find_first_zero_bit
21
22#define _ASM_GENERIC_BITOPS_FLS_H_ 16#define _ASM_GENERIC_BITOPS_FLS_H_
23#define _ASM_GENERIC_BITOPS___FLS_H_ 17#define _ASM_GENERIC_BITOPS___FLS_H_
24#define _ASM_GENERIC_BITOPS_FFS_H_ 18#define _ASM_GENERIC_BITOPS_FFS_H_
@@ -44,4 +38,10 @@ static inline int fls(int x)
44 38
45#include <asm-generic/bitops.h> 39#include <asm-generic/bitops.h>
46 40
41/* following definitions: to avoid using codes in lib/find_*.c */
42#define find_next_bit find_next_bit
43#define find_next_zero_bit find_next_zero_bit
44#define find_first_bit find_first_bit
45#define find_first_zero_bit find_first_zero_bit
46
47#endif /* __UNICORE_BITOPS_H__ */ 47#endif /* __UNICORE_BITOPS_H__ */
diff --git a/arch/unicore32/include/asm/processor.h b/arch/unicore32/include/asm/processor.h
index e11cb078657..f0d780a51f9 100644
--- a/arch/unicore32/include/asm/processor.h
+++ b/arch/unicore32/include/asm/processor.h
@@ -53,7 +53,6 @@ struct thread_struct {
53#define start_thread(regs, pc, sp) \ 53#define start_thread(regs, pc, sp) \
54({ \ 54({ \
55 unsigned long *stack = (unsigned long *)sp; \ 55 unsigned long *stack = (unsigned long *)sp; \
56 set_fs(USER_DS); \
57 memset(regs->uregs, 0, sizeof(regs->uregs)); \ 56 memset(regs->uregs, 0, sizeof(regs->uregs)); \
58 regs->UCreg_asr = USER_MODE; \ 57 regs->UCreg_asr = USER_MODE; \
59 regs->UCreg_pc = pc & ~1; /* pc */ \ 58 regs->UCreg_pc = pc & ~1; /* pc */ \
diff --git a/arch/unicore32/kernel/ksyms.c b/arch/unicore32/kernel/ksyms.c
index a8970809428..d98bd812cae 100644
--- a/arch/unicore32/kernel/ksyms.c
+++ b/arch/unicore32/kernel/ksyms.c
@@ -24,8 +24,8 @@
24 24
25#include "ksyms.h" 25#include "ksyms.h"
26 26
27EXPORT_SYMBOL(__uc32_find_next_zero_bit); 27EXPORT_SYMBOL(find_next_zero_bit);
28EXPORT_SYMBOL(__uc32_find_next_bit); 28EXPORT_SYMBOL(find_next_bit);
29 29
30EXPORT_SYMBOL(__backtrace); 30EXPORT_SYMBOL(__backtrace);
31 31
diff --git a/arch/unicore32/lib/findbit.S b/arch/unicore32/lib/findbit.S
index c360ce905d8..c77746247d3 100644
--- a/arch/unicore32/lib/findbit.S
+++ b/arch/unicore32/lib/findbit.S
@@ -17,7 +17,7 @@
17 * Purpose : Find a 'zero' bit 17 * Purpose : Find a 'zero' bit
18 * Prototype: int find_first_zero_bit(void *addr, unsigned int maxbit); 18 * Prototype: int find_first_zero_bit(void *addr, unsigned int maxbit);
19 */ 19 */
20__uc32_find_first_zero_bit: 20ENTRY(find_first_zero_bit)
21 cxor.a r1, #0 21 cxor.a r1, #0
22 beq 3f 22 beq 3f
23 mov r2, #0 23 mov r2, #0
@@ -29,13 +29,14 @@ __uc32_find_first_zero_bit:
29 bub 1b 29 bub 1b
303: mov r0, r1 @ no free bits 303: mov r0, r1 @ no free bits
31 mov pc, lr 31 mov pc, lr
32ENDPROC(find_first_zero_bit)
32 33
33/* 34/*
34 * Purpose : Find next 'zero' bit 35 * Purpose : Find next 'zero' bit
35 * Prototype: int find_next_zero_bit 36 * Prototype: int find_next_zero_bit
36 * (void *addr, unsigned int maxbit, int offset) 37 * (void *addr, unsigned int maxbit, int offset)
37 */ 38 */
38ENTRY(__uc32_find_next_zero_bit) 39ENTRY(find_next_zero_bit)
39 cxor.a r1, #0 40 cxor.a r1, #0
40 beq 3b 41 beq 3b
41 and.a ip, r2, #7 42 and.a ip, r2, #7
@@ -47,14 +48,14 @@ ENTRY(__uc32_find_next_zero_bit)
47 or r2, r2, #7 @ if zero, then no bits here 48 or r2, r2, #7 @ if zero, then no bits here
48 add r2, r2, #1 @ align bit pointer 49 add r2, r2, #1 @ align bit pointer
49 b 2b @ loop for next bit 50 b 2b @ loop for next bit
50ENDPROC(__uc32_find_next_zero_bit) 51ENDPROC(find_next_zero_bit)
51 52
52/* 53/*
53 * Purpose : Find a 'one' bit 54 * Purpose : Find a 'one' bit
54 * Prototype: int find_first_bit 55 * Prototype: int find_first_bit
55 * (const unsigned long *addr, unsigned int maxbit); 56 * (const unsigned long *addr, unsigned int maxbit);
56 */ 57 */
57__uc32_find_first_bit: 58ENTRY(find_first_bit)
58 cxor.a r1, #0 59 cxor.a r1, #0
59 beq 3f 60 beq 3f
60 mov r2, #0 61 mov r2, #0
@@ -66,13 +67,14 @@ __uc32_find_first_bit:
66 bub 1b 67 bub 1b
673: mov r0, r1 @ no free bits 683: mov r0, r1 @ no free bits
68 mov pc, lr 69 mov pc, lr
70ENDPROC(find_first_bit)
69 71
70/* 72/*
71 * Purpose : Find next 'one' bit 73 * Purpose : Find next 'one' bit
72 * Prototype: int find_next_zero_bit 74 * Prototype: int find_next_zero_bit
73 * (void *addr, unsigned int maxbit, int offset) 75 * (void *addr, unsigned int maxbit, int offset)
74 */ 76 */
75ENTRY(__uc32_find_next_bit) 77ENTRY(find_next_bit)
76 cxor.a r1, #0 78 cxor.a r1, #0
77 beq 3b 79 beq 3b
78 and.a ip, r2, #7 80 and.a ip, r2, #7
@@ -83,7 +85,7 @@ ENTRY(__uc32_find_next_bit)
83 or r2, r2, #7 @ if zero, then no bits here 85 or r2, r2, #7 @ if zero, then no bits here
84 add r2, r2, #1 @ align bit pointer 86 add r2, r2, #1 @ align bit pointer
85 b 2b @ loop for next bit 87 b 2b @ loop for next bit
86ENDPROC(__uc32_find_next_bit) 88ENDPROC(find_next_bit)
87 89
88/* 90/*
89 * One or more bits in the LSB of r3 are assumed to be set. 91 * One or more bits in the LSB of r3 are assumed to be set.
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index cb9a1044a77..efb42949cc0 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -390,7 +390,7 @@ config X86_INTEL_CE
390 This option compiles in support for the CE4100 SOC for settop 390 This option compiles in support for the CE4100 SOC for settop
391 boxes and media devices. 391 boxes and media devices.
392 392
393config X86_INTEL_MID 393config X86_WANT_INTEL_MID
394 bool "Intel MID platform support" 394 bool "Intel MID platform support"
395 depends on X86_32 395 depends on X86_32
396 depends on X86_EXTENDED_PLATFORM 396 depends on X86_EXTENDED_PLATFORM
@@ -399,7 +399,10 @@ config X86_INTEL_MID
399 systems which do not have the PCI legacy interfaces (Moorestown, 399 systems which do not have the PCI legacy interfaces (Moorestown,
400 Medfield). If you are building for a PC class system say N here. 400 Medfield). If you are building for a PC class system say N here.
401 401
402if X86_INTEL_MID 402if X86_WANT_INTEL_MID
403
404config X86_INTEL_MID
405 bool
403 406
404config X86_MRST 407config X86_MRST
405 bool "Moorestown MID platform" 408 bool "Moorestown MID platform"
@@ -411,6 +414,7 @@ config X86_MRST
411 select SPI 414 select SPI
412 select INTEL_SCU_IPC 415 select INTEL_SCU_IPC
413 select X86_PLATFORM_DEVICES 416 select X86_PLATFORM_DEVICES
417 select X86_INTEL_MID
414 ---help--- 418 ---help---
415 Moorestown is Intel's Low Power Intel Architecture (LPIA) based Moblin 419 Moorestown is Intel's Low Power Intel Architecture (LPIA) based Moblin
416 Internet Device(MID) platform. Moorestown consists of two chips: 420 Internet Device(MID) platform. Moorestown consists of two chips:
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 9b7273cb219..1a6c09af048 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -49,6 +49,7 @@ extern unsigned int apic_verbosity;
49extern int local_apic_timer_c2_ok; 49extern int local_apic_timer_c2_ok;
50 50
51extern int disable_apic; 51extern int disable_apic;
52extern unsigned int lapic_timer_frequency;
52 53
53#ifdef CONFIG_SMP 54#ifdef CONFIG_SMP
54extern void __inquire_remote_apic(int apicid); 55extern void __inquire_remote_apic(int apicid);
diff --git a/arch/x86/include/asm/intel_scu_ipc.h b/arch/x86/include/asm/intel_scu_ipc.h
index 4420993acc4..925b605eb5c 100644
--- a/arch/x86/include/asm/intel_scu_ipc.h
+++ b/arch/x86/include/asm/intel_scu_ipc.h
@@ -3,11 +3,15 @@
3 3
4#include <linux/notifier.h> 4#include <linux/notifier.h>
5 5
6#define IPCMSG_VRTC 0xFA /* Set vRTC device */ 6#define IPCMSG_WARM_RESET 0xF0
7 7#define IPCMSG_COLD_RESET 0xF1
8/* Command id associated with message IPCMSG_VRTC */ 8#define IPCMSG_SOFT_RESET 0xF2
9#define IPC_CMD_VRTC_SETTIME 1 /* Set time */ 9#define IPCMSG_COLD_BOOT 0xF3
10#define IPC_CMD_VRTC_SETALARM 2 /* Set alarm */ 10
11#define IPCMSG_VRTC 0xFA /* Set vRTC device */
12 /* Command id associated with message IPCMSG_VRTC */
13 #define IPC_CMD_VRTC_SETTIME 1 /* Set time */
14 #define IPC_CMD_VRTC_SETALARM 2 /* Set alarm */
11 15
12/* Read single register */ 16/* Read single register */
13int intel_scu_ipc_ioread8(u16 addr, u8 *data); 17int intel_scu_ipc_ioread8(u16 addr, u8 *data);
diff --git a/arch/x86/include/asm/mach_traps.h b/arch/x86/include/asm/mach_traps.h
index 72a8b52e7df..a01e7ec7d23 100644
--- a/arch/x86/include/asm/mach_traps.h
+++ b/arch/x86/include/asm/mach_traps.h
@@ -17,7 +17,7 @@
17#define NMI_REASON_CLEAR_IOCHK 0x08 17#define NMI_REASON_CLEAR_IOCHK 0x08
18#define NMI_REASON_CLEAR_MASK 0x0f 18#define NMI_REASON_CLEAR_MASK 0x0f
19 19
20static inline unsigned char get_nmi_reason(void) 20static inline unsigned char default_get_nmi_reason(void)
21{ 21{
22 return inb(NMI_REASON_PORT); 22 return inb(NMI_REASON_PORT);
23} 23}
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index c9321f34e55..0e8ae57d365 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -201,7 +201,10 @@ int mce_notify_irq(void);
201void mce_notify_process(void); 201void mce_notify_process(void);
202 202
203DECLARE_PER_CPU(struct mce, injectm); 203DECLARE_PER_CPU(struct mce, injectm);
204extern struct file_operations mce_chrdev_ops; 204
205extern void register_mce_write_callback(ssize_t (*)(struct file *filp,
206 const char __user *ubuf,
207 size_t usize, loff_t *off));
205 208
206/* 209/*
207 * Exception handler 210 * Exception handler
diff --git a/arch/x86/include/asm/mrst.h b/arch/x86/include/asm/mrst.h
index 719f00b28ff..93f79094c22 100644
--- a/arch/x86/include/asm/mrst.h
+++ b/arch/x86/include/asm/mrst.h
@@ -31,11 +31,20 @@ enum mrst_cpu_type {
31}; 31};
32 32
33extern enum mrst_cpu_type __mrst_cpu_chip; 33extern enum mrst_cpu_type __mrst_cpu_chip;
34
35#ifdef CONFIG_X86_INTEL_MID
36
34static inline enum mrst_cpu_type mrst_identify_cpu(void) 37static inline enum mrst_cpu_type mrst_identify_cpu(void)
35{ 38{
36 return __mrst_cpu_chip; 39 return __mrst_cpu_chip;
37} 40}
38 41
42#else /* !CONFIG_X86_INTEL_MID */
43
44#define mrst_identify_cpu() (0)
45
46#endif /* !CONFIG_X86_INTEL_MID */
47
39enum mrst_timer_options { 48enum mrst_timer_options {
40 MRST_TIMER_DEFAULT, 49 MRST_TIMER_DEFAULT,
41 MRST_TIMER_APBT_ONLY, 50 MRST_TIMER_APBT_ONLY,
@@ -44,6 +53,13 @@ enum mrst_timer_options {
44 53
45extern enum mrst_timer_options mrst_timer_options; 54extern enum mrst_timer_options mrst_timer_options;
46 55
56/*
57 * Penwell uses spread spectrum clock, so the freq number is not exactly
58 * the same as reported by MSR based on SDM.
59 */
60#define PENWELL_FSB_FREQ_83SKU 83200
61#define PENWELL_FSB_FREQ_100SKU 99840
62
47#define SFI_MTMR_MAX_NUM 8 63#define SFI_MTMR_MAX_NUM 8
48#define SFI_MRTC_MAX 8 64#define SFI_MRTC_MAX 8
49 65
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 084ef95274c..95203d40ffd 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -169,7 +169,14 @@ static inline int wrmsr_safe(unsigned msr, unsigned low, unsigned high)
169 return native_write_msr_safe(msr, low, high); 169 return native_write_msr_safe(msr, low, high);
170} 170}
171 171
172/* rdmsr with exception handling */ 172/*
173 * rdmsr with exception handling.
174 *
175 * Please note that the exception handling works only after we've
176 * switched to the "smart" #GP handler in trap_init() which knows about
177 * exception tables - using this macro earlier than that causes machine
178 * hangs on boxes which do not implement the @msr in the first argument.
179 */
173#define rdmsr_safe(msr, p1, p2) \ 180#define rdmsr_safe(msr, p1, p2) \
174({ \ 181({ \
175 int __err; \ 182 int __err; \
diff --git a/arch/x86/include/asm/system.h b/arch/x86/include/asm/system.h
index c2ff2a1d845..2d2f01ce6dc 100644
--- a/arch/x86/include/asm/system.h
+++ b/arch/x86/include/asm/system.h
@@ -401,6 +401,7 @@ extern unsigned long arch_align_stack(unsigned long sp);
401extern void free_init_pages(char *what, unsigned long begin, unsigned long end); 401extern void free_init_pages(char *what, unsigned long begin, unsigned long end);
402 402
403void default_idle(void); 403void default_idle(void);
404bool set_pm_idle_to_default(void);
404 405
405void stop_this_cpu(void *dummy); 406void stop_this_cpu(void *dummy);
406 407
diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h
index fa7b9176b76..431793e5d48 100644
--- a/arch/x86/include/asm/timer.h
+++ b/arch/x86/include/asm/timer.h
@@ -32,6 +32,22 @@ extern int no_timer_check;
32 * (mathieu.desnoyers@polymtl.ca) 32 * (mathieu.desnoyers@polymtl.ca)
33 * 33 *
34 * -johnstul@us.ibm.com "math is hard, lets go shopping!" 34 * -johnstul@us.ibm.com "math is hard, lets go shopping!"
35 *
36 * In:
37 *
38 * ns = cycles * cyc2ns_scale / SC
39 *
40 * Although we may still have enough bits to store the value of ns,
41 * in some cases, we may not have enough bits to store cycles * cyc2ns_scale,
42 * leading to an incorrect result.
43 *
44 * To avoid this, we can decompose 'cycles' into quotient and remainder
45 * of division by SC. Then,
46 *
47 * ns = (quot * SC + rem) * cyc2ns_scale / SC
48 * = quot * cyc2ns_scale + (rem * cyc2ns_scale) / SC
49 *
50 * - sqazi@google.com
35 */ 51 */
36 52
37DECLARE_PER_CPU(unsigned long, cyc2ns); 53DECLARE_PER_CPU(unsigned long, cyc2ns);
@@ -41,9 +57,14 @@ DECLARE_PER_CPU(unsigned long long, cyc2ns_offset);
41 57
42static inline unsigned long long __cycles_2_ns(unsigned long long cyc) 58static inline unsigned long long __cycles_2_ns(unsigned long long cyc)
43{ 59{
60 unsigned long long quot;
61 unsigned long long rem;
44 int cpu = smp_processor_id(); 62 int cpu = smp_processor_id();
45 unsigned long long ns = per_cpu(cyc2ns_offset, cpu); 63 unsigned long long ns = per_cpu(cyc2ns_offset, cpu);
46 ns += cyc * per_cpu(cyc2ns, cpu) >> CYC2NS_SCALE_FACTOR; 64 quot = (cyc >> CYC2NS_SCALE_FACTOR);
65 rem = cyc & ((1ULL << CYC2NS_SCALE_FACTOR) - 1);
66 ns += quot * per_cpu(cyc2ns, cpu) +
67 ((rem * per_cpu(cyc2ns, cpu)) >> CYC2NS_SCALE_FACTOR);
47 return ns; 68 return ns;
48} 69}
49 70
diff --git a/arch/x86/include/asm/uv/uv_mmrs.h b/arch/x86/include/asm/uv/uv_mmrs.h
index 10474fb1185..cf1d73643f6 100644
--- a/arch/x86/include/asm/uv/uv_mmrs.h
+++ b/arch/x86/include/asm/uv/uv_mmrs.h
@@ -57,6 +57,7 @@
57 57
58#define UV1_HUB_PART_NUMBER 0x88a5 58#define UV1_HUB_PART_NUMBER 0x88a5
59#define UV2_HUB_PART_NUMBER 0x8eb8 59#define UV2_HUB_PART_NUMBER 0x8eb8
60#define UV2_HUB_PART_NUMBER_X 0x1111
60 61
61/* Compat: if this #define is present, UV headers support UV2 */ 62/* Compat: if this #define is present, UV headers support UV2 */
62#define UV2_HUB_IS_SUPPORTED 1 63#define UV2_HUB_IS_SUPPORTED 1
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index d3d859035af..1971e652d24 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -152,6 +152,7 @@ struct x86_cpuinit_ops {
152/** 152/**
153 * struct x86_platform_ops - platform specific runtime functions 153 * struct x86_platform_ops - platform specific runtime functions
154 * @calibrate_tsc: calibrate TSC 154 * @calibrate_tsc: calibrate TSC
155 * @wallclock_init: init the wallclock device
155 * @get_wallclock: get time from HW clock like RTC etc. 156 * @get_wallclock: get time from HW clock like RTC etc.
156 * @set_wallclock: set time back to HW clock 157 * @set_wallclock: set time back to HW clock
157 * @is_untracked_pat_range exclude from PAT logic 158 * @is_untracked_pat_range exclude from PAT logic
@@ -160,11 +161,13 @@ struct x86_cpuinit_ops {
160 */ 161 */
161struct x86_platform_ops { 162struct x86_platform_ops {
162 unsigned long (*calibrate_tsc)(void); 163 unsigned long (*calibrate_tsc)(void);
164 void (*wallclock_init)(void);
163 unsigned long (*get_wallclock)(void); 165 unsigned long (*get_wallclock)(void);
164 int (*set_wallclock)(unsigned long nowtime); 166 int (*set_wallclock)(unsigned long nowtime);
165 void (*iommu_shutdown)(void); 167 void (*iommu_shutdown)(void);
166 bool (*is_untracked_pat_range)(u64 start, u64 end); 168 bool (*is_untracked_pat_range)(u64 start, u64 end);
167 void (*nmi_init)(void); 169 void (*nmi_init)(void);
170 unsigned char (*get_nmi_reason)(void);
168 int (*i8042_detect)(void); 171 int (*i8042_detect)(void);
169}; 172};
170 173
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index c6382281624..1f84794f075 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -738,5 +738,5 @@ void __kprobes text_poke_smp_batch(struct text_poke_param *params, int n)
738 738
739 atomic_set(&stop_machine_first, 1); 739 atomic_set(&stop_machine_first, 1);
740 wrote_text = 0; 740 wrote_text = 0;
741 __stop_machine(stop_machine_text_poke, (void *)&tpp, NULL); 741 __stop_machine(stop_machine_text_poke, (void *)&tpp, cpu_online_mask);
742} 742}
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index a2fd72e0ab3..f98d84caf94 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -186,7 +186,7 @@ static struct resource lapic_resource = {
186 .flags = IORESOURCE_MEM | IORESOURCE_BUSY, 186 .flags = IORESOURCE_MEM | IORESOURCE_BUSY,
187}; 187};
188 188
189static unsigned int calibration_result; 189unsigned int lapic_timer_frequency = 0;
190 190
191static void apic_pm_activate(void); 191static void apic_pm_activate(void);
192 192
@@ -454,7 +454,7 @@ static void lapic_timer_setup(enum clock_event_mode mode,
454 switch (mode) { 454 switch (mode) {
455 case CLOCK_EVT_MODE_PERIODIC: 455 case CLOCK_EVT_MODE_PERIODIC:
456 case CLOCK_EVT_MODE_ONESHOT: 456 case CLOCK_EVT_MODE_ONESHOT:
457 __setup_APIC_LVTT(calibration_result, 457 __setup_APIC_LVTT(lapic_timer_frequency,
458 mode != CLOCK_EVT_MODE_PERIODIC, 1); 458 mode != CLOCK_EVT_MODE_PERIODIC, 1);
459 break; 459 break;
460 case CLOCK_EVT_MODE_UNUSED: 460 case CLOCK_EVT_MODE_UNUSED:
@@ -638,6 +638,25 @@ static int __init calibrate_APIC_clock(void)
638 long delta, deltatsc; 638 long delta, deltatsc;
639 int pm_referenced = 0; 639 int pm_referenced = 0;
640 640
641 /**
642 * check if lapic timer has already been calibrated by platform
643 * specific routine, such as tsc calibration code. if so, we just fill
644 * in the clockevent structure and return.
645 */
646
647 if (lapic_timer_frequency) {
648 apic_printk(APIC_VERBOSE, "lapic timer already calibrated %d\n",
649 lapic_timer_frequency);
650 lapic_clockevent.mult = div_sc(lapic_timer_frequency/APIC_DIVISOR,
651 TICK_NSEC, lapic_clockevent.shift);
652 lapic_clockevent.max_delta_ns =
653 clockevent_delta2ns(0x7FFFFF, &lapic_clockevent);
654 lapic_clockevent.min_delta_ns =
655 clockevent_delta2ns(0xF, &lapic_clockevent);
656 lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY;
657 return 0;
658 }
659
641 local_irq_disable(); 660 local_irq_disable();
642 661
643 /* Replace the global interrupt handler */ 662 /* Replace the global interrupt handler */
@@ -679,12 +698,12 @@ static int __init calibrate_APIC_clock(void)
679 lapic_clockevent.min_delta_ns = 698 lapic_clockevent.min_delta_ns =
680 clockevent_delta2ns(0xF, &lapic_clockevent); 699 clockevent_delta2ns(0xF, &lapic_clockevent);
681 700
682 calibration_result = (delta * APIC_DIVISOR) / LAPIC_CAL_LOOPS; 701 lapic_timer_frequency = (delta * APIC_DIVISOR) / LAPIC_CAL_LOOPS;
683 702
684 apic_printk(APIC_VERBOSE, "..... delta %ld\n", delta); 703 apic_printk(APIC_VERBOSE, "..... delta %ld\n", delta);
685 apic_printk(APIC_VERBOSE, "..... mult: %u\n", lapic_clockevent.mult); 704 apic_printk(APIC_VERBOSE, "..... mult: %u\n", lapic_clockevent.mult);
686 apic_printk(APIC_VERBOSE, "..... calibration result: %u\n", 705 apic_printk(APIC_VERBOSE, "..... calibration result: %u\n",
687 calibration_result); 706 lapic_timer_frequency);
688 707
689 if (cpu_has_tsc) { 708 if (cpu_has_tsc) {
690 apic_printk(APIC_VERBOSE, "..... CPU clock speed is " 709 apic_printk(APIC_VERBOSE, "..... CPU clock speed is "
@@ -695,13 +714,13 @@ static int __init calibrate_APIC_clock(void)
695 714
696 apic_printk(APIC_VERBOSE, "..... host bus clock speed is " 715 apic_printk(APIC_VERBOSE, "..... host bus clock speed is "
697 "%u.%04u MHz.\n", 716 "%u.%04u MHz.\n",
698 calibration_result / (1000000 / HZ), 717 lapic_timer_frequency / (1000000 / HZ),
699 calibration_result % (1000000 / HZ)); 718 lapic_timer_frequency % (1000000 / HZ));
700 719
701 /* 720 /*
702 * Do a sanity check on the APIC calibration result 721 * Do a sanity check on the APIC calibration result
703 */ 722 */
704 if (calibration_result < (1000000 / HZ)) { 723 if (lapic_timer_frequency < (1000000 / HZ)) {
705 local_irq_enable(); 724 local_irq_enable();
706 pr_warning("APIC frequency too slow, disabling apic timer\n"); 725 pr_warning("APIC frequency too slow, disabling apic timer\n");
707 return -1; 726 return -1;
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 3c31fa98af6..6d939d7847e 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -193,10 +193,8 @@ int __init arch_early_irq_init(void)
193 struct irq_cfg *cfg; 193 struct irq_cfg *cfg;
194 int count, node, i; 194 int count, node, i;
195 195
196 if (!legacy_pic->nr_legacy_irqs) { 196 if (!legacy_pic->nr_legacy_irqs)
197 nr_irqs_gsi = 0;
198 io_apic_irqs = ~0UL; 197 io_apic_irqs = ~0UL;
199 }
200 198
201 for (i = 0; i < nr_ioapics; i++) { 199 for (i = 0; i < nr_ioapics; i++) {
202 ioapics[i].saved_registers = 200 ioapics[i].saved_registers =
@@ -1696,6 +1694,7 @@ __apicdebuginit(void) print_IO_APICs(void)
1696 int ioapic_idx; 1694 int ioapic_idx;
1697 struct irq_cfg *cfg; 1695 struct irq_cfg *cfg;
1698 unsigned int irq; 1696 unsigned int irq;
1697 struct irq_chip *chip;
1699 1698
1700 printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries); 1699 printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries);
1701 for (ioapic_idx = 0; ioapic_idx < nr_ioapics; ioapic_idx++) 1700 for (ioapic_idx = 0; ioapic_idx < nr_ioapics; ioapic_idx++)
@@ -1716,6 +1715,10 @@ __apicdebuginit(void) print_IO_APICs(void)
1716 for_each_active_irq(irq) { 1715 for_each_active_irq(irq) {
1717 struct irq_pin_list *entry; 1716 struct irq_pin_list *entry;
1718 1717
1718 chip = irq_get_chip(irq);
1719 if (chip != &ioapic_chip)
1720 continue;
1721
1719 cfg = irq_get_chip_data(irq); 1722 cfg = irq_get_chip_data(irq);
1720 if (!cfg) 1723 if (!cfg)
1721 continue; 1724 continue;
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 62ae3001ae0..9d59bbacd4e 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -93,6 +93,8 @@ static int __init early_get_pnodeid(void)
93 93
94 if (node_id.s.part_number == UV2_HUB_PART_NUMBER) 94 if (node_id.s.part_number == UV2_HUB_PART_NUMBER)
95 uv_min_hub_revision_id += UV2_HUB_REVISION_BASE - 1; 95 uv_min_hub_revision_id += UV2_HUB_REVISION_BASE - 1;
96 if (node_id.s.part_number == UV2_HUB_PART_NUMBER_X)
97 uv_min_hub_revision_id += UV2_HUB_REVISION_BASE - 1;
96 98
97 uv_hub_info->hub_revision = uv_min_hub_revision_id; 99 uv_hub_info->hub_revision = uv_min_hub_revision_id;
98 pnode = (node_id.s.node_id >> 1) & ((1 << m_n_config.s.n_skt) - 1); 100 pnode = (node_id.s.node_id >> 1) & ((1 << m_n_config.s.n_skt) - 1);
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index c7e46cb3532..0bab2b18bb2 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -442,8 +442,6 @@ static void __cpuinit bsp_init_amd(struct cpuinfo_x86 *c)
442 442
443static void __cpuinit early_init_amd(struct cpuinfo_x86 *c) 443static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
444{ 444{
445 u32 dummy;
446
447 early_init_amd_mc(c); 445 early_init_amd_mc(c);
448 446
449 /* 447 /*
@@ -473,12 +471,12 @@ static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
473 set_cpu_cap(c, X86_FEATURE_EXTD_APICID); 471 set_cpu_cap(c, X86_FEATURE_EXTD_APICID);
474 } 472 }
475#endif 473#endif
476
477 rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);
478} 474}
479 475
480static void __cpuinit init_amd(struct cpuinfo_x86 *c) 476static void __cpuinit init_amd(struct cpuinfo_x86 *c)
481{ 477{
478 u32 dummy;
479
482#ifdef CONFIG_SMP 480#ifdef CONFIG_SMP
483 unsigned long long value; 481 unsigned long long value;
484 482
@@ -657,6 +655,8 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
657 checking_wrmsrl(MSR_AMD64_MCx_MASK(4), mask); 655 checking_wrmsrl(MSR_AMD64_MCx_MASK(4), mask);
658 } 656 }
659 } 657 }
658
659 rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);
660} 660}
661 661
662#ifdef CONFIG_X86_32 662#ifdef CONFIG_X86_32
diff --git a/arch/x86/kernel/cpu/mcheck/mce-inject.c b/arch/x86/kernel/cpu/mcheck/mce-inject.c
index 6199232161c..319882ef848 100644
--- a/arch/x86/kernel/cpu/mcheck/mce-inject.c
+++ b/arch/x86/kernel/cpu/mcheck/mce-inject.c
@@ -208,7 +208,7 @@ static int inject_init(void)
208 if (!alloc_cpumask_var(&mce_inject_cpumask, GFP_KERNEL)) 208 if (!alloc_cpumask_var(&mce_inject_cpumask, GFP_KERNEL))
209 return -ENOMEM; 209 return -ENOMEM;
210 printk(KERN_INFO "Machine check injector initialized\n"); 210 printk(KERN_INFO "Machine check injector initialized\n");
211 mce_chrdev_ops.write = mce_write; 211 register_mce_write_callback(mce_write);
212 register_nmi_handler(NMI_LOCAL, mce_raise_notify, 0, 212 register_nmi_handler(NMI_LOCAL, mce_raise_notify, 0,
213 "mce_notify"); 213 "mce_notify");
214 return 0; 214 return 0;
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 362056aefeb..2af127d4c3d 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1634,16 +1634,35 @@ static long mce_chrdev_ioctl(struct file *f, unsigned int cmd,
1634 } 1634 }
1635} 1635}
1636 1636
1637/* Modified in mce-inject.c, so not static or const */ 1637static ssize_t (*mce_write)(struct file *filp, const char __user *ubuf,
1638struct file_operations mce_chrdev_ops = { 1638 size_t usize, loff_t *off);
1639
1640void register_mce_write_callback(ssize_t (*fn)(struct file *filp,
1641 const char __user *ubuf,
1642 size_t usize, loff_t *off))
1643{
1644 mce_write = fn;
1645}
1646EXPORT_SYMBOL_GPL(register_mce_write_callback);
1647
1648ssize_t mce_chrdev_write(struct file *filp, const char __user *ubuf,
1649 size_t usize, loff_t *off)
1650{
1651 if (mce_write)
1652 return mce_write(filp, ubuf, usize, off);
1653 else
1654 return -EINVAL;
1655}
1656
1657static const struct file_operations mce_chrdev_ops = {
1639 .open = mce_chrdev_open, 1658 .open = mce_chrdev_open,
1640 .release = mce_chrdev_release, 1659 .release = mce_chrdev_release,
1641 .read = mce_chrdev_read, 1660 .read = mce_chrdev_read,
1661 .write = mce_chrdev_write,
1642 .poll = mce_chrdev_poll, 1662 .poll = mce_chrdev_poll,
1643 .unlocked_ioctl = mce_chrdev_ioctl, 1663 .unlocked_ioctl = mce_chrdev_ioctl,
1644 .llseek = no_llseek, 1664 .llseek = no_llseek,
1645}; 1665};
1646EXPORT_SYMBOL_GPL(mce_chrdev_ops);
1647 1666
1648static struct miscdevice mce_chrdev_device = { 1667static struct miscdevice mce_chrdev_device = {
1649 MISC_MCELOG_MINOR, 1668 MISC_MCELOG_MINOR,
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c
index a71efcdbb09..97b26356e9e 100644
--- a/arch/x86/kernel/cpu/mtrr/generic.c
+++ b/arch/x86/kernel/cpu/mtrr/generic.c
@@ -547,6 +547,7 @@ static void generic_get_mtrr(unsigned int reg, unsigned long *base,
547 547
548 if (tmp != mask_lo) { 548 if (tmp != mask_lo) {
549 printk(KERN_WARNING "mtrr: your BIOS has configured an incorrect mask, fixing it.\n"); 549 printk(KERN_WARNING "mtrr: your BIOS has configured an incorrect mask, fixing it.\n");
550 add_taint(TAINT_FIRMWARE_WORKAROUND);
550 mask_lo = tmp; 551 mask_lo = tmp;
551 } 552 }
552 } 553 }
@@ -693,6 +694,7 @@ static void prepare_set(void) __acquires(set_atomicity_lock)
693 694
694 /* Disable MTRRs, and set the default type to uncached */ 695 /* Disable MTRRs, and set the default type to uncached */
695 mtrr_wrmsr(MSR_MTRRdefType, deftype_lo & ~0xcff, deftype_hi); 696 mtrr_wrmsr(MSR_MTRRdefType, deftype_lo & ~0xcff, deftype_hi);
697 wbinvd();
696} 698}
697 699
698static void post_set(void) __releases(set_atomicity_lock) 700static void post_set(void) __releases(set_atomicity_lock)
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 640891014b2..2bda212a001 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -312,12 +312,8 @@ int x86_setup_perfctr(struct perf_event *event)
312 return -EOPNOTSUPP; 312 return -EOPNOTSUPP;
313 } 313 }
314 314
315 /*
316 * Do not allow config1 (extended registers) to propagate,
317 * there's no sane user-space generalization yet:
318 */
319 if (attr->type == PERF_TYPE_RAW) 315 if (attr->type == PERF_TYPE_RAW)
320 return 0; 316 return x86_pmu_extra_regs(event->attr.config, event);
321 317
322 if (attr->type == PERF_TYPE_HW_CACHE) 318 if (attr->type == PERF_TYPE_HW_CACHE)
323 return set_ext_hw_attr(hwc, event); 319 return set_ext_hw_attr(hwc, event);
@@ -588,7 +584,7 @@ done:
588 x86_pmu.put_event_constraints(cpuc, cpuc->event_list[i]); 584 x86_pmu.put_event_constraints(cpuc, cpuc->event_list[i]);
589 } 585 }
590 } 586 }
591 return num ? -ENOSPC : 0; 587 return num ? -EINVAL : 0;
592} 588}
593 589
594/* 590/*
@@ -607,7 +603,7 @@ static int collect_events(struct cpu_hw_events *cpuc, struct perf_event *leader,
607 603
608 if (is_x86_event(leader)) { 604 if (is_x86_event(leader)) {
609 if (n >= max_count) 605 if (n >= max_count)
610 return -ENOSPC; 606 return -EINVAL;
611 cpuc->event_list[n] = leader; 607 cpuc->event_list[n] = leader;
612 n++; 608 n++;
613 } 609 }
@@ -620,7 +616,7 @@ static int collect_events(struct cpu_hw_events *cpuc, struct perf_event *leader,
620 continue; 616 continue;
621 617
622 if (n >= max_count) 618 if (n >= max_count)
623 return -ENOSPC; 619 return -EINVAL;
624 620
625 cpuc->event_list[n] = event; 621 cpuc->event_list[n] = event;
626 n++; 622 n++;
@@ -1316,7 +1312,7 @@ static int validate_event(struct perf_event *event)
1316 c = x86_pmu.get_event_constraints(fake_cpuc, event); 1312 c = x86_pmu.get_event_constraints(fake_cpuc, event);
1317 1313
1318 if (!c || !c->weight) 1314 if (!c || !c->weight)
1319 ret = -ENOSPC; 1315 ret = -EINVAL;
1320 1316
1321 if (x86_pmu.put_event_constraints) 1317 if (x86_pmu.put_event_constraints)
1322 x86_pmu.put_event_constraints(fake_cpuc, event); 1318 x86_pmu.put_event_constraints(fake_cpuc, event);
@@ -1341,7 +1337,7 @@ static int validate_group(struct perf_event *event)
1341{ 1337{
1342 struct perf_event *leader = event->group_leader; 1338 struct perf_event *leader = event->group_leader;
1343 struct cpu_hw_events *fake_cpuc; 1339 struct cpu_hw_events *fake_cpuc;
1344 int ret = -ENOSPC, n; 1340 int ret = -EINVAL, n;
1345 1341
1346 fake_cpuc = allocate_fake_cpuc(); 1342 fake_cpuc = allocate_fake_cpuc();
1347 if (IS_ERR(fake_cpuc)) 1343 if (IS_ERR(fake_cpuc))
diff --git a/arch/x86/kernel/cpu/perf_event_amd_ibs.c b/arch/x86/kernel/cpu/perf_event_amd_ibs.c
index ab6343d2182..3b8a2d30d14 100644
--- a/arch/x86/kernel/cpu/perf_event_amd_ibs.c
+++ b/arch/x86/kernel/cpu/perf_event_amd_ibs.c
@@ -199,8 +199,7 @@ static int force_ibs_eilvt_setup(void)
199 goto out; 199 goto out;
200 } 200 }
201 201
202 pr_err(FW_BUG "using offset %d for IBS interrupts\n", offset); 202 pr_info("IBS: LVT offset %d assigned\n", offset);
203 pr_err(FW_BUG "workaround enabled for IBS LVT offset\n");
204 203
205 return 0; 204 return 0;
206out: 205out:
@@ -265,19 +264,23 @@ perf_ibs_cpu_notifier(struct notifier_block *self, unsigned long action, void *h
265static __init int amd_ibs_init(void) 264static __init int amd_ibs_init(void)
266{ 265{
267 u32 caps; 266 u32 caps;
268 int ret; 267 int ret = -EINVAL;
269 268
270 caps = __get_ibs_caps(); 269 caps = __get_ibs_caps();
271 if (!caps) 270 if (!caps)
272 return -ENODEV; /* ibs not supported by the cpu */ 271 return -ENODEV; /* ibs not supported by the cpu */
273 272
274 if (!ibs_eilvt_valid()) { 273 /*
275 ret = force_ibs_eilvt_setup(); 274 * Force LVT offset assignment for family 10h: The offsets are
276 if (ret) { 275 * not assigned by the BIOS for this family, so the OS is
277 pr_err("Failed to setup IBS, %d\n", ret); 276 * responsible for doing it. If the OS assignment fails, fall
278 return ret; 277 * back to BIOS settings and try to setup this.
279 } 278 */
280 } 279 if (boot_cpu_data.x86 == 0x10)
280 force_ibs_eilvt_setup();
281
282 if (!ibs_eilvt_valid())
283 goto out;
281 284
282 get_online_cpus(); 285 get_online_cpus();
283 ibs_caps = caps; 286 ibs_caps = caps;
@@ -287,7 +290,11 @@ static __init int amd_ibs_init(void)
287 smp_call_function(setup_APIC_ibs, NULL, 1); 290 smp_call_function(setup_APIC_ibs, NULL, 1);
288 put_online_cpus(); 291 put_online_cpus();
289 292
290 return perf_event_ibs_init(); 293 ret = perf_event_ibs_init();
294out:
295 if (ret)
296 pr_err("Failed to setup IBS, %d\n", ret);
297 return ret;
291} 298}
292 299
293/* Since we need the pci subsystem to init ibs we can't do this earlier: */ 300/* Since we need the pci subsystem to init ibs we can't do this earlier: */
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 2be5ebe9987..8d601b18bf9 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1545,6 +1545,13 @@ static void intel_clovertown_quirks(void)
1545 x86_pmu.pebs_constraints = NULL; 1545 x86_pmu.pebs_constraints = NULL;
1546} 1546}
1547 1547
1548static void intel_sandybridge_quirks(void)
1549{
1550 printk(KERN_WARNING "PEBS disabled due to CPU errata.\n");
1551 x86_pmu.pebs = 0;
1552 x86_pmu.pebs_constraints = NULL;
1553}
1554
1548__init int intel_pmu_init(void) 1555__init int intel_pmu_init(void)
1549{ 1556{
1550 union cpuid10_edx edx; 1557 union cpuid10_edx edx;
@@ -1694,6 +1701,7 @@ __init int intel_pmu_init(void)
1694 break; 1701 break;
1695 1702
1696 case 42: /* SandyBridge */ 1703 case 42: /* SandyBridge */
1704 x86_pmu.quirks = intel_sandybridge_quirks;
1697 case 45: /* SandyBridge, "Romely-EP" */ 1705 case 45: /* SandyBridge, "Romely-EP" */
1698 memcpy(hw_cache_event_ids, snb_hw_cache_event_ids, 1706 memcpy(hw_cache_event_ids, snb_hw_cache_event_ids,
1699 sizeof(hw_cache_event_ids)); 1707 sizeof(hw_cache_event_ids));
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
index c0d238f49db..73da6b64f5b 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -493,6 +493,7 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
493 unsigned long from = cpuc->lbr_entries[0].from; 493 unsigned long from = cpuc->lbr_entries[0].from;
494 unsigned long old_to, to = cpuc->lbr_entries[0].to; 494 unsigned long old_to, to = cpuc->lbr_entries[0].to;
495 unsigned long ip = regs->ip; 495 unsigned long ip = regs->ip;
496 int is_64bit = 0;
496 497
497 /* 498 /*
498 * We don't need to fixup if the PEBS assist is fault like 499 * We don't need to fixup if the PEBS assist is fault like
@@ -544,7 +545,10 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
544 } else 545 } else
545 kaddr = (void *)to; 546 kaddr = (void *)to;
546 547
547 kernel_insn_init(&insn, kaddr); 548#ifdef CONFIG_X86_64
549 is_64bit = kernel_ip(to) || !test_thread_flag(TIF_IA32);
550#endif
551 insn_init(&insn, kaddr, is_64bit);
548 insn_get_length(&insn); 552 insn_get_length(&insn);
549 to += insn.length; 553 to += insn.length;
550 } while (to < ip); 554 } while (to < ip);
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index 492bf1358a7..ef484d9d0a2 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -1268,7 +1268,7 @@ reserve:
1268 } 1268 }
1269 1269
1270done: 1270done:
1271 return num ? -ENOSPC : 0; 1271 return num ? -EINVAL : 0;
1272} 1272}
1273 1273
1274static __initconst const struct x86_pmu p4_pmu = { 1274static __initconst const struct x86_pmu p4_pmu = {
diff --git a/arch/x86/kernel/dumpstack_32.c b/arch/x86/kernel/dumpstack_32.c
index 3b97a80ce32..c99f9ed013d 100644
--- a/arch/x86/kernel/dumpstack_32.c
+++ b/arch/x86/kernel/dumpstack_32.c
@@ -116,16 +116,16 @@ void show_registers(struct pt_regs *regs)
116 for (i = 0; i < code_len; i++, ip++) { 116 for (i = 0; i < code_len; i++, ip++) {
117 if (ip < (u8 *)PAGE_OFFSET || 117 if (ip < (u8 *)PAGE_OFFSET ||
118 probe_kernel_address(ip, c)) { 118 probe_kernel_address(ip, c)) {
119 printk(" Bad EIP value."); 119 printk(KERN_CONT " Bad EIP value.");
120 break; 120 break;
121 } 121 }
122 if (ip == (u8 *)regs->ip) 122 if (ip == (u8 *)regs->ip)
123 printk("<%02x> ", c); 123 printk(KERN_CONT "<%02x> ", c);
124 else 124 else
125 printk("%02x ", c); 125 printk(KERN_CONT "%02x ", c);
126 } 126 }
127 } 127 }
128 printk("\n"); 128 printk(KERN_CONT "\n");
129} 129}
130 130
131int is_valid_bugaddr(unsigned long ip) 131int is_valid_bugaddr(unsigned long ip)
diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c
index 19853ad8afc..6d728d9284b 100644
--- a/arch/x86/kernel/dumpstack_64.c
+++ b/arch/x86/kernel/dumpstack_64.c
@@ -284,16 +284,16 @@ void show_registers(struct pt_regs *regs)
284 for (i = 0; i < code_len; i++, ip++) { 284 for (i = 0; i < code_len; i++, ip++) {
285 if (ip < (u8 *)PAGE_OFFSET || 285 if (ip < (u8 *)PAGE_OFFSET ||
286 probe_kernel_address(ip, c)) { 286 probe_kernel_address(ip, c)) {
287 printk(" Bad RIP value."); 287 printk(KERN_CONT " Bad RIP value.");
288 break; 288 break;
289 } 289 }
290 if (ip == (u8 *)regs->ip) 290 if (ip == (u8 *)regs->ip)
291 printk("<%02x> ", c); 291 printk(KERN_CONT "<%02x> ", c);
292 else 292 else
293 printk("%02x ", c); 293 printk(KERN_CONT "%02x ", c);
294 } 294 }
295 } 295 }
296 printk("\n"); 296 printk(KERN_CONT "\n");
297} 297}
298 298
299int is_valid_bugaddr(unsigned long ip) 299int is_valid_bugaddr(unsigned long ip)
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index b946a9eac7d..1bb0bf4d92c 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -1049,6 +1049,14 @@ int hpet_rtc_timer_init(void)
1049} 1049}
1050EXPORT_SYMBOL_GPL(hpet_rtc_timer_init); 1050EXPORT_SYMBOL_GPL(hpet_rtc_timer_init);
1051 1051
1052static void hpet_disable_rtc_channel(void)
1053{
1054 unsigned long cfg;
1055 cfg = hpet_readl(HPET_T1_CFG);
1056 cfg &= ~HPET_TN_ENABLE;
1057 hpet_writel(cfg, HPET_T1_CFG);
1058}
1059
1052/* 1060/*
1053 * The functions below are called from rtc driver. 1061 * The functions below are called from rtc driver.
1054 * Return 0 if HPET is not being used. 1062 * Return 0 if HPET is not being used.
@@ -1060,6 +1068,9 @@ int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
1060 return 0; 1068 return 0;
1061 1069
1062 hpet_rtc_flags &= ~bit_mask; 1070 hpet_rtc_flags &= ~bit_mask;
1071 if (unlikely(!hpet_rtc_flags))
1072 hpet_disable_rtc_channel();
1073
1063 return 1; 1074 return 1;
1064} 1075}
1065EXPORT_SYMBOL_GPL(hpet_mask_rtc_irq_bit); 1076EXPORT_SYMBOL_GPL(hpet_mask_rtc_irq_bit);
@@ -1125,15 +1136,11 @@ EXPORT_SYMBOL_GPL(hpet_rtc_dropped_irq);
1125 1136
1126static void hpet_rtc_timer_reinit(void) 1137static void hpet_rtc_timer_reinit(void)
1127{ 1138{
1128 unsigned int cfg, delta; 1139 unsigned int delta;
1129 int lost_ints = -1; 1140 int lost_ints = -1;
1130 1141
1131 if (unlikely(!hpet_rtc_flags)) { 1142 if (unlikely(!hpet_rtc_flags))
1132 cfg = hpet_readl(HPET_T1_CFG); 1143 hpet_disable_rtc_channel();
1133 cfg &= ~HPET_TN_ENABLE;
1134 hpet_writel(cfg, HPET_T1_CFG);
1135 return;
1136 }
1137 1144
1138 if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit) 1145 if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
1139 delta = hpet_default_delta; 1146 delta = hpet_default_delta;
diff --git a/arch/x86/kernel/irq_64.c b/arch/x86/kernel/irq_64.c
index acf8fbf8fbd..69bca468c47 100644
--- a/arch/x86/kernel/irq_64.c
+++ b/arch/x86/kernel/irq_64.c
@@ -38,6 +38,9 @@ static inline void stack_overflow_check(struct pt_regs *regs)
38#ifdef CONFIG_DEBUG_STACKOVERFLOW 38#ifdef CONFIG_DEBUG_STACKOVERFLOW
39 u64 curbase = (u64)task_stack_page(current); 39 u64 curbase = (u64)task_stack_page(current);
40 40
41 if (user_mode_vm(regs))
42 return;
43
41 WARN_ONCE(regs->sp >= curbase && 44 WARN_ONCE(regs->sp >= curbase &&
42 regs->sp <= curbase + THREAD_SIZE && 45 regs->sp <= curbase + THREAD_SIZE &&
43 regs->sp < curbase + sizeof(struct thread_info) + 46 regs->sp < curbase + sizeof(struct thread_info) +
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c
index c1a0188e29a..44842d756b2 100644
--- a/arch/x86/kernel/kvmclock.c
+++ b/arch/x86/kernel/kvmclock.c
@@ -74,9 +74,10 @@ static cycle_t kvm_clock_read(void)
74 struct pvclock_vcpu_time_info *src; 74 struct pvclock_vcpu_time_info *src;
75 cycle_t ret; 75 cycle_t ret;
76 76
77 src = &get_cpu_var(hv_clock); 77 preempt_disable_notrace();
78 src = &__get_cpu_var(hv_clock);
78 ret = pvclock_clocksource_read(src); 79 ret = pvclock_clocksource_read(src);
79 put_cpu_var(hv_clock); 80 preempt_enable_notrace();
80 return ret; 81 return ret;
81} 82}
82 83
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index f2d2a664e79..9d46f5e43b5 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -256,7 +256,7 @@ static int __init microcode_dev_init(void)
256 return 0; 256 return 0;
257} 257}
258 258
259static void microcode_dev_exit(void) 259static void __exit microcode_dev_exit(void)
260{ 260{
261 misc_deregister(&microcode_dev); 261 misc_deregister(&microcode_dev);
262} 262}
@@ -519,10 +519,8 @@ static int __init microcode_init(void)
519 519
520 microcode_pdev = platform_device_register_simple("microcode", -1, 520 microcode_pdev = platform_device_register_simple("microcode", -1,
521 NULL, 0); 521 NULL, 0);
522 if (IS_ERR(microcode_pdev)) { 522 if (IS_ERR(microcode_pdev))
523 microcode_dev_exit();
524 return PTR_ERR(microcode_pdev); 523 return PTR_ERR(microcode_pdev);
525 }
526 524
527 get_online_cpus(); 525 get_online_cpus();
528 mutex_lock(&microcode_mutex); 526 mutex_lock(&microcode_mutex);
@@ -532,14 +530,12 @@ static int __init microcode_init(void)
532 mutex_unlock(&microcode_mutex); 530 mutex_unlock(&microcode_mutex);
533 put_online_cpus(); 531 put_online_cpus();
534 532
535 if (error) { 533 if (error)
536 platform_device_unregister(microcode_pdev); 534 goto out_pdev;
537 return error;
538 }
539 535
540 error = microcode_dev_init(); 536 error = microcode_dev_init();
541 if (error) 537 if (error)
542 return error; 538 goto out_sysdev_driver;
543 539
544 register_syscore_ops(&mc_syscore_ops); 540 register_syscore_ops(&mc_syscore_ops);
545 register_hotcpu_notifier(&mc_cpu_notifier); 541 register_hotcpu_notifier(&mc_cpu_notifier);
@@ -548,6 +544,20 @@ static int __init microcode_init(void)
548 " <tigran@aivazian.fsnet.co.uk>, Peter Oruba\n"); 544 " <tigran@aivazian.fsnet.co.uk>, Peter Oruba\n");
549 545
550 return 0; 546 return 0;
547
548out_sysdev_driver:
549 get_online_cpus();
550 mutex_lock(&microcode_mutex);
551
552 sysdev_driver_unregister(&cpu_sysdev_class, &mc_sysdev_driver);
553
554 mutex_unlock(&microcode_mutex);
555 put_online_cpus();
556
557out_pdev:
558 platform_device_unregister(microcode_pdev);
559 return error;
560
551} 561}
552module_init(microcode_init); 562module_init(microcode_init);
553 563
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c
index 9103b89c145..0741b062a30 100644
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -95,8 +95,8 @@ static void __init MP_bus_info(struct mpc_bus *m)
95 } 95 }
96#endif 96#endif
97 97
98 set_bit(m->busid, mp_bus_not_pci);
98 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) { 99 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
99 set_bit(m->busid, mp_bus_not_pci);
100#if defined(CONFIG_EISA) || defined(CONFIG_MCA) 100#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
101 mp_bus_id_to_type[m->busid] = MP_BUS_ISA; 101 mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
102#endif 102#endif
diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c
index b9c8628974a..e88f37b58dd 100644
--- a/arch/x86/kernel/nmi.c
+++ b/arch/x86/kernel/nmi.c
@@ -29,6 +29,7 @@
29#include <asm/traps.h> 29#include <asm/traps.h>
30#include <asm/mach_traps.h> 30#include <asm/mach_traps.h>
31#include <asm/nmi.h> 31#include <asm/nmi.h>
32#include <asm/x86_init.h>
32 33
33#define NMI_MAX_NAMELEN 16 34#define NMI_MAX_NAMELEN 16
34struct nmiaction { 35struct nmiaction {
@@ -348,7 +349,7 @@ static notrace __kprobes void default_do_nmi(struct pt_regs *regs)
348 349
349 /* Non-CPU-specific NMI: NMI sources can be processed on any CPU */ 350 /* Non-CPU-specific NMI: NMI sources can be processed on any CPU */
350 raw_spin_lock(&nmi_reason_lock); 351 raw_spin_lock(&nmi_reason_lock);
351 reason = get_nmi_reason(); 352 reason = x86_platform.get_nmi_reason();
352 353
353 if (reason & NMI_REASON_MASK) { 354 if (reason & NMI_REASON_MASK) {
354 if (reason & NMI_REASON_SERR) 355 if (reason & NMI_REASON_SERR)
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index b9b3b1a5164..ee5d4fbd53b 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -403,6 +403,14 @@ void default_idle(void)
403EXPORT_SYMBOL(default_idle); 403EXPORT_SYMBOL(default_idle);
404#endif 404#endif
405 405
406bool set_pm_idle_to_default(void)
407{
408 bool ret = !!pm_idle;
409
410 pm_idle = default_idle;
411
412 return ret;
413}
406void stop_this_cpu(void *dummy) 414void stop_this_cpu(void *dummy)
407{ 415{
408 local_irq_disable(); 416 local_irq_disable();
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c
index b78643d0f9a..03920a15a63 100644
--- a/arch/x86/kernel/quirks.c
+++ b/arch/x86/kernel/quirks.c
@@ -553,4 +553,17 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC,
553 quirk_amd_nb_node); 553 quirk_amd_nb_node);
554DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_LINK, 554DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_LINK,
555 quirk_amd_nb_node); 555 quirk_amd_nb_node);
556DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F0,
557 quirk_amd_nb_node);
558DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F1,
559 quirk_amd_nb_node);
560DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F2,
561 quirk_amd_nb_node);
562DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F3,
563 quirk_amd_nb_node);
564DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F4,
565 quirk_amd_nb_node);
566DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F5,
567 quirk_amd_nb_node);
568
556#endif 569#endif
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index e334be1182b..37a458b521a 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -124,7 +124,7 @@ __setup("reboot=", reboot_setup);
124 */ 124 */
125 125
126/* 126/*
127 * Some machines require the "reboot=b" commandline option, 127 * Some machines require the "reboot=b" or "reboot=k" commandline options,
128 * this quirk makes that automatic. 128 * this quirk makes that automatic.
129 */ 129 */
130static int __init set_bios_reboot(const struct dmi_system_id *d) 130static int __init set_bios_reboot(const struct dmi_system_id *d)
@@ -136,6 +136,15 @@ static int __init set_bios_reboot(const struct dmi_system_id *d)
136 return 0; 136 return 0;
137} 137}
138 138
139static int __init set_kbd_reboot(const struct dmi_system_id *d)
140{
141 if (reboot_type != BOOT_KBD) {
142 reboot_type = BOOT_KBD;
143 printk(KERN_INFO "%s series board detected. Selecting KBD-method for reboot.\n", d->ident);
144 }
145 return 0;
146}
147
139static struct dmi_system_id __initdata reboot_dmi_table[] = { 148static struct dmi_system_id __initdata reboot_dmi_table[] = {
140 { /* Handle problems with rebooting on Dell E520's */ 149 { /* Handle problems with rebooting on Dell E520's */
141 .callback = set_bios_reboot, 150 .callback = set_bios_reboot,
@@ -295,7 +304,7 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {
295 }, 304 },
296 }, 305 },
297 { /* Handle reboot issue on Acer Aspire one */ 306 { /* Handle reboot issue on Acer Aspire one */
298 .callback = set_bios_reboot, 307 .callback = set_kbd_reboot,
299 .ident = "Acer Aspire One A110", 308 .ident = "Acer Aspire One A110",
300 .matches = { 309 .matches = {
301 DMI_MATCH(DMI_SYS_VENDOR, "Acer"), 310 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
@@ -443,6 +452,14 @@ static struct dmi_system_id __initdata pci_reboot_dmi_table[] = {
443 DMI_MATCH(DMI_PRODUCT_NAME, "Latitude E6420"), 452 DMI_MATCH(DMI_PRODUCT_NAME, "Latitude E6420"),
444 }, 453 },
445 }, 454 },
455 { /* Handle problems with rebooting on the OptiPlex 990. */
456 .callback = set_pci_reboot,
457 .ident = "Dell OptiPlex 990",
458 .matches = {
459 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
460 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 990"),
461 },
462 },
446 { } 463 { }
447}; 464};
448 465
diff --git a/arch/x86/kernel/rtc.c b/arch/x86/kernel/rtc.c
index 348ce016a83..af6db6ec5b2 100644
--- a/arch/x86/kernel/rtc.c
+++ b/arch/x86/kernel/rtc.c
@@ -12,6 +12,7 @@
12#include <asm/vsyscall.h> 12#include <asm/vsyscall.h>
13#include <asm/x86_init.h> 13#include <asm/x86_init.h>
14#include <asm/time.h> 14#include <asm/time.h>
15#include <asm/mrst.h>
15 16
16#ifdef CONFIG_X86_32 17#ifdef CONFIG_X86_32
17/* 18/*
@@ -242,6 +243,10 @@ static __init int add_rtc_cmos(void)
242 if (of_have_populated_dt()) 243 if (of_have_populated_dt())
243 return 0; 244 return 0;
244 245
246 /* Intel MID platforms don't have ioport rtc */
247 if (mrst_identify_cpu())
248 return -ENODEV;
249
245 platform_device_register(&rtc_device); 250 platform_device_register(&rtc_device);
246 dev_info(&rtc_device.dev, 251 dev_info(&rtc_device.dev,
247 "registered platform RTC device (no PNP device found)\n"); 252 "registered platform RTC device (no PNP device found)\n");
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index afaf38447ef..cf0ef986cb6 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -1045,6 +1045,8 @@ void __init setup_arch(char **cmdline_p)
1045 1045
1046 x86_init.timers.wallclock_init(); 1046 x86_init.timers.wallclock_init();
1047 1047
1048 x86_platform.wallclock_init();
1049
1048 mcheck_init(); 1050 mcheck_init();
1049 1051
1050 arch_init_ideal_nops(); 1052 arch_init_ideal_nops();
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index 6f164bd5e14..c1d6cd54939 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -21,12 +21,14 @@
21#include <asm/pat.h> 21#include <asm/pat.h>
22#include <asm/tsc.h> 22#include <asm/tsc.h>
23#include <asm/iommu.h> 23#include <asm/iommu.h>
24#include <asm/mach_traps.h>
24 25
25void __cpuinit x86_init_noop(void) { } 26void __cpuinit x86_init_noop(void) { }
26void __init x86_init_uint_noop(unsigned int unused) { } 27void __init x86_init_uint_noop(unsigned int unused) { }
27void __init x86_init_pgd_noop(pgd_t *unused) { } 28void __init x86_init_pgd_noop(pgd_t *unused) { }
28int __init iommu_init_noop(void) { return 0; } 29int __init iommu_init_noop(void) { return 0; }
29void iommu_shutdown_noop(void) { } 30void iommu_shutdown_noop(void) { }
31void wallclock_init_noop(void) { }
30 32
31/* 33/*
32 * The platform setup functions are preset with the default functions 34 * The platform setup functions are preset with the default functions
@@ -97,11 +99,13 @@ static int default_i8042_detect(void) { return 1; };
97 99
98struct x86_platform_ops x86_platform = { 100struct x86_platform_ops x86_platform = {
99 .calibrate_tsc = native_calibrate_tsc, 101 .calibrate_tsc = native_calibrate_tsc,
102 .wallclock_init = wallclock_init_noop,
100 .get_wallclock = mach_get_cmos_time, 103 .get_wallclock = mach_get_cmos_time,
101 .set_wallclock = mach_set_rtc_mmss, 104 .set_wallclock = mach_set_rtc_mmss,
102 .iommu_shutdown = iommu_shutdown_noop, 105 .iommu_shutdown = iommu_shutdown_noop,
103 .is_untracked_pat_range = is_ISA_range, 106 .is_untracked_pat_range = is_ISA_range,
104 .nmi_init = default_nmi_init, 107 .nmi_init = default_nmi_init,
108 .get_nmi_reason = default_get_nmi_reason,
105 .i8042_detect = default_i8042_detect 109 .i8042_detect = default_i8042_detect
106}; 110};
107 111
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index a0d6bd9ad44..579a0b51696 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -39,6 +39,7 @@
39#include <asm/mce.h> 39#include <asm/mce.h>
40#include <asm/i387.h> 40#include <asm/i387.h>
41#include <asm/xcr.h> 41#include <asm/xcr.h>
42#include <asm/perf_event.h>
42 43
43#include "trace.h" 44#include "trace.h"
44 45
@@ -118,7 +119,7 @@ module_param(ple_gap, int, S_IRUGO);
118static int ple_window = KVM_VMX_DEFAULT_PLE_WINDOW; 119static int ple_window = KVM_VMX_DEFAULT_PLE_WINDOW;
119module_param(ple_window, int, S_IRUGO); 120module_param(ple_window, int, S_IRUGO);
120 121
121#define NR_AUTOLOAD_MSRS 1 122#define NR_AUTOLOAD_MSRS 8
122#define VMCS02_POOL_SIZE 1 123#define VMCS02_POOL_SIZE 1
123 124
124struct vmcs { 125struct vmcs {
@@ -622,6 +623,7 @@ static unsigned long *vmx_msr_bitmap_legacy;
622static unsigned long *vmx_msr_bitmap_longmode; 623static unsigned long *vmx_msr_bitmap_longmode;
623 624
624static bool cpu_has_load_ia32_efer; 625static bool cpu_has_load_ia32_efer;
626static bool cpu_has_load_perf_global_ctrl;
625 627
626static DECLARE_BITMAP(vmx_vpid_bitmap, VMX_NR_VPIDS); 628static DECLARE_BITMAP(vmx_vpid_bitmap, VMX_NR_VPIDS);
627static DEFINE_SPINLOCK(vmx_vpid_lock); 629static DEFINE_SPINLOCK(vmx_vpid_lock);
@@ -1191,15 +1193,34 @@ static void update_exception_bitmap(struct kvm_vcpu *vcpu)
1191 vmcs_write32(EXCEPTION_BITMAP, eb); 1193 vmcs_write32(EXCEPTION_BITMAP, eb);
1192} 1194}
1193 1195
1196static void clear_atomic_switch_msr_special(unsigned long entry,
1197 unsigned long exit)
1198{
1199 vmcs_clear_bits(VM_ENTRY_CONTROLS, entry);
1200 vmcs_clear_bits(VM_EXIT_CONTROLS, exit);
1201}
1202
1194static void clear_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr) 1203static void clear_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr)
1195{ 1204{
1196 unsigned i; 1205 unsigned i;
1197 struct msr_autoload *m = &vmx->msr_autoload; 1206 struct msr_autoload *m = &vmx->msr_autoload;
1198 1207
1199 if (msr == MSR_EFER && cpu_has_load_ia32_efer) { 1208 switch (msr) {
1200 vmcs_clear_bits(VM_ENTRY_CONTROLS, VM_ENTRY_LOAD_IA32_EFER); 1209 case MSR_EFER:
1201 vmcs_clear_bits(VM_EXIT_CONTROLS, VM_EXIT_LOAD_IA32_EFER); 1210 if (cpu_has_load_ia32_efer) {
1202 return; 1211 clear_atomic_switch_msr_special(VM_ENTRY_LOAD_IA32_EFER,
1212 VM_EXIT_LOAD_IA32_EFER);
1213 return;
1214 }
1215 break;
1216 case MSR_CORE_PERF_GLOBAL_CTRL:
1217 if (cpu_has_load_perf_global_ctrl) {
1218 clear_atomic_switch_msr_special(
1219 VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL,
1220 VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL);
1221 return;
1222 }
1223 break;
1203 } 1224 }
1204 1225
1205 for (i = 0; i < m->nr; ++i) 1226 for (i = 0; i < m->nr; ++i)
@@ -1215,25 +1236,55 @@ static void clear_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr)
1215 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->nr); 1236 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->nr);
1216} 1237}
1217 1238
1239static void add_atomic_switch_msr_special(unsigned long entry,
1240 unsigned long exit, unsigned long guest_val_vmcs,
1241 unsigned long host_val_vmcs, u64 guest_val, u64 host_val)
1242{
1243 vmcs_write64(guest_val_vmcs, guest_val);
1244 vmcs_write64(host_val_vmcs, host_val);
1245 vmcs_set_bits(VM_ENTRY_CONTROLS, entry);
1246 vmcs_set_bits(VM_EXIT_CONTROLS, exit);
1247}
1248
1218static void add_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr, 1249static void add_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr,
1219 u64 guest_val, u64 host_val) 1250 u64 guest_val, u64 host_val)
1220{ 1251{
1221 unsigned i; 1252 unsigned i;
1222 struct msr_autoload *m = &vmx->msr_autoload; 1253 struct msr_autoload *m = &vmx->msr_autoload;
1223 1254
1224 if (msr == MSR_EFER && cpu_has_load_ia32_efer) { 1255 switch (msr) {
1225 vmcs_write64(GUEST_IA32_EFER, guest_val); 1256 case MSR_EFER:
1226 vmcs_write64(HOST_IA32_EFER, host_val); 1257 if (cpu_has_load_ia32_efer) {
1227 vmcs_set_bits(VM_ENTRY_CONTROLS, VM_ENTRY_LOAD_IA32_EFER); 1258 add_atomic_switch_msr_special(VM_ENTRY_LOAD_IA32_EFER,
1228 vmcs_set_bits(VM_EXIT_CONTROLS, VM_EXIT_LOAD_IA32_EFER); 1259 VM_EXIT_LOAD_IA32_EFER,
1229 return; 1260 GUEST_IA32_EFER,
1261 HOST_IA32_EFER,
1262 guest_val, host_val);
1263 return;
1264 }
1265 break;
1266 case MSR_CORE_PERF_GLOBAL_CTRL:
1267 if (cpu_has_load_perf_global_ctrl) {
1268 add_atomic_switch_msr_special(
1269 VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL,
1270 VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL,
1271 GUEST_IA32_PERF_GLOBAL_CTRL,
1272 HOST_IA32_PERF_GLOBAL_CTRL,
1273 guest_val, host_val);
1274 return;
1275 }
1276 break;
1230 } 1277 }
1231 1278
1232 for (i = 0; i < m->nr; ++i) 1279 for (i = 0; i < m->nr; ++i)
1233 if (m->guest[i].index == msr) 1280 if (m->guest[i].index == msr)
1234 break; 1281 break;
1235 1282
1236 if (i == m->nr) { 1283 if (i == NR_AUTOLOAD_MSRS) {
1284 printk_once(KERN_WARNING"Not enough mst switch entries. "
1285 "Can't add msr %x\n", msr);
1286 return;
1287 } else if (i == m->nr) {
1237 ++m->nr; 1288 ++m->nr;
1238 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, m->nr); 1289 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, m->nr);
1239 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->nr); 1290 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->nr);
@@ -2455,6 +2506,42 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf)
2455 && allow_1_setting(MSR_IA32_VMX_EXIT_CTLS, 2506 && allow_1_setting(MSR_IA32_VMX_EXIT_CTLS,
2456 VM_EXIT_LOAD_IA32_EFER); 2507 VM_EXIT_LOAD_IA32_EFER);
2457 2508
2509 cpu_has_load_perf_global_ctrl =
2510 allow_1_setting(MSR_IA32_VMX_ENTRY_CTLS,
2511 VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL)
2512 && allow_1_setting(MSR_IA32_VMX_EXIT_CTLS,
2513 VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL);
2514
2515 /*
2516 * Some cpus support VM_ENTRY_(LOAD|SAVE)_IA32_PERF_GLOBAL_CTRL
2517 * but due to arrata below it can't be used. Workaround is to use
2518 * msr load mechanism to switch IA32_PERF_GLOBAL_CTRL.
2519 *
2520 * VM Exit May Incorrectly Clear IA32_PERF_GLOBAL_CTRL [34:32]
2521 *
2522 * AAK155 (model 26)
2523 * AAP115 (model 30)
2524 * AAT100 (model 37)
2525 * BC86,AAY89,BD102 (model 44)
2526 * BA97 (model 46)
2527 *
2528 */
2529 if (cpu_has_load_perf_global_ctrl && boot_cpu_data.x86 == 0x6) {
2530 switch (boot_cpu_data.x86_model) {
2531 case 26:
2532 case 30:
2533 case 37:
2534 case 44:
2535 case 46:
2536 cpu_has_load_perf_global_ctrl = false;
2537 printk_once(KERN_WARNING"kvm: VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL "
2538 "does not work properly. Using workaround\n");
2539 break;
2540 default:
2541 break;
2542 }
2543 }
2544
2458 return 0; 2545 return 0;
2459} 2546}
2460 2547
@@ -5968,6 +6055,24 @@ static void vmx_cancel_injection(struct kvm_vcpu *vcpu)
5968 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0); 6055 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);
5969} 6056}
5970 6057
6058static void atomic_switch_perf_msrs(struct vcpu_vmx *vmx)
6059{
6060 int i, nr_msrs;
6061 struct perf_guest_switch_msr *msrs;
6062
6063 msrs = perf_guest_get_msrs(&nr_msrs);
6064
6065 if (!msrs)
6066 return;
6067
6068 for (i = 0; i < nr_msrs; i++)
6069 if (msrs[i].host == msrs[i].guest)
6070 clear_atomic_switch_msr(vmx, msrs[i].msr);
6071 else
6072 add_atomic_switch_msr(vmx, msrs[i].msr, msrs[i].guest,
6073 msrs[i].host);
6074}
6075
5971#ifdef CONFIG_X86_64 6076#ifdef CONFIG_X86_64
5972#define R "r" 6077#define R "r"
5973#define Q "q" 6078#define Q "q"
@@ -6017,6 +6122,8 @@ static void __noclone vmx_vcpu_run(struct kvm_vcpu *vcpu)
6017 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) 6122 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6018 vmx_set_interrupt_shadow(vcpu, 0); 6123 vmx_set_interrupt_shadow(vcpu, 0);
6019 6124
6125 atomic_switch_perf_msrs(vmx);
6126
6020 vmx->__launched = vmx->loaded_vmcs->launched; 6127 vmx->__launched = vmx->loaded_vmcs->launched;
6021 asm( 6128 asm(
6022 /* Store host registers */ 6129 /* Store host registers */
diff --git a/arch/x86/mm/gup.c b/arch/x86/mm/gup.c
index ea305856151..dd74e46828c 100644
--- a/arch/x86/mm/gup.c
+++ b/arch/x86/mm/gup.c
@@ -201,6 +201,8 @@ static noinline int gup_huge_pud(pud_t pud, unsigned long addr,
201 do { 201 do {
202 VM_BUG_ON(compound_head(page) != head); 202 VM_BUG_ON(compound_head(page) != head);
203 pages[*nr] = page; 203 pages[*nr] = page;
204 if (PageTail(page))
205 get_huge_page_tail(page);
204 (*nr)++; 206 (*nr)++;
205 page++; 207 page++;
206 refs++; 208 refs++;
diff --git a/arch/x86/mm/highmem_32.c b/arch/x86/mm/highmem_32.c
index b4996266210..f4f29b19fac 100644
--- a/arch/x86/mm/highmem_32.c
+++ b/arch/x86/mm/highmem_32.c
@@ -45,6 +45,7 @@ void *kmap_atomic_prot(struct page *page, pgprot_t prot)
45 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); 45 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
46 BUG_ON(!pte_none(*(kmap_pte-idx))); 46 BUG_ON(!pte_none(*(kmap_pte-idx)));
47 set_pte(kmap_pte-idx, mk_pte(page, prot)); 47 set_pte(kmap_pte-idx, mk_pte(page, prot));
48 arch_flush_lazy_mmu_mode();
48 49
49 return (void *)vaddr; 50 return (void *)vaddr;
50} 51}
@@ -88,6 +89,7 @@ void __kunmap_atomic(void *kvaddr)
88 */ 89 */
89 kpte_clear_flush(kmap_pte-idx, vaddr); 90 kpte_clear_flush(kmap_pte-idx, vaddr);
90 kmap_atomic_idx_pop(); 91 kmap_atomic_idx_pop();
92 arch_flush_lazy_mmu_mode();
91 } 93 }
92#ifdef CONFIG_DEBUG_HIGHMEM 94#ifdef CONFIG_DEBUG_HIGHMEM
93 else { 95 else {
diff --git a/arch/x86/net/bpf_jit_comp.c b/arch/x86/net/bpf_jit_comp.c
index bfab3fa10ed..7b65f752c5f 100644
--- a/arch/x86/net/bpf_jit_comp.c
+++ b/arch/x86/net/bpf_jit_comp.c
@@ -568,8 +568,8 @@ cond_branch: f_offset = addrs[i + filter[i].jf] - addrs[i];
568 break; 568 break;
569 } 569 }
570 if (filter[i].jt != 0) { 570 if (filter[i].jt != 0) {
571 if (filter[i].jf) 571 if (filter[i].jf && f_offset)
572 t_offset += is_near(f_offset) ? 2 : 6; 572 t_offset += is_near(f_offset) ? 2 : 5;
573 EMIT_COND_JMP(t_op, t_offset); 573 EMIT_COND_JMP(t_op, t_offset);
574 if (filter[i].jf) 574 if (filter[i].jf)
575 EMIT_JMP(f_offset); 575 EMIT_JMP(f_offset);
diff --git a/arch/x86/oprofile/init.c b/arch/x86/oprofile/init.c
index cdfe4c54dec..f148cf65267 100644
--- a/arch/x86/oprofile/init.c
+++ b/arch/x86/oprofile/init.c
@@ -21,6 +21,7 @@ extern int op_nmi_timer_init(struct oprofile_operations *ops);
21extern void op_nmi_exit(void); 21extern void op_nmi_exit(void);
22extern void x86_backtrace(struct pt_regs * const regs, unsigned int depth); 22extern void x86_backtrace(struct pt_regs * const regs, unsigned int depth);
23 23
24static int nmi_timer;
24 25
25int __init oprofile_arch_init(struct oprofile_operations *ops) 26int __init oprofile_arch_init(struct oprofile_operations *ops)
26{ 27{
@@ -31,8 +32,9 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
31#ifdef CONFIG_X86_LOCAL_APIC 32#ifdef CONFIG_X86_LOCAL_APIC
32 ret = op_nmi_init(ops); 33 ret = op_nmi_init(ops);
33#endif 34#endif
35 nmi_timer = (ret != 0);
34#ifdef CONFIG_X86_IO_APIC 36#ifdef CONFIG_X86_IO_APIC
35 if (ret < 0) 37 if (nmi_timer)
36 ret = op_nmi_timer_init(ops); 38 ret = op_nmi_timer_init(ops);
37#endif 39#endif
38 ops->backtrace = x86_backtrace; 40 ops->backtrace = x86_backtrace;
@@ -44,6 +46,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
44void oprofile_arch_exit(void) 46void oprofile_arch_exit(void)
45{ 47{
46#ifdef CONFIG_X86_LOCAL_APIC 48#ifdef CONFIG_X86_LOCAL_APIC
47 op_nmi_exit(); 49 if (!nmi_timer)
50 op_nmi_exit();
48#endif 51#endif
49} 52}
diff --git a/arch/x86/platform/ce4100/ce4100.c b/arch/x86/platform/ce4100/ce4100.c
index 28071bb31db..4c61b52191e 100644
--- a/arch/x86/platform/ce4100/ce4100.c
+++ b/arch/x86/platform/ce4100/ce4100.c
@@ -109,7 +109,7 @@ static __init void sdv_serial_fixup(void)
109} 109}
110 110
111#else 111#else
112static inline void sdv_serial_fixup(void); 112static inline void sdv_serial_fixup(void) {};
113#endif 113#endif
114 114
115static void __init sdv_arch_setup(void) 115static void __init sdv_arch_setup(void)
diff --git a/arch/x86/platform/efi/efi_32.c b/arch/x86/platform/efi/efi_32.c
index e36bf714cb7..40e446941dd 100644
--- a/arch/x86/platform/efi/efi_32.c
+++ b/arch/x86/platform/efi/efi_32.c
@@ -39,43 +39,14 @@
39 */ 39 */
40 40
41static unsigned long efi_rt_eflags; 41static unsigned long efi_rt_eflags;
42static pgd_t efi_bak_pg_dir_pointer[2];
43 42
44void efi_call_phys_prelog(void) 43void efi_call_phys_prelog(void)
45{ 44{
46 unsigned long cr4;
47 unsigned long temp;
48 struct desc_ptr gdt_descr; 45 struct desc_ptr gdt_descr;
49 46
50 local_irq_save(efi_rt_eflags); 47 local_irq_save(efi_rt_eflags);
51 48
52 /* 49 load_cr3(initial_page_table);
53 * If I don't have PAE, I should just duplicate two entries in page
54 * directory. If I have PAE, I just need to duplicate one entry in
55 * page directory.
56 */
57 cr4 = read_cr4_safe();
58
59 if (cr4 & X86_CR4_PAE) {
60 efi_bak_pg_dir_pointer[0].pgd =
61 swapper_pg_dir[pgd_index(0)].pgd;
62 swapper_pg_dir[0].pgd =
63 swapper_pg_dir[pgd_index(PAGE_OFFSET)].pgd;
64 } else {
65 efi_bak_pg_dir_pointer[0].pgd =
66 swapper_pg_dir[pgd_index(0)].pgd;
67 efi_bak_pg_dir_pointer[1].pgd =
68 swapper_pg_dir[pgd_index(0x400000)].pgd;
69 swapper_pg_dir[pgd_index(0)].pgd =
70 swapper_pg_dir[pgd_index(PAGE_OFFSET)].pgd;
71 temp = PAGE_OFFSET + 0x400000;
72 swapper_pg_dir[pgd_index(0x400000)].pgd =
73 swapper_pg_dir[pgd_index(temp)].pgd;
74 }
75
76 /*
77 * After the lock is released, the original page table is restored.
78 */
79 __flush_tlb_all(); 50 __flush_tlb_all();
80 51
81 gdt_descr.address = __pa(get_cpu_gdt_table(0)); 52 gdt_descr.address = __pa(get_cpu_gdt_table(0));
@@ -85,28 +56,13 @@ void efi_call_phys_prelog(void)
85 56
86void efi_call_phys_epilog(void) 57void efi_call_phys_epilog(void)
87{ 58{
88 unsigned long cr4;
89 struct desc_ptr gdt_descr; 59 struct desc_ptr gdt_descr;
90 60
91 gdt_descr.address = (unsigned long)get_cpu_gdt_table(0); 61 gdt_descr.address = (unsigned long)get_cpu_gdt_table(0);
92 gdt_descr.size = GDT_SIZE - 1; 62 gdt_descr.size = GDT_SIZE - 1;
93 load_gdt(&gdt_descr); 63 load_gdt(&gdt_descr);
94 64
95 cr4 = read_cr4_safe(); 65 load_cr3(swapper_pg_dir);
96
97 if (cr4 & X86_CR4_PAE) {
98 swapper_pg_dir[pgd_index(0)].pgd =
99 efi_bak_pg_dir_pointer[0].pgd;
100 } else {
101 swapper_pg_dir[pgd_index(0)].pgd =
102 efi_bak_pg_dir_pointer[0].pgd;
103 swapper_pg_dir[pgd_index(0x400000)].pgd =
104 efi_bak_pg_dir_pointer[1].pgd;
105 }
106
107 /*
108 * After the lock is released, the original page table is restored.
109 */
110 __flush_tlb_all(); 66 __flush_tlb_all();
111 67
112 local_irq_restore(efi_rt_eflags); 68 local_irq_restore(efi_rt_eflags);
diff --git a/arch/x86/platform/mrst/mrst.c b/arch/x86/platform/mrst/mrst.c
index 6ed7afdaf4a..ad4ec1cb097 100644
--- a/arch/x86/platform/mrst/mrst.c
+++ b/arch/x86/platform/mrst/mrst.c
@@ -76,6 +76,20 @@ struct sfi_rtc_table_entry sfi_mrtc_array[SFI_MRTC_MAX];
76EXPORT_SYMBOL_GPL(sfi_mrtc_array); 76EXPORT_SYMBOL_GPL(sfi_mrtc_array);
77int sfi_mrtc_num; 77int sfi_mrtc_num;
78 78
79static void mrst_power_off(void)
80{
81 if (__mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT)
82 intel_scu_ipc_simple_command(IPCMSG_COLD_RESET, 1);
83}
84
85static void mrst_reboot(void)
86{
87 if (__mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT)
88 intel_scu_ipc_simple_command(IPCMSG_COLD_RESET, 0);
89 else
90 intel_scu_ipc_simple_command(IPCMSG_COLD_BOOT, 0);
91}
92
79/* parse all the mtimer info to a static mtimer array */ 93/* parse all the mtimer info to a static mtimer array */
80static int __init sfi_parse_mtmr(struct sfi_table_header *table) 94static int __init sfi_parse_mtmr(struct sfi_table_header *table)
81{ 95{
@@ -187,11 +201,34 @@ int __init sfi_parse_mrtc(struct sfi_table_header *table)
187static unsigned long __init mrst_calibrate_tsc(void) 201static unsigned long __init mrst_calibrate_tsc(void)
188{ 202{
189 unsigned long flags, fast_calibrate; 203 unsigned long flags, fast_calibrate;
190 204 if (__mrst_cpu_chip == MRST_CPU_CHIP_PENWELL) {
191 local_irq_save(flags); 205 u32 lo, hi, ratio, fsb;
192 fast_calibrate = apbt_quick_calibrate(); 206
193 local_irq_restore(flags); 207 rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
194 208 pr_debug("IA32 perf status is 0x%x, 0x%0x\n", lo, hi);
209 ratio = (hi >> 8) & 0x1f;
210 pr_debug("ratio is %d\n", ratio);
211 if (!ratio) {
212 pr_err("read a zero ratio, should be incorrect!\n");
213 pr_err("force tsc ratio to 16 ...\n");
214 ratio = 16;
215 }
216 rdmsr(MSR_FSB_FREQ, lo, hi);
217 if ((lo & 0x7) == 0x7)
218 fsb = PENWELL_FSB_FREQ_83SKU;
219 else
220 fsb = PENWELL_FSB_FREQ_100SKU;
221 fast_calibrate = ratio * fsb;
222 pr_debug("read penwell tsc %lu khz\n", fast_calibrate);
223 lapic_timer_frequency = fsb * 1000 / HZ;
224 /* mark tsc clocksource as reliable */
225 set_cpu_cap(&boot_cpu_data, X86_FEATURE_TSC_RELIABLE);
226 } else {
227 local_irq_save(flags);
228 fast_calibrate = apbt_quick_calibrate();
229 local_irq_restore(flags);
230 }
231
195 if (fast_calibrate) 232 if (fast_calibrate)
196 return fast_calibrate; 233 return fast_calibrate;
197 234
@@ -242,15 +279,15 @@ static int mrst_i8042_detect(void)
242 return 0; 279 return 0;
243} 280}
244 281
245/* Reboot and power off are handled by the SCU on a MID device */ 282/*
246static void mrst_power_off(void) 283 * Moorestown does not have external NMI source nor port 0x61 to report
247{ 284 * NMI status. The possible NMI sources are from pmu as a result of NMI
248 intel_scu_ipc_simple_command(0xf1, 1); 285 * watchdog or lock debug. Reading io port 0x61 results in 0xff which
249} 286 * misled NMI handler.
250 287 */
251static void mrst_reboot(void) 288static unsigned char mrst_get_nmi_reason(void)
252{ 289{
253 intel_scu_ipc_simple_command(0xf1, 0); 290 return 0;
254} 291}
255 292
256/* 293/*
@@ -274,6 +311,8 @@ void __init x86_mrst_early_setup(void)
274 x86_platform.calibrate_tsc = mrst_calibrate_tsc; 311 x86_platform.calibrate_tsc = mrst_calibrate_tsc;
275 x86_platform.i8042_detect = mrst_i8042_detect; 312 x86_platform.i8042_detect = mrst_i8042_detect;
276 x86_init.timers.wallclock_init = mrst_rtc_init; 313 x86_init.timers.wallclock_init = mrst_rtc_init;
314 x86_platform.get_nmi_reason = mrst_get_nmi_reason;
315
277 x86_init.pci.init = pci_mrst_init; 316 x86_init.pci.init = pci_mrst_init;
278 x86_init.pci.fixup_irqs = x86_init_noop; 317 x86_init.pci.fixup_irqs = x86_init_noop;
279 318
@@ -448,6 +487,46 @@ static void __init *max7315_platform_data(void *info)
448 return max7315; 487 return max7315;
449} 488}
450 489
490static void *tca6416_platform_data(void *info)
491{
492 static struct pca953x_platform_data tca6416;
493 struct i2c_board_info *i2c_info = info;
494 int gpio_base, intr;
495 char base_pin_name[SFI_NAME_LEN + 1];
496 char intr_pin_name[SFI_NAME_LEN + 1];
497
498 strcpy(i2c_info->type, "tca6416");
499 strcpy(base_pin_name, "tca6416_base");
500 strcpy(intr_pin_name, "tca6416_int");
501
502 gpio_base = get_gpio_by_name(base_pin_name);
503 intr = get_gpio_by_name(intr_pin_name);
504
505 if (gpio_base == -1)
506 return NULL;
507 tca6416.gpio_base = gpio_base;
508 if (intr != -1) {
509 i2c_info->irq = intr + MRST_IRQ_OFFSET;
510 tca6416.irq_base = gpio_base + MRST_IRQ_OFFSET;
511 } else {
512 i2c_info->irq = -1;
513 tca6416.irq_base = -1;
514 }
515 return &tca6416;
516}
517
518static void *mpu3050_platform_data(void *info)
519{
520 struct i2c_board_info *i2c_info = info;
521 int intr = get_gpio_by_name("mpu3050_int");
522
523 if (intr == -1)
524 return NULL;
525
526 i2c_info->irq = intr + MRST_IRQ_OFFSET;
527 return NULL;
528}
529
451static void __init *emc1403_platform_data(void *info) 530static void __init *emc1403_platform_data(void *info)
452{ 531{
453 static short intr2nd_pdata; 532 static short intr2nd_pdata;
@@ -608,13 +687,17 @@ static void *msic_ocd_platform_data(void *info)
608} 687}
609 688
610static const struct devs_id __initconst device_ids[] = { 689static const struct devs_id __initconst device_ids[] = {
690 {"bma023", SFI_DEV_TYPE_I2C, 1, &no_platform_data},
611 {"pmic_gpio", SFI_DEV_TYPE_SPI, 1, &pmic_gpio_platform_data}, 691 {"pmic_gpio", SFI_DEV_TYPE_SPI, 1, &pmic_gpio_platform_data},
692 {"pmic_gpio", SFI_DEV_TYPE_IPC, 1, &pmic_gpio_platform_data},
612 {"spi_max3111", SFI_DEV_TYPE_SPI, 0, &max3111_platform_data}, 693 {"spi_max3111", SFI_DEV_TYPE_SPI, 0, &max3111_platform_data},
613 {"i2c_max7315", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data}, 694 {"i2c_max7315", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data},
614 {"i2c_max7315_2", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data}, 695 {"i2c_max7315_2", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data},
696 {"tca6416", SFI_DEV_TYPE_I2C, 1, &tca6416_platform_data},
615 {"emc1403", SFI_DEV_TYPE_I2C, 1, &emc1403_platform_data}, 697 {"emc1403", SFI_DEV_TYPE_I2C, 1, &emc1403_platform_data},
616 {"i2c_accel", SFI_DEV_TYPE_I2C, 0, &lis331dl_platform_data}, 698 {"i2c_accel", SFI_DEV_TYPE_I2C, 0, &lis331dl_platform_data},
617 {"pmic_audio", SFI_DEV_TYPE_IPC, 1, &no_platform_data}, 699 {"pmic_audio", SFI_DEV_TYPE_IPC, 1, &no_platform_data},
700 {"mpu3050", SFI_DEV_TYPE_I2C, 1, &mpu3050_platform_data},
618 701
619 /* MSIC subdevices */ 702 /* MSIC subdevices */
620 {"msic_battery", SFI_DEV_TYPE_IPC, 1, &msic_battery_platform_data}, 703 {"msic_battery", SFI_DEV_TYPE_IPC, 1, &msic_battery_platform_data},
diff --git a/arch/x86/platform/mrst/vrtc.c b/arch/x86/platform/mrst/vrtc.c
index a8ac6f1eb66..225bd0f0f67 100644
--- a/arch/x86/platform/mrst/vrtc.c
+++ b/arch/x86/platform/mrst/vrtc.c
@@ -76,8 +76,8 @@ unsigned long vrtc_get_time(void)
76 76
77 spin_unlock_irqrestore(&rtc_lock, flags); 77 spin_unlock_irqrestore(&rtc_lock, flags);
78 78
79 /* vRTC YEAR reg contains the offset to 1960 */ 79 /* vRTC YEAR reg contains the offset to 1972 */
80 year += 1960; 80 year += 1972;
81 81
82 printk(KERN_INFO "vRTC: sec: %d min: %d hour: %d day: %d " 82 printk(KERN_INFO "vRTC: sec: %d min: %d hour: %d day: %d "
83 "mon: %d year: %d\n", sec, min, hour, mday, mon, year); 83 "mon: %d year: %d\n", sec, min, hour, mday, mon, year);
diff --git a/arch/x86/um/asm/processor.h b/arch/x86/um/asm/processor.h
index 118c143a9cb..2c32df6fe23 100644
--- a/arch/x86/um/asm/processor.h
+++ b/arch/x86/um/asm/processor.h
@@ -11,7 +11,7 @@
11#endif 11#endif
12 12
13#define KSTK_EIP(tsk) KSTK_REG(tsk, HOST_IP) 13#define KSTK_EIP(tsk) KSTK_REG(tsk, HOST_IP)
14#define KSTK_ESP(tsk) KSTK_REG(tsk, HOST_IP) 14#define KSTK_ESP(tsk) KSTK_REG(tsk, HOST_SP)
15#define KSTK_EBP(tsk) KSTK_REG(tsk, HOST_BP) 15#define KSTK_EBP(tsk) KSTK_REG(tsk, HOST_BP)
16 16
17#define ARCH_IS_STACKGROW(address) \ 17#define ARCH_IS_STACKGROW(address) \
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index da8afd576a6..1f928659c33 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -1356,7 +1356,7 @@ static int __cpuinit xen_hvm_cpu_notify(struct notifier_block *self,
1356 int cpu = (long)hcpu; 1356 int cpu = (long)hcpu;
1357 switch (action) { 1357 switch (action) {
1358 case CPU_UP_PREPARE: 1358 case CPU_UP_PREPARE:
1359 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; 1359 xen_vcpu_setup(cpu);
1360 if (xen_have_vector_callback) 1360 if (xen_have_vector_callback)
1361 xen_init_lock_cpu(cpu); 1361 xen_init_lock_cpu(cpu);
1362 break; 1362 break;
@@ -1386,7 +1386,6 @@ static void __init xen_hvm_guest_init(void)
1386 xen_hvm_smp_init(); 1386 xen_hvm_smp_init();
1387 register_cpu_notifier(&xen_hvm_cpu_notifier); 1387 register_cpu_notifier(&xen_hvm_cpu_notifier);
1388 xen_unplug_emulated_devices(); 1388 xen_unplug_emulated_devices();
1389 have_vcpu_info_placement = 0;
1390 x86_init.irqs.intr_init = xen_init_IRQ; 1389 x86_init.irqs.intr_init = xen_init_IRQ;
1391 xen_hvm_init_time_ops(); 1390 xen_hvm_init_time_ops();
1392 xen_hvm_init_mmu_ops(); 1391 xen_hvm_init_mmu_ops();
diff --git a/arch/x86/xen/grant-table.c b/arch/x86/xen/grant-table.c
index 6bbfd7ac5e8..5a40d24ba33 100644
--- a/arch/x86/xen/grant-table.c
+++ b/arch/x86/xen/grant-table.c
@@ -71,7 +71,7 @@ int arch_gnttab_map_shared(unsigned long *frames, unsigned long nr_gframes,
71 71
72 if (shared == NULL) { 72 if (shared == NULL) {
73 struct vm_struct *area = 73 struct vm_struct *area =
74 alloc_vm_area(PAGE_SIZE * max_nr_gframes); 74 alloc_vm_area(PAGE_SIZE * max_nr_gframes, NULL);
75 BUG_ON(area == NULL); 75 BUG_ON(area == NULL);
76 shared = area->addr; 76 shared = area->addr;
77 *__shared = shared; 77 *__shared = shared;
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c
index 38d0af4fefe..b2c7179fa26 100644
--- a/arch/x86/xen/setup.c
+++ b/arch/x86/xen/setup.c
@@ -173,9 +173,21 @@ static unsigned long __init xen_get_max_pages(void)
173 domid_t domid = DOMID_SELF; 173 domid_t domid = DOMID_SELF;
174 int ret; 174 int ret;
175 175
176 ret = HYPERVISOR_memory_op(XENMEM_maximum_reservation, &domid); 176 /*
177 if (ret > 0) 177 * For the initial domain we use the maximum reservation as
178 max_pages = ret; 178 * the maximum page.
179 *
180 * For guest domains the current maximum reservation reflects
181 * the current maximum rather than the static maximum. In this
182 * case the e820 map provided to us will cover the static
183 * maximum region.
184 */
185 if (xen_initial_domain()) {
186 ret = HYPERVISOR_memory_op(XENMEM_maximum_reservation, &domid);
187 if (ret > 0)
188 max_pages = ret;
189 }
190
179 return min(max_pages, MAX_DOMAIN_PAGES); 191 return min(max_pages, MAX_DOMAIN_PAGES);
180} 192}
181 193
@@ -410,6 +422,6 @@ void __init xen_arch_setup(void)
410#endif 422#endif
411 disable_cpuidle(); 423 disable_cpuidle();
412 boot_option_idle_override = IDLE_HALT; 424 boot_option_idle_override = IDLE_HALT;
413 425 WARN_ON(set_pm_idle_to_default());
414 fiddle_vdso(); 426 fiddle_vdso();
415} 427}