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authorMatthew Garrett <mjg@redhat.com>2012-09-04 04:28:02 -0400
committerRafael J. Wysocki <rjw@sisk.pl>2012-09-09 16:04:26 -0400
commit3dc9a633f8a65b39c5897874138027328bfb0a94 (patch)
treeec7eef140b97f5885f7e99842688eabdc8520524 /arch
parent56835e6cc053c29bf1a15a07dbeb78f219a15214 (diff)
acpi-cpufreq: Add support for modern AMD CPUs
The programming model for P-states on modern AMD CPUs is very similar to that of Intel and VIA. It makes sense to consolidate this support into one driver rather than duplicating functionality between two of them. This patch adds support for AMDs with hardware P-state control to acpi-cpufreq. Signed-off-by: Matthew Garrett <mjg@redhat.com> Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/include/asm/msr-index.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 957ec87385a..1e1f3eb5863 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -248,6 +248,8 @@
248 248
249#define MSR_IA32_PERF_STATUS 0x00000198 249#define MSR_IA32_PERF_STATUS 0x00000198
250#define MSR_IA32_PERF_CTL 0x00000199 250#define MSR_IA32_PERF_CTL 0x00000199
251#define MSR_AMD_PERF_STATUS 0xc0010063
252#define MSR_AMD_PERF_CTL 0xc0010062
251 253
252#define MSR_IA32_MPERF 0x000000e7 254#define MSR_IA32_MPERF 0x000000e7
253#define MSR_IA32_APERF 0x000000e8 255#define MSR_IA32_APERF 0x000000e8