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authorWolfram Sang <w.sang@pengutronix.de>2012-10-08 06:46:32 -0400
committerWolfram Sang <w.sang@pengutronix.de>2012-10-08 06:46:32 -0400
commit102084d3d3969646cc89ea159e50898aeafc6649 (patch)
treee92924469b3fab3ee6fa29e338e0a3a4cb167e82 /arch
parent6ccbe607132bd823abbad8d32b13af89161707da (diff)
parent979570e02981d4a8fc20b3cc8fd651856c98ee9d (diff)
Merge tag 'v3.6-rc7' into i2c-embedded/for-next
Linux 3.6-rc7 Needed to get updates from i2c-embedded/for-current into i2c-embedded/for-next
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig.debug6
-rw-r--r--arch/arm/Makefile4
-rw-r--r--arch/arm/boot/compressed/head.S5
-rw-r--r--arch/arm/boot/dts/at91sam9260.dtsi3
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi5
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi5
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi4
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi4
-rw-r--r--arch/arm/include/asm/assembler.h8
-rw-r--r--arch/arm/include/asm/memory.h3
-rw-r--r--arch/arm/include/asm/tlb.h4
-rw-r--r--arch/arm/include/asm/uaccess.h58
-rw-r--r--arch/arm/include/asm/unistd.h2
-rw-r--r--arch/arm/kernel/calls.S1
-rw-r--r--arch/arm/kernel/hw_breakpoint.c62
-rw-r--r--arch/arm/kernel/smp_twd.c48
-rw-r--r--arch/arm/kernel/traps.c11
-rw-r--r--arch/arm/lib/delay.c1
-rw-r--r--arch/arm/lib/getuser.S23
-rw-r--r--arch/arm/lib/putuser.S6
-rw-r--r--arch/arm/mach-imx/clk-imx25.c8
-rw-r--r--arch/arm/mach-imx/clk-imx35.c6
-rw-r--r--arch/arm/mach-imx/mach-armadillo5x0.c3
-rw-r--r--arch/arm/mach-omap2/Kconfig3
-rw-r--r--arch/arm/mach-omap2/Makefile2
-rw-r--r--arch/arm/mach-omap2/clock33xx_data.c14
-rw-r--r--arch/arm/mach-omap2/clockdomain2xxx_3xxx.c50
-rw-r--r--arch/arm/mach-omap2/cm-regbits-34xx.h1
-rw-r--r--arch/arm/mach-omap2/omap-wakeupgen.c2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c15
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c12
-rw-r--r--arch/arm/mach-omap2/timer.c7
-rw-r--r--arch/arm/mach-shmobile/board-kzm9g.c4
-rw-r--r--arch/arm/mm/context.c7
-rw-r--r--arch/arm/mm/dma-mapping.c2
-rw-r--r--arch/arm/mm/mm.h3
-rw-r--r--arch/arm/mm/mmu.c8
-rw-r--r--arch/arm/plat-mxc/include/mach/mx25.h1
-rw-r--r--arch/arm/plat-omap/sram.c11
-rw-r--r--arch/arm/plat-samsung/clock.c10
-rw-r--r--arch/blackfin/Kconfig1
-rw-r--r--arch/blackfin/Makefile1
-rw-r--r--arch/blackfin/include/asm/smp.h2
-rw-r--r--arch/blackfin/mach-common/smp.c223
-rw-r--r--arch/m68k/platform/coldfire/clk.c6
-rw-r--r--arch/mips/kernel/smp-cmp.c2
-rw-r--r--arch/mips/mm/gup.c2
-rw-r--r--arch/mips/mti-malta/malta-int.c9
-rw-r--r--arch/mips/mti-malta/malta-platform.c5
-rw-r--r--arch/s390/include/asm/hugetlb.h24
-rw-r--r--arch/s390/include/asm/tlbflush.h2
-rw-r--r--arch/s390/kernel/setup.c2
-rw-r--r--arch/s390/lib/uaccess_pt.c142
-rw-r--r--arch/s390/oprofile/init.c10
-rw-r--r--arch/sh/kernel/cpu/sh5/entry.S2
-rw-r--r--arch/sh/kernel/entry-common.S2
-rw-r--r--arch/sparc/kernel/module.c13
-rw-r--r--arch/x86/Kconfig8
-rw-r--r--arch/x86/Makefile2
-rw-r--r--arch/x86/include/asm/xen/page.h3
-rw-r--r--arch/x86/kernel/cpu/perf_event.h2
-rw-r--r--arch/x86/kernel/cpu/perf_event_amd_ibs.c12
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel.c25
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel_ds.c14
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel_lbr.c3
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel_uncore.c6
-rw-r--r--arch/x86/kernel/microcode_core.c3
-rw-r--r--arch/x86/kvm/i8259.c2
-rw-r--r--arch/x86/kvm/vmx.c23
-rw-r--r--arch/x86/kvm/x86.c13
-rw-r--r--arch/x86/mm/init.c2
-rw-r--r--arch/x86/xen/enlighten.c4
-rw-r--r--arch/x86/xen/p2m.c27
74 files changed, 613 insertions, 417 deletions
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index f15f82bf3a5..e968a52e488 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -356,15 +356,15 @@ choice
356 is nothing connected to read from the DCC. 356 is nothing connected to read from the DCC.
357 357
358 config DEBUG_SEMIHOSTING 358 config DEBUG_SEMIHOSTING
359 bool "Kernel low-level debug output via semihosting I" 359 bool "Kernel low-level debug output via semihosting I/O"
360 help 360 help
361 Semihosting enables code running on an ARM target to use 361 Semihosting enables code running on an ARM target to use
362 the I/O facilities on a host debugger/emulator through a 362 the I/O facilities on a host debugger/emulator through a
363 simple SVC calls. The host debugger or emulator must have 363 simple SVC call. The host debugger or emulator must have
364 semihosting enabled for the special svc call to be trapped 364 semihosting enabled for the special svc call to be trapped
365 otherwise the kernel will crash. 365 otherwise the kernel will crash.
366 366
367 This is known to work with OpenOCD, as wellas 367 This is known to work with OpenOCD, as well as
368 ARM's Fast Models, or any other controlling environment 368 ARM's Fast Models, or any other controlling environment
369 that implements semihosting. 369 that implements semihosting.
370 370
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 30eae87ead6..a051dfbdd7d 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -284,10 +284,10 @@ zImage Image xipImage bootpImage uImage: vmlinux
284zinstall uinstall install: vmlinux 284zinstall uinstall install: vmlinux
285 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $@ 285 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $@
286 286
287%.dtb: 287%.dtb: scripts
288 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@ 288 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@
289 289
290dtbs: 290dtbs: scripts
291 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@ 291 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@
292 292
293# We use MRPROPER_FILES and CLEAN_FILES now 293# We use MRPROPER_FILES and CLEAN_FILES now
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index b8c64b80baf..bc67cbff394 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -653,16 +653,21 @@ __armv7_mmu_cache_on:
653 mcrne p15, 0, r0, c8, c7, 0 @ flush I,D TLBs 653 mcrne p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
654#endif 654#endif
655 mrc p15, 0, r0, c1, c0, 0 @ read control reg 655 mrc p15, 0, r0, c1, c0, 0 @ read control reg
656 bic r0, r0, #1 << 28 @ clear SCTLR.TRE
656 orr r0, r0, #0x5000 @ I-cache enable, RR cache replacement 657 orr r0, r0, #0x5000 @ I-cache enable, RR cache replacement
657 orr r0, r0, #0x003c @ write buffer 658 orr r0, r0, #0x003c @ write buffer
658#ifdef CONFIG_MMU 659#ifdef CONFIG_MMU
659#ifdef CONFIG_CPU_ENDIAN_BE8 660#ifdef CONFIG_CPU_ENDIAN_BE8
660 orr r0, r0, #1 << 25 @ big-endian page tables 661 orr r0, r0, #1 << 25 @ big-endian page tables
661#endif 662#endif
663 mrcne p15, 0, r6, c2, c0, 2 @ read ttb control reg
662 orrne r0, r0, #1 @ MMU enabled 664 orrne r0, r0, #1 @ MMU enabled
663 movne r1, #0xfffffffd @ domain 0 = client 665 movne r1, #0xfffffffd @ domain 0 = client
666 bic r6, r6, #1 << 31 @ 32-bit translation system
667 bic r6, r6, #3 << 0 @ use only ttbr0
664 mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer 668 mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer
665 mcrne p15, 0, r1, c3, c0, 0 @ load domain access control 669 mcrne p15, 0, r1, c3, c0, 0 @ load domain access control
670 mcrne p15, 0, r6, c2, c0, 2 @ load ttb control
666#endif 671#endif
667 mcr p15, 0, r0, c7, c5, 4 @ ISB 672 mcr p15, 0, r0, c7, c5, 4 @ ISB
668 mcr p15, 0, r0, c1, c0, 0 @ load control register 673 mcr p15, 0, r0, c1, c0, 0 @ load control register
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index edef4521cef..d410581a5a8 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -105,6 +105,7 @@
105 #gpio-cells = <2>; 105 #gpio-cells = <2>;
106 gpio-controller; 106 gpio-controller;
107 interrupt-controller; 107 interrupt-controller;
108 #interrupt-cells = <2>;
108 }; 109 };
109 110
110 pioB: gpio@fffff600 { 111 pioB: gpio@fffff600 {
@@ -114,6 +115,7 @@
114 #gpio-cells = <2>; 115 #gpio-cells = <2>;
115 gpio-controller; 116 gpio-controller;
116 interrupt-controller; 117 interrupt-controller;
118 #interrupt-cells = <2>;
117 }; 119 };
118 120
119 pioC: gpio@fffff800 { 121 pioC: gpio@fffff800 {
@@ -123,6 +125,7 @@
123 #gpio-cells = <2>; 125 #gpio-cells = <2>;
124 gpio-controller; 126 gpio-controller;
125 interrupt-controller; 127 interrupt-controller;
128 #interrupt-cells = <2>;
126 }; 129 };
127 130
128 dbgu: serial@fffff200 { 131 dbgu: serial@fffff200 {
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index e7942c7e3f6..3e6e5c1abbf 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -96,6 +96,7 @@
96 #gpio-cells = <2>; 96 #gpio-cells = <2>;
97 gpio-controller; 97 gpio-controller;
98 interrupt-controller; 98 interrupt-controller;
99 #interrupt-cells = <2>;
99 }; 100 };
100 101
101 pioB: gpio@fffff400 { 102 pioB: gpio@fffff400 {
@@ -105,6 +106,7 @@
105 #gpio-cells = <2>; 106 #gpio-cells = <2>;
106 gpio-controller; 107 gpio-controller;
107 interrupt-controller; 108 interrupt-controller;
109 #interrupt-cells = <2>;
108 }; 110 };
109 111
110 pioC: gpio@fffff600 { 112 pioC: gpio@fffff600 {
@@ -114,6 +116,7 @@
114 #gpio-cells = <2>; 116 #gpio-cells = <2>;
115 gpio-controller; 117 gpio-controller;
116 interrupt-controller; 118 interrupt-controller;
119 #interrupt-cells = <2>;
117 }; 120 };
118 121
119 pioD: gpio@fffff800 { 122 pioD: gpio@fffff800 {
@@ -123,6 +126,7 @@
123 #gpio-cells = <2>; 126 #gpio-cells = <2>;
124 gpio-controller; 127 gpio-controller;
125 interrupt-controller; 128 interrupt-controller;
129 #interrupt-cells = <2>;
126 }; 130 };
127 131
128 pioE: gpio@fffffa00 { 132 pioE: gpio@fffffa00 {
@@ -132,6 +136,7 @@
132 #gpio-cells = <2>; 136 #gpio-cells = <2>;
133 gpio-controller; 137 gpio-controller;
134 interrupt-controller; 138 interrupt-controller;
139 #interrupt-cells = <2>;
135 }; 140 };
136 141
137 dbgu: serial@ffffee00 { 142 dbgu: serial@ffffee00 {
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index ae4bb6da287..3add030d61f 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -115,6 +115,7 @@
115 #gpio-cells = <2>; 115 #gpio-cells = <2>;
116 gpio-controller; 116 gpio-controller;
117 interrupt-controller; 117 interrupt-controller;
118 #interrupt-cells = <2>;
118 }; 119 };
119 120
120 pioB: gpio@fffff400 { 121 pioB: gpio@fffff400 {
@@ -124,6 +125,7 @@
124 #gpio-cells = <2>; 125 #gpio-cells = <2>;
125 gpio-controller; 126 gpio-controller;
126 interrupt-controller; 127 interrupt-controller;
128 #interrupt-cells = <2>;
127 }; 129 };
128 130
129 pioC: gpio@fffff600 { 131 pioC: gpio@fffff600 {
@@ -133,6 +135,7 @@
133 #gpio-cells = <2>; 135 #gpio-cells = <2>;
134 gpio-controller; 136 gpio-controller;
135 interrupt-controller; 137 interrupt-controller;
138 #interrupt-cells = <2>;
136 }; 139 };
137 140
138 pioD: gpio@fffff800 { 141 pioD: gpio@fffff800 {
@@ -142,6 +145,7 @@
142 #gpio-cells = <2>; 145 #gpio-cells = <2>;
143 gpio-controller; 146 gpio-controller;
144 interrupt-controller; 147 interrupt-controller;
148 #interrupt-cells = <2>;
145 }; 149 };
146 150
147 pioE: gpio@fffffa00 { 151 pioE: gpio@fffffa00 {
@@ -151,6 +155,7 @@
151 #gpio-cells = <2>; 155 #gpio-cells = <2>;
152 gpio-controller; 156 gpio-controller;
153 interrupt-controller; 157 interrupt-controller;
158 #interrupt-cells = <2>;
154 }; 159 };
155 160
156 dbgu: serial@ffffee00 { 161 dbgu: serial@ffffee00 {
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 42e9fba4423..82508d68aa7 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -109,6 +109,7 @@
109 #gpio-cells = <2>; 109 #gpio-cells = <2>;
110 gpio-controller; 110 gpio-controller;
111 interrupt-controller; 111 interrupt-controller;
112 #interrupt-cells = <2>;
112 }; 113 };
113 114
114 pioB: gpio@fffff600 { 115 pioB: gpio@fffff600 {
@@ -118,6 +119,7 @@
118 #gpio-cells = <2>; 119 #gpio-cells = <2>;
119 gpio-controller; 120 gpio-controller;
120 interrupt-controller; 121 interrupt-controller;
122 #interrupt-cells = <2>;
121 }; 123 };
122 124
123 pioC: gpio@fffff800 { 125 pioC: gpio@fffff800 {
@@ -127,6 +129,7 @@
127 #gpio-cells = <2>; 129 #gpio-cells = <2>;
128 gpio-controller; 130 gpio-controller;
129 interrupt-controller; 131 interrupt-controller;
132 #interrupt-cells = <2>;
130 }; 133 };
131 134
132 pioD: gpio@fffffa00 { 135 pioD: gpio@fffffa00 {
@@ -136,6 +139,7 @@
136 #gpio-cells = <2>; 139 #gpio-cells = <2>;
137 gpio-controller; 140 gpio-controller;
138 interrupt-controller; 141 interrupt-controller;
142 #interrupt-cells = <2>;
139 }; 143 };
140 144
141 dbgu: serial@fffff200 { 145 dbgu: serial@fffff200 {
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index e05afbc3e04..03fc136421c 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -118,6 +118,7 @@
118 #gpio-cells = <2>; 118 #gpio-cells = <2>;
119 gpio-controller; 119 gpio-controller;
120 interrupt-controller; 120 interrupt-controller;
121 #interrupt-cells = <2>;
121 }; 122 };
122 123
123 pioB: gpio@fffff600 { 124 pioB: gpio@fffff600 {
@@ -127,6 +128,7 @@
127 #gpio-cells = <2>; 128 #gpio-cells = <2>;
128 gpio-controller; 129 gpio-controller;
129 interrupt-controller; 130 interrupt-controller;
131 #interrupt-cells = <2>;
130 }; 132 };
131 133
132 pioC: gpio@fffff800 { 134 pioC: gpio@fffff800 {
@@ -136,6 +138,7 @@
136 #gpio-cells = <2>; 138 #gpio-cells = <2>;
137 gpio-controller; 139 gpio-controller;
138 interrupt-controller; 140 interrupt-controller;
141 #interrupt-cells = <2>;
139 }; 142 };
140 143
141 pioD: gpio@fffffa00 { 144 pioD: gpio@fffffa00 {
@@ -145,6 +148,7 @@
145 #gpio-cells = <2>; 148 #gpio-cells = <2>;
146 gpio-controller; 149 gpio-controller;
147 interrupt-controller; 150 interrupt-controller;
151 #interrupt-cells = <2>;
148 }; 152 };
149 153
150 dbgu: serial@fffff200 { 154 dbgu: serial@fffff200 {
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 03fb93621d0..5c8b3bf4d82 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -320,4 +320,12 @@
320 .size \name , . - \name 320 .size \name , . - \name
321 .endm 321 .endm
322 322
323 .macro check_uaccess, addr:req, size:req, limit:req, tmp:req, bad:req
324#ifndef CONFIG_CPU_USE_DOMAINS
325 adds \tmp, \addr, #\size - 1
326 sbcccs \tmp, \tmp, \limit
327 bcs \bad
328#endif
329 .endm
330
323#endif /* __ASM_ASSEMBLER_H__ */ 331#endif /* __ASM_ASSEMBLER_H__ */
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index e965f1b560f..5f6ddcc5645 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -187,6 +187,7 @@ static inline unsigned long __phys_to_virt(unsigned long x)
187#define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET) 187#define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET)
188#endif 188#endif
189#endif 189#endif
190#endif /* __ASSEMBLY__ */
190 191
191#ifndef PHYS_OFFSET 192#ifndef PHYS_OFFSET
192#ifdef PLAT_PHYS_OFFSET 193#ifdef PLAT_PHYS_OFFSET
@@ -196,6 +197,8 @@ static inline unsigned long __phys_to_virt(unsigned long x)
196#endif 197#endif
197#endif 198#endif
198 199
200#ifndef __ASSEMBLY__
201
199/* 202/*
200 * PFNs are used to describe any physical page; this means 203 * PFNs are used to describe any physical page; this means
201 * PFN 0 == physical address 0. 204 * PFN 0 == physical address 0.
diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h
index 314d4664eae..99a19512ee2 100644
--- a/arch/arm/include/asm/tlb.h
+++ b/arch/arm/include/asm/tlb.h
@@ -199,6 +199,9 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
199{ 199{
200 pgtable_page_dtor(pte); 200 pgtable_page_dtor(pte);
201 201
202#ifdef CONFIG_ARM_LPAE
203 tlb_add_flush(tlb, addr);
204#else
202 /* 205 /*
203 * With the classic ARM MMU, a pte page has two corresponding pmd 206 * With the classic ARM MMU, a pte page has two corresponding pmd
204 * entries, each covering 1MB. 207 * entries, each covering 1MB.
@@ -206,6 +209,7 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
206 addr &= PMD_MASK; 209 addr &= PMD_MASK;
207 tlb_add_flush(tlb, addr + SZ_1M - PAGE_SIZE); 210 tlb_add_flush(tlb, addr + SZ_1M - PAGE_SIZE);
208 tlb_add_flush(tlb, addr + SZ_1M); 211 tlb_add_flush(tlb, addr + SZ_1M);
212#endif
209 213
210 tlb_remove_page(tlb, pte); 214 tlb_remove_page(tlb, pte);
211} 215}
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index 479a6352e0b..77bd79f2ffd 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -101,28 +101,39 @@ extern int __get_user_1(void *);
101extern int __get_user_2(void *); 101extern int __get_user_2(void *);
102extern int __get_user_4(void *); 102extern int __get_user_4(void *);
103 103
104#define __get_user_x(__r2,__p,__e,__s,__i...) \ 104#define __GUP_CLOBBER_1 "lr", "cc"
105#ifdef CONFIG_CPU_USE_DOMAINS
106#define __GUP_CLOBBER_2 "ip", "lr", "cc"
107#else
108#define __GUP_CLOBBER_2 "lr", "cc"
109#endif
110#define __GUP_CLOBBER_4 "lr", "cc"
111
112#define __get_user_x(__r2,__p,__e,__l,__s) \
105 __asm__ __volatile__ ( \ 113 __asm__ __volatile__ ( \
106 __asmeq("%0", "r0") __asmeq("%1", "r2") \ 114 __asmeq("%0", "r0") __asmeq("%1", "r2") \
115 __asmeq("%3", "r1") \
107 "bl __get_user_" #__s \ 116 "bl __get_user_" #__s \
108 : "=&r" (__e), "=r" (__r2) \ 117 : "=&r" (__e), "=r" (__r2) \
109 : "0" (__p) \ 118 : "0" (__p), "r" (__l) \
110 : __i, "cc") 119 : __GUP_CLOBBER_##__s)
111 120
112#define get_user(x,p) \ 121#define __get_user_check(x,p) \
113 ({ \ 122 ({ \
123 unsigned long __limit = current_thread_info()->addr_limit - 1; \
114 register const typeof(*(p)) __user *__p asm("r0") = (p);\ 124 register const typeof(*(p)) __user *__p asm("r0") = (p);\
115 register unsigned long __r2 asm("r2"); \ 125 register unsigned long __r2 asm("r2"); \
126 register unsigned long __l asm("r1") = __limit; \
116 register int __e asm("r0"); \ 127 register int __e asm("r0"); \
117 switch (sizeof(*(__p))) { \ 128 switch (sizeof(*(__p))) { \
118 case 1: \ 129 case 1: \
119 __get_user_x(__r2, __p, __e, 1, "lr"); \ 130 __get_user_x(__r2, __p, __e, __l, 1); \
120 break; \ 131 break; \
121 case 2: \ 132 case 2: \
122 __get_user_x(__r2, __p, __e, 2, "r3", "lr"); \ 133 __get_user_x(__r2, __p, __e, __l, 2); \
123 break; \ 134 break; \
124 case 4: \ 135 case 4: \
125 __get_user_x(__r2, __p, __e, 4, "lr"); \ 136 __get_user_x(__r2, __p, __e, __l, 4); \
126 break; \ 137 break; \
127 default: __e = __get_user_bad(); break; \ 138 default: __e = __get_user_bad(); break; \
128 } \ 139 } \
@@ -130,42 +141,57 @@ extern int __get_user_4(void *);
130 __e; \ 141 __e; \
131 }) 142 })
132 143
144#define get_user(x,p) \
145 ({ \
146 might_fault(); \
147 __get_user_check(x,p); \
148 })
149
133extern int __put_user_1(void *, unsigned int); 150extern int __put_user_1(void *, unsigned int);
134extern int __put_user_2(void *, unsigned int); 151extern int __put_user_2(void *, unsigned int);
135extern int __put_user_4(void *, unsigned int); 152extern int __put_user_4(void *, unsigned int);
136extern int __put_user_8(void *, unsigned long long); 153extern int __put_user_8(void *, unsigned long long);
137 154
138#define __put_user_x(__r2,__p,__e,__s) \ 155#define __put_user_x(__r2,__p,__e,__l,__s) \
139 __asm__ __volatile__ ( \ 156 __asm__ __volatile__ ( \
140 __asmeq("%0", "r0") __asmeq("%2", "r2") \ 157 __asmeq("%0", "r0") __asmeq("%2", "r2") \
158 __asmeq("%3", "r1") \
141 "bl __put_user_" #__s \ 159 "bl __put_user_" #__s \
142 : "=&r" (__e) \ 160 : "=&r" (__e) \
143 : "0" (__p), "r" (__r2) \ 161 : "0" (__p), "r" (__r2), "r" (__l) \
144 : "ip", "lr", "cc") 162 : "ip", "lr", "cc")
145 163
146#define put_user(x,p) \ 164#define __put_user_check(x,p) \
147 ({ \ 165 ({ \
166 unsigned long __limit = current_thread_info()->addr_limit - 1; \
148 register const typeof(*(p)) __r2 asm("r2") = (x); \ 167 register const typeof(*(p)) __r2 asm("r2") = (x); \
149 register const typeof(*(p)) __user *__p asm("r0") = (p);\ 168 register const typeof(*(p)) __user *__p asm("r0") = (p);\
169 register unsigned long __l asm("r1") = __limit; \
150 register int __e asm("r0"); \ 170 register int __e asm("r0"); \
151 switch (sizeof(*(__p))) { \ 171 switch (sizeof(*(__p))) { \
152 case 1: \ 172 case 1: \
153 __put_user_x(__r2, __p, __e, 1); \ 173 __put_user_x(__r2, __p, __e, __l, 1); \
154 break; \ 174 break; \
155 case 2: \ 175 case 2: \
156 __put_user_x(__r2, __p, __e, 2); \ 176 __put_user_x(__r2, __p, __e, __l, 2); \
157 break; \ 177 break; \
158 case 4: \ 178 case 4: \
159 __put_user_x(__r2, __p, __e, 4); \ 179 __put_user_x(__r2, __p, __e, __l, 4); \
160 break; \ 180 break; \
161 case 8: \ 181 case 8: \
162 __put_user_x(__r2, __p, __e, 8); \ 182 __put_user_x(__r2, __p, __e, __l, 8); \
163 break; \ 183 break; \
164 default: __e = __put_user_bad(); break; \ 184 default: __e = __put_user_bad(); break; \
165 } \ 185 } \
166 __e; \ 186 __e; \
167 }) 187 })
168 188
189#define put_user(x,p) \
190 ({ \
191 might_fault(); \
192 __put_user_check(x,p); \
193 })
194
169#else /* CONFIG_MMU */ 195#else /* CONFIG_MMU */
170 196
171/* 197/*
@@ -219,6 +245,7 @@ do { \
219 unsigned long __gu_addr = (unsigned long)(ptr); \ 245 unsigned long __gu_addr = (unsigned long)(ptr); \
220 unsigned long __gu_val; \ 246 unsigned long __gu_val; \
221 __chk_user_ptr(ptr); \ 247 __chk_user_ptr(ptr); \
248 might_fault(); \
222 switch (sizeof(*(ptr))) { \ 249 switch (sizeof(*(ptr))) { \
223 case 1: __get_user_asm_byte(__gu_val,__gu_addr,err); break; \ 250 case 1: __get_user_asm_byte(__gu_val,__gu_addr,err); break; \
224 case 2: __get_user_asm_half(__gu_val,__gu_addr,err); break; \ 251 case 2: __get_user_asm_half(__gu_val,__gu_addr,err); break; \
@@ -300,6 +327,7 @@ do { \
300 unsigned long __pu_addr = (unsigned long)(ptr); \ 327 unsigned long __pu_addr = (unsigned long)(ptr); \
301 __typeof__(*(ptr)) __pu_val = (x); \ 328 __typeof__(*(ptr)) __pu_val = (x); \
302 __chk_user_ptr(ptr); \ 329 __chk_user_ptr(ptr); \
330 might_fault(); \
303 switch (sizeof(*(ptr))) { \ 331 switch (sizeof(*(ptr))) { \
304 case 1: __put_user_asm_byte(__pu_val,__pu_addr,err); break; \ 332 case 1: __put_user_asm_byte(__pu_val,__pu_addr,err); break; \
305 case 2: __put_user_asm_half(__pu_val,__pu_addr,err); break; \ 333 case 2: __put_user_asm_half(__pu_val,__pu_addr,err); break; \
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index 0cab47d4a83..2fde5fd1acc 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -404,6 +404,7 @@
404#define __NR_setns (__NR_SYSCALL_BASE+375) 404#define __NR_setns (__NR_SYSCALL_BASE+375)
405#define __NR_process_vm_readv (__NR_SYSCALL_BASE+376) 405#define __NR_process_vm_readv (__NR_SYSCALL_BASE+376)
406#define __NR_process_vm_writev (__NR_SYSCALL_BASE+377) 406#define __NR_process_vm_writev (__NR_SYSCALL_BASE+377)
407 /* 378 for kcmp */
407 408
408/* 409/*
409 * The following SWIs are ARM private. 410 * The following SWIs are ARM private.
@@ -483,6 +484,7 @@
483 */ 484 */
484#define __IGNORE_fadvise64_64 485#define __IGNORE_fadvise64_64
485#define __IGNORE_migrate_pages 486#define __IGNORE_migrate_pages
487#define __IGNORE_kcmp
486 488
487#endif /* __KERNEL__ */ 489#endif /* __KERNEL__ */
488#endif /* __ASM_ARM_UNISTD_H */ 490#endif /* __ASM_ARM_UNISTD_H */
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 463ff4a0ec8..e337879595e 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -387,6 +387,7 @@
387/* 375 */ CALL(sys_setns) 387/* 375 */ CALL(sys_setns)
388 CALL(sys_process_vm_readv) 388 CALL(sys_process_vm_readv)
389 CALL(sys_process_vm_writev) 389 CALL(sys_process_vm_writev)
390 CALL(sys_ni_syscall) /* reserved for sys_kcmp */
390#ifndef syscalls_counted 391#ifndef syscalls_counted
391.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls 392.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
392#define syscalls_counted 393#define syscalls_counted
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index ba386bd9410..281bf330124 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -159,6 +159,12 @@ static int debug_arch_supported(void)
159 arch >= ARM_DEBUG_ARCH_V7_1; 159 arch >= ARM_DEBUG_ARCH_V7_1;
160} 160}
161 161
162/* Can we determine the watchpoint access type from the fsr? */
163static int debug_exception_updates_fsr(void)
164{
165 return 0;
166}
167
162/* Determine number of WRP registers available. */ 168/* Determine number of WRP registers available. */
163static int get_num_wrp_resources(void) 169static int get_num_wrp_resources(void)
164{ 170{
@@ -604,13 +610,14 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp)
604 /* Aligned */ 610 /* Aligned */
605 break; 611 break;
606 case 1: 612 case 1:
607 /* Allow single byte watchpoint. */
608 if (info->ctrl.len == ARM_BREAKPOINT_LEN_1)
609 break;
610 case 2: 613 case 2:
611 /* Allow halfword watchpoints and breakpoints. */ 614 /* Allow halfword watchpoints and breakpoints. */
612 if (info->ctrl.len == ARM_BREAKPOINT_LEN_2) 615 if (info->ctrl.len == ARM_BREAKPOINT_LEN_2)
613 break; 616 break;
617 case 3:
618 /* Allow single byte watchpoint. */
619 if (info->ctrl.len == ARM_BREAKPOINT_LEN_1)
620 break;
614 default: 621 default:
615 ret = -EINVAL; 622 ret = -EINVAL;
616 goto out; 623 goto out;
@@ -619,18 +626,35 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp)
619 info->address &= ~alignment_mask; 626 info->address &= ~alignment_mask;
620 info->ctrl.len <<= offset; 627 info->ctrl.len <<= offset;
621 628
622 /* 629 if (!bp->overflow_handler) {
623 * Currently we rely on an overflow handler to take 630 /*
624 * care of single-stepping the breakpoint when it fires. 631 * Mismatch breakpoints are required for single-stepping
625 * In the case of userspace breakpoints on a core with V7 debug, 632 * breakpoints.
626 * we can use the mismatch feature as a poor-man's hardware 633 */
627 * single-step, but this only works for per-task breakpoints. 634 if (!core_has_mismatch_brps())
628 */ 635 return -EINVAL;
629 if (!bp->overflow_handler && (arch_check_bp_in_kernelspace(bp) || 636
630 !core_has_mismatch_brps() || !bp->hw.bp_target)) { 637 /* We don't allow mismatch breakpoints in kernel space. */
631 pr_warning("overflow handler required but none found\n"); 638 if (arch_check_bp_in_kernelspace(bp))
632 ret = -EINVAL; 639 return -EPERM;
640
641 /*
642 * Per-cpu breakpoints are not supported by our stepping
643 * mechanism.
644 */
645 if (!bp->hw.bp_target)
646 return -EINVAL;
647
648 /*
649 * We only support specific access types if the fsr
650 * reports them.
651 */
652 if (!debug_exception_updates_fsr() &&
653 (info->ctrl.type == ARM_BREAKPOINT_LOAD ||
654 info->ctrl.type == ARM_BREAKPOINT_STORE))
655 return -EINVAL;
633 } 656 }
657
634out: 658out:
635 return ret; 659 return ret;
636} 660}
@@ -706,10 +730,12 @@ static void watchpoint_handler(unsigned long addr, unsigned int fsr,
706 goto unlock; 730 goto unlock;
707 731
708 /* Check that the access type matches. */ 732 /* Check that the access type matches. */
709 access = (fsr & ARM_FSR_ACCESS_MASK) ? HW_BREAKPOINT_W : 733 if (debug_exception_updates_fsr()) {
710 HW_BREAKPOINT_R; 734 access = (fsr & ARM_FSR_ACCESS_MASK) ?
711 if (!(access & hw_breakpoint_type(wp))) 735 HW_BREAKPOINT_W : HW_BREAKPOINT_R;
712 goto unlock; 736 if (!(access & hw_breakpoint_type(wp)))
737 goto unlock;
738 }
713 739
714 /* We have a winner. */ 740 /* We have a winner. */
715 info->trigger = addr; 741 info->trigger = addr;
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index fef42b21cec..e1f906989bb 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -11,7 +11,6 @@
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/clk.h> 13#include <linux/clk.h>
14#include <linux/cpufreq.h>
15#include <linux/delay.h> 14#include <linux/delay.h>
16#include <linux/device.h> 15#include <linux/device.h>
17#include <linux/err.h> 16#include <linux/err.h>
@@ -96,7 +95,52 @@ static void twd_timer_stop(struct clock_event_device *clk)
96 disable_percpu_irq(clk->irq); 95 disable_percpu_irq(clk->irq);
97} 96}
98 97
99#ifdef CONFIG_CPU_FREQ 98#ifdef CONFIG_COMMON_CLK
99
100/*
101 * Updates clockevent frequency when the cpu frequency changes.
102 * Called on the cpu that is changing frequency with interrupts disabled.
103 */
104static void twd_update_frequency(void *new_rate)
105{
106 twd_timer_rate = *((unsigned long *) new_rate);
107
108 clockevents_update_freq(*__this_cpu_ptr(twd_evt), twd_timer_rate);
109}
110
111static int twd_rate_change(struct notifier_block *nb,
112 unsigned long flags, void *data)
113{
114 struct clk_notifier_data *cnd = data;
115
116 /*
117 * The twd clock events must be reprogrammed to account for the new
118 * frequency. The timer is local to a cpu, so cross-call to the
119 * changing cpu.
120 */
121 if (flags == POST_RATE_CHANGE)
122 smp_call_function(twd_update_frequency,
123 (void *)&cnd->new_rate, 1);
124
125 return NOTIFY_OK;
126}
127
128static struct notifier_block twd_clk_nb = {
129 .notifier_call = twd_rate_change,
130};
131
132static int twd_clk_init(void)
133{
134 if (twd_evt && *__this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
135 return clk_notifier_register(twd_clk, &twd_clk_nb);
136
137 return 0;
138}
139core_initcall(twd_clk_init);
140
141#elif defined (CONFIG_CPU_FREQ)
142
143#include <linux/cpufreq.h>
100 144
101/* 145/*
102 * Updates clockevent frequency when the cpu frequency changes. 146 * Updates clockevent frequency when the cpu frequency changes.
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index f7945218b8c..b0179b89a04 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -420,20 +420,23 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
420#endif 420#endif
421 instr = *(u32 *) pc; 421 instr = *(u32 *) pc;
422 } else if (thumb_mode(regs)) { 422 } else if (thumb_mode(regs)) {
423 get_user(instr, (u16 __user *)pc); 423 if (get_user(instr, (u16 __user *)pc))
424 goto die_sig;
424 if (is_wide_instruction(instr)) { 425 if (is_wide_instruction(instr)) {
425 unsigned int instr2; 426 unsigned int instr2;
426 get_user(instr2, (u16 __user *)pc+1); 427 if (get_user(instr2, (u16 __user *)pc+1))
428 goto die_sig;
427 instr <<= 16; 429 instr <<= 16;
428 instr |= instr2; 430 instr |= instr2;
429 } 431 }
430 } else { 432 } else if (get_user(instr, (u32 __user *)pc)) {
431 get_user(instr, (u32 __user *)pc); 433 goto die_sig;
432 } 434 }
433 435
434 if (call_undef_hook(regs, instr) == 0) 436 if (call_undef_hook(regs, instr) == 0)
435 return; 437 return;
436 438
439die_sig:
437#ifdef CONFIG_DEBUG_USER 440#ifdef CONFIG_DEBUG_USER
438 if (user_debug & UDBG_UNDEFINED) { 441 if (user_debug & UDBG_UNDEFINED) {
439 printk(KERN_INFO "%s (%d): undefined instruction: pc=%p\n", 442 printk(KERN_INFO "%s (%d): undefined instruction: pc=%p\n",
diff --git a/arch/arm/lib/delay.c b/arch/arm/lib/delay.c
index d6dacc69254..395d5fbb8fa 100644
--- a/arch/arm/lib/delay.c
+++ b/arch/arm/lib/delay.c
@@ -59,6 +59,7 @@ void __init init_current_timer_delay(unsigned long freq)
59{ 59{
60 pr_info("Switching to timer-based delay loop\n"); 60 pr_info("Switching to timer-based delay loop\n");
61 lpj_fine = freq / HZ; 61 lpj_fine = freq / HZ;
62 loops_per_jiffy = lpj_fine;
62 arm_delay_ops.delay = __timer_delay; 63 arm_delay_ops.delay = __timer_delay;
63 arm_delay_ops.const_udelay = __timer_const_udelay; 64 arm_delay_ops.const_udelay = __timer_const_udelay;
64 arm_delay_ops.udelay = __timer_udelay; 65 arm_delay_ops.udelay = __timer_udelay;
diff --git a/arch/arm/lib/getuser.S b/arch/arm/lib/getuser.S
index 11093a7c3e3..9b06bb41fca 100644
--- a/arch/arm/lib/getuser.S
+++ b/arch/arm/lib/getuser.S
@@ -16,8 +16,9 @@
16 * __get_user_X 16 * __get_user_X
17 * 17 *
18 * Inputs: r0 contains the address 18 * Inputs: r0 contains the address
19 * r1 contains the address limit, which must be preserved
19 * Outputs: r0 is the error code 20 * Outputs: r0 is the error code
20 * r2, r3 contains the zero-extended value 21 * r2 contains the zero-extended value
21 * lr corrupted 22 * lr corrupted
22 * 23 *
23 * No other registers must be altered. (see <asm/uaccess.h> 24 * No other registers must be altered. (see <asm/uaccess.h>
@@ -27,33 +28,39 @@
27 * Note also that it is intended that __get_user_bad is not global. 28 * Note also that it is intended that __get_user_bad is not global.
28 */ 29 */
29#include <linux/linkage.h> 30#include <linux/linkage.h>
31#include <asm/assembler.h>
30#include <asm/errno.h> 32#include <asm/errno.h>
31#include <asm/domain.h> 33#include <asm/domain.h>
32 34
33ENTRY(__get_user_1) 35ENTRY(__get_user_1)
36 check_uaccess r0, 1, r1, r2, __get_user_bad
341: TUSER(ldrb) r2, [r0] 371: TUSER(ldrb) r2, [r0]
35 mov r0, #0 38 mov r0, #0
36 mov pc, lr 39 mov pc, lr
37ENDPROC(__get_user_1) 40ENDPROC(__get_user_1)
38 41
39ENTRY(__get_user_2) 42ENTRY(__get_user_2)
40#ifdef CONFIG_THUMB2_KERNEL 43 check_uaccess r0, 2, r1, r2, __get_user_bad
412: TUSER(ldrb) r2, [r0] 44#ifdef CONFIG_CPU_USE_DOMAINS
423: TUSER(ldrb) r3, [r0, #1] 45rb .req ip
462: ldrbt r2, [r0], #1
473: ldrbt rb, [r0], #0
43#else 48#else
442: TUSER(ldrb) r2, [r0], #1 49rb .req r0
453: TUSER(ldrb) r3, [r0] 502: ldrb r2, [r0]
513: ldrb rb, [r0, #1]
46#endif 52#endif
47#ifndef __ARMEB__ 53#ifndef __ARMEB__
48 orr r2, r2, r3, lsl #8 54 orr r2, r2, rb, lsl #8
49#else 55#else
50 orr r2, r3, r2, lsl #8 56 orr r2, rb, r2, lsl #8
51#endif 57#endif
52 mov r0, #0 58 mov r0, #0
53 mov pc, lr 59 mov pc, lr
54ENDPROC(__get_user_2) 60ENDPROC(__get_user_2)
55 61
56ENTRY(__get_user_4) 62ENTRY(__get_user_4)
63 check_uaccess r0, 4, r1, r2, __get_user_bad
574: TUSER(ldr) r2, [r0] 644: TUSER(ldr) r2, [r0]
58 mov r0, #0 65 mov r0, #0
59 mov pc, lr 66 mov pc, lr
diff --git a/arch/arm/lib/putuser.S b/arch/arm/lib/putuser.S
index 7db25990c58..3d73dcb959b 100644
--- a/arch/arm/lib/putuser.S
+++ b/arch/arm/lib/putuser.S
@@ -16,6 +16,7 @@
16 * __put_user_X 16 * __put_user_X
17 * 17 *
18 * Inputs: r0 contains the address 18 * Inputs: r0 contains the address
19 * r1 contains the address limit, which must be preserved
19 * r2, r3 contains the value 20 * r2, r3 contains the value
20 * Outputs: r0 is the error code 21 * Outputs: r0 is the error code
21 * lr corrupted 22 * lr corrupted
@@ -27,16 +28,19 @@
27 * Note also that it is intended that __put_user_bad is not global. 28 * Note also that it is intended that __put_user_bad is not global.
28 */ 29 */
29#include <linux/linkage.h> 30#include <linux/linkage.h>
31#include <asm/assembler.h>
30#include <asm/errno.h> 32#include <asm/errno.h>
31#include <asm/domain.h> 33#include <asm/domain.h>
32 34
33ENTRY(__put_user_1) 35ENTRY(__put_user_1)
36 check_uaccess r0, 1, r1, ip, __put_user_bad
341: TUSER(strb) r2, [r0] 371: TUSER(strb) r2, [r0]
35 mov r0, #0 38 mov r0, #0
36 mov pc, lr 39 mov pc, lr
37ENDPROC(__put_user_1) 40ENDPROC(__put_user_1)
38 41
39ENTRY(__put_user_2) 42ENTRY(__put_user_2)
43 check_uaccess r0, 2, r1, ip, __put_user_bad
40 mov ip, r2, lsr #8 44 mov ip, r2, lsr #8
41#ifdef CONFIG_THUMB2_KERNEL 45#ifdef CONFIG_THUMB2_KERNEL
42#ifndef __ARMEB__ 46#ifndef __ARMEB__
@@ -60,12 +64,14 @@ ENTRY(__put_user_2)
60ENDPROC(__put_user_2) 64ENDPROC(__put_user_2)
61 65
62ENTRY(__put_user_4) 66ENTRY(__put_user_4)
67 check_uaccess r0, 4, r1, ip, __put_user_bad
634: TUSER(str) r2, [r0] 684: TUSER(str) r2, [r0]
64 mov r0, #0 69 mov r0, #0
65 mov pc, lr 70 mov pc, lr
66ENDPROC(__put_user_4) 71ENDPROC(__put_user_4)
67 72
68ENTRY(__put_user_8) 73ENTRY(__put_user_8)
74 check_uaccess r0, 8, r1, ip, __put_user_bad
69#ifdef CONFIG_THUMB2_KERNEL 75#ifdef CONFIG_THUMB2_KERNEL
705: TUSER(str) r2, [r0] 765: TUSER(str) r2, [r0]
716: TUSER(str) r3, [r0, #4] 776: TUSER(str) r3, [r0, #4]
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index fdd8cc87c9f..d20d4795f4e 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -222,10 +222,8 @@ int __init mx25_clocks_init(void)
222 clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0"); 222 clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0");
223 clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0"); 223 clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0");
224 clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0"); 224 clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0");
225 clk_register_clkdev(clk[ssi1_ipg_per], "per", "imx-ssi.0"); 225 clk_register_clkdev(clk[ssi1_ipg], NULL, "imx-ssi.0");
226 clk_register_clkdev(clk[ssi1_ipg], "ipg", "imx-ssi.0"); 226 clk_register_clkdev(clk[ssi2_ipg], NULL, "imx-ssi.1");
227 clk_register_clkdev(clk[ssi2_ipg_per], "per", "imx-ssi.1");
228 clk_register_clkdev(clk[ssi2_ipg], "ipg", "imx-ssi.1");
229 clk_register_clkdev(clk[esdhc1_ipg_per], "per", "sdhci-esdhc-imx25.0"); 227 clk_register_clkdev(clk[esdhc1_ipg_per], "per", "sdhci-esdhc-imx25.0");
230 clk_register_clkdev(clk[esdhc1_ipg], "ipg", "sdhci-esdhc-imx25.0"); 228 clk_register_clkdev(clk[esdhc1_ipg], "ipg", "sdhci-esdhc-imx25.0");
231 clk_register_clkdev(clk[esdhc1_ahb], "ahb", "sdhci-esdhc-imx25.0"); 229 clk_register_clkdev(clk[esdhc1_ahb], "ahb", "sdhci-esdhc-imx25.0");
@@ -243,6 +241,6 @@ int __init mx25_clocks_init(void)
243 clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma"); 241 clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma");
244 clk_register_clkdev(clk[iim_ipg], "iim", NULL); 242 clk_register_clkdev(clk[iim_ipg], "iim", NULL);
245 243
246 mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); 244 mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), MX25_INT_GPT1);
247 return 0; 245 return 0;
248} 246}
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index c6422fb10ba..65fb8bcd86c 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -230,10 +230,8 @@ int __init mx35_clocks_init()
230 clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb"); 230 clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");
231 clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1"); 231 clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1");
232 clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma"); 232 clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma");
233 clk_register_clkdev(clk[ipg], "ipg", "imx-ssi.0"); 233 clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0");
234 clk_register_clkdev(clk[ssi1_div_post], "per", "imx-ssi.0"); 234 clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1");
235 clk_register_clkdev(clk[ipg], "ipg", "imx-ssi.1");
236 clk_register_clkdev(clk[ssi2_div_post], "per", "imx-ssi.1");
237 /* i.mx35 has the i.mx21 type uart */ 235 /* i.mx35 has the i.mx21 type uart */
238 clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0"); 236 clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0");
239 clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0"); 237 clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0");
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c
index 2c6ab3273f9..5985ed1b8c9 100644
--- a/arch/arm/mach-imx/mach-armadillo5x0.c
+++ b/arch/arm/mach-imx/mach-armadillo5x0.c
@@ -526,7 +526,8 @@ static void __init armadillo5x0_init(void)
526 imx31_add_mxc_nand(&armadillo5x0_nand_board_info); 526 imx31_add_mxc_nand(&armadillo5x0_nand_board_info);
527 527
528 /* set NAND page size to 2k if not configured via boot mode pins */ 528 /* set NAND page size to 2k if not configured via boot mode pins */
529 __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR); 529 __raw_writel(__raw_readl(mx3_ccm_base + MXC_CCM_RCSR) |
530 (1 << 30), mx3_ccm_base + MXC_CCM_RCSR);
530 531
531 /* RTC */ 532 /* RTC */
532 /* Get RTC IRQ and register the chip */ 533 /* Get RTC IRQ and register the chip */
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index fcd4e85c4dd..346fd26f3aa 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -232,10 +232,11 @@ config MACH_OMAP3_PANDORA
232 select OMAP_PACKAGE_CBB 232 select OMAP_PACKAGE_CBB
233 select REGULATOR_FIXED_VOLTAGE if REGULATOR 233 select REGULATOR_FIXED_VOLTAGE if REGULATOR
234 234
235config MACH_OMAP3_TOUCHBOOK 235config MACH_TOUCHBOOK
236 bool "OMAP3 Touch Book" 236 bool "OMAP3 Touch Book"
237 depends on ARCH_OMAP3 237 depends on ARCH_OMAP3
238 default y 238 default y
239 select OMAP_PACKAGE_CBB
239 240
240config MACH_OMAP_3430SDP 241config MACH_OMAP_3430SDP
241 bool "OMAP 3430 SDP board" 242 bool "OMAP 3430 SDP board"
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index f6a24b3f9c4..34c2c7f59f0 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -255,7 +255,7 @@ obj-$(CONFIG_MACH_OMAP_3630SDP) += board-zoom-display.o
255obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o 255obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o
256obj-$(CONFIG_MACH_CM_T3517) += board-cm-t3517.o 256obj-$(CONFIG_MACH_CM_T3517) += board-cm-t3517.o
257obj-$(CONFIG_MACH_IGEP0020) += board-igep0020.o 257obj-$(CONFIG_MACH_IGEP0020) += board-igep0020.o
258obj-$(CONFIG_MACH_OMAP3_TOUCHBOOK) += board-omap3touchbook.o 258obj-$(CONFIG_MACH_TOUCHBOOK) += board-omap3touchbook.o
259obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o 259obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o
260obj-$(CONFIG_MACH_OMAP4_PANDA) += board-omap4panda.o 260obj-$(CONFIG_MACH_OMAP4_PANDA) += board-omap4panda.o
261 261
diff --git a/arch/arm/mach-omap2/clock33xx_data.c b/arch/arm/mach-omap2/clock33xx_data.c
index 25bbcc7ca4d..ae27de8899a 100644
--- a/arch/arm/mach-omap2/clock33xx_data.c
+++ b/arch/arm/mach-omap2/clock33xx_data.c
@@ -1036,13 +1036,13 @@ static struct omap_clk am33xx_clks[] = {
1036 CLK(NULL, "mmu_fck", &mmu_fck, CK_AM33XX), 1036 CLK(NULL, "mmu_fck", &mmu_fck, CK_AM33XX),
1037 CLK(NULL, "smartreflex0_fck", &smartreflex0_fck, CK_AM33XX), 1037 CLK(NULL, "smartreflex0_fck", &smartreflex0_fck, CK_AM33XX),
1038 CLK(NULL, "smartreflex1_fck", &smartreflex1_fck, CK_AM33XX), 1038 CLK(NULL, "smartreflex1_fck", &smartreflex1_fck, CK_AM33XX),
1039 CLK(NULL, "gpt1_fck", &timer1_fck, CK_AM33XX), 1039 CLK(NULL, "timer1_fck", &timer1_fck, CK_AM33XX),
1040 CLK(NULL, "gpt2_fck", &timer2_fck, CK_AM33XX), 1040 CLK(NULL, "timer2_fck", &timer2_fck, CK_AM33XX),
1041 CLK(NULL, "gpt3_fck", &timer3_fck, CK_AM33XX), 1041 CLK(NULL, "timer3_fck", &timer3_fck, CK_AM33XX),
1042 CLK(NULL, "gpt4_fck", &timer4_fck, CK_AM33XX), 1042 CLK(NULL, "timer4_fck", &timer4_fck, CK_AM33XX),
1043 CLK(NULL, "gpt5_fck", &timer5_fck, CK_AM33XX), 1043 CLK(NULL, "timer5_fck", &timer5_fck, CK_AM33XX),
1044 CLK(NULL, "gpt6_fck", &timer6_fck, CK_AM33XX), 1044 CLK(NULL, "timer6_fck", &timer6_fck, CK_AM33XX),
1045 CLK(NULL, "gpt7_fck", &timer7_fck, CK_AM33XX), 1045 CLK(NULL, "timer7_fck", &timer7_fck, CK_AM33XX),
1046 CLK(NULL, "usbotg_fck", &usbotg_fck, CK_AM33XX), 1046 CLK(NULL, "usbotg_fck", &usbotg_fck, CK_AM33XX),
1047 CLK(NULL, "ieee5000_fck", &ieee5000_fck, CK_AM33XX), 1047 CLK(NULL, "ieee5000_fck", &ieee5000_fck, CK_AM33XX),
1048 CLK(NULL, "wdt1_fck", &wdt1_fck, CK_AM33XX), 1048 CLK(NULL, "wdt1_fck", &wdt1_fck, CK_AM33XX),
diff --git a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
index a0d68dbecfa..f99e65cfb86 100644
--- a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
@@ -241,6 +241,52 @@ static void omap3_clkdm_deny_idle(struct clockdomain *clkdm)
241 _clkdm_del_autodeps(clkdm); 241 _clkdm_del_autodeps(clkdm);
242} 242}
243 243
244static int omap3xxx_clkdm_clk_enable(struct clockdomain *clkdm)
245{
246 bool hwsup = false;
247
248 if (!clkdm->clktrctrl_mask)
249 return 0;
250
251 hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
252 clkdm->clktrctrl_mask);
253
254 if (hwsup) {
255 /* Disable HW transitions when we are changing deps */
256 _disable_hwsup(clkdm);
257 _clkdm_add_autodeps(clkdm);
258 _enable_hwsup(clkdm);
259 } else {
260 if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
261 omap3_clkdm_wakeup(clkdm);
262 }
263
264 return 0;
265}
266
267static int omap3xxx_clkdm_clk_disable(struct clockdomain *clkdm)
268{
269 bool hwsup = false;
270
271 if (!clkdm->clktrctrl_mask)
272 return 0;
273
274 hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
275 clkdm->clktrctrl_mask);
276
277 if (hwsup) {
278 /* Disable HW transitions when we are changing deps */
279 _disable_hwsup(clkdm);
280 _clkdm_del_autodeps(clkdm);
281 _enable_hwsup(clkdm);
282 } else {
283 if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)
284 omap3_clkdm_sleep(clkdm);
285 }
286
287 return 0;
288}
289
244struct clkdm_ops omap2_clkdm_operations = { 290struct clkdm_ops omap2_clkdm_operations = {
245 .clkdm_add_wkdep = omap2_clkdm_add_wkdep, 291 .clkdm_add_wkdep = omap2_clkdm_add_wkdep,
246 .clkdm_del_wkdep = omap2_clkdm_del_wkdep, 292 .clkdm_del_wkdep = omap2_clkdm_del_wkdep,
@@ -267,6 +313,6 @@ struct clkdm_ops omap3_clkdm_operations = {
267 .clkdm_wakeup = omap3_clkdm_wakeup, 313 .clkdm_wakeup = omap3_clkdm_wakeup,
268 .clkdm_allow_idle = omap3_clkdm_allow_idle, 314 .clkdm_allow_idle = omap3_clkdm_allow_idle,
269 .clkdm_deny_idle = omap3_clkdm_deny_idle, 315 .clkdm_deny_idle = omap3_clkdm_deny_idle,
270 .clkdm_clk_enable = omap2_clkdm_clk_enable, 316 .clkdm_clk_enable = omap3xxx_clkdm_clk_enable,
271 .clkdm_clk_disable = omap2_clkdm_clk_disable, 317 .clkdm_clk_disable = omap3xxx_clkdm_clk_disable,
272}; 318};
diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h
index 766338fe4d3..975f6bda0e0 100644
--- a/arch/arm/mach-omap2/cm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-34xx.h
@@ -67,6 +67,7 @@
67#define OMAP3430_EN_IVA2_DPLL_MASK (0x7 << 0) 67#define OMAP3430_EN_IVA2_DPLL_MASK (0x7 << 0)
68 68
69/* CM_IDLEST_IVA2 */ 69/* CM_IDLEST_IVA2 */
70#define OMAP3430_ST_IVA2_SHIFT 0
70#define OMAP3430_ST_IVA2_MASK (1 << 0) 71#define OMAP3430_ST_IVA2_MASK (1 << 0)
71 72
72/* CM_IDLEST_PLL_IVA2 */ 73/* CM_IDLEST_PLL_IVA2 */
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
index 05fdebfaa19..330d4c6e746 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -46,7 +46,7 @@
46static void __iomem *wakeupgen_base; 46static void __iomem *wakeupgen_base;
47static void __iomem *sar_base; 47static void __iomem *sar_base;
48static DEFINE_SPINLOCK(wakeupgen_lock); 48static DEFINE_SPINLOCK(wakeupgen_lock);
49static unsigned int irq_target_cpu[NR_IRQS]; 49static unsigned int irq_target_cpu[MAX_IRQS];
50static unsigned int irq_banks = MAX_NR_REG_BANKS; 50static unsigned int irq_banks = MAX_NR_REG_BANKS;
51static unsigned int max_irqs = MAX_IRQS; 51static unsigned int max_irqs = MAX_IRQS;
52static unsigned int omap_secure_apis; 52static unsigned int omap_secure_apis;
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 6ca8e519968..37afbd173c2 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1889,6 +1889,7 @@ static int _enable(struct omap_hwmod *oh)
1889 _enable_sysc(oh); 1889 _enable_sysc(oh);
1890 } 1890 }
1891 } else { 1891 } else {
1892 _omap4_disable_module(oh);
1892 _disable_clocks(oh); 1893 _disable_clocks(oh);
1893 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", 1894 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1894 oh->name, r); 1895 oh->name, r);
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index c9e38200216..ce7e6068768 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -100,9 +100,9 @@ static struct omap_hwmod omap3xxx_mpu_hwmod = {
100 100
101/* IVA2 (IVA2) */ 101/* IVA2 (IVA2) */
102static struct omap_hwmod_rst_info omap3xxx_iva_resets[] = { 102static struct omap_hwmod_rst_info omap3xxx_iva_resets[] = {
103 { .name = "logic", .rst_shift = 0 }, 103 { .name = "logic", .rst_shift = 0, .st_shift = 8 },
104 { .name = "seq0", .rst_shift = 1 }, 104 { .name = "seq0", .rst_shift = 1, .st_shift = 9 },
105 { .name = "seq1", .rst_shift = 2 }, 105 { .name = "seq1", .rst_shift = 2, .st_shift = 10 },
106}; 106};
107 107
108static struct omap_hwmod omap3xxx_iva_hwmod = { 108static struct omap_hwmod omap3xxx_iva_hwmod = {
@@ -112,6 +112,15 @@ static struct omap_hwmod omap3xxx_iva_hwmod = {
112 .rst_lines = omap3xxx_iva_resets, 112 .rst_lines = omap3xxx_iva_resets,
113 .rst_lines_cnt = ARRAY_SIZE(omap3xxx_iva_resets), 113 .rst_lines_cnt = ARRAY_SIZE(omap3xxx_iva_resets),
114 .main_clk = "iva2_ck", 114 .main_clk = "iva2_ck",
115 .prcm = {
116 .omap2 = {
117 .module_offs = OMAP3430_IVA2_MOD,
118 .prcm_reg_id = 1,
119 .module_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT,
120 .idlest_reg_id = 1,
121 .idlest_idle_bit = OMAP3430_ST_IVA2_SHIFT,
122 }
123 },
115}; 124};
116 125
117/* timer class */ 126/* timer class */
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 242aee498ce..afb60917a94 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -4210,7 +4210,7 @@ static struct omap_hwmod_ocp_if omap44xx_dsp__iva = {
4210}; 4210};
4211 4211
4212/* dsp -> sl2if */ 4212/* dsp -> sl2if */
4213static struct omap_hwmod_ocp_if omap44xx_dsp__sl2if = { 4213static struct omap_hwmod_ocp_if __maybe_unused omap44xx_dsp__sl2if = {
4214 .master = &omap44xx_dsp_hwmod, 4214 .master = &omap44xx_dsp_hwmod,
4215 .slave = &omap44xx_sl2if_hwmod, 4215 .slave = &omap44xx_sl2if_hwmod,
4216 .clk = "dpll_iva_m5x2_ck", 4216 .clk = "dpll_iva_m5x2_ck",
@@ -4828,7 +4828,7 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iss = {
4828}; 4828};
4829 4829
4830/* iva -> sl2if */ 4830/* iva -> sl2if */
4831static struct omap_hwmod_ocp_if omap44xx_iva__sl2if = { 4831static struct omap_hwmod_ocp_if __maybe_unused omap44xx_iva__sl2if = {
4832 .master = &omap44xx_iva_hwmod, 4832 .master = &omap44xx_iva_hwmod,
4833 .slave = &omap44xx_sl2if_hwmod, 4833 .slave = &omap44xx_sl2if_hwmod,
4834 .clk = "dpll_iva_m5x2_ck", 4834 .clk = "dpll_iva_m5x2_ck",
@@ -5362,7 +5362,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__scrm = {
5362}; 5362};
5363 5363
5364/* l3_main_2 -> sl2if */ 5364/* l3_main_2 -> sl2if */
5365static struct omap_hwmod_ocp_if omap44xx_l3_main_2__sl2if = { 5365static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l3_main_2__sl2if = {
5366 .master = &omap44xx_l3_main_2_hwmod, 5366 .master = &omap44xx_l3_main_2_hwmod,
5367 .slave = &omap44xx_sl2if_hwmod, 5367 .slave = &omap44xx_sl2if_hwmod,
5368 .clk = "l3_div_ck", 5368 .clk = "l3_div_ck",
@@ -6032,7 +6032,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
6032 &omap44xx_l4_abe__dmic, 6032 &omap44xx_l4_abe__dmic,
6033 &omap44xx_l4_abe__dmic_dma, 6033 &omap44xx_l4_abe__dmic_dma,
6034 &omap44xx_dsp__iva, 6034 &omap44xx_dsp__iva,
6035 &omap44xx_dsp__sl2if, 6035 /* &omap44xx_dsp__sl2if, */
6036 &omap44xx_l4_cfg__dsp, 6036 &omap44xx_l4_cfg__dsp,
6037 &omap44xx_l3_main_2__dss, 6037 &omap44xx_l3_main_2__dss,
6038 &omap44xx_l4_per__dss, 6038 &omap44xx_l4_per__dss,
@@ -6068,7 +6068,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
6068 &omap44xx_l4_per__i2c4, 6068 &omap44xx_l4_per__i2c4,
6069 &omap44xx_l3_main_2__ipu, 6069 &omap44xx_l3_main_2__ipu,
6070 &omap44xx_l3_main_2__iss, 6070 &omap44xx_l3_main_2__iss,
6071 &omap44xx_iva__sl2if, 6071 /* &omap44xx_iva__sl2if, */
6072 &omap44xx_l3_main_2__iva, 6072 &omap44xx_l3_main_2__iva,
6073 &omap44xx_l4_wkup__kbd, 6073 &omap44xx_l4_wkup__kbd,
6074 &omap44xx_l4_cfg__mailbox, 6074 &omap44xx_l4_cfg__mailbox,
@@ -6099,7 +6099,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
6099 &omap44xx_l4_cfg__cm_core, 6099 &omap44xx_l4_cfg__cm_core,
6100 &omap44xx_l4_wkup__prm, 6100 &omap44xx_l4_wkup__prm,
6101 &omap44xx_l4_wkup__scrm, 6101 &omap44xx_l4_wkup__scrm,
6102 &omap44xx_l3_main_2__sl2if, 6102 /* &omap44xx_l3_main_2__sl2if, */
6103 &omap44xx_l4_abe__slimbus1, 6103 &omap44xx_l4_abe__slimbus1,
6104 &omap44xx_l4_abe__slimbus1_dma, 6104 &omap44xx_l4_abe__slimbus1_dma,
6105 &omap44xx_l4_per__slimbus2, 6105 &omap44xx_l4_per__slimbus2,
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 2ff6d41ec6c..2ba4f57dda8 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -260,6 +260,7 @@ static u32 notrace dmtimer_read_sched_clock(void)
260 return 0; 260 return 0;
261} 261}
262 262
263#ifdef CONFIG_OMAP_32K_TIMER
263/* Setup free-running counter for clocksource */ 264/* Setup free-running counter for clocksource */
264static int __init omap2_sync32k_clocksource_init(void) 265static int __init omap2_sync32k_clocksource_init(void)
265{ 266{
@@ -299,6 +300,12 @@ static int __init omap2_sync32k_clocksource_init(void)
299 300
300 return ret; 301 return ret;
301} 302}
303#else
304static inline int omap2_sync32k_clocksource_init(void)
305{
306 return -ENODEV;
307}
308#endif
302 309
303static void __init omap2_gptimer_clocksource_init(int gptimer_id, 310static void __init omap2_gptimer_clocksource_init(int gptimer_id,
304 const char *fck_source) 311 const char *fck_source)
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index 53b7ea92c32..3b8a0171c3c 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -346,11 +346,11 @@ static struct resource sh_mmcif_resources[] = {
346 .flags = IORESOURCE_MEM, 346 .flags = IORESOURCE_MEM,
347 }, 347 },
348 [1] = { 348 [1] = {
349 .start = gic_spi(141), 349 .start = gic_spi(140),
350 .flags = IORESOURCE_IRQ, 350 .flags = IORESOURCE_IRQ,
351 }, 351 },
352 [2] = { 352 [2] = {
353 .start = gic_spi(140), 353 .start = gic_spi(141),
354 .flags = IORESOURCE_IRQ, 354 .flags = IORESOURCE_IRQ,
355 }, 355 },
356}; 356};
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
index 119bc52ab93..4e07eec1270 100644
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@ -63,10 +63,11 @@ static int contextidr_notifier(struct notifier_block *unused, unsigned long cmd,
63 pid = task_pid_nr(thread->task) << ASID_BITS; 63 pid = task_pid_nr(thread->task) << ASID_BITS;
64 asm volatile( 64 asm volatile(
65 " mrc p15, 0, %0, c13, c0, 1\n" 65 " mrc p15, 0, %0, c13, c0, 1\n"
66 " bfi %1, %0, #0, %2\n" 66 " and %0, %0, %2\n"
67 " mcr p15, 0, %1, c13, c0, 1\n" 67 " orr %0, %0, %1\n"
68 " mcr p15, 0, %0, c13, c0, 1\n"
68 : "=r" (contextidr), "+r" (pid) 69 : "=r" (contextidr), "+r" (pid)
69 : "I" (ASID_BITS)); 70 : "I" (~ASID_MASK));
70 isb(); 71 isb();
71 72
72 return NOTIFY_OK; 73 return NOTIFY_OK;
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 051204fc461..e59c4ab71bc 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -489,7 +489,7 @@ static bool __in_atomic_pool(void *start, size_t size)
489 void *pool_start = pool->vaddr; 489 void *pool_start = pool->vaddr;
490 void *pool_end = pool->vaddr + pool->size; 490 void *pool_end = pool->vaddr + pool->size;
491 491
492 if (start < pool_start || start > pool_end) 492 if (start < pool_start || start >= pool_end)
493 return false; 493 return false;
494 494
495 if (end <= pool_end) 495 if (end <= pool_end)
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index 6776160618e..a8ee92da354 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -55,6 +55,9 @@ extern void __flush_dcache_page(struct address_space *mapping, struct page *page
55/* permanent static mappings from iotable_init() */ 55/* permanent static mappings from iotable_init() */
56#define VM_ARM_STATIC_MAPPING 0x40000000 56#define VM_ARM_STATIC_MAPPING 0x40000000
57 57
58/* empty mapping */
59#define VM_ARM_EMPTY_MAPPING 0x20000000
60
58/* mapping type (attributes) for permanent static mappings */ 61/* mapping type (attributes) for permanent static mappings */
59#define VM_ARM_MTYPE(mt) ((mt) << 20) 62#define VM_ARM_MTYPE(mt) ((mt) << 20)
60#define VM_ARM_MTYPE_MASK (0x1f << 20) 63#define VM_ARM_MTYPE_MASK (0x1f << 20)
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 4c2d0451e84..c2fa21d0103 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -807,7 +807,7 @@ static void __init pmd_empty_section_gap(unsigned long addr)
807 vm = early_alloc_aligned(sizeof(*vm), __alignof__(*vm)); 807 vm = early_alloc_aligned(sizeof(*vm), __alignof__(*vm));
808 vm->addr = (void *)addr; 808 vm->addr = (void *)addr;
809 vm->size = SECTION_SIZE; 809 vm->size = SECTION_SIZE;
810 vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING; 810 vm->flags = VM_IOREMAP | VM_ARM_EMPTY_MAPPING;
811 vm->caller = pmd_empty_section_gap; 811 vm->caller = pmd_empty_section_gap;
812 vm_area_add_early(vm); 812 vm_area_add_early(vm);
813} 813}
@@ -820,7 +820,7 @@ static void __init fill_pmd_gaps(void)
820 820
821 /* we're still single threaded hence no lock needed here */ 821 /* we're still single threaded hence no lock needed here */
822 for (vm = vmlist; vm; vm = vm->next) { 822 for (vm = vmlist; vm; vm = vm->next) {
823 if (!(vm->flags & VM_ARM_STATIC_MAPPING)) 823 if (!(vm->flags & (VM_ARM_STATIC_MAPPING | VM_ARM_EMPTY_MAPPING)))
824 continue; 824 continue;
825 addr = (unsigned long)vm->addr; 825 addr = (unsigned long)vm->addr;
826 if (addr < next) 826 if (addr < next)
@@ -961,8 +961,8 @@ void __init sanity_check_meminfo(void)
961 * Check whether this memory bank would partially overlap 961 * Check whether this memory bank would partially overlap
962 * the vmalloc area. 962 * the vmalloc area.
963 */ 963 */
964 if (__va(bank->start + bank->size) > vmalloc_min || 964 if (__va(bank->start + bank->size - 1) >= vmalloc_min ||
965 __va(bank->start + bank->size) < __va(bank->start)) { 965 __va(bank->start + bank->size - 1) <= __va(bank->start)) {
966 unsigned long newsize = vmalloc_min - __va(bank->start); 966 unsigned long newsize = vmalloc_min - __va(bank->start);
967 printk(KERN_NOTICE "Truncating RAM at %.8llx-%.8llx " 967 printk(KERN_NOTICE "Truncating RAM at %.8llx-%.8llx "
968 "to -%.8llx (vmalloc region overlap).\n", 968 "to -%.8llx (vmalloc region overlap).\n",
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index 627d94f1b01..ec466400a20 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -98,6 +98,7 @@
98#define MX25_INT_UART1 (NR_IRQS_LEGACY + 45) 98#define MX25_INT_UART1 (NR_IRQS_LEGACY + 45)
99#define MX25_INT_GPIO2 (NR_IRQS_LEGACY + 51) 99#define MX25_INT_GPIO2 (NR_IRQS_LEGACY + 51)
100#define MX25_INT_GPIO1 (NR_IRQS_LEGACY + 52) 100#define MX25_INT_GPIO1 (NR_IRQS_LEGACY + 52)
101#define MX25_INT_GPT1 (NR_IRQS_LEGACY + 54)
101#define MX25_INT_FEC (NR_IRQS_LEGACY + 57) 102#define MX25_INT_FEC (NR_IRQS_LEGACY + 57)
102 103
103#define MX25_DMA_REQ_SSI2_RX1 22 104#define MX25_DMA_REQ_SSI2_RX1 22
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 766181cb5c9..024f3b08db2 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -68,6 +68,7 @@
68 68
69static unsigned long omap_sram_start; 69static unsigned long omap_sram_start;
70static void __iomem *omap_sram_base; 70static void __iomem *omap_sram_base;
71static unsigned long omap_sram_skip;
71static unsigned long omap_sram_size; 72static unsigned long omap_sram_size;
72static void __iomem *omap_sram_ceil; 73static void __iomem *omap_sram_ceil;
73 74
@@ -106,6 +107,7 @@ static int is_sram_locked(void)
106 */ 107 */
107static void __init omap_detect_sram(void) 108static void __init omap_detect_sram(void)
108{ 109{
110 omap_sram_skip = SRAM_BOOTLOADER_SZ;
109 if (cpu_class_is_omap2()) { 111 if (cpu_class_is_omap2()) {
110 if (is_sram_locked()) { 112 if (is_sram_locked()) {
111 if (cpu_is_omap34xx()) { 113 if (cpu_is_omap34xx()) {
@@ -113,6 +115,7 @@ static void __init omap_detect_sram(void)
113 if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) || 115 if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) ||
114 (omap_type() == OMAP2_DEVICE_TYPE_SEC)) { 116 (omap_type() == OMAP2_DEVICE_TYPE_SEC)) {
115 omap_sram_size = 0x7000; /* 28K */ 117 omap_sram_size = 0x7000; /* 28K */
118 omap_sram_skip += SZ_16K;
116 } else { 119 } else {
117 omap_sram_size = 0x8000; /* 32K */ 120 omap_sram_size = 0x8000; /* 32K */
118 } 121 }
@@ -175,8 +178,10 @@ static void __init omap_map_sram(void)
175 return; 178 return;
176 179
177#ifdef CONFIG_OMAP4_ERRATA_I688 180#ifdef CONFIG_OMAP4_ERRATA_I688
181 if (cpu_is_omap44xx()) {
178 omap_sram_start += PAGE_SIZE; 182 omap_sram_start += PAGE_SIZE;
179 omap_sram_size -= SZ_16K; 183 omap_sram_size -= SZ_16K;
184 }
180#endif 185#endif
181 if (cpu_is_omap34xx()) { 186 if (cpu_is_omap34xx()) {
182 /* 187 /*
@@ -203,8 +208,8 @@ static void __init omap_map_sram(void)
203 * Looks like we need to preserve some bootloader code at the 208 * Looks like we need to preserve some bootloader code at the
204 * beginning of SRAM for jumping to flash for reboot to work... 209 * beginning of SRAM for jumping to flash for reboot to work...
205 */ 210 */
206 memset_io(omap_sram_base + SRAM_BOOTLOADER_SZ, 0, 211 memset_io(omap_sram_base + omap_sram_skip, 0,
207 omap_sram_size - SRAM_BOOTLOADER_SZ); 212 omap_sram_size - omap_sram_skip);
208} 213}
209 214
210/* 215/*
@@ -218,7 +223,7 @@ void *omap_sram_push_address(unsigned long size)
218{ 223{
219 unsigned long available, new_ceil = (unsigned long)omap_sram_ceil; 224 unsigned long available, new_ceil = (unsigned long)omap_sram_ceil;
220 225
221 available = omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ); 226 available = omap_sram_ceil - (omap_sram_base + omap_sram_skip);
222 227
223 if (size > available) { 228 if (size > available) {
224 pr_err("Not enough space in SRAM\n"); 229 pr_err("Not enough space in SRAM\n");
diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c
index 65c5eca475e..d1116e2dfbe 100644
--- a/arch/arm/plat-samsung/clock.c
+++ b/arch/arm/plat-samsung/clock.c
@@ -144,6 +144,7 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
144 144
145int clk_set_rate(struct clk *clk, unsigned long rate) 145int clk_set_rate(struct clk *clk, unsigned long rate)
146{ 146{
147 unsigned long flags;
147 int ret; 148 int ret;
148 149
149 if (IS_ERR(clk)) 150 if (IS_ERR(clk))
@@ -159,9 +160,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
159 if (clk->ops == NULL || clk->ops->set_rate == NULL) 160 if (clk->ops == NULL || clk->ops->set_rate == NULL)
160 return -EINVAL; 161 return -EINVAL;
161 162
162 spin_lock(&clocks_lock); 163 spin_lock_irqsave(&clocks_lock, flags);
163 ret = (clk->ops->set_rate)(clk, rate); 164 ret = (clk->ops->set_rate)(clk, rate);
164 spin_unlock(&clocks_lock); 165 spin_unlock_irqrestore(&clocks_lock, flags);
165 166
166 return ret; 167 return ret;
167} 168}
@@ -173,17 +174,18 @@ struct clk *clk_get_parent(struct clk *clk)
173 174
174int clk_set_parent(struct clk *clk, struct clk *parent) 175int clk_set_parent(struct clk *clk, struct clk *parent)
175{ 176{
177 unsigned long flags;
176 int ret = 0; 178 int ret = 0;
177 179
178 if (IS_ERR(clk)) 180 if (IS_ERR(clk))
179 return -EINVAL; 181 return -EINVAL;
180 182
181 spin_lock(&clocks_lock); 183 spin_lock_irqsave(&clocks_lock, flags);
182 184
183 if (clk->ops && clk->ops->set_parent) 185 if (clk->ops && clk->ops->set_parent)
184 ret = (clk->ops->set_parent)(clk, parent); 186 ret = (clk->ops->set_parent)(clk, parent);
185 187
186 spin_unlock(&clocks_lock); 188 spin_unlock_irqrestore(&clocks_lock, flags);
187 189
188 return ret; 190 return ret;
189} 191}
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index f3486192063..c7092e6057c 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -38,6 +38,7 @@ config BLACKFIN
38 select GENERIC_ATOMIC64 38 select GENERIC_ATOMIC64
39 select GENERIC_IRQ_PROBE 39 select GENERIC_IRQ_PROBE
40 select IRQ_PER_CPU if SMP 40 select IRQ_PER_CPU if SMP
41 select USE_GENERIC_SMP_HELPERS if SMP
41 select HAVE_NMI_WATCHDOG if NMI_WATCHDOG 42 select HAVE_NMI_WATCHDOG if NMI_WATCHDOG
42 select GENERIC_SMP_IDLE_THREAD 43 select GENERIC_SMP_IDLE_THREAD
43 select ARCH_USES_GETTIMEOFFSET if !GENERIC_CLOCKEVENTS 44 select ARCH_USES_GETTIMEOFFSET if !GENERIC_CLOCKEVENTS
diff --git a/arch/blackfin/Makefile b/arch/blackfin/Makefile
index d3d7e64ca96..66cf00095b8 100644
--- a/arch/blackfin/Makefile
+++ b/arch/blackfin/Makefile
@@ -20,7 +20,6 @@ endif
20KBUILD_AFLAGS += $(call cc-option,-mno-fdpic) 20KBUILD_AFLAGS += $(call cc-option,-mno-fdpic)
21KBUILD_CFLAGS_MODULE += -mlong-calls 21KBUILD_CFLAGS_MODULE += -mlong-calls
22LDFLAGS += -m elf32bfin 22LDFLAGS += -m elf32bfin
23KALLSYMS += --symbol-prefix=_
24 23
25KBUILD_DEFCONFIG := BF537-STAMP_defconfig 24KBUILD_DEFCONFIG := BF537-STAMP_defconfig
26 25
diff --git a/arch/blackfin/include/asm/smp.h b/arch/blackfin/include/asm/smp.h
index dc3d144b4bb..9631598dcc5 100644
--- a/arch/blackfin/include/asm/smp.h
+++ b/arch/blackfin/include/asm/smp.h
@@ -18,6 +18,8 @@
18#define raw_smp_processor_id() blackfin_core_id() 18#define raw_smp_processor_id() blackfin_core_id()
19 19
20extern void bfin_relocate_coreb_l1_mem(void); 20extern void bfin_relocate_coreb_l1_mem(void);
21extern void arch_send_call_function_single_ipi(int cpu);
22extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
21 23
22#if defined(CONFIG_SMP) && defined(CONFIG_ICACHE_FLUSH_L1) 24#if defined(CONFIG_SMP) && defined(CONFIG_ICACHE_FLUSH_L1)
23asmlinkage void blackfin_icache_flush_range_l1(unsigned long *ptr); 25asmlinkage void blackfin_icache_flush_range_l1(unsigned long *ptr);
diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c
index 00bbe672b3b..a40151306b7 100644
--- a/arch/blackfin/mach-common/smp.c
+++ b/arch/blackfin/mach-common/smp.c
@@ -48,10 +48,13 @@ unsigned long blackfin_iflush_l1_entry[NR_CPUS];
48 48
49struct blackfin_initial_pda __cpuinitdata initial_pda_coreb; 49struct blackfin_initial_pda __cpuinitdata initial_pda_coreb;
50 50
51#define BFIN_IPI_TIMER 0 51enum ipi_message_type {
52#define BFIN_IPI_RESCHEDULE 1 52 BFIN_IPI_TIMER,
53#define BFIN_IPI_CALL_FUNC 2 53 BFIN_IPI_RESCHEDULE,
54#define BFIN_IPI_CPU_STOP 3 54 BFIN_IPI_CALL_FUNC,
55 BFIN_IPI_CALL_FUNC_SINGLE,
56 BFIN_IPI_CPU_STOP,
57};
55 58
56struct blackfin_flush_data { 59struct blackfin_flush_data {
57 unsigned long start; 60 unsigned long start;
@@ -60,35 +63,20 @@ struct blackfin_flush_data {
60 63
61void *secondary_stack; 64void *secondary_stack;
62 65
63
64struct smp_call_struct {
65 void (*func)(void *info);
66 void *info;
67 int wait;
68 cpumask_t *waitmask;
69};
70
71static struct blackfin_flush_data smp_flush_data; 66static struct blackfin_flush_data smp_flush_data;
72 67
73static DEFINE_SPINLOCK(stop_lock); 68static DEFINE_SPINLOCK(stop_lock);
74 69
75struct ipi_message {
76 unsigned long type;
77 struct smp_call_struct call_struct;
78};
79
80/* A magic number - stress test shows this is safe for common cases */ 70/* A magic number - stress test shows this is safe for common cases */
81#define BFIN_IPI_MSGQ_LEN 5 71#define BFIN_IPI_MSGQ_LEN 5
82 72
83/* Simple FIFO buffer, overflow leads to panic */ 73/* Simple FIFO buffer, overflow leads to panic */
84struct ipi_message_queue { 74struct ipi_data {
85 spinlock_t lock;
86 unsigned long count; 75 unsigned long count;
87 unsigned long head; /* head of the queue */ 76 unsigned long bits;
88 struct ipi_message ipi_message[BFIN_IPI_MSGQ_LEN];
89}; 77};
90 78
91static DEFINE_PER_CPU(struct ipi_message_queue, ipi_msg_queue); 79static DEFINE_PER_CPU(struct ipi_data, bfin_ipi);
92 80
93static void ipi_cpu_stop(unsigned int cpu) 81static void ipi_cpu_stop(unsigned int cpu)
94{ 82{
@@ -129,28 +117,6 @@ static void ipi_flush_icache(void *info)
129 blackfin_icache_flush_range(fdata->start, fdata->end); 117 blackfin_icache_flush_range(fdata->start, fdata->end);
130} 118}
131 119
132static void ipi_call_function(unsigned int cpu, struct ipi_message *msg)
133{
134 int wait;
135 void (*func)(void *info);
136 void *info;
137 func = msg->call_struct.func;
138 info = msg->call_struct.info;
139 wait = msg->call_struct.wait;
140 func(info);
141 if (wait) {
142#ifdef __ARCH_SYNC_CORE_DCACHE
143 /*
144 * 'wait' usually means synchronization between CPUs.
145 * Invalidate D cache in case shared data was changed
146 * by func() to ensure cache coherence.
147 */
148 resync_core_dcache();
149#endif
150 cpumask_clear_cpu(cpu, msg->call_struct.waitmask);
151 }
152}
153
154/* Use IRQ_SUPPLE_0 to request reschedule. 120/* Use IRQ_SUPPLE_0 to request reschedule.
155 * When returning from interrupt to user space, 121 * When returning from interrupt to user space,
156 * there is chance to reschedule */ 122 * there is chance to reschedule */
@@ -172,152 +138,95 @@ void ipi_timer(void)
172 138
173static irqreturn_t ipi_handler_int1(int irq, void *dev_instance) 139static irqreturn_t ipi_handler_int1(int irq, void *dev_instance)
174{ 140{
175 struct ipi_message *msg; 141 struct ipi_data *bfin_ipi_data;
176 struct ipi_message_queue *msg_queue;
177 unsigned int cpu = smp_processor_id(); 142 unsigned int cpu = smp_processor_id();
178 unsigned long flags; 143 unsigned long pending;
144 unsigned long msg;
179 145
180 platform_clear_ipi(cpu, IRQ_SUPPLE_1); 146 platform_clear_ipi(cpu, IRQ_SUPPLE_1);
181 147
182 msg_queue = &__get_cpu_var(ipi_msg_queue); 148 bfin_ipi_data = &__get_cpu_var(bfin_ipi);
183 149
184 spin_lock_irqsave(&msg_queue->lock, flags); 150 while ((pending = xchg(&bfin_ipi_data->bits, 0)) != 0) {
185 151 msg = 0;
186 while (msg_queue->count) { 152 do {
187 msg = &msg_queue->ipi_message[msg_queue->head]; 153 msg = find_next_bit(&pending, BITS_PER_LONG, msg + 1);
188 switch (msg->type) { 154 switch (msg) {
189 case BFIN_IPI_TIMER: 155 case BFIN_IPI_TIMER:
190 ipi_timer(); 156 ipi_timer();
191 break; 157 break;
192 case BFIN_IPI_RESCHEDULE: 158 case BFIN_IPI_RESCHEDULE:
193 scheduler_ipi(); 159 scheduler_ipi();
194 break; 160 break;
195 case BFIN_IPI_CALL_FUNC: 161 case BFIN_IPI_CALL_FUNC:
196 ipi_call_function(cpu, msg); 162 generic_smp_call_function_interrupt();
197 break; 163 break;
198 case BFIN_IPI_CPU_STOP: 164
199 ipi_cpu_stop(cpu); 165 case BFIN_IPI_CALL_FUNC_SINGLE:
200 break; 166 generic_smp_call_function_single_interrupt();
201 default: 167 break;
202 printk(KERN_CRIT "CPU%u: Unknown IPI message 0x%lx\n", 168
203 cpu, msg->type); 169 case BFIN_IPI_CPU_STOP:
204 break; 170 ipi_cpu_stop(cpu);
205 } 171 break;
206 msg_queue->head++; 172 }
207 msg_queue->head %= BFIN_IPI_MSGQ_LEN; 173 } while (msg < BITS_PER_LONG);
208 msg_queue->count--; 174
175 smp_mb();
209 } 176 }
210 spin_unlock_irqrestore(&msg_queue->lock, flags);
211 return IRQ_HANDLED; 177 return IRQ_HANDLED;
212} 178}
213 179
214static void ipi_queue_init(void) 180static void bfin_ipi_init(void)
215{ 181{
216 unsigned int cpu; 182 unsigned int cpu;
217 struct ipi_message_queue *msg_queue; 183 struct ipi_data *bfin_ipi_data;
218 for_each_possible_cpu(cpu) { 184 for_each_possible_cpu(cpu) {
219 msg_queue = &per_cpu(ipi_msg_queue, cpu); 185 bfin_ipi_data = &per_cpu(bfin_ipi, cpu);
220 spin_lock_init(&msg_queue->lock); 186 bfin_ipi_data->bits = 0;
221 msg_queue->count = 0; 187 bfin_ipi_data->count = 0;
222 msg_queue->head = 0;
223 } 188 }
224} 189}
225 190
226static inline void smp_send_message(cpumask_t callmap, unsigned long type, 191void send_ipi(const struct cpumask *cpumask, enum ipi_message_type msg)
227 void (*func) (void *info), void *info, int wait)
228{ 192{
229 unsigned int cpu; 193 unsigned int cpu;
230 struct ipi_message_queue *msg_queue; 194 struct ipi_data *bfin_ipi_data;
231 struct ipi_message *msg; 195 unsigned long flags;
232 unsigned long flags, next_msg; 196
233 cpumask_t waitmask; /* waitmask is shared by all cpus */ 197 local_irq_save(flags);
234 198
235 cpumask_copy(&waitmask, &callmap); 199 for_each_cpu(cpu, cpumask) {
236 for_each_cpu(cpu, &callmap) { 200 bfin_ipi_data = &per_cpu(bfin_ipi, cpu);
237 msg_queue = &per_cpu(ipi_msg_queue, cpu); 201 smp_mb();
238 spin_lock_irqsave(&msg_queue->lock, flags); 202 set_bit(msg, &bfin_ipi_data->bits);
239 if (msg_queue->count < BFIN_IPI_MSGQ_LEN) { 203 bfin_ipi_data->count++;
240 next_msg = (msg_queue->head + msg_queue->count)
241 % BFIN_IPI_MSGQ_LEN;
242 msg = &msg_queue->ipi_message[next_msg];
243 msg->type = type;
244 if (type == BFIN_IPI_CALL_FUNC) {
245 msg->call_struct.func = func;
246 msg->call_struct.info = info;
247 msg->call_struct.wait = wait;
248 msg->call_struct.waitmask = &waitmask;
249 }
250 msg_queue->count++;
251 } else
252 panic("IPI message queue overflow\n");
253 spin_unlock_irqrestore(&msg_queue->lock, flags);
254 platform_send_ipi_cpu(cpu, IRQ_SUPPLE_1); 204 platform_send_ipi_cpu(cpu, IRQ_SUPPLE_1);
255 } 205 }
256 206
257 if (wait) { 207 local_irq_restore(flags);
258 while (!cpumask_empty(&waitmask))
259 blackfin_dcache_invalidate_range(
260 (unsigned long)(&waitmask),
261 (unsigned long)(&waitmask));
262#ifdef __ARCH_SYNC_CORE_DCACHE
263 /*
264 * Invalidate D cache in case shared data was changed by
265 * other processors to ensure cache coherence.
266 */
267 resync_core_dcache();
268#endif
269 }
270} 208}
271 209
272int smp_call_function(void (*func)(void *info), void *info, int wait) 210void arch_send_call_function_single_ipi(int cpu)
273{ 211{
274 cpumask_t callmap; 212 send_ipi(cpumask_of(cpu), BFIN_IPI_CALL_FUNC_SINGLE);
275
276 preempt_disable();
277 cpumask_copy(&callmap, cpu_online_mask);
278 cpumask_clear_cpu(smp_processor_id(), &callmap);
279 if (!cpumask_empty(&callmap))
280 smp_send_message(callmap, BFIN_IPI_CALL_FUNC, func, info, wait);
281
282 preempt_enable();
283
284 return 0;
285} 213}
286EXPORT_SYMBOL_GPL(smp_call_function);
287 214
288int smp_call_function_single(int cpuid, void (*func) (void *info), void *info, 215void arch_send_call_function_ipi_mask(const struct cpumask *mask)
289 int wait)
290{ 216{
291 unsigned int cpu = cpuid; 217 send_ipi(mask, BFIN_IPI_CALL_FUNC);
292 cpumask_t callmap;
293
294 if (cpu_is_offline(cpu))
295 return 0;
296 cpumask_clear(&callmap);
297 cpumask_set_cpu(cpu, &callmap);
298
299 smp_send_message(callmap, BFIN_IPI_CALL_FUNC, func, info, wait);
300
301 return 0;
302} 218}
303EXPORT_SYMBOL_GPL(smp_call_function_single);
304 219
305void smp_send_reschedule(int cpu) 220void smp_send_reschedule(int cpu)
306{ 221{
307 cpumask_t callmap; 222 send_ipi(cpumask_of(cpu), BFIN_IPI_RESCHEDULE);
308 /* simply trigger an ipi */
309
310 cpumask_clear(&callmap);
311 cpumask_set_cpu(cpu, &callmap);
312
313 smp_send_message(callmap, BFIN_IPI_RESCHEDULE, NULL, NULL, 0);
314 223
315 return; 224 return;
316} 225}
317 226
318void smp_send_msg(const struct cpumask *mask, unsigned long type) 227void smp_send_msg(const struct cpumask *mask, unsigned long type)
319{ 228{
320 smp_send_message(*mask, type, NULL, NULL, 0); 229 send_ipi(mask, type);
321} 230}
322 231
323void smp_timer_broadcast(const struct cpumask *mask) 232void smp_timer_broadcast(const struct cpumask *mask)
@@ -333,7 +242,7 @@ void smp_send_stop(void)
333 cpumask_copy(&callmap, cpu_online_mask); 242 cpumask_copy(&callmap, cpu_online_mask);
334 cpumask_clear_cpu(smp_processor_id(), &callmap); 243 cpumask_clear_cpu(smp_processor_id(), &callmap);
335 if (!cpumask_empty(&callmap)) 244 if (!cpumask_empty(&callmap))
336 smp_send_message(callmap, BFIN_IPI_CPU_STOP, NULL, NULL, 0); 245 send_ipi(&callmap, BFIN_IPI_CPU_STOP);
337 246
338 preempt_enable(); 247 preempt_enable();
339 248
@@ -436,7 +345,7 @@ void __init smp_prepare_boot_cpu(void)
436void __init smp_prepare_cpus(unsigned int max_cpus) 345void __init smp_prepare_cpus(unsigned int max_cpus)
437{ 346{
438 platform_prepare_cpus(max_cpus); 347 platform_prepare_cpus(max_cpus);
439 ipi_queue_init(); 348 bfin_ipi_init();
440 platform_request_ipi(IRQ_SUPPLE_0, ipi_handler_int0); 349 platform_request_ipi(IRQ_SUPPLE_0, ipi_handler_int0);
441 platform_request_ipi(IRQ_SUPPLE_1, ipi_handler_int1); 350 platform_request_ipi(IRQ_SUPPLE_1, ipi_handler_int1);
442} 351}
diff --git a/arch/m68k/platform/coldfire/clk.c b/arch/m68k/platform/coldfire/clk.c
index 75f9ee967ea..9cd13b4ce42 100644
--- a/arch/m68k/platform/coldfire/clk.c
+++ b/arch/m68k/platform/coldfire/clk.c
@@ -146,9 +146,3 @@ struct clk_ops clk_ops1 = {
146}; 146};
147#endif /* MCFPM_PPMCR1 */ 147#endif /* MCFPM_PPMCR1 */
148#endif /* MCFPM_PPMCR0 */ 148#endif /* MCFPM_PPMCR0 */
149
150struct clk *devm_clk_get(struct device *dev, const char *id)
151{
152 return NULL;
153}
154EXPORT_SYMBOL(devm_clk_get);
diff --git a/arch/mips/kernel/smp-cmp.c b/arch/mips/kernel/smp-cmp.c
index e7e03ecf549..afc379ca375 100644
--- a/arch/mips/kernel/smp-cmp.c
+++ b/arch/mips/kernel/smp-cmp.c
@@ -102,7 +102,7 @@ static void cmp_init_secondary(void)
102 c->vpe_id = (read_c0_tcbind() >> TCBIND_CURVPE_SHIFT) & TCBIND_CURVPE; 102 c->vpe_id = (read_c0_tcbind() >> TCBIND_CURVPE_SHIFT) & TCBIND_CURVPE;
103#endif 103#endif
104#ifdef CONFIG_MIPS_MT_SMTC 104#ifdef CONFIG_MIPS_MT_SMTC
105 c->tc_id = (read_c0_tcbind() >> TCBIND_CURTC_SHIFT) & TCBIND_CURTC; 105 c->tc_id = (read_c0_tcbind() & TCBIND_CURTC) >> TCBIND_CURTC_SHIFT;
106#endif 106#endif
107} 107}
108 108
diff --git a/arch/mips/mm/gup.c b/arch/mips/mm/gup.c
index 33aadbcf170..dcfd573871c 100644
--- a/arch/mips/mm/gup.c
+++ b/arch/mips/mm/gup.c
@@ -152,6 +152,8 @@ static int gup_huge_pud(pud_t pud, unsigned long addr, unsigned long end,
152 do { 152 do {
153 VM_BUG_ON(compound_head(page) != head); 153 VM_BUG_ON(compound_head(page) != head);
154 pages[*nr] = page; 154 pages[*nr] = page;
155 if (PageTail(page))
156 get_huge_page_tail(page);
155 (*nr)++; 157 (*nr)++;
156 page++; 158 page++;
157 refs++; 159 refs++;
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c
index 7b13a4caeea..fea823f1847 100644
--- a/arch/mips/mti-malta/malta-int.c
+++ b/arch/mips/mti-malta/malta-int.c
@@ -273,16 +273,19 @@ asmlinkage void plat_irq_dispatch(void)
273 unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM; 273 unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
274 int irq; 274 int irq;
275 275
276 if (unlikely(!pending)) {
277 spurious_interrupt();
278 return;
279 }
280
276 irq = irq_ffs(pending); 281 irq = irq_ffs(pending);
277 282
278 if (irq == MIPSCPU_INT_I8259A) 283 if (irq == MIPSCPU_INT_I8259A)
279 malta_hw0_irqdispatch(); 284 malta_hw0_irqdispatch();
280 else if (gic_present && ((1 << irq) & ipi_map[smp_processor_id()])) 285 else if (gic_present && ((1 << irq) & ipi_map[smp_processor_id()]))
281 malta_ipi_irqdispatch(); 286 malta_ipi_irqdispatch();
282 else if (irq >= 0)
283 do_IRQ(MIPS_CPU_IRQ_BASE + irq);
284 else 287 else
285 spurious_interrupt(); 288 do_IRQ(MIPS_CPU_IRQ_BASE + irq);
286} 289}
287 290
288#ifdef CONFIG_MIPS_MT_SMP 291#ifdef CONFIG_MIPS_MT_SMP
diff --git a/arch/mips/mti-malta/malta-platform.c b/arch/mips/mti-malta/malta-platform.c
index 4c35301720e..80562b81f0f 100644
--- a/arch/mips/mti-malta/malta-platform.c
+++ b/arch/mips/mti-malta/malta-platform.c
@@ -138,11 +138,6 @@ static int __init malta_add_devices(void)
138 if (err) 138 if (err)
139 return err; 139 return err;
140 140
141 /*
142 * Set RTC to BCD mode to support current alarm code.
143 */
144 CMOS_WRITE(CMOS_READ(RTC_CONTROL) & ~RTC_DM_BINARY, RTC_CONTROL);
145
146 return 0; 141 return 0;
147} 142}
148 143
diff --git a/arch/s390/include/asm/hugetlb.h b/arch/s390/include/asm/hugetlb.h
index 799ed0f1643..2d6e6e38056 100644
--- a/arch/s390/include/asm/hugetlb.h
+++ b/arch/s390/include/asm/hugetlb.h
@@ -66,16 +66,6 @@ static inline pte_t huge_ptep_get(pte_t *ptep)
66 return pte; 66 return pte;
67} 67}
68 68
69static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
70 unsigned long addr, pte_t *ptep)
71{
72 pte_t pte = huge_ptep_get(ptep);
73
74 mm->context.flush_mm = 1;
75 pmd_clear((pmd_t *) ptep);
76 return pte;
77}
78
79static inline void __pmd_csp(pmd_t *pmdp) 69static inline void __pmd_csp(pmd_t *pmdp)
80{ 70{
81 register unsigned long reg2 asm("2") = pmd_val(*pmdp); 71 register unsigned long reg2 asm("2") = pmd_val(*pmdp);
@@ -117,6 +107,15 @@ static inline void huge_ptep_invalidate(struct mm_struct *mm,
117 __pmd_csp(pmdp); 107 __pmd_csp(pmdp);
118} 108}
119 109
110static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
111 unsigned long addr, pte_t *ptep)
112{
113 pte_t pte = huge_ptep_get(ptep);
114
115 huge_ptep_invalidate(mm, addr, ptep);
116 return pte;
117}
118
120#define huge_ptep_set_access_flags(__vma, __addr, __ptep, __entry, __dirty) \ 119#define huge_ptep_set_access_flags(__vma, __addr, __ptep, __entry, __dirty) \
121({ \ 120({ \
122 int __changed = !pte_same(huge_ptep_get(__ptep), __entry); \ 121 int __changed = !pte_same(huge_ptep_get(__ptep), __entry); \
@@ -131,10 +130,7 @@ static inline void huge_ptep_invalidate(struct mm_struct *mm,
131({ \ 130({ \
132 pte_t __pte = huge_ptep_get(__ptep); \ 131 pte_t __pte = huge_ptep_get(__ptep); \
133 if (pte_write(__pte)) { \ 132 if (pte_write(__pte)) { \
134 (__mm)->context.flush_mm = 1; \ 133 huge_ptep_invalidate(__mm, __addr, __ptep); \
135 if (atomic_read(&(__mm)->context.attach_count) > 1 || \
136 (__mm) != current->active_mm) \
137 huge_ptep_invalidate(__mm, __addr, __ptep); \
138 set_huge_pte_at(__mm, __addr, __ptep, \ 134 set_huge_pte_at(__mm, __addr, __ptep, \
139 huge_pte_wrprotect(__pte)); \ 135 huge_pte_wrprotect(__pte)); \
140 } \ 136 } \
diff --git a/arch/s390/include/asm/tlbflush.h b/arch/s390/include/asm/tlbflush.h
index 9fde315f3a7..1d8fe2b17ef 100644
--- a/arch/s390/include/asm/tlbflush.h
+++ b/arch/s390/include/asm/tlbflush.h
@@ -90,12 +90,10 @@ static inline void __tlb_flush_mm(struct mm_struct * mm)
90 90
91static inline void __tlb_flush_mm_cond(struct mm_struct * mm) 91static inline void __tlb_flush_mm_cond(struct mm_struct * mm)
92{ 92{
93 spin_lock(&mm->page_table_lock);
94 if (mm->context.flush_mm) { 93 if (mm->context.flush_mm) {
95 __tlb_flush_mm(mm); 94 __tlb_flush_mm(mm);
96 mm->context.flush_mm = 0; 95 mm->context.flush_mm = 0;
97 } 96 }
98 spin_unlock(&mm->page_table_lock);
99} 97}
100 98
101/* 99/*
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index f86c81e13c3..40b57693de3 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -974,11 +974,13 @@ static void __init setup_hwcaps(void)
974 if (MACHINE_HAS_HPAGE) 974 if (MACHINE_HAS_HPAGE)
975 elf_hwcap |= HWCAP_S390_HPAGE; 975 elf_hwcap |= HWCAP_S390_HPAGE;
976 976
977#if defined(CONFIG_64BIT)
977 /* 978 /*
978 * 64-bit register support for 31-bit processes 979 * 64-bit register support for 31-bit processes
979 * HWCAP_S390_HIGH_GPRS is bit 9. 980 * HWCAP_S390_HIGH_GPRS is bit 9.
980 */ 981 */
981 elf_hwcap |= HWCAP_S390_HIGH_GPRS; 982 elf_hwcap |= HWCAP_S390_HIGH_GPRS;
983#endif
982 984
983 get_cpu_id(&cpu_id); 985 get_cpu_id(&cpu_id);
984 switch (cpu_id.machine) { 986 switch (cpu_id.machine) {
diff --git a/arch/s390/lib/uaccess_pt.c b/arch/s390/lib/uaccess_pt.c
index 60ee2b88379..2d37bb861fa 100644
--- a/arch/s390/lib/uaccess_pt.c
+++ b/arch/s390/lib/uaccess_pt.c
@@ -2,69 +2,82 @@
2 * User access functions based on page table walks for enhanced 2 * User access functions based on page table walks for enhanced
3 * system layout without hardware support. 3 * system layout without hardware support.
4 * 4 *
5 * Copyright IBM Corp. 2006 5 * Copyright IBM Corp. 2006, 2012
6 * Author(s): Gerald Schaefer (gerald.schaefer@de.ibm.com) 6 * Author(s): Gerald Schaefer (gerald.schaefer@de.ibm.com)
7 */ 7 */
8 8
9#include <linux/errno.h> 9#include <linux/errno.h>
10#include <linux/hardirq.h> 10#include <linux/hardirq.h>
11#include <linux/mm.h> 11#include <linux/mm.h>
12#include <linux/hugetlb.h>
12#include <asm/uaccess.h> 13#include <asm/uaccess.h>
13#include <asm/futex.h> 14#include <asm/futex.h>
14#include "uaccess.h" 15#include "uaccess.h"
15 16
16static inline pte_t *follow_table(struct mm_struct *mm, unsigned long addr) 17
18/*
19 * Returns kernel address for user virtual address. If the returned address is
20 * >= -4095 (IS_ERR_VALUE(x) returns true), a fault has occured and the address
21 * contains the (negative) exception code.
22 */
23static __always_inline unsigned long follow_table(struct mm_struct *mm,
24 unsigned long addr, int write)
17{ 25{
18 pgd_t *pgd; 26 pgd_t *pgd;
19 pud_t *pud; 27 pud_t *pud;
20 pmd_t *pmd; 28 pmd_t *pmd;
29 pte_t *ptep;
21 30
22 pgd = pgd_offset(mm, addr); 31 pgd = pgd_offset(mm, addr);
23 if (pgd_none(*pgd) || unlikely(pgd_bad(*pgd))) 32 if (pgd_none(*pgd) || unlikely(pgd_bad(*pgd)))
24 return (pte_t *) 0x3a; 33 return -0x3aUL;
25 34
26 pud = pud_offset(pgd, addr); 35 pud = pud_offset(pgd, addr);
27 if (pud_none(*pud) || unlikely(pud_bad(*pud))) 36 if (pud_none(*pud) || unlikely(pud_bad(*pud)))
28 return (pte_t *) 0x3b; 37 return -0x3bUL;
29 38
30 pmd = pmd_offset(pud, addr); 39 pmd = pmd_offset(pud, addr);
31 if (pmd_none(*pmd) || unlikely(pmd_bad(*pmd))) 40 if (pmd_none(*pmd))
32 return (pte_t *) 0x10; 41 return -0x10UL;
42 if (pmd_huge(*pmd)) {
43 if (write && (pmd_val(*pmd) & _SEGMENT_ENTRY_RO))
44 return -0x04UL;
45 return (pmd_val(*pmd) & HPAGE_MASK) + (addr & ~HPAGE_MASK);
46 }
47 if (unlikely(pmd_bad(*pmd)))
48 return -0x10UL;
49
50 ptep = pte_offset_map(pmd, addr);
51 if (!pte_present(*ptep))
52 return -0x11UL;
53 if (write && !pte_write(*ptep))
54 return -0x04UL;
33 55
34 return pte_offset_map(pmd, addr); 56 return (pte_val(*ptep) & PAGE_MASK) + (addr & ~PAGE_MASK);
35} 57}
36 58
37static __always_inline size_t __user_copy_pt(unsigned long uaddr, void *kptr, 59static __always_inline size_t __user_copy_pt(unsigned long uaddr, void *kptr,
38 size_t n, int write_user) 60 size_t n, int write_user)
39{ 61{
40 struct mm_struct *mm = current->mm; 62 struct mm_struct *mm = current->mm;
41 unsigned long offset, pfn, done, size; 63 unsigned long offset, done, size, kaddr;
42 pte_t *pte;
43 void *from, *to; 64 void *from, *to;
44 65
45 done = 0; 66 done = 0;
46retry: 67retry:
47 spin_lock(&mm->page_table_lock); 68 spin_lock(&mm->page_table_lock);
48 do { 69 do {
49 pte = follow_table(mm, uaddr); 70 kaddr = follow_table(mm, uaddr, write_user);
50 if ((unsigned long) pte < 0x1000) 71 if (IS_ERR_VALUE(kaddr))
51 goto fault; 72 goto fault;
52 if (!pte_present(*pte)) {
53 pte = (pte_t *) 0x11;
54 goto fault;
55 } else if (write_user && !pte_write(*pte)) {
56 pte = (pte_t *) 0x04;
57 goto fault;
58 }
59 73
60 pfn = pte_pfn(*pte); 74 offset = uaddr & ~PAGE_MASK;
61 offset = uaddr & (PAGE_SIZE - 1);
62 size = min(n - done, PAGE_SIZE - offset); 75 size = min(n - done, PAGE_SIZE - offset);
63 if (write_user) { 76 if (write_user) {
64 to = (void *)((pfn << PAGE_SHIFT) + offset); 77 to = (void *) kaddr;
65 from = kptr + done; 78 from = kptr + done;
66 } else { 79 } else {
67 from = (void *)((pfn << PAGE_SHIFT) + offset); 80 from = (void *) kaddr;
68 to = kptr + done; 81 to = kptr + done;
69 } 82 }
70 memcpy(to, from, size); 83 memcpy(to, from, size);
@@ -75,7 +88,7 @@ retry:
75 return n - done; 88 return n - done;
76fault: 89fault:
77 spin_unlock(&mm->page_table_lock); 90 spin_unlock(&mm->page_table_lock);
78 if (__handle_fault(uaddr, (unsigned long) pte, write_user)) 91 if (__handle_fault(uaddr, -kaddr, write_user))
79 return n - done; 92 return n - done;
80 goto retry; 93 goto retry;
81} 94}
@@ -84,27 +97,22 @@ fault:
84 * Do DAT for user address by page table walk, return kernel address. 97 * Do DAT for user address by page table walk, return kernel address.
85 * This function needs to be called with current->mm->page_table_lock held. 98 * This function needs to be called with current->mm->page_table_lock held.
86 */ 99 */
87static __always_inline unsigned long __dat_user_addr(unsigned long uaddr) 100static __always_inline unsigned long __dat_user_addr(unsigned long uaddr,
101 int write)
88{ 102{
89 struct mm_struct *mm = current->mm; 103 struct mm_struct *mm = current->mm;
90 unsigned long pfn; 104 unsigned long kaddr;
91 pte_t *pte;
92 int rc; 105 int rc;
93 106
94retry: 107retry:
95 pte = follow_table(mm, uaddr); 108 kaddr = follow_table(mm, uaddr, write);
96 if ((unsigned long) pte < 0x1000) 109 if (IS_ERR_VALUE(kaddr))
97 goto fault;
98 if (!pte_present(*pte)) {
99 pte = (pte_t *) 0x11;
100 goto fault; 110 goto fault;
101 }
102 111
103 pfn = pte_pfn(*pte); 112 return kaddr;
104 return (pfn << PAGE_SHIFT) + (uaddr & (PAGE_SIZE - 1));
105fault: 113fault:
106 spin_unlock(&mm->page_table_lock); 114 spin_unlock(&mm->page_table_lock);
107 rc = __handle_fault(uaddr, (unsigned long) pte, 0); 115 rc = __handle_fault(uaddr, -kaddr, write);
108 spin_lock(&mm->page_table_lock); 116 spin_lock(&mm->page_table_lock);
109 if (!rc) 117 if (!rc)
110 goto retry; 118 goto retry;
@@ -159,11 +167,9 @@ static size_t clear_user_pt(size_t n, void __user *to)
159 167
160static size_t strnlen_user_pt(size_t count, const char __user *src) 168static size_t strnlen_user_pt(size_t count, const char __user *src)
161{ 169{
162 char *addr;
163 unsigned long uaddr = (unsigned long) src; 170 unsigned long uaddr = (unsigned long) src;
164 struct mm_struct *mm = current->mm; 171 struct mm_struct *mm = current->mm;
165 unsigned long offset, pfn, done, len; 172 unsigned long offset, done, len, kaddr;
166 pte_t *pte;
167 size_t len_str; 173 size_t len_str;
168 174
169 if (segment_eq(get_fs(), KERNEL_DS)) 175 if (segment_eq(get_fs(), KERNEL_DS))
@@ -172,19 +178,13 @@ static size_t strnlen_user_pt(size_t count, const char __user *src)
172retry: 178retry:
173 spin_lock(&mm->page_table_lock); 179 spin_lock(&mm->page_table_lock);
174 do { 180 do {
175 pte = follow_table(mm, uaddr); 181 kaddr = follow_table(mm, uaddr, 0);
176 if ((unsigned long) pte < 0x1000) 182 if (IS_ERR_VALUE(kaddr))
177 goto fault;
178 if (!pte_present(*pte)) {
179 pte = (pte_t *) 0x11;
180 goto fault; 183 goto fault;
181 }
182 184
183 pfn = pte_pfn(*pte); 185 offset = uaddr & ~PAGE_MASK;
184 offset = uaddr & (PAGE_SIZE-1);
185 addr = (char *)(pfn << PAGE_SHIFT) + offset;
186 len = min(count - done, PAGE_SIZE - offset); 186 len = min(count - done, PAGE_SIZE - offset);
187 len_str = strnlen(addr, len); 187 len_str = strnlen((char *) kaddr, len);
188 done += len_str; 188 done += len_str;
189 uaddr += len_str; 189 uaddr += len_str;
190 } while ((len_str == len) && (done < count)); 190 } while ((len_str == len) && (done < count));
@@ -192,7 +192,7 @@ retry:
192 return done + 1; 192 return done + 1;
193fault: 193fault:
194 spin_unlock(&mm->page_table_lock); 194 spin_unlock(&mm->page_table_lock);
195 if (__handle_fault(uaddr, (unsigned long) pte, 0)) 195 if (__handle_fault(uaddr, -kaddr, 0))
196 return 0; 196 return 0;
197 goto retry; 197 goto retry;
198} 198}
@@ -225,11 +225,10 @@ static size_t copy_in_user_pt(size_t n, void __user *to,
225 const void __user *from) 225 const void __user *from)
226{ 226{
227 struct mm_struct *mm = current->mm; 227 struct mm_struct *mm = current->mm;
228 unsigned long offset_from, offset_to, offset_max, pfn_from, pfn_to, 228 unsigned long offset_max, uaddr, done, size, error_code;
229 uaddr, done, size, error_code;
230 unsigned long uaddr_from = (unsigned long) from; 229 unsigned long uaddr_from = (unsigned long) from;
231 unsigned long uaddr_to = (unsigned long) to; 230 unsigned long uaddr_to = (unsigned long) to;
232 pte_t *pte_from, *pte_to; 231 unsigned long kaddr_to, kaddr_from;
233 int write_user; 232 int write_user;
234 233
235 if (segment_eq(get_fs(), KERNEL_DS)) { 234 if (segment_eq(get_fs(), KERNEL_DS)) {
@@ -242,38 +241,23 @@ retry:
242 do { 241 do {
243 write_user = 0; 242 write_user = 0;
244 uaddr = uaddr_from; 243 uaddr = uaddr_from;
245 pte_from = follow_table(mm, uaddr_from); 244 kaddr_from = follow_table(mm, uaddr_from, 0);
246 error_code = (unsigned long) pte_from; 245 error_code = kaddr_from;
247 if (error_code < 0x1000) 246 if (IS_ERR_VALUE(error_code))
248 goto fault;
249 if (!pte_present(*pte_from)) {
250 error_code = 0x11;
251 goto fault; 247 goto fault;
252 }
253 248
254 write_user = 1; 249 write_user = 1;
255 uaddr = uaddr_to; 250 uaddr = uaddr_to;
256 pte_to = follow_table(mm, uaddr_to); 251 kaddr_to = follow_table(mm, uaddr_to, 1);
257 error_code = (unsigned long) pte_to; 252 error_code = (unsigned long) kaddr_to;
258 if (error_code < 0x1000) 253 if (IS_ERR_VALUE(error_code))
259 goto fault;
260 if (!pte_present(*pte_to)) {
261 error_code = 0x11;
262 goto fault; 254 goto fault;
263 } else if (!pte_write(*pte_to)) {
264 error_code = 0x04;
265 goto fault;
266 }
267 255
268 pfn_from = pte_pfn(*pte_from); 256 offset_max = max(uaddr_from & ~PAGE_MASK,
269 pfn_to = pte_pfn(*pte_to); 257 uaddr_to & ~PAGE_MASK);
270 offset_from = uaddr_from & (PAGE_SIZE-1);
271 offset_to = uaddr_from & (PAGE_SIZE-1);
272 offset_max = max(offset_from, offset_to);
273 size = min(n - done, PAGE_SIZE - offset_max); 258 size = min(n - done, PAGE_SIZE - offset_max);
274 259
275 memcpy((void *)(pfn_to << PAGE_SHIFT) + offset_to, 260 memcpy((void *) kaddr_to, (void *) kaddr_from, size);
276 (void *)(pfn_from << PAGE_SHIFT) + offset_from, size);
277 done += size; 261 done += size;
278 uaddr_from += size; 262 uaddr_from += size;
279 uaddr_to += size; 263 uaddr_to += size;
@@ -282,7 +266,7 @@ retry:
282 return n - done; 266 return n - done;
283fault: 267fault:
284 spin_unlock(&mm->page_table_lock); 268 spin_unlock(&mm->page_table_lock);
285 if (__handle_fault(uaddr, error_code, write_user)) 269 if (__handle_fault(uaddr, -error_code, write_user))
286 return n - done; 270 return n - done;
287 goto retry; 271 goto retry;
288} 272}
@@ -341,7 +325,7 @@ int futex_atomic_op_pt(int op, u32 __user *uaddr, int oparg, int *old)
341 return __futex_atomic_op_pt(op, uaddr, oparg, old); 325 return __futex_atomic_op_pt(op, uaddr, oparg, old);
342 spin_lock(&current->mm->page_table_lock); 326 spin_lock(&current->mm->page_table_lock);
343 uaddr = (u32 __force __user *) 327 uaddr = (u32 __force __user *)
344 __dat_user_addr((__force unsigned long) uaddr); 328 __dat_user_addr((__force unsigned long) uaddr, 1);
345 if (!uaddr) { 329 if (!uaddr) {
346 spin_unlock(&current->mm->page_table_lock); 330 spin_unlock(&current->mm->page_table_lock);
347 return -EFAULT; 331 return -EFAULT;
@@ -378,7 +362,7 @@ int futex_atomic_cmpxchg_pt(u32 *uval, u32 __user *uaddr,
378 return __futex_atomic_cmpxchg_pt(uval, uaddr, oldval, newval); 362 return __futex_atomic_cmpxchg_pt(uval, uaddr, oldval, newval);
379 spin_lock(&current->mm->page_table_lock); 363 spin_lock(&current->mm->page_table_lock);
380 uaddr = (u32 __force __user *) 364 uaddr = (u32 __force __user *)
381 __dat_user_addr((__force unsigned long) uaddr); 365 __dat_user_addr((__force unsigned long) uaddr, 1);
382 if (!uaddr) { 366 if (!uaddr) {
383 spin_unlock(&current->mm->page_table_lock); 367 spin_unlock(&current->mm->page_table_lock);
384 return -EFAULT; 368 return -EFAULT;
diff --git a/arch/s390/oprofile/init.c b/arch/s390/oprofile/init.c
index a1e9d69a9c9..584b93674ea 100644
--- a/arch/s390/oprofile/init.c
+++ b/arch/s390/oprofile/init.c
@@ -169,7 +169,7 @@ static ssize_t hw_interval_write(struct file *file, char const __user *buf,
169 if (*offset) 169 if (*offset)
170 return -EINVAL; 170 return -EINVAL;
171 retval = oprofilefs_ulong_from_user(&val, buf, count); 171 retval = oprofilefs_ulong_from_user(&val, buf, count);
172 if (retval) 172 if (retval <= 0)
173 return retval; 173 return retval;
174 if (val < oprofile_min_interval) 174 if (val < oprofile_min_interval)
175 oprofile_hw_interval = oprofile_min_interval; 175 oprofile_hw_interval = oprofile_min_interval;
@@ -212,7 +212,7 @@ static ssize_t hwsampler_zero_write(struct file *file, char const __user *buf,
212 return -EINVAL; 212 return -EINVAL;
213 213
214 retval = oprofilefs_ulong_from_user(&val, buf, count); 214 retval = oprofilefs_ulong_from_user(&val, buf, count);
215 if (retval) 215 if (retval <= 0)
216 return retval; 216 return retval;
217 if (val != 0) 217 if (val != 0)
218 return -EINVAL; 218 return -EINVAL;
@@ -243,7 +243,7 @@ static ssize_t hwsampler_kernel_write(struct file *file, char const __user *buf,
243 return -EINVAL; 243 return -EINVAL;
244 244
245 retval = oprofilefs_ulong_from_user(&val, buf, count); 245 retval = oprofilefs_ulong_from_user(&val, buf, count);
246 if (retval) 246 if (retval <= 0)
247 return retval; 247 return retval;
248 248
249 if (val != 0 && val != 1) 249 if (val != 0 && val != 1)
@@ -278,7 +278,7 @@ static ssize_t hwsampler_user_write(struct file *file, char const __user *buf,
278 return -EINVAL; 278 return -EINVAL;
279 279
280 retval = oprofilefs_ulong_from_user(&val, buf, count); 280 retval = oprofilefs_ulong_from_user(&val, buf, count);
281 if (retval) 281 if (retval <= 0)
282 return retval; 282 return retval;
283 283
284 if (val != 0 && val != 1) 284 if (val != 0 && val != 1)
@@ -317,7 +317,7 @@ static ssize_t timer_enabled_write(struct file *file, char const __user *buf,
317 return -EINVAL; 317 return -EINVAL;
318 318
319 retval = oprofilefs_ulong_from_user(&val, buf, count); 319 retval = oprofilefs_ulong_from_user(&val, buf, count);
320 if (retval) 320 if (retval <= 0)
321 return retval; 321 return retval;
322 322
323 if (val != 0 && val != 1) 323 if (val != 0 && val != 1)
diff --git a/arch/sh/kernel/cpu/sh5/entry.S b/arch/sh/kernel/cpu/sh5/entry.S
index b7cf6a547f1..7e605b95592 100644
--- a/arch/sh/kernel/cpu/sh5/entry.S
+++ b/arch/sh/kernel/cpu/sh5/entry.S
@@ -933,7 +933,7 @@ ret_with_reschedule:
933 933
934 pta restore_all, tr1 934 pta restore_all, tr1
935 935
936 movi _TIF_SIGPENDING, r8 936 movi (_TIF_SIGPENDING|_TIF_NOTIFY_RESUME), r8
937 and r8, r7, r8 937 and r8, r7, r8
938 pta work_notifysig, tr0 938 pta work_notifysig, tr0
939 bne r8, ZERO, tr0 939 bne r8, ZERO, tr0
diff --git a/arch/sh/kernel/entry-common.S b/arch/sh/kernel/entry-common.S
index f67601cb3f1..b96489d8b27 100644
--- a/arch/sh/kernel/entry-common.S
+++ b/arch/sh/kernel/entry-common.S
@@ -139,7 +139,7 @@ work_pending:
139 ! r8: current_thread_info 139 ! r8: current_thread_info
140 ! t: result of "tst #_TIF_NEED_RESCHED, r0" 140 ! t: result of "tst #_TIF_NEED_RESCHED, r0"
141 bf/s work_resched 141 bf/s work_resched
142 tst #_TIF_SIGPENDING, r0 142 tst #(_TIF_SIGPENDING | _TIF_NOTIFY_RESUME), r0
143work_notifysig: 143work_notifysig:
144 bt/s __restore_all 144 bt/s __restore_all
145 mov r15, r4 145 mov r15, r4
diff --git a/arch/sparc/kernel/module.c b/arch/sparc/kernel/module.c
index 15e0a169397..f1ddc0d2367 100644
--- a/arch/sparc/kernel/module.c
+++ b/arch/sparc/kernel/module.c
@@ -48,9 +48,7 @@ void *module_alloc(unsigned long size)
48 return NULL; 48 return NULL;
49 49
50 ret = module_map(size); 50 ret = module_map(size);
51 if (!ret) 51 if (ret)
52 ret = ERR_PTR(-ENOMEM);
53 else
54 memset(ret, 0, size); 52 memset(ret, 0, size);
55 53
56 return ret; 54 return ret;
@@ -116,6 +114,10 @@ int apply_relocate_add(Elf_Shdr *sechdrs,
116 v = sym->st_value + rel[i].r_addend; 114 v = sym->st_value + rel[i].r_addend;
117 115
118 switch (ELF_R_TYPE(rel[i].r_info) & 0xff) { 116 switch (ELF_R_TYPE(rel[i].r_info) & 0xff) {
117 case R_SPARC_DISP32:
118 v -= (Elf_Addr) location;
119 *loc32 = v;
120 break;
119#ifdef CONFIG_SPARC64 121#ifdef CONFIG_SPARC64
120 case R_SPARC_64: 122 case R_SPARC_64:
121 location[0] = v >> 56; 123 location[0] = v >> 56;
@@ -128,11 +130,6 @@ int apply_relocate_add(Elf_Shdr *sechdrs,
128 location[7] = v >> 0; 130 location[7] = v >> 0;
129 break; 131 break;
130 132
131 case R_SPARC_DISP32:
132 v -= (Elf_Addr) location;
133 *loc32 = v;
134 break;
135
136 case R_SPARC_WDISP19: 133 case R_SPARC_WDISP19:
137 v -= (Elf_Addr) location; 134 v -= (Elf_Addr) location;
138 *loc32 = (*loc32 & ~0x7ffff) | 135 *loc32 = (*loc32 & ~0x7ffff) |
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 8ec3a1aa4ab..50a1d1f9b6d 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -746,10 +746,10 @@ config SWIOTLB
746 def_bool y if X86_64 746 def_bool y if X86_64
747 ---help--- 747 ---help---
748 Support for software bounce buffers used on x86-64 systems 748 Support for software bounce buffers used on x86-64 systems
749 which don't have a hardware IOMMU (e.g. the current generation 749 which don't have a hardware IOMMU. Using this PCI devices
750 of Intel's x86-64 CPUs). Using this PCI devices which can only 750 which can only access 32-bits of memory can be used on systems
751 access 32-bits of memory can be used on systems with more than 751 with more than 3 GB of memory.
752 3 GB of memory. If unsure, say Y. 752 If unsure, say Y.
753 753
754config IOMMU_HELPER 754config IOMMU_HELPER
755 def_bool (CALGARY_IOMMU || GART_IOMMU || SWIOTLB || AMD_IOMMU) 755 def_bool (CALGARY_IOMMU || GART_IOMMU || SWIOTLB || AMD_IOMMU)
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index 682e9c210ba..474ca35b1bc 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -142,7 +142,7 @@ KBUILD_CFLAGS += $(call cc-option,-mno-avx,)
142KBUILD_CFLAGS += $(mflags-y) 142KBUILD_CFLAGS += $(mflags-y)
143KBUILD_AFLAGS += $(mflags-y) 143KBUILD_AFLAGS += $(mflags-y)
144 144
145archscripts: 145archscripts: scripts_basic
146 $(Q)$(MAKE) $(build)=arch/x86/tools relocs 146 $(Q)$(MAKE) $(build)=arch/x86/tools relocs
147 147
148### 148###
diff --git a/arch/x86/include/asm/xen/page.h b/arch/x86/include/asm/xen/page.h
index 93971e841dd..472b9b78301 100644
--- a/arch/x86/include/asm/xen/page.h
+++ b/arch/x86/include/asm/xen/page.h
@@ -51,7 +51,8 @@ extern unsigned long set_phys_range_identity(unsigned long pfn_s,
51 51
52extern int m2p_add_override(unsigned long mfn, struct page *page, 52extern int m2p_add_override(unsigned long mfn, struct page *page,
53 struct gnttab_map_grant_ref *kmap_op); 53 struct gnttab_map_grant_ref *kmap_op);
54extern int m2p_remove_override(struct page *page, bool clear_pte); 54extern int m2p_remove_override(struct page *page,
55 struct gnttab_map_grant_ref *kmap_op);
55extern struct page *m2p_find_override(unsigned long mfn); 56extern struct page *m2p_find_override(unsigned long mfn);
56extern unsigned long m2p_find_override_pfn(unsigned long mfn, unsigned long pfn); 57extern unsigned long m2p_find_override_pfn(unsigned long mfn, unsigned long pfn);
57 58
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
index 6605a81ba33..8b6defe7eef 100644
--- a/arch/x86/kernel/cpu/perf_event.h
+++ b/arch/x86/kernel/cpu/perf_event.h
@@ -586,6 +586,8 @@ extern struct event_constraint intel_westmere_pebs_event_constraints[];
586 586
587extern struct event_constraint intel_snb_pebs_event_constraints[]; 587extern struct event_constraint intel_snb_pebs_event_constraints[];
588 588
589extern struct event_constraint intel_ivb_pebs_event_constraints[];
590
589struct event_constraint *intel_pebs_constraints(struct perf_event *event); 591struct event_constraint *intel_pebs_constraints(struct perf_event *event);
590 592
591void intel_pmu_pebs_enable(struct perf_event *event); 593void intel_pmu_pebs_enable(struct perf_event *event);
diff --git a/arch/x86/kernel/cpu/perf_event_amd_ibs.c b/arch/x86/kernel/cpu/perf_event_amd_ibs.c
index 7bfb5bec863..eebd5ffe1bb 100644
--- a/arch/x86/kernel/cpu/perf_event_amd_ibs.c
+++ b/arch/x86/kernel/cpu/perf_event_amd_ibs.c
@@ -209,6 +209,15 @@ static int perf_ibs_precise_event(struct perf_event *event, u64 *config)
209 return -EOPNOTSUPP; 209 return -EOPNOTSUPP;
210} 210}
211 211
212static const struct perf_event_attr ibs_notsupp = {
213 .exclude_user = 1,
214 .exclude_kernel = 1,
215 .exclude_hv = 1,
216 .exclude_idle = 1,
217 .exclude_host = 1,
218 .exclude_guest = 1,
219};
220
212static int perf_ibs_init(struct perf_event *event) 221static int perf_ibs_init(struct perf_event *event)
213{ 222{
214 struct hw_perf_event *hwc = &event->hw; 223 struct hw_perf_event *hwc = &event->hw;
@@ -229,6 +238,9 @@ static int perf_ibs_init(struct perf_event *event)
229 if (event->pmu != &perf_ibs->pmu) 238 if (event->pmu != &perf_ibs->pmu)
230 return -ENOENT; 239 return -ENOENT;
231 240
241 if (perf_flags(&event->attr) & perf_flags(&ibs_notsupp))
242 return -EINVAL;
243
232 if (config & ~perf_ibs->config_mask) 244 if (config & ~perf_ibs->config_mask)
233 return -EINVAL; 245 return -EINVAL;
234 246
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 7f2739e03e7..6bca492b854 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -2008,6 +2008,7 @@ __init int intel_pmu_init(void)
2008 break; 2008 break;
2009 2009
2010 case 28: /* Atom */ 2010 case 28: /* Atom */
2011 case 54: /* Cedariew */
2011 memcpy(hw_cache_event_ids, atom_hw_cache_event_ids, 2012 memcpy(hw_cache_event_ids, atom_hw_cache_event_ids,
2012 sizeof(hw_cache_event_ids)); 2013 sizeof(hw_cache_event_ids));
2013 2014
@@ -2047,7 +2048,6 @@ __init int intel_pmu_init(void)
2047 case 42: /* SandyBridge */ 2048 case 42: /* SandyBridge */
2048 case 45: /* SandyBridge, "Romely-EP" */ 2049 case 45: /* SandyBridge, "Romely-EP" */
2049 x86_add_quirk(intel_sandybridge_quirk); 2050 x86_add_quirk(intel_sandybridge_quirk);
2050 case 58: /* IvyBridge */
2051 memcpy(hw_cache_event_ids, snb_hw_cache_event_ids, 2051 memcpy(hw_cache_event_ids, snb_hw_cache_event_ids,
2052 sizeof(hw_cache_event_ids)); 2052 sizeof(hw_cache_event_ids));
2053 memcpy(hw_cache_extra_regs, snb_hw_cache_extra_regs, 2053 memcpy(hw_cache_extra_regs, snb_hw_cache_extra_regs,
@@ -2072,6 +2072,29 @@ __init int intel_pmu_init(void)
2072 2072
2073 pr_cont("SandyBridge events, "); 2073 pr_cont("SandyBridge events, ");
2074 break; 2074 break;
2075 case 58: /* IvyBridge */
2076 memcpy(hw_cache_event_ids, snb_hw_cache_event_ids,
2077 sizeof(hw_cache_event_ids));
2078 memcpy(hw_cache_extra_regs, snb_hw_cache_extra_regs,
2079 sizeof(hw_cache_extra_regs));
2080
2081 intel_pmu_lbr_init_snb();
2082
2083 x86_pmu.event_constraints = intel_snb_event_constraints;
2084 x86_pmu.pebs_constraints = intel_ivb_pebs_event_constraints;
2085 x86_pmu.pebs_aliases = intel_pebs_aliases_snb;
2086 x86_pmu.extra_regs = intel_snb_extra_regs;
2087 /* all extra regs are per-cpu when HT is on */
2088 x86_pmu.er_flags |= ERF_HAS_RSP_1;
2089 x86_pmu.er_flags |= ERF_NO_HT_SHARING;
2090
2091 /* UOPS_ISSUED.ANY,c=1,i=1 to count stall cycles */
2092 intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] =
2093 X86_CONFIG(.event=0x0e, .umask=0x01, .inv=1, .cmask=1);
2094
2095 pr_cont("IvyBridge events, ");
2096 break;
2097
2075 2098
2076 default: 2099 default:
2077 switch (x86_pmu.version) { 2100 switch (x86_pmu.version) {
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
index e38d97bf425..826054a4f2e 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -407,6 +407,20 @@ struct event_constraint intel_snb_pebs_event_constraints[] = {
407 EVENT_CONSTRAINT_END 407 EVENT_CONSTRAINT_END
408}; 408};
409 409
410struct event_constraint intel_ivb_pebs_event_constraints[] = {
411 INTEL_UEVENT_CONSTRAINT(0x01c0, 0x2), /* INST_RETIRED.PRECDIST */
412 INTEL_UEVENT_CONSTRAINT(0x01c2, 0xf), /* UOPS_RETIRED.ALL */
413 INTEL_UEVENT_CONSTRAINT(0x02c2, 0xf), /* UOPS_RETIRED.RETIRE_SLOTS */
414 INTEL_EVENT_CONSTRAINT(0xc4, 0xf), /* BR_INST_RETIRED.* */
415 INTEL_EVENT_CONSTRAINT(0xc5, 0xf), /* BR_MISP_RETIRED.* */
416 INTEL_EVENT_CONSTRAINT(0xcd, 0x8), /* MEM_TRANS_RETIRED.* */
417 INTEL_EVENT_CONSTRAINT(0xd0, 0xf), /* MEM_UOP_RETIRED.* */
418 INTEL_EVENT_CONSTRAINT(0xd1, 0xf), /* MEM_LOAD_UOPS_RETIRED.* */
419 INTEL_EVENT_CONSTRAINT(0xd2, 0xf), /* MEM_LOAD_UOPS_LLC_HIT_RETIRED.* */
420 INTEL_EVENT_CONSTRAINT(0xd3, 0xf), /* MEM_LOAD_UOPS_LLC_MISS_RETIRED.* */
421 EVENT_CONSTRAINT_END
422};
423
410struct event_constraint *intel_pebs_constraints(struct perf_event *event) 424struct event_constraint *intel_pebs_constraints(struct perf_event *event)
411{ 425{
412 struct event_constraint *c; 426 struct event_constraint *c;
diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
index 520b4265fcd..da02e9cc375 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
@@ -686,7 +686,8 @@ void intel_pmu_lbr_init_atom(void)
686 * to have an operational LBR which can freeze 686 * to have an operational LBR which can freeze
687 * on PMU interrupt 687 * on PMU interrupt
688 */ 688 */
689 if (boot_cpu_data.x86_mask < 10) { 689 if (boot_cpu_data.x86_model == 28
690 && boot_cpu_data.x86_mask < 10) {
690 pr_cont("LBR disabled due to erratum"); 691 pr_cont("LBR disabled due to erratum");
691 return; 692 return;
692 } 693 }
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.c b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
index 0a5571080e7..38e4894165b 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
@@ -661,6 +661,11 @@ static void snb_uncore_msr_init_box(struct intel_uncore_box *box)
661 } 661 }
662} 662}
663 663
664static struct uncore_event_desc snb_uncore_events[] = {
665 INTEL_UNCORE_EVENT_DESC(clockticks, "event=0xff,umask=0x00"),
666 { /* end: all zeroes */ },
667};
668
664static struct attribute *snb_uncore_formats_attr[] = { 669static struct attribute *snb_uncore_formats_attr[] = {
665 &format_attr_event.attr, 670 &format_attr_event.attr,
666 &format_attr_umask.attr, 671 &format_attr_umask.attr,
@@ -704,6 +709,7 @@ static struct intel_uncore_type snb_uncore_cbox = {
704 .constraints = snb_uncore_cbox_constraints, 709 .constraints = snb_uncore_cbox_constraints,
705 .ops = &snb_uncore_msr_ops, 710 .ops = &snb_uncore_msr_ops,
706 .format_group = &snb_uncore_format_group, 711 .format_group = &snb_uncore_format_group,
712 .event_descs = snb_uncore_events,
707}; 713};
708 714
709static struct intel_uncore_type *snb_msr_uncores[] = { 715static struct intel_uncore_type *snb_msr_uncores[] = {
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index 4873e62db6a..9e5bcf1e237 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -225,6 +225,9 @@ static ssize_t microcode_write(struct file *file, const char __user *buf,
225 if (do_microcode_update(buf, len) == 0) 225 if (do_microcode_update(buf, len) == 0)
226 ret = (ssize_t)len; 226 ret = (ssize_t)len;
227 227
228 if (ret > 0)
229 perf_check_microcode();
230
228 mutex_unlock(&microcode_mutex); 231 mutex_unlock(&microcode_mutex);
229 put_online_cpus(); 232 put_online_cpus();
230 233
diff --git a/arch/x86/kvm/i8259.c b/arch/x86/kvm/i8259.c
index e498b18f010..9fc9aa7ac70 100644
--- a/arch/x86/kvm/i8259.c
+++ b/arch/x86/kvm/i8259.c
@@ -318,7 +318,7 @@ static void pic_ioport_write(void *opaque, u32 addr, u32 val)
318 if (val & 0x10) { 318 if (val & 0x10) {
319 u8 edge_irr = s->irr & ~s->elcr; 319 u8 edge_irr = s->irr & ~s->elcr;
320 int i; 320 int i;
321 bool found; 321 bool found = false;
322 struct kvm_vcpu *vcpu; 322 struct kvm_vcpu *vcpu;
323 323
324 s->init4 = val & 1; 324 s->init4 = val & 1;
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index c00f03de1b7..b1eb202ee76 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -3619,6 +3619,7 @@ static void seg_setup(int seg)
3619 3619
3620static int alloc_apic_access_page(struct kvm *kvm) 3620static int alloc_apic_access_page(struct kvm *kvm)
3621{ 3621{
3622 struct page *page;
3622 struct kvm_userspace_memory_region kvm_userspace_mem; 3623 struct kvm_userspace_memory_region kvm_userspace_mem;
3623 int r = 0; 3624 int r = 0;
3624 3625
@@ -3633,7 +3634,13 @@ static int alloc_apic_access_page(struct kvm *kvm)
3633 if (r) 3634 if (r)
3634 goto out; 3635 goto out;
3635 3636
3636 kvm->arch.apic_access_page = gfn_to_page(kvm, 0xfee00); 3637 page = gfn_to_page(kvm, 0xfee00);
3638 if (is_error_page(page)) {
3639 r = -EFAULT;
3640 goto out;
3641 }
3642
3643 kvm->arch.apic_access_page = page;
3637out: 3644out:
3638 mutex_unlock(&kvm->slots_lock); 3645 mutex_unlock(&kvm->slots_lock);
3639 return r; 3646 return r;
@@ -3641,6 +3648,7 @@ out:
3641 3648
3642static int alloc_identity_pagetable(struct kvm *kvm) 3649static int alloc_identity_pagetable(struct kvm *kvm)
3643{ 3650{
3651 struct page *page;
3644 struct kvm_userspace_memory_region kvm_userspace_mem; 3652 struct kvm_userspace_memory_region kvm_userspace_mem;
3645 int r = 0; 3653 int r = 0;
3646 3654
@@ -3656,8 +3664,13 @@ static int alloc_identity_pagetable(struct kvm *kvm)
3656 if (r) 3664 if (r)
3657 goto out; 3665 goto out;
3658 3666
3659 kvm->arch.ept_identity_pagetable = gfn_to_page(kvm, 3667 page = gfn_to_page(kvm, kvm->arch.ept_identity_map_addr >> PAGE_SHIFT);
3660 kvm->arch.ept_identity_map_addr >> PAGE_SHIFT); 3668 if (is_error_page(page)) {
3669 r = -EFAULT;
3670 goto out;
3671 }
3672
3673 kvm->arch.ept_identity_pagetable = page;
3661out: 3674out:
3662 mutex_unlock(&kvm->slots_lock); 3675 mutex_unlock(&kvm->slots_lock);
3663 return r; 3676 return r;
@@ -6575,7 +6588,7 @@ static void vmx_cpuid_update(struct kvm_vcpu *vcpu)
6575 /* Exposing INVPCID only when PCID is exposed */ 6588 /* Exposing INVPCID only when PCID is exposed */
6576 best = kvm_find_cpuid_entry(vcpu, 0x7, 0); 6589 best = kvm_find_cpuid_entry(vcpu, 0x7, 0);
6577 if (vmx_invpcid_supported() && 6590 if (vmx_invpcid_supported() &&
6578 best && (best->ecx & bit(X86_FEATURE_INVPCID)) && 6591 best && (best->ebx & bit(X86_FEATURE_INVPCID)) &&
6579 guest_cpuid_has_pcid(vcpu)) { 6592 guest_cpuid_has_pcid(vcpu)) {
6580 exec_control |= SECONDARY_EXEC_ENABLE_INVPCID; 6593 exec_control |= SECONDARY_EXEC_ENABLE_INVPCID;
6581 vmcs_write32(SECONDARY_VM_EXEC_CONTROL, 6594 vmcs_write32(SECONDARY_VM_EXEC_CONTROL,
@@ -6585,7 +6598,7 @@ static void vmx_cpuid_update(struct kvm_vcpu *vcpu)
6585 vmcs_write32(SECONDARY_VM_EXEC_CONTROL, 6598 vmcs_write32(SECONDARY_VM_EXEC_CONTROL,
6586 exec_control); 6599 exec_control);
6587 if (best) 6600 if (best)
6588 best->ecx &= ~bit(X86_FEATURE_INVPCID); 6601 best->ebx &= ~bit(X86_FEATURE_INVPCID);
6589 } 6602 }
6590} 6603}
6591 6604
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 148ed666e31..2966c847d48 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -5113,17 +5113,20 @@ static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5113 !kvm_event_needs_reinjection(vcpu); 5113 !kvm_event_needs_reinjection(vcpu);
5114} 5114}
5115 5115
5116static void vapic_enter(struct kvm_vcpu *vcpu) 5116static int vapic_enter(struct kvm_vcpu *vcpu)
5117{ 5117{
5118 struct kvm_lapic *apic = vcpu->arch.apic; 5118 struct kvm_lapic *apic = vcpu->arch.apic;
5119 struct page *page; 5119 struct page *page;
5120 5120
5121 if (!apic || !apic->vapic_addr) 5121 if (!apic || !apic->vapic_addr)
5122 return; 5122 return 0;
5123 5123
5124 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT); 5124 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5125 if (is_error_page(page))
5126 return -EFAULT;
5125 5127
5126 vcpu->arch.apic->vapic_page = page; 5128 vcpu->arch.apic->vapic_page = page;
5129 return 0;
5127} 5130}
5128 5131
5129static void vapic_exit(struct kvm_vcpu *vcpu) 5132static void vapic_exit(struct kvm_vcpu *vcpu)
@@ -5430,7 +5433,11 @@ static int __vcpu_run(struct kvm_vcpu *vcpu)
5430 } 5433 }
5431 5434
5432 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu); 5435 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5433 vapic_enter(vcpu); 5436 r = vapic_enter(vcpu);
5437 if (r) {
5438 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5439 return r;
5440 }
5434 5441
5435 r = 1; 5442 r = 1;
5436 while (r > 0) { 5443 while (r > 0) {
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index e0e6990723e..ab1f6a93b52 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -319,7 +319,7 @@ unsigned long __init_refok init_memory_mapping(unsigned long start,
319 */ 319 */
320int devmem_is_allowed(unsigned long pagenr) 320int devmem_is_allowed(unsigned long pagenr)
321{ 321{
322 if (pagenr <= 256) 322 if (pagenr < 256)
323 return 1; 323 return 1;
324 if (iomem_is_exclusive(pagenr << PAGE_SHIFT)) 324 if (iomem_is_exclusive(pagenr << PAGE_SHIFT))
325 return 0; 325 return 0;
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 9642d4a3860..1fbe75a95f1 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -1452,6 +1452,10 @@ asmlinkage void __init xen_start_kernel(void)
1452 pci_request_acs(); 1452 pci_request_acs();
1453 1453
1454 xen_acpi_sleep_register(); 1454 xen_acpi_sleep_register();
1455
1456 /* Avoid searching for BIOS MP tables */
1457 x86_init.mpparse.find_smp_config = x86_init_noop;
1458 x86_init.mpparse.get_smp_config = x86_init_uint_noop;
1455 } 1459 }
1456#ifdef CONFIG_PCI 1460#ifdef CONFIG_PCI
1457 /* PCI BIOS service won't work from a PV guest. */ 1461 /* PCI BIOS service won't work from a PV guest. */
diff --git a/arch/x86/xen/p2m.c b/arch/x86/xen/p2m.c
index 76ba0e97e53..72213da605f 100644
--- a/arch/x86/xen/p2m.c
+++ b/arch/x86/xen/p2m.c
@@ -828,9 +828,6 @@ int m2p_add_override(unsigned long mfn, struct page *page,
828 828
829 xen_mc_issue(PARAVIRT_LAZY_MMU); 829 xen_mc_issue(PARAVIRT_LAZY_MMU);
830 } 830 }
831 /* let's use dev_bus_addr to record the old mfn instead */
832 kmap_op->dev_bus_addr = page->index;
833 page->index = (unsigned long) kmap_op;
834 } 831 }
835 spin_lock_irqsave(&m2p_override_lock, flags); 832 spin_lock_irqsave(&m2p_override_lock, flags);
836 list_add(&page->lru, &m2p_overrides[mfn_hash(mfn)]); 833 list_add(&page->lru, &m2p_overrides[mfn_hash(mfn)]);
@@ -857,7 +854,8 @@ int m2p_add_override(unsigned long mfn, struct page *page,
857 return 0; 854 return 0;
858} 855}
859EXPORT_SYMBOL_GPL(m2p_add_override); 856EXPORT_SYMBOL_GPL(m2p_add_override);
860int m2p_remove_override(struct page *page, bool clear_pte) 857int m2p_remove_override(struct page *page,
858 struct gnttab_map_grant_ref *kmap_op)
861{ 859{
862 unsigned long flags; 860 unsigned long flags;
863 unsigned long mfn; 861 unsigned long mfn;
@@ -887,10 +885,8 @@ int m2p_remove_override(struct page *page, bool clear_pte)
887 WARN_ON(!PagePrivate(page)); 885 WARN_ON(!PagePrivate(page));
888 ClearPagePrivate(page); 886 ClearPagePrivate(page);
889 887
890 if (clear_pte) { 888 set_phys_to_machine(pfn, page->index);
891 struct gnttab_map_grant_ref *map_op = 889 if (kmap_op != NULL) {
892 (struct gnttab_map_grant_ref *) page->index;
893 set_phys_to_machine(pfn, map_op->dev_bus_addr);
894 if (!PageHighMem(page)) { 890 if (!PageHighMem(page)) {
895 struct multicall_space mcs; 891 struct multicall_space mcs;
896 struct gnttab_unmap_grant_ref *unmap_op; 892 struct gnttab_unmap_grant_ref *unmap_op;
@@ -902,13 +898,13 @@ int m2p_remove_override(struct page *page, bool clear_pte)
902 * issued. In this case handle is going to -1 because 898 * issued. In this case handle is going to -1 because
903 * it hasn't been modified yet. 899 * it hasn't been modified yet.
904 */ 900 */
905 if (map_op->handle == -1) 901 if (kmap_op->handle == -1)
906 xen_mc_flush(); 902 xen_mc_flush();
907 /* 903 /*
908 * Now if map_op->handle is negative it means that the 904 * Now if kmap_op->handle is negative it means that the
909 * hypercall actually returned an error. 905 * hypercall actually returned an error.
910 */ 906 */
911 if (map_op->handle == GNTST_general_error) { 907 if (kmap_op->handle == GNTST_general_error) {
912 printk(KERN_WARNING "m2p_remove_override: " 908 printk(KERN_WARNING "m2p_remove_override: "
913 "pfn %lx mfn %lx, failed to modify kernel mappings", 909 "pfn %lx mfn %lx, failed to modify kernel mappings",
914 pfn, mfn); 910 pfn, mfn);
@@ -918,8 +914,8 @@ int m2p_remove_override(struct page *page, bool clear_pte)
918 mcs = xen_mc_entry( 914 mcs = xen_mc_entry(
919 sizeof(struct gnttab_unmap_grant_ref)); 915 sizeof(struct gnttab_unmap_grant_ref));
920 unmap_op = mcs.args; 916 unmap_op = mcs.args;
921 unmap_op->host_addr = map_op->host_addr; 917 unmap_op->host_addr = kmap_op->host_addr;
922 unmap_op->handle = map_op->handle; 918 unmap_op->handle = kmap_op->handle;
923 unmap_op->dev_bus_addr = 0; 919 unmap_op->dev_bus_addr = 0;
924 920
925 MULTI_grant_table_op(mcs.mc, 921 MULTI_grant_table_op(mcs.mc,
@@ -930,10 +926,9 @@ int m2p_remove_override(struct page *page, bool clear_pte)
930 set_pte_at(&init_mm, address, ptep, 926 set_pte_at(&init_mm, address, ptep,
931 pfn_pte(pfn, PAGE_KERNEL)); 927 pfn_pte(pfn, PAGE_KERNEL));
932 __flush_tlb_single(address); 928 __flush_tlb_single(address);
933 map_op->host_addr = 0; 929 kmap_op->host_addr = 0;
934 } 930 }
935 } else 931 }
936 set_phys_to_machine(pfn, page->index);
937 932
938 /* p2m(m2p(mfn)) == FOREIGN_FRAME(mfn): the mfn is already present 933 /* p2m(m2p(mfn)) == FOREIGN_FRAME(mfn): the mfn is already present
939 * somewhere in this domain, even before being added to the 934 * somewhere in this domain, even before being added to the
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-22 21:25:08 -0400