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authorOlof Johansson <olof@lixom.net>2012-09-13 01:34:11 -0400
committerOlof Johansson <olof@lixom.net>2012-09-13 01:34:11 -0400
commit025c95a6826ad8acfe871f33c2fa9208beeb38df (patch)
tree220fe156ff60db13bd3a1319f5e20d6b723de5f4 /arch
parent0558d7a8ed44e6e53aadb04d2e23145efb2aa8a4 (diff)
parent7f744b17140af1a9c8804a1c81c9dae6bb52a7fb (diff)
Merge branch 'clk' of git://github.com/hzhuang1/linux into next/cleanup
* 'clk' of git://github.com/hzhuang1/linux: ARM: mmp: remove unused definition in APBC and APMU ARM: mmp: move mmp2 clock definition to separated file arm: mmp: move pxa910 clock definition to separated file arm: mmp: move pxa168 clock definition to separated file arm: mmp: make private clock definition exclude from common clock + Linux 3.6-rc4
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/boot/dts/am33xx.dtsi5
-rw-r--r--arch/arm/boot/dts/imx51-babbage.dts4
-rw-r--r--arch/arm/boot/dts/kirkwood-iconnect.dts6
-rw-r--r--arch/arm/boot/dts/twl6030.dtsi3
-rw-r--r--arch/arm/configs/u8500_defconfig1
-rw-r--r--arch/arm/mach-dove/common.c3
-rw-r--r--arch/arm/mach-exynos/mach-origen.c7
-rw-r--r--arch/arm/mach-exynos/mach-smdkv310.c7
-rw-r--r--arch/arm/mach-imx/Makefile10
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c8
-rw-r--r--arch/arm/mach-imx/headsmp.S (renamed from arch/arm/mach-imx/head-v7.S)0
-rw-r--r--arch/arm/mach-imx/hotplug.c23
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c4
-rw-r--r--arch/arm/mach-kirkwood/Makefile.boot3
-rw-r--r--arch/arm/mach-kirkwood/common.c4
-rw-r--r--arch/arm/mach-mmp/Makefile8
-rw-r--r--arch/arm/mach-mmp/clock-mmp2.c111
-rw-r--r--arch/arm/mach-mmp/clock-pxa168.c91
-rw-r--r--arch/arm/mach-mmp/clock-pxa910.c67
-rw-r--r--arch/arm/mach-mmp/common.h3
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-apbc.h95
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-apmu.h15
-rw-r--r--arch/arm/mach-mmp/mmp2.c71
-rw-r--r--arch/arm/mach-mmp/pxa168.c58
-rw-r--r--arch/arm/mach-mmp/pxa910.c40
-rw-r--r--arch/arm/mach-mmp/sram.c2
-rw-r--r--arch/arm/mach-mv78xx0/addr-map.c2
-rw-r--r--arch/arm/mach-mv78xx0/common.c6
-rw-r--r--arch/arm/mach-omap2/Kconfig3
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c2
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c1
-rw-r--r--arch/arm/mach-omap2/common-board-devices.c11
-rw-r--r--arch/arm/mach-omap2/common-board-devices.h1
-rw-r--r--arch/arm/mach-omap2/cpuidle44xx.c3
-rw-r--r--arch/arm/mach-omap2/mux.h1
-rw-r--r--arch/arm/mach-omap2/opp4xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/pm34xx.c19
-rw-r--r--arch/arm/mach-omap2/sleep44xx.S8
-rw-r--r--arch/arm/mach-omap2/twl-common.c1
-rw-r--r--arch/arm/mach-orion5x/common.c3
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/dma.h3
-rw-r--r--arch/arm/mach-ux500/Kconfig1
-rw-r--r--arch/arm/mach-ux500/board-mop500-msp.c10
-rw-r--r--arch/arm/mach-ux500/board-mop500.c4
-rw-r--r--arch/arm/plat-omap/dmtimer.c6
-rw-r--r--arch/arm/plat-omap/include/plat/cpu.h3
-rw-r--r--arch/arm/plat-omap/include/plat/multi.h9
-rw-r--r--arch/arm/plat-omap/include/plat/uncompress.h4
-rw-r--r--arch/arm/plat-orion/common.c8
-rw-r--r--arch/arm/plat-orion/include/plat/common.h6
-rw-r--r--arch/arm/plat-s3c24xx/dma.c2
-rw-r--r--arch/arm/plat-samsung/devs.c29
-rw-r--r--arch/arm/plat-samsung/include/plat/hdmi.h16
-rw-r--r--arch/arm/plat-samsung/pm.c2
-rw-r--r--arch/mips/Kconfig1
-rw-r--r--arch/mips/alchemy/board-mtx1.c2
-rw-r--r--arch/mips/ath79/dev-usb.c2
-rw-r--r--arch/mips/ath79/gpio.c6
-rw-r--r--arch/mips/bcm63xx/dev-spi.c4
-rw-r--r--arch/mips/cavium-octeon/octeon-irq.c89
-rw-r--r--arch/mips/include/asm/mach-ath79/ar71xx_regs.h3
-rw-r--r--arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h2
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h13
-rw-r--r--arch/mips/include/asm/mach-cavium-octeon/irq.h10
-rw-r--r--arch/mips/include/asm/module.h1
-rw-r--r--arch/mips/include/asm/r4k-timer.h8
-rw-r--r--arch/mips/kernel/module.c43
-rw-r--r--arch/mips/kernel/smp.c4
-rw-r--r--arch/mips/kernel/sync-r4k.c26
-rw-r--r--arch/mips/mti-malta/malta-pci.c13
-rw-r--r--arch/mips/pci/pci-ar724x.c22
-rw-r--r--arch/parisc/include/asm/atomic.h4
-rw-r--r--arch/parisc/kernel/process.c2
-rw-r--r--arch/parisc/kernel/sys_parisc.c8
-rw-r--r--arch/powerpc/boot/dts/fsl/p4080si-post.dtsi7
-rw-r--r--arch/powerpc/configs/85xx/p1023rds_defconfig31
-rw-r--r--arch/powerpc/configs/corenet32_smp_defconfig29
-rw-r--r--arch/powerpc/configs/corenet64_smp_defconfig1
-rw-r--r--arch/powerpc/configs/g5_defconfig103
-rw-r--r--arch/powerpc/configs/mpc83xx_defconfig18
-rw-r--r--arch/powerpc/configs/mpc85xx_defconfig33
-rw-r--r--arch/powerpc/configs/mpc85xx_smp_defconfig32
-rw-r--r--arch/powerpc/include/asm/cputable.h2
-rw-r--r--arch/powerpc/include/asm/kvm_host.h1
-rw-r--r--arch/powerpc/include/asm/kvm_ppc.h12
-rw-r--r--arch/powerpc/include/asm/mpic_msgr.h1
-rw-r--r--arch/powerpc/kernel/dma-iommu.c9
-rw-r--r--arch/powerpc/kernel/hw_breakpoint.c2
-rw-r--r--arch/powerpc/kernel/kgdb.c27
-rw-r--r--arch/powerpc/kernel/syscalls.c8
-rw-r--r--arch/powerpc/kvm/book3s_32_mmu_host.c3
-rw-r--r--arch/powerpc/kvm/book3s_64_mmu_host.c2
-rw-r--r--arch/powerpc/kvm/book3s_hv_rmhandlers.S12
-rw-r--r--arch/powerpc/kvm/e500_tlb.c11
-rw-r--r--arch/powerpc/lib/copyuser_power7.S35
-rw-r--r--arch/powerpc/lib/memcpy_power7.S4
-rw-r--r--arch/powerpc/mm/mem.c1
-rw-r--r--arch/powerpc/perf/core-book3s.c2
-rw-r--r--arch/powerpc/sysdev/fsl_pci.c13
-rw-r--r--arch/powerpc/sysdev/mpic_msgr.c3
-rw-r--r--arch/powerpc/xmon/xmon.c84
-rw-r--r--arch/s390/include/asm/elf.h3
-rw-r--r--arch/s390/include/asm/posix_types.h3
-rw-r--r--arch/s390/include/asm/smp.h1
-rw-r--r--arch/x86/include/asm/spinlock.h3
-rw-r--r--arch/x86/kernel/alternative.c2
-rw-r--r--arch/x86/kernel/irq.c2
-rw-r--r--arch/x86/kernel/microcode_amd.c7
-rw-r--r--arch/x86/kvm/emulate.c30
-rw-r--r--arch/x86/kvm/mmu.c13
-rw-r--r--arch/x86/kvm/x86.c5
-rw-r--r--arch/x86/xen/enlighten.c118
-rw-r--r--arch/x86/xen/p2m.c95
-rw-r--r--arch/x86/xen/setup.c9
-rw-r--r--arch/x86/xen/suspend.c2
-rw-r--r--arch/x86/xen/xen-ops.h2
118 files changed, 1003 insertions, 858 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 01201673383..d1799267a01 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -2121,6 +2121,7 @@ source "drivers/cpufreq/Kconfig"
2121config CPU_FREQ_IMX 2121config CPU_FREQ_IMX
2122 tristate "CPUfreq driver for i.MX CPUs" 2122 tristate "CPUfreq driver for i.MX CPUs"
2123 depends on ARCH_MXC && CPU_FREQ 2123 depends on ARCH_MXC && CPU_FREQ
2124 select CPU_FREQ_TABLE
2124 help 2125 help
2125 This enables the CPUfreq driver for i.MX CPUs. 2126 This enables the CPUfreq driver for i.MX CPUs.
2126 2127
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 59509c48d7e..bd0cff3f808 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -154,5 +154,10 @@
154 #size-cells = <0>; 154 #size-cells = <0>;
155 ti,hwmods = "i2c3"; 155 ti,hwmods = "i2c3";
156 }; 156 };
157
158 wdt2: wdt@44e35000 {
159 compatible = "ti,omap3-wdt";
160 ti,hwmods = "wd_timer2";
161 };
157 }; 162 };
158}; 163};
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index cd86177a3ea..59d9789e550 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -25,8 +25,8 @@
25 aips@70000000 { /* aips-1 */ 25 aips@70000000 { /* aips-1 */
26 spba@70000000 { 26 spba@70000000 {
27 esdhc@70004000 { /* ESDHC1 */ 27 esdhc@70004000 { /* ESDHC1 */
28 fsl,cd-internal; 28 fsl,cd-controller;
29 fsl,wp-internal; 29 fsl,wp-controller;
30 status = "okay"; 30 status = "okay";
31 }; 31 };
32 32
diff --git a/arch/arm/boot/dts/kirkwood-iconnect.dts b/arch/arm/boot/dts/kirkwood-iconnect.dts
index 52d94704510..f8ca6fa8819 100644
--- a/arch/arm/boot/dts/kirkwood-iconnect.dts
+++ b/arch/arm/boot/dts/kirkwood-iconnect.dts
@@ -41,9 +41,13 @@
41 }; 41 };
42 power-blue { 42 power-blue {
43 label = "power:blue"; 43 label = "power:blue";
44 gpios = <&gpio1 11 0>; 44 gpios = <&gpio1 10 0>;
45 linux,default-trigger = "timer"; 45 linux,default-trigger = "timer";
46 }; 46 };
47 power-red {
48 label = "power:red";
49 gpios = <&gpio1 11 0>;
50 };
47 usb1 { 51 usb1 {
48 label = "usb1:blue"; 52 label = "usb1:blue";
49 gpios = <&gpio1 12 0>; 53 gpios = <&gpio1 12 0>;
diff --git a/arch/arm/boot/dts/twl6030.dtsi b/arch/arm/boot/dts/twl6030.dtsi
index 3b2f3510d7e..d351b27d721 100644
--- a/arch/arm/boot/dts/twl6030.dtsi
+++ b/arch/arm/boot/dts/twl6030.dtsi
@@ -66,6 +66,7 @@
66 66
67 vcxio: regulator@8 { 67 vcxio: regulator@8 {
68 compatible = "ti,twl6030-vcxio"; 68 compatible = "ti,twl6030-vcxio";
69 regulator-always-on;
69 }; 70 };
70 71
71 vusb: regulator@9 { 72 vusb: regulator@9 {
@@ -74,10 +75,12 @@
74 75
75 v1v8: regulator@10 { 76 v1v8: regulator@10 {
76 compatible = "ti,twl6030-v1v8"; 77 compatible = "ti,twl6030-v1v8";
78 regulator-always-on;
77 }; 79 };
78 80
79 v2v1: regulator@11 { 81 v2v1: regulator@11 {
80 compatible = "ti,twl6030-v2v1"; 82 compatible = "ti,twl6030-v2v1";
83 regulator-always-on;
81 }; 84 };
82 85
83 clk32kg: regulator@12 { 86 clk32kg: regulator@12 {
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index 2d4f661d1cf..da6845493ca 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -86,6 +86,7 @@ CONFIG_NEW_LEDS=y
86CONFIG_LEDS_CLASS=y 86CONFIG_LEDS_CLASS=y
87CONFIG_LEDS_LM3530=y 87CONFIG_LEDS_LM3530=y
88CONFIG_LEDS_LP5521=y 88CONFIG_LEDS_LP5521=y
89CONFIG_LEDS_GPIO=y
89CONFIG_RTC_CLASS=y 90CONFIG_RTC_CLASS=y
90CONFIG_RTC_DRV_AB8500=y 91CONFIG_RTC_DRV_AB8500=y
91CONFIG_RTC_DRV_PL031=y 92CONFIG_RTC_DRV_PL031=y
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index ed4fa5f316e..cc4c6a5a357 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -92,7 +92,8 @@ void __init dove_ehci1_init(void)
92void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data) 92void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
93{ 93{
94 orion_ge00_init(eth_data, DOVE_GE00_PHYS_BASE, 94 orion_ge00_init(eth_data, DOVE_GE00_PHYS_BASE,
95 IRQ_DOVE_GE00_SUM, IRQ_DOVE_GE00_ERR); 95 IRQ_DOVE_GE00_SUM, IRQ_DOVE_GE00_ERR,
96 1600);
96} 97}
97 98
98/***************************************************************************** 99/*****************************************************************************
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index 5ca80307d6d..4e574c24581 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -42,6 +42,7 @@
42#include <plat/backlight.h> 42#include <plat/backlight.h>
43#include <plat/fb.h> 43#include <plat/fb.h>
44#include <plat/mfc.h> 44#include <plat/mfc.h>
45#include <plat/hdmi.h>
45 46
46#include <mach/ohci.h> 47#include <mach/ohci.h>
47#include <mach/map.h> 48#include <mach/map.h>
@@ -734,6 +735,11 @@ static void __init origen_bt_setup(void)
734 s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE); 735 s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE);
735} 736}
736 737
738/* I2C module and id for HDMIPHY */
739static struct i2c_board_info hdmiphy_info = {
740 I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
741};
742
737static void s5p_tv_setup(void) 743static void s5p_tv_setup(void)
738{ 744{
739 /* Direct HPD to HDMI chip */ 745 /* Direct HPD to HDMI chip */
@@ -781,6 +787,7 @@ static void __init origen_machine_init(void)
781 787
782 s5p_tv_setup(); 788 s5p_tv_setup();
783 s5p_i2c_hdmiphy_set_platdata(NULL); 789 s5p_i2c_hdmiphy_set_platdata(NULL);
790 s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
784 791
785#ifdef CONFIG_DRM_EXYNOS 792#ifdef CONFIG_DRM_EXYNOS
786 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata; 793 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index 3cfa688d274..73f2bce097e 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -40,6 +40,7 @@
40#include <plat/mfc.h> 40#include <plat/mfc.h>
41#include <plat/ehci.h> 41#include <plat/ehci.h>
42#include <plat/clock.h> 42#include <plat/clock.h>
43#include <plat/hdmi.h>
43 44
44#include <mach/map.h> 45#include <mach/map.h>
45#include <mach/ohci.h> 46#include <mach/ohci.h>
@@ -354,6 +355,11 @@ static struct platform_pwm_backlight_data smdkv310_bl_data = {
354 .pwm_period_ns = 1000, 355 .pwm_period_ns = 1000,
355}; 356};
356 357
358/* I2C module and id for HDMIPHY */
359static struct i2c_board_info hdmiphy_info = {
360 I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
361};
362
357static void s5p_tv_setup(void) 363static void s5p_tv_setup(void)
358{ 364{
359 /* direct HPD to HDMI chip */ 365 /* direct HPD to HDMI chip */
@@ -388,6 +394,7 @@ static void __init smdkv310_machine_init(void)
388 394
389 s5p_tv_setup(); 395 s5p_tv_setup();
390 s5p_i2c_hdmiphy_set_platdata(NULL); 396 s5p_i2c_hdmiphy_set_platdata(NULL);
397 s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
391 398
392 samsung_keypad_set_platdata(&smdkv310_keypad_data); 399 samsung_keypad_set_platdata(&smdkv310_keypad_data);
393 400
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 07f7c226e4c..d004d37ad9d 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -9,7 +9,8 @@ obj-$(CONFIG_SOC_IMX27) += clk-imx27.o mm-imx27.o ehci-imx27.o
9obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o clk-imx31.o iomux-imx31.o ehci-imx31.o pm-imx3.o 9obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o clk-imx31.o iomux-imx31.o ehci-imx31.o pm-imx3.o
10obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clk-imx35.o ehci-imx35.o pm-imx3.o 10obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clk-imx35.o ehci-imx35.o pm-imx3.o
11 11
12obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o pm-imx5.o cpu_op-mx51.o 12imx5-pm-$(CONFIG_PM) += pm-imx5.o
13obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o $(imx5-pm-y) cpu_op-mx51.o
13 14
14obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \ 15obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \
15 clk-pfd.o clk-busy.o 16 clk-pfd.o clk-busy.o
@@ -70,14 +71,13 @@ obj-$(CONFIG_DEBUG_LL) += lluart.o
70obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o 71obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
71obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o 72obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o
72obj-$(CONFIG_HAVE_IMX_SRC) += src.o 73obj-$(CONFIG_HAVE_IMX_SRC) += src.o
73obj-$(CONFIG_CPU_V7) += head-v7.o 74AFLAGS_headsmp.o :=-Wa,-march=armv7-a
74AFLAGS_head-v7.o :=-Wa,-march=armv7-a 75obj-$(CONFIG_SMP) += headsmp.o platsmp.o
75obj-$(CONFIG_SMP) += platsmp.o
76obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 76obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
77obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o 77obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o
78 78
79ifeq ($(CONFIG_PM),y) 79ifeq ($(CONFIG_PM),y)
80obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o 80obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o headsmp.o
81endif 81endif
82 82
83# i.MX5 based machines 83# i.MX5 based machines
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index ea89520b6e2..4233d9e3531 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -152,7 +152,7 @@ enum mx6q_clks {
152 ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3, 152 ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3,
153 usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg, 153 usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg,
154 pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg, 154 pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg,
155 ssi2_ipg, ssi3_ipg, rom, usbphy1, usbphy2, 155 ssi2_ipg, ssi3_ipg, rom, usbphy1, usbphy2, ldb_di0_div_3_5, ldb_di1_div_3_5,
156 clk_max 156 clk_max
157}; 157};
158 158
@@ -288,8 +288,10 @@ int __init mx6q_clocks_init(void)
288 clk[gpu3d_shader] = imx_clk_divider("gpu3d_shader", "gpu3d_shader_sel", base + 0x18, 29, 3); 288 clk[gpu3d_shader] = imx_clk_divider("gpu3d_shader", "gpu3d_shader_sel", base + 0x18, 29, 3);
289 clk[ipu1_podf] = imx_clk_divider("ipu1_podf", "ipu1_sel", base + 0x3c, 11, 3); 289 clk[ipu1_podf] = imx_clk_divider("ipu1_podf", "ipu1_sel", base + 0x3c, 11, 3);
290 clk[ipu2_podf] = imx_clk_divider("ipu2_podf", "ipu2_sel", base + 0x3c, 16, 3); 290 clk[ipu2_podf] = imx_clk_divider("ipu2_podf", "ipu2_sel", base + 0x3c, 16, 3);
291 clk[ldb_di0_podf] = imx_clk_divider("ldb_di0_podf", "ldb_di0_sel", base + 0x20, 10, 1); 291 clk[ldb_di0_div_3_5] = imx_clk_fixed_factor("ldb_di0_div_3_5", "ldb_di0_sel", 2, 7);
292 clk[ldb_di1_podf] = imx_clk_divider("ldb_di1_podf", "ldb_di1_sel", base + 0x20, 11, 1); 292 clk[ldb_di0_podf] = imx_clk_divider("ldb_di0_podf", "ldb_di0_div_3_5", base + 0x20, 10, 1);
293 clk[ldb_di1_div_3_5] = imx_clk_fixed_factor("ldb_di1_div_3_5", "ldb_di1_sel", 2, 7);
294 clk[ldb_di1_podf] = imx_clk_divider("ldb_di1_podf", "ldb_di1_div_3_5", base + 0x20, 11, 1);
293 clk[ipu1_di0_pre] = imx_clk_divider("ipu1_di0_pre", "ipu1_di0_pre_sel", base + 0x34, 3, 3); 295 clk[ipu1_di0_pre] = imx_clk_divider("ipu1_di0_pre", "ipu1_di0_pre_sel", base + 0x34, 3, 3);
294 clk[ipu1_di1_pre] = imx_clk_divider("ipu1_di1_pre", "ipu1_di1_pre_sel", base + 0x34, 12, 3); 296 clk[ipu1_di1_pre] = imx_clk_divider("ipu1_di1_pre", "ipu1_di1_pre_sel", base + 0x34, 12, 3);
295 clk[ipu2_di0_pre] = imx_clk_divider("ipu2_di0_pre", "ipu2_di0_pre_sel", base + 0x38, 3, 3); 297 clk[ipu2_di0_pre] = imx_clk_divider("ipu2_di0_pre", "ipu2_di0_pre_sel", base + 0x38, 3, 3);
diff --git a/arch/arm/mach-imx/head-v7.S b/arch/arm/mach-imx/headsmp.S
index 7e49deb128a..7e49deb128a 100644
--- a/arch/arm/mach-imx/head-v7.S
+++ b/arch/arm/mach-imx/headsmp.S
diff --git a/arch/arm/mach-imx/hotplug.c b/arch/arm/mach-imx/hotplug.c
index 20ed2d56c1a..f8f7437c83b 100644
--- a/arch/arm/mach-imx/hotplug.c
+++ b/arch/arm/mach-imx/hotplug.c
@@ -42,22 +42,6 @@ static inline void cpu_enter_lowpower(void)
42 : "cc"); 42 : "cc");
43} 43}
44 44
45static inline void cpu_leave_lowpower(void)
46{
47 unsigned int v;
48
49 asm volatile(
50 "mrc p15, 0, %0, c1, c0, 0\n"
51 " orr %0, %0, %1\n"
52 " mcr p15, 0, %0, c1, c0, 0\n"
53 " mrc p15, 0, %0, c1, c0, 1\n"
54 " orr %0, %0, %2\n"
55 " mcr p15, 0, %0, c1, c0, 1\n"
56 : "=&r" (v)
57 : "Ir" (CR_C), "Ir" (0x40)
58 : "cc");
59}
60
61/* 45/*
62 * platform-specific code to shutdown a CPU 46 * platform-specific code to shutdown a CPU
63 * 47 *
@@ -67,11 +51,10 @@ void platform_cpu_die(unsigned int cpu)
67{ 51{
68 cpu_enter_lowpower(); 52 cpu_enter_lowpower();
69 imx_enable_cpu(cpu, false); 53 imx_enable_cpu(cpu, false);
70 cpu_do_idle();
71 cpu_leave_lowpower();
72 54
73 /* We should never return from idle */ 55 /* spin here until hardware takes it down */
74 panic("cpu %d unexpectedly exit from shutdown\n", cpu); 56 while (1)
57 ;
75} 58}
76 59
77int platform_cpu_disable(unsigned int cpu) 60int platform_cpu_disable(unsigned int cpu)
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 5ec0608f2a7..045b3f6a387 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -71,7 +71,7 @@ soft:
71/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */ 71/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
72static int ksz9021rn_phy_fixup(struct phy_device *phydev) 72static int ksz9021rn_phy_fixup(struct phy_device *phydev)
73{ 73{
74 if (IS_ENABLED(CONFIG_PHYLIB)) { 74 if (IS_BUILTIN(CONFIG_PHYLIB)) {
75 /* min rx data delay */ 75 /* min rx data delay */
76 phy_write(phydev, 0x0b, 0x8105); 76 phy_write(phydev, 0x0b, 0x8105);
77 phy_write(phydev, 0x0c, 0x0000); 77 phy_write(phydev, 0x0c, 0x0000);
@@ -112,7 +112,7 @@ put_clk:
112 112
113static void __init imx6q_sabrelite_init(void) 113static void __init imx6q_sabrelite_init(void)
114{ 114{
115 if (IS_ENABLED(CONFIG_PHYLIB)) 115 if (IS_BUILTIN(CONFIG_PHYLIB))
116 phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, 116 phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
117 ksz9021rn_phy_fixup); 117 ksz9021rn_phy_fixup);
118 imx6q_sabrelite_cko1_setup(); 118 imx6q_sabrelite_cko1_setup();
diff --git a/arch/arm/mach-kirkwood/Makefile.boot b/arch/arm/mach-kirkwood/Makefile.boot
index a5717558ee8..a13299d758e 100644
--- a/arch/arm/mach-kirkwood/Makefile.boot
+++ b/arch/arm/mach-kirkwood/Makefile.boot
@@ -7,7 +7,8 @@ dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns320.dtb
7dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns325.dtb 7dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns325.dtb
8dtb-$(CONFIG_MACH_ICONNECT_DT) += kirkwood-iconnect.dtb 8dtb-$(CONFIG_MACH_ICONNECT_DT) += kirkwood-iconnect.dtb
9dtb-$(CONFIG_MACH_IB62X0_DT) += kirkwood-ib62x0.dtb 9dtb-$(CONFIG_MACH_IB62X0_DT) += kirkwood-ib62x0.dtb
10dtb-$(CONFIG_MACH_TS219_DT) += kirkwood-qnap-ts219.dtb 10dtb-$(CONFIG_MACH_TS219_DT) += kirkwood-ts219-6281.dtb
11dtb-$(CONFIG_MACH_TS219_DT) += kirkwood-ts219-6282.dtb
11dtb-$(CONFIG_MACH_GOFLEXNET_DT) += kirkwood-goflexnet.dtb 12dtb-$(CONFIG_MACH_GOFLEXNET_DT) += kirkwood-goflexnet.dtb
12dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lschlv2.dtb 13dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lschlv2.dtb
13dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lsxhl.dtb 14dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lsxhl.dtb
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 31d9f400ed8..936b31df644 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -291,7 +291,7 @@ void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
291{ 291{
292 orion_ge00_init(eth_data, 292 orion_ge00_init(eth_data,
293 GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM, 293 GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
294 IRQ_KIRKWOOD_GE00_ERR); 294 IRQ_KIRKWOOD_GE00_ERR, 1600);
295 /* The interface forgets the MAC address assigned by u-boot if 295 /* The interface forgets the MAC address assigned by u-boot if
296 the clock is turned off, so claim the clk now. */ 296 the clock is turned off, so claim the clk now. */
297 clk_prepare_enable(ge0); 297 clk_prepare_enable(ge0);
@@ -305,7 +305,7 @@ void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
305{ 305{
306 orion_ge01_init(eth_data, 306 orion_ge01_init(eth_data,
307 GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM, 307 GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
308 IRQ_KIRKWOOD_GE01_ERR); 308 IRQ_KIRKWOOD_GE01_ERR, 1600);
309 clk_prepare_enable(ge1); 309 clk_prepare_enable(ge1);
310} 310}
311 311
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index b786f7e6cd1..095c155d6fb 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -2,13 +2,19 @@
2# Makefile for Marvell's PXA168 processors line 2# Makefile for Marvell's PXA168 processors line
3# 3#
4 4
5obj-y += common.o clock.o devices.o time.o irq.o 5obj-y += common.o devices.o time.o irq.o
6 6
7# SoC support 7# SoC support
8obj-$(CONFIG_CPU_PXA168) += pxa168.o 8obj-$(CONFIG_CPU_PXA168) += pxa168.o
9obj-$(CONFIG_CPU_PXA910) += pxa910.o 9obj-$(CONFIG_CPU_PXA910) += pxa910.o
10obj-$(CONFIG_CPU_MMP2) += mmp2.o sram.o 10obj-$(CONFIG_CPU_MMP2) += mmp2.o sram.o
11 11
12ifeq ($(CONFIG_COMMON_CLK), )
13obj-y += clock.o
14obj-$(CONFIG_CPU_PXA168) += clock-pxa168.o
15obj-$(CONFIG_CPU_PXA910) += clock-pxa910.o
16obj-$(CONFIG_CPU_MMP2) += clock-mmp2.o
17endif
12ifeq ($(CONFIG_PM),y) 18ifeq ($(CONFIG_PM),y)
13obj-$(CONFIG_CPU_PXA910) += pm-pxa910.o 19obj-$(CONFIG_CPU_PXA910) += pm-pxa910.o
14obj-$(CONFIG_CPU_MMP2) += pm-mmp2.o 20obj-$(CONFIG_CPU_MMP2) += pm-mmp2.o
diff --git a/arch/arm/mach-mmp/clock-mmp2.c b/arch/arm/mach-mmp/clock-mmp2.c
new file mode 100644
index 00000000000..21d22002cd1
--- /dev/null
+++ b/arch/arm/mach-mmp/clock-mmp2.c
@@ -0,0 +1,111 @@
1#include <linux/module.h>
2#include <linux/kernel.h>
3#include <linux/init.h>
4#include <linux/list.h>
5#include <linux/io.h>
6#include <linux/clk.h>
7
8#include <mach/addr-map.h>
9
10#include "common.h"
11#include "clock.h"
12
13/*
14 * APB Clock register offsets for MMP2
15 */
16#define APBC_RTC APBC_REG(0x000)
17#define APBC_TWSI1 APBC_REG(0x004)
18#define APBC_TWSI2 APBC_REG(0x008)
19#define APBC_TWSI3 APBC_REG(0x00c)
20#define APBC_TWSI4 APBC_REG(0x010)
21#define APBC_KPC APBC_REG(0x018)
22#define APBC_UART1 APBC_REG(0x02c)
23#define APBC_UART2 APBC_REG(0x030)
24#define APBC_UART3 APBC_REG(0x034)
25#define APBC_GPIO APBC_REG(0x038)
26#define APBC_PWM0 APBC_REG(0x03c)
27#define APBC_PWM1 APBC_REG(0x040)
28#define APBC_PWM2 APBC_REG(0x044)
29#define APBC_PWM3 APBC_REG(0x048)
30#define APBC_SSP0 APBC_REG(0x04c)
31#define APBC_SSP1 APBC_REG(0x050)
32#define APBC_SSP2 APBC_REG(0x054)
33#define APBC_SSP3 APBC_REG(0x058)
34#define APBC_SSP4 APBC_REG(0x05c)
35#define APBC_SSP5 APBC_REG(0x060)
36#define APBC_TWSI5 APBC_REG(0x07c)
37#define APBC_TWSI6 APBC_REG(0x080)
38#define APBC_UART4 APBC_REG(0x088)
39
40#define APMU_USB APMU_REG(0x05c)
41#define APMU_NAND APMU_REG(0x060)
42#define APMU_SDH0 APMU_REG(0x054)
43#define APMU_SDH1 APMU_REG(0x058)
44#define APMU_SDH2 APMU_REG(0x0e8)
45#define APMU_SDH3 APMU_REG(0x0ec)
46
47static void sdhc_clk_enable(struct clk *clk)
48{
49 uint32_t clk_rst;
50
51 clk_rst = __raw_readl(clk->clk_rst);
52 clk_rst |= clk->enable_val;
53 __raw_writel(clk_rst, clk->clk_rst);
54}
55
56static void sdhc_clk_disable(struct clk *clk)
57{
58 uint32_t clk_rst;
59
60 clk_rst = __raw_readl(clk->clk_rst);
61 clk_rst &= ~clk->enable_val;
62 __raw_writel(clk_rst, clk->clk_rst);
63}
64
65struct clkops sdhc_clk_ops = {
66 .enable = sdhc_clk_enable,
67 .disable = sdhc_clk_disable,
68};
69
70/* APB peripheral clocks */
71static APBC_CLK(uart1, UART1, 1, 26000000);
72static APBC_CLK(uart2, UART2, 1, 26000000);
73static APBC_CLK(uart3, UART3, 1, 26000000);
74static APBC_CLK(uart4, UART4, 1, 26000000);
75static APBC_CLK(twsi1, TWSI1, 0, 26000000);
76static APBC_CLK(twsi2, TWSI2, 0, 26000000);
77static APBC_CLK(twsi3, TWSI3, 0, 26000000);
78static APBC_CLK(twsi4, TWSI4, 0, 26000000);
79static APBC_CLK(twsi5, TWSI5, 0, 26000000);
80static APBC_CLK(twsi6, TWSI6, 0, 26000000);
81static APBC_CLK(gpio, GPIO, 0, 26000000);
82
83static APMU_CLK(nand, NAND, 0xbf, 100000000);
84static APMU_CLK_OPS(sdh0, SDH0, 0x1b, 200000000, &sdhc_clk_ops);
85static APMU_CLK_OPS(sdh1, SDH1, 0x1b, 200000000, &sdhc_clk_ops);
86static APMU_CLK_OPS(sdh2, SDH2, 0x1b, 200000000, &sdhc_clk_ops);
87static APMU_CLK_OPS(sdh3, SDH3, 0x1b, 200000000, &sdhc_clk_ops);
88
89static struct clk_lookup mmp2_clkregs[] = {
90 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
91 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
92 INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL),
93 INIT_CLKREG(&clk_uart4, "pxa2xx-uart.3", NULL),
94 INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.0", NULL),
95 INIT_CLKREG(&clk_twsi2, "pxa2xx-i2c.1", NULL),
96 INIT_CLKREG(&clk_twsi3, "pxa2xx-i2c.2", NULL),
97 INIT_CLKREG(&clk_twsi4, "pxa2xx-i2c.3", NULL),
98 INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL),
99 INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL),
100 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
101 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
102 INIT_CLKREG(&clk_sdh0, "sdhci-pxav3.0", "PXA-SDHCLK"),
103 INIT_CLKREG(&clk_sdh1, "sdhci-pxav3.1", "PXA-SDHCLK"),
104 INIT_CLKREG(&clk_sdh2, "sdhci-pxav3.2", "PXA-SDHCLK"),
105 INIT_CLKREG(&clk_sdh3, "sdhci-pxav3.3", "PXA-SDHCLK"),
106};
107
108void __init mmp2_clk_init(void)
109{
110 clkdev_add_table(ARRAY_AND_SIZE(mmp2_clkregs));
111}
diff --git a/arch/arm/mach-mmp/clock-pxa168.c b/arch/arm/mach-mmp/clock-pxa168.c
new file mode 100644
index 00000000000..5e6c18ccebd
--- /dev/null
+++ b/arch/arm/mach-mmp/clock-pxa168.c
@@ -0,0 +1,91 @@
1#include <linux/module.h>
2#include <linux/kernel.h>
3#include <linux/init.h>
4#include <linux/list.h>
5#include <linux/io.h>
6#include <linux/clk.h>
7
8#include <mach/addr-map.h>
9
10#include "common.h"
11#include "clock.h"
12
13/*
14 * APB clock register offsets for PXA168
15 */
16#define APBC_UART1 APBC_REG(0x000)
17#define APBC_UART2 APBC_REG(0x004)
18#define APBC_GPIO APBC_REG(0x008)
19#define APBC_PWM1 APBC_REG(0x00c)
20#define APBC_PWM2 APBC_REG(0x010)
21#define APBC_PWM3 APBC_REG(0x014)
22#define APBC_PWM4 APBC_REG(0x018)
23#define APBC_RTC APBC_REG(0x028)
24#define APBC_TWSI0 APBC_REG(0x02c)
25#define APBC_KPC APBC_REG(0x030)
26#define APBC_TWSI1 APBC_REG(0x06c)
27#define APBC_UART3 APBC_REG(0x070)
28#define APBC_SSP1 APBC_REG(0x81c)
29#define APBC_SSP2 APBC_REG(0x820)
30#define APBC_SSP3 APBC_REG(0x84c)
31#define APBC_SSP4 APBC_REG(0x858)
32#define APBC_SSP5 APBC_REG(0x85c)
33
34#define APMU_NAND APMU_REG(0x060)
35#define APMU_LCD APMU_REG(0x04c)
36#define APMU_ETH APMU_REG(0x0fc)
37#define APMU_USB APMU_REG(0x05c)
38
39/* APB peripheral clocks */
40static APBC_CLK(uart1, UART1, 1, 14745600);
41static APBC_CLK(uart2, UART2, 1, 14745600);
42static APBC_CLK(uart3, UART3, 1, 14745600);
43static APBC_CLK(twsi0, TWSI0, 1, 33000000);
44static APBC_CLK(twsi1, TWSI1, 1, 33000000);
45static APBC_CLK(pwm1, PWM1, 1, 13000000);
46static APBC_CLK(pwm2, PWM2, 1, 13000000);
47static APBC_CLK(pwm3, PWM3, 1, 13000000);
48static APBC_CLK(pwm4, PWM4, 1, 13000000);
49static APBC_CLK(ssp1, SSP1, 4, 0);
50static APBC_CLK(ssp2, SSP2, 4, 0);
51static APBC_CLK(ssp3, SSP3, 4, 0);
52static APBC_CLK(ssp4, SSP4, 4, 0);
53static APBC_CLK(ssp5, SSP5, 4, 0);
54static APBC_CLK(gpio, GPIO, 0, 13000000);
55static APBC_CLK(keypad, KPC, 0, 32000);
56static APBC_CLK(rtc, RTC, 8, 32768);
57
58static APMU_CLK(nand, NAND, 0x19b, 156000000);
59static APMU_CLK(lcd, LCD, 0x7f, 312000000);
60static APMU_CLK(eth, ETH, 0x09, 0);
61static APMU_CLK(usb, USB, 0x12, 0);
62
63/* device and clock bindings */
64static struct clk_lookup pxa168_clkregs[] = {
65 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
66 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
67 INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL),
68 INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL),
69 INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL),
70 INIT_CLKREG(&clk_pwm1, "pxa168-pwm.0", NULL),
71 INIT_CLKREG(&clk_pwm2, "pxa168-pwm.1", NULL),
72 INIT_CLKREG(&clk_pwm3, "pxa168-pwm.2", NULL),
73 INIT_CLKREG(&clk_pwm4, "pxa168-pwm.3", NULL),
74 INIT_CLKREG(&clk_ssp1, "pxa168-ssp.0", NULL),
75 INIT_CLKREG(&clk_ssp2, "pxa168-ssp.1", NULL),
76 INIT_CLKREG(&clk_ssp3, "pxa168-ssp.2", NULL),
77 INIT_CLKREG(&clk_ssp4, "pxa168-ssp.3", NULL),
78 INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL),
79 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
80 INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL),
81 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
82 INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL),
83 INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"),
84 INIT_CLKREG(&clk_usb, NULL, "PXA168-USBCLK"),
85 INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
86};
87
88void __init pxa168_clk_init(void)
89{
90 clkdev_add_table(ARRAY_AND_SIZE(pxa168_clkregs));
91}
diff --git a/arch/arm/mach-mmp/clock-pxa910.c b/arch/arm/mach-mmp/clock-pxa910.c
new file mode 100644
index 00000000000..933ea71d0b5
--- /dev/null
+++ b/arch/arm/mach-mmp/clock-pxa910.c
@@ -0,0 +1,67 @@
1#include <linux/module.h>
2#include <linux/kernel.h>
3#include <linux/init.h>
4#include <linux/list.h>
5#include <linux/io.h>
6#include <linux/clk.h>
7
8#include <mach/addr-map.h>
9
10#include "common.h"
11#include "clock.h"
12
13/*
14 * APB Clock register offsets for PXA910
15 */
16#define APBC_UART0 APBC_REG(0x000)
17#define APBC_UART1 APBC_REG(0x004)
18#define APBC_GPIO APBC_REG(0x008)
19#define APBC_PWM1 APBC_REG(0x00c)
20#define APBC_PWM2 APBC_REG(0x010)
21#define APBC_PWM3 APBC_REG(0x014)
22#define APBC_PWM4 APBC_REG(0x018)
23#define APBC_SSP1 APBC_REG(0x01c)
24#define APBC_SSP2 APBC_REG(0x020)
25#define APBC_RTC APBC_REG(0x028)
26#define APBC_TWSI0 APBC_REG(0x02c)
27#define APBC_KPC APBC_REG(0x030)
28#define APBC_SSP3 APBC_REG(0x04c)
29#define APBC_TWSI1 APBC_REG(0x06c)
30
31#define APMU_NAND APMU_REG(0x060)
32#define APMU_USB APMU_REG(0x05c)
33
34static APBC_CLK(uart1, UART0, 1, 14745600);
35static APBC_CLK(uart2, UART1, 1, 14745600);
36static APBC_CLK(twsi0, TWSI0, 1, 33000000);
37static APBC_CLK(twsi1, TWSI1, 1, 33000000);
38static APBC_CLK(pwm1, PWM1, 1, 13000000);
39static APBC_CLK(pwm2, PWM2, 1, 13000000);
40static APBC_CLK(pwm3, PWM3, 1, 13000000);
41static APBC_CLK(pwm4, PWM4, 1, 13000000);
42static APBC_CLK(gpio, GPIO, 0, 13000000);
43static APBC_CLK(rtc, RTC, 8, 32768);
44
45static APMU_CLK(nand, NAND, 0x19b, 156000000);
46static APMU_CLK(u2o, USB, 0x1b, 480000000);
47
48/* device and clock bindings */
49static struct clk_lookup pxa910_clkregs[] = {
50 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
51 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
52 INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL),
53 INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL),
54 INIT_CLKREG(&clk_pwm1, "pxa910-pwm.0", NULL),
55 INIT_CLKREG(&clk_pwm2, "pxa910-pwm.1", NULL),
56 INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL),
57 INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL),
58 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
59 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
60 INIT_CLKREG(&clk_u2o, NULL, "U2OCLK"),
61 INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
62};
63
64void __init pxa910_clk_init(void)
65{
66 clkdev_add_table(ARRAY_AND_SIZE(pxa910_clkregs));
67}
diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h
index 1c9d6c1ea97..bd453274fca 100644
--- a/arch/arm/mach-mmp/common.h
+++ b/arch/arm/mach-mmp/common.h
@@ -7,3 +7,6 @@ extern void timer_init(int irq);
7extern void __init icu_init_irq(void); 7extern void __init icu_init_irq(void);
8extern void __init mmp_map_io(void); 8extern void __init mmp_map_io(void);
9extern void mmp_restart(char, const char *); 9extern void mmp_restart(char, const char *);
10extern void __init pxa168_clk_init(void);
11extern void __init pxa910_clk_init(void);
12extern void __init mmp2_clk_init(void);
diff --git a/arch/arm/mach-mmp/include/mach/regs-apbc.h b/arch/arm/mach-mmp/include/mach/regs-apbc.h
index 68b0c93ec6a..ddc812f4034 100644
--- a/arch/arm/mach-mmp/include/mach/regs-apbc.h
+++ b/arch/arm/mach-mmp/include/mach/regs-apbc.h
@@ -13,101 +13,6 @@
13 13
14#include <mach/addr-map.h> 14#include <mach/addr-map.h>
15 15
16/*
17 * APB clock register offsets for PXA168
18 */
19#define APBC_PXA168_UART1 APBC_REG(0x000)
20#define APBC_PXA168_UART2 APBC_REG(0x004)
21#define APBC_PXA168_GPIO APBC_REG(0x008)
22#define APBC_PXA168_PWM1 APBC_REG(0x00c)
23#define APBC_PXA168_PWM2 APBC_REG(0x010)
24#define APBC_PXA168_PWM3 APBC_REG(0x014)
25#define APBC_PXA168_PWM4 APBC_REG(0x018)
26#define APBC_PXA168_RTC APBC_REG(0x028)
27#define APBC_PXA168_TWSI0 APBC_REG(0x02c)
28#define APBC_PXA168_KPC APBC_REG(0x030)
29#define APBC_PXA168_TIMERS APBC_REG(0x034)
30#define APBC_PXA168_AIB APBC_REG(0x03c)
31#define APBC_PXA168_SW_JTAG APBC_REG(0x040)
32#define APBC_PXA168_ONEWIRE APBC_REG(0x048)
33#define APBC_PXA168_ASFAR APBC_REG(0x050)
34#define APBC_PXA168_ASSAR APBC_REG(0x054)
35#define APBC_PXA168_TWSI1 APBC_REG(0x06c)
36#define APBC_PXA168_UART3 APBC_REG(0x070)
37#define APBC_PXA168_AC97 APBC_REG(0x084)
38#define APBC_PXA168_SSP1 APBC_REG(0x81c)
39#define APBC_PXA168_SSP2 APBC_REG(0x820)
40#define APBC_PXA168_SSP3 APBC_REG(0x84c)
41#define APBC_PXA168_SSP4 APBC_REG(0x858)
42#define APBC_PXA168_SSP5 APBC_REG(0x85c)
43
44/*
45 * APB Clock register offsets for PXA910
46 */
47#define APBC_PXA910_UART0 APBC_REG(0x000)
48#define APBC_PXA910_UART1 APBC_REG(0x004)
49#define APBC_PXA910_GPIO APBC_REG(0x008)
50#define APBC_PXA910_PWM1 APBC_REG(0x00c)
51#define APBC_PXA910_PWM2 APBC_REG(0x010)
52#define APBC_PXA910_PWM3 APBC_REG(0x014)
53#define APBC_PXA910_PWM4 APBC_REG(0x018)
54#define APBC_PXA910_SSP1 APBC_REG(0x01c)
55#define APBC_PXA910_SSP2 APBC_REG(0x020)
56#define APBC_PXA910_IPC APBC_REG(0x024)
57#define APBC_PXA910_RTC APBC_REG(0x028)
58#define APBC_PXA910_TWSI0 APBC_REG(0x02c)
59#define APBC_PXA910_KPC APBC_REG(0x030)
60#define APBC_PXA910_TIMERS APBC_REG(0x034)
61#define APBC_PXA910_TBROT APBC_REG(0x038)
62#define APBC_PXA910_AIB APBC_REG(0x03c)
63#define APBC_PXA910_SW_JTAG APBC_REG(0x040)
64#define APBC_PXA910_TIMERS1 APBC_REG(0x044)
65#define APBC_PXA910_ONEWIRE APBC_REG(0x048)
66#define APBC_PXA910_SSP3 APBC_REG(0x04c)
67#define APBC_PXA910_ASFAR APBC_REG(0x050)
68#define APBC_PXA910_ASSAR APBC_REG(0x054)
69
70/*
71 * APB Clock register offsets for MMP2
72 */
73#define APBC_MMP2_RTC APBC_REG(0x000)
74#define APBC_MMP2_TWSI1 APBC_REG(0x004)
75#define APBC_MMP2_TWSI2 APBC_REG(0x008)
76#define APBC_MMP2_TWSI3 APBC_REG(0x00c)
77#define APBC_MMP2_TWSI4 APBC_REG(0x010)
78#define APBC_MMP2_ONEWIRE APBC_REG(0x014)
79#define APBC_MMP2_KPC APBC_REG(0x018)
80#define APBC_MMP2_TB_ROTARY APBC_REG(0x01c)
81#define APBC_MMP2_SW_JTAG APBC_REG(0x020)
82#define APBC_MMP2_TIMERS APBC_REG(0x024)
83#define APBC_MMP2_UART1 APBC_REG(0x02c)
84#define APBC_MMP2_UART2 APBC_REG(0x030)
85#define APBC_MMP2_UART3 APBC_REG(0x034)
86#define APBC_MMP2_GPIO APBC_REG(0x038)
87#define APBC_MMP2_PWM0 APBC_REG(0x03c)
88#define APBC_MMP2_PWM1 APBC_REG(0x040)
89#define APBC_MMP2_PWM2 APBC_REG(0x044)
90#define APBC_MMP2_PWM3 APBC_REG(0x048)
91#define APBC_MMP2_SSP0 APBC_REG(0x04c)
92#define APBC_MMP2_SSP1 APBC_REG(0x050)
93#define APBC_MMP2_SSP2 APBC_REG(0x054)
94#define APBC_MMP2_SSP3 APBC_REG(0x058)
95#define APBC_MMP2_SSP4 APBC_REG(0x05c)
96#define APBC_MMP2_SSP5 APBC_REG(0x060)
97#define APBC_MMP2_AIB APBC_REG(0x064)
98#define APBC_MMP2_ASFAR APBC_REG(0x068)
99#define APBC_MMP2_ASSAR APBC_REG(0x06c)
100#define APBC_MMP2_USIM APBC_REG(0x070)
101#define APBC_MMP2_MPMU APBC_REG(0x074)
102#define APBC_MMP2_IPC APBC_REG(0x078)
103#define APBC_MMP2_TWSI5 APBC_REG(0x07c)
104#define APBC_MMP2_TWSI6 APBC_REG(0x080)
105#define APBC_MMP2_TWSI_INTSTS APBC_REG(0x084)
106#define APBC_MMP2_UART4 APBC_REG(0x088)
107#define APBC_MMP2_RIPC APBC_REG(0x08c)
108#define APBC_MMP2_THSENS1 APBC_REG(0x090) /* Thermal Sensor */
109#define APBC_MMP2_THSENS_INTSTS APBC_REG(0x0a4)
110
111/* Common APB clock register bit definitions */ 16/* Common APB clock register bit definitions */
112#define APBC_APBCLK (1 << 0) /* APB Bus Clock Enable */ 17#define APBC_APBCLK (1 << 0) /* APB Bus Clock Enable */
113#define APBC_FNCLK (1 << 1) /* Functional Clock Enable */ 18#define APBC_FNCLK (1 << 1) /* Functional Clock Enable */
diff --git a/arch/arm/mach-mmp/include/mach/regs-apmu.h b/arch/arm/mach-mmp/include/mach/regs-apmu.h
index 7af8deb63e8..93c8d0e29bb 100644
--- a/arch/arm/mach-mmp/include/mach/regs-apmu.h
+++ b/arch/arm/mach-mmp/include/mach/regs-apmu.h
@@ -13,21 +13,6 @@
13 13
14#include <mach/addr-map.h> 14#include <mach/addr-map.h>
15 15
16/* Clock Reset Control */
17#define APMU_IRE APMU_REG(0x048)
18#define APMU_LCD APMU_REG(0x04c)
19#define APMU_CCIC APMU_REG(0x050)
20#define APMU_SDH0 APMU_REG(0x054)
21#define APMU_SDH1 APMU_REG(0x058)
22#define APMU_USB APMU_REG(0x05c)
23#define APMU_NAND APMU_REG(0x060)
24#define APMU_DMA APMU_REG(0x064)
25#define APMU_GEU APMU_REG(0x068)
26#define APMU_BUS APMU_REG(0x06c)
27#define APMU_SDH2 APMU_REG(0x0e8)
28#define APMU_SDH3 APMU_REG(0x0ec)
29#define APMU_ETH APMU_REG(0x0fc)
30
31#define APMU_FNCLK_EN (1 << 4) 16#define APMU_FNCLK_EN (1 << 4)
32#define APMU_AXICLK_EN (1 << 3) 17#define APMU_AXICLK_EN (1 << 3)
33#define APMU_FNRST_DIS (1 << 1) 18#define APMU_FNRST_DIS (1 << 1)
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index c709a24a9d2..c2ce3d05b04 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -20,7 +20,6 @@
20#include <asm/mach/time.h> 20#include <asm/mach/time.h>
21#include <mach/addr-map.h> 21#include <mach/addr-map.h>
22#include <mach/regs-apbc.h> 22#include <mach/regs-apbc.h>
23#include <mach/regs-apmu.h>
24#include <mach/cputype.h> 23#include <mach/cputype.h>
25#include <mach/irqs.h> 24#include <mach/irqs.h>
26#include <mach/dma.h> 25#include <mach/dma.h>
@@ -29,7 +28,6 @@
29#include <mach/mmp2.h> 28#include <mach/mmp2.h>
30 29
31#include "common.h" 30#include "common.h"
32#include "clock.h"
33 31
34#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000) 32#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
35 33
@@ -98,67 +96,6 @@ void __init mmp2_init_irq(void)
98 mmp2_init_icu(); 96 mmp2_init_icu();
99} 97}
100 98
101static void sdhc_clk_enable(struct clk *clk)
102{
103 uint32_t clk_rst;
104
105 clk_rst = __raw_readl(clk->clk_rst);
106 clk_rst |= clk->enable_val;
107 __raw_writel(clk_rst, clk->clk_rst);
108}
109
110static void sdhc_clk_disable(struct clk *clk)
111{
112 uint32_t clk_rst;
113
114 clk_rst = __raw_readl(clk->clk_rst);
115 clk_rst &= ~clk->enable_val;
116 __raw_writel(clk_rst, clk->clk_rst);
117}
118
119struct clkops sdhc_clk_ops = {
120 .enable = sdhc_clk_enable,
121 .disable = sdhc_clk_disable,
122};
123
124/* APB peripheral clocks */
125static APBC_CLK(uart1, MMP2_UART1, 1, 26000000);
126static APBC_CLK(uart2, MMP2_UART2, 1, 26000000);
127static APBC_CLK(uart3, MMP2_UART3, 1, 26000000);
128static APBC_CLK(uart4, MMP2_UART4, 1, 26000000);
129static APBC_CLK(twsi1, MMP2_TWSI1, 0, 26000000);
130static APBC_CLK(twsi2, MMP2_TWSI2, 0, 26000000);
131static APBC_CLK(twsi3, MMP2_TWSI3, 0, 26000000);
132static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000);
133static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000);
134static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000);
135static APBC_CLK(gpio, MMP2_GPIO, 0, 26000000);
136
137static APMU_CLK(nand, NAND, 0xbf, 100000000);
138static APMU_CLK_OPS(sdh0, SDH0, 0x1b, 200000000, &sdhc_clk_ops);
139static APMU_CLK_OPS(sdh1, SDH1, 0x1b, 200000000, &sdhc_clk_ops);
140static APMU_CLK_OPS(sdh2, SDH2, 0x1b, 200000000, &sdhc_clk_ops);
141static APMU_CLK_OPS(sdh3, SDH3, 0x1b, 200000000, &sdhc_clk_ops);
142
143static struct clk_lookup mmp2_clkregs[] = {
144 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
145 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
146 INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL),
147 INIT_CLKREG(&clk_uart4, "pxa2xx-uart.3", NULL),
148 INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.0", NULL),
149 INIT_CLKREG(&clk_twsi2, "pxa2xx-i2c.1", NULL),
150 INIT_CLKREG(&clk_twsi3, "pxa2xx-i2c.2", NULL),
151 INIT_CLKREG(&clk_twsi4, "pxa2xx-i2c.3", NULL),
152 INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL),
153 INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL),
154 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
155 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
156 INIT_CLKREG(&clk_sdh0, "sdhci-pxav3.0", "PXA-SDHCLK"),
157 INIT_CLKREG(&clk_sdh1, "sdhci-pxav3.1", "PXA-SDHCLK"),
158 INIT_CLKREG(&clk_sdh2, "sdhci-pxav3.2", "PXA-SDHCLK"),
159 INIT_CLKREG(&clk_sdh3, "sdhci-pxav3.3", "PXA-SDHCLK"),
160};
161
162static int __init mmp2_init(void) 99static int __init mmp2_init(void)
163{ 100{
164 if (cpu_is_mmp2()) { 101 if (cpu_is_mmp2()) {
@@ -168,25 +105,27 @@ static int __init mmp2_init(void)
168 mfp_init_base(MFPR_VIRT_BASE); 105 mfp_init_base(MFPR_VIRT_BASE);
169 mfp_init_addr(mmp2_addr_map); 106 mfp_init_addr(mmp2_addr_map);
170 pxa_init_dma(IRQ_MMP2_DMA_RIQ, 16); 107 pxa_init_dma(IRQ_MMP2_DMA_RIQ, 16);
171 clkdev_add_table(ARRAY_AND_SIZE(mmp2_clkregs)); 108 mmp2_clk_init();
172 } 109 }
173 110
174 return 0; 111 return 0;
175} 112}
176postcore_initcall(mmp2_init); 113postcore_initcall(mmp2_init);
177 114
115#define APBC_TIMERS APBC_REG(0x024)
116
178static void __init mmp2_timer_init(void) 117static void __init mmp2_timer_init(void)
179{ 118{
180 unsigned long clk_rst; 119 unsigned long clk_rst;
181 120
182 __raw_writel(APBC_APBCLK | APBC_RST, APBC_MMP2_TIMERS); 121 __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
183 122
184 /* 123 /*
185 * enable bus/functional clock, enable 6.5MHz (divider 4), 124 * enable bus/functional clock, enable 6.5MHz (divider 4),
186 * release reset 125 * release reset
187 */ 126 */
188 clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1); 127 clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1);
189 __raw_writel(clk_rst, APBC_MMP2_TIMERS); 128 __raw_writel(clk_rst, APBC_TIMERS);
190 129
191 timer_init(IRQ_MMP2_TIMER1); 130 timer_init(IRQ_MMP2_TIMER1);
192} 131}
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 62d787c3447..b7f074f1549 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -18,8 +18,8 @@
18 18
19#include <asm/mach/time.h> 19#include <asm/mach/time.h>
20#include <asm/system_misc.h> 20#include <asm/system_misc.h>
21#include <mach/addr-map.h>
22#include <mach/cputype.h> 21#include <mach/cputype.h>
22#include <mach/addr-map.h>
23#include <mach/regs-apbc.h> 23#include <mach/regs-apbc.h>
24#include <mach/regs-apmu.h> 24#include <mach/regs-apmu.h>
25#include <mach/irqs.h> 25#include <mach/irqs.h>
@@ -50,62 +50,13 @@ void __init pxa168_init_irq(void)
50 icu_init_irq(); 50 icu_init_irq();
51} 51}
52 52
53/* APB peripheral clocks */
54static APBC_CLK(uart1, PXA168_UART1, 1, 14745600);
55static APBC_CLK(uart2, PXA168_UART2, 1, 14745600);
56static APBC_CLK(uart3, PXA168_UART3, 1, 14745600);
57static APBC_CLK(twsi0, PXA168_TWSI0, 1, 33000000);
58static APBC_CLK(twsi1, PXA168_TWSI1, 1, 33000000);
59static APBC_CLK(pwm1, PXA168_PWM1, 1, 13000000);
60static APBC_CLK(pwm2, PXA168_PWM2, 1, 13000000);
61static APBC_CLK(pwm3, PXA168_PWM3, 1, 13000000);
62static APBC_CLK(pwm4, PXA168_PWM4, 1, 13000000);
63static APBC_CLK(ssp1, PXA168_SSP1, 4, 0);
64static APBC_CLK(ssp2, PXA168_SSP2, 4, 0);
65static APBC_CLK(ssp3, PXA168_SSP3, 4, 0);
66static APBC_CLK(ssp4, PXA168_SSP4, 4, 0);
67static APBC_CLK(ssp5, PXA168_SSP5, 4, 0);
68static APBC_CLK(gpio, PXA168_GPIO, 0, 13000000);
69static APBC_CLK(keypad, PXA168_KPC, 0, 32000);
70static APBC_CLK(rtc, PXA168_RTC, 8, 32768);
71
72static APMU_CLK(nand, NAND, 0x19b, 156000000);
73static APMU_CLK(lcd, LCD, 0x7f, 312000000);
74static APMU_CLK(eth, ETH, 0x09, 0);
75static APMU_CLK(usb, USB, 0x12, 0);
76
77/* device and clock bindings */
78static struct clk_lookup pxa168_clkregs[] = {
79 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
80 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
81 INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL),
82 INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL),
83 INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL),
84 INIT_CLKREG(&clk_pwm1, "pxa168-pwm.0", NULL),
85 INIT_CLKREG(&clk_pwm2, "pxa168-pwm.1", NULL),
86 INIT_CLKREG(&clk_pwm3, "pxa168-pwm.2", NULL),
87 INIT_CLKREG(&clk_pwm4, "pxa168-pwm.3", NULL),
88 INIT_CLKREG(&clk_ssp1, "pxa168-ssp.0", NULL),
89 INIT_CLKREG(&clk_ssp2, "pxa168-ssp.1", NULL),
90 INIT_CLKREG(&clk_ssp3, "pxa168-ssp.2", NULL),
91 INIT_CLKREG(&clk_ssp4, "pxa168-ssp.3", NULL),
92 INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL),
93 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
94 INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL),
95 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
96 INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL),
97 INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"),
98 INIT_CLKREG(&clk_usb, NULL, "PXA168-USBCLK"),
99 INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
100};
101
102static int __init pxa168_init(void) 53static int __init pxa168_init(void)
103{ 54{
104 if (cpu_is_pxa168()) { 55 if (cpu_is_pxa168()) {
105 mfp_init_base(MFPR_VIRT_BASE); 56 mfp_init_base(MFPR_VIRT_BASE);
106 mfp_init_addr(pxa168_mfp_addr_map); 57 mfp_init_addr(pxa168_mfp_addr_map);
107 pxa_init_dma(IRQ_PXA168_DMA_INT0, 32); 58 pxa_init_dma(IRQ_PXA168_DMA_INT0, 32);
108 clkdev_add_table(ARRAY_AND_SIZE(pxa168_clkregs)); 59 pxa168_clk_init();
109 } 60 }
110 61
111 return 0; 62 return 0;
@@ -114,6 +65,7 @@ postcore_initcall(pxa168_init);
114 65
115/* system timer - clock enabled, 3.25MHz */ 66/* system timer - clock enabled, 3.25MHz */
116#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3)) 67#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
68#define APBC_TIMERS APBC_REG(0x34)
117 69
118static void __init pxa168_timer_init(void) 70static void __init pxa168_timer_init(void)
119{ 71{
@@ -121,10 +73,10 @@ static void __init pxa168_timer_init(void)
121 * ourselves instead of using clk_* API. Clock rate is defined 73 * ourselves instead of using clk_* API. Clock rate is defined
122 * by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running 74 * by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running
123 */ 75 */
124 __raw_writel(APBC_APBCLK | APBC_RST, APBC_PXA168_TIMERS); 76 __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
125 77
126 /* 3.25MHz, bus/functional clock enabled, release reset */ 78 /* 3.25MHz, bus/functional clock enabled, release reset */
127 __raw_writel(TIMER_CLK_RST, APBC_PXA168_TIMERS); 79 __raw_writel(TIMER_CLK_RST, APBC_TIMERS);
128 80
129 timer_init(IRQ_PXA168_TIMER1); 81 timer_init(IRQ_PXA168_TIMER1);
130} 82}
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index 6da52e9f2bd..7d84521bb71 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -17,7 +17,6 @@
17#include <asm/mach/time.h> 17#include <asm/mach/time.h>
18#include <mach/addr-map.h> 18#include <mach/addr-map.h>
19#include <mach/regs-apbc.h> 19#include <mach/regs-apbc.h>
20#include <mach/regs-apmu.h>
21#include <mach/cputype.h> 20#include <mach/cputype.h>
22#include <mach/irqs.h> 21#include <mach/irqs.h>
23#include <mach/dma.h> 22#include <mach/dma.h>
@@ -25,7 +24,6 @@
25#include <mach/devices.h> 24#include <mach/devices.h>
26 25
27#include "common.h" 26#include "common.h"
28#include "clock.h"
29 27
30#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000) 28#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
31 29
@@ -82,44 +80,13 @@ void __init pxa910_init_irq(void)
82 icu_init_irq(); 80 icu_init_irq();
83} 81}
84 82
85/* APB peripheral clocks */
86static APBC_CLK(uart1, PXA910_UART0, 1, 14745600);
87static APBC_CLK(uart2, PXA910_UART1, 1, 14745600);
88static APBC_CLK(twsi0, PXA168_TWSI0, 1, 33000000);
89static APBC_CLK(twsi1, PXA168_TWSI1, 1, 33000000);
90static APBC_CLK(pwm1, PXA910_PWM1, 1, 13000000);
91static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000);
92static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000);
93static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000);
94static APBC_CLK(gpio, PXA910_GPIO, 0, 13000000);
95static APBC_CLK(rtc, PXA910_RTC, 8, 32768);
96
97static APMU_CLK(nand, NAND, 0x19b, 156000000);
98static APMU_CLK(u2o, USB, 0x1b, 480000000);
99
100/* device and clock bindings */
101static struct clk_lookup pxa910_clkregs[] = {
102 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
103 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
104 INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL),
105 INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL),
106 INIT_CLKREG(&clk_pwm1, "pxa910-pwm.0", NULL),
107 INIT_CLKREG(&clk_pwm2, "pxa910-pwm.1", NULL),
108 INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL),
109 INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL),
110 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
111 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
112 INIT_CLKREG(&clk_u2o, NULL, "U2OCLK"),
113 INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
114};
115
116static int __init pxa910_init(void) 83static int __init pxa910_init(void)
117{ 84{
118 if (cpu_is_pxa910()) { 85 if (cpu_is_pxa910()) {
119 mfp_init_base(MFPR_VIRT_BASE); 86 mfp_init_base(MFPR_VIRT_BASE);
120 mfp_init_addr(pxa910_mfp_addr_map); 87 mfp_init_addr(pxa910_mfp_addr_map);
121 pxa_init_dma(IRQ_PXA910_DMA_INT0, 32); 88 pxa_init_dma(IRQ_PXA910_DMA_INT0, 32);
122 clkdev_add_table(ARRAY_AND_SIZE(pxa910_clkregs)); 89 pxa910_clk_init();
123 } 90 }
124 91
125 return 0; 92 return 0;
@@ -128,12 +95,13 @@ postcore_initcall(pxa910_init);
128 95
129/* system timer - clock enabled, 3.25MHz */ 96/* system timer - clock enabled, 3.25MHz */
130#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3)) 97#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
98#define APBC_TIMERS APBC_REG(0x34)
131 99
132static void __init pxa910_timer_init(void) 100static void __init pxa910_timer_init(void)
133{ 101{
134 /* reset and configure */ 102 /* reset and configure */
135 __raw_writel(APBC_APBCLK | APBC_RST, APBC_PXA910_TIMERS); 103 __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
136 __raw_writel(TIMER_CLK_RST, APBC_PXA910_TIMERS); 104 __raw_writel(TIMER_CLK_RST, APBC_TIMERS);
137 105
138 timer_init(IRQ_PXA910_AP1_TIMER1); 106 timer_init(IRQ_PXA910_AP1_TIMER1);
139} 107}
diff --git a/arch/arm/mach-mmp/sram.c b/arch/arm/mach-mmp/sram.c
index 4304f951937..7e8a5a2e1ec 100644
--- a/arch/arm/mach-mmp/sram.c
+++ b/arch/arm/mach-mmp/sram.c
@@ -68,7 +68,7 @@ static int __devinit sram_probe(struct platform_device *pdev)
68 struct resource *res; 68 struct resource *res;
69 int ret = 0; 69 int ret = 0;
70 70
71 if (!pdata && !pdata->pool_name) 71 if (!pdata || !pdata->pool_name)
72 return -ENODEV; 72 return -ENODEV;
73 73
74 info = kzalloc(sizeof(*info), GFP_KERNEL); 74 info = kzalloc(sizeof(*info), GFP_KERNEL);
diff --git a/arch/arm/mach-mv78xx0/addr-map.c b/arch/arm/mach-mv78xx0/addr-map.c
index 7764d9386f2..137e479d15a 100644
--- a/arch/arm/mach-mv78xx0/addr-map.c
+++ b/arch/arm/mach-mv78xx0/addr-map.c
@@ -38,7 +38,7 @@
38#define WIN0_OFF(n) (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4)) 38#define WIN0_OFF(n) (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4))
39#define WIN8_OFF(n) (BRIDGE_VIRT_BASE + 0x0900 + (((n) - 8) << 4)) 39#define WIN8_OFF(n) (BRIDGE_VIRT_BASE + 0x0900 + (((n) - 8) << 4))
40 40
41static void __init __iomem *win_cfg_base(int win) 41static void __init __iomem *win_cfg_base(const struct orion_addr_map_cfg *cfg, int win)
42{ 42{
43 /* 43 /*
44 * Find the control register base address for this window. 44 * Find the control register base address for this window.
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 20826449e61..6b0c3873552 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -208,7 +208,8 @@ void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)
208{ 208{
209 orion_ge00_init(eth_data, 209 orion_ge00_init(eth_data,
210 GE00_PHYS_BASE, IRQ_MV78XX0_GE00_SUM, 210 GE00_PHYS_BASE, IRQ_MV78XX0_GE00_SUM,
211 IRQ_MV78XX0_GE_ERR); 211 IRQ_MV78XX0_GE_ERR,
212 MV643XX_TX_CSUM_DEFAULT_LIMIT);
212} 213}
213 214
214 215
@@ -219,7 +220,8 @@ void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data)
219{ 220{
220 orion_ge01_init(eth_data, 221 orion_ge01_init(eth_data,
221 GE01_PHYS_BASE, IRQ_MV78XX0_GE01_SUM, 222 GE01_PHYS_BASE, IRQ_MV78XX0_GE01_SUM,
222 NO_IRQ); 223 NO_IRQ,
224 MV643XX_TX_CSUM_DEFAULT_LIMIT);
223} 225}
224 226
225 227
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index dd2db025f77..fcd4e85c4dd 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -62,13 +62,14 @@ config ARCH_OMAP4
62 select PM_OPP if PM 62 select PM_OPP if PM
63 select USB_ARCH_HAS_EHCI if USB_SUPPORT 63 select USB_ARCH_HAS_EHCI if USB_SUPPORT
64 select ARM_CPU_SUSPEND if PM 64 select ARM_CPU_SUSPEND if PM
65 select ARCH_NEEDS_CPU_IDLE_COUPLED 65 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
66 66
67config SOC_OMAP5 67config SOC_OMAP5
68 bool "TI OMAP5" 68 bool "TI OMAP5"
69 select CPU_V7 69 select CPU_V7
70 select ARM_GIC 70 select ARM_GIC
71 select HAVE_SMP 71 select HAVE_SMP
72 select ARM_CPU_SUSPEND if PM
72 73
73comment "OMAP Core Type" 74comment "OMAP Core Type"
74 depends on ARCH_OMAP2 75 depends on ARCH_OMAP2
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 74915295482..28214483aab 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -554,6 +554,8 @@ static const struct usbhs_omap_board_data igep3_usbhs_bdata __initconst = {
554 554
555#ifdef CONFIG_OMAP_MUX 555#ifdef CONFIG_OMAP_MUX
556static struct omap_board_mux board_mux[] __initdata = { 556static struct omap_board_mux board_mux[] __initdata = {
557 /* SMSC9221 LAN Controller ETH IRQ (GPIO_176) */
558 OMAP3_MUX(MCSPI1_CS2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
557 { .reg_offset = OMAP_MUX_TERMINATOR }, 559 { .reg_offset = OMAP_MUX_TERMINATOR },
558}; 560};
559#endif 561#endif
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index ef230a0eb5e..0d362e9f9cb 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -58,6 +58,7 @@
58#include "hsmmc.h" 58#include "hsmmc.h"
59#include "common-board-devices.h" 59#include "common-board-devices.h"
60 60
61#define OMAP3_EVM_TS_GPIO 175
61#define OMAP3_EVM_EHCI_VBUS 22 62#define OMAP3_EVM_EHCI_VBUS 22
62#define OMAP3_EVM_EHCI_SELECT 61 63#define OMAP3_EVM_EHCI_SELECT 61
63 64
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c
index 14734746457..c1875862679 100644
--- a/arch/arm/mach-omap2/common-board-devices.c
+++ b/arch/arm/mach-omap2/common-board-devices.c
@@ -35,16 +35,6 @@ static struct omap2_mcspi_device_config ads7846_mcspi_config = {
35 .turbo_mode = 0, 35 .turbo_mode = 0,
36}; 36};
37 37
38/*
39 * ADS7846 driver maybe request a gpio according to the value
40 * of pdata->get_pendown_state, but we have done this. So set
41 * get_pendown_state to avoid twice gpio requesting.
42 */
43static int omap3_get_pendown_state(void)
44{
45 return !gpio_get_value(OMAP3_EVM_TS_GPIO);
46}
47
48static struct ads7846_platform_data ads7846_config = { 38static struct ads7846_platform_data ads7846_config = {
49 .x_max = 0x0fff, 39 .x_max = 0x0fff,
50 .y_max = 0x0fff, 40 .y_max = 0x0fff,
@@ -55,7 +45,6 @@ static struct ads7846_platform_data ads7846_config = {
55 .debounce_rep = 1, 45 .debounce_rep = 1,
56 .gpio_pendown = -EINVAL, 46 .gpio_pendown = -EINVAL,
57 .keep_vref_on = 1, 47 .keep_vref_on = 1,
58 .get_pendown_state = &omap3_get_pendown_state,
59}; 48};
60 49
61static struct spi_board_info ads7846_spi_board_info __initdata = { 50static struct spi_board_info ads7846_spi_board_info __initdata = {
diff --git a/arch/arm/mach-omap2/common-board-devices.h b/arch/arm/mach-omap2/common-board-devices.h
index 4c4ef6a6166..a0b4a42836a 100644
--- a/arch/arm/mach-omap2/common-board-devices.h
+++ b/arch/arm/mach-omap2/common-board-devices.h
@@ -4,7 +4,6 @@
4#include "twl-common.h" 4#include "twl-common.h"
5 5
6#define NAND_BLOCK_SIZE SZ_128K 6#define NAND_BLOCK_SIZE SZ_128K
7#define OMAP3_EVM_TS_GPIO 175
8 7
9struct mtd_partition; 8struct mtd_partition;
10struct ads7846_platform_data; 9struct ads7846_platform_data;
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c
index ee05e193fc6..288bee6cbb7 100644
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -238,8 +238,9 @@ int __init omap4_idle_init(void)
238 for_each_cpu(cpu_id, cpu_online_mask) { 238 for_each_cpu(cpu_id, cpu_online_mask) {
239 dev = &per_cpu(omap4_idle_dev, cpu_id); 239 dev = &per_cpu(omap4_idle_dev, cpu_id);
240 dev->cpu = cpu_id; 240 dev->cpu = cpu_id;
241#ifdef CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED
241 dev->coupled_cpus = *cpu_online_mask; 242 dev->coupled_cpus = *cpu_online_mask;
242 243#endif
243 cpuidle_register_driver(&omap4_idle_driver); 244 cpuidle_register_driver(&omap4_idle_driver);
244 245
245 if (cpuidle_register_device(dev)) { 246 if (cpuidle_register_device(dev)) {
diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
index 471e62a74a1..76f9b3c2f58 100644
--- a/arch/arm/mach-omap2/mux.h
+++ b/arch/arm/mach-omap2/mux.h
@@ -127,7 +127,6 @@ struct omap_mux_partition {
127 * @gpio: GPIO number 127 * @gpio: GPIO number
128 * @muxnames: available signal modes for a ball 128 * @muxnames: available signal modes for a ball
129 * @balls: available balls on the package 129 * @balls: available balls on the package
130 * @partition: mux partition
131 */ 130 */
132struct omap_mux { 131struct omap_mux {
133 u16 reg_offset; 132 u16 reg_offset;
diff --git a/arch/arm/mach-omap2/opp4xxx_data.c b/arch/arm/mach-omap2/opp4xxx_data.c
index 2293ba27101..c95415da23c 100644
--- a/arch/arm/mach-omap2/opp4xxx_data.c
+++ b/arch/arm/mach-omap2/opp4xxx_data.c
@@ -94,7 +94,7 @@ int __init omap4_opp_init(void)
94{ 94{
95 int r = -ENODEV; 95 int r = -ENODEV;
96 96
97 if (!cpu_is_omap44xx()) 97 if (!cpu_is_omap443x())
98 return r; 98 return r;
99 99
100 r = omap_init_opp_table(omap44xx_opp_def_list, 100 r = omap_init_opp_table(omap44xx_opp_def_list,
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index e4fc88c65db..05bd8f02723 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -272,21 +272,16 @@ void omap_sram_idle(void)
272 per_next_state = pwrdm_read_next_pwrst(per_pwrdm); 272 per_next_state = pwrdm_read_next_pwrst(per_pwrdm);
273 core_next_state = pwrdm_read_next_pwrst(core_pwrdm); 273 core_next_state = pwrdm_read_next_pwrst(core_pwrdm);
274 274
275 if (mpu_next_state < PWRDM_POWER_ON) { 275 pwrdm_pre_transition(NULL);
276 pwrdm_pre_transition(mpu_pwrdm);
277 pwrdm_pre_transition(neon_pwrdm);
278 }
279 276
280 /* PER */ 277 /* PER */
281 if (per_next_state < PWRDM_POWER_ON) { 278 if (per_next_state < PWRDM_POWER_ON) {
282 pwrdm_pre_transition(per_pwrdm);
283 per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0; 279 per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0;
284 omap2_gpio_prepare_for_idle(per_going_off); 280 omap2_gpio_prepare_for_idle(per_going_off);
285 } 281 }
286 282
287 /* CORE */ 283 /* CORE */
288 if (core_next_state < PWRDM_POWER_ON) { 284 if (core_next_state < PWRDM_POWER_ON) {
289 pwrdm_pre_transition(core_pwrdm);
290 if (core_next_state == PWRDM_POWER_OFF) { 285 if (core_next_state == PWRDM_POWER_OFF) {
291 omap3_core_save_context(); 286 omap3_core_save_context();
292 omap3_cm_save_context(); 287 omap3_cm_save_context();
@@ -339,20 +334,14 @@ void omap_sram_idle(void)
339 omap2_prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF_MASK, 334 omap2_prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF_MASK,
340 OMAP3430_GR_MOD, 335 OMAP3430_GR_MOD,
341 OMAP3_PRM_VOLTCTRL_OFFSET); 336 OMAP3_PRM_VOLTCTRL_OFFSET);
342 pwrdm_post_transition(core_pwrdm);
343 } 337 }
344 omap3_intc_resume_idle(); 338 omap3_intc_resume_idle();
345 339
340 pwrdm_post_transition(NULL);
341
346 /* PER */ 342 /* PER */
347 if (per_next_state < PWRDM_POWER_ON) { 343 if (per_next_state < PWRDM_POWER_ON)
348 omap2_gpio_resume_after_idle(); 344 omap2_gpio_resume_after_idle();
349 pwrdm_post_transition(per_pwrdm);
350 }
351
352 if (mpu_next_state < PWRDM_POWER_ON) {
353 pwrdm_post_transition(mpu_pwrdm);
354 pwrdm_post_transition(neon_pwrdm);
355 }
356} 345}
357 346
358static void omap3_pm_idle(void) 347static void omap3_pm_idle(void)
diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S
index 9f6b83d1b19..91e71d8f46f 100644
--- a/arch/arm/mach-omap2/sleep44xx.S
+++ b/arch/arm/mach-omap2/sleep44xx.S
@@ -56,9 +56,13 @@ ppa_por_params:
56 * The restore function pointer is stored at CPUx_WAKEUP_NS_PA_ADDR_OFFSET. 56 * The restore function pointer is stored at CPUx_WAKEUP_NS_PA_ADDR_OFFSET.
57 * It returns to the caller for CPU INACTIVE and ON power states or in case 57 * It returns to the caller for CPU INACTIVE and ON power states or in case
58 * CPU failed to transition to targeted OFF/DORMANT state. 58 * CPU failed to transition to targeted OFF/DORMANT state.
59 *
60 * omap4_finish_suspend() calls v7_flush_dcache_all() which doesn't save
61 * stack frame and it expects the caller to take care of it. Hence the entire
62 * stack frame is saved to avoid possible stack corruption.
59 */ 63 */
60ENTRY(omap4_finish_suspend) 64ENTRY(omap4_finish_suspend)
61 stmfd sp!, {lr} 65 stmfd sp!, {r4-r12, lr}
62 cmp r0, #0x0 66 cmp r0, #0x0
63 beq do_WFI @ No lowpower state, jump to WFI 67 beq do_WFI @ No lowpower state, jump to WFI
64 68
@@ -226,7 +230,7 @@ scu_gp_clear:
226skip_scu_gp_clear: 230skip_scu_gp_clear:
227 isb 231 isb
228 dsb 232 dsb
229 ldmfd sp!, {pc} 233 ldmfd sp!, {r4-r12, pc}
230ENDPROC(omap4_finish_suspend) 234ENDPROC(omap4_finish_suspend)
231 235
232/* 236/*
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index de47f170ba5..db5ff664237 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -67,6 +67,7 @@ void __init omap_pmic_init(int bus, u32 clkrate,
67 const char *pmic_type, int pmic_irq, 67 const char *pmic_type, int pmic_irq,
68 struct twl4030_platform_data *pmic_data) 68 struct twl4030_platform_data *pmic_data)
69{ 69{
70 omap_mux_init_signal("sys_nirq", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
70 strncpy(pmic_i2c_board_info.type, pmic_type, 71 strncpy(pmic_i2c_board_info.type, pmic_type,
71 sizeof(pmic_i2c_board_info.type)); 72 sizeof(pmic_i2c_board_info.type));
72 pmic_i2c_board_info.irq = pmic_irq; 73 pmic_i2c_board_info.irq = pmic_irq;
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 70f7d712d6f..87a6cdabcad 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -99,7 +99,8 @@ void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
99{ 99{
100 orion_ge00_init(eth_data, 100 orion_ge00_init(eth_data,
101 ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM, 101 ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM,
102 IRQ_ORION5X_ETH_ERR); 102 IRQ_ORION5X_ETH_ERR,
103 MV643XX_TX_CSUM_DEFAULT_LIMIT);
103} 104}
104 105
105 106
diff --git a/arch/arm/mach-s3c24xx/include/mach/dma.h b/arch/arm/mach-s3c24xx/include/mach/dma.h
index 454831b6603..ee99fd56c04 100644
--- a/arch/arm/mach-s3c24xx/include/mach/dma.h
+++ b/arch/arm/mach-s3c24xx/include/mach/dma.h
@@ -24,7 +24,8 @@
24*/ 24*/
25 25
26enum dma_ch { 26enum dma_ch {
27 DMACH_XD0, 27 DMACH_DT_PROP = -1, /* not yet supported, do not use */
28 DMACH_XD0 = 0,
28 DMACH_XD1, 29 DMACH_XD1,
29 DMACH_SDI, 30 DMACH_SDI,
30 DMACH_SPI0, 31 DMACH_SPI0,
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index c013bbf79ca..53d3d46dec1 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -41,7 +41,6 @@ config MACH_HREFV60
41config MACH_SNOWBALL 41config MACH_SNOWBALL
42 bool "U8500 Snowball platform" 42 bool "U8500 Snowball platform"
43 select MACH_MOP500 43 select MACH_MOP500
44 select LEDS_GPIO
45 help 44 help
46 Include support for the snowball development platform. 45 Include support for the snowball development platform.
47 46
diff --git a/arch/arm/mach-ux500/board-mop500-msp.c b/arch/arm/mach-ux500/board-mop500-msp.c
index 99604803874..df15646036a 100644
--- a/arch/arm/mach-ux500/board-mop500-msp.c
+++ b/arch/arm/mach-ux500/board-mop500-msp.c
@@ -191,9 +191,9 @@ static struct platform_device *db8500_add_msp_i2s(struct device *parent,
191 return pdev; 191 return pdev;
192} 192}
193 193
194/* Platform device for ASoC U8500 machine */ 194/* Platform device for ASoC MOP500 machine */
195static struct platform_device snd_soc_u8500 = { 195static struct platform_device snd_soc_mop500 = {
196 .name = "snd-soc-u8500", 196 .name = "snd-soc-mop500",
197 .id = 0, 197 .id = 0,
198 .dev = { 198 .dev = {
199 .platform_data = NULL, 199 .platform_data = NULL,
@@ -227,8 +227,8 @@ int mop500_msp_init(struct device *parent)
227{ 227{
228 struct platform_device *msp1; 228 struct platform_device *msp1;
229 229
230 pr_info("%s: Register platform-device 'snd-soc-u8500'.\n", __func__); 230 pr_info("%s: Register platform-device 'snd-soc-mop500'.\n", __func__);
231 platform_device_register(&snd_soc_u8500); 231 platform_device_register(&snd_soc_mop500);
232 232
233 pr_info("Initialize MSP I2S-devices.\n"); 233 pr_info("Initialize MSP I2S-devices.\n");
234 db8500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0, 234 db8500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0,
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 8674a890fd1..a534d8880de 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -797,6 +797,7 @@ static void __init u8500_init_machine(void)
797 ARRAY_SIZE(mop500_platform_devs)); 797 ARRAY_SIZE(mop500_platform_devs));
798 798
799 mop500_sdi_init(parent); 799 mop500_sdi_init(parent);
800 mop500_msp_init(parent);
800 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices); 801 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
801 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs); 802 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
802 i2c_register_board_info(2, mop500_i2c2_devices, 803 i2c_register_board_info(2, mop500_i2c2_devices,
@@ -804,6 +805,8 @@ static void __init u8500_init_machine(void)
804 805
805 mop500_uib_init(); 806 mop500_uib_init();
806 807
808 } else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
809 mop500_msp_init(parent);
807 } else if (of_machine_is_compatible("st-ericsson,hrefv60+")) { 810 } else if (of_machine_is_compatible("st-ericsson,hrefv60+")) {
808 /* 811 /*
809 * The HREFv60 board removed a GPIO expander and routed 812 * The HREFv60 board removed a GPIO expander and routed
@@ -815,6 +818,7 @@ static void __init u8500_init_machine(void)
815 ARRAY_SIZE(mop500_platform_devs)); 818 ARRAY_SIZE(mop500_platform_devs));
816 819
817 hrefv60_sdi_init(parent); 820 hrefv60_sdi_init(parent);
821 mop500_msp_init(parent);
818 822
819 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices); 823 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
820 i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES; 824 i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 626ad8cad7a..938b50a3343 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -189,6 +189,7 @@ struct omap_dm_timer *omap_dm_timer_request(void)
189 timer->reserved = 1; 189 timer->reserved = 1;
190 break; 190 break;
191 } 191 }
192 spin_unlock_irqrestore(&dm_timer_lock, flags);
192 193
193 if (timer) { 194 if (timer) {
194 ret = omap_dm_timer_prepare(timer); 195 ret = omap_dm_timer_prepare(timer);
@@ -197,7 +198,6 @@ struct omap_dm_timer *omap_dm_timer_request(void)
197 timer = NULL; 198 timer = NULL;
198 } 199 }
199 } 200 }
200 spin_unlock_irqrestore(&dm_timer_lock, flags);
201 201
202 if (!timer) 202 if (!timer)
203 pr_debug("%s: timer request failed!\n", __func__); 203 pr_debug("%s: timer request failed!\n", __func__);
@@ -220,6 +220,7 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
220 break; 220 break;
221 } 221 }
222 } 222 }
223 spin_unlock_irqrestore(&dm_timer_lock, flags);
223 224
224 if (timer) { 225 if (timer) {
225 ret = omap_dm_timer_prepare(timer); 226 ret = omap_dm_timer_prepare(timer);
@@ -228,7 +229,6 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
228 timer = NULL; 229 timer = NULL;
229 } 230 }
230 } 231 }
231 spin_unlock_irqrestore(&dm_timer_lock, flags);
232 232
233 if (!timer) 233 if (!timer)
234 pr_debug("%s: timer%d request failed!\n", __func__, id); 234 pr_debug("%s: timer%d request failed!\n", __func__, id);
@@ -258,7 +258,7 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_enable);
258 258
259void omap_dm_timer_disable(struct omap_dm_timer *timer) 259void omap_dm_timer_disable(struct omap_dm_timer *timer)
260{ 260{
261 pm_runtime_put(&timer->pdev->dev); 261 pm_runtime_put_sync(&timer->pdev->dev);
262} 262}
263EXPORT_SYMBOL_GPL(omap_dm_timer_disable); 263EXPORT_SYMBOL_GPL(omap_dm_timer_disable);
264 264
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 68b180edcff..bb5d08a70db 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -372,7 +372,8 @@ IS_OMAP_TYPE(3430, 0x3430)
372#define cpu_class_is_omap1() (cpu_is_omap7xx() || cpu_is_omap15xx() || \ 372#define cpu_class_is_omap1() (cpu_is_omap7xx() || cpu_is_omap15xx() || \
373 cpu_is_omap16xx()) 373 cpu_is_omap16xx())
374#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx() || \ 374#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx() || \
375 cpu_is_omap44xx() || soc_is_omap54xx()) 375 cpu_is_omap44xx() || soc_is_omap54xx() || \
376 soc_is_am33xx())
376 377
377/* Various silicon revisions for omap2 */ 378/* Various silicon revisions for omap2 */
378#define OMAP242X_CLASS 0x24200024 379#define OMAP242X_CLASS 0x24200024
diff --git a/arch/arm/plat-omap/include/plat/multi.h b/arch/arm/plat-omap/include/plat/multi.h
index 045e320f106..324d31b1485 100644
--- a/arch/arm/plat-omap/include/plat/multi.h
+++ b/arch/arm/plat-omap/include/plat/multi.h
@@ -108,4 +108,13 @@
108# endif 108# endif
109#endif 109#endif
110 110
111#ifdef CONFIG_SOC_AM33XX
112# ifdef OMAP_NAME
113# undef MULTI_OMAP2
114# define MULTI_OMAP2
115# else
116# define OMAP_NAME am33xx
117# endif
118#endif
119
111#endif /* __PLAT_OMAP_MULTI_H */ 120#endif /* __PLAT_OMAP_MULTI_H */
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h
index b8d19a13678..7f7b112accc 100644
--- a/arch/arm/plat-omap/include/plat/uncompress.h
+++ b/arch/arm/plat-omap/include/plat/uncompress.h
@@ -110,7 +110,7 @@ static inline void flush(void)
110 _DEBUG_LL_ENTRY(mach, AM33XX_UART##p##_BASE, OMAP_PORT_SHIFT, \ 110 _DEBUG_LL_ENTRY(mach, AM33XX_UART##p##_BASE, OMAP_PORT_SHIFT, \
111 AM33XXUART##p) 111 AM33XXUART##p)
112 112
113static inline void __arch_decomp_setup(unsigned long arch_id) 113static inline void arch_decomp_setup(void)
114{ 114{
115 int port = 0; 115 int port = 0;
116 116
@@ -198,8 +198,6 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
198 } while (0); 198 } while (0);
199} 199}
200 200
201#define arch_decomp_setup() __arch_decomp_setup(arch_id)
202
203/* 201/*
204 * nothing to do 202 * nothing to do
205 */ 203 */
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index d245a87dc01..b8b747a9d36 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -291,10 +291,12 @@ static struct platform_device orion_ge00 = {
291void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, 291void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
292 unsigned long mapbase, 292 unsigned long mapbase,
293 unsigned long irq, 293 unsigned long irq,
294 unsigned long irq_err) 294 unsigned long irq_err,
295 unsigned int tx_csum_limit)
295{ 296{
296 fill_resources(&orion_ge00_shared, orion_ge00_shared_resources, 297 fill_resources(&orion_ge00_shared, orion_ge00_shared_resources,
297 mapbase + 0x2000, SZ_16K - 1, irq_err); 298 mapbase + 0x2000, SZ_16K - 1, irq_err);
299 orion_ge00_shared_data.tx_csum_limit = tx_csum_limit;
298 ge_complete(&orion_ge00_shared_data, 300 ge_complete(&orion_ge00_shared_data,
299 orion_ge00_resources, irq, &orion_ge00_shared, 301 orion_ge00_resources, irq, &orion_ge00_shared,
300 eth_data, &orion_ge00); 302 eth_data, &orion_ge00);
@@ -343,10 +345,12 @@ static struct platform_device orion_ge01 = {
343void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, 345void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
344 unsigned long mapbase, 346 unsigned long mapbase,
345 unsigned long irq, 347 unsigned long irq,
346 unsigned long irq_err) 348 unsigned long irq_err,
349 unsigned int tx_csum_limit)
347{ 350{
348 fill_resources(&orion_ge01_shared, orion_ge01_shared_resources, 351 fill_resources(&orion_ge01_shared, orion_ge01_shared_resources,
349 mapbase + 0x2000, SZ_16K - 1, irq_err); 352 mapbase + 0x2000, SZ_16K - 1, irq_err);
353 orion_ge01_shared_data.tx_csum_limit = tx_csum_limit;
350 ge_complete(&orion_ge01_shared_data, 354 ge_complete(&orion_ge01_shared_data,
351 orion_ge01_resources, irq, &orion_ge01_shared, 355 orion_ge01_resources, irq, &orion_ge01_shared,
352 eth_data, &orion_ge01); 356 eth_data, &orion_ge01);
diff --git a/arch/arm/plat-orion/include/plat/common.h b/arch/arm/plat-orion/include/plat/common.h
index e00fdb21360..ae2377ef63e 100644
--- a/arch/arm/plat-orion/include/plat/common.h
+++ b/arch/arm/plat-orion/include/plat/common.h
@@ -39,12 +39,14 @@ void __init orion_rtc_init(unsigned long mapbase,
39void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, 39void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
40 unsigned long mapbase, 40 unsigned long mapbase,
41 unsigned long irq, 41 unsigned long irq,
42 unsigned long irq_err); 42 unsigned long irq_err,
43 unsigned int tx_csum_limit);
43 44
44void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, 45void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
45 unsigned long mapbase, 46 unsigned long mapbase,
46 unsigned long irq, 47 unsigned long irq,
47 unsigned long irq_err); 48 unsigned long irq_err,
49 unsigned int tx_csum_limit);
48 50
49void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data, 51void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data,
50 unsigned long mapbase, 52 unsigned long mapbase,
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index 28f898f7538..db98e7021f0 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -430,7 +430,7 @@ s3c2410_dma_canload(struct s3c2410_dma_chan *chan)
430 * when necessary. 430 * when necessary.
431*/ 431*/
432 432
433int s3c2410_dma_enqueue(unsigned int channel, void *id, 433int s3c2410_dma_enqueue(enum dma_ch channel, void *id,
434 dma_addr_t data, int size) 434 dma_addr_t data, int size)
435{ 435{
436 struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); 436 struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel);
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 8154fab70de..6ff45d53362 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -32,6 +32,8 @@
32#include <linux/platform_data/s3c-hsudc.h> 32#include <linux/platform_data/s3c-hsudc.h>
33#include <linux/platform_data/s3c-hsotg.h> 33#include <linux/platform_data/s3c-hsotg.h>
34 34
35#include <media/s5p_hdmi.h>
36
35#include <asm/irq.h> 37#include <asm/irq.h>
36#include <asm/mach/arch.h> 38#include <asm/mach/arch.h>
37#include <asm/mach/map.h> 39#include <asm/mach/map.h>
@@ -747,7 +749,8 @@ void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
747 if (!pd) { 749 if (!pd) {
748 pd = &default_i2c_data; 750 pd = &default_i2c_data;
749 751
750 if (soc_is_exynos4210()) 752 if (soc_is_exynos4210() ||
753 soc_is_exynos4212() || soc_is_exynos4412())
751 pd->bus_num = 8; 754 pd->bus_num = 8;
752 else if (soc_is_s5pv210()) 755 else if (soc_is_s5pv210())
753 pd->bus_num = 3; 756 pd->bus_num = 3;
@@ -758,6 +761,30 @@ void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
758 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), 761 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
759 &s5p_device_i2c_hdmiphy); 762 &s5p_device_i2c_hdmiphy);
760} 763}
764
765struct s5p_hdmi_platform_data s5p_hdmi_def_platdata;
766
767void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
768 struct i2c_board_info *mhl_info, int mhl_bus)
769{
770 struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata;
771
772 if (soc_is_exynos4210() ||
773 soc_is_exynos4212() || soc_is_exynos4412())
774 pd->hdmiphy_bus = 8;
775 else if (soc_is_s5pv210())
776 pd->hdmiphy_bus = 3;
777 else
778 pd->hdmiphy_bus = 0;
779
780 pd->hdmiphy_info = hdmiphy_info;
781 pd->mhl_info = mhl_info;
782 pd->mhl_bus = mhl_bus;
783
784 s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data),
785 &s5p_device_hdmi);
786}
787
761#endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */ 788#endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
762 789
763/* I2S */ 790/* I2S */
diff --git a/arch/arm/plat-samsung/include/plat/hdmi.h b/arch/arm/plat-samsung/include/plat/hdmi.h
new file mode 100644
index 00000000000..331d046ac2c
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/hdmi.h
@@ -0,0 +1,16 @@
1/*
2 * Copyright (C) 2012 Samsung Electronics Co.Ltd
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 */
9
10#ifndef __PLAT_SAMSUNG_HDMI_H
11#define __PLAT_SAMSUNG_HDMI_H __FILE__
12
13extern void s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
14 struct i2c_board_info *mhl_info, int mhl_bus);
15
16#endif /* __PLAT_SAMSUNG_HDMI_H */
diff --git a/arch/arm/plat-samsung/pm.c b/arch/arm/plat-samsung/pm.c
index 64ab65f0fdb..15070284343 100644
--- a/arch/arm/plat-samsung/pm.c
+++ b/arch/arm/plat-samsung/pm.c
@@ -74,7 +74,7 @@ unsigned char pm_uart_udivslot;
74 74
75#ifdef CONFIG_SAMSUNG_PM_DEBUG 75#ifdef CONFIG_SAMSUNG_PM_DEBUG
76 76
77struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS]; 77static struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS];
78 78
79static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save) 79static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
80{ 80{
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 331d574df99..faf65286574 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -89,6 +89,7 @@ config ATH79
89 select CEVT_R4K 89 select CEVT_R4K
90 select CSRC_R4K 90 select CSRC_R4K
91 select DMA_NONCOHERENT 91 select DMA_NONCOHERENT
92 select HAVE_CLK
92 select IRQ_CPU 93 select IRQ_CPU
93 select MIPS_MACHINE 94 select MIPS_MACHINE
94 select SYS_HAS_CPU_MIPS32_R2 95 select SYS_HAS_CPU_MIPS32_R2
diff --git a/arch/mips/alchemy/board-mtx1.c b/arch/mips/alchemy/board-mtx1.c
index 99969484c47..a124c251c0c 100644
--- a/arch/mips/alchemy/board-mtx1.c
+++ b/arch/mips/alchemy/board-mtx1.c
@@ -228,6 +228,8 @@ static int mtx1_pci_idsel(unsigned int devsel, int assert)
228 * adapter on the mtx-1 "singleboard" variant. It triggers a custom 228 * adapter on the mtx-1 "singleboard" variant. It triggers a custom
229 * logic chip connected to EXT_IO3 (GPIO1) to suppress IDSEL signals. 229 * logic chip connected to EXT_IO3 (GPIO1) to suppress IDSEL signals.
230 */ 230 */
231 udelay(1);
232
231 if (assert && devsel != 0) 233 if (assert && devsel != 0)
232 /* Suppress signal to Cardbus */ 234 /* Suppress signal to Cardbus */
233 alchemy_gpio_set_value(1, 0); /* set EXT_IO3 OFF */ 235 alchemy_gpio_set_value(1, 0); /* set EXT_IO3 OFF */
diff --git a/arch/mips/ath79/dev-usb.c b/arch/mips/ath79/dev-usb.c
index 36e9570e7bc..b2a2311ec85 100644
--- a/arch/mips/ath79/dev-usb.c
+++ b/arch/mips/ath79/dev-usb.c
@@ -145,6 +145,8 @@ static void __init ar7240_usb_setup(void)
145 145
146 ath79_ohci_resources[0].start = AR7240_OHCI_BASE; 146 ath79_ohci_resources[0].start = AR7240_OHCI_BASE;
147 ath79_ohci_resources[0].end = AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1; 147 ath79_ohci_resources[0].end = AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1;
148 ath79_ohci_resources[1].start = ATH79_CPU_IRQ_USB;
149 ath79_ohci_resources[1].end = ATH79_CPU_IRQ_USB;
148 platform_device_register(&ath79_ohci_device); 150 platform_device_register(&ath79_ohci_device);
149} 151}
150 152
diff --git a/arch/mips/ath79/gpio.c b/arch/mips/ath79/gpio.c
index 29054f21183..48fe762d252 100644
--- a/arch/mips/ath79/gpio.c
+++ b/arch/mips/ath79/gpio.c
@@ -188,8 +188,10 @@ void __init ath79_gpio_init(void)
188 188
189 if (soc_is_ar71xx()) 189 if (soc_is_ar71xx())
190 ath79_gpio_count = AR71XX_GPIO_COUNT; 190 ath79_gpio_count = AR71XX_GPIO_COUNT;
191 else if (soc_is_ar724x()) 191 else if (soc_is_ar7240())
192 ath79_gpio_count = AR724X_GPIO_COUNT; 192 ath79_gpio_count = AR7240_GPIO_COUNT;
193 else if (soc_is_ar7241() || soc_is_ar7242())
194 ath79_gpio_count = AR7241_GPIO_COUNT;
193 else if (soc_is_ar913x()) 195 else if (soc_is_ar913x())
194 ath79_gpio_count = AR913X_GPIO_COUNT; 196 ath79_gpio_count = AR913X_GPIO_COUNT;
195 else if (soc_is_ar933x()) 197 else if (soc_is_ar933x())
diff --git a/arch/mips/bcm63xx/dev-spi.c b/arch/mips/bcm63xx/dev-spi.c
index e39f73048d4..f1c9c3e2f67 100644
--- a/arch/mips/bcm63xx/dev-spi.c
+++ b/arch/mips/bcm63xx/dev-spi.c
@@ -106,11 +106,15 @@ int __init bcm63xx_spi_register(void)
106 if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) { 106 if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) {
107 spi_resources[0].end += BCM_6338_RSET_SPI_SIZE - 1; 107 spi_resources[0].end += BCM_6338_RSET_SPI_SIZE - 1;
108 spi_pdata.fifo_size = SPI_6338_MSG_DATA_SIZE; 108 spi_pdata.fifo_size = SPI_6338_MSG_DATA_SIZE;
109 spi_pdata.msg_type_shift = SPI_6338_MSG_TYPE_SHIFT;
110 spi_pdata.msg_ctl_width = SPI_6338_MSG_CTL_WIDTH;
109 } 111 }
110 112
111 if (BCMCPU_IS_6358() || BCMCPU_IS_6368()) { 113 if (BCMCPU_IS_6358() || BCMCPU_IS_6368()) {
112 spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1; 114 spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
113 spi_pdata.fifo_size = SPI_6358_MSG_DATA_SIZE; 115 spi_pdata.fifo_size = SPI_6358_MSG_DATA_SIZE;
116 spi_pdata.msg_type_shift = SPI_6358_MSG_TYPE_SHIFT;
117 spi_pdata.msg_ctl_width = SPI_6358_MSG_CTL_WIDTH;
114 } 118 }
115 119
116 bcm63xx_spi_regs_init(); 120 bcm63xx_spi_regs_init();
diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c
index 7fb1f222b8a..274cd4fad30 100644
--- a/arch/mips/cavium-octeon/octeon-irq.c
+++ b/arch/mips/cavium-octeon/octeon-irq.c
@@ -61,6 +61,12 @@ static void octeon_irq_set_ciu_mapping(int irq, int line, int bit,
61 octeon_irq_ciu_to_irq[line][bit] = irq; 61 octeon_irq_ciu_to_irq[line][bit] = irq;
62} 62}
63 63
64static void octeon_irq_force_ciu_mapping(struct irq_domain *domain,
65 int irq, int line, int bit)
66{
67 irq_domain_associate(domain, irq, line << 6 | bit);
68}
69
64static int octeon_coreid_for_cpu(int cpu) 70static int octeon_coreid_for_cpu(int cpu)
65{ 71{
66#ifdef CONFIG_SMP 72#ifdef CONFIG_SMP
@@ -183,19 +189,9 @@ static void __init octeon_irq_init_core(void)
183 mutex_init(&cd->core_irq_mutex); 189 mutex_init(&cd->core_irq_mutex);
184 190
185 irq = OCTEON_IRQ_SW0 + i; 191 irq = OCTEON_IRQ_SW0 + i;
186 switch (irq) { 192 irq_set_chip_data(irq, cd);
187 case OCTEON_IRQ_TIMER: 193 irq_set_chip_and_handler(irq, &octeon_irq_chip_core,
188 case OCTEON_IRQ_SW0: 194 handle_percpu_irq);
189 case OCTEON_IRQ_SW1:
190 case OCTEON_IRQ_5:
191 case OCTEON_IRQ_PERF:
192 irq_set_chip_data(irq, cd);
193 irq_set_chip_and_handler(irq, &octeon_irq_chip_core,
194 handle_percpu_irq);
195 break;
196 default:
197 break;
198 }
199 } 195 }
200} 196}
201 197
@@ -890,7 +886,6 @@ static int octeon_irq_gpio_xlat(struct irq_domain *d,
890 unsigned int type; 886 unsigned int type;
891 unsigned int pin; 887 unsigned int pin;
892 unsigned int trigger; 888 unsigned int trigger;
893 struct octeon_irq_gpio_domain_data *gpiod;
894 889
895 if (d->of_node != node) 890 if (d->of_node != node)
896 return -EINVAL; 891 return -EINVAL;
@@ -925,8 +920,7 @@ static int octeon_irq_gpio_xlat(struct irq_domain *d,
925 break; 920 break;
926 } 921 }
927 *out_type = type; 922 *out_type = type;
928 gpiod = d->host_data; 923 *out_hwirq = pin;
929 *out_hwirq = gpiod->base_hwirq + pin;
930 924
931 return 0; 925 return 0;
932} 926}
@@ -996,19 +990,21 @@ static int octeon_irq_ciu_map(struct irq_domain *d,
996static int octeon_irq_gpio_map(struct irq_domain *d, 990static int octeon_irq_gpio_map(struct irq_domain *d,
997 unsigned int virq, irq_hw_number_t hw) 991 unsigned int virq, irq_hw_number_t hw)
998{ 992{
999 unsigned int line = hw >> 6; 993 struct octeon_irq_gpio_domain_data *gpiod = d->host_data;
1000 unsigned int bit = hw & 63; 994 unsigned int line, bit;
1001 995
1002 if (!octeon_irq_virq_in_range(virq)) 996 if (!octeon_irq_virq_in_range(virq))
1003 return -EINVAL; 997 return -EINVAL;
1004 998
999 hw += gpiod->base_hwirq;
1000 line = hw >> 6;
1001 bit = hw & 63;
1005 if (line > 1 || octeon_irq_ciu_to_irq[line][bit] != 0) 1002 if (line > 1 || octeon_irq_ciu_to_irq[line][bit] != 0)
1006 return -EINVAL; 1003 return -EINVAL;
1007 1004
1008 octeon_irq_set_ciu_mapping(virq, line, bit, 1005 octeon_irq_set_ciu_mapping(virq, line, bit,
1009 octeon_irq_gpio_chip, 1006 octeon_irq_gpio_chip,
1010 octeon_irq_handle_gpio); 1007 octeon_irq_handle_gpio);
1011
1012 return 0; 1008 return 0;
1013} 1009}
1014 1010
@@ -1149,6 +1145,7 @@ static void __init octeon_irq_init_ciu(void)
1149 struct irq_chip *chip_wd; 1145 struct irq_chip *chip_wd;
1150 struct device_node *gpio_node; 1146 struct device_node *gpio_node;
1151 struct device_node *ciu_node; 1147 struct device_node *ciu_node;
1148 struct irq_domain *ciu_domain = NULL;
1152 1149
1153 octeon_irq_init_ciu_percpu(); 1150 octeon_irq_init_ciu_percpu();
1154 octeon_irq_setup_secondary = octeon_irq_setup_secondary_ciu; 1151 octeon_irq_setup_secondary = octeon_irq_setup_secondary_ciu;
@@ -1177,31 +1174,6 @@ static void __init octeon_irq_init_ciu(void)
1177 /* Mips internal */ 1174 /* Mips internal */
1178 octeon_irq_init_core(); 1175 octeon_irq_init_core();
1179 1176
1180 /* CIU_0 */
1181 for (i = 0; i < 16; i++)
1182 octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_WORKQ0, 0, i + 0, chip, handle_level_irq);
1183
1184 octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX0, 0, 32, chip_mbox, handle_percpu_irq);
1185 octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX1, 0, 33, chip_mbox, handle_percpu_irq);
1186
1187 for (i = 0; i < 4; i++)
1188 octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_PCI_INT0, 0, i + 36, chip, handle_level_irq);
1189 for (i = 0; i < 4; i++)
1190 octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_PCI_MSI0, 0, i + 40, chip, handle_level_irq);
1191
1192 octeon_irq_set_ciu_mapping(OCTEON_IRQ_RML, 0, 46, chip, handle_level_irq);
1193 for (i = 0; i < 4; i++)
1194 octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_TIMER0, 0, i + 52, chip, handle_edge_irq);
1195
1196 octeon_irq_set_ciu_mapping(OCTEON_IRQ_USB0, 0, 56, chip, handle_level_irq);
1197 octeon_irq_set_ciu_mapping(OCTEON_IRQ_BOOTDMA, 0, 63, chip, handle_level_irq);
1198
1199 /* CIU_1 */
1200 for (i = 0; i < 16; i++)
1201 octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_WDOG0, 1, i + 0, chip_wd, handle_level_irq);
1202
1203 octeon_irq_set_ciu_mapping(OCTEON_IRQ_USB1, 1, 17, chip, handle_level_irq);
1204
1205 gpio_node = of_find_compatible_node(NULL, NULL, "cavium,octeon-3860-gpio"); 1177 gpio_node = of_find_compatible_node(NULL, NULL, "cavium,octeon-3860-gpio");
1206 if (gpio_node) { 1178 if (gpio_node) {
1207 struct octeon_irq_gpio_domain_data *gpiod; 1179 struct octeon_irq_gpio_domain_data *gpiod;
@@ -1219,10 +1191,35 @@ static void __init octeon_irq_init_ciu(void)
1219 1191
1220 ciu_node = of_find_compatible_node(NULL, NULL, "cavium,octeon-3860-ciu"); 1192 ciu_node = of_find_compatible_node(NULL, NULL, "cavium,octeon-3860-ciu");
1221 if (ciu_node) { 1193 if (ciu_node) {
1222 irq_domain_add_tree(ciu_node, &octeon_irq_domain_ciu_ops, NULL); 1194 ciu_domain = irq_domain_add_tree(ciu_node, &octeon_irq_domain_ciu_ops, NULL);
1223 of_node_put(ciu_node); 1195 of_node_put(ciu_node);
1224 } else 1196 } else
1225 pr_warn("Cannot find device node for cavium,octeon-3860-ciu.\n"); 1197 panic("Cannot find device node for cavium,octeon-3860-ciu.");
1198
1199 /* CIU_0 */
1200 for (i = 0; i < 16; i++)
1201 octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_WORKQ0, 0, i + 0);
1202
1203 octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX0, 0, 32, chip_mbox, handle_percpu_irq);
1204 octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX1, 0, 33, chip_mbox, handle_percpu_irq);
1205
1206 for (i = 0; i < 4; i++)
1207 octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_PCI_INT0, 0, i + 36);
1208 for (i = 0; i < 4; i++)
1209 octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_PCI_MSI0, 0, i + 40);
1210
1211 octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_RML, 0, 46);
1212 for (i = 0; i < 4; i++)
1213 octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_TIMER0, 0, i + 52);
1214
1215 octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_USB0, 0, 56);
1216 octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_BOOTDMA, 0, 63);
1217
1218 /* CIU_1 */
1219 for (i = 0; i < 16; i++)
1220 octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_WDOG0, 1, i + 0, chip_wd, handle_level_irq);
1221
1222 octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_USB1, 1, 17);
1226 1223
1227 /* Enable the CIU lines */ 1224 /* Enable the CIU lines */
1228 set_c0_status(STATUSF_IP3 | STATUSF_IP2); 1225 set_c0_status(STATUSF_IP3 | STATUSF_IP2);
diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
index 1caa78ad06d..dde504477fa 100644
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -393,7 +393,8 @@
393#define AR71XX_GPIO_REG_FUNC 0x28 393#define AR71XX_GPIO_REG_FUNC 0x28
394 394
395#define AR71XX_GPIO_COUNT 16 395#define AR71XX_GPIO_COUNT 16
396#define AR724X_GPIO_COUNT 18 396#define AR7240_GPIO_COUNT 18
397#define AR7241_GPIO_COUNT 20
397#define AR913X_GPIO_COUNT 22 398#define AR913X_GPIO_COUNT 22
398#define AR933X_GPIO_COUNT 30 399#define AR933X_GPIO_COUNT 30
399#define AR934X_GPIO_COUNT 23 400#define AR934X_GPIO_COUNT 23
diff --git a/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
index 4476fa03bf3..6ddae926bf7 100644
--- a/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
@@ -42,7 +42,6 @@
42#define cpu_has_mips64r1 0 42#define cpu_has_mips64r1 0
43#define cpu_has_mips64r2 0 43#define cpu_has_mips64r2 0
44 44
45#define cpu_has_dsp 0
46#define cpu_has_mipsmt 0 45#define cpu_has_mipsmt 0
47 46
48#define cpu_has_64bits 0 47#define cpu_has_64bits 0
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h
index 7d98dbe5d4b..c9bae136260 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h
@@ -9,6 +9,8 @@ int __init bcm63xx_spi_register(void);
9 9
10struct bcm63xx_spi_pdata { 10struct bcm63xx_spi_pdata {
11 unsigned int fifo_size; 11 unsigned int fifo_size;
12 unsigned int msg_type_shift;
13 unsigned int msg_ctl_width;
12 int bus_num; 14 int bus_num;
13 int num_chipselect; 15 int num_chipselect;
14 u32 speed_hz; 16 u32 speed_hz;
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
index 4ccc2a748af..61f2a2a5099 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
@@ -1054,7 +1054,8 @@
1054#define SPI_6338_FILL_BYTE 0x07 1054#define SPI_6338_FILL_BYTE 0x07
1055#define SPI_6338_MSG_TAIL 0x09 1055#define SPI_6338_MSG_TAIL 0x09
1056#define SPI_6338_RX_TAIL 0x0b 1056#define SPI_6338_RX_TAIL 0x0b
1057#define SPI_6338_MSG_CTL 0x40 1057#define SPI_6338_MSG_CTL 0x40 /* 8-bits register */
1058#define SPI_6338_MSG_CTL_WIDTH 8
1058#define SPI_6338_MSG_DATA 0x41 1059#define SPI_6338_MSG_DATA 0x41
1059#define SPI_6338_MSG_DATA_SIZE 0x3f 1060#define SPI_6338_MSG_DATA_SIZE 0x3f
1060#define SPI_6338_RX_DATA 0x80 1061#define SPI_6338_RX_DATA 0x80
@@ -1070,7 +1071,8 @@
1070#define SPI_6348_FILL_BYTE 0x07 1071#define SPI_6348_FILL_BYTE 0x07
1071#define SPI_6348_MSG_TAIL 0x09 1072#define SPI_6348_MSG_TAIL 0x09
1072#define SPI_6348_RX_TAIL 0x0b 1073#define SPI_6348_RX_TAIL 0x0b
1073#define SPI_6348_MSG_CTL 0x40 1074#define SPI_6348_MSG_CTL 0x40 /* 8-bits register */
1075#define SPI_6348_MSG_CTL_WIDTH 8
1074#define SPI_6348_MSG_DATA 0x41 1076#define SPI_6348_MSG_DATA 0x41
1075#define SPI_6348_MSG_DATA_SIZE 0x3f 1077#define SPI_6348_MSG_DATA_SIZE 0x3f
1076#define SPI_6348_RX_DATA 0x80 1078#define SPI_6348_RX_DATA 0x80
@@ -1078,6 +1080,7 @@
1078 1080
1079/* BCM 6358 SPI core */ 1081/* BCM 6358 SPI core */
1080#define SPI_6358_MSG_CTL 0x00 /* 16-bits register */ 1082#define SPI_6358_MSG_CTL 0x00 /* 16-bits register */
1083#define SPI_6358_MSG_CTL_WIDTH 16
1081#define SPI_6358_MSG_DATA 0x02 1084#define SPI_6358_MSG_DATA 0x02
1082#define SPI_6358_MSG_DATA_SIZE 0x21e 1085#define SPI_6358_MSG_DATA_SIZE 0x21e
1083#define SPI_6358_RX_DATA 0x400 1086#define SPI_6358_RX_DATA 0x400
@@ -1094,6 +1097,7 @@
1094 1097
1095/* BCM 6358 SPI core */ 1098/* BCM 6358 SPI core */
1096#define SPI_6368_MSG_CTL 0x00 /* 16-bits register */ 1099#define SPI_6368_MSG_CTL 0x00 /* 16-bits register */
1100#define SPI_6368_MSG_CTL_WIDTH 16
1097#define SPI_6368_MSG_DATA 0x02 1101#define SPI_6368_MSG_DATA 0x02
1098#define SPI_6368_MSG_DATA_SIZE 0x21e 1102#define SPI_6368_MSG_DATA_SIZE 0x21e
1099#define SPI_6368_RX_DATA 0x400 1103#define SPI_6368_RX_DATA 0x400
@@ -1115,7 +1119,10 @@
1115#define SPI_HD_W 0x01 1119#define SPI_HD_W 0x01
1116#define SPI_HD_R 0x02 1120#define SPI_HD_R 0x02
1117#define SPI_BYTE_CNT_SHIFT 0 1121#define SPI_BYTE_CNT_SHIFT 0
1118#define SPI_MSG_TYPE_SHIFT 14 1122#define SPI_6338_MSG_TYPE_SHIFT 6
1123#define SPI_6348_MSG_TYPE_SHIFT 6
1124#define SPI_6358_MSG_TYPE_SHIFT 14
1125#define SPI_6368_MSG_TYPE_SHIFT 14
1119 1126
1120/* Command */ 1127/* Command */
1121#define SPI_CMD_NOOP 0x00 1128#define SPI_CMD_NOOP 0x00
diff --git a/arch/mips/include/asm/mach-cavium-octeon/irq.h b/arch/mips/include/asm/mach-cavium-octeon/irq.h
index 418992042f6..c22a3078bf1 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/irq.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/irq.h
@@ -21,14 +21,10 @@ enum octeon_irq {
21 OCTEON_IRQ_TIMER, 21 OCTEON_IRQ_TIMER,
22/* sources in CIU_INTX_EN0 */ 22/* sources in CIU_INTX_EN0 */
23 OCTEON_IRQ_WORKQ0, 23 OCTEON_IRQ_WORKQ0,
24 OCTEON_IRQ_GPIO0 = OCTEON_IRQ_WORKQ0 + 16, 24 OCTEON_IRQ_WDOG0 = OCTEON_IRQ_WORKQ0 + 16,
25 OCTEON_IRQ_WDOG0 = OCTEON_IRQ_GPIO0 + 16,
26 OCTEON_IRQ_WDOG15 = OCTEON_IRQ_WDOG0 + 15, 25 OCTEON_IRQ_WDOG15 = OCTEON_IRQ_WDOG0 + 15,
27 OCTEON_IRQ_MBOX0 = OCTEON_IRQ_WDOG0 + 16, 26 OCTEON_IRQ_MBOX0 = OCTEON_IRQ_WDOG0 + 16,
28 OCTEON_IRQ_MBOX1, 27 OCTEON_IRQ_MBOX1,
29 OCTEON_IRQ_UART0,
30 OCTEON_IRQ_UART1,
31 OCTEON_IRQ_UART2,
32 OCTEON_IRQ_PCI_INT0, 28 OCTEON_IRQ_PCI_INT0,
33 OCTEON_IRQ_PCI_INT1, 29 OCTEON_IRQ_PCI_INT1,
34 OCTEON_IRQ_PCI_INT2, 30 OCTEON_IRQ_PCI_INT2,
@@ -38,8 +34,6 @@ enum octeon_irq {
38 OCTEON_IRQ_PCI_MSI2, 34 OCTEON_IRQ_PCI_MSI2,
39 OCTEON_IRQ_PCI_MSI3, 35 OCTEON_IRQ_PCI_MSI3,
40 36
41 OCTEON_IRQ_TWSI,
42 OCTEON_IRQ_TWSI2,
43 OCTEON_IRQ_RML, 37 OCTEON_IRQ_RML,
44 OCTEON_IRQ_TIMER0, 38 OCTEON_IRQ_TIMER0,
45 OCTEON_IRQ_TIMER1, 39 OCTEON_IRQ_TIMER1,
@@ -47,8 +41,6 @@ enum octeon_irq {
47 OCTEON_IRQ_TIMER3, 41 OCTEON_IRQ_TIMER3,
48 OCTEON_IRQ_USB0, 42 OCTEON_IRQ_USB0,
49 OCTEON_IRQ_USB1, 43 OCTEON_IRQ_USB1,
50 OCTEON_IRQ_MII0,
51 OCTEON_IRQ_MII1,
52 OCTEON_IRQ_BOOTDMA, 44 OCTEON_IRQ_BOOTDMA,
53#ifndef CONFIG_PCI_MSI 45#ifndef CONFIG_PCI_MSI
54 OCTEON_IRQ_LAST = 127 46 OCTEON_IRQ_LAST = 127
diff --git a/arch/mips/include/asm/module.h b/arch/mips/include/asm/module.h
index 7531ecd654d..dca8bce8c7a 100644
--- a/arch/mips/include/asm/module.h
+++ b/arch/mips/include/asm/module.h
@@ -10,6 +10,7 @@ struct mod_arch_specific {
10 struct list_head dbe_list; 10 struct list_head dbe_list;
11 const struct exception_table_entry *dbe_start; 11 const struct exception_table_entry *dbe_start;
12 const struct exception_table_entry *dbe_end; 12 const struct exception_table_entry *dbe_end;
13 struct mips_hi16 *r_mips_hi16_list;
13}; 14};
14 15
15typedef uint8_t Elf64_Byte; /* Type for a 8-bit quantity. */ 16typedef uint8_t Elf64_Byte; /* Type for a 8-bit quantity. */
diff --git a/arch/mips/include/asm/r4k-timer.h b/arch/mips/include/asm/r4k-timer.h
index a37d12b3b61..afe9e0e03fe 100644
--- a/arch/mips/include/asm/r4k-timer.h
+++ b/arch/mips/include/asm/r4k-timer.h
@@ -12,16 +12,16 @@
12 12
13#ifdef CONFIG_SYNC_R4K 13#ifdef CONFIG_SYNC_R4K
14 14
15extern void synchronise_count_master(void); 15extern void synchronise_count_master(int cpu);
16extern void synchronise_count_slave(void); 16extern void synchronise_count_slave(int cpu);
17 17
18#else 18#else
19 19
20static inline void synchronise_count_master(void) 20static inline void synchronise_count_master(int cpu)
21{ 21{
22} 22}
23 23
24static inline void synchronise_count_slave(void) 24static inline void synchronise_count_slave(int cpu)
25{ 25{
26} 26}
27 27
diff --git a/arch/mips/kernel/module.c b/arch/mips/kernel/module.c
index a5066b1c3de..4f8c3cba8c0 100644
--- a/arch/mips/kernel/module.c
+++ b/arch/mips/kernel/module.c
@@ -39,8 +39,6 @@ struct mips_hi16 {
39 Elf_Addr value; 39 Elf_Addr value;
40}; 40};
41 41
42static struct mips_hi16 *mips_hi16_list;
43
44static LIST_HEAD(dbe_list); 42static LIST_HEAD(dbe_list);
45static DEFINE_SPINLOCK(dbe_lock); 43static DEFINE_SPINLOCK(dbe_lock);
46 44
@@ -128,8 +126,8 @@ static int apply_r_mips_hi16_rel(struct module *me, u32 *location, Elf_Addr v)
128 126
129 n->addr = (Elf_Addr *)location; 127 n->addr = (Elf_Addr *)location;
130 n->value = v; 128 n->value = v;
131 n->next = mips_hi16_list; 129 n->next = me->arch.r_mips_hi16_list;
132 mips_hi16_list = n; 130 me->arch.r_mips_hi16_list = n;
133 131
134 return 0; 132 return 0;
135} 133}
@@ -142,18 +140,28 @@ static int apply_r_mips_hi16_rela(struct module *me, u32 *location, Elf_Addr v)
142 return 0; 140 return 0;
143} 141}
144 142
143static void free_relocation_chain(struct mips_hi16 *l)
144{
145 struct mips_hi16 *next;
146
147 while (l) {
148 next = l->next;
149 kfree(l);
150 l = next;
151 }
152}
153
145static int apply_r_mips_lo16_rel(struct module *me, u32 *location, Elf_Addr v) 154static int apply_r_mips_lo16_rel(struct module *me, u32 *location, Elf_Addr v)
146{ 155{
147 unsigned long insnlo = *location; 156 unsigned long insnlo = *location;
157 struct mips_hi16 *l;
148 Elf_Addr val, vallo; 158 Elf_Addr val, vallo;
149 159
150 /* Sign extend the addend we extract from the lo insn. */ 160 /* Sign extend the addend we extract from the lo insn. */
151 vallo = ((insnlo & 0xffff) ^ 0x8000) - 0x8000; 161 vallo = ((insnlo & 0xffff) ^ 0x8000) - 0x8000;
152 162
153 if (mips_hi16_list != NULL) { 163 if (me->arch.r_mips_hi16_list != NULL) {
154 struct mips_hi16 *l; 164 l = me->arch.r_mips_hi16_list;
155
156 l = mips_hi16_list;
157 while (l != NULL) { 165 while (l != NULL) {
158 struct mips_hi16 *next; 166 struct mips_hi16 *next;
159 unsigned long insn; 167 unsigned long insn;
@@ -188,7 +196,7 @@ static int apply_r_mips_lo16_rel(struct module *me, u32 *location, Elf_Addr v)
188 l = next; 196 l = next;
189 } 197 }
190 198
191 mips_hi16_list = NULL; 199 me->arch.r_mips_hi16_list = NULL;
192 } 200 }
193 201
194 /* 202 /*
@@ -201,6 +209,9 @@ static int apply_r_mips_lo16_rel(struct module *me, u32 *location, Elf_Addr v)
201 return 0; 209 return 0;
202 210
203out_danger: 211out_danger:
212 free_relocation_chain(l);
213 me->arch.r_mips_hi16_list = NULL;
214
204 pr_err("module %s: dangerous R_MIPS_LO16 REL relocation\n", me->name); 215 pr_err("module %s: dangerous R_MIPS_LO16 REL relocation\n", me->name);
205 216
206 return -ENOEXEC; 217 return -ENOEXEC;
@@ -273,6 +284,7 @@ int apply_relocate(Elf_Shdr *sechdrs, const char *strtab,
273 pr_debug("Applying relocate section %u to %u\n", relsec, 284 pr_debug("Applying relocate section %u to %u\n", relsec,
274 sechdrs[relsec].sh_info); 285 sechdrs[relsec].sh_info);
275 286
287 me->arch.r_mips_hi16_list = NULL;
276 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) { 288 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
277 /* This is where to make the change */ 289 /* This is where to make the change */
278 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr 290 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
@@ -296,6 +308,19 @@ int apply_relocate(Elf_Shdr *sechdrs, const char *strtab,
296 return res; 308 return res;
297 } 309 }
298 310
311 /*
312 * Normally the hi16 list should be deallocated at this point. A
313 * malformed binary however could contain a series of R_MIPS_HI16
314 * relocations not followed by a R_MIPS_LO16 relocation. In that
315 * case, free up the list and return an error.
316 */
317 if (me->arch.r_mips_hi16_list) {
318 free_relocation_chain(me->arch.r_mips_hi16_list);
319 me->arch.r_mips_hi16_list = NULL;
320
321 return -ENOEXEC;
322 }
323
299 return 0; 324 return 0;
300} 325}
301 326
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 31637d8c873..9005bf9fb85 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -130,7 +130,7 @@ asmlinkage __cpuinit void start_secondary(void)
130 130
131 cpu_set(cpu, cpu_callin_map); 131 cpu_set(cpu, cpu_callin_map);
132 132
133 synchronise_count_slave(); 133 synchronise_count_slave(cpu);
134 134
135 /* 135 /*
136 * irq will be enabled in ->smp_finish(), enabling it too early 136 * irq will be enabled in ->smp_finish(), enabling it too early
@@ -173,7 +173,6 @@ void smp_send_stop(void)
173void __init smp_cpus_done(unsigned int max_cpus) 173void __init smp_cpus_done(unsigned int max_cpus)
174{ 174{
175 mp_ops->cpus_done(); 175 mp_ops->cpus_done();
176 synchronise_count_master();
177} 176}
178 177
179/* called from main before smp_init() */ 178/* called from main before smp_init() */
@@ -206,6 +205,7 @@ int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)
206 while (!cpu_isset(cpu, cpu_callin_map)) 205 while (!cpu_isset(cpu, cpu_callin_map))
207 udelay(100); 206 udelay(100);
208 207
208 synchronise_count_master(cpu);
209 return 0; 209 return 0;
210} 210}
211 211
diff --git a/arch/mips/kernel/sync-r4k.c b/arch/mips/kernel/sync-r4k.c
index 842d55e411f..7f1eca3858d 100644
--- a/arch/mips/kernel/sync-r4k.c
+++ b/arch/mips/kernel/sync-r4k.c
@@ -28,12 +28,11 @@ static atomic_t __cpuinitdata count_reference = ATOMIC_INIT(0);
28#define COUNTON 100 28#define COUNTON 100
29#define NR_LOOPS 5 29#define NR_LOOPS 5
30 30
31void __cpuinit synchronise_count_master(void) 31void __cpuinit synchronise_count_master(int cpu)
32{ 32{
33 int i; 33 int i;
34 unsigned long flags; 34 unsigned long flags;
35 unsigned int initcount; 35 unsigned int initcount;
36 int nslaves;
37 36
38#ifdef CONFIG_MIPS_MT_SMTC 37#ifdef CONFIG_MIPS_MT_SMTC
39 /* 38 /*
@@ -43,8 +42,7 @@ void __cpuinit synchronise_count_master(void)
43 return; 42 return;
44#endif 43#endif
45 44
46 printk(KERN_INFO "Synchronize counters across %u CPUs: ", 45 printk(KERN_INFO "Synchronize counters for CPU %u: ", cpu);
47 num_online_cpus());
48 46
49 local_irq_save(flags); 47 local_irq_save(flags);
50 48
@@ -52,7 +50,7 @@ void __cpuinit synchronise_count_master(void)
52 * Notify the slaves that it's time to start 50 * Notify the slaves that it's time to start
53 */ 51 */
54 atomic_set(&count_reference, read_c0_count()); 52 atomic_set(&count_reference, read_c0_count());
55 atomic_set(&count_start_flag, 1); 53 atomic_set(&count_start_flag, cpu);
56 smp_wmb(); 54 smp_wmb();
57 55
58 /* Count will be initialised to current timer for all CPU's */ 56 /* Count will be initialised to current timer for all CPU's */
@@ -69,10 +67,9 @@ void __cpuinit synchronise_count_master(void)
69 * two CPUs. 67 * two CPUs.
70 */ 68 */
71 69
72 nslaves = num_online_cpus()-1;
73 for (i = 0; i < NR_LOOPS; i++) { 70 for (i = 0; i < NR_LOOPS; i++) {
74 /* slaves loop on '!= ncpus' */ 71 /* slaves loop on '!= 2' */
75 while (atomic_read(&count_count_start) != nslaves) 72 while (atomic_read(&count_count_start) != 1)
76 mb(); 73 mb();
77 atomic_set(&count_count_stop, 0); 74 atomic_set(&count_count_stop, 0);
78 smp_wmb(); 75 smp_wmb();
@@ -89,7 +86,7 @@ void __cpuinit synchronise_count_master(void)
89 /* 86 /*
90 * Wait for all slaves to leave the synchronization point: 87 * Wait for all slaves to leave the synchronization point:
91 */ 88 */
92 while (atomic_read(&count_count_stop) != nslaves) 89 while (atomic_read(&count_count_stop) != 1)
93 mb(); 90 mb();
94 atomic_set(&count_count_start, 0); 91 atomic_set(&count_count_start, 0);
95 smp_wmb(); 92 smp_wmb();
@@ -97,6 +94,7 @@ void __cpuinit synchronise_count_master(void)
97 } 94 }
98 /* Arrange for an interrupt in a short while */ 95 /* Arrange for an interrupt in a short while */
99 write_c0_compare(read_c0_count() + COUNTON); 96 write_c0_compare(read_c0_count() + COUNTON);
97 atomic_set(&count_start_flag, 0);
100 98
101 local_irq_restore(flags); 99 local_irq_restore(flags);
102 100
@@ -108,11 +106,10 @@ void __cpuinit synchronise_count_master(void)
108 printk("done.\n"); 106 printk("done.\n");
109} 107}
110 108
111void __cpuinit synchronise_count_slave(void) 109void __cpuinit synchronise_count_slave(int cpu)
112{ 110{
113 int i; 111 int i;
114 unsigned int initcount; 112 unsigned int initcount;
115 int ncpus;
116 113
117#ifdef CONFIG_MIPS_MT_SMTC 114#ifdef CONFIG_MIPS_MT_SMTC
118 /* 115 /*
@@ -127,16 +124,15 @@ void __cpuinit synchronise_count_slave(void)
127 * so we first wait for the master to say everyone is ready 124 * so we first wait for the master to say everyone is ready
128 */ 125 */
129 126
130 while (!atomic_read(&count_start_flag)) 127 while (atomic_read(&count_start_flag) != cpu)
131 mb(); 128 mb();
132 129
133 /* Count will be initialised to next expire for all CPU's */ 130 /* Count will be initialised to next expire for all CPU's */
134 initcount = atomic_read(&count_reference); 131 initcount = atomic_read(&count_reference);
135 132
136 ncpus = num_online_cpus();
137 for (i = 0; i < NR_LOOPS; i++) { 133 for (i = 0; i < NR_LOOPS; i++) {
138 atomic_inc(&count_count_start); 134 atomic_inc(&count_count_start);
139 while (atomic_read(&count_count_start) != ncpus) 135 while (atomic_read(&count_count_start) != 2)
140 mb(); 136 mb();
141 137
142 /* 138 /*
@@ -146,7 +142,7 @@ void __cpuinit synchronise_count_slave(void)
146 write_c0_count(initcount); 142 write_c0_count(initcount);
147 143
148 atomic_inc(&count_count_stop); 144 atomic_inc(&count_count_stop);
149 while (atomic_read(&count_count_stop) != ncpus) 145 while (atomic_read(&count_count_stop) != 2)
150 mb(); 146 mb();
151 } 147 }
152 /* Arrange for an interrupt in a short while */ 148 /* Arrange for an interrupt in a short while */
diff --git a/arch/mips/mti-malta/malta-pci.c b/arch/mips/mti-malta/malta-pci.c
index 284dea54faf..2147cb34e70 100644
--- a/arch/mips/mti-malta/malta-pci.c
+++ b/arch/mips/mti-malta/malta-pci.c
@@ -252,16 +252,3 @@ void __init mips_pcibios_init(void)
252 252
253 register_pci_controller(controller); 253 register_pci_controller(controller);
254} 254}
255
256/* Enable PCI 2.1 compatibility in PIIX4 */
257static void __devinit quirk_dlcsetup(struct pci_dev *dev)
258{
259 u8 odlc, ndlc;
260 (void) pci_read_config_byte(dev, 0x82, &odlc);
261 /* Enable passive releases and delayed transaction */
262 ndlc = odlc | 7;
263 (void) pci_write_config_byte(dev, 0x82, ndlc);
264}
265
266DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0,
267 quirk_dlcsetup);
diff --git a/arch/mips/pci/pci-ar724x.c b/arch/mips/pci/pci-ar724x.c
index 414a7459858..86d77a66645 100644
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -23,9 +23,12 @@
23#define AR724X_PCI_MEM_BASE 0x10000000 23#define AR724X_PCI_MEM_BASE 0x10000000
24#define AR724X_PCI_MEM_SIZE 0x08000000 24#define AR724X_PCI_MEM_SIZE 0x08000000
25 25
26#define AR724X_PCI_REG_RESET 0x18
26#define AR724X_PCI_REG_INT_STATUS 0x4c 27#define AR724X_PCI_REG_INT_STATUS 0x4c
27#define AR724X_PCI_REG_INT_MASK 0x50 28#define AR724X_PCI_REG_INT_MASK 0x50
28 29
30#define AR724X_PCI_RESET_LINK_UP BIT(0)
31
29#define AR724X_PCI_INT_DEV0 BIT(14) 32#define AR724X_PCI_INT_DEV0 BIT(14)
30 33
31#define AR724X_PCI_IRQ_COUNT 1 34#define AR724X_PCI_IRQ_COUNT 1
@@ -38,6 +41,15 @@ static void __iomem *ar724x_pci_ctrl_base;
38 41
39static u32 ar724x_pci_bar0_value; 42static u32 ar724x_pci_bar0_value;
40static bool ar724x_pci_bar0_is_cached; 43static bool ar724x_pci_bar0_is_cached;
44static bool ar724x_pci_link_up;
45
46static inline bool ar724x_pci_check_link(void)
47{
48 u32 reset;
49
50 reset = __raw_readl(ar724x_pci_ctrl_base + AR724X_PCI_REG_RESET);
51 return reset & AR724X_PCI_RESET_LINK_UP;
52}
41 53
42static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, 54static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
43 int size, uint32_t *value) 55 int size, uint32_t *value)
@@ -46,6 +58,9 @@ static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
46 void __iomem *base; 58 void __iomem *base;
47 u32 data; 59 u32 data;
48 60
61 if (!ar724x_pci_link_up)
62 return PCIBIOS_DEVICE_NOT_FOUND;
63
49 if (devfn) 64 if (devfn)
50 return PCIBIOS_DEVICE_NOT_FOUND; 65 return PCIBIOS_DEVICE_NOT_FOUND;
51 66
@@ -96,6 +111,9 @@ static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
96 u32 data; 111 u32 data;
97 int s; 112 int s;
98 113
114 if (!ar724x_pci_link_up)
115 return PCIBIOS_DEVICE_NOT_FOUND;
116
99 if (devfn) 117 if (devfn)
100 return PCIBIOS_DEVICE_NOT_FOUND; 118 return PCIBIOS_DEVICE_NOT_FOUND;
101 119
@@ -280,6 +298,10 @@ int __init ar724x_pcibios_init(int irq)
280 if (ar724x_pci_ctrl_base == NULL) 298 if (ar724x_pci_ctrl_base == NULL)
281 goto err_unmap_devcfg; 299 goto err_unmap_devcfg;
282 300
301 ar724x_pci_link_up = ar724x_pci_check_link();
302 if (!ar724x_pci_link_up)
303 pr_warn("ar724x: PCIe link is down\n");
304
283 ar724x_pci_irq_init(irq); 305 ar724x_pci_irq_init(irq);
284 register_pci_controller(&ar724x_pci_controller); 306 register_pci_controller(&ar724x_pci_controller);
285 307
diff --git a/arch/parisc/include/asm/atomic.h b/arch/parisc/include/asm/atomic.h
index 6c6defc2461..af9cf30ed47 100644
--- a/arch/parisc/include/asm/atomic.h
+++ b/arch/parisc/include/asm/atomic.h
@@ -141,7 +141,7 @@ static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
141 141
142#define atomic_sub_and_test(i,v) (atomic_sub_return((i),(v)) == 0) 142#define atomic_sub_and_test(i,v) (atomic_sub_return((i),(v)) == 0)
143 143
144#define ATOMIC_INIT(i) ((atomic_t) { (i) }) 144#define ATOMIC_INIT(i) { (i) }
145 145
146#define smp_mb__before_atomic_dec() smp_mb() 146#define smp_mb__before_atomic_dec() smp_mb()
147#define smp_mb__after_atomic_dec() smp_mb() 147#define smp_mb__after_atomic_dec() smp_mb()
@@ -150,7 +150,7 @@ static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
150 150
151#ifdef CONFIG_64BIT 151#ifdef CONFIG_64BIT
152 152
153#define ATOMIC64_INIT(i) ((atomic64_t) { (i) }) 153#define ATOMIC64_INIT(i) { (i) }
154 154
155static __inline__ s64 155static __inline__ s64
156__atomic64_add_return(s64 i, atomic64_t *v) 156__atomic64_add_return(s64 i, atomic64_t *v)
diff --git a/arch/parisc/kernel/process.c b/arch/parisc/kernel/process.c
index d4b94b395c1..2c05a9292a8 100644
--- a/arch/parisc/kernel/process.c
+++ b/arch/parisc/kernel/process.c
@@ -309,7 +309,7 @@ copy_thread(unsigned long clone_flags, unsigned long usp,
309 cregs->ksp = (unsigned long)stack 309 cregs->ksp = (unsigned long)stack
310 + (pregs->gr[21] & (THREAD_SIZE - 1)); 310 + (pregs->gr[21] & (THREAD_SIZE - 1));
311 cregs->gr[30] = usp; 311 cregs->gr[30] = usp;
312 if (p->personality == PER_HPUX) { 312 if (personality(p->personality) == PER_HPUX) {
313#ifdef CONFIG_HPUX 313#ifdef CONFIG_HPUX
314 cregs->kpc = (unsigned long) &hpux_child_return; 314 cregs->kpc = (unsigned long) &hpux_child_return;
315#else 315#else
diff --git a/arch/parisc/kernel/sys_parisc.c b/arch/parisc/kernel/sys_parisc.c
index c9b932260f4..7426e40699b 100644
--- a/arch/parisc/kernel/sys_parisc.c
+++ b/arch/parisc/kernel/sys_parisc.c
@@ -225,12 +225,12 @@ long parisc_personality(unsigned long personality)
225 long err; 225 long err;
226 226
227 if (personality(current->personality) == PER_LINUX32 227 if (personality(current->personality) == PER_LINUX32
228 && personality == PER_LINUX) 228 && personality(personality) == PER_LINUX)
229 personality = PER_LINUX32; 229 personality = (personality & ~PER_MASK) | PER_LINUX32;
230 230
231 err = sys_personality(personality); 231 err = sys_personality(personality);
232 if (err == PER_LINUX32) 232 if (personality(err) == PER_LINUX32)
233 err = PER_LINUX; 233 err = (err & ~PER_MASK) | PER_LINUX;
234 234
235 return err; 235 return err;
236} 236}
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
index 8d35d2c1f69..4f9c9f682ec 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
@@ -345,6 +345,13 @@
345/include/ "qoriq-duart-1.dtsi" 345/include/ "qoriq-duart-1.dtsi"
346/include/ "qoriq-gpio-0.dtsi" 346/include/ "qoriq-gpio-0.dtsi"
347/include/ "qoriq-usb2-mph-0.dtsi" 347/include/ "qoriq-usb2-mph-0.dtsi"
348 usb@210000 {
349 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
350 port0;
351 };
348/include/ "qoriq-usb2-dr-0.dtsi" 352/include/ "qoriq-usb2-dr-0.dtsi"
353 usb@211000 {
354 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
355 };
349/include/ "qoriq-sec4.0-0.dtsi" 356/include/ "qoriq-sec4.0-0.dtsi"
350}; 357};
diff --git a/arch/powerpc/configs/85xx/p1023rds_defconfig b/arch/powerpc/configs/85xx/p1023rds_defconfig
index f4337bacd0e..26e541c4662 100644
--- a/arch/powerpc/configs/85xx/p1023rds_defconfig
+++ b/arch/powerpc/configs/85xx/p1023rds_defconfig
@@ -6,28 +6,27 @@ CONFIG_SYSVIPC=y
6CONFIG_POSIX_MQUEUE=y 6CONFIG_POSIX_MQUEUE=y
7CONFIG_BSD_PROCESS_ACCT=y 7CONFIG_BSD_PROCESS_ACCT=y
8CONFIG_AUDIT=y 8CONFIG_AUDIT=y
9CONFIG_SPARSE_IRQ=y 9CONFIG_IRQ_DOMAIN_DEBUG=y
10CONFIG_NO_HZ=y
11CONFIG_HIGH_RES_TIMERS=y
10CONFIG_IKCONFIG=y 12CONFIG_IKCONFIG=y
11CONFIG_IKCONFIG_PROC=y 13CONFIG_IKCONFIG_PROC=y
12CONFIG_LOG_BUF_SHIFT=14 14CONFIG_LOG_BUF_SHIFT=14
13CONFIG_BLK_DEV_INITRD=y 15CONFIG_BLK_DEV_INITRD=y
14# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
15CONFIG_KALLSYMS_ALL=y 16CONFIG_KALLSYMS_ALL=y
16CONFIG_KALLSYMS_EXTRA_PASS=y
17CONFIG_EMBEDDED=y 17CONFIG_EMBEDDED=y
18CONFIG_MODULES=y 18CONFIG_MODULES=y
19CONFIG_MODULE_UNLOAD=y 19CONFIG_MODULE_UNLOAD=y
20CONFIG_MODULE_FORCE_UNLOAD=y 20CONFIG_MODULE_FORCE_UNLOAD=y
21CONFIG_MODVERSIONS=y 21CONFIG_MODVERSIONS=y
22# CONFIG_BLK_DEV_BSG is not set 22# CONFIG_BLK_DEV_BSG is not set
23CONFIG_PARTITION_ADVANCED=y
24CONFIG_MAC_PARTITION=y
23CONFIG_P1023_RDS=y 25CONFIG_P1023_RDS=y
24CONFIG_QUICC_ENGINE=y 26CONFIG_QUICC_ENGINE=y
25CONFIG_QE_GPIO=y 27CONFIG_QE_GPIO=y
26CONFIG_CPM2=y 28CONFIG_CPM2=y
27CONFIG_GPIO_MPC8XXX=y
28CONFIG_HIGHMEM=y 29CONFIG_HIGHMEM=y
29CONFIG_NO_HZ=y
30CONFIG_HIGH_RES_TIMERS=y
31# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set 30# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
32CONFIG_BINFMT_MISC=m 31CONFIG_BINFMT_MISC=m
33CONFIG_MATH_EMULATION=y 32CONFIG_MATH_EMULATION=y
@@ -63,11 +62,11 @@ CONFIG_INET_ESP=y
63CONFIG_IPV6=y 62CONFIG_IPV6=y
64CONFIG_IP_SCTP=m 63CONFIG_IP_SCTP=m
65CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 64CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
65CONFIG_DEVTMPFS=y
66CONFIG_PROC_DEVICETREE=y 66CONFIG_PROC_DEVICETREE=y
67CONFIG_BLK_DEV_LOOP=y 67CONFIG_BLK_DEV_LOOP=y
68CONFIG_BLK_DEV_RAM=y 68CONFIG_BLK_DEV_RAM=y
69CONFIG_BLK_DEV_RAM_SIZE=131072 69CONFIG_BLK_DEV_RAM_SIZE=131072
70CONFIG_MISC_DEVICES=y
71CONFIG_EEPROM_LEGACY=y 70CONFIG_EEPROM_LEGACY=y
72CONFIG_BLK_DEV_SD=y 71CONFIG_BLK_DEV_SD=y
73CONFIG_CHR_DEV_ST=y 72CONFIG_CHR_DEV_ST=y
@@ -80,15 +79,14 @@ CONFIG_SATA_FSL=y
80CONFIG_SATA_SIL24=y 79CONFIG_SATA_SIL24=y
81CONFIG_NETDEVICES=y 80CONFIG_NETDEVICES=y
82CONFIG_DUMMY=y 81CONFIG_DUMMY=y
82CONFIG_FS_ENET=y
83CONFIG_FSL_PQ_MDIO=y
84CONFIG_E1000E=y
83CONFIG_MARVELL_PHY=y 85CONFIG_MARVELL_PHY=y
84CONFIG_DAVICOM_PHY=y 86CONFIG_DAVICOM_PHY=y
85CONFIG_CICADA_PHY=y 87CONFIG_CICADA_PHY=y
86CONFIG_VITESSE_PHY=y 88CONFIG_VITESSE_PHY=y
87CONFIG_FIXED_PHY=y 89CONFIG_FIXED_PHY=y
88CONFIG_NET_ETHERNET=y
89CONFIG_FS_ENET=y
90CONFIG_E1000E=y
91CONFIG_FSL_PQ_MDIO=y
92CONFIG_INPUT_FF_MEMLESS=m 90CONFIG_INPUT_FF_MEMLESS=m
93# CONFIG_INPUT_MOUSEDEV is not set 91# CONFIG_INPUT_MOUSEDEV is not set
94# CONFIG_INPUT_KEYBOARD is not set 92# CONFIG_INPUT_KEYBOARD is not set
@@ -98,16 +96,15 @@ CONFIG_SERIAL_8250=y
98CONFIG_SERIAL_8250_CONSOLE=y 96CONFIG_SERIAL_8250_CONSOLE=y
99CONFIG_SERIAL_8250_NR_UARTS=2 97CONFIG_SERIAL_8250_NR_UARTS=2
100CONFIG_SERIAL_8250_RUNTIME_UARTS=2 98CONFIG_SERIAL_8250_RUNTIME_UARTS=2
101CONFIG_SERIAL_8250_EXTENDED=y
102CONFIG_SERIAL_8250_MANY_PORTS=y 99CONFIG_SERIAL_8250_MANY_PORTS=y
103CONFIG_SERIAL_8250_DETECT_IRQ=y 100CONFIG_SERIAL_8250_DETECT_IRQ=y
104CONFIG_SERIAL_8250_RSA=y 101CONFIG_SERIAL_8250_RSA=y
105CONFIG_SERIAL_QE=m 102CONFIG_SERIAL_QE=m
106CONFIG_HW_RANDOM=y
107CONFIG_NVRAM=y 103CONFIG_NVRAM=y
108CONFIG_I2C=y 104CONFIG_I2C=y
109CONFIG_I2C_CPM=m 105CONFIG_I2C_CPM=m
110CONFIG_I2C_MPC=y 106CONFIG_I2C_MPC=y
107CONFIG_GPIO_MPC8XXX=y
111# CONFIG_HWMON is not set 108# CONFIG_HWMON is not set
112CONFIG_VIDEO_OUTPUT_CONTROL=y 109CONFIG_VIDEO_OUTPUT_CONTROL=y
113CONFIG_SOUND=y 110CONFIG_SOUND=y
@@ -123,7 +120,6 @@ CONFIG_DMADEVICES=y
123CONFIG_FSL_DMA=y 120CONFIG_FSL_DMA=y
124# CONFIG_NET_DMA is not set 121# CONFIG_NET_DMA is not set
125CONFIG_STAGING=y 122CONFIG_STAGING=y
126# CONFIG_STAGING_EXCLUDE_BUILD is not set
127CONFIG_EXT2_FS=y 123CONFIG_EXT2_FS=y
128CONFIG_EXT3_FS=y 124CONFIG_EXT3_FS=y
129# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set 125# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
@@ -150,22 +146,15 @@ CONFIG_QNX4FS_FS=m
150CONFIG_SYSV_FS=m 146CONFIG_SYSV_FS=m
151CONFIG_UFS_FS=m 147CONFIG_UFS_FS=m
152CONFIG_NFS_FS=y 148CONFIG_NFS_FS=y
153CONFIG_NFS_V3=y
154CONFIG_NFS_V4=y 149CONFIG_NFS_V4=y
155CONFIG_ROOT_NFS=y 150CONFIG_ROOT_NFS=y
156CONFIG_NFSD=y 151CONFIG_NFSD=y
157CONFIG_PARTITION_ADVANCED=y
158CONFIG_MAC_PARTITION=y
159CONFIG_CRC_T10DIF=y 152CONFIG_CRC_T10DIF=y
160CONFIG_FRAME_WARN=8092 153CONFIG_FRAME_WARN=8092
161CONFIG_DEBUG_FS=y 154CONFIG_DEBUG_FS=y
162CONFIG_DEBUG_KERNEL=y
163CONFIG_DETECT_HUNG_TASK=y 155CONFIG_DETECT_HUNG_TASK=y
164# CONFIG_DEBUG_BUGVERBOSE is not set 156# CONFIG_DEBUG_BUGVERBOSE is not set
165CONFIG_DEBUG_INFO=y 157CONFIG_DEBUG_INFO=y
166# CONFIG_RCU_CPU_STALL_DETECTOR is not set
167CONFIG_SYSCTL_SYSCALL_CHECK=y
168CONFIG_IRQ_DOMAIN_DEBUG=y
169CONFIG_CRYPTO_PCBC=m 158CONFIG_CRYPTO_PCBC=m
170CONFIG_CRYPTO_SHA256=y 159CONFIG_CRYPTO_SHA256=y
171CONFIG_CRYPTO_SHA512=y 160CONFIG_CRYPTO_SHA512=y
diff --git a/arch/powerpc/configs/corenet32_smp_defconfig b/arch/powerpc/configs/corenet32_smp_defconfig
index cbb98c1234f..8b3d57c1ebe 100644
--- a/arch/powerpc/configs/corenet32_smp_defconfig
+++ b/arch/powerpc/configs/corenet32_smp_defconfig
@@ -6,8 +6,8 @@ CONFIG_SYSVIPC=y
6CONFIG_POSIX_MQUEUE=y 6CONFIG_POSIX_MQUEUE=y
7CONFIG_BSD_PROCESS_ACCT=y 7CONFIG_BSD_PROCESS_ACCT=y
8CONFIG_AUDIT=y 8CONFIG_AUDIT=y
9CONFIG_SPARSE_IRQ=y 9CONFIG_NO_HZ=y
10CONFIG_RCU_TRACE=y 10CONFIG_HIGH_RES_TIMERS=y
11CONFIG_IKCONFIG=y 11CONFIG_IKCONFIG=y
12CONFIG_IKCONFIG_PROC=y 12CONFIG_IKCONFIG_PROC=y
13CONFIG_LOG_BUF_SHIFT=14 13CONFIG_LOG_BUF_SHIFT=14
@@ -21,23 +21,22 @@ CONFIG_MODULE_UNLOAD=y
21CONFIG_MODULE_FORCE_UNLOAD=y 21CONFIG_MODULE_FORCE_UNLOAD=y
22CONFIG_MODVERSIONS=y 22CONFIG_MODVERSIONS=y
23# CONFIG_BLK_DEV_BSG is not set 23# CONFIG_BLK_DEV_BSG is not set
24CONFIG_PARTITION_ADVANCED=y
25CONFIG_MAC_PARTITION=y
24CONFIG_P2041_RDB=y 26CONFIG_P2041_RDB=y
25CONFIG_P3041_DS=y 27CONFIG_P3041_DS=y
26CONFIG_P4080_DS=y 28CONFIG_P4080_DS=y
27CONFIG_P5020_DS=y 29CONFIG_P5020_DS=y
28CONFIG_HIGHMEM=y 30CONFIG_HIGHMEM=y
29CONFIG_NO_HZ=y
30CONFIG_HIGH_RES_TIMERS=y
31# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set 31# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
32CONFIG_BINFMT_MISC=m 32CONFIG_BINFMT_MISC=m
33CONFIG_KEXEC=y 33CONFIG_KEXEC=y
34CONFIG_IRQ_ALL_CPUS=y 34CONFIG_IRQ_ALL_CPUS=y
35CONFIG_FORCE_MAX_ZONEORDER=13 35CONFIG_FORCE_MAX_ZONEORDER=13
36CONFIG_FSL_LBC=y
37CONFIG_PCI=y 36CONFIG_PCI=y
38CONFIG_PCIEPORTBUS=y 37CONFIG_PCIEPORTBUS=y
39CONFIG_PCI_MSI=y
40# CONFIG_PCIEASPM is not set 38# CONFIG_PCIEASPM is not set
39CONFIG_PCI_MSI=y
41CONFIG_RAPIDIO=y 40CONFIG_RAPIDIO=y
42CONFIG_FSL_RIO=y 41CONFIG_FSL_RIO=y
43CONFIG_NET=y 42CONFIG_NET=y
@@ -70,6 +69,7 @@ CONFIG_INET_IPCOMP=y
70CONFIG_IPV6=y 69CONFIG_IPV6=y
71CONFIG_IP_SCTP=m 70CONFIG_IP_SCTP=m
72CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 71CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
72CONFIG_DEVTMPFS=y
73CONFIG_MTD=y 73CONFIG_MTD=y
74CONFIG_MTD_CMDLINE_PARTS=y 74CONFIG_MTD_CMDLINE_PARTS=y
75CONFIG_MTD_CHAR=y 75CONFIG_MTD_CHAR=y
@@ -77,17 +77,14 @@ CONFIG_MTD_BLOCK=y
77CONFIG_MTD_CFI=y 77CONFIG_MTD_CFI=y
78CONFIG_MTD_CFI_AMDSTD=y 78CONFIG_MTD_CFI_AMDSTD=y
79CONFIG_MTD_PHYSMAP_OF=y 79CONFIG_MTD_PHYSMAP_OF=y
80CONFIG_MTD_M25P80=y
80CONFIG_MTD_NAND=y 81CONFIG_MTD_NAND=y
81CONFIG_MTD_NAND_ECC=y
82CONFIG_MTD_NAND_IDS=y
83CONFIG_MTD_NAND_FSL_IFC=y
84CONFIG_MTD_NAND_FSL_ELBC=y 82CONFIG_MTD_NAND_FSL_ELBC=y
85CONFIG_MTD_M25P80=y 83CONFIG_MTD_NAND_FSL_IFC=y
86CONFIG_PROC_DEVICETREE=y 84CONFIG_PROC_DEVICETREE=y
87CONFIG_BLK_DEV_LOOP=y 85CONFIG_BLK_DEV_LOOP=y
88CONFIG_BLK_DEV_RAM=y 86CONFIG_BLK_DEV_RAM=y
89CONFIG_BLK_DEV_RAM_SIZE=131072 87CONFIG_BLK_DEV_RAM_SIZE=131072
90CONFIG_MISC_DEVICES=y
91CONFIG_BLK_DEV_SD=y 88CONFIG_BLK_DEV_SD=y
92CONFIG_CHR_DEV_ST=y 89CONFIG_CHR_DEV_ST=y
93CONFIG_BLK_DEV_SR=y 90CONFIG_BLK_DEV_SR=y
@@ -115,11 +112,9 @@ CONFIG_SERIO_LIBPS2=y
115CONFIG_PPC_EPAPR_HV_BYTECHAN=y 112CONFIG_PPC_EPAPR_HV_BYTECHAN=y
116CONFIG_SERIAL_8250=y 113CONFIG_SERIAL_8250=y
117CONFIG_SERIAL_8250_CONSOLE=y 114CONFIG_SERIAL_8250_CONSOLE=y
118CONFIG_SERIAL_8250_EXTENDED=y
119CONFIG_SERIAL_8250_MANY_PORTS=y 115CONFIG_SERIAL_8250_MANY_PORTS=y
120CONFIG_SERIAL_8250_DETECT_IRQ=y 116CONFIG_SERIAL_8250_DETECT_IRQ=y
121CONFIG_SERIAL_8250_RSA=y 117CONFIG_SERIAL_8250_RSA=y
122CONFIG_HW_RANDOM=y
123CONFIG_NVRAM=y 118CONFIG_NVRAM=y
124CONFIG_I2C=y 119CONFIG_I2C=y
125CONFIG_I2C_CHARDEV=y 120CONFIG_I2C_CHARDEV=y
@@ -132,7 +127,6 @@ CONFIG_SPI_FSL_ESPI=y
132CONFIG_VIDEO_OUTPUT_CONTROL=y 127CONFIG_VIDEO_OUTPUT_CONTROL=y
133CONFIG_USB_HID=m 128CONFIG_USB_HID=m
134CONFIG_USB=y 129CONFIG_USB=y
135CONFIG_USB_DEVICEFS=y
136CONFIG_USB_MON=y 130CONFIG_USB_MON=y
137CONFIG_USB_EHCI_HCD=y 131CONFIG_USB_EHCI_HCD=y
138CONFIG_USB_EHCI_FSL=y 132CONFIG_USB_EHCI_FSL=y
@@ -142,8 +136,6 @@ CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
142CONFIG_USB_STORAGE=y 136CONFIG_USB_STORAGE=y
143CONFIG_MMC=y 137CONFIG_MMC=y
144CONFIG_MMC_SDHCI=y 138CONFIG_MMC_SDHCI=y
145CONFIG_MMC_SDHCI_OF=y
146CONFIG_MMC_SDHCI_OF_ESDHC=y
147CONFIG_EDAC=y 139CONFIG_EDAC=y
148CONFIG_EDAC_MM_EDAC=y 140CONFIG_EDAC_MM_EDAC=y
149CONFIG_EDAC_MPC85XX=y 141CONFIG_EDAC_MPC85XX=y
@@ -170,19 +162,16 @@ CONFIG_HUGETLBFS=y
170CONFIG_JFFS2_FS=y 162CONFIG_JFFS2_FS=y
171CONFIG_CRAMFS=y 163CONFIG_CRAMFS=y
172CONFIG_NFS_FS=y 164CONFIG_NFS_FS=y
173CONFIG_NFS_V3=y
174CONFIG_NFS_V4=y 165CONFIG_NFS_V4=y
175CONFIG_ROOT_NFS=y 166CONFIG_ROOT_NFS=y
176CONFIG_NFSD=m 167CONFIG_NFSD=m
177CONFIG_PARTITION_ADVANCED=y
178CONFIG_MAC_PARTITION=y
179CONFIG_NLS_ISO8859_1=y 168CONFIG_NLS_ISO8859_1=y
180CONFIG_NLS_UTF8=m 169CONFIG_NLS_UTF8=m
181CONFIG_MAGIC_SYSRQ=y 170CONFIG_MAGIC_SYSRQ=y
182CONFIG_DEBUG_SHIRQ=y 171CONFIG_DEBUG_SHIRQ=y
183CONFIG_DETECT_HUNG_TASK=y 172CONFIG_DETECT_HUNG_TASK=y
184CONFIG_DEBUG_INFO=y 173CONFIG_DEBUG_INFO=y
185CONFIG_SYSCTL_SYSCALL_CHECK=y 174CONFIG_RCU_TRACE=y
186CONFIG_CRYPTO_NULL=y 175CONFIG_CRYPTO_NULL=y
187CONFIG_CRYPTO_PCBC=m 176CONFIG_CRYPTO_PCBC=m
188CONFIG_CRYPTO_MD4=y 177CONFIG_CRYPTO_MD4=y
diff --git a/arch/powerpc/configs/corenet64_smp_defconfig b/arch/powerpc/configs/corenet64_smp_defconfig
index dd89de8b0b7..0516e22ca3d 100644
--- a/arch/powerpc/configs/corenet64_smp_defconfig
+++ b/arch/powerpc/configs/corenet64_smp_defconfig
@@ -56,6 +56,7 @@ CONFIG_INET_ESP=y
56CONFIG_IPV6=y 56CONFIG_IPV6=y
57CONFIG_IP_SCTP=m 57CONFIG_IP_SCTP=m
58CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 58CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
59CONFIG_DEVTMPFS=y
59CONFIG_MTD=y 60CONFIG_MTD=y
60CONFIG_MTD_CMDLINE_PARTS=y 61CONFIG_MTD_CMDLINE_PARTS=y
61CONFIG_MTD_CHAR=y 62CONFIG_MTD_CHAR=y
diff --git a/arch/powerpc/configs/g5_defconfig b/arch/powerpc/configs/g5_defconfig
index 15130066e5e..07b7f2af2dc 100644
--- a/arch/powerpc/configs/g5_defconfig
+++ b/arch/powerpc/configs/g5_defconfig
@@ -1,8 +1,10 @@
1CONFIG_PPC64=y
2CONFIG_ALTIVEC=y
3CONFIG_SMP=y
4CONFIG_NR_CPUS=4
1CONFIG_EXPERIMENTAL=y 5CONFIG_EXPERIMENTAL=y
2CONFIG_SYSVIPC=y 6CONFIG_SYSVIPC=y
3CONFIG_POSIX_MQUEUE=y 7CONFIG_POSIX_MQUEUE=y
4CONFIG_NO_HZ=y
5CONFIG_HIGH_RES_TIMERS=y
6CONFIG_IKCONFIG=y 8CONFIG_IKCONFIG=y
7CONFIG_IKCONFIG_PROC=y 9CONFIG_IKCONFIG_PROC=y
8CONFIG_BLK_DEV_INITRD=y 10CONFIG_BLK_DEV_INITRD=y
@@ -13,15 +15,16 @@ CONFIG_MODULES=y
13CONFIG_MODULE_UNLOAD=y 15CONFIG_MODULE_UNLOAD=y
14CONFIG_MODVERSIONS=y 16CONFIG_MODVERSIONS=y
15CONFIG_MODULE_SRCVERSION_ALL=y 17CONFIG_MODULE_SRCVERSION_ALL=y
16CONFIG_PARTITION_ADVANCED=y 18# CONFIG_PPC_PSERIES is not set
17CONFIG_MAC_PARTITION=y
18CONFIG_SMP=y
19CONFIG_NR_CPUS=4
20CONFIG_KEXEC=y
21# CONFIG_RELOCATABLE is not set
22CONFIG_CPU_FREQ=y 19CONFIG_CPU_FREQ=y
23CONFIG_CPU_FREQ_GOV_POWERSAVE=y 20CONFIG_CPU_FREQ_GOV_POWERSAVE=y
24CONFIG_CPU_FREQ_GOV_USERSPACE=y 21CONFIG_CPU_FREQ_GOV_USERSPACE=y
22CONFIG_CPU_FREQ_PMAC64=y
23CONFIG_NO_HZ=y
24CONFIG_HIGH_RES_TIMERS=y
25CONFIG_KEXEC=y
26CONFIG_IRQ_ALL_CPUS=y
27# CONFIG_MIGRATION is not set
25CONFIG_PCI_MSI=y 28CONFIG_PCI_MSI=y
26CONFIG_NET=y 29CONFIG_NET=y
27CONFIG_PACKET=y 30CONFIG_PACKET=y
@@ -49,6 +52,7 @@ CONFIG_NF_CT_NETLINK=m
49CONFIG_NF_CONNTRACK_IPV4=m 52CONFIG_NF_CONNTRACK_IPV4=m
50CONFIG_IP_NF_QUEUE=m 53CONFIG_IP_NF_QUEUE=m
51CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 54CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
55CONFIG_PROC_DEVICETREE=y
52CONFIG_BLK_DEV_LOOP=y 56CONFIG_BLK_DEV_LOOP=y
53CONFIG_BLK_DEV_NBD=m 57CONFIG_BLK_DEV_NBD=m
54CONFIG_BLK_DEV_RAM=y 58CONFIG_BLK_DEV_RAM=y
@@ -56,6 +60,8 @@ CONFIG_BLK_DEV_RAM_SIZE=65536
56CONFIG_CDROM_PKTCDVD=m 60CONFIG_CDROM_PKTCDVD=m
57CONFIG_IDE=y 61CONFIG_IDE=y
58CONFIG_BLK_DEV_IDECD=y 62CONFIG_BLK_DEV_IDECD=y
63CONFIG_BLK_DEV_IDE_PMAC=y
64CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST=y
59CONFIG_BLK_DEV_SD=y 65CONFIG_BLK_DEV_SD=y
60CONFIG_CHR_DEV_ST=y 66CONFIG_CHR_DEV_ST=y
61CONFIG_BLK_DEV_SR=y 67CONFIG_BLK_DEV_SR=y
@@ -79,24 +85,33 @@ CONFIG_DM_CRYPT=m
79CONFIG_DM_SNAPSHOT=m 85CONFIG_DM_SNAPSHOT=m
80CONFIG_DM_MIRROR=m 86CONFIG_DM_MIRROR=m
81CONFIG_DM_ZERO=m 87CONFIG_DM_ZERO=m
82CONFIG_MACINTOSH_DRIVERS=y 88CONFIG_IEEE1394=y
89CONFIG_IEEE1394_OHCI1394=y
90CONFIG_IEEE1394_SBP2=m
91CONFIG_IEEE1394_ETH1394=m
92CONFIG_IEEE1394_RAWIO=y
93CONFIG_IEEE1394_VIDEO1394=m
94CONFIG_IEEE1394_DV1394=m
95CONFIG_ADB_PMU=y
96CONFIG_PMAC_SMU=y
83CONFIG_MAC_EMUMOUSEBTN=y 97CONFIG_MAC_EMUMOUSEBTN=y
98CONFIG_THERM_PM72=y
99CONFIG_WINDFARM=y
100CONFIG_WINDFARM_PM81=y
101CONFIG_WINDFARM_PM91=y
102CONFIG_WINDFARM_PM112=y
103CONFIG_WINDFARM_PM121=y
84CONFIG_NETDEVICES=y 104CONFIG_NETDEVICES=y
85CONFIG_BONDING=m
86CONFIG_DUMMY=m 105CONFIG_DUMMY=m
87CONFIG_MII=y 106CONFIG_BONDING=m
88CONFIG_TUN=m 107CONFIG_TUN=m
108CONFIG_NET_ETHERNET=y
109CONFIG_MII=y
110CONFIG_SUNGEM=y
89CONFIG_ACENIC=m 111CONFIG_ACENIC=m
90CONFIG_ACENIC_OMIT_TIGON_I=y 112CONFIG_ACENIC_OMIT_TIGON_I=y
91CONFIG_TIGON3=y
92CONFIG_E1000=y 113CONFIG_E1000=y
93CONFIG_SUNGEM=y 114CONFIG_TIGON3=y
94CONFIG_PPP=m
95CONFIG_PPP_BSDCOMP=m
96CONFIG_PPP_DEFLATE=m
97CONFIG_PPPOE=m
98CONFIG_PPP_ASYNC=m
99CONFIG_PPP_SYNC_TTY=m
100CONFIG_USB_CATC=m 115CONFIG_USB_CATC=m
101CONFIG_USB_KAWETH=m 116CONFIG_USB_KAWETH=m
102CONFIG_USB_PEGASUS=m 117CONFIG_USB_PEGASUS=m
@@ -106,24 +121,36 @@ CONFIG_USB_USBNET=m
106# CONFIG_USB_NET_NET1080 is not set 121# CONFIG_USB_NET_NET1080 is not set
107# CONFIG_USB_NET_CDC_SUBSET is not set 122# CONFIG_USB_NET_CDC_SUBSET is not set
108# CONFIG_USB_NET_ZAURUS is not set 123# CONFIG_USB_NET_ZAURUS is not set
124CONFIG_PPP=m
125CONFIG_PPP_ASYNC=m
126CONFIG_PPP_SYNC_TTY=m
127CONFIG_PPP_DEFLATE=m
128CONFIG_PPP_BSDCOMP=m
129CONFIG_PPPOE=m
109# CONFIG_INPUT_MOUSEDEV_PSAUX is not set 130# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
110CONFIG_INPUT_JOYDEV=m 131CONFIG_INPUT_JOYDEV=m
111CONFIG_INPUT_EVDEV=y 132CONFIG_INPUT_EVDEV=y
133# CONFIG_KEYBOARD_ATKBD is not set
112# CONFIG_MOUSE_PS2 is not set 134# CONFIG_MOUSE_PS2 is not set
135# CONFIG_SERIO_I8042 is not set
113# CONFIG_SERIO_SERPORT is not set 136# CONFIG_SERIO_SERPORT is not set
114CONFIG_VT_HW_CONSOLE_BINDING=y
115# CONFIG_HW_RANDOM is not set 137# CONFIG_HW_RANDOM is not set
116CONFIG_GEN_RTC=y 138CONFIG_GEN_RTC=y
117CONFIG_RAW_DRIVER=y 139CONFIG_RAW_DRIVER=y
118CONFIG_I2C_CHARDEV=y 140CONFIG_I2C_CHARDEV=y
119# CONFIG_HWMON is not set 141# CONFIG_HWMON is not set
120CONFIG_AGP=y 142CONFIG_AGP=m
121CONFIG_DRM=y 143CONFIG_AGP_UNINORTH=m
122CONFIG_DRM_NOUVEAU=y
123CONFIG_VIDEO_OUTPUT_CONTROL=m 144CONFIG_VIDEO_OUTPUT_CONTROL=m
145CONFIG_FB=y
124CONFIG_FIRMWARE_EDID=y 146CONFIG_FIRMWARE_EDID=y
125CONFIG_FB_TILEBLITTING=y 147CONFIG_FB_TILEBLITTING=y
148CONFIG_FB_OF=y
149CONFIG_FB_NVIDIA=y
150CONFIG_FB_NVIDIA_I2C=y
126CONFIG_FB_RADEON=y 151CONFIG_FB_RADEON=y
152# CONFIG_VGA_CONSOLE is not set
153CONFIG_FRAMEBUFFER_CONSOLE=y
127CONFIG_LOGO=y 154CONFIG_LOGO=y
128CONFIG_SOUND=m 155CONFIG_SOUND=m
129CONFIG_SND=m 156CONFIG_SND=m
@@ -131,7 +158,15 @@ CONFIG_SND_SEQUENCER=m
131CONFIG_SND_MIXER_OSS=m 158CONFIG_SND_MIXER_OSS=m
132CONFIG_SND_PCM_OSS=m 159CONFIG_SND_PCM_OSS=m
133CONFIG_SND_SEQUENCER_OSS=y 160CONFIG_SND_SEQUENCER_OSS=y
161CONFIG_SND_POWERMAC=m
162CONFIG_SND_AOA=m
163CONFIG_SND_AOA_FABRIC_LAYOUT=m
164CONFIG_SND_AOA_ONYX=m
165CONFIG_SND_AOA_TAS=m
166CONFIG_SND_AOA_TOONIE=m
134CONFIG_SND_USB_AUDIO=m 167CONFIG_SND_USB_AUDIO=m
168CONFIG_HID_PID=y
169CONFIG_USB_HIDDEV=y
135CONFIG_HID_GYRATION=y 170CONFIG_HID_GYRATION=y
136CONFIG_LOGITECH_FF=y 171CONFIG_LOGITECH_FF=y
137CONFIG_HID_PANTHERLORD=y 172CONFIG_HID_PANTHERLORD=y
@@ -139,12 +174,13 @@ CONFIG_HID_PETALYNX=y
139CONFIG_HID_SAMSUNG=y 174CONFIG_HID_SAMSUNG=y
140CONFIG_HID_SONY=y 175CONFIG_HID_SONY=y
141CONFIG_HID_SUNPLUS=y 176CONFIG_HID_SUNPLUS=y
142CONFIG_HID_PID=y
143CONFIG_USB_HIDDEV=y
144CONFIG_USB=y 177CONFIG_USB=y
178CONFIG_USB_DEVICEFS=y
145CONFIG_USB_MON=y 179CONFIG_USB_MON=y
146CONFIG_USB_EHCI_HCD=y 180CONFIG_USB_EHCI_HCD=y
181# CONFIG_USB_EHCI_HCD_PPC_OF is not set
147CONFIG_USB_OHCI_HCD=y 182CONFIG_USB_OHCI_HCD=y
183CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
148CONFIG_USB_ACM=m 184CONFIG_USB_ACM=m
149CONFIG_USB_PRINTER=y 185CONFIG_USB_PRINTER=y
150CONFIG_USB_STORAGE=y 186CONFIG_USB_STORAGE=y
@@ -208,6 +244,8 @@ CONFIG_REISERFS_FS_POSIX_ACL=y
208CONFIG_REISERFS_FS_SECURITY=y 244CONFIG_REISERFS_FS_SECURITY=y
209CONFIG_XFS_FS=m 245CONFIG_XFS_FS=m
210CONFIG_XFS_POSIX_ACL=y 246CONFIG_XFS_POSIX_ACL=y
247CONFIG_INOTIFY=y
248CONFIG_AUTOFS_FS=m
211CONFIG_ISO9660_FS=y 249CONFIG_ISO9660_FS=y
212CONFIG_JOLIET=y 250CONFIG_JOLIET=y
213CONFIG_ZISOFS=y 251CONFIG_ZISOFS=y
@@ -221,12 +259,14 @@ CONFIG_HFS_FS=m
221CONFIG_HFSPLUS_FS=m 259CONFIG_HFSPLUS_FS=m
222CONFIG_CRAMFS=y 260CONFIG_CRAMFS=y
223CONFIG_NFS_FS=y 261CONFIG_NFS_FS=y
262CONFIG_NFS_V3=y
224CONFIG_NFS_V3_ACL=y 263CONFIG_NFS_V3_ACL=y
225CONFIG_NFS_V4=y 264CONFIG_NFS_V4=y
226CONFIG_NFSD=y 265CONFIG_NFSD=y
227CONFIG_NFSD_V3_ACL=y 266CONFIG_NFSD_V3_ACL=y
228CONFIG_NFSD_V4=y 267CONFIG_NFSD_V4=y
229CONFIG_CIFS=m 268CONFIG_CIFS=m
269CONFIG_PARTITION_ADVANCED=y
230CONFIG_NLS_CODEPAGE_437=y 270CONFIG_NLS_CODEPAGE_437=y
231CONFIG_NLS_CODEPAGE_1250=y 271CONFIG_NLS_CODEPAGE_1250=y
232CONFIG_NLS_CODEPAGE_1251=y 272CONFIG_NLS_CODEPAGE_1251=y
@@ -234,23 +274,29 @@ CONFIG_NLS_ASCII=y
234CONFIG_NLS_ISO8859_1=y 274CONFIG_NLS_ISO8859_1=y
235CONFIG_NLS_ISO8859_15=y 275CONFIG_NLS_ISO8859_15=y
236CONFIG_NLS_UTF8=y 276CONFIG_NLS_UTF8=y
277CONFIG_CRC_T10DIF=y
278CONFIG_LIBCRC32C=m
237CONFIG_MAGIC_SYSRQ=y 279CONFIG_MAGIC_SYSRQ=y
238# CONFIG_UNUSED_SYMBOLS is not set
239CONFIG_DEBUG_FS=y 280CONFIG_DEBUG_FS=y
240CONFIG_DEBUG_KERNEL=y 281CONFIG_DEBUG_KERNEL=y
241CONFIG_DEBUG_MUTEXES=y 282CONFIG_DEBUG_MUTEXES=y
283# CONFIG_RCU_CPU_STALL_DETECTOR is not set
242CONFIG_LATENCYTOP=y 284CONFIG_LATENCYTOP=y
243CONFIG_STRICT_DEVMEM=y 285CONFIG_SYSCTL_SYSCALL_CHECK=y
286CONFIG_BOOTX_TEXT=y
244CONFIG_CRYPTO_NULL=m 287CONFIG_CRYPTO_NULL=m
245CONFIG_CRYPTO_TEST=m 288CONFIG_CRYPTO_TEST=m
289CONFIG_CRYPTO_ECB=m
246CONFIG_CRYPTO_PCBC=m 290CONFIG_CRYPTO_PCBC=m
247CONFIG_CRYPTO_HMAC=y 291CONFIG_CRYPTO_HMAC=y
292CONFIG_CRYPTO_MD4=m
248CONFIG_CRYPTO_MICHAEL_MIC=m 293CONFIG_CRYPTO_MICHAEL_MIC=m
249CONFIG_CRYPTO_SHA256=m 294CONFIG_CRYPTO_SHA256=m
250CONFIG_CRYPTO_SHA512=m 295CONFIG_CRYPTO_SHA512=m
251CONFIG_CRYPTO_WP512=m 296CONFIG_CRYPTO_WP512=m
252CONFIG_CRYPTO_AES=m 297CONFIG_CRYPTO_AES=m
253CONFIG_CRYPTO_ANUBIS=m 298CONFIG_CRYPTO_ANUBIS=m
299CONFIG_CRYPTO_ARC4=m
254CONFIG_CRYPTO_BLOWFISH=m 300CONFIG_CRYPTO_BLOWFISH=m
255CONFIG_CRYPTO_CAST5=m 301CONFIG_CRYPTO_CAST5=m
256CONFIG_CRYPTO_CAST6=m 302CONFIG_CRYPTO_CAST6=m
@@ -260,6 +306,3 @@ CONFIG_CRYPTO_TEA=m
260CONFIG_CRYPTO_TWOFISH=m 306CONFIG_CRYPTO_TWOFISH=m
261# CONFIG_CRYPTO_ANSI_CPRNG is not set 307# CONFIG_CRYPTO_ANSI_CPRNG is not set
262# CONFIG_CRYPTO_HW is not set 308# CONFIG_CRYPTO_HW is not set
263# CONFIG_VIRTUALIZATION is not set
264CONFIG_CRC_T10DIF=y
265CONFIG_LIBCRC32C=m
diff --git a/arch/powerpc/configs/mpc83xx_defconfig b/arch/powerpc/configs/mpc83xx_defconfig
index 5aac9a8bc53..9352e4430c3 100644
--- a/arch/powerpc/configs/mpc83xx_defconfig
+++ b/arch/powerpc/configs/mpc83xx_defconfig
@@ -2,12 +2,12 @@ CONFIG_EXPERIMENTAL=y
2CONFIG_SYSVIPC=y 2CONFIG_SYSVIPC=y
3CONFIG_LOG_BUF_SHIFT=14 3CONFIG_LOG_BUF_SHIFT=14
4CONFIG_BLK_DEV_INITRD=y 4CONFIG_BLK_DEV_INITRD=y
5# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
6CONFIG_EXPERT=y 5CONFIG_EXPERT=y
7CONFIG_SLAB=y 6CONFIG_SLAB=y
8CONFIG_MODULES=y 7CONFIG_MODULES=y
9CONFIG_MODULE_UNLOAD=y 8CONFIG_MODULE_UNLOAD=y
10# CONFIG_BLK_DEV_BSG is not set 9# CONFIG_BLK_DEV_BSG is not set
10CONFIG_PARTITION_ADVANCED=y
11# CONFIG_PPC_CHRP is not set 11# CONFIG_PPC_CHRP is not set
12# CONFIG_PPC_PMAC is not set 12# CONFIG_PPC_PMAC is not set
13CONFIG_PPC_83xx=y 13CONFIG_PPC_83xx=y
@@ -25,7 +25,6 @@ CONFIG_ASP834x=y
25CONFIG_QUICC_ENGINE=y 25CONFIG_QUICC_ENGINE=y
26CONFIG_QE_GPIO=y 26CONFIG_QE_GPIO=y
27CONFIG_MATH_EMULATION=y 27CONFIG_MATH_EMULATION=y
28CONFIG_SPARSE_IRQ=y
29CONFIG_PCI=y 28CONFIG_PCI=y
30CONFIG_NET=y 29CONFIG_NET=y
31CONFIG_PACKET=y 30CONFIG_PACKET=y
@@ -42,10 +41,9 @@ CONFIG_INET_ESP=y
42# CONFIG_INET_LRO is not set 41# CONFIG_INET_LRO is not set
43# CONFIG_IPV6 is not set 42# CONFIG_IPV6 is not set
44CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 43CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
44CONFIG_DEVTMPFS=y
45# CONFIG_FW_LOADER is not set 45# CONFIG_FW_LOADER is not set
46CONFIG_MTD=y 46CONFIG_MTD=y
47CONFIG_MTD_PARTITIONS=y
48CONFIG_MTD_OF_PARTS=y
49CONFIG_MTD_CHAR=y 47CONFIG_MTD_CHAR=y
50CONFIG_MTD_BLOCK=y 48CONFIG_MTD_BLOCK=y
51CONFIG_MTD_CFI=y 49CONFIG_MTD_CFI=y
@@ -64,15 +62,14 @@ CONFIG_ATA=y
64CONFIG_SATA_FSL=y 62CONFIG_SATA_FSL=y
65CONFIG_SATA_SIL=y 63CONFIG_SATA_SIL=y
66CONFIG_NETDEVICES=y 64CONFIG_NETDEVICES=y
65CONFIG_MII=y
66CONFIG_UCC_GETH=y
67CONFIG_GIANFAR=y
67CONFIG_MARVELL_PHY=y 68CONFIG_MARVELL_PHY=y
68CONFIG_DAVICOM_PHY=y 69CONFIG_DAVICOM_PHY=y
69CONFIG_VITESSE_PHY=y 70CONFIG_VITESSE_PHY=y
70CONFIG_ICPLUS_PHY=y 71CONFIG_ICPLUS_PHY=y
71CONFIG_FIXED_PHY=y 72CONFIG_FIXED_PHY=y
72CONFIG_NET_ETHERNET=y
73CONFIG_MII=y
74CONFIG_GIANFAR=y
75CONFIG_UCC_GETH=y
76CONFIG_INPUT_FF_MEMLESS=m 73CONFIG_INPUT_FF_MEMLESS=m
77# CONFIG_INPUT_MOUSEDEV is not set 74# CONFIG_INPUT_MOUSEDEV is not set
78# CONFIG_INPUT_KEYBOARD is not set 75# CONFIG_INPUT_KEYBOARD is not set
@@ -112,17 +109,12 @@ CONFIG_RTC_DRV_DS1374=y
112CONFIG_EXT2_FS=y 109CONFIG_EXT2_FS=y
113CONFIG_EXT3_FS=y 110CONFIG_EXT3_FS=y
114# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set 111# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
115CONFIG_INOTIFY=y
116CONFIG_PROC_KCORE=y 112CONFIG_PROC_KCORE=y
117CONFIG_TMPFS=y 113CONFIG_TMPFS=y
118CONFIG_NFS_FS=y 114CONFIG_NFS_FS=y
119CONFIG_NFS_V3=y
120CONFIG_NFS_V4=y 115CONFIG_NFS_V4=y
121CONFIG_ROOT_NFS=y 116CONFIG_ROOT_NFS=y
122CONFIG_PARTITION_ADVANCED=y
123CONFIG_CRC_T10DIF=y 117CONFIG_CRC_T10DIF=y
124# CONFIG_RCU_CPU_STALL_DETECTOR is not set
125CONFIG_SYSCTL_SYSCALL_CHECK=y
126CONFIG_CRYPTO_ECB=m 118CONFIG_CRYPTO_ECB=m
127CONFIG_CRYPTO_PCBC=m 119CONFIG_CRYPTO_PCBC=m
128CONFIG_CRYPTO_SHA256=y 120CONFIG_CRYPTO_SHA256=y
diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig
index 03ee911c457..8b5bda27d24 100644
--- a/arch/powerpc/configs/mpc85xx_defconfig
+++ b/arch/powerpc/configs/mpc85xx_defconfig
@@ -5,7 +5,9 @@ CONFIG_SYSVIPC=y
5CONFIG_POSIX_MQUEUE=y 5CONFIG_POSIX_MQUEUE=y
6CONFIG_BSD_PROCESS_ACCT=y 6CONFIG_BSD_PROCESS_ACCT=y
7CONFIG_AUDIT=y 7CONFIG_AUDIT=y
8CONFIG_SPARSE_IRQ=y 8CONFIG_IRQ_DOMAIN_DEBUG=y
9CONFIG_NO_HZ=y
10CONFIG_HIGH_RES_TIMERS=y
9CONFIG_IKCONFIG=y 11CONFIG_IKCONFIG=y
10CONFIG_IKCONFIG_PROC=y 12CONFIG_IKCONFIG_PROC=y
11CONFIG_LOG_BUF_SHIFT=14 13CONFIG_LOG_BUF_SHIFT=14
@@ -17,6 +19,8 @@ CONFIG_MODULE_UNLOAD=y
17CONFIG_MODULE_FORCE_UNLOAD=y 19CONFIG_MODULE_FORCE_UNLOAD=y
18CONFIG_MODVERSIONS=y 20CONFIG_MODVERSIONS=y
19# CONFIG_BLK_DEV_BSG is not set 21# CONFIG_BLK_DEV_BSG is not set
22CONFIG_PARTITION_ADVANCED=y
23CONFIG_MAC_PARTITION=y
20CONFIG_MPC8540_ADS=y 24CONFIG_MPC8540_ADS=y
21CONFIG_MPC8560_ADS=y 25CONFIG_MPC8560_ADS=y
22CONFIG_MPC85xx_CDS=y 26CONFIG_MPC85xx_CDS=y
@@ -40,8 +44,6 @@ CONFIG_SBC8548=y
40CONFIG_QUICC_ENGINE=y 44CONFIG_QUICC_ENGINE=y
41CONFIG_QE_GPIO=y 45CONFIG_QE_GPIO=y
42CONFIG_HIGHMEM=y 46CONFIG_HIGHMEM=y
43CONFIG_NO_HZ=y
44CONFIG_HIGH_RES_TIMERS=y
45CONFIG_BINFMT_MISC=m 47CONFIG_BINFMT_MISC=m
46CONFIG_MATH_EMULATION=y 48CONFIG_MATH_EMULATION=y
47CONFIG_FORCE_MAX_ZONEORDER=12 49CONFIG_FORCE_MAX_ZONEORDER=12
@@ -74,36 +76,25 @@ CONFIG_INET_ESP=y
74CONFIG_IPV6=y 76CONFIG_IPV6=y
75CONFIG_IP_SCTP=m 77CONFIG_IP_SCTP=m
76CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 78CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
79CONFIG_DEVTMPFS=y
77CONFIG_MTD=y 80CONFIG_MTD=y
78CONFIG_MTD_CMDLINE_PARTS=y 81CONFIG_MTD_CMDLINE_PARTS=y
79CONFIG_MTD_CHAR=y 82CONFIG_MTD_CHAR=y
80CONFIG_MTD_BLOCK=y 83CONFIG_MTD_BLOCK=y
81CONFIG_MTD_CFI=y
82CONFIG_FTL=y 84CONFIG_FTL=y
83CONFIG_MTD_GEN_PROBE=y 85CONFIG_MTD_CFI=y
84CONFIG_MTD_MAP_BANK_WIDTH_1=y
85CONFIG_MTD_MAP_BANK_WIDTH_2=y
86CONFIG_MTD_MAP_BANK_WIDTH_4=y
87CONFIG_MTD_CFI_I1=y
88CONFIG_MTD_CFI_I2=y
89CONFIG_MTD_CFI_INTELEXT=y 86CONFIG_MTD_CFI_INTELEXT=y
90CONFIG_MTD_CFI_AMDSTD=y 87CONFIG_MTD_CFI_AMDSTD=y
91CONFIG_MTD_CFI_UTIL=y
92CONFIG_MTD_PHYSMAP_OF=y 88CONFIG_MTD_PHYSMAP_OF=y
93CONFIG_MTD_PARTITIONS=y 89CONFIG_MTD_M25P80=y
94CONFIG_MTD_OF_PARTS=y
95CONFIG_MTD_NAND=y 90CONFIG_MTD_NAND=y
96CONFIG_MTD_NAND_FSL_ELBC=y 91CONFIG_MTD_NAND_FSL_ELBC=y
97CONFIG_MTD_NAND_FSL_IFC=y 92CONFIG_MTD_NAND_FSL_IFC=y
98CONFIG_MTD_NAND_IDS=y
99CONFIG_MTD_NAND_ECC=y
100CONFIG_MTD_M25P80=y
101CONFIG_PROC_DEVICETREE=y 93CONFIG_PROC_DEVICETREE=y
102CONFIG_BLK_DEV_LOOP=y 94CONFIG_BLK_DEV_LOOP=y
103CONFIG_BLK_DEV_NBD=y 95CONFIG_BLK_DEV_NBD=y
104CONFIG_BLK_DEV_RAM=y 96CONFIG_BLK_DEV_RAM=y
105CONFIG_BLK_DEV_RAM_SIZE=131072 97CONFIG_BLK_DEV_RAM_SIZE=131072
106CONFIG_MISC_DEVICES=y
107CONFIG_EEPROM_LEGACY=y 98CONFIG_EEPROM_LEGACY=y
108CONFIG_BLK_DEV_SD=y 99CONFIG_BLK_DEV_SD=y
109CONFIG_CHR_DEV_ST=y 100CONFIG_CHR_DEV_ST=y
@@ -115,6 +106,7 @@ CONFIG_ATA=y
115CONFIG_SATA_AHCI=y 106CONFIG_SATA_AHCI=y
116CONFIG_SATA_FSL=y 107CONFIG_SATA_FSL=y
117CONFIG_PATA_ALI=y 108CONFIG_PATA_ALI=y
109CONFIG_PATA_VIA=y
118CONFIG_NETDEVICES=y 110CONFIG_NETDEVICES=y
119CONFIG_DUMMY=y 111CONFIG_DUMMY=y
120CONFIG_FS_ENET=y 112CONFIG_FS_ENET=y
@@ -134,7 +126,6 @@ CONFIG_SERIAL_8250=y
134CONFIG_SERIAL_8250_CONSOLE=y 126CONFIG_SERIAL_8250_CONSOLE=y
135CONFIG_SERIAL_8250_NR_UARTS=2 127CONFIG_SERIAL_8250_NR_UARTS=2
136CONFIG_SERIAL_8250_RUNTIME_UARTS=2 128CONFIG_SERIAL_8250_RUNTIME_UARTS=2
137CONFIG_SERIAL_8250_EXTENDED=y
138CONFIG_SERIAL_8250_MANY_PORTS=y 129CONFIG_SERIAL_8250_MANY_PORTS=y
139CONFIG_SERIAL_8250_DETECT_IRQ=y 130CONFIG_SERIAL_8250_DETECT_IRQ=y
140CONFIG_SERIAL_8250_RSA=y 131CONFIG_SERIAL_8250_RSA=y
@@ -183,7 +174,6 @@ CONFIG_HID_SAMSUNG=y
183CONFIG_HID_SONY=y 174CONFIG_HID_SONY=y
184CONFIG_HID_SUNPLUS=y 175CONFIG_HID_SUNPLUS=y
185CONFIG_USB=y 176CONFIG_USB=y
186CONFIG_USB_DEVICEFS=y
187CONFIG_USB_MON=y 177CONFIG_USB_MON=y
188CONFIG_USB_EHCI_HCD=y 178CONFIG_USB_EHCI_HCD=y
189CONFIG_USB_EHCI_FSL=y 179CONFIG_USB_EHCI_FSL=y
@@ -229,18 +219,13 @@ CONFIG_QNX4FS_FS=m
229CONFIG_SYSV_FS=m 219CONFIG_SYSV_FS=m
230CONFIG_UFS_FS=m 220CONFIG_UFS_FS=m
231CONFIG_NFS_FS=y 221CONFIG_NFS_FS=y
232CONFIG_NFS_V3=y
233CONFIG_NFS_V4=y 222CONFIG_NFS_V4=y
234CONFIG_ROOT_NFS=y 223CONFIG_ROOT_NFS=y
235CONFIG_NFSD=y 224CONFIG_NFSD=y
236CONFIG_PARTITION_ADVANCED=y
237CONFIG_MAC_PARTITION=y
238CONFIG_CRC_T10DIF=y 225CONFIG_CRC_T10DIF=y
239CONFIG_DEBUG_FS=y 226CONFIG_DEBUG_FS=y
240CONFIG_DETECT_HUNG_TASK=y 227CONFIG_DETECT_HUNG_TASK=y
241CONFIG_DEBUG_INFO=y 228CONFIG_DEBUG_INFO=y
242CONFIG_SYSCTL_SYSCALL_CHECK=y
243CONFIG_IRQ_DOMAIN_DEBUG=y
244CONFIG_CRYPTO_PCBC=m 229CONFIG_CRYPTO_PCBC=m
245CONFIG_CRYPTO_SHA256=y 230CONFIG_CRYPTO_SHA256=y
246CONFIG_CRYPTO_SHA512=y 231CONFIG_CRYPTO_SHA512=y
diff --git a/arch/powerpc/configs/mpc85xx_smp_defconfig b/arch/powerpc/configs/mpc85xx_smp_defconfig
index fdfa84dc908..b0974e7e98a 100644
--- a/arch/powerpc/configs/mpc85xx_smp_defconfig
+++ b/arch/powerpc/configs/mpc85xx_smp_defconfig
@@ -7,7 +7,9 @@ CONFIG_SYSVIPC=y
7CONFIG_POSIX_MQUEUE=y 7CONFIG_POSIX_MQUEUE=y
8CONFIG_BSD_PROCESS_ACCT=y 8CONFIG_BSD_PROCESS_ACCT=y
9CONFIG_AUDIT=y 9CONFIG_AUDIT=y
10CONFIG_SPARSE_IRQ=y 10CONFIG_IRQ_DOMAIN_DEBUG=y
11CONFIG_NO_HZ=y
12CONFIG_HIGH_RES_TIMERS=y
11CONFIG_IKCONFIG=y 13CONFIG_IKCONFIG=y
12CONFIG_IKCONFIG_PROC=y 14CONFIG_IKCONFIG_PROC=y
13CONFIG_LOG_BUF_SHIFT=14 15CONFIG_LOG_BUF_SHIFT=14
@@ -19,6 +21,8 @@ CONFIG_MODULE_UNLOAD=y
19CONFIG_MODULE_FORCE_UNLOAD=y 21CONFIG_MODULE_FORCE_UNLOAD=y
20CONFIG_MODVERSIONS=y 22CONFIG_MODVERSIONS=y
21# CONFIG_BLK_DEV_BSG is not set 23# CONFIG_BLK_DEV_BSG is not set
24CONFIG_PARTITION_ADVANCED=y
25CONFIG_MAC_PARTITION=y
22CONFIG_MPC8540_ADS=y 26CONFIG_MPC8540_ADS=y
23CONFIG_MPC8560_ADS=y 27CONFIG_MPC8560_ADS=y
24CONFIG_MPC85xx_CDS=y 28CONFIG_MPC85xx_CDS=y
@@ -42,8 +46,6 @@ CONFIG_SBC8548=y
42CONFIG_QUICC_ENGINE=y 46CONFIG_QUICC_ENGINE=y
43CONFIG_QE_GPIO=y 47CONFIG_QE_GPIO=y
44CONFIG_HIGHMEM=y 48CONFIG_HIGHMEM=y
45CONFIG_NO_HZ=y
46CONFIG_HIGH_RES_TIMERS=y
47CONFIG_BINFMT_MISC=m 49CONFIG_BINFMT_MISC=m
48CONFIG_MATH_EMULATION=y 50CONFIG_MATH_EMULATION=y
49CONFIG_IRQ_ALL_CPUS=y 51CONFIG_IRQ_ALL_CPUS=y
@@ -77,36 +79,25 @@ CONFIG_INET_ESP=y
77CONFIG_IPV6=y 79CONFIG_IPV6=y
78CONFIG_IP_SCTP=m 80CONFIG_IP_SCTP=m
79CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 81CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
82CONFIG_DEVTMPFS=y
80CONFIG_MTD=y 83CONFIG_MTD=y
81CONFIG_MTD_CMDLINE_PARTS=y 84CONFIG_MTD_CMDLINE_PARTS=y
82CONFIG_MTD_CHAR=y 85CONFIG_MTD_CHAR=y
83CONFIG_MTD_BLOCK=y 86CONFIG_MTD_BLOCK=y
84CONFIG_MTD_CFI=y
85CONFIG_FTL=y 87CONFIG_FTL=y
86CONFIG_MTD_GEN_PROBE=y 88CONFIG_MTD_CFI=y
87CONFIG_MTD_MAP_BANK_WIDTH_1=y
88CONFIG_MTD_MAP_BANK_WIDTH_2=y
89CONFIG_MTD_MAP_BANK_WIDTH_4=y
90CONFIG_MTD_CFI_I1=y
91CONFIG_MTD_CFI_I2=y
92CONFIG_MTD_CFI_INTELEXT=y 89CONFIG_MTD_CFI_INTELEXT=y
93CONFIG_MTD_CFI_AMDSTD=y 90CONFIG_MTD_CFI_AMDSTD=y
94CONFIG_MTD_CFI_UTIL=y
95CONFIG_MTD_PHYSMAP_OF=y 91CONFIG_MTD_PHYSMAP_OF=y
96CONFIG_MTD_PARTITIONS=y 92CONFIG_MTD_M25P80=y
97CONFIG_MTD_OF_PARTS=y
98CONFIG_MTD_NAND=y 93CONFIG_MTD_NAND=y
99CONFIG_MTD_NAND_FSL_ELBC=y 94CONFIG_MTD_NAND_FSL_ELBC=y
100CONFIG_MTD_NAND_FSL_IFC=y 95CONFIG_MTD_NAND_FSL_IFC=y
101CONFIG_MTD_NAND_IDS=y
102CONFIG_MTD_NAND_ECC=y
103CONFIG_MTD_M25P80=y
104CONFIG_PROC_DEVICETREE=y 96CONFIG_PROC_DEVICETREE=y
105CONFIG_BLK_DEV_LOOP=y 97CONFIG_BLK_DEV_LOOP=y
106CONFIG_BLK_DEV_NBD=y 98CONFIG_BLK_DEV_NBD=y
107CONFIG_BLK_DEV_RAM=y 99CONFIG_BLK_DEV_RAM=y
108CONFIG_BLK_DEV_RAM_SIZE=131072 100CONFIG_BLK_DEV_RAM_SIZE=131072
109CONFIG_MISC_DEVICES=y
110CONFIG_EEPROM_LEGACY=y 101CONFIG_EEPROM_LEGACY=y
111CONFIG_BLK_DEV_SD=y 102CONFIG_BLK_DEV_SD=y
112CONFIG_CHR_DEV_ST=y 103CONFIG_CHR_DEV_ST=y
@@ -137,7 +128,6 @@ CONFIG_SERIAL_8250=y
137CONFIG_SERIAL_8250_CONSOLE=y 128CONFIG_SERIAL_8250_CONSOLE=y
138CONFIG_SERIAL_8250_NR_UARTS=2 129CONFIG_SERIAL_8250_NR_UARTS=2
139CONFIG_SERIAL_8250_RUNTIME_UARTS=2 130CONFIG_SERIAL_8250_RUNTIME_UARTS=2
140CONFIG_SERIAL_8250_EXTENDED=y
141CONFIG_SERIAL_8250_MANY_PORTS=y 131CONFIG_SERIAL_8250_MANY_PORTS=y
142CONFIG_SERIAL_8250_DETECT_IRQ=y 132CONFIG_SERIAL_8250_DETECT_IRQ=y
143CONFIG_SERIAL_8250_RSA=y 133CONFIG_SERIAL_8250_RSA=y
@@ -186,7 +176,6 @@ CONFIG_HID_SAMSUNG=y
186CONFIG_HID_SONY=y 176CONFIG_HID_SONY=y
187CONFIG_HID_SUNPLUS=y 177CONFIG_HID_SUNPLUS=y
188CONFIG_USB=y 178CONFIG_USB=y
189CONFIG_USB_DEVICEFS=y
190CONFIG_USB_MON=y 179CONFIG_USB_MON=y
191CONFIG_USB_EHCI_HCD=y 180CONFIG_USB_EHCI_HCD=y
192CONFIG_USB_EHCI_FSL=y 181CONFIG_USB_EHCI_FSL=y
@@ -232,18 +221,13 @@ CONFIG_QNX4FS_FS=m
232CONFIG_SYSV_FS=m 221CONFIG_SYSV_FS=m
233CONFIG_UFS_FS=m 222CONFIG_UFS_FS=m
234CONFIG_NFS_FS=y 223CONFIG_NFS_FS=y
235CONFIG_NFS_V3=y
236CONFIG_NFS_V4=y 224CONFIG_NFS_V4=y
237CONFIG_ROOT_NFS=y 225CONFIG_ROOT_NFS=y
238CONFIG_NFSD=y 226CONFIG_NFSD=y
239CONFIG_PARTITION_ADVANCED=y
240CONFIG_MAC_PARTITION=y
241CONFIG_CRC_T10DIF=y 227CONFIG_CRC_T10DIF=y
242CONFIG_DEBUG_FS=y 228CONFIG_DEBUG_FS=y
243CONFIG_DETECT_HUNG_TASK=y 229CONFIG_DETECT_HUNG_TASK=y
244CONFIG_DEBUG_INFO=y 230CONFIG_DEBUG_INFO=y
245CONFIG_SYSCTL_SYSCALL_CHECK=y
246CONFIG_IRQ_DOMAIN_DEBUG=y
247CONFIG_CRYPTO_PCBC=m 231CONFIG_CRYPTO_PCBC=m
248CONFIG_CRYPTO_SHA256=y 232CONFIG_CRYPTO_SHA256=y
249CONFIG_CRYPTO_SHA512=y 233CONFIG_CRYPTO_SHA512=y
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index 50d82c8a037..b3c083de17a 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -553,9 +553,7 @@ static inline int cpu_has_feature(unsigned long feature)
553 & feature); 553 & feature);
554} 554}
555 555
556#ifdef CONFIG_HAVE_HW_BREAKPOINT
557#define HBP_NUM 1 556#define HBP_NUM 1
558#endif /* CONFIG_HAVE_HW_BREAKPOINT */
559 557
560#endif /* !__ASSEMBLY__ */ 558#endif /* !__ASSEMBLY__ */
561 559
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
index 50ea12fd7bf..a8bf5c673a3 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -33,6 +33,7 @@
33#include <asm/kvm_asm.h> 33#include <asm/kvm_asm.h>
34#include <asm/processor.h> 34#include <asm/processor.h>
35#include <asm/page.h> 35#include <asm/page.h>
36#include <asm/cacheflush.h>
36 37
37#define KVM_MAX_VCPUS NR_CPUS 38#define KVM_MAX_VCPUS NR_CPUS
38#define KVM_MAX_VCORES NR_CPUS 39#define KVM_MAX_VCORES NR_CPUS
diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h
index 0124937a23b..e006f0bdea9 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -219,4 +219,16 @@ void kvmppc_claim_lpid(long lpid);
219void kvmppc_free_lpid(long lpid); 219void kvmppc_free_lpid(long lpid);
220void kvmppc_init_lpid(unsigned long nr_lpids); 220void kvmppc_init_lpid(unsigned long nr_lpids);
221 221
222static inline void kvmppc_mmu_flush_icache(pfn_t pfn)
223{
224 /* Clear i-cache for new pages */
225 struct page *page;
226 page = pfn_to_page(pfn);
227 if (!test_bit(PG_arch_1, &page->flags)) {
228 flush_dcache_icache_page(page);
229 set_bit(PG_arch_1, &page->flags);
230 }
231}
232
233
222#endif /* __POWERPC_KVM_PPC_H__ */ 234#endif /* __POWERPC_KVM_PPC_H__ */
diff --git a/arch/powerpc/include/asm/mpic_msgr.h b/arch/powerpc/include/asm/mpic_msgr.h
index 326d33ca55c..d4f471fb103 100644
--- a/arch/powerpc/include/asm/mpic_msgr.h
+++ b/arch/powerpc/include/asm/mpic_msgr.h
@@ -14,6 +14,7 @@
14#include <linux/types.h> 14#include <linux/types.h>
15#include <linux/spinlock.h> 15#include <linux/spinlock.h>
16#include <asm/smp.h> 16#include <asm/smp.h>
17#include <asm/io.h>
17 18
18struct mpic_msgr { 19struct mpic_msgr {
19 u32 __iomem *base; 20 u32 __iomem *base;
diff --git a/arch/powerpc/kernel/dma-iommu.c b/arch/powerpc/kernel/dma-iommu.c
index 2d7bb8ced13..e4897523de4 100644
--- a/arch/powerpc/kernel/dma-iommu.c
+++ b/arch/powerpc/kernel/dma-iommu.c
@@ -83,11 +83,10 @@ static int dma_iommu_dma_supported(struct device *dev, u64 mask)
83 return 0; 83 return 0;
84 } 84 }
85 85
86 if ((tbl->it_offset + tbl->it_size) > (mask >> IOMMU_PAGE_SHIFT)) { 86 if (tbl->it_offset > (mask >> IOMMU_PAGE_SHIFT)) {
87 dev_info(dev, "Warning: IOMMU window too big for device mask\n"); 87 dev_info(dev, "Warning: IOMMU offset too big for device mask\n");
88 dev_info(dev, "mask: 0x%08llx, table end: 0x%08lx\n", 88 dev_info(dev, "mask: 0x%08llx, table offset: 0x%08lx\n",
89 mask, (tbl->it_offset + tbl->it_size) << 89 mask, tbl->it_offset << IOMMU_PAGE_SHIFT);
90 IOMMU_PAGE_SHIFT);
91 return 0; 90 return 0;
92 } else 91 } else
93 return 1; 92 return 1;
diff --git a/arch/powerpc/kernel/hw_breakpoint.c b/arch/powerpc/kernel/hw_breakpoint.c
index f3a82dde61d..956a4c496de 100644
--- a/arch/powerpc/kernel/hw_breakpoint.c
+++ b/arch/powerpc/kernel/hw_breakpoint.c
@@ -253,7 +253,7 @@ int __kprobes hw_breakpoint_handler(struct die_args *args)
253 253
254 /* Do not emulate user-space instructions, instead single-step them */ 254 /* Do not emulate user-space instructions, instead single-step them */
255 if (user_mode(regs)) { 255 if (user_mode(regs)) {
256 bp->ctx->task->thread.last_hit_ubp = bp; 256 current->thread.last_hit_ubp = bp;
257 regs->msr |= MSR_SE; 257 regs->msr |= MSR_SE;
258 goto out; 258 goto out;
259 } 259 }
diff --git a/arch/powerpc/kernel/kgdb.c b/arch/powerpc/kernel/kgdb.c
index 782bd0a3c2f..c470a40b29f 100644
--- a/arch/powerpc/kernel/kgdb.c
+++ b/arch/powerpc/kernel/kgdb.c
@@ -25,6 +25,7 @@
25#include <asm/processor.h> 25#include <asm/processor.h>
26#include <asm/machdep.h> 26#include <asm/machdep.h>
27#include <asm/debug.h> 27#include <asm/debug.h>
28#include <linux/slab.h>
28 29
29/* 30/*
30 * This table contains the mapping between PowerPC hardware trap types, and 31 * This table contains the mapping between PowerPC hardware trap types, and
@@ -101,6 +102,21 @@ static int computeSignal(unsigned int tt)
101 return SIGHUP; /* default for things we don't know about */ 102 return SIGHUP; /* default for things we don't know about */
102} 103}
103 104
105/**
106 *
107 * kgdb_skipexception - Bail out of KGDB when we've been triggered.
108 * @exception: Exception vector number
109 * @regs: Current &struct pt_regs.
110 *
111 * On some architectures we need to skip a breakpoint exception when
112 * it occurs after a breakpoint has been removed.
113 *
114 */
115int kgdb_skipexception(int exception, struct pt_regs *regs)
116{
117 return kgdb_isremovedbreak(regs->nip);
118}
119
104static int kgdb_call_nmi_hook(struct pt_regs *regs) 120static int kgdb_call_nmi_hook(struct pt_regs *regs)
105{ 121{
106 kgdb_nmicallback(raw_smp_processor_id(), regs); 122 kgdb_nmicallback(raw_smp_processor_id(), regs);
@@ -138,6 +154,8 @@ static int kgdb_handle_breakpoint(struct pt_regs *regs)
138static int kgdb_singlestep(struct pt_regs *regs) 154static int kgdb_singlestep(struct pt_regs *regs)
139{ 155{
140 struct thread_info *thread_info, *exception_thread_info; 156 struct thread_info *thread_info, *exception_thread_info;
157 struct thread_info *backup_current_thread_info = \
158 (struct thread_info *)kmalloc(sizeof(struct thread_info), GFP_KERNEL);
141 159
142 if (user_mode(regs)) 160 if (user_mode(regs))
143 return 0; 161 return 0;
@@ -155,13 +173,17 @@ static int kgdb_singlestep(struct pt_regs *regs)
155 thread_info = (struct thread_info *)(regs->gpr[1] & ~(THREAD_SIZE-1)); 173 thread_info = (struct thread_info *)(regs->gpr[1] & ~(THREAD_SIZE-1));
156 exception_thread_info = current_thread_info(); 174 exception_thread_info = current_thread_info();
157 175
158 if (thread_info != exception_thread_info) 176 if (thread_info != exception_thread_info) {
177 /* Save the original current_thread_info. */
178 memcpy(backup_current_thread_info, exception_thread_info, sizeof *thread_info);
159 memcpy(exception_thread_info, thread_info, sizeof *thread_info); 179 memcpy(exception_thread_info, thread_info, sizeof *thread_info);
180 }
160 181
161 kgdb_handle_exception(0, SIGTRAP, 0, regs); 182 kgdb_handle_exception(0, SIGTRAP, 0, regs);
162 183
163 if (thread_info != exception_thread_info) 184 if (thread_info != exception_thread_info)
164 memcpy(thread_info, exception_thread_info, sizeof *thread_info); 185 /* Restore current_thread_info lastly. */
186 memcpy(exception_thread_info, backup_current_thread_info, sizeof *thread_info);
165 187
166 return 1; 188 return 1;
167} 189}
@@ -410,7 +432,6 @@ int kgdb_arch_handle_exception(int vector, int signo, int err_code,
410#else 432#else
411 linux_regs->msr |= MSR_SE; 433 linux_regs->msr |= MSR_SE;
412#endif 434#endif
413 kgdb_single_step = 1;
414 atomic_set(&kgdb_cpu_doing_single_step, 435 atomic_set(&kgdb_cpu_doing_single_step,
415 raw_smp_processor_id()); 436 raw_smp_processor_id());
416 } 437 }
diff --git a/arch/powerpc/kernel/syscalls.c b/arch/powerpc/kernel/syscalls.c
index f2496f2faec..4e3cc47f26b 100644
--- a/arch/powerpc/kernel/syscalls.c
+++ b/arch/powerpc/kernel/syscalls.c
@@ -107,11 +107,11 @@ long ppc64_personality(unsigned long personality)
107 long ret; 107 long ret;
108 108
109 if (personality(current->personality) == PER_LINUX32 109 if (personality(current->personality) == PER_LINUX32
110 && personality == PER_LINUX) 110 && personality(personality) == PER_LINUX)
111 personality = PER_LINUX32; 111 personality = (personality & ~PER_MASK) | PER_LINUX32;
112 ret = sys_personality(personality); 112 ret = sys_personality(personality);
113 if (ret == PER_LINUX32) 113 if (personality(ret) == PER_LINUX32)
114 ret = PER_LINUX; 114 ret = (ret & ~PER_MASK) | PER_LINUX;
115 return ret; 115 return ret;
116} 116}
117#endif 117#endif
diff --git a/arch/powerpc/kvm/book3s_32_mmu_host.c b/arch/powerpc/kvm/book3s_32_mmu_host.c
index f922c29bb23..837f13e7b6b 100644
--- a/arch/powerpc/kvm/book3s_32_mmu_host.c
+++ b/arch/powerpc/kvm/book3s_32_mmu_host.c
@@ -211,6 +211,9 @@ next_pteg:
211 pteg1 |= PP_RWRX; 211 pteg1 |= PP_RWRX;
212 } 212 }
213 213
214 if (orig_pte->may_execute)
215 kvmppc_mmu_flush_icache(hpaddr >> PAGE_SHIFT);
216
214 local_irq_disable(); 217 local_irq_disable();
215 218
216 if (pteg[rr]) { 219 if (pteg[rr]) {
diff --git a/arch/powerpc/kvm/book3s_64_mmu_host.c b/arch/powerpc/kvm/book3s_64_mmu_host.c
index 10fc8ec9d2a..0688b6b3958 100644
--- a/arch/powerpc/kvm/book3s_64_mmu_host.c
+++ b/arch/powerpc/kvm/book3s_64_mmu_host.c
@@ -126,6 +126,8 @@ int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *orig_pte)
126 126
127 if (!orig_pte->may_execute) 127 if (!orig_pte->may_execute)
128 rflags |= HPTE_R_N; 128 rflags |= HPTE_R_N;
129 else
130 kvmppc_mmu_flush_icache(hpaddr >> PAGE_SHIFT);
129 131
130 hash = hpt_hash(va, PTE_SIZE, MMU_SEGSIZE_256M); 132 hash = hpt_hash(va, PTE_SIZE, MMU_SEGSIZE_256M);
131 133
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 5a84c8d3d04..44b72feaff7 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -1421,13 +1421,13 @@ _GLOBAL(kvmppc_h_cede)
1421 sync /* order setting ceded vs. testing prodded */ 1421 sync /* order setting ceded vs. testing prodded */
1422 lbz r5,VCPU_PRODDED(r3) 1422 lbz r5,VCPU_PRODDED(r3)
1423 cmpwi r5,0 1423 cmpwi r5,0
1424 bne 1f 1424 bne kvm_cede_prodded
1425 li r0,0 /* set trap to 0 to say hcall is handled */ 1425 li r0,0 /* set trap to 0 to say hcall is handled */
1426 stw r0,VCPU_TRAP(r3) 1426 stw r0,VCPU_TRAP(r3)
1427 li r0,H_SUCCESS 1427 li r0,H_SUCCESS
1428 std r0,VCPU_GPR(R3)(r3) 1428 std r0,VCPU_GPR(R3)(r3)
1429BEGIN_FTR_SECTION 1429BEGIN_FTR_SECTION
1430 b 2f /* just send it up to host on 970 */ 1430 b kvm_cede_exit /* just send it up to host on 970 */
1431END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_206) 1431END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_206)
1432 1432
1433 /* 1433 /*
@@ -1446,7 +1446,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_206)
1446 or r4,r4,r0 1446 or r4,r4,r0
1447 PPC_POPCNTW(R7,R4) 1447 PPC_POPCNTW(R7,R4)
1448 cmpw r7,r8 1448 cmpw r7,r8
1449 bge 2f 1449 bge kvm_cede_exit
1450 stwcx. r4,0,r6 1450 stwcx. r4,0,r6
1451 bne 31b 1451 bne 31b
1452 li r0,1 1452 li r0,1
@@ -1555,7 +1555,8 @@ kvm_end_cede:
1555 b hcall_real_fallback 1555 b hcall_real_fallback
1556 1556
1557 /* cede when already previously prodded case */ 1557 /* cede when already previously prodded case */
15581: li r0,0 1558kvm_cede_prodded:
1559 li r0,0
1559 stb r0,VCPU_PRODDED(r3) 1560 stb r0,VCPU_PRODDED(r3)
1560 sync /* order testing prodded vs. clearing ceded */ 1561 sync /* order testing prodded vs. clearing ceded */
1561 stb r0,VCPU_CEDED(r3) 1562 stb r0,VCPU_CEDED(r3)
@@ -1563,7 +1564,8 @@ kvm_end_cede:
1563 blr 1564 blr
1564 1565
1565 /* we've ceded but we want to give control to the host */ 1566 /* we've ceded but we want to give control to the host */
15662: li r3,H_TOO_HARD 1567kvm_cede_exit:
1568 li r3,H_TOO_HARD
1567 blr 1569 blr
1568 1570
1569secondary_too_late: 1571secondary_too_late:
diff --git a/arch/powerpc/kvm/e500_tlb.c b/arch/powerpc/kvm/e500_tlb.c
index c510fc96130..a2b66717813 100644
--- a/arch/powerpc/kvm/e500_tlb.c
+++ b/arch/powerpc/kvm/e500_tlb.c
@@ -322,11 +322,11 @@ static inline void kvmppc_e500_ref_release(struct tlbe_ref *ref)
322static void clear_tlb1_bitmap(struct kvmppc_vcpu_e500 *vcpu_e500) 322static void clear_tlb1_bitmap(struct kvmppc_vcpu_e500 *vcpu_e500)
323{ 323{
324 if (vcpu_e500->g2h_tlb1_map) 324 if (vcpu_e500->g2h_tlb1_map)
325 memset(vcpu_e500->g2h_tlb1_map, 325 memset(vcpu_e500->g2h_tlb1_map, 0,
326 sizeof(u64) * vcpu_e500->gtlb_params[1].entries, 0); 326 sizeof(u64) * vcpu_e500->gtlb_params[1].entries);
327 if (vcpu_e500->h2g_tlb1_rmap) 327 if (vcpu_e500->h2g_tlb1_rmap)
328 memset(vcpu_e500->h2g_tlb1_rmap, 328 memset(vcpu_e500->h2g_tlb1_rmap, 0,
329 sizeof(unsigned int) * host_tlb_params[1].entries, 0); 329 sizeof(unsigned int) * host_tlb_params[1].entries);
330} 330}
331 331
332static void clear_tlb_privs(struct kvmppc_vcpu_e500 *vcpu_e500) 332static void clear_tlb_privs(struct kvmppc_vcpu_e500 *vcpu_e500)
@@ -539,6 +539,9 @@ static inline void kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
539 539
540 kvmppc_e500_setup_stlbe(&vcpu_e500->vcpu, gtlbe, tsize, 540 kvmppc_e500_setup_stlbe(&vcpu_e500->vcpu, gtlbe, tsize,
541 ref, gvaddr, stlbe); 541 ref, gvaddr, stlbe);
542
543 /* Clear i-cache for new pages */
544 kvmppc_mmu_flush_icache(pfn);
542} 545}
543 546
544/* XXX only map the one-one case, for now use TLB0 */ 547/* XXX only map the one-one case, for now use TLB0 */
diff --git a/arch/powerpc/lib/copyuser_power7.S b/arch/powerpc/lib/copyuser_power7.S
index f9ede7c6606..0d24ff15f5f 100644
--- a/arch/powerpc/lib/copyuser_power7.S
+++ b/arch/powerpc/lib/copyuser_power7.S
@@ -288,7 +288,7 @@ err1; stb r0,0(r3)
288 std r0,16(r1) 288 std r0,16(r1)
289 stdu r1,-STACKFRAMESIZE(r1) 289 stdu r1,-STACKFRAMESIZE(r1)
290 bl .enter_vmx_usercopy 290 bl .enter_vmx_usercopy
291 cmpwi r3,0 291 cmpwi cr1,r3,0
292 ld r0,STACKFRAMESIZE+16(r1) 292 ld r0,STACKFRAMESIZE+16(r1)
293 ld r3,STACKFRAMESIZE+48(r1) 293 ld r3,STACKFRAMESIZE+48(r1)
294 ld r4,STACKFRAMESIZE+56(r1) 294 ld r4,STACKFRAMESIZE+56(r1)
@@ -326,38 +326,7 @@ err1; stb r0,0(r3)
326 dcbt r0,r8,0b01010 /* GO */ 326 dcbt r0,r8,0b01010 /* GO */
327.machine pop 327.machine pop
328 328
329 /* 329 beq cr1,.Lunwind_stack_nonvmx_copy
330 * We prefetch both the source and destination using enhanced touch
331 * instructions. We use a stream ID of 0 for the load side and
332 * 1 for the store side.
333 */
334 clrrdi r6,r4,7
335 clrrdi r9,r3,7
336 ori r9,r9,1 /* stream=1 */
337
338 srdi r7,r5,7 /* length in cachelines, capped at 0x3FF */
339 cmpldi cr1,r7,0x3FF
340 ble cr1,1f
341 li r7,0x3FF
3421: lis r0,0x0E00 /* depth=7 */
343 sldi r7,r7,7
344 or r7,r7,r0
345 ori r10,r7,1 /* stream=1 */
346
347 lis r8,0x8000 /* GO=1 */
348 clrldi r8,r8,32
349
350.machine push
351.machine "power4"
352 dcbt r0,r6,0b01000
353 dcbt r0,r7,0b01010
354 dcbtst r0,r9,0b01000
355 dcbtst r0,r10,0b01010
356 eieio
357 dcbt r0,r8,0b01010 /* GO */
358.machine pop
359
360 beq .Lunwind_stack_nonvmx_copy
361 330
362 /* 331 /*
363 * If source and destination are not relatively aligned we use a 332 * If source and destination are not relatively aligned we use a
diff --git a/arch/powerpc/lib/memcpy_power7.S b/arch/powerpc/lib/memcpy_power7.S
index 0efdc51bc71..7ba6c96de77 100644
--- a/arch/powerpc/lib/memcpy_power7.S
+++ b/arch/powerpc/lib/memcpy_power7.S
@@ -222,7 +222,7 @@ _GLOBAL(memcpy_power7)
222 std r0,16(r1) 222 std r0,16(r1)
223 stdu r1,-STACKFRAMESIZE(r1) 223 stdu r1,-STACKFRAMESIZE(r1)
224 bl .enter_vmx_copy 224 bl .enter_vmx_copy
225 cmpwi r3,0 225 cmpwi cr1,r3,0
226 ld r0,STACKFRAMESIZE+16(r1) 226 ld r0,STACKFRAMESIZE+16(r1)
227 ld r3,STACKFRAMESIZE+48(r1) 227 ld r3,STACKFRAMESIZE+48(r1)
228 ld r4,STACKFRAMESIZE+56(r1) 228 ld r4,STACKFRAMESIZE+56(r1)
@@ -260,7 +260,7 @@ _GLOBAL(memcpy_power7)
260 dcbt r0,r8,0b01010 /* GO */ 260 dcbt r0,r8,0b01010 /* GO */
261.machine pop 261.machine pop
262 262
263 beq .Lunwind_stack_nonvmx_copy 263 beq cr1,.Lunwind_stack_nonvmx_copy
264 264
265 /* 265 /*
266 * If source and destination are not relatively aligned we use a 266 * If source and destination are not relatively aligned we use a
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index baaafde7d13..fbdad0e3929 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -469,6 +469,7 @@ void flush_dcache_icache_page(struct page *page)
469 __flush_dcache_icache_phys(page_to_pfn(page) << PAGE_SHIFT); 469 __flush_dcache_icache_phys(page_to_pfn(page) << PAGE_SHIFT);
470#endif 470#endif
471} 471}
472EXPORT_SYMBOL(flush_dcache_icache_page);
472 473
473void clear_user_page(void *page, unsigned long vaddr, struct page *pg) 474void clear_user_page(void *page, unsigned long vaddr, struct page *pg)
474{ 475{
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 77b49ddda9d..7cd2dbd6e4c 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -1431,7 +1431,7 @@ static void perf_event_interrupt(struct pt_regs *regs)
1431 if (!event->hw.idx || is_limited_pmc(event->hw.idx)) 1431 if (!event->hw.idx || is_limited_pmc(event->hw.idx))
1432 continue; 1432 continue;
1433 val = read_pmc(event->hw.idx); 1433 val = read_pmc(event->hw.idx);
1434 if ((int)val < 0) { 1434 if (pmc_overflow(val)) {
1435 /* event has overflowed */ 1435 /* event has overflowed */
1436 found = 1; 1436 found = 1;
1437 record_and_restart(event, val, regs); 1437 record_and_restart(event, val, regs);
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index a7b2a600d0a..c37f4613632 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -465,7 +465,7 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
465 iounmap(hose->cfg_data); 465 iounmap(hose->cfg_data);
466 iounmap(hose->cfg_addr); 466 iounmap(hose->cfg_addr);
467 pcibios_free_controller(hose); 467 pcibios_free_controller(hose);
468 return 0; 468 return -ENODEV;
469 } 469 }
470 470
471 setup_pci_cmd(hose); 471 setup_pci_cmd(hose);
@@ -827,6 +827,7 @@ struct device_node *fsl_pci_primary;
827 827
828void __devinit fsl_pci_init(void) 828void __devinit fsl_pci_init(void)
829{ 829{
830 int ret;
830 struct device_node *node; 831 struct device_node *node;
831 struct pci_controller *hose; 832 struct pci_controller *hose;
832 dma_addr_t max = 0xffffffff; 833 dma_addr_t max = 0xffffffff;
@@ -855,10 +856,12 @@ void __devinit fsl_pci_init(void)
855 if (!fsl_pci_primary) 856 if (!fsl_pci_primary)
856 fsl_pci_primary = node; 857 fsl_pci_primary = node;
857 858
858 fsl_add_bridge(node, fsl_pci_primary == node); 859 ret = fsl_add_bridge(node, fsl_pci_primary == node);
859 hose = pci_find_hose_for_OF_device(node); 860 if (ret == 0) {
860 max = min(max, hose->dma_window_base_cur + 861 hose = pci_find_hose_for_OF_device(node);
861 hose->dma_window_size); 862 max = min(max, hose->dma_window_base_cur +
863 hose->dma_window_size);
864 }
862 } 865 }
863 } 866 }
864 867
diff --git a/arch/powerpc/sysdev/mpic_msgr.c b/arch/powerpc/sysdev/mpic_msgr.c
index 483d8fa72e8..e961f8c4a8f 100644
--- a/arch/powerpc/sysdev/mpic_msgr.c
+++ b/arch/powerpc/sysdev/mpic_msgr.c
@@ -14,6 +14,9 @@
14#include <linux/list.h> 14#include <linux/list.h>
15#include <linux/of_platform.h> 15#include <linux/of_platform.h>
16#include <linux/errno.h> 16#include <linux/errno.h>
17#include <linux/err.h>
18#include <linux/export.h>
19#include <linux/slab.h>
17#include <asm/prom.h> 20#include <asm/prom.h>
18#include <asm/hw_irq.h> 21#include <asm/hw_irq.h>
19#include <asm/ppc-pci.h> 22#include <asm/ppc-pci.h>
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index eab3492a45c..9b49c65ee7a 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -17,6 +17,7 @@
17#include <linux/reboot.h> 17#include <linux/reboot.h>
18#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/kallsyms.h> 19#include <linux/kallsyms.h>
20#include <linux/kmsg_dump.h>
20#include <linux/cpumask.h> 21#include <linux/cpumask.h>
21#include <linux/export.h> 22#include <linux/export.h>
22#include <linux/sysrq.h> 23#include <linux/sysrq.h>
@@ -894,13 +895,13 @@ cmds(struct pt_regs *excp)
894#endif 895#endif
895 default: 896 default:
896 printf("Unrecognized command: "); 897 printf("Unrecognized command: ");
897 do { 898 do {
898 if (' ' < cmd && cmd <= '~') 899 if (' ' < cmd && cmd <= '~')
899 putchar(cmd); 900 putchar(cmd);
900 else 901 else
901 printf("\\x%x", cmd); 902 printf("\\x%x", cmd);
902 cmd = inchar(); 903 cmd = inchar();
903 } while (cmd != '\n'); 904 } while (cmd != '\n');
904 printf(" (type ? for help)\n"); 905 printf(" (type ? for help)\n");
905 break; 906 break;
906 } 907 }
@@ -1097,7 +1098,7 @@ static long check_bp_loc(unsigned long addr)
1097 return 1; 1098 return 1;
1098} 1099}
1099 1100
1100static char *breakpoint_help_string = 1101static char *breakpoint_help_string =
1101 "Breakpoint command usage:\n" 1102 "Breakpoint command usage:\n"
1102 "b show breakpoints\n" 1103 "b show breakpoints\n"
1103 "b <addr> [cnt] set breakpoint at given instr addr\n" 1104 "b <addr> [cnt] set breakpoint at given instr addr\n"
@@ -1193,7 +1194,7 @@ bpt_cmds(void)
1193 1194
1194 default: 1195 default:
1195 termch = cmd; 1196 termch = cmd;
1196 cmd = skipbl(); 1197 cmd = skipbl();
1197 if (cmd == '?') { 1198 if (cmd == '?') {
1198 printf(breakpoint_help_string); 1199 printf(breakpoint_help_string);
1199 break; 1200 break;
@@ -1359,7 +1360,7 @@ static void xmon_show_stack(unsigned long sp, unsigned long lr,
1359 sp + REGS_OFFSET); 1360 sp + REGS_OFFSET);
1360 break; 1361 break;
1361 } 1362 }
1362 printf("--- Exception: %lx %s at ", regs.trap, 1363 printf("--- Exception: %lx %s at ", regs.trap,
1363 getvecname(TRAP(&regs))); 1364 getvecname(TRAP(&regs)));
1364 pc = regs.nip; 1365 pc = regs.nip;
1365 lr = regs.link; 1366 lr = regs.link;
@@ -1623,14 +1624,14 @@ static void super_regs(void)
1623 1624
1624 cmd = skipbl(); 1625 cmd = skipbl();
1625 if (cmd == '\n') { 1626 if (cmd == '\n') {
1626 unsigned long sp, toc; 1627 unsigned long sp, toc;
1627 asm("mr %0,1" : "=r" (sp) :); 1628 asm("mr %0,1" : "=r" (sp) :);
1628 asm("mr %0,2" : "=r" (toc) :); 1629 asm("mr %0,2" : "=r" (toc) :);
1629 1630
1630 printf("msr = "REG" sprg0= "REG"\n", 1631 printf("msr = "REG" sprg0= "REG"\n",
1631 mfmsr(), mfspr(SPRN_SPRG0)); 1632 mfmsr(), mfspr(SPRN_SPRG0));
1632 printf("pvr = "REG" sprg1= "REG"\n", 1633 printf("pvr = "REG" sprg1= "REG"\n",
1633 mfspr(SPRN_PVR), mfspr(SPRN_SPRG1)); 1634 mfspr(SPRN_PVR), mfspr(SPRN_SPRG1));
1634 printf("dec = "REG" sprg2= "REG"\n", 1635 printf("dec = "REG" sprg2= "REG"\n",
1635 mfspr(SPRN_DEC), mfspr(SPRN_SPRG2)); 1636 mfspr(SPRN_DEC), mfspr(SPRN_SPRG2));
1636 printf("sp = "REG" sprg3= "REG"\n", sp, mfspr(SPRN_SPRG3)); 1637 printf("sp = "REG" sprg3= "REG"\n", sp, mfspr(SPRN_SPRG3));
@@ -1783,7 +1784,7 @@ byterev(unsigned char *val, int size)
1783static int brev; 1784static int brev;
1784static int mnoread; 1785static int mnoread;
1785 1786
1786static char *memex_help_string = 1787static char *memex_help_string =
1787 "Memory examine command usage:\n" 1788 "Memory examine command usage:\n"
1788 "m [addr] [flags] examine/change memory\n" 1789 "m [addr] [flags] examine/change memory\n"
1789 " addr is optional. will start where left off.\n" 1790 " addr is optional. will start where left off.\n"
@@ -1798,7 +1799,7 @@ static char *memex_help_string =
1798 "NOTE: flags are saved as defaults\n" 1799 "NOTE: flags are saved as defaults\n"
1799 ""; 1800 "";
1800 1801
1801static char *memex_subcmd_help_string = 1802static char *memex_subcmd_help_string =
1802 "Memory examine subcommands:\n" 1803 "Memory examine subcommands:\n"
1803 " hexval write this val to current location\n" 1804 " hexval write this val to current location\n"
1804 " 'string' write chars from string to this location\n" 1805 " 'string' write chars from string to this location\n"
@@ -2064,7 +2065,7 @@ prdump(unsigned long adrs, long ndump)
2064 nr = mread(adrs, temp, r); 2065 nr = mread(adrs, temp, r);
2065 adrs += nr; 2066 adrs += nr;
2066 for (m = 0; m < r; ++m) { 2067 for (m = 0; m < r; ++m) {
2067 if ((m & (sizeof(long) - 1)) == 0 && m > 0) 2068 if ((m & (sizeof(long) - 1)) == 0 && m > 0)
2068 putchar(' '); 2069 putchar(' ');
2069 if (m < nr) 2070 if (m < nr)
2070 printf("%.2x", temp[m]); 2071 printf("%.2x", temp[m]);
@@ -2072,7 +2073,7 @@ prdump(unsigned long adrs, long ndump)
2072 printf("%s", fault_chars[fault_type]); 2073 printf("%s", fault_chars[fault_type]);
2073 } 2074 }
2074 for (; m < 16; ++m) { 2075 for (; m < 16; ++m) {
2075 if ((m & (sizeof(long) - 1)) == 0) 2076 if ((m & (sizeof(long) - 1)) == 0)
2076 putchar(' '); 2077 putchar(' ');
2077 printf(" "); 2078 printf(" ");
2078 } 2079 }
@@ -2148,45 +2149,28 @@ print_address(unsigned long addr)
2148void 2149void
2149dump_log_buf(void) 2150dump_log_buf(void)
2150{ 2151{
2151 const unsigned long size = 128; 2152 struct kmsg_dumper dumper = { .active = 1 };
2152 unsigned long end, addr; 2153 unsigned char buf[128];
2153 unsigned char buf[size + 1]; 2154 size_t len;
2154 2155
2155 addr = 0; 2156 if (setjmp(bus_error_jmp) != 0) {
2156 buf[size] = '\0'; 2157 printf("Error dumping printk buffer!\n");
2157 2158 return;
2158 if (setjmp(bus_error_jmp) != 0) { 2159 }
2159 printf("Unable to lookup symbol __log_buf!\n"); 2160
2160 return; 2161 catch_memory_errors = 1;
2161 } 2162 sync();
2162 2163
2163 catch_memory_errors = 1; 2164 kmsg_dump_rewind_nolock(&dumper);
2164 sync(); 2165 while (kmsg_dump_get_line_nolock(&dumper, false, buf, sizeof(buf), &len)) {
2165 addr = kallsyms_lookup_name("__log_buf"); 2166 buf[len] = '\0';
2166 2167 printf("%s", buf);
2167 if (! addr) 2168 }
2168 printf("Symbol __log_buf not found!\n"); 2169
2169 else { 2170 sync();
2170 end = addr + (1 << CONFIG_LOG_BUF_SHIFT); 2171 /* wait a little while to see if we get a machine check */
2171 while (addr < end) { 2172 __delay(200);
2172 if (! mread(addr, buf, size)) { 2173 catch_memory_errors = 0;
2173 printf("Can't read memory at address 0x%lx\n", addr);
2174 break;
2175 }
2176
2177 printf("%s", buf);
2178
2179 if (strlen(buf) < size)
2180 break;
2181
2182 addr += size;
2183 }
2184 }
2185
2186 sync();
2187 /* wait a little while to see if we get a machine check */
2188 __delay(200);
2189 catch_memory_errors = 0;
2190} 2174}
2191 2175
2192/* 2176/*
diff --git a/arch/s390/include/asm/elf.h b/arch/s390/include/asm/elf.h
index 32e8449640f..9b94a160fe7 100644
--- a/arch/s390/include/asm/elf.h
+++ b/arch/s390/include/asm/elf.h
@@ -180,7 +180,8 @@ extern char elf_platform[];
180#define ELF_PLATFORM (elf_platform) 180#define ELF_PLATFORM (elf_platform)
181 181
182#ifndef CONFIG_64BIT 182#ifndef CONFIG_64BIT
183#define SET_PERSONALITY(ex) set_personality(PER_LINUX) 183#define SET_PERSONALITY(ex) \
184 set_personality(PER_LINUX | (current->personality & (~PER_MASK)))
184#else /* CONFIG_64BIT */ 185#else /* CONFIG_64BIT */
185#define SET_PERSONALITY(ex) \ 186#define SET_PERSONALITY(ex) \
186do { \ 187do { \
diff --git a/arch/s390/include/asm/posix_types.h b/arch/s390/include/asm/posix_types.h
index 7bcc14e395f..bf2a2ad2f80 100644
--- a/arch/s390/include/asm/posix_types.h
+++ b/arch/s390/include/asm/posix_types.h
@@ -13,6 +13,7 @@
13 */ 13 */
14 14
15typedef unsigned long __kernel_size_t; 15typedef unsigned long __kernel_size_t;
16typedef long __kernel_ssize_t;
16#define __kernel_size_t __kernel_size_t 17#define __kernel_size_t __kernel_size_t
17 18
18typedef unsigned short __kernel_old_dev_t; 19typedef unsigned short __kernel_old_dev_t;
@@ -25,7 +26,6 @@ typedef unsigned short __kernel_mode_t;
25typedef unsigned short __kernel_ipc_pid_t; 26typedef unsigned short __kernel_ipc_pid_t;
26typedef unsigned short __kernel_uid_t; 27typedef unsigned short __kernel_uid_t;
27typedef unsigned short __kernel_gid_t; 28typedef unsigned short __kernel_gid_t;
28typedef int __kernel_ssize_t;
29typedef int __kernel_ptrdiff_t; 29typedef int __kernel_ptrdiff_t;
30 30
31#else /* __s390x__ */ 31#else /* __s390x__ */
@@ -35,7 +35,6 @@ typedef unsigned int __kernel_mode_t;
35typedef int __kernel_ipc_pid_t; 35typedef int __kernel_ipc_pid_t;
36typedef unsigned int __kernel_uid_t; 36typedef unsigned int __kernel_uid_t;
37typedef unsigned int __kernel_gid_t; 37typedef unsigned int __kernel_gid_t;
38typedef long __kernel_ssize_t;
39typedef long __kernel_ptrdiff_t; 38typedef long __kernel_ptrdiff_t;
40typedef unsigned long __kernel_sigset_t; /* at least 32 bits */ 39typedef unsigned long __kernel_sigset_t; /* at least 32 bits */
41 40
diff --git a/arch/s390/include/asm/smp.h b/arch/s390/include/asm/smp.h
index a0a8340daaf..ce26ac3cb16 100644
--- a/arch/s390/include/asm/smp.h
+++ b/arch/s390/include/asm/smp.h
@@ -44,6 +44,7 @@ static inline void smp_call_online_cpu(void (*func)(void *), void *data)
44} 44}
45 45
46static inline int smp_find_processor_id(int address) { return 0; } 46static inline int smp_find_processor_id(int address) { return 0; }
47static inline int smp_store_status(int cpu) { return 0; }
47static inline int smp_vcpu_scheduled(int cpu) { return 1; } 48static inline int smp_vcpu_scheduled(int cpu) { return 1; }
48static inline void smp_yield_cpu(int cpu) { } 49static inline void smp_yield_cpu(int cpu) { }
49static inline void smp_yield(void) { } 50static inline void smp_yield(void) { }
diff --git a/arch/x86/include/asm/spinlock.h b/arch/x86/include/asm/spinlock.h
index b315a33867f..33692eaabab 100644
--- a/arch/x86/include/asm/spinlock.h
+++ b/arch/x86/include/asm/spinlock.h
@@ -12,8 +12,7 @@
12 * Simple spin lock operations. There are two variants, one clears IRQ's 12 * Simple spin lock operations. There are two variants, one clears IRQ's
13 * on the local processor, one does not. 13 * on the local processor, one does not.
14 * 14 *
15 * These are fair FIFO ticket locks, which are currently limited to 256 15 * These are fair FIFO ticket locks, which support up to 2^16 CPUs.
16 * CPUs.
17 * 16 *
18 * (the type definitions are in asm/spinlock_types.h) 17 * (the type definitions are in asm/spinlock_types.h)
19 */ 18 */
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index afb7ff79a29..ced4534baed 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -165,7 +165,7 @@ static const unsigned char * const k7_nops[ASM_NOP_MAX+2] =
165#endif 165#endif
166 166
167#ifdef P6_NOP1 167#ifdef P6_NOP1
168static const unsigned char __initconst_or_module p6nops[] = 168static const unsigned char p6nops[] =
169{ 169{
170 P6_NOP1, 170 P6_NOP1,
171 P6_NOP2, 171 P6_NOP2,
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index 7ad683d7864..d44f7829968 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -270,7 +270,7 @@ void fixup_irqs(void)
270 270
271 if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) { 271 if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {
272 break_affinity = 1; 272 break_affinity = 1;
273 affinity = cpu_all_mask; 273 affinity = cpu_online_mask;
274 } 274 }
275 275
276 chip = irq_data_get_irq_chip(data); 276 chip = irq_data_get_irq_chip(data);
diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c
index 8a2ce8fd41c..82746f942cd 100644
--- a/arch/x86/kernel/microcode_amd.c
+++ b/arch/x86/kernel/microcode_amd.c
@@ -143,11 +143,12 @@ static int get_matching_microcode(int cpu, const u8 *ucode_ptr,
143 unsigned int *current_size) 143 unsigned int *current_size)
144{ 144{
145 struct microcode_header_amd *mc_hdr; 145 struct microcode_header_amd *mc_hdr;
146 unsigned int actual_size; 146 unsigned int actual_size, patch_size;
147 u16 equiv_cpu_id; 147 u16 equiv_cpu_id;
148 148
149 /* size of the current patch we're staring at */ 149 /* size of the current patch we're staring at */
150 *current_size = *(u32 *)(ucode_ptr + 4) + SECTION_HDR_SIZE; 150 patch_size = *(u32 *)(ucode_ptr + 4);
151 *current_size = patch_size + SECTION_HDR_SIZE;
151 152
152 equiv_cpu_id = find_equiv_id(); 153 equiv_cpu_id = find_equiv_id();
153 if (!equiv_cpu_id) 154 if (!equiv_cpu_id)
@@ -174,7 +175,7 @@ static int get_matching_microcode(int cpu, const u8 *ucode_ptr,
174 /* 175 /*
175 * now that the header looks sane, verify its size 176 * now that the header looks sane, verify its size
176 */ 177 */
177 actual_size = verify_ucode_size(cpu, *current_size, leftover_size); 178 actual_size = verify_ucode_size(cpu, patch_size, leftover_size);
178 if (!actual_size) 179 if (!actual_size)
179 return 0; 180 return 0;
180 181
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 97d9a9914ba..a3b57a27be8 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -475,13 +475,26 @@ register_address(struct x86_emulate_ctxt *ctxt, unsigned long reg)
475 return address_mask(ctxt, reg); 475 return address_mask(ctxt, reg);
476} 476}
477 477
478static void masked_increment(ulong *reg, ulong mask, int inc)
479{
480 assign_masked(reg, *reg + inc, mask);
481}
482
478static inline void 483static inline void
479register_address_increment(struct x86_emulate_ctxt *ctxt, unsigned long *reg, int inc) 484register_address_increment(struct x86_emulate_ctxt *ctxt, unsigned long *reg, int inc)
480{ 485{
486 ulong mask;
487
481 if (ctxt->ad_bytes == sizeof(unsigned long)) 488 if (ctxt->ad_bytes == sizeof(unsigned long))
482 *reg += inc; 489 mask = ~0UL;
483 else 490 else
484 *reg = (*reg & ~ad_mask(ctxt)) | ((*reg + inc) & ad_mask(ctxt)); 491 mask = ad_mask(ctxt);
492 masked_increment(reg, mask, inc);
493}
494
495static void rsp_increment(struct x86_emulate_ctxt *ctxt, int inc)
496{
497 masked_increment(&ctxt->regs[VCPU_REGS_RSP], stack_mask(ctxt), inc);
485} 498}
486 499
487static inline void jmp_rel(struct x86_emulate_ctxt *ctxt, int rel) 500static inline void jmp_rel(struct x86_emulate_ctxt *ctxt, int rel)
@@ -1522,8 +1535,8 @@ static int push(struct x86_emulate_ctxt *ctxt, void *data, int bytes)
1522{ 1535{
1523 struct segmented_address addr; 1536 struct segmented_address addr;
1524 1537
1525 register_address_increment(ctxt, &ctxt->regs[VCPU_REGS_RSP], -bytes); 1538 rsp_increment(ctxt, -bytes);
1526 addr.ea = register_address(ctxt, ctxt->regs[VCPU_REGS_RSP]); 1539 addr.ea = ctxt->regs[VCPU_REGS_RSP] & stack_mask(ctxt);
1527 addr.seg = VCPU_SREG_SS; 1540 addr.seg = VCPU_SREG_SS;
1528 1541
1529 return segmented_write(ctxt, addr, data, bytes); 1542 return segmented_write(ctxt, addr, data, bytes);
@@ -1542,13 +1555,13 @@ static int emulate_pop(struct x86_emulate_ctxt *ctxt,
1542 int rc; 1555 int rc;
1543 struct segmented_address addr; 1556 struct segmented_address addr;
1544 1557
1545 addr.ea = register_address(ctxt, ctxt->regs[VCPU_REGS_RSP]); 1558 addr.ea = ctxt->regs[VCPU_REGS_RSP] & stack_mask(ctxt);
1546 addr.seg = VCPU_SREG_SS; 1559 addr.seg = VCPU_SREG_SS;
1547 rc = segmented_read(ctxt, addr, dest, len); 1560 rc = segmented_read(ctxt, addr, dest, len);
1548 if (rc != X86EMUL_CONTINUE) 1561 if (rc != X86EMUL_CONTINUE)
1549 return rc; 1562 return rc;
1550 1563
1551 register_address_increment(ctxt, &ctxt->regs[VCPU_REGS_RSP], len); 1564 rsp_increment(ctxt, len);
1552 return rc; 1565 return rc;
1553} 1566}
1554 1567
@@ -1688,8 +1701,7 @@ static int em_popa(struct x86_emulate_ctxt *ctxt)
1688 1701
1689 while (reg >= VCPU_REGS_RAX) { 1702 while (reg >= VCPU_REGS_RAX) {
1690 if (reg == VCPU_REGS_RSP) { 1703 if (reg == VCPU_REGS_RSP) {
1691 register_address_increment(ctxt, &ctxt->regs[VCPU_REGS_RSP], 1704 rsp_increment(ctxt, ctxt->op_bytes);
1692 ctxt->op_bytes);
1693 --reg; 1705 --reg;
1694 } 1706 }
1695 1707
@@ -2825,7 +2837,7 @@ static int em_ret_near_imm(struct x86_emulate_ctxt *ctxt)
2825 rc = emulate_pop(ctxt, &ctxt->dst.val, ctxt->op_bytes); 2837 rc = emulate_pop(ctxt, &ctxt->dst.val, ctxt->op_bytes);
2826 if (rc != X86EMUL_CONTINUE) 2838 if (rc != X86EMUL_CONTINUE)
2827 return rc; 2839 return rc;
2828 register_address_increment(ctxt, &ctxt->regs[VCPU_REGS_RSP], ctxt->src.val); 2840 rsp_increment(ctxt, ctxt->src.val);
2829 return X86EMUL_CONTINUE; 2841 return X86EMUL_CONTINUE;
2830} 2842}
2831 2843
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index 01ca0042393..7fbd0d273ea 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -4113,16 +4113,21 @@ static int mmu_shrink(struct shrinker *shrink, struct shrink_control *sc)
4113 LIST_HEAD(invalid_list); 4113 LIST_HEAD(invalid_list);
4114 4114
4115 /* 4115 /*
4116 * Never scan more than sc->nr_to_scan VM instances.
4117 * Will not hit this condition practically since we do not try
4118 * to shrink more than one VM and it is very unlikely to see
4119 * !n_used_mmu_pages so many times.
4120 */
4121 if (!nr_to_scan--)
4122 break;
4123 /*
4116 * n_used_mmu_pages is accessed without holding kvm->mmu_lock 4124 * n_used_mmu_pages is accessed without holding kvm->mmu_lock
4117 * here. We may skip a VM instance errorneosly, but we do not 4125 * here. We may skip a VM instance errorneosly, but we do not
4118 * want to shrink a VM that only started to populate its MMU 4126 * want to shrink a VM that only started to populate its MMU
4119 * anyway. 4127 * anyway.
4120 */ 4128 */
4121 if (kvm->arch.n_used_mmu_pages > 0) { 4129 if (!kvm->arch.n_used_mmu_pages)
4122 if (!nr_to_scan--)
4123 break;
4124 continue; 4130 continue;
4125 }
4126 4131
4127 idx = srcu_read_lock(&kvm->srcu); 4132 idx = srcu_read_lock(&kvm->srcu);
4128 spin_lock(&kvm->mmu_lock); 4133 spin_lock(&kvm->mmu_lock);
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 42bce48f692..148ed666e31 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -806,7 +806,7 @@ EXPORT_SYMBOL_GPL(kvm_rdpmc);
806 * kvm-specific. Those are put in the beginning of the list. 806 * kvm-specific. Those are put in the beginning of the list.
807 */ 807 */
808 808
809#define KVM_SAVE_MSRS_BEGIN 9 809#define KVM_SAVE_MSRS_BEGIN 10
810static u32 msrs_to_save[] = { 810static u32 msrs_to_save[] = {
811 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK, 811 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
812 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW, 812 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
@@ -2000,6 +2000,9 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2000 case MSR_KVM_STEAL_TIME: 2000 case MSR_KVM_STEAL_TIME:
2001 data = vcpu->arch.st.msr_val; 2001 data = vcpu->arch.st.msr_val;
2002 break; 2002 break;
2003 case MSR_KVM_PV_EOI_EN:
2004 data = vcpu->arch.pv_eoi.msr_val;
2005 break;
2003 case MSR_IA32_P5_MC_ADDR: 2006 case MSR_IA32_P5_MC_ADDR:
2004 case MSR_IA32_P5_MC_TYPE: 2007 case MSR_IA32_P5_MC_TYPE:
2005 case MSR_IA32_MCG_CAP: 2008 case MSR_IA32_MCG_CAP:
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index bf4bda6d3e9..9642d4a3860 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -31,7 +31,6 @@
31#include <linux/pci.h> 31#include <linux/pci.h>
32#include <linux/gfp.h> 32#include <linux/gfp.h>
33#include <linux/memblock.h> 33#include <linux/memblock.h>
34#include <linux/syscore_ops.h>
35 34
36#include <xen/xen.h> 35#include <xen/xen.h>
37#include <xen/interface/xen.h> 36#include <xen/interface/xen.h>
@@ -1470,130 +1469,38 @@ asmlinkage void __init xen_start_kernel(void)
1470#endif 1469#endif
1471} 1470}
1472 1471
1473#ifdef CONFIG_XEN_PVHVM 1472void __ref xen_hvm_init_shared_info(void)
1474/*
1475 * The pfn containing the shared_info is located somewhere in RAM. This
1476 * will cause trouble if the current kernel is doing a kexec boot into a
1477 * new kernel. The new kernel (and its startup code) can not know where
1478 * the pfn is, so it can not reserve the page. The hypervisor will
1479 * continue to update the pfn, and as a result memory corruption occours
1480 * in the new kernel.
1481 *
1482 * One way to work around this issue is to allocate a page in the
1483 * xen-platform pci device's BAR memory range. But pci init is done very
1484 * late and the shared_info page is already in use very early to read
1485 * the pvclock. So moving the pfn from RAM to MMIO is racy because some
1486 * code paths on other vcpus could access the pfn during the small
1487 * window when the old pfn is moved to the new pfn. There is even a
1488 * small window were the old pfn is not backed by a mfn, and during that
1489 * time all reads return -1.
1490 *
1491 * Because it is not known upfront where the MMIO region is located it
1492 * can not be used right from the start in xen_hvm_init_shared_info.
1493 *
1494 * To minimise trouble the move of the pfn is done shortly before kexec.
1495 * This does not eliminate the race because all vcpus are still online
1496 * when the syscore_ops will be called. But hopefully there is no work
1497 * pending at this point in time. Also the syscore_op is run last which
1498 * reduces the risk further.
1499 */
1500
1501static struct shared_info *xen_hvm_shared_info;
1502
1503static void xen_hvm_connect_shared_info(unsigned long pfn)
1504{ 1473{
1474 int cpu;
1505 struct xen_add_to_physmap xatp; 1475 struct xen_add_to_physmap xatp;
1476 static struct shared_info *shared_info_page = 0;
1506 1477
1478 if (!shared_info_page)
1479 shared_info_page = (struct shared_info *)
1480 extend_brk(PAGE_SIZE, PAGE_SIZE);
1507 xatp.domid = DOMID_SELF; 1481 xatp.domid = DOMID_SELF;
1508 xatp.idx = 0; 1482 xatp.idx = 0;
1509 xatp.space = XENMAPSPACE_shared_info; 1483 xatp.space = XENMAPSPACE_shared_info;
1510 xatp.gpfn = pfn; 1484 xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT;
1511 if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp)) 1485 if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp))
1512 BUG(); 1486 BUG();
1513 1487
1514} 1488 HYPERVISOR_shared_info = (struct shared_info *)shared_info_page;
1515static void xen_hvm_set_shared_info(struct shared_info *sip)
1516{
1517 int cpu;
1518
1519 HYPERVISOR_shared_info = sip;
1520 1489
1521 /* xen_vcpu is a pointer to the vcpu_info struct in the shared_info 1490 /* xen_vcpu is a pointer to the vcpu_info struct in the shared_info
1522 * page, we use it in the event channel upcall and in some pvclock 1491 * page, we use it in the event channel upcall and in some pvclock
1523 * related functions. We don't need the vcpu_info placement 1492 * related functions. We don't need the vcpu_info placement
1524 * optimizations because we don't use any pv_mmu or pv_irq op on 1493 * optimizations because we don't use any pv_mmu or pv_irq op on
1525 * HVM. 1494 * HVM.
1526 * When xen_hvm_set_shared_info is run at boot time only vcpu 0 is 1495 * When xen_hvm_init_shared_info is run at boot time only vcpu 0 is
1527 * online but xen_hvm_set_shared_info is run at resume time too and 1496 * online but xen_hvm_init_shared_info is run at resume time too and
1528 * in that case multiple vcpus might be online. */ 1497 * in that case multiple vcpus might be online. */
1529 for_each_online_cpu(cpu) { 1498 for_each_online_cpu(cpu) {
1530 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; 1499 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
1531 } 1500 }
1532} 1501}
1533 1502
1534/* Reconnect the shared_info pfn to a mfn */ 1503#ifdef CONFIG_XEN_PVHVM
1535void xen_hvm_resume_shared_info(void)
1536{
1537 xen_hvm_connect_shared_info(__pa(xen_hvm_shared_info) >> PAGE_SHIFT);
1538}
1539
1540#ifdef CONFIG_KEXEC
1541static struct shared_info *xen_hvm_shared_info_kexec;
1542static unsigned long xen_hvm_shared_info_pfn_kexec;
1543
1544/* Remember a pfn in MMIO space for kexec reboot */
1545void __devinit xen_hvm_prepare_kexec(struct shared_info *sip, unsigned long pfn)
1546{
1547 xen_hvm_shared_info_kexec = sip;
1548 xen_hvm_shared_info_pfn_kexec = pfn;
1549}
1550
1551static void xen_hvm_syscore_shutdown(void)
1552{
1553 struct xen_memory_reservation reservation = {
1554 .domid = DOMID_SELF,
1555 .nr_extents = 1,
1556 };
1557 unsigned long prev_pfn;
1558 int rc;
1559
1560 if (!xen_hvm_shared_info_kexec)
1561 return;
1562
1563 prev_pfn = __pa(xen_hvm_shared_info) >> PAGE_SHIFT;
1564 set_xen_guest_handle(reservation.extent_start, &prev_pfn);
1565
1566 /* Move pfn to MMIO, disconnects previous pfn from mfn */
1567 xen_hvm_connect_shared_info(xen_hvm_shared_info_pfn_kexec);
1568
1569 /* Update pointers, following hypercall is also a memory barrier */
1570 xen_hvm_set_shared_info(xen_hvm_shared_info_kexec);
1571
1572 /* Allocate new mfn for previous pfn */
1573 do {
1574 rc = HYPERVISOR_memory_op(XENMEM_populate_physmap, &reservation);
1575 if (rc == 0)
1576 msleep(123);
1577 } while (rc == 0);
1578
1579 /* Make sure the previous pfn is really connected to a (new) mfn */
1580 BUG_ON(rc != 1);
1581}
1582
1583static struct syscore_ops xen_hvm_syscore_ops = {
1584 .shutdown = xen_hvm_syscore_shutdown,
1585};
1586#endif
1587
1588/* Use a pfn in RAM, may move to MMIO before kexec. */
1589static void __init xen_hvm_init_shared_info(void)
1590{
1591 /* Remember pointer for resume */
1592 xen_hvm_shared_info = extend_brk(PAGE_SIZE, PAGE_SIZE);
1593 xen_hvm_connect_shared_info(__pa(xen_hvm_shared_info) >> PAGE_SHIFT);
1594 xen_hvm_set_shared_info(xen_hvm_shared_info);
1595}
1596
1597static void __init init_hvm_pv_info(void) 1504static void __init init_hvm_pv_info(void)
1598{ 1505{
1599 int major, minor; 1506 int major, minor;
@@ -1644,9 +1551,6 @@ static void __init xen_hvm_guest_init(void)
1644 init_hvm_pv_info(); 1551 init_hvm_pv_info();
1645 1552
1646 xen_hvm_init_shared_info(); 1553 xen_hvm_init_shared_info();
1647#ifdef CONFIG_KEXEC
1648 register_syscore_ops(&xen_hvm_syscore_ops);
1649#endif
1650 1554
1651 if (xen_feature(XENFEAT_hvm_callback_vector)) 1555 if (xen_feature(XENFEAT_hvm_callback_vector))
1652 xen_have_vector_callback = 1; 1556 xen_have_vector_callback = 1;
diff --git a/arch/x86/xen/p2m.c b/arch/x86/xen/p2m.c
index b2e91d40a4c..d4b25546325 100644
--- a/arch/x86/xen/p2m.c
+++ b/arch/x86/xen/p2m.c
@@ -196,9 +196,11 @@ RESERVE_BRK(p2m_mid_identity, PAGE_SIZE * 2 * 3);
196 196
197/* When we populate back during bootup, the amount of pages can vary. The 197/* When we populate back during bootup, the amount of pages can vary. The
198 * max we have is seen is 395979, but that does not mean it can't be more. 198 * max we have is seen is 395979, but that does not mean it can't be more.
199 * But some machines can have 3GB I/O holes even. So lets reserve enough 199 * Some machines can have 3GB I/O holes even. With early_can_reuse_p2m_middle
200 * for 4GB of I/O and E820 holes. */ 200 * it can re-use Xen provided mfn_list array, so we only need to allocate at
201RESERVE_BRK(p2m_populated, PMD_SIZE * 4); 201 * most three P2M top nodes. */
202RESERVE_BRK(p2m_populated, PAGE_SIZE * 3);
203
202static inline unsigned p2m_top_index(unsigned long pfn) 204static inline unsigned p2m_top_index(unsigned long pfn)
203{ 205{
204 BUG_ON(pfn >= MAX_P2M_PFN); 206 BUG_ON(pfn >= MAX_P2M_PFN);
@@ -575,12 +577,99 @@ static bool __init early_alloc_p2m(unsigned long pfn)
575 } 577 }
576 return true; 578 return true;
577} 579}
580
581/*
582 * Skim over the P2M tree looking at pages that are either filled with
583 * INVALID_P2M_ENTRY or with 1:1 PFNs. If found, re-use that page and
584 * replace the P2M leaf with a p2m_missing or p2m_identity.
585 * Stick the old page in the new P2M tree location.
586 */
587bool __init early_can_reuse_p2m_middle(unsigned long set_pfn, unsigned long set_mfn)
588{
589 unsigned topidx;
590 unsigned mididx;
591 unsigned ident_pfns;
592 unsigned inv_pfns;
593 unsigned long *p2m;
594 unsigned long *mid_mfn_p;
595 unsigned idx;
596 unsigned long pfn;
597
598 /* We only look when this entails a P2M middle layer */
599 if (p2m_index(set_pfn))
600 return false;
601
602 for (pfn = 0; pfn <= MAX_DOMAIN_PAGES; pfn += P2M_PER_PAGE) {
603 topidx = p2m_top_index(pfn);
604
605 if (!p2m_top[topidx])
606 continue;
607
608 if (p2m_top[topidx] == p2m_mid_missing)
609 continue;
610
611 mididx = p2m_mid_index(pfn);
612 p2m = p2m_top[topidx][mididx];
613 if (!p2m)
614 continue;
615
616 if ((p2m == p2m_missing) || (p2m == p2m_identity))
617 continue;
618
619 if ((unsigned long)p2m == INVALID_P2M_ENTRY)
620 continue;
621
622 ident_pfns = 0;
623 inv_pfns = 0;
624 for (idx = 0; idx < P2M_PER_PAGE; idx++) {
625 /* IDENTITY_PFNs are 1:1 */
626 if (p2m[idx] == IDENTITY_FRAME(pfn + idx))
627 ident_pfns++;
628 else if (p2m[idx] == INVALID_P2M_ENTRY)
629 inv_pfns++;
630 else
631 break;
632 }
633 if ((ident_pfns == P2M_PER_PAGE) || (inv_pfns == P2M_PER_PAGE))
634 goto found;
635 }
636 return false;
637found:
638 /* Found one, replace old with p2m_identity or p2m_missing */
639 p2m_top[topidx][mididx] = (ident_pfns ? p2m_identity : p2m_missing);
640 /* And the other for save/restore.. */
641 mid_mfn_p = p2m_top_mfn_p[topidx];
642 /* NOTE: Even if it is a p2m_identity it should still be point to
643 * a page filled with INVALID_P2M_ENTRY entries. */
644 mid_mfn_p[mididx] = virt_to_mfn(p2m_missing);
645
646 /* Reset where we want to stick the old page in. */
647 topidx = p2m_top_index(set_pfn);
648 mididx = p2m_mid_index(set_pfn);
649
650 /* This shouldn't happen */
651 if (WARN_ON(p2m_top[topidx] == p2m_mid_missing))
652 early_alloc_p2m(set_pfn);
653
654 if (WARN_ON(p2m_top[topidx][mididx] != p2m_missing))
655 return false;
656
657 p2m_init(p2m);
658 p2m_top[topidx][mididx] = p2m;
659 mid_mfn_p = p2m_top_mfn_p[topidx];
660 mid_mfn_p[mididx] = virt_to_mfn(p2m);
661
662 return true;
663}
578bool __init early_set_phys_to_machine(unsigned long pfn, unsigned long mfn) 664bool __init early_set_phys_to_machine(unsigned long pfn, unsigned long mfn)
579{ 665{
580 if (unlikely(!__set_phys_to_machine(pfn, mfn))) { 666 if (unlikely(!__set_phys_to_machine(pfn, mfn))) {
581 if (!early_alloc_p2m(pfn)) 667 if (!early_alloc_p2m(pfn))
582 return false; 668 return false;
583 669
670 if (early_can_reuse_p2m_middle(pfn, mfn))
671 return __set_phys_to_machine(pfn, mfn);
672
584 if (!early_alloc_p2m_middle(pfn, false /* boundary crossover OK!*/)) 673 if (!early_alloc_p2m_middle(pfn, false /* boundary crossover OK!*/))
585 return false; 674 return false;
586 675
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c
index ead85576d54..d11ca11d14f 100644
--- a/arch/x86/xen/setup.c
+++ b/arch/x86/xen/setup.c
@@ -78,9 +78,16 @@ static void __init xen_add_extra_mem(u64 start, u64 size)
78 memblock_reserve(start, size); 78 memblock_reserve(start, size);
79 79
80 xen_max_p2m_pfn = PFN_DOWN(start + size); 80 xen_max_p2m_pfn = PFN_DOWN(start + size);
81 for (pfn = PFN_DOWN(start); pfn < xen_max_p2m_pfn; pfn++) {
82 unsigned long mfn = pfn_to_mfn(pfn);
83
84 if (WARN(mfn == pfn, "Trying to over-write 1-1 mapping (pfn: %lx)\n", pfn))
85 continue;
86 WARN(mfn != INVALID_P2M_ENTRY, "Trying to remove %lx which has %lx mfn!\n",
87 pfn, mfn);
81 88
82 for (pfn = PFN_DOWN(start); pfn <= xen_max_p2m_pfn; pfn++)
83 __set_phys_to_machine(pfn, INVALID_P2M_ENTRY); 89 __set_phys_to_machine(pfn, INVALID_P2M_ENTRY);
90 }
84} 91}
85 92
86static unsigned long __init xen_do_chunk(unsigned long start, 93static unsigned long __init xen_do_chunk(unsigned long start,
diff --git a/arch/x86/xen/suspend.c b/arch/x86/xen/suspend.c
index ae8a00c39de..45329c8c226 100644
--- a/arch/x86/xen/suspend.c
+++ b/arch/x86/xen/suspend.c
@@ -30,7 +30,7 @@ void xen_arch_hvm_post_suspend(int suspend_cancelled)
30{ 30{
31#ifdef CONFIG_XEN_PVHVM 31#ifdef CONFIG_XEN_PVHVM
32 int cpu; 32 int cpu;
33 xen_hvm_resume_shared_info(); 33 xen_hvm_init_shared_info();
34 xen_callback_vector(); 34 xen_callback_vector();
35 xen_unplug_emulated_devices(); 35 xen_unplug_emulated_devices();
36 if (xen_feature(XENFEAT_hvm_safe_pvclock)) { 36 if (xen_feature(XENFEAT_hvm_safe_pvclock)) {
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index 1e4329e04e0..202d4c15015 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -41,7 +41,7 @@ void xen_enable_syscall(void);
41void xen_vcpu_restore(void); 41void xen_vcpu_restore(void);
42 42
43void xen_callback_vector(void); 43void xen_callback_vector(void);
44void xen_hvm_resume_shared_info(void); 44void xen_hvm_init_shared_info(void);
45void xen_unplug_emulated_devices(void); 45void xen_unplug_emulated_devices(void);
46 46
47void __init xen_build_dynamic_phys_to_machine(void); 47void __init xen_build_dynamic_phys_to_machine(void);
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-09 01:24:44 -0500