Merge branch 'x86/apic' into irq/numa

Merge reason: both topics modify the APIC code but were able to do it in
              parallel so far. An upcoming patch generates a conflict so
              merge them to avoid the conflict.

Signed-off-by: Ingo Molnar <mingo@elte.hu>

26 files changed, 163 insertions, 82 deletions

diff --git a/arch/x86/include/asm/apicdef.h b/arch/x86/include/asm/apicdef.h
index bc9514fb3b1..7ddb36ab933 100644
--- a/arch/x86/include/asm/apicdef.h
+++ b/arch/x86/include/asm/apicdef.h
@@ -22,6 +22,7 @@
 #  define       APIC_INTEGRATED(x)      (1)
 #endif
 #define         APIC_XAPIC(x)           ((x) >= 0x14)
+#define         APIC_EXT_SPACE(x)       ((x) & 0x80000000)
 #define APIC_TASKPRI    0x80
 #define         APIC_TPRI_MASK          0xFFu
 #define APIC_ARBPRI     0x90
@@ -116,7 +117,9 @@
 #define         APIC_TDR_DIV_32         0x8
 #define         APIC_TDR_DIV_64         0x9
 #define         APIC_TDR_DIV_128        0xA
-#define APIC_EILVT0     0x500
+#define APIC_EFEAT      0x400
+#define APIC_ECTRL      0x410
+#define APIC_EILVTn(n)  (0x500 + 0x10 * n)
 #define         APIC_EILVT_NR_AMD_K8    1       /* # of extended interrupts */
 #define         APIC_EILVT_NR_AMD_10H   4
 #define         APIC_EILVT_LVTOFF(x)    (((x) >> 4) & 0xF)
@@ -125,9 +128,6 @@
 #define         APIC_EILVT_MSG_NMI      0x4
 #define         APIC_EILVT_MSG_EXT      0x7
 #define         APIC_EILVT_MASKED       (1 << 16)
-#define APIC_EILVT1     0x510
-#define APIC_EILVT2     0x520
-#define APIC_EILVT3     0x530
 
 #define APIC_BASE (fix_to_virt(FIX_APIC_BASE))
 #define APIC_BASE_MSR   0x800
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 563933e06a3..4f8c199584e 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -137,6 +137,7 @@ DECLARE_PER_CPU(mce_banks_t, mce_poll_banks);
 enum mcp_flags {
         MCP_TIMESTAMP = (1 << 0),       /* log time stamp */
         MCP_UC = (1 << 1),              /* log uncorrected errors */
+        MCP_DONTLOG = (1 << 2),         /* only clear, don't log */
 };
 extern void machine_check_poll(enum mcp_flags flags, mce_banks_t *b);
 
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index 892b119dba6..f44b49abca4 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -200,7 +200,7 @@ static inline void arch_fix_phys_package_id(int num, u32 slot)
 }
 
 struct pci_bus;
-void set_pci_bus_resources_arch_default(struct pci_bus *b);
+void x86_pci_root_bus_res_quirks(struct pci_bus *b);
 
 #ifdef CONFIG_SMP
 #define mc_capable()    (cpumask_weight(cpu_core_mask(0)) != nr_cpu_ids)
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
index 42c33cebf00..8c0be0902da 100644
--- a/arch/x86/kernel/amd_iommu_init.c
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -49,10 +49,10 @@
 #define IVHD_DEV_EXT_SELECT             0x46
 #define IVHD_DEV_EXT_SELECT_RANGE       0x47
 
-#define IVHD_FLAG_HT_TUN_EN             0x00
-#define IVHD_FLAG_PASSPW_EN             0x01
-#define IVHD_FLAG_RESPASSPW_EN          0x02
-#define IVHD_FLAG_ISOC_EN               0x03
+#define IVHD_FLAG_HT_TUN_EN_MASK        0x01
+#define IVHD_FLAG_PASSPW_EN_MASK        0x02
+#define IVHD_FLAG_RESPASSPW_EN_MASK     0x04
+#define IVHD_FLAG_ISOC_EN_MASK          0x08
 
 #define IVMD_FLAG_EXCL_RANGE            0x08
 #define IVMD_FLAG_UNITY_MAP             0x01
@@ -569,19 +569,19 @@ static void __init init_iommu_from_acpi(struct amd_iommu *iommu,
          * First set the recommended feature enable bits from ACPI
          * into the IOMMU control registers
          */
-        h->flags & IVHD_FLAG_HT_TUN_EN ?
+        h->flags & IVHD_FLAG_HT_TUN_EN_MASK ?
                 iommu_feature_enable(iommu, CONTROL_HT_TUN_EN) :
                 iommu_feature_disable(iommu, CONTROL_HT_TUN_EN);
 
-        h->flags & IVHD_FLAG_PASSPW_EN ?
+        h->flags & IVHD_FLAG_PASSPW_EN_MASK ?
                 iommu_feature_enable(iommu, CONTROL_PASSPW_EN) :
                 iommu_feature_disable(iommu, CONTROL_PASSPW_EN);
 
-        h->flags & IVHD_FLAG_RESPASSPW_EN ?
+        h->flags & IVHD_FLAG_RESPASSPW_EN_MASK ?
                 iommu_feature_enable(iommu, CONTROL_RESPASSPW_EN) :
                 iommu_feature_disable(iommu, CONTROL_RESPASSPW_EN);
 
-        h->flags & IVHD_FLAG_ISOC_EN ?
+        h->flags & IVHD_FLAG_ISOC_EN_MASK ?
                 iommu_feature_enable(iommu, CONTROL_ISOC_EN) :
                 iommu_feature_disable(iommu, CONTROL_ISOC_EN);
 
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 28f747d61d7..07cffc1214c 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -395,7 +395,7 @@ static void __setup_APIC_LVTT(unsigned int clocks, int oneshot, int irqen)
 
 static void setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask)
 {
-        unsigned long reg = (lvt_off << 4) + APIC_EILVT0;
+        unsigned long reg = (lvt_off << 4) + APIC_EILVTn(0);
         unsigned int  v   = (mask << 16) | (msg_type << 8) | vector;
 
         apic_write(reg, v);
@@ -1456,7 +1456,6 @@ static int __init detect_init_APIC(void)
         }
 
         mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
-        boot_cpu_physical_apicid = 0;
         return 0;
 }
 #else
@@ -1570,6 +1569,8 @@ void __init early_init_lapic_mapping(void)
  */
 void __init init_apic_mappings(void)
 {
+        unsigned int new_apicid;
+
         if (x2apic_mode) {
                 boot_cpu_physical_apicid = read_apic_id();
                 return;
@@ -1586,21 +1587,32 @@ void __init init_apic_mappings(void)
         } else
                 apic_phys = mp_lapic_addr;
 
-        set_fixmap_nocache(FIX_APIC_BASE, apic_phys);
-        apic_printk(APIC_VERBOSE, "mapped APIC to %08lx (%08lx)\n",
-                                APIC_BASE, apic_phys);
-
         /*
-         * Fetch the APIC ID of the BSP in case we have a
-         * default configuration (or the MP table is broken).
+         * acpi lapic path already maps that address in
+         * acpi_register_lapic_address()
          */
-        if (boot_cpu_physical_apicid == -1U)
-                boot_cpu_physical_apicid = read_apic_id();
+        if (!acpi_lapic)
+                set_fixmap_nocache(FIX_APIC_BASE, apic_phys);
+
+        apic_printk(APIC_VERBOSE, "mapped APIC to %08lx (%08lx)\n",
+                        APIC_BASE, apic_phys);
 
-        /* lets check if we may to NOP'ify apic operations */
+        /* lets check if we may NOP'ify apic operations */
         if (!cpu_has_apic) {
                 pr_info("APIC: disable apic facility\n");
                 apic_disable();
+                return;
+        }
+
+        /*
+         * Fetch the APIC ID of the BSP in case we have a
+         * default configuration (or the MP table is broken).
+         */
+        new_apicid = read_apic_id();
+        if (boot_cpu_physical_apicid != new_apicid) {
+                boot_cpu_physical_apicid = new_apicid;
+                apic_version[new_apicid] =
+                         GET_APIC_VERSION(apic_read(APIC_LVR));
         }
 }
 
@@ -2191,7 +2203,7 @@ static int __cpuinit set_multi(const struct dmi_system_id *d)
 {
         if (multi)
                 return 0;
-        printk(KERN_INFO "APIC: %s detected, Multi Chassis\n", d->ident);
+        pr_info("APIC: %s detected, Multi Chassis\n", d->ident);
         multi = 1;
         return 0;
 }
diff --git a/arch/x86/kernel/apic/apic_flat_64.c b/arch/x86/kernel/apic/apic_flat_64.c
index 306e5e88fb6..744e6d8af27 100644
--- a/arch/x86/kernel/apic/apic_flat_64.c
+++ b/arch/x86/kernel/apic/apic_flat_64.c
@@ -235,7 +235,7 @@ static int physflat_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
          * regardless of how many processors are present (x86_64 ES7000
          * is an example).
          */
-        if (acpi_gbl_FADT.header.revision > FADT2_REVISION_ID &&
+        if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
                 (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL)) {
                 printk(KERN_DEBUG "system APIC only can use physical flat");
                 return 1;
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 5d5f4120c74..1f3d3669dae 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -1730,7 +1730,7 @@ __apicdebuginit(void) print_APIC_bitfield(int base)
 
 __apicdebuginit(void) print_local_APIC(void *dummy)
 {
-        unsigned int v, ver, maxlvt;
+        unsigned int i, v, ver, maxlvt;
         u64 icr;
 
         if (apic_verbosity == APIC_QUIET)
@@ -1818,6 +1818,18 @@ __apicdebuginit(void) print_local_APIC(void *dummy)
         printk(KERN_DEBUG "... APIC TMCCT: %08x\n", v);
         v = apic_read(APIC_TDCR);
         printk(KERN_DEBUG "... APIC TDCR: %08x\n", v);
+
+        if (boot_cpu_has(X86_FEATURE_EXTAPIC)) {
+                v = apic_read(APIC_EFEAT);
+                maxlvt = (v >> 16) & 0xff;
+                printk(KERN_DEBUG "... APIC EFEAT: %08x\n", v);
+                v = apic_read(APIC_ECTRL);
+                printk(KERN_DEBUG "... APIC ECTRL: %08x\n", v);
+                for (i = 0; i < maxlvt; i++) {
+                        v = apic_read(APIC_EILVTn(i));
+                        printk(KERN_DEBUG "... APIC EILVT%d: %08x\n", i, v);
+                }
+        }
         printk("\n");
 }
 
@@ -3742,6 +3754,8 @@ int arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade,
         unsigned long flags;
         int err;
 
+        BUILD_BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long));
+
         cfg = irq_cfg(irq);
 
         err = assign_irq_vector(irq, cfg, eligible_cpu);
@@ -3755,15 +3769,13 @@ int arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade,
 
         mmr_value = 0;
         entry = (struct uv_IO_APIC_route_entry *)&mmr_value;
-        BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long));
-
-        entry->vector = cfg->vector;
-        entry->delivery_mode = apic->irq_delivery_mode;
-        entry->dest_mode = apic->irq_dest_mode;
-        entry->polarity = 0;
-        entry->trigger = 0;
-        entry->mask = 0;
-        entry->dest = apic->cpu_mask_to_apicid(eligible_cpu);
+        entry->vector           = cfg->vector;
+        entry->delivery_mode    = apic->irq_delivery_mode;
+        entry->dest_mode        = apic->irq_dest_mode;
+        entry->polarity         = 0;
+        entry->trigger          = 0;
+        entry->mask             = 0;
+        entry->dest             = apic->cpu_mask_to_apicid(eligible_cpu);
 
         mmr_pnode = uv_blade_to_pnode(mmr_blade);
         uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value);
@@ -3781,10 +3793,10 @@ void arch_disable_uv_irq(int mmr_blade, unsigned long mmr_offset)
         struct uv_IO_APIC_route_entry *entry;
         int mmr_pnode;
 
+        BUILD_BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long));
+
         mmr_value = 0;
         entry = (struct uv_IO_APIC_route_entry *)&mmr_value;
-        BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long));
-
         entry->mask = 1;
 
         mmr_pnode = uv_blade_to_pnode(mmr_blade);
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 93d604dee9b..780a733a5e7 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -583,15 +583,18 @@ void __init uv_system_init(void)
 
         bytes = sizeof(struct uv_blade_info) * uv_num_possible_blades();
         uv_blade_info = kmalloc(bytes, GFP_KERNEL);
+        BUG_ON(!uv_blade_info);
 
         get_lowmem_redirect(&lowmem_redir_base, &lowmem_redir_size);
 
         bytes = sizeof(uv_node_to_blade[0]) * num_possible_nodes();
         uv_node_to_blade = kmalloc(bytes, GFP_KERNEL);
+        BUG_ON(!uv_node_to_blade);
         memset(uv_node_to_blade, 255, bytes);
 
         bytes = sizeof(uv_cpu_to_blade[0]) * num_possible_cpus();
         uv_cpu_to_blade = kmalloc(bytes, GFP_KERNEL);
+        BUG_ON(!uv_cpu_to_blade);
         memset(uv_cpu_to_blade, 255, bytes);
 
         blade = 0;
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index c4f667896c2..c1caefc82e6 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1203,6 +1203,8 @@ void __cpuinit cpu_init(void)
         load_TR_desc();
         load_LDT(&init_mm.context);
 
+        t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
+
 #ifdef CONFIG_DOUBLEFAULT
         /* Set up doublefault TSS pointer in the GDT */
         __set_tss_desc(cpu, GDT_ENTRY_DOUBLEFAULT_TSS, &doublefault_tss);
diff --git a/arch/x86/kernel/cpu/cpu_debug.c b/arch/x86/kernel/cpu/cpu_debug.c
index 46e29ab96c6..2fc4f6bb9ca 100644
--- a/arch/x86/kernel/cpu/cpu_debug.c
+++ b/arch/x86/kernel/cpu/cpu_debug.c
@@ -588,8 +588,20 @@ static void print_apic(void *arg)
         seq_printf(seq, " TMICT\t\t: %08x\n",  apic_read(APIC_TMICT));
         seq_printf(seq, " TMCCT\t\t: %08x\n",  apic_read(APIC_TMCCT));
         seq_printf(seq, " TDCR\t\t: %08x\n",  apic_read(APIC_TDCR));
-#endif /* CONFIG_X86_LOCAL_APIC */
+        if (boot_cpu_has(X86_FEATURE_EXTAPIC)) {
+                unsigned int i, v, maxeilvt;
+
+                v = apic_read(APIC_EFEAT);
+                maxeilvt = (v >> 16) & 0xff;
+                seq_printf(seq, " EFEAT\t\t: %08x\n", v);
+                seq_printf(seq, " ECTRL\t\t: %08x\n", apic_read(APIC_ECTRL));
 
+                for (i = 0; i < maxeilvt; i++) {
+                        v = apic_read(APIC_EILVTn(i));
+                        seq_printf(seq, " EILVT%d\t\t: %08x\n", i, v);
+                }
+        }
+#endif /* CONFIG_X86_LOCAL_APIC */
         seq_printf(seq, "\n MSR\t:\n");
 }
 
diff --git a/arch/x86/kernel/cpu/mcheck/mce_64.c b/arch/x86/kernel/cpu/mcheck/mce_64.c
index 863f89568b1..6fb0b359d2a 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_64.c
@@ -239,9 +239,10 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
                  * Don't get the IP here because it's unlikely to
                  * have anything to do with the actual error location.
                  */
-
-                mce_log(&m);
-                add_taint(TAINT_MACHINE_CHECK);
+                if (!(flags & MCP_DONTLOG)) {
+                        mce_log(&m);
+                        add_taint(TAINT_MACHINE_CHECK);
+                }
 
                 /*
                  * Clear state for this bank.
@@ -452,13 +453,14 @@ void mce_log_therm_throt_event(__u64 status)
  */
 
 static int check_interval = 5 * 60; /* 5 minutes */
-static int next_interval; /* in jiffies */
+static DEFINE_PER_CPU(int, next_interval); /* in jiffies */
 static void mcheck_timer(unsigned long);
 static DEFINE_PER_CPU(struct timer_list, mce_timer);
 
 static void mcheck_timer(unsigned long data)
 {
         struct timer_list *t = &per_cpu(mce_timer, data);
+        int *n;
 
         WARN_ON(smp_processor_id() != data);
 
@@ -470,14 +472,14 @@ static void mcheck_timer(unsigned long data)
          * Alert userspace if needed.  If we logged an MCE, reduce the
          * polling interval, otherwise increase the polling interval.
          */
+        n = &__get_cpu_var(next_interval);
         if (mce_notify_user()) {
-                next_interval = max(next_interval/2, HZ/100);
+                *n = max(*n/2, HZ/100);
         } else {
-                next_interval = min(next_interval * 2,
-                                (int)round_jiffies_relative(check_interval*HZ));
+                *n = min(*n*2, (int)round_jiffies_relative(check_interval*HZ));
         }
 
-        t->expires = jiffies + next_interval;
+        t->expires = jiffies + *n;
         add_timer(t);
 }
 
@@ -584,7 +586,7 @@ static void mce_init(void *dummy)
          * Log the machine checks left over from the previous reset.
          */
         bitmap_fill(all_banks, MAX_NR_BANKS);
-        machine_check_poll(MCP_UC, &all_banks);
+        machine_check_poll(MCP_UC|(!mce_bootlog ? MCP_DONTLOG : 0), &all_banks);
 
         set_in_cr4(X86_CR4_MCE);
 
@@ -632,14 +634,13 @@ static void mce_cpu_features(struct cpuinfo_x86 *c)
 static void mce_init_timer(void)
 {
         struct timer_list *t = &__get_cpu_var(mce_timer);
+        int *n = &__get_cpu_var(next_interval);
 
-        /* data race harmless because everyone sets to the same value */
-        if (!next_interval)
-                next_interval = check_interval * HZ;
-        if (!next_interval)
+        *n = check_interval * HZ;
+        if (!*n)
                 return;
         setup_timer(t, mcheck_timer, smp_processor_id());
-        t->expires = round_jiffies(jiffies + next_interval);
+        t->expires = round_jiffies(jiffies + *n);
         add_timer(t);
 }
 
@@ -907,7 +908,6 @@ static void mce_cpu_restart(void *data)
 /* Reinit MCEs after user configuration changes */
 static void mce_restart(void)
 {
-        next_interval = check_interval * HZ;
         on_each_cpu(mce_cpu_restart, NULL, 1);
 }
 
@@ -1110,7 +1110,8 @@ static int __cpuinit mce_cpu_callback(struct notifier_block *nfb,
                 break;
         case CPU_DOWN_FAILED:
         case CPU_DOWN_FAILED_FROZEN:
-                t->expires = round_jiffies(jiffies + next_interval);
+                t->expires = round_jiffies(jiffies +
+                                                __get_cpu_var(next_interval));
                 add_timer_on(t, cpu);
                 smp_call_function_single(cpu, mce_reenable_cpu, &action, 1);
                 break;
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
index d6b72df89d6..cef3ee30744 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
@@ -151,10 +151,11 @@ static void print_update(char *type, int *hdr, int num)
 static void cmci_discover(int banks, int boot)
 {
         unsigned long *owned = (void *)&__get_cpu_var(mce_banks_owned);
+        unsigned long flags;
         int hdr = 0;
         int i;
 
-        spin_lock(&cmci_discover_lock);
+        spin_lock_irqsave(&cmci_discover_lock, flags);
         for (i = 0; i < banks; i++) {
                 u64 val;
 
@@ -184,7 +185,7 @@ static void cmci_discover(int banks, int boot)
                         WARN_ON(!test_bit(i, __get_cpu_var(mce_poll_banks)));
                 }
         }
-        spin_unlock(&cmci_discover_lock);
+        spin_unlock_irqrestore(&cmci_discover_lock, flags);
         if (hdr)
                 printk(KERN_CONT "\n");
 }
@@ -211,13 +212,14 @@ void cmci_recheck(void)
  */
 void cmci_clear(void)
 {
+        unsigned long flags;
         int i;
         int banks;
         u64 val;
 
         if (!cmci_supported(&banks))
                 return;
-        spin_lock(&cmci_discover_lock);
+        spin_lock_irqsave(&cmci_discover_lock, flags);
         for (i = 0; i < banks; i++) {
                 if (!test_bit(i, __get_cpu_var(mce_banks_owned)))
                         continue;
@@ -227,7 +229,7 @@ void cmci_clear(void)
                 wrmsrl(MSR_IA32_MC0_CTL2 + i, val);
                 __clear_bit(i, __get_cpu_var(mce_banks_owned));
         }
-        spin_unlock(&cmci_discover_lock);
+        spin_unlock_irqrestore(&cmci_discover_lock, flags);
 }
 
 /*
diff --git a/arch/x86/kernel/cpu/proc.c b/arch/x86/kernel/cpu/proc.c
index f93047fed79..d5e30397246 100644
--- a/arch/x86/kernel/cpu/proc.c
+++ b/arch/x86/kernel/cpu/proc.c
@@ -14,7 +14,7 @@ static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c,
         if (c->x86_max_cores * smp_num_siblings > 1) {
                 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
                 seq_printf(m, "siblings\t: %d\n",
-                           cpumask_weight(cpu_sibling_mask(cpu)));
+                           cpumask_weight(cpu_core_mask(cpu)));
                 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
                 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
                 seq_printf(m, "apicid\t\t: %d\n", c->apicid);
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c
index ef2c3563357..00628130292 100644
--- a/arch/x86/kernel/e820.c
+++ b/arch/x86/kernel/e820.c
@@ -1074,12 +1074,13 @@ u64 __init early_reserve_e820(u64 startt, u64 sizet, u64 align)
         u64 addr;
         u64 start;
 
-        start = startt;
-        while (size < sizet && (start + 1))
+        for (start = startt; ; start += size) {
                 start = find_e820_area_size(start, &size, align);
-
-        if (size < sizet)
-                return 0;
+                if (!(start + 1))
+                        return 0;
+                if (size >= sizet)
+                        break;
+        }
 
 #ifdef CONFIG_X86_32
         if (start >= MAXMEM)
diff --git a/arch/x86/kernel/machine_kexec_32.c b/arch/x86/kernel/machine_kexec_32.c
index e7368c1da01..c1c429d0013 100644
--- a/arch/x86/kernel/machine_kexec_32.c
+++ b/arch/x86/kernel/machine_kexec_32.c
@@ -194,7 +194,7 @@ void machine_kexec(struct kimage *image)
                                        unsigned int preserve_context);
 
 #ifdef CONFIG_KEXEC_JUMP
-        if (kexec_image->preserve_context)
+        if (image->preserve_context)
                 save_processor_state();
 #endif
 
@@ -253,7 +253,7 @@ void machine_kexec(struct kimage *image)
                                            image->preserve_context);
 
 #ifdef CONFIG_KEXEC_JUMP
-        if (kexec_image->preserve_context)
+        if (image->preserve_context)
                 restore_processor_state();
 #endif
 
diff --git a/arch/x86/kernel/machine_kexec_64.c b/arch/x86/kernel/machine_kexec_64.c
index 89cea4d4467..84c3bf209e9 100644
--- a/arch/x86/kernel/machine_kexec_64.c
+++ b/arch/x86/kernel/machine_kexec_64.c
@@ -274,7 +274,7 @@ void machine_kexec(struct kimage *image)
         int save_ftrace_enabled;
 
 #ifdef CONFIG_KEXEC_JUMP
-        if (kexec_image->preserve_context)
+        if (image->preserve_context)
                 save_processor_state();
 #endif
 
@@ -333,7 +333,7 @@ void machine_kexec(struct kimage *image)
                                        image->preserve_context);
 
 #ifdef CONFIG_KEXEC_JUMP
-        if (kexec_image->preserve_context)
+        if (image->preserve_context)
                 restore_processor_state();
 #endif
 
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index fd3da1dda1c..ae4f7b5d710 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -7,6 +7,7 @@
 #include <asm/page.h>
 #include <asm/page_types.h>
 #include <asm/sections.h>
+#include <asm/setup.h>
 #include <asm/system.h>
 #include <asm/tlbflush.h>
 
@@ -304,8 +305,23 @@ unsigned long __init_refok init_memory_mapping(unsigned long start,
 #endif
 
 #ifdef CONFIG_X86_64
-        if (!after_bootmem)
+        if (!after_bootmem && !start) {
+                pud_t *pud;
+                pmd_t *pmd;
+
                 mmu_cr4_features = read_cr4();
+
+                /*
+                 * _brk_end cannot change anymore, but it and _end may be
+                 * located on different 2M pages. cleanup_highmap(), however,
+                 * can only consider _end when it runs, so destroy any
+                 * mappings beyond _brk_end here.
+                 */
+                pud = pud_offset(pgd_offset_k(_brk_end), _brk_end);
+                pmd = pmd_offset(pud, _brk_end - 1);
+                while (++pmd <= pmd_offset(pud, (unsigned long)_end - 1))
+                        pmd_clear(pmd);
+        }
 #endif
         __flush_tlb_all();
 
diff --git a/arch/x86/mm/kmmio.c b/arch/x86/mm/kmmio.c
index 4f115e00486..50dc802a1c4 100644
--- a/arch/x86/mm/kmmio.c
+++ b/arch/x86/mm/kmmio.c
@@ -87,7 +87,7 @@ static struct kmmio_probe *get_kmmio_probe(unsigned long addr)
 {
         struct kmmio_probe *p;
         list_for_each_entry_rcu(p, &kmmio_probes, list) {
-                if (addr >= p->addr && addr <= (p->addr + p->len))
+                if (addr >= p->addr && addr < (p->addr + p->len))
                         return p;
         }
         return NULL;
diff --git a/arch/x86/mm/srat_32.c b/arch/x86/mm/srat_32.c
index 16ae70fc57e..29a0e37114f 100644
--- a/arch/x86/mm/srat_32.c
+++ b/arch/x86/mm/srat_32.c
@@ -216,7 +216,7 @@ int __init get_memcfg_from_srat(void)
 
         if (num_memory_chunks == 0) {
                 printk(KERN_WARNING
-                         "could not finy any ACPI SRAT memory areas.\n");
+                         "could not find any ACPI SRAT memory areas.\n");
                 goto out_fail;
         }
 
diff --git a/arch/x86/mm/srat_64.c b/arch/x86/mm/srat_64.c
index 33c5fa57e43..01765955baa 100644
--- a/arch/x86/mm/srat_64.c
+++ b/arch/x86/mm/srat_64.c
@@ -361,6 +361,7 @@ static void __init unparse_node(int node)
 {
         int i;
         node_clear(node, nodes_parsed);
+        node_clear(node, cpu_nodes_parsed);
         for (i = 0; i < MAX_LOCAL_APIC; i++) {
                 if (apicid_to_node[i] == node)
                         apicid_to_node[i] = NUMA_NO_NODE;
diff --git a/arch/x86/pci/amd_bus.c b/arch/x86/pci/amd_bus.c
index 9bb09823b36..f893d6a6e80 100644
--- a/arch/x86/pci/amd_bus.c
+++ b/arch/x86/pci/amd_bus.c
@@ -94,12 +94,16 @@ struct pci_root_info {
 static int pci_root_num;
 static struct pci_root_info pci_root_info[PCI_ROOT_NR];
 
-void set_pci_bus_resources_arch_default(struct pci_bus *b)
+void x86_pci_root_bus_res_quirks(struct pci_bus *b)
 {
         int i;
         int j;
         struct pci_root_info *info;
 
+        /* don't go for it if _CRS is used */
+        if (pci_probe & PCI_USE__CRS)
+                return;
+
         /* if only one root bus, don't need to anything */
         if (pci_root_num < 2)
                 return;
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index 8c362b96b64..2202b6257b8 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -147,10 +147,13 @@ static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev)
  *  are examined.
  */
 
-void __devinit  pcibios_fixup_bus(struct pci_bus *b)
+void __devinit pcibios_fixup_bus(struct pci_bus *b)
 {
         struct pci_dev *dev;
 
+        /* root bus? */
+        if (!b->parent)
+                x86_pci_root_bus_res_quirks(b);
         pci_read_bridge_bases(b);
         list_for_each_entry(dev, &b->devices, bus_list)
                 pcibios_fixup_device_resources(dev);
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index f1817f71e00..a85bef20a3b 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -238,6 +238,10 @@ void __init pcibios_resource_survey(void)
  */
 fs_initcall(pcibios_assign_resources);
 
+void __weak x86_pci_root_bus_res_quirks(struct pci_bus *b)
+{
+}
+
 /*
  *  If we set up a device for bus mastering, we need to check the latency
  *  timer as certain crappy BIOSes forget to set it properly.
diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c
index 905bb526b13..5fa10bb9604 100644
--- a/arch/x86/pci/mmconfig-shared.c
+++ b/arch/x86/pci/mmconfig-shared.c
@@ -375,7 +375,7 @@ static acpi_status __init check_mcfg_resource(struct acpi_resource *res,
                 if (!fixmem32)
                         return AE_OK;
                 if ((mcfg_res->start >= fixmem32->address) &&
-                    (mcfg_res->end < (fixmem32->address +
+                    (mcfg_res->end <= (fixmem32->address +
                                       fixmem32->address_length))) {
                         mcfg_res->flags = 1;
                         return AE_CTRL_TERMINATE;
@@ -392,7 +392,7 @@ static acpi_status __init check_mcfg_resource(struct acpi_resource *res,
                 return AE_OK;
 
         if ((mcfg_res->start >= address.minimum) &&
-            (mcfg_res->end < (address.minimum + address.address_length))) {
+            (mcfg_res->end <= (address.minimum + address.address_length))) {
                 mcfg_res->flags = 1;
                 return AE_CTRL_TERMINATE;
         }
@@ -439,7 +439,7 @@ static int __init is_mmconf_reserved(check_reserved_t is_reserved,
         u64 old_size = size;
         int valid = 0;
 
-        while (!is_reserved(addr, addr + size - 1, E820_RESERVED)) {
+        while (!is_reserved(addr, addr + size, E820_RESERVED)) {
                 size >>= 1;
                 if (size < (16UL<<20))
                         break;
diff --git a/arch/x86/vdso/vclock_gettime.c b/arch/x86/vdso/vclock_gettime.c
index d9d35824c56..6a40b78b46a 100644
--- a/arch/x86/vdso/vclock_gettime.c
+++ b/arch/x86/vdso/vclock_gettime.c
@@ -104,11 +104,13 @@ notrace int __vdso_gettimeofday(struct timeval *tv, struct timezone *tz)
 {
         long ret;
         if (likely(gtod->sysctl_enabled && gtod->clock.vread)) {
-                BUILD_BUG_ON(offsetof(struct timeval, tv_usec) !=
-                             offsetof(struct timespec, tv_nsec) ||
-                             sizeof(*tv) != sizeof(struct timespec));
-                do_realtime((struct timespec *)tv);
-                tv->tv_usec /= 1000;
+                if (likely(tv != NULL)) {
+                        BUILD_BUG_ON(offsetof(struct timeval, tv_usec) !=
+                                     offsetof(struct timespec, tv_nsec) ||
+                                     sizeof(*tv) != sizeof(struct timespec));
+                        do_realtime((struct timespec *)tv);
+                        tv->tv_usec /= 1000;
+                }
                 if (unlikely(tz != NULL)) {
                         /* Avoid memcpy. Some old compilers fail to inline it */
                         tz->tz_minuteswest = gtod->sys_tz.tz_minuteswest;
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 9842b121240..e25a78e1113 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -1794,6 +1794,11 @@ __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
 
         pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(swapper_pg_dir)));
 
+        reserve_early(__pa(xen_start_info->pt_base),
+                      __pa(xen_start_info->pt_base +
+                           xen_start_info->nr_pt_frames * PAGE_SIZE),
+                      "XEN PAGETABLES");
+
         return swapper_pg_dir;
 }
 #endif  /* CONFIG_X86_64 */