aboutsummaryrefslogtreecommitdiffstats
path: root/arch/x86
diff options
context:
space:
mode:
authorH. Peter Anvin <hpa@linux.intel.com>2012-05-16 17:02:05 -0400
committerH. Peter Anvin <hpa@linux.intel.com>2012-05-16 17:02:05 -0400
commit638d957b51c88852de72f15f7cd588d125e97dab (patch)
tree84e9d6c7bb5416659e9015b60da3909751266c80 /arch/x86
parent137127018812ec7fcccb9843156cfc0b5cfa31d5 (diff)
x86, realmode: Change EFER to a single u64 field
Change EFER to be a single u64 field instead of two u32 fields; change the order to maintain alignment. Note that on x86-64 cr4 is really also a 64-bit quantity, although we can only set the low 32 bits from the trampoline code since it is still executing in 32-bit mode at that point. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Cc: Jarkko Sakkinen <jarkko.sakkinen@intel.com>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/include/asm/realmode.h3
-rw-r--r--arch/x86/realmode/init.c7
-rw-r--r--arch/x86/realmode/rm/trampoline_64.S2
3 files changed, 5 insertions, 7 deletions
diff --git a/arch/x86/include/asm/realmode.h b/arch/x86/include/asm/realmode.h
index 937dc6071d7..fce3f4ae5bd 100644
--- a/arch/x86/include/asm/realmode.h
+++ b/arch/x86/include/asm/realmode.h
@@ -35,9 +35,8 @@ struct trampoline_header {
35 u32 gdt_base; 35 u32 gdt_base;
36#else 36#else
37 u64 start; 37 u64 start;
38 u64 efer;
38 u32 cr4; 39 u32 cr4;
39 u32 efer_low;
40 u32 efer_high;
41#endif 40#endif
42}; 41};
43 42
diff --git a/arch/x86/realmode/init.c b/arch/x86/realmode/init.c
index 099277984b8..cbca565af5b 100644
--- a/arch/x86/realmode/init.c
+++ b/arch/x86/realmode/init.c
@@ -22,7 +22,7 @@ void __init setup_real_mode(void)
22 size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob); 22 size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
23#ifdef CONFIG_X86_64 23#ifdef CONFIG_X86_64
24 u64 *trampoline_pgd; 24 u64 *trampoline_pgd;
25 u32 efer_low, efer_high; 25 u64 efer;
26#endif 26#endif
27 27
28 /* Has to be in very low memory so we can execute real-mode AP code. */ 28 /* Has to be in very low memory so we can execute real-mode AP code. */
@@ -70,9 +70,8 @@ void __init setup_real_mode(void)
70 * Some AMD processors will #GP(0) if EFER.LMA is set in WRMSR 70 * Some AMD processors will #GP(0) if EFER.LMA is set in WRMSR
71 * so we need to mask it out. 71 * so we need to mask it out.
72 */ 72 */
73 rdmsr(MSR_EFER, efer_low, efer_high); 73 rdmsrl(MSR_EFER, efer);
74 trampoline_header->efer_low = efer_low & ~EFER_LMA; 74 trampoline_header->efer = efer & ~EFER_LMA;
75 trampoline_header->efer_high = efer_high;
76 75
77 trampoline_header->start = (u64) secondary_startup_64; 76 trampoline_header->start = (u64) secondary_startup_64;
78 trampoline_cr4_features = &trampoline_header->cr4; 77 trampoline_cr4_features = &trampoline_header->cr4;
diff --git a/arch/x86/realmode/rm/trampoline_64.S b/arch/x86/realmode/rm/trampoline_64.S
index 1b9e1bc1ac5..bb360dc39d2 100644
--- a/arch/x86/realmode/rm/trampoline_64.S
+++ b/arch/x86/realmode/rm/trampoline_64.S
@@ -146,8 +146,8 @@ GLOBAL(trampoline_pgd) .space PAGE_SIZE
146 .balign 8 146 .balign 8
147GLOBAL(trampoline_header) 147GLOBAL(trampoline_header)
148 tr_start: .space 8 148 tr_start: .space 8
149 GLOBAL(tr_cr4) .space 4
150 GLOBAL(tr_efer) .space 8 149 GLOBAL(tr_efer) .space 8
150 GLOBAL(tr_cr4) .space 4
151END(trampoline_header) 151END(trampoline_header)
152 152
153#include "trampoline_common.S" 153#include "trampoline_common.S"