KVM: align valid EFER bits with the features of the host system

This patch aligns the bits the guest can set in the EFER register with the
features in the host processor. Currently it lets EFER.NX disabled if the
processor does not support it and enables EFER.LME and EFER.LMA only for KVM on
64 bit hosts.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Avi Kivity <avi@qumranet.com>

1 files changed, 3 insertions, 0 deletions

diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 1a582f1090e..ff3bc74af72 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -403,6 +403,9 @@ static __init int svm_hardware_setup(void)
         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_ESP, 1, 1);
         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_EIP, 1, 1);
 
+        if (boot_cpu_has(X86_FEATURE_NX))
+                kvm_enable_efer_bits(EFER_NX);
+
         for_each_online_cpu(cpu) {
                 r = svm_cpu_init(cpu);
                 if (r)