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authorStephane Eranian <eranian@hpl.hp.com>2007-10-19 14:35:04 -0400
committerThomas Gleixner <tglx@linutronix.de>2007-10-19 14:35:04 -0400
commit124d395fd05efb65d00ca23c7bcc86c272bd8813 (patch)
tree1018f5783be5e218a93ec5be9aceab9731dd1734 /arch/x86/kernel/cpu/perfctr-watchdog.c
parent71b31233a215be27e2efbcc0e739cbebb0bde078 (diff)
i386: do not BUG_ON() when MSR is unknown
Here is a small patch to change the behavior of the PMU msr allocator to avoid BUG_ON() when the MSR is unknwon. Instead, it now returns ok, which means "I do not manage". The current allocator is not yet managing the full set of PMU registers (e.g., GLOBAL_* on Core 2). [watchdog] do not BUG_ON() in the MSR allocator if MSR is unknown, return ok instead Signed-off-by: Stephane Eranian <eranian@hpl.hp.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/kernel/cpu/perfctr-watchdog.c')
-rw-r--r--arch/x86/kernel/cpu/perfctr-watchdog.c16
1 files changed, 12 insertions, 4 deletions
diff --git a/arch/x86/kernel/cpu/perfctr-watchdog.c b/arch/x86/kernel/cpu/perfctr-watchdog.c
index 54cdbf1a40f..c02541e6e65 100644
--- a/arch/x86/kernel/cpu/perfctr-watchdog.c
+++ b/arch/x86/kernel/cpu/perfctr-watchdog.c
@@ -120,7 +120,9 @@ int reserve_perfctr_nmi(unsigned int msr)
120 unsigned int counter; 120 unsigned int counter;
121 121
122 counter = nmi_perfctr_msr_to_bit(msr); 122 counter = nmi_perfctr_msr_to_bit(msr);
123 BUG_ON(counter > NMI_MAX_COUNTER_BITS); 123 /* register not managed by the allocator? */
124 if (counter > NMI_MAX_COUNTER_BITS)
125 return 1;
124 126
125 if (!test_and_set_bit(counter, perfctr_nmi_owner)) 127 if (!test_and_set_bit(counter, perfctr_nmi_owner))
126 return 1; 128 return 1;
@@ -132,7 +134,9 @@ void release_perfctr_nmi(unsigned int msr)
132 unsigned int counter; 134 unsigned int counter;
133 135
134 counter = nmi_perfctr_msr_to_bit(msr); 136 counter = nmi_perfctr_msr_to_bit(msr);
135 BUG_ON(counter > NMI_MAX_COUNTER_BITS); 137 /* register not managed by the allocator? */
138 if (counter > NMI_MAX_COUNTER_BITS)
139 return;
136 140
137 clear_bit(counter, perfctr_nmi_owner); 141 clear_bit(counter, perfctr_nmi_owner);
138} 142}
@@ -142,7 +146,9 @@ int reserve_evntsel_nmi(unsigned int msr)
142 unsigned int counter; 146 unsigned int counter;
143 147
144 counter = nmi_evntsel_msr_to_bit(msr); 148 counter = nmi_evntsel_msr_to_bit(msr);
145 BUG_ON(counter > NMI_MAX_COUNTER_BITS); 149 /* register not managed by the allocator? */
150 if (counter > NMI_MAX_COUNTER_BITS)
151 return 1;
146 152
147 if (!test_and_set_bit(counter, evntsel_nmi_owner)) 153 if (!test_and_set_bit(counter, evntsel_nmi_owner))
148 return 1; 154 return 1;
@@ -154,7 +160,9 @@ void release_evntsel_nmi(unsigned int msr)
154 unsigned int counter; 160 unsigned int counter;
155 161
156 counter = nmi_evntsel_msr_to_bit(msr); 162 counter = nmi_evntsel_msr_to_bit(msr);
157 BUG_ON(counter > NMI_MAX_COUNTER_BITS); 163 /* register not managed by the allocator? */
164 if (counter > NMI_MAX_COUNTER_BITS)
165 return;
158 166
159 clear_bit(counter, evntsel_nmi_owner); 167 clear_bit(counter, evntsel_nmi_owner);
160} 168}