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authorAndreas Herrmann <andreas.herrmann3@amd.com>2010-09-02 09:37:10 -0400
committerIngo Molnar <mingo@elte.hu>2010-09-05 08:33:48 -0400
commitd9fadd7ba99a67030783a212bcb17d11f0678433 (patch)
tree6aef819ce987cd81692df07287f7b9bbb2024934 /arch/x86/kernel/cpu/amd.c
parentacf01734b1747b1ec4be6f159aff579ea5f7f8e2 (diff)
x86, AMD: Remove needless CPU family check (for L3 cache info)
Old 32-bit AMD CPUs (all w/o L3 cache) should always return 0 for cpuid_edx(0x80000006). For unknown reason the 32-bit implementation differed from the 64-bit implementation. See commit 67cddd94799 ("i386: Add L3 cache support to AMD CPUID4 emulation"). The current check is the result of the x86 merge. Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> Cc: Andi Kleen <andi@firstfloor.org> LKML-Reference: <20100902133710.GA5449@loge.amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/cpu/amd.c')
-rw-r--r--arch/x86/kernel/cpu/amd.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index fc563fabde6..0f0ace5d7db 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -540,7 +540,7 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
540#endif 540#endif
541 541
542 if (c->extended_cpuid_level >= 0x80000006) { 542 if (c->extended_cpuid_level >= 0x80000006) {
543 if ((c->x86 >= 0x0f) && (cpuid_edx(0x80000006) & 0xf000)) 543 if (cpuid_edx(0x80000006) & 0xf000)
544 num_cache_leaves = 4; 544 num_cache_leaves = 4;
545 else 545 else
546 num_cache_leaves = 3; 546 num_cache_leaves = 3;