diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2009-03-23 09:50:03 -0400 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2009-03-23 16:20:20 -0400 |
commit | 80c5520811d3805adcb15c570ea5e2d489fa5d0b (patch) | |
tree | ae797a7f4af39f80e77526533d06ac23b439f0ab /arch/x86/include/asm/tlbflush.h | |
parent | b3e3b302cf6dc8d60b67f0e84d1fa5648889c038 (diff) | |
parent | 8c083f081d0014057901c68a0a3e0f8ca7ac8d23 (diff) |
Merge branch 'cpus4096' into irq/threaded
Conflicts:
arch/parisc/kernel/irq.c
kernel/irq/handle.c
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/include/asm/tlbflush.h')
-rw-r--r-- | arch/x86/include/asm/tlbflush.h | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h index 0e7bbb54911..d3539f998f8 100644 --- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h | |||
@@ -113,7 +113,7 @@ static inline void flush_tlb_range(struct vm_area_struct *vma, | |||
113 | __flush_tlb(); | 113 | __flush_tlb(); |
114 | } | 114 | } |
115 | 115 | ||
116 | static inline void native_flush_tlb_others(const cpumask_t *cpumask, | 116 | static inline void native_flush_tlb_others(const struct cpumask *cpumask, |
117 | struct mm_struct *mm, | 117 | struct mm_struct *mm, |
118 | unsigned long va) | 118 | unsigned long va) |
119 | { | 119 | { |
@@ -142,31 +142,28 @@ static inline void flush_tlb_range(struct vm_area_struct *vma, | |||
142 | flush_tlb_mm(vma->vm_mm); | 142 | flush_tlb_mm(vma->vm_mm); |
143 | } | 143 | } |
144 | 144 | ||
145 | void native_flush_tlb_others(const cpumask_t *cpumask, struct mm_struct *mm, | 145 | void native_flush_tlb_others(const struct cpumask *cpumask, |
146 | unsigned long va); | 146 | struct mm_struct *mm, unsigned long va); |
147 | 147 | ||
148 | #define TLBSTATE_OK 1 | 148 | #define TLBSTATE_OK 1 |
149 | #define TLBSTATE_LAZY 2 | 149 | #define TLBSTATE_LAZY 2 |
150 | 150 | ||
151 | #ifdef CONFIG_X86_32 | ||
152 | struct tlb_state { | 151 | struct tlb_state { |
153 | struct mm_struct *active_mm; | 152 | struct mm_struct *active_mm; |
154 | int state; | 153 | int state; |
155 | char __cacheline_padding[L1_CACHE_BYTES-8]; | ||
156 | }; | 154 | }; |
157 | DECLARE_PER_CPU(struct tlb_state, cpu_tlbstate); | 155 | DECLARE_PER_CPU(struct tlb_state, cpu_tlbstate); |
158 | 156 | ||
159 | void reset_lazy_tlbstate(void); | ||
160 | #else | ||
161 | static inline void reset_lazy_tlbstate(void) | 157 | static inline void reset_lazy_tlbstate(void) |
162 | { | 158 | { |
159 | percpu_write(cpu_tlbstate.state, 0); | ||
160 | percpu_write(cpu_tlbstate.active_mm, &init_mm); | ||
163 | } | 161 | } |
164 | #endif | ||
165 | 162 | ||
166 | #endif /* SMP */ | 163 | #endif /* SMP */ |
167 | 164 | ||
168 | #ifndef CONFIG_PARAVIRT | 165 | #ifndef CONFIG_PARAVIRT |
169 | #define flush_tlb_others(mask, mm, va) native_flush_tlb_others(&mask, mm, va) | 166 | #define flush_tlb_others(mask, mm, va) native_flush_tlb_others(mask, mm, va) |
170 | #endif | 167 | #endif |
171 | 168 | ||
172 | static inline void flush_tlb_kernel_range(unsigned long start, | 169 | static inline void flush_tlb_kernel_range(unsigned long start, |
@@ -175,4 +172,6 @@ static inline void flush_tlb_kernel_range(unsigned long start, | |||
175 | flush_tlb_all(); | 172 | flush_tlb_all(); |
176 | } | 173 | } |
177 | 174 | ||
175 | extern void zap_low_mappings(void); | ||
176 | |||
178 | #endif /* _ASM_X86_TLBFLUSH_H */ | 177 | #endif /* _ASM_X86_TLBFLUSH_H */ |