x86, perf: Disable non available architectural events

Intel CPUs report non-available architectural events in cpuid leaf
0AH.EBX. Use it to disable events that are not available according
to CPU.

Signed-off-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1320929850-10480-7-git-send-email-gleb@redhat.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>

1 files changed, 14 insertions, 0 deletions

diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
index f61c62f7d5d..c6998bc7545 100644
--- a/arch/x86/include/asm/perf_event.h
+++ b/arch/x86/include/asm/perf_event.h
@@ -57,6 +57,7 @@
                 (1 << (ARCH_PERFMON_UNHALTED_CORE_CYCLES_INDEX))
 
 #define ARCH_PERFMON_BRANCH_MISSES_RETIRED              6
+#define ARCH_PERFMON_EVENTS_COUNT                       7
 
 /*
  * Intel "Architectural Performance Monitoring" CPUID
@@ -72,6 +73,19 @@ union cpuid10_eax {
         unsigned int full;
 };
 
+union cpuid10_ebx {
+        struct {
+                unsigned int no_unhalted_core_cycles:1;
+                unsigned int no_instructions_retired:1;
+                unsigned int no_unhalted_reference_cycles:1;
+                unsigned int no_llc_reference:1;
+                unsigned int no_llc_misses:1;
+                unsigned int no_branch_instruction_retired:1;
+                unsigned int no_branch_misses_retired:1;
+        } split;
+        unsigned int full;
+};
+
 union cpuid10_edx {
         struct {
                 unsigned int num_counters_fixed:5;