diff options
author | Andre Przywara <andre.przywara@amd.com> | 2012-06-01 10:52:35 -0400 |
---|---|---|
committer | H. Peter Anvin <hpa@zytor.com> | 2012-06-07 14:41:08 -0400 |
commit | 1f975f78c84c852e09463a2dfa57e3174e5c719e (patch) | |
tree | c17ce1da0c14ab7850c880a7b61fc2b8a890d623 /arch/x86/include/asm/msr.h | |
parent | f8f5701bdaf9134b1f90e5044a82c66324d2073f (diff) |
x86, pvops: Remove hooks for {rd,wr}msr_safe_regs
There were paravirt_ops hooks for the full register set variant of
{rd,wr}msr_safe which are actually not used by anyone anymore. Remove
them to make the code cleaner and avoid silent breakages when the pvops
members were uninitialized. This has been boot-tested natively and under
Xen with PVOPS enabled and disabled on one machine.
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
Link: http://lkml.kernel.org/r/1338562358-28182-2-git-send-email-bp@amd64.org
Acked-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86/include/asm/msr.h')
-rw-r--r-- | arch/x86/include/asm/msr.h | 67 |
1 files changed, 28 insertions, 39 deletions
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h index 084ef95274c..81860cc012d 100644 --- a/arch/x86/include/asm/msr.h +++ b/arch/x86/include/asm/msr.h | |||
@@ -115,8 +115,8 @@ notrace static inline int native_write_msr_safe(unsigned int msr, | |||
115 | 115 | ||
116 | extern unsigned long long native_read_tsc(void); | 116 | extern unsigned long long native_read_tsc(void); |
117 | 117 | ||
118 | extern int native_rdmsr_safe_regs(u32 regs[8]); | 118 | extern int rdmsr_safe_regs(u32 regs[8]); |
119 | extern int native_wrmsr_safe_regs(u32 regs[8]); | 119 | extern int wrmsr_safe_regs(u32 regs[8]); |
120 | 120 | ||
121 | static __always_inline unsigned long long __native_read_tsc(void) | 121 | static __always_inline unsigned long long __native_read_tsc(void) |
122 | { | 122 | { |
@@ -187,43 +187,6 @@ static inline int rdmsrl_safe(unsigned msr, unsigned long long *p) | |||
187 | return err; | 187 | return err; |
188 | } | 188 | } |
189 | 189 | ||
190 | static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p) | ||
191 | { | ||
192 | u32 gprs[8] = { 0 }; | ||
193 | int err; | ||
194 | |||
195 | gprs[1] = msr; | ||
196 | gprs[7] = 0x9c5a203a; | ||
197 | |||
198 | err = native_rdmsr_safe_regs(gprs); | ||
199 | |||
200 | *p = gprs[0] | ((u64)gprs[2] << 32); | ||
201 | |||
202 | return err; | ||
203 | } | ||
204 | |||
205 | static inline int wrmsrl_amd_safe(unsigned msr, unsigned long long val) | ||
206 | { | ||
207 | u32 gprs[8] = { 0 }; | ||
208 | |||
209 | gprs[0] = (u32)val; | ||
210 | gprs[1] = msr; | ||
211 | gprs[2] = val >> 32; | ||
212 | gprs[7] = 0x9c5a203a; | ||
213 | |||
214 | return native_wrmsr_safe_regs(gprs); | ||
215 | } | ||
216 | |||
217 | static inline int rdmsr_safe_regs(u32 regs[8]) | ||
218 | { | ||
219 | return native_rdmsr_safe_regs(regs); | ||
220 | } | ||
221 | |||
222 | static inline int wrmsr_safe_regs(u32 regs[8]) | ||
223 | { | ||
224 | return native_wrmsr_safe_regs(regs); | ||
225 | } | ||
226 | |||
227 | #define rdtscl(low) \ | 190 | #define rdtscl(low) \ |
228 | ((low) = (u32)__native_read_tsc()) | 191 | ((low) = (u32)__native_read_tsc()) |
229 | 192 | ||
@@ -248,6 +211,32 @@ do { \ | |||
248 | 211 | ||
249 | #endif /* !CONFIG_PARAVIRT */ | 212 | #endif /* !CONFIG_PARAVIRT */ |
250 | 213 | ||
214 | static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p) | ||
215 | { | ||
216 | u32 gprs[8] = { 0 }; | ||
217 | int err; | ||
218 | |||
219 | gprs[1] = msr; | ||
220 | gprs[7] = 0x9c5a203a; | ||
221 | |||
222 | err = rdmsr_safe_regs(gprs); | ||
223 | |||
224 | *p = gprs[0] | ((u64)gprs[2] << 32); | ||
225 | |||
226 | return err; | ||
227 | } | ||
228 | |||
229 | static inline int wrmsrl_amd_safe(unsigned msr, unsigned long long val) | ||
230 | { | ||
231 | u32 gprs[8] = { 0 }; | ||
232 | |||
233 | gprs[0] = (u32)val; | ||
234 | gprs[1] = msr; | ||
235 | gprs[2] = val >> 32; | ||
236 | gprs[7] = 0x9c5a203a; | ||
237 | |||
238 | return wrmsr_safe_regs(gprs); | ||
239 | } | ||
251 | 240 | ||
252 | #define checking_wrmsrl(msr, val) wrmsr_safe((msr), (u32)(val), \ | 241 | #define checking_wrmsrl(msr, val) wrmsr_safe((msr), (u32)(val), \ |
253 | (u32)((val) >> 32)) | 242 | (u32)((val) >> 32)) |