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authorNadav Har'El <nyh@il.ibm.com>2011-05-25 16:04:25 -0400
committerAvi Kivity <avi@redhat.com>2011-07-12 04:45:11 -0400
commitb87a51ae2893a5907f796eadb4beb60747a69209 (patch)
tree0dfe98e545b1e69268d37121eb9ad42726a6b8d4 /arch/x86/include/asm/msr-index.h
parenta9d30f33dd21b67b2f4db09f3dfe63a7c390d1b3 (diff)
KVM: nVMX: Implement reading and writing of VMX MSRs
When the guest can use VMX instructions (when the "nested" module option is on), it should also be able to read and write VMX MSRs, e.g., to query about VMX capabilities. This patch adds this support. Signed-off-by: Nadav Har'El <nyh@il.ibm.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Diffstat (limited to 'arch/x86/include/asm/msr-index.h')
-rw-r--r--arch/x86/include/asm/msr-index.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 485b4f1f079..e3022ccff33 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -438,6 +438,18 @@
438#define MSR_IA32_VMX_VMCS_ENUM 0x0000048a 438#define MSR_IA32_VMX_VMCS_ENUM 0x0000048a
439#define MSR_IA32_VMX_PROCBASED_CTLS2 0x0000048b 439#define MSR_IA32_VMX_PROCBASED_CTLS2 0x0000048b
440#define MSR_IA32_VMX_EPT_VPID_CAP 0x0000048c 440#define MSR_IA32_VMX_EPT_VPID_CAP 0x0000048c
441#define MSR_IA32_VMX_TRUE_PINBASED_CTLS 0x0000048d
442#define MSR_IA32_VMX_TRUE_PROCBASED_CTLS 0x0000048e
443#define MSR_IA32_VMX_TRUE_EXIT_CTLS 0x0000048f
444#define MSR_IA32_VMX_TRUE_ENTRY_CTLS 0x00000490
445
446/* VMX_BASIC bits and bitmasks */
447#define VMX_BASIC_VMCS_SIZE_SHIFT 32
448#define VMX_BASIC_64 0x0001000000000000LLU
449#define VMX_BASIC_MEM_TYPE_SHIFT 50
450#define VMX_BASIC_MEM_TYPE_MASK 0x003c000000000000LLU
451#define VMX_BASIC_MEM_TYPE_WB 6LLU
452#define VMX_BASIC_INOUT 0x0040000000000000LLU
441 453
442/* AMD-V MSRs */ 454/* AMD-V MSRs */
443 455