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authorJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
committerJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
commit8dea78da5cee153b8af9c07a2745f6c55057fe12 (patch)
treea8f4d49d63b1ecc92f2fddceba0655b2472c5bd9 /arch/sparc/include/asm
parent406089d01562f1e2bf9f089fd7637009ebaad589 (diff)
Patched in Tegra support.
Diffstat (limited to 'arch/sparc/include/asm')
-rw-r--r--arch/sparc/include/asm/Kbuild21
-rw-r--r--arch/sparc/include/asm/asmmacro.h37
-rw-r--r--arch/sparc/include/asm/atomic_32.h106
-rw-r--r--arch/sparc/include/asm/atomic_64.h7
-rw-r--r--arch/sparc/include/asm/auxio_32.h1
-rw-r--r--arch/sparc/include/asm/backoff.h69
-rw-r--r--arch/sparc/include/asm/barrier.h8
-rw-r--r--arch/sparc/include/asm/barrier_32.h15
-rw-r--r--arch/sparc/include/asm/barrier_64.h56
-rw-r--r--arch/sparc/include/asm/bug.h3
-rw-r--r--arch/sparc/include/asm/cache.h114
-rw-r--r--arch/sparc/include/asm/cacheflush.h4
-rw-r--r--arch/sparc/include/asm/cacheflush_32.h82
-rw-r--r--arch/sparc/include/asm/cacheflush_64.h7
-rw-r--r--arch/sparc/include/asm/cachetlb_32.h29
-rw-r--r--arch/sparc/include/asm/cmpxchg.h8
-rw-r--r--arch/sparc/include/asm/cmpxchg_32.h85
-rw-r--r--arch/sparc/include/asm/cmpxchg_64.h145
-rw-r--r--arch/sparc/include/asm/compat.h69
-rw-r--r--arch/sparc/include/asm/contregs.h22
-rw-r--r--arch/sparc/include/asm/cpu_type.h28
-rw-r--r--arch/sparc/include/asm/cpudata_32.h1
-rw-r--r--arch/sparc/include/asm/dma-mapping.h28
-rw-r--r--arch/sparc/include/asm/dma.h52
-rw-r--r--arch/sparc/include/asm/elf_32.h16
-rw-r--r--arch/sparc/include/asm/elf_64.h9
-rw-r--r--arch/sparc/include/asm/fbio.h260
-rw-r--r--arch/sparc/include/asm/floppy_32.h46
-rw-r--r--arch/sparc/include/asm/floppy_64.h6
-rw-r--r--arch/sparc/include/asm/futex_64.h1
-rw-r--r--arch/sparc/include/asm/gpio.h40
-rw-r--r--arch/sparc/include/asm/head_32.h21
-rw-r--r--arch/sparc/include/asm/highmem.h5
-rw-r--r--arch/sparc/include/asm/hugetlb.h19
-rw-r--r--arch/sparc/include/asm/hypervisor.h11
-rw-r--r--arch/sparc/include/asm/io_32.h3
-rw-r--r--arch/sparc/include/asm/io_64.h3
-rw-r--r--arch/sparc/include/asm/ioctls.h129
-rw-r--r--arch/sparc/include/asm/irq_64.h1
-rw-r--r--arch/sparc/include/asm/irqflags_32.h1
-rw-r--r--arch/sparc/include/asm/jump_label.h2
-rw-r--r--arch/sparc/include/asm/leon.h145
-rw-r--r--arch/sparc/include/asm/leon_amba.h4
-rw-r--r--arch/sparc/include/asm/machines.h23
-rw-r--r--arch/sparc/include/asm/mbus.h4
-rw-r--r--arch/sparc/include/asm/mdesc.h1
-rw-r--r--arch/sparc/include/asm/mman.h25
-rw-r--r--arch/sparc/include/asm/mmu_64.h19
-rw-r--r--arch/sparc/include/asm/mmu_context_32.h19
-rw-r--r--arch/sparc/include/asm/mmu_context_64.h3
-rw-r--r--arch/sparc/include/asm/ns87303.h1
-rw-r--r--arch/sparc/include/asm/obio.h13
-rw-r--r--arch/sparc/include/asm/oplib_32.h10
-rw-r--r--arch/sparc/include/asm/oplib_64.h2
-rw-r--r--arch/sparc/include/asm/page_32.h24
-rw-r--r--arch/sparc/include/asm/page_64.h21
-rw-r--r--arch/sparc/include/asm/parport.h6
-rw-r--r--arch/sparc/include/asm/pci_32.h13
-rw-r--r--arch/sparc/include/asm/pci_64.h13
-rw-r--r--arch/sparc/include/asm/pcr.h36
-rw-r--r--arch/sparc/include/asm/pgalloc_32.h85
-rw-r--r--arch/sparc/include/asm/pgalloc_64.h56
-rw-r--r--arch/sparc/include/asm/pgtable_32.h433
-rw-r--r--arch/sparc/include/asm/pgtable_64.h270
-rw-r--r--arch/sparc/include/asm/pgtsrmmu.h136
-rw-r--r--arch/sparc/include/asm/processor.h3
-rw-r--r--arch/sparc/include/asm/processor_32.h5
-rw-r--r--arch/sparc/include/asm/processor_64.h38
-rw-r--r--arch/sparc/include/asm/prom.h18
-rw-r--r--arch/sparc/include/asm/psr.h28
-rw-r--r--arch/sparc/include/asm/ptrace.h383
-rw-r--r--arch/sparc/include/asm/sections.h3
-rw-r--r--arch/sparc/include/asm/setup.h23
-rw-r--r--arch/sparc/include/asm/shmparam_32.h4
-rw-r--r--arch/sparc/include/asm/sigcontext.h4
-rw-r--r--arch/sparc/include/asm/siginfo.h26
-rw-r--r--arch/sparc/include/asm/signal.h186
-rw-r--r--arch/sparc/include/asm/smp_32.h114
-rw-r--r--arch/sparc/include/asm/smp_64.h2
-rw-r--r--arch/sparc/include/asm/string_32.h63
-rw-r--r--arch/sparc/include/asm/switch_to.h8
-rw-r--r--arch/sparc/include/asm/switch_to_32.h106
-rw-r--r--arch/sparc/include/asm/switch_to_64.h72
-rw-r--r--arch/sparc/include/asm/syscalls.h2
-rw-r--r--arch/sparc/include/asm/termbits.h260
-rw-r--r--arch/sparc/include/asm/termios.h42
-rw-r--r--arch/sparc/include/asm/thread_info_32.h27
-rw-r--r--arch/sparc/include/asm/thread_info_64.h78
-rw-r--r--arch/sparc/include/asm/timer_32.h34
-rw-r--r--arch/sparc/include/asm/timer_64.h2
-rw-r--r--arch/sparc/include/asm/timex_32.h1
-rw-r--r--arch/sparc/include/asm/tlbflush_32.h56
-rw-r--r--arch/sparc/include/asm/topology_64.h19
-rw-r--r--arch/sparc/include/asm/traps.h111
-rw-r--r--arch/sparc/include/asm/tsb.h106
-rw-r--r--arch/sparc/include/asm/ttable.h24
-rw-r--r--arch/sparc/include/asm/uaccess.h6
-rw-r--r--arch/sparc/include/asm/uaccess_32.h33
-rw-r--r--arch/sparc/include/asm/uaccess_64.h22
-rw-r--r--arch/sparc/include/asm/unistd.h413
-rw-r--r--arch/sparc/include/asm/vaddrs.h38
-rw-r--r--arch/sparc/include/asm/vga.h1
-rw-r--r--arch/sparc/include/asm/vio.h9
-rw-r--r--arch/sparc/include/asm/winmacro.h49
104 files changed, 3541 insertions, 1810 deletions
diff --git a/arch/sparc/include/asm/Kbuild b/arch/sparc/include/asm/Kbuild
index e26d430ce2f..2c2e38821f6 100644
--- a/arch/sparc/include/asm/Kbuild
+++ b/arch/sparc/include/asm/Kbuild
@@ -1,12 +1,23 @@
1# User exported sparc header files 1# User exported sparc header files
2include include/asm-generic/Kbuild.asm
2 3
4header-y += apc.h
5header-y += asi.h
6header-y += display7seg.h
7header-y += envctrl.h
8header-y += fbio.h
9header-y += jsflash.h
10header-y += openpromio.h
11header-y += perfctr.h
12header-y += psrcompat.h
13header-y += psr.h
14header-y += pstate.h
15header-y += traps.h
16header-y += uctx.h
17header-y += utrap.h
18header-y += watchdog.h
3 19
4generic-y += clkdev.h
5generic-y += div64.h 20generic-y += div64.h
6generic-y += exec.h
7generic-y += local64.h 21generic-y += local64.h
8generic-y += irq_regs.h 22generic-y += irq_regs.h
9generic-y += local.h 23generic-y += local.h
10generic-y += module.h
11generic-y += trace_clock.h
12generic-y += word-at-a-time.h
diff --git a/arch/sparc/include/asm/asmmacro.h b/arch/sparc/include/asm/asmmacro.h
index a0e28ef0255..a995bf8aba3 100644
--- a/arch/sparc/include/asm/asmmacro.h
+++ b/arch/sparc/include/asm/asmmacro.h
@@ -6,6 +6,17 @@
6#ifndef _SPARC_ASMMACRO_H 6#ifndef _SPARC_ASMMACRO_H
7#define _SPARC_ASMMACRO_H 7#define _SPARC_ASMMACRO_H
8 8
9#include <asm/btfixup.h>
10#include <asm/asi.h>
11
12#define GET_PROCESSOR4M_ID(reg) \
13 rd %tbr, %reg; \
14 srl %reg, 12, %reg; \
15 and %reg, 3, %reg;
16
17#define GET_PROCESSOR4D_ID(reg) \
18 lda [%g0] ASI_M_VIKING_TMP1, %reg;
19
9/* All trap entry points _must_ begin with this macro or else you 20/* All trap entry points _must_ begin with this macro or else you
10 * lose. It makes sure the kernel has a proper window so that 21 * lose. It makes sure the kernel has a proper window so that
11 * c-code can be called. 22 * c-code can be called.
@@ -20,26 +31,10 @@
20/* All traps low-level code here must end with this macro. */ 31/* All traps low-level code here must end with this macro. */
21#define RESTORE_ALL b ret_trap_entry; clr %l6; 32#define RESTORE_ALL b ret_trap_entry; clr %l6;
22 33
23/* Support for run-time patching of single instructions. 34/* sun4 probably wants half word accesses to ASI_SEGMAP, while sun4c+
24 * This is used to handle the differences in the ASI for 35 likes byte accesses. These are to avoid ifdef mania. */
25 * MMUREGS for LEON and SUN. 36
26 * 37#define lduXa lduba
27 * Sample: 38#define stXa stba
28 * LEON_PI(lda [%g0] ASI_LEON_MMUREGS, %o0
29 * SUN_PI_(lda [%g0] ASI_M_MMUREGS, %o0
30 * PI == Patch Instruction
31 *
32 * For LEON we will use the first variant,
33 * and for all other we will use the SUN variant.
34 * The order is important.
35 */
36#define LEON_PI(...) \
37662: __VA_ARGS__
38
39#define SUN_PI_(...) \
40 .section .leon_1insn_patch, "ax"; \
41 .word 662b; \
42 __VA_ARGS__; \
43 .previous
44 39
45#endif /* !(_SPARC_ASMMACRO_H) */ 40#endif /* !(_SPARC_ASMMACRO_H) */
diff --git a/arch/sparc/include/asm/atomic_32.h b/arch/sparc/include/asm/atomic_32.h
index 905832aa9e9..5c3c8b69884 100644
--- a/arch/sparc/include/asm/atomic_32.h
+++ b/arch/sparc/include/asm/atomic_32.h
@@ -13,9 +13,9 @@
13 13
14#include <linux/types.h> 14#include <linux/types.h>
15 15
16#include <asm/cmpxchg.h> 16#ifdef __KERNEL__
17#include <asm-generic/atomic64.h>
18 17
18#include <asm/system.h>
19 19
20#define ATOMIC_INIT(i) { (i) } 20#define ATOMIC_INIT(i) { (i) }
21 21
@@ -52,10 +52,112 @@ extern void atomic_set(atomic_t *, int);
52#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0) 52#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
53#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0) 53#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
54 54
55
56/* This is the old 24-bit implementation. It's still used internally
57 * by some sparc-specific code, notably the semaphore implementation.
58 */
59typedef struct { volatile int counter; } atomic24_t;
60
61#ifndef CONFIG_SMP
62
63#define ATOMIC24_INIT(i) { (i) }
64#define atomic24_read(v) ((v)->counter)
65#define atomic24_set(v, i) (((v)->counter) = i)
66
67#else
68/* We do the bulk of the actual work out of line in two common
69 * routines in assembler, see arch/sparc/lib/atomic.S for the
70 * "fun" details.
71 *
72 * For SMP the trick is you embed the spin lock byte within
73 * the word, use the low byte so signedness is easily retained
74 * via a quick arithmetic shift. It looks like this:
75 *
76 * ----------------------------------------
77 * | signed 24-bit counter value | lock | atomic_t
78 * ----------------------------------------
79 * 31 8 7 0
80 */
81
82#define ATOMIC24_INIT(i) { ((i) << 8) }
83
84static inline int atomic24_read(const atomic24_t *v)
85{
86 int ret = v->counter;
87
88 while(ret & 0xff)
89 ret = v->counter;
90
91 return ret >> 8;
92}
93
94#define atomic24_set(v, i) (((v)->counter) = ((i) << 8))
95#endif
96
97static inline int __atomic24_add(int i, atomic24_t *v)
98{
99 register volatile int *ptr asm("g1");
100 register int increment asm("g2");
101 register int tmp1 asm("g3");
102 register int tmp2 asm("g4");
103 register int tmp3 asm("g7");
104
105 ptr = &v->counter;
106 increment = i;
107
108 __asm__ __volatile__(
109 "mov %%o7, %%g4\n\t"
110 "call ___atomic24_add\n\t"
111 " add %%o7, 8, %%o7\n"
112 : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3)
113 : "0" (increment), "r" (ptr)
114 : "memory", "cc");
115
116 return increment;
117}
118
119static inline int __atomic24_sub(int i, atomic24_t *v)
120{
121 register volatile int *ptr asm("g1");
122 register int increment asm("g2");
123 register int tmp1 asm("g3");
124 register int tmp2 asm("g4");
125 register int tmp3 asm("g7");
126
127 ptr = &v->counter;
128 increment = i;
129
130 __asm__ __volatile__(
131 "mov %%o7, %%g4\n\t"
132 "call ___atomic24_sub\n\t"
133 " add %%o7, 8, %%o7\n"
134 : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3)
135 : "0" (increment), "r" (ptr)
136 : "memory", "cc");
137
138 return increment;
139}
140
141#define atomic24_add(i, v) ((void)__atomic24_add((i), (v)))
142#define atomic24_sub(i, v) ((void)__atomic24_sub((i), (v)))
143
144#define atomic24_dec_return(v) __atomic24_sub(1, (v))
145#define atomic24_inc_return(v) __atomic24_add(1, (v))
146
147#define atomic24_sub_and_test(i, v) (__atomic24_sub((i), (v)) == 0)
148#define atomic24_dec_and_test(v) (__atomic24_sub(1, (v)) == 0)
149
150#define atomic24_inc(v) ((void)__atomic24_add(1, (v)))
151#define atomic24_dec(v) ((void)__atomic24_sub(1, (v)))
152
153#define atomic24_add_negative(i, v) (__atomic24_add((i), (v)) < 0)
154
55/* Atomic operations are already serializing */ 155/* Atomic operations are already serializing */
56#define smp_mb__before_atomic_dec() barrier() 156#define smp_mb__before_atomic_dec() barrier()
57#define smp_mb__after_atomic_dec() barrier() 157#define smp_mb__after_atomic_dec() barrier()
58#define smp_mb__before_atomic_inc() barrier() 158#define smp_mb__before_atomic_inc() barrier()
59#define smp_mb__after_atomic_inc() barrier() 159#define smp_mb__after_atomic_inc() barrier()
60 160
161#endif /* !(__KERNEL__) */
162
61#endif /* !(__ARCH_SPARC_ATOMIC__) */ 163#endif /* !(__ARCH_SPARC_ATOMIC__) */
diff --git a/arch/sparc/include/asm/atomic_64.h b/arch/sparc/include/asm/atomic_64.h
index be56a244c9c..9f421df46ae 100644
--- a/arch/sparc/include/asm/atomic_64.h
+++ b/arch/sparc/include/asm/atomic_64.h
@@ -1,14 +1,14 @@
1/* atomic.h: Thankfully the V9 is at least reasonable for this 1/* atomic.h: Thankfully the V9 is at least reasonable for this
2 * stuff. 2 * stuff.
3 * 3 *
4 * Copyright (C) 1996, 1997, 2000, 2012 David S. Miller (davem@redhat.com) 4 * Copyright (C) 1996, 1997, 2000 David S. Miller (davem@redhat.com)
5 */ 5 */
6 6
7#ifndef __ARCH_SPARC64_ATOMIC__ 7#ifndef __ARCH_SPARC64_ATOMIC__
8#define __ARCH_SPARC64_ATOMIC__ 8#define __ARCH_SPARC64_ATOMIC__
9 9
10#include <linux/types.h> 10#include <linux/types.h>
11#include <asm/cmpxchg.h> 11#include <asm/system.h>
12 12
13#define ATOMIC_INIT(i) { (i) } 13#define ATOMIC_INIT(i) { (i) }
14#define ATOMIC64_INIT(i) { (i) } 14#define ATOMIC64_INIT(i) { (i) }
@@ -85,6 +85,7 @@ static inline int __atomic_add_unless(atomic_t *v, int a, int u)
85 return c; 85 return c;
86} 86}
87 87
88
88#define atomic64_cmpxchg(v, o, n) \ 89#define atomic64_cmpxchg(v, o, n) \
89 ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n))) 90 ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
90#define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) 91#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
@@ -106,8 +107,6 @@ static inline long atomic64_add_unless(atomic64_t *v, long a, long u)
106 107
107#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) 108#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
108 109
109extern long atomic64_dec_if_positive(atomic64_t *v);
110
111/* Atomic operations are already serializing */ 110/* Atomic operations are already serializing */
112#define smp_mb__before_atomic_dec() barrier() 111#define smp_mb__before_atomic_dec() barrier()
113#define smp_mb__after_atomic_dec() barrier() 112#define smp_mb__after_atomic_dec() barrier()
diff --git a/arch/sparc/include/asm/auxio_32.h b/arch/sparc/include/asm/auxio_32.h
index 3a319775ae3..e03e088be95 100644
--- a/arch/sparc/include/asm/auxio_32.h
+++ b/arch/sparc/include/asm/auxio_32.h
@@ -6,6 +6,7 @@
6#ifndef _SPARC_AUXIO_H 6#ifndef _SPARC_AUXIO_H
7#define _SPARC_AUXIO_H 7#define _SPARC_AUXIO_H
8 8
9#include <asm/system.h>
9#include <asm/vaddrs.h> 10#include <asm/vaddrs.h>
10 11
11/* This register is an unsigned char in IO space. It does two things. 12/* This register is an unsigned char in IO space. It does two things.
diff --git a/arch/sparc/include/asm/backoff.h b/arch/sparc/include/asm/backoff.h
index 4e02086b839..db3af0d30fb 100644
--- a/arch/sparc/include/asm/backoff.h
+++ b/arch/sparc/include/asm/backoff.h
@@ -1,46 +1,6 @@
1#ifndef _SPARC64_BACKOFF_H 1#ifndef _SPARC64_BACKOFF_H
2#define _SPARC64_BACKOFF_H 2#define _SPARC64_BACKOFF_H
3 3
4/* The macros in this file implement an exponential backoff facility
5 * for atomic operations.
6 *
7 * When multiple threads compete on an atomic operation, it is
8 * possible for one thread to be continually denied a successful
9 * completion of the compare-and-swap instruction. Heavily
10 * threaded cpu implementations like Niagara can compound this
11 * problem even further.
12 *
13 * When an atomic operation fails and needs to be retried, we spin a
14 * certain number of times. At each subsequent failure of the same
15 * operation we double the spin count, realizing an exponential
16 * backoff.
17 *
18 * When we spin, we try to use an operation that will cause the
19 * current cpu strand to block, and therefore make the core fully
20 * available to any other other runnable strands. There are two
21 * options, based upon cpu capabilities.
22 *
23 * On all cpus prior to SPARC-T4 we do three dummy reads of the
24 * condition code register. Each read blocks the strand for something
25 * between 40 and 50 cpu cycles.
26 *
27 * For SPARC-T4 and later we have a special "pause" instruction
28 * available. This is implemented using writes to register %asr27.
29 * The cpu will block the number of cycles written into the register,
30 * unless a disrupting trap happens first. SPARC-T4 specifically
31 * implements pause with a granularity of 8 cycles. Each strand has
32 * an internal pause counter which decrements every 8 cycles. So the
33 * chip shifts the %asr27 value down by 3 bits, and writes the result
34 * into the pause counter. If a value smaller than 8 is written, the
35 * chip blocks for 1 cycle.
36 *
37 * To achieve the same amount of backoff as the three %ccr reads give
38 * on earlier chips, we shift the backoff value up by 7 bits. (Three
39 * %ccr reads block for about 128 cycles, 1 << 7 == 128) We write the
40 * whole amount we want to block into the pause register, rather than
41 * loop writing 128 each time.
42 */
43
44#define BACKOFF_LIMIT (4 * 1024) 4#define BACKOFF_LIMIT (4 * 1024)
45 5
46#ifdef CONFIG_SMP 6#ifdef CONFIG_SMP
@@ -51,25 +11,16 @@
51#define BACKOFF_LABEL(spin_label, continue_label) \ 11#define BACKOFF_LABEL(spin_label, continue_label) \
52 spin_label 12 spin_label
53 13
54#define BACKOFF_SPIN(reg, tmp, label) \ 14#define BACKOFF_SPIN(reg, tmp, label) \
55 mov reg, tmp; \ 15 mov reg, tmp; \
5688: rd %ccr, %g0; \ 1688: brnz,pt tmp, 88b; \
57 rd %ccr, %g0; \ 17 sub tmp, 1, tmp; \
58 rd %ccr, %g0; \ 18 set BACKOFF_LIMIT, tmp; \
59 .section .pause_3insn_patch,"ax";\ 19 cmp reg, tmp; \
60 .word 88b; \ 20 bg,pn %xcc, label; \
61 sllx tmp, 7, tmp; \ 21 nop; \
62 wr tmp, 0, %asr27; \ 22 ba,pt %xcc, label; \
63 clr tmp; \ 23 sllx reg, 1, reg;
64 .previous; \
65 brnz,pt tmp, 88b; \
66 sub tmp, 1, tmp; \
67 set BACKOFF_LIMIT, tmp; \
68 cmp reg, tmp; \
69 bg,pn %xcc, label; \
70 nop; \
71 ba,pt %xcc, label; \
72 sllx reg, 1, reg;
73 24
74#else 25#else
75 26
diff --git a/arch/sparc/include/asm/barrier.h b/arch/sparc/include/asm/barrier.h
deleted file mode 100644
index b25f02a029e..00000000000
--- a/arch/sparc/include/asm/barrier.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef ___ASM_SPARC_BARRIER_H
2#define ___ASM_SPARC_BARRIER_H
3#if defined(__sparc__) && defined(__arch64__)
4#include <asm/barrier_64.h>
5#else
6#include <asm/barrier_32.h>
7#endif
8#endif
diff --git a/arch/sparc/include/asm/barrier_32.h b/arch/sparc/include/asm/barrier_32.h
deleted file mode 100644
index c1b76654ee7..00000000000
--- a/arch/sparc/include/asm/barrier_32.h
+++ /dev/null
@@ -1,15 +0,0 @@
1#ifndef __SPARC_BARRIER_H
2#define __SPARC_BARRIER_H
3
4/* XXX Change this if we ever use a PSO mode kernel. */
5#define mb() __asm__ __volatile__ ("" : : : "memory")
6#define rmb() mb()
7#define wmb() mb()
8#define read_barrier_depends() do { } while(0)
9#define set_mb(__var, __value) do { __var = __value; mb(); } while(0)
10#define smp_mb() __asm__ __volatile__("":::"memory")
11#define smp_rmb() __asm__ __volatile__("":::"memory")
12#define smp_wmb() __asm__ __volatile__("":::"memory")
13#define smp_read_barrier_depends() do { } while(0)
14
15#endif /* !(__SPARC_BARRIER_H) */
diff --git a/arch/sparc/include/asm/barrier_64.h b/arch/sparc/include/asm/barrier_64.h
deleted file mode 100644
index 95d45986f90..00000000000
--- a/arch/sparc/include/asm/barrier_64.h
+++ /dev/null
@@ -1,56 +0,0 @@
1#ifndef __SPARC64_BARRIER_H
2#define __SPARC64_BARRIER_H
3
4/* These are here in an effort to more fully work around Spitfire Errata
5 * #51. Essentially, if a memory barrier occurs soon after a mispredicted
6 * branch, the chip can stop executing instructions until a trap occurs.
7 * Therefore, if interrupts are disabled, the chip can hang forever.
8 *
9 * It used to be believed that the memory barrier had to be right in the
10 * delay slot, but a case has been traced recently wherein the memory barrier
11 * was one instruction after the branch delay slot and the chip still hung.
12 * The offending sequence was the following in sym_wakeup_done() of the
13 * sym53c8xx_2 driver:
14 *
15 * call sym_ccb_from_dsa, 0
16 * movge %icc, 0, %l0
17 * brz,pn %o0, .LL1303
18 * mov %o0, %l2
19 * membar #LoadLoad
20 *
21 * The branch has to be mispredicted for the bug to occur. Therefore, we put
22 * the memory barrier explicitly into a "branch always, predicted taken"
23 * delay slot to avoid the problem case.
24 */
25#define membar_safe(type) \
26do { __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" \
27 " membar " type "\n" \
28 "1:\n" \
29 : : : "memory"); \
30} while (0)
31
32/* The kernel always executes in TSO memory model these days,
33 * and furthermore most sparc64 chips implement more stringent
34 * memory ordering than required by the specifications.
35 */
36#define mb() membar_safe("#StoreLoad")
37#define rmb() __asm__ __volatile__("":::"memory")
38#define wmb() __asm__ __volatile__("":::"memory")
39
40#define read_barrier_depends() do { } while(0)
41#define set_mb(__var, __value) \
42 do { __var = __value; membar_safe("#StoreLoad"); } while(0)
43
44#ifdef CONFIG_SMP
45#define smp_mb() mb()
46#define smp_rmb() rmb()
47#define smp_wmb() wmb()
48#else
49#define smp_mb() __asm__ __volatile__("":::"memory")
50#define smp_rmb() __asm__ __volatile__("":::"memory")
51#define smp_wmb() __asm__ __volatile__("":::"memory")
52#endif
53
54#define smp_read_barrier_depends() do { } while(0)
55
56#endif /* !(__SPARC64_BARRIER_H) */
diff --git a/arch/sparc/include/asm/bug.h b/arch/sparc/include/asm/bug.h
index 6bd9f43cb5a..8a59e5a8c21 100644
--- a/arch/sparc/include/asm/bug.h
+++ b/arch/sparc/include/asm/bug.h
@@ -19,7 +19,4 @@ extern void do_BUG(const char *file, int line);
19 19
20#include <asm-generic/bug.h> 20#include <asm-generic/bug.h>
21 21
22struct pt_regs;
23extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noreturn));
24
25#endif 22#endif
diff --git a/arch/sparc/include/asm/cache.h b/arch/sparc/include/asm/cache.h
index 5bb6991b485..69358b590c9 100644
--- a/arch/sparc/include/asm/cache.h
+++ b/arch/sparc/include/asm/cache.h
@@ -22,4 +22,118 @@
22 22
23#define __read_mostly __attribute__((__section__(".data..read_mostly"))) 23#define __read_mostly __attribute__((__section__(".data..read_mostly")))
24 24
25#ifdef CONFIG_SPARC32
26#include <asm/asi.h>
27
28/* Direct access to the instruction cache is provided through and
29 * alternate address space. The IDC bit must be off in the ICCR on
30 * HyperSparcs for these accesses to work. The code below does not do
31 * any checking, the caller must do so. These routines are for
32 * diagnostics only, but could end up being useful. Use with care.
33 * Also, you are asking for trouble if you execute these in one of the
34 * three instructions following a %asr/%psr access or modification.
35 */
36
37/* First, cache-tag access. */
38static inline unsigned int get_icache_tag(int setnum, int tagnum)
39{
40 unsigned int vaddr, retval;
41
42 vaddr = ((setnum&1) << 12) | ((tagnum&0x7f) << 5);
43 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
44 "=r" (retval) :
45 "r" (vaddr), "i" (ASI_M_TXTC_TAG));
46 return retval;
47}
48
49static inline void put_icache_tag(int setnum, int tagnum, unsigned int entry)
50{
51 unsigned int vaddr;
52
53 vaddr = ((setnum&1) << 12) | ((tagnum&0x7f) << 5);
54 __asm__ __volatile__("sta %0, [%1] %2\n\t" : :
55 "r" (entry), "r" (vaddr), "i" (ASI_M_TXTC_TAG) :
56 "memory");
57}
58
59/* Second cache-data access. The data is returned two-32bit quantities
60 * at a time.
61 */
62static inline void get_icache_data(int setnum, int tagnum, int subblock,
63 unsigned int *data)
64{
65 unsigned int value1, value2, vaddr;
66
67 vaddr = ((setnum&0x1) << 12) | ((tagnum&0x7f) << 5) |
68 ((subblock&0x3) << 3);
69 __asm__ __volatile__("ldda [%2] %3, %%g2\n\t"
70 "or %%g0, %%g2, %0\n\t"
71 "or %%g0, %%g3, %1\n\t" :
72 "=r" (value1), "=r" (value2) :
73 "r" (vaddr), "i" (ASI_M_TXTC_DATA) :
74 "g2", "g3");
75 data[0] = value1; data[1] = value2;
76}
77
78static inline void put_icache_data(int setnum, int tagnum, int subblock,
79 unsigned int *data)
80{
81 unsigned int value1, value2, vaddr;
82
83 vaddr = ((setnum&0x1) << 12) | ((tagnum&0x7f) << 5) |
84 ((subblock&0x3) << 3);
85 value1 = data[0]; value2 = data[1];
86 __asm__ __volatile__("or %%g0, %0, %%g2\n\t"
87 "or %%g0, %1, %%g3\n\t"
88 "stda %%g2, [%2] %3\n\t" : :
89 "r" (value1), "r" (value2),
90 "r" (vaddr), "i" (ASI_M_TXTC_DATA) :
91 "g2", "g3", "memory" /* no joke */);
92}
93
94/* Different types of flushes with the ICACHE. Some of the flushes
95 * affect both the ICACHE and the external cache. Others only clear
96 * the ICACHE entries on the cpu itself. V8's (most) allow
97 * granularity of flushes on the packet (element in line), whole line,
98 * and entire cache (ie. all lines) level. The ICACHE only flushes are
99 * ROSS HyperSparc specific and are in ross.h
100 */
101
102/* Flushes which clear out both the on-chip and external caches */
103static inline void flush_ei_page(unsigned int addr)
104{
105 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
106 "r" (addr), "i" (ASI_M_FLUSH_PAGE) :
107 "memory");
108}
109
110static inline void flush_ei_seg(unsigned int addr)
111{
112 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
113 "r" (addr), "i" (ASI_M_FLUSH_SEG) :
114 "memory");
115}
116
117static inline void flush_ei_region(unsigned int addr)
118{
119 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
120 "r" (addr), "i" (ASI_M_FLUSH_REGION) :
121 "memory");
122}
123
124static inline void flush_ei_ctx(unsigned int addr)
125{
126 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
127 "r" (addr), "i" (ASI_M_FLUSH_CTX) :
128 "memory");
129}
130
131static inline void flush_ei_user(unsigned int addr)
132{
133 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
134 "r" (addr), "i" (ASI_M_FLUSH_USER) :
135 "memory");
136}
137#endif /* CONFIG_SPARC32 */
138
25#endif /* !(_SPARC_CACHE_H) */ 139#endif /* !(_SPARC_CACHE_H) */
diff --git a/arch/sparc/include/asm/cacheflush.h b/arch/sparc/include/asm/cacheflush.h
index f6c4839b838..049168087b1 100644
--- a/arch/sparc/include/asm/cacheflush.h
+++ b/arch/sparc/include/asm/cacheflush.h
@@ -1,9 +1,5 @@
1#ifndef ___ASM_SPARC_CACHEFLUSH_H 1#ifndef ___ASM_SPARC_CACHEFLUSH_H
2#define ___ASM_SPARC_CACHEFLUSH_H 2#define ___ASM_SPARC_CACHEFLUSH_H
3
4/* flush addr - to allow use of self-modifying code */
5#define flushi(addr) __asm__ __volatile__ ("flush %0" : : "r" (addr) : "memory")
6
7#if defined(__sparc__) && defined(__arch64__) 3#if defined(__sparc__) && defined(__arch64__)
8#include <asm/cacheflush_64.h> 4#include <asm/cacheflush_64.h>
9#else 5#else
diff --git a/arch/sparc/include/asm/cacheflush_32.h b/arch/sparc/include/asm/cacheflush_32.h
index bb014c24f31..2e468773f25 100644
--- a/arch/sparc/include/asm/cacheflush_32.h
+++ b/arch/sparc/include/asm/cacheflush_32.h
@@ -1,18 +1,56 @@
1#ifndef _SPARC_CACHEFLUSH_H 1#ifndef _SPARC_CACHEFLUSH_H
2#define _SPARC_CACHEFLUSH_H 2#define _SPARC_CACHEFLUSH_H
3 3
4#include <asm/cachetlb_32.h> 4#include <linux/mm.h> /* Common for other includes */
5 5// #include <linux/kernel.h> from pgalloc.h
6#define flush_cache_all() \ 6// #include <linux/sched.h> from pgalloc.h
7 sparc32_cachetlb_ops->cache_all() 7
8#define flush_cache_mm(mm) \ 8// #include <asm/page.h>
9 sparc32_cachetlb_ops->cache_mm(mm) 9#include <asm/btfixup.h>
10#define flush_cache_dup_mm(mm) \ 10
11 sparc32_cachetlb_ops->cache_mm(mm) 11/*
12#define flush_cache_range(vma,start,end) \ 12 * Fine grained cache flushing.
13 sparc32_cachetlb_ops->cache_range(vma, start, end) 13 */
14#define flush_cache_page(vma,addr,pfn) \ 14#ifdef CONFIG_SMP
15 sparc32_cachetlb_ops->cache_page(vma, addr) 15
16BTFIXUPDEF_CALL(void, local_flush_cache_all, void)
17BTFIXUPDEF_CALL(void, local_flush_cache_mm, struct mm_struct *)
18BTFIXUPDEF_CALL(void, local_flush_cache_range, struct vm_area_struct *, unsigned long, unsigned long)
19BTFIXUPDEF_CALL(void, local_flush_cache_page, struct vm_area_struct *, unsigned long)
20
21#define local_flush_cache_all() BTFIXUP_CALL(local_flush_cache_all)()
22#define local_flush_cache_mm(mm) BTFIXUP_CALL(local_flush_cache_mm)(mm)
23#define local_flush_cache_range(vma,start,end) BTFIXUP_CALL(local_flush_cache_range)(vma,start,end)
24#define local_flush_cache_page(vma,addr) BTFIXUP_CALL(local_flush_cache_page)(vma,addr)
25
26BTFIXUPDEF_CALL(void, local_flush_page_to_ram, unsigned long)
27BTFIXUPDEF_CALL(void, local_flush_sig_insns, struct mm_struct *, unsigned long)
28
29#define local_flush_page_to_ram(addr) BTFIXUP_CALL(local_flush_page_to_ram)(addr)
30#define local_flush_sig_insns(mm,insn_addr) BTFIXUP_CALL(local_flush_sig_insns)(mm,insn_addr)
31
32extern void smp_flush_cache_all(void);
33extern void smp_flush_cache_mm(struct mm_struct *mm);
34extern void smp_flush_cache_range(struct vm_area_struct *vma,
35 unsigned long start,
36 unsigned long end);
37extern void smp_flush_cache_page(struct vm_area_struct *vma, unsigned long page);
38
39extern void smp_flush_page_to_ram(unsigned long page);
40extern void smp_flush_sig_insns(struct mm_struct *mm, unsigned long insn_addr);
41
42#endif /* CONFIG_SMP */
43
44BTFIXUPDEF_CALL(void, flush_cache_all, void)
45BTFIXUPDEF_CALL(void, flush_cache_mm, struct mm_struct *)
46BTFIXUPDEF_CALL(void, flush_cache_range, struct vm_area_struct *, unsigned long, unsigned long)
47BTFIXUPDEF_CALL(void, flush_cache_page, struct vm_area_struct *, unsigned long)
48
49#define flush_cache_all() BTFIXUP_CALL(flush_cache_all)()
50#define flush_cache_mm(mm) BTFIXUP_CALL(flush_cache_mm)(mm)
51#define flush_cache_dup_mm(mm) BTFIXUP_CALL(flush_cache_mm)(mm)
52#define flush_cache_range(vma,start,end) BTFIXUP_CALL(flush_cache_range)(vma,start,end)
53#define flush_cache_page(vma,addr,pfn) BTFIXUP_CALL(flush_cache_page)(vma,addr)
16#define flush_icache_range(start, end) do { } while (0) 54#define flush_icache_range(start, end) do { } while (0)
17#define flush_icache_page(vma, pg) do { } while (0) 55#define flush_icache_page(vma, pg) do { } while (0)
18 56
@@ -29,12 +67,11 @@
29 memcpy(dst, src, len); \ 67 memcpy(dst, src, len); \
30 } while (0) 68 } while (0)
31 69
32#define __flush_page_to_ram(addr) \ 70BTFIXUPDEF_CALL(void, __flush_page_to_ram, unsigned long)
33 sparc32_cachetlb_ops->page_to_ram(addr) 71BTFIXUPDEF_CALL(void, flush_sig_insns, struct mm_struct *, unsigned long)
34#define flush_sig_insns(mm,insn_addr) \ 72
35 sparc32_cachetlb_ops->sig_insns(mm, insn_addr) 73#define __flush_page_to_ram(addr) BTFIXUP_CALL(__flush_page_to_ram)(addr)
36#define flush_page_for_dma(addr) \ 74#define flush_sig_insns(mm,insn_addr) BTFIXUP_CALL(flush_sig_insns)(mm,insn_addr)
37 sparc32_cachetlb_ops->page_for_dma(addr)
38 75
39extern void sparc_flush_page_to_ram(struct page *page); 76extern void sparc_flush_page_to_ram(struct page *page);
40 77
@@ -46,13 +83,4 @@ extern void sparc_flush_page_to_ram(struct page *page);
46#define flush_cache_vmap(start, end) flush_cache_all() 83#define flush_cache_vmap(start, end) flush_cache_all()
47#define flush_cache_vunmap(start, end) flush_cache_all() 84#define flush_cache_vunmap(start, end) flush_cache_all()
48 85
49/* When a context switch happens we must flush all user windows so that
50 * the windows of the current process are flushed onto its stack. This
51 * way the windows are all clean for the next process and the stack
52 * frames are up to date.
53 */
54extern void flush_user_windows(void);
55extern void kill_user_windows(void);
56extern void flushw_all(void);
57
58#endif /* _SPARC_CACHEFLUSH_H */ 86#endif /* _SPARC_CACHEFLUSH_H */
diff --git a/arch/sparc/include/asm/cacheflush_64.h b/arch/sparc/include/asm/cacheflush_64.h
index 301736d9e7a..b95384033e8 100644
--- a/arch/sparc/include/asm/cacheflush_64.h
+++ b/arch/sparc/include/asm/cacheflush_64.h
@@ -8,13 +8,6 @@
8#include <linux/mm.h> 8#include <linux/mm.h>
9 9
10/* Cache flush operations. */ 10/* Cache flush operations. */
11#define flushw_all() __asm__ __volatile__("flushw")
12
13extern void __flushw_user(void);
14#define flushw_user() __flushw_user()
15
16#define flush_user_windows flushw_user
17#define flush_register_windows flushw_all
18 11
19/* These are the same regardless of whether this is an SMP kernel or not. */ 12/* These are the same regardless of whether this is an SMP kernel or not. */
20#define flush_cache_mm(__mm) \ 13#define flush_cache_mm(__mm) \
diff --git a/arch/sparc/include/asm/cachetlb_32.h b/arch/sparc/include/asm/cachetlb_32.h
deleted file mode 100644
index efb19889a08..00000000000
--- a/arch/sparc/include/asm/cachetlb_32.h
+++ /dev/null
@@ -1,29 +0,0 @@
1#ifndef _SPARC_CACHETLB_H
2#define _SPARC_CACHETLB_H
3
4struct mm_struct;
5struct vm_area_struct;
6
7struct sparc32_cachetlb_ops {
8 void (*cache_all)(void);
9 void (*cache_mm)(struct mm_struct *);
10 void (*cache_range)(struct vm_area_struct *, unsigned long,
11 unsigned long);
12 void (*cache_page)(struct vm_area_struct *, unsigned long);
13
14 void (*tlb_all)(void);
15 void (*tlb_mm)(struct mm_struct *);
16 void (*tlb_range)(struct vm_area_struct *, unsigned long,
17 unsigned long);
18 void (*tlb_page)(struct vm_area_struct *, unsigned long);
19
20 void (*page_to_ram)(unsigned long);
21 void (*sig_insns)(struct mm_struct *, unsigned long);
22 void (*page_for_dma)(unsigned long);
23};
24extern const struct sparc32_cachetlb_ops *sparc32_cachetlb_ops;
25#ifdef CONFIG_SMP
26extern const struct sparc32_cachetlb_ops *local_ops;
27#endif
28
29#endif /* SPARC_CACHETLB_H */
diff --git a/arch/sparc/include/asm/cmpxchg.h b/arch/sparc/include/asm/cmpxchg.h
deleted file mode 100644
index 9355893efa5..00000000000
--- a/arch/sparc/include/asm/cmpxchg.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef ___ASM_SPARC_CMPXCHG_H
2#define ___ASM_SPARC_CMPXCHG_H
3#if defined(__sparc__) && defined(__arch64__)
4#include <asm/cmpxchg_64.h>
5#else
6#include <asm/cmpxchg_32.h>
7#endif
8#endif
diff --git a/arch/sparc/include/asm/cmpxchg_32.h b/arch/sparc/include/asm/cmpxchg_32.h
deleted file mode 100644
index 1fae1a02e3c..00000000000
--- a/arch/sparc/include/asm/cmpxchg_32.h
+++ /dev/null
@@ -1,85 +0,0 @@
1/* 32-bit atomic xchg() and cmpxchg() definitions.
2 *
3 * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 2000 Anton Blanchard (anton@linuxcare.com.au)
5 * Copyright (C) 2007 Kyle McMartin (kyle@parisc-linux.org)
6 *
7 * Additions by Keith M Wesolowski (wesolows@foobazco.org) based
8 * on asm-parisc/atomic.h Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>.
9 */
10
11#ifndef __ARCH_SPARC_CMPXCHG__
12#define __ARCH_SPARC_CMPXCHG__
13
14static inline unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val)
15{
16 __asm__ __volatile__("swap [%2], %0"
17 : "=&r" (val)
18 : "0" (val), "r" (m)
19 : "memory");
20 return val;
21}
22
23extern void __xchg_called_with_bad_pointer(void);
24
25static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, int size)
26{
27 switch (size) {
28 case 4:
29 return xchg_u32(ptr, x);
30 }
31 __xchg_called_with_bad_pointer();
32 return x;
33}
34
35#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
36
37/* Emulate cmpxchg() the same way we emulate atomics,
38 * by hashing the object address and indexing into an array
39 * of spinlocks to get a bit of performance...
40 *
41 * See arch/sparc/lib/atomic32.c for implementation.
42 *
43 * Cribbed from <asm-parisc/atomic.h>
44 */
45#define __HAVE_ARCH_CMPXCHG 1
46
47/* bug catcher for when unsupported size is used - won't link */
48extern void __cmpxchg_called_with_bad_pointer(void);
49/* we only need to support cmpxchg of a u32 on sparc */
50extern unsigned long __cmpxchg_u32(volatile u32 *m, u32 old, u32 new_);
51
52/* don't worry...optimizer will get rid of most of this */
53static inline unsigned long
54__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size)
55{
56 switch (size) {
57 case 4:
58 return __cmpxchg_u32((u32 *)ptr, (u32)old, (u32)new_);
59 default:
60 __cmpxchg_called_with_bad_pointer();
61 break;
62 }
63 return old;
64}
65
66#define cmpxchg(ptr, o, n) \
67({ \
68 __typeof__(*(ptr)) _o_ = (o); \
69 __typeof__(*(ptr)) _n_ = (n); \
70 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
71 (unsigned long)_n_, sizeof(*(ptr))); \
72})
73
74#include <asm-generic/cmpxchg-local.h>
75
76/*
77 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
78 * them available.
79 */
80#define cmpxchg_local(ptr, o, n) \
81 ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
82 (unsigned long)(n), sizeof(*(ptr))))
83#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
84
85#endif /* __ARCH_SPARC_CMPXCHG__ */
diff --git a/arch/sparc/include/asm/cmpxchg_64.h b/arch/sparc/include/asm/cmpxchg_64.h
deleted file mode 100644
index b30eb37294c..00000000000
--- a/arch/sparc/include/asm/cmpxchg_64.h
+++ /dev/null
@@ -1,145 +0,0 @@
1/* 64-bit atomic xchg() and cmpxchg() definitions.
2 *
3 * Copyright (C) 1996, 1997, 2000 David S. Miller (davem@redhat.com)
4 */
5
6#ifndef __ARCH_SPARC64_CMPXCHG__
7#define __ARCH_SPARC64_CMPXCHG__
8
9static inline unsigned long xchg32(__volatile__ unsigned int *m, unsigned int val)
10{
11 unsigned long tmp1, tmp2;
12
13 __asm__ __volatile__(
14" mov %0, %1\n"
15"1: lduw [%4], %2\n"
16" cas [%4], %2, %0\n"
17" cmp %2, %0\n"
18" bne,a,pn %%icc, 1b\n"
19" mov %1, %0\n"
20 : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2)
21 : "0" (val), "r" (m)
22 : "cc", "memory");
23 return val;
24}
25
26static inline unsigned long xchg64(__volatile__ unsigned long *m, unsigned long val)
27{
28 unsigned long tmp1, tmp2;
29
30 __asm__ __volatile__(
31" mov %0, %1\n"
32"1: ldx [%4], %2\n"
33" casx [%4], %2, %0\n"
34" cmp %2, %0\n"
35" bne,a,pn %%xcc, 1b\n"
36" mov %1, %0\n"
37 : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2)
38 : "0" (val), "r" (m)
39 : "cc", "memory");
40 return val;
41}
42
43#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
44
45extern void __xchg_called_with_bad_pointer(void);
46
47static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr,
48 int size)
49{
50 switch (size) {
51 case 4:
52 return xchg32(ptr, x);
53 case 8:
54 return xchg64(ptr, x);
55 }
56 __xchg_called_with_bad_pointer();
57 return x;
58}
59
60/*
61 * Atomic compare and exchange. Compare OLD with MEM, if identical,
62 * store NEW in MEM. Return the initial value in MEM. Success is
63 * indicated by comparing RETURN with OLD.
64 */
65
66#include <asm-generic/cmpxchg-local.h>
67
68#define __HAVE_ARCH_CMPXCHG 1
69
70static inline unsigned long
71__cmpxchg_u32(volatile int *m, int old, int new)
72{
73 __asm__ __volatile__("cas [%2], %3, %0"
74 : "=&r" (new)
75 : "0" (new), "r" (m), "r" (old)
76 : "memory");
77
78 return new;
79}
80
81static inline unsigned long
82__cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new)
83{
84 __asm__ __volatile__("casx [%2], %3, %0"
85 : "=&r" (new)
86 : "0" (new), "r" (m), "r" (old)
87 : "memory");
88
89 return new;
90}
91
92/* This function doesn't exist, so you'll get a linker error
93 if something tries to do an invalid cmpxchg(). */
94extern void __cmpxchg_called_with_bad_pointer(void);
95
96static inline unsigned long
97__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
98{
99 switch (size) {
100 case 4:
101 return __cmpxchg_u32(ptr, old, new);
102 case 8:
103 return __cmpxchg_u64(ptr, old, new);
104 }
105 __cmpxchg_called_with_bad_pointer();
106 return old;
107}
108
109#define cmpxchg(ptr,o,n) \
110 ({ \
111 __typeof__(*(ptr)) _o_ = (o); \
112 __typeof__(*(ptr)) _n_ = (n); \
113 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
114 (unsigned long)_n_, sizeof(*(ptr))); \
115 })
116
117/*
118 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
119 * them available.
120 */
121
122static inline unsigned long __cmpxchg_local(volatile void *ptr,
123 unsigned long old,
124 unsigned long new, int size)
125{
126 switch (size) {
127 case 4:
128 case 8: return __cmpxchg(ptr, old, new, size);
129 default:
130 return __cmpxchg_local_generic(ptr, old, new, size);
131 }
132
133 return old;
134}
135
136#define cmpxchg_local(ptr, o, n) \
137 ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
138 (unsigned long)(n), sizeof(*(ptr))))
139#define cmpxchg64_local(ptr, o, n) \
140 ({ \
141 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
142 cmpxchg_local((ptr), (o), (n)); \
143 })
144
145#endif /* __ARCH_SPARC64_CMPXCHG__ */
diff --git a/arch/sparc/include/asm/compat.h b/arch/sparc/include/asm/compat.h
index 830502fe62b..6f57325bb88 100644
--- a/arch/sparc/include/asm/compat.h
+++ b/arch/sparc/include/asm/compat.h
@@ -36,7 +36,6 @@ typedef s64 compat_s64;
36typedef u32 compat_uint_t; 36typedef u32 compat_uint_t;
37typedef u32 compat_ulong_t; 37typedef u32 compat_ulong_t;
38typedef u64 compat_u64; 38typedef u64 compat_u64;
39typedef u32 compat_uptr_t;
40 39
41struct compat_timespec { 40struct compat_timespec {
42 compat_time_t tv_sec; 41 compat_time_t tv_sec;
@@ -135,8 +134,7 @@ struct compat_statfs {
135 compat_fsid_t f_fsid; 134 compat_fsid_t f_fsid;
136 int f_namelen; /* SunOS ignores this field. */ 135 int f_namelen; /* SunOS ignores this field. */
137 int f_frsize; 136 int f_frsize;
138 int f_flags; 137 int f_spare[5];
139 int f_spare[4];
140}; 138};
141 139
142#define COMPAT_RLIM_INFINITY 0x7fffffff 140#define COMPAT_RLIM_INFINITY 0x7fffffff
@@ -148,65 +146,6 @@ typedef u32 compat_old_sigset_t;
148 146
149typedef u32 compat_sigset_word; 147typedef u32 compat_sigset_word;
150 148
151typedef union compat_sigval {
152 compat_int_t sival_int;
153 compat_uptr_t sival_ptr;
154} compat_sigval_t;
155
156#define SI_PAD_SIZE32 (128/sizeof(int) - 3)
157
158typedef struct compat_siginfo {
159 int si_signo;
160 int si_errno;
161 int si_code;
162
163 union {
164 int _pad[SI_PAD_SIZE32];
165
166 /* kill() */
167 struct {
168 compat_pid_t _pid; /* sender's pid */
169 unsigned int _uid; /* sender's uid */
170 } _kill;
171
172 /* POSIX.1b timers */
173 struct {
174 compat_timer_t _tid; /* timer id */
175 int _overrun; /* overrun count */
176 compat_sigval_t _sigval; /* same as below */
177 int _sys_private; /* not to be passed to user */
178 } _timer;
179
180 /* POSIX.1b signals */
181 struct {
182 compat_pid_t _pid; /* sender's pid */
183 unsigned int _uid; /* sender's uid */
184 compat_sigval_t _sigval;
185 } _rt;
186
187 /* SIGCHLD */
188 struct {
189 compat_pid_t _pid; /* which child */
190 unsigned int _uid; /* sender's uid */
191 int _status; /* exit code */
192 compat_clock_t _utime;
193 compat_clock_t _stime;
194 } _sigchld;
195
196 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS, SIGEMT */
197 struct {
198 u32 _addr; /* faulting insn/memory ref. */
199 int _trapno;
200 } _sigfault;
201
202 /* SIGPOLL */
203 struct {
204 int _band; /* POLL_IN, POLL_OUT, POLL_MSG */
205 int _fd;
206 } _sigpoll;
207 } _sifields;
208} compat_siginfo_t;
209
210#define COMPAT_OFF_T_MAX 0x7fffffff 149#define COMPAT_OFF_T_MAX 0x7fffffff
211#define COMPAT_LOFF_T_MAX 0x7fffffffffffffffL 150#define COMPAT_LOFF_T_MAX 0x7fffffffffffffffL
212 151
@@ -216,6 +155,7 @@ typedef struct compat_siginfo {
216 * as pointers because the syscall entry code will have 155 * as pointers because the syscall entry code will have
217 * appropriately converted them already. 156 * appropriately converted them already.
218 */ 157 */
158typedef u32 compat_uptr_t;
219 159
220static inline void __user *compat_ptr(compat_uptr_t uptr) 160static inline void __user *compat_ptr(compat_uptr_t uptr)
221{ 161{
@@ -232,10 +172,9 @@ static inline void __user *arch_compat_alloc_user_space(long len)
232 struct pt_regs *regs = current_thread_info()->kregs; 172 struct pt_regs *regs = current_thread_info()->kregs;
233 unsigned long usp = regs->u_regs[UREG_I6]; 173 unsigned long usp = regs->u_regs[UREG_I6];
234 174
235 if (test_thread_64bit_stack(usp)) 175 if (!(test_thread_flag(TIF_32BIT)))
236 usp += STACK_BIAS; 176 usp += STACK_BIAS;
237 177 else
238 if (test_thread_flag(TIF_32BIT))
239 usp &= 0xffffffffUL; 178 usp &= 0xffffffffUL;
240 179
241 usp -= len; 180 usp -= len;
diff --git a/arch/sparc/include/asm/contregs.h b/arch/sparc/include/asm/contregs.h
index b8abdfcf555..48fa8a4ef35 100644
--- a/arch/sparc/include/asm/contregs.h
+++ b/arch/sparc/include/asm/contregs.h
@@ -7,6 +7,28 @@
7 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) 7 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
8 */ 8 */
9 9
10/* 3=sun3
11 4=sun4 (as in sun4 sysmaint student book)
12 c=sun4c (according to davem) */
13
14#define AC_IDPROM 0x00000000 /* 34 ID PROM, R/O, byte, 32 bytes */
15#define AC_PAGEMAP 0x10000000 /* 3 Pagemap R/W, long */
16#define AC_SEGMAP 0x20000000 /* 3 Segment map, byte */
17#define AC_CONTEXT 0x30000000 /* 34c current mmu-context */
18#define AC_SENABLE 0x40000000 /* 34c system dvma/cache/reset enable reg*/
19#define AC_UDVMA_ENB 0x50000000 /* 34 Not used on Sun boards, byte */
20#define AC_BUS_ERROR 0x60000000 /* 34 Not cleared on read, byte. */
21#define AC_SYNC_ERR 0x60000000 /* c fault type */
22#define AC_SYNC_VA 0x60000004 /* c fault virtual address */
23#define AC_ASYNC_ERR 0x60000008 /* c asynchronous fault type */
24#define AC_ASYNC_VA 0x6000000c /* c async fault virtual address */
25#define AC_LEDS 0x70000000 /* 34 Zero turns on LEDs, byte */
26#define AC_CACHETAGS 0x80000000 /* 34c direct access to the VAC tags */
27#define AC_CACHEDDATA 0x90000000 /* 3 c direct access to the VAC data */
28#define AC_UDVMA_MAP 0xD0000000 /* 4 Not used on Sun boards, byte */
29#define AC_VME_VECTOR 0xE0000000 /* 4 For non-Autovector VME, byte */
30#define AC_BOOT_SCC 0xF0000000 /* 34 bypass to access Zilog 8530. byte.*/
31
10/* s=Swift, h=Ross_HyperSPARC, v=TI_Viking, t=Tsunami, r=Ross_Cypress */ 32/* s=Swift, h=Ross_HyperSPARC, v=TI_Viking, t=Tsunami, r=Ross_Cypress */
11#define AC_M_PCR 0x0000 /* shv Processor Control Reg */ 33#define AC_M_PCR 0x0000 /* shv Processor Control Reg */
12#define AC_M_CTPR 0x0100 /* shv Context Table Pointer Reg */ 34#define AC_M_CTPR 0x0100 /* shv Context Table Pointer Reg */
diff --git a/arch/sparc/include/asm/cpu_type.h b/arch/sparc/include/asm/cpu_type.h
deleted file mode 100644
index 84d7d83b808..00000000000
--- a/arch/sparc/include/asm/cpu_type.h
+++ /dev/null
@@ -1,28 +0,0 @@
1#ifndef __ASM_CPU_TYPE_H
2#define __ASM_CPU_TYPE_H
3
4/*
5 * Sparc (general) CPU types
6 */
7enum sparc_cpu {
8 sun4m = 0x00,
9 sun4d = 0x01,
10 sun4e = 0x02,
11 sun4u = 0x03, /* V8 ploos ploos */
12 sun_unknown = 0x04,
13 ap1000 = 0x05, /* almost a sun4m */
14 sparc_leon = 0x06, /* Leon SoC */
15};
16
17#ifdef CONFIG_SPARC32
18extern enum sparc_cpu sparc_cpu_model;
19
20#define SUN4M_NCPUS 4 /* Architectural limit of sun4m. */
21
22#else
23
24#define sparc_cpu_model sun4u
25
26#endif
27
28#endif /* __ASM_CPU_TYPE_H */
diff --git a/arch/sparc/include/asm/cpudata_32.h b/arch/sparc/include/asm/cpudata_32.h
index 0300d94c25b..a4c5a938b93 100644
--- a/arch/sparc/include/asm/cpudata_32.h
+++ b/arch/sparc/include/asm/cpudata_32.h
@@ -14,6 +14,7 @@
14typedef struct { 14typedef struct {
15 unsigned long udelay_val; 15 unsigned long udelay_val;
16 unsigned long clock_tick; 16 unsigned long clock_tick;
17 unsigned int multiplier;
17 unsigned int counter; 18 unsigned int counter;
18#ifdef CONFIG_SMP 19#ifdef CONFIG_SMP
19 unsigned int irq_resched_count; 20 unsigned int irq_resched_count;
diff --git a/arch/sparc/include/asm/dma-mapping.h b/arch/sparc/include/asm/dma-mapping.h
index 05fe53f5346..8c0e4f7bb20 100644
--- a/arch/sparc/include/asm/dma-mapping.h
+++ b/arch/sparc/include/asm/dma-mapping.h
@@ -12,18 +12,13 @@ extern int dma_supported(struct device *dev, u64 mask);
12#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 12#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
13#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) 13#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
14 14
15extern struct dma_map_ops *dma_ops; 15extern struct dma_map_ops *dma_ops, pci32_dma_ops;
16extern struct dma_map_ops *leon_dma_ops;
17extern struct dma_map_ops pci32_dma_ops;
18
19extern struct bus_type pci_bus_type; 16extern struct bus_type pci_bus_type;
20 17
21static inline struct dma_map_ops *get_dma_ops(struct device *dev) 18static inline struct dma_map_ops *get_dma_ops(struct device *dev)
22{ 19{
23#if defined(CONFIG_SPARC32) && defined(CONFIG_PCI) 20#if defined(CONFIG_SPARC32) && defined(CONFIG_PCI)
24 if (sparc_cpu_model == sparc_leon) 21 if (dev->bus == &pci_bus_type)
25 return leon_dma_ops;
26 else if (dev->bus == &pci_bus_type)
27 return &pci32_dma_ops; 22 return &pci32_dma_ops;
28#endif 23#endif
29 return dma_ops; 24 return dma_ops;
@@ -31,35 +26,28 @@ static inline struct dma_map_ops *get_dma_ops(struct device *dev)
31 26
32#include <asm-generic/dma-mapping-common.h> 27#include <asm-generic/dma-mapping-common.h>
33 28
34#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL) 29static inline void *dma_alloc_coherent(struct device *dev, size_t size,
35 30 dma_addr_t *dma_handle, gfp_t flag)
36static inline void *dma_alloc_attrs(struct device *dev, size_t size,
37 dma_addr_t *dma_handle, gfp_t flag,
38 struct dma_attrs *attrs)
39{ 31{
40 struct dma_map_ops *ops = get_dma_ops(dev); 32 struct dma_map_ops *ops = get_dma_ops(dev);
41 void *cpu_addr; 33 void *cpu_addr;
42 34
43 cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs); 35 cpu_addr = ops->alloc_coherent(dev, size, dma_handle, flag);
44 debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr); 36 debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
45 return cpu_addr; 37 return cpu_addr;
46} 38}
47 39
48#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL) 40static inline void dma_free_coherent(struct device *dev, size_t size,
49 41 void *cpu_addr, dma_addr_t dma_handle)
50static inline void dma_free_attrs(struct device *dev, size_t size,
51 void *cpu_addr, dma_addr_t dma_handle,
52 struct dma_attrs *attrs)
53{ 42{
54 struct dma_map_ops *ops = get_dma_ops(dev); 43 struct dma_map_ops *ops = get_dma_ops(dev);
55 44
56 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle); 45 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
57 ops->free(dev, size, cpu_addr, dma_handle, attrs); 46 ops->free_coherent(dev, size, cpu_addr, dma_handle);
58} 47}
59 48
60static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 49static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
61{ 50{
62 debug_dma_mapping_error(dev, dma_addr);
63 return (dma_addr == DMA_ERROR_CODE); 51 return (dma_addr == DMA_ERROR_CODE);
64} 52}
65 53
diff --git a/arch/sparc/include/asm/dma.h b/arch/sparc/include/asm/dma.h
index 3d434ef5eae..b554927bbaf 100644
--- a/arch/sparc/include/asm/dma.h
+++ b/arch/sparc/include/asm/dma.h
@@ -92,31 +92,27 @@ extern int isa_dma_bridge_buggy;
92#ifdef CONFIG_SPARC32 92#ifdef CONFIG_SPARC32
93 93
94/* Routines for data transfer buffers. */ 94/* Routines for data transfer buffers. */
95BTFIXUPDEF_CALL(char *, mmu_lockarea, char *, unsigned long)
96BTFIXUPDEF_CALL(void, mmu_unlockarea, char *, unsigned long)
97
98#define mmu_lockarea(vaddr,len) BTFIXUP_CALL(mmu_lockarea)(vaddr,len)
99#define mmu_unlockarea(vaddr,len) BTFIXUP_CALL(mmu_unlockarea)(vaddr,len)
100
101struct page;
95struct device; 102struct device;
96struct scatterlist; 103struct scatterlist;
97 104
98struct sparc32_dma_ops { 105/* These are implementations for sbus_map_sg/sbus_unmap_sg... collapse later */
99 __u32 (*get_scsi_one)(struct device *, char *, unsigned long); 106BTFIXUPDEF_CALL(__u32, mmu_get_scsi_one, struct device *, char *, unsigned long)
100 void (*get_scsi_sgl)(struct device *, struct scatterlist *, int); 107BTFIXUPDEF_CALL(void, mmu_get_scsi_sgl, struct device *, struct scatterlist *, int)
101 void (*release_scsi_one)(struct device *, __u32, unsigned long); 108BTFIXUPDEF_CALL(void, mmu_release_scsi_one, struct device *, __u32, unsigned long)
102 void (*release_scsi_sgl)(struct device *, struct scatterlist *,int); 109BTFIXUPDEF_CALL(void, mmu_release_scsi_sgl, struct device *, struct scatterlist *, int)
103#ifdef CONFIG_SBUS 110
104 int (*map_dma_area)(struct device *, dma_addr_t *, unsigned long, unsigned long, int); 111#define mmu_get_scsi_one(dev,vaddr,len) BTFIXUP_CALL(mmu_get_scsi_one)(dev,vaddr,len)
105 void (*unmap_dma_area)(struct device *, unsigned long, int); 112#define mmu_get_scsi_sgl(dev,sg,sz) BTFIXUP_CALL(mmu_get_scsi_sgl)(dev,sg,sz)
106#endif 113#define mmu_release_scsi_one(dev,vaddr,len) BTFIXUP_CALL(mmu_release_scsi_one)(dev,vaddr,len)
107}; 114#define mmu_release_scsi_sgl(dev,sg,sz) BTFIXUP_CALL(mmu_release_scsi_sgl)(dev,sg,sz)
108extern const struct sparc32_dma_ops *sparc32_dma_ops; 115
109
110#define mmu_get_scsi_one(dev,vaddr,len) \
111 sparc32_dma_ops->get_scsi_one(dev, vaddr, len)
112#define mmu_get_scsi_sgl(dev,sg,sz) \
113 sparc32_dma_ops->get_scsi_sgl(dev, sg, sz)
114#define mmu_release_scsi_one(dev,vaddr,len) \
115 sparc32_dma_ops->release_scsi_one(dev, vaddr,len)
116#define mmu_release_scsi_sgl(dev,sg,sz) \
117 sparc32_dma_ops->release_scsi_sgl(dev, sg, sz)
118
119#ifdef CONFIG_SBUS
120/* 116/*
121 * mmu_map/unmap are provided by iommu/iounit; Invalid to call on IIep. 117 * mmu_map/unmap are provided by iommu/iounit; Invalid to call on IIep.
122 * 118 *
@@ -127,17 +123,17 @@ extern const struct sparc32_dma_ops *sparc32_dma_ops;
127 * Second mapping is for device visible address, or "bus" address. 123 * Second mapping is for device visible address, or "bus" address.
128 * The bus address is returned at '*pba'. 124 * The bus address is returned at '*pba'.
129 * 125 *
130 * These functions seem distinct, but are hard to split. 126 * These functions seem distinct, but are hard to split. On sun4c,
127 * at least for now, 'a' is equal to bus address, and retured in *pba.
131 * On sun4m, page attributes depend on the CPU type, so we have to 128 * On sun4m, page attributes depend on the CPU type, so we have to
132 * know if we are mapping RAM or I/O, so it has to be an additional argument 129 * know if we are mapping RAM or I/O, so it has to be an additional argument
133 * to a separate mapping function for CPU visible mappings. 130 * to a separate mapping function for CPU visible mappings.
134 */ 131 */
135#define sbus_map_dma_area(dev,pba,va,a,len) \ 132BTFIXUPDEF_CALL(int, mmu_map_dma_area, struct device *, dma_addr_t *, unsigned long, unsigned long, int len)
136 sparc32_dma_ops->map_dma_area(dev, pba, va, a, len) 133BTFIXUPDEF_CALL(void, mmu_unmap_dma_area, struct device *, unsigned long busa, int len)
137#define sbus_unmap_dma_area(dev,ba,len) \
138 sparc32_dma_ops->unmap_dma_area(dev, ba, len)
139#endif /* CONFIG_SBUS */
140 134
135#define mmu_map_dma_area(dev,pba,va,a,len) BTFIXUP_CALL(mmu_map_dma_area)(dev,pba,va,a,len)
136#define mmu_unmap_dma_area(dev,ba,len) BTFIXUP_CALL(mmu_unmap_dma_area)(dev,ba,len)
141#endif 137#endif
142 138
143#endif /* !(_ASM_SPARC_DMA_H) */ 139#endif /* !(_ASM_SPARC_DMA_H) */
diff --git a/arch/sparc/include/asm/elf_32.h b/arch/sparc/include/asm/elf_32.h
index ac74a2c98e6..4269ca6ad18 100644
--- a/arch/sparc/include/asm/elf_32.h
+++ b/arch/sparc/include/asm/elf_32.h
@@ -118,9 +118,16 @@ typedef struct {
118 instruction set this cpu supports. This can NOT be done in userspace 118 instruction set this cpu supports. This can NOT be done in userspace
119 on Sparc. */ 119 on Sparc. */
120 120
121/* Most sun4m's have them all. */ 121/* Sun4c has none of the capabilities, most sun4m's have them all.
122#define ELF_HWCAP (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | \ 122 * XXX This is gross, set some global variable at boot time. -DaveM
123 HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV) 123 */
124#define ELF_HWCAP ((ARCH_SUN4C) ? 0 : \
125 (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | \
126 HWCAP_SPARC_SWAP | \
127 ((srmmu_modtype != Cypress && \
128 srmmu_modtype != Cypress_vE && \
129 srmmu_modtype != Cypress_vD) ? \
130 HWCAP_SPARC_MULDIV : 0)))
124 131
125/* This yields a string that ld.so will use to load implementation 132/* This yields a string that ld.so will use to load implementation
126 specific libraries for optimization. This is more specific in 133 specific libraries for optimization. This is more specific in
@@ -128,7 +135,6 @@ typedef struct {
128 135
129#define ELF_PLATFORM (NULL) 136#define ELF_PLATFORM (NULL)
130 137
131#define SET_PERSONALITY(ex) \ 138#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
132 set_personality(PER_LINUX | (current->personality & (~PER_MASK)))
133 139
134#endif /* !(__ASMSPARC_ELF_H) */ 140#endif /* !(__ASMSPARC_ELF_H) */
diff --git a/arch/sparc/include/asm/elf_64.h b/arch/sparc/include/asm/elf_64.h
index 370ca1e71ff..7df8b7f544d 100644
--- a/arch/sparc/include/asm/elf_64.h
+++ b/arch/sparc/include/asm/elf_64.h
@@ -86,15 +86,6 @@
86#define AV_SPARC_IMA 0x00400000 /* integer multiply-add */ 86#define AV_SPARC_IMA 0x00400000 /* integer multiply-add */
87#define AV_SPARC_ASI_CACHE_SPARING \ 87#define AV_SPARC_ASI_CACHE_SPARING \
88 0x00800000 /* cache sparing ASIs available */ 88 0x00800000 /* cache sparing ASIs available */
89#define AV_SPARC_PAUSE 0x01000000 /* PAUSE available */
90#define AV_SPARC_CBCOND 0x02000000 /* CBCOND insns available */
91
92/* Solaris decided to enumerate every single crypto instruction type
93 * in the AT_HWCAP bits. This is wasteful, since if crypto is present,
94 * you still need to look in the CFR register to see if the opcode is
95 * really available. So we simply advertise only "crypto" support.
96 */
97#define HWCAP_SPARC_CRYPTO 0x04000000 /* CRYPTO insns available */
98 89
99#define CORE_DUMP_USE_REGSET 90#define CORE_DUMP_USE_REGSET
100 91
diff --git a/arch/sparc/include/asm/fbio.h b/arch/sparc/include/asm/fbio.h
index 1d9afe277e9..0a21da87f7d 100644
--- a/arch/sparc/include/asm/fbio.h
+++ b/arch/sparc/include/asm/fbio.h
@@ -1,10 +1,225 @@
1#ifndef __LINUX_FBIO_H 1#ifndef __LINUX_FBIO_H
2#define __LINUX_FBIO_H 2#define __LINUX_FBIO_H
3 3
4#include <uapi/asm/fbio.h> 4#include <linux/compiler.h>
5#include <linux/types.h>
5 6
7/* Constants used for fbio SunOS compatibility */
8/* (C) 1996 Miguel de Icaza */
9
10/* Frame buffer types */
11#define FBTYPE_NOTYPE -1
12#define FBTYPE_SUN1BW 0 /* mono */
13#define FBTYPE_SUN1COLOR 1
14#define FBTYPE_SUN2BW 2
15#define FBTYPE_SUN2COLOR 3
16#define FBTYPE_SUN2GP 4
17#define FBTYPE_SUN5COLOR 5
18#define FBTYPE_SUN3COLOR 6
19#define FBTYPE_MEMCOLOR 7
20#define FBTYPE_SUN4COLOR 8
21
22#define FBTYPE_NOTSUN1 9
23#define FBTYPE_NOTSUN2 10
24#define FBTYPE_NOTSUN3 11
25
26#define FBTYPE_SUNFAST_COLOR 12 /* cg6 */
27#define FBTYPE_SUNROP_COLOR 13
28#define FBTYPE_SUNFB_VIDEO 14
29#define FBTYPE_SUNGIFB 15
30#define FBTYPE_SUNGPLAS 16
31#define FBTYPE_SUNGP3 17
32#define FBTYPE_SUNGT 18
33#define FBTYPE_SUNLEO 19 /* zx Leo card */
34#define FBTYPE_MDICOLOR 20 /* cg14 */
35#define FBTYPE_TCXCOLOR 21 /* SUNW,tcx card */
36
37#define FBTYPE_LASTPLUSONE 21 /* This is not last + 1 in fact... */
38
39/* Does not seem to be listed in the Sun file either */
40#define FBTYPE_CREATOR 22
41#define FBTYPE_PCI_IGA1682 23
42#define FBTYPE_P9100COLOR 24
43
44#define FBTYPE_PCI_GENERIC 1000
45#define FBTYPE_PCI_MACH64 1001
46
47/* fbio ioctls */
48/* Returned by FBIOGTYPE */
49struct fbtype {
50 int fb_type; /* fb type, see above */
51 int fb_height; /* pixels */
52 int fb_width; /* pixels */
53 int fb_depth;
54 int fb_cmsize; /* color map entries */
55 int fb_size; /* fb size in bytes */
56};
57#define FBIOGTYPE _IOR('F', 0, struct fbtype)
58
59struct fbcmap {
60 int index; /* first element (0 origin) */
61 int count;
62 unsigned char __user *red;
63 unsigned char __user *green;
64 unsigned char __user *blue;
65};
66
67#ifdef __KERNEL__
6#define FBIOPUTCMAP_SPARC _IOW('F', 3, struct fbcmap) 68#define FBIOPUTCMAP_SPARC _IOW('F', 3, struct fbcmap)
7#define FBIOGETCMAP_SPARC _IOW('F', 4, struct fbcmap) 69#define FBIOGETCMAP_SPARC _IOW('F', 4, struct fbcmap)
70#else
71#define FBIOPUTCMAP _IOW('F', 3, struct fbcmap)
72#define FBIOGETCMAP _IOW('F', 4, struct fbcmap)
73#endif
74
75/* # of device specific values */
76#define FB_ATTR_NDEVSPECIFIC 8
77/* # of possible emulations */
78#define FB_ATTR_NEMUTYPES 4
79
80struct fbsattr {
81 int flags;
82 int emu_type; /* -1 if none */
83 int dev_specific[FB_ATTR_NDEVSPECIFIC];
84};
85
86struct fbgattr {
87 int real_type; /* real frame buffer type */
88 int owner; /* unknown */
89 struct fbtype fbtype; /* real frame buffer fbtype */
90 struct fbsattr sattr;
91 int emu_types[FB_ATTR_NEMUTYPES]; /* supported emulations */
92};
93#define FBIOSATTR _IOW('F', 5, struct fbgattr) /* Unsupported: */
94#define FBIOGATTR _IOR('F', 6, struct fbgattr) /* supported */
95
96#define FBIOSVIDEO _IOW('F', 7, int)
97#define FBIOGVIDEO _IOR('F', 8, int)
98
99struct fbcursor {
100 short set; /* what to set, choose from the list above */
101 short enable; /* cursor on/off */
102 struct fbcurpos pos; /* cursor position */
103 struct fbcurpos hot; /* cursor hot spot */
104 struct fbcmap cmap; /* color map info */
105 struct fbcurpos size; /* cursor bit map size */
106 char __user *image; /* cursor image bits */
107 char __user *mask; /* cursor mask bits */
108};
109
110/* set/get cursor attributes/shape */
111#define FBIOSCURSOR _IOW('F', 24, struct fbcursor)
112#define FBIOGCURSOR _IOWR('F', 25, struct fbcursor)
113
114/* set/get cursor position */
115#define FBIOSCURPOS _IOW('F', 26, struct fbcurpos)
116#define FBIOGCURPOS _IOW('F', 27, struct fbcurpos)
117
118/* get max cursor size */
119#define FBIOGCURMAX _IOR('F', 28, struct fbcurpos)
120
121/* wid manipulation */
122struct fb_wid_alloc {
123#define FB_WID_SHARED_8 0
124#define FB_WID_SHARED_24 1
125#define FB_WID_DBL_8 2
126#define FB_WID_DBL_24 3
127 __u32 wa_type;
128 __s32 wa_index; /* Set on return */
129 __u32 wa_count;
130};
131struct fb_wid_item {
132 __u32 wi_type;
133 __s32 wi_index;
134 __u32 wi_attrs;
135 __u32 wi_values[32];
136};
137struct fb_wid_list {
138 __u32 wl_flags;
139 __u32 wl_count;
140 struct fb_wid_item *wl_list;
141};
142
143#define FBIO_WID_ALLOC _IOWR('F', 30, struct fb_wid_alloc)
144#define FBIO_WID_FREE _IOW('F', 31, struct fb_wid_alloc)
145#define FBIO_WID_PUT _IOW('F', 32, struct fb_wid_list)
146#define FBIO_WID_GET _IOWR('F', 33, struct fb_wid_list)
147
148/* Creator ioctls */
149#define FFB_IOCTL ('F'<<8)
150#define FFB_SYS_INFO (FFB_IOCTL|80)
151#define FFB_CLUTREAD (FFB_IOCTL|81)
152#define FFB_CLUTPOST (FFB_IOCTL|82)
153#define FFB_SETDIAGMODE (FFB_IOCTL|83)
154#define FFB_GETMONITORID (FFB_IOCTL|84)
155#define FFB_GETVIDEOMODE (FFB_IOCTL|85)
156#define FFB_SETVIDEOMODE (FFB_IOCTL|86)
157#define FFB_SETSERVER (FFB_IOCTL|87)
158#define FFB_SETOVCTL (FFB_IOCTL|88)
159#define FFB_GETOVCTL (FFB_IOCTL|89)
160#define FFB_GETSAXNUM (FFB_IOCTL|90)
161#define FFB_FBDEBUG (FFB_IOCTL|91)
162
163/* Cg14 ioctls */
164#define MDI_IOCTL ('M'<<8)
165#define MDI_RESET (MDI_IOCTL|1)
166#define MDI_GET_CFGINFO (MDI_IOCTL|2)
167#define MDI_SET_PIXELMODE (MDI_IOCTL|3)
168# define MDI_32_PIX 32
169# define MDI_16_PIX 16
170# define MDI_8_PIX 8
171
172struct mdi_cfginfo {
173 int mdi_ncluts; /* Number of implemented CLUTs in this MDI */
174 int mdi_type; /* FBTYPE name */
175 int mdi_height; /* height */
176 int mdi_width; /* width */
177 int mdi_size; /* available ram */
178 int mdi_mode; /* 8bpp, 16bpp or 32bpp */
179 int mdi_pixfreq; /* pixel clock (from PROM) */
180};
181
182/* SparcLinux specific ioctl for the MDI, should be replaced for
183 * the SET_XLUT/SET_CLUTn ioctls instead
184 */
185#define MDI_CLEAR_XLUT (MDI_IOCTL|9)
186
187/* leo & ffb ioctls */
188struct fb_clut_alloc {
189 __u32 clutid; /* Set on return */
190 __u32 flag;
191 __u32 index;
192};
193
194struct fb_clut {
195#define FB_CLUT_WAIT 0x00000001 /* Not yet implemented */
196 __u32 flag;
197 __u32 clutid;
198 __u32 offset;
199 __u32 count;
200 char * red;
201 char * green;
202 char * blue;
203};
204
205struct fb_clut32 {
206 __u32 flag;
207 __u32 clutid;
208 __u32 offset;
209 __u32 count;
210 __u32 red;
211 __u32 green;
212 __u32 blue;
213};
214
215#define LEO_CLUTALLOC _IOWR('L', 53, struct fb_clut_alloc)
216#define LEO_CLUTFREE _IOW('L', 54, struct fb_clut_alloc)
217#define LEO_CLUTREAD _IOW('L', 55, struct fb_clut)
218#define LEO_CLUTPOST _IOW('L', 56, struct fb_clut)
219#define LEO_SETGAMMA _IOW('L', 68, int) /* Not yet implemented */
220#define LEO_GETGAMMA _IOR('L', 69, int) /* Not yet implemented */
221
222#ifdef __KERNEL__
8/* Addresses on the fd of a cgsix that are mappable */ 223/* Addresses on the fd of a cgsix that are mappable */
9#define CG6_FBC 0x70000000 224#define CG6_FBC 0x70000000
10#define CG6_TEC 0x70001000 225#define CG6_TEC 0x70001000
@@ -45,6 +260,47 @@
45#define CG14_CLUT3 0x6000 /* Color Look Up Table */ 260#define CG14_CLUT3 0x6000 /* Color Look Up Table */
46#define CG14_AUTO 0xf000 261#define CG14_AUTO 0xf000
47 262
263#endif /* KERNEL */
264
265/* These are exported to userland for applications to use */
266/* Mappable offsets for the cg14: control registers */
267#define MDI_DIRECT_MAP 0x10000000
268#define MDI_CTLREG_MAP 0x20000000
269#define MDI_CURSOR_MAP 0x30000000
270#define MDI_SHDW_VRT_MAP 0x40000000
271
272/* Mappable offsets for the cg14: frame buffer resolutions */
273/* 32 bits */
274#define MDI_CHUNKY_XBGR_MAP 0x50000000
275#define MDI_CHUNKY_BGR_MAP 0x60000000
276
277/* 16 bits */
278#define MDI_PLANAR_X16_MAP 0x70000000
279#define MDI_PLANAR_C16_MAP 0x80000000
280
281/* 8 bit is done as CG3 MMAP offset */
282/* 32 bits, planar */
283#define MDI_PLANAR_X32_MAP 0x90000000
284#define MDI_PLANAR_B32_MAP 0xa0000000
285#define MDI_PLANAR_G32_MAP 0xb0000000
286#define MDI_PLANAR_R32_MAP 0xc0000000
287
288/* Mappable offsets on leo */
289#define LEO_SS0_MAP 0x00000000
290#define LEO_LC_SS0_USR_MAP 0x00800000
291#define LEO_LD_SS0_MAP 0x00801000
292#define LEO_LX_CURSOR_MAP 0x00802000
293#define LEO_SS1_MAP 0x00803000
294#define LEO_LC_SS1_USR_MAP 0x01003000
295#define LEO_LD_SS1_MAP 0x01004000
296#define LEO_UNK_MAP 0x01005000
297#define LEO_LX_KRN_MAP 0x01006000
298#define LEO_LC_SS0_KRN_MAP 0x01007000
299#define LEO_LC_SS1_KRN_MAP 0x01008000
300#define LEO_LD_GBL_MAP 0x01009000
301#define LEO_UNK2_MAP 0x0100a000
302
303#ifdef __KERNEL__
48struct fbcmap32 { 304struct fbcmap32 {
49 int index; /* first element (0 origin) */ 305 int index; /* first element (0 origin) */
50 int count; 306 int count;
@@ -69,4 +325,6 @@ struct fbcursor32 {
69 325
70#define FBIOSCURSOR32 _IOW('F', 24, struct fbcursor32) 326#define FBIOSCURSOR32 _IOW('F', 24, struct fbcursor32)
71#define FBIOGCURSOR32 _IOW('F', 25, struct fbcursor32) 327#define FBIOGCURSOR32 _IOW('F', 25, struct fbcursor32)
328#endif
329
72#endif /* __LINUX_FBIO_H */ 330#endif /* __LINUX_FBIO_H */
diff --git a/arch/sparc/include/asm/floppy_32.h b/arch/sparc/include/asm/floppy_32.h
index fb3f16954c6..7440915e86d 100644
--- a/arch/sparc/include/asm/floppy_32.h
+++ b/arch/sparc/include/asm/floppy_32.h
@@ -11,7 +11,9 @@
11 11
12#include <asm/page.h> 12#include <asm/page.h>
13#include <asm/pgtable.h> 13#include <asm/pgtable.h>
14#include <asm/system.h>
14#include <asm/idprom.h> 15#include <asm/idprom.h>
16#include <asm/machines.h>
15#include <asm/oplib.h> 17#include <asm/oplib.h>
16#include <asm/auxio.h> 18#include <asm/auxio.h>
17#include <asm/irq.h> 19#include <asm/irq.h>
@@ -102,13 +104,25 @@ static struct sun_floppy_ops sun_fdops;
102/* Routines unique to each controller type on a Sun. */ 104/* Routines unique to each controller type on a Sun. */
103static void sun_set_dor(unsigned char value, int fdc_82077) 105static void sun_set_dor(unsigned char value, int fdc_82077)
104{ 106{
105 if (fdc_82077) 107 if (sparc_cpu_model == sun4c) {
108 unsigned int bits = 0;
109 if (value & 0x10)
110 bits |= AUXIO_FLPY_DSEL;
111 if ((value & 0x80) == 0)
112 bits |= AUXIO_FLPY_EJCT;
113 set_auxio(bits, (~bits) & (AUXIO_FLPY_DSEL|AUXIO_FLPY_EJCT));
114 }
115 if (fdc_82077) {
106 sun_fdc->dor_82077 = value; 116 sun_fdc->dor_82077 = value;
117 }
107} 118}
108 119
109static unsigned char sun_read_dir(void) 120static unsigned char sun_read_dir(void)
110{ 121{
111 return sun_fdc->dir_82077; 122 if (sparc_cpu_model == sun4c)
123 return (get_auxio() & AUXIO_FLPY_DCHG) ? 0x80 : 0;
124 else
125 return sun_fdc->dir_82077;
112} 126}
113 127
114static unsigned char sun_82072_fd_inb(int port) 128static unsigned char sun_82072_fd_inb(int port)
@@ -229,7 +243,10 @@ static inline void virtual_dma_init(void)
229static inline void sun_fd_disable_dma(void) 243static inline void sun_fd_disable_dma(void)
230{ 244{
231 doing_pdma = 0; 245 doing_pdma = 0;
232 pdma_base = NULL; 246 if (pdma_base) {
247 mmu_unlockarea(pdma_base, pdma_areasize);
248 pdma_base = NULL;
249 }
233} 250}
234 251
235static inline void sun_fd_set_dma_mode(int mode) 252static inline void sun_fd_set_dma_mode(int mode)
@@ -259,6 +276,7 @@ static inline void sun_fd_set_dma_count(int length)
259 276
260static inline void sun_fd_enable_dma(void) 277static inline void sun_fd_enable_dma(void)
261{ 278{
279 pdma_vaddr = mmu_lockarea(pdma_vaddr, pdma_size);
262 pdma_base = pdma_vaddr; 280 pdma_base = pdma_vaddr;
263 pdma_areasize = pdma_size; 281 pdma_areasize = pdma_size;
264} 282}
@@ -284,36 +302,38 @@ static int sun_floppy_init(void)
284{ 302{
285 struct platform_device *op; 303 struct platform_device *op;
286 struct device_node *dp; 304 struct device_node *dp;
287 struct resource r;
288 char state[128]; 305 char state[128];
289 phandle fd_node; 306 phandle tnode, fd_node;
290 phandle tnode;
291 int num_regs; 307 int num_regs;
308 struct resource r;
292 309
293 use_virtual_dma = 1; 310 use_virtual_dma = 1;
294 311
295 /* Forget it if we aren't on a machine that could possibly 312 /* Forget it if we aren't on a machine that could possibly
296 * ever have a floppy drive. 313 * ever have a floppy drive.
297 */ 314 */
298 if (sparc_cpu_model != sun4m) { 315 if((sparc_cpu_model != sun4c && sparc_cpu_model != sun4m) ||
316 ((idprom->id_machtype == (SM_SUN4C | SM_4C_SLC)) ||
317 (idprom->id_machtype == (SM_SUN4C | SM_4C_ELC)))) {
299 /* We certainly don't have a floppy controller. */ 318 /* We certainly don't have a floppy controller. */
300 goto no_sun_fdc; 319 goto no_sun_fdc;
301 } 320 }
302 /* Well, try to find one. */ 321 /* Well, try to find one. */
303 tnode = prom_getchild(prom_root_node); 322 tnode = prom_getchild(prom_root_node);
304 fd_node = prom_searchsiblings(tnode, "obio"); 323 fd_node = prom_searchsiblings(tnode, "obio");
305 if (fd_node != 0) { 324 if(fd_node != 0) {
306 tnode = prom_getchild(fd_node); 325 tnode = prom_getchild(fd_node);
307 fd_node = prom_searchsiblings(tnode, "SUNW,fdtwo"); 326 fd_node = prom_searchsiblings(tnode, "SUNW,fdtwo");
308 } else { 327 } else {
309 fd_node = prom_searchsiblings(tnode, "fd"); 328 fd_node = prom_searchsiblings(tnode, "fd");
310 } 329 }
311 if (fd_node == 0) { 330 if(fd_node == 0) {
312 goto no_sun_fdc; 331 goto no_sun_fdc;
313 } 332 }
314 333
315 /* The sun4m lets us know if the controller is actually usable. */ 334 /* The sun4m lets us know if the controller is actually usable. */
316 if (prom_getproperty(fd_node, "status", state, sizeof(state)) != -1) { 335 if(sparc_cpu_model == sun4m &&
336 prom_getproperty(fd_node, "status", state, sizeof(state)) != -1) {
317 if(!strcmp(state, "disabled")) { 337 if(!strcmp(state, "disabled")) {
318 goto no_sun_fdc; 338 goto no_sun_fdc;
319 } 339 }
@@ -324,12 +344,12 @@ static int sun_floppy_init(void)
324 memset(&r, 0, sizeof(r)); 344 memset(&r, 0, sizeof(r));
325 r.flags = fd_regs[0].which_io; 345 r.flags = fd_regs[0].which_io;
326 r.start = fd_regs[0].phys_addr; 346 r.start = fd_regs[0].phys_addr;
327 sun_fdc = of_ioremap(&r, 0, fd_regs[0].reg_size, "floppy"); 347 sun_fdc = (struct sun_flpy_controller *)
348 of_ioremap(&r, 0, fd_regs[0].reg_size, "floppy");
328 349
329 /* Look up irq in platform_device. 350 /* Look up irq in platform_device.
330 * We try "SUNW,fdtwo" and "fd" 351 * We try "SUNW,fdtwo" and "fd"
331 */ 352 */
332 op = NULL;
333 for_each_node_by_name(dp, "SUNW,fdtwo") { 353 for_each_node_by_name(dp, "SUNW,fdtwo") {
334 op = of_find_device_by_node(dp); 354 op = of_find_device_by_node(dp);
335 if (op) 355 if (op)
@@ -348,7 +368,7 @@ static int sun_floppy_init(void)
348 FLOPPY_IRQ = op->archdata.irqs[0]; 368 FLOPPY_IRQ = op->archdata.irqs[0];
349 369
350 /* Last minute sanity check... */ 370 /* Last minute sanity check... */
351 if (sun_fdc->status_82072 == 0xff) { 371 if(sun_fdc->status_82072 == 0xff) {
352 sun_fdc = NULL; 372 sun_fdc = NULL;
353 goto no_sun_fdc; 373 goto no_sun_fdc;
354 } 374 }
diff --git a/arch/sparc/include/asm/floppy_64.h b/arch/sparc/include/asm/floppy_64.h
index e204f902e6c..bcef1f5a2a6 100644
--- a/arch/sparc/include/asm/floppy_64.h
+++ b/arch/sparc/include/asm/floppy_64.h
@@ -161,7 +161,10 @@ unsigned long pdma_areasize;
161static void sun_fd_disable_dma(void) 161static void sun_fd_disable_dma(void)
162{ 162{
163 doing_pdma = 0; 163 doing_pdma = 0;
164 pdma_base = NULL; 164 if (pdma_base) {
165 mmu_unlockarea(pdma_base, pdma_areasize);
166 pdma_base = NULL;
167 }
165} 168}
166 169
167static void sun_fd_set_dma_mode(int mode) 170static void sun_fd_set_dma_mode(int mode)
@@ -191,6 +194,7 @@ static void sun_fd_set_dma_count(int length)
191 194
192static void sun_fd_enable_dma(void) 195static void sun_fd_enable_dma(void)
193{ 196{
197 pdma_vaddr = mmu_lockarea(pdma_vaddr, pdma_size);
194 pdma_base = pdma_vaddr; 198 pdma_base = pdma_vaddr;
195 pdma_areasize = pdma_size; 199 pdma_areasize = pdma_size;
196} 200}
diff --git a/arch/sparc/include/asm/futex_64.h b/arch/sparc/include/asm/futex_64.h
index 4e899b0dabf..444e7bea23b 100644
--- a/arch/sparc/include/asm/futex_64.h
+++ b/arch/sparc/include/asm/futex_64.h
@@ -4,6 +4,7 @@
4#include <linux/futex.h> 4#include <linux/futex.h>
5#include <linux/uaccess.h> 5#include <linux/uaccess.h>
6#include <asm/errno.h> 6#include <asm/errno.h>
7#include <asm/system.h>
7 8
8#define __futex_cas_op(insn, ret, oldval, uaddr, oparg) \ 9#define __futex_cas_op(insn, ret, oldval, uaddr, oparg) \
9 __asm__ __volatile__( \ 10 __asm__ __volatile__( \
diff --git a/arch/sparc/include/asm/gpio.h b/arch/sparc/include/asm/gpio.h
index b3799d88ffc..a0e3ac0af59 100644
--- a/arch/sparc/include/asm/gpio.h
+++ b/arch/sparc/include/asm/gpio.h
@@ -1,4 +1,36 @@
1#ifndef __LINUX_GPIO_H 1#ifndef __ASM_SPARC_GPIO_H
2#warning Include linux/gpio.h instead of asm/gpio.h 2#define __ASM_SPARC_GPIO_H
3#include <linux/gpio.h> 3
4#endif 4#include <linux/errno.h>
5#include <asm-generic/gpio.h>
6
7#ifdef CONFIG_GPIOLIB
8
9static inline int gpio_get_value(unsigned int gpio)
10{
11 return __gpio_get_value(gpio);
12}
13
14static inline void gpio_set_value(unsigned int gpio, int value)
15{
16 __gpio_set_value(gpio, value);
17}
18
19static inline int gpio_cansleep(unsigned int gpio)
20{
21 return __gpio_cansleep(gpio);
22}
23
24static inline int gpio_to_irq(unsigned int gpio)
25{
26 return -ENOSYS;
27}
28
29static inline int irq_to_gpio(unsigned int irq)
30{
31 return -EINVAL;
32}
33
34#endif /* CONFIG_GPIOLIB */
35
36#endif /* __ASM_SPARC_GPIO_H */
diff --git a/arch/sparc/include/asm/head_32.h b/arch/sparc/include/asm/head_32.h
index a76874838f6..7c35491a8b5 100644
--- a/arch/sparc/include/asm/head_32.h
+++ b/arch/sparc/include/asm/head_32.h
@@ -2,8 +2,15 @@
2#define __SPARC_HEAD_H 2#define __SPARC_HEAD_H
3 3
4#define KERNBASE 0xf0000000 /* First address the kernel will eventually be */ 4#define KERNBASE 0xf0000000 /* First address the kernel will eventually be */
5#define LOAD_ADDR 0x4000 /* prom jumps to us here unless this is elf /boot */
6#define SUN4C_SEGSZ (1 << 18)
7#define SRMMU_L1_KBASE_OFFSET ((KERNBASE>>24)<<2) /* Used in boot remapping. */
8#define INTS_ENAB 0x01 /* entry.S uses this. */
9
10#define SUN4_PROM_VECTOR 0xFFE81000 /* SUN4 PROM needs to be hardwired */
5 11
6#define WRITE_PAUSE nop; nop; nop; /* Have to do this after %wim/%psr chg */ 12#define WRITE_PAUSE nop; nop; nop; /* Have to do this after %wim/%psr chg */
13#define NOP_INSN 0x01000000 /* Used to patch sparc_save_state */
7 14
8/* Here are some trap goodies */ 15/* Here are some trap goodies */
9 16
@@ -11,7 +18,9 @@
11#define TRAP_ENTRY(type, label) \ 18#define TRAP_ENTRY(type, label) \
12 rd %psr, %l0; b label; rd %wim, %l3; nop; 19 rd %psr, %l0; b label; rd %wim, %l3; nop;
13 20
14/* Data/text faults */ 21/* Data/text faults. Defaults to sun4c version at boot time. */
22#define SPARC_TFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 1, %l7;
23#define SPARC_DFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 0, %l7;
15#define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7; 24#define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7;
16#define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7; 25#define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7;
17 26
@@ -71,6 +80,16 @@
71#define TRAP_ENTRY_INTERRUPT(int_level) \ 80#define TRAP_ENTRY_INTERRUPT(int_level) \
72 mov int_level, %l7; rd %psr, %l0; b real_irq_entry; rd %wim, %l3; 81 mov int_level, %l7; rd %psr, %l0; b real_irq_entry; rd %wim, %l3;
73 82
83/* NMI's (Non Maskable Interrupts) are special, you can't keep them
84 * from coming in, and basically if you get one, the shows over. ;(
85 * On the sun4c they are usually asynchronous memory errors, on the
86 * the sun4m they could be either due to mem errors or a software
87 * initiated interrupt from the prom/kern on an SMP box saying "I
88 * command you to do CPU tricks, read your mailbox for more info."
89 */
90#define NMI_TRAP \
91 rd %wim, %l3; b linux_trap_nmi_sun4c; mov %psr, %l0; nop;
92
74/* Window overflows/underflows are special and we need to try to be as 93/* Window overflows/underflows are special and we need to try to be as
75 * efficient as possible here.... 94 * efficient as possible here....
76 */ 95 */
diff --git a/arch/sparc/include/asm/highmem.h b/arch/sparc/include/asm/highmem.h
index 4f9e15c757e..3d7afbb7f4b 100644
--- a/arch/sparc/include/asm/highmem.h
+++ b/arch/sparc/include/asm/highmem.h
@@ -21,6 +21,7 @@
21#ifdef __KERNEL__ 21#ifdef __KERNEL__
22 22
23#include <linux/interrupt.h> 23#include <linux/interrupt.h>
24#include <asm/fixmap.h>
24#include <asm/vaddrs.h> 25#include <asm/vaddrs.h>
25#include <asm/kmap_types.h> 26#include <asm/kmap_types.h>
26#include <asm/pgtable.h> 27#include <asm/pgtable.h>
@@ -28,6 +29,7 @@
28/* declarations for highmem.c */ 29/* declarations for highmem.c */
29extern unsigned long highstart_pfn, highend_pfn; 30extern unsigned long highstart_pfn, highend_pfn;
30 31
32extern pte_t *kmap_pte;
31extern pgprot_t kmap_prot; 33extern pgprot_t kmap_prot;
32extern pte_t *pkmap_page_table; 34extern pte_t *pkmap_page_table;
33 35
@@ -68,8 +70,9 @@ static inline void kunmap(struct page *page)
68 kunmap_high(page); 70 kunmap_high(page);
69} 71}
70 72
71extern void *kmap_atomic(struct page *page); 73extern void *__kmap_atomic(struct page *page);
72extern void __kunmap_atomic(void *kvaddr); 74extern void __kunmap_atomic(void *kvaddr);
75extern struct page *kmap_atomic_to_page(void *vaddr);
73 76
74#define flush_cache_kmaps() flush_cache_all() 77#define flush_cache_kmaps() flush_cache_all()
75 78
diff --git a/arch/sparc/include/asm/hugetlb.h b/arch/sparc/include/asm/hugetlb.h
index 9661e9bc7bb..177061064ee 100644
--- a/arch/sparc/include/asm/hugetlb.h
+++ b/arch/sparc/include/asm/hugetlb.h
@@ -10,10 +10,7 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
10pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, 10pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
11 pte_t *ptep); 11 pte_t *ptep);
12 12
13static inline void hugetlb_prefault_arch_hook(struct mm_struct *mm) 13void hugetlb_prefault_arch_hook(struct mm_struct *mm);
14{
15 hugetlb_setup(mm);
16}
17 14
18static inline int is_hugepage_only_range(struct mm_struct *mm, 15static inline int is_hugepage_only_range(struct mm_struct *mm,
19 unsigned long addr, 16 unsigned long addr,
@@ -61,20 +58,14 @@ static inline pte_t huge_pte_wrprotect(pte_t pte)
61static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, 58static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
62 unsigned long addr, pte_t *ptep) 59 unsigned long addr, pte_t *ptep)
63{ 60{
64 pte_t old_pte = *ptep; 61 ptep_set_wrprotect(mm, addr, ptep);
65 set_huge_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
66} 62}
67 63
68static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma, 64static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma,
69 unsigned long addr, pte_t *ptep, 65 unsigned long addr, pte_t *ptep,
70 pte_t pte, int dirty) 66 pte_t pte, int dirty)
71{ 67{
72 int changed = !pte_same(*ptep, pte); 68 return ptep_set_access_flags(vma, addr, ptep, pte, dirty);
73 if (changed) {
74 set_huge_pte_at(vma->vm_mm, addr, ptep, pte);
75 flush_tlb_page(vma, addr);
76 }
77 return changed;
78} 69}
79 70
80static inline pte_t huge_ptep_get(pte_t *ptep) 71static inline pte_t huge_ptep_get(pte_t *ptep)
@@ -91,8 +82,4 @@ static inline void arch_release_hugepage(struct page *page)
91{ 82{
92} 83}
93 84
94static inline void arch_clear_hugepage_flags(struct page *page)
95{
96}
97
98#endif /* _ASM_SPARC64_HUGETLB_H */ 85#endif /* _ASM_SPARC64_HUGETLB_H */
diff --git a/arch/sparc/include/asm/hypervisor.h b/arch/sparc/include/asm/hypervisor.h
index ca121f0fa3e..015a761eaa3 100644
--- a/arch/sparc/include/asm/hypervisor.h
+++ b/arch/sparc/include/asm/hypervisor.h
@@ -2934,16 +2934,6 @@ extern unsigned long sun4v_reboot_data_set(unsigned long ra,
2934 unsigned long len); 2934 unsigned long len);
2935#endif 2935#endif
2936 2936
2937#define HV_FAST_VT_GET_PERFREG 0x184
2938#define HV_FAST_VT_SET_PERFREG 0x185
2939
2940#ifndef __ASSEMBLY__
2941extern unsigned long sun4v_vt_get_perfreg(unsigned long reg_num,
2942 unsigned long *reg_val);
2943extern unsigned long sun4v_vt_set_perfreg(unsigned long reg_num,
2944 unsigned long reg_val);
2945#endif
2946
2947/* Function numbers for HV_CORE_TRAP. */ 2937/* Function numbers for HV_CORE_TRAP. */
2948#define HV_CORE_SET_VER 0x00 2938#define HV_CORE_SET_VER 0x00
2949#define HV_CORE_PUTCHAR 0x01 2939#define HV_CORE_PUTCHAR 0x01
@@ -2974,7 +2964,6 @@ extern unsigned long sun4v_vt_set_perfreg(unsigned long reg_num,
2974#define HV_GRP_NIU 0x0204 2964#define HV_GRP_NIU 0x0204
2975#define HV_GRP_VF_CPU 0x0205 2965#define HV_GRP_VF_CPU 0x0205
2976#define HV_GRP_KT_CPU 0x0209 2966#define HV_GRP_KT_CPU 0x0209
2977#define HV_GRP_VT_CPU 0x020c
2978#define HV_GRP_DIAG 0x0300 2967#define HV_GRP_DIAG 0x0300
2979 2968
2980#ifndef __ASSEMBLY__ 2969#ifndef __ASSEMBLY__
diff --git a/arch/sparc/include/asm/io_32.h b/arch/sparc/include/asm/io_32.h
index c1acbd891cb..c2ced21c9dc 100644
--- a/arch/sparc/include/asm/io_32.h
+++ b/arch/sparc/include/asm/io_32.h
@@ -6,7 +6,7 @@
6#include <linux/ioport.h> /* struct resource */ 6#include <linux/ioport.h> /* struct resource */
7 7
8#include <asm/page.h> /* IO address mapping routines need this */ 8#include <asm/page.h> /* IO address mapping routines need this */
9#include <asm-generic/pci_iomap.h> 9#include <asm/system.h>
10 10
11#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) 11#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
12 12
@@ -324,6 +324,7 @@ extern void ioport_unmap(void __iomem *);
324 324
325/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */ 325/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
326struct pci_dev; 326struct pci_dev;
327extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
327extern void pci_iounmap(struct pci_dev *dev, void __iomem *); 328extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
328 329
329/* 330/*
diff --git a/arch/sparc/include/asm/io_64.h b/arch/sparc/include/asm/io_64.h
index 09b0b88aeb2..9c8965415f0 100644
--- a/arch/sparc/include/asm/io_64.h
+++ b/arch/sparc/include/asm/io_64.h
@@ -6,8 +6,8 @@
6#include <linux/types.h> 6#include <linux/types.h>
7 7
8#include <asm/page.h> /* IO address mapping routines need this */ 8#include <asm/page.h> /* IO address mapping routines need this */
9#include <asm/system.h>
9#include <asm/asi.h> 10#include <asm/asi.h>
10#include <asm-generic/pci_iomap.h>
11 11
12/* PC crapola... */ 12/* PC crapola... */
13#define __SLOW_DOWN_IO do { } while (0) 13#define __SLOW_DOWN_IO do { } while (0)
@@ -514,6 +514,7 @@ extern void ioport_unmap(void __iomem *);
514 514
515/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */ 515/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
516struct pci_dev; 516struct pci_dev;
517extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
517extern void pci_iounmap(struct pci_dev *dev, void __iomem *); 518extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
518 519
519static inline int sbus_can_dma_64bit(void) 520static inline int sbus_can_dma_64bit(void)
diff --git a/arch/sparc/include/asm/ioctls.h b/arch/sparc/include/asm/ioctls.h
index 77413b7e3a1..28d0c8b02cc 100644
--- a/arch/sparc/include/asm/ioctls.h
+++ b/arch/sparc/include/asm/ioctls.h
@@ -1,8 +1,123 @@
1#ifndef _ASM_SPARC_IOCTLS_H 1#ifndef _ASM_SPARC_IOCTLS_H
2#define _ASM_SPARC_IOCTLS_H 2#define _ASM_SPARC_IOCTLS_H
3 3
4#include <uapi/asm/ioctls.h> 4#include <asm/ioctl.h>
5 5
6/* Big T */
7#define TCGETA _IOR('T', 1, struct termio)
8#define TCSETA _IOW('T', 2, struct termio)
9#define TCSETAW _IOW('T', 3, struct termio)
10#define TCSETAF _IOW('T', 4, struct termio)
11#define TCSBRK _IO('T', 5)
12#define TCXONC _IO('T', 6)
13#define TCFLSH _IO('T', 7)
14#define TCGETS _IOR('T', 8, struct termios)
15#define TCSETS _IOW('T', 9, struct termios)
16#define TCSETSW _IOW('T', 10, struct termios)
17#define TCSETSF _IOW('T', 11, struct termios)
18#define TCGETS2 _IOR('T', 12, struct termios2)
19#define TCSETS2 _IOW('T', 13, struct termios2)
20#define TCSETSW2 _IOW('T', 14, struct termios2)
21#define TCSETSF2 _IOW('T', 15, struct termios2)
22#define TIOCGDEV _IOR('T',0x32, unsigned int) /* Get primary device node of /dev/console */
23#define TIOCVHANGUP _IO('T', 0x37)
24
25/* Note that all the ioctls that are not available in Linux have a
26 * double underscore on the front to: a) avoid some programs to
27 * think we support some ioctls under Linux (autoconfiguration stuff)
28 */
29/* Little t */
30#define TIOCGETD _IOR('t', 0, int)
31#define TIOCSETD _IOW('t', 1, int)
32#define __TIOCHPCL _IO('t', 2) /* SunOS Specific */
33#define __TIOCMODG _IOR('t', 3, int) /* SunOS Specific */
34#define __TIOCMODS _IOW('t', 4, int) /* SunOS Specific */
35#define __TIOCGETP _IOR('t', 8, struct sgttyb) /* SunOS Specific */
36#define __TIOCSETP _IOW('t', 9, struct sgttyb) /* SunOS Specific */
37#define __TIOCSETN _IOW('t', 10, struct sgttyb) /* SunOS Specific */
38#define TIOCEXCL _IO('t', 13)
39#define TIOCNXCL _IO('t', 14)
40#define __TIOCFLUSH _IOW('t', 16, int) /* SunOS Specific */
41#define __TIOCSETC _IOW('t', 17, struct tchars) /* SunOS Specific */
42#define __TIOCGETC _IOR('t', 18, struct tchars) /* SunOS Specific */
43#define __TIOCTCNTL _IOW('t', 32, int) /* SunOS Specific */
44#define __TIOCSIGNAL _IOW('t', 33, int) /* SunOS Specific */
45#define __TIOCSETX _IOW('t', 34, int) /* SunOS Specific */
46#define __TIOCGETX _IOR('t', 35, int) /* SunOS Specific */
47#define TIOCCONS _IO('t', 36)
48#define TIOCGSOFTCAR _IOR('t', 100, int)
49#define TIOCSSOFTCAR _IOW('t', 101, int)
50#define __TIOCUCNTL _IOW('t', 102, int) /* SunOS Specific */
51#define TIOCSWINSZ _IOW('t', 103, struct winsize)
52#define TIOCGWINSZ _IOR('t', 104, struct winsize)
53#define __TIOCREMOTE _IOW('t', 105, int) /* SunOS Specific */
54#define TIOCMGET _IOR('t', 106, int)
55#define TIOCMBIC _IOW('t', 107, int)
56#define TIOCMBIS _IOW('t', 108, int)
57#define TIOCMSET _IOW('t', 109, int)
58#define TIOCSTART _IO('t', 110)
59#define TIOCSTOP _IO('t', 111)
60#define TIOCPKT _IOW('t', 112, int)
61#define TIOCNOTTY _IO('t', 113)
62#define TIOCSTI _IOW('t', 114, char)
63#define TIOCOUTQ _IOR('t', 115, int)
64#define __TIOCGLTC _IOR('t', 116, struct ltchars) /* SunOS Specific */
65#define __TIOCSLTC _IOW('t', 117, struct ltchars) /* SunOS Specific */
66/* 118 is the non-posix setpgrp tty ioctl */
67/* 119 is the non-posix getpgrp tty ioctl */
68#define __TIOCCDTR _IO('t', 120) /* SunOS Specific */
69#define __TIOCSDTR _IO('t', 121) /* SunOS Specific */
70#define TIOCCBRK _IO('t', 122)
71#define TIOCSBRK _IO('t', 123)
72#define __TIOCLGET _IOW('t', 124, int) /* SunOS Specific */
73#define __TIOCLSET _IOW('t', 125, int) /* SunOS Specific */
74#define __TIOCLBIC _IOW('t', 126, int) /* SunOS Specific */
75#define __TIOCLBIS _IOW('t', 127, int) /* SunOS Specific */
76#define __TIOCISPACE _IOR('t', 128, int) /* SunOS Specific */
77#define __TIOCISIZE _IOR('t', 129, int) /* SunOS Specific */
78#define TIOCSPGRP _IOW('t', 130, int)
79#define TIOCGPGRP _IOR('t', 131, int)
80#define TIOCSCTTY _IO('t', 132)
81#define TIOCGSID _IOR('t', 133, int)
82/* Get minor device of a pty master's FD -- Solaris equiv is ISPTM */
83#define TIOCGPTN _IOR('t', 134, unsigned int) /* Get Pty Number */
84#define TIOCSPTLCK _IOW('t', 135, int) /* Lock/unlock PTY */
85#define TIOCSIG _IOW('t', 136, int) /* Generate signal on Pty slave */
86
87/* Little f */
88#define FIOCLEX _IO('f', 1)
89#define FIONCLEX _IO('f', 2)
90#define FIOASYNC _IOW('f', 125, int)
91#define FIONBIO _IOW('f', 126, int)
92#define FIONREAD _IOR('f', 127, int)
93#define TIOCINQ FIONREAD
94#define FIOQSIZE _IOR('f', 128, loff_t)
95
96/* SCARY Rutgers local SunOS kernel hackery, perhaps I will support it
97 * someday. This is completely bogus, I know...
98 */
99#define __TCGETSTAT _IO('T', 200) /* Rutgers specific */
100#define __TCSETSTAT _IO('T', 201) /* Rutgers specific */
101
102/* Linux specific, no SunOS equivalent. */
103#define TIOCLINUX 0x541C
104#define TIOCGSERIAL 0x541E
105#define TIOCSSERIAL 0x541F
106#define TCSBRKP 0x5425
107#define TIOCSERCONFIG 0x5453
108#define TIOCSERGWILD 0x5454
109#define TIOCSERSWILD 0x5455
110#define TIOCGLCKTRMIOS 0x5456
111#define TIOCSLCKTRMIOS 0x5457
112#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
113#define TIOCSERGETLSR 0x5459 /* Get line status register */
114#define TIOCSERGETMULTI 0x545A /* Get multiport config */
115#define TIOCSERSETMULTI 0x545B /* Set multiport config */
116#define TIOCMIWAIT 0x545C /* Wait for change on serial input line(s) */
117#define TIOCGICOUNT 0x545D /* Read serial port inline interrupt counts */
118
119/* Kernel definitions */
120#ifdef __KERNEL__
6#define TIOCGETC __TIOCGETC 121#define TIOCGETC __TIOCGETC
7#define TIOCGETP __TIOCGETP 122#define TIOCGETP __TIOCGETP
8#define TIOCGLTC __TIOCGLTC 123#define TIOCGLTC __TIOCGLTC
@@ -10,4 +125,16 @@
10#define TIOCSETP __TIOCSETP 125#define TIOCSETP __TIOCSETP
11#define TIOCSETN __TIOCSETN 126#define TIOCSETN __TIOCSETN
12#define TIOCSETC __TIOCSETC 127#define TIOCSETC __TIOCSETC
128#endif
129
130/* Used for packet mode */
131#define TIOCPKT_DATA 0
132#define TIOCPKT_FLUSHREAD 1
133#define TIOCPKT_FLUSHWRITE 2
134#define TIOCPKT_STOP 4
135#define TIOCPKT_START 8
136#define TIOCPKT_NOSTOP 16
137#define TIOCPKT_DOSTOP 32
138#define TIOCPKT_IOCTL 64
139
13#endif /* !(_ASM_SPARC_IOCTLS_H) */ 140#endif /* !(_ASM_SPARC_IOCTLS_H) */
diff --git a/arch/sparc/include/asm/irq_64.h b/arch/sparc/include/asm/irq_64.h
index abf6afe82ca..16dcae6d56e 100644
--- a/arch/sparc/include/asm/irq_64.h
+++ b/arch/sparc/include/asm/irq_64.h
@@ -95,6 +95,7 @@ void arch_trigger_all_cpu_backtrace(void);
95extern void *hardirq_stack[NR_CPUS]; 95extern void *hardirq_stack[NR_CPUS];
96extern void *softirq_stack[NR_CPUS]; 96extern void *softirq_stack[NR_CPUS];
97#define __ARCH_HAS_DO_SOFTIRQ 97#define __ARCH_HAS_DO_SOFTIRQ
98#define ARCH_HAS_NMI_WATCHDOG
98 99
99#define NO_IRQ 0xffffffff 100#define NO_IRQ 0xffffffff
100 101
diff --git a/arch/sparc/include/asm/irqflags_32.h b/arch/sparc/include/asm/irqflags_32.h
index e414c06615c..14848909e0d 100644
--- a/arch/sparc/include/asm/irqflags_32.h
+++ b/arch/sparc/include/asm/irqflags_32.h
@@ -13,7 +13,6 @@
13#ifndef __ASSEMBLY__ 13#ifndef __ASSEMBLY__
14 14
15#include <linux/types.h> 15#include <linux/types.h>
16#include <asm/psr.h>
17 16
18extern void arch_local_irq_restore(unsigned long); 17extern void arch_local_irq_restore(unsigned long);
19extern unsigned long arch_local_irq_save(void); 18extern unsigned long arch_local_irq_save(void);
diff --git a/arch/sparc/include/asm/jump_label.h b/arch/sparc/include/asm/jump_label.h
index 5080d16a832..fc73a82366f 100644
--- a/arch/sparc/include/asm/jump_label.h
+++ b/arch/sparc/include/asm/jump_label.h
@@ -7,7 +7,7 @@
7 7
8#define JUMP_LABEL_NOP_SIZE 4 8#define JUMP_LABEL_NOP_SIZE 4
9 9
10static __always_inline bool arch_static_branch(struct static_key *key) 10static __always_inline bool arch_static_branch(struct jump_label_key *key)
11{ 11{
12 asm goto("1:\n\t" 12 asm goto("1:\n\t"
13 "nop\n\t" 13 "nop\n\t"
diff --git a/arch/sparc/include/asm/leon.h b/arch/sparc/include/asm/leon.h
index 15a716934e4..a4e457f003e 100644
--- a/arch/sparc/include/asm/leon.h
+++ b/arch/sparc/include/asm/leon.h
@@ -8,6 +8,21 @@
8#ifndef LEON_H_INCLUDE 8#ifndef LEON_H_INCLUDE
9#define LEON_H_INCLUDE 9#define LEON_H_INCLUDE
10 10
11#ifdef CONFIG_SPARC_LEON
12
13#define ASI_LEON_NOCACHE 0x01
14
15#define ASI_LEON_DCACHE_MISS 0x1
16
17#define ASI_LEON_CACHEREGS 0x02
18#define ASI_LEON_IFLUSH 0x10
19#define ASI_LEON_DFLUSH 0x11
20
21#define ASI_LEON_MMUFLUSH 0x18
22#define ASI_LEON_MMUREGS 0x19
23#define ASI_LEON_BYPASS 0x1c
24#define ASI_LEON_FLUSH_PAGE 0x10
25
11/* mmu register access, ASI_LEON_MMUREGS */ 26/* mmu register access, ASI_LEON_MMUREGS */
12#define LEON_CNR_CTRL 0x000 27#define LEON_CNR_CTRL 0x000
13#define LEON_CNR_CTXP 0x100 28#define LEON_CNR_CTXP 0x100
@@ -42,6 +57,29 @@
42#define LEON_IRQMASK_R 0x0000fffe /* bit 15- 1 of lregs.irqmask */ 57#define LEON_IRQMASK_R 0x0000fffe /* bit 15- 1 of lregs.irqmask */
43#define LEON_IRQPRIO_R 0xfffe0000 /* bit 31-17 of lregs.irqmask */ 58#define LEON_IRQPRIO_R 0xfffe0000 /* bit 31-17 of lregs.irqmask */
44 59
60/* leon uart register definitions */
61#define LEON_OFF_UDATA 0x0
62#define LEON_OFF_USTAT 0x4
63#define LEON_OFF_UCTRL 0x8
64#define LEON_OFF_USCAL 0xc
65
66#define LEON_UCTRL_RE 0x01
67#define LEON_UCTRL_TE 0x02
68#define LEON_UCTRL_RI 0x04
69#define LEON_UCTRL_TI 0x08
70#define LEON_UCTRL_PS 0x10
71#define LEON_UCTRL_PE 0x20
72#define LEON_UCTRL_FL 0x40
73#define LEON_UCTRL_LB 0x80
74
75#define LEON_USTAT_DR 0x01
76#define LEON_USTAT_TS 0x02
77#define LEON_USTAT_TH 0x04
78#define LEON_USTAT_BR 0x08
79#define LEON_USTAT_OV 0x10
80#define LEON_USTAT_PE 0x20
81#define LEON_USTAT_FE 0x40
82
45#define LEON_MCFG2_SRAMDIS 0x00002000 83#define LEON_MCFG2_SRAMDIS 0x00002000
46#define LEON_MCFG2_SDRAMEN 0x00004000 84#define LEON_MCFG2_SDRAMEN 0x00004000
47#define LEON_MCFG2_SRAMBANKSZ 0x00001e00 /* [12-9] */ 85#define LEON_MCFG2_SRAMBANKSZ 0x00001e00 /* [12-9] */
@@ -51,6 +89,8 @@
51 89
52#define LEON_TCNT0_MASK 0x7fffff 90#define LEON_TCNT0_MASK 0x7fffff
53 91
92#define LEON_USTAT_ERROR (LEON_USTAT_OV | LEON_USTAT_PE | LEON_USTAT_FE)
93/* no break yet */
54 94
55#define ASI_LEON3_SYSCTRL 0x02 95#define ASI_LEON3_SYSCTRL 0x02
56#define ASI_LEON3_SYSCTRL_ICFG 0x08 96#define ASI_LEON3_SYSCTRL_ICFG 0x08
@@ -60,6 +100,15 @@
60 100
61#ifndef __ASSEMBLY__ 101#ifndef __ASSEMBLY__
62 102
103/* do a virtual address read without cache */
104static inline unsigned long leon_readnobuffer_reg(unsigned long paddr)
105{
106 unsigned long retval;
107 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
108 "=r"(retval) : "r"(paddr), "i"(ASI_LEON_NOCACHE));
109 return retval;
110}
111
63/* do a physical address bypass write, i.e. for 0x80000000 */ 112/* do a physical address bypass write, i.e. for 0x80000000 */
64static inline void leon_store_reg(unsigned long paddr, unsigned long value) 113static inline void leon_store_reg(unsigned long paddr, unsigned long value)
65{ 114{
@@ -76,15 +125,47 @@ static inline unsigned long leon_load_reg(unsigned long paddr)
76 return retval; 125 return retval;
77} 126}
78 127
128static inline void leon_srmmu_disabletlb(void)
129{
130 unsigned int retval;
131 __asm__ __volatile__("lda [%%g0] %2, %0\n\t" : "=r"(retval) : "r"(0),
132 "i"(ASI_LEON_MMUREGS));
133 retval |= LEON_CNR_CTRL_TLBDIS;
134 __asm__ __volatile__("sta %0, [%%g0] %2\n\t" : : "r"(retval), "r"(0),
135 "i"(ASI_LEON_MMUREGS) : "memory");
136}
137
138static inline void leon_srmmu_enabletlb(void)
139{
140 unsigned int retval;
141 __asm__ __volatile__("lda [%%g0] %2, %0\n\t" : "=r"(retval) : "r"(0),
142 "i"(ASI_LEON_MMUREGS));
143 retval = retval & ~LEON_CNR_CTRL_TLBDIS;
144 __asm__ __volatile__("sta %0, [%%g0] %2\n\t" : : "r"(retval), "r"(0),
145 "i"(ASI_LEON_MMUREGS) : "memory");
146}
147
79/* macro access for leon_load_reg() and leon_store_reg() */ 148/* macro access for leon_load_reg() and leon_store_reg() */
80#define LEON3_BYPASS_LOAD_PA(x) (leon_load_reg((unsigned long)(x))) 149#define LEON3_BYPASS_LOAD_PA(x) (leon_load_reg((unsigned long)(x)))
81#define LEON3_BYPASS_STORE_PA(x, v) (leon_store_reg((unsigned long)(x), (unsigned long)(v))) 150#define LEON3_BYPASS_STORE_PA(x, v) (leon_store_reg((unsigned long)(x), (unsigned long)(v)))
151#define LEON3_BYPASS_ANDIN_PA(x, v) LEON3_BYPASS_STORE_PA(x, LEON3_BYPASS_LOAD_PA(x) & v)
152#define LEON3_BYPASS_ORIN_PA(x, v) LEON3_BYPASS_STORE_PA(x, LEON3_BYPASS_LOAD_PA(x) | v)
82#define LEON_BYPASS_LOAD_PA(x) leon_load_reg((unsigned long)(x)) 153#define LEON_BYPASS_LOAD_PA(x) leon_load_reg((unsigned long)(x))
83#define LEON_BYPASS_STORE_PA(x, v) leon_store_reg((unsigned long)(x), (unsigned long)(v)) 154#define LEON_BYPASS_STORE_PA(x, v) leon_store_reg((unsigned long)(x), (unsigned long)(v))
155#define LEON_REGLOAD_PA(x) leon_load_reg((unsigned long)(x)+LEON_PREGS)
156#define LEON_REGSTORE_PA(x, v) leon_store_reg((unsigned long)(x)+LEON_PREGS, (unsigned long)(v))
157#define LEON_REGSTORE_OR_PA(x, v) LEON_REGSTORE_PA(x, LEON_REGLOAD_PA(x) | (unsigned long)(v))
158#define LEON_REGSTORE_AND_PA(x, v) LEON_REGSTORE_PA(x, LEON_REGLOAD_PA(x) & (unsigned long)(v))
84 159
160/* macro access for leon_readnobuffer_reg() */
161#define LEON_BYPASSCACHE_LOAD_VA(x) leon_readnobuffer_reg((unsigned long)(x))
162
163extern void leon_init(void);
85extern void leon_switch_mm(void); 164extern void leon_switch_mm(void);
86extern void leon_init_IRQ(void); 165extern void leon_init_IRQ(void);
87 166
167extern unsigned long last_valid_pfn;
168
88static inline unsigned long sparc_leon3_get_dcachecfg(void) 169static inline unsigned long sparc_leon3_get_dcachecfg(void)
89{ 170{
90 unsigned int retval; 171 unsigned int retval;
@@ -187,6 +268,9 @@ static inline int sparc_leon3_cpuid(void)
187#error cannot determine LEON_PAGE_SIZE_LEON 268#error cannot determine LEON_PAGE_SIZE_LEON
188#endif 269#endif
189 270
271#define PAGE_MIN_SHIFT (12)
272#define PAGE_MIN_SIZE (1UL << PAGE_MIN_SHIFT)
273
190#define LEON3_XCCR_SETS_MASK 0x07000000UL 274#define LEON3_XCCR_SETS_MASK 0x07000000UL
191#define LEON3_XCCR_SSIZE_MASK 0x00f00000UL 275#define LEON3_XCCR_SSIZE_MASK 0x00f00000UL
192 276
@@ -194,11 +278,18 @@ static inline int sparc_leon3_cpuid(void)
194#define LEON2_CFG_SSIZE_MASK 0x00007000UL 278#define LEON2_CFG_SSIZE_MASK 0x00007000UL
195 279
196#ifndef __ASSEMBLY__ 280#ifndef __ASSEMBLY__
197struct vm_area_struct; 281extern unsigned long srmmu_swprobe(unsigned long vaddr, unsigned long *paddr);
282extern void leon_flush_icache_all(void);
283extern void leon_flush_dcache_all(void);
284extern void leon_flush_cache_all(void);
285extern void leon_flush_tlb_all(void);
286extern int leon_flush_during_switch;
287extern int leon_flush_needed(void);
198 288
199extern unsigned long leon_swprobe(unsigned long vaddr, unsigned long *paddr); 289struct vm_area_struct;
200extern void leon_flush_icache_all(void); 290extern void leon_flush_icache_all(void);
201extern void leon_flush_dcache_all(void); 291extern void leon_flush_dcache_all(void);
292extern void leon_flush_pcache_all(struct vm_area_struct *vma, unsigned long page);
202extern void leon_flush_cache_all(void); 293extern void leon_flush_cache_all(void);
203extern void leon_flush_tlb_all(void); 294extern void leon_flush_tlb_all(void);
204extern int leon_flush_during_switch; 295extern int leon_flush_during_switch;
@@ -212,23 +303,40 @@ struct leon3_cacheregs {
212 unsigned long dccr; /* 0x0c - Data Cache Configuration Register */ 303 unsigned long dccr; /* 0x0c - Data Cache Configuration Register */
213}; 304};
214 305
215#include <linux/irq.h> 306/* struct that hold LEON2 cache configuration register
307 * & configuration register
308 */
309struct leon2_cacheregs {
310 unsigned long ccr, cfg;
311};
312
313#ifdef __KERNEL__
314
216#include <linux/interrupt.h> 315#include <linux/interrupt.h>
217 316
218struct device_node; 317struct device_node;
219struct task_struct;
220extern unsigned int leon_build_device_irq(unsigned int real_irq, 318extern unsigned int leon_build_device_irq(unsigned int real_irq,
221 irq_flow_handler_t flow_handler, 319 irq_flow_handler_t flow_handler,
222 const char *name, int do_ack); 320 const char *name, int do_ack);
223extern void leon_update_virq_handling(unsigned int virq, 321extern void leon_update_virq_handling(unsigned int virq,
224 irq_flow_handler_t flow_handler, 322 irq_flow_handler_t flow_handler,
225 const char *name, int do_ack); 323 const char *name, int do_ack);
226extern void leon_init_timers(void); 324extern void leon_clear_clock_irq(void);
325extern void leon_load_profile_irq(int cpu, unsigned int limit);
326extern void leon_init_timers(irq_handler_t counter_fn);
327extern void leon_clear_clock_irq(void);
328extern void leon_load_profile_irq(int cpu, unsigned int limit);
227extern void leon_trans_init(struct device_node *dp); 329extern void leon_trans_init(struct device_node *dp);
228extern void leon_node_init(struct device_node *dp, struct device_node ***nextp); 330extern void leon_node_init(struct device_node *dp, struct device_node ***nextp);
331extern void leon_init_IRQ(void);
332extern void leon_init(void);
333extern unsigned long srmmu_swprobe(unsigned long vaddr, unsigned long *paddr);
229extern void init_leon(void); 334extern void init_leon(void);
230extern void poke_leonsparc(void); 335extern void poke_leonsparc(void);
231extern void leon3_getCacheRegs(struct leon3_cacheregs *regs); 336extern void leon3_getCacheRegs(struct leon3_cacheregs *regs);
337extern int leon_flush_needed(void);
338extern void leon_switch_mm(void);
339extern int srmmu_swprobe_trace;
232extern int leon3_ticker_irq; 340extern int leon3_ticker_irq;
233 341
234#ifdef CONFIG_SMP 342#ifdef CONFIG_SMP
@@ -236,17 +344,26 @@ extern int leon_smp_nrcpus(void);
236extern void leon_clear_profile_irq(int cpu); 344extern void leon_clear_profile_irq(int cpu);
237extern void leon_smp_done(void); 345extern void leon_smp_done(void);
238extern void leon_boot_cpus(void); 346extern void leon_boot_cpus(void);
239extern int leon_boot_one_cpu(int i, struct task_struct *); 347extern int leon_boot_one_cpu(int i);
240void leon_init_smp(void); 348void leon_init_smp(void);
349extern void cpu_idle(void);
350extern void init_IRQ(void);
351extern void cpu_panic(void);
352extern int __leon_processor_id(void);
241void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu); 353void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu);
242extern irqreturn_t leon_percpu_timer_interrupt(int irq, void *unused); 354extern irqreturn_t leon_percpu_timer_interrupt(int irq, void *unused);
243 355
356extern unsigned int real_irq_entry[];
244extern unsigned int smpleon_ipi[]; 357extern unsigned int smpleon_ipi[];
245extern unsigned int linux_trap_ipi15_leon[]; 358extern unsigned int patchme_maybe_smp_msg[];
359extern unsigned int t_nmi[], linux_trap_ipi15_leon[];
360extern unsigned int linux_trap_ipi15_sun4m[];
246extern int leon_ipi_irq; 361extern int leon_ipi_irq;
247 362
248#endif /* CONFIG_SMP */ 363#endif /* CONFIG_SMP */
249 364
365#endif /* __KERNEL__ */
366
250#endif /* __ASSEMBLY__ */ 367#endif /* __ASSEMBLY__ */
251 368
252/* macros used in leon_mm.c */ 369/* macros used in leon_mm.c */
@@ -254,4 +371,18 @@ extern int leon_ipi_irq;
254#define _pfn_valid(pfn) ((pfn < last_valid_pfn) && (pfn >= PFN(phys_base))) 371#define _pfn_valid(pfn) ((pfn < last_valid_pfn) && (pfn >= PFN(phys_base)))
255#define _SRMMU_PTE_PMASK_LEON 0xffffffff 372#define _SRMMU_PTE_PMASK_LEON 0xffffffff
256 373
374#else /* defined(CONFIG_SPARC_LEON) */
375
376/* nop definitions for !LEON case */
377#define leon_init() do {} while (0)
378#define leon_switch_mm() do {} while (0)
379#define leon_init_IRQ() do {} while (0)
380#define init_leon() do {} while (0)
381#define leon_smp_done() do {} while (0)
382#define leon_boot_cpus() do {} while (0)
383#define leon_boot_one_cpu(i) 1
384#define leon_init_smp() do {} while (0)
385
386#endif /* !defined(CONFIG_SPARC_LEON) */
387
257#endif 388#endif
diff --git a/arch/sparc/include/asm/leon_amba.h b/arch/sparc/include/asm/leon_amba.h
index f3034eddf46..e50f326e71b 100644
--- a/arch/sparc/include/asm/leon_amba.h
+++ b/arch/sparc/include/asm/leon_amba.h
@@ -87,6 +87,8 @@ struct amba_prom_registers {
87#define LEON3_GPTIMER_CONFIG_NRTIMERS(c) ((c)->config & 0x7) 87#define LEON3_GPTIMER_CONFIG_NRTIMERS(c) ((c)->config & 0x7)
88#define LEON3_GPTIMER_CTRL_ISPENDING(r) (((r)&LEON3_GPTIMER_CTRL_PENDING) ? 1 : 0) 88#define LEON3_GPTIMER_CTRL_ISPENDING(r) (((r)&LEON3_GPTIMER_CTRL_PENDING) ? 1 : 0)
89 89
90#ifdef CONFIG_SPARC_LEON
91
90#ifndef __ASSEMBLY__ 92#ifndef __ASSEMBLY__
91 93
92struct leon3_irqctrl_regs_map { 94struct leon3_irqctrl_regs_map {
@@ -262,4 +264,6 @@ extern unsigned int sparc_leon_eirq;
262 264
263#define amba_device(x) (((x) >> 12) & 0xfff) 265#define amba_device(x) (((x) >> 12) & 0xfff)
264 266
267#endif /* !defined(CONFIG_SPARC_LEON) */
268
265#endif 269#endif
diff --git a/arch/sparc/include/asm/machines.h b/arch/sparc/include/asm/machines.h
index fd6ddb05d1b..cd9c099567e 100644
--- a/arch/sparc/include/asm/machines.h
+++ b/arch/sparc/include/asm/machines.h
@@ -12,6 +12,11 @@ struct Sun_Machine_Models {
12 unsigned char id_machtype; 12 unsigned char id_machtype;
13}; 13};
14 14
15/* Current number of machines we know about that has an IDPROM
16 * machtype entry including one entry for the 0x80 OBP machines.
17 */
18#define NUM_SUN_MACHINES 16
19
15/* The machine type in the idprom area looks like this: 20/* The machine type in the idprom area looks like this:
16 * 21 *
17 * --------------- 22 * ---------------
@@ -19,20 +24,36 @@ struct Sun_Machine_Models {
19 * --------------- 24 * ---------------
20 * 7 4 3 0 25 * 7 4 3 0
21 * 26 *
22 * The ARCH field determines the architecture line (sun4m, etc). 27 * The ARCH field determines the architecture line (sun4, sun4c, etc).
23 * The MACH field determines the machine make within that architecture. 28 * The MACH field determines the machine make within that architecture.
24 */ 29 */
25 30
26#define SM_ARCH_MASK 0xf0 31#define SM_ARCH_MASK 0xf0
32#define SM_SUN4 0x20
27#define M_LEON 0x30 33#define M_LEON 0x30
34#define SM_SUN4C 0x50
28#define SM_SUN4M 0x70 35#define SM_SUN4M 0x70
29#define SM_SUN4M_OBP 0x80 36#define SM_SUN4M_OBP 0x80
30 37
31#define SM_TYP_MASK 0x0f 38#define SM_TYP_MASK 0x0f
39/* Sun4 machines */
40#define SM_4_260 0x01 /* Sun 4/200 series */
41#define SM_4_110 0x02 /* Sun 4/100 series */
42#define SM_4_330 0x03 /* Sun 4/300 series */
43#define SM_4_470 0x04 /* Sun 4/400 series */
32 44
33/* Leon machines */ 45/* Leon machines */
34#define M_LEON3_SOC 0x02 /* Leon3 SoC */ 46#define M_LEON3_SOC 0x02 /* Leon3 SoC */
35 47
48/* Sun4c machines Full Name - PROM NAME */
49#define SM_4C_SS1 0x01 /* Sun4c SparcStation 1 - Sun 4/60 */
50#define SM_4C_IPC 0x02 /* Sun4c SparcStation IPC - Sun 4/40 */
51#define SM_4C_SS1PLUS 0x03 /* Sun4c SparcStation 1+ - Sun 4/65 */
52#define SM_4C_SLC 0x04 /* Sun4c SparcStation SLC - Sun 4/20 */
53#define SM_4C_SS2 0x05 /* Sun4c SparcStation 2 - Sun 4/75 */
54#define SM_4C_ELC 0x06 /* Sun4c SparcStation ELC - Sun 4/25 */
55#define SM_4C_IPX 0x07 /* Sun4c SparcStation IPX - Sun 4/50 */
56
36/* Sun4m machines, these predate the OpenBoot. These values only mean 57/* Sun4m machines, these predate the OpenBoot. These values only mean
37 * something if the value in the ARCH field is SM_SUN4M, if it is 58 * something if the value in the ARCH field is SM_SUN4M, if it is
38 * SM_SUN4M_OBP then you have the following situation: 59 * SM_SUN4M_OBP then you have the following situation:
diff --git a/arch/sparc/include/asm/mbus.h b/arch/sparc/include/asm/mbus.h
index 14128bcc582..69f07a022ee 100644
--- a/arch/sparc/include/asm/mbus.h
+++ b/arch/sparc/include/asm/mbus.h
@@ -8,10 +8,14 @@
8#define _SPARC_MBUS_H 8#define _SPARC_MBUS_H
9 9
10#include <asm/ross.h> /* HyperSparc stuff */ 10#include <asm/ross.h> /* HyperSparc stuff */
11#include <asm/cypress.h> /* Cypress Chips */
11#include <asm/viking.h> /* Ugh, bug city... */ 12#include <asm/viking.h> /* Ugh, bug city... */
12 13
13enum mbus_module { 14enum mbus_module {
14 HyperSparc = 0, 15 HyperSparc = 0,
16 Cypress = 1,
17 Cypress_vE = 2,
18 Cypress_vD = 3,
15 Swift_ok = 4, 19 Swift_ok = 4,
16 Swift_bad_c = 5, 20 Swift_bad_c = 5,
17 Swift_lots_o_bugs = 6, 21 Swift_lots_o_bugs = 6,
diff --git a/arch/sparc/include/asm/mdesc.h b/arch/sparc/include/asm/mdesc.h
index 139097f3a67..9faa046713f 100644
--- a/arch/sparc/include/asm/mdesc.h
+++ b/arch/sparc/include/asm/mdesc.h
@@ -73,7 +73,6 @@ extern void mdesc_register_notifier(struct mdesc_notifier_client *client);
73 73
74extern void mdesc_fill_in_cpu_data(cpumask_t *mask); 74extern void mdesc_fill_in_cpu_data(cpumask_t *mask);
75extern void mdesc_populate_present_mask(cpumask_t *mask); 75extern void mdesc_populate_present_mask(cpumask_t *mask);
76extern void mdesc_get_page_sizes(cpumask_t *mask, unsigned long *pgsz_mask);
77 76
78extern void sun4v_mdesc_init(void); 77extern void sun4v_mdesc_init(void);
79 78
diff --git a/arch/sparc/include/asm/mman.h b/arch/sparc/include/asm/mman.h
index 59bb5938d85..c3029ad6619 100644
--- a/arch/sparc/include/asm/mman.h
+++ b/arch/sparc/include/asm/mman.h
@@ -1,10 +1,33 @@
1#ifndef __SPARC_MMAN_H__ 1#ifndef __SPARC_MMAN_H__
2#define __SPARC_MMAN_H__ 2#define __SPARC_MMAN_H__
3 3
4#include <uapi/asm/mman.h> 4#include <asm-generic/mman-common.h>
5 5
6/* SunOS'ified... */
7
8#define MAP_RENAME MAP_ANONYMOUS /* In SunOS terminology */
9#define MAP_NORESERVE 0x40 /* don't reserve swap pages */
10#define MAP_INHERIT 0x80 /* SunOS doesn't do this, but... */
11#define MAP_LOCKED 0x100 /* lock the mapping */
12#define _MAP_NEW 0x80000000 /* Binary compatibility is fun... */
13
14#define MAP_GROWSDOWN 0x0200 /* stack-like segment */
15#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
16#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
17
18#define MCL_CURRENT 0x2000 /* lock all currently mapped pages */
19#define MCL_FUTURE 0x4000 /* lock all additions to address space */
20
21#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */
22#define MAP_NONBLOCK 0x10000 /* do not block on IO */
23#define MAP_STACK 0x20000 /* give out an address that is best suited for process/thread stacks */
24#define MAP_HUGETLB 0x40000 /* create a huge page mapping */
25
26#ifdef __KERNEL__
6#ifndef __ASSEMBLY__ 27#ifndef __ASSEMBLY__
7#define arch_mmap_check(addr,len,flags) sparc_mmap_check(addr,len) 28#define arch_mmap_check(addr,len,flags) sparc_mmap_check(addr,len)
8int sparc_mmap_check(unsigned long addr, unsigned long len); 29int sparc_mmap_check(unsigned long addr, unsigned long len);
9#endif 30#endif
31#endif
32
10#endif /* __SPARC_MMAN_H__ */ 33#endif /* __SPARC_MMAN_H__ */
diff --git a/arch/sparc/include/asm/mmu_64.h b/arch/sparc/include/asm/mmu_64.h
index 76092c4dd27..9067dc50053 100644
--- a/arch/sparc/include/asm/mmu_64.h
+++ b/arch/sparc/include/asm/mmu_64.h
@@ -30,8 +30,22 @@
30#define CTX_PGSZ_MASK ((CTX_PGSZ_BITS << CTX_PGSZ0_SHIFT) | \ 30#define CTX_PGSZ_MASK ((CTX_PGSZ_BITS << CTX_PGSZ0_SHIFT) | \
31 (CTX_PGSZ_BITS << CTX_PGSZ1_SHIFT)) 31 (CTX_PGSZ_BITS << CTX_PGSZ1_SHIFT))
32 32
33#if defined(CONFIG_SPARC64_PAGE_SIZE_8KB)
33#define CTX_PGSZ_BASE CTX_PGSZ_8KB 34#define CTX_PGSZ_BASE CTX_PGSZ_8KB
34#define CTX_PGSZ_HUGE CTX_PGSZ_4MB 35#elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB)
36#define CTX_PGSZ_BASE CTX_PGSZ_64KB
37#else
38#error No page size specified in kernel configuration
39#endif
40
41#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
42#define CTX_PGSZ_HUGE CTX_PGSZ_4MB
43#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)
44#define CTX_PGSZ_HUGE CTX_PGSZ_512KB
45#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
46#define CTX_PGSZ_HUGE CTX_PGSZ_64KB
47#endif
48
35#define CTX_PGSZ_KERN CTX_PGSZ_4MB 49#define CTX_PGSZ_KERN CTX_PGSZ_4MB
36 50
37/* Thus, when running on UltraSPARC-III+ and later, we use the following 51/* Thus, when running on UltraSPARC-III+ and later, we use the following
@@ -82,7 +96,7 @@ struct tsb_config {
82 96
83#define MM_TSB_BASE 0 97#define MM_TSB_BASE 0
84 98
85#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE) 99#ifdef CONFIG_HUGETLB_PAGE
86#define MM_TSB_HUGE 1 100#define MM_TSB_HUGE 1
87#define MM_NUM_TSBS 2 101#define MM_NUM_TSBS 2
88#else 102#else
@@ -93,7 +107,6 @@ typedef struct {
93 spinlock_t lock; 107 spinlock_t lock;
94 unsigned long sparc64_ctx_val; 108 unsigned long sparc64_ctx_val;
95 unsigned long huge_pte_count; 109 unsigned long huge_pte_count;
96 struct page *pgtable_page;
97 struct tsb_config tsb_block[MM_NUM_TSBS]; 110 struct tsb_config tsb_block[MM_NUM_TSBS];
98 struct hv_tsb_descr tsb_descr[MM_NUM_TSBS]; 111 struct hv_tsb_descr tsb_descr[MM_NUM_TSBS];
99} mm_context_t; 112} mm_context_t;
diff --git a/arch/sparc/include/asm/mmu_context_32.h b/arch/sparc/include/asm/mmu_context_32.h
index 2df2a9be8f6..671a997b9e6 100644
--- a/arch/sparc/include/asm/mmu_context_32.h
+++ b/arch/sparc/include/asm/mmu_context_32.h
@@ -1,6 +1,8 @@
1#ifndef __SPARC_MMU_CONTEXT_H 1#ifndef __SPARC_MMU_CONTEXT_H
2#define __SPARC_MMU_CONTEXT_H 2#define __SPARC_MMU_CONTEXT_H
3 3
4#include <asm/btfixup.h>
5
4#ifndef __ASSEMBLY__ 6#ifndef __ASSEMBLY__
5 7
6#include <asm-generic/mm_hooks.h> 8#include <asm-generic/mm_hooks.h>
@@ -9,21 +11,26 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
9{ 11{
10} 12}
11 13
12/* Initialize a new mmu context. This is invoked when a new 14/*
15 * Initialize a new mmu context. This is invoked when a new
13 * address space instance (unique or shared) is instantiated. 16 * address space instance (unique or shared) is instantiated.
14 */ 17 */
15int init_new_context(struct task_struct *tsk, struct mm_struct *mm); 18#define init_new_context(tsk, mm) (((mm)->context = NO_CONTEXT), 0)
16 19
17/* Destroy a dead context. This occurs when mmput drops the 20/*
21 * Destroy a dead context. This occurs when mmput drops the
18 * mm_users count to zero, the mmaps have been released, and 22 * mm_users count to zero, the mmaps have been released, and
19 * all the page tables have been flushed. Our job is to destroy 23 * all the page tables have been flushed. Our job is to destroy
20 * any remaining processor-specific state. 24 * any remaining processor-specific state.
21 */ 25 */
22void destroy_context(struct mm_struct *mm); 26BTFIXUPDEF_CALL(void, destroy_context, struct mm_struct *)
27
28#define destroy_context(mm) BTFIXUP_CALL(destroy_context)(mm)
23 29
24/* Switch the current MM context. */ 30/* Switch the current MM context. */
25void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, 31BTFIXUPDEF_CALL(void, switch_mm, struct mm_struct *, struct mm_struct *, struct task_struct *)
26 struct task_struct *tsk); 32
33#define switch_mm(old_mm, mm, tsk) BTFIXUP_CALL(switch_mm)(old_mm, mm, tsk)
27 34
28#define deactivate_mm(tsk,mm) do { } while (0) 35#define deactivate_mm(tsk,mm) do { } while (0)
29 36
diff --git a/arch/sparc/include/asm/mmu_context_64.h b/arch/sparc/include/asm/mmu_context_64.h
index 9191ca62ed9..666a73fef28 100644
--- a/arch/sparc/include/asm/mmu_context_64.h
+++ b/arch/sparc/include/asm/mmu_context_64.h
@@ -6,6 +6,7 @@
6#ifndef __ASSEMBLY__ 6#ifndef __ASSEMBLY__
7 7
8#include <linux/spinlock.h> 8#include <linux/spinlock.h>
9#include <asm/system.h>
9#include <asm/spitfire.h> 10#include <asm/spitfire.h>
10#include <asm-generic/mm_hooks.h> 11#include <asm-generic/mm_hooks.h>
11 12
@@ -36,7 +37,7 @@ static inline void tsb_context_switch(struct mm_struct *mm)
36{ 37{
37 __tsb_context_switch(__pa(mm->pgd), 38 __tsb_context_switch(__pa(mm->pgd),
38 &mm->context.tsb_block[0], 39 &mm->context.tsb_block[0],
39#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE) 40#ifdef CONFIG_HUGETLB_PAGE
40 (mm->context.tsb_block[1].tsb ? 41 (mm->context.tsb_block[1].tsb ?
41 &mm->context.tsb_block[1] : 42 &mm->context.tsb_block[1] :
42 NULL) 43 NULL)
diff --git a/arch/sparc/include/asm/ns87303.h b/arch/sparc/include/asm/ns87303.h
index 6b947ee0f6a..af755483e17 100644
--- a/arch/sparc/include/asm/ns87303.h
+++ b/arch/sparc/include/asm/ns87303.h
@@ -79,6 +79,7 @@
79 79
80#include <linux/spinlock.h> 80#include <linux/spinlock.h>
81 81
82#include <asm/system.h>
82#include <asm/io.h> 83#include <asm/io.h>
83 84
84extern spinlock_t ns87303_lock; 85extern spinlock_t ns87303_lock;
diff --git a/arch/sparc/include/asm/obio.h b/arch/sparc/include/asm/obio.h
index 910c1d9af1f..4ade0c8a2c7 100644
--- a/arch/sparc/include/asm/obio.h
+++ b/arch/sparc/include/asm/obio.h
@@ -220,6 +220,19 @@ static inline void cc_set_igen(unsigned gen)
220 "i" (ASI_M_MXCC)); 220 "i" (ASI_M_MXCC));
221} 221}
222 222
223/* +-------+-------------+-----------+------------------------------------+
224 * | bcast | devid | sid | levels mask |
225 * +-------+-------------+-----------+------------------------------------+
226 * 31 30 23 22 15 14 0
227 */
228#define IGEN_MESSAGE(bcast, devid, sid, levels) \
229 (((bcast) << 31) | ((devid) << 23) | ((sid) << 15) | (levels))
230
231static inline void sun4d_send_ipi(int cpu, int level)
232{
233 cc_set_igen(IGEN_MESSAGE(0, cpu << 3, 6 + ((level >> 1) & 7), 1 << (level - 1)));
234}
235
223#endif /* !__ASSEMBLY__ */ 236#endif /* !__ASSEMBLY__ */
224 237
225#endif /* !(_SPARC_OBIO_H) */ 238#endif /* !(_SPARC_OBIO_H) */
diff --git a/arch/sparc/include/asm/oplib_32.h b/arch/sparc/include/asm/oplib_32.h
index c72f3045820..71e5e9aeb67 100644
--- a/arch/sparc/include/asm/oplib_32.h
+++ b/arch/sparc/include/asm/oplib_32.h
@@ -94,7 +94,7 @@ extern int prom_getprev(void);
94extern void prom_console_write_buf(const char *buf, int len); 94extern void prom_console_write_buf(const char *buf, int len);
95 95
96/* Prom's internal routines, don't use in kernel/boot code. */ 96/* Prom's internal routines, don't use in kernel/boot code. */
97extern __printf(1, 2) void prom_printf(const char *fmt, ...); 97extern void prom_printf(const char *fmt, ...);
98extern void prom_write(const char *buf, unsigned int len); 98extern void prom_write(const char *buf, unsigned int len);
99 99
100/* Multiprocessor operations... */ 100/* Multiprocessor operations... */
@@ -105,6 +105,14 @@ extern void prom_write(const char *buf, unsigned int len);
105extern int prom_startcpu(int cpunode, struct linux_prom_registers *context_table, 105extern int prom_startcpu(int cpunode, struct linux_prom_registers *context_table,
106 int context, char *program_counter); 106 int context, char *program_counter);
107 107
108/* Sun4/sun4c specific memory-management startup hook. */
109
110/* Map the passed segment in the given context at the passed
111 * virtual address.
112 */
113extern void prom_putsegment(int context, unsigned long virt_addr,
114 int physical_segment);
115
108/* Initialize the memory lists based upon the prom version. */ 116/* Initialize the memory lists based upon the prom version. */
109void prom_meminit(void); 117void prom_meminit(void);
110 118
diff --git a/arch/sparc/include/asm/oplib_64.h b/arch/sparc/include/asm/oplib_64.h
index a12dbe3b776..97a90475c31 100644
--- a/arch/sparc/include/asm/oplib_64.h
+++ b/arch/sparc/include/asm/oplib_64.h
@@ -98,7 +98,7 @@ extern unsigned char prom_get_idprom(char *idp_buffer, int idpbuf_size);
98extern void prom_console_write_buf(const char *buf, int len); 98extern void prom_console_write_buf(const char *buf, int len);
99 99
100/* Prom's internal routines, don't use in kernel/boot code. */ 100/* Prom's internal routines, don't use in kernel/boot code. */
101extern __printf(1, 2) void prom_printf(const char *fmt, ...); 101extern void prom_printf(const char *fmt, ...);
102extern void prom_write(const char *buf, unsigned int len); 102extern void prom_write(const char *buf, unsigned int len);
103 103
104/* Multiprocessor operations... */ 104/* Multiprocessor operations... */
diff --git a/arch/sparc/include/asm/page_32.h b/arch/sparc/include/asm/page_32.h
index f82a1f36b65..156707b0f18 100644
--- a/arch/sparc/include/asm/page_32.h
+++ b/arch/sparc/include/asm/page_32.h
@@ -8,12 +8,18 @@
8#ifndef _SPARC_PAGE_H 8#ifndef _SPARC_PAGE_H
9#define _SPARC_PAGE_H 9#define _SPARC_PAGE_H
10 10
11#include <linux/const.h>
12
13#define PAGE_SHIFT 12 11#define PAGE_SHIFT 12
14#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) 12
13#ifndef __ASSEMBLY__
14/* I have my suspicions... -DaveM */
15#define PAGE_SIZE (1UL << PAGE_SHIFT)
16#else
17#define PAGE_SIZE (1 << PAGE_SHIFT)
18#endif
15#define PAGE_MASK (~(PAGE_SIZE-1)) 19#define PAGE_MASK (~(PAGE_SIZE-1))
16 20
21#include <asm/btfixup.h>
22
17#ifndef __ASSEMBLY__ 23#ifndef __ASSEMBLY__
18 24
19#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) 25#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE)
@@ -43,6 +49,12 @@ struct sparc_phys_banks {
43 49
44extern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS+1]; 50extern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS+1];
45 51
52/* Cache alias structure. Entry is valid if context != -1. */
53struct cache_palias {
54 unsigned long vaddr;
55 int context;
56};
57
46/* passing structs on the Sparc slow us down tremendously... */ 58/* passing structs on the Sparc slow us down tremendously... */
47 59
48/* #define STRICT_MM_TYPECHECKS */ 60/* #define STRICT_MM_TYPECHECKS */
@@ -107,7 +119,11 @@ typedef unsigned long iopgprot_t;
107 119
108typedef struct page *pgtable_t; 120typedef struct page *pgtable_t;
109 121
110#define TASK_UNMAPPED_BASE 0x50000000 122extern unsigned long sparc_unmapped_base;
123
124BTFIXUPDEF_SETHI(sparc_unmapped_base)
125
126#define TASK_UNMAPPED_BASE BTFIXUP_SETHI(sparc_unmapped_base)
111 127
112#else /* !(__ASSEMBLY__) */ 128#else /* !(__ASSEMBLY__) */
113 129
diff --git a/arch/sparc/include/asm/page_64.h b/arch/sparc/include/asm/page_64.h
index 4b39f74d6ca..f0d09b40103 100644
--- a/arch/sparc/include/asm/page_64.h
+++ b/arch/sparc/include/asm/page_64.h
@@ -3,7 +3,13 @@
3 3
4#include <linux/const.h> 4#include <linux/const.h>
5 5
6#if defined(CONFIG_SPARC64_PAGE_SIZE_8KB)
6#define PAGE_SHIFT 13 7#define PAGE_SHIFT 13
8#elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB)
9#define PAGE_SHIFT 16
10#else
11#error No page size specified in kernel configuration
12#endif
7 13
8#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) 14#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
9#define PAGE_MASK (~(PAGE_SIZE-1)) 15#define PAGE_MASK (~(PAGE_SIZE-1))
@@ -15,9 +21,15 @@
15#define DCACHE_ALIASING_POSSIBLE 21#define DCACHE_ALIASING_POSSIBLE
16#endif 22#endif
17 23
24#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
18#define HPAGE_SHIFT 22 25#define HPAGE_SHIFT 22
26#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)
27#define HPAGE_SHIFT 19
28#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
29#define HPAGE_SHIFT 16
30#endif
19 31
20#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE) 32#ifdef CONFIG_HUGETLB_PAGE
21#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT) 33#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT)
22#define HPAGE_MASK (~(HPAGE_SIZE - 1UL)) 34#define HPAGE_MASK (~(HPAGE_SIZE - 1UL))
23#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) 35#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
@@ -26,11 +38,6 @@
26 38
27#ifndef __ASSEMBLY__ 39#ifndef __ASSEMBLY__
28 40
29#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
30struct mm_struct;
31extern void hugetlb_setup(struct mm_struct *mm);
32#endif
33
34#define WANT_PAGE_VIRTUAL 41#define WANT_PAGE_VIRTUAL
35 42
36extern void _clear_page(void *page); 43extern void _clear_page(void *page);
@@ -91,7 +98,7 @@ typedef unsigned long pgprot_t;
91 98
92#endif /* (STRICT_MM_TYPECHECKS) */ 99#endif /* (STRICT_MM_TYPECHECKS) */
93 100
94typedef pte_t *pgtable_t; 101typedef struct page *pgtable_t;
95 102
96#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_32BIT) ? \ 103#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_32BIT) ? \
97 (_AC(0x0000000070000000,UL)) : \ 104 (_AC(0x0000000070000000,UL)) : \
diff --git a/arch/sparc/include/asm/parport.h b/arch/sparc/include/asm/parport.h
index c55291e5b83..cb33608cc68 100644
--- a/arch/sparc/include/asm/parport.h
+++ b/arch/sparc/include/asm/parport.h
@@ -103,7 +103,7 @@ static inline unsigned int get_dma_residue(unsigned int dmanr)
103 return ebus_dma_residue(&sparc_ebus_dmas[dmanr].info); 103 return ebus_dma_residue(&sparc_ebus_dmas[dmanr].info);
104} 104}
105 105
106static int ecpp_probe(struct platform_device *op) 106static int __devinit ecpp_probe(struct platform_device *op)
107{ 107{
108 unsigned long base = op->resource[0].start; 108 unsigned long base = op->resource[0].start;
109 unsigned long config = op->resource[1].start; 109 unsigned long config = op->resource[1].start;
@@ -192,7 +192,7 @@ out_err:
192 return err; 192 return err;
193} 193}
194 194
195static int ecpp_remove(struct platform_device *op) 195static int __devexit ecpp_remove(struct platform_device *op)
196{ 196{
197 struct parport *p = dev_get_drvdata(&op->dev); 197 struct parport *p = dev_get_drvdata(&op->dev);
198 int slot = p->dma; 198 int slot = p->dma;
@@ -242,7 +242,7 @@ static struct platform_driver ecpp_driver = {
242 .of_match_table = ecpp_match, 242 .of_match_table = ecpp_match,
243 }, 243 },
244 .probe = ecpp_probe, 244 .probe = ecpp_probe,
245 .remove = ecpp_remove, 245 .remove = __devexit_p(ecpp_remove),
246}; 246};
247 247
248static int parport_pc_find_nonpci_ports(int autoirq, int autodma) 248static int parport_pc_find_nonpci_ports(int autoirq, int autodma)
diff --git a/arch/sparc/include/asm/pci_32.h b/arch/sparc/include/asm/pci_32.h
index dc503297481..02939abd356 100644
--- a/arch/sparc/include/asm/pci_32.h
+++ b/arch/sparc/include/asm/pci_32.h
@@ -16,6 +16,11 @@
16 16
17#define PCI_IRQ_NONE 0xffffffff 17#define PCI_IRQ_NONE 0xffffffff
18 18
19static inline void pcibios_set_master(struct pci_dev *dev)
20{
21 /* No special bus mastering setup handling */
22}
23
19static inline void pcibios_penalize_isa_irq(int irq, int active) 24static inline void pcibios_penalize_isa_irq(int irq, int active)
20{ 25{
21 /* We don't do dynamic PCI IRQ allocation */ 26 /* We don't do dynamic PCI IRQ allocation */
@@ -52,6 +57,14 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
52 * 64Kbytes by the Host controller. 57 * 64Kbytes by the Host controller.
53 */ 58 */
54 59
60extern void
61pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
62 struct resource *res);
63
64extern void
65pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
66 struct pci_bus_region *region);
67
55static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) 68static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
56{ 69{
57 return PCI_IRQ_NONE; 70 return PCI_IRQ_NONE;
diff --git a/arch/sparc/include/asm/pci_64.h b/arch/sparc/include/asm/pci_64.h
index 1633b718d3b..2614d96141c 100644
--- a/arch/sparc/include/asm/pci_64.h
+++ b/arch/sparc/include/asm/pci_64.h
@@ -16,6 +16,11 @@
16 16
17#define PCI_IRQ_NONE 0xffffffff 17#define PCI_IRQ_NONE 0xffffffff
18 18
19static inline void pcibios_set_master(struct pci_dev *dev)
20{
21 /* No special bus mastering setup handling */
22}
23
19static inline void pcibios_penalize_isa_irq(int irq, int active) 24static inline void pcibios_penalize_isa_irq(int irq, int active)
20{ 25{
21 /* We don't do dynamic PCI IRQ allocation */ 26 /* We don't do dynamic PCI IRQ allocation */
@@ -73,6 +78,14 @@ extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
73 enum pci_mmap_state mmap_state, 78 enum pci_mmap_state mmap_state,
74 int write_combine); 79 int write_combine);
75 80
81extern void
82pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
83 struct resource *res);
84
85extern void
86pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
87 struct pci_bus_region *region);
88
76static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) 89static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
77{ 90{
78 return PCI_IRQ_NONE; 91 return PCI_IRQ_NONE;
diff --git a/arch/sparc/include/asm/pcr.h b/arch/sparc/include/asm/pcr.h
index 942bb17f60c..288d7beba05 100644
--- a/arch/sparc/include/asm/pcr.h
+++ b/arch/sparc/include/asm/pcr.h
@@ -2,13 +2,8 @@
2#define __PCR_H 2#define __PCR_H
3 3
4struct pcr_ops { 4struct pcr_ops {
5 u64 (*read_pcr)(unsigned long); 5 u64 (*read)(void);
6 void (*write_pcr)(unsigned long, u64); 6 void (*write)(u64);
7 u64 (*read_pic)(unsigned long);
8 void (*write_pic)(unsigned long, u64);
9 u64 (*nmi_picl_value)(unsigned int nmi_hz);
10 u64 pcr_nmi_enable;
11 u64 pcr_nmi_disable;
12}; 7};
13extern const struct pcr_ops *pcr_ops; 8extern const struct pcr_ops *pcr_ops;
14 9
@@ -32,18 +27,21 @@ extern void schedule_deferred_pcr_work(void);
32#define PCR_N2_SL1_SHIFT 27 27#define PCR_N2_SL1_SHIFT 27
33#define PCR_N2_OV1 0x80000000 28#define PCR_N2_OV1 0x80000000
34 29
35#define PCR_N4_OV 0x00000001 /* PIC overflow */ 30extern unsigned int picl_shift;
36#define PCR_N4_TOE 0x00000002 /* Trap On Event */ 31
37#define PCR_N4_UTRACE 0x00000004 /* Trace user events */ 32/* In order to commonize as much of the implementation as
38#define PCR_N4_STRACE 0x00000008 /* Trace supervisor events */ 33 * possible, we use PICH as our counter. Mostly this is
39#define PCR_N4_HTRACE 0x00000010 /* Trace hypervisor events */ 34 * to accommodate Niagara-1 which can only count insn cycles
40#define PCR_N4_MASK 0x000007e0 /* Event mask */ 35 * in PICH.
41#define PCR_N4_MASK_SHIFT 5 36 */
42#define PCR_N4_SL 0x0000f800 /* Event Select */ 37static inline u64 picl_value(unsigned int nmi_hz)
43#define PCR_N4_SL_SHIFT 11 38{
44#define PCR_N4_PICNPT 0x00010000 /* PIC non-privileged trap */ 39 u32 delta = local_cpu_data().clock_tick / (nmi_hz << picl_shift);
45#define PCR_N4_PICNHT 0x00020000 /* PIC non-hypervisor trap */ 40
46#define PCR_N4_NTC 0x00040000 /* Next-To-Commit wrap */ 41 return ((u64)((0 - delta) & 0xffffffff)) << 32;
42}
43
44extern u64 pcr_enable;
47 45
48extern int pcr_arch_init(void); 46extern int pcr_arch_init(void);
49 47
diff --git a/arch/sparc/include/asm/pgalloc_32.h b/arch/sparc/include/asm/pgalloc_32.h
index 9b1c36de0f1..ca2b34456c4 100644
--- a/arch/sparc/include/asm/pgalloc_32.h
+++ b/arch/sparc/include/asm/pgalloc_32.h
@@ -4,74 +4,65 @@
4#include <linux/kernel.h> 4#include <linux/kernel.h>
5#include <linux/sched.h> 5#include <linux/sched.h>
6 6
7#include <asm/pgtsrmmu.h>
8#include <asm/pgtable.h>
9#include <asm/vaddrs.h>
10#include <asm/page.h> 7#include <asm/page.h>
8#include <asm/btfixup.h>
11 9
12struct page; 10struct page;
13 11
14void *srmmu_get_nocache(int size, int align); 12extern struct pgtable_cache_struct {
15void srmmu_free_nocache(void *addr, int size); 13 unsigned long *pgd_cache;
14 unsigned long *pte_cache;
15 unsigned long pgtable_cache_sz;
16 unsigned long pgd_cache_sz;
17} pgt_quicklists;
18#define pgd_quicklist (pgt_quicklists.pgd_cache)
19#define pmd_quicklist ((unsigned long *)0)
20#define pte_quicklist (pgt_quicklists.pte_cache)
21#define pgtable_cache_size (pgt_quicklists.pgtable_cache_sz)
22#define pgd_cache_size (pgt_quicklists.pgd_cache_sz)
16 23
17#define check_pgt_cache() do { } while (0) 24extern void check_pgt_cache(void);
25BTFIXUPDEF_CALL(void, do_check_pgt_cache, int, int)
26#define do_check_pgt_cache(low,high) BTFIXUP_CALL(do_check_pgt_cache)(low,high)
18 27
19pgd_t *get_pgd_fast(void); 28BTFIXUPDEF_CALL(pgd_t *, get_pgd_fast, void)
20static inline void free_pgd_fast(pgd_t *pgd) 29#define get_pgd_fast() BTFIXUP_CALL(get_pgd_fast)()
21{ 30
22 srmmu_free_nocache(pgd, SRMMU_PGD_TABLE_SIZE); 31BTFIXUPDEF_CALL(void, free_pgd_fast, pgd_t *)
23} 32#define free_pgd_fast(pgd) BTFIXUP_CALL(free_pgd_fast)(pgd)
24 33
25#define pgd_free(mm, pgd) free_pgd_fast(pgd) 34#define pgd_free(mm, pgd) free_pgd_fast(pgd)
26#define pgd_alloc(mm) get_pgd_fast() 35#define pgd_alloc(mm) get_pgd_fast()
27 36
28static inline void pgd_set(pgd_t * pgdp, pmd_t * pmdp) 37BTFIXUPDEF_CALL(void, pgd_set, pgd_t *, pmd_t *)
29{ 38#define pgd_set(pgdp,pmdp) BTFIXUP_CALL(pgd_set)(pgdp,pmdp)
30 unsigned long pa = __nocache_pa((unsigned long)pmdp);
31
32 set_pte((pte_t *)pgdp, (SRMMU_ET_PTD | (pa >> 4)));
33}
34
35#define pgd_populate(MM, PGD, PMD) pgd_set(PGD, PMD) 39#define pgd_populate(MM, PGD, PMD) pgd_set(PGD, PMD)
36 40
37static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, 41BTFIXUPDEF_CALL(pmd_t *, pmd_alloc_one, struct mm_struct *, unsigned long)
38 unsigned long address) 42#define pmd_alloc_one(mm, address) BTFIXUP_CALL(pmd_alloc_one)(mm, address)
39{
40 return srmmu_get_nocache(SRMMU_PMD_TABLE_SIZE,
41 SRMMU_PMD_TABLE_SIZE);
42}
43 43
44static inline void free_pmd_fast(pmd_t * pmd) 44BTFIXUPDEF_CALL(void, free_pmd_fast, pmd_t *)
45{ 45#define free_pmd_fast(pmd) BTFIXUP_CALL(free_pmd_fast)(pmd)
46 srmmu_free_nocache(pmd, SRMMU_PMD_TABLE_SIZE);
47}
48 46
49#define pmd_free(mm, pmd) free_pmd_fast(pmd) 47#define pmd_free(mm, pmd) free_pmd_fast(pmd)
50#define __pmd_free_tlb(tlb, pmd, addr) pmd_free((tlb)->mm, pmd) 48#define __pmd_free_tlb(tlb, pmd, addr) pmd_free((tlb)->mm, pmd)
51 49
52void pmd_populate(struct mm_struct *mm, pmd_t *pmdp, struct page *ptep); 50BTFIXUPDEF_CALL(void, pmd_populate, pmd_t *, struct page *)
51#define pmd_populate(MM, PMD, PTE) BTFIXUP_CALL(pmd_populate)(PMD, PTE)
53#define pmd_pgtable(pmd) pmd_page(pmd) 52#define pmd_pgtable(pmd) pmd_page(pmd)
53BTFIXUPDEF_CALL(void, pmd_set, pmd_t *, pte_t *)
54#define pmd_populate_kernel(MM, PMD, PTE) BTFIXUP_CALL(pmd_set)(PMD, PTE)
54 55
55void pmd_set(pmd_t *pmdp, pte_t *ptep); 56BTFIXUPDEF_CALL(pgtable_t , pte_alloc_one, struct mm_struct *, unsigned long)
56#define pmd_populate_kernel(MM, PMD, PTE) pmd_set(PMD, PTE) 57#define pte_alloc_one(mm, address) BTFIXUP_CALL(pte_alloc_one)(mm, address)
57 58BTFIXUPDEF_CALL(pte_t *, pte_alloc_one_kernel, struct mm_struct *, unsigned long)
58pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address); 59#define pte_alloc_one_kernel(mm, addr) BTFIXUP_CALL(pte_alloc_one_kernel)(mm, addr)
59
60static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
61 unsigned long address)
62{
63 return srmmu_get_nocache(PTE_SIZE, PTE_SIZE);
64}
65
66
67static inline void free_pte_fast(pte_t *pte)
68{
69 srmmu_free_nocache(pte, PTE_SIZE);
70}
71 60
72#define pte_free_kernel(mm, pte) free_pte_fast(pte) 61BTFIXUPDEF_CALL(void, free_pte_fast, pte_t *)
62#define pte_free_kernel(mm, pte) BTFIXUP_CALL(free_pte_fast)(pte)
73 63
74void pte_free(struct mm_struct * mm, pgtable_t pte); 64BTFIXUPDEF_CALL(void, pte_free, pgtable_t )
65#define pte_free(mm, pte) BTFIXUP_CALL(pte_free)(pte)
75#define __pte_free_tlb(tlb, pte, addr) pte_free((tlb)->mm, pte) 66#define __pte_free_tlb(tlb, pte, addr) pte_free((tlb)->mm, pte)
76 67
77#endif /* _SPARC_PGALLOC_H */ 68#endif /* _SPARC_PGALLOC_H */
diff --git a/arch/sparc/include/asm/pgalloc_64.h b/arch/sparc/include/asm/pgalloc_64.h
index bcfe063bce2..40b2d7a7023 100644
--- a/arch/sparc/include/asm/pgalloc_64.h
+++ b/arch/sparc/include/asm/pgalloc_64.h
@@ -38,20 +38,51 @@ static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
38 kmem_cache_free(pgtable_cache, pmd); 38 kmem_cache_free(pgtable_cache, pmd);
39} 39}
40 40
41extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, 41static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
42 unsigned long address); 42 unsigned long address)
43extern pgtable_t pte_alloc_one(struct mm_struct *mm, 43{
44 unsigned long address); 44 return (pte_t *)__get_free_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO);
45extern void pte_free_kernel(struct mm_struct *mm, pte_t *pte); 45}
46extern void pte_free(struct mm_struct *mm, pgtable_t ptepage); 46
47static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
48 unsigned long address)
49{
50 struct page *page;
51 pte_t *pte;
52
53 pte = pte_alloc_one_kernel(mm, address);
54 if (!pte)
55 return NULL;
56 page = virt_to_page(pte);
57 pgtable_page_ctor(page);
58 return page;
59}
60
61static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
62{
63 free_page((unsigned long)pte);
64}
65
66static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)
67{
68 pgtable_page_dtor(ptepage);
69 __free_page(ptepage);
70}
47 71
48#define pmd_populate_kernel(MM, PMD, PTE) pmd_set(MM, PMD, PTE) 72#define pmd_populate_kernel(MM, PMD, PTE) pmd_set(PMD, PTE)
49#define pmd_populate(MM, PMD, PTE) pmd_set(MM, PMD, PTE) 73#define pmd_populate(MM,PMD,PTE_PAGE) \
50#define pmd_pgtable(PMD) ((pte_t *)__pmd_page(PMD)) 74 pmd_populate_kernel(MM,PMD,page_address(PTE_PAGE))
75#define pmd_pgtable(pmd) pmd_page(pmd)
51 76
52#define check_pgt_cache() do { } while (0) 77#define check_pgt_cache() do { } while (0)
53 78
54extern void pgtable_free(void *table, bool is_page); 79static inline void pgtable_free(void *table, bool is_page)
80{
81 if (is_page)
82 free_page((unsigned long)table);
83 else
84 kmem_cache_free(pgtable_cache, table);
85}
55 86
56#ifdef CONFIG_SMP 87#ifdef CONFIG_SMP
57 88
@@ -82,10 +113,11 @@ static inline void pgtable_free_tlb(struct mmu_gather *tlb, void *table, bool is
82} 113}
83#endif /* !CONFIG_SMP */ 114#endif /* !CONFIG_SMP */
84 115
85static inline void __pte_free_tlb(struct mmu_gather *tlb, pte_t *pte, 116static inline void __pte_free_tlb(struct mmu_gather *tlb, struct page *ptepage,
86 unsigned long address) 117 unsigned long address)
87{ 118{
88 pgtable_free_tlb(tlb, pte, true); 119 pgtable_page_dtor(ptepage);
120 pgtable_free_tlb(tlb, page_address(ptepage), true);
89} 121}
90 122
91#define __pmd_free_tlb(tlb, pmd, addr) \ 123#define __pmd_free_tlb(tlb, pmd, addr) \
diff --git a/arch/sparc/include/asm/pgtable_32.h b/arch/sparc/include/asm/pgtable_32.h
index 6fc13483f70..a790cc65747 100644
--- a/arch/sparc/include/asm/pgtable_32.h
+++ b/arch/sparc/include/asm/pgtable_32.h
@@ -16,10 +16,12 @@
16#include <linux/spinlock.h> 16#include <linux/spinlock.h>
17#include <linux/swap.h> 17#include <linux/swap.h>
18#include <asm/types.h> 18#include <asm/types.h>
19#include <asm/pgtsun4c.h>
19#include <asm/pgtsrmmu.h> 20#include <asm/pgtsrmmu.h>
20#include <asm/vaddrs.h> 21#include <asm/vac-ops.h>
21#include <asm/oplib.h> 22#include <asm/oplib.h>
22#include <asm/cpu_type.h> 23#include <asm/btfixup.h>
24#include <asm/system.h>
23 25
24 26
25struct vm_area_struct; 27struct vm_area_struct;
@@ -28,56 +30,89 @@ struct page;
28extern void load_mmu(void); 30extern void load_mmu(void);
29extern unsigned long calc_highpages(void); 31extern unsigned long calc_highpages(void);
30 32
33BTFIXUPDEF_SIMM13(pgdir_shift)
34BTFIXUPDEF_SETHI(pgdir_size)
35BTFIXUPDEF_SETHI(pgdir_mask)
36
37BTFIXUPDEF_SIMM13(ptrs_per_pmd)
38BTFIXUPDEF_SIMM13(ptrs_per_pgd)
39BTFIXUPDEF_SIMM13(user_ptrs_per_pgd)
40
31#define pte_ERROR(e) __builtin_trap() 41#define pte_ERROR(e) __builtin_trap()
32#define pmd_ERROR(e) __builtin_trap() 42#define pmd_ERROR(e) __builtin_trap()
33#define pgd_ERROR(e) __builtin_trap() 43#define pgd_ERROR(e) __builtin_trap()
34 44
35#define PMD_SHIFT 22 45BTFIXUPDEF_INT(page_none)
46BTFIXUPDEF_INT(page_copy)
47BTFIXUPDEF_INT(page_readonly)
48BTFIXUPDEF_INT(page_kernel)
49
50#define PMD_SHIFT SUN4C_PMD_SHIFT
36#define PMD_SIZE (1UL << PMD_SHIFT) 51#define PMD_SIZE (1UL << PMD_SHIFT)
37#define PMD_MASK (~(PMD_SIZE-1)) 52#define PMD_MASK (~(PMD_SIZE-1))
38#define PMD_ALIGN(__addr) (((__addr) + ~PMD_MASK) & PMD_MASK) 53#define PMD_ALIGN(__addr) (((__addr) + ~PMD_MASK) & PMD_MASK)
39#define PGDIR_SHIFT SRMMU_PGDIR_SHIFT 54#define PGDIR_SHIFT BTFIXUP_SIMM13(pgdir_shift)
40#define PGDIR_SIZE SRMMU_PGDIR_SIZE 55#define PGDIR_SIZE BTFIXUP_SETHI(pgdir_size)
41#define PGDIR_MASK SRMMU_PGDIR_MASK 56#define PGDIR_MASK BTFIXUP_SETHI(pgdir_mask)
42#define PTRS_PER_PTE 1024 57#define PTRS_PER_PTE 1024
43#define PTRS_PER_PMD SRMMU_PTRS_PER_PMD 58#define PTRS_PER_PMD BTFIXUP_SIMM13(ptrs_per_pmd)
44#define PTRS_PER_PGD SRMMU_PTRS_PER_PGD 59#define PTRS_PER_PGD BTFIXUP_SIMM13(ptrs_per_pgd)
45#define USER_PTRS_PER_PGD PAGE_OFFSET / SRMMU_PGDIR_SIZE 60#define USER_PTRS_PER_PGD BTFIXUP_SIMM13(user_ptrs_per_pgd)
46#define FIRST_USER_ADDRESS 0 61#define FIRST_USER_ADDRESS 0
47#define PTE_SIZE (PTRS_PER_PTE*4) 62#define PTE_SIZE (PTRS_PER_PTE*4)
48 63
49#define PAGE_NONE SRMMU_PAGE_NONE 64#define PAGE_NONE __pgprot(BTFIXUP_INT(page_none))
50#define PAGE_SHARED SRMMU_PAGE_SHARED 65extern pgprot_t PAGE_SHARED;
51#define PAGE_COPY SRMMU_PAGE_COPY 66#define PAGE_COPY __pgprot(BTFIXUP_INT(page_copy))
52#define PAGE_READONLY SRMMU_PAGE_RDONLY 67#define PAGE_READONLY __pgprot(BTFIXUP_INT(page_readonly))
53#define PAGE_KERNEL SRMMU_PAGE_KERNEL 68
69extern unsigned long page_kernel;
54 70
55/* Top-level page directory - dummy used by init-mm. 71#ifdef MODULE
56 * srmmu.c will assign the real one (which is dynamically sized) */ 72#define PAGE_KERNEL page_kernel
57#define swapper_pg_dir NULL 73#else
74#define PAGE_KERNEL __pgprot(BTFIXUP_INT(page_kernel))
75#endif
76
77/* Top-level page directory */
78extern pgd_t swapper_pg_dir[1024];
58 79
59extern void paging_init(void); 80extern void paging_init(void);
60 81
82/* Page table for 0-4MB for everybody, on the Sparc this
83 * holds the same as on the i386.
84 */
85extern pte_t pg0[1024];
86extern pte_t pg1[1024];
87extern pte_t pg2[1024];
88extern pte_t pg3[1024];
89
61extern unsigned long ptr_in_current_pgd; 90extern unsigned long ptr_in_current_pgd;
62 91
63/* xwr */ 92/* Here is a trick, since mmap.c need the initializer elements for
64#define __P000 PAGE_NONE 93 * protection_map[] to be constant at compile time, I set the following
65#define __P001 PAGE_READONLY 94 * to all zeros. I set it to the real values after I link in the
66#define __P010 PAGE_COPY 95 * appropriate MMU page table routines at boot time.
67#define __P011 PAGE_COPY 96 */
68#define __P100 PAGE_READONLY 97#define __P000 __pgprot(0)
69#define __P101 PAGE_READONLY 98#define __P001 __pgprot(0)
70#define __P110 PAGE_COPY 99#define __P010 __pgprot(0)
71#define __P111 PAGE_COPY 100#define __P011 __pgprot(0)
72 101#define __P100 __pgprot(0)
73#define __S000 PAGE_NONE 102#define __P101 __pgprot(0)
74#define __S001 PAGE_READONLY 103#define __P110 __pgprot(0)
75#define __S010 PAGE_SHARED 104#define __P111 __pgprot(0)
76#define __S011 PAGE_SHARED 105
77#define __S100 PAGE_READONLY 106#define __S000 __pgprot(0)
78#define __S101 PAGE_READONLY 107#define __S001 __pgprot(0)
79#define __S110 PAGE_SHARED 108#define __S010 __pgprot(0)
80#define __S111 PAGE_SHARED 109#define __S011 __pgprot(0)
110#define __S100 __pgprot(0)
111#define __S101 __pgprot(0)
112#define __S110 __pgprot(0)
113#define __S111 __pgprot(0)
114
115extern int num_contexts;
81 116
82/* First physical page can be anywhere, the following is needed so that 117/* First physical page can be anywhere, the following is needed so that
83 * va-->pa and vice versa conversions work properly without performance 118 * va-->pa and vice versa conversions work properly without performance
@@ -87,145 +122,97 @@ extern unsigned long phys_base;
87extern unsigned long pfn_base; 122extern unsigned long pfn_base;
88 123
89/* 124/*
125 * BAD_PAGETABLE is used when we need a bogus page-table, while
126 * BAD_PAGE is used for a bogus page.
127 *
90 * ZERO_PAGE is a global shared page that is always zero: used 128 * ZERO_PAGE is a global shared page that is always zero: used
91 * for zero-mapped memory areas etc.. 129 * for zero-mapped memory areas etc..
92 */ 130 */
131extern pte_t * __bad_pagetable(void);
132extern pte_t __bad_page(void);
93extern unsigned long empty_zero_page; 133extern unsigned long empty_zero_page;
94 134
135#define BAD_PAGETABLE __bad_pagetable()
136#define BAD_PAGE __bad_page()
95#define ZERO_PAGE(vaddr) (virt_to_page(&empty_zero_page)) 137#define ZERO_PAGE(vaddr) (virt_to_page(&empty_zero_page))
96 138
97/* 139/*
98 * In general all page table modifications should use the V8 atomic
99 * swap instruction. This insures the mmu and the cpu are in sync
100 * with respect to ref/mod bits in the page tables.
101 */ 140 */
102static inline unsigned long srmmu_swap(unsigned long *addr, unsigned long value) 141BTFIXUPDEF_CALL_CONST(struct page *, pmd_page, pmd_t)
103{ 142BTFIXUPDEF_CALL_CONST(unsigned long, pgd_page_vaddr, pgd_t)
104 __asm__ __volatile__("swap [%2], %0" : "=&r" (value) : "0" (value), "r" (addr));
105 return value;
106}
107 143
108/* Certain architectures need to do special things when pte's 144#define pmd_page(pmd) BTFIXUP_CALL(pmd_page)(pmd)
109 * within a page table are directly modified. Thus, the following 145#define pgd_page_vaddr(pgd) BTFIXUP_CALL(pgd_page_vaddr)(pgd)
110 * hook is made available.
111 */
112
113static inline void set_pte(pte_t *ptep, pte_t pteval)
114{
115 srmmu_swap((unsigned long *)ptep, pte_val(pteval));
116}
117
118#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
119
120static inline int srmmu_device_memory(unsigned long x)
121{
122 return ((x & 0xF0000000) != 0);
123}
124
125static inline struct page *pmd_page(pmd_t pmd)
126{
127 if (srmmu_device_memory(pmd_val(pmd)))
128 BUG();
129 return pfn_to_page((pmd_val(pmd) & SRMMU_PTD_PMASK) >> (PAGE_SHIFT-4));
130}
131
132static inline unsigned long pgd_page_vaddr(pgd_t pgd)
133{
134 if (srmmu_device_memory(pgd_val(pgd))) {
135 return ~0;
136 } else {
137 unsigned long v = pgd_val(pgd) & SRMMU_PTD_PMASK;
138 return (unsigned long)__nocache_va(v << 4);
139 }
140}
141 146
142static inline int pte_present(pte_t pte) 147BTFIXUPDEF_CALL_CONST(int, pte_present, pte_t)
143{ 148BTFIXUPDEF_CALL(void, pte_clear, pte_t *)
144 return ((pte_val(pte) & SRMMU_ET_MASK) == SRMMU_ET_PTE);
145}
146 149
147static inline int pte_none(pte_t pte) 150static inline int pte_none(pte_t pte)
148{ 151{
149 return !pte_val(pte); 152 return !pte_val(pte);
150} 153}
151 154
152static inline void __pte_clear(pte_t *ptep) 155#define pte_present(pte) BTFIXUP_CALL(pte_present)(pte)
153{ 156#define pte_clear(mm,addr,pte) BTFIXUP_CALL(pte_clear)(pte)
154 set_pte(ptep, __pte(0));
155}
156 157
157static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 158BTFIXUPDEF_CALL_CONST(int, pmd_bad, pmd_t)
158{ 159BTFIXUPDEF_CALL_CONST(int, pmd_present, pmd_t)
159 __pte_clear(ptep); 160BTFIXUPDEF_CALL(void, pmd_clear, pmd_t *)
160}
161
162static inline int pmd_bad(pmd_t pmd)
163{
164 return (pmd_val(pmd) & SRMMU_ET_MASK) != SRMMU_ET_PTD;
165}
166
167static inline int pmd_present(pmd_t pmd)
168{
169 return ((pmd_val(pmd) & SRMMU_ET_MASK) == SRMMU_ET_PTD);
170}
171 161
172static inline int pmd_none(pmd_t pmd) 162static inline int pmd_none(pmd_t pmd)
173{ 163{
174 return !pmd_val(pmd); 164 return !pmd_val(pmd);
175} 165}
176 166
177static inline void pmd_clear(pmd_t *pmdp) 167#define pmd_bad(pmd) BTFIXUP_CALL(pmd_bad)(pmd)
178{ 168#define pmd_present(pmd) BTFIXUP_CALL(pmd_present)(pmd)
179 int i; 169#define pmd_clear(pmd) BTFIXUP_CALL(pmd_clear)(pmd)
180 for (i = 0; i < PTRS_PER_PTE/SRMMU_REAL_PTRS_PER_PTE; i++)
181 set_pte((pte_t *)&pmdp->pmdv[i], __pte(0));
182}
183 170
184static inline int pgd_none(pgd_t pgd) 171BTFIXUPDEF_CALL_CONST(int, pgd_none, pgd_t)
185{ 172BTFIXUPDEF_CALL_CONST(int, pgd_bad, pgd_t)
186 return !(pgd_val(pgd) & 0xFFFFFFF); 173BTFIXUPDEF_CALL_CONST(int, pgd_present, pgd_t)
187} 174BTFIXUPDEF_CALL(void, pgd_clear, pgd_t *)
188
189static inline int pgd_bad(pgd_t pgd)
190{
191 return (pgd_val(pgd) & SRMMU_ET_MASK) != SRMMU_ET_PTD;
192}
193
194static inline int pgd_present(pgd_t pgd)
195{
196 return ((pgd_val(pgd) & SRMMU_ET_MASK) == SRMMU_ET_PTD);
197}
198 175
199static inline void pgd_clear(pgd_t *pgdp) 176#define pgd_none(pgd) BTFIXUP_CALL(pgd_none)(pgd)
200{ 177#define pgd_bad(pgd) BTFIXUP_CALL(pgd_bad)(pgd)
201 set_pte((pte_t *)pgdp, __pte(0)); 178#define pgd_present(pgd) BTFIXUP_CALL(pgd_present)(pgd)
202} 179#define pgd_clear(pgd) BTFIXUP_CALL(pgd_clear)(pgd)
203 180
204/* 181/*
205 * The following only work if pte_present() is true. 182 * The following only work if pte_present() is true.
206 * Undefined behaviour if not.. 183 * Undefined behaviour if not..
207 */ 184 */
185BTFIXUPDEF_HALF(pte_writei)
186BTFIXUPDEF_HALF(pte_dirtyi)
187BTFIXUPDEF_HALF(pte_youngi)
188
189static int pte_write(pte_t pte) __attribute_const__;
208static inline int pte_write(pte_t pte) 190static inline int pte_write(pte_t pte)
209{ 191{
210 return pte_val(pte) & SRMMU_WRITE; 192 return pte_val(pte) & BTFIXUP_HALF(pte_writei);
211} 193}
212 194
195static int pte_dirty(pte_t pte) __attribute_const__;
213static inline int pte_dirty(pte_t pte) 196static inline int pte_dirty(pte_t pte)
214{ 197{
215 return pte_val(pte) & SRMMU_DIRTY; 198 return pte_val(pte) & BTFIXUP_HALF(pte_dirtyi);
216} 199}
217 200
201static int pte_young(pte_t pte) __attribute_const__;
218static inline int pte_young(pte_t pte) 202static inline int pte_young(pte_t pte)
219{ 203{
220 return pte_val(pte) & SRMMU_REF; 204 return pte_val(pte) & BTFIXUP_HALF(pte_youngi);
221} 205}
222 206
223/* 207/*
224 * The following only work if pte_present() is not true. 208 * The following only work if pte_present() is not true.
225 */ 209 */
210BTFIXUPDEF_HALF(pte_filei)
211
212static int pte_file(pte_t pte) __attribute_const__;
226static inline int pte_file(pte_t pte) 213static inline int pte_file(pte_t pte)
227{ 214{
228 return pte_val(pte) & SRMMU_FILE; 215 return pte_val(pte) & BTFIXUP_HALF(pte_filei);
229} 216}
230 217
231static inline int pte_special(pte_t pte) 218static inline int pte_special(pte_t pte)
@@ -233,85 +220,68 @@ static inline int pte_special(pte_t pte)
233 return 0; 220 return 0;
234} 221}
235 222
223/*
224 */
225BTFIXUPDEF_HALF(pte_wrprotecti)
226BTFIXUPDEF_HALF(pte_mkcleani)
227BTFIXUPDEF_HALF(pte_mkoldi)
228
229static pte_t pte_wrprotect(pte_t pte) __attribute_const__;
236static inline pte_t pte_wrprotect(pte_t pte) 230static inline pte_t pte_wrprotect(pte_t pte)
237{ 231{
238 return __pte(pte_val(pte) & ~SRMMU_WRITE); 232 return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_wrprotecti));
239} 233}
240 234
235static pte_t pte_mkclean(pte_t pte) __attribute_const__;
241static inline pte_t pte_mkclean(pte_t pte) 236static inline pte_t pte_mkclean(pte_t pte)
242{ 237{
243 return __pte(pte_val(pte) & ~SRMMU_DIRTY); 238 return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkcleani));
244} 239}
245 240
241static pte_t pte_mkold(pte_t pte) __attribute_const__;
246static inline pte_t pte_mkold(pte_t pte) 242static inline pte_t pte_mkold(pte_t pte)
247{ 243{
248 return __pte(pte_val(pte) & ~SRMMU_REF); 244 return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkoldi));
249}
250
251static inline pte_t pte_mkwrite(pte_t pte)
252{
253 return __pte(pte_val(pte) | SRMMU_WRITE);
254} 245}
255 246
256static inline pte_t pte_mkdirty(pte_t pte) 247BTFIXUPDEF_CALL_CONST(pte_t, pte_mkwrite, pte_t)
257{ 248BTFIXUPDEF_CALL_CONST(pte_t, pte_mkdirty, pte_t)
258 return __pte(pte_val(pte) | SRMMU_DIRTY); 249BTFIXUPDEF_CALL_CONST(pte_t, pte_mkyoung, pte_t)
259}
260 250
261static inline pte_t pte_mkyoung(pte_t pte) 251#define pte_mkwrite(pte) BTFIXUP_CALL(pte_mkwrite)(pte)
262{ 252#define pte_mkdirty(pte) BTFIXUP_CALL(pte_mkdirty)(pte)
263 return __pte(pte_val(pte) | SRMMU_REF); 253#define pte_mkyoung(pte) BTFIXUP_CALL(pte_mkyoung)(pte)
264}
265 254
266#define pte_mkspecial(pte) (pte) 255#define pte_mkspecial(pte) (pte)
267 256
268#define pfn_pte(pfn, prot) mk_pte(pfn_to_page(pfn), prot) 257#define pfn_pte(pfn, prot) mk_pte(pfn_to_page(pfn), prot)
269 258
270static inline unsigned long pte_pfn(pte_t pte) 259BTFIXUPDEF_CALL(unsigned long, pte_pfn, pte_t)
271{ 260#define pte_pfn(pte) BTFIXUP_CALL(pte_pfn)(pte)
272 if (srmmu_device_memory(pte_val(pte))) {
273 /* Just return something that will cause
274 * pfn_valid() to return false. This makes
275 * copy_one_pte() to just directly copy to
276 * PTE over.
277 */
278 return ~0UL;
279 }
280 return (pte_val(pte) & SRMMU_PTE_PMASK) >> (PAGE_SHIFT-4);
281}
282
283#define pte_page(pte) pfn_to_page(pte_pfn(pte)) 261#define pte_page(pte) pfn_to_page(pte_pfn(pte))
284 262
285/* 263/*
286 * Conversion functions: convert a page and protection to a page entry, 264 * Conversion functions: convert a page and protection to a page entry,
287 * and a page entry and page directory to the page they refer to. 265 * and a page entry and page directory to the page they refer to.
288 */ 266 */
289static inline pte_t mk_pte(struct page *page, pgprot_t pgprot) 267BTFIXUPDEF_CALL_CONST(pte_t, mk_pte, struct page *, pgprot_t)
290{
291 return __pte((page_to_pfn(page) << (PAGE_SHIFT-4)) | pgprot_val(pgprot));
292}
293 268
294static inline pte_t mk_pte_phys(unsigned long page, pgprot_t pgprot) 269BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_phys, unsigned long, pgprot_t)
295{ 270BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_io, unsigned long, pgprot_t, int)
296 return __pte(((page) >> 4) | pgprot_val(pgprot)); 271BTFIXUPDEF_CALL_CONST(pgprot_t, pgprot_noncached, pgprot_t)
297}
298 272
299static inline pte_t mk_pte_io(unsigned long page, pgprot_t pgprot, int space) 273#define mk_pte(page,pgprot) BTFIXUP_CALL(mk_pte)(page,pgprot)
300{ 274#define mk_pte_phys(page,pgprot) BTFIXUP_CALL(mk_pte_phys)(page,pgprot)
301 return __pte(((page) >> 4) | (space << 28) | pgprot_val(pgprot)); 275#define mk_pte_io(page,pgprot,space) BTFIXUP_CALL(mk_pte_io)(page,pgprot,space)
302}
303 276
304#define pgprot_noncached pgprot_noncached 277#define pgprot_noncached(pgprot) BTFIXUP_CALL(pgprot_noncached)(pgprot)
305static inline pgprot_t pgprot_noncached(pgprot_t prot) 278
306{ 279BTFIXUPDEF_INT(pte_modify_mask)
307 prot &= ~__pgprot(SRMMU_CACHE);
308 return prot;
309}
310 280
311static pte_t pte_modify(pte_t pte, pgprot_t newprot) __attribute_const__; 281static pte_t pte_modify(pte_t pte, pgprot_t newprot) __attribute_const__;
312static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 282static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
313{ 283{
314 return __pte((pte_val(pte) & SRMMU_CHG_MASK) | 284 return __pte((pte_val(pte) & BTFIXUP_INT(pte_modify_mask)) |
315 pgprot_val(newprot)); 285 pgprot_val(newprot));
316} 286}
317 287
@@ -324,76 +294,114 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
324#define pgd_offset_k(address) pgd_offset(&init_mm, address) 294#define pgd_offset_k(address) pgd_offset(&init_mm, address)
325 295
326/* Find an entry in the second-level page table.. */ 296/* Find an entry in the second-level page table.. */
327static inline pmd_t *pmd_offset(pgd_t * dir, unsigned long address) 297BTFIXUPDEF_CALL(pmd_t *, pmd_offset, pgd_t *, unsigned long)
328{ 298#define pmd_offset(dir,addr) BTFIXUP_CALL(pmd_offset)(dir,addr)
329 return (pmd_t *) pgd_page_vaddr(*dir) +
330 ((address >> PMD_SHIFT) & (PTRS_PER_PMD - 1));
331}
332 299
333/* Find an entry in the third-level page table.. */ 300/* Find an entry in the third-level page table.. */
334pte_t *pte_offset_kernel(pmd_t * dir, unsigned long address); 301BTFIXUPDEF_CALL(pte_t *, pte_offset_kernel, pmd_t *, unsigned long)
302#define pte_offset_kernel(dir,addr) BTFIXUP_CALL(pte_offset_kernel)(dir,addr)
335 303
336/* 304/*
337 * This shortcut works on sun4m (and sun4d) because the nocache area is static. 305 * This shortcut works on sun4m (and sun4d) because the nocache area is static,
306 * and sun4c is guaranteed to have no highmem anyway.
338 */ 307 */
339#define pte_offset_map(d, a) pte_offset_kernel(d,a) 308#define pte_offset_map(d, a) pte_offset_kernel(d,a)
340#define pte_unmap(pte) do{}while(0) 309#define pte_unmap(pte) do{}while(0)
341 310
311/* Certain architectures need to do special things when pte's
312 * within a page table are directly modified. Thus, the following
313 * hook is made available.
314 */
315
316BTFIXUPDEF_CALL(void, set_pte, pte_t *, pte_t)
317
318#define set_pte(ptep,pteval) BTFIXUP_CALL(set_pte)(ptep,pteval)
319#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
320
342struct seq_file; 321struct seq_file;
343void mmu_info(struct seq_file *m); 322BTFIXUPDEF_CALL(void, mmu_info, struct seq_file *)
323
324#define mmu_info(p) BTFIXUP_CALL(mmu_info)(p)
344 325
345/* Fault handler stuff... */ 326/* Fault handler stuff... */
346#define FAULT_CODE_PROT 0x1 327#define FAULT_CODE_PROT 0x1
347#define FAULT_CODE_WRITE 0x2 328#define FAULT_CODE_WRITE 0x2
348#define FAULT_CODE_USER 0x4 329#define FAULT_CODE_USER 0x4
349 330
350#define update_mmu_cache(vma, address, ptep) do { } while (0) 331BTFIXUPDEF_CALL(void, update_mmu_cache, struct vm_area_struct *, unsigned long, pte_t *)
351 332
352void srmmu_mapiorange(unsigned int bus, unsigned long xpa, 333#define update_mmu_cache(vma,addr,ptep) BTFIXUP_CALL(update_mmu_cache)(vma,addr,ptep)
353 unsigned long xva, unsigned int len);
354void srmmu_unmapiorange(unsigned long virt_addr, unsigned int len);
355 334
356/* Encode and de-code a swap entry */ 335BTFIXUPDEF_CALL(void, sparc_mapiorange, unsigned int, unsigned long,
357static inline unsigned long __swp_type(swp_entry_t entry) 336 unsigned long, unsigned int)
358{ 337BTFIXUPDEF_CALL(void, sparc_unmapiorange, unsigned long, unsigned int)
359 return (entry.val >> SRMMU_SWP_TYPE_SHIFT) & SRMMU_SWP_TYPE_MASK; 338#define sparc_mapiorange(bus,pa,va,len) BTFIXUP_CALL(sparc_mapiorange)(bus,pa,va,len)
360} 339#define sparc_unmapiorange(va,len) BTFIXUP_CALL(sparc_unmapiorange)(va,len)
361 340
362static inline unsigned long __swp_offset(swp_entry_t entry) 341extern int invalid_segment;
363{
364 return (entry.val >> SRMMU_SWP_OFF_SHIFT) & SRMMU_SWP_OFF_MASK;
365}
366 342
367static inline swp_entry_t __swp_entry(unsigned long type, unsigned long offset) 343/* Encode and de-code a swap entry */
368{ 344BTFIXUPDEF_CALL(unsigned long, __swp_type, swp_entry_t)
369 return (swp_entry_t) { 345BTFIXUPDEF_CALL(unsigned long, __swp_offset, swp_entry_t)
370 (type & SRMMU_SWP_TYPE_MASK) << SRMMU_SWP_TYPE_SHIFT 346BTFIXUPDEF_CALL(swp_entry_t, __swp_entry, unsigned long, unsigned long)
371 | (offset & SRMMU_SWP_OFF_MASK) << SRMMU_SWP_OFF_SHIFT }; 347
372} 348#define __swp_type(__x) BTFIXUP_CALL(__swp_type)(__x)
349#define __swp_offset(__x) BTFIXUP_CALL(__swp_offset)(__x)
350#define __swp_entry(__type,__off) BTFIXUP_CALL(__swp_entry)(__type,__off)
373 351
374#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) 352#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
375#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) 353#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
376 354
377/* file-offset-in-pte helpers */ 355/* file-offset-in-pte helpers */
378static inline unsigned long pte_to_pgoff(pte_t pte) 356BTFIXUPDEF_CALL(unsigned long, pte_to_pgoff, pte_t pte);
379{ 357BTFIXUPDEF_CALL(pte_t, pgoff_to_pte, unsigned long pgoff);
380 return pte_val(pte) >> SRMMU_PTE_FILE_SHIFT;
381}
382 358
383static inline pte_t pgoff_to_pte(unsigned long pgoff) 359#define pte_to_pgoff(pte) BTFIXUP_CALL(pte_to_pgoff)(pte)
384{ 360#define pgoff_to_pte(off) BTFIXUP_CALL(pgoff_to_pte)(off)
385 return __pte((pgoff << SRMMU_PTE_FILE_SHIFT) | SRMMU_FILE);
386}
387 361
388/* 362/*
389 * This is made a constant because mm/fremap.c required a constant. 363 * This is made a constant because mm/fremap.c required a constant.
364 * Note that layout of these bits is different between sun4c.c and srmmu.c.
390 */ 365 */
391#define PTE_FILE_MAX_BITS 24 366#define PTE_FILE_MAX_BITS 24
392 367
368/*
369 */
370struct ctx_list {
371 struct ctx_list *next;
372 struct ctx_list *prev;
373 unsigned int ctx_number;
374 struct mm_struct *ctx_mm;
375};
376
377extern struct ctx_list *ctx_list_pool; /* Dynamically allocated */
378extern struct ctx_list ctx_free; /* Head of free list */
379extern struct ctx_list ctx_used; /* Head of used contexts list */
380
381#define NO_CONTEXT -1
382
383static inline void remove_from_ctx_list(struct ctx_list *entry)
384{
385 entry->next->prev = entry->prev;
386 entry->prev->next = entry->next;
387}
388
389static inline void add_to_ctx_list(struct ctx_list *head, struct ctx_list *entry)
390{
391 entry->next = head;
392 (entry->prev = head->prev)->next = entry;
393 head->prev = entry;
394}
395#define add_to_free_ctxlist(entry) add_to_ctx_list(&ctx_free, entry)
396#define add_to_used_ctxlist(entry) add_to_ctx_list(&ctx_used, entry)
397
393static inline unsigned long 398static inline unsigned long
394__get_phys (unsigned long addr) 399__get_phys (unsigned long addr)
395{ 400{
396 switch (sparc_cpu_model){ 401 switch (sparc_cpu_model){
402 case sun4:
403 case sun4c:
404 return sun4c_get_pte (addr) << PAGE_SHIFT;
397 case sun4m: 405 case sun4m:
398 case sun4d: 406 case sun4d:
399 return ((srmmu_get_pte (addr) & 0xffffff00) << 4); 407 return ((srmmu_get_pte (addr) & 0xffffff00) << 4);
@@ -406,6 +414,9 @@ static inline int
406__get_iospace (unsigned long addr) 414__get_iospace (unsigned long addr)
407{ 415{
408 switch (sparc_cpu_model){ 416 switch (sparc_cpu_model){
417 case sun4:
418 case sun4c:
419 return -1; /* Don't check iospace on sun4c */
409 case sun4m: 420 case sun4m:
410 case sun4d: 421 case sun4d:
411 return (srmmu_get_pte (addr) >> 28); 422 return (srmmu_get_pte (addr) >> 28);
@@ -452,7 +463,7 @@ static inline int io_remap_pfn_range(struct vm_area_struct *vma,
452 set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \ 463 set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \
453 flush_tlb_page(__vma, __address); \ 464 flush_tlb_page(__vma, __address); \
454 } \ 465 } \
455 __changed; \ 466 (sparc_cpu_model == sun4c) || __changed; \
456}) 467})
457 468
458#include <asm-generic/pgtable.h> 469#include <asm-generic/pgtable.h>
@@ -460,8 +471,10 @@ static inline int io_remap_pfn_range(struct vm_area_struct *vma,
460#endif /* !(__ASSEMBLY__) */ 471#endif /* !(__ASSEMBLY__) */
461 472
462#define VMALLOC_START _AC(0xfe600000,UL) 473#define VMALLOC_START _AC(0xfe600000,UL)
474/* XXX Alter this when I get around to fixing sun4c - Anton */
463#define VMALLOC_END _AC(0xffc00000,UL) 475#define VMALLOC_END _AC(0xffc00000,UL)
464 476
477
465/* We provide our own get_unmapped_area to cope with VA holes for userland */ 478/* We provide our own get_unmapped_area to cope with VA holes for userland */
466#define HAVE_ARCH_UNMAPPED_AREA 479#define HAVE_ARCH_UNMAPPED_AREA
467 480
diff --git a/arch/sparc/include/asm/pgtable_64.h b/arch/sparc/include/asm/pgtable_64.h
index 7870be0f5ad..38ebb2c6013 100644
--- a/arch/sparc/include/asm/pgtable_64.h
+++ b/arch/sparc/include/asm/pgtable_64.h
@@ -12,16 +12,17 @@
12 * the SpitFire page tables. 12 * the SpitFire page tables.
13 */ 13 */
14 14
15#include <asm-generic/pgtable-nopud.h>
16
15#include <linux/compiler.h> 17#include <linux/compiler.h>
16#include <linux/const.h> 18#include <linux/const.h>
17#include <asm/types.h> 19#include <asm/types.h>
18#include <asm/spitfire.h> 20#include <asm/spitfire.h>
19#include <asm/asi.h> 21#include <asm/asi.h>
22#include <asm/system.h>
20#include <asm/page.h> 23#include <asm/page.h>
21#include <asm/processor.h> 24#include <asm/processor.h>
22 25
23#include <asm-generic/pgtable-nopud.h>
24
25/* The kernel image occupies 0x4000000 to 0x6000000 (4MB --> 96MB). 26/* The kernel image occupies 0x4000000 to 0x6000000 (4MB --> 96MB).
26 * The page copy blockops can use 0x6000000 to 0x8000000. 27 * The page copy blockops can use 0x6000000 to 0x8000000.
27 * The TSB is mapped in the 0x8000000 to 0xa000000 range. 28 * The TSB is mapped in the 0x8000000 to 0xa000000 range.
@@ -45,59 +46,40 @@
45 46
46#define vmemmap ((struct page *)VMEMMAP_BASE) 47#define vmemmap ((struct page *)VMEMMAP_BASE)
47 48
49/* XXX All of this needs to be rethought so we can take advantage
50 * XXX cheetah's full 64-bit virtual address space, ie. no more hole
51 * XXX in the middle like on spitfire. -DaveM
52 */
53/*
54 * Given a virtual address, the lowest PAGE_SHIFT bits determine offset
55 * into the page; the next higher PAGE_SHIFT-3 bits determine the pte#
56 * in the proper pagetable (the -3 is from the 8 byte ptes, and each page
57 * table is a single page long). The next higher PMD_BITS determine pmd#
58 * in the proper pmdtable (where we must have PMD_BITS <= (PAGE_SHIFT-2)
59 * since the pmd entries are 4 bytes, and each pmd page is a single page
60 * long). Finally, the higher few bits determine pgde#.
61 */
62
48/* PMD_SHIFT determines the size of the area a second-level page 63/* PMD_SHIFT determines the size of the area a second-level page
49 * table can map 64 * table can map
50 */ 65 */
51#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-4)) 66#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3))
52#define PMD_SIZE (_AC(1,UL) << PMD_SHIFT) 67#define PMD_SIZE (_AC(1,UL) << PMD_SHIFT)
53#define PMD_MASK (~(PMD_SIZE-1)) 68#define PMD_MASK (~(PMD_SIZE-1))
54#define PMD_BITS (PAGE_SHIFT - 2) 69#define PMD_BITS (PAGE_SHIFT - 2)
55 70
56/* PGDIR_SHIFT determines what a third-level page table entry can map */ 71/* PGDIR_SHIFT determines what a third-level page table entry can map */
57#define PGDIR_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-4) + PMD_BITS) 72#define PGDIR_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3) + PMD_BITS)
58#define PGDIR_SIZE (_AC(1,UL) << PGDIR_SHIFT) 73#define PGDIR_SIZE (_AC(1,UL) << PGDIR_SHIFT)
59#define PGDIR_MASK (~(PGDIR_SIZE-1)) 74#define PGDIR_MASK (~(PGDIR_SIZE-1))
60#define PGDIR_BITS (PAGE_SHIFT - 2) 75#define PGDIR_BITS (PAGE_SHIFT - 2)
61 76
62#if (PGDIR_SHIFT + PGDIR_BITS) != 44
63#error Page table parameters do not cover virtual address space properly.
64#endif
65
66#if (PMD_SHIFT != HPAGE_SHIFT)
67#error PMD_SHIFT must equal HPAGE_SHIFT for transparent huge pages.
68#endif
69
70/* PMDs point to PTE tables which are 4K aligned. */
71#define PMD_PADDR _AC(0xfffffffe,UL)
72#define PMD_PADDR_SHIFT _AC(11,UL)
73
74#ifdef CONFIG_TRANSPARENT_HUGEPAGE
75#define PMD_ISHUGE _AC(0x00000001,UL)
76
77/* This is the PMD layout when PMD_ISHUGE is set. With 4MB huge
78 * pages, this frees up a bunch of bits in the layout that we can
79 * use for the protection settings and software metadata.
80 */
81#define PMD_HUGE_PADDR _AC(0xfffff800,UL)
82#define PMD_HUGE_PROTBITS _AC(0x000007ff,UL)
83#define PMD_HUGE_PRESENT _AC(0x00000400,UL)
84#define PMD_HUGE_WRITE _AC(0x00000200,UL)
85#define PMD_HUGE_DIRTY _AC(0x00000100,UL)
86#define PMD_HUGE_ACCESSED _AC(0x00000080,UL)
87#define PMD_HUGE_EXEC _AC(0x00000040,UL)
88#define PMD_HUGE_SPLITTING _AC(0x00000020,UL)
89#endif
90
91/* PGDs point to PMD tables which are 8K aligned. */
92#define PGD_PADDR _AC(0xfffffffc,UL)
93#define PGD_PADDR_SHIFT _AC(11,UL)
94
95#ifndef __ASSEMBLY__ 77#ifndef __ASSEMBLY__
96 78
97#include <linux/sched.h> 79#include <linux/sched.h>
98 80
99/* Entries per page directory level. */ 81/* Entries per page directory level. */
100#define PTRS_PER_PTE (1UL << (PAGE_SHIFT-4)) 82#define PTRS_PER_PTE (1UL << (PAGE_SHIFT-3))
101#define PTRS_PER_PMD (1UL << PMD_BITS) 83#define PTRS_PER_PMD (1UL << PMD_BITS)
102#define PTRS_PER_PGD (1UL << PGDIR_BITS) 84#define PTRS_PER_PGD (1UL << PGDIR_BITS)
103 85
@@ -179,11 +161,26 @@
179#define _PAGE_SZ8K_4V _AC(0x0000000000000000,UL) /* 8K Page */ 161#define _PAGE_SZ8K_4V _AC(0x0000000000000000,UL) /* 8K Page */
180#define _PAGE_SZALL_4V _AC(0x0000000000000007,UL) /* All pgsz bits */ 162#define _PAGE_SZALL_4V _AC(0x0000000000000007,UL) /* All pgsz bits */
181 163
164#if PAGE_SHIFT == 13
182#define _PAGE_SZBITS_4U _PAGE_SZ8K_4U 165#define _PAGE_SZBITS_4U _PAGE_SZ8K_4U
183#define _PAGE_SZBITS_4V _PAGE_SZ8K_4V 166#define _PAGE_SZBITS_4V _PAGE_SZ8K_4V
167#elif PAGE_SHIFT == 16
168#define _PAGE_SZBITS_4U _PAGE_SZ64K_4U
169#define _PAGE_SZBITS_4V _PAGE_SZ64K_4V
170#else
171#error Wrong PAGE_SHIFT specified
172#endif
184 173
174#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
185#define _PAGE_SZHUGE_4U _PAGE_SZ4MB_4U 175#define _PAGE_SZHUGE_4U _PAGE_SZ4MB_4U
186#define _PAGE_SZHUGE_4V _PAGE_SZ4MB_4V 176#define _PAGE_SZHUGE_4V _PAGE_SZ4MB_4V
177#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)
178#define _PAGE_SZHUGE_4U _PAGE_SZ512K_4U
179#define _PAGE_SZHUGE_4V _PAGE_SZ512K_4V
180#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
181#define _PAGE_SZHUGE_4U _PAGE_SZ64K_4U
182#define _PAGE_SZHUGE_4V _PAGE_SZ64K_4V
183#endif
187 184
188/* These are actually filled in at boot time by sun4{u,v}_pgprot_init() */ 185/* These are actually filled in at boot time by sun4{u,v}_pgprot_init() */
189#define __P000 __pgprot(0) 186#define __P000 __pgprot(0)
@@ -222,6 +219,7 @@ extern unsigned long _PAGE_CACHE;
222 219
223extern unsigned long pg_iobits; 220extern unsigned long pg_iobits;
224extern unsigned long _PAGE_ALL_SZ_BITS; 221extern unsigned long _PAGE_ALL_SZ_BITS;
222extern unsigned long _PAGE_SZBITS;
225 223
226extern struct page *mem_map_zero; 224extern struct page *mem_map_zero;
227#define ZERO_PAGE(vaddr) (mem_map_zero) 225#define ZERO_PAGE(vaddr) (mem_map_zero)
@@ -234,25 +232,25 @@ extern struct page *mem_map_zero;
234static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot) 232static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot)
235{ 233{
236 unsigned long paddr = pfn << PAGE_SHIFT; 234 unsigned long paddr = pfn << PAGE_SHIFT;
237 235 unsigned long sz_bits;
238 BUILD_BUG_ON(_PAGE_SZBITS_4U != 0UL || _PAGE_SZBITS_4V != 0UL); 236
239 return __pte(paddr | pgprot_val(prot)); 237 sz_bits = 0UL;
238 if (_PAGE_SZBITS_4U != 0UL || _PAGE_SZBITS_4V != 0UL) {
239 __asm__ __volatile__(
240 "\n661: sethi %%uhi(%1), %0\n"
241 " sllx %0, 32, %0\n"
242 " .section .sun4v_2insn_patch, \"ax\"\n"
243 " .word 661b\n"
244 " mov %2, %0\n"
245 " nop\n"
246 " .previous\n"
247 : "=r" (sz_bits)
248 : "i" (_PAGE_SZBITS_4U), "i" (_PAGE_SZBITS_4V));
249 }
250 return __pte(paddr | sz_bits | pgprot_val(prot));
240} 251}
241#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) 252#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
242 253
243#ifdef CONFIG_TRANSPARENT_HUGEPAGE
244extern pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot);
245#define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
246
247extern pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot);
248
249static inline pmd_t pmd_mkhuge(pmd_t pmd)
250{
251 /* Do nothing, mk_pmd() does this part. */
252 return pmd;
253}
254#endif
255
256/* This one can be done with two shifts. */ 254/* This one can be done with two shifts. */
257static inline unsigned long pte_pfn(pte_t pte) 255static inline unsigned long pte_pfn(pte_t pte)
258{ 256{
@@ -289,7 +287,6 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t prot)
289 * Note: We encode this into 3 sun4v 2-insn patch sequences. 287 * Note: We encode this into 3 sun4v 2-insn patch sequences.
290 */ 288 */
291 289
292 BUILD_BUG_ON(_PAGE_SZBITS_4U != 0UL || _PAGE_SZBITS_4V != 0UL);
293 __asm__ __volatile__( 290 __asm__ __volatile__(
294 "\n661: sethi %%uhi(%2), %1\n" 291 "\n661: sethi %%uhi(%2), %1\n"
295 " sethi %%hi(%2), %0\n" 292 " sethi %%hi(%2), %0\n"
@@ -311,10 +308,10 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t prot)
311 : "=r" (mask), "=r" (tmp) 308 : "=r" (mask), "=r" (tmp)
312 : "i" (_PAGE_PADDR_4U | _PAGE_MODIFIED_4U | _PAGE_ACCESSED_4U | 309 : "i" (_PAGE_PADDR_4U | _PAGE_MODIFIED_4U | _PAGE_ACCESSED_4U |
313 _PAGE_CP_4U | _PAGE_CV_4U | _PAGE_E_4U | _PAGE_PRESENT_4U | 310 _PAGE_CP_4U | _PAGE_CV_4U | _PAGE_E_4U | _PAGE_PRESENT_4U |
314 _PAGE_SPECIAL), 311 _PAGE_SZBITS_4U | _PAGE_SPECIAL),
315 "i" (_PAGE_PADDR_4V | _PAGE_MODIFIED_4V | _PAGE_ACCESSED_4V | 312 "i" (_PAGE_PADDR_4V | _PAGE_MODIFIED_4V | _PAGE_ACCESSED_4V |
316 _PAGE_CP_4V | _PAGE_CV_4V | _PAGE_E_4V | _PAGE_PRESENT_4V | 313 _PAGE_CP_4V | _PAGE_CV_4V | _PAGE_E_4V | _PAGE_PRESENT_4V |
317 _PAGE_SPECIAL)); 314 _PAGE_SZBITS_4V | _PAGE_SPECIAL));
318 315
319 return __pte((pte_val(pte) & mask) | (pgprot_val(prot) & ~mask)); 316 return __pte((pte_val(pte) & mask) | (pgprot_val(prot) & ~mask));
320} 317}
@@ -617,141 +614,24 @@ static inline unsigned long pte_present(pte_t pte)
617 return val; 614 return val;
618} 615}
619 616
620#define pte_accessible pte_accessible
621static inline unsigned long pte_accessible(pte_t a)
622{
623 return pte_val(a) & _PAGE_VALID;
624}
625
626static inline unsigned long pte_special(pte_t pte) 617static inline unsigned long pte_special(pte_t pte)
627{ 618{
628 return pte_val(pte) & _PAGE_SPECIAL; 619 return pte_val(pte) & _PAGE_SPECIAL;
629} 620}
630 621
631#ifdef CONFIG_TRANSPARENT_HUGEPAGE 622#define pmd_set(pmdp, ptep) \
632static inline int pmd_young(pmd_t pmd) 623 (pmd_val(*(pmdp)) = (__pa((unsigned long) (ptep)) >> 11UL))
633{
634 return pmd_val(pmd) & PMD_HUGE_ACCESSED;
635}
636
637static inline int pmd_write(pmd_t pmd)
638{
639 return pmd_val(pmd) & PMD_HUGE_WRITE;
640}
641
642static inline unsigned long pmd_pfn(pmd_t pmd)
643{
644 unsigned long val = pmd_val(pmd) & PMD_HUGE_PADDR;
645
646 return val >> (PAGE_SHIFT - PMD_PADDR_SHIFT);
647}
648
649static inline int pmd_large(pmd_t pmd)
650{
651 return (pmd_val(pmd) & (PMD_ISHUGE | PMD_HUGE_PRESENT)) ==
652 (PMD_ISHUGE | PMD_HUGE_PRESENT);
653}
654
655static inline int pmd_trans_splitting(pmd_t pmd)
656{
657 return (pmd_val(pmd) & (PMD_ISHUGE|PMD_HUGE_SPLITTING)) ==
658 (PMD_ISHUGE|PMD_HUGE_SPLITTING);
659}
660
661static inline int pmd_trans_huge(pmd_t pmd)
662{
663 return pmd_val(pmd) & PMD_ISHUGE;
664}
665
666#define has_transparent_hugepage() 1
667
668static inline pmd_t pmd_mkold(pmd_t pmd)
669{
670 pmd_val(pmd) &= ~PMD_HUGE_ACCESSED;
671 return pmd;
672}
673
674static inline pmd_t pmd_wrprotect(pmd_t pmd)
675{
676 pmd_val(pmd) &= ~PMD_HUGE_WRITE;
677 return pmd;
678}
679
680static inline pmd_t pmd_mkdirty(pmd_t pmd)
681{
682 pmd_val(pmd) |= PMD_HUGE_DIRTY;
683 return pmd;
684}
685
686static inline pmd_t pmd_mkyoung(pmd_t pmd)
687{
688 pmd_val(pmd) |= PMD_HUGE_ACCESSED;
689 return pmd;
690}
691
692static inline pmd_t pmd_mkwrite(pmd_t pmd)
693{
694 pmd_val(pmd) |= PMD_HUGE_WRITE;
695 return pmd;
696}
697
698static inline pmd_t pmd_mknotpresent(pmd_t pmd)
699{
700 pmd_val(pmd) &= ~PMD_HUGE_PRESENT;
701 return pmd;
702}
703
704static inline pmd_t pmd_mksplitting(pmd_t pmd)
705{
706 pmd_val(pmd) |= PMD_HUGE_SPLITTING;
707 return pmd;
708}
709
710extern pgprot_t pmd_pgprot(pmd_t entry);
711#endif
712
713static inline int pmd_present(pmd_t pmd)
714{
715 return pmd_val(pmd) != 0U;
716}
717
718#define pmd_none(pmd) (!pmd_val(pmd))
719
720#ifdef CONFIG_TRANSPARENT_HUGEPAGE
721extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
722 pmd_t *pmdp, pmd_t pmd);
723#else
724static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
725 pmd_t *pmdp, pmd_t pmd)
726{
727 *pmdp = pmd;
728}
729#endif
730
731static inline void pmd_set(struct mm_struct *mm, pmd_t *pmdp, pte_t *ptep)
732{
733 unsigned long val = __pa((unsigned long) (ptep)) >> PMD_PADDR_SHIFT;
734
735 pmd_val(*pmdp) = val;
736}
737
738#define pud_set(pudp, pmdp) \ 624#define pud_set(pudp, pmdp) \
739 (pud_val(*(pudp)) = (__pa((unsigned long) (pmdp)) >> PGD_PADDR_SHIFT)) 625 (pud_val(*(pudp)) = (__pa((unsigned long) (pmdp)) >> 11UL))
740static inline unsigned long __pmd_page(pmd_t pmd) 626#define __pmd_page(pmd) \
741{ 627 ((unsigned long) __va((((unsigned long)pmd_val(pmd))<<11UL)))
742 unsigned long paddr = (unsigned long) pmd_val(pmd);
743#ifdef CONFIG_TRANSPARENT_HUGEPAGE
744 if (pmd_val(pmd) & PMD_ISHUGE)
745 paddr &= PMD_HUGE_PADDR;
746#endif
747 paddr <<= PMD_PADDR_SHIFT;
748 return ((unsigned long) __va(paddr));
749}
750#define pmd_page(pmd) virt_to_page((void *)__pmd_page(pmd)) 628#define pmd_page(pmd) virt_to_page((void *)__pmd_page(pmd))
751#define pud_page_vaddr(pud) \ 629#define pud_page_vaddr(pud) \
752 ((unsigned long) __va((((unsigned long)pud_val(pud))<<PGD_PADDR_SHIFT))) 630 ((unsigned long) __va((((unsigned long)pud_val(pud))<<11UL)))
753#define pud_page(pud) virt_to_page((void *)pud_page_vaddr(pud)) 631#define pud_page(pud) virt_to_page((void *)pud_page_vaddr(pud))
632#define pmd_none(pmd) (!pmd_val(pmd))
754#define pmd_bad(pmd) (0) 633#define pmd_bad(pmd) (0)
634#define pmd_present(pmd) (pmd_val(pmd) != 0U)
755#define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0U) 635#define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0U)
756#define pud_none(pud) (!pud_val(pud)) 636#define pud_none(pud) (!pud_val(pud))
757#define pud_bad(pud) (0) 637#define pud_bad(pud) (0)
@@ -785,16 +665,6 @@ static inline unsigned long __pmd_page(pmd_t pmd)
785extern void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr, 665extern void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr,
786 pte_t *ptep, pte_t orig, int fullmm); 666 pte_t *ptep, pte_t orig, int fullmm);
787 667
788#define __HAVE_ARCH_PMDP_GET_AND_CLEAR
789static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,
790 unsigned long addr,
791 pmd_t *pmdp)
792{
793 pmd_t pmd = *pmdp;
794 set_pmd_at(mm, addr, pmdp, __pmd(0U));
795 return pmd;
796}
797
798static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr, 668static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
799 pte_t *ptep, pte_t pte, int fullmm) 669 pte_t *ptep, pte_t pte, int fullmm)
800{ 670{
@@ -808,7 +678,7 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
808 * SUN4V NOTE: _PAGE_VALID is the same value in both the SUN4U 678 * SUN4V NOTE: _PAGE_VALID is the same value in both the SUN4U
809 * and SUN4V pte layout, so this inline test is fine. 679 * and SUN4V pte layout, so this inline test is fine.
810 */ 680 */
811 if (likely(mm != &init_mm) && pte_accessible(orig)) 681 if (likely(mm != &init_mm) && (pte_val(orig) & _PAGE_VALID))
812 tlb_batch_add(mm, addr, ptep, orig, fullmm); 682 tlb_batch_add(mm, addr, ptep, orig, fullmm);
813} 683}
814 684
@@ -848,18 +718,12 @@ extern unsigned long find_ecache_flush_span(unsigned long size);
848struct seq_file; 718struct seq_file;
849extern void mmu_info(struct seq_file *); 719extern void mmu_info(struct seq_file *);
850 720
721/* These do nothing with the way I have things setup. */
722#define mmu_lockarea(vaddr, len) (vaddr)
723#define mmu_unlockarea(vaddr, len) do { } while(0)
724
851struct vm_area_struct; 725struct vm_area_struct;
852extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t *); 726extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t *);
853#ifdef CONFIG_TRANSPARENT_HUGEPAGE
854extern void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr,
855 pmd_t *pmd);
856
857#define __HAVE_ARCH_PGTABLE_DEPOSIT
858extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable);
859
860#define __HAVE_ARCH_PGTABLE_WITHDRAW
861extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm);
862#endif
863 727
864/* Encode and de-code a swap entry */ 728/* Encode and de-code a swap entry */
865#define __swp_type(entry) (((entry).val >> PAGE_SHIFT) & 0xffUL) 729#define __swp_type(entry) (((entry).val >> PAGE_SHIFT) & 0xffUL)
diff --git a/arch/sparc/include/asm/pgtsrmmu.h b/arch/sparc/include/asm/pgtsrmmu.h
index 79da17866fa..f6ae2b2b687 100644
--- a/arch/sparc/include/asm/pgtsrmmu.h
+++ b/arch/sparc/include/asm/pgtsrmmu.h
@@ -139,7 +139,6 @@
139 restore %g0, %g0, %g0; 139 restore %g0, %g0, %g0;
140 140
141#ifndef __ASSEMBLY__ 141#ifndef __ASSEMBLY__
142extern unsigned long last_valid_pfn;
143 142
144/* This makes sense. Honest it does - Anton */ 143/* This makes sense. Honest it does - Anton */
145/* XXX Yes but it's ugly as sin. FIXME. -KMW */ 144/* XXX Yes but it's ugly as sin. FIXME. -KMW */
@@ -149,13 +148,78 @@ extern void *srmmu_nocache_pool;
149#define __nocache_fix(VADDR) __va(__nocache_pa(VADDR)) 148#define __nocache_fix(VADDR) __va(__nocache_pa(VADDR))
150 149
151/* Accessing the MMU control register. */ 150/* Accessing the MMU control register. */
152unsigned int srmmu_get_mmureg(void); 151static inline unsigned int srmmu_get_mmureg(void)
153void srmmu_set_mmureg(unsigned long regval); 152{
154void srmmu_set_ctable_ptr(unsigned long paddr); 153 unsigned int retval;
155void srmmu_set_context(int context); 154 __asm__ __volatile__("lda [%%g0] %1, %0\n\t" :
156int srmmu_get_context(void); 155 "=r" (retval) :
157unsigned int srmmu_get_fstatus(void); 156 "i" (ASI_M_MMUREGS));
158unsigned int srmmu_get_faddr(void); 157 return retval;
158}
159
160static inline void srmmu_set_mmureg(unsigned long regval)
161{
162 __asm__ __volatile__("sta %0, [%%g0] %1\n\t" : :
163 "r" (regval), "i" (ASI_M_MMUREGS) : "memory");
164
165}
166
167static inline void srmmu_set_ctable_ptr(unsigned long paddr)
168{
169 paddr = ((paddr >> 4) & SRMMU_CTX_PMASK);
170 __asm__ __volatile__("sta %0, [%1] %2\n\t" : :
171 "r" (paddr), "r" (SRMMU_CTXTBL_PTR),
172 "i" (ASI_M_MMUREGS) :
173 "memory");
174}
175
176static inline unsigned long srmmu_get_ctable_ptr(void)
177{
178 unsigned int retval;
179
180 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
181 "=r" (retval) :
182 "r" (SRMMU_CTXTBL_PTR),
183 "i" (ASI_M_MMUREGS));
184 return (retval & SRMMU_CTX_PMASK) << 4;
185}
186
187static inline void srmmu_set_context(int context)
188{
189 __asm__ __volatile__("sta %0, [%1] %2\n\t" : :
190 "r" (context), "r" (SRMMU_CTX_REG),
191 "i" (ASI_M_MMUREGS) : "memory");
192}
193
194static inline int srmmu_get_context(void)
195{
196 register int retval;
197 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
198 "=r" (retval) :
199 "r" (SRMMU_CTX_REG),
200 "i" (ASI_M_MMUREGS));
201 return retval;
202}
203
204static inline unsigned int srmmu_get_fstatus(void)
205{
206 unsigned int retval;
207
208 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
209 "=r" (retval) :
210 "r" (SRMMU_FAULT_STATUS), "i" (ASI_M_MMUREGS));
211 return retval;
212}
213
214static inline unsigned int srmmu_get_faddr(void)
215{
216 unsigned int retval;
217
218 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
219 "=r" (retval) :
220 "r" (SRMMU_FAULT_ADDR), "i" (ASI_M_MMUREGS));
221 return retval;
222}
159 223
160/* This is guaranteed on all SRMMU's. */ 224/* This is guaranteed on all SRMMU's. */
161static inline void srmmu_flush_whole_tlb(void) 225static inline void srmmu_flush_whole_tlb(void)
@@ -166,6 +230,59 @@ static inline void srmmu_flush_whole_tlb(void)
166 230
167} 231}
168 232
233/* These flush types are not available on all chips... */
234static inline void srmmu_flush_tlb_ctx(void)
235{
236 __asm__ __volatile__("sta %%g0, [%0] %1\n\t": :
237 "r" (0x300), /* Flush TLB ctx.. */
238 "i" (ASI_M_FLUSH_PROBE) : "memory");
239
240}
241
242static inline void srmmu_flush_tlb_region(unsigned long addr)
243{
244 addr &= SRMMU_PGDIR_MASK;
245 __asm__ __volatile__("sta %%g0, [%0] %1\n\t": :
246 "r" (addr | 0x200), /* Flush TLB region.. */
247 "i" (ASI_M_FLUSH_PROBE) : "memory");
248
249}
250
251
252static inline void srmmu_flush_tlb_segment(unsigned long addr)
253{
254 addr &= SRMMU_REAL_PMD_MASK;
255 __asm__ __volatile__("sta %%g0, [%0] %1\n\t": :
256 "r" (addr | 0x100), /* Flush TLB segment.. */
257 "i" (ASI_M_FLUSH_PROBE) : "memory");
258
259}
260
261static inline void srmmu_flush_tlb_page(unsigned long page)
262{
263 page &= PAGE_MASK;
264 __asm__ __volatile__("sta %%g0, [%0] %1\n\t": :
265 "r" (page), /* Flush TLB page.. */
266 "i" (ASI_M_FLUSH_PROBE) : "memory");
267
268}
269
270#ifndef CONFIG_SPARC_LEON
271static inline unsigned long srmmu_hwprobe(unsigned long vaddr)
272{
273 unsigned long retval;
274
275 vaddr &= PAGE_MASK;
276 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
277 "=r" (retval) :
278 "r" (vaddr | 0x400), "i" (ASI_M_FLUSH_PROBE));
279
280 return retval;
281}
282#else
283#define srmmu_hwprobe(addr) srmmu_swprobe(addr, 0)
284#endif
285
169static inline int 286static inline int
170srmmu_get_pte (unsigned long addr) 287srmmu_get_pte (unsigned long addr)
171{ 288{
@@ -177,6 +294,9 @@ srmmu_get_pte (unsigned long addr)
177 return entry; 294 return entry;
178} 295}
179 296
297extern unsigned long (*srmmu_read_physical)(unsigned long paddr);
298extern void (*srmmu_write_physical)(unsigned long paddr, unsigned long word);
299
180#endif /* !(__ASSEMBLY__) */ 300#endif /* !(__ASSEMBLY__) */
181 301
182#endif /* !(_SPARC_PGTSRMMU_H) */ 302#endif /* !(_SPARC_PGTSRMMU_H) */
diff --git a/arch/sparc/include/asm/processor.h b/arch/sparc/include/asm/processor.h
index 2fe99e66e76..9da9646bf6c 100644
--- a/arch/sparc/include/asm/processor.h
+++ b/arch/sparc/include/asm/processor.h
@@ -5,7 +5,4 @@
5#else 5#else
6#include <asm/processor_32.h> 6#include <asm/processor_32.h>
7#endif 7#endif
8
9#define nop() __asm__ __volatile__ ("nop")
10
11#endif 8#endif
diff --git a/arch/sparc/include/asm/processor_32.h b/arch/sparc/include/asm/processor_32.h
index c1e01914fd9..09521c6a5ed 100644
--- a/arch/sparc/include/asm/processor_32.h
+++ b/arch/sparc/include/asm/processor_32.h
@@ -16,6 +16,7 @@
16#include <asm/ptrace.h> 16#include <asm/ptrace.h>
17#include <asm/head.h> 17#include <asm/head.h>
18#include <asm/signal.h> 18#include <asm/signal.h>
19#include <asm/btfixup.h>
19#include <asm/page.h> 20#include <asm/page.h>
20 21
21/* 22/*
@@ -106,6 +107,10 @@ static inline void start_thread(struct pt_regs * regs, unsigned long pc,
106 107
107/* Free all resources held by a thread. */ 108/* Free all resources held by a thread. */
108#define release_thread(tsk) do { } while(0) 109#define release_thread(tsk) do { } while(0)
110extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
111
112/* Prepare to copy thread state - unlazy all lazy status */
113#define prepare_to_copy(tsk) do { } while (0)
109 114
110extern unsigned long get_wchan(struct task_struct *); 115extern unsigned long get_wchan(struct task_struct *);
111 116
diff --git a/arch/sparc/include/asm/processor_64.h b/arch/sparc/include/asm/processor_64.h
index cce72ce4c33..59fcebb8f44 100644
--- a/arch/sparc/include/asm/processor_64.h
+++ b/arch/sparc/include/asm/processor_64.h
@@ -18,9 +18,6 @@
18#include <asm/ptrace.h> 18#include <asm/ptrace.h>
19#include <asm/page.h> 19#include <asm/page.h>
20 20
21/* Don't hold the runqueue lock over context switch */
22#define __ARCH_WANT_UNLOCKED_CTXSW
23
24/* The sparc has no problems with write protection */ 21/* The sparc has no problems with write protection */
25#define wp_works_ok 1 22#define wp_works_ok 1
26#define wp_works_ok__is_a_macro /* for versions in ksyms.c */ 23#define wp_works_ok__is_a_macro /* for versions in ksyms.c */
@@ -42,9 +39,7 @@
42#define TASK_SIZE_OF(tsk) \ 39#define TASK_SIZE_OF(tsk) \
43 (test_tsk_thread_flag(tsk,TIF_32BIT) ? \ 40 (test_tsk_thread_flag(tsk,TIF_32BIT) ? \
44 (1UL << 32UL) : ((unsigned long)-VPTE_SIZE)) 41 (1UL << 32UL) : ((unsigned long)-VPTE_SIZE))
45#define TASK_SIZE \ 42#define TASK_SIZE TASK_SIZE_OF(current)
46 (test_thread_flag(TIF_32BIT) ? \
47 (1UL << 32UL) : ((unsigned long)-VPTE_SIZE))
48#ifdef __KERNEL__ 43#ifdef __KERNEL__
49 44
50#define STACK_TOP32 ((1UL << 32UL) - PAGE_SIZE) 45#define STACK_TOP32 ((1UL << 32UL) - PAGE_SIZE)
@@ -94,7 +89,6 @@ struct thread_struct {
94#ifndef __ASSEMBLY__ 89#ifndef __ASSEMBLY__
95 90
96#include <linux/types.h> 91#include <linux/types.h>
97#include <asm/fpumacro.h>
98 92
99/* Return saved PC of a blocked thread. */ 93/* Return saved PC of a blocked thread. */
100struct task_struct; 94struct task_struct;
@@ -144,10 +138,6 @@ do { \
144 : \ 138 : \
145 : "r" (regs), "r" (sp - sizeof(struct reg_window) - STACK_BIAS), \ 139 : "r" (regs), "r" (sp - sizeof(struct reg_window) - STACK_BIAS), \
146 "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \ 140 "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
147 fprs_write(0); \
148 current_thread_info()->xfsr[0] = 0; \
149 current_thread_info()->fpsaved[0] = 0; \
150 regs->tstate &= ~TSTATE_PEF; \
151} while (0) 141} while (0)
152 142
153#define start_thread32(regs, pc, sp) \ 143#define start_thread32(regs, pc, sp) \
@@ -188,37 +178,23 @@ do { \
188 : \ 178 : \
189 : "r" (regs), "r" (sp - sizeof(struct reg_window32)), \ 179 : "r" (regs), "r" (sp - sizeof(struct reg_window32)), \
190 "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \ 180 "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
191 fprs_write(0); \
192 current_thread_info()->xfsr[0] = 0; \
193 current_thread_info()->fpsaved[0] = 0; \
194 regs->tstate &= ~TSTATE_PEF; \
195} while (0) 181} while (0)
196 182
197/* Free all resources held by a thread. */ 183/* Free all resources held by a thread. */
198#define release_thread(tsk) do { } while (0) 184#define release_thread(tsk) do { } while (0)
199 185
186/* Prepare to copy thread state - unlazy all lazy status */
187#define prepare_to_copy(tsk) do { } while (0)
188
189extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
190
200extern unsigned long get_wchan(struct task_struct *task); 191extern unsigned long get_wchan(struct task_struct *task);
201 192
202#define task_pt_regs(tsk) (task_thread_info(tsk)->kregs) 193#define task_pt_regs(tsk) (task_thread_info(tsk)->kregs)
203#define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc) 194#define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc)
204#define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP]) 195#define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP])
205 196
206/* Please see the commentary in asm/backoff.h for a description of 197#define cpu_relax() barrier()
207 * what these instructions are doing and how they have been choosen.
208 * To make a long story short, we are trying to yield the current cpu
209 * strand during busy loops.
210 */
211#define cpu_relax() asm volatile("\n99:\n\t" \
212 "rd %%ccr, %%g0\n\t" \
213 "rd %%ccr, %%g0\n\t" \
214 "rd %%ccr, %%g0\n\t" \
215 ".section .pause_3insn_patch,\"ax\"\n\t"\
216 ".word 99b\n\t" \
217 "wr %%g0, 128, %%asr27\n\t" \
218 "nop\n\t" \
219 "nop\n\t" \
220 ".previous" \
221 ::: "memory")
222 198
223/* Prefetch support. This is tuned for UltraSPARC-III and later. 199/* Prefetch support. This is tuned for UltraSPARC-III and later.
224 * UltraSPARC-I will treat these as nops, and UltraSPARC-II has 200 * UltraSPARC-I will treat these as nops, and UltraSPARC-II has
diff --git a/arch/sparc/include/asm/prom.h b/arch/sparc/include/asm/prom.h
index 67c62578d17..edd3d3cde46 100644
--- a/arch/sparc/include/asm/prom.h
+++ b/arch/sparc/include/asm/prom.h
@@ -22,7 +22,6 @@
22#include <linux/proc_fs.h> 22#include <linux/proc_fs.h>
23#include <linux/mutex.h> 23#include <linux/mutex.h>
24#include <linux/atomic.h> 24#include <linux/atomic.h>
25#include <linux/irqdomain.h>
26 25
27#define OF_ROOT_NODE_ADDR_CELLS_DEFAULT 2 26#define OF_ROOT_NODE_ADDR_CELLS_DEFAULT 2
28#define OF_ROOT_NODE_SIZE_CELLS_DEFAULT 1 27#define OF_ROOT_NODE_SIZE_CELLS_DEFAULT 1
@@ -56,6 +55,15 @@ struct resource;
56extern void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name); 55extern void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name);
57extern void of_iounmap(struct resource *res, void __iomem *base, unsigned long size); 56extern void of_iounmap(struct resource *res, void __iomem *base, unsigned long size);
58 57
58/* These routines are here to provide compatibility with how powerpc
59 * handles IRQ mapping for OF device nodes. We precompute and permanently
60 * register them in the platform_device objects, whereas powerpc computes them
61 * on request.
62 */
63static inline void irq_dispose_mapping(unsigned int virq)
64{
65}
66
59extern struct device_node *of_console_device; 67extern struct device_node *of_console_device;
60extern char *of_console_path; 68extern char *of_console_path;
61extern char *of_console_options; 69extern char *of_console_options;
@@ -63,13 +71,5 @@ extern char *of_console_options;
63extern void irq_trans_init(struct device_node *dp); 71extern void irq_trans_init(struct device_node *dp);
64extern char *build_path_component(struct device_node *dp); 72extern char *build_path_component(struct device_node *dp);
65 73
66/* SPARC has local implementations */
67extern int of_address_to_resource(struct device_node *dev, int index,
68 struct resource *r);
69#define of_address_to_resource of_address_to_resource
70
71void __iomem *of_iomap(struct device_node *node, int index);
72#define of_iomap of_iomap
73
74#endif /* __KERNEL__ */ 74#endif /* __KERNEL__ */
75#endif /* _SPARC_PROM_H */ 75#endif /* _SPARC_PROM_H */
diff --git a/arch/sparc/include/asm/psr.h b/arch/sparc/include/asm/psr.h
index e71eb57945e..b8c0e5f0a66 100644
--- a/arch/sparc/include/asm/psr.h
+++ b/arch/sparc/include/asm/psr.h
@@ -7,11 +7,35 @@
7 * 7 *
8 * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu) 8 * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu)
9 */ 9 */
10
10#ifndef __LINUX_SPARC_PSR_H 11#ifndef __LINUX_SPARC_PSR_H
11#define __LINUX_SPARC_PSR_H 12#define __LINUX_SPARC_PSR_H
12 13
13#include <uapi/asm/psr.h> 14/* The Sparc PSR fields are laid out as the following:
15 *
16 * ------------------------------------------------------------------------
17 * | impl | vers | icc | resv | EC | EF | PIL | S | PS | ET | CWP |
18 * | 31-28 | 27-24 | 23-20 | 19-14 | 13 | 12 | 11-8 | 7 | 6 | 5 | 4-0 |
19 * ------------------------------------------------------------------------
20 */
21#define PSR_CWP 0x0000001f /* current window pointer */
22#define PSR_ET 0x00000020 /* enable traps field */
23#define PSR_PS 0x00000040 /* previous privilege level */
24#define PSR_S 0x00000080 /* current privilege level */
25#define PSR_PIL 0x00000f00 /* processor interrupt level */
26#define PSR_EF 0x00001000 /* enable floating point */
27#define PSR_EC 0x00002000 /* enable co-processor */
28#define PSR_SYSCALL 0x00004000 /* inside of a syscall */
29#define PSR_LE 0x00008000 /* SuperSparcII little-endian */
30#define PSR_ICC 0x00f00000 /* integer condition codes */
31#define PSR_C 0x00100000 /* carry bit */
32#define PSR_V 0x00200000 /* overflow bit */
33#define PSR_Z 0x00400000 /* zero bit */
34#define PSR_N 0x00800000 /* negative bit */
35#define PSR_VERS 0x0f000000 /* cpu-version field */
36#define PSR_IMPL 0xf0000000 /* cpu-implementation field */
14 37
38#ifdef __KERNEL__
15 39
16#ifndef __ASSEMBLY__ 40#ifndef __ASSEMBLY__
17/* Get the %psr register. */ 41/* Get the %psr register. */
@@ -64,4 +88,6 @@ static inline unsigned int get_fsr(void)
64 88
65#endif /* !(__ASSEMBLY__) */ 89#endif /* !(__ASSEMBLY__) */
66 90
91#endif /* (__KERNEL__) */
92
67#endif /* !(__LINUX_SPARC_PSR_H) */ 93#endif /* !(__LINUX_SPARC_PSR_H) */
diff --git a/arch/sparc/include/asm/ptrace.h b/arch/sparc/include/asm/ptrace.h
index bdfafd7af46..a0e1bcf843a 100644
--- a/arch/sparc/include/asm/ptrace.h
+++ b/arch/sparc/include/asm/ptrace.h
@@ -1,13 +1,169 @@
1#ifndef __SPARC_PTRACE_H 1#ifndef __SPARC_PTRACE_H
2#define __SPARC_PTRACE_H 2#define __SPARC_PTRACE_H
3 3
4#include <uapi/asm/ptrace.h> 4#if defined(__sparc__) && defined(__arch64__)
5/* 64 bit sparc */
6#include <asm/pstate.h>
7
8/* This struct defines the way the registers are stored on the
9 * stack during a system call and basically all traps.
10 */
11
12/* This magic value must have the low 9 bits clear,
13 * as that is where we encode the %tt value, see below.
14 */
15#define PT_REGS_MAGIC 0x57ac6c00
16
17#ifndef __ASSEMBLY__
18
19#include <linux/types.h>
20
21struct pt_regs {
22 unsigned long u_regs[16]; /* globals and ins */
23 unsigned long tstate;
24 unsigned long tpc;
25 unsigned long tnpc;
26 unsigned int y;
27
28 /* We encode a magic number, PT_REGS_MAGIC, along
29 * with the %tt (trap type) register value at trap
30 * entry time. The magic number allows us to identify
31 * accurately a trap stack frame in the stack
32 * unwinder, and the %tt value allows us to test
33 * things like "in a system call" etc. for an arbitray
34 * process.
35 *
36 * The PT_REGS_MAGIC is chosen such that it can be
37 * loaded completely using just a sethi instruction.
38 */
39 unsigned int magic;
40};
41
42struct pt_regs32 {
43 unsigned int psr;
44 unsigned int pc;
45 unsigned int npc;
46 unsigned int y;
47 unsigned int u_regs[16]; /* globals and ins */
48};
49
50/* A V9 register window */
51struct reg_window {
52 unsigned long locals[8];
53 unsigned long ins[8];
54};
55
56/* A 32-bit register window. */
57struct reg_window32 {
58 unsigned int locals[8];
59 unsigned int ins[8];
60};
61
62/* A V9 Sparc stack frame */
63struct sparc_stackf {
64 unsigned long locals[8];
65 unsigned long ins[6];
66 struct sparc_stackf *fp;
67 unsigned long callers_pc;
68 char *structptr;
69 unsigned long xargs[6];
70 unsigned long xxargs[1];
71};
72
73/* A 32-bit Sparc stack frame */
74struct sparc_stackf32 {
75 unsigned int locals[8];
76 unsigned int ins[6];
77 unsigned int fp;
78 unsigned int callers_pc;
79 unsigned int structptr;
80 unsigned int xargs[6];
81 unsigned int xxargs[1];
82};
83
84struct sparc_trapf {
85 unsigned long locals[8];
86 unsigned long ins[8];
87 unsigned long _unused;
88 struct pt_regs *regs;
89};
90#endif /* (!__ASSEMBLY__) */
91#else
92/* 32 bit sparc */
93
94#include <asm/psr.h>
95
96/* This struct defines the way the registers are stored on the
97 * stack during a system call and basically all traps.
98 */
99#ifndef __ASSEMBLY__
100
101struct pt_regs {
102 unsigned long psr;
103 unsigned long pc;
104 unsigned long npc;
105 unsigned long y;
106 unsigned long u_regs[16]; /* globals and ins */
107};
108
109/* A 32-bit register window. */
110struct reg_window32 {
111 unsigned long locals[8];
112 unsigned long ins[8];
113};
114
115/* A Sparc stack frame */
116struct sparc_stackf {
117 unsigned long locals[8];
118 unsigned long ins[6];
119 struct sparc_stackf *fp;
120 unsigned long callers_pc;
121 char *structptr;
122 unsigned long xargs[6];
123 unsigned long xxargs[1];
124};
125#endif /* (!__ASSEMBLY__) */
126
127#endif /* (defined(__sparc__) && defined(__arch64__))*/
128
129#ifndef __ASSEMBLY__
130
131#define TRACEREG_SZ sizeof(struct pt_regs)
132#define STACKFRAME_SZ sizeof(struct sparc_stackf)
133
134#define TRACEREG32_SZ sizeof(struct pt_regs32)
135#define STACKFRAME32_SZ sizeof(struct sparc_stackf32)
136
137#endif /* (!__ASSEMBLY__) */
138
139#define UREG_G0 0
140#define UREG_G1 1
141#define UREG_G2 2
142#define UREG_G3 3
143#define UREG_G4 4
144#define UREG_G5 5
145#define UREG_G6 6
146#define UREG_G7 7
147#define UREG_I0 8
148#define UREG_I1 9
149#define UREG_I2 10
150#define UREG_I3 11
151#define UREG_I4 12
152#define UREG_I5 13
153#define UREG_I6 14
154#define UREG_I7 15
155#define UREG_FP UREG_I6
156#define UREG_RETPC UREG_I7
5 157
6#if defined(__sparc__) && defined(__arch64__) 158#if defined(__sparc__) && defined(__arch64__)
159/* 64 bit sparc */
160
7#ifndef __ASSEMBLY__ 161#ifndef __ASSEMBLY__
8 162
163#ifdef __KERNEL__
164
9#include <linux/threads.h> 165#include <linux/threads.h>
10#include <asm/switch_to.h> 166#include <asm/system.h>
11 167
12static inline int pt_regs_trap_type(struct pt_regs *regs) 168static inline int pt_regs_trap_type(struct pt_regs *regs)
13{ 169{
@@ -32,9 +188,6 @@ static inline bool pt_regs_clear_syscall(struct pt_regs *regs)
32#define arch_ptrace_stop(exit_code, info) \ 188#define arch_ptrace_stop(exit_code, info) \
33 synchronize_user_stack() 189 synchronize_user_stack()
34 190
35#define current_pt_regs() \
36 ((struct pt_regs *)((unsigned long)current_thread_info() + THREAD_SIZE) - 1)
37
38struct global_reg_snapshot { 191struct global_reg_snapshot {
39 unsigned long tstate; 192 unsigned long tstate;
40 unsigned long tpc; 193 unsigned long tpc;
@@ -45,43 +198,41 @@ struct global_reg_snapshot {
45 struct thread_info *thread; 198 struct thread_info *thread;
46 unsigned long pad1; 199 unsigned long pad1;
47}; 200};
201extern struct global_reg_snapshot global_reg_snapshot[NR_CPUS];
48 202
49struct global_pmu_snapshot { 203#define force_successful_syscall_return() \
50 unsigned long pcr[4]; 204do { current_thread_info()->syscall_noerror = 1; \
51 unsigned long pic[4]; 205} while (0)
52};
53
54union global_cpu_snapshot {
55 struct global_reg_snapshot reg;
56 struct global_pmu_snapshot pmu;
57};
58
59extern union global_cpu_snapshot global_cpu_snapshot[NR_CPUS];
60
61#define force_successful_syscall_return() set_thread_noerror(1)
62#define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV)) 206#define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV))
63#define instruction_pointer(regs) ((regs)->tpc) 207#define instruction_pointer(regs) ((regs)->tpc)
64#define instruction_pointer_set(regs, val) ((regs)->tpc = (val)) 208#define instruction_pointer_set(regs, val) ((regs)->tpc = (val))
65#define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP]) 209#define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP])
66static inline int is_syscall_success(struct pt_regs *regs) 210#define regs_return_value(regs) ((regs)->u_regs[UREG_I0])
67{
68 return !(regs->tstate & (TSTATE_XCARRY | TSTATE_ICARRY));
69}
70
71static inline long regs_return_value(struct pt_regs *regs)
72{
73 return regs->u_regs[UREG_I0];
74}
75#ifdef CONFIG_SMP 211#ifdef CONFIG_SMP
76extern unsigned long profile_pc(struct pt_regs *); 212extern unsigned long profile_pc(struct pt_regs *);
77#else 213#else
78#define profile_pc(regs) instruction_pointer(regs) 214#define profile_pc(regs) instruction_pointer(regs)
79#endif 215#endif
216#endif /* (__KERNEL__) */
217
80#else /* __ASSEMBLY__ */ 218#else /* __ASSEMBLY__ */
219/* For assembly code. */
220#define TRACEREG_SZ 0xa0
221#define STACKFRAME_SZ 0xc0
222
223#define TRACEREG32_SZ 0x50
224#define STACKFRAME32_SZ 0x60
81#endif /* __ASSEMBLY__ */ 225#endif /* __ASSEMBLY__ */
226
82#else /* (defined(__sparc__) && defined(__arch64__)) */ 227#else /* (defined(__sparc__) && defined(__arch64__)) */
228
229/* 32 bit sparc */
230
83#ifndef __ASSEMBLY__ 231#ifndef __ASSEMBLY__
84#include <asm/switch_to.h> 232
233#ifdef __KERNEL__
234
235#include <asm/system.h>
85 236
86static inline bool pt_regs_is_syscall(struct pt_regs *regs) 237static inline bool pt_regs_is_syscall(struct pt_regs *regs)
87{ 238{
@@ -101,17 +252,162 @@ static inline bool pt_regs_clear_syscall(struct pt_regs *regs)
101#define arch_ptrace_stop(exit_code, info) \ 252#define arch_ptrace_stop(exit_code, info) \
102 synchronize_user_stack() 253 synchronize_user_stack()
103 254
104#define current_pt_regs() \
105 ((struct pt_regs *)((unsigned long)current_thread_info() + THREAD_SIZE) - 1)
106
107#define user_mode(regs) (!((regs)->psr & PSR_PS)) 255#define user_mode(regs) (!((regs)->psr & PSR_PS))
108#define instruction_pointer(regs) ((regs)->pc) 256#define instruction_pointer(regs) ((regs)->pc)
109#define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP]) 257#define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP])
110unsigned long profile_pc(struct pt_regs *); 258unsigned long profile_pc(struct pt_regs *);
259#endif /* (__KERNEL__) */
260
111#else /* (!__ASSEMBLY__) */ 261#else /* (!__ASSEMBLY__) */
262/* For assembly code. */
263#define TRACEREG_SZ 0x50
264#define STACKFRAME_SZ 0x60
112#endif /* (!__ASSEMBLY__) */ 265#endif /* (!__ASSEMBLY__) */
266
113#endif /* (defined(__sparc__) && defined(__arch64__)) */ 267#endif /* (defined(__sparc__) && defined(__arch64__)) */
268
269#ifdef __KERNEL__
114#define STACK_BIAS 2047 270#define STACK_BIAS 2047
271#endif
272
273/* These are for pt_regs. */
274#define PT_V9_G0 0x00
275#define PT_V9_G1 0x08
276#define PT_V9_G2 0x10
277#define PT_V9_G3 0x18
278#define PT_V9_G4 0x20
279#define PT_V9_G5 0x28
280#define PT_V9_G6 0x30
281#define PT_V9_G7 0x38
282#define PT_V9_I0 0x40
283#define PT_V9_I1 0x48
284#define PT_V9_I2 0x50
285#define PT_V9_I3 0x58
286#define PT_V9_I4 0x60
287#define PT_V9_I5 0x68
288#define PT_V9_I6 0x70
289#define PT_V9_FP PT_V9_I6
290#define PT_V9_I7 0x78
291#define PT_V9_TSTATE 0x80
292#define PT_V9_TPC 0x88
293#define PT_V9_TNPC 0x90
294#define PT_V9_Y 0x98
295#define PT_V9_MAGIC 0x9c
296#define PT_TSTATE PT_V9_TSTATE
297#define PT_TPC PT_V9_TPC
298#define PT_TNPC PT_V9_TNPC
299
300/* These for pt_regs32. */
301#define PT_PSR 0x0
302#define PT_PC 0x4
303#define PT_NPC 0x8
304#define PT_Y 0xc
305#define PT_G0 0x10
306#define PT_WIM PT_G0
307#define PT_G1 0x14
308#define PT_G2 0x18
309#define PT_G3 0x1c
310#define PT_G4 0x20
311#define PT_G5 0x24
312#define PT_G6 0x28
313#define PT_G7 0x2c
314#define PT_I0 0x30
315#define PT_I1 0x34
316#define PT_I2 0x38
317#define PT_I3 0x3c
318#define PT_I4 0x40
319#define PT_I5 0x44
320#define PT_I6 0x48
321#define PT_FP PT_I6
322#define PT_I7 0x4c
323
324/* Reg_window offsets */
325#define RW_V9_L0 0x00
326#define RW_V9_L1 0x08
327#define RW_V9_L2 0x10
328#define RW_V9_L3 0x18
329#define RW_V9_L4 0x20
330#define RW_V9_L5 0x28
331#define RW_V9_L6 0x30
332#define RW_V9_L7 0x38
333#define RW_V9_I0 0x40
334#define RW_V9_I1 0x48
335#define RW_V9_I2 0x50
336#define RW_V9_I3 0x58
337#define RW_V9_I4 0x60
338#define RW_V9_I5 0x68
339#define RW_V9_I6 0x70
340#define RW_V9_I7 0x78
341
342#define RW_L0 0x00
343#define RW_L1 0x04
344#define RW_L2 0x08
345#define RW_L3 0x0c
346#define RW_L4 0x10
347#define RW_L5 0x14
348#define RW_L6 0x18
349#define RW_L7 0x1c
350#define RW_I0 0x20
351#define RW_I1 0x24
352#define RW_I2 0x28
353#define RW_I3 0x2c
354#define RW_I4 0x30
355#define RW_I5 0x34
356#define RW_I6 0x38
357#define RW_I7 0x3c
358
359/* Stack_frame offsets */
360#define SF_V9_L0 0x00
361#define SF_V9_L1 0x08
362#define SF_V9_L2 0x10
363#define SF_V9_L3 0x18
364#define SF_V9_L4 0x20
365#define SF_V9_L5 0x28
366#define SF_V9_L6 0x30
367#define SF_V9_L7 0x38
368#define SF_V9_I0 0x40
369#define SF_V9_I1 0x48
370#define SF_V9_I2 0x50
371#define SF_V9_I3 0x58
372#define SF_V9_I4 0x60
373#define SF_V9_I5 0x68
374#define SF_V9_FP 0x70
375#define SF_V9_PC 0x78
376#define SF_V9_RETP 0x80
377#define SF_V9_XARG0 0x88
378#define SF_V9_XARG1 0x90
379#define SF_V9_XARG2 0x98
380#define SF_V9_XARG3 0xa0
381#define SF_V9_XARG4 0xa8
382#define SF_V9_XARG5 0xb0
383#define SF_V9_XXARG 0xb8
384
385#define SF_L0 0x00
386#define SF_L1 0x04
387#define SF_L2 0x08
388#define SF_L3 0x0c
389#define SF_L4 0x10
390#define SF_L5 0x14
391#define SF_L6 0x18
392#define SF_L7 0x1c
393#define SF_I0 0x20
394#define SF_I1 0x24
395#define SF_I2 0x28
396#define SF_I3 0x2c
397#define SF_I4 0x30
398#define SF_I5 0x34
399#define SF_FP 0x38
400#define SF_PC 0x3c
401#define SF_RETP 0x40
402#define SF_XARG0 0x44
403#define SF_XARG1 0x48
404#define SF_XARG2 0x4c
405#define SF_XARG3 0x50
406#define SF_XARG4 0x54
407#define SF_XARG5 0x58
408#define SF_XXARG 0x5c
409
410#ifdef __KERNEL__
115 411
116/* global_reg_snapshot offsets */ 412/* global_reg_snapshot offsets */
117#define GR_SNAP_TSTATE 0x00 413#define GR_SNAP_TSTATE 0x00
@@ -123,4 +419,29 @@ unsigned long profile_pc(struct pt_regs *);
123#define GR_SNAP_THREAD 0x30 419#define GR_SNAP_THREAD 0x30
124#define GR_SNAP_PAD1 0x38 420#define GR_SNAP_PAD1 0x38
125 421
422#endif /* __KERNEL__ */
423
424/* Stuff for the ptrace system call */
425#define PTRACE_SPARC_DETACH 11
426#define PTRACE_GETREGS 12
427#define PTRACE_SETREGS 13
428#define PTRACE_GETFPREGS 14
429#define PTRACE_SETFPREGS 15
430#define PTRACE_READDATA 16
431#define PTRACE_WRITEDATA 17
432#define PTRACE_READTEXT 18
433#define PTRACE_WRITETEXT 19
434#define PTRACE_GETFPAREGS 20
435#define PTRACE_SETFPAREGS 21
436
437/* There are for debugging 64-bit processes, either from a 32 or 64 bit
438 * parent. Thus their complements are for debugging 32-bit processes only.
439 */
440
441#define PTRACE_GETREGS64 22
442#define PTRACE_SETREGS64 23
443/* PTRACE_SYSCALL is 24 */
444#define PTRACE_GETFPREGS64 25
445#define PTRACE_SETFPREGS64 26
446
126#endif /* !(__SPARC_PTRACE_H) */ 447#endif /* !(__SPARC_PTRACE_H) */
diff --git a/arch/sparc/include/asm/sections.h b/arch/sparc/include/asm/sections.h
index f300d1a9b2b..0b0553bbd8a 100644
--- a/arch/sparc/include/asm/sections.h
+++ b/arch/sparc/include/asm/sections.h
@@ -7,7 +7,4 @@
7/* sparc entry point */ 7/* sparc entry point */
8extern char _start[]; 8extern char _start[];
9 9
10extern char __leon_1insn_patch[];
11extern char __leon_1insn_patch_end[];
12
13#endif 10#endif
diff --git a/arch/sparc/include/asm/setup.h b/arch/sparc/include/asm/setup.h
index 5e35e051731..64718ba2643 100644
--- a/arch/sparc/include/asm/setup.h
+++ b/arch/sparc/include/asm/setup.h
@@ -1,31 +1,26 @@
1/* 1/*
2 * Just a place holder. 2 * Just a place holder.
3 */ 3 */
4
4#ifndef _SPARC_SETUP_H 5#ifndef _SPARC_SETUP_H
5#define _SPARC_SETUP_H 6#define _SPARC_SETUP_H
6 7
7#include <uapi/asm/setup.h> 8#if defined(__sparc__) && defined(__arch64__)
8 9# define COMMAND_LINE_SIZE 2048
10#else
11# define COMMAND_LINE_SIZE 256
12#endif
9 13
10extern char reboot_command[]; 14#ifdef __KERNEL__
11 15
12#ifdef CONFIG_SPARC32 16#ifdef CONFIG_SPARC32
13/* The CPU that was used for booting 17/* The CPU that was used for booting
14 * Only sun4d + leon may have boot_cpu_id != 0 18 * Only sun4d + leon may have boot_cpu_id != 0
15 */ 19 */
16extern unsigned char boot_cpu_id; 20extern unsigned char boot_cpu_id;
17 21extern unsigned char boot_cpu_id4;
18extern unsigned long empty_zero_page;
19
20extern int serial_console;
21static inline int con_is_present(void)
22{
23 return serial_console ? 0 : 1;
24}
25#endif 22#endif
26 23
27extern void sun_do_break(void); 24#endif /* __KERNEL__ */
28extern int stop_a_enabled;
29extern int scons_pwroff;
30 25
31#endif /* _SPARC_SETUP_H */ 26#endif /* _SPARC_SETUP_H */
diff --git a/arch/sparc/include/asm/shmparam_32.h b/arch/sparc/include/asm/shmparam_32.h
index 142825c8d3a..59a1243c12f 100644
--- a/arch/sparc/include/asm/shmparam_32.h
+++ b/arch/sparc/include/asm/shmparam_32.h
@@ -4,6 +4,8 @@
4#define __ARCH_FORCE_SHMLBA 1 4#define __ARCH_FORCE_SHMLBA 1
5 5
6extern int vac_cache_size; 6extern int vac_cache_size;
7#define SHMLBA (vac_cache_size ? vac_cache_size : PAGE_SIZE) 7#define SHMLBA (vac_cache_size ? vac_cache_size : \
8 (sparc_cpu_model == sun4c ? (64 * 1024) : \
9 (sparc_cpu_model == sun4 ? (128 * 1024) : PAGE_SIZE)))
8 10
9#endif /* _ASMSPARC_SHMPARAM_H */ 11#endif /* _ASMSPARC_SHMPARAM_H */
diff --git a/arch/sparc/include/asm/sigcontext.h b/arch/sparc/include/asm/sigcontext.h
index fc2df1e892c..69914d74813 100644
--- a/arch/sparc/include/asm/sigcontext.h
+++ b/arch/sparc/include/asm/sigcontext.h
@@ -1,8 +1,8 @@
1#ifndef __SPARC_SIGCONTEXT_H 1#ifndef __SPARC_SIGCONTEXT_H
2#define __SPARC_SIGCONTEXT_H 2#define __SPARC_SIGCONTEXT_H
3 3
4#ifdef __KERNEL__
4#include <asm/ptrace.h> 5#include <asm/ptrace.h>
5#include <uapi/asm/sigcontext.h>
6 6
7#ifndef __ASSEMBLY__ 7#ifndef __ASSEMBLY__
8 8
@@ -105,4 +105,6 @@ typedef struct {
105 105
106#endif /* !(__ASSEMBLY__) */ 106#endif /* !(__ASSEMBLY__) */
107 107
108#endif /* (__KERNEL__) */
109
108#endif /* !(__SPARC_SIGCONTEXT_H) */ 110#endif /* !(__SPARC_SIGCONTEXT_H) */
diff --git a/arch/sparc/include/asm/siginfo.h b/arch/sparc/include/asm/siginfo.h
index 48c34c19f81..988e5d8ed11 100644
--- a/arch/sparc/include/asm/siginfo.h
+++ b/arch/sparc/include/asm/siginfo.h
@@ -1,8 +1,22 @@
1#ifndef __SPARC_SIGINFO_H 1#ifndef __SPARC_SIGINFO_H
2#define __SPARC_SIGINFO_H 2#define __SPARC_SIGINFO_H
3 3
4#include <uapi/asm/siginfo.h> 4#if defined(__sparc__) && defined(__arch64__)
5 5
6#define SI_PAD_SIZE32 ((SI_MAX_SIZE/sizeof(int)) - 3)
7#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
8#define __ARCH_SI_BAND_T int
9
10#endif /* defined(__sparc__) && defined(__arch64__) */
11
12
13#define __ARCH_SI_TRAPNO
14
15#include <asm-generic/siginfo.h>
16
17#ifdef __KERNEL__
18
19#include <linux/compat.h>
6 20
7#ifdef CONFIG_COMPAT 21#ifdef CONFIG_COMPAT
8 22
@@ -10,4 +24,14 @@ struct compat_siginfo;
10 24
11#endif /* CONFIG_COMPAT */ 25#endif /* CONFIG_COMPAT */
12 26
27#endif /* __KERNEL__ */
28
29#define SI_NOINFO 32767 /* no information in siginfo_t */
30
31/*
32 * SIGEMT si_codes
33 */
34#define EMT_TAGOVF (__SI_FAULT|1) /* tag overflow */
35#define NSIGEMT 1
36
13#endif /* !(__SPARC_SIGINFO_H) */ 37#endif /* !(__SPARC_SIGINFO_H) */
diff --git a/arch/sparc/include/asm/signal.h b/arch/sparc/include/asm/signal.h
index 77b85850d54..e49b828a247 100644
--- a/arch/sparc/include/asm/signal.h
+++ b/arch/sparc/include/asm/signal.h
@@ -1,13 +1,167 @@
1#ifndef __SPARC_SIGNAL_H 1#ifndef __SPARC_SIGNAL_H
2#define __SPARC_SIGNAL_H 2#define __SPARC_SIGNAL_H
3 3
4#include <asm/sigcontext.h>
5#include <linux/compiler.h>
6
7#ifdef __KERNEL__
4#ifndef __ASSEMBLY__ 8#ifndef __ASSEMBLY__
5#include <linux/personality.h> 9#include <linux/personality.h>
6#include <linux/types.h> 10#include <linux/types.h>
7#endif 11#endif
8#include <uapi/asm/signal.h> 12#endif
13
14/* On the Sparc the signal handlers get passed a 'sub-signal' code
15 * for certain signal types, which we document here.
16 */
17#define SIGHUP 1
18#define SIGINT 2
19#define SIGQUIT 3
20#define SIGILL 4
21#define SUBSIG_STACK 0
22#define SUBSIG_ILLINST 2
23#define SUBSIG_PRIVINST 3
24#define SUBSIG_BADTRAP(t) (0x80 + (t))
25
26#define SIGTRAP 5
27#define SIGABRT 6
28#define SIGIOT 6
29
30#define SIGEMT 7
31#define SUBSIG_TAG 10
32
33#define SIGFPE 8
34#define SUBSIG_FPDISABLED 0x400
35#define SUBSIG_FPERROR 0x404
36#define SUBSIG_FPINTOVFL 0x001
37#define SUBSIG_FPSTSIG 0x002
38#define SUBSIG_IDIVZERO 0x014
39#define SUBSIG_FPINEXACT 0x0c4
40#define SUBSIG_FPDIVZERO 0x0c8
41#define SUBSIG_FPUNFLOW 0x0cc
42#define SUBSIG_FPOPERROR 0x0d0
43#define SUBSIG_FPOVFLOW 0x0d4
44
45#define SIGKILL 9
46#define SIGBUS 10
47#define SUBSIG_BUSTIMEOUT 1
48#define SUBSIG_ALIGNMENT 2
49#define SUBSIG_MISCERROR 5
50
51#define SIGSEGV 11
52#define SUBSIG_NOMAPPING 3
53#define SUBSIG_PROTECTION 4
54#define SUBSIG_SEGERROR 5
55
56#define SIGSYS 12
57
58#define SIGPIPE 13
59#define SIGALRM 14
60#define SIGTERM 15
61#define SIGURG 16
62
63/* SunOS values which deviate from the Linux/i386 ones */
64#define SIGSTOP 17
65#define SIGTSTP 18
66#define SIGCONT 19
67#define SIGCHLD 20
68#define SIGTTIN 21
69#define SIGTTOU 22
70#define SIGIO 23
71#define SIGPOLL SIGIO /* SysV name for SIGIO */
72#define SIGXCPU 24
73#define SIGXFSZ 25
74#define SIGVTALRM 26
75#define SIGPROF 27
76#define SIGWINCH 28
77#define SIGLOST 29
78#define SIGPWR SIGLOST
79#define SIGUSR1 30
80#define SIGUSR2 31
81
82/* Most things should be clean enough to redefine this at will, if care
83 is taken to make libc match. */
84
85#define __OLD_NSIG 32
86#define __NEW_NSIG 64
87#ifdef __arch64__
88#define _NSIG_BPW 64
89#else
90#define _NSIG_BPW 32
91#endif
92#define _NSIG_WORDS (__NEW_NSIG / _NSIG_BPW)
93
94#define SIGRTMIN 32
95#define SIGRTMAX __NEW_NSIG
96
97#if defined(__KERNEL__) || defined(__WANT_POSIX1B_SIGNALS__)
98#define _NSIG __NEW_NSIG
99#define __new_sigset_t sigset_t
100#define __new_sigaction sigaction
101#define __new_sigaction32 sigaction32
102#define __old_sigset_t old_sigset_t
103#define __old_sigaction old_sigaction
104#define __old_sigaction32 old_sigaction32
105#else
106#define _NSIG __OLD_NSIG
107#define NSIG _NSIG
108#define __old_sigset_t sigset_t
109#define __old_sigaction sigaction
110#define __old_sigaction32 sigaction32
111#endif
9 112
10#ifndef __ASSEMBLY__ 113#ifndef __ASSEMBLY__
114
115typedef unsigned long __old_sigset_t; /* at least 32 bits */
116
117typedef struct {
118 unsigned long sig[_NSIG_WORDS];
119} __new_sigset_t;
120
121/* A SunOS sigstack */
122struct sigstack {
123 /* XXX 32-bit pointers pinhead XXX */
124 char *the_stack;
125 int cur_status;
126};
127
128/* Sigvec flags */
129#define _SV_SSTACK 1u /* This signal handler should use sig-stack */
130#define _SV_INTR 2u /* Sig return should not restart system call */
131#define _SV_RESET 4u /* Set handler to SIG_DFL upon taken signal */
132#define _SV_IGNCHILD 8u /* Do not send SIGCHLD */
133
134/*
135 * sa_flags values: SA_STACK is not currently supported, but will allow the
136 * usage of signal stacks by using the (now obsolete) sa_restorer field in
137 * the sigaction structure as a stack pointer. This is now possible due to
138 * the changes in signal handling. LBT 010493.
139 * SA_RESTART flag to get restarting signals (which were the default long ago)
140 */
141#define SA_NOCLDSTOP _SV_IGNCHILD
142#define SA_STACK _SV_SSTACK
143#define SA_ONSTACK _SV_SSTACK
144#define SA_RESTART _SV_INTR
145#define SA_ONESHOT _SV_RESET
146#define SA_NOMASK 0x20u
147#define SA_NOCLDWAIT 0x100u
148#define SA_SIGINFO 0x200u
149
150
151#define SIG_BLOCK 0x01 /* for blocking signals */
152#define SIG_UNBLOCK 0x02 /* for unblocking signals */
153#define SIG_SETMASK 0x04 /* for setting the signal mask */
154
155/*
156 * sigaltstack controls
157 */
158#define SS_ONSTACK 1
159#define SS_DISABLE 2
160
161#define MINSIGSTKSZ 4096
162#define SIGSTKSZ 16384
163
164#ifdef __KERNEL__
11/* 165/*
12 * DJHR 166 * DJHR
13 * SA_STATIC_ALLOC is used for the sparc32 system to indicate that this 167 * SA_STATIC_ALLOC is used for the sparc32 system to indicate that this
@@ -20,11 +174,41 @@
20 * 174 *
21 */ 175 */
22#define SA_STATIC_ALLOC 0x8000 176#define SA_STATIC_ALLOC 0x8000
177#endif
178
179#include <asm-generic/signal-defs.h>
180
181struct __new_sigaction {
182 __sighandler_t sa_handler;
183 unsigned long sa_flags;
184 __sigrestore_t sa_restorer; /* not used by Linux/SPARC yet */
185 __new_sigset_t sa_mask;
186};
187
188struct __old_sigaction {
189 __sighandler_t sa_handler;
190 __old_sigset_t sa_mask;
191 unsigned long sa_flags;
192 void (*sa_restorer)(void); /* not used by Linux/SPARC yet */
193};
194
195typedef struct sigaltstack {
196 void __user *ss_sp;
197 int ss_flags;
198 size_t ss_size;
199} stack_t;
200
201#ifdef __KERNEL__
23 202
24struct k_sigaction { 203struct k_sigaction {
25 struct __new_sigaction sa; 204 struct __new_sigaction sa;
26 void __user *ka_restorer; 205 void __user *ka_restorer;
27}; 206};
28 207
208#define ptrace_signal_deliver(regs, cookie) do { } while (0)
209
210#endif /* !(__KERNEL__) */
211
29#endif /* !(__ASSEMBLY__) */ 212#endif /* !(__ASSEMBLY__) */
213
30#endif /* !(__SPARC_SIGNAL_H) */ 214#endif /* !(__SPARC_SIGNAL_H) */
diff --git a/arch/sparc/include/asm/smp_32.h b/arch/sparc/include/asm/smp_32.h
index b73da3c5f10..01c51c70434 100644
--- a/arch/sparc/include/asm/smp_32.h
+++ b/arch/sparc/include/asm/smp_32.h
@@ -8,6 +8,7 @@
8 8
9#include <linux/threads.h> 9#include <linux/threads.h>
10#include <asm/head.h> 10#include <asm/head.h>
11#include <asm/btfixup.h>
11 12
12#ifndef __ASSEMBLY__ 13#ifndef __ASSEMBLY__
13 14
@@ -57,53 +58,104 @@ struct seq_file;
57void smp_bogo(struct seq_file *); 58void smp_bogo(struct seq_file *);
58void smp_info(struct seq_file *); 59void smp_info(struct seq_file *);
59 60
60struct sparc32_ipi_ops { 61BTFIXUPDEF_CALL(void, smp_cross_call, smpfunc_t, cpumask_t, unsigned long, unsigned long, unsigned long, unsigned long)
61 void (*cross_call)(smpfunc_t func, cpumask_t mask, unsigned long arg1, 62BTFIXUPDEF_CALL(int, __hard_smp_processor_id, void)
62 unsigned long arg2, unsigned long arg3, 63BTFIXUPDEF_CALL(void, smp_ipi_resched, int);
63 unsigned long arg4); 64BTFIXUPDEF_CALL(void, smp_ipi_single, int);
64 void (*resched)(int cpu); 65BTFIXUPDEF_CALL(void, smp_ipi_mask_one, int);
65 void (*single)(int cpu); 66BTFIXUPDEF_BLACKBOX(hard_smp_processor_id)
66 void (*mask_one)(int cpu); 67BTFIXUPDEF_BLACKBOX(load_current)
67};
68extern const struct sparc32_ipi_ops *sparc32_ipi_ops;
69
70static inline void xc0(smpfunc_t func)
71{
72 sparc32_ipi_ops->cross_call(func, *cpu_online_mask, 0, 0, 0, 0);
73}
74 68
69#define smp_cross_call(func,mask,arg1,arg2,arg3,arg4) BTFIXUP_CALL(smp_cross_call)(func,mask,arg1,arg2,arg3,arg4)
70
71static inline void xc0(smpfunc_t func) { smp_cross_call(func, *cpu_online_mask, 0, 0, 0, 0); }
75static inline void xc1(smpfunc_t func, unsigned long arg1) 72static inline void xc1(smpfunc_t func, unsigned long arg1)
76{ 73{ smp_cross_call(func, *cpu_online_mask, arg1, 0, 0, 0); }
77 sparc32_ipi_ops->cross_call(func, *cpu_online_mask, arg1, 0, 0, 0);
78}
79static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2) 74static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2)
75{ smp_cross_call(func, *cpu_online_mask, arg1, arg2, 0, 0); }
76static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2,
77 unsigned long arg3)
78{ smp_cross_call(func, *cpu_online_mask, arg1, arg2, arg3, 0); }
79static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2,
80 unsigned long arg3, unsigned long arg4)
81{ smp_cross_call(func, *cpu_online_mask, arg1, arg2, arg3, arg4); }
82
83extern void arch_send_call_function_single_ipi(int cpu);
84extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
85
86static inline int cpu_logical_map(int cpu)
80{ 87{
81 sparc32_ipi_ops->cross_call(func, *cpu_online_mask, arg1, arg2, 0, 0); 88 return cpu;
82} 89}
83 90
84static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2, 91static inline int hard_smp4m_processor_id(void)
85 unsigned long arg3)
86{ 92{
87 sparc32_ipi_ops->cross_call(func, *cpu_online_mask, 93 int cpuid;
88 arg1, arg2, arg3, 0); 94
95 __asm__ __volatile__("rd %%tbr, %0\n\t"
96 "srl %0, 12, %0\n\t"
97 "and %0, 3, %0\n\t" :
98 "=&r" (cpuid));
99 return cpuid;
89} 100}
90 101
91static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2, 102static inline int hard_smp4d_processor_id(void)
92 unsigned long arg3, unsigned long arg4)
93{ 103{
94 sparc32_ipi_ops->cross_call(func, *cpu_online_mask, 104 int cpuid;
95 arg1, arg2, arg3, arg4); 105
106 __asm__ __volatile__("lda [%%g0] %1, %0\n\t" :
107 "=&r" (cpuid) : "i" (ASI_M_VIKING_TMP1));
108 return cpuid;
96} 109}
97 110
98extern void arch_send_call_function_single_ipi(int cpu); 111extern inline int hard_smpleon_processor_id(void)
99extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); 112{
113 int cpuid;
114 __asm__ __volatile__("rd %%asr17,%0\n\t"
115 "srl %0,28,%0" :
116 "=&r" (cpuid) : );
117 return cpuid;
118}
100 119
101static inline int cpu_logical_map(int cpu) 120#ifndef MODULE
121static inline int hard_smp_processor_id(void)
102{ 122{
103 return cpu; 123 int cpuid;
124
125 /* Black box - sun4m
126 __asm__ __volatile__("rd %%tbr, %0\n\t"
127 "srl %0, 12, %0\n\t"
128 "and %0, 3, %0\n\t" :
129 "=&r" (cpuid));
130 - sun4d
131 __asm__ __volatile__("lda [%g0] ASI_M_VIKING_TMP1, %0\n\t"
132 "nop; nop" :
133 "=&r" (cpuid));
134 - leon
135 __asm__ __volatile__( "rd %asr17, %0\n\t"
136 "srl %0, 0x1c, %0\n\t"
137 "nop\n\t" :
138 "=&r" (cpuid));
139 See btfixup.h and btfixupprep.c to understand how a blackbox works.
140 */
141 __asm__ __volatile__("sethi %%hi(___b_hard_smp_processor_id), %0\n\t"
142 "sethi %%hi(boot_cpu_id), %0\n\t"
143 "ldub [%0 + %%lo(boot_cpu_id)], %0\n\t" :
144 "=&r" (cpuid));
145 return cpuid;
104} 146}
147#else
148static inline int hard_smp_processor_id(void)
149{
150 int cpuid;
105 151
106extern int hard_smp_processor_id(void); 152 __asm__ __volatile__("mov %%o7, %%g1\n\t"
153 "call ___f___hard_smp_processor_id\n\t"
154 " nop\n\t"
155 "mov %%g2, %0\n\t" : "=r"(cpuid) : : "g1", "g2");
156 return cpuid;
157}
158#endif
107 159
108#define raw_smp_processor_id() (current_thread_info()->cpu) 160#define raw_smp_processor_id() (current_thread_info()->cpu)
109 161
diff --git a/arch/sparc/include/asm/smp_64.h b/arch/sparc/include/asm/smp_64.h
index dd3bef4b989..29862a9e906 100644
--- a/arch/sparc/include/asm/smp_64.h
+++ b/arch/sparc/include/asm/smp_64.h
@@ -48,7 +48,6 @@ extern void smp_fill_in_sib_core_maps(void);
48extern void cpu_play_dead(void); 48extern void cpu_play_dead(void);
49 49
50extern void smp_fetch_global_regs(void); 50extern void smp_fetch_global_regs(void);
51extern void smp_fetch_global_pmu(void);
52 51
53struct seq_file; 52struct seq_file;
54void smp_bogo(struct seq_file *); 53void smp_bogo(struct seq_file *);
@@ -66,7 +65,6 @@ extern void __cpu_die(unsigned int cpu);
66#define hard_smp_processor_id() 0 65#define hard_smp_processor_id() 0
67#define smp_fill_in_sib_core_maps() do { } while (0) 66#define smp_fill_in_sib_core_maps() do { } while (0)
68#define smp_fetch_global_regs() do { } while (0) 67#define smp_fetch_global_regs() do { } while (0)
69#define smp_fetch_global_pmu() do { } while (0)
70 68
71#endif /* !(CONFIG_SMP) */ 69#endif /* !(CONFIG_SMP) */
72 70
diff --git a/arch/sparc/include/asm/string_32.h b/arch/sparc/include/asm/string_32.h
index 12f67857152..edf196ee4ef 100644
--- a/arch/sparc/include/asm/string_32.h
+++ b/arch/sparc/include/asm/string_32.h
@@ -61,7 +61,68 @@ extern int memcmp(const void *,const void *,__kernel_size_t);
61extern __kernel_size_t strlen(const char *); 61extern __kernel_size_t strlen(const char *);
62 62
63#define __HAVE_ARCH_STRNCMP 63#define __HAVE_ARCH_STRNCMP
64extern int strncmp(const char *, const char *, __kernel_size_t); 64
65extern int __strncmp(const char *, const char *, __kernel_size_t);
66
67static inline int __constant_strncmp(const char *src, const char *dest, __kernel_size_t count)
68{
69 register int retval;
70 switch(count) {
71 case 0: return 0;
72 case 1: return (src[0] - dest[0]);
73 case 2: retval = (src[0] - dest[0]);
74 if(!retval && src[0])
75 retval = (src[1] - dest[1]);
76 return retval;
77 case 3: retval = (src[0] - dest[0]);
78 if(!retval && src[0]) {
79 retval = (src[1] - dest[1]);
80 if(!retval && src[1])
81 retval = (src[2] - dest[2]);
82 }
83 return retval;
84 case 4: retval = (src[0] - dest[0]);
85 if(!retval && src[0]) {
86 retval = (src[1] - dest[1]);
87 if(!retval && src[1]) {
88 retval = (src[2] - dest[2]);
89 if (!retval && src[2])
90 retval = (src[3] - dest[3]);
91 }
92 }
93 return retval;
94 case 5: retval = (src[0] - dest[0]);
95 if(!retval && src[0]) {
96 retval = (src[1] - dest[1]);
97 if(!retval && src[1]) {
98 retval = (src[2] - dest[2]);
99 if (!retval && src[2]) {
100 retval = (src[3] - dest[3]);
101 if (!retval && src[3])
102 retval = (src[4] - dest[4]);
103 }
104 }
105 }
106 return retval;
107 default:
108 retval = (src[0] - dest[0]);
109 if(!retval && src[0]) {
110 retval = (src[1] - dest[1]);
111 if(!retval && src[1]) {
112 retval = (src[2] - dest[2]);
113 if(!retval && src[2])
114 retval = __strncmp(src+3,dest+3,count-3);
115 }
116 }
117 return retval;
118 }
119}
120
121#undef strncmp
122#define strncmp(__arg0, __arg1, __arg2) \
123(__builtin_constant_p(__arg2) ? \
124 __constant_strncmp(__arg0, __arg1, __arg2) : \
125 __strncmp(__arg0, __arg1, __arg2))
65 126
66#endif /* !EXPORT_SYMTAB_STROPS */ 127#endif /* !EXPORT_SYMTAB_STROPS */
67 128
diff --git a/arch/sparc/include/asm/switch_to.h b/arch/sparc/include/asm/switch_to.h
deleted file mode 100644
index 2dc4fa5c6f8..00000000000
--- a/arch/sparc/include/asm/switch_to.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef ___ASM_SPARC_SWITCH_TO_H
2#define ___ASM_SPARC_SWITCH_TO_H
3#if defined(__sparc__) && defined(__arch64__)
4#include <asm/switch_to_64.h>
5#else
6#include <asm/switch_to_32.h>
7#endif
8#endif
diff --git a/arch/sparc/include/asm/switch_to_32.h b/arch/sparc/include/asm/switch_to_32.h
deleted file mode 100644
index e32e82b76ee..00000000000
--- a/arch/sparc/include/asm/switch_to_32.h
+++ /dev/null
@@ -1,106 +0,0 @@
1#ifndef __SPARC_SWITCH_TO_H
2#define __SPARC_SWITCH_TO_H
3
4#include <asm/smp.h>
5
6extern struct thread_info *current_set[NR_CPUS];
7
8/*
9 * Flush windows so that the VM switch which follows
10 * would not pull the stack from under us.
11 *
12 * SWITCH_ENTER and SWITH_DO_LAZY_FPU do not work yet (e.g. SMP does not work)
13 * XXX WTF is the above comment? Found in late teen 2.4.x.
14 */
15#ifdef CONFIG_SMP
16#define SWITCH_ENTER(prv) \
17 do { \
18 if (test_tsk_thread_flag(prv, TIF_USEDFPU)) { \
19 put_psr(get_psr() | PSR_EF); \
20 fpsave(&(prv)->thread.float_regs[0], &(prv)->thread.fsr, \
21 &(prv)->thread.fpqueue[0], &(prv)->thread.fpqdepth); \
22 clear_tsk_thread_flag(prv, TIF_USEDFPU); \
23 (prv)->thread.kregs->psr &= ~PSR_EF; \
24 } \
25 } while(0)
26
27#define SWITCH_DO_LAZY_FPU(next) /* */
28#else
29#define SWITCH_ENTER(prv) /* */
30#define SWITCH_DO_LAZY_FPU(nxt) \
31 do { \
32 if (last_task_used_math != (nxt)) \
33 (nxt)->thread.kregs->psr&=~PSR_EF; \
34 } while(0)
35#endif
36
37#define prepare_arch_switch(next) do { \
38 __asm__ __volatile__( \
39 ".globl\tflush_patch_switch\nflush_patch_switch:\n\t" \
40 "save %sp, -0x40, %sp; save %sp, -0x40, %sp; save %sp, -0x40, %sp\n\t" \
41 "save %sp, -0x40, %sp; save %sp, -0x40, %sp; save %sp, -0x40, %sp\n\t" \
42 "save %sp, -0x40, %sp\n\t" \
43 "restore; restore; restore; restore; restore; restore; restore"); \
44} while(0)
45
46 /* Much care has gone into this code, do not touch it.
47 *
48 * We need to loadup regs l0/l1 for the newly forked child
49 * case because the trap return path relies on those registers
50 * holding certain values, gcc is told that they are clobbered.
51 * Gcc needs registers for 3 values in and 1 value out, so we
52 * clobber every non-fixed-usage register besides l2/l3/o4/o5. -DaveM
53 *
54 * Hey Dave, that do not touch sign is too much of an incentive
55 * - Anton & Pete
56 */
57#define switch_to(prev, next, last) do { \
58 SWITCH_ENTER(prev); \
59 SWITCH_DO_LAZY_FPU(next); \
60 cpumask_set_cpu(smp_processor_id(), mm_cpumask(next->active_mm)); \
61 __asm__ __volatile__( \
62 "sethi %%hi(here - 0x8), %%o7\n\t" \
63 "mov %%g6, %%g3\n\t" \
64 "or %%o7, %%lo(here - 0x8), %%o7\n\t" \
65 "rd %%psr, %%g4\n\t" \
66 "std %%sp, [%%g6 + %4]\n\t" \
67 "rd %%wim, %%g5\n\t" \
68 "wr %%g4, 0x20, %%psr\n\t" \
69 "nop\n\t" \
70 "std %%g4, [%%g6 + %3]\n\t" \
71 "ldd [%2 + %3], %%g4\n\t" \
72 "mov %2, %%g6\n\t" \
73 ".globl patchme_store_new_current\n" \
74"patchme_store_new_current:\n\t" \
75 "st %2, [%1]\n\t" \
76 "wr %%g4, 0x20, %%psr\n\t" \
77 "nop\n\t" \
78 "nop\n\t" \
79 "nop\n\t" /* LEON needs all 3 nops: load to %sp depends on CWP. */ \
80 "ldd [%%g6 + %4], %%sp\n\t" \
81 "wr %%g5, 0x0, %%wim\n\t" \
82 "ldd [%%sp + 0x00], %%l0\n\t" \
83 "ldd [%%sp + 0x38], %%i6\n\t" \
84 "wr %%g4, 0x0, %%psr\n\t" \
85 "nop\n\t" \
86 "nop\n\t" \
87 "jmpl %%o7 + 0x8, %%g0\n\t" \
88 " ld [%%g3 + %5], %0\n\t" \
89 "here:\n" \
90 : "=&r" (last) \
91 : "r" (&(current_set[hard_smp_processor_id()])), \
92 "r" (task_thread_info(next)), \
93 "i" (TI_KPSR), \
94 "i" (TI_KSP), \
95 "i" (TI_TASK) \
96 : "g1", "g2", "g3", "g4", "g5", "g7", \
97 "l0", "l1", "l3", "l4", "l5", "l6", "l7", \
98 "i0", "i1", "i2", "i3", "i4", "i5", \
99 "o0", "o1", "o2", "o3", "o7"); \
100 } while(0)
101
102extern void fpsave(unsigned long *fpregs, unsigned long *fsr,
103 void *fpqueue, unsigned long *fpqdepth);
104extern void synchronize_user_stack(void);
105
106#endif /* __SPARC_SWITCH_TO_H */
diff --git a/arch/sparc/include/asm/switch_to_64.h b/arch/sparc/include/asm/switch_to_64.h
deleted file mode 100644
index cad36f56fa0..00000000000
--- a/arch/sparc/include/asm/switch_to_64.h
+++ /dev/null
@@ -1,72 +0,0 @@
1#ifndef __SPARC64_SWITCH_TO_64_H
2#define __SPARC64_SWITCH_TO_64_H
3
4#include <asm/visasm.h>
5
6#define prepare_arch_switch(next) \
7do { \
8 flushw_all(); \
9} while (0)
10
11 /* See what happens when you design the chip correctly?
12 *
13 * We tell gcc we clobber all non-fixed-usage registers except
14 * for l0/l1. It will use one for 'next' and the other to hold
15 * the output value of 'last'. 'next' is not referenced again
16 * past the invocation of switch_to in the scheduler, so we need
17 * not preserve it's value. Hairy, but it lets us remove 2 loads
18 * and 2 stores in this critical code path. -DaveM
19 */
20#define switch_to(prev, next, last) \
21do { flush_tlb_pending(); \
22 save_and_clear_fpu(); \
23 /* If you are tempted to conditionalize the following */ \
24 /* so that ASI is only written if it changes, think again. */ \
25 __asm__ __volatile__("wr %%g0, %0, %%asi" \
26 : : "r" (task_thread_info(next)->current_ds));\
27 trap_block[current_thread_info()->cpu].thread = \
28 task_thread_info(next); \
29 __asm__ __volatile__( \
30 "mov %%g4, %%g7\n\t" \
31 "stx %%i6, [%%sp + 2047 + 0x70]\n\t" \
32 "stx %%i7, [%%sp + 2047 + 0x78]\n\t" \
33 "rdpr %%wstate, %%o5\n\t" \
34 "stx %%o6, [%%g6 + %6]\n\t" \
35 "stb %%o5, [%%g6 + %5]\n\t" \
36 "rdpr %%cwp, %%o5\n\t" \
37 "stb %%o5, [%%g6 + %8]\n\t" \
38 "wrpr %%g0, 15, %%pil\n\t" \
39 "mov %4, %%g6\n\t" \
40 "ldub [%4 + %8], %%g1\n\t" \
41 "wrpr %%g1, %%cwp\n\t" \
42 "ldx [%%g6 + %6], %%o6\n\t" \
43 "ldub [%%g6 + %5], %%o5\n\t" \
44 "ldub [%%g6 + %7], %%o7\n\t" \
45 "wrpr %%o5, 0x0, %%wstate\n\t" \
46 "ldx [%%sp + 2047 + 0x70], %%i6\n\t" \
47 "ldx [%%sp + 2047 + 0x78], %%i7\n\t" \
48 "ldx [%%g6 + %9], %%g4\n\t" \
49 "wrpr %%g0, 14, %%pil\n\t" \
50 "brz,pt %%o7, switch_to_pc\n\t" \
51 " mov %%g7, %0\n\t" \
52 "sethi %%hi(ret_from_syscall), %%g1\n\t" \
53 "jmpl %%g1 + %%lo(ret_from_syscall), %%g0\n\t" \
54 " nop\n\t" \
55 ".globl switch_to_pc\n\t" \
56 "switch_to_pc:\n\t" \
57 : "=&r" (last), "=r" (current), "=r" (current_thread_info_reg), \
58 "=r" (__local_per_cpu_offset) \
59 : "0" (task_thread_info(next)), \
60 "i" (TI_WSTATE), "i" (TI_KSP), "i" (TI_NEW_CHILD), \
61 "i" (TI_CWP), "i" (TI_TASK) \
62 : "cc", \
63 "g1", "g2", "g3", "g7", \
64 "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
65 "i0", "i1", "i2", "i3", "i4", "i5", \
66 "o0", "o1", "o2", "o3", "o4", "o5", "o7"); \
67} while(0)
68
69extern void synchronize_user_stack(void);
70extern void fault_in_user_windows(void);
71
72#endif /* __SPARC64_SWITCH_TO_64_H */
diff --git a/arch/sparc/include/asm/syscalls.h b/arch/sparc/include/asm/syscalls.h
index bf8972adea1..45a43f637a1 100644
--- a/arch/sparc/include/asm/syscalls.h
+++ b/arch/sparc/include/asm/syscalls.h
@@ -8,4 +8,6 @@ extern asmlinkage long sparc_do_fork(unsigned long clone_flags,
8 struct pt_regs *regs, 8 struct pt_regs *regs,
9 unsigned long stack_size); 9 unsigned long stack_size);
10 10
11extern asmlinkage int sparc_execve(struct pt_regs *regs);
12
11#endif /* _SPARC64_SYSCALLS_H */ 13#endif /* _SPARC64_SYSCALLS_H */
diff --git a/arch/sparc/include/asm/termbits.h b/arch/sparc/include/asm/termbits.h
index 948067065ac..23b10ff08df 100644
--- a/arch/sparc/include/asm/termbits.h
+++ b/arch/sparc/include/asm/termbits.h
@@ -1,8 +1,266 @@
1#ifndef _SPARC_TERMBITS_H 1#ifndef _SPARC_TERMBITS_H
2#define _SPARC_TERMBITS_H 2#define _SPARC_TERMBITS_H
3 3
4#include <uapi/asm/termbits.h> 4#include <linux/posix_types.h>
5 5
6typedef unsigned char cc_t;
7typedef unsigned int speed_t;
8
9#if defined(__sparc__) && defined(__arch64__)
10typedef unsigned int tcflag_t;
11#else
12typedef unsigned long tcflag_t;
13#endif
14
15#define NCC 8
16struct termio {
17 unsigned short c_iflag; /* input mode flags */
18 unsigned short c_oflag; /* output mode flags */
19 unsigned short c_cflag; /* control mode flags */
20 unsigned short c_lflag; /* local mode flags */
21 unsigned char c_line; /* line discipline */
22 unsigned char c_cc[NCC]; /* control characters */
23};
24
25#define NCCS 17
26struct termios {
27 tcflag_t c_iflag; /* input mode flags */
28 tcflag_t c_oflag; /* output mode flags */
29 tcflag_t c_cflag; /* control mode flags */
30 tcflag_t c_lflag; /* local mode flags */
31 cc_t c_line; /* line discipline */
32#ifndef __KERNEL__
33 cc_t c_cc[NCCS]; /* control characters */
34#else
35 cc_t c_cc[NCCS+2]; /* kernel needs 2 more to hold vmin/vtime */
36#define SIZEOF_USER_TERMIOS sizeof (struct termios) - (2*sizeof (cc_t))
37#endif
38};
39
40struct termios2 {
41 tcflag_t c_iflag; /* input mode flags */
42 tcflag_t c_oflag; /* output mode flags */
43 tcflag_t c_cflag; /* control mode flags */
44 tcflag_t c_lflag; /* local mode flags */
45 cc_t c_line; /* line discipline */
46 cc_t c_cc[NCCS+2]; /* control characters */
47 speed_t c_ispeed; /* input speed */
48 speed_t c_ospeed; /* output speed */
49};
50
51struct ktermios {
52 tcflag_t c_iflag; /* input mode flags */
53 tcflag_t c_oflag; /* output mode flags */
54 tcflag_t c_cflag; /* control mode flags */
55 tcflag_t c_lflag; /* local mode flags */
56 cc_t c_line; /* line discipline */
57 cc_t c_cc[NCCS+2]; /* control characters */
58 speed_t c_ispeed; /* input speed */
59 speed_t c_ospeed; /* output speed */
60};
61
62/* c_cc characters */
63#define VINTR 0
64#define VQUIT 1
65#define VERASE 2
66#define VKILL 3
67#define VEOF 4
68#define VEOL 5
69#define VEOL2 6
70#define VSWTC 7
71#define VSTART 8
72#define VSTOP 9
73
74
75
76#define VSUSP 10
77#define VDSUSP 11 /* SunOS POSIX nicety I do believe... */
78#define VREPRINT 12
79#define VDISCARD 13
80#define VWERASE 14
81#define VLNEXT 15
82
83/* Kernel keeps vmin/vtime separated, user apps assume vmin/vtime is
84 * shared with eof/eol
85 */
86#ifdef __KERNEL__
6#define VMIN 16 87#define VMIN 16
7#define VTIME 17 88#define VTIME 17
89#else
90#define VMIN VEOF
91#define VTIME VEOL
92#endif
93
94/* c_iflag bits */
95#define IGNBRK 0x00000001
96#define BRKINT 0x00000002
97#define IGNPAR 0x00000004
98#define PARMRK 0x00000008
99#define INPCK 0x00000010
100#define ISTRIP 0x00000020
101#define INLCR 0x00000040
102#define IGNCR 0x00000080
103#define ICRNL 0x00000100
104#define IUCLC 0x00000200
105#define IXON 0x00000400
106#define IXANY 0x00000800
107#define IXOFF 0x00001000
108#define IMAXBEL 0x00002000
109#define IUTF8 0x00004000
110
111/* c_oflag bits */
112#define OPOST 0x00000001
113#define OLCUC 0x00000002
114#define ONLCR 0x00000004
115#define OCRNL 0x00000008
116#define ONOCR 0x00000010
117#define ONLRET 0x00000020
118#define OFILL 0x00000040
119#define OFDEL 0x00000080
120#define NLDLY 0x00000100
121#define NL0 0x00000000
122#define NL1 0x00000100
123#define CRDLY 0x00000600
124#define CR0 0x00000000
125#define CR1 0x00000200
126#define CR2 0x00000400
127#define CR3 0x00000600
128#define TABDLY 0x00001800
129#define TAB0 0x00000000
130#define TAB1 0x00000800
131#define TAB2 0x00001000
132#define TAB3 0x00001800
133#define XTABS 0x00001800
134#define BSDLY 0x00002000
135#define BS0 0x00000000
136#define BS1 0x00002000
137#define VTDLY 0x00004000
138#define VT0 0x00000000
139#define VT1 0x00004000
140#define FFDLY 0x00008000
141#define FF0 0x00000000
142#define FF1 0x00008000
143#define PAGEOUT 0x00010000 /* SUNOS specific */
144#define WRAP 0x00020000 /* SUNOS specific */
145
146/* c_cflag bit meaning */
147#define CBAUD 0x0000100f
148#define B0 0x00000000 /* hang up */
149#define B50 0x00000001
150#define B75 0x00000002
151#define B110 0x00000003
152#define B134 0x00000004
153#define B150 0x00000005
154#define B200 0x00000006
155#define B300 0x00000007
156#define B600 0x00000008
157#define B1200 0x00000009
158#define B1800 0x0000000a
159#define B2400 0x0000000b
160#define B4800 0x0000000c
161#define B9600 0x0000000d
162#define B19200 0x0000000e
163#define B38400 0x0000000f
164#define EXTA B19200
165#define EXTB B38400
166#define CSIZE 0x00000030
167#define CS5 0x00000000
168#define CS6 0x00000010
169#define CS7 0x00000020
170#define CS8 0x00000030
171#define CSTOPB 0x00000040
172#define CREAD 0x00000080
173#define PARENB 0x00000100
174#define PARODD 0x00000200
175#define HUPCL 0x00000400
176#define CLOCAL 0x00000800
177#define CBAUDEX 0x00001000
178/* We'll never see these speeds with the Zilogs, but for completeness... */
179#define BOTHER 0x00001000
180#define B57600 0x00001001
181#define B115200 0x00001002
182#define B230400 0x00001003
183#define B460800 0x00001004
184/* This is what we can do with the Zilogs. */
185#define B76800 0x00001005
186/* This is what we can do with the SAB82532. */
187#define B153600 0x00001006
188#define B307200 0x00001007
189#define B614400 0x00001008
190#define B921600 0x00001009
191/* And these are the rest... */
192#define B500000 0x0000100a
193#define B576000 0x0000100b
194#define B1000000 0x0000100c
195#define B1152000 0x0000100d
196#define B1500000 0x0000100e
197#define B2000000 0x0000100f
198/* These have totally bogus values and nobody uses them
199 so far. Later on we'd have to use say 0x10000x and
200 adjust CBAUD constant and drivers accordingly.
201#define B2500000 0x00001010
202#define B3000000 0x00001011
203#define B3500000 0x00001012
204#define B4000000 0x00001013 */
205#define CIBAUD 0x100f0000 /* input baud rate (not used) */
206#define CMSPAR 0x40000000 /* mark or space (stick) parity */
207#define CRTSCTS 0x80000000 /* flow control */
208
209#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
210
211/* c_lflag bits */
212#define ISIG 0x00000001
213#define ICANON 0x00000002
214#define XCASE 0x00000004
215#define ECHO 0x00000008
216#define ECHOE 0x00000010
217#define ECHOK 0x00000020
218#define ECHONL 0x00000040
219#define NOFLSH 0x00000080
220#define TOSTOP 0x00000100
221#define ECHOCTL 0x00000200
222#define ECHOPRT 0x00000400
223#define ECHOKE 0x00000800
224#define DEFECHO 0x00001000 /* SUNOS thing, what is it? */
225#define FLUSHO 0x00002000
226#define PENDIN 0x00004000
227#define IEXTEN 0x00008000
228#define EXTPROC 0x00010000
229
230/* modem lines */
231#define TIOCM_LE 0x001
232#define TIOCM_DTR 0x002
233#define TIOCM_RTS 0x004
234#define TIOCM_ST 0x008
235#define TIOCM_SR 0x010
236#define TIOCM_CTS 0x020
237#define TIOCM_CAR 0x040
238#define TIOCM_RNG 0x080
239#define TIOCM_DSR 0x100
240#define TIOCM_CD TIOCM_CAR
241#define TIOCM_RI TIOCM_RNG
242#define TIOCM_OUT1 0x2000
243#define TIOCM_OUT2 0x4000
244#define TIOCM_LOOP 0x8000
245
246/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
247#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
248
249
250/* tcflow() and TCXONC use these */
251#define TCOOFF 0
252#define TCOON 1
253#define TCIOFF 2
254#define TCION 3
255
256/* tcflush() and TCFLSH use these */
257#define TCIFLUSH 0
258#define TCOFLUSH 1
259#define TCIOFLUSH 2
260
261/* tcsetattr uses these */
262#define TCSANOW 0
263#define TCSADRAIN 1
264#define TCSAFLUSH 2
265
8#endif /* !(_SPARC_TERMBITS_H) */ 266#endif /* !(_SPARC_TERMBITS_H) */
diff --git a/arch/sparc/include/asm/termios.h b/arch/sparc/include/asm/termios.h
index 0c2414ddd52..e8ba9539964 100644
--- a/arch/sparc/include/asm/termios.h
+++ b/arch/sparc/include/asm/termios.h
@@ -1,8 +1,46 @@
1#ifndef _SPARC_TERMIOS_H 1#ifndef _SPARC_TERMIOS_H
2#define _SPARC_TERMIOS_H 2#define _SPARC_TERMIOS_H
3 3
4#include <uapi/asm/termios.h> 4#include <asm/ioctls.h>
5#include <asm/termbits.h>
5 6
7#if defined(__KERNEL__) || defined(__DEFINE_BSD_TERMIOS)
8struct sgttyb {
9 char sg_ispeed;
10 char sg_ospeed;
11 char sg_erase;
12 char sg_kill;
13 short sg_flags;
14};
15
16struct tchars {
17 char t_intrc;
18 char t_quitc;
19 char t_startc;
20 char t_stopc;
21 char t_eofc;
22 char t_brkc;
23};
24
25struct ltchars {
26 char t_suspc;
27 char t_dsuspc;
28 char t_rprntc;
29 char t_flushc;
30 char t_werasc;
31 char t_lnextc;
32};
33#endif /* __KERNEL__ */
34
35struct winsize {
36 unsigned short ws_row;
37 unsigned short ws_col;
38 unsigned short ws_xpixel;
39 unsigned short ws_ypixel;
40};
41
42#ifdef __KERNEL__
43#include <linux/module.h>
6 44
7/* 45/*
8 * c_cc characters in the termio structure. Oh, how I love being 46 * c_cc characters in the termio structure. Oh, how I love being
@@ -143,4 +181,6 @@
143 err; \ 181 err; \
144}) 182})
145 183
184#endif /* __KERNEL__ */
185
146#endif /* _SPARC_TERMIOS_H */ 186#endif /* _SPARC_TERMIOS_H */
diff --git a/arch/sparc/include/asm/thread_info_32.h b/arch/sparc/include/asm/thread_info_32.h
index 25849ae3e90..fa575323341 100644
--- a/arch/sparc/include/asm/thread_info_32.h
+++ b/arch/sparc/include/asm/thread_info_32.h
@@ -15,6 +15,7 @@
15 15
16#ifndef __ASSEMBLY__ 16#ifndef __ASSEMBLY__
17 17
18#include <asm/btfixup.h>
18#include <asm/ptrace.h> 19#include <asm/ptrace.h>
19#include <asm/page.h> 20#include <asm/page.h>
20 21
@@ -77,12 +78,24 @@ register struct thread_info *current_thread_info_reg asm("g6");
77/* 78/*
78 * thread information allocation 79 * thread information allocation
79 */ 80 */
80#define THREAD_SIZE_ORDER 1 81#define THREAD_INFO_ORDER 1
82
83#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
84
85BTFIXUPDEF_CALL(struct thread_info *, alloc_thread_info_node, int)
86#define alloc_thread_info_node(tsk, node) BTFIXUP_CALL(alloc_thread_info_node)(node)
87
88BTFIXUPDEF_CALL(void, free_thread_info, struct thread_info *)
89#define free_thread_info(ti) BTFIXUP_CALL(free_thread_info)(ti)
81 90
82#endif /* __ASSEMBLY__ */ 91#endif /* __ASSEMBLY__ */
83 92
84/* Size of kernel stack for each process */ 93/*
85#define THREAD_SIZE (2 * PAGE_SIZE) 94 * Size of kernel stack for each process.
95 * Observe the order of get_free_pages() in alloc_thread_info_node().
96 * The sun4 has 8K stack too, because it's short on memory, and 16K is a waste.
97 */
98#define THREAD_SIZE 8192
86 99
87/* 100/*
88 * Offsets in thread_info structure, used in assembly code 101 * Offsets in thread_info structure, used in assembly code
@@ -120,19 +133,21 @@ register struct thread_info *current_thread_info_reg asm("g6");
120#define TIF_POLLING_NRFLAG 9 /* true if poll_idle() is polling 133#define TIF_POLLING_NRFLAG 9 /* true if poll_idle() is polling
121 * TIF_NEED_RESCHED */ 134 * TIF_NEED_RESCHED */
122#define TIF_MEMDIE 10 /* is terminating due to OOM killer */ 135#define TIF_MEMDIE 10 /* is terminating due to OOM killer */
136#define TIF_FREEZE 11 /* is freezing for suspend */
123 137
124/* as above, but as bit values */ 138/* as above, but as bit values */
125#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 139#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
126#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) 140#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
127#define _TIF_SIGPENDING (1<<TIF_SIGPENDING) 141#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
128#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) 142#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
143#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
129#define _TIF_USEDFPU (1<<TIF_USEDFPU) 144#define _TIF_USEDFPU (1<<TIF_USEDFPU)
130#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 145#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
131 146
132#define _TIF_DO_NOTIFY_RESUME_MASK (_TIF_NOTIFY_RESUME | \ 147#define _TIF_DO_NOTIFY_RESUME_MASK (_TIF_NOTIFY_RESUME | \
133 _TIF_SIGPENDING) 148 _TIF_SIGPENDING | \
134 149 _TIF_RESTORE_SIGMASK)
135#define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG) 150#define _TIF_FREEZE (1<<TIF_FREEZE)
136 151
137#endif /* __KERNEL__ */ 152#endif /* __KERNEL__ */
138 153
diff --git a/arch/sparc/include/asm/thread_info_64.h b/arch/sparc/include/asm/thread_info_64.h
index 269bd92313d..60d86be1a53 100644
--- a/arch/sparc/include/asm/thread_info_64.h
+++ b/arch/sparc/include/asm/thread_info_64.h
@@ -14,12 +14,12 @@
14#define TI_FLAG_FAULT_CODE_SHIFT 56 14#define TI_FLAG_FAULT_CODE_SHIFT 56
15#define TI_FLAG_BYTE_WSTATE 1 15#define TI_FLAG_BYTE_WSTATE 1
16#define TI_FLAG_WSTATE_SHIFT 48 16#define TI_FLAG_WSTATE_SHIFT 48
17#define TI_FLAG_BYTE_NOERROR 2 17#define TI_FLAG_BYTE_CWP 2
18#define TI_FLAG_BYTE_NOERROR_SHIFT 40 18#define TI_FLAG_CWP_SHIFT 40
19#define TI_FLAG_BYTE_FPDEPTH 3 19#define TI_FLAG_BYTE_CURRENT_DS 3
20#define TI_FLAG_FPDEPTH_SHIFT 32 20#define TI_FLAG_CURRENT_DS_SHIFT 32
21#define TI_FLAG_BYTE_CWP 4 21#define TI_FLAG_BYTE_FPDEPTH 4
22#define TI_FLAG_CWP_SHIFT 24 22#define TI_FLAG_FPDEPTH_SHIFT 24
23#define TI_FLAG_BYTE_WSAVED 5 23#define TI_FLAG_BYTE_WSAVED 5
24#define TI_FLAG_WSAVED_SHIFT 16 24#define TI_FLAG_WSAVED_SHIFT 16
25 25
@@ -47,7 +47,7 @@ struct thread_info {
47 struct exec_domain *exec_domain; 47 struct exec_domain *exec_domain;
48 int preempt_count; /* 0 => preemptable, <0 => BUG */ 48 int preempt_count; /* 0 => preemptable, <0 => BUG */
49 __u8 new_child; 49 __u8 new_child;
50 __u8 current_ds; 50 __u8 syscall_noerror;
51 __u16 cpu; 51 __u16 cpu;
52 52
53 unsigned long *utraps; 53 unsigned long *utraps;
@@ -74,9 +74,9 @@ struct thread_info {
74#define TI_FAULT_CODE (TI_FLAGS + TI_FLAG_BYTE_FAULT_CODE) 74#define TI_FAULT_CODE (TI_FLAGS + TI_FLAG_BYTE_FAULT_CODE)
75#define TI_WSTATE (TI_FLAGS + TI_FLAG_BYTE_WSTATE) 75#define TI_WSTATE (TI_FLAGS + TI_FLAG_BYTE_WSTATE)
76#define TI_CWP (TI_FLAGS + TI_FLAG_BYTE_CWP) 76#define TI_CWP (TI_FLAGS + TI_FLAG_BYTE_CWP)
77#define TI_CURRENT_DS (TI_FLAGS + TI_FLAG_BYTE_CURRENT_DS)
77#define TI_FPDEPTH (TI_FLAGS + TI_FLAG_BYTE_FPDEPTH) 78#define TI_FPDEPTH (TI_FLAGS + TI_FLAG_BYTE_FPDEPTH)
78#define TI_WSAVED (TI_FLAGS + TI_FLAG_BYTE_WSAVED) 79#define TI_WSAVED (TI_FLAGS + TI_FLAG_BYTE_WSAVED)
79#define TI_SYS_NOERROR (TI_FLAGS + TI_FLAG_BYTE_NOERROR)
80#define TI_FPSAVED 0x00000010 80#define TI_FPSAVED 0x00000010
81#define TI_KSP 0x00000018 81#define TI_KSP 0x00000018
82#define TI_FAULT_ADDR 0x00000020 82#define TI_FAULT_ADDR 0x00000020
@@ -84,7 +84,7 @@ struct thread_info {
84#define TI_EXEC_DOMAIN 0x00000030 84#define TI_EXEC_DOMAIN 0x00000030
85#define TI_PRE_COUNT 0x00000038 85#define TI_PRE_COUNT 0x00000038
86#define TI_NEW_CHILD 0x0000003c 86#define TI_NEW_CHILD 0x0000003c
87#define TI_CURRENT_DS 0x0000003d 87#define TI_SYS_NOERROR 0x0000003d
88#define TI_CPU 0x0000003e 88#define TI_CPU 0x0000003e
89#define TI_UTRAPS 0x00000040 89#define TI_UTRAPS 0x00000040
90#define TI_REG_WINDOW 0x00000048 90#define TI_REG_WINDOW 0x00000048
@@ -121,7 +121,7 @@ struct thread_info {
121#define INIT_THREAD_INFO(tsk) \ 121#define INIT_THREAD_INFO(tsk) \
122{ \ 122{ \
123 .task = &tsk, \ 123 .task = &tsk, \
124 .current_ds = ASI_P, \ 124 .flags = ((unsigned long)ASI_P) << TI_FLAG_CURRENT_DS_SHIFT, \
125 .exec_domain = &default_exec_domain, \ 125 .exec_domain = &default_exec_domain, \
126 .preempt_count = INIT_PREEMPT_COUNT, \ 126 .preempt_count = INIT_PREEMPT_COUNT, \
127 .restart_block = { \ 127 .restart_block = { \
@@ -138,11 +138,32 @@ register struct thread_info *current_thread_info_reg asm("g6");
138 138
139/* thread information allocation */ 139/* thread information allocation */
140#if PAGE_SHIFT == 13 140#if PAGE_SHIFT == 13
141#define THREAD_SIZE_ORDER 1 141#define __THREAD_INFO_ORDER 1
142#else /* PAGE_SHIFT == 13 */ 142#else /* PAGE_SHIFT == 13 */
143#define THREAD_SIZE_ORDER 0 143#define __THREAD_INFO_ORDER 0
144#endif /* PAGE_SHIFT == 13 */ 144#endif /* PAGE_SHIFT == 13 */
145 145
146#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
147
148#ifdef CONFIG_DEBUG_STACK_USAGE
149#define THREAD_FLAGS (GFP_KERNEL | __GFP_ZERO)
150#else
151#define THREAD_FLAGS (GFP_KERNEL)
152#endif
153
154#define alloc_thread_info_node(tsk, node) \
155({ \
156 struct page *page = alloc_pages_node(node, THREAD_FLAGS, \
157 __THREAD_INFO_ORDER); \
158 struct thread_info *ret; \
159 \
160 ret = page ? page_address(page) : NULL; \
161 ret; \
162})
163
164#define free_thread_info(ti) \
165 free_pages((unsigned long)(ti),__THREAD_INFO_ORDER)
166
146#define __thread_flag_byte_ptr(ti) \ 167#define __thread_flag_byte_ptr(ti) \
147 ((unsigned char *)(&((ti)->flags))) 168 ((unsigned char *)(&((ti)->flags)))
148#define __cur_thread_flag_byte_ptr __thread_flag_byte_ptr(current_thread_info()) 169#define __cur_thread_flag_byte_ptr __thread_flag_byte_ptr(current_thread_info())
@@ -153,12 +174,13 @@ register struct thread_info *current_thread_info_reg asm("g6");
153#define set_thread_wstate(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSTATE] = (val)) 174#define set_thread_wstate(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSTATE] = (val))
154#define get_thread_cwp() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CWP]) 175#define get_thread_cwp() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CWP])
155#define set_thread_cwp(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CWP] = (val)) 176#define set_thread_cwp(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CWP] = (val))
156#define get_thread_noerror() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_NOERROR]) 177#define get_thread_current_ds() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CURRENT_DS])
157#define set_thread_noerror(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_NOERROR] = (val)) 178#define set_thread_current_ds(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CURRENT_DS] = (val))
158#define get_thread_fpdepth() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FPDEPTH]) 179#define get_thread_fpdepth() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FPDEPTH])
159#define set_thread_fpdepth(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FPDEPTH] = (val)) 180#define set_thread_fpdepth(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FPDEPTH] = (val))
160#define get_thread_wsaved() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED]) 181#define get_thread_wsaved() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED])
161#define set_thread_wsaved(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED] = (val)) 182#define set_thread_wsaved(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED] = (val))
183
162#endif /* !(__ASSEMBLY__) */ 184#endif /* !(__ASSEMBLY__) */
163 185
164/* 186/*
@@ -203,6 +225,7 @@ register struct thread_info *current_thread_info_reg asm("g6");
203/* flag bit 12 is available */ 225/* flag bit 12 is available */
204#define TIF_MEMDIE 13 /* is terminating due to OOM killer */ 226#define TIF_MEMDIE 13 /* is terminating due to OOM killer */
205#define TIF_POLLING_NRFLAG 14 227#define TIF_POLLING_NRFLAG 14
228#define TIF_FREEZE 15 /* is freezing for suspend */
206 229
207#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 230#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
208#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) 231#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
@@ -214,6 +237,7 @@ register struct thread_info *current_thread_info_reg asm("g6");
214#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT) 237#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
215#define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT) 238#define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT)
216#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 239#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
240#define _TIF_FREEZE (1<<TIF_FREEZE)
217 241
218#define _TIF_USER_WORK_MASK ((0xff << TI_FLAG_WSAVED_SHIFT) | \ 242#define _TIF_USER_WORK_MASK ((0xff << TI_FLAG_WSAVED_SHIFT) | \
219 _TIF_DO_NOTIFY_RESUME_MASK | \ 243 _TIF_DO_NOTIFY_RESUME_MASK | \
@@ -237,32 +261,8 @@ static inline void set_restore_sigmask(void)
237{ 261{
238 struct thread_info *ti = current_thread_info(); 262 struct thread_info *ti = current_thread_info();
239 ti->status |= TS_RESTORE_SIGMASK; 263 ti->status |= TS_RESTORE_SIGMASK;
240 WARN_ON(!test_bit(TIF_SIGPENDING, &ti->flags)); 264 set_bit(TIF_SIGPENDING, &ti->flags);
241}
242static inline void clear_restore_sigmask(void)
243{
244 current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
245} 265}
246static inline bool test_restore_sigmask(void)
247{
248 return current_thread_info()->status & TS_RESTORE_SIGMASK;
249}
250static inline bool test_and_clear_restore_sigmask(void)
251{
252 struct thread_info *ti = current_thread_info();
253 if (!(ti->status & TS_RESTORE_SIGMASK))
254 return false;
255 ti->status &= ~TS_RESTORE_SIGMASK;
256 return true;
257}
258
259#define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG)
260
261#define thread32_stack_is_64bit(__SP) (((__SP) & 0x1) != 0)
262#define test_thread_64bit_stack(__SP) \
263 ((test_thread_flag(TIF_32BIT) && !thread32_stack_is_64bit(__SP)) ? \
264 false : true)
265
266#endif /* !__ASSEMBLY__ */ 266#endif /* !__ASSEMBLY__ */
267 267
268#endif /* __KERNEL__ */ 268#endif /* __KERNEL__ */
diff --git a/arch/sparc/include/asm/timer_32.h b/arch/sparc/include/asm/timer_32.h
index 72f40a546de..2ec030ef381 100644
--- a/arch/sparc/include/asm/timer_32.h
+++ b/arch/sparc/include/asm/timer_32.h
@@ -8,37 +8,13 @@
8#ifndef _SPARC_TIMER_H 8#ifndef _SPARC_TIMER_H
9#define _SPARC_TIMER_H 9#define _SPARC_TIMER_H
10 10
11#include <linux/clocksource.h> 11#include <asm/system.h> /* For SUN4M_NCPUS */
12#include <linux/irqreturn.h> 12#include <asm/btfixup.h>
13
14#include <asm-generic/percpu.h>
15
16#include <asm/cpu_type.h> /* For SUN4M_NCPUS */
17
18#define SBUS_CLOCK_RATE 2000000 /* 2MHz */
19#define TIMER_VALUE_SHIFT 9
20#define TIMER_VALUE_MASK 0x3fffff
21#define TIMER_LIMIT_BIT (1 << 31) /* Bit 31 in Counter-Timer register */
22
23/* The counter timer register has the value offset by 9 bits.
24 * From sun4m manual:
25 * When a counter reaches the value in the corresponding limit register,
26 * the Limit bit is set and the counter is set to 500 nS (i.e. 0x00000200).
27 *
28 * To compensate for this add one to the value.
29 */
30static inline unsigned int timer_value(unsigned int value)
31{
32 return (value + 1) << TIMER_VALUE_SHIFT;
33}
34 13
35extern __volatile__ unsigned int *master_l10_counter; 14extern __volatile__ unsigned int *master_l10_counter;
36 15
37extern irqreturn_t notrace timer_interrupt(int dummy, void *dev_id); 16/* FIXME: Make do_[gs]ettimeofday btfixup calls */
38 17BTFIXUPDEF_CALL(int, bus_do_settimeofday, struct timespec *tv)
39#ifdef CONFIG_SMP 18#define bus_do_settimeofday(tv) BTFIXUP_CALL(bus_do_settimeofday)(tv)
40DECLARE_PER_CPU(struct clock_event_device, sparc32_clockevent);
41extern void register_percpu_ce(int cpu);
42#endif
43 19
44#endif /* !(_SPARC_TIMER_H) */ 20#endif /* !(_SPARC_TIMER_H) */
diff --git a/arch/sparc/include/asm/timer_64.h b/arch/sparc/include/asm/timer_64.h
index 01197d8215c..ef3c3682deb 100644
--- a/arch/sparc/include/asm/timer_64.h
+++ b/arch/sparc/include/asm/timer_64.h
@@ -24,7 +24,7 @@ struct sparc64_tick_ops {
24extern struct sparc64_tick_ops *tick_ops; 24extern struct sparc64_tick_ops *tick_ops;
25 25
26extern unsigned long sparc64_get_clock_tick(unsigned int cpu); 26extern unsigned long sparc64_get_clock_tick(unsigned int cpu);
27extern void setup_sparc64_timer(void); 27extern void __devinit setup_sparc64_timer(void);
28extern void __init time_init(void); 28extern void __init time_init(void);
29 29
30#endif /* _SPARC64_TIMER_H */ 30#endif /* _SPARC64_TIMER_H */
diff --git a/arch/sparc/include/asm/timex_32.h b/arch/sparc/include/asm/timex_32.h
index b6ccdb0d6f7..a254750e4c0 100644
--- a/arch/sparc/include/asm/timex_32.h
+++ b/arch/sparc/include/asm/timex_32.h
@@ -12,4 +12,5 @@
12typedef unsigned long cycles_t; 12typedef unsigned long cycles_t;
13#define get_cycles() (0) 13#define get_cycles() (0)
14 14
15extern u32 (*do_arch_gettimeoffset)(void);
15#endif 16#endif
diff --git a/arch/sparc/include/asm/tlbflush_32.h b/arch/sparc/include/asm/tlbflush_32.h
index a5c4142130f..fe0a71abc9b 100644
--- a/arch/sparc/include/asm/tlbflush_32.h
+++ b/arch/sparc/include/asm/tlbflush_32.h
@@ -1,16 +1,52 @@
1#ifndef _SPARC_TLBFLUSH_H 1#ifndef _SPARC_TLBFLUSH_H
2#define _SPARC_TLBFLUSH_H 2#define _SPARC_TLBFLUSH_H
3 3
4#include <asm/cachetlb_32.h> 4#include <linux/mm.h>
5 5// #include <asm/processor.h>
6#define flush_tlb_all() \ 6
7 sparc32_cachetlb_ops->tlb_all() 7/*
8#define flush_tlb_mm(mm) \ 8 * TLB flushing:
9 sparc32_cachetlb_ops->tlb_mm(mm) 9 *
10#define flush_tlb_range(vma, start, end) \ 10 * - flush_tlb() flushes the current mm struct TLBs XXX Exists?
11 sparc32_cachetlb_ops->tlb_range(vma, start, end) 11 * - flush_tlb_all() flushes all processes TLBs
12#define flush_tlb_page(vma, addr) \ 12 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
13 sparc32_cachetlb_ops->tlb_page(vma, addr) 13 * - flush_tlb_page(vma, vmaddr) flushes one page
14 * - flush_tlb_range(vma, start, end) flushes a range of pages
15 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
16 */
17
18#ifdef CONFIG_SMP
19
20BTFIXUPDEF_CALL(void, local_flush_tlb_all, void)
21BTFIXUPDEF_CALL(void, local_flush_tlb_mm, struct mm_struct *)
22BTFIXUPDEF_CALL(void, local_flush_tlb_range, struct vm_area_struct *, unsigned long, unsigned long)
23BTFIXUPDEF_CALL(void, local_flush_tlb_page, struct vm_area_struct *, unsigned long)
24
25#define local_flush_tlb_all() BTFIXUP_CALL(local_flush_tlb_all)()
26#define local_flush_tlb_mm(mm) BTFIXUP_CALL(local_flush_tlb_mm)(mm)
27#define local_flush_tlb_range(vma,start,end) BTFIXUP_CALL(local_flush_tlb_range)(vma,start,end)
28#define local_flush_tlb_page(vma,addr) BTFIXUP_CALL(local_flush_tlb_page)(vma,addr)
29
30extern void smp_flush_tlb_all(void);
31extern void smp_flush_tlb_mm(struct mm_struct *mm);
32extern void smp_flush_tlb_range(struct vm_area_struct *vma,
33 unsigned long start,
34 unsigned long end);
35extern void smp_flush_tlb_page(struct vm_area_struct *mm, unsigned long page);
36
37#endif /* CONFIG_SMP */
38
39BTFIXUPDEF_CALL(void, flush_tlb_all, void)
40BTFIXUPDEF_CALL(void, flush_tlb_mm, struct mm_struct *)
41BTFIXUPDEF_CALL(void, flush_tlb_range, struct vm_area_struct *, unsigned long, unsigned long)
42BTFIXUPDEF_CALL(void, flush_tlb_page, struct vm_area_struct *, unsigned long)
43
44#define flush_tlb_all() BTFIXUP_CALL(flush_tlb_all)()
45#define flush_tlb_mm(mm) BTFIXUP_CALL(flush_tlb_mm)(mm)
46#define flush_tlb_range(vma,start,end) BTFIXUP_CALL(flush_tlb_range)(vma,start,end)
47#define flush_tlb_page(vma,addr) BTFIXUP_CALL(flush_tlb_page)(vma,addr)
48
49// #define flush_tlb() flush_tlb_mm(current->active_mm) /* XXX Sure? */
14 50
15/* 51/*
16 * This is a kludge, until I know better. --zaitcev XXX 52 * This is a kludge, until I know better. --zaitcev XXX
diff --git a/arch/sparc/include/asm/topology_64.h b/arch/sparc/include/asm/topology_64.h
index 1754390a426..8b9c556d630 100644
--- a/arch/sparc/include/asm/topology_64.h
+++ b/arch/sparc/include/asm/topology_64.h
@@ -31,6 +31,25 @@ static inline int pcibus_to_node(struct pci_bus *pbus)
31 cpu_all_mask : \ 31 cpu_all_mask : \
32 cpumask_of_node(pcibus_to_node(bus))) 32 cpumask_of_node(pcibus_to_node(bus)))
33 33
34#define SD_NODE_INIT (struct sched_domain) { \
35 .min_interval = 8, \
36 .max_interval = 32, \
37 .busy_factor = 32, \
38 .imbalance_pct = 125, \
39 .cache_nice_tries = 2, \
40 .busy_idx = 3, \
41 .idle_idx = 2, \
42 .newidle_idx = 0, \
43 .wake_idx = 0, \
44 .forkexec_idx = 0, \
45 .flags = SD_LOAD_BALANCE \
46 | SD_BALANCE_FORK \
47 | SD_BALANCE_EXEC \
48 | SD_SERIALIZE, \
49 .last_balance = jiffies, \
50 .balance_interval = 1, \
51}
52
34#else /* CONFIG_NUMA */ 53#else /* CONFIG_NUMA */
35 54
36#include <asm-generic/topology.h> 55#include <asm-generic/topology.h>
diff --git a/arch/sparc/include/asm/traps.h b/arch/sparc/include/asm/traps.h
index 51abcb1f9b3..3aa62dde343 100644
--- a/arch/sparc/include/asm/traps.h
+++ b/arch/sparc/include/asm/traps.h
@@ -3,12 +3,14 @@
3 * 3 *
4 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) 4 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
5 */ 5 */
6
6#ifndef _SPARC_TRAPS_H 7#ifndef _SPARC_TRAPS_H
7#define _SPARC_TRAPS_H 8#define _SPARC_TRAPS_H
8 9
9#include <uapi/asm/traps.h> 10#define NUM_SPARC_TRAPS 255
10 11
11#ifndef __ASSEMBLY__ 12#ifndef __ASSEMBLY__
13#ifdef __KERNEL__
12/* This is for V8 compliant Sparc CPUS */ 14/* This is for V8 compliant Sparc CPUS */
13struct tt_entry { 15struct tt_entry {
14 unsigned long inst_one; 16 unsigned long inst_one;
@@ -20,5 +22,112 @@ struct tt_entry {
20/* We set this to _start in system setup. */ 22/* We set this to _start in system setup. */
21extern struct tt_entry *sparc_ttable; 23extern struct tt_entry *sparc_ttable;
22 24
25#endif /* (__KERNEL__) */
23#endif /* !(__ASSEMBLY__) */ 26#endif /* !(__ASSEMBLY__) */
27
28/* For patching the trap table at boot time, we need to know how to
29 * form various common Sparc instructions. Thus these macros...
30 */
31
32#define SPARC_MOV_CONST_L3(const) (0xa6102000 | (const&0xfff))
33
34/* The following assumes that the branch lies before the place we
35 * are branching to. This is the case for a trap vector...
36 * You have been warned.
37 */
38#define SPARC_BRANCH(dest_addr, inst_addr) \
39 (0x10800000 | (((dest_addr-inst_addr)>>2)&0x3fffff))
40
41#define SPARC_RD_PSR_L0 (0xa1480000)
42#define SPARC_RD_WIM_L3 (0xa7500000)
43#define SPARC_NOP (0x01000000)
44
45/* Various interesting trap levels. */
46/* First, hardware traps. */
47#define SP_TRAP_TFLT 0x1 /* Text fault */
48#define SP_TRAP_II 0x2 /* Illegal Instruction */
49#define SP_TRAP_PI 0x3 /* Privileged Instruction */
50#define SP_TRAP_FPD 0x4 /* Floating Point Disabled */
51#define SP_TRAP_WOVF 0x5 /* Window Overflow */
52#define SP_TRAP_WUNF 0x6 /* Window Underflow */
53#define SP_TRAP_MNA 0x7 /* Memory Address Unaligned */
54#define SP_TRAP_FPE 0x8 /* Floating Point Exception */
55#define SP_TRAP_DFLT 0x9 /* Data Fault */
56#define SP_TRAP_TOF 0xa /* Tag Overflow */
57#define SP_TRAP_WDOG 0xb /* Watchpoint Detected */
58#define SP_TRAP_IRQ1 0x11 /* IRQ level 1 */
59#define SP_TRAP_IRQ2 0x12 /* IRQ level 2 */
60#define SP_TRAP_IRQ3 0x13 /* IRQ level 3 */
61#define SP_TRAP_IRQ4 0x14 /* IRQ level 4 */
62#define SP_TRAP_IRQ5 0x15 /* IRQ level 5 */
63#define SP_TRAP_IRQ6 0x16 /* IRQ level 6 */
64#define SP_TRAP_IRQ7 0x17 /* IRQ level 7 */
65#define SP_TRAP_IRQ8 0x18 /* IRQ level 8 */
66#define SP_TRAP_IRQ9 0x19 /* IRQ level 9 */
67#define SP_TRAP_IRQ10 0x1a /* IRQ level 10 */
68#define SP_TRAP_IRQ11 0x1b /* IRQ level 11 */
69#define SP_TRAP_IRQ12 0x1c /* IRQ level 12 */
70#define SP_TRAP_IRQ13 0x1d /* IRQ level 13 */
71#define SP_TRAP_IRQ14 0x1e /* IRQ level 14 */
72#define SP_TRAP_IRQ15 0x1f /* IRQ level 15 Non-maskable */
73#define SP_TRAP_RACC 0x20 /* Register Access Error ??? */
74#define SP_TRAP_IACC 0x21 /* Instruction Access Error */
75#define SP_TRAP_CPDIS 0x24 /* Co-Processor Disabled */
76#define SP_TRAP_BADFL 0x25 /* Unimplemented Flush Instruction */
77#define SP_TRAP_CPEXP 0x28 /* Co-Processor Exception */
78#define SP_TRAP_DACC 0x29 /* Data Access Error */
79#define SP_TRAP_DIVZ 0x2a /* Divide By Zero */
80#define SP_TRAP_DSTORE 0x2b /* Data Store Error ??? */
81#define SP_TRAP_DMM 0x2c /* Data Access MMU Miss ??? */
82#define SP_TRAP_IMM 0x3c /* Instruction Access MMU Miss ??? */
83
84/* Now the Software Traps... */
85#define SP_TRAP_SUNOS 0x80 /* SunOS System Call */
86#define SP_TRAP_SBPT 0x81 /* Software Breakpoint */
87#define SP_TRAP_SDIVZ 0x82 /* Software Divide-by-Zero trap */
88#define SP_TRAP_FWIN 0x83 /* Flush Windows */
89#define SP_TRAP_CWIN 0x84 /* Clean Windows */
90#define SP_TRAP_RCHK 0x85 /* Range Check */
91#define SP_TRAP_FUNA 0x86 /* Fix Unaligned Access */
92#define SP_TRAP_IOWFL 0x87 /* Integer Overflow */
93#define SP_TRAP_SOLARIS 0x88 /* Solaris System Call */
94#define SP_TRAP_NETBSD 0x89 /* NetBSD System Call */
95#define SP_TRAP_LINUX 0x90 /* Linux System Call */
96
97/* Names used for compatibility with SunOS */
98#define ST_SYSCALL 0x00
99#define ST_BREAKPOINT 0x01
100#define ST_DIV0 0x02
101#define ST_FLUSH_WINDOWS 0x03
102#define ST_CLEAN_WINDOWS 0x04
103#define ST_RANGE_CHECK 0x05
104#define ST_FIX_ALIGN 0x06
105#define ST_INT_OVERFLOW 0x07
106
107/* Special traps... */
108#define SP_TRAP_KBPT1 0xfe /* KADB/PROM Breakpoint one */
109#define SP_TRAP_KBPT2 0xff /* KADB/PROM Breakpoint two */
110
111/* Handy Macros */
112/* Is this a trap we never expect to get? */
113#define BAD_TRAP_P(level) \
114 ((level > SP_TRAP_WDOG && level < SP_TRAP_IRQ1) || \
115 (level > SP_TRAP_IACC && level < SP_TRAP_CPDIS) || \
116 (level > SP_TRAP_BADFL && level < SP_TRAP_CPEXP) || \
117 (level > SP_TRAP_DMM && level < SP_TRAP_IMM) || \
118 (level > SP_TRAP_IMM && level < SP_TRAP_SUNOS) || \
119 (level > SP_TRAP_LINUX && level < SP_TRAP_KBPT1))
120
121/* Is this a Hardware trap? */
122#define HW_TRAP_P(level) ((level > 0) && (level < SP_TRAP_SUNOS))
123
124/* Is this a Software trap? */
125#define SW_TRAP_P(level) ((level >= SP_TRAP_SUNOS) && (level <= SP_TRAP_KBPT2))
126
127/* Is this a system call for some OS we know about? */
128#define SCALL_TRAP_P(level) ((level == SP_TRAP_SUNOS) || \
129 (level == SP_TRAP_SOLARIS) || \
130 (level == SP_TRAP_NETBSD) || \
131 (level == SP_TRAP_LINUX))
132
24#endif /* !(_SPARC_TRAPS_H) */ 133#endif /* !(_SPARC_TRAPS_H) */
diff --git a/arch/sparc/include/asm/tsb.h b/arch/sparc/include/asm/tsb.h
index b4c258de444..1a8afd1ad04 100644
--- a/arch/sparc/include/asm/tsb.h
+++ b/arch/sparc/include/asm/tsb.h
@@ -147,96 +147,20 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end;
147 brz,pn REG1, FAIL_LABEL; \ 147 brz,pn REG1, FAIL_LABEL; \
148 sllx VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \ 148 sllx VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \
149 srlx REG2, 64 - PAGE_SHIFT, REG2; \ 149 srlx REG2, 64 - PAGE_SHIFT, REG2; \
150 sllx REG1, PGD_PADDR_SHIFT, REG1; \ 150 sllx REG1, 11, REG1; \
151 andn REG2, 0x3, REG2; \ 151 andn REG2, 0x3, REG2; \
152 lduwa [REG1 + REG2] ASI_PHYS_USE_EC, REG1; \ 152 lduwa [REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
153 brz,pn REG1, FAIL_LABEL; \ 153 brz,pn REG1, FAIL_LABEL; \
154 sllx VADDR, 64 - PMD_SHIFT, REG2; \ 154 sllx VADDR, 64 - PMD_SHIFT, REG2; \
155 srlx REG2, 64 - (PAGE_SHIFT - 1), REG2; \ 155 srlx REG2, 64 - PAGE_SHIFT, REG2; \
156 sllx REG1, PMD_PADDR_SHIFT, REG1; \ 156 sllx REG1, 11, REG1; \
157 andn REG2, 0x7, REG2; \ 157 andn REG2, 0x7, REG2; \
158 add REG1, REG2, REG1; 158 add REG1, REG2, REG1;
159 159
160 /* This macro exists only to make the PMD translator below easier 160 /* Do a user page table walk in MMU globals. Leaves physical PTE
161 * to read. It hides the ELF section switch for the sun4v code 161 * pointer in REG1. Jumps to FAIL_LABEL on early page table walk
162 * patching. 162 * termination. Physical base of page tables is in PHYS_PGD which
163 */ 163 * will not be modified.
164#define OR_PTE_BIT(REG, NAME) \
165661: or REG, _PAGE_##NAME##_4U, REG; \
166 .section .sun4v_1insn_patch, "ax"; \
167 .word 661b; \
168 or REG, _PAGE_##NAME##_4V, REG; \
169 .previous;
170
171 /* Load into REG the PTE value for VALID, CACHE, and SZHUGE. */
172#define BUILD_PTE_VALID_SZHUGE_CACHE(REG) \
173661: sethi %uhi(_PAGE_VALID|_PAGE_SZHUGE_4U), REG; \
174 .section .sun4v_1insn_patch, "ax"; \
175 .word 661b; \
176 sethi %uhi(_PAGE_VALID), REG; \
177 .previous; \
178 sllx REG, 32, REG; \
179661: or REG, _PAGE_CP_4U|_PAGE_CV_4U, REG; \
180 .section .sun4v_1insn_patch, "ax"; \
181 .word 661b; \
182 or REG, _PAGE_CP_4V|_PAGE_CV_4V|_PAGE_SZHUGE_4V, REG; \
183 .previous;
184
185 /* PMD has been loaded into REG1, interpret the value, seeing
186 * if it is a HUGE PMD or a normal one. If it is not valid
187 * then jump to FAIL_LABEL. If it is a HUGE PMD, and it
188 * translates to a valid PTE, branch to PTE_LABEL.
189 *
190 * We translate the PMD by hand, one bit at a time,
191 * constructing the huge PTE.
192 *
193 * So we construct the PTE in REG2 as follows:
194 *
195 * 1) Extract the PMD PFN from REG1 and place it into REG2.
196 *
197 * 2) Translate PMD protection bits in REG1 into REG2, one bit
198 * at a time using andcc tests on REG1 and OR's into REG2.
199 *
200 * Only two bits to be concerned with here, EXEC and WRITE.
201 * Now REG1 is freed up and we can use it as a temporary.
202 *
203 * 3) Construct the VALID, CACHE, and page size PTE bits in
204 * REG1, OR with REG2 to form final PTE.
205 */
206#ifdef CONFIG_TRANSPARENT_HUGEPAGE
207#define USER_PGTABLE_CHECK_PMD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \
208 brz,pn REG1, FAIL_LABEL; \
209 andcc REG1, PMD_ISHUGE, %g0; \
210 be,pt %xcc, 700f; \
211 and REG1, PMD_HUGE_PRESENT|PMD_HUGE_ACCESSED, REG2; \
212 cmp REG2, PMD_HUGE_PRESENT|PMD_HUGE_ACCESSED; \
213 bne,pn %xcc, FAIL_LABEL; \
214 andn REG1, PMD_HUGE_PROTBITS, REG2; \
215 sllx REG2, PMD_PADDR_SHIFT, REG2; \
216 /* REG2 now holds PFN << PAGE_SHIFT */ \
217 andcc REG1, PMD_HUGE_EXEC, %g0; \
218 bne,a,pt %xcc, 1f; \
219 OR_PTE_BIT(REG2, EXEC); \
2201: andcc REG1, PMD_HUGE_WRITE, %g0; \
221 bne,a,pt %xcc, 1f; \
222 OR_PTE_BIT(REG2, W); \
223 /* REG1 can now be clobbered, build final PTE */ \
2241: BUILD_PTE_VALID_SZHUGE_CACHE(REG1); \
225 ba,pt %xcc, PTE_LABEL; \
226 or REG1, REG2, REG1; \
227700:
228#else
229#define USER_PGTABLE_CHECK_PMD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \
230 brz,pn REG1, FAIL_LABEL; \
231 nop;
232#endif
233
234 /* Do a user page table walk in MMU globals. Leaves final,
235 * valid, PTE value in REG1. Jumps to FAIL_LABEL on early
236 * page table walk termination or if the PTE is not valid.
237 *
238 * Physical base of page tables is in PHYS_PGD which will not
239 * be modified.
240 * 164 *
241 * VADDR will not be clobbered, but REG1 and REG2 will. 165 * VADDR will not be clobbered, but REG1 and REG2 will.
242 */ 166 */
@@ -248,19 +172,15 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end;
248 brz,pn REG1, FAIL_LABEL; \ 172 brz,pn REG1, FAIL_LABEL; \
249 sllx VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \ 173 sllx VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \
250 srlx REG2, 64 - PAGE_SHIFT, REG2; \ 174 srlx REG2, 64 - PAGE_SHIFT, REG2; \
251 sllx REG1, PGD_PADDR_SHIFT, REG1; \ 175 sllx REG1, 11, REG1; \
252 andn REG2, 0x3, REG2; \ 176 andn REG2, 0x3, REG2; \
253 lduwa [REG1 + REG2] ASI_PHYS_USE_EC, REG1; \ 177 lduwa [REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
254 USER_PGTABLE_CHECK_PMD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, 800f) \ 178 brz,pn REG1, FAIL_LABEL; \
255 sllx VADDR, 64 - PMD_SHIFT, REG2; \ 179 sllx VADDR, 64 - PMD_SHIFT, REG2; \
256 srlx REG2, 64 - (PAGE_SHIFT - 1), REG2; \ 180 srlx REG2, 64 - PAGE_SHIFT, REG2; \
257 sllx REG1, PMD_PADDR_SHIFT, REG1; \ 181 sllx REG1, 11, REG1; \
258 andn REG2, 0x7, REG2; \ 182 andn REG2, 0x7, REG2; \
259 add REG1, REG2, REG1; \ 183 add REG1, REG2, REG1;
260 ldxa [REG1] ASI_PHYS_USE_EC, REG1; \
261 brgez,pn REG1, FAIL_LABEL; \
262 nop; \
263800:
264 184
265/* Lookup a OBP mapping on VADDR in the prom_trans[] table at TL>0. 185/* Lookup a OBP mapping on VADDR in the prom_trans[] table at TL>0.
266 * If no entry is found, FAIL_LABEL will be branched to. On success 186 * If no entry is found, FAIL_LABEL will be branched to. On success
diff --git a/arch/sparc/include/asm/ttable.h b/arch/sparc/include/asm/ttable.h
index 71b5a67522a..48f2807d326 100644
--- a/arch/sparc/include/asm/ttable.h
+++ b/arch/sparc/include/asm/ttable.h
@@ -372,9 +372,7 @@ etrap_spill_fixup_64bit: \
372 372
373/* Normal 32bit spill */ 373/* Normal 32bit spill */
374#define SPILL_2_GENERIC(ASI) \ 374#define SPILL_2_GENERIC(ASI) \
375 and %sp, 1, %g3; \ 375 srl %sp, 0, %sp; \
376 brnz,pn %g3, (. - (128 + 4)); \
377 srl %sp, 0, %sp; \
378 stwa %l0, [%sp + %g0] ASI; \ 376 stwa %l0, [%sp + %g0] ASI; \
379 mov 0x04, %g3; \ 377 mov 0x04, %g3; \
380 stwa %l1, [%sp + %g3] ASI; \ 378 stwa %l1, [%sp + %g3] ASI; \
@@ -400,16 +398,14 @@ etrap_spill_fixup_64bit: \
400 stwa %i6, [%g1 + %g0] ASI; \ 398 stwa %i6, [%g1 + %g0] ASI; \
401 stwa %i7, [%g1 + %g3] ASI; \ 399 stwa %i7, [%g1 + %g3] ASI; \
402 saved; \ 400 saved; \
403 retry; \ 401 retry; nop; nop; \
404 b,a,pt %xcc, spill_fixup_dax; \ 402 b,a,pt %xcc, spill_fixup_dax; \
405 b,a,pt %xcc, spill_fixup_mna; \ 403 b,a,pt %xcc, spill_fixup_mna; \
406 b,a,pt %xcc, spill_fixup; 404 b,a,pt %xcc, spill_fixup;
407 405
408#define SPILL_2_GENERIC_ETRAP \ 406#define SPILL_2_GENERIC_ETRAP \
409etrap_user_spill_32bit: \ 407etrap_user_spill_32bit: \
410 and %sp, 1, %g3; \ 408 srl %sp, 0, %sp; \
411 brnz,pn %g3, etrap_user_spill_64bit; \
412 srl %sp, 0, %sp; \
413 stwa %l0, [%sp + 0x00] %asi; \ 409 stwa %l0, [%sp + 0x00] %asi; \
414 stwa %l1, [%sp + 0x04] %asi; \ 410 stwa %l1, [%sp + 0x04] %asi; \
415 stwa %l2, [%sp + 0x08] %asi; \ 411 stwa %l2, [%sp + 0x08] %asi; \
@@ -431,7 +427,7 @@ etrap_user_spill_32bit: \
431 ba,pt %xcc, etrap_save; \ 427 ba,pt %xcc, etrap_save; \
432 wrpr %g1, %cwp; \ 428 wrpr %g1, %cwp; \
433 nop; nop; nop; nop; \ 429 nop; nop; nop; nop; \
434 nop; nop; \ 430 nop; nop; nop; nop; \
435 ba,a,pt %xcc, etrap_spill_fixup_32bit; \ 431 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
436 ba,a,pt %xcc, etrap_spill_fixup_32bit; \ 432 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
437 ba,a,pt %xcc, etrap_spill_fixup_32bit; 433 ba,a,pt %xcc, etrap_spill_fixup_32bit;
@@ -596,9 +592,7 @@ user_rtt_fill_64bit: \
596 592
597/* Normal 32bit fill */ 593/* Normal 32bit fill */
598#define FILL_2_GENERIC(ASI) \ 594#define FILL_2_GENERIC(ASI) \
599 and %sp, 1, %g3; \ 595 srl %sp, 0, %sp; \
600 brnz,pn %g3, (. - (128 + 4)); \
601 srl %sp, 0, %sp; \
602 lduwa [%sp + %g0] ASI, %l0; \ 596 lduwa [%sp + %g0] ASI, %l0; \
603 mov 0x04, %g2; \ 597 mov 0x04, %g2; \
604 mov 0x08, %g3; \ 598 mov 0x08, %g3; \
@@ -622,16 +616,14 @@ user_rtt_fill_64bit: \
622 lduwa [%g1 + %g3] ASI, %i6; \ 616 lduwa [%g1 + %g3] ASI, %i6; \
623 lduwa [%g1 + %g5] ASI, %i7; \ 617 lduwa [%g1 + %g5] ASI, %i7; \
624 restored; \ 618 restored; \
625 retry; nop; nop; \ 619 retry; nop; nop; nop; nop; \
626 b,a,pt %xcc, fill_fixup_dax; \ 620 b,a,pt %xcc, fill_fixup_dax; \
627 b,a,pt %xcc, fill_fixup_mna; \ 621 b,a,pt %xcc, fill_fixup_mna; \
628 b,a,pt %xcc, fill_fixup; 622 b,a,pt %xcc, fill_fixup;
629 623
630#define FILL_2_GENERIC_RTRAP \ 624#define FILL_2_GENERIC_RTRAP \
631user_rtt_fill_32bit: \ 625user_rtt_fill_32bit: \
632 and %sp, 1, %g3; \ 626 srl %sp, 0, %sp; \
633 brnz,pn %g3, user_rtt_fill_64bit; \
634 srl %sp, 0, %sp; \
635 lduwa [%sp + 0x00] %asi, %l0; \ 627 lduwa [%sp + 0x00] %asi, %l0; \
636 lduwa [%sp + 0x04] %asi, %l1; \ 628 lduwa [%sp + 0x04] %asi, %l1; \
637 lduwa [%sp + 0x08] %asi, %l2; \ 629 lduwa [%sp + 0x08] %asi, %l2; \
@@ -651,7 +643,7 @@ user_rtt_fill_32bit: \
651 ba,pt %xcc, user_rtt_pre_restore; \ 643 ba,pt %xcc, user_rtt_pre_restore; \
652 restored; \ 644 restored; \
653 nop; nop; nop; nop; nop; \ 645 nop; nop; nop; nop; nop; \
654 nop; nop; nop; \ 646 nop; nop; nop; nop; nop; \
655 ba,a,pt %xcc, user_rtt_fill_fixup; \ 647 ba,a,pt %xcc, user_rtt_fill_fixup; \
656 ba,a,pt %xcc, user_rtt_fill_fixup; \ 648 ba,a,pt %xcc, user_rtt_fill_fixup; \
657 ba,a,pt %xcc, user_rtt_fill_fixup; 649 ba,a,pt %xcc, user_rtt_fill_fixup;
diff --git a/arch/sparc/include/asm/uaccess.h b/arch/sparc/include/asm/uaccess.h
index 0167d26d0d1..e88fbe5c045 100644
--- a/arch/sparc/include/asm/uaccess.h
+++ b/arch/sparc/include/asm/uaccess.h
@@ -5,10 +5,4 @@
5#else 5#else
6#include <asm/uaccess_32.h> 6#include <asm/uaccess_32.h>
7#endif 7#endif
8
9#define user_addr_max() \
10 (segment_eq(get_fs(), USER_DS) ? TASK_SIZE : ~0UL)
11
12extern long strncpy_from_user(char *dest, const char __user *src, long count);
13
14#endif 8#endif
diff --git a/arch/sparc/include/asm/uaccess_32.h b/arch/sparc/include/asm/uaccess_32.h
index 53a28dd59f5..8303ac48103 100644
--- a/arch/sparc/include/asm/uaccess_32.h
+++ b/arch/sparc/include/asm/uaccess_32.h
@@ -12,12 +12,11 @@
12#include <linux/sched.h> 12#include <linux/sched.h>
13#include <linux/string.h> 13#include <linux/string.h>
14#include <linux/errno.h> 14#include <linux/errno.h>
15#include <asm/vac-ops.h>
15#endif 16#endif
16 17
17#ifndef __ASSEMBLY__ 18#ifndef __ASSEMBLY__
18 19
19#include <asm/processor.h>
20
21#define ARCH_HAS_SORT_EXTABLE 20#define ARCH_HAS_SORT_EXTABLE
22#define ARCH_HAS_SEARCH_EXTABLE 21#define ARCH_HAS_SEARCH_EXTABLE
23 22
@@ -306,8 +305,34 @@ static inline unsigned long clear_user(void __user *addr, unsigned long n)
306 return n; 305 return n;
307} 306}
308 307
309extern __must_check long strlen_user(const char __user *str); 308extern long __strncpy_from_user(char *dest, const char __user *src, long count);
310extern __must_check long strnlen_user(const char __user *str, long n); 309
310static inline long strncpy_from_user(char *dest, const char __user *src, long count)
311{
312 if (__access_ok((unsigned long) src, count))
313 return __strncpy_from_user(dest, src, count);
314 else
315 return -EFAULT;
316}
317
318extern long __strlen_user(const char __user *);
319extern long __strnlen_user(const char __user *, long len);
320
321static inline long strlen_user(const char __user *str)
322{
323 if (!access_ok(VERIFY_READ, str, 0))
324 return 0;
325 else
326 return __strlen_user(str);
327}
328
329static inline long strnlen_user(const char __user *str, long len)
330{
331 if (!access_ok(VERIFY_READ, str, 0))
332 return 0;
333 else
334 return __strnlen_user(str, len);
335}
311 336
312#endif /* __ASSEMBLY__ */ 337#endif /* __ASSEMBLY__ */
313 338
diff --git a/arch/sparc/include/asm/uaccess_64.h b/arch/sparc/include/asm/uaccess_64.h
index e562d3caee5..3e1449f0779 100644
--- a/arch/sparc/include/asm/uaccess_64.h
+++ b/arch/sparc/include/asm/uaccess_64.h
@@ -11,14 +11,13 @@
11#include <linux/string.h> 11#include <linux/string.h>
12#include <linux/thread_info.h> 12#include <linux/thread_info.h>
13#include <asm/asi.h> 13#include <asm/asi.h>
14#include <asm/system.h>
14#include <asm/spitfire.h> 15#include <asm/spitfire.h>
15#include <asm-generic/uaccess-unaligned.h> 16#include <asm-generic/uaccess-unaligned.h>
16#endif 17#endif
17 18
18#ifndef __ASSEMBLY__ 19#ifndef __ASSEMBLY__
19 20
20#include <asm/processor.h>
21
22/* 21/*
23 * Sparc64 is segmented, though more like the M68K than the I386. 22 * Sparc64 is segmented, though more like the M68K than the I386.
24 * We use the secondary ASI to address user memory, which references a 23 * We use the secondary ASI to address user memory, which references a
@@ -38,14 +37,14 @@
38#define VERIFY_READ 0 37#define VERIFY_READ 0
39#define VERIFY_WRITE 1 38#define VERIFY_WRITE 1
40 39
41#define get_fs() ((mm_segment_t){(current_thread_info()->current_ds)}) 40#define get_fs() ((mm_segment_t) { get_thread_current_ds() })
42#define get_ds() (KERNEL_DS) 41#define get_ds() (KERNEL_DS)
43 42
44#define segment_eq(a,b) ((a).seg == (b).seg) 43#define segment_eq(a,b) ((a).seg == (b).seg)
45 44
46#define set_fs(val) \ 45#define set_fs(val) \
47do { \ 46do { \
48 current_thread_info()->current_ds =(val).seg; \ 47 set_thread_current_ds((val).seg); \
49 __asm__ __volatile__ ("wr %%g0, %0, %%asi" : : "r" ((val).seg)); \ 48 __asm__ __volatile__ ("wr %%g0, %0, %%asi" : : "r" ((val).seg)); \
50} while(0) 49} while(0)
51 50
@@ -259,17 +258,18 @@ extern unsigned long __must_check __clear_user(void __user *, unsigned long);
259 258
260#define clear_user __clear_user 259#define clear_user __clear_user
261 260
262extern __must_check long strlen_user(const char __user *str); 261extern long __must_check __strncpy_from_user(char *dest, const char __user *src, long count);
263extern __must_check long strnlen_user(const char __user *str, long n); 262
263#define strncpy_from_user __strncpy_from_user
264 264
265extern long __strlen_user(const char __user *);
266extern long __strnlen_user(const char __user *, long len);
267
268#define strlen_user __strlen_user
269#define strnlen_user __strnlen_user
265#define __copy_to_user_inatomic ___copy_to_user 270#define __copy_to_user_inatomic ___copy_to_user
266#define __copy_from_user_inatomic ___copy_from_user 271#define __copy_from_user_inatomic ___copy_from_user
267 272
268struct pt_regs;
269extern unsigned long compute_effective_address(struct pt_regs *,
270 unsigned int insn,
271 unsigned int rd);
272
273#endif /* __ASSEMBLY__ */ 273#endif /* __ASSEMBLY__ */
274 274
275#endif /* _ASM_UACCESS_H */ 275#endif /* _ASM_UACCESS_H */
diff --git a/arch/sparc/include/asm/unistd.h b/arch/sparc/include/asm/unistd.h
index 87ce24c5eb9..6260d5deeab 100644
--- a/arch/sparc/include/asm/unistd.h
+++ b/arch/sparc/include/asm/unistd.h
@@ -1,3 +1,6 @@
1#ifndef _SPARC_UNISTD_H
2#define _SPARC_UNISTD_H
3
1/* 4/*
2 * System calls under the Sparc. 5 * System calls under the Sparc.
3 * 6 *
@@ -11,15 +14,414 @@
11 * 14 *
12 * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu) 15 * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu)
13 */ 16 */
14#ifndef _SPARC_UNISTD_H 17#ifndef __32bit_syscall_numbers__
15#define _SPARC_UNISTD_H 18#ifndef __arch64__
16 19#define __32bit_syscall_numbers__
17#include <uapi/asm/unistd.h> 20#endif
21#endif
18 22
23#define __NR_restart_syscall 0 /* Linux Specific */
24#define __NR_exit 1 /* Common */
25#define __NR_fork 2 /* Common */
26#define __NR_read 3 /* Common */
27#define __NR_write 4 /* Common */
28#define __NR_open 5 /* Common */
29#define __NR_close 6 /* Common */
30#define __NR_wait4 7 /* Common */
31#define __NR_creat 8 /* Common */
32#define __NR_link 9 /* Common */
33#define __NR_unlink 10 /* Common */
34#define __NR_execv 11 /* SunOS Specific */
35#define __NR_chdir 12 /* Common */
36#define __NR_chown 13 /* Common */
37#define __NR_mknod 14 /* Common */
38#define __NR_chmod 15 /* Common */
39#define __NR_lchown 16 /* Common */
40#define __NR_brk 17 /* Common */
41#define __NR_perfctr 18 /* Performance counter operations */
42#define __NR_lseek 19 /* Common */
43#define __NR_getpid 20 /* Common */
44#define __NR_capget 21 /* Linux Specific */
45#define __NR_capset 22 /* Linux Specific */
46#define __NR_setuid 23 /* Implemented via setreuid in SunOS */
47#define __NR_getuid 24 /* Common */
48#define __NR_vmsplice 25 /* ENOSYS under SunOS */
49#define __NR_ptrace 26 /* Common */
50#define __NR_alarm 27 /* Implemented via setitimer in SunOS */
51#define __NR_sigaltstack 28 /* Common */
52#define __NR_pause 29 /* Is sigblock(0)->sigpause() in SunOS */
53#define __NR_utime 30 /* Implemented via utimes() under SunOS */
54#ifdef __32bit_syscall_numbers__
55#define __NR_lchown32 31 /* Linux sparc32 specific */
56#define __NR_fchown32 32 /* Linux sparc32 specific */
57#endif
58#define __NR_access 33 /* Common */
59#define __NR_nice 34 /* Implemented via get/setpriority() in SunOS */
60#ifdef __32bit_syscall_numbers__
61#define __NR_chown32 35 /* Linux sparc32 specific */
62#endif
63#define __NR_sync 36 /* Common */
64#define __NR_kill 37 /* Common */
65#define __NR_stat 38 /* Common */
66#define __NR_sendfile 39 /* Linux Specific */
67#define __NR_lstat 40 /* Common */
68#define __NR_dup 41 /* Common */
69#define __NR_pipe 42 /* Common */
70#define __NR_times 43 /* Implemented via getrusage() in SunOS */
71#ifdef __32bit_syscall_numbers__
72#define __NR_getuid32 44 /* Linux sparc32 specific */
73#endif
74#define __NR_umount2 45 /* Linux Specific */
75#define __NR_setgid 46 /* Implemented via setregid() in SunOS */
76#define __NR_getgid 47 /* Common */
77#define __NR_signal 48 /* Implemented via sigvec() in SunOS */
78#define __NR_geteuid 49 /* SunOS calls getuid() */
79#define __NR_getegid 50 /* SunOS calls getgid() */
80#define __NR_acct 51 /* Common */
81#ifdef __32bit_syscall_numbers__
82#define __NR_getgid32 53 /* Linux sparc32 specific */
83#else
84#define __NR_memory_ordering 52 /* Linux Specific */
85#endif
86#define __NR_ioctl 54 /* Common */
87#define __NR_reboot 55 /* Common */
88#ifdef __32bit_syscall_numbers__
89#define __NR_mmap2 56 /* Linux sparc32 Specific */
90#endif
91#define __NR_symlink 57 /* Common */
92#define __NR_readlink 58 /* Common */
93#define __NR_execve 59 /* Common */
94#define __NR_umask 60 /* Common */
95#define __NR_chroot 61 /* Common */
96#define __NR_fstat 62 /* Common */
97#define __NR_fstat64 63 /* Linux Specific */
98#define __NR_getpagesize 64 /* Common */
99#define __NR_msync 65 /* Common in newer 1.3.x revs... */
100#define __NR_vfork 66 /* Common */
101#define __NR_pread64 67 /* Linux Specific */
102#define __NR_pwrite64 68 /* Linux Specific */
103#ifdef __32bit_syscall_numbers__
104#define __NR_geteuid32 69 /* Linux sparc32, sbrk under SunOS */
105#define __NR_getegid32 70 /* Linux sparc32, sstk under SunOS */
106#endif
107#define __NR_mmap 71 /* Common */
108#ifdef __32bit_syscall_numbers__
109#define __NR_setreuid32 72 /* Linux sparc32, vadvise under SunOS */
110#endif
111#define __NR_munmap 73 /* Common */
112#define __NR_mprotect 74 /* Common */
113#define __NR_madvise 75 /* Common */
114#define __NR_vhangup 76 /* Common */
115#ifdef __32bit_syscall_numbers__
116#define __NR_truncate64 77 /* Linux sparc32 Specific */
117#endif
118#define __NR_mincore 78 /* Common */
119#define __NR_getgroups 79 /* Common */
120#define __NR_setgroups 80 /* Common */
121#define __NR_getpgrp 81 /* Common */
122#ifdef __32bit_syscall_numbers__
123#define __NR_setgroups32 82 /* Linux sparc32, setpgrp under SunOS */
124#endif
125#define __NR_setitimer 83 /* Common */
126#ifdef __32bit_syscall_numbers__
127#define __NR_ftruncate64 84 /* Linux sparc32 Specific */
128#endif
129#define __NR_swapon 85 /* Common */
130#define __NR_getitimer 86 /* Common */
131#ifdef __32bit_syscall_numbers__
132#define __NR_setuid32 87 /* Linux sparc32, gethostname under SunOS */
133#endif
134#define __NR_sethostname 88 /* Common */
135#ifdef __32bit_syscall_numbers__
136#define __NR_setgid32 89 /* Linux sparc32, getdtablesize under SunOS */
137#endif
138#define __NR_dup2 90 /* Common */
139#ifdef __32bit_syscall_numbers__
140#define __NR_setfsuid32 91 /* Linux sparc32, getdopt under SunOS */
141#endif
142#define __NR_fcntl 92 /* Common */
143#define __NR_select 93 /* Common */
144#ifdef __32bit_syscall_numbers__
145#define __NR_setfsgid32 94 /* Linux sparc32, setdopt under SunOS */
146#endif
147#define __NR_fsync 95 /* Common */
148#define __NR_setpriority 96 /* Common */
149#define __NR_socket 97 /* Common */
150#define __NR_connect 98 /* Common */
151#define __NR_accept 99 /* Common */
152#define __NR_getpriority 100 /* Common */
153#define __NR_rt_sigreturn 101 /* Linux Specific */
154#define __NR_rt_sigaction 102 /* Linux Specific */
155#define __NR_rt_sigprocmask 103 /* Linux Specific */
156#define __NR_rt_sigpending 104 /* Linux Specific */
157#define __NR_rt_sigtimedwait 105 /* Linux Specific */
158#define __NR_rt_sigqueueinfo 106 /* Linux Specific */
159#define __NR_rt_sigsuspend 107 /* Linux Specific */
160#ifdef __32bit_syscall_numbers__
161#define __NR_setresuid32 108 /* Linux Specific, sigvec under SunOS */
162#define __NR_getresuid32 109 /* Linux Specific, sigblock under SunOS */
163#define __NR_setresgid32 110 /* Linux Specific, sigsetmask under SunOS */
164#define __NR_getresgid32 111 /* Linux Specific, sigpause under SunOS */
165#define __NR_setregid32 112 /* Linux sparc32, sigstack under SunOS */
166#else
167#define __NR_setresuid 108 /* Linux Specific, sigvec under SunOS */
168#define __NR_getresuid 109 /* Linux Specific, sigblock under SunOS */
169#define __NR_setresgid 110 /* Linux Specific, sigsetmask under SunOS */
170#define __NR_getresgid 111 /* Linux Specific, sigpause under SunOS */
171#endif
172#define __NR_recvmsg 113 /* Common */
173#define __NR_sendmsg 114 /* Common */
174#ifdef __32bit_syscall_numbers__
175#define __NR_getgroups32 115 /* Linux sparc32, vtrace under SunOS */
176#endif
177#define __NR_gettimeofday 116 /* Common */
178#define __NR_getrusage 117 /* Common */
179#define __NR_getsockopt 118 /* Common */
180#define __NR_getcwd 119 /* Linux Specific */
181#define __NR_readv 120 /* Common */
182#define __NR_writev 121 /* Common */
183#define __NR_settimeofday 122 /* Common */
184#define __NR_fchown 123 /* Common */
185#define __NR_fchmod 124 /* Common */
186#define __NR_recvfrom 125 /* Common */
187#define __NR_setreuid 126 /* Common */
188#define __NR_setregid 127 /* Common */
189#define __NR_rename 128 /* Common */
190#define __NR_truncate 129 /* Common */
191#define __NR_ftruncate 130 /* Common */
192#define __NR_flock 131 /* Common */
193#define __NR_lstat64 132 /* Linux Specific */
194#define __NR_sendto 133 /* Common */
195#define __NR_shutdown 134 /* Common */
196#define __NR_socketpair 135 /* Common */
197#define __NR_mkdir 136 /* Common */
198#define __NR_rmdir 137 /* Common */
199#define __NR_utimes 138 /* SunOS Specific */
200#define __NR_stat64 139 /* Linux Specific */
201#define __NR_sendfile64 140 /* adjtime under SunOS */
202#define __NR_getpeername 141 /* Common */
203#define __NR_futex 142 /* gethostid under SunOS */
204#define __NR_gettid 143 /* ENOSYS under SunOS */
205#define __NR_getrlimit 144 /* Common */
206#define __NR_setrlimit 145 /* Common */
207#define __NR_pivot_root 146 /* Linux Specific, killpg under SunOS */
208#define __NR_prctl 147 /* ENOSYS under SunOS */
209#define __NR_pciconfig_read 148 /* ENOSYS under SunOS */
210#define __NR_pciconfig_write 149 /* ENOSYS under SunOS */
211#define __NR_getsockname 150 /* Common */
212#define __NR_inotify_init 151 /* Linux specific */
213#define __NR_inotify_add_watch 152 /* Linux specific */
214#define __NR_poll 153 /* Common */
215#define __NR_getdents64 154 /* Linux specific */
19#ifdef __32bit_syscall_numbers__ 216#ifdef __32bit_syscall_numbers__
217#define __NR_fcntl64 155 /* Linux sparc32 Specific */
218#endif
219#define __NR_inotify_rm_watch 156 /* Linux specific */
220#define __NR_statfs 157 /* Common */
221#define __NR_fstatfs 158 /* Common */
222#define __NR_umount 159 /* Common */
223#define __NR_sched_set_affinity 160 /* Linux specific, async_daemon under SunOS */
224#define __NR_sched_get_affinity 161 /* Linux specific, getfh under SunOS */
225#define __NR_getdomainname 162 /* SunOS Specific */
226#define __NR_setdomainname 163 /* Common */
227#ifndef __32bit_syscall_numbers__
228#define __NR_utrap_install 164 /* SYSV ABI/v9 required */
229#endif
230#define __NR_quotactl 165 /* Common */
231#define __NR_set_tid_address 166 /* Linux specific, exportfs under SunOS */
232#define __NR_mount 167 /* Common */
233#define __NR_ustat 168 /* Common */
234#define __NR_setxattr 169 /* SunOS: semsys */
235#define __NR_lsetxattr 170 /* SunOS: msgsys */
236#define __NR_fsetxattr 171 /* SunOS: shmsys */
237#define __NR_getxattr 172 /* SunOS: auditsys */
238#define __NR_lgetxattr 173 /* SunOS: rfssys */
239#define __NR_getdents 174 /* Common */
240#define __NR_setsid 175 /* Common */
241#define __NR_fchdir 176 /* Common */
242#define __NR_fgetxattr 177 /* SunOS: fchroot */
243#define __NR_listxattr 178 /* SunOS: vpixsys */
244#define __NR_llistxattr 179 /* SunOS: aioread */
245#define __NR_flistxattr 180 /* SunOS: aiowrite */
246#define __NR_removexattr 181 /* SunOS: aiowait */
247#define __NR_lremovexattr 182 /* SunOS: aiocancel */
248#define __NR_sigpending 183 /* Common */
249#define __NR_query_module 184 /* Linux Specific */
250#define __NR_setpgid 185 /* Common */
251#define __NR_fremovexattr 186 /* SunOS: pathconf */
252#define __NR_tkill 187 /* SunOS: fpathconf */
253#define __NR_exit_group 188 /* Linux specific, sysconf undef SunOS */
254#define __NR_uname 189 /* Linux Specific */
255#define __NR_init_module 190 /* Linux Specific */
256#define __NR_personality 191 /* Linux Specific */
257#define __NR_remap_file_pages 192 /* Linux Specific */
258#define __NR_epoll_create 193 /* Linux Specific */
259#define __NR_epoll_ctl 194 /* Linux Specific */
260#define __NR_epoll_wait 195 /* Linux Specific */
261#define __NR_ioprio_set 196 /* Linux Specific */
262#define __NR_getppid 197 /* Linux Specific */
263#define __NR_sigaction 198 /* Linux Specific */
264#define __NR_sgetmask 199 /* Linux Specific */
265#define __NR_ssetmask 200 /* Linux Specific */
266#define __NR_sigsuspend 201 /* Linux Specific */
267#define __NR_oldlstat 202 /* Linux Specific */
268#define __NR_uselib 203 /* Linux Specific */
269#define __NR_readdir 204 /* Linux Specific */
270#define __NR_readahead 205 /* Linux Specific */
271#define __NR_socketcall 206 /* Linux Specific */
272#define __NR_syslog 207 /* Linux Specific */
273#define __NR_lookup_dcookie 208 /* Linux Specific */
274#define __NR_fadvise64 209 /* Linux Specific */
275#define __NR_fadvise64_64 210 /* Linux Specific */
276#define __NR_tgkill 211 /* Linux Specific */
277#define __NR_waitpid 212 /* Linux Specific */
278#define __NR_swapoff 213 /* Linux Specific */
279#define __NR_sysinfo 214 /* Linux Specific */
280#define __NR_ipc 215 /* Linux Specific */
281#define __NR_sigreturn 216 /* Linux Specific */
282#define __NR_clone 217 /* Linux Specific */
283#define __NR_ioprio_get 218 /* Linux Specific */
284#define __NR_adjtimex 219 /* Linux Specific */
285#define __NR_sigprocmask 220 /* Linux Specific */
286#define __NR_create_module 221 /* Linux Specific */
287#define __NR_delete_module 222 /* Linux Specific */
288#define __NR_get_kernel_syms 223 /* Linux Specific */
289#define __NR_getpgid 224 /* Linux Specific */
290#define __NR_bdflush 225 /* Linux Specific */
291#define __NR_sysfs 226 /* Linux Specific */
292#define __NR_afs_syscall 227 /* Linux Specific */
293#define __NR_setfsuid 228 /* Linux Specific */
294#define __NR_setfsgid 229 /* Linux Specific */
295#define __NR__newselect 230 /* Linux Specific */
296#ifdef __32bit_syscall_numbers__
297#define __NR_time 231 /* Linux Specific */
20#else 298#else
299#ifdef __KERNEL__
21#define __NR_time 231 /* Linux sparc32 */ 300#define __NR_time 231 /* Linux sparc32 */
22#endif 301#endif
302#endif
303#define __NR_splice 232 /* Linux Specific */
304#define __NR_stime 233 /* Linux Specific */
305#define __NR_statfs64 234 /* Linux Specific */
306#define __NR_fstatfs64 235 /* Linux Specific */
307#define __NR__llseek 236 /* Linux Specific */
308#define __NR_mlock 237
309#define __NR_munlock 238
310#define __NR_mlockall 239
311#define __NR_munlockall 240
312#define __NR_sched_setparam 241
313#define __NR_sched_getparam 242
314#define __NR_sched_setscheduler 243
315#define __NR_sched_getscheduler 244
316#define __NR_sched_yield 245
317#define __NR_sched_get_priority_max 246
318#define __NR_sched_get_priority_min 247
319#define __NR_sched_rr_get_interval 248
320#define __NR_nanosleep 249
321#define __NR_mremap 250
322#define __NR__sysctl 251
323#define __NR_getsid 252
324#define __NR_fdatasync 253
325#define __NR_nfsservctl 254
326#define __NR_sync_file_range 255
327#define __NR_clock_settime 256
328#define __NR_clock_gettime 257
329#define __NR_clock_getres 258
330#define __NR_clock_nanosleep 259
331#define __NR_sched_getaffinity 260
332#define __NR_sched_setaffinity 261
333#define __NR_timer_settime 262
334#define __NR_timer_gettime 263
335#define __NR_timer_getoverrun 264
336#define __NR_timer_delete 265
337#define __NR_timer_create 266
338/* #define __NR_vserver 267 Reserved for VSERVER */
339#define __NR_io_setup 268
340#define __NR_io_destroy 269
341#define __NR_io_submit 270
342#define __NR_io_cancel 271
343#define __NR_io_getevents 272
344#define __NR_mq_open 273
345#define __NR_mq_unlink 274
346#define __NR_mq_timedsend 275
347#define __NR_mq_timedreceive 276
348#define __NR_mq_notify 277
349#define __NR_mq_getsetattr 278
350#define __NR_waitid 279
351#define __NR_tee 280
352#define __NR_add_key 281
353#define __NR_request_key 282
354#define __NR_keyctl 283
355#define __NR_openat 284
356#define __NR_mkdirat 285
357#define __NR_mknodat 286
358#define __NR_fchownat 287
359#define __NR_futimesat 288
360#define __NR_fstatat64 289
361#define __NR_unlinkat 290
362#define __NR_renameat 291
363#define __NR_linkat 292
364#define __NR_symlinkat 293
365#define __NR_readlinkat 294
366#define __NR_fchmodat 295
367#define __NR_faccessat 296
368#define __NR_pselect6 297
369#define __NR_ppoll 298
370#define __NR_unshare 299
371#define __NR_set_robust_list 300
372#define __NR_get_robust_list 301
373#define __NR_migrate_pages 302
374#define __NR_mbind 303
375#define __NR_get_mempolicy 304
376#define __NR_set_mempolicy 305
377#define __NR_kexec_load 306
378#define __NR_move_pages 307
379#define __NR_getcpu 308
380#define __NR_epoll_pwait 309
381#define __NR_utimensat 310
382#define __NR_signalfd 311
383#define __NR_timerfd_create 312
384#define __NR_eventfd 313
385#define __NR_fallocate 314
386#define __NR_timerfd_settime 315
387#define __NR_timerfd_gettime 316
388#define __NR_signalfd4 317
389#define __NR_eventfd2 318
390#define __NR_epoll_create1 319
391#define __NR_dup3 320
392#define __NR_pipe2 321
393#define __NR_inotify_init1 322
394#define __NR_accept4 323
395#define __NR_preadv 324
396#define __NR_pwritev 325
397#define __NR_rt_tgsigqueueinfo 326
398#define __NR_perf_event_open 327
399#define __NR_recvmmsg 328
400#define __NR_fanotify_init 329
401#define __NR_fanotify_mark 330
402#define __NR_prlimit64 331
403#define __NR_name_to_handle_at 332
404#define __NR_open_by_handle_at 333
405#define __NR_clock_adjtime 334
406#define __NR_syncfs 335
407#define __NR_sendmmsg 336
408#define __NR_setns 337
409
410#define NR_syscalls 338
411
412#ifdef __32bit_syscall_numbers__
413/* Sparc 32-bit only has the "setresuid32", "getresuid32" variants,
414 * it never had the plain ones and there is no value to adding those
415 * old versions into the syscall table.
416 */
417#define __IGNORE_setresuid
418#define __IGNORE_getresuid
419#define __IGNORE_setresgid
420#define __IGNORE_getresgid
421#endif
422
423#ifdef __KERNEL__
424#define __ARCH_WANT_IPC_PARSE_VERSION
23#define __ARCH_WANT_OLD_READDIR 425#define __ARCH_WANT_OLD_READDIR
24#define __ARCH_WANT_STAT64 426#define __ARCH_WANT_STAT64
25#define __ARCH_WANT_SYS_ALARM 427#define __ARCH_WANT_SYS_ALARM
@@ -44,8 +446,6 @@
44#else 446#else
45#define __ARCH_WANT_COMPAT_SYS_TIME 447#define __ARCH_WANT_COMPAT_SYS_TIME
46#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND 448#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND
47#define __ARCH_WANT_COMPAT_SYS_SENDFILE
48#define __ARCH_WANT_COMPAT_SYS_SCHED_RR_GET_INTERVAL
49#endif 449#endif
50 450
51/* 451/*
@@ -56,4 +456,5 @@
56 */ 456 */
57#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") 457#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
58 458
459#endif /* __KERNEL__ */
59#endif /* _SPARC_UNISTD_H */ 460#endif /* _SPARC_UNISTD_H */
diff --git a/arch/sparc/include/asm/vaddrs.h b/arch/sparc/include/asm/vaddrs.h
index c3dbcf90203..541e13755ce 100644
--- a/arch/sparc/include/asm/vaddrs.h
+++ b/arch/sparc/include/asm/vaddrs.h
@@ -30,32 +30,26 @@
30 */ 30 */
31#define SRMMU_NOCACHE_ALCRATIO 64 /* 256 pages per 64MB of system RAM */ 31#define SRMMU_NOCACHE_ALCRATIO 64 /* 256 pages per 64MB of system RAM */
32 32
33#ifndef __ASSEMBLY__
34#include <asm/kmap_types.h>
35
36enum fixed_addresses {
37 FIX_HOLE,
38#ifdef CONFIG_HIGHMEM
39 FIX_KMAP_BEGIN,
40 FIX_KMAP_END = (KM_TYPE_NR * NR_CPUS),
41#endif
42 __end_of_fixed_addresses
43};
44#endif
45
46/* Leave one empty page between IO pages at 0xfd000000 and
47 * the top of the fixmap.
48 */
49#define FIXADDR_TOP (0xfcfff000UL)
50#define FIXADDR_SIZE ((FIX_KMAP_END + 1) << PAGE_SHIFT)
51#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
52
53#define __fix_to_virt(x) (FIXADDR_TOP - ((x) << PAGE_SHIFT))
54
55#define SUN4M_IOBASE_VADDR 0xfd000000 /* Base for mapping pages */ 33#define SUN4M_IOBASE_VADDR 0xfd000000 /* Base for mapping pages */
56#define IOBASE_VADDR 0xfe000000 34#define IOBASE_VADDR 0xfe000000
57#define IOBASE_END 0xfe600000 35#define IOBASE_END 0xfe600000
58 36
37/*
38 * On the sun4/4c we need a place
39 * to reliably map locked down kernel data. This includes the
40 * task_struct and kernel stack pages of each process plus the
41 * scsi buffers during dvma IO transfers, also the floppy buffers
42 * during pseudo dma which runs with traps off (no faults allowed).
43 * Some quick calculations yield:
44 * NR_TASKS <512> * (3 * PAGE_SIZE) == 0x600000
45 * Subtract this from 0xc00000 and you get 0x927C0 of vm left
46 * over to map SCSI dvma + floppy pseudo-dma buffers. So be
47 * careful if you change NR_TASKS or else there won't be enough
48 * room for it all.
49 */
50#define SUN4C_LOCK_VADDR 0xff000000
51#define SUN4C_LOCK_END 0xffc00000
52
59#define KADB_DEBUGGER_BEGVM 0xffc00000 /* Where kern debugger is in virt-mem */ 53#define KADB_DEBUGGER_BEGVM 0xffc00000 /* Where kern debugger is in virt-mem */
60#define KADB_DEBUGGER_ENDVM 0xffd00000 54#define KADB_DEBUGGER_ENDVM 0xffd00000
61#define DEBUG_FIRSTVADDR KADB_DEBUGGER_BEGVM 55#define DEBUG_FIRSTVADDR KADB_DEBUGGER_BEGVM
diff --git a/arch/sparc/include/asm/vga.h b/arch/sparc/include/asm/vga.h
index ec0e9967d93..c69d5b2ba19 100644
--- a/arch/sparc/include/asm/vga.h
+++ b/arch/sparc/include/asm/vga.h
@@ -7,7 +7,6 @@
7#ifndef _LINUX_ASM_VGA_H_ 7#ifndef _LINUX_ASM_VGA_H_
8#define _LINUX_ASM_VGA_H_ 8#define _LINUX_ASM_VGA_H_
9 9
10#include <linux/bug.h>
11#include <asm/types.h> 10#include <asm/types.h>
12 11
13#define VT_BUF_HAVE_RW 12#define VT_BUF_HAVE_RW
diff --git a/arch/sparc/include/asm/vio.h b/arch/sparc/include/asm/vio.h
index 432afa83886..9d83d3bcb49 100644
--- a/arch/sparc/include/asm/vio.h
+++ b/arch/sparc/include/asm/vio.h
@@ -284,7 +284,6 @@ struct vio_dev {
284}; 284};
285 285
286struct vio_driver { 286struct vio_driver {
287 const char *name;
288 struct list_head node; 287 struct list_head node;
289 const struct vio_device_id *id_table; 288 const struct vio_device_id *id_table;
290 int (*probe)(struct vio_dev *dev, const struct vio_device_id *id); 289 int (*probe)(struct vio_dev *dev, const struct vio_device_id *id);
@@ -372,13 +371,7 @@ do { if (vio->debug & VIO_DEBUG_##TYPE) \
372 vio->vdev->channel_id, ## a); \ 371 vio->vdev->channel_id, ## a); \
373} while (0) 372} while (0)
374 373
375extern int __vio_register_driver(struct vio_driver *drv, struct module *owner, 374extern int vio_register_driver(struct vio_driver *drv);
376 const char *mod_name);
377/*
378 * vio_register_driver must be a macro so that KBUILD_MODNAME can be expanded
379 */
380#define vio_register_driver(driver) \
381 __vio_register_driver(driver, THIS_MODULE, KBUILD_MODNAME)
382extern void vio_unregister_driver(struct vio_driver *drv); 375extern void vio_unregister_driver(struct vio_driver *drv);
383 376
384static inline struct vio_driver *to_vio_driver(struct device_driver *drv) 377static inline struct vio_driver *to_vio_driver(struct device_driver *drv)
diff --git a/arch/sparc/include/asm/winmacro.h b/arch/sparc/include/asm/winmacro.h
index 9b7b21764cd..a9be04b0d04 100644
--- a/arch/sparc/include/asm/winmacro.h
+++ b/arch/sparc/include/asm/winmacro.h
@@ -103,24 +103,37 @@
103 st %scratch, [%cur_reg + TI_W_SAVED]; 103 st %scratch, [%cur_reg + TI_W_SAVED];
104 104
105#ifdef CONFIG_SMP 105#ifdef CONFIG_SMP
106#define LOAD_CURRENT(dest_reg, idreg) \ 106/* Results of LOAD_CURRENT() after BTFIXUP for SUN4M, SUN4D & LEON (comments) */
107661: rd %tbr, %idreg; \ 107#define LOAD_CURRENT4M(dest_reg, idreg) \
108 srl %idreg, 10, %idreg; \ 108 rd %tbr, %idreg; \
109 and %idreg, 0xc, %idreg; \ 109 sethi %hi(current_set), %dest_reg; \
110 .section .cpuid_patch, "ax"; \ 110 srl %idreg, 10, %idreg; \
111 /* Instruction location. */ \ 111 or %dest_reg, %lo(current_set), %dest_reg; \
112 .word 661b; \ 112 and %idreg, 0xc, %idreg; \
113 /* SUN4D implementation. */ \ 113 ld [%idreg + %dest_reg], %dest_reg;
114 lda [%g0] ASI_M_VIKING_TMP1, %idreg; \ 114
115 sll %idreg, 2, %idreg; \ 115#define LOAD_CURRENT4D(dest_reg, idreg) \
116 nop; \ 116 lda [%g0] ASI_M_VIKING_TMP1, %idreg; \
117 /* LEON implementation. */ \ 117 sethi %hi(C_LABEL(current_set)), %dest_reg; \
118 rd %asr17, %idreg; \ 118 sll %idreg, 2, %idreg; \
119 srl %idreg, 0x1c, %idreg; \ 119 or %dest_reg, %lo(C_LABEL(current_set)), %dest_reg; \
120 sll %idreg, 0x02, %idreg; \ 120 ld [%idreg + %dest_reg], %dest_reg;
121 .previous; \ 121
122 sethi %hi(current_set), %dest_reg; \ 122#define LOAD_CURRENT_LEON(dest_reg, idreg) \
123 or %dest_reg, %lo(current_set), %dest_reg;\ 123 rd %asr17, %idreg; \
124 sethi %hi(current_set), %dest_reg; \
125 srl %idreg, 0x1c, %idreg; \
126 or %dest_reg, %lo(current_set), %dest_reg; \
127 sll %idreg, 0x2, %idreg; \
128 ld [%idreg + %dest_reg], %dest_reg;
129
130/* Blackbox - take care with this... - check smp4m and smp4d before changing this. */
131#define LOAD_CURRENT(dest_reg, idreg) \
132 sethi %hi(___b_load_current), %idreg; \
133 sethi %hi(current_set), %dest_reg; \
134 sethi %hi(boot_cpu_id4), %idreg; \
135 or %dest_reg, %lo(current_set), %dest_reg; \
136 ldub [%idreg + %lo(boot_cpu_id4)], %idreg; \
124 ld [%idreg + %dest_reg], %dest_reg; 137 ld [%idreg + %dest_reg], %dest_reg;
125#else 138#else
126#define LOAD_CURRENT(dest_reg, idreg) \ 139#define LOAD_CURRENT(dest_reg, idreg) \